Boot log: asus-cx9400-volteer
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
1 13:51:24.446972 lava-dispatcher, installed at version: 2023.01
2 13:51:24.447200 start: 0 validate
3 13:51:24.447331 Start time: 2023-04-20 13:51:24.447324+00:00 (UTC)
4 13:51:24.447461 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:51:24.447590 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230414.0%2Famd64%2Frootfs.cpio.gz exists
6 13:51:24.741320 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:51:24.742171 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.280-cip96-59-g4b02e7efb967d%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:51:25.038124 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:51:25.038354 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.280-cip96-59-g4b02e7efb967d%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 13:51:25.345746 validate duration: 0.90
12 13:51:25.346166 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 13:51:25.346315 start: 1.1 download-retry (timeout 00:10:00) [common]
14 13:51:25.346456 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 13:51:25.346638 Not decompressing ramdisk as can be used compressed.
16 13:51:25.346771 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230414.0/amd64/rootfs.cpio.gz
17 13:51:25.346882 saving as /var/lib/lava/dispatcher/tmp/10062385/tftp-deploy-2z4dxnun/ramdisk/rootfs.cpio.gz
18 13:51:25.346998 total size: 35757907 (34MB)
19 13:51:25.348567 progress 0% (0MB)
20 13:51:25.364218 progress 5% (1MB)
21 13:51:25.379164 progress 10% (3MB)
22 13:51:25.394129 progress 15% (5MB)
23 13:51:25.407500 progress 20% (6MB)
24 13:51:25.417231 progress 25% (8MB)
25 13:51:25.426396 progress 30% (10MB)
26 13:51:25.437007 progress 35% (11MB)
27 13:51:25.446332 progress 40% (13MB)
28 13:51:25.455853 progress 45% (15MB)
29 13:51:25.465085 progress 50% (17MB)
30 13:51:25.474360 progress 55% (18MB)
31 13:51:25.483491 progress 60% (20MB)
32 13:51:25.492850 progress 65% (22MB)
33 13:51:25.501922 progress 70% (23MB)
34 13:51:25.511208 progress 75% (25MB)
35 13:51:25.520501 progress 80% (27MB)
36 13:51:25.529763 progress 85% (29MB)
37 13:51:25.538952 progress 90% (30MB)
38 13:51:25.547916 progress 95% (32MB)
39 13:51:25.557064 progress 100% (34MB)
40 13:51:25.557238 34MB downloaded in 0.21s (162.20MB/s)
41 13:51:25.557394 end: 1.1.1 http-download (duration 00:00:00) [common]
43 13:51:25.557644 end: 1.1 download-retry (duration 00:00:00) [common]
44 13:51:25.557732 start: 1.2 download-retry (timeout 00:10:00) [common]
45 13:51:25.557822 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 13:51:25.557948 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.280-cip96-59-g4b02e7efb967d/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 13:51:25.558019 saving as /var/lib/lava/dispatcher/tmp/10062385/tftp-deploy-2z4dxnun/kernel/bzImage
48 13:51:25.558082 total size: 10854400 (10MB)
49 13:51:25.558143 No compression specified
50 13:51:25.559283 progress 0% (0MB)
51 13:51:25.562097 progress 5% (0MB)
52 13:51:25.565106 progress 10% (1MB)
53 13:51:25.567847 progress 15% (1MB)
54 13:51:25.570733 progress 20% (2MB)
55 13:51:25.573464 progress 25% (2MB)
56 13:51:25.576429 progress 30% (3MB)
57 13:51:25.579092 progress 35% (3MB)
58 13:51:25.581957 progress 40% (4MB)
59 13:51:25.584905 progress 45% (4MB)
60 13:51:25.587585 progress 50% (5MB)
61 13:51:25.590500 progress 55% (5MB)
62 13:51:25.593251 progress 60% (6MB)
63 13:51:25.596085 progress 65% (6MB)
64 13:51:25.598903 progress 70% (7MB)
65 13:51:25.601738 progress 75% (7MB)
66 13:51:25.604535 progress 80% (8MB)
67 13:51:25.607349 progress 85% (8MB)
68 13:51:25.610195 progress 90% (9MB)
69 13:51:25.613066 progress 95% (9MB)
70 13:51:25.615893 progress 100% (10MB)
71 13:51:25.616031 10MB downloaded in 0.06s (178.64MB/s)
72 13:51:25.616174 end: 1.2.1 http-download (duration 00:00:00) [common]
74 13:51:25.616469 end: 1.2 download-retry (duration 00:00:00) [common]
75 13:51:25.616560 start: 1.3 download-retry (timeout 00:10:00) [common]
76 13:51:25.616647 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 13:51:25.616782 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.280-cip96-59-g4b02e7efb967d/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 13:51:25.616852 saving as /var/lib/lava/dispatcher/tmp/10062385/tftp-deploy-2z4dxnun/modules/modules.tar
79 13:51:25.616914 total size: 483736 (0MB)
80 13:51:25.616974 Using unxz to decompress xz
81 13:51:25.620528 progress 6% (0MB)
82 13:51:25.620938 progress 13% (0MB)
83 13:51:25.621179 progress 20% (0MB)
84 13:51:25.622534 progress 27% (0MB)
85 13:51:25.624673 progress 33% (0MB)
86 13:51:25.626738 progress 40% (0MB)
87 13:51:25.628582 progress 47% (0MB)
88 13:51:25.630737 progress 54% (0MB)
89 13:51:25.632818 progress 60% (0MB)
90 13:51:25.634759 progress 67% (0MB)
91 13:51:25.636717 progress 74% (0MB)
92 13:51:25.638570 progress 81% (0MB)
93 13:51:25.640491 progress 88% (0MB)
94 13:51:25.642767 progress 94% (0MB)
95 13:51:25.644904 progress 100% (0MB)
96 13:51:25.651721 0MB downloaded in 0.03s (13.26MB/s)
97 13:51:25.652082 end: 1.3.1 http-download (duration 00:00:00) [common]
99 13:51:25.652386 end: 1.3 download-retry (duration 00:00:00) [common]
100 13:51:25.652498 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
101 13:51:25.652595 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
102 13:51:25.652679 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 13:51:25.652763 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
104 13:51:25.652970 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10062385/lava-overlay-1opfdqm3
105 13:51:25.653101 makedir: /var/lib/lava/dispatcher/tmp/10062385/lava-overlay-1opfdqm3/lava-10062385/bin
106 13:51:25.653204 makedir: /var/lib/lava/dispatcher/tmp/10062385/lava-overlay-1opfdqm3/lava-10062385/tests
107 13:51:25.653305 makedir: /var/lib/lava/dispatcher/tmp/10062385/lava-overlay-1opfdqm3/lava-10062385/results
108 13:51:25.653423 Creating /var/lib/lava/dispatcher/tmp/10062385/lava-overlay-1opfdqm3/lava-10062385/bin/lava-add-keys
109 13:51:25.653563 Creating /var/lib/lava/dispatcher/tmp/10062385/lava-overlay-1opfdqm3/lava-10062385/bin/lava-add-sources
110 13:51:25.653689 Creating /var/lib/lava/dispatcher/tmp/10062385/lava-overlay-1opfdqm3/lava-10062385/bin/lava-background-process-start
111 13:51:25.653815 Creating /var/lib/lava/dispatcher/tmp/10062385/lava-overlay-1opfdqm3/lava-10062385/bin/lava-background-process-stop
112 13:51:25.653950 Creating /var/lib/lava/dispatcher/tmp/10062385/lava-overlay-1opfdqm3/lava-10062385/bin/lava-common-functions
113 13:51:25.654072 Creating /var/lib/lava/dispatcher/tmp/10062385/lava-overlay-1opfdqm3/lava-10062385/bin/lava-echo-ipv4
114 13:51:25.654192 Creating /var/lib/lava/dispatcher/tmp/10062385/lava-overlay-1opfdqm3/lava-10062385/bin/lava-install-packages
115 13:51:25.654310 Creating /var/lib/lava/dispatcher/tmp/10062385/lava-overlay-1opfdqm3/lava-10062385/bin/lava-installed-packages
116 13:51:25.654430 Creating /var/lib/lava/dispatcher/tmp/10062385/lava-overlay-1opfdqm3/lava-10062385/bin/lava-os-build
117 13:51:25.654546 Creating /var/lib/lava/dispatcher/tmp/10062385/lava-overlay-1opfdqm3/lava-10062385/bin/lava-probe-channel
118 13:51:25.654663 Creating /var/lib/lava/dispatcher/tmp/10062385/lava-overlay-1opfdqm3/lava-10062385/bin/lava-probe-ip
119 13:51:25.654781 Creating /var/lib/lava/dispatcher/tmp/10062385/lava-overlay-1opfdqm3/lava-10062385/bin/lava-target-ip
120 13:51:25.654897 Creating /var/lib/lava/dispatcher/tmp/10062385/lava-overlay-1opfdqm3/lava-10062385/bin/lava-target-mac
121 13:51:25.655025 Creating /var/lib/lava/dispatcher/tmp/10062385/lava-overlay-1opfdqm3/lava-10062385/bin/lava-target-storage
122 13:51:25.655159 Creating /var/lib/lava/dispatcher/tmp/10062385/lava-overlay-1opfdqm3/lava-10062385/bin/lava-test-case
123 13:51:25.655277 Creating /var/lib/lava/dispatcher/tmp/10062385/lava-overlay-1opfdqm3/lava-10062385/bin/lava-test-event
124 13:51:25.655393 Creating /var/lib/lava/dispatcher/tmp/10062385/lava-overlay-1opfdqm3/lava-10062385/bin/lava-test-feedback
125 13:51:25.655511 Creating /var/lib/lava/dispatcher/tmp/10062385/lava-overlay-1opfdqm3/lava-10062385/bin/lava-test-raise
126 13:51:25.655629 Creating /var/lib/lava/dispatcher/tmp/10062385/lava-overlay-1opfdqm3/lava-10062385/bin/lava-test-reference
127 13:51:25.655750 Creating /var/lib/lava/dispatcher/tmp/10062385/lava-overlay-1opfdqm3/lava-10062385/bin/lava-test-runner
128 13:51:25.655867 Creating /var/lib/lava/dispatcher/tmp/10062385/lava-overlay-1opfdqm3/lava-10062385/bin/lava-test-set
129 13:51:25.656001 Creating /var/lib/lava/dispatcher/tmp/10062385/lava-overlay-1opfdqm3/lava-10062385/bin/lava-test-shell
130 13:51:25.656127 Updating /var/lib/lava/dispatcher/tmp/10062385/lava-overlay-1opfdqm3/lava-10062385/bin/lava-install-packages (oe)
131 13:51:25.656274 Updating /var/lib/lava/dispatcher/tmp/10062385/lava-overlay-1opfdqm3/lava-10062385/bin/lava-installed-packages (oe)
132 13:51:25.656433 Creating /var/lib/lava/dispatcher/tmp/10062385/lava-overlay-1opfdqm3/lava-10062385/environment
133 13:51:25.656539 LAVA metadata
134 13:51:25.656615 - LAVA_JOB_ID=10062385
135 13:51:25.656680 - LAVA_DISPATCHER_IP=192.168.201.1
136 13:51:25.656783 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
137 13:51:25.656853 skipped lava-vland-overlay
138 13:51:25.656927 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 13:51:25.657011 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
140 13:51:25.657073 skipped lava-multinode-overlay
141 13:51:25.657145 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 13:51:25.657225 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
143 13:51:25.657300 Loading test definitions
144 13:51:25.657394 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
145 13:51:25.657467 Using /lava-10062385 at stage 0
146 13:51:25.657765 uuid=10062385_1.4.2.3.1 testdef=None
147 13:51:25.657852 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 13:51:25.657953 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
149 13:51:25.658469 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 13:51:25.658691 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
152 13:51:25.659284 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 13:51:25.659516 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
155 13:51:25.660135 runner path: /var/lib/lava/dispatcher/tmp/10062385/lava-overlay-1opfdqm3/lava-10062385/0/tests/0_cros-ec test_uuid 10062385_1.4.2.3.1
156 13:51:25.660288 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 13:51:25.660537 Creating lava-test-runner.conf files
159 13:51:25.660600 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10062385/lava-overlay-1opfdqm3/lava-10062385/0 for stage 0
160 13:51:25.660686 - 0_cros-ec
161 13:51:25.660779 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
162 13:51:25.660865 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
163 13:51:25.667387 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
164 13:51:25.667508 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
165 13:51:25.667599 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
166 13:51:25.667712 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
167 13:51:25.667801 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
168 13:51:26.644921 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
169 13:51:26.645280 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
170 13:51:26.645401 extracting modules file /var/lib/lava/dispatcher/tmp/10062385/tftp-deploy-2z4dxnun/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10062385/extract-overlay-ramdisk-s5_p5t04/ramdisk
171 13:51:26.658548 end: 1.4.4 extract-modules (duration 00:00:00) [common]
172 13:51:26.658678 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
173 13:51:26.658770 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10062385/compress-overlay-kxytw5t6/overlay-1.4.2.4.tar.gz to ramdisk
174 13:51:26.658841 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10062385/compress-overlay-kxytw5t6/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10062385/extract-overlay-ramdisk-s5_p5t04/ramdisk
175 13:51:26.664093 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
176 13:51:26.664210 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
177 13:51:26.664303 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
178 13:51:26.664440 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
179 13:51:26.664519 Building ramdisk /var/lib/lava/dispatcher/tmp/10062385/extract-overlay-ramdisk-s5_p5t04/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10062385/extract-overlay-ramdisk-s5_p5t04/ramdisk
180 13:51:27.123534 >> 188232 blocks
181 13:51:30.675223 rename /var/lib/lava/dispatcher/tmp/10062385/extract-overlay-ramdisk-s5_p5t04/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10062385/tftp-deploy-2z4dxnun/ramdisk/ramdisk.cpio.gz
182 13:51:30.675746 end: 1.4.7 compress-ramdisk (duration 00:00:04) [common]
183 13:51:30.675875 start: 1.4.8 prepare-kernel (timeout 00:09:55) [common]
184 13:51:30.675973 start: 1.4.8.1 prepare-fit (timeout 00:09:55) [common]
185 13:51:30.676068 No mkimage arch provided, not using FIT.
186 13:51:30.676155 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
187 13:51:30.676242 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
188 13:51:30.676356 end: 1.4 prepare-tftp-overlay (duration 00:00:05) [common]
189 13:51:30.676456 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:55) [common]
190 13:51:30.676540 No LXC device requested
191 13:51:30.676623 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
192 13:51:30.676713 start: 1.6 deploy-device-env (timeout 00:09:55) [common]
193 13:51:30.676814 end: 1.6 deploy-device-env (duration 00:00:00) [common]
194 13:51:30.676911 Checking files for TFTP limit of 4294967296 bytes.
195 13:51:30.677374 end: 1 tftp-deploy (duration 00:00:05) [common]
196 13:51:30.677478 start: 2 depthcharge-action (timeout 00:05:00) [common]
197 13:51:30.677566 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
198 13:51:30.677685 substitutions:
199 13:51:30.677750 - {DTB}: None
200 13:51:30.677812 - {INITRD}: 10062385/tftp-deploy-2z4dxnun/ramdisk/ramdisk.cpio.gz
201 13:51:30.677870 - {KERNEL}: 10062385/tftp-deploy-2z4dxnun/kernel/bzImage
202 13:51:30.677926 - {LAVA_MAC}: None
203 13:51:30.677981 - {PRESEED_CONFIG}: None
204 13:51:30.678036 - {PRESEED_LOCAL}: None
205 13:51:30.678091 - {RAMDISK}: 10062385/tftp-deploy-2z4dxnun/ramdisk/ramdisk.cpio.gz
206 13:51:30.678146 - {ROOT_PART}: None
207 13:51:30.678200 - {ROOT}: None
208 13:51:30.678254 - {SERVER_IP}: 192.168.201.1
209 13:51:30.678308 - {TEE}: None
210 13:51:30.678361 Parsed boot commands:
211 13:51:30.678414 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
212 13:51:30.678588 Parsed boot commands: tftpboot 192.168.201.1 10062385/tftp-deploy-2z4dxnun/kernel/bzImage 10062385/tftp-deploy-2z4dxnun/kernel/cmdline 10062385/tftp-deploy-2z4dxnun/ramdisk/ramdisk.cpio.gz
213 13:51:30.678676 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
214 13:51:30.678764 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
215 13:51:30.678853 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
216 13:51:30.678935 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
217 13:51:30.679004 Not connected, no need to disconnect.
218 13:51:30.679078 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
219 13:51:30.679160 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
220 13:51:30.679227 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-2'
221 13:51:30.682234 Setting prompt string to ['lava-test: # ']
222 13:51:30.682560 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
223 13:51:30.682669 end: 2.2.1 reset-connection (duration 00:00:00) [common]
224 13:51:30.682770 start: 2.2.2 reset-device (timeout 00:05:00) [common]
225 13:51:30.682858 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
226 13:51:30.683716 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=reboot'
227 13:51:35.818888 >> Command sent successfully.
228 13:51:35.821368 Returned 0 in 5 seconds
229 13:51:35.922147 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
231 13:51:35.922470 end: 2.2.2 reset-device (duration 00:00:05) [common]
232 13:51:35.922571 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
233 13:51:35.922662 Setting prompt string to 'Starting depthcharge on Voema...'
234 13:51:35.922731 Changing prompt to 'Starting depthcharge on Voema...'
235 13:51:35.922801 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
236 13:51:35.923139 [Enter `^Ec?' for help]
237 13:51:37.525656
238 13:51:37.525830
239 13:51:37.535674 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
240 13:51:37.538982 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
241 13:51:37.545522 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
242 13:51:37.548692 CPU: AES supported, TXT NOT supported, VT supported
243 13:51:37.554965 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
244 13:51:37.561543 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
245 13:51:37.565285 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
246 13:51:37.568740 VBOOT: Loading verstage.
247 13:51:37.575219 FMAP: Found "FLASH" version 1.1 at 0x1804000.
248 13:51:37.578447 FMAP: base = 0x0 size = 0x2000000 #areas = 32
249 13:51:37.581653 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
250 13:51:37.592938 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
251 13:51:37.599467 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
252 13:51:37.599558
253 13:51:37.599627
254 13:51:37.612026 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
255 13:51:37.625821 Probing TPM: . done!
256 13:51:37.629653 TPM ready after 0 ms
257 13:51:37.633027 Connected to device vid:did:rid of 1ae0:0028:00
258 13:51:37.644284 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
259 13:51:37.650816 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
260 13:51:37.654367 Initialized TPM device CR50 revision 0
261 13:51:37.706773 tlcl_send_startup: Startup return code is 0
262 13:51:37.706910 TPM: setup succeeded
263 13:51:37.722126 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
264 13:51:37.736612 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
265 13:51:37.749289 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
266 13:51:37.758906 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
267 13:51:37.762774 Chrome EC: UHEPI supported
268 13:51:37.766783 Phase 1
269 13:51:37.769850 FMAP: area GBB found @ 1805000 (458752 bytes)
270 13:51:37.779661 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
271 13:51:37.786658 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
272 13:51:37.792888 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
273 13:51:37.799368 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
274 13:51:37.802553 Recovery requested (1009000e)
275 13:51:37.811799 TPM: Extending digest for VBOOT: boot mode into PCR 0
276 13:51:37.818408 tlcl_extend: response is 0
277 13:51:37.824960 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
278 13:51:37.834326 tlcl_extend: response is 0
279 13:51:37.840927 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
280 13:51:37.847595 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
281 13:51:37.854218 BS: verstage times (exec / console): total (unknown) / 142 ms
282 13:51:37.854319
283 13:51:37.854389
284 13:51:37.867873 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
285 13:51:37.874355 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
286 13:51:37.877354 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
287 13:51:37.881115 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
288 13:51:37.887798 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
289 13:51:37.890480 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
290 13:51:37.894035 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
291 13:51:37.897178 TCO_STS: 0000 0000
292 13:51:37.900539 GEN_PMCON: d0015038 00002200
293 13:51:37.904119 GBLRST_CAUSE: 00000000 00000000
294 13:51:37.907404 HPR_CAUSE0: 00000000
295 13:51:37.907489 prev_sleep_state 5
296 13:51:37.910756 Boot Count incremented to 19331
297 13:51:37.917599 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
298 13:51:37.923986 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
299 13:51:37.934322 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
300 13:51:37.940342 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
301 13:51:37.943807 Chrome EC: UHEPI supported
302 13:51:37.950318 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
303 13:51:37.961775 Probing TPM: done!
304 13:51:37.968361 Connected to device vid:did:rid of 1ae0:0028:00
305 13:51:37.978630 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
306 13:51:37.987107 Initialized TPM device CR50 revision 0
307 13:51:37.997139 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
308 13:51:38.003475 MRC: Hash idx 0x100b comparison successful.
309 13:51:38.006507 MRC cache found, size faa8
310 13:51:38.006599 bootmode is set to: 2
311 13:51:38.010453 SPD index = 0
312 13:51:38.017132 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
313 13:51:38.019754 SPD: module type is LPDDR4X
314 13:51:38.023033 SPD: module part number is MT53E512M64D4NW-046
315 13:51:38.029673 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
316 13:51:38.033073 SPD: device width 16 bits, bus width 16 bits
317 13:51:38.039755 SPD: module size is 1024 MB (per channel)
318 13:51:38.473153 CBMEM:
319 13:51:38.476449 IMD: root @ 0x76fff000 254 entries.
320 13:51:38.479642 IMD: root @ 0x76ffec00 62 entries.
321 13:51:38.482997 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
322 13:51:38.489912 FMAP: area RW_VPD found @ f35000 (8192 bytes)
323 13:51:38.493203 External stage cache:
324 13:51:38.496444 IMD: root @ 0x7b3ff000 254 entries.
325 13:51:38.499937 IMD: root @ 0x7b3fec00 62 entries.
326 13:51:38.515258 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
327 13:51:38.521511 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
328 13:51:38.527891 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
329 13:51:38.542566 MRC: 'RECOVERY_MRC_CACHE' does not need update.
330 13:51:38.548604 cse_lite: Skip switching to RW in the recovery path
331 13:51:38.548721 8 DIMMs found
332 13:51:38.548819 SMM Memory Map
333 13:51:38.552055 SMRAM : 0x7b000000 0x800000
334 13:51:38.559300 Subregion 0: 0x7b000000 0x200000
335 13:51:38.559415 Subregion 1: 0x7b200000 0x200000
336 13:51:38.563186 Subregion 2: 0x7b400000 0x400000
337 13:51:38.566438 top_of_ram = 0x77000000
338 13:51:38.573616 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
339 13:51:38.576914 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
340 13:51:38.583632 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
341 13:51:38.586242 MTRR Range: Start=ff000000 End=0 (Size 1000000)
342 13:51:38.596398 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
343 13:51:38.603112 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
344 13:51:38.612832 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
345 13:51:38.616067 Processing 211 relocs. Offset value of 0x74c0b000
346 13:51:38.625000 BS: romstage times (exec / console): total (unknown) / 277 ms
347 13:51:38.631355
348 13:51:38.631472
349 13:51:38.641176 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
350 13:51:38.644440 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
351 13:51:38.654621 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
352 13:51:38.661246 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
353 13:51:38.667791 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
354 13:51:38.674313 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
355 13:51:38.721478 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
356 13:51:38.728084 Processing 5008 relocs. Offset value of 0x75d98000
357 13:51:38.731160 BS: postcar times (exec / console): total (unknown) / 59 ms
358 13:51:38.734863
359 13:51:38.734958
360 13:51:38.744358 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
361 13:51:38.744488 Normal boot
362 13:51:38.747645 FW_CONFIG value is 0x804c02
363 13:51:38.751031 PCI: 00:07.0 disabled by fw_config
364 13:51:38.754964 PCI: 00:07.1 disabled by fw_config
365 13:51:38.758469 PCI: 00:0d.2 disabled by fw_config
366 13:51:38.761671 PCI: 00:1c.7 disabled by fw_config
367 13:51:38.768233 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
368 13:51:38.774827 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
369 13:51:38.778005 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
370 13:51:38.781235 GENERIC: 0.0 disabled by fw_config
371 13:51:38.784440 GENERIC: 1.0 disabled by fw_config
372 13:51:38.791133 fw_config match found: DB_USB=USB3_ACTIVE
373 13:51:38.794349 fw_config match found: DB_USB=USB3_ACTIVE
374 13:51:38.797645 fw_config match found: DB_USB=USB3_ACTIVE
375 13:51:38.804914 fw_config match found: DB_USB=USB3_ACTIVE
376 13:51:38.808044 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
377 13:51:38.814637 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
378 13:51:38.824264 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
379 13:51:38.831192 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
380 13:51:38.834369 microcode: sig=0x806c1 pf=0x80 revision=0x86
381 13:51:38.840979 microcode: Update skipped, already up-to-date
382 13:51:38.847402 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
383 13:51:38.874740 Detected 4 core, 8 thread CPU.
384 13:51:38.878052 Setting up SMI for CPU
385 13:51:38.881444 IED base = 0x7b400000
386 13:51:38.881560 IED size = 0x00400000
387 13:51:38.884800 Will perform SMM setup.
388 13:51:38.891491 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
389 13:51:38.898159 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
390 13:51:38.904745 Processing 16 relocs. Offset value of 0x00030000
391 13:51:38.908014 Attempting to start 7 APs
392 13:51:38.911278 Waiting for 10ms after sending INIT.
393 13:51:38.926740 Waiting for 1st SIPI to complete...done.
394 13:51:38.926870 AP: slot 3 apic_id 7.
395 13:51:38.930116 AP: slot 6 apic_id 6.
396 13:51:38.933353 AP: slot 7 apic_id 3.
397 13:51:38.933434 AP: slot 4 apic_id 2.
398 13:51:38.937124 AP: slot 5 apic_id 5.
399 13:51:38.940385 AP: slot 2 apic_id 4.
400 13:51:38.943561 Waiting for 2nd SIPI to complete...done.
401 13:51:38.946949 AP: slot 1 apic_id 1.
402 13:51:38.953315 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
403 13:51:38.959979 Processing 13 relocs. Offset value of 0x00038000
404 13:51:38.963821 Unable to locate Global NVS
405 13:51:38.970098 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
406 13:51:38.973360 Installing permanent SMM handler to 0x7b000000
407 13:51:38.983106 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
408 13:51:38.986723 Processing 794 relocs. Offset value of 0x7b010000
409 13:51:38.997054 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
410 13:51:38.999848 Processing 13 relocs. Offset value of 0x7b008000
411 13:51:39.006355 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
412 13:51:39.012974 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
413 13:51:39.016790 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
414 13:51:39.023430 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
415 13:51:39.029626 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
416 13:51:39.036172 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
417 13:51:39.042818 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
418 13:51:39.042923 Unable to locate Global NVS
419 13:51:39.052701 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
420 13:51:39.056661 Clearing SMI status registers
421 13:51:39.056763 SMI_STS: PM1
422 13:51:39.059880 PM1_STS: PWRBTN
423 13:51:39.066338 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
424 13:51:39.069631 In relocation handler: CPU 0
425 13:51:39.072995 New SMBASE=0x7b000000 IEDBASE=0x7b400000
426 13:51:39.079510 Writing SMRR. base = 0x7b000006, mask=0xff800c00
427 13:51:39.079617 Relocation complete.
428 13:51:39.089705 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
429 13:51:39.093086 In relocation handler: CPU 1
430 13:51:39.096220 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
431 13:51:39.096303 Relocation complete.
432 13:51:39.105742 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
433 13:51:39.105836 In relocation handler: CPU 7
434 13:51:39.112364 New SMBASE=0x7affe400 IEDBASE=0x7b400000
435 13:51:39.112458 Relocation complete.
436 13:51:39.122790 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
437 13:51:39.122881 In relocation handler: CPU 4
438 13:51:39.129107 New SMBASE=0x7afff000 IEDBASE=0x7b400000
439 13:51:39.132301 Writing SMRR. base = 0x7b000006, mask=0xff800c00
440 13:51:39.135488 Relocation complete.
441 13:51:39.142124 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
442 13:51:39.145500 In relocation handler: CPU 5
443 13:51:39.149315 New SMBASE=0x7affec00 IEDBASE=0x7b400000
444 13:51:39.152477 Relocation complete.
445 13:51:39.159135 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
446 13:51:39.162377 In relocation handler: CPU 2
447 13:51:39.165448 New SMBASE=0x7afff800 IEDBASE=0x7b400000
448 13:51:39.172475 Writing SMRR. base = 0x7b000006, mask=0xff800c00
449 13:51:39.172569 Relocation complete.
450 13:51:39.179212 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
451 13:51:39.182534 In relocation handler: CPU 6
452 13:51:39.189175 New SMBASE=0x7affe800 IEDBASE=0x7b400000
453 13:51:39.191851 Writing SMRR. base = 0x7b000006, mask=0xff800c00
454 13:51:39.195843 Relocation complete.
455 13:51:39.202407 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
456 13:51:39.205815 In relocation handler: CPU 3
457 13:51:39.209107 New SMBASE=0x7afff400 IEDBASE=0x7b400000
458 13:51:39.211834 Relocation complete.
459 13:51:39.211954 Initializing CPU #0
460 13:51:39.215707 CPU: vendor Intel device 806c1
461 13:51:39.219019 CPU: family 06, model 8c, stepping 01
462 13:51:39.222291 Clearing out pending MCEs
463 13:51:39.225617 Setting up local APIC...
464 13:51:39.228807 apic_id: 0x00 done.
465 13:51:39.228895 Turbo is available but hidden
466 13:51:39.232912 Turbo is available and visible
467 13:51:39.239712 microcode: Update skipped, already up-to-date
468 13:51:39.239833 CPU #0 initialized
469 13:51:39.242922 Initializing CPU #1
470 13:51:39.246300 Initializing CPU #7
471 13:51:39.246411 Initializing CPU #4
472 13:51:39.249509 CPU: vendor Intel device 806c1
473 13:51:39.252642 CPU: family 06, model 8c, stepping 01
474 13:51:39.256401 CPU: vendor Intel device 806c1
475 13:51:39.259685 CPU: family 06, model 8c, stepping 01
476 13:51:39.262835 Initializing CPU #6
477 13:51:39.266137 Initializing CPU #3
478 13:51:39.269436 CPU: vendor Intel device 806c1
479 13:51:39.272522 CPU: family 06, model 8c, stepping 01
480 13:51:39.276380 CPU: vendor Intel device 806c1
481 13:51:39.279715 CPU: family 06, model 8c, stepping 01
482 13:51:39.282994 Clearing out pending MCEs
483 13:51:39.283114 Clearing out pending MCEs
484 13:51:39.286301 Setting up local APIC...
485 13:51:39.289654 Initializing CPU #5
486 13:51:39.289769 Initializing CPU #2
487 13:51:39.292958 CPU: vendor Intel device 806c1
488 13:51:39.295748 CPU: family 06, model 8c, stepping 01
489 13:51:39.299138 Setting up local APIC...
490 13:51:39.302964 CPU: vendor Intel device 806c1
491 13:51:39.305649 CPU: family 06, model 8c, stepping 01
492 13:51:39.309017 Clearing out pending MCEs
493 13:51:39.312955 Clearing out pending MCEs
494 13:51:39.315623 Setting up local APIC...
495 13:51:39.315732 apic_id: 0x07 done.
496 13:51:39.319460 apic_id: 0x06 done.
497 13:51:39.322692 microcode: Update skipped, already up-to-date
498 13:51:39.329274 microcode: Update skipped, already up-to-date
499 13:51:39.329394 Clearing out pending MCEs
500 13:51:39.332458 Clearing out pending MCEs
501 13:51:39.335682 Setting up local APIC...
502 13:51:39.338947 CPU: vendor Intel device 806c1
503 13:51:39.342665 CPU: family 06, model 8c, stepping 01
504 13:51:39.345698 Setting up local APIC...
505 13:51:39.349348 Clearing out pending MCEs
506 13:51:39.349456 Setting up local APIC...
507 13:51:39.352509 Setting up local APIC...
508 13:51:39.355503 CPU #6 initialized
509 13:51:39.355610 CPU #3 initialized
510 13:51:39.359088 apic_id: 0x04 done.
511 13:51:39.362226 apic_id: 0x05 done.
512 13:51:39.365739 microcode: Update skipped, already up-to-date
513 13:51:39.368863 microcode: Update skipped, already up-to-date
514 13:51:39.372114 CPU #2 initialized
515 13:51:39.375931 apic_id: 0x03 done.
516 13:51:39.376044 apic_id: 0x02 done.
517 13:51:39.382156 microcode: Update skipped, already up-to-date
518 13:51:39.385419 microcode: Update skipped, already up-to-date
519 13:51:39.388624 CPU #7 initialized
520 13:51:39.388707 CPU #4 initialized
521 13:51:39.392040 CPU #5 initialized
522 13:51:39.395309 apic_id: 0x01 done.
523 13:51:39.398622 microcode: Update skipped, already up-to-date
524 13:51:39.401922 CPU #1 initialized
525 13:51:39.405298 bsp_do_flight_plan done after 457 msecs.
526 13:51:39.408690 CPU: frequency set to 4000 MHz
527 13:51:39.408820 Enabling SMIs.
528 13:51:39.415171 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
529 13:51:39.432163 SATAXPCIE1 indicates PCIe NVMe is present
530 13:51:39.435494 Probing TPM: done!
531 13:51:39.438690 Connected to device vid:did:rid of 1ae0:0028:00
532 13:51:39.449260 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
533 13:51:39.452459 Initialized TPM device CR50 revision 0
534 13:51:39.455577 Enabling S0i3.4
535 13:51:39.462569 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
536 13:51:39.465624 Found a VBT of 8704 bytes after decompression
537 13:51:39.472306 cse_lite: CSE RO boot. HybridStorageMode disabled
538 13:51:39.478977 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
539 13:51:39.555005 FSPS returned 0
540 13:51:39.558256 Executing Phase 1 of FspMultiPhaseSiInit
541 13:51:39.567814 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
542 13:51:39.571614 port C0 DISC req: usage 1 usb3 1 usb2 5
543 13:51:39.574683 Raw Buffer output 0 00000511
544 13:51:39.577785 Raw Buffer output 1 00000000
545 13:51:39.581484 pmc_send_ipc_cmd succeeded
546 13:51:39.588493 port C1 DISC req: usage 1 usb3 2 usb2 3
547 13:51:39.588591 Raw Buffer output 0 00000321
548 13:51:39.591633 Raw Buffer output 1 00000000
549 13:51:39.595594 pmc_send_ipc_cmd succeeded
550 13:51:39.600834 Detected 4 core, 8 thread CPU.
551 13:51:39.604099 Detected 4 core, 8 thread CPU.
552 13:51:39.837969 Display FSP Version Info HOB
553 13:51:39.841203 Reference Code - CPU = a.0.4c.31
554 13:51:39.844566 uCode Version = 0.0.0.86
555 13:51:39.847772 TXT ACM version = ff.ff.ff.ffff
556 13:51:39.851173 Reference Code - ME = a.0.4c.31
557 13:51:39.854550 MEBx version = 0.0.0.0
558 13:51:39.857924 ME Firmware Version = Consumer SKU
559 13:51:39.861301 Reference Code - PCH = a.0.4c.31
560 13:51:39.864684 PCH-CRID Status = Disabled
561 13:51:39.867927 PCH-CRID Original Value = ff.ff.ff.ffff
562 13:51:39.870806 PCH-CRID New Value = ff.ff.ff.ffff
563 13:51:39.874145 OPROM - RST - RAID = ff.ff.ff.ffff
564 13:51:39.877442 PCH Hsio Version = 4.0.0.0
565 13:51:39.880678 Reference Code - SA - System Agent = a.0.4c.31
566 13:51:39.884577 Reference Code - MRC = 2.0.0.1
567 13:51:39.887747 SA - PCIe Version = a.0.4c.31
568 13:51:39.890911 SA-CRID Status = Disabled
569 13:51:39.893931 SA-CRID Original Value = 0.0.0.1
570 13:51:39.897212 SA-CRID New Value = 0.0.0.1
571 13:51:39.901259 OPROM - VBIOS = ff.ff.ff.ffff
572 13:51:39.903806 IO Manageability Engine FW Version = 11.1.4.0
573 13:51:39.907459 PHY Build Version = 0.0.0.e0
574 13:51:39.910658 Thunderbolt(TM) FW Version = 0.0.0.0
575 13:51:39.917122 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
576 13:51:39.920982 ITSS IRQ Polarities Before:
577 13:51:39.921090 IPC0: 0xffffffff
578 13:51:39.924182 IPC1: 0xffffffff
579 13:51:39.924294 IPC2: 0xffffffff
580 13:51:39.927283 IPC3: 0xffffffff
581 13:51:39.930507 ITSS IRQ Polarities After:
582 13:51:39.930589 IPC0: 0xffffffff
583 13:51:39.933928 IPC1: 0xffffffff
584 13:51:39.934036 IPC2: 0xffffffff
585 13:51:39.937243 IPC3: 0xffffffff
586 13:51:39.940527 Found PCIe Root Port #9 at PCI: 00:1d.0.
587 13:51:39.953818 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
588 13:51:39.963704 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
589 13:51:39.976798 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
590 13:51:39.983355 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
591 13:51:39.986571 Enumerating buses...
592 13:51:39.989861 Show all devs... Before device enumeration.
593 13:51:39.993765 Root Device: enabled 1
594 13:51:39.993874 DOMAIN: 0000: enabled 1
595 13:51:39.996844 CPU_CLUSTER: 0: enabled 1
596 13:51:39.999868 PCI: 00:00.0: enabled 1
597 13:51:40.003477 PCI: 00:02.0: enabled 1
598 13:51:40.003579 PCI: 00:04.0: enabled 1
599 13:51:40.006558 PCI: 00:05.0: enabled 1
600 13:51:40.010323 PCI: 00:06.0: enabled 0
601 13:51:40.013511 PCI: 00:07.0: enabled 0
602 13:51:40.013627 PCI: 00:07.1: enabled 0
603 13:51:40.016709 PCI: 00:07.2: enabled 0
604 13:51:40.019843 PCI: 00:07.3: enabled 0
605 13:51:40.023226 PCI: 00:08.0: enabled 1
606 13:51:40.023336 PCI: 00:09.0: enabled 0
607 13:51:40.026370 PCI: 00:0a.0: enabled 0
608 13:51:40.030306 PCI: 00:0d.0: enabled 1
609 13:51:40.033543 PCI: 00:0d.1: enabled 0
610 13:51:40.033625 PCI: 00:0d.2: enabled 0
611 13:51:40.036879 PCI: 00:0d.3: enabled 0
612 13:51:40.040123 PCI: 00:0e.0: enabled 0
613 13:51:40.043516 PCI: 00:10.2: enabled 1
614 13:51:40.043624 PCI: 00:10.6: enabled 0
615 13:51:40.046913 PCI: 00:10.7: enabled 0
616 13:51:40.050181 PCI: 00:12.0: enabled 0
617 13:51:40.050286 PCI: 00:12.6: enabled 0
618 13:51:40.053440 PCI: 00:13.0: enabled 0
619 13:51:40.056748 PCI: 00:14.0: enabled 1
620 13:51:40.059898 PCI: 00:14.1: enabled 0
621 13:51:40.060009 PCI: 00:14.2: enabled 1
622 13:51:40.063165 PCI: 00:14.3: enabled 1
623 13:51:40.066451 PCI: 00:15.0: enabled 1
624 13:51:40.069760 PCI: 00:15.1: enabled 1
625 13:51:40.069868 PCI: 00:15.2: enabled 1
626 13:51:40.073038 PCI: 00:15.3: enabled 1
627 13:51:40.076278 PCI: 00:16.0: enabled 1
628 13:51:40.079611 PCI: 00:16.1: enabled 0
629 13:51:40.079719 PCI: 00:16.2: enabled 0
630 13:51:40.082838 PCI: 00:16.3: enabled 0
631 13:51:40.086251 PCI: 00:16.4: enabled 0
632 13:51:40.089433 PCI: 00:16.5: enabled 0
633 13:51:40.089543 PCI: 00:17.0: enabled 1
634 13:51:40.092700 PCI: 00:19.0: enabled 0
635 13:51:40.096515 PCI: 00:19.1: enabled 1
636 13:51:40.096623 PCI: 00:19.2: enabled 0
637 13:51:40.099655 PCI: 00:1c.0: enabled 1
638 13:51:40.102875 PCI: 00:1c.1: enabled 0
639 13:51:40.105971 PCI: 00:1c.2: enabled 0
640 13:51:40.106075 PCI: 00:1c.3: enabled 0
641 13:51:40.109607 PCI: 00:1c.4: enabled 0
642 13:51:40.112907 PCI: 00:1c.5: enabled 0
643 13:51:40.115907 PCI: 00:1c.6: enabled 1
644 13:51:40.116013 PCI: 00:1c.7: enabled 0
645 13:51:40.119755 PCI: 00:1d.0: enabled 1
646 13:51:40.122914 PCI: 00:1d.1: enabled 0
647 13:51:40.126091 PCI: 00:1d.2: enabled 1
648 13:51:40.126200 PCI: 00:1d.3: enabled 0
649 13:51:40.129098 PCI: 00:1e.0: enabled 1
650 13:51:40.132981 PCI: 00:1e.1: enabled 0
651 13:51:40.136017 PCI: 00:1e.2: enabled 1
652 13:51:40.136130 PCI: 00:1e.3: enabled 1
653 13:51:40.139295 PCI: 00:1f.0: enabled 1
654 13:51:40.142627 PCI: 00:1f.1: enabled 0
655 13:51:40.142736 PCI: 00:1f.2: enabled 1
656 13:51:40.146136 PCI: 00:1f.3: enabled 1
657 13:51:40.149448 PCI: 00:1f.4: enabled 0
658 13:51:40.152886 PCI: 00:1f.5: enabled 1
659 13:51:40.152994 PCI: 00:1f.6: enabled 0
660 13:51:40.155613 PCI: 00:1f.7: enabled 0
661 13:51:40.158940 APIC: 00: enabled 1
662 13:51:40.162869 GENERIC: 0.0: enabled 1
663 13:51:40.162952 GENERIC: 0.0: enabled 1
664 13:51:40.166104 GENERIC: 1.0: enabled 1
665 13:51:40.168981 GENERIC: 0.0: enabled 1
666 13:51:40.172130 GENERIC: 1.0: enabled 1
667 13:51:40.172240 USB0 port 0: enabled 1
668 13:51:40.175375 GENERIC: 0.0: enabled 1
669 13:51:40.178728 USB0 port 0: enabled 1
670 13:51:40.178836 GENERIC: 0.0: enabled 1
671 13:51:40.182630 I2C: 00:1a: enabled 1
672 13:51:40.185285 I2C: 00:31: enabled 1
673 13:51:40.185400 I2C: 00:32: enabled 1
674 13:51:40.188731 I2C: 00:10: enabled 1
675 13:51:40.192031 I2C: 00:15: enabled 1
676 13:51:40.195755 GENERIC: 0.0: enabled 0
677 13:51:40.195872 GENERIC: 1.0: enabled 0
678 13:51:40.199048 GENERIC: 0.0: enabled 1
679 13:51:40.202509 SPI: 00: enabled 1
680 13:51:40.202622 SPI: 00: enabled 1
681 13:51:40.205729 PNP: 0c09.0: enabled 1
682 13:51:40.208868 GENERIC: 0.0: enabled 1
683 13:51:40.208987 USB3 port 0: enabled 1
684 13:51:40.211957 USB3 port 1: enabled 1
685 13:51:40.215815 USB3 port 2: enabled 0
686 13:51:40.215928 USB3 port 3: enabled 0
687 13:51:40.218945 USB2 port 0: enabled 0
688 13:51:40.222065 USB2 port 1: enabled 1
689 13:51:40.225177 USB2 port 2: enabled 1
690 13:51:40.225293 USB2 port 3: enabled 0
691 13:51:40.229046 USB2 port 4: enabled 1
692 13:51:40.232222 USB2 port 5: enabled 0
693 13:51:40.232407 USB2 port 6: enabled 0
694 13:51:40.235460 USB2 port 7: enabled 0
695 13:51:40.238811 USB2 port 8: enabled 0
696 13:51:40.242200 USB2 port 9: enabled 0
697 13:51:40.242319 USB3 port 0: enabled 0
698 13:51:40.245375 USB3 port 1: enabled 1
699 13:51:40.248700 USB3 port 2: enabled 0
700 13:51:40.248808 USB3 port 3: enabled 0
701 13:51:40.251960 GENERIC: 0.0: enabled 1
702 13:51:40.255214 GENERIC: 1.0: enabled 1
703 13:51:40.255322 APIC: 01: enabled 1
704 13:51:40.258642 APIC: 04: enabled 1
705 13:51:40.261884 APIC: 07: enabled 1
706 13:51:40.261998 APIC: 02: enabled 1
707 13:51:40.265008 APIC: 05: enabled 1
708 13:51:40.268280 APIC: 06: enabled 1
709 13:51:40.268407 APIC: 03: enabled 1
710 13:51:40.271625 Compare with tree...
711 13:51:40.274930 Root Device: enabled 1
712 13:51:40.275044 DOMAIN: 0000: enabled 1
713 13:51:40.278257 PCI: 00:00.0: enabled 1
714 13:51:40.281735 PCI: 00:02.0: enabled 1
715 13:51:40.284906 PCI: 00:04.0: enabled 1
716 13:51:40.288262 GENERIC: 0.0: enabled 1
717 13:51:40.288382 PCI: 00:05.0: enabled 1
718 13:51:40.291708 PCI: 00:06.0: enabled 0
719 13:51:40.294981 PCI: 00:07.0: enabled 0
720 13:51:40.298273 GENERIC: 0.0: enabled 1
721 13:51:40.301503 PCI: 00:07.1: enabled 0
722 13:51:40.301612 GENERIC: 1.0: enabled 1
723 13:51:40.304926 PCI: 00:07.2: enabled 0
724 13:51:40.307704 GENERIC: 0.0: enabled 1
725 13:51:40.311067 PCI: 00:07.3: enabled 0
726 13:51:40.314894 GENERIC: 1.0: enabled 1
727 13:51:40.315007 PCI: 00:08.0: enabled 1
728 13:51:40.318033 PCI: 00:09.0: enabled 0
729 13:51:40.321241 PCI: 00:0a.0: enabled 0
730 13:51:40.324567 PCI: 00:0d.0: enabled 1
731 13:51:40.327651 USB0 port 0: enabled 1
732 13:51:40.327763 USB3 port 0: enabled 1
733 13:51:40.331079 USB3 port 1: enabled 1
734 13:51:40.334245 USB3 port 2: enabled 0
735 13:51:40.337635 USB3 port 3: enabled 0
736 13:51:40.341217 PCI: 00:0d.1: enabled 0
737 13:51:40.344341 PCI: 00:0d.2: enabled 0
738 13:51:40.344433 GENERIC: 0.0: enabled 1
739 13:51:40.347393 PCI: 00:0d.3: enabled 0
740 13:51:40.350906 PCI: 00:0e.0: enabled 0
741 13:51:40.354232 PCI: 00:10.2: enabled 1
742 13:51:40.357593 PCI: 00:10.6: enabled 0
743 13:51:40.357691 PCI: 00:10.7: enabled 0
744 13:51:40.361004 PCI: 00:12.0: enabled 0
745 13:51:40.364411 PCI: 00:12.6: enabled 0
746 13:51:40.367680 PCI: 00:13.0: enabled 0
747 13:51:40.370893 PCI: 00:14.0: enabled 1
748 13:51:40.371004 USB0 port 0: enabled 1
749 13:51:40.374232 USB2 port 0: enabled 0
750 13:51:40.377566 USB2 port 1: enabled 1
751 13:51:40.380924 USB2 port 2: enabled 1
752 13:51:40.384257 USB2 port 3: enabled 0
753 13:51:40.384383 USB2 port 4: enabled 1
754 13:51:40.387734 USB2 port 5: enabled 0
755 13:51:40.390937 USB2 port 6: enabled 0
756 13:51:40.394190 USB2 port 7: enabled 0
757 13:51:40.397446 USB2 port 8: enabled 0
758 13:51:40.400219 USB2 port 9: enabled 0
759 13:51:40.400337 USB3 port 0: enabled 0
760 13:51:40.404162 USB3 port 1: enabled 1
761 13:51:40.407484 USB3 port 2: enabled 0
762 13:51:40.410790 USB3 port 3: enabled 0
763 13:51:40.414067 PCI: 00:14.1: enabled 0
764 13:51:40.417251 PCI: 00:14.2: enabled 1
765 13:51:40.417337 PCI: 00:14.3: enabled 1
766 13:51:40.420359 GENERIC: 0.0: enabled 1
767 13:51:40.423478 PCI: 00:15.0: enabled 1
768 13:51:40.426862 I2C: 00:1a: enabled 1
769 13:51:40.426941 I2C: 00:31: enabled 1
770 13:51:40.430610 I2C: 00:32: enabled 1
771 13:51:40.433954 PCI: 00:15.1: enabled 1
772 13:51:40.437692 I2C: 00:10: enabled 1
773 13:51:40.440031 PCI: 00:15.2: enabled 1
774 13:51:40.440138 PCI: 00:15.3: enabled 1
775 13:51:40.443905 PCI: 00:16.0: enabled 1
776 13:51:40.447137 PCI: 00:16.1: enabled 0
777 13:51:40.450409 PCI: 00:16.2: enabled 0
778 13:51:40.453760 PCI: 00:16.3: enabled 0
779 13:51:40.453848 PCI: 00:16.4: enabled 0
780 13:51:40.457044 PCI: 00:16.5: enabled 0
781 13:51:40.460298 PCI: 00:17.0: enabled 1
782 13:51:40.463747 PCI: 00:19.0: enabled 0
783 13:51:40.467038 PCI: 00:19.1: enabled 1
784 13:51:40.467148 I2C: 00:15: enabled 1
785 13:51:40.470369 PCI: 00:19.2: enabled 0
786 13:51:40.473612 PCI: 00:1d.0: enabled 1
787 13:51:40.476898 GENERIC: 0.0: enabled 1
788 13:51:40.526969 PCI: 00:1e.0: enabled 1
789 13:51:40.527144 PCI: 00:1e.1: enabled 0
790 13:51:40.527253 PCI: 00:1e.2: enabled 1
791 13:51:40.527547 SPI: 00: enabled 1
792 13:51:40.527625 PCI: 00:1e.3: enabled 1
793 13:51:40.527717 SPI: 00: enabled 1
794 13:51:40.527808 PCI: 00:1f.0: enabled 1
795 13:51:40.527897 PNP: 0c09.0: enabled 1
796 13:51:40.527985 PCI: 00:1f.1: enabled 0
797 13:51:40.528071 PCI: 00:1f.2: enabled 1
798 13:51:40.528169 GENERIC: 0.0: enabled 1
799 13:51:40.528258 GENERIC: 0.0: enabled 1
800 13:51:40.528344 GENERIC: 1.0: enabled 1
801 13:51:40.528415 PCI: 00:1f.3: enabled 1
802 13:51:40.528471 PCI: 00:1f.4: enabled 0
803 13:51:40.528539 PCI: 00:1f.5: enabled 1
804 13:51:40.528598 PCI: 00:1f.6: enabled 0
805 13:51:40.528653 PCI: 00:1f.7: enabled 0
806 13:51:40.528707 CPU_CLUSTER: 0: enabled 1
807 13:51:40.528770 APIC: 00: enabled 1
808 13:51:40.579022 APIC: 01: enabled 1
809 13:51:40.579181 APIC: 04: enabled 1
810 13:51:40.579688 APIC: 07: enabled 1
811 13:51:40.579800 APIC: 02: enabled 1
812 13:51:40.579903 APIC: 05: enabled 1
813 13:51:40.580188 APIC: 06: enabled 1
814 13:51:40.580287 APIC: 03: enabled 1
815 13:51:40.580399 Root Device scanning...
816 13:51:40.580504 scan_static_bus for Root Device
817 13:51:40.580596 DOMAIN: 0000 enabled
818 13:51:40.580693 CPU_CLUSTER: 0 enabled
819 13:51:40.580782 DOMAIN: 0000 scanning...
820 13:51:40.580872 PCI: pci_scan_bus for bus 00
821 13:51:40.580973 PCI: 00:00.0 [8086/0000] ops
822 13:51:40.581070 PCI: 00:00.0 [8086/9a12] enabled
823 13:51:40.581170 PCI: 00:02.0 [8086/0000] bus ops
824 13:51:40.581279 PCI: 00:02.0 [8086/9a40] enabled
825 13:51:40.581369 PCI: 00:04.0 [8086/0000] bus ops
826 13:51:40.629042 PCI: 00:04.0 [8086/9a03] enabled
827 13:51:40.629186 PCI: 00:05.0 [8086/9a19] enabled
828 13:51:40.629463 PCI: 00:07.0 [0000/0000] hidden
829 13:51:40.629536 PCI: 00:08.0 [8086/9a11] enabled
830 13:51:40.629606 PCI: 00:0a.0 [8086/9a0d] disabled
831 13:51:40.629688 PCI: 00:0d.0 [8086/0000] bus ops
832 13:51:40.629754 PCI: 00:0d.0 [8086/9a13] enabled
833 13:51:40.629816 PCI: 00:14.0 [8086/0000] bus ops
834 13:51:40.629876 PCI: 00:14.0 [8086/a0ed] enabled
835 13:51:40.629940 PCI: 00:14.2 [8086/a0ef] enabled
836 13:51:40.630044 PCI: 00:14.3 [8086/0000] bus ops
837 13:51:40.630133 PCI: 00:14.3 [8086/a0f0] enabled
838 13:51:40.630220 PCI: 00:15.0 [8086/0000] bus ops
839 13:51:40.630326 PCI: 00:15.0 [8086/a0e8] enabled
840 13:51:40.630416 PCI: 00:15.1 [8086/0000] bus ops
841 13:51:40.645539 PCI: 00:15.1 [8086/a0e9] enabled
842 13:51:40.645643 PCI: 00:15.2 [8086/0000] bus ops
843 13:51:40.645904 PCI: 00:15.2 [8086/a0ea] enabled
844 13:51:40.645990 PCI: 00:15.3 [8086/0000] bus ops
845 13:51:40.648845 PCI: 00:15.3 [8086/a0eb] enabled
846 13:51:40.648938 PCI: 00:16.0 [8086/0000] ops
847 13:51:40.651970 PCI: 00:16.0 [8086/a0e0] enabled
848 13:51:40.655292 PCI: Static device PCI: 00:17.0 not found, disabling it.
849 13:51:40.658539 PCI: 00:19.0 [8086/0000] bus ops
850 13:51:40.661712 PCI: 00:19.0 [8086/a0c5] disabled
851 13:51:40.664968 PCI: 00:19.1 [8086/0000] bus ops
852 13:51:40.668264 PCI: 00:19.1 [8086/a0c6] enabled
853 13:51:40.671634 PCI: 00:1d.0 [8086/0000] bus ops
854 13:51:40.674831 PCI: 00:1d.0 [8086/a0b0] enabled
855 13:51:40.678146 PCI: 00:1e.0 [8086/0000] ops
856 13:51:40.681997 PCI: 00:1e.0 [8086/a0a8] enabled
857 13:51:40.685243 PCI: 00:1e.2 [8086/0000] bus ops
858 13:51:40.688627 PCI: 00:1e.2 [8086/a0aa] enabled
859 13:51:40.691967 PCI: 00:1e.3 [8086/0000] bus ops
860 13:51:40.695010 PCI: 00:1e.3 [8086/a0ab] enabled
861 13:51:40.698287 PCI: 00:1f.0 [8086/0000] bus ops
862 13:51:40.701660 PCI: 00:1f.0 [8086/a087] enabled
863 13:51:40.704850 RTC Init
864 13:51:40.708007 Set power on after power failure.
865 13:51:40.708120 Disabling Deep S3
866 13:51:40.711390 Disabling Deep S3
867 13:51:40.711506 Disabling Deep S4
868 13:51:40.714590 Disabling Deep S4
869 13:51:40.717949 Disabling Deep S5
870 13:51:40.718057 Disabling Deep S5
871 13:51:40.721266 PCI: 00:1f.2 [0000/0000] hidden
872 13:51:40.724484 PCI: 00:1f.3 [8086/0000] bus ops
873 13:51:40.727802 PCI: 00:1f.3 [8086/a0c8] enabled
874 13:51:40.731523 PCI: 00:1f.5 [8086/0000] bus ops
875 13:51:40.734651 PCI: 00:1f.5 [8086/a0a4] enabled
876 13:51:40.737981 PCI: Leftover static devices:
877 13:51:40.741318 PCI: 00:10.2
878 13:51:40.741430 PCI: 00:10.6
879 13:51:40.741527 PCI: 00:10.7
880 13:51:40.744384 PCI: 00:06.0
881 13:51:40.744500 PCI: 00:07.1
882 13:51:40.748183 PCI: 00:07.2
883 13:51:40.748293 PCI: 00:07.3
884 13:51:40.748390 PCI: 00:09.0
885 13:51:40.751569 PCI: 00:0d.1
886 13:51:40.751652 PCI: 00:0d.2
887 13:51:40.754727 PCI: 00:0d.3
888 13:51:40.754847 PCI: 00:0e.0
889 13:51:40.754962 PCI: 00:12.0
890 13:51:40.757887 PCI: 00:12.6
891 13:51:40.757975 PCI: 00:13.0
892 13:51:40.761182 PCI: 00:14.1
893 13:51:40.761308 PCI: 00:16.1
894 13:51:40.764341 PCI: 00:16.2
895 13:51:40.764459 PCI: 00:16.3
896 13:51:40.764555 PCI: 00:16.4
897 13:51:40.767736 PCI: 00:16.5
898 13:51:40.767860 PCI: 00:17.0
899 13:51:40.770887 PCI: 00:19.2
900 13:51:40.771005 PCI: 00:1e.1
901 13:51:40.771121 PCI: 00:1f.1
902 13:51:40.774182 PCI: 00:1f.4
903 13:51:40.774302 PCI: 00:1f.6
904 13:51:40.777602 PCI: 00:1f.7
905 13:51:40.780883 PCI: Check your devicetree.cb.
906 13:51:40.781024 PCI: 00:02.0 scanning...
907 13:51:40.788022 scan_generic_bus for PCI: 00:02.0
908 13:51:40.790760 scan_generic_bus for PCI: 00:02.0 done
909 13:51:40.794146 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
910 13:51:40.797649 PCI: 00:04.0 scanning...
911 13:51:40.800922 scan_generic_bus for PCI: 00:04.0
912 13:51:40.804337 GENERIC: 0.0 enabled
913 13:51:40.807595 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
914 13:51:40.814047 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
915 13:51:40.817583 PCI: 00:0d.0 scanning...
916 13:51:40.820893 scan_static_bus for PCI: 00:0d.0
917 13:51:40.820984 USB0 port 0 enabled
918 13:51:40.824113 USB0 port 0 scanning...
919 13:51:40.827433 scan_static_bus for USB0 port 0
920 13:51:40.830751 USB3 port 0 enabled
921 13:51:40.830838 USB3 port 1 enabled
922 13:51:40.834001 USB3 port 2 disabled
923 13:51:40.837000 USB3 port 3 disabled
924 13:51:40.837124 USB3 port 0 scanning...
925 13:51:40.840822 scan_static_bus for USB3 port 0
926 13:51:40.847145 scan_static_bus for USB3 port 0 done
927 13:51:40.850759 scan_bus: bus USB3 port 0 finished in 6 msecs
928 13:51:40.853940 USB3 port 1 scanning...
929 13:51:40.857270 scan_static_bus for USB3 port 1
930 13:51:40.860580 scan_static_bus for USB3 port 1 done
931 13:51:40.863799 scan_bus: bus USB3 port 1 finished in 6 msecs
932 13:51:40.867081 scan_static_bus for USB0 port 0 done
933 13:51:40.873565 scan_bus: bus USB0 port 0 finished in 43 msecs
934 13:51:40.876956 scan_static_bus for PCI: 00:0d.0 done
935 13:51:40.880334 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
936 13:51:40.883717 PCI: 00:14.0 scanning...
937 13:51:40.887128 scan_static_bus for PCI: 00:14.0
938 13:51:40.890356 USB0 port 0 enabled
939 13:51:40.893699 USB0 port 0 scanning...
940 13:51:40.897074 scan_static_bus for USB0 port 0
941 13:51:40.897165 USB2 port 0 disabled
942 13:51:40.900332 USB2 port 1 enabled
943 13:51:40.903730 USB2 port 2 enabled
944 13:51:40.903850 USB2 port 3 disabled
945 13:51:40.907104 USB2 port 4 enabled
946 13:51:40.907228 USB2 port 5 disabled
947 13:51:40.910442 USB2 port 6 disabled
948 13:51:40.913696 USB2 port 7 disabled
949 13:51:40.913780 USB2 port 8 disabled
950 13:51:40.916985 USB2 port 9 disabled
951 13:51:40.920235 USB3 port 0 disabled
952 13:51:40.920377 USB3 port 1 enabled
953 13:51:40.923545 USB3 port 2 disabled
954 13:51:40.926825 USB3 port 3 disabled
955 13:51:40.926947 USB2 port 1 scanning...
956 13:51:40.930151 scan_static_bus for USB2 port 1
957 13:51:40.933435 scan_static_bus for USB2 port 1 done
958 13:51:40.940058 scan_bus: bus USB2 port 1 finished in 6 msecs
959 13:51:40.943401 USB2 port 2 scanning...
960 13:51:40.946485 scan_static_bus for USB2 port 2
961 13:51:40.949955 scan_static_bus for USB2 port 2 done
962 13:51:40.953053 scan_bus: bus USB2 port 2 finished in 6 msecs
963 13:51:40.956307 USB2 port 4 scanning...
964 13:51:40.959640 scan_static_bus for USB2 port 4
965 13:51:40.962941 scan_static_bus for USB2 port 4 done
966 13:51:40.966207 scan_bus: bus USB2 port 4 finished in 6 msecs
967 13:51:40.969971 USB3 port 1 scanning...
968 13:51:40.973250 scan_static_bus for USB3 port 1
969 13:51:40.976574 scan_static_bus for USB3 port 1 done
970 13:51:40.983274 scan_bus: bus USB3 port 1 finished in 6 msecs
971 13:51:40.986692 scan_static_bus for USB0 port 0 done
972 13:51:40.989440 scan_bus: bus USB0 port 0 finished in 93 msecs
973 13:51:40.993309 scan_static_bus for PCI: 00:14.0 done
974 13:51:40.999925 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
975 13:51:41.002609 PCI: 00:14.3 scanning...
976 13:51:41.006058 scan_static_bus for PCI: 00:14.3
977 13:51:41.006163 GENERIC: 0.0 enabled
978 13:51:41.012728 scan_static_bus for PCI: 00:14.3 done
979 13:51:41.016055 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
980 13:51:41.019292 PCI: 00:15.0 scanning...
981 13:51:41.022811 scan_static_bus for PCI: 00:15.0
982 13:51:41.022920 I2C: 00:1a enabled
983 13:51:41.026073 I2C: 00:31 enabled
984 13:51:41.029222 I2C: 00:32 enabled
985 13:51:41.032514 scan_static_bus for PCI: 00:15.0 done
986 13:51:41.035785 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
987 13:51:41.039082 PCI: 00:15.1 scanning...
988 13:51:41.042423 scan_static_bus for PCI: 00:15.1
989 13:51:41.046182 I2C: 00:10 enabled
990 13:51:41.049109 scan_static_bus for PCI: 00:15.1 done
991 13:51:41.052265 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
992 13:51:41.055710 PCI: 00:15.2 scanning...
993 13:51:41.058897 scan_static_bus for PCI: 00:15.2
994 13:51:41.062806 scan_static_bus for PCI: 00:15.2 done
995 13:51:41.066648 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
996 13:51:41.069977 PCI: 00:15.3 scanning...
997 13:51:41.073207 scan_static_bus for PCI: 00:15.3
998 13:51:41.076378 scan_static_bus for PCI: 00:15.3 done
999 13:51:41.083420 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1000 13:51:41.086756 PCI: 00:19.1 scanning...
1001 13:51:41.089550 scan_static_bus for PCI: 00:19.1
1002 13:51:41.089663 I2C: 00:15 enabled
1003 13:51:41.092866 scan_static_bus for PCI: 00:19.1 done
1004 13:51:41.099944 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1005 13:51:41.103160 PCI: 00:1d.0 scanning...
1006 13:51:41.106559 do_pci_scan_bridge for PCI: 00:1d.0
1007 13:51:41.109748 PCI: pci_scan_bus for bus 01
1008 13:51:41.112926 PCI: 01:00.0 [1c5c/174a] enabled
1009 13:51:41.113041 GENERIC: 0.0 enabled
1010 13:51:41.116155 Enabling Common Clock Configuration
1011 13:51:41.122853 L1 Sub-State supported from root port 29
1012 13:51:41.126152 L1 Sub-State Support = 0xf
1013 13:51:41.126261 CommonModeRestoreTime = 0x28
1014 13:51:41.132791 Power On Value = 0x16, Power On Scale = 0x0
1015 13:51:41.132881 ASPM: Enabled L1
1016 13:51:41.135990 PCIe: Max_Payload_Size adjusted to 128
1017 13:51:41.142812 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1018 13:51:41.146091 PCI: 00:1e.2 scanning...
1019 13:51:41.149238 scan_generic_bus for PCI: 00:1e.2
1020 13:51:41.149327 SPI: 00 enabled
1021 13:51:41.156307 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1022 13:51:41.162812 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1023 13:51:41.162903 PCI: 00:1e.3 scanning...
1024 13:51:41.166050 scan_generic_bus for PCI: 00:1e.3
1025 13:51:41.169345 SPI: 00 enabled
1026 13:51:41.176106 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1027 13:51:41.178819 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1028 13:51:41.182795 PCI: 00:1f.0 scanning...
1029 13:51:41.186027 scan_static_bus for PCI: 00:1f.0
1030 13:51:41.189327 PNP: 0c09.0 enabled
1031 13:51:41.189437 PNP: 0c09.0 scanning...
1032 13:51:41.192766 scan_static_bus for PNP: 0c09.0
1033 13:51:41.199457 scan_static_bus for PNP: 0c09.0 done
1034 13:51:41.202684 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1035 13:51:41.205975 scan_static_bus for PCI: 00:1f.0 done
1036 13:51:41.212012 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1037 13:51:41.212132 PCI: 00:1f.2 scanning...
1038 13:51:41.215881 scan_static_bus for PCI: 00:1f.2
1039 13:51:41.219276 GENERIC: 0.0 enabled
1040 13:51:41.221998 GENERIC: 0.0 scanning...
1041 13:51:41.225943 scan_static_bus for GENERIC: 0.0
1042 13:51:41.229068 GENERIC: 0.0 enabled
1043 13:51:41.229147 GENERIC: 1.0 enabled
1044 13:51:41.232527 scan_static_bus for GENERIC: 0.0 done
1045 13:51:41.239159 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1046 13:51:41.241865 scan_static_bus for PCI: 00:1f.2 done
1047 13:51:41.245126 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1048 13:51:41.249013 PCI: 00:1f.3 scanning...
1049 13:51:41.252108 scan_static_bus for PCI: 00:1f.3
1050 13:51:41.255105 scan_static_bus for PCI: 00:1f.3 done
1051 13:51:41.262001 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1052 13:51:41.265305 PCI: 00:1f.5 scanning...
1053 13:51:41.268487 scan_generic_bus for PCI: 00:1f.5
1054 13:51:41.271722 scan_generic_bus for PCI: 00:1f.5 done
1055 13:51:41.274954 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1056 13:51:41.282003 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1057 13:51:41.285252 scan_static_bus for Root Device done
1058 13:51:41.288472 scan_bus: bus Root Device finished in 737 msecs
1059 13:51:41.291595 done
1060 13:51:41.294982 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1061 13:51:41.298285 Chrome EC: UHEPI supported
1062 13:51:41.305535 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1063 13:51:41.311917 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1064 13:51:41.315207 SPI flash protection: WPSW=0 SRP0=0
1065 13:51:41.322021 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1066 13:51:41.325343 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1067 13:51:41.328689 found VGA at PCI: 00:02.0
1068 13:51:41.331891 Setting up VGA for PCI: 00:02.0
1069 13:51:41.338341 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1070 13:51:41.341641 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1071 13:51:41.344971 Allocating resources...
1072 13:51:41.348218 Reading resources...
1073 13:51:41.351639 Root Device read_resources bus 0 link: 0
1074 13:51:41.354865 DOMAIN: 0000 read_resources bus 0 link: 0
1075 13:51:41.361813 PCI: 00:04.0 read_resources bus 1 link: 0
1076 13:51:41.365033 PCI: 00:04.0 read_resources bus 1 link: 0 done
1077 13:51:41.371633 PCI: 00:0d.0 read_resources bus 0 link: 0
1078 13:51:41.374951 USB0 port 0 read_resources bus 0 link: 0
1079 13:51:41.381415 USB0 port 0 read_resources bus 0 link: 0 done
1080 13:51:41.384628 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1081 13:51:41.391771 PCI: 00:14.0 read_resources bus 0 link: 0
1082 13:51:41.394938 USB0 port 0 read_resources bus 0 link: 0
1083 13:51:41.401335 USB0 port 0 read_resources bus 0 link: 0 done
1084 13:51:41.404653 PCI: 00:14.0 read_resources bus 0 link: 0 done
1085 13:51:41.411142 PCI: 00:14.3 read_resources bus 0 link: 0
1086 13:51:41.414297 PCI: 00:14.3 read_resources bus 0 link: 0 done
1087 13:51:41.421510 PCI: 00:15.0 read_resources bus 0 link: 0
1088 13:51:41.424176 PCI: 00:15.0 read_resources bus 0 link: 0 done
1089 13:51:41.430776 PCI: 00:15.1 read_resources bus 0 link: 0
1090 13:51:41.433955 PCI: 00:15.1 read_resources bus 0 link: 0 done
1091 13:51:41.441078 PCI: 00:19.1 read_resources bus 0 link: 0
1092 13:51:41.444417 PCI: 00:19.1 read_resources bus 0 link: 0 done
1093 13:51:41.450869 PCI: 00:1d.0 read_resources bus 1 link: 0
1094 13:51:41.454255 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1095 13:51:41.461346 PCI: 00:1e.2 read_resources bus 2 link: 0
1096 13:51:41.464727 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1097 13:51:41.471159 PCI: 00:1e.3 read_resources bus 3 link: 0
1098 13:51:41.474519 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1099 13:51:41.480899 PCI: 00:1f.0 read_resources bus 0 link: 0
1100 13:51:41.484065 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1101 13:51:41.490880 PCI: 00:1f.2 read_resources bus 0 link: 0
1102 13:51:41.493986 GENERIC: 0.0 read_resources bus 0 link: 0
1103 13:51:41.500569 GENERIC: 0.0 read_resources bus 0 link: 0 done
1104 13:51:41.503835 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1105 13:51:41.510620 DOMAIN: 0000 read_resources bus 0 link: 0 done
1106 13:51:41.513762 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1107 13:51:41.520269 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1108 13:51:41.523478 Root Device read_resources bus 0 link: 0 done
1109 13:51:41.526861 Done reading resources.
1110 13:51:41.533409 Show resources in subtree (Root Device)...After reading.
1111 13:51:41.536647 Root Device child on link 0 DOMAIN: 0000
1112 13:51:41.540509 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1113 13:51:41.550317 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1114 13:51:41.560030 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1115 13:51:41.563170 PCI: 00:00.0
1116 13:51:41.570091 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1117 13:51:41.579870 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1118 13:51:41.590073 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1119 13:51:41.600037 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1120 13:51:41.609505 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1121 13:51:41.619738 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1122 13:51:41.626390 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1123 13:51:41.636277 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1124 13:51:41.646116 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1125 13:51:41.656076 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1126 13:51:41.665974 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1127 13:51:41.676270 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1128 13:51:41.682658 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1129 13:51:41.692838 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1130 13:51:41.702496 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1131 13:51:41.712622 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1132 13:51:41.722453 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1133 13:51:41.732468 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1134 13:51:41.739064 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1135 13:51:41.748893 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1136 13:51:41.752176 PCI: 00:02.0
1137 13:51:41.762141 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1138 13:51:41.771956 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1139 13:51:41.781685 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1140 13:51:41.785221 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1141 13:51:41.794782 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1142 13:51:41.798786 GENERIC: 0.0
1143 13:51:41.798866 PCI: 00:05.0
1144 13:51:41.808343 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1145 13:51:41.814821 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1146 13:51:41.814908 GENERIC: 0.0
1147 13:51:41.818094 PCI: 00:08.0
1148 13:51:41.827941 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1149 13:51:41.828029 PCI: 00:0a.0
1150 13:51:41.831320 PCI: 00:0d.0 child on link 0 USB0 port 0
1151 13:51:41.844507 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1152 13:51:41.847772 USB0 port 0 child on link 0 USB3 port 0
1153 13:51:41.847858 USB3 port 0
1154 13:51:41.851035 USB3 port 1
1155 13:51:41.851120 USB3 port 2
1156 13:51:41.854273 USB3 port 3
1157 13:51:41.858181 PCI: 00:14.0 child on link 0 USB0 port 0
1158 13:51:41.867458 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1159 13:51:41.874032 USB0 port 0 child on link 0 USB2 port 0
1160 13:51:41.874116 USB2 port 0
1161 13:51:41.877950 USB2 port 1
1162 13:51:41.878046 USB2 port 2
1163 13:51:41.881236 USB2 port 3
1164 13:51:41.881319 USB2 port 4
1165 13:51:41.884398 USB2 port 5
1166 13:51:41.884494 USB2 port 6
1167 13:51:41.887488 USB2 port 7
1168 13:51:41.887586 USB2 port 8
1169 13:51:41.890741 USB2 port 9
1170 13:51:41.894000 USB3 port 0
1171 13:51:41.894079 USB3 port 1
1172 13:51:41.897250 USB3 port 2
1173 13:51:41.897336 USB3 port 3
1174 13:51:41.901063 PCI: 00:14.2
1175 13:51:41.910792 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1176 13:51:41.920748 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1177 13:51:41.924137 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1178 13:51:41.934160 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1179 13:51:41.936882 GENERIC: 0.0
1180 13:51:41.940316 PCI: 00:15.0 child on link 0 I2C: 00:1a
1181 13:51:41.950307 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1182 13:51:41.950392 I2C: 00:1a
1183 13:51:41.953668 I2C: 00:31
1184 13:51:41.953750 I2C: 00:32
1185 13:51:41.960214 PCI: 00:15.1 child on link 0 I2C: 00:10
1186 13:51:41.969921 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 13:51:41.970029 I2C: 00:10
1188 13:51:41.973869 PCI: 00:15.2
1189 13:51:41.983739 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 13:51:41.983845 PCI: 00:15.3
1191 13:51:41.993290 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1192 13:51:41.996519 PCI: 00:16.0
1193 13:51:42.007145 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 13:51:42.007258 PCI: 00:19.0
1195 13:51:42.010275 PCI: 00:19.1 child on link 0 I2C: 00:15
1196 13:51:42.019798 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 13:51:42.023632 I2C: 00:15
1198 13:51:42.026885 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1199 13:51:42.036097 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1200 13:51:42.046617 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1201 13:51:42.056563 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1202 13:51:42.056671 GENERIC: 0.0
1203 13:51:42.059895 PCI: 01:00.0
1204 13:51:42.069815 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1205 13:51:42.079363 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1206 13:51:42.085875 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1207 13:51:42.089195 PCI: 00:1e.0
1208 13:51:42.099483 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1209 13:51:42.102593 PCI: 00:1e.2 child on link 0 SPI: 00
1210 13:51:42.112265 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1211 13:51:42.115715 SPI: 00
1212 13:51:42.119441 PCI: 00:1e.3 child on link 0 SPI: 00
1213 13:51:42.129079 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 13:51:42.129190 SPI: 00
1215 13:51:42.135627 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1216 13:51:42.142477 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1217 13:51:42.145860 PNP: 0c09.0
1218 13:51:42.152551 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1219 13:51:42.159128 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1220 13:51:42.169091 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1221 13:51:42.175693 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1222 13:51:42.182155 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1223 13:51:42.182244 GENERIC: 0.0
1224 13:51:42.185423 GENERIC: 1.0
1225 13:51:42.185499 PCI: 00:1f.3
1226 13:51:42.195269 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1227 13:51:42.209143 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1228 13:51:42.209274 PCI: 00:1f.5
1229 13:51:42.218661 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1230 13:51:42.221648 CPU_CLUSTER: 0 child on link 0 APIC: 00
1231 13:51:42.221738 APIC: 00
1232 13:51:42.224892 APIC: 01
1233 13:51:42.224969 APIC: 04
1234 13:51:42.228705 APIC: 07
1235 13:51:42.228781 APIC: 02
1236 13:51:42.228845 APIC: 05
1237 13:51:42.231750 APIC: 06
1238 13:51:42.231850 APIC: 03
1239 13:51:42.241577 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1240 13:51:42.244944 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1241 13:51:42.251665 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1242 13:51:42.258358 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1243 13:51:42.261730 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1244 13:51:42.265137 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1245 13:51:42.271524 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1246 13:51:42.278215 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1247 13:51:42.284787 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1248 13:51:42.291200 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1249 13:51:42.301255 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1250 13:51:42.307700 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1251 13:51:42.314757 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1252 13:51:42.321121 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1253 13:51:42.327616 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1254 13:51:42.330861 DOMAIN: 0000: Resource ranges:
1255 13:51:42.333982 * Base: 1000, Size: 800, Tag: 100
1256 13:51:42.340853 * Base: 1900, Size: e700, Tag: 100
1257 13:51:42.344094 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1258 13:51:42.350639 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1259 13:51:42.357201 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1260 13:51:42.367267 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1261 13:51:42.373879 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1262 13:51:42.380357 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1263 13:51:42.390224 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1264 13:51:42.397404 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1265 13:51:42.403927 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1266 13:51:42.413495 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1267 13:51:42.420522 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1268 13:51:42.426946 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1269 13:51:42.436679 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1270 13:51:42.443742 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1271 13:51:42.450268 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1272 13:51:42.456834 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1273 13:51:42.466724 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1274 13:51:42.473350 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1275 13:51:42.479955 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1276 13:51:42.489952 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1277 13:51:42.496549 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1278 13:51:42.506122 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1279 13:51:42.513118 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1280 13:51:42.519750 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1281 13:51:42.529415 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1282 13:51:42.529500 DOMAIN: 0000: Resource ranges:
1283 13:51:42.535909 * Base: 7fc00000, Size: 40400000, Tag: 200
1284 13:51:42.539422 * Base: d0000000, Size: 28000000, Tag: 200
1285 13:51:42.542736 * Base: fa000000, Size: 1000000, Tag: 200
1286 13:51:42.549108 * Base: fb001000, Size: 2fff000, Tag: 200
1287 13:51:42.552364 * Base: fe010000, Size: 2e000, Tag: 200
1288 13:51:42.555730 * Base: fe03f000, Size: d41000, Tag: 200
1289 13:51:42.558894 * Base: fed88000, Size: 8000, Tag: 200
1290 13:51:42.565590 * Base: fed93000, Size: d000, Tag: 200
1291 13:51:42.568893 * Base: feda2000, Size: 1e000, Tag: 200
1292 13:51:42.572170 * Base: fede0000, Size: 1220000, Tag: 200
1293 13:51:42.578950 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1294 13:51:42.585573 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1295 13:51:42.592128 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1296 13:51:42.599027 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1297 13:51:42.605672 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1298 13:51:42.612157 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1299 13:51:42.618661 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1300 13:51:42.625171 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1301 13:51:42.631759 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1302 13:51:42.638870 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1303 13:51:42.645274 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1304 13:51:42.651766 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1305 13:51:42.658199 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1306 13:51:42.665360 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1307 13:51:42.671817 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1308 13:51:42.678330 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1309 13:51:42.684972 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1310 13:51:42.691425 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1311 13:51:42.698009 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1312 13:51:42.705248 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1313 13:51:42.711614 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1314 13:51:42.718652 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1315 13:51:42.724873 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1316 13:51:42.731332 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1317 13:51:42.741265 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1318 13:51:42.744452 PCI: 00:1d.0: Resource ranges:
1319 13:51:42.747596 * Base: 7fc00000, Size: 100000, Tag: 200
1320 13:51:42.754366 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1321 13:51:42.761063 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1322 13:51:42.767747 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1323 13:51:42.774363 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1324 13:51:42.781015 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1325 13:51:42.787590 Root Device assign_resources, bus 0 link: 0
1326 13:51:42.790747 DOMAIN: 0000 assign_resources, bus 0 link: 0
1327 13:51:42.801065 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1328 13:51:42.807711 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1329 13:51:42.817326 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1330 13:51:42.824210 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1331 13:51:42.830463 PCI: 00:04.0 assign_resources, bus 1 link: 0
1332 13:51:42.833856 PCI: 00:04.0 assign_resources, bus 1 link: 0
1333 13:51:42.840325 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1334 13:51:42.850416 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1335 13:51:42.856990 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1336 13:51:42.863904 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1337 13:51:42.867071 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1338 13:51:42.876962 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1339 13:51:42.880225 PCI: 00:14.0 assign_resources, bus 0 link: 0
1340 13:51:42.886840 PCI: 00:14.0 assign_resources, bus 0 link: 0
1341 13:51:42.893229 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1342 13:51:42.900271 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1343 13:51:42.910157 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1344 13:51:42.913404 PCI: 00:14.3 assign_resources, bus 0 link: 0
1345 13:51:42.920003 PCI: 00:14.3 assign_resources, bus 0 link: 0
1346 13:51:42.926373 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1347 13:51:42.933165 PCI: 00:15.0 assign_resources, bus 0 link: 0
1348 13:51:42.936299 PCI: 00:15.0 assign_resources, bus 0 link: 0
1349 13:51:42.942941 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1350 13:51:42.949950 PCI: 00:15.1 assign_resources, bus 0 link: 0
1351 13:51:42.953286 PCI: 00:15.1 assign_resources, bus 0 link: 0
1352 13:51:42.963101 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1353 13:51:42.969470 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1354 13:51:42.979572 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1355 13:51:42.986292 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1356 13:51:42.992454 PCI: 00:19.1 assign_resources, bus 0 link: 0
1357 13:51:42.995967 PCI: 00:19.1 assign_resources, bus 0 link: 0
1358 13:51:43.005798 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1359 13:51:43.015624 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1360 13:51:43.022294 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1361 13:51:43.028982 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1362 13:51:43.035976 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1363 13:51:43.042398 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1364 13:51:43.052029 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1365 13:51:43.055773 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1366 13:51:43.065481 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1367 13:51:43.068728 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1368 13:51:43.075600 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1369 13:51:43.082247 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1370 13:51:43.084879 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1371 13:51:43.092074 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1372 13:51:43.095428 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1373 13:51:43.102097 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1374 13:51:43.105286 LPC: Trying to open IO window from 800 size 1ff
1375 13:51:43.115651 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1376 13:51:43.121587 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1377 13:51:43.131450 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1378 13:51:43.135296 DOMAIN: 0000 assign_resources, bus 0 link: 0
1379 13:51:43.141476 Root Device assign_resources, bus 0 link: 0
1380 13:51:43.141577 Done setting resources.
1381 13:51:43.148362 Show resources in subtree (Root Device)...After assigning values.
1382 13:51:43.151714 Root Device child on link 0 DOMAIN: 0000
1383 13:51:43.157924 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1384 13:51:43.167957 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1385 13:51:43.178111 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1386 13:51:43.178237 PCI: 00:00.0
1387 13:51:43.187973 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1388 13:51:43.198130 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1389 13:51:43.207368 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1390 13:51:43.217879 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1391 13:51:43.224505 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1392 13:51:43.234530 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1393 13:51:43.244100 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1394 13:51:43.254321 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1395 13:51:43.264141 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1396 13:51:43.274165 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1397 13:51:43.280355 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1398 13:51:43.290299 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1399 13:51:43.300482 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1400 13:51:43.310119 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1401 13:51:43.320075 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1402 13:51:43.326738 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1403 13:51:43.336775 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1404 13:51:43.346659 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1405 13:51:43.356293 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1406 13:51:43.366461 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1407 13:51:43.369774 PCI: 00:02.0
1408 13:51:43.379604 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1409 13:51:43.389904 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1410 13:51:43.399216 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1411 13:51:43.403201 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1412 13:51:43.413135 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1413 13:51:43.416415 GENERIC: 0.0
1414 13:51:43.416532 PCI: 00:05.0
1415 13:51:43.429388 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1416 13:51:43.432776 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1417 13:51:43.432865 GENERIC: 0.0
1418 13:51:43.436005 PCI: 00:08.0
1419 13:51:43.445726 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1420 13:51:43.448984 PCI: 00:0a.0
1421 13:51:43.452201 PCI: 00:0d.0 child on link 0 USB0 port 0
1422 13:51:43.462285 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1423 13:51:43.465457 USB0 port 0 child on link 0 USB3 port 0
1424 13:51:43.468717 USB3 port 0
1425 13:51:43.468817 USB3 port 1
1426 13:51:43.472526 USB3 port 2
1427 13:51:43.475605 USB3 port 3
1428 13:51:43.478747 PCI: 00:14.0 child on link 0 USB0 port 0
1429 13:51:43.489181 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1430 13:51:43.492321 USB0 port 0 child on link 0 USB2 port 0
1431 13:51:43.495637 USB2 port 0
1432 13:51:43.495757 USB2 port 1
1433 13:51:43.499003 USB2 port 2
1434 13:51:43.499112 USB2 port 3
1435 13:51:43.502397 USB2 port 4
1436 13:51:43.505146 USB2 port 5
1437 13:51:43.505229 USB2 port 6
1438 13:51:43.509167 USB2 port 7
1439 13:51:43.509243 USB2 port 8
1440 13:51:43.512200 USB2 port 9
1441 13:51:43.512302 USB3 port 0
1442 13:51:43.515570 USB3 port 1
1443 13:51:43.515646 USB3 port 2
1444 13:51:43.519085 USB3 port 3
1445 13:51:43.519191 PCI: 00:14.2
1446 13:51:43.528616 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1447 13:51:43.542013 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1448 13:51:43.545222 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1449 13:51:43.554976 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1450 13:51:43.558221 GENERIC: 0.0
1451 13:51:43.561455 PCI: 00:15.0 child on link 0 I2C: 00:1a
1452 13:51:43.571806 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1453 13:51:43.571930 I2C: 00:1a
1454 13:51:43.575094 I2C: 00:31
1455 13:51:43.575175 I2C: 00:32
1456 13:51:43.581588 PCI: 00:15.1 child on link 0 I2C: 00:10
1457 13:51:43.591354 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1458 13:51:43.591476 I2C: 00:10
1459 13:51:43.594822 PCI: 00:15.2
1460 13:51:43.604780 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1461 13:51:43.604890 PCI: 00:15.3
1462 13:51:43.618153 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1463 13:51:43.618276 PCI: 00:16.0
1464 13:51:43.627791 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1465 13:51:43.631117 PCI: 00:19.0
1466 13:51:43.634502 PCI: 00:19.1 child on link 0 I2C: 00:15
1467 13:51:43.644611 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1468 13:51:43.647401 I2C: 00:15
1469 13:51:43.650831 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1470 13:51:43.660916 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1471 13:51:43.671080 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1472 13:51:43.680962 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1473 13:51:43.683734 GENERIC: 0.0
1474 13:51:43.687540 PCI: 01:00.0
1475 13:51:43.697385 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1476 13:51:43.707094 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1477 13:51:43.717389 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1478 13:51:43.717527 PCI: 00:1e.0
1479 13:51:43.730750 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1480 13:51:43.734053 PCI: 00:1e.2 child on link 0 SPI: 00
1481 13:51:43.743687 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1482 13:51:43.746929 SPI: 00
1483 13:51:43.750381 PCI: 00:1e.3 child on link 0 SPI: 00
1484 13:51:43.760363 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1485 13:51:43.760480 SPI: 00
1486 13:51:43.767121 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1487 13:51:43.773426 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1488 13:51:43.776455 PNP: 0c09.0
1489 13:51:43.783693 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1490 13:51:43.789973 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1491 13:51:43.800075 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1492 13:51:43.806615 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1493 13:51:43.813349 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1494 13:51:43.813484 GENERIC: 0.0
1495 13:51:43.816239 GENERIC: 1.0
1496 13:51:43.816345 PCI: 00:1f.3
1497 13:51:43.829559 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1498 13:51:43.839699 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1499 13:51:43.839805 PCI: 00:1f.5
1500 13:51:43.849629 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1501 13:51:43.856422 CPU_CLUSTER: 0 child on link 0 APIC: 00
1502 13:51:43.856524 APIC: 00
1503 13:51:43.856594 APIC: 01
1504 13:51:43.859800 APIC: 04
1505 13:51:43.859888 APIC: 07
1506 13:51:43.859955 APIC: 02
1507 13:51:43.862963 APIC: 05
1508 13:51:43.863082 APIC: 06
1509 13:51:43.866145 APIC: 03
1510 13:51:43.866234 Done allocating resources.
1511 13:51:43.872584 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1512 13:51:43.879220 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1513 13:51:43.882919 Configure GPIOs for I2S audio on UP4.
1514 13:51:43.890231 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1515 13:51:43.893585 Enabling resources...
1516 13:51:43.896729 PCI: 00:00.0 subsystem <- 8086/9a12
1517 13:51:43.900092 PCI: 00:00.0 cmd <- 06
1518 13:51:43.903432 PCI: 00:02.0 subsystem <- 8086/9a40
1519 13:51:43.906646 PCI: 00:02.0 cmd <- 03
1520 13:51:43.909969 PCI: 00:04.0 subsystem <- 8086/9a03
1521 13:51:43.913299 PCI: 00:04.0 cmd <- 02
1522 13:51:43.916724 PCI: 00:05.0 subsystem <- 8086/9a19
1523 13:51:43.916819 PCI: 00:05.0 cmd <- 02
1524 13:51:43.923509 PCI: 00:08.0 subsystem <- 8086/9a11
1525 13:51:43.923609 PCI: 00:08.0 cmd <- 06
1526 13:51:43.926771 PCI: 00:0d.0 subsystem <- 8086/9a13
1527 13:51:43.930167 PCI: 00:0d.0 cmd <- 02
1528 13:51:43.932910 PCI: 00:14.0 subsystem <- 8086/a0ed
1529 13:51:43.936336 PCI: 00:14.0 cmd <- 02
1530 13:51:43.939705 PCI: 00:14.2 subsystem <- 8086/a0ef
1531 13:51:43.942922 PCI: 00:14.2 cmd <- 02
1532 13:51:43.946368 PCI: 00:14.3 subsystem <- 8086/a0f0
1533 13:51:43.949854 PCI: 00:14.3 cmd <- 02
1534 13:51:43.953113 PCI: 00:15.0 subsystem <- 8086/a0e8
1535 13:51:43.956309 PCI: 00:15.0 cmd <- 02
1536 13:51:43.959596 PCI: 00:15.1 subsystem <- 8086/a0e9
1537 13:51:43.962988 PCI: 00:15.1 cmd <- 02
1538 13:51:43.966234 PCI: 00:15.2 subsystem <- 8086/a0ea
1539 13:51:43.966340 PCI: 00:15.2 cmd <- 02
1540 13:51:43.972865 PCI: 00:15.3 subsystem <- 8086/a0eb
1541 13:51:43.972956 PCI: 00:15.3 cmd <- 02
1542 13:51:43.976143 PCI: 00:16.0 subsystem <- 8086/a0e0
1543 13:51:43.979456 PCI: 00:16.0 cmd <- 02
1544 13:51:43.982689 PCI: 00:19.1 subsystem <- 8086/a0c6
1545 13:51:43.986398 PCI: 00:19.1 cmd <- 02
1546 13:51:43.989808 PCI: 00:1d.0 bridge ctrl <- 0013
1547 13:51:43.993025 PCI: 00:1d.0 subsystem <- 8086/a0b0
1548 13:51:43.996389 PCI: 00:1d.0 cmd <- 06
1549 13:51:43.999497 PCI: 00:1e.0 subsystem <- 8086/a0a8
1550 13:51:44.002884 PCI: 00:1e.0 cmd <- 06
1551 13:51:44.006029 PCI: 00:1e.2 subsystem <- 8086/a0aa
1552 13:51:44.009197 PCI: 00:1e.2 cmd <- 06
1553 13:51:44.012912 PCI: 00:1e.3 subsystem <- 8086/a0ab
1554 13:51:44.015727 PCI: 00:1e.3 cmd <- 02
1555 13:51:44.019049 PCI: 00:1f.0 subsystem <- 8086/a087
1556 13:51:44.019158 PCI: 00:1f.0 cmd <- 407
1557 13:51:44.025851 PCI: 00:1f.3 subsystem <- 8086/a0c8
1558 13:51:44.025984 PCI: 00:1f.3 cmd <- 02
1559 13:51:44.029241 PCI: 00:1f.5 subsystem <- 8086/a0a4
1560 13:51:44.032624 PCI: 00:1f.5 cmd <- 406
1561 13:51:44.037461 PCI: 01:00.0 cmd <- 02
1562 13:51:44.042094 done.
1563 13:51:44.045489 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1564 13:51:44.048845 Initializing devices...
1565 13:51:44.052272 Root Device init
1566 13:51:44.054962 Chrome EC: Set SMI mask to 0x0000000000000000
1567 13:51:44.061781 Chrome EC: clear events_b mask to 0x0000000000000000
1568 13:51:44.068602 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1569 13:51:44.072051 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1570 13:51:44.078762 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1571 13:51:44.085053 Chrome EC: Set WAKE mask to 0x0000000000000000
1572 13:51:44.088310 fw_config match found: DB_USB=USB3_ACTIVE
1573 13:51:44.095177 Configure Right Type-C port orientation for retimer
1574 13:51:44.098289 Root Device init finished in 43 msecs
1575 13:51:44.101633 PCI: 00:00.0 init
1576 13:51:44.105081 CPU TDP = 9 Watts
1577 13:51:44.105166 CPU PL1 = 9 Watts
1578 13:51:44.108227 CPU PL2 = 40 Watts
1579 13:51:44.111560 CPU PL4 = 83 Watts
1580 13:51:44.114709 PCI: 00:00.0 init finished in 8 msecs
1581 13:51:44.114810 PCI: 00:02.0 init
1582 13:51:44.117939 GMA: Found VBT in CBFS
1583 13:51:44.121454 GMA: Found valid VBT in CBFS
1584 13:51:44.128157 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1585 13:51:44.134933 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1586 13:51:44.138326 PCI: 00:02.0 init finished in 18 msecs
1587 13:51:44.141057 PCI: 00:05.0 init
1588 13:51:44.144520 PCI: 00:05.0 init finished in 0 msecs
1589 13:51:44.147973 PCI: 00:08.0 init
1590 13:51:44.151217 PCI: 00:08.0 init finished in 0 msecs
1591 13:51:44.154470 PCI: 00:14.0 init
1592 13:51:44.157903 PCI: 00:14.0 init finished in 0 msecs
1593 13:51:44.161359 PCI: 00:14.2 init
1594 13:51:44.164683 PCI: 00:14.2 init finished in 0 msecs
1595 13:51:44.167353 PCI: 00:15.0 init
1596 13:51:44.170857 I2C bus 0 version 0x3230302a
1597 13:51:44.174272 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1598 13:51:44.177668 PCI: 00:15.0 init finished in 6 msecs
1599 13:51:44.177781 PCI: 00:15.1 init
1600 13:51:44.180897 I2C bus 1 version 0x3230302a
1601 13:51:44.184269 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1602 13:51:44.190847 PCI: 00:15.1 init finished in 6 msecs
1603 13:51:44.190978 PCI: 00:15.2 init
1604 13:51:44.193877 I2C bus 2 version 0x3230302a
1605 13:51:44.197272 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1606 13:51:44.200693 PCI: 00:15.2 init finished in 6 msecs
1607 13:51:44.204098 PCI: 00:15.3 init
1608 13:51:44.207961 I2C bus 3 version 0x3230302a
1609 13:51:44.211012 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1610 13:51:44.214076 PCI: 00:15.3 init finished in 6 msecs
1611 13:51:44.217291 PCI: 00:16.0 init
1612 13:51:44.221104 PCI: 00:16.0 init finished in 0 msecs
1613 13:51:44.224494 PCI: 00:19.1 init
1614 13:51:44.227926 I2C bus 5 version 0x3230302a
1615 13:51:44.230481 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1616 13:51:44.233829 PCI: 00:19.1 init finished in 6 msecs
1617 13:51:44.237188 PCI: 00:1d.0 init
1618 13:51:44.237273 Initializing PCH PCIe bridge.
1619 13:51:44.244021 PCI: 00:1d.0 init finished in 3 msecs
1620 13:51:44.247340 PCI: 00:1f.0 init
1621 13:51:44.250809 IOAPIC: Initializing IOAPIC at 0xfec00000
1622 13:51:44.254071 IOAPIC: Bootstrap Processor Local APIC = 0x00
1623 13:51:44.257289 IOAPIC: ID = 0x02
1624 13:51:44.260609 IOAPIC: Dumping registers
1625 13:51:44.260698 reg 0x0000: 0x02000000
1626 13:51:44.264042 reg 0x0001: 0x00770020
1627 13:51:44.266714 reg 0x0002: 0x00000000
1628 13:51:44.270102 PCI: 00:1f.0 init finished in 21 msecs
1629 13:51:44.273469 PCI: 00:1f.2 init
1630 13:51:44.276918 Disabling ACPI via APMC.
1631 13:51:44.277039 APMC done.
1632 13:51:44.280938 PCI: 00:1f.2 init finished in 5 msecs
1633 13:51:44.294029 PCI: 01:00.0 init
1634 13:51:44.297283 PCI: 01:00.0 init finished in 0 msecs
1635 13:51:44.300687 PNP: 0c09.0 init
1636 13:51:44.304042 Google Chrome EC uptime: 8.358 seconds
1637 13:51:44.310632 Google Chrome AP resets since EC boot: 1
1638 13:51:44.313831 Google Chrome most recent AP reset causes:
1639 13:51:44.317034 0.346: 32775 shutdown: entering G3
1640 13:51:44.324253 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1641 13:51:44.327380 PNP: 0c09.0 init finished in 22 msecs
1642 13:51:44.332799 Devices initialized
1643 13:51:44.336216 Show all devs... After init.
1644 13:51:44.339678 Root Device: enabled 1
1645 13:51:44.339786 DOMAIN: 0000: enabled 1
1646 13:51:44.343016 CPU_CLUSTER: 0: enabled 1
1647 13:51:44.346321 PCI: 00:00.0: enabled 1
1648 13:51:44.349762 PCI: 00:02.0: enabled 1
1649 13:51:44.349848 PCI: 00:04.0: enabled 1
1650 13:51:44.352612 PCI: 00:05.0: enabled 1
1651 13:51:44.356025 PCI: 00:06.0: enabled 0
1652 13:51:44.359328 PCI: 00:07.0: enabled 0
1653 13:51:44.359413 PCI: 00:07.1: enabled 0
1654 13:51:44.363168 PCI: 00:07.2: enabled 0
1655 13:51:44.366567 PCI: 00:07.3: enabled 0
1656 13:51:44.369908 PCI: 00:08.0: enabled 1
1657 13:51:44.369993 PCI: 00:09.0: enabled 0
1658 13:51:44.372614 PCI: 00:0a.0: enabled 0
1659 13:51:44.375942 PCI: 00:0d.0: enabled 1
1660 13:51:44.379219 PCI: 00:0d.1: enabled 0
1661 13:51:44.379330 PCI: 00:0d.2: enabled 0
1662 13:51:44.382615 PCI: 00:0d.3: enabled 0
1663 13:51:44.386487 PCI: 00:0e.0: enabled 0
1664 13:51:44.386571 PCI: 00:10.2: enabled 1
1665 13:51:44.389702 PCI: 00:10.6: enabled 0
1666 13:51:44.392716 PCI: 00:10.7: enabled 0
1667 13:51:44.395876 PCI: 00:12.0: enabled 0
1668 13:51:44.395961 PCI: 00:12.6: enabled 0
1669 13:51:44.399618 PCI: 00:13.0: enabled 0
1670 13:51:44.402674 PCI: 00:14.0: enabled 1
1671 13:51:44.405980 PCI: 00:14.1: enabled 0
1672 13:51:44.406065 PCI: 00:14.2: enabled 1
1673 13:51:44.409390 PCI: 00:14.3: enabled 1
1674 13:51:44.412577 PCI: 00:15.0: enabled 1
1675 13:51:44.415764 PCI: 00:15.1: enabled 1
1676 13:51:44.415848 PCI: 00:15.2: enabled 1
1677 13:51:44.419471 PCI: 00:15.3: enabled 1
1678 13:51:44.422753 PCI: 00:16.0: enabled 1
1679 13:51:44.425887 PCI: 00:16.1: enabled 0
1680 13:51:44.425971 PCI: 00:16.2: enabled 0
1681 13:51:44.429070 PCI: 00:16.3: enabled 0
1682 13:51:44.432327 PCI: 00:16.4: enabled 0
1683 13:51:44.432423 PCI: 00:16.5: enabled 0
1684 13:51:44.435774 PCI: 00:17.0: enabled 0
1685 13:51:44.439036 PCI: 00:19.0: enabled 0
1686 13:51:44.442164 PCI: 00:19.1: enabled 1
1687 13:51:44.442249 PCI: 00:19.2: enabled 0
1688 13:51:44.445464 PCI: 00:1c.0: enabled 1
1689 13:51:44.449458 PCI: 00:1c.1: enabled 0
1690 13:51:44.452787 PCI: 00:1c.2: enabled 0
1691 13:51:44.452871 PCI: 00:1c.3: enabled 0
1692 13:51:44.456045 PCI: 00:1c.4: enabled 0
1693 13:51:44.459240 PCI: 00:1c.5: enabled 0
1694 13:51:44.462698 PCI: 00:1c.6: enabled 1
1695 13:51:44.462783 PCI: 00:1c.7: enabled 0
1696 13:51:44.465833 PCI: 00:1d.0: enabled 1
1697 13:51:44.468910 PCI: 00:1d.1: enabled 0
1698 13:51:44.469026 PCI: 00:1d.2: enabled 1
1699 13:51:44.472148 PCI: 00:1d.3: enabled 0
1700 13:51:44.475322 PCI: 00:1e.0: enabled 1
1701 13:51:44.479231 PCI: 00:1e.1: enabled 0
1702 13:51:44.479329 PCI: 00:1e.2: enabled 1
1703 13:51:44.481921 PCI: 00:1e.3: enabled 1
1704 13:51:44.485889 PCI: 00:1f.0: enabled 1
1705 13:51:44.489121 PCI: 00:1f.1: enabled 0
1706 13:51:44.489205 PCI: 00:1f.2: enabled 1
1707 13:51:44.492253 PCI: 00:1f.3: enabled 1
1708 13:51:44.495502 PCI: 00:1f.4: enabled 0
1709 13:51:44.498495 PCI: 00:1f.5: enabled 1
1710 13:51:44.498602 PCI: 00:1f.6: enabled 0
1711 13:51:44.502339 PCI: 00:1f.7: enabled 0
1712 13:51:44.505514 APIC: 00: enabled 1
1713 13:51:44.505602 GENERIC: 0.0: enabled 1
1714 13:51:44.508663 GENERIC: 0.0: enabled 1
1715 13:51:44.511932 GENERIC: 1.0: enabled 1
1716 13:51:44.515106 GENERIC: 0.0: enabled 1
1717 13:51:44.515192 GENERIC: 1.0: enabled 1
1718 13:51:44.518855 USB0 port 0: enabled 1
1719 13:51:44.522085 GENERIC: 0.0: enabled 1
1720 13:51:44.522196 USB0 port 0: enabled 1
1721 13:51:44.525259 GENERIC: 0.0: enabled 1
1722 13:51:44.529064 I2C: 00:1a: enabled 1
1723 13:51:44.532177 I2C: 00:31: enabled 1
1724 13:51:44.532283 I2C: 00:32: enabled 1
1725 13:51:44.535274 I2C: 00:10: enabled 1
1726 13:51:44.538681 I2C: 00:15: enabled 1
1727 13:51:44.538768 GENERIC: 0.0: enabled 0
1728 13:51:44.541862 GENERIC: 1.0: enabled 0
1729 13:51:44.545214 GENERIC: 0.0: enabled 1
1730 13:51:44.545300 SPI: 00: enabled 1
1731 13:51:44.548660 SPI: 00: enabled 1
1732 13:51:44.551830 PNP: 0c09.0: enabled 1
1733 13:51:44.551916 GENERIC: 0.0: enabled 1
1734 13:51:44.555083 USB3 port 0: enabled 1
1735 13:51:44.558460 USB3 port 1: enabled 1
1736 13:51:44.561838 USB3 port 2: enabled 0
1737 13:51:44.561925 USB3 port 3: enabled 0
1738 13:51:44.565100 USB2 port 0: enabled 0
1739 13:51:44.568382 USB2 port 1: enabled 1
1740 13:51:44.568469 USB2 port 2: enabled 1
1741 13:51:44.571587 USB2 port 3: enabled 0
1742 13:51:44.575538 USB2 port 4: enabled 1
1743 13:51:44.575624 USB2 port 5: enabled 0
1744 13:51:44.578155 USB2 port 6: enabled 0
1745 13:51:44.582082 USB2 port 7: enabled 0
1746 13:51:44.585492 USB2 port 8: enabled 0
1747 13:51:44.585568 USB2 port 9: enabled 0
1748 13:51:44.588548 USB3 port 0: enabled 0
1749 13:51:44.591848 USB3 port 1: enabled 1
1750 13:51:44.591929 USB3 port 2: enabled 0
1751 13:51:44.595030 USB3 port 3: enabled 0
1752 13:51:44.598158 GENERIC: 0.0: enabled 1
1753 13:51:44.601842 GENERIC: 1.0: enabled 1
1754 13:51:44.601935 APIC: 01: enabled 1
1755 13:51:44.604940 APIC: 04: enabled 1
1756 13:51:44.605027 APIC: 07: enabled 1
1757 13:51:44.608249 APIC: 02: enabled 1
1758 13:51:44.611405 APIC: 05: enabled 1
1759 13:51:44.611483 APIC: 06: enabled 1
1760 13:51:44.614598 APIC: 03: enabled 1
1761 13:51:44.617955 PCI: 01:00.0: enabled 1
1762 13:51:44.621183 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1763 13:51:44.628208 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1764 13:51:44.631405 ELOG: NV offset 0xf30000 size 0x1000
1765 13:51:44.638259 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1766 13:51:44.644868 ELOG: Event(17) added with size 13 at 2023-04-20 13:51:44 UTC
1767 13:51:44.651314 ELOG: Event(92) added with size 9 at 2023-04-20 13:51:44 UTC
1768 13:51:44.657948 ELOG: Event(93) added with size 9 at 2023-04-20 13:51:44 UTC
1769 13:51:44.664358 ELOG: Event(9E) added with size 10 at 2023-04-20 13:51:44 UTC
1770 13:51:44.671292 ELOG: Event(9F) added with size 14 at 2023-04-20 13:51:44 UTC
1771 13:51:44.677938 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1772 13:51:44.684066 ELOG: Event(A1) added with size 10 at 2023-04-20 13:51:44 UTC
1773 13:51:44.690747 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1774 13:51:44.697659 ELOG: Event(A0) added with size 9 at 2023-04-20 13:51:44 UTC
1775 13:51:44.700914 elog_add_boot_reason: Logged dev mode boot
1776 13:51:44.707463 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1777 13:51:44.710725 Finalize devices...
1778 13:51:44.710812 Devices finalized
1779 13:51:44.717078 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1780 13:51:44.720552 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1781 13:51:44.727012 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1782 13:51:44.730502 ME: HFSTS1 : 0x80030055
1783 13:51:44.736922 ME: HFSTS2 : 0x30280116
1784 13:51:44.740615 ME: HFSTS3 : 0x00000050
1785 13:51:44.743680 ME: HFSTS4 : 0x00004000
1786 13:51:44.750173 ME: HFSTS5 : 0x00000000
1787 13:51:44.753682 ME: HFSTS6 : 0x00400006
1788 13:51:44.757035 ME: Manufacturing Mode : YES
1789 13:51:44.760257 ME: SPI Protection Mode Enabled : NO
1790 13:51:44.767082 ME: FW Partition Table : OK
1791 13:51:44.770672 ME: Bringup Loader Failure : NO
1792 13:51:44.773289 ME: Firmware Init Complete : NO
1793 13:51:44.776782 ME: Boot Options Present : NO
1794 13:51:44.780062 ME: Update In Progress : NO
1795 13:51:44.783498 ME: D0i3 Support : YES
1796 13:51:44.786968 ME: Low Power State Enabled : NO
1797 13:51:44.790227 ME: CPU Replaced : YES
1798 13:51:44.797033 ME: CPU Replacement Valid : YES
1799 13:51:44.800307 ME: Current Working State : 5
1800 13:51:44.803041 ME: Current Operation State : 1
1801 13:51:44.806852 ME: Current Operation Mode : 3
1802 13:51:44.810012 ME: Error Code : 0
1803 13:51:44.813290 ME: Enhanced Debug Mode : NO
1804 13:51:44.816432 ME: CPU Debug Disabled : YES
1805 13:51:44.819598 ME: TXT Support : NO
1806 13:51:44.826697 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1807 13:51:44.836439 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1808 13:51:44.839724 CBFS: 'fallback/slic' not found.
1809 13:51:44.843052 ACPI: Writing ACPI tables at 76b01000.
1810 13:51:44.843136 ACPI: * FACS
1811 13:51:44.846413 ACPI: * DSDT
1812 13:51:44.849808 Ramoops buffer: 0x100000@0x76a00000.
1813 13:51:44.853162 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1814 13:51:44.859757 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1815 13:51:44.863062 Google Chrome EC: version:
1816 13:51:44.866394 ro: voema_v2.0.7540-147f8d37d1
1817 13:51:44.869168 rw: voema_v2.0.7540-147f8d37d1
1818 13:51:44.869259 running image: 2
1819 13:51:44.875981 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1820 13:51:44.880639 ACPI: * FADT
1821 13:51:44.880729 SCI is IRQ9
1822 13:51:44.887214 ACPI: added table 1/32, length now 40
1823 13:51:44.887340 ACPI: * SSDT
1824 13:51:44.890644 Found 1 CPU(s) with 8 core(s) each.
1825 13:51:44.897659 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1826 13:51:44.900987 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1827 13:51:44.904314 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1828 13:51:44.907630 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1829 13:51:44.914401 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1830 13:51:44.920908 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1831 13:51:44.924136 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1832 13:51:44.930683 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1833 13:51:44.937166 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1834 13:51:44.940693 \_SB.PCI0.RP09: Added StorageD3Enable property
1835 13:51:44.943788 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1836 13:51:44.950796 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1837 13:51:44.956917 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1838 13:51:44.960353 PS2K: Passing 80 keymaps to kernel
1839 13:51:44.967262 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1840 13:51:44.973343 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1841 13:51:44.980104 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1842 13:51:44.986863 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1843 13:51:44.993414 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1844 13:51:45.000198 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1845 13:51:45.007088 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1846 13:51:45.013224 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1847 13:51:45.016557 ACPI: added table 2/32, length now 44
1848 13:51:45.020032 ACPI: * MCFG
1849 13:51:45.023346 ACPI: added table 3/32, length now 48
1850 13:51:45.023433 ACPI: * TPM2
1851 13:51:45.026641 TPM2 log created at 0x769f0000
1852 13:51:45.029714 ACPI: added table 4/32, length now 52
1853 13:51:45.033052 ACPI: * MADT
1854 13:51:45.033140 SCI is IRQ9
1855 13:51:45.036372 ACPI: added table 5/32, length now 56
1856 13:51:45.039675 current = 76b09850
1857 13:51:45.039755 ACPI: * DMAR
1858 13:51:45.046744 ACPI: added table 6/32, length now 60
1859 13:51:45.050032 ACPI: added table 7/32, length now 64
1860 13:51:45.050177 ACPI: * HPET
1861 13:51:45.053216 ACPI: added table 8/32, length now 68
1862 13:51:45.056713 ACPI: done.
1863 13:51:45.059940 ACPI tables: 35216 bytes.
1864 13:51:45.060041 smbios_write_tables: 769ef000
1865 13:51:45.063264 EC returned error result code 3
1866 13:51:45.066665 Couldn't obtain OEM name from CBI
1867 13:51:45.070582 Create SMBIOS type 16
1868 13:51:45.073987 Create SMBIOS type 17
1869 13:51:45.077397 GENERIC: 0.0 (WIFI Device)
1870 13:51:45.077476 SMBIOS tables: 1750 bytes.
1871 13:51:45.083468 Writing table forward entry at 0x00000500
1872 13:51:45.090807 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1873 13:51:45.093583 Writing coreboot table at 0x76b25000
1874 13:51:45.099975 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1875 13:51:45.103429 1. 0000000000001000-000000000009ffff: RAM
1876 13:51:45.106864 2. 00000000000a0000-00000000000fffff: RESERVED
1877 13:51:45.113874 3. 0000000000100000-00000000769eefff: RAM
1878 13:51:45.116581 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1879 13:51:45.123230 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1880 13:51:45.129899 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1881 13:51:45.133177 7. 0000000077000000-000000007fbfffff: RESERVED
1882 13:51:45.139739 8. 00000000c0000000-00000000cfffffff: RESERVED
1883 13:51:45.143009 9. 00000000f8000000-00000000f9ffffff: RESERVED
1884 13:51:45.146818 10. 00000000fb000000-00000000fb000fff: RESERVED
1885 13:51:45.153535 11. 00000000fe000000-00000000fe00ffff: RESERVED
1886 13:51:45.156836 12. 00000000fed80000-00000000fed87fff: RESERVED
1887 13:51:45.163467 13. 00000000fed90000-00000000fed92fff: RESERVED
1888 13:51:45.166764 14. 00000000feda0000-00000000feda1fff: RESERVED
1889 13:51:45.172763 15. 00000000fedc0000-00000000feddffff: RESERVED
1890 13:51:45.176640 16. 0000000100000000-00000002803fffff: RAM
1891 13:51:45.179958 Passing 4 GPIOs to payload:
1892 13:51:45.183355 NAME | PORT | POLARITY | VALUE
1893 13:51:45.189465 lid | undefined | high | high
1894 13:51:45.196164 power | undefined | high | low
1895 13:51:45.199511 oprom | undefined | high | low
1896 13:51:45.205802 EC in RW | 0x000000e5 | high | high
1897 13:51:45.212746 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 1312
1898 13:51:45.216030 coreboot table: 1576 bytes.
1899 13:51:45.219440 IMD ROOT 0. 0x76fff000 0x00001000
1900 13:51:45.222816 IMD SMALL 1. 0x76ffe000 0x00001000
1901 13:51:45.226062 FSP MEMORY 2. 0x76c4e000 0x003b0000
1902 13:51:45.229383 VPD 3. 0x76c4d000 0x00000367
1903 13:51:45.232492 RO MCACHE 4. 0x76c4c000 0x00000fdc
1904 13:51:45.235550 CONSOLE 5. 0x76c2c000 0x00020000
1905 13:51:45.239269 FMAP 6. 0x76c2b000 0x00000578
1906 13:51:45.245894 TIME STAMP 7. 0x76c2a000 0x00000910
1907 13:51:45.249281 VBOOT WORK 8. 0x76c16000 0x00014000
1908 13:51:45.252666 ROMSTG STCK 9. 0x76c15000 0x00001000
1909 13:51:45.255310 AFTER CAR 10. 0x76c0a000 0x0000b000
1910 13:51:45.259089 RAMSTAGE 11. 0x76b97000 0x00073000
1911 13:51:45.262393 REFCODE 12. 0x76b42000 0x00055000
1912 13:51:45.265803 SMM BACKUP 13. 0x76b32000 0x00010000
1913 13:51:45.271994 4f444749 14. 0x76b30000 0x00002000
1914 13:51:45.275189 EXT VBT15. 0x76b2d000 0x0000219f
1915 13:51:45.278661 COREBOOT 16. 0x76b25000 0x00008000
1916 13:51:45.282106 ACPI 17. 0x76b01000 0x00024000
1917 13:51:45.285490 ACPI GNVS 18. 0x76b00000 0x00001000
1918 13:51:45.288934 RAMOOPS 19. 0x76a00000 0x00100000
1919 13:51:45.292229 TPM2 TCGLOG20. 0x769f0000 0x00010000
1920 13:51:45.295597 SMBIOS 21. 0x769ef000 0x00000800
1921 13:51:45.298296 IMD small region:
1922 13:51:45.301650 IMD ROOT 0. 0x76ffec00 0x00000400
1923 13:51:45.304943 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1924 13:51:45.308805 POWER STATE 2. 0x76ffeb80 0x00000044
1925 13:51:45.315361 ROMSTAGE 3. 0x76ffeb60 0x00000004
1926 13:51:45.318093 MEM INFO 4. 0x76ffe980 0x000001e0
1927 13:51:45.324888 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1928 13:51:45.325002 MTRR: Physical address space:
1929 13:51:45.331395 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1930 13:51:45.338672 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1931 13:51:45.344658 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1932 13:51:45.351212 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1933 13:51:45.357924 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1934 13:51:45.365032 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1935 13:51:45.371562 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1936 13:51:45.374383 MTRR: Fixed MSR 0x250 0x0606060606060606
1937 13:51:45.377802 MTRR: Fixed MSR 0x258 0x0606060606060606
1938 13:51:45.381186 MTRR: Fixed MSR 0x259 0x0000000000000000
1939 13:51:45.387986 MTRR: Fixed MSR 0x268 0x0606060606060606
1940 13:51:45.391339 MTRR: Fixed MSR 0x269 0x0606060606060606
1941 13:51:45.394732 MTRR: Fixed MSR 0x26a 0x0606060606060606
1942 13:51:45.398064 MTRR: Fixed MSR 0x26b 0x0606060606060606
1943 13:51:45.404081 MTRR: Fixed MSR 0x26c 0x0606060606060606
1944 13:51:45.407491 MTRR: Fixed MSR 0x26d 0x0606060606060606
1945 13:51:45.410662 MTRR: Fixed MSR 0x26e 0x0606060606060606
1946 13:51:45.414458 MTRR: Fixed MSR 0x26f 0x0606060606060606
1947 13:51:45.418485 call enable_fixed_mtrr()
1948 13:51:45.421913 CPU physical address size: 39 bits
1949 13:51:45.428597 MTRR: default type WB/UC MTRR counts: 6/6.
1950 13:51:45.432076 MTRR: UC selected as default type.
1951 13:51:45.437960 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1952 13:51:45.441262 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1953 13:51:45.447824 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1954 13:51:45.455094 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1955 13:51:45.461068 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1956 13:51:45.468141 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1957 13:51:45.468254
1958 13:51:45.471347 MTRR check
1959 13:51:45.474571 Fixed MTRRs : Enabled
1960 13:51:45.474687 Variable MTRRs: Enabled
1961 13:51:45.474785
1962 13:51:45.481283 MTRR: Fixed MSR 0x250 0x0606060606060606
1963 13:51:45.484674 MTRR: Fixed MSR 0x258 0x0606060606060606
1964 13:51:45.487988 MTRR: Fixed MSR 0x259 0x0000000000000000
1965 13:51:45.491220 MTRR: Fixed MSR 0x268 0x0606060606060606
1966 13:51:45.497355 MTRR: Fixed MSR 0x269 0x0606060606060606
1967 13:51:45.500669 MTRR: Fixed MSR 0x26a 0x0606060606060606
1968 13:51:45.504106 MTRR: Fixed MSR 0x26b 0x0606060606060606
1969 13:51:45.507327 MTRR: Fixed MSR 0x26c 0x0606060606060606
1970 13:51:45.513883 MTRR: Fixed MSR 0x26d 0x0606060606060606
1971 13:51:45.517144 MTRR: Fixed MSR 0x26e 0x0606060606060606
1972 13:51:45.520309 MTRR: Fixed MSR 0x26f 0x0606060606060606
1973 13:51:45.527657 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1974 13:51:45.530304 call enable_fixed_mtrr()
1975 13:51:45.534370 Checking cr50 for pending updates
1976 13:51:45.538405 CPU physical address size: 39 bits
1977 13:51:45.541714 MTRR: Fixed MSR 0x250 0x0606060606060606
1978 13:51:45.545047 MTRR: Fixed MSR 0x250 0x0606060606060606
1979 13:51:45.548331 MTRR: Fixed MSR 0x258 0x0606060606060606
1980 13:51:45.554880 MTRR: Fixed MSR 0x259 0x0000000000000000
1981 13:51:45.558108 MTRR: Fixed MSR 0x268 0x0606060606060606
1982 13:51:45.561334 MTRR: Fixed MSR 0x269 0x0606060606060606
1983 13:51:45.564884 MTRR: Fixed MSR 0x26a 0x0606060606060606
1984 13:51:45.571966 MTRR: Fixed MSR 0x26b 0x0606060606060606
1985 13:51:45.575248 MTRR: Fixed MSR 0x26c 0x0606060606060606
1986 13:51:45.578438 MTRR: Fixed MSR 0x26d 0x0606060606060606
1987 13:51:45.581838 MTRR: Fixed MSR 0x26e 0x0606060606060606
1988 13:51:45.588009 MTRR: Fixed MSR 0x26f 0x0606060606060606
1989 13:51:45.591451 MTRR: Fixed MSR 0x258 0x0606060606060606
1990 13:51:45.594854 MTRR: Fixed MSR 0x259 0x0000000000000000
1991 13:51:45.601465 MTRR: Fixed MSR 0x268 0x0606060606060606
1992 13:51:45.604946 MTRR: Fixed MSR 0x269 0x0606060606060606
1993 13:51:45.607840 MTRR: Fixed MSR 0x26a 0x0606060606060606
1994 13:51:45.611164 MTRR: Fixed MSR 0x26b 0x0606060606060606
1995 13:51:45.614618 MTRR: Fixed MSR 0x26c 0x0606060606060606
1996 13:51:45.621171 MTRR: Fixed MSR 0x26d 0x0606060606060606
1997 13:51:45.624390 MTRR: Fixed MSR 0x26e 0x0606060606060606
1998 13:51:45.627701 MTRR: Fixed MSR 0x26f 0x0606060606060606
1999 13:51:45.631726 call enable_fixed_mtrr()
2000 13:51:45.635068 call enable_fixed_mtrr()
2001 13:51:45.638391 MTRR: Fixed MSR 0x250 0x0606060606060606
2002 13:51:45.641670 MTRR: Fixed MSR 0x250 0x0606060606060606
2003 13:51:45.648437 MTRR: Fixed MSR 0x258 0x0606060606060606
2004 13:51:45.651561 MTRR: Fixed MSR 0x259 0x0000000000000000
2005 13:51:45.654833 MTRR: Fixed MSR 0x268 0x0606060606060606
2006 13:51:45.657993 MTRR: Fixed MSR 0x269 0x0606060606060606
2007 13:51:45.664611 MTRR: Fixed MSR 0x26a 0x0606060606060606
2008 13:51:45.667929 MTRR: Fixed MSR 0x26b 0x0606060606060606
2009 13:51:45.671210 MTRR: Fixed MSR 0x26c 0x0606060606060606
2010 13:51:45.674430 MTRR: Fixed MSR 0x26d 0x0606060606060606
2011 13:51:45.681567 MTRR: Fixed MSR 0x26e 0x0606060606060606
2012 13:51:45.684688 MTRR: Fixed MSR 0x26f 0x0606060606060606
2013 13:51:45.688028 MTRR: Fixed MSR 0x258 0x0606060606060606
2014 13:51:45.691438 call enable_fixed_mtrr()
2015 13:51:45.694177 MTRR: Fixed MSR 0x259 0x0000000000000000
2016 13:51:45.700980 MTRR: Fixed MSR 0x268 0x0606060606060606
2017 13:51:45.704334 MTRR: Fixed MSR 0x269 0x0606060606060606
2018 13:51:45.707679 MTRR: Fixed MSR 0x26a 0x0606060606060606
2019 13:51:45.711056 MTRR: Fixed MSR 0x26b 0x0606060606060606
2020 13:51:45.717739 MTRR: Fixed MSR 0x26c 0x0606060606060606
2021 13:51:45.721196 MTRR: Fixed MSR 0x26d 0x0606060606060606
2022 13:51:45.724556 MTRR: Fixed MSR 0x26e 0x0606060606060606
2023 13:51:45.727836 MTRR: Fixed MSR 0x26f 0x0606060606060606
2024 13:51:45.731767 CPU physical address size: 39 bits
2025 13:51:45.738015 call enable_fixed_mtrr()
2026 13:51:45.741426 CPU physical address size: 39 bits
2027 13:51:45.744830 CPU physical address size: 39 bits
2028 13:51:45.747504 CPU physical address size: 39 bits
2029 13:51:45.750849 MTRR: Fixed MSR 0x250 0x0606060606060606
2030 13:51:45.757539 MTRR: Fixed MSR 0x250 0x0606060606060606
2031 13:51:45.761383 MTRR: Fixed MSR 0x258 0x0606060606060606
2032 13:51:45.764082 MTRR: Fixed MSR 0x259 0x0000000000000000
2033 13:51:45.767475 MTRR: Fixed MSR 0x268 0x0606060606060606
2034 13:51:45.774370 MTRR: Fixed MSR 0x269 0x0606060606060606
2035 13:51:45.777604 MTRR: Fixed MSR 0x26a 0x0606060606060606
2036 13:51:45.780836 MTRR: Fixed MSR 0x26b 0x0606060606060606
2037 13:51:45.784079 MTRR: Fixed MSR 0x26c 0x0606060606060606
2038 13:51:45.787324 MTRR: Fixed MSR 0x26d 0x0606060606060606
2039 13:51:45.793963 MTRR: Fixed MSR 0x26e 0x0606060606060606
2040 13:51:45.797323 MTRR: Fixed MSR 0x26f 0x0606060606060606
2041 13:51:45.803969 MTRR: Fixed MSR 0x258 0x0606060606060606
2042 13:51:45.807394 MTRR: Fixed MSR 0x259 0x0000000000000000
2043 13:51:45.810816 MTRR: Fixed MSR 0x268 0x0606060606060606
2044 13:51:45.813808 MTRR: Fixed MSR 0x269 0x0606060606060606
2045 13:51:45.820613 MTRR: Fixed MSR 0x26a 0x0606060606060606
2046 13:51:45.823984 MTRR: Fixed MSR 0x26b 0x0606060606060606
2047 13:51:45.827182 MTRR: Fixed MSR 0x26c 0x0606060606060606
2048 13:51:45.830612 MTRR: Fixed MSR 0x26d 0x0606060606060606
2049 13:51:45.836916 MTRR: Fixed MSR 0x26e 0x0606060606060606
2050 13:51:45.840188 MTRR: Fixed MSR 0x26f 0x0606060606060606
2051 13:51:45.843703 call enable_fixed_mtrr()
2052 13:51:45.847789 call enable_fixed_mtrr()
2053 13:51:45.847879 Reading cr50 TPM mode
2054 13:51:45.850468 CPU physical address size: 39 bits
2055 13:51:45.854601 CPU physical address size: 39 bits
2056 13:51:45.861061 BS: BS_PAYLOAD_LOAD entry times (exec / console): 319 / 6 ms
2057 13:51:45.870893 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2058 13:51:45.874169 Checking segment from ROM address 0xffc02b38
2059 13:51:45.877491 Checking segment from ROM address 0xffc02b54
2060 13:51:45.883996 Loading segment from ROM address 0xffc02b38
2061 13:51:45.884109 code (compression=0)
2062 13:51:45.893760 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2063 13:51:45.903939 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2064 13:51:45.904072 it's not compressed!
2065 13:51:46.043686 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2066 13:51:46.050232 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2067 13:51:46.057072 Loading segment from ROM address 0xffc02b54
2068 13:51:46.057202 Entry Point 0x30000000
2069 13:51:46.060388 Loaded segments
2070 13:51:46.066414 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2071 13:51:46.109452 Finalizing chipset.
2072 13:51:46.112742 Finalizing SMM.
2073 13:51:46.112868 APMC done.
2074 13:51:46.119384 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2075 13:51:46.122740 mp_park_aps done after 0 msecs.
2076 13:51:46.126067 Jumping to boot code at 0x30000000(0x76b25000)
2077 13:51:46.136200 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2078 13:51:46.136328
2079 13:51:46.136429
2080 13:51:46.139600
2081 13:51:46.139685 Starting depthcharge on Voema...
2082 13:51:46.140120 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2083 13:51:46.140268 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2084 13:51:46.140405 Setting prompt string to ['volteer:']
2085 13:51:46.140526 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2086 13:51:46.142831
2087 13:51:46.149511 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2088 13:51:46.149610
2089 13:51:46.156180 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2090 13:51:46.156296
2091 13:51:46.162184 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2092 13:51:46.162290
2093 13:51:46.165702 Failed to find eMMC card reader
2094 13:51:46.165782
2095 13:51:46.165872 Wipe memory regions:
2096 13:51:46.169039
2097 13:51:46.172387 [0x00000000001000, 0x000000000a0000)
2098 13:51:46.172471
2099 13:51:46.175663 [0x00000000100000, 0x00000030000000)
2100 13:51:46.201599
2101 13:51:46.204831 [0x00000032662db0, 0x000000769ef000)
2102 13:51:46.240404
2103 13:51:46.243612 [0x00000100000000, 0x00000280400000)
2104 13:51:46.444299
2105 13:51:46.447609 ec_init: CrosEC protocol v3 supported (256, 256)
2106 13:51:46.447725
2107 13:51:46.453755 update_port_state: port C0 state: usb enable 1 mux conn 0
2108 13:51:46.453874
2109 13:51:46.464089 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2110 13:51:46.464206
2111 13:51:46.470601 pmc_check_ipc_sts: STS_BUSY done after 1561 us
2112 13:51:46.470693
2113 13:51:46.474110 send_conn_disc_msg: pmc_send_cmd succeeded
2114 13:51:46.906018
2115 13:51:46.906183 R8152: Initializing
2116 13:51:46.906295
2117 13:51:46.909207 Version 6 (ocp_data = 5c30)
2118 13:51:46.909316
2119 13:51:46.912426 R8152: Done initializing
2120 13:51:46.912509
2121 13:51:46.915935 Adding net device
2122 13:51:47.217884
2123 13:51:47.221110 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2124 13:51:47.221229
2125 13:51:47.221316
2126 13:51:47.221399
2127 13:51:47.224493 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2129 13:51:47.325373 volteer: tftpboot 192.168.201.1 10062385/tftp-deploy-2z4dxnun/kernel/bzImage 10062385/tftp-deploy-2z4dxnun/kernel/cmdline 10062385/tftp-deploy-2z4dxnun/ramdisk/ramdisk.cpio.gz
2130 13:51:47.325562 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2131 13:51:47.325682 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2132 13:51:47.329923 tftpboot 192.168.201.1 10062385/tftp-deploy-2z4dxnun/kernel/bzIloy-2z4dxnun/kernel/cmdline 10062385/tftp-deploy-2z4dxnun/ramdisk/ramdisk.cpio.gz
2133 13:51:47.330043
2134 13:51:47.330149 Waiting for link
2135 13:51:47.534014
2136 13:51:47.534178 done.
2137 13:51:47.534282
2138 13:51:47.534393 MAC: 00:24:32:30:79:06
2139 13:51:47.534494
2140 13:51:47.537313 Sending DHCP discover... done.
2141 13:51:47.537422
2142 13:51:47.540731 Waiting for reply... done.
2143 13:51:47.540825
2144 13:51:47.543848 Sending DHCP request... done.
2145 13:51:47.543971
2146 13:51:47.547219 Waiting for reply... done.
2147 13:51:47.547328
2148 13:51:47.550501 My ip is 192.168.201.23
2149 13:51:47.550618
2150 13:51:47.553853 The DHCP server ip is 192.168.201.1
2151 13:51:47.553963
2152 13:51:47.557222 TFTP server IP predefined by user: 192.168.201.1
2153 13:51:47.557343
2154 13:51:47.563785 Bootfile predefined by user: 10062385/tftp-deploy-2z4dxnun/kernel/bzImage
2155 13:51:47.563903
2156 13:51:47.567025 Sending tftp read request... done.
2157 13:51:47.570755
2158 13:51:47.574025 Waiting for the transfer...
2159 13:51:47.574135
2160 13:51:48.092004 00000000 ################################################################
2161 13:51:48.092165
2162 13:51:48.611606 00080000 ################################################################
2163 13:51:48.611743
2164 13:51:49.129257 00100000 ################################################################
2165 13:51:49.129438
2166 13:51:49.645854 00180000 ################################################################
2167 13:51:49.646031
2168 13:51:50.165317 00200000 ################################################################
2169 13:51:50.165454
2170 13:51:50.679406 00280000 ################################################################
2171 13:51:50.679549
2172 13:51:51.224078 00300000 ################################################################
2173 13:51:51.224216
2174 13:51:51.765874 00380000 ################################################################
2175 13:51:51.766035
2176 13:51:52.298140 00400000 ################################################################
2177 13:51:52.298303
2178 13:51:52.816763 00480000 ################################################################
2179 13:51:52.816901
2180 13:51:53.335419 00500000 ################################################################
2181 13:51:53.335587
2182 13:51:53.867148 00580000 ################################################################
2183 13:51:53.867309
2184 13:51:54.408644 00600000 ################################################################
2185 13:51:54.408812
2186 13:51:54.944284 00680000 ################################################################
2187 13:51:54.944497
2188 13:51:55.477839 00700000 ################################################################
2189 13:51:55.478007
2190 13:51:56.055956 00780000 ################################################################
2191 13:51:56.056143
2192 13:51:56.599412 00800000 ################################################################
2193 13:51:56.599572
2194 13:51:57.117826 00880000 ################################################################
2195 13:51:57.117974
2196 13:51:57.631198 00900000 ################################################################
2197 13:51:57.631371
2198 13:51:58.144929 00980000 ################################################################
2199 13:51:58.145077
2200 13:51:58.514263 00a00000 ############################################## done.
2201 13:51:58.514415
2202 13:51:58.517358 The bootfile was 10854400 bytes long.
2203 13:51:58.517445
2204 13:51:58.520358 Sending tftp read request... done.
2205 13:51:58.520458
2206 13:51:58.523991 Waiting for the transfer...
2207 13:51:58.524104
2208 13:51:59.045200 00000000 ################################################################
2209 13:51:59.045400
2210 13:51:59.563546 00080000 ################################################################
2211 13:51:59.563701
2212 13:52:00.081635 00100000 ################################################################
2213 13:52:00.081799
2214 13:52:00.602321 00180000 ################################################################
2215 13:52:00.602482
2216 13:52:01.118229 00200000 ################################################################
2217 13:52:01.118405
2218 13:52:01.634375 00280000 ################################################################
2219 13:52:01.634556
2220 13:52:02.167912 00300000 ################################################################
2221 13:52:02.168090
2222 13:52:02.694356 00380000 ################################################################
2223 13:52:02.694512
2224 13:52:03.208301 00400000 ################################################################
2225 13:52:03.208460
2226 13:52:03.726226 00480000 ################################################################
2227 13:52:03.726363
2228 13:52:04.245948 00500000 ################################################################
2229 13:52:04.246115
2230 13:52:04.787252 00580000 ################################################################
2231 13:52:04.787415
2232 13:52:05.404013 00600000 ################################################################
2233 13:52:05.404153
2234 13:52:06.011217 00680000 ################################################################
2235 13:52:06.011403
2236 13:52:06.536025 00700000 ################################################################
2237 13:52:06.536209
2238 13:52:07.066076 00780000 ################################################################
2239 13:52:07.066249
2240 13:52:07.586931 00800000 ################################################################
2241 13:52:07.587121
2242 13:52:08.115236 00880000 ################################################################
2243 13:52:08.115408
2244 13:52:08.642888 00900000 ################################################################
2245 13:52:08.643047
2246 13:52:09.170178 00980000 ################################################################
2247 13:52:09.170363
2248 13:52:09.705700 00a00000 ################################################################
2249 13:52:09.705849
2250 13:52:10.219760 00a80000 ################################################################
2251 13:52:10.219903
2252 13:52:10.736186 00b00000 ################################################################
2253 13:52:10.736337
2254 13:52:11.258105 00b80000 ################################################################
2255 13:52:11.258299
2256 13:52:11.776360 00c00000 ################################################################
2257 13:52:11.776511
2258 13:52:12.299480 00c80000 ################################################################
2259 13:52:12.299645
2260 13:52:12.813349 00d00000 ################################################################
2261 13:52:12.813519
2262 13:52:13.346148 00d80000 ################################################################
2263 13:52:13.346291
2264 13:52:13.871832 00e00000 ################################################################
2265 13:52:13.871974
2266 13:52:14.394389 00e80000 ################################################################
2267 13:52:14.394548
2268 13:52:14.923752 00f00000 ################################################################
2269 13:52:14.923912
2270 13:52:15.443105 00f80000 ################################################################
2271 13:52:15.443281
2272 13:52:15.963421 01000000 ################################################################
2273 13:52:15.963580
2274 13:52:16.484376 01080000 ################################################################
2275 13:52:16.484573
2276 13:52:17.010386 01100000 ################################################################
2277 13:52:17.010550
2278 13:52:17.549397 01180000 ################################################################
2279 13:52:17.549611
2280 13:52:18.075790 01200000 ################################################################
2281 13:52:18.076011
2282 13:52:18.597970 01280000 ################################################################
2283 13:52:18.598164
2284 13:52:19.113907 01300000 ################################################################
2285 13:52:19.114103
2286 13:52:19.626786 01380000 ################################################################
2287 13:52:19.626928
2288 13:52:20.149483 01400000 ################################################################
2289 13:52:20.149670
2290 13:52:20.679328 01480000 ################################################################
2291 13:52:20.679485
2292 13:52:21.212276 01500000 ################################################################
2293 13:52:21.212482
2294 13:52:21.820520 01580000 ################################################################
2295 13:52:21.820720
2296 13:52:22.344583 01600000 ################################################################
2297 13:52:22.344784
2298 13:52:22.869734 01680000 ################################################################
2299 13:52:22.869939
2300 13:52:23.386755 01700000 ################################################################
2301 13:52:23.386945
2302 13:52:23.907408 01780000 ################################################################
2303 13:52:23.907568
2304 13:52:24.435249 01800000 ################################################################
2305 13:52:24.435444
2306 13:52:24.981283 01880000 ################################################################
2307 13:52:24.981442
2308 13:52:25.516553 01900000 ################################################################
2309 13:52:25.516739
2310 13:52:26.049638 01980000 ################################################################
2311 13:52:26.049813
2312 13:52:26.596861 01a00000 ################################################################
2313 13:52:26.597016
2314 13:52:27.140781 01a80000 ################################################################
2315 13:52:27.140933
2316 13:52:27.665112 01b00000 ################################################################
2317 13:52:27.665268
2318 13:52:28.182797 01b80000 ################################################################
2319 13:52:28.182990
2320 13:52:28.699601 01c00000 ################################################################
2321 13:52:28.699753
2322 13:52:29.211700 01c80000 ################################################################
2323 13:52:29.211853
2324 13:52:29.721459 01d00000 ################################################################
2325 13:52:29.721645
2326 13:52:30.231529 01d80000 ################################################################
2327 13:52:30.231712
2328 13:52:30.746676 01e00000 ################################################################
2329 13:52:30.746870
2330 13:52:31.258973 01e80000 ################################################################
2331 13:52:31.259154
2332 13:52:31.775705 01f00000 ################################################################
2333 13:52:31.775887
2334 13:52:32.289241 01f80000 ################################################################
2335 13:52:32.289423
2336 13:52:32.801630 02000000 ################################################################
2337 13:52:32.801810
2338 13:52:33.314416 02080000 ################################################################
2339 13:52:33.314552
2340 13:52:33.822807 02100000 ################################################################
2341 13:52:33.822976
2342 13:52:34.334909 02180000 ################################################################
2343 13:52:34.335087
2344 13:52:34.846160 02200000 ################################################################
2345 13:52:34.846339
2346 13:52:35.130043 02280000 #################################### done.
2347 13:52:35.130321
2348 13:52:35.133134 Sending tftp read request... done.
2349 13:52:35.133223
2350 13:52:35.136228 Waiting for the transfer...
2351 13:52:35.136357
2352 13:52:35.136537 00000000 # done.
2353 13:52:35.136667
2354 13:52:35.146285 Command line loaded dynamically from TFTP file: 10062385/tftp-deploy-2z4dxnun/kernel/cmdline
2355 13:52:35.146469
2356 13:52:35.159420 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2357 13:52:35.165949
2358 13:52:35.169165 Shutting down all USB controllers.
2359 13:52:35.169266
2360 13:52:35.169336 Removing current net device
2361 13:52:35.169398
2362 13:52:35.172955 Finalizing coreboot
2363 13:52:35.173081
2364 13:52:35.179199 Exiting depthcharge with code 4 at timestamp: 57705744
2365 13:52:35.179329
2366 13:52:35.179426
2367 13:52:35.179517 Starting kernel ...
2368 13:52:35.179606
2369 13:52:35.179711
2370 13:52:35.180433 end: 2.2.4 bootloader-commands (duration 00:00:49) [common]
2371 13:52:35.180572 start: 2.2.5 auto-login-action (timeout 00:03:55) [common]
2372 13:52:35.180687 Setting prompt string to ['Linux version [0-9]']
2373 13:52:35.180808 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2374 13:52:35.180890 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2376 13:56:30.180825 end: 2.2.5 auto-login-action (duration 00:03:55) [common]
2378 13:56:30.181056 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 235 seconds'
2380 13:56:30.181234 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2383 13:56:30.181494 end: 2 depthcharge-action (duration 00:05:00) [common]
2385 13:56:30.181754 Cleaning after the job
2386 13:56:30.181853 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062385/tftp-deploy-2z4dxnun/ramdisk
2387 13:56:30.185675 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062385/tftp-deploy-2z4dxnun/kernel
2388 13:56:30.186870 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062385/tftp-deploy-2z4dxnun/modules
2389 13:56:30.187397 start: 4.1 power-off (timeout 00:00:30) [common]
2390 13:56:30.187571 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=off'
2391 13:56:30.262303 >> Command sent successfully.
2392 13:56:30.264764 Returned 0 in 0 seconds
2393 13:56:30.365522 end: 4.1 power-off (duration 00:00:00) [common]
2395 13:56:30.365899 start: 4.2 read-feedback (timeout 00:10:00) [common]
2396 13:56:30.366159 Listened to connection for namespace 'common' for up to 1s
2397 13:56:31.368454 Finalising connection for namespace 'common'
2398 13:56:31.368641 Disconnecting from shell: Finalise
2399 13:56:31.368727
2400 13:56:31.469683 end: 4.2 read-feedback (duration 00:00:01) [common]
2401 13:56:31.470276 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10062385
2402 13:56:31.582269 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10062385
2403 13:56:31.582467 JobError: Your job cannot terminate cleanly.