Boot log: asus-cx9400-volteer
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
1 13:51:36.030835 lava-dispatcher, installed at version: 2023.01
2 13:51:36.031059 start: 0 validate
3 13:51:36.031209 Start time: 2023-04-20 13:51:36.031201+00:00 (UTC)
4 13:51:36.031354 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:51:36.031509 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20230414.0%2Famd64%2Finitrd.cpio.gz exists
6 13:51:36.327433 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:51:36.327686 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.280-cip96-59-g4b02e7efb967d%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:51:36.619710 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:51:36.619902 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20230414.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 13:51:41.193440 Using caching service: 'http://localhost/cache/?uri=%s'
11 13:51:41.193635 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.280-cip96-59-g4b02e7efb967d%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 13:51:41.487456 validate duration: 5.46
14 13:51:41.487823 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 13:51:41.487948 start: 1.1 download-retry (timeout 00:10:00) [common]
16 13:51:41.488087 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 13:51:41.488264 Not decompressing ramdisk as can be used compressed.
18 13:51:41.488393 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20230414.0/amd64/initrd.cpio.gz
19 13:51:41.488499 saving as /var/lib/lava/dispatcher/tmp/10062410/tftp-deploy-0zxysv4g/ramdisk/initrd.cpio.gz
20 13:51:41.488604 total size: 6136586 (5MB)
21 13:51:42.211952 progress 0% (0MB)
22 13:51:42.213991 progress 5% (0MB)
23 13:51:42.215728 progress 10% (0MB)
24 13:51:42.217575 progress 15% (0MB)
25 13:51:42.219312 progress 20% (1MB)
26 13:51:42.220996 progress 25% (1MB)
27 13:51:42.222871 progress 30% (1MB)
28 13:51:42.224556 progress 35% (2MB)
29 13:51:42.226219 progress 40% (2MB)
30 13:51:42.228289 progress 45% (2MB)
31 13:51:42.229952 progress 50% (2MB)
32 13:51:42.231770 progress 55% (3MB)
33 13:51:42.233428 progress 60% (3MB)
34 13:51:42.235135 progress 65% (3MB)
35 13:51:42.236939 progress 70% (4MB)
36 13:51:42.238582 progress 75% (4MB)
37 13:51:42.240223 progress 80% (4MB)
38 13:51:42.242041 progress 85% (5MB)
39 13:51:42.243694 progress 90% (5MB)
40 13:51:42.245327 progress 95% (5MB)
41 13:51:42.247182 progress 100% (5MB)
42 13:51:42.247406 5MB downloaded in 0.76s (7.71MB/s)
43 13:51:42.247584 end: 1.1.1 http-download (duration 00:00:01) [common]
45 13:51:42.247952 end: 1.1 download-retry (duration 00:00:01) [common]
46 13:51:42.248085 start: 1.2 download-retry (timeout 00:09:59) [common]
47 13:51:42.248213 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 13:51:42.248383 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.280-cip96-59-g4b02e7efb967d/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 13:51:42.248487 saving as /var/lib/lava/dispatcher/tmp/10062410/tftp-deploy-0zxysv4g/kernel/bzImage
50 13:51:42.248587 total size: 10854400 (10MB)
51 13:51:42.248687 No compression specified
52 13:51:42.250397 progress 0% (0MB)
53 13:51:42.253490 progress 5% (0MB)
54 13:51:42.256559 progress 10% (1MB)
55 13:51:42.259520 progress 15% (1MB)
56 13:51:42.262562 progress 20% (2MB)
57 13:51:42.265392 progress 25% (2MB)
58 13:51:42.268471 progress 30% (3MB)
59 13:51:42.271381 progress 35% (3MB)
60 13:51:42.274475 progress 40% (4MB)
61 13:51:42.277505 progress 45% (4MB)
62 13:51:42.280326 progress 50% (5MB)
63 13:51:42.283366 progress 55% (5MB)
64 13:51:42.286207 progress 60% (6MB)
65 13:51:42.289248 progress 65% (6MB)
66 13:51:42.292075 progress 70% (7MB)
67 13:51:42.295023 progress 75% (7MB)
68 13:51:42.298127 progress 80% (8MB)
69 13:51:42.301183 progress 85% (8MB)
70 13:51:42.304207 progress 90% (9MB)
71 13:51:42.307138 progress 95% (9MB)
72 13:51:42.310239 progress 100% (10MB)
73 13:51:42.310407 10MB downloaded in 0.06s (167.46MB/s)
74 13:51:42.310605 end: 1.2.1 http-download (duration 00:00:00) [common]
76 13:51:42.311016 end: 1.2 download-retry (duration 00:00:00) [common]
77 13:51:42.311139 start: 1.3 download-retry (timeout 00:09:59) [common]
78 13:51:42.311286 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 13:51:42.311472 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20230414.0/amd64/full.rootfs.tar.xz
80 13:51:42.311568 saving as /var/lib/lava/dispatcher/tmp/10062410/tftp-deploy-0zxysv4g/nfsrootfs/full.rootfs.tar
81 13:51:42.311662 total size: 202709988 (193MB)
82 13:51:42.311753 Using unxz to decompress xz
83 13:51:42.315469 progress 0% (0MB)
84 13:51:42.906735 progress 5% (9MB)
85 13:51:43.453452 progress 10% (19MB)
86 13:51:44.034684 progress 15% (29MB)
87 13:51:44.311233 progress 20% (38MB)
88 13:51:44.853089 progress 25% (48MB)
89 13:51:45.435952 progress 30% (58MB)
90 13:51:46.021425 progress 35% (67MB)
91 13:51:46.602343 progress 40% (77MB)
92 13:51:47.194864 progress 45% (87MB)
93 13:51:47.810059 progress 50% (96MB)
94 13:51:48.433900 progress 55% (106MB)
95 13:51:49.122035 progress 60% (116MB)
96 13:51:49.542015 progress 65% (125MB)
97 13:51:49.635866 progress 70% (135MB)
98 13:51:49.787024 progress 75% (145MB)
99 13:51:49.885944 progress 80% (154MB)
100 13:51:49.939001 progress 85% (164MB)
101 13:51:50.032575 progress 90% (174MB)
102 13:51:50.407775 progress 95% (183MB)
103 13:51:51.016863 progress 100% (193MB)
104 13:51:51.022022 193MB downloaded in 8.71s (22.19MB/s)
105 13:51:51.022318 end: 1.3.1 http-download (duration 00:00:09) [common]
107 13:51:51.022593 end: 1.3 download-retry (duration 00:00:09) [common]
108 13:51:51.022687 start: 1.4 download-retry (timeout 00:09:50) [common]
109 13:51:51.022782 start: 1.4.1 http-download (timeout 00:09:50) [common]
110 13:51:51.022920 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.280-cip96-59-g4b02e7efb967d/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 13:51:51.022997 saving as /var/lib/lava/dispatcher/tmp/10062410/tftp-deploy-0zxysv4g/modules/modules.tar
112 13:51:51.023098 total size: 483736 (0MB)
113 13:51:51.023207 Using unxz to decompress xz
114 13:51:51.026510 progress 6% (0MB)
115 13:51:51.026912 progress 13% (0MB)
116 13:51:51.027156 progress 20% (0MB)
117 13:51:51.028527 progress 27% (0MB)
118 13:51:51.030610 progress 33% (0MB)
119 13:51:51.032689 progress 40% (0MB)
120 13:51:51.034529 progress 47% (0MB)
121 13:51:51.036707 progress 54% (0MB)
122 13:51:51.038670 progress 60% (0MB)
123 13:51:51.040733 progress 67% (0MB)
124 13:51:51.042684 progress 74% (0MB)
125 13:51:51.044650 progress 81% (0MB)
126 13:51:51.046667 progress 88% (0MB)
127 13:51:51.049218 progress 94% (0MB)
128 13:51:51.051554 progress 100% (0MB)
129 13:51:51.058409 0MB downloaded in 0.04s (13.07MB/s)
130 13:51:51.058700 end: 1.4.1 http-download (duration 00:00:00) [common]
132 13:51:51.059132 end: 1.4 download-retry (duration 00:00:00) [common]
133 13:51:51.059289 start: 1.5 prepare-tftp-overlay (timeout 00:09:50) [common]
134 13:51:51.059433 start: 1.5.1 extract-nfsrootfs (timeout 00:09:50) [common]
135 13:51:53.532021 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10062410/extract-nfsrootfs-9mequpry
136 13:51:53.532238 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
137 13:51:53.532352 start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
138 13:51:53.532521 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10062410/lava-overlay-2eip_02f
139 13:51:53.532651 makedir: /var/lib/lava/dispatcher/tmp/10062410/lava-overlay-2eip_02f/lava-10062410/bin
140 13:51:53.532755 makedir: /var/lib/lava/dispatcher/tmp/10062410/lava-overlay-2eip_02f/lava-10062410/tests
141 13:51:53.532853 makedir: /var/lib/lava/dispatcher/tmp/10062410/lava-overlay-2eip_02f/lava-10062410/results
142 13:51:53.532958 Creating /var/lib/lava/dispatcher/tmp/10062410/lava-overlay-2eip_02f/lava-10062410/bin/lava-add-keys
143 13:51:53.533098 Creating /var/lib/lava/dispatcher/tmp/10062410/lava-overlay-2eip_02f/lava-10062410/bin/lava-add-sources
144 13:51:53.533224 Creating /var/lib/lava/dispatcher/tmp/10062410/lava-overlay-2eip_02f/lava-10062410/bin/lava-background-process-start
145 13:51:53.533349 Creating /var/lib/lava/dispatcher/tmp/10062410/lava-overlay-2eip_02f/lava-10062410/bin/lava-background-process-stop
146 13:51:53.533471 Creating /var/lib/lava/dispatcher/tmp/10062410/lava-overlay-2eip_02f/lava-10062410/bin/lava-common-functions
147 13:51:53.533592 Creating /var/lib/lava/dispatcher/tmp/10062410/lava-overlay-2eip_02f/lava-10062410/bin/lava-echo-ipv4
148 13:51:53.533712 Creating /var/lib/lava/dispatcher/tmp/10062410/lava-overlay-2eip_02f/lava-10062410/bin/lava-install-packages
149 13:51:53.533832 Creating /var/lib/lava/dispatcher/tmp/10062410/lava-overlay-2eip_02f/lava-10062410/bin/lava-installed-packages
150 13:51:53.533951 Creating /var/lib/lava/dispatcher/tmp/10062410/lava-overlay-2eip_02f/lava-10062410/bin/lava-os-build
151 13:51:53.534073 Creating /var/lib/lava/dispatcher/tmp/10062410/lava-overlay-2eip_02f/lava-10062410/bin/lava-probe-channel
152 13:51:53.534192 Creating /var/lib/lava/dispatcher/tmp/10062410/lava-overlay-2eip_02f/lava-10062410/bin/lava-probe-ip
153 13:51:53.534310 Creating /var/lib/lava/dispatcher/tmp/10062410/lava-overlay-2eip_02f/lava-10062410/bin/lava-target-ip
154 13:51:53.534429 Creating /var/lib/lava/dispatcher/tmp/10062410/lava-overlay-2eip_02f/lava-10062410/bin/lava-target-mac
155 13:51:53.534550 Creating /var/lib/lava/dispatcher/tmp/10062410/lava-overlay-2eip_02f/lava-10062410/bin/lava-target-storage
156 13:51:53.534673 Creating /var/lib/lava/dispatcher/tmp/10062410/lava-overlay-2eip_02f/lava-10062410/bin/lava-test-case
157 13:51:53.534795 Creating /var/lib/lava/dispatcher/tmp/10062410/lava-overlay-2eip_02f/lava-10062410/bin/lava-test-event
158 13:51:53.534913 Creating /var/lib/lava/dispatcher/tmp/10062410/lava-overlay-2eip_02f/lava-10062410/bin/lava-test-feedback
159 13:51:53.535036 Creating /var/lib/lava/dispatcher/tmp/10062410/lava-overlay-2eip_02f/lava-10062410/bin/lava-test-raise
160 13:51:53.535154 Creating /var/lib/lava/dispatcher/tmp/10062410/lava-overlay-2eip_02f/lava-10062410/bin/lava-test-reference
161 13:51:53.535277 Creating /var/lib/lava/dispatcher/tmp/10062410/lava-overlay-2eip_02f/lava-10062410/bin/lava-test-runner
162 13:51:53.535396 Creating /var/lib/lava/dispatcher/tmp/10062410/lava-overlay-2eip_02f/lava-10062410/bin/lava-test-set
163 13:51:53.535515 Creating /var/lib/lava/dispatcher/tmp/10062410/lava-overlay-2eip_02f/lava-10062410/bin/lava-test-shell
164 13:51:53.535635 Updating /var/lib/lava/dispatcher/tmp/10062410/lava-overlay-2eip_02f/lava-10062410/bin/lava-add-keys (debian)
165 13:51:53.535773 Updating /var/lib/lava/dispatcher/tmp/10062410/lava-overlay-2eip_02f/lava-10062410/bin/lava-add-sources (debian)
166 13:51:53.535917 Updating /var/lib/lava/dispatcher/tmp/10062410/lava-overlay-2eip_02f/lava-10062410/bin/lava-install-packages (debian)
167 13:51:53.536057 Updating /var/lib/lava/dispatcher/tmp/10062410/lava-overlay-2eip_02f/lava-10062410/bin/lava-installed-packages (debian)
168 13:51:53.536190 Updating /var/lib/lava/dispatcher/tmp/10062410/lava-overlay-2eip_02f/lava-10062410/bin/lava-os-build (debian)
169 13:51:53.536312 Creating /var/lib/lava/dispatcher/tmp/10062410/lava-overlay-2eip_02f/lava-10062410/environment
170 13:51:53.536411 LAVA metadata
171 13:51:53.536483 - LAVA_JOB_ID=10062410
172 13:51:53.536547 - LAVA_DISPATCHER_IP=192.168.201.1
173 13:51:53.536647 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
174 13:51:53.536714 skipped lava-vland-overlay
175 13:51:53.536789 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
176 13:51:53.536869 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
177 13:51:53.536931 skipped lava-multinode-overlay
178 13:51:53.537003 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
179 13:51:53.537081 start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
180 13:51:53.537154 Loading test definitions
181 13:51:53.537240 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:48) [common]
182 13:51:53.537310 Using /lava-10062410 at stage 0
183 13:51:53.537588 uuid=10062410_1.5.2.3.1 testdef=None
184 13:51:53.537678 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
185 13:51:53.537763 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
186 13:51:53.538211 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
188 13:51:53.538435 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
189 13:51:53.538993 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
191 13:51:53.539231 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
192 13:51:53.539775 runner path: /var/lib/lava/dispatcher/tmp/10062410/lava-overlay-2eip_02f/lava-10062410/0/tests/0_timesync-off test_uuid 10062410_1.5.2.3.1
193 13:51:53.539928 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
195 13:51:53.540160 start: 1.5.2.3.5 git-repo-action (timeout 00:09:48) [common]
196 13:51:53.540233 Using /lava-10062410 at stage 0
197 13:51:53.540329 Fetching tests from https://github.com/kernelci/test-definitions.git
198 13:51:53.540406 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/10062410/lava-overlay-2eip_02f/lava-10062410/0/tests/1_kselftest-alsa'
199 13:52:02.237718 Running '/usr/bin/git checkout kernelci.org
200 13:52:02.389825 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/10062410/lava-overlay-2eip_02f/lava-10062410/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
201 13:52:02.390557 uuid=10062410_1.5.2.3.5 testdef=None
202 13:52:02.390772 end: 1.5.2.3.5 git-repo-action (duration 00:00:09) [common]
204 13:52:02.391087 start: 1.5.2.3.6 test-overlay (timeout 00:09:39) [common]
205 13:52:02.391882 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
207 13:52:02.392151 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:39) [common]
208 13:52:02.393126 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
210 13:52:02.393369 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:39) [common]
211 13:52:02.394468 runner path: /var/lib/lava/dispatcher/tmp/10062410/lava-overlay-2eip_02f/lava-10062410/0/tests/1_kselftest-alsa test_uuid 10062410_1.5.2.3.5
212 13:52:02.394564 BOARD='asus-cx9400-volteer'
213 13:52:02.394631 BRANCH='cip-gitlab'
214 13:52:02.394692 SKIPFILE='/dev/null'
215 13:52:02.394757 SKIP_INSTALL='True'
216 13:52:02.394816 TESTPROG_URL='None'
217 13:52:02.394873 TST_CASENAME=''
218 13:52:02.394930 TST_CMDFILES='alsa'
219 13:52:02.395079 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
221 13:52:02.395388 Creating lava-test-runner.conf files
222 13:52:02.395455 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10062410/lava-overlay-2eip_02f/lava-10062410/0 for stage 0
223 13:52:02.395549 - 0_timesync-off
224 13:52:02.395616 - 1_kselftest-alsa
225 13:52:02.395713 end: 1.5.2.3 test-definition (duration 00:00:09) [common]
226 13:52:02.395800 start: 1.5.2.4 compress-overlay (timeout 00:09:39) [common]
227 13:52:10.069358 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
228 13:52:10.069524 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:31) [common]
229 13:52:10.069620 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
230 13:52:10.069723 end: 1.5.2 lava-overlay (duration 00:00:17) [common]
231 13:52:10.069817 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:31) [common]
232 13:52:10.223924 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
233 13:52:10.224309 start: 1.5.4 extract-modules (timeout 00:09:31) [common]
234 13:52:10.224420 extracting modules file /var/lib/lava/dispatcher/tmp/10062410/tftp-deploy-0zxysv4g/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10062410/extract-nfsrootfs-9mequpry
235 13:52:10.239024 extracting modules file /var/lib/lava/dispatcher/tmp/10062410/tftp-deploy-0zxysv4g/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10062410/extract-overlay-ramdisk-xldrw1yk/ramdisk
236 13:52:10.252019 end: 1.5.4 extract-modules (duration 00:00:00) [common]
237 13:52:10.252170 start: 1.5.5 apply-overlay-tftp (timeout 00:09:31) [common]
238 13:52:10.252268 [common] Applying overlay to NFS
239 13:52:10.252345 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10062410/compress-overlay-3jo_gsqq/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10062410/extract-nfsrootfs-9mequpry
240 13:52:11.145275 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
241 13:52:11.145486 start: 1.5.6 configure-preseed-file (timeout 00:09:30) [common]
242 13:52:11.145618 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
243 13:52:11.145742 start: 1.5.7 compress-ramdisk (timeout 00:09:30) [common]
244 13:52:11.145864 Building ramdisk /var/lib/lava/dispatcher/tmp/10062410/extract-overlay-ramdisk-xldrw1yk/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10062410/extract-overlay-ramdisk-xldrw1yk/ramdisk
245 13:52:11.225749 >> 34850 blocks
246 13:52:11.919118 rename /var/lib/lava/dispatcher/tmp/10062410/extract-overlay-ramdisk-xldrw1yk/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10062410/tftp-deploy-0zxysv4g/ramdisk/ramdisk.cpio.gz
247 13:52:11.919607 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
248 13:52:11.919737 start: 1.5.8 prepare-kernel (timeout 00:09:30) [common]
249 13:52:11.919874 start: 1.5.8.1 prepare-fit (timeout 00:09:30) [common]
250 13:52:11.920031 No mkimage arch provided, not using FIT.
251 13:52:11.920169 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
252 13:52:11.920258 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
253 13:52:11.920368 end: 1.5 prepare-tftp-overlay (duration 00:00:21) [common]
254 13:52:11.920516 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:30) [common]
255 13:52:11.920643 No LXC device requested
256 13:52:11.920748 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 13:52:11.920910 start: 1.7 deploy-device-env (timeout 00:09:30) [common]
258 13:52:11.921020 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 13:52:11.921110 Checking files for TFTP limit of 4294967296 bytes.
260 13:52:11.921666 end: 1 tftp-deploy (duration 00:00:30) [common]
261 13:52:11.921791 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 13:52:11.921891 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 13:52:11.922039 substitutions:
264 13:52:11.922117 - {DTB}: None
265 13:52:11.922190 - {INITRD}: 10062410/tftp-deploy-0zxysv4g/ramdisk/ramdisk.cpio.gz
266 13:52:11.922254 - {KERNEL}: 10062410/tftp-deploy-0zxysv4g/kernel/bzImage
267 13:52:11.922343 - {LAVA_MAC}: None
268 13:52:11.922416 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10062410/extract-nfsrootfs-9mequpry
269 13:52:11.922514 - {NFS_SERVER_IP}: 192.168.201.1
270 13:52:11.922589 - {PRESEED_CONFIG}: None
271 13:52:11.922646 - {PRESEED_LOCAL}: None
272 13:52:11.922703 - {RAMDISK}: 10062410/tftp-deploy-0zxysv4g/ramdisk/ramdisk.cpio.gz
273 13:52:11.922767 - {ROOT_PART}: None
274 13:52:11.922825 - {ROOT}: None
275 13:52:11.922897 - {SERVER_IP}: 192.168.201.1
276 13:52:11.923003 - {TEE}: None
277 13:52:11.923093 Parsed boot commands:
278 13:52:11.923183 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
279 13:52:11.923409 Parsed boot commands: tftpboot 192.168.201.1 10062410/tftp-deploy-0zxysv4g/kernel/bzImage 10062410/tftp-deploy-0zxysv4g/kernel/cmdline 10062410/tftp-deploy-0zxysv4g/ramdisk/ramdisk.cpio.gz
280 13:52:11.923509 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
281 13:52:11.923602 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
282 13:52:11.923695 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
283 13:52:11.923794 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
284 13:52:11.923869 Not connected, no need to disconnect.
285 13:52:11.923949 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
286 13:52:11.924056 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
287 13:52:11.924130 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-12'
288 13:52:11.927416 Setting prompt string to ['lava-test: # ']
289 13:52:11.927807 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
290 13:52:11.927940 end: 2.2.1 reset-connection (duration 00:00:00) [common]
291 13:52:11.928088 start: 2.2.2 reset-device (timeout 00:05:00) [common]
292 13:52:11.928221 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
293 13:52:11.928460 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-12' '--port=1' '--command=reboot'
294 13:52:17.061933 >> Command sent successfully.
295 13:52:17.064434 Returned 0 in 5 seconds
296 13:52:17.165208 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
298 13:52:17.165561 end: 2.2.2 reset-device (duration 00:00:05) [common]
299 13:52:17.165675 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
300 13:52:17.165769 Setting prompt string to 'Starting depthcharge on Voema...'
301 13:52:17.165840 Changing prompt to 'Starting depthcharge on Voema...'
302 13:52:17.165918 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
303 13:52:17.166185 [Enter `^Ec?' for help]
304 13:52:18.729121
305 13:52:18.729300
306 13:52:18.738777 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
307 13:52:18.741805 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
308 13:52:18.748368 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
309 13:52:18.752579 CPU: AES supported, TXT NOT supported, VT supported
310 13:52:18.759447 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
311 13:52:18.763032 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
312 13:52:18.769332 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
313 13:52:18.772537 VBOOT: Loading verstage.
314 13:52:18.775744 FMAP: Found "FLASH" version 1.1 at 0x1804000.
315 13:52:18.782643 FMAP: base = 0x0 size = 0x2000000 #areas = 32
316 13:52:18.785930 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
317 13:52:18.795784 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
318 13:52:18.802637 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
319 13:52:18.802770
320 13:52:18.802883
321 13:52:18.812838 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
322 13:52:18.829262 Probing TPM: . done!
323 13:52:18.832537 TPM ready after 0 ms
324 13:52:18.835671 Connected to device vid:did:rid of 1ae0:0028:00
325 13:52:18.846826 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
326 13:52:18.853542 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
327 13:52:18.857048 Initialized TPM device CR50 revision 0
328 13:52:18.914413 tlcl_send_startup: Startup return code is 0
329 13:52:18.914547 TPM: setup succeeded
330 13:52:18.930144 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
331 13:52:18.944247 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
332 13:52:18.957242 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
333 13:52:18.966824 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
334 13:52:18.971086 Chrome EC: UHEPI supported
335 13:52:18.974169 Phase 1
336 13:52:18.977349 FMAP: area GBB found @ 1805000 (458752 bytes)
337 13:52:18.987266 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
338 13:52:18.994246 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
339 13:52:19.000513 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
340 13:52:19.006924 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
341 13:52:19.010560 Recovery requested (1009000e)
342 13:52:19.014022 TPM: Extending digest for VBOOT: boot mode into PCR 0
343 13:52:19.025478 tlcl_extend: response is 0
344 13:52:19.032122 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
345 13:52:19.042099 tlcl_extend: response is 0
346 13:52:19.048397 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
347 13:52:19.055025 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
348 13:52:19.061904 BS: verstage times (exec / console): total (unknown) / 142 ms
349 13:52:19.062023
350 13:52:19.062124
351 13:52:19.075160 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
352 13:52:19.081740 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
353 13:52:19.084818 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
354 13:52:19.088444 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
355 13:52:19.094726 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
356 13:52:19.098451 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
357 13:52:19.101542 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
358 13:52:19.104612 TCO_STS: 0000 0000
359 13:52:19.108245 GEN_PMCON: d0015038 00002200
360 13:52:19.111449 GBLRST_CAUSE: 00000000 00000000
361 13:52:19.114617 HPR_CAUSE0: 00000000
362 13:52:19.114706 prev_sleep_state 5
363 13:52:19.117998 Boot Count incremented to 16896
364 13:52:19.124596 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
365 13:52:19.131112 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
366 13:52:19.141312 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
367 13:52:19.147710 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
368 13:52:19.151053 Chrome EC: UHEPI supported
369 13:52:19.157523 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
370 13:52:19.168750 Probing TPM: done!
371 13:52:19.175212 Connected to device vid:did:rid of 1ae0:0028:00
372 13:52:19.185334 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
373 13:52:19.188428 Initialized TPM device CR50 revision 0
374 13:52:19.203712 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
375 13:52:19.210562 MRC: Hash idx 0x100b comparison successful.
376 13:52:19.213789 MRC cache found, size faa8
377 13:52:19.213875 bootmode is set to: 2
378 13:52:19.216949 SPD index = 2
379 13:52:19.223214 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
380 13:52:19.226853 SPD: module type is LPDDR4X
381 13:52:19.230172 SPD: module part number is MT53D1G64D4NW-046
382 13:52:19.236418 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
383 13:52:19.243596 SPD: device width 16 bits, bus width 16 bits
384 13:52:19.247278 SPD: module size is 2048 MB (per channel)
385 13:52:19.677207 CBMEM:
386 13:52:19.680169 IMD: root @ 0x76fff000 254 entries.
387 13:52:19.683772 IMD: root @ 0x76ffec00 62 entries.
388 13:52:19.686915 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
389 13:52:19.693797 FMAP: area RW_VPD found @ f35000 (8192 bytes)
390 13:52:19.696923 External stage cache:
391 13:52:19.700045 IMD: root @ 0x7b3ff000 254 entries.
392 13:52:19.703464 IMD: root @ 0x7b3fec00 62 entries.
393 13:52:19.718240 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
394 13:52:19.725164 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
395 13:52:19.731353 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
396 13:52:19.745350 MRC: 'RECOVERY_MRC_CACHE' does not need update.
397 13:52:19.752073 cse_lite: Skip switching to RW in the recovery path
398 13:52:19.752200 8 DIMMs found
399 13:52:19.752314 SMM Memory Map
400 13:52:19.758342 SMRAM : 0x7b000000 0x800000
401 13:52:19.761624 Subregion 0: 0x7b000000 0x200000
402 13:52:19.765134 Subregion 1: 0x7b200000 0x200000
403 13:52:19.768724 Subregion 2: 0x7b400000 0x400000
404 13:52:19.768836 top_of_ram = 0x77000000
405 13:52:19.775353 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
406 13:52:19.781966 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
407 13:52:19.784908 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
408 13:52:19.791815 MTRR Range: Start=ff000000 End=0 (Size 1000000)
409 13:52:19.798247 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
410 13:52:19.805000 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
411 13:52:19.814681 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
412 13:52:19.821287 Processing 211 relocs. Offset value of 0x74c0b000
413 13:52:19.828453 BS: romstage times (exec / console): total (unknown) / 277 ms
414 13:52:19.833745
415 13:52:19.833868
416 13:52:19.843490 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
417 13:52:19.847181 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
418 13:52:19.857025 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
419 13:52:19.863403 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
420 13:52:19.870123 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
421 13:52:19.876804 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
422 13:52:19.920471 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
423 13:52:19.927093 Processing 5008 relocs. Offset value of 0x75d98000
424 13:52:19.930680 BS: postcar times (exec / console): total (unknown) / 59 ms
425 13:52:19.933666
426 13:52:19.933781
427 13:52:19.943527 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
428 13:52:19.943632 Normal boot
429 13:52:19.946787 FW_CONFIG value is 0x804c02
430 13:52:19.950135 PCI: 00:07.0 disabled by fw_config
431 13:52:19.953617 PCI: 00:07.1 disabled by fw_config
432 13:52:19.956851 PCI: 00:0d.2 disabled by fw_config
433 13:52:19.963467 PCI: 00:1c.7 disabled by fw_config
434 13:52:19.966689 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
435 13:52:19.973520 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
436 13:52:19.976980 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
437 13:52:19.983405 GENERIC: 0.0 disabled by fw_config
438 13:52:19.987129 GENERIC: 1.0 disabled by fw_config
439 13:52:19.990321 fw_config match found: DB_USB=USB3_ACTIVE
440 13:52:19.993340 fw_config match found: DB_USB=USB3_ACTIVE
441 13:52:19.997090 fw_config match found: DB_USB=USB3_ACTIVE
442 13:52:20.003489 fw_config match found: DB_USB=USB3_ACTIVE
443 13:52:20.007030 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
444 13:52:20.013563 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
445 13:52:20.023304 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
446 13:52:20.030045 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
447 13:52:20.033571 microcode: sig=0x806c1 pf=0x80 revision=0x86
448 13:52:20.040599 microcode: Update skipped, already up-to-date
449 13:52:20.047183 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
450 13:52:20.074458 Detected 4 core, 8 thread CPU.
451 13:52:20.077659 Setting up SMI for CPU
452 13:52:20.080702 IED base = 0x7b400000
453 13:52:20.083917 IED size = 0x00400000
454 13:52:20.084066 Will perform SMM setup.
455 13:52:20.090841 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
456 13:52:20.097323 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
457 13:52:20.103812 Processing 16 relocs. Offset value of 0x00030000
458 13:52:20.107468 Attempting to start 7 APs
459 13:52:20.110189 Waiting for 10ms after sending INIT.
460 13:52:20.126361 Waiting for 1st SIPI to complete...AP: slot 6 apic_id 1.
461 13:52:20.126449 done.
462 13:52:20.129527 AP: slot 7 apic_id 2.
463 13:52:20.132659 AP: slot 2 apic_id 3.
464 13:52:20.132745 AP: slot 3 apic_id 6.
465 13:52:20.136192 AP: slot 4 apic_id 7.
466 13:52:20.139402 AP: slot 1 apic_id 5.
467 13:52:20.142963 Waiting for 2nd SIPI to complete...done.
468 13:52:20.146110 AP: slot 5 apic_id 4.
469 13:52:20.152823 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
470 13:52:20.159073 Processing 13 relocs. Offset value of 0x00038000
471 13:52:20.162570 Unable to locate Global NVS
472 13:52:20.169134 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
473 13:52:20.172677 Installing permanent SMM handler to 0x7b000000
474 13:52:20.182122 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
475 13:52:20.185740 Processing 794 relocs. Offset value of 0x7b010000
476 13:52:20.195329 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
477 13:52:20.198882 Processing 13 relocs. Offset value of 0x7b008000
478 13:52:20.205257 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
479 13:52:20.212189 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
480 13:52:20.218589 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
481 13:52:20.222274 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
482 13:52:20.228533 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
483 13:52:20.235201 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
484 13:52:20.241899 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
485 13:52:20.245317 Unable to locate Global NVS
486 13:52:20.251919 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
487 13:52:20.255039 Clearing SMI status registers
488 13:52:20.258141 SMI_STS: PM1
489 13:52:20.258218 PM1_STS: PWRBTN
490 13:52:20.264780 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
491 13:52:20.268214 In relocation handler: CPU 0
492 13:52:20.271550 New SMBASE=0x7b000000 IEDBASE=0x7b400000
493 13:52:20.278102 Writing SMRR. base = 0x7b000006, mask=0xff800c00
494 13:52:20.281473 Relocation complete.
495 13:52:20.288040 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
496 13:52:20.291173 In relocation handler: CPU 6
497 13:52:20.294330 New SMBASE=0x7affe800 IEDBASE=0x7b400000
498 13:52:20.297609 Relocation complete.
499 13:52:20.304137 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
500 13:52:20.307440 In relocation handler: CPU 7
501 13:52:20.310712 New SMBASE=0x7affe400 IEDBASE=0x7b400000
502 13:52:20.313936 Writing SMRR. base = 0x7b000006, mask=0xff800c00
503 13:52:20.317673 Relocation complete.
504 13:52:20.323991 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
505 13:52:20.327530 In relocation handler: CPU 2
506 13:52:20.330789 New SMBASE=0x7afff800 IEDBASE=0x7b400000
507 13:52:20.333945 Relocation complete.
508 13:52:20.340890 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
509 13:52:20.343890 In relocation handler: CPU 3
510 13:52:20.347487 New SMBASE=0x7afff400 IEDBASE=0x7b400000
511 13:52:20.353738 Writing SMRR. base = 0x7b000006, mask=0xff800c00
512 13:52:20.357037 Relocation complete.
513 13:52:20.363597 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
514 13:52:20.367066 In relocation handler: CPU 4
515 13:52:20.370266 New SMBASE=0x7afff000 IEDBASE=0x7b400000
516 13:52:20.373872 Relocation complete.
517 13:52:20.380253 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
518 13:52:20.383372 In relocation handler: CPU 5
519 13:52:20.387176 New SMBASE=0x7affec00 IEDBASE=0x7b400000
520 13:52:20.390179 Writing SMRR. base = 0x7b000006, mask=0xff800c00
521 13:52:20.393647 Relocation complete.
522 13:52:20.399911 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
523 13:52:20.403228 In relocation handler: CPU 1
524 13:52:20.406703 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
525 13:52:20.410271 Relocation complete.
526 13:52:20.413373 Initializing CPU #0
527 13:52:20.416633 CPU: vendor Intel device 806c1
528 13:52:20.420024 CPU: family 06, model 8c, stepping 01
529 13:52:20.423122 Clearing out pending MCEs
530 13:52:20.423231 Setting up local APIC...
531 13:52:20.426861 apic_id: 0x00 done.
532 13:52:20.430006 Turbo is available but hidden
533 13:52:20.433123 Turbo is available and visible
534 13:52:20.436805 microcode: Update skipped, already up-to-date
535 13:52:20.439971 CPU #0 initialized
536 13:52:20.443114 Initializing CPU #5
537 13:52:20.443233 Initializing CPU #1
538 13:52:20.446311 CPU: vendor Intel device 806c1
539 13:52:20.449899 CPU: family 06, model 8c, stepping 01
540 13:52:20.453188 CPU: vendor Intel device 806c1
541 13:52:20.456255 CPU: family 06, model 8c, stepping 01
542 13:52:20.459670 Clearing out pending MCEs
543 13:52:20.462895 Clearing out pending MCEs
544 13:52:20.465980 Setting up local APIC...
545 13:52:20.466085 Initializing CPU #4
546 13:52:20.469566 Initializing CPU #3
547 13:52:20.472969 CPU: vendor Intel device 806c1
548 13:52:20.476062 CPU: family 06, model 8c, stepping 01
549 13:52:20.479713 CPU: vendor Intel device 806c1
550 13:52:20.482605 CPU: family 06, model 8c, stepping 01
551 13:52:20.486254 Clearing out pending MCEs
552 13:52:20.489802 Clearing out pending MCEs
553 13:52:20.489916 Setting up local APIC...
554 13:52:20.493595 apic_id: 0x04 done.
555 13:52:20.497180 Setting up local APIC...
556 13:52:20.497264 Initializing CPU #7
557 13:52:20.500836 Initializing CPU #2
558 13:52:20.503952 CPU: vendor Intel device 806c1
559 13:52:20.507077 CPU: family 06, model 8c, stepping 01
560 13:52:20.510741 apic_id: 0x05 done.
561 13:52:20.514018 microcode: Update skipped, already up-to-date
562 13:52:20.517453 microcode: Update skipped, already up-to-date
563 13:52:20.520576 CPU #5 initialized
564 13:52:20.520694 CPU #1 initialized
565 13:52:20.523753 Setting up local APIC...
566 13:52:20.526982 Initializing CPU #6
567 13:52:20.530649 Clearing out pending MCEs
568 13:52:20.533779 CPU: vendor Intel device 806c1
569 13:52:20.537153 CPU: family 06, model 8c, stepping 01
570 13:52:20.540230 Setting up local APIC...
571 13:52:20.540338 apic_id: 0x07 done.
572 13:52:20.543766 apic_id: 0x06 done.
573 13:52:20.547037 microcode: Update skipped, already up-to-date
574 13:52:20.550225 CPU: vendor Intel device 806c1
575 13:52:20.553624 CPU: family 06, model 8c, stepping 01
576 13:52:20.556783 apic_id: 0x02 done.
577 13:52:20.560113 Clearing out pending MCEs
578 13:52:20.563240 microcode: Update skipped, already up-to-date
579 13:52:20.566904 Setting up local APIC...
580 13:52:20.567015 CPU #7 initialized
581 13:52:20.570382 apic_id: 0x03 done.
582 13:52:20.573239 Clearing out pending MCEs
583 13:52:20.576768 microcode: Update skipped, already up-to-date
584 13:52:20.580243 CPU #4 initialized
585 13:52:20.580322 CPU #3 initialized
586 13:52:20.586862 microcode: Update skipped, already up-to-date
587 13:52:20.589951 Setting up local APIC...
588 13:52:20.590070 CPU #2 initialized
589 13:52:20.593472 apic_id: 0x01 done.
590 13:52:20.596691 microcode: Update skipped, already up-to-date
591 13:52:20.599689 CPU #6 initialized
592 13:52:20.603562 bsp_do_flight_plan done after 456 msecs.
593 13:52:20.606443 CPU: frequency set to 4400 MHz
594 13:52:20.610232 Enabling SMIs.
595 13:52:20.616259 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
596 13:52:20.630899 SATAXPCIE1 indicates PCIe NVMe is present
597 13:52:20.634127 Probing TPM: done!
598 13:52:20.637342 Connected to device vid:did:rid of 1ae0:0028:00
599 13:52:20.648508 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
600 13:52:20.651727 Initialized TPM device CR50 revision 0
601 13:52:20.654752 Enabling S0i3.4
602 13:52:20.661556 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
603 13:52:20.664853 Found a VBT of 8704 bytes after decompression
604 13:52:20.671653 cse_lite: CSE RO boot. HybridStorageMode disabled
605 13:52:20.678230 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
606 13:52:20.752971 FSPS returned 0
607 13:52:20.756648 Executing Phase 1 of FspMultiPhaseSiInit
608 13:52:20.766427 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
609 13:52:20.769436 port C0 DISC req: usage 1 usb3 1 usb2 5
610 13:52:20.773236 Raw Buffer output 0 00000511
611 13:52:20.776341 Raw Buffer output 1 00000000
612 13:52:20.779985 pmc_send_ipc_cmd succeeded
613 13:52:20.786992 port C1 DISC req: usage 1 usb3 2 usb2 3
614 13:52:20.787081 Raw Buffer output 0 00000321
615 13:52:20.790080 Raw Buffer output 1 00000000
616 13:52:20.794119 pmc_send_ipc_cmd succeeded
617 13:52:20.799274 Detected 4 core, 8 thread CPU.
618 13:52:20.802232 Detected 4 core, 8 thread CPU.
619 13:52:21.003252 Display FSP Version Info HOB
620 13:52:21.006612 Reference Code - CPU = a.0.4c.31
621 13:52:21.009845 uCode Version = 0.0.0.86
622 13:52:21.013278 TXT ACM version = ff.ff.ff.ffff
623 13:52:21.016734 Reference Code - ME = a.0.4c.31
624 13:52:21.019627 MEBx version = 0.0.0.0
625 13:52:21.023058 ME Firmware Version = Consumer SKU
626 13:52:21.026638 Reference Code - PCH = a.0.4c.31
627 13:52:21.029859 PCH-CRID Status = Disabled
628 13:52:21.033068 PCH-CRID Original Value = ff.ff.ff.ffff
629 13:52:21.036657 PCH-CRID New Value = ff.ff.ff.ffff
630 13:52:21.039779 OPROM - RST - RAID = ff.ff.ff.ffff
631 13:52:21.043026 PCH Hsio Version = 4.0.0.0
632 13:52:21.046578 Reference Code - SA - System Agent = a.0.4c.31
633 13:52:21.049847 Reference Code - MRC = 2.0.0.1
634 13:52:21.053172 SA - PCIe Version = a.0.4c.31
635 13:52:21.056719 SA-CRID Status = Disabled
636 13:52:21.059861 SA-CRID Original Value = 0.0.0.1
637 13:52:21.062976 SA-CRID New Value = 0.0.0.1
638 13:52:21.066586 OPROM - VBIOS = ff.ff.ff.ffff
639 13:52:21.070186 IO Manageability Engine FW Version = 11.1.4.0
640 13:52:21.073777 PHY Build Version = 0.0.0.e0
641 13:52:21.077398 Thunderbolt(TM) FW Version = 0.0.0.0
642 13:52:21.084136 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
643 13:52:21.084224 ITSS IRQ Polarities Before:
644 13:52:21.087431 IPC0: 0xffffffff
645 13:52:21.087509 IPC1: 0xffffffff
646 13:52:21.090582 IPC2: 0xffffffff
647 13:52:21.093635 IPC3: 0xffffffff
648 13:52:21.093771 ITSS IRQ Polarities After:
649 13:52:21.097352 IPC0: 0xffffffff
650 13:52:21.097450 IPC1: 0xffffffff
651 13:52:21.100495 IPC2: 0xffffffff
652 13:52:21.103938 IPC3: 0xffffffff
653 13:52:21.106939 Found PCIe Root Port #9 at PCI: 00:1d.0.
654 13:52:21.117105 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
655 13:52:21.130229 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
656 13:52:21.143812 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
657 13:52:21.149966 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
658 13:52:21.150093 Enumerating buses...
659 13:52:21.156846 Show all devs... Before device enumeration.
660 13:52:21.156956 Root Device: enabled 1
661 13:52:21.160052 DOMAIN: 0000: enabled 1
662 13:52:21.163207 CPU_CLUSTER: 0: enabled 1
663 13:52:21.166874 PCI: 00:00.0: enabled 1
664 13:52:21.166980 PCI: 00:02.0: enabled 1
665 13:52:21.170038 PCI: 00:04.0: enabled 1
666 13:52:21.173277 PCI: 00:05.0: enabled 1
667 13:52:21.176460 PCI: 00:06.0: enabled 0
668 13:52:21.176577 PCI: 00:07.0: enabled 0
669 13:52:21.179974 PCI: 00:07.1: enabled 0
670 13:52:21.183073 PCI: 00:07.2: enabled 0
671 13:52:21.183182 PCI: 00:07.3: enabled 0
672 13:52:21.186685 PCI: 00:08.0: enabled 1
673 13:52:21.189925 PCI: 00:09.0: enabled 0
674 13:52:21.193234 PCI: 00:0a.0: enabled 0
675 13:52:21.193351 PCI: 00:0d.0: enabled 1
676 13:52:21.196406 PCI: 00:0d.1: enabled 0
677 13:52:21.199533 PCI: 00:0d.2: enabled 0
678 13:52:21.203148 PCI: 00:0d.3: enabled 0
679 13:52:21.203262 PCI: 00:0e.0: enabled 0
680 13:52:21.206344 PCI: 00:10.2: enabled 1
681 13:52:21.209888 PCI: 00:10.6: enabled 0
682 13:52:21.212934 PCI: 00:10.7: enabled 0
683 13:52:21.213046 PCI: 00:12.0: enabled 0
684 13:52:21.216336 PCI: 00:12.6: enabled 0
685 13:52:21.219798 PCI: 00:13.0: enabled 0
686 13:52:21.223187 PCI: 00:14.0: enabled 1
687 13:52:21.223306 PCI: 00:14.1: enabled 0
688 13:52:21.226183 PCI: 00:14.2: enabled 1
689 13:52:21.229849 PCI: 00:14.3: enabled 1
690 13:52:21.229954 PCI: 00:15.0: enabled 1
691 13:52:21.233312 PCI: 00:15.1: enabled 1
692 13:52:21.236241 PCI: 00:15.2: enabled 1
693 13:52:21.239441 PCI: 00:15.3: enabled 1
694 13:52:21.239550 PCI: 00:16.0: enabled 1
695 13:52:21.242885 PCI: 00:16.1: enabled 0
696 13:52:21.245978 PCI: 00:16.2: enabled 0
697 13:52:21.249648 PCI: 00:16.3: enabled 0
698 13:52:21.249759 PCI: 00:16.4: enabled 0
699 13:52:21.252847 PCI: 00:16.5: enabled 0
700 13:52:21.256090 PCI: 00:17.0: enabled 1
701 13:52:21.259622 PCI: 00:19.0: enabled 0
702 13:52:21.259747 PCI: 00:19.1: enabled 1
703 13:52:21.262857 PCI: 00:19.2: enabled 0
704 13:52:21.265983 PCI: 00:1c.0: enabled 1
705 13:52:21.266109 PCI: 00:1c.1: enabled 0
706 13:52:21.269593 PCI: 00:1c.2: enabled 0
707 13:52:21.272756 PCI: 00:1c.3: enabled 0
708 13:52:21.276002 PCI: 00:1c.4: enabled 0
709 13:52:21.276109 PCI: 00:1c.5: enabled 0
710 13:52:21.279044 PCI: 00:1c.6: enabled 1
711 13:52:21.282821 PCI: 00:1c.7: enabled 0
712 13:52:21.285922 PCI: 00:1d.0: enabled 1
713 13:52:21.286026 PCI: 00:1d.1: enabled 0
714 13:52:21.289403 PCI: 00:1d.2: enabled 1
715 13:52:21.292468 PCI: 00:1d.3: enabled 0
716 13:52:21.295658 PCI: 00:1e.0: enabled 1
717 13:52:21.295738 PCI: 00:1e.1: enabled 0
718 13:52:21.299229 PCI: 00:1e.2: enabled 1
719 13:52:21.302465 PCI: 00:1e.3: enabled 1
720 13:52:21.305781 PCI: 00:1f.0: enabled 1
721 13:52:21.305887 PCI: 00:1f.1: enabled 0
722 13:52:21.308812 PCI: 00:1f.2: enabled 1
723 13:52:21.312212 PCI: 00:1f.3: enabled 1
724 13:52:21.315556 PCI: 00:1f.4: enabled 0
725 13:52:21.315662 PCI: 00:1f.5: enabled 1
726 13:52:21.319013 PCI: 00:1f.6: enabled 0
727 13:52:21.322175 PCI: 00:1f.7: enabled 0
728 13:52:21.322284 APIC: 00: enabled 1
729 13:52:21.325759 GENERIC: 0.0: enabled 1
730 13:52:21.329376 GENERIC: 0.0: enabled 1
731 13:52:21.332318 GENERIC: 1.0: enabled 1
732 13:52:21.332465 GENERIC: 0.0: enabled 1
733 13:52:21.335814 GENERIC: 1.0: enabled 1
734 13:52:21.338738 USB0 port 0: enabled 1
735 13:52:21.338843 GENERIC: 0.0: enabled 1
736 13:52:21.342283 USB0 port 0: enabled 1
737 13:52:21.345340 GENERIC: 0.0: enabled 1
738 13:52:21.349110 I2C: 00:1a: enabled 1
739 13:52:21.349230 I2C: 00:31: enabled 1
740 13:52:21.352232 I2C: 00:32: enabled 1
741 13:52:21.355475 I2C: 00:10: enabled 1
742 13:52:21.355554 I2C: 00:15: enabled 1
743 13:52:21.358691 GENERIC: 0.0: enabled 0
744 13:52:21.361973 GENERIC: 1.0: enabled 0
745 13:52:21.365572 GENERIC: 0.0: enabled 1
746 13:52:21.365675 SPI: 00: enabled 1
747 13:52:21.368848 SPI: 00: enabled 1
748 13:52:21.368964 PNP: 0c09.0: enabled 1
749 13:52:21.372068 GENERIC: 0.0: enabled 1
750 13:52:21.375222 USB3 port 0: enabled 1
751 13:52:21.378229 USB3 port 1: enabled 1
752 13:52:21.378313 USB3 port 2: enabled 0
753 13:52:21.381934 USB3 port 3: enabled 0
754 13:52:21.385051 USB2 port 0: enabled 0
755 13:52:21.385133 USB2 port 1: enabled 1
756 13:52:21.388701 USB2 port 2: enabled 1
757 13:52:21.391697 USB2 port 3: enabled 0
758 13:52:21.395273 USB2 port 4: enabled 1
759 13:52:21.395364 USB2 port 5: enabled 0
760 13:52:21.398372 USB2 port 6: enabled 0
761 13:52:21.401647 USB2 port 7: enabled 0
762 13:52:21.401768 USB2 port 8: enabled 0
763 13:52:21.404820 USB2 port 9: enabled 0
764 13:52:21.408519 USB3 port 0: enabled 0
765 13:52:21.411600 USB3 port 1: enabled 1
766 13:52:21.411712 USB3 port 2: enabled 0
767 13:52:21.414776 USB3 port 3: enabled 0
768 13:52:21.418015 GENERIC: 0.0: enabled 1
769 13:52:21.418093 GENERIC: 1.0: enabled 1
770 13:52:21.421460 APIC: 05: enabled 1
771 13:52:21.424820 APIC: 03: enabled 1
772 13:52:21.424915 APIC: 06: enabled 1
773 13:52:21.428113 APIC: 07: enabled 1
774 13:52:21.431716 APIC: 04: enabled 1
775 13:52:21.431797 APIC: 01: enabled 1
776 13:52:21.434792 APIC: 02: enabled 1
777 13:52:21.434894 Compare with tree...
778 13:52:21.437917 Root Device: enabled 1
779 13:52:21.441459 DOMAIN: 0000: enabled 1
780 13:52:21.444294 PCI: 00:00.0: enabled 1
781 13:52:21.447948 PCI: 00:02.0: enabled 1
782 13:52:21.448035 PCI: 00:04.0: enabled 1
783 13:52:21.450884 GENERIC: 0.0: enabled 1
784 13:52:21.454543 PCI: 00:05.0: enabled 1
785 13:52:21.457712 PCI: 00:06.0: enabled 0
786 13:52:21.461345 PCI: 00:07.0: enabled 0
787 13:52:21.461423 GENERIC: 0.0: enabled 1
788 13:52:21.464660 PCI: 00:07.1: enabled 0
789 13:52:21.467756 GENERIC: 1.0: enabled 1
790 13:52:21.470946 PCI: 00:07.2: enabled 0
791 13:52:21.474112 GENERIC: 0.0: enabled 1
792 13:52:21.474220 PCI: 00:07.3: enabled 0
793 13:52:21.477423 GENERIC: 1.0: enabled 1
794 13:52:21.480849 PCI: 00:08.0: enabled 1
795 13:52:21.484474 PCI: 00:09.0: enabled 0
796 13:52:21.487635 PCI: 00:0a.0: enabled 0
797 13:52:21.487715 PCI: 00:0d.0: enabled 1
798 13:52:21.490565 USB0 port 0: enabled 1
799 13:52:21.494088 USB3 port 0: enabled 1
800 13:52:21.497530 USB3 port 1: enabled 1
801 13:52:21.500773 USB3 port 2: enabled 0
802 13:52:21.503893 USB3 port 3: enabled 0
803 13:52:21.503981 PCI: 00:0d.1: enabled 0
804 13:52:21.507609 PCI: 00:0d.2: enabled 0
805 13:52:21.510835 GENERIC: 0.0: enabled 1
806 13:52:21.514010 PCI: 00:0d.3: enabled 0
807 13:52:21.517143 PCI: 00:0e.0: enabled 0
808 13:52:21.517230 PCI: 00:10.2: enabled 1
809 13:52:21.520757 PCI: 00:10.6: enabled 0
810 13:52:21.523974 PCI: 00:10.7: enabled 0
811 13:52:21.527138 PCI: 00:12.0: enabled 0
812 13:52:21.530602 PCI: 00:12.6: enabled 0
813 13:52:21.530689 PCI: 00:13.0: enabled 0
814 13:52:21.533878 PCI: 00:14.0: enabled 1
815 13:52:21.537508 USB0 port 0: enabled 1
816 13:52:21.540427 USB2 port 0: enabled 0
817 13:52:21.543672 USB2 port 1: enabled 1
818 13:52:21.543792 USB2 port 2: enabled 1
819 13:52:21.547009 USB2 port 3: enabled 0
820 13:52:21.550276 USB2 port 4: enabled 1
821 13:52:21.553656 USB2 port 5: enabled 0
822 13:52:21.556752 USB2 port 6: enabled 0
823 13:52:21.560529 USB2 port 7: enabled 0
824 13:52:21.560637 USB2 port 8: enabled 0
825 13:52:21.563632 USB2 port 9: enabled 0
826 13:52:21.566744 USB3 port 0: enabled 0
827 13:52:21.570001 USB3 port 1: enabled 1
828 13:52:21.573233 USB3 port 2: enabled 0
829 13:52:21.576931 USB3 port 3: enabled 0
830 13:52:21.577036 PCI: 00:14.1: enabled 0
831 13:52:21.580141 PCI: 00:14.2: enabled 1
832 13:52:21.583441 PCI: 00:14.3: enabled 1
833 13:52:21.586817 GENERIC: 0.0: enabled 1
834 13:52:21.589973 PCI: 00:15.0: enabled 1
835 13:52:21.590078 I2C: 00:1a: enabled 1
836 13:52:21.593130 I2C: 00:31: enabled 1
837 13:52:21.596706 I2C: 00:32: enabled 1
838 13:52:21.600307 PCI: 00:15.1: enabled 1
839 13:52:21.600391 I2C: 00:10: enabled 1
840 13:52:21.603279 PCI: 00:15.2: enabled 1
841 13:52:21.606322 PCI: 00:15.3: enabled 1
842 13:52:21.610100 PCI: 00:16.0: enabled 1
843 13:52:21.613305 PCI: 00:16.1: enabled 0
844 13:52:21.613387 PCI: 00:16.2: enabled 0
845 13:52:21.616457 PCI: 00:16.3: enabled 0
846 13:52:21.619589 PCI: 00:16.4: enabled 0
847 13:52:21.623406 PCI: 00:16.5: enabled 0
848 13:52:21.626515 PCI: 00:17.0: enabled 1
849 13:52:21.626594 PCI: 00:19.0: enabled 0
850 13:52:21.629702 PCI: 00:19.1: enabled 1
851 13:52:21.632992 I2C: 00:15: enabled 1
852 13:52:21.636560 PCI: 00:19.2: enabled 0
853 13:52:21.636637 PCI: 00:1d.0: enabled 1
854 13:52:21.639371 GENERIC: 0.0: enabled 1
855 13:52:21.642741 PCI: 00:1e.0: enabled 1
856 13:52:21.646335 PCI: 00:1e.1: enabled 0
857 13:52:21.649551 PCI: 00:1e.2: enabled 1
858 13:52:21.649630 SPI: 00: enabled 1
859 13:52:21.652990 PCI: 00:1e.3: enabled 1
860 13:52:21.656112 SPI: 00: enabled 1
861 13:52:21.659465 PCI: 00:1f.0: enabled 1
862 13:52:21.662513 PNP: 0c09.0: enabled 1
863 13:52:21.662590 PCI: 00:1f.1: enabled 0
864 13:52:21.666019 PCI: 00:1f.2: enabled 1
865 13:52:21.669554 GENERIC: 0.0: enabled 1
866 13:52:21.672771 GENERIC: 0.0: enabled 1
867 13:52:21.675958 GENERIC: 1.0: enabled 1
868 13:52:21.676033 PCI: 00:1f.3: enabled 1
869 13:52:21.679124 PCI: 00:1f.4: enabled 0
870 13:52:21.730906 PCI: 00:1f.5: enabled 1
871 13:52:21.731039 PCI: 00:1f.6: enabled 0
872 13:52:21.731310 PCI: 00:1f.7: enabled 0
873 13:52:21.731386 CPU_CLUSTER: 0: enabled 1
874 13:52:21.731452 APIC: 00: enabled 1
875 13:52:21.731516 APIC: 05: enabled 1
876 13:52:21.731586 APIC: 03: enabled 1
877 13:52:21.731660 APIC: 06: enabled 1
878 13:52:21.731722 APIC: 07: enabled 1
879 13:52:21.731781 APIC: 04: enabled 1
880 13:52:21.731839 APIC: 01: enabled 1
881 13:52:21.731897 APIC: 02: enabled 1
882 13:52:21.731954 Root Device scanning...
883 13:52:21.732011 scan_static_bus for Root Device
884 13:52:21.732076 DOMAIN: 0000 enabled
885 13:52:21.732149 CPU_CLUSTER: 0 enabled
886 13:52:21.732210 DOMAIN: 0000 scanning...
887 13:52:21.732268 PCI: pci_scan_bus for bus 00
888 13:52:21.732325 PCI: 00:00.0 [8086/0000] ops
889 13:52:21.732382 PCI: 00:00.0 [8086/9a12] enabled
890 13:52:21.753709 PCI: 00:02.0 [8086/0000] bus ops
891 13:52:21.754015 PCI: 00:02.0 [8086/9a40] enabled
892 13:52:21.754118 PCI: 00:04.0 [8086/0000] bus ops
893 13:52:21.754214 PCI: 00:04.0 [8086/9a03] enabled
894 13:52:21.754307 PCI: 00:05.0 [8086/9a19] enabled
895 13:52:21.757110 PCI: 00:07.0 [0000/0000] hidden
896 13:52:21.757236 PCI: 00:08.0 [8086/9a11] enabled
897 13:52:21.760310 PCI: 00:0a.0 [8086/9a0d] disabled
898 13:52:21.763872 PCI: 00:0d.0 [8086/0000] bus ops
899 13:52:21.766871 PCI: 00:0d.0 [8086/9a13] enabled
900 13:52:21.770111 PCI: 00:14.0 [8086/0000] bus ops
901 13:52:21.773684 PCI: 00:14.0 [8086/a0ed] enabled
902 13:52:21.776872 PCI: 00:14.2 [8086/a0ef] enabled
903 13:52:21.780264 PCI: 00:14.3 [8086/0000] bus ops
904 13:52:21.783407 PCI: 00:14.3 [8086/a0f0] enabled
905 13:52:21.786528 PCI: 00:15.0 [8086/0000] bus ops
906 13:52:21.790357 PCI: 00:15.0 [8086/a0e8] enabled
907 13:52:21.793427 PCI: 00:15.1 [8086/0000] bus ops
908 13:52:21.797021 PCI: 00:15.1 [8086/a0e9] enabled
909 13:52:21.800195 PCI: 00:15.2 [8086/0000] bus ops
910 13:52:21.803418 PCI: 00:15.2 [8086/a0ea] enabled
911 13:52:21.806789 PCI: 00:15.3 [8086/0000] bus ops
912 13:52:21.810022 PCI: 00:15.3 [8086/a0eb] enabled
913 13:52:21.813177 PCI: 00:16.0 [8086/0000] ops
914 13:52:21.816390 PCI: 00:16.0 [8086/a0e0] enabled
915 13:52:21.820216 PCI: Static device PCI: 00:17.0 not found, disabling it.
916 13:52:21.823246 PCI: 00:19.0 [8086/0000] bus ops
917 13:52:21.826480 PCI: 00:19.0 [8086/a0c5] disabled
918 13:52:21.829708 PCI: 00:19.1 [8086/0000] bus ops
919 13:52:21.832935 PCI: 00:19.1 [8086/a0c6] enabled
920 13:52:21.836162 PCI: 00:1d.0 [8086/0000] bus ops
921 13:52:21.839873 PCI: 00:1d.0 [8086/a0b0] enabled
922 13:52:21.843000 PCI: 00:1e.0 [8086/0000] ops
923 13:52:21.846296 PCI: 00:1e.0 [8086/a0a8] enabled
924 13:52:21.849542 PCI: 00:1e.2 [8086/0000] bus ops
925 13:52:21.853187 PCI: 00:1e.2 [8086/a0aa] enabled
926 13:52:21.856233 PCI: 00:1e.3 [8086/0000] bus ops
927 13:52:21.859528 PCI: 00:1e.3 [8086/a0ab] enabled
928 13:52:21.862839 PCI: 00:1f.0 [8086/0000] bus ops
929 13:52:21.866251 PCI: 00:1f.0 [8086/a087] enabled
930 13:52:21.869589 RTC Init
931 13:52:21.872721 Set power on after power failure.
932 13:52:21.872819 Disabling Deep S3
933 13:52:21.876069 Disabling Deep S3
934 13:52:21.876208 Disabling Deep S4
935 13:52:21.879488 Disabling Deep S4
936 13:52:21.882620 Disabling Deep S5
937 13:52:21.882718 Disabling Deep S5
938 13:52:21.886175 PCI: 00:1f.2 [0000/0000] hidden
939 13:52:21.889187 PCI: 00:1f.3 [8086/0000] bus ops
940 13:52:21.892476 PCI: 00:1f.3 [8086/a0c8] enabled
941 13:52:21.896001 PCI: 00:1f.5 [8086/0000] bus ops
942 13:52:21.899015 PCI: 00:1f.5 [8086/a0a4] enabled
943 13:52:21.902385 PCI: Leftover static devices:
944 13:52:21.905868 PCI: 00:10.2
945 13:52:21.906004 PCI: 00:10.6
946 13:52:21.906136 PCI: 00:10.7
947 13:52:21.909332 PCI: 00:06.0
948 13:52:21.909437 PCI: 00:07.1
949 13:52:21.912468 PCI: 00:07.2
950 13:52:21.912587 PCI: 00:07.3
951 13:52:21.912710 PCI: 00:09.0
952 13:52:21.915733 PCI: 00:0d.1
953 13:52:21.915840 PCI: 00:0d.2
954 13:52:21.918732 PCI: 00:0d.3
955 13:52:21.918866 PCI: 00:0e.0
956 13:52:21.918995 PCI: 00:12.0
957 13:52:21.922488 PCI: 00:12.6
958 13:52:21.922592 PCI: 00:13.0
959 13:52:21.925719 PCI: 00:14.1
960 13:52:21.925830 PCI: 00:16.1
961 13:52:21.928815 PCI: 00:16.2
962 13:52:21.928921 PCI: 00:16.3
963 13:52:21.929015 PCI: 00:16.4
964 13:52:21.932126 PCI: 00:16.5
965 13:52:21.932243 PCI: 00:17.0
966 13:52:21.935422 PCI: 00:19.2
967 13:52:21.935525 PCI: 00:1e.1
968 13:52:21.935634 PCI: 00:1f.1
969 13:52:21.938989 PCI: 00:1f.4
970 13:52:21.939103 PCI: 00:1f.6
971 13:52:21.942191 PCI: 00:1f.7
972 13:52:21.945389 PCI: Check your devicetree.cb.
973 13:52:21.945497 PCI: 00:02.0 scanning...
974 13:52:21.952386 scan_generic_bus for PCI: 00:02.0
975 13:52:21.955479 scan_generic_bus for PCI: 00:02.0 done
976 13:52:21.958626 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
977 13:52:21.961869 PCI: 00:04.0 scanning...
978 13:52:21.965536 scan_generic_bus for PCI: 00:04.0
979 13:52:21.968413 GENERIC: 0.0 enabled
980 13:52:21.971845 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
981 13:52:21.978618 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
982 13:52:21.981640 PCI: 00:0d.0 scanning...
983 13:52:21.985251 scan_static_bus for PCI: 00:0d.0
984 13:52:21.985360 USB0 port 0 enabled
985 13:52:21.988149 USB0 port 0 scanning...
986 13:52:21.991813 scan_static_bus for USB0 port 0
987 13:52:21.994909 USB3 port 0 enabled
988 13:52:21.995011 USB3 port 1 enabled
989 13:52:21.998482 USB3 port 2 disabled
990 13:52:22.001636 USB3 port 3 disabled
991 13:52:22.001715 USB3 port 0 scanning...
992 13:52:22.005382 scan_static_bus for USB3 port 0
993 13:52:22.011631 scan_static_bus for USB3 port 0 done
994 13:52:22.015225 scan_bus: bus USB3 port 0 finished in 6 msecs
995 13:52:22.018399 USB3 port 1 scanning...
996 13:52:22.021614 scan_static_bus for USB3 port 1
997 13:52:22.024893 scan_static_bus for USB3 port 1 done
998 13:52:22.028499 scan_bus: bus USB3 port 1 finished in 6 msecs
999 13:52:22.031508 scan_static_bus for USB0 port 0 done
1000 13:52:22.038244 scan_bus: bus USB0 port 0 finished in 43 msecs
1001 13:52:22.041446 scan_static_bus for PCI: 00:0d.0 done
1002 13:52:22.044605 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
1003 13:52:22.047832 PCI: 00:14.0 scanning...
1004 13:52:22.051145 scan_static_bus for PCI: 00:14.0
1005 13:52:22.054667 USB0 port 0 enabled
1006 13:52:22.057897 USB0 port 0 scanning...
1007 13:52:22.061024 scan_static_bus for USB0 port 0
1008 13:52:22.061130 USB2 port 0 disabled
1009 13:52:22.064269 USB2 port 1 enabled
1010 13:52:22.067957 USB2 port 2 enabled
1011 13:52:22.068058 USB2 port 3 disabled
1012 13:52:22.070934 USB2 port 4 enabled
1013 13:52:22.071035 USB2 port 5 disabled
1014 13:52:22.074223 USB2 port 6 disabled
1015 13:52:22.077621 USB2 port 7 disabled
1016 13:52:22.077723 USB2 port 8 disabled
1017 13:52:22.081336 USB2 port 9 disabled
1018 13:52:22.084388 USB3 port 0 disabled
1019 13:52:22.084463 USB3 port 1 enabled
1020 13:52:22.087398 USB3 port 2 disabled
1021 13:52:22.090680 USB3 port 3 disabled
1022 13:52:22.090803 USB2 port 1 scanning...
1023 13:52:22.094404 scan_static_bus for USB2 port 1
1024 13:52:22.100773 scan_static_bus for USB2 port 1 done
1025 13:52:22.103994 scan_bus: bus USB2 port 1 finished in 6 msecs
1026 13:52:22.107239 USB2 port 2 scanning...
1027 13:52:22.111014 scan_static_bus for USB2 port 2
1028 13:52:22.114226 scan_static_bus for USB2 port 2 done
1029 13:52:22.117351 scan_bus: bus USB2 port 2 finished in 6 msecs
1030 13:52:22.120489 USB2 port 4 scanning...
1031 13:52:22.124174 scan_static_bus for USB2 port 4
1032 13:52:22.127307 scan_static_bus for USB2 port 4 done
1033 13:52:22.133652 scan_bus: bus USB2 port 4 finished in 6 msecs
1034 13:52:22.133762 USB3 port 1 scanning...
1035 13:52:22.137266 scan_static_bus for USB3 port 1
1036 13:52:22.140494 scan_static_bus for USB3 port 1 done
1037 13:52:22.146793 scan_bus: bus USB3 port 1 finished in 6 msecs
1038 13:52:22.149994 scan_static_bus for USB0 port 0 done
1039 13:52:22.153763 scan_bus: bus USB0 port 0 finished in 93 msecs
1040 13:52:22.160034 scan_static_bus for PCI: 00:14.0 done
1041 13:52:22.163194 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1042 13:52:22.166424 PCI: 00:14.3 scanning...
1043 13:52:22.170124 scan_static_bus for PCI: 00:14.3
1044 13:52:22.173283 GENERIC: 0.0 enabled
1045 13:52:22.176420 scan_static_bus for PCI: 00:14.3 done
1046 13:52:22.180134 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1047 13:52:22.183169 PCI: 00:15.0 scanning...
1048 13:52:22.186221 scan_static_bus for PCI: 00:15.0
1049 13:52:22.189641 I2C: 00:1a enabled
1050 13:52:22.189744 I2C: 00:31 enabled
1051 13:52:22.192803 I2C: 00:32 enabled
1052 13:52:22.196317 scan_static_bus for PCI: 00:15.0 done
1053 13:52:22.199839 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1054 13:52:22.202796 PCI: 00:15.1 scanning...
1055 13:52:22.206360 scan_static_bus for PCI: 00:15.1
1056 13:52:22.209525 I2C: 00:10 enabled
1057 13:52:22.212752 scan_static_bus for PCI: 00:15.1 done
1058 13:52:22.215782 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1059 13:52:22.219373 PCI: 00:15.2 scanning...
1060 13:52:22.222458 scan_static_bus for PCI: 00:15.2
1061 13:52:22.225957 scan_static_bus for PCI: 00:15.2 done
1062 13:52:22.232469 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1063 13:52:22.235682 PCI: 00:15.3 scanning...
1064 13:52:22.239333 scan_static_bus for PCI: 00:15.3
1065 13:52:22.242325 scan_static_bus for PCI: 00:15.3 done
1066 13:52:22.245983 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1067 13:52:22.249290 PCI: 00:19.1 scanning...
1068 13:52:22.252370 scan_static_bus for PCI: 00:19.1
1069 13:52:22.255590 I2C: 00:15 enabled
1070 13:52:22.258824 scan_static_bus for PCI: 00:19.1 done
1071 13:52:22.262494 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1072 13:52:22.265564 PCI: 00:1d.0 scanning...
1073 13:52:22.268747 do_pci_scan_bridge for PCI: 00:1d.0
1074 13:52:22.272414 PCI: pci_scan_bus for bus 01
1075 13:52:22.275591 PCI: 01:00.0 [15b7/5009] enabled
1076 13:52:22.278800 GENERIC: 0.0 enabled
1077 13:52:22.281806 Enabling Common Clock Configuration
1078 13:52:22.285434 L1 Sub-State supported from root port 29
1079 13:52:22.288502 L1 Sub-State Support = 0x5
1080 13:52:22.291995 CommonModeRestoreTime = 0x28
1081 13:52:22.295268 Power On Value = 0x16, Power On Scale = 0x0
1082 13:52:22.298483 ASPM: Enabled L1
1083 13:52:22.302211 PCIe: Max_Payload_Size adjusted to 128
1084 13:52:22.305228 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1085 13:52:22.308319 PCI: 00:1e.2 scanning...
1086 13:52:22.311596 scan_generic_bus for PCI: 00:1e.2
1087 13:52:22.314986 SPI: 00 enabled
1088 13:52:22.318796 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1089 13:52:22.325864 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1090 13:52:22.328927 PCI: 00:1e.3 scanning...
1091 13:52:22.332029 scan_generic_bus for PCI: 00:1e.3
1092 13:52:22.332133 SPI: 00 enabled
1093 13:52:22.338872 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1094 13:52:22.345765 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1095 13:52:22.345845 PCI: 00:1f.0 scanning...
1096 13:52:22.348940 scan_static_bus for PCI: 00:1f.0
1097 13:52:22.352024 PNP: 0c09.0 enabled
1098 13:52:22.355221 PNP: 0c09.0 scanning...
1099 13:52:22.358521 scan_static_bus for PNP: 0c09.0
1100 13:52:22.361710 scan_static_bus for PNP: 0c09.0 done
1101 13:52:22.365037 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1102 13:52:22.368652 scan_static_bus for PCI: 00:1f.0 done
1103 13:52:22.375162 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1104 13:52:22.378725 PCI: 00:1f.2 scanning...
1105 13:52:22.381968 scan_static_bus for PCI: 00:1f.2
1106 13:52:22.382061 GENERIC: 0.0 enabled
1107 13:52:22.385040 GENERIC: 0.0 scanning...
1108 13:52:22.388274 scan_static_bus for GENERIC: 0.0
1109 13:52:22.391403 GENERIC: 0.0 enabled
1110 13:52:22.395022 GENERIC: 1.0 enabled
1111 13:52:22.398203 scan_static_bus for GENERIC: 0.0 done
1112 13:52:22.401585 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1113 13:52:22.405034 scan_static_bus for PCI: 00:1f.2 done
1114 13:52:22.411627 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1115 13:52:22.414563 PCI: 00:1f.3 scanning...
1116 13:52:22.417702 scan_static_bus for PCI: 00:1f.3
1117 13:52:22.421035 scan_static_bus for PCI: 00:1f.3 done
1118 13:52:22.424471 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1119 13:52:22.427667 PCI: 00:1f.5 scanning...
1120 13:52:22.430990 scan_generic_bus for PCI: 00:1f.5
1121 13:52:22.434339 scan_generic_bus for PCI: 00:1f.5 done
1122 13:52:22.441089 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1123 13:52:22.444261 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1124 13:52:22.447525 scan_static_bus for Root Device done
1125 13:52:22.454128 scan_bus: bus Root Device finished in 735 msecs
1126 13:52:22.454213 done
1127 13:52:22.460992 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1128 13:52:22.464071 Chrome EC: UHEPI supported
1129 13:52:22.470971 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1130 13:52:22.477232 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1131 13:52:22.480523 SPI flash protection: WPSW=0 SRP0=1
1132 13:52:22.483709 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1133 13:52:22.490294 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1134 13:52:22.493460 found VGA at PCI: 00:02.0
1135 13:52:22.496715 Setting up VGA for PCI: 00:02.0
1136 13:52:22.503542 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1137 13:52:22.506903 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1138 13:52:22.510458 Allocating resources...
1139 13:52:22.510558 Reading resources...
1140 13:52:22.516659 Root Device read_resources bus 0 link: 0
1141 13:52:22.519933 DOMAIN: 0000 read_resources bus 0 link: 0
1142 13:52:22.526487 PCI: 00:04.0 read_resources bus 1 link: 0
1143 13:52:22.530026 PCI: 00:04.0 read_resources bus 1 link: 0 done
1144 13:52:22.536433 PCI: 00:0d.0 read_resources bus 0 link: 0
1145 13:52:22.539878 USB0 port 0 read_resources bus 0 link: 0
1146 13:52:22.546092 USB0 port 0 read_resources bus 0 link: 0 done
1147 13:52:22.549651 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1148 13:52:22.552904 PCI: 00:14.0 read_resources bus 0 link: 0
1149 13:52:22.559589 USB0 port 0 read_resources bus 0 link: 0
1150 13:52:22.562633 USB0 port 0 read_resources bus 0 link: 0 done
1151 13:52:22.569633 PCI: 00:14.0 read_resources bus 0 link: 0 done
1152 13:52:22.572836 PCI: 00:14.3 read_resources bus 0 link: 0
1153 13:52:22.579775 PCI: 00:14.3 read_resources bus 0 link: 0 done
1154 13:52:22.582849 PCI: 00:15.0 read_resources bus 0 link: 0
1155 13:52:22.589870 PCI: 00:15.0 read_resources bus 0 link: 0 done
1156 13:52:22.593368 PCI: 00:15.1 read_resources bus 0 link: 0
1157 13:52:22.599584 PCI: 00:15.1 read_resources bus 0 link: 0 done
1158 13:52:22.602827 PCI: 00:19.1 read_resources bus 0 link: 0
1159 13:52:22.610124 PCI: 00:19.1 read_resources bus 0 link: 0 done
1160 13:52:22.613256 PCI: 00:1d.0 read_resources bus 1 link: 0
1161 13:52:22.619793 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1162 13:52:22.622920 PCI: 00:1e.2 read_resources bus 2 link: 0
1163 13:52:22.629905 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1164 13:52:22.633164 PCI: 00:1e.3 read_resources bus 3 link: 0
1165 13:52:22.640043 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1166 13:52:22.643404 PCI: 00:1f.0 read_resources bus 0 link: 0
1167 13:52:22.649515 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1168 13:52:22.653163 PCI: 00:1f.2 read_resources bus 0 link: 0
1169 13:52:22.656440 GENERIC: 0.0 read_resources bus 0 link: 0
1170 13:52:22.663252 GENERIC: 0.0 read_resources bus 0 link: 0 done
1171 13:52:22.666632 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1172 13:52:22.673950 DOMAIN: 0000 read_resources bus 0 link: 0 done
1173 13:52:22.677249 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1174 13:52:22.683787 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1175 13:52:22.687443 Root Device read_resources bus 0 link: 0 done
1176 13:52:22.690707 Done reading resources.
1177 13:52:22.697439 Show resources in subtree (Root Device)...After reading.
1178 13:52:22.700722 Root Device child on link 0 DOMAIN: 0000
1179 13:52:22.703942 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1180 13:52:22.713837 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1181 13:52:22.723731 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1182 13:52:22.726833 PCI: 00:00.0
1183 13:52:22.736894 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1184 13:52:22.743349 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1185 13:52:22.753186 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1186 13:52:22.763093 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1187 13:52:22.773571 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1188 13:52:22.783086 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1189 13:52:22.793200 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1190 13:52:22.799499 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1191 13:52:22.809493 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1192 13:52:22.819585 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1193 13:52:22.829772 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1194 13:52:22.839189 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1195 13:52:22.849380 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1196 13:52:22.855765 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1197 13:52:22.866005 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1198 13:52:22.875985 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1199 13:52:22.885541 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1200 13:52:22.895592 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1201 13:52:22.905641 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1202 13:52:22.915531 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1203 13:52:22.915618 PCI: 00:02.0
1204 13:52:22.925128 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1205 13:52:22.935030 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1206 13:52:22.945263 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1207 13:52:22.948598 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1208 13:52:22.958278 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1209 13:52:22.961695 GENERIC: 0.0
1210 13:52:22.961810 PCI: 00:05.0
1211 13:52:22.971271 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1212 13:52:22.977969 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1213 13:52:22.978081 GENERIC: 0.0
1214 13:52:22.981226 PCI: 00:08.0
1215 13:52:22.991428 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1216 13:52:22.991515 PCI: 00:0a.0
1217 13:52:22.997930 PCI: 00:0d.0 child on link 0 USB0 port 0
1218 13:52:23.008126 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1219 13:52:23.011202 USB0 port 0 child on link 0 USB3 port 0
1220 13:52:23.014607 USB3 port 0
1221 13:52:23.014693 USB3 port 1
1222 13:52:23.017896 USB3 port 2
1223 13:52:23.017982 USB3 port 3
1224 13:52:23.020888 PCI: 00:14.0 child on link 0 USB0 port 0
1225 13:52:23.034314 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1226 13:52:23.037635 USB0 port 0 child on link 0 USB2 port 0
1227 13:52:23.037743 USB2 port 0
1228 13:52:23.041199 USB2 port 1
1229 13:52:23.041287 USB2 port 2
1230 13:52:23.044215 USB2 port 3
1231 13:52:23.047293 USB2 port 4
1232 13:52:23.047373 USB2 port 5
1233 13:52:23.050864 USB2 port 6
1234 13:52:23.050940 USB2 port 7
1235 13:52:23.054240 USB2 port 8
1236 13:52:23.054314 USB2 port 9
1237 13:52:23.057526 USB3 port 0
1238 13:52:23.057634 USB3 port 1
1239 13:52:23.060677 USB3 port 2
1240 13:52:23.060779 USB3 port 3
1241 13:52:23.064177 PCI: 00:14.2
1242 13:52:23.073807 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1243 13:52:23.083676 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1244 13:52:23.087314 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1245 13:52:23.096816 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1246 13:52:23.100572 GENERIC: 0.0
1247 13:52:23.103857 PCI: 00:15.0 child on link 0 I2C: 00:1a
1248 13:52:23.113630 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1249 13:52:23.117285 I2C: 00:1a
1250 13:52:23.117412 I2C: 00:31
1251 13:52:23.117553 I2C: 00:32
1252 13:52:23.123643 PCI: 00:15.1 child on link 0 I2C: 00:10
1253 13:52:23.133538 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1254 13:52:23.133626 I2C: 00:10
1255 13:52:23.136761 PCI: 00:15.2
1256 13:52:23.146746 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1257 13:52:23.146844 PCI: 00:15.3
1258 13:52:23.156464 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1259 13:52:23.159943 PCI: 00:16.0
1260 13:52:23.169675 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1261 13:52:23.169784 PCI: 00:19.0
1262 13:52:23.176520 PCI: 00:19.1 child on link 0 I2C: 00:15
1263 13:52:23.186602 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1264 13:52:23.186688 I2C: 00:15
1265 13:52:23.189702 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1266 13:52:23.199730 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1267 13:52:23.209772 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1268 13:52:23.219529 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1269 13:52:23.219617 GENERIC: 0.0
1270 13:52:23.222659 PCI: 01:00.0
1271 13:52:23.232776 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1272 13:52:23.242741 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1273 13:52:23.242828 PCI: 00:1e.0
1274 13:52:23.255794 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1275 13:52:23.259083 PCI: 00:1e.2 child on link 0 SPI: 00
1276 13:52:23.268851 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1277 13:52:23.268938 SPI: 00
1278 13:52:23.275727 PCI: 00:1e.3 child on link 0 SPI: 00
1279 13:52:23.285680 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1280 13:52:23.285769 SPI: 00
1281 13:52:23.288821 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1282 13:52:23.298588 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1283 13:52:23.298714 PNP: 0c09.0
1284 13:52:23.308601 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1285 13:52:23.311782 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1286 13:52:23.321801 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1287 13:52:23.331593 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1288 13:52:23.335274 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1289 13:52:23.338428 GENERIC: 0.0
1290 13:52:23.341659 GENERIC: 1.0
1291 13:52:23.341738 PCI: 00:1f.3
1292 13:52:23.351616 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1293 13:52:23.361536 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1294 13:52:23.364724 PCI: 00:1f.5
1295 13:52:23.374561 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1296 13:52:23.377839 CPU_CLUSTER: 0 child on link 0 APIC: 00
1297 13:52:23.377922 APIC: 00
1298 13:52:23.381254 APIC: 05
1299 13:52:23.381330 APIC: 03
1300 13:52:23.381395 APIC: 06
1301 13:52:23.384198 APIC: 07
1302 13:52:23.384397 APIC: 04
1303 13:52:23.387750 APIC: 01
1304 13:52:23.387826 APIC: 02
1305 13:52:23.394520 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1306 13:52:23.400929 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1307 13:52:23.407593 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1308 13:52:23.414424 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1309 13:52:23.417821 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1310 13:52:23.420910 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1311 13:52:23.427654 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1312 13:52:23.434365 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1313 13:52:23.443900 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1314 13:52:23.450920 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1315 13:52:23.457329 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1316 13:52:23.464014 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1317 13:52:23.470387 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1318 13:52:23.480388 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1319 13:52:23.483618 DOMAIN: 0000: Resource ranges:
1320 13:52:23.487081 * Base: 1000, Size: 800, Tag: 100
1321 13:52:23.490174 * Base: 1900, Size: e700, Tag: 100
1322 13:52:23.497281 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1323 13:52:23.503528 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1324 13:52:23.509946 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1325 13:52:23.516670 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1326 13:52:23.523115 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1327 13:52:23.533660 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1328 13:52:23.539939 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1329 13:52:23.546283 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1330 13:52:23.556411 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1331 13:52:23.562912 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1332 13:52:23.569630 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1333 13:52:23.579782 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1334 13:52:23.585981 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1335 13:52:23.592542 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1336 13:52:23.602654 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1337 13:52:23.609015 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1338 13:52:23.616007 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1339 13:52:23.625592 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1340 13:52:23.632447 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1341 13:52:23.639076 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1342 13:52:23.648648 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1343 13:52:23.655209 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1344 13:52:23.662134 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1345 13:52:23.671945 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1346 13:52:23.678280 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1347 13:52:23.681494 DOMAIN: 0000: Resource ranges:
1348 13:52:23.685188 * Base: 7fc00000, Size: 40400000, Tag: 200
1349 13:52:23.691586 * Base: d0000000, Size: 28000000, Tag: 200
1350 13:52:23.694799 * Base: fa000000, Size: 1000000, Tag: 200
1351 13:52:23.698460 * Base: fb001000, Size: 2fff000, Tag: 200
1352 13:52:23.701575 * Base: fe010000, Size: 2e000, Tag: 200
1353 13:52:23.708191 * Base: fe03f000, Size: d41000, Tag: 200
1354 13:52:23.711521 * Base: fed88000, Size: 8000, Tag: 200
1355 13:52:23.714984 * Base: fed93000, Size: d000, Tag: 200
1356 13:52:23.718501 * Base: feda2000, Size: 1e000, Tag: 200
1357 13:52:23.724859 * Base: fede0000, Size: 1220000, Tag: 200
1358 13:52:23.728128 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1359 13:52:23.734375 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1360 13:52:23.741071 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1361 13:52:23.747764 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1362 13:52:23.754215 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1363 13:52:23.761215 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1364 13:52:23.767972 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1365 13:52:23.774405 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1366 13:52:23.781234 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1367 13:52:23.787406 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1368 13:52:23.794219 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1369 13:52:23.800544 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1370 13:52:23.807101 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1371 13:52:23.814199 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1372 13:52:23.820484 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1373 13:52:23.826962 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1374 13:52:23.833555 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1375 13:52:23.840438 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1376 13:52:23.847131 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1377 13:52:23.853521 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1378 13:52:23.860389 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1379 13:52:23.866734 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1380 13:52:23.873479 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1381 13:52:23.883400 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1382 13:52:23.890265 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1383 13:52:23.893364 PCI: 00:1d.0: Resource ranges:
1384 13:52:23.896465 * Base: 7fc00000, Size: 100000, Tag: 200
1385 13:52:23.902916 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1386 13:52:23.909747 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1387 13:52:23.919759 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1388 13:52:23.925932 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1389 13:52:23.929539 Root Device assign_resources, bus 0 link: 0
1390 13:52:23.936067 DOMAIN: 0000 assign_resources, bus 0 link: 0
1391 13:52:23.942777 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1392 13:52:23.952858 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1393 13:52:23.959170 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1394 13:52:23.969229 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1395 13:52:23.972358 PCI: 00:04.0 assign_resources, bus 1 link: 0
1396 13:52:23.979007 PCI: 00:04.0 assign_resources, bus 1 link: 0
1397 13:52:23.985267 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1398 13:52:23.995348 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1399 13:52:24.002051 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1400 13:52:24.005419 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1401 13:52:24.012272 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1402 13:52:24.018409 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1403 13:52:24.025474 PCI: 00:14.0 assign_resources, bus 0 link: 0
1404 13:52:24.028337 PCI: 00:14.0 assign_resources, bus 0 link: 0
1405 13:52:24.038443 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1406 13:52:24.044896 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1407 13:52:24.054885 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1408 13:52:24.058715 PCI: 00:14.3 assign_resources, bus 0 link: 0
1409 13:52:24.061566 PCI: 00:14.3 assign_resources, bus 0 link: 0
1410 13:52:24.071171 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1411 13:52:24.074861 PCI: 00:15.0 assign_resources, bus 0 link: 0
1412 13:52:24.081248 PCI: 00:15.0 assign_resources, bus 0 link: 0
1413 13:52:24.087808 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1414 13:52:24.090983 PCI: 00:15.1 assign_resources, bus 0 link: 0
1415 13:52:24.097926 PCI: 00:15.1 assign_resources, bus 0 link: 0
1416 13:52:24.104473 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1417 13:52:24.114702 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1418 13:52:24.121185 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1419 13:52:24.130705 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1420 13:52:24.134472 PCI: 00:19.1 assign_resources, bus 0 link: 0
1421 13:52:24.140789 PCI: 00:19.1 assign_resources, bus 0 link: 0
1422 13:52:24.147415 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1423 13:52:24.157809 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1424 13:52:24.167183 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1425 13:52:24.170409 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1426 13:52:24.180540 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1427 13:52:24.187159 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1428 13:52:24.190235 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1429 13:52:24.200818 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1430 13:52:24.204036 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1431 13:52:24.210971 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1432 13:52:24.217475 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1433 13:52:24.223761 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1434 13:52:24.227018 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1435 13:52:24.230603 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1436 13:52:24.237560 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1437 13:52:24.240474 LPC: Trying to open IO window from 800 size 1ff
1438 13:52:24.250402 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1439 13:52:24.257298 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1440 13:52:24.267462 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1441 13:52:24.270464 DOMAIN: 0000 assign_resources, bus 0 link: 0
1442 13:52:24.277269 Root Device assign_resources, bus 0 link: 0
1443 13:52:24.277396 Done setting resources.
1444 13:52:24.283503 Show resources in subtree (Root Device)...After assigning values.
1445 13:52:24.290182 Root Device child on link 0 DOMAIN: 0000
1446 13:52:24.293541 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1447 13:52:24.303358 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1448 13:52:24.313320 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1449 13:52:24.313431 PCI: 00:00.0
1450 13:52:24.323305 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1451 13:52:24.333500 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1452 13:52:24.343094 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1453 13:52:24.352950 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1454 13:52:24.359845 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1455 13:52:24.369959 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1456 13:52:24.379626 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1457 13:52:24.389543 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1458 13:52:24.399667 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1459 13:52:24.409585 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1460 13:52:24.416380 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1461 13:52:24.425942 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1462 13:52:24.436013 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1463 13:52:24.445810 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1464 13:52:24.452798 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1465 13:52:24.462452 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1466 13:52:24.472623 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1467 13:52:24.482223 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1468 13:52:24.492559 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1469 13:52:24.502233 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1470 13:52:24.502343 PCI: 00:02.0
1471 13:52:24.515735 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1472 13:52:24.525544 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1473 13:52:24.535650 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1474 13:52:24.538838 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1475 13:52:24.548906 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1476 13:52:24.551867 GENERIC: 0.0
1477 13:52:24.551981 PCI: 00:05.0
1478 13:52:24.561776 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1479 13:52:24.568601 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1480 13:52:24.568780 GENERIC: 0.0
1481 13:52:24.571690 PCI: 00:08.0
1482 13:52:24.581707 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1483 13:52:24.581846 PCI: 00:0a.0
1484 13:52:24.588550 PCI: 00:0d.0 child on link 0 USB0 port 0
1485 13:52:24.598174 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1486 13:52:24.601599 USB0 port 0 child on link 0 USB3 port 0
1487 13:52:24.605255 USB3 port 0
1488 13:52:24.605412 USB3 port 1
1489 13:52:24.608311 USB3 port 2
1490 13:52:24.608428 USB3 port 3
1491 13:52:24.615014 PCI: 00:14.0 child on link 0 USB0 port 0
1492 13:52:24.625096 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1493 13:52:24.628287 USB0 port 0 child on link 0 USB2 port 0
1494 13:52:24.631470 USB2 port 0
1495 13:52:24.631587 USB2 port 1
1496 13:52:24.634749 USB2 port 2
1497 13:52:24.634907 USB2 port 3
1498 13:52:24.638224 USB2 port 4
1499 13:52:24.638362 USB2 port 5
1500 13:52:24.641481 USB2 port 6
1501 13:52:24.641649 USB2 port 7
1502 13:52:24.644608 USB2 port 8
1503 13:52:24.644799 USB2 port 9
1504 13:52:24.648307 USB3 port 0
1505 13:52:24.651417 USB3 port 1
1506 13:52:24.651588 USB3 port 2
1507 13:52:24.654727 USB3 port 3
1508 13:52:24.654945 PCI: 00:14.2
1509 13:52:24.664533 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1510 13:52:24.674816 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1511 13:52:24.681074 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1512 13:52:24.691197 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1513 13:52:24.691406 GENERIC: 0.0
1514 13:52:24.697621 PCI: 00:15.0 child on link 0 I2C: 00:1a
1515 13:52:24.707656 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1516 13:52:24.707897 I2C: 00:1a
1517 13:52:24.710695 I2C: 00:31
1518 13:52:24.710958 I2C: 00:32
1519 13:52:24.717478 PCI: 00:15.1 child on link 0 I2C: 00:10
1520 13:52:24.727485 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1521 13:52:24.727669 I2C: 00:10
1522 13:52:24.730572 PCI: 00:15.2
1523 13:52:24.740665 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1524 13:52:24.740789 PCI: 00:15.3
1525 13:52:24.750272 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1526 13:52:24.754056 PCI: 00:16.0
1527 13:52:24.763964 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1528 13:52:24.767086 PCI: 00:19.0
1529 13:52:24.770182 PCI: 00:19.1 child on link 0 I2C: 00:15
1530 13:52:24.780447 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1531 13:52:24.780609 I2C: 00:15
1532 13:52:24.786972 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1533 13:52:24.796888 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1534 13:52:24.806881 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1535 13:52:24.817114 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1536 13:52:24.820209 GENERIC: 0.0
1537 13:52:24.820765 PCI: 01:00.0
1538 13:52:24.830041 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1539 13:52:24.843969 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1540 13:52:24.844492 PCI: 00:1e.0
1541 13:52:24.853297 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1542 13:52:24.859815 PCI: 00:1e.2 child on link 0 SPI: 00
1543 13:52:24.869382 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1544 13:52:24.869514 SPI: 00
1545 13:52:24.873120 PCI: 00:1e.3 child on link 0 SPI: 00
1546 13:52:24.886103 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1547 13:52:24.886192 SPI: 00
1548 13:52:24.889472 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1549 13:52:24.899158 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1550 13:52:24.899298 PNP: 0c09.0
1551 13:52:24.909311 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1552 13:52:24.912361 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1553 13:52:24.922348 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1554 13:52:24.932207 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1555 13:52:24.935431 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1556 13:52:24.938957 GENERIC: 0.0
1557 13:52:24.942094 GENERIC: 1.0
1558 13:52:24.942202 PCI: 00:1f.3
1559 13:52:24.952095 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1560 13:52:24.962125 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1561 13:52:24.965307 PCI: 00:1f.5
1562 13:52:24.975252 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1563 13:52:24.978930 CPU_CLUSTER: 0 child on link 0 APIC: 00
1564 13:52:24.982050 APIC: 00
1565 13:52:24.982156 APIC: 05
1566 13:52:24.982257 APIC: 03
1567 13:52:24.985132 APIC: 06
1568 13:52:24.985243 APIC: 07
1569 13:52:24.988338 APIC: 04
1570 13:52:24.988449 APIC: 01
1571 13:52:24.988549 APIC: 02
1572 13:52:24.991750 Done allocating resources.
1573 13:52:24.998460 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1574 13:52:25.004925 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1575 13:52:25.008301 Configure GPIOs for I2S audio on UP4.
1576 13:52:25.014689 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1577 13:52:25.018214 Enabling resources...
1578 13:52:25.021608 PCI: 00:00.0 subsystem <- 8086/9a12
1579 13:52:25.024884 PCI: 00:00.0 cmd <- 06
1580 13:52:25.028266 PCI: 00:02.0 subsystem <- 8086/9a40
1581 13:52:25.031623 PCI: 00:02.0 cmd <- 03
1582 13:52:25.034786 PCI: 00:04.0 subsystem <- 8086/9a03
1583 13:52:25.034895 PCI: 00:04.0 cmd <- 02
1584 13:52:25.041619 PCI: 00:05.0 subsystem <- 8086/9a19
1585 13:52:25.041729 PCI: 00:05.0 cmd <- 02
1586 13:52:25.044686 PCI: 00:08.0 subsystem <- 8086/9a11
1587 13:52:25.047751 PCI: 00:08.0 cmd <- 06
1588 13:52:25.050974 PCI: 00:0d.0 subsystem <- 8086/9a13
1589 13:52:25.054710 PCI: 00:0d.0 cmd <- 02
1590 13:52:25.058025 PCI: 00:14.0 subsystem <- 8086/a0ed
1591 13:52:25.061311 PCI: 00:14.0 cmd <- 02
1592 13:52:25.064390 PCI: 00:14.2 subsystem <- 8086/a0ef
1593 13:52:25.067561 PCI: 00:14.2 cmd <- 02
1594 13:52:25.071328 PCI: 00:14.3 subsystem <- 8086/a0f0
1595 13:52:25.074532 PCI: 00:14.3 cmd <- 02
1596 13:52:25.077614 PCI: 00:15.0 subsystem <- 8086/a0e8
1597 13:52:25.080824 PCI: 00:15.0 cmd <- 02
1598 13:52:25.084323 PCI: 00:15.1 subsystem <- 8086/a0e9
1599 13:52:25.084431 PCI: 00:15.1 cmd <- 02
1600 13:52:25.091042 PCI: 00:15.2 subsystem <- 8086/a0ea
1601 13:52:25.091148 PCI: 00:15.2 cmd <- 02
1602 13:52:25.094189 PCI: 00:15.3 subsystem <- 8086/a0eb
1603 13:52:25.097724 PCI: 00:15.3 cmd <- 02
1604 13:52:25.100872 PCI: 00:16.0 subsystem <- 8086/a0e0
1605 13:52:25.104029 PCI: 00:16.0 cmd <- 02
1606 13:52:25.107464 PCI: 00:19.1 subsystem <- 8086/a0c6
1607 13:52:25.110484 PCI: 00:19.1 cmd <- 02
1608 13:52:25.113908 PCI: 00:1d.0 bridge ctrl <- 0013
1609 13:52:25.117445 PCI: 00:1d.0 subsystem <- 8086/a0b0
1610 13:52:25.120547 PCI: 00:1d.0 cmd <- 06
1611 13:52:25.123931 PCI: 00:1e.0 subsystem <- 8086/a0a8
1612 13:52:25.126927 PCI: 00:1e.0 cmd <- 06
1613 13:52:25.130353 PCI: 00:1e.2 subsystem <- 8086/a0aa
1614 13:52:25.133771 PCI: 00:1e.2 cmd <- 06
1615 13:52:25.136814 PCI: 00:1e.3 subsystem <- 8086/a0ab
1616 13:52:25.139991 PCI: 00:1e.3 cmd <- 02
1617 13:52:25.143277 PCI: 00:1f.0 subsystem <- 8086/a087
1618 13:52:25.143399 PCI: 00:1f.0 cmd <- 407
1619 13:52:25.149972 PCI: 00:1f.3 subsystem <- 8086/a0c8
1620 13:52:25.150082 PCI: 00:1f.3 cmd <- 02
1621 13:52:25.153253 PCI: 00:1f.5 subsystem <- 8086/a0a4
1622 13:52:25.156910 PCI: 00:1f.5 cmd <- 406
1623 13:52:25.161687 PCI: 01:00.0 cmd <- 02
1624 13:52:25.165981 done.
1625 13:52:25.169167 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1626 13:52:25.172777 Initializing devices...
1627 13:52:25.175988 Root Device init
1628 13:52:25.179106 Chrome EC: Set SMI mask to 0x0000000000000000
1629 13:52:25.186026 Chrome EC: clear events_b mask to 0x0000000000000000
1630 13:52:25.192732 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1631 13:52:25.195925 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1632 13:52:25.203224 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1633 13:52:25.209574 Chrome EC: Set WAKE mask to 0x0000000000000000
1634 13:52:25.213341 fw_config match found: DB_USB=USB3_ACTIVE
1635 13:52:25.219790 Configure Right Type-C port orientation for retimer
1636 13:52:25.222826 Root Device init finished in 44 msecs
1637 13:52:25.226289 PCI: 00:00.0 init
1638 13:52:25.229832 CPU TDP = 9 Watts
1639 13:52:25.229935 CPU PL1 = 9 Watts
1640 13:52:25.232954 CPU PL2 = 40 Watts
1641 13:52:25.236264 CPU PL4 = 83 Watts
1642 13:52:25.239904 PCI: 00:00.0 init finished in 8 msecs
1643 13:52:25.239989 PCI: 00:02.0 init
1644 13:52:25.243159 GMA: Found VBT in CBFS
1645 13:52:25.246495 GMA: Found valid VBT in CBFS
1646 13:52:25.252624 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1647 13:52:25.259179 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1648 13:52:25.262847 PCI: 00:02.0 init finished in 18 msecs
1649 13:52:25.266039 PCI: 00:05.0 init
1650 13:52:25.269229 PCI: 00:05.0 init finished in 0 msecs
1651 13:52:25.272415 PCI: 00:08.0 init
1652 13:52:25.275568 PCI: 00:08.0 init finished in 0 msecs
1653 13:52:25.279364 PCI: 00:14.0 init
1654 13:52:25.282468 PCI: 00:14.0 init finished in 0 msecs
1655 13:52:25.285729 PCI: 00:14.2 init
1656 13:52:25.288723 PCI: 00:14.2 init finished in 0 msecs
1657 13:52:25.292400 PCI: 00:15.0 init
1658 13:52:25.295545 I2C bus 0 version 0x3230302a
1659 13:52:25.298756 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1660 13:52:25.302294 PCI: 00:15.0 init finished in 6 msecs
1661 13:52:25.305445 PCI: 00:15.1 init
1662 13:52:25.305569 I2C bus 1 version 0x3230302a
1663 13:52:25.312166 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1664 13:52:25.315299 PCI: 00:15.1 init finished in 6 msecs
1665 13:52:25.315380 PCI: 00:15.2 init
1666 13:52:25.318442 I2C bus 2 version 0x3230302a
1667 13:52:25.321937 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1668 13:52:25.328725 PCI: 00:15.2 init finished in 6 msecs
1669 13:52:25.328811 PCI: 00:15.3 init
1670 13:52:25.331563 I2C bus 3 version 0x3230302a
1671 13:52:25.335102 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1672 13:52:25.338239 PCI: 00:15.3 init finished in 6 msecs
1673 13:52:25.341925 PCI: 00:16.0 init
1674 13:52:25.345212 PCI: 00:16.0 init finished in 0 msecs
1675 13:52:25.348105 PCI: 00:19.1 init
1676 13:52:25.351713 I2C bus 5 version 0x3230302a
1677 13:52:25.354821 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1678 13:52:25.357820 PCI: 00:19.1 init finished in 6 msecs
1679 13:52:25.361491 PCI: 00:1d.0 init
1680 13:52:25.364840 Initializing PCH PCIe bridge.
1681 13:52:25.368089 PCI: 00:1d.0 init finished in 3 msecs
1682 13:52:25.371189 PCI: 00:1f.0 init
1683 13:52:25.374543 IOAPIC: Initializing IOAPIC at 0xfec00000
1684 13:52:25.377755 IOAPIC: Bootstrap Processor Local APIC = 0x00
1685 13:52:25.381224 IOAPIC: ID = 0x02
1686 13:52:25.384622 IOAPIC: Dumping registers
1687 13:52:25.387251 reg 0x0000: 0x02000000
1688 13:52:25.387356 reg 0x0001: 0x00770020
1689 13:52:25.390986 reg 0x0002: 0x00000000
1690 13:52:25.394128 PCI: 00:1f.0 init finished in 21 msecs
1691 13:52:25.397571 PCI: 00:1f.2 init
1692 13:52:25.401114 Disabling ACPI via APMC.
1693 13:52:25.404879 APMC done.
1694 13:52:25.407923 PCI: 00:1f.2 init finished in 6 msecs
1695 13:52:25.420046 PCI: 01:00.0 init
1696 13:52:25.422885 PCI: 01:00.0 init finished in 0 msecs
1697 13:52:25.426512 PNP: 0c09.0 init
1698 13:52:25.429684 Google Chrome EC uptime: 8.283 seconds
1699 13:52:25.436339 Google Chrome AP resets since EC boot: 1
1700 13:52:25.440149 Google Chrome most recent AP reset causes:
1701 13:52:25.443094 0.455: 32775 shutdown: entering G3
1702 13:52:25.449945 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1703 13:52:25.453228 PNP: 0c09.0 init finished in 22 msecs
1704 13:52:25.458701 Devices initialized
1705 13:52:25.461821 Show all devs... After init.
1706 13:52:25.465465 Root Device: enabled 1
1707 13:52:25.465566 DOMAIN: 0000: enabled 1
1708 13:52:25.468814 CPU_CLUSTER: 0: enabled 1
1709 13:52:25.472012 PCI: 00:00.0: enabled 1
1710 13:52:25.475146 PCI: 00:02.0: enabled 1
1711 13:52:25.475271 PCI: 00:04.0: enabled 1
1712 13:52:25.478390 PCI: 00:05.0: enabled 1
1713 13:52:25.482011 PCI: 00:06.0: enabled 0
1714 13:52:25.485335 PCI: 00:07.0: enabled 0
1715 13:52:25.485437 PCI: 00:07.1: enabled 0
1716 13:52:25.488490 PCI: 00:07.2: enabled 0
1717 13:52:25.491518 PCI: 00:07.3: enabled 0
1718 13:52:25.494866 PCI: 00:08.0: enabled 1
1719 13:52:25.494968 PCI: 00:09.0: enabled 0
1720 13:52:25.498409 PCI: 00:0a.0: enabled 0
1721 13:52:25.502039 PCI: 00:0d.0: enabled 1
1722 13:52:25.505143 PCI: 00:0d.1: enabled 0
1723 13:52:25.505249 PCI: 00:0d.2: enabled 0
1724 13:52:25.508339 PCI: 00:0d.3: enabled 0
1725 13:52:25.511429 PCI: 00:0e.0: enabled 0
1726 13:52:25.511508 PCI: 00:10.2: enabled 1
1727 13:52:25.514763 PCI: 00:10.6: enabled 0
1728 13:52:25.518045 PCI: 00:10.7: enabled 0
1729 13:52:25.521932 PCI: 00:12.0: enabled 0
1730 13:52:25.522053 PCI: 00:12.6: enabled 0
1731 13:52:25.524992 PCI: 00:13.0: enabled 0
1732 13:52:25.528180 PCI: 00:14.0: enabled 1
1733 13:52:25.531748 PCI: 00:14.1: enabled 0
1734 13:52:25.531832 PCI: 00:14.2: enabled 1
1735 13:52:25.534774 PCI: 00:14.3: enabled 1
1736 13:52:25.538013 PCI: 00:15.0: enabled 1
1737 13:52:25.541744 PCI: 00:15.1: enabled 1
1738 13:52:25.541828 PCI: 00:15.2: enabled 1
1739 13:52:25.544629 PCI: 00:15.3: enabled 1
1740 13:52:25.547995 PCI: 00:16.0: enabled 1
1741 13:52:25.551426 PCI: 00:16.1: enabled 0
1742 13:52:25.551542 PCI: 00:16.2: enabled 0
1743 13:52:25.554949 PCI: 00:16.3: enabled 0
1744 13:52:25.558059 PCI: 00:16.4: enabled 0
1745 13:52:25.558175 PCI: 00:16.5: enabled 0
1746 13:52:25.561343 PCI: 00:17.0: enabled 0
1747 13:52:25.564744 PCI: 00:19.0: enabled 0
1748 13:52:25.567910 PCI: 00:19.1: enabled 1
1749 13:52:25.568027 PCI: 00:19.2: enabled 0
1750 13:52:25.571723 PCI: 00:1c.0: enabled 1
1751 13:52:25.574802 PCI: 00:1c.1: enabled 0
1752 13:52:25.578031 PCI: 00:1c.2: enabled 0
1753 13:52:25.578149 PCI: 00:1c.3: enabled 0
1754 13:52:25.581371 PCI: 00:1c.4: enabled 0
1755 13:52:25.584524 PCI: 00:1c.5: enabled 0
1756 13:52:25.588111 PCI: 00:1c.6: enabled 1
1757 13:52:25.588230 PCI: 00:1c.7: enabled 0
1758 13:52:25.591455 PCI: 00:1d.0: enabled 1
1759 13:52:25.594405 PCI: 00:1d.1: enabled 0
1760 13:52:25.594487 PCI: 00:1d.2: enabled 1
1761 13:52:25.597720 PCI: 00:1d.3: enabled 0
1762 13:52:25.601483 PCI: 00:1e.0: enabled 1
1763 13:52:25.604545 PCI: 00:1e.1: enabled 0
1764 13:52:25.604627 PCI: 00:1e.2: enabled 1
1765 13:52:25.607664 PCI: 00:1e.3: enabled 1
1766 13:52:25.611323 PCI: 00:1f.0: enabled 1
1767 13:52:25.614581 PCI: 00:1f.1: enabled 0
1768 13:52:25.614699 PCI: 00:1f.2: enabled 1
1769 13:52:25.617865 PCI: 00:1f.3: enabled 1
1770 13:52:25.620840 PCI: 00:1f.4: enabled 0
1771 13:52:25.624645 PCI: 00:1f.5: enabled 1
1772 13:52:25.624730 PCI: 00:1f.6: enabled 0
1773 13:52:25.627759 PCI: 00:1f.7: enabled 0
1774 13:52:25.630859 APIC: 00: enabled 1
1775 13:52:25.630936 GENERIC: 0.0: enabled 1
1776 13:52:25.634499 GENERIC: 0.0: enabled 1
1777 13:52:25.637522 GENERIC: 1.0: enabled 1
1778 13:52:25.641276 GENERIC: 0.0: enabled 1
1779 13:52:25.641355 GENERIC: 1.0: enabled 1
1780 13:52:25.644604 USB0 port 0: enabled 1
1781 13:52:25.647700 GENERIC: 0.0: enabled 1
1782 13:52:25.647775 USB0 port 0: enabled 1
1783 13:52:25.651350 GENERIC: 0.0: enabled 1
1784 13:52:25.654364 I2C: 00:1a: enabled 1
1785 13:52:25.657708 I2C: 00:31: enabled 1
1786 13:52:25.657816 I2C: 00:32: enabled 1
1787 13:52:25.660779 I2C: 00:10: enabled 1
1788 13:52:25.664397 I2C: 00:15: enabled 1
1789 13:52:25.664487 GENERIC: 0.0: enabled 0
1790 13:52:25.667801 GENERIC: 1.0: enabled 0
1791 13:52:25.670969 GENERIC: 0.0: enabled 1
1792 13:52:25.671046 SPI: 00: enabled 1
1793 13:52:25.674228 SPI: 00: enabled 1
1794 13:52:25.677382 PNP: 0c09.0: enabled 1
1795 13:52:25.677461 GENERIC: 0.0: enabled 1
1796 13:52:25.680676 USB3 port 0: enabled 1
1797 13:52:25.683898 USB3 port 1: enabled 1
1798 13:52:25.687433 USB3 port 2: enabled 0
1799 13:52:25.687507 USB3 port 3: enabled 0
1800 13:52:25.690725 USB2 port 0: enabled 0
1801 13:52:25.694319 USB2 port 1: enabled 1
1802 13:52:25.694391 USB2 port 2: enabled 1
1803 13:52:25.697470 USB2 port 3: enabled 0
1804 13:52:25.700639 USB2 port 4: enabled 1
1805 13:52:25.703810 USB2 port 5: enabled 0
1806 13:52:25.703924 USB2 port 6: enabled 0
1807 13:52:25.707011 USB2 port 7: enabled 0
1808 13:52:25.710728 USB2 port 8: enabled 0
1809 13:52:25.710806 USB2 port 9: enabled 0
1810 13:52:25.713932 USB3 port 0: enabled 0
1811 13:52:25.717047 USB3 port 1: enabled 1
1812 13:52:25.720556 USB3 port 2: enabled 0
1813 13:52:25.720661 USB3 port 3: enabled 0
1814 13:52:25.723608 GENERIC: 0.0: enabled 1
1815 13:52:25.727326 GENERIC: 1.0: enabled 1
1816 13:52:25.727405 APIC: 05: enabled 1
1817 13:52:25.730506 APIC: 03: enabled 1
1818 13:52:25.733511 APIC: 06: enabled 1
1819 13:52:25.733587 APIC: 07: enabled 1
1820 13:52:25.737184 APIC: 04: enabled 1
1821 13:52:25.737264 APIC: 01: enabled 1
1822 13:52:25.740197 APIC: 02: enabled 1
1823 13:52:25.743400 PCI: 01:00.0: enabled 1
1824 13:52:25.747081 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1825 13:52:25.753339 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1826 13:52:25.756886 ELOG: NV offset 0xf30000 size 0x1000
1827 13:52:25.763646 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1828 13:52:25.770438 ELOG: Event(17) added with size 13 at 2023-04-20 13:52:25 UTC
1829 13:52:25.776898 ELOG: Event(92) added with size 9 at 2023-04-20 13:52:25 UTC
1830 13:52:25.783421 ELOG: Event(93) added with size 9 at 2023-04-20 13:52:25 UTC
1831 13:52:25.789881 ELOG: Event(9E) added with size 10 at 2023-04-20 13:52:25 UTC
1832 13:52:25.796627 ELOG: Event(9F) added with size 14 at 2023-04-20 13:52:25 UTC
1833 13:52:25.803520 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1834 13:52:25.810278 ELOG: Event(A1) added with size 10 at 2023-04-20 13:52:25 UTC
1835 13:52:25.816312 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1836 13:52:25.822620 ELOG: Event(A0) added with size 9 at 2023-04-20 13:52:25 UTC
1837 13:52:25.826261 elog_add_boot_reason: Logged dev mode boot
1838 13:52:25.833123 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1839 13:52:25.836174 Finalize devices...
1840 13:52:25.836271 Devices finalized
1841 13:52:25.842797 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1842 13:52:25.845977 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1843 13:52:25.852357 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1844 13:52:25.855871 ME: HFSTS1 : 0x80030055
1845 13:52:25.862587 ME: HFSTS2 : 0x30280116
1846 13:52:25.865819 ME: HFSTS3 : 0x00000050
1847 13:52:25.872436 ME: HFSTS4 : 0x00004000
1848 13:52:25.875887 ME: HFSTS5 : 0x00000000
1849 13:52:25.878849 ME: HFSTS6 : 0x40400006
1850 13:52:25.882098 ME: Manufacturing Mode : YES
1851 13:52:25.888768 ME: SPI Protection Mode Enabled : NO
1852 13:52:25.892357 ME: FW Partition Table : OK
1853 13:52:25.895341 ME: Bringup Loader Failure : NO
1854 13:52:25.899005 ME: Firmware Init Complete : NO
1855 13:52:25.902165 ME: Boot Options Present : NO
1856 13:52:25.905364 ME: Update In Progress : NO
1857 13:52:25.908929 ME: D0i3 Support : YES
1858 13:52:25.912142 ME: Low Power State Enabled : NO
1859 13:52:25.918965 ME: CPU Replaced : YES
1860 13:52:25.922035 ME: CPU Replacement Valid : YES
1861 13:52:25.925604 ME: Current Working State : 5
1862 13:52:25.928795 ME: Current Operation State : 1
1863 13:52:25.931771 ME: Current Operation Mode : 3
1864 13:52:25.935439 ME: Error Code : 0
1865 13:52:25.938645 ME: Enhanced Debug Mode : NO
1866 13:52:25.941811 ME: CPU Debug Disabled : YES
1867 13:52:25.945065 ME: TXT Support : NO
1868 13:52:25.951785 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1869 13:52:25.961614 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1870 13:52:25.964725 CBFS: 'fallback/slic' not found.
1871 13:52:25.967961 ACPI: Writing ACPI tables at 76b01000.
1872 13:52:25.968039 ACPI: * FACS
1873 13:52:25.971762 ACPI: * DSDT
1874 13:52:25.974905 Ramoops buffer: 0x100000@0x76a00000.
1875 13:52:25.977880 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1876 13:52:25.984530 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1877 13:52:25.988033 Google Chrome EC: version:
1878 13:52:25.991586 ro: voema_v2.0.10114-a447f03e46
1879 13:52:25.994448 rw: voema_v2.0.10114-a447f03e46
1880 13:52:25.997898 running image: 2
1881 13:52:26.000905 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1882 13:52:26.006510 ACPI: * FADT
1883 13:52:26.006617 SCI is IRQ9
1884 13:52:26.012865 ACPI: added table 1/32, length now 40
1885 13:52:26.012973 ACPI: * SSDT
1886 13:52:26.016623 Found 1 CPU(s) with 8 core(s) each.
1887 13:52:26.022839 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1888 13:52:26.026581 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1889 13:52:26.029726 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1890 13:52:26.032839 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1891 13:52:26.039536 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1892 13:52:26.045855 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1893 13:52:26.049612 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1894 13:52:26.056369 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1895 13:52:26.062631 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1896 13:52:26.065838 \_SB.PCI0.RP09: Added StorageD3Enable property
1897 13:52:26.072519 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1898 13:52:26.075736 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1899 13:52:26.082520 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1900 13:52:26.085721 PS2K: Passing 80 keymaps to kernel
1901 13:52:26.092459 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1902 13:52:26.099062 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1903 13:52:26.105826 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1904 13:52:26.112146 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1905 13:52:26.118607 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1906 13:52:26.125439 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1907 13:52:26.132271 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1908 13:52:26.138434 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1909 13:52:26.142084 ACPI: added table 2/32, length now 44
1910 13:52:26.142194 ACPI: * MCFG
1911 13:52:26.145128 ACPI: added table 3/32, length now 48
1912 13:52:26.148814 ACPI: * TPM2
1913 13:52:26.152001 TPM2 log created at 0x769f0000
1914 13:52:26.155547 ACPI: added table 4/32, length now 52
1915 13:52:26.158618 ACPI: * MADT
1916 13:52:26.158696 SCI is IRQ9
1917 13:52:26.162245 ACPI: added table 5/32, length now 56
1918 13:52:26.165447 current = 76b09850
1919 13:52:26.165554 ACPI: * DMAR
1920 13:52:26.168609 ACPI: added table 6/32, length now 60
1921 13:52:26.171660 ACPI: added table 7/32, length now 64
1922 13:52:26.175274 ACPI: * HPET
1923 13:52:26.178548 ACPI: added table 8/32, length now 68
1924 13:52:26.181671 ACPI: done.
1925 13:52:26.181777 ACPI tables: 35216 bytes.
1926 13:52:26.184917 smbios_write_tables: 769ef000
1927 13:52:26.188359 EC returned error result code 3
1928 13:52:26.191504 Couldn't obtain OEM name from CBI
1929 13:52:26.195287 Create SMBIOS type 16
1930 13:52:26.198401 Create SMBIOS type 17
1931 13:52:26.201995 GENERIC: 0.0 (WIFI Device)
1932 13:52:26.205334 SMBIOS tables: 1734 bytes.
1933 13:52:26.208259 Writing table forward entry at 0x00000500
1934 13:52:26.214901 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1935 13:52:26.218461 Writing coreboot table at 0x76b25000
1936 13:52:26.224829 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1937 13:52:26.228143 1. 0000000000001000-000000000009ffff: RAM
1938 13:52:26.231733 2. 00000000000a0000-00000000000fffff: RESERVED
1939 13:52:26.238441 3. 0000000000100000-00000000769eefff: RAM
1940 13:52:26.241494 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1941 13:52:26.248066 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1942 13:52:26.254509 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1943 13:52:26.257730 7. 0000000077000000-000000007fbfffff: RESERVED
1944 13:52:26.264802 8. 00000000c0000000-00000000cfffffff: RESERVED
1945 13:52:26.267955 9. 00000000f8000000-00000000f9ffffff: RESERVED
1946 13:52:26.271128 10. 00000000fb000000-00000000fb000fff: RESERVED
1947 13:52:26.277546 11. 00000000fe000000-00000000fe00ffff: RESERVED
1948 13:52:26.281158 12. 00000000fed80000-00000000fed87fff: RESERVED
1949 13:52:26.287704 13. 00000000fed90000-00000000fed92fff: RESERVED
1950 13:52:26.290783 14. 00000000feda0000-00000000feda1fff: RESERVED
1951 13:52:26.297658 15. 00000000fedc0000-00000000feddffff: RESERVED
1952 13:52:26.300732 16. 0000000100000000-00000004803fffff: RAM
1953 13:52:26.304385 Passing 4 GPIOs to payload:
1954 13:52:26.307583 NAME | PORT | POLARITY | VALUE
1955 13:52:26.313895 lid | undefined | high | high
1956 13:52:26.320673 power | undefined | high | low
1957 13:52:26.324055 oprom | undefined | high | low
1958 13:52:26.330763 EC in RW | 0x000000e5 | high | high
1959 13:52:26.337384 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e94e
1960 13:52:26.340602 coreboot table: 1576 bytes.
1961 13:52:26.343765 IMD ROOT 0. 0x76fff000 0x00001000
1962 13:52:26.347322 IMD SMALL 1. 0x76ffe000 0x00001000
1963 13:52:26.350267 FSP MEMORY 2. 0x76c4e000 0x003b0000
1964 13:52:26.353950 VPD 3. 0x76c4d000 0x00000367
1965 13:52:26.357284 RO MCACHE 4. 0x76c4c000 0x00000fdc
1966 13:52:26.360236 CONSOLE 5. 0x76c2c000 0x00020000
1967 13:52:26.367246 FMAP 6. 0x76c2b000 0x00000578
1968 13:52:26.370462 TIME STAMP 7. 0x76c2a000 0x00000910
1969 13:52:26.373675 VBOOT WORK 8. 0x76c16000 0x00014000
1970 13:52:26.376820 ROMSTG STCK 9. 0x76c15000 0x00001000
1971 13:52:26.380345 AFTER CAR 10. 0x76c0a000 0x0000b000
1972 13:52:26.383538 RAMSTAGE 11. 0x76b97000 0x00073000
1973 13:52:26.386726 REFCODE 12. 0x76b42000 0x00055000
1974 13:52:26.390392 SMM BACKUP 13. 0x76b32000 0x00010000
1975 13:52:26.396297 4f444749 14. 0x76b30000 0x00002000
1976 13:52:26.400181 EXT VBT15. 0x76b2d000 0x0000219f
1977 13:52:26.403174 COREBOOT 16. 0x76b25000 0x00008000
1978 13:52:26.406329 ACPI 17. 0x76b01000 0x00024000
1979 13:52:26.409407 ACPI GNVS 18. 0x76b00000 0x00001000
1980 13:52:26.412672 RAMOOPS 19. 0x76a00000 0x00100000
1981 13:52:26.416459 TPM2 TCGLOG20. 0x769f0000 0x00010000
1982 13:52:26.419578 SMBIOS 21. 0x769ef000 0x00000800
1983 13:52:26.423057 IMD small region:
1984 13:52:26.426444 IMD ROOT 0. 0x76ffec00 0x00000400
1985 13:52:26.429415 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1986 13:52:26.435889 POWER STATE 2. 0x76ffeb80 0x00000044
1987 13:52:26.439120 ROMSTAGE 3. 0x76ffeb60 0x00000004
1988 13:52:26.442874 MEM INFO 4. 0x76ffe980 0x000001e0
1989 13:52:26.449161 BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms
1990 13:52:26.452279 MTRR: Physical address space:
1991 13:52:26.458947 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1992 13:52:26.462161 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1993 13:52:26.468848 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1994 13:52:26.475668 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1995 13:52:26.482287 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1996 13:52:26.488483 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1997 13:52:26.495384 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1998 13:52:26.498417 MTRR: Fixed MSR 0x250 0x0606060606060606
1999 13:52:26.501931 MTRR: Fixed MSR 0x258 0x0606060606060606
2000 13:52:26.508362 MTRR: Fixed MSR 0x259 0x0000000000000000
2001 13:52:26.512266 MTRR: Fixed MSR 0x268 0x0606060606060606
2002 13:52:26.515252 MTRR: Fixed MSR 0x269 0x0606060606060606
2003 13:52:26.518514 MTRR: Fixed MSR 0x26a 0x0606060606060606
2004 13:52:26.525304 MTRR: Fixed MSR 0x26b 0x0606060606060606
2005 13:52:26.528217 MTRR: Fixed MSR 0x26c 0x0606060606060606
2006 13:52:26.531824 MTRR: Fixed MSR 0x26d 0x0606060606060606
2007 13:52:26.534883 MTRR: Fixed MSR 0x26e 0x0606060606060606
2008 13:52:26.541467 MTRR: Fixed MSR 0x26f 0x0606060606060606
2009 13:52:26.544707 call enable_fixed_mtrr()
2010 13:52:26.548405 CPU physical address size: 39 bits
2011 13:52:26.551664 MTRR: default type WB/UC MTRR counts: 6/7.
2012 13:52:26.554822 MTRR: WB selected as default type.
2013 13:52:26.561599 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2014 13:52:26.567938 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2015 13:52:26.574506 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2016 13:52:26.580947 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
2017 13:52:26.587555 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
2018 13:52:26.594137 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
2019 13:52:26.600833 MTRR: Fixed MSR 0x250 0x0606060606060606
2020 13:52:26.604335 MTRR: Fixed MSR 0x258 0x0606060606060606
2021 13:52:26.607653 MTRR: Fixed MSR 0x259 0x0000000000000000
2022 13:52:26.610748 MTRR: Fixed MSR 0x268 0x0606060606060606
2023 13:52:26.617577 MTRR: Fixed MSR 0x269 0x0606060606060606
2024 13:52:26.620731 MTRR: Fixed MSR 0x26a 0x0606060606060606
2025 13:52:26.623992 MTRR: Fixed MSR 0x26b 0x0606060606060606
2026 13:52:26.627169 MTRR: Fixed MSR 0x26c 0x0606060606060606
2027 13:52:26.633786 MTRR: Fixed MSR 0x26d 0x0606060606060606
2028 13:52:26.637339 MTRR: Fixed MSR 0x26e 0x0606060606060606
2029 13:52:26.640319 MTRR: Fixed MSR 0x26f 0x0606060606060606
2030 13:52:26.640432
2031 13:52:26.644316 MTRR check
2032 13:52:26.647437 call enable_fixed_mtrr()
2033 13:52:26.647528 Fixed MTRRs : Enabled
2034 13:52:26.650954 Variable MTRRs: Enabled
2035 13:52:26.651054
2036 13:52:26.654197 CPU physical address size: 39 bits
2037 13:52:26.661807 BS: BS_WRITE_TABLES exit times (exec / console): 52 / 151 ms
2038 13:52:26.664962 MTRR: Fixed MSR 0x250 0x0606060606060606
2039 13:52:26.671633 MTRR: Fixed MSR 0x250 0x0606060606060606
2040 13:52:26.675351 MTRR: Fixed MSR 0x258 0x0606060606060606
2041 13:52:26.678344 MTRR: Fixed MSR 0x259 0x0000000000000000
2042 13:52:26.681590 MTRR: Fixed MSR 0x268 0x0606060606060606
2043 13:52:26.688441 MTRR: Fixed MSR 0x269 0x0606060606060606
2044 13:52:26.691568 MTRR: Fixed MSR 0x26a 0x0606060606060606
2045 13:52:26.695135 MTRR: Fixed MSR 0x26b 0x0606060606060606
2046 13:52:26.698209 MTRR: Fixed MSR 0x26c 0x0606060606060606
2047 13:52:26.705042 MTRR: Fixed MSR 0x26d 0x0606060606060606
2048 13:52:26.708102 MTRR: Fixed MSR 0x26e 0x0606060606060606
2049 13:52:26.711205 MTRR: Fixed MSR 0x26f 0x0606060606060606
2050 13:52:26.718612 MTRR: Fixed MSR 0x258 0x0606060606060606
2051 13:52:26.718696 call enable_fixed_mtrr()
2052 13:52:26.725308 MTRR: Fixed MSR 0x259 0x0000000000000000
2053 13:52:26.728611 MTRR: Fixed MSR 0x268 0x0606060606060606
2054 13:52:26.731766 MTRR: Fixed MSR 0x269 0x0606060606060606
2055 13:52:26.735547 MTRR: Fixed MSR 0x26a 0x0606060606060606
2056 13:52:26.742156 MTRR: Fixed MSR 0x26b 0x0606060606060606
2057 13:52:26.745085 MTRR: Fixed MSR 0x26c 0x0606060606060606
2058 13:52:26.748430 MTRR: Fixed MSR 0x26d 0x0606060606060606
2059 13:52:26.751991 MTRR: Fixed MSR 0x26e 0x0606060606060606
2060 13:52:26.758529 MTRR: Fixed MSR 0x26f 0x0606060606060606
2061 13:52:26.761738 CPU physical address size: 39 bits
2062 13:52:26.765812 call enable_fixed_mtrr()
2063 13:52:26.769426 MTRR: Fixed MSR 0x250 0x0606060606060606
2064 13:52:26.775802 MTRR: Fixed MSR 0x250 0x0606060606060606
2065 13:52:26.779036 MTRR: Fixed MSR 0x258 0x0606060606060606
2066 13:52:26.782350 MTRR: Fixed MSR 0x259 0x0000000000000000
2067 13:52:26.786113 MTRR: Fixed MSR 0x268 0x0606060606060606
2068 13:52:26.792451 MTRR: Fixed MSR 0x269 0x0606060606060606
2069 13:52:26.795640 MTRR: Fixed MSR 0x26a 0x0606060606060606
2070 13:52:26.799268 MTRR: Fixed MSR 0x26b 0x0606060606060606
2071 13:52:26.802541 MTRR: Fixed MSR 0x26c 0x0606060606060606
2072 13:52:26.808738 MTRR: Fixed MSR 0x26d 0x0606060606060606
2073 13:52:26.812297 MTRR: Fixed MSR 0x26e 0x0606060606060606
2074 13:52:26.815546 MTRR: Fixed MSR 0x26f 0x0606060606060606
2075 13:52:26.822804 MTRR: Fixed MSR 0x258 0x0606060606060606
2076 13:52:26.826235 MTRR: Fixed MSR 0x259 0x0000000000000000
2077 13:52:26.829455 MTRR: Fixed MSR 0x268 0x0606060606060606
2078 13:52:26.832541 MTRR: Fixed MSR 0x269 0x0606060606060606
2079 13:52:26.839593 MTRR: Fixed MSR 0x26a 0x0606060606060606
2080 13:52:26.842832 MTRR: Fixed MSR 0x26b 0x0606060606060606
2081 13:52:26.845912 MTRR: Fixed MSR 0x26c 0x0606060606060606
2082 13:52:26.849454 MTRR: Fixed MSR 0x26d 0x0606060606060606
2083 13:52:26.855795 MTRR: Fixed MSR 0x26e 0x0606060606060606
2084 13:52:26.859469 MTRR: Fixed MSR 0x26f 0x0606060606060606
2085 13:52:26.862364 call enable_fixed_mtrr()
2086 13:52:26.865836 call enable_fixed_mtrr()
2087 13:52:26.869212 CPU physical address size: 39 bits
2088 13:52:26.872883 MTRR: Fixed MSR 0x250 0x0606060606060606
2089 13:52:26.875778 MTRR: Fixed MSR 0x250 0x0606060606060606
2090 13:52:26.882187 MTRR: Fixed MSR 0x258 0x0606060606060606
2091 13:52:26.885593 MTRR: Fixed MSR 0x259 0x0000000000000000
2092 13:52:26.889199 MTRR: Fixed MSR 0x268 0x0606060606060606
2093 13:52:26.892388 MTRR: Fixed MSR 0x269 0x0606060606060606
2094 13:52:26.898733 MTRR: Fixed MSR 0x26a 0x0606060606060606
2095 13:52:26.902377 MTRR: Fixed MSR 0x26b 0x0606060606060606
2096 13:52:26.905533 MTRR: Fixed MSR 0x26c 0x0606060606060606
2097 13:52:26.908667 MTRR: Fixed MSR 0x26d 0x0606060606060606
2098 13:52:26.912419 MTRR: Fixed MSR 0x26e 0x0606060606060606
2099 13:52:26.918721 MTRR: Fixed MSR 0x26f 0x0606060606060606
2100 13:52:26.922403 MTRR: Fixed MSR 0x258 0x0606060606060606
2101 13:52:26.925427 call enable_fixed_mtrr()
2102 13:52:26.928697 MTRR: Fixed MSR 0x259 0x0000000000000000
2103 13:52:26.935405 MTRR: Fixed MSR 0x268 0x0606060606060606
2104 13:52:26.938653 MTRR: Fixed MSR 0x269 0x0606060606060606
2105 13:52:26.941939 MTRR: Fixed MSR 0x26a 0x0606060606060606
2106 13:52:26.945522 MTRR: Fixed MSR 0x26b 0x0606060606060606
2107 13:52:26.951852 MTRR: Fixed MSR 0x26c 0x0606060606060606
2108 13:52:26.955064 MTRR: Fixed MSR 0x26d 0x0606060606060606
2109 13:52:26.958033 MTRR: Fixed MSR 0x26e 0x0606060606060606
2110 13:52:26.961599 MTRR: Fixed MSR 0x26f 0x0606060606060606
2111 13:52:26.967813 CPU physical address size: 39 bits
2112 13:52:26.971988 call enable_fixed_mtrr()
2113 13:52:26.976317 Checking cr50 for pending updates
2114 13:52:26.979850 CPU physical address size: 39 bits
2115 13:52:26.983329 CPU physical address size: 39 bits
2116 13:52:26.986551 CPU physical address size: 39 bits
2117 13:52:26.990035 Reading cr50 TPM mode
2118 13:52:27.000435 BS: BS_PAYLOAD_LOAD entry times (exec / console): 326 / 6 ms
2119 13:52:27.010283 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2120 13:52:27.013561 Checking segment from ROM address 0xffc02b38
2121 13:52:27.017231 Checking segment from ROM address 0xffc02b54
2122 13:52:27.023858 Loading segment from ROM address 0xffc02b38
2123 13:52:27.023972 code (compression=0)
2124 13:52:27.033332 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2125 13:52:27.043351 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2126 13:52:27.043462 it's not compressed!
2127 13:52:27.182893 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2128 13:52:27.189442 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2129 13:52:27.196208 Loading segment from ROM address 0xffc02b54
2130 13:52:27.199172 Entry Point 0x30000000
2131 13:52:27.199296 Loaded segments
2132 13:52:27.206236 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2133 13:52:27.251280 Finalizing chipset.
2134 13:52:27.254430 Finalizing SMM.
2135 13:52:27.254521 APMC done.
2136 13:52:27.260735 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2137 13:52:27.264480 mp_park_aps done after 0 msecs.
2138 13:52:27.267579 Jumping to boot code at 0x30000000(0x76b25000)
2139 13:52:27.277708 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2140 13:52:27.277914
2141 13:52:27.278057
2142 13:52:27.278161
2143 13:52:27.280789 Starting depthcharge on Voema...
2144 13:52:27.280893
2145 13:52:27.281325 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2146 13:52:27.281462 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2147 13:52:27.281579 Setting prompt string to ['volteer:']
2148 13:52:27.281703 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2149 13:52:27.290903 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2150 13:52:27.291015
2151 13:52:27.297608 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2152 13:52:27.297713
2153 13:52:27.303859 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2154 13:52:27.303941
2155 13:52:27.307437 Failed to find eMMC card reader
2156 13:52:27.307537
2157 13:52:27.307632 Wipe memory regions:
2158 13:52:27.310538
2159 13:52:27.313677 [0x00000000001000, 0x000000000a0000)
2160 13:52:27.313781
2161 13:52:27.316831 [0x00000000100000, 0x00000030000000)
2162 13:52:27.350791
2163 13:52:27.354400 [0x00000032662db0, 0x000000769ef000)
2164 13:52:27.402202
2165 13:52:27.405100 [0x00000100000000, 0x00000480400000)
2166 13:52:28.015672
2167 13:52:28.018782 ec_init: CrosEC protocol v3 supported (256, 256)
2168 13:52:28.450623
2169 13:52:28.450764 R8152: Initializing
2170 13:52:28.450836
2171 13:52:28.453746 Version 6 (ocp_data = 5c30)
2172 13:52:28.453831
2173 13:52:28.456822 R8152: Done initializing
2174 13:52:28.456906
2175 13:52:28.459949 Adding net device
2176 13:52:28.761133
2177 13:52:28.764362 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2178 13:52:28.764467
2179 13:52:28.764534
2180 13:52:28.764614
2181 13:52:28.768147 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2183 13:52:28.868931 volteer: tftpboot 192.168.201.1 10062410/tftp-deploy-0zxysv4g/kernel/bzImage 10062410/tftp-deploy-0zxysv4g/kernel/cmdline 10062410/tftp-deploy-0zxysv4g/ramdisk/ramdisk.cpio.gz
2184 13:52:28.869088 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2185 13:52:28.869216 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2186 13:52:28.873202 tftpboot 192.168.201.1 10062410/tftp-deploy-0zxysv4g/kernel/bzIploy-0zxysv4g/kernel/cmdline 10062410/tftp-deploy-0zxysv4g/ramdisk/ramdisk.cpio.gz
2187 13:52:28.873290
2188 13:52:28.873356 Waiting for link
2189 13:52:29.076013
2190 13:52:29.076183 done.
2191 13:52:29.076257
2192 13:52:29.076319 MAC: 00:24:32:30:78:e4
2193 13:52:29.076379
2194 13:52:29.079269 Sending DHCP discover... done.
2195 13:52:29.079368
2196 13:52:29.082879 Waiting for reply... done.
2197 13:52:29.082967
2198 13:52:29.085832 Sending DHCP request... done.
2199 13:52:29.085936
2200 13:52:29.089144 Waiting for reply... done.
2201 13:52:29.089244
2202 13:52:29.092771 My ip is 192.168.201.13
2203 13:52:29.092870
2204 13:52:29.095886 The DHCP server ip is 192.168.201.1
2205 13:52:29.095970
2206 13:52:29.099290 TFTP server IP predefined by user: 192.168.201.1
2207 13:52:29.099388
2208 13:52:29.105669 Bootfile predefined by user: 10062410/tftp-deploy-0zxysv4g/kernel/bzImage
2209 13:52:29.105809
2210 13:52:29.108842 Sending tftp read request... done.
2211 13:52:29.112641
2212 13:52:29.116534 Waiting for the transfer...
2213 13:52:29.116619
2214 13:52:29.744207 00000000 ################################################################
2215 13:52:29.744350
2216 13:52:30.378683 00080000 ################################################################
2217 13:52:30.378852
2218 13:52:31.014353 00100000 ################################################################
2219 13:52:31.014507
2220 13:52:31.664350 00180000 ################################################################
2221 13:52:31.664534
2222 13:52:32.282488 00200000 ################################################################
2223 13:52:32.282662
2224 13:52:32.919245 00280000 ################################################################
2225 13:52:32.919420
2226 13:52:33.553387 00300000 ################################################################
2227 13:52:33.553566
2228 13:52:34.178112 00380000 ################################################################
2229 13:52:34.178376
2230 13:52:34.825297 00400000 ################################################################
2231 13:52:34.825432
2232 13:52:35.452328 00480000 ################################################################
2233 13:52:35.452504
2234 13:52:36.067535 00500000 ################################################################
2235 13:52:36.067698
2236 13:52:36.614871 00580000 ################################################################
2237 13:52:36.615027
2238 13:52:37.178019 00600000 ################################################################
2239 13:52:37.178200
2240 13:52:37.727144 00680000 ################################################################
2241 13:52:37.727330
2242 13:52:38.297216 00700000 ################################################################
2243 13:52:38.297378
2244 13:52:38.923900 00780000 ################################################################
2245 13:52:38.924074
2246 13:52:39.544407 00800000 ################################################################
2247 13:52:39.544552
2248 13:52:40.138725 00880000 ################################################################
2249 13:52:40.138903
2250 13:52:40.707683 00900000 ################################################################
2251 13:52:40.707843
2252 13:52:41.291934 00980000 ################################################################
2253 13:52:41.292094
2254 13:52:41.703180 00a00000 ############################################## done.
2255 13:52:41.703366
2256 13:52:41.706292 The bootfile was 10854400 bytes long.
2257 13:52:41.706408
2258 13:52:41.709527 Sending tftp read request... done.
2259 13:52:41.709625
2260 13:52:41.712643 Waiting for the transfer...
2261 13:52:41.712764
2262 13:52:42.298183 00000000 ################################################################
2263 13:52:42.298373
2264 13:52:42.871281 00080000 ################################################################
2265 13:52:42.871432
2266 13:52:43.449858 00100000 ################################################################
2267 13:52:43.449999
2268 13:52:44.025136 00180000 ################################################################
2269 13:52:44.025276
2270 13:52:44.600763 00200000 ################################################################
2271 13:52:44.600905
2272 13:52:45.161363 00280000 ################################################################
2273 13:52:45.161517
2274 13:52:45.714261 00300000 ################################################################
2275 13:52:45.714419
2276 13:52:46.278502 00380000 ################################################################
2277 13:52:46.278659
2278 13:52:46.824599 00400000 ################################################################
2279 13:52:46.824757
2280 13:52:47.410086 00480000 ################################################################
2281 13:52:47.410667
2282 13:52:48.054021 00500000 ################################################################
2283 13:52:48.054530
2284 13:52:48.693530 00580000 ################################################################
2285 13:52:48.693784
2286 13:52:49.246007 00600000 ################################################################
2287 13:52:49.246195
2288 13:52:49.287656 00680000 ##### done.
2289 13:52:49.287828
2290 13:52:49.291092 Sending tftp read request... done.
2291 13:52:49.291221
2292 13:52:49.294025 Waiting for the transfer...
2293 13:52:49.294133
2294 13:52:49.294230 00000000 # done.
2295 13:52:49.294383
2296 13:52:49.303758 Command line loaded dynamically from TFTP file: 10062410/tftp-deploy-0zxysv4g/kernel/cmdline
2297 13:52:49.303909
2298 13:52:49.323646 The command line is: console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10062410/extract-nfsrootfs-9mequpry,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2299 13:52:49.327784
2300 13:52:49.330869 Shutting down all USB controllers.
2301 13:52:49.331013
2302 13:52:49.331115 Removing current net device
2303 13:52:49.331205
2304 13:52:49.333984 Finalizing coreboot
2305 13:52:49.334096
2306 13:52:49.340685 Exiting depthcharge with code 4 at timestamp: 30638836
2307 13:52:49.340823
2308 13:52:49.340955
2309 13:52:49.341100 Starting kernel ...
2310 13:52:49.341248
2311 13:52:49.341366
2312 13:52:49.342010 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
2313 13:52:49.342141 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
2314 13:52:49.342306 Setting prompt string to ['Linux version [0-9]']
2315 13:52:49.342427 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2316 13:52:49.342557 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2318 13:57:12.342416 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
2320 13:57:12.342691 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
2322 13:57:12.342849 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2325 13:57:12.343152 end: 2 depthcharge-action (duration 00:05:00) [common]
2327 13:57:12.343417 Cleaning after the job
2328 13:57:12.343511 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062410/tftp-deploy-0zxysv4g/ramdisk
2329 13:57:12.344360 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062410/tftp-deploy-0zxysv4g/kernel
2330 13:57:12.345520 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062410/tftp-deploy-0zxysv4g/nfsrootfs
2331 13:57:12.412222 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062410/tftp-deploy-0zxysv4g/modules
2332 13:57:12.412903 start: 4.1 power-off (timeout 00:00:30) [common]
2333 13:57:12.413078 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-12' '--port=1' '--command=off'
2334 13:57:12.488351 >> Command sent successfully.
2335 13:57:12.490771 Returned 0 in 0 seconds
2336 13:57:12.591545 end: 4.1 power-off (duration 00:00:00) [common]
2338 13:57:12.592306 start: 4.2 read-feedback (timeout 00:10:00) [common]
2339 13:57:12.592974 Listened to connection for namespace 'common' for up to 1s
2340 13:57:13.595570 Finalising connection for namespace 'common'
2341 13:57:13.596271 Disconnecting from shell: Finalise
2342 13:57:13.596751
2343 13:57:13.698106 end: 4.2 read-feedback (duration 00:00:01) [common]
2344 13:57:13.698736 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10062410
2345 13:57:14.184581 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10062410
2346 13:57:14.184778 JobError: Your job cannot terminate cleanly.