Boot log: asus-C436FA-Flip-hatch
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
1 13:57:07.321548 lava-dispatcher, installed at version: 2023.01
2 13:57:07.321808 start: 0 validate
3 13:57:07.321954 Start time: 2023-04-20 13:57:07.321946+00:00 (UTC)
4 13:57:07.322103 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:57:07.322247 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230414.0%2Famd64%2Finitrd.cpio.gz exists
6 13:57:07.612854 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:57:07.613052 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.280-cip96-59-g4b02e7efb967d%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:57:07.902926 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:57:07.903125 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230414.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 13:57:08.191710 Using caching service: 'http://localhost/cache/?uri=%s'
11 13:57:08.191912 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.280-cip96-59-g4b02e7efb967d%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 13:57:08.482312 validate duration: 1.16
14 13:57:08.482619 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 13:57:08.482729 start: 1.1 download-retry (timeout 00:10:00) [common]
16 13:57:08.482828 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 13:57:08.482963 Not decompressing ramdisk as can be used compressed.
18 13:57:08.483060 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230414.0/amd64/initrd.cpio.gz
19 13:57:08.483133 saving as /var/lib/lava/dispatcher/tmp/10062407/tftp-deploy-m7acwk1s/ramdisk/initrd.cpio.gz
20 13:57:08.483202 total size: 5432117 (5MB)
21 13:57:08.484320 progress 0% (0MB)
22 13:57:08.486065 progress 5% (0MB)
23 13:57:08.487628 progress 10% (0MB)
24 13:57:08.489190 progress 15% (0MB)
25 13:57:08.490942 progress 20% (1MB)
26 13:57:08.492514 progress 25% (1MB)
27 13:57:08.494084 progress 30% (1MB)
28 13:57:08.495796 progress 35% (1MB)
29 13:57:08.497320 progress 40% (2MB)
30 13:57:08.498927 progress 45% (2MB)
31 13:57:08.500577 progress 50% (2MB)
32 13:57:08.502444 progress 55% (2MB)
33 13:57:08.504066 progress 60% (3MB)
34 13:57:08.505687 progress 65% (3MB)
35 13:57:08.507523 progress 70% (3MB)
36 13:57:08.509155 progress 75% (3MB)
37 13:57:08.510773 progress 80% (4MB)
38 13:57:08.512432 progress 85% (4MB)
39 13:57:08.514318 progress 90% (4MB)
40 13:57:08.515953 progress 95% (4MB)
41 13:57:08.517667 progress 100% (5MB)
42 13:57:08.517909 5MB downloaded in 0.03s (149.28MB/s)
43 13:57:08.518098 end: 1.1.1 http-download (duration 00:00:00) [common]
45 13:57:08.518532 end: 1.1 download-retry (duration 00:00:00) [common]
46 13:57:08.518673 start: 1.2 download-retry (timeout 00:10:00) [common]
47 13:57:08.518805 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 13:57:08.518988 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.280-cip96-59-g4b02e7efb967d/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 13:57:08.519104 saving as /var/lib/lava/dispatcher/tmp/10062407/tftp-deploy-m7acwk1s/kernel/bzImage
50 13:57:08.519210 total size: 10854400 (10MB)
51 13:57:08.519310 No compression specified
52 13:57:08.521093 progress 0% (0MB)
53 13:57:08.524448 progress 5% (0MB)
54 13:57:08.527864 progress 10% (1MB)
55 13:57:08.531144 progress 15% (1MB)
56 13:57:08.534568 progress 20% (2MB)
57 13:57:08.537815 progress 25% (2MB)
58 13:57:08.541202 progress 30% (3MB)
59 13:57:08.544500 progress 35% (3MB)
60 13:57:08.547849 progress 40% (4MB)
61 13:57:08.551050 progress 45% (4MB)
62 13:57:08.554089 progress 50% (5MB)
63 13:57:08.557270 progress 55% (5MB)
64 13:57:08.560278 progress 60% (6MB)
65 13:57:08.563482 progress 65% (6MB)
66 13:57:08.566451 progress 70% (7MB)
67 13:57:08.569577 progress 75% (7MB)
68 13:57:08.572531 progress 80% (8MB)
69 13:57:08.575655 progress 85% (8MB)
70 13:57:08.578776 progress 90% (9MB)
71 13:57:08.581740 progress 95% (9MB)
72 13:57:08.584877 progress 100% (10MB)
73 13:57:08.585026 10MB downloaded in 0.07s (157.29MB/s)
74 13:57:08.585181 end: 1.2.1 http-download (duration 00:00:00) [common]
76 13:57:08.585435 end: 1.2 download-retry (duration 00:00:00) [common]
77 13:57:08.585540 start: 1.3 download-retry (timeout 00:10:00) [common]
78 13:57:08.585645 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 13:57:08.585785 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230414.0/amd64/full.rootfs.tar.xz
80 13:57:08.585864 saving as /var/lib/lava/dispatcher/tmp/10062407/tftp-deploy-m7acwk1s/nfsrootfs/full.rootfs.tar
81 13:57:08.585934 total size: 207129528 (197MB)
82 13:57:08.586002 Using unxz to decompress xz
83 13:57:08.590004 progress 0% (0MB)
84 13:57:09.201098 progress 5% (9MB)
85 13:57:09.788356 progress 10% (19MB)
86 13:57:10.465213 progress 15% (29MB)
87 13:57:10.871132 progress 20% (39MB)
88 13:57:11.275338 progress 25% (49MB)
89 13:57:11.974535 progress 30% (59MB)
90 13:57:12.641820 progress 35% (69MB)
91 13:57:13.398037 progress 40% (79MB)
92 13:57:14.087504 progress 45% (88MB)
93 13:57:14.816288 progress 50% (98MB)
94 13:57:15.610817 progress 55% (108MB)
95 13:57:16.438728 progress 60% (118MB)
96 13:57:16.600014 progress 65% (128MB)
97 13:57:16.760454 progress 70% (138MB)
98 13:57:16.863948 progress 75% (148MB)
99 13:57:16.944264 progress 80% (158MB)
100 13:57:17.018537 progress 85% (167MB)
101 13:57:17.136154 progress 90% (177MB)
102 13:57:17.453477 progress 95% (187MB)
103 13:57:18.124893 progress 100% (197MB)
104 13:57:18.130271 197MB downloaded in 9.54s (20.70MB/s)
105 13:57:18.130582 end: 1.3.1 http-download (duration 00:00:10) [common]
107 13:57:18.130867 end: 1.3 download-retry (duration 00:00:10) [common]
108 13:57:18.130966 start: 1.4 download-retry (timeout 00:09:50) [common]
109 13:57:18.131065 start: 1.4.1 http-download (timeout 00:09:50) [common]
110 13:57:18.131208 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.280-cip96-59-g4b02e7efb967d/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 13:57:18.131289 saving as /var/lib/lava/dispatcher/tmp/10062407/tftp-deploy-m7acwk1s/modules/modules.tar
112 13:57:18.131356 total size: 483736 (0MB)
113 13:57:18.131425 Using unxz to decompress xz
114 13:57:18.135314 progress 6% (0MB)
115 13:57:18.135767 progress 13% (0MB)
116 13:57:18.136026 progress 20% (0MB)
117 13:57:18.137501 progress 27% (0MB)
118 13:57:18.139820 progress 33% (0MB)
119 13:57:18.142137 progress 40% (0MB)
120 13:57:18.144141 progress 47% (0MB)
121 13:57:18.146608 progress 54% (0MB)
122 13:57:18.148716 progress 60% (0MB)
123 13:57:18.150877 progress 67% (0MB)
124 13:57:18.152957 progress 74% (0MB)
125 13:57:18.155017 progress 81% (0MB)
126 13:57:18.157076 progress 88% (0MB)
127 13:57:18.159566 progress 94% (0MB)
128 13:57:18.161880 progress 100% (0MB)
129 13:57:18.169295 0MB downloaded in 0.04s (12.16MB/s)
130 13:57:18.169577 end: 1.4.1 http-download (duration 00:00:00) [common]
132 13:57:18.169887 end: 1.4 download-retry (duration 00:00:00) [common]
133 13:57:18.169999 start: 1.5 prepare-tftp-overlay (timeout 00:09:50) [common]
134 13:57:18.170152 start: 1.5.1 extract-nfsrootfs (timeout 00:09:50) [common]
135 13:57:20.948043 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10062407/extract-nfsrootfs-mi4465mv
136 13:57:20.948265 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
137 13:57:20.948378 start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
138 13:57:20.948563 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10062407/lava-overlay-2akwh6ep
139 13:57:20.948705 makedir: /var/lib/lava/dispatcher/tmp/10062407/lava-overlay-2akwh6ep/lava-10062407/bin
140 13:57:20.948821 makedir: /var/lib/lava/dispatcher/tmp/10062407/lava-overlay-2akwh6ep/lava-10062407/tests
141 13:57:20.948928 makedir: /var/lib/lava/dispatcher/tmp/10062407/lava-overlay-2akwh6ep/lava-10062407/results
142 13:57:20.949044 Creating /var/lib/lava/dispatcher/tmp/10062407/lava-overlay-2akwh6ep/lava-10062407/bin/lava-add-keys
143 13:57:20.949200 Creating /var/lib/lava/dispatcher/tmp/10062407/lava-overlay-2akwh6ep/lava-10062407/bin/lava-add-sources
144 13:57:20.949339 Creating /var/lib/lava/dispatcher/tmp/10062407/lava-overlay-2akwh6ep/lava-10062407/bin/lava-background-process-start
145 13:57:20.949475 Creating /var/lib/lava/dispatcher/tmp/10062407/lava-overlay-2akwh6ep/lava-10062407/bin/lava-background-process-stop
146 13:57:20.949619 Creating /var/lib/lava/dispatcher/tmp/10062407/lava-overlay-2akwh6ep/lava-10062407/bin/lava-common-functions
147 13:57:20.949759 Creating /var/lib/lava/dispatcher/tmp/10062407/lava-overlay-2akwh6ep/lava-10062407/bin/lava-echo-ipv4
148 13:57:20.949897 Creating /var/lib/lava/dispatcher/tmp/10062407/lava-overlay-2akwh6ep/lava-10062407/bin/lava-install-packages
149 13:57:20.950029 Creating /var/lib/lava/dispatcher/tmp/10062407/lava-overlay-2akwh6ep/lava-10062407/bin/lava-installed-packages
150 13:57:20.950160 Creating /var/lib/lava/dispatcher/tmp/10062407/lava-overlay-2akwh6ep/lava-10062407/bin/lava-os-build
151 13:57:20.950294 Creating /var/lib/lava/dispatcher/tmp/10062407/lava-overlay-2akwh6ep/lava-10062407/bin/lava-probe-channel
152 13:57:20.950426 Creating /var/lib/lava/dispatcher/tmp/10062407/lava-overlay-2akwh6ep/lava-10062407/bin/lava-probe-ip
153 13:57:20.950556 Creating /var/lib/lava/dispatcher/tmp/10062407/lava-overlay-2akwh6ep/lava-10062407/bin/lava-target-ip
154 13:57:20.950688 Creating /var/lib/lava/dispatcher/tmp/10062407/lava-overlay-2akwh6ep/lava-10062407/bin/lava-target-mac
155 13:57:20.950818 Creating /var/lib/lava/dispatcher/tmp/10062407/lava-overlay-2akwh6ep/lava-10062407/bin/lava-target-storage
156 13:57:20.950952 Creating /var/lib/lava/dispatcher/tmp/10062407/lava-overlay-2akwh6ep/lava-10062407/bin/lava-test-case
157 13:57:20.951089 Creating /var/lib/lava/dispatcher/tmp/10062407/lava-overlay-2akwh6ep/lava-10062407/bin/lava-test-event
158 13:57:20.951219 Creating /var/lib/lava/dispatcher/tmp/10062407/lava-overlay-2akwh6ep/lava-10062407/bin/lava-test-feedback
159 13:57:20.951349 Creating /var/lib/lava/dispatcher/tmp/10062407/lava-overlay-2akwh6ep/lava-10062407/bin/lava-test-raise
160 13:57:20.951480 Creating /var/lib/lava/dispatcher/tmp/10062407/lava-overlay-2akwh6ep/lava-10062407/bin/lava-test-reference
161 13:57:20.951611 Creating /var/lib/lava/dispatcher/tmp/10062407/lava-overlay-2akwh6ep/lava-10062407/bin/lava-test-runner
162 13:57:20.951743 Creating /var/lib/lava/dispatcher/tmp/10062407/lava-overlay-2akwh6ep/lava-10062407/bin/lava-test-set
163 13:57:20.951874 Creating /var/lib/lava/dispatcher/tmp/10062407/lava-overlay-2akwh6ep/lava-10062407/bin/lava-test-shell
164 13:57:20.952007 Updating /var/lib/lava/dispatcher/tmp/10062407/lava-overlay-2akwh6ep/lava-10062407/bin/lava-add-keys (debian)
165 13:57:20.952166 Updating /var/lib/lava/dispatcher/tmp/10062407/lava-overlay-2akwh6ep/lava-10062407/bin/lava-add-sources (debian)
166 13:57:20.952324 Updating /var/lib/lava/dispatcher/tmp/10062407/lava-overlay-2akwh6ep/lava-10062407/bin/lava-install-packages (debian)
167 13:57:20.952484 Updating /var/lib/lava/dispatcher/tmp/10062407/lava-overlay-2akwh6ep/lava-10062407/bin/lava-installed-packages (debian)
168 13:57:20.952640 Updating /var/lib/lava/dispatcher/tmp/10062407/lava-overlay-2akwh6ep/lava-10062407/bin/lava-os-build (debian)
169 13:57:20.952775 Creating /var/lib/lava/dispatcher/tmp/10062407/lava-overlay-2akwh6ep/lava-10062407/environment
170 13:57:20.952883 LAVA metadata
171 13:57:20.952961 - LAVA_JOB_ID=10062407
172 13:57:20.953030 - LAVA_DISPATCHER_IP=192.168.201.1
173 13:57:20.953140 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
174 13:57:20.953213 skipped lava-vland-overlay
175 13:57:20.953297 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
176 13:57:20.953385 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
177 13:57:20.953452 skipped lava-multinode-overlay
178 13:57:20.953532 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
179 13:57:20.953639 start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
180 13:57:20.953722 Loading test definitions
181 13:57:20.953869 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:48) [common]
182 13:57:20.953988 Using /lava-10062407 at stage 0
183 13:57:20.954333 uuid=10062407_1.5.2.3.1 testdef=None
184 13:57:20.954432 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
185 13:57:20.954527 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
186 13:57:20.955015 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
188 13:57:20.955258 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
189 13:57:20.955869 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
191 13:57:20.956123 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
192 13:57:20.956838 runner path: /var/lib/lava/dispatcher/tmp/10062407/lava-overlay-2akwh6ep/lava-10062407/0/tests/0_timesync-off test_uuid 10062407_1.5.2.3.1
193 13:57:20.957042 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
195 13:57:20.957302 start: 1.5.2.3.5 git-repo-action (timeout 00:09:48) [common]
196 13:57:20.957418 Using /lava-10062407 at stage 0
197 13:57:20.957574 Fetching tests from https://github.com/kernelci/test-definitions.git
198 13:57:20.957731 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/10062407/lava-overlay-2akwh6ep/lava-10062407/0/tests/1_kselftest-filesystems'
199 13:57:25.494752 Running '/usr/bin/git checkout kernelci.org
200 13:57:25.656957 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/10062407/lava-overlay-2akwh6ep/lava-10062407/0/tests/1_kselftest-filesystems/automated/linux/kselftest/kselftest.yaml
201 13:57:25.657812 uuid=10062407_1.5.2.3.5 testdef=None
202 13:57:25.658005 end: 1.5.2.3.5 git-repo-action (duration 00:00:05) [common]
204 13:57:25.658283 start: 1.5.2.3.6 test-overlay (timeout 00:09:43) [common]
205 13:57:25.659117 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
207 13:57:25.659380 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:43) [common]
208 13:57:25.660480 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
210 13:57:25.660743 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:43) [common]
211 13:57:25.661815 runner path: /var/lib/lava/dispatcher/tmp/10062407/lava-overlay-2akwh6ep/lava-10062407/0/tests/1_kselftest-filesystems test_uuid 10062407_1.5.2.3.5
212 13:57:25.661921 BOARD='asus-C436FA-Flip-hatch'
213 13:57:25.661994 BRANCH='cip-gitlab'
214 13:57:25.662062 SKIPFILE='/dev/null'
215 13:57:25.662127 SKIP_INSTALL='True'
216 13:57:25.662190 TESTPROG_URL='None'
217 13:57:25.662253 TST_CASENAME=''
218 13:57:25.662315 TST_CMDFILES='filesystems'
219 13:57:25.662477 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
221 13:57:25.662710 Creating lava-test-runner.conf files
222 13:57:25.662781 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10062407/lava-overlay-2akwh6ep/lava-10062407/0 for stage 0
223 13:57:25.662882 - 0_timesync-off
224 13:57:25.662960 - 1_kselftest-filesystems
225 13:57:25.663075 end: 1.5.2.3 test-definition (duration 00:00:05) [common]
226 13:57:25.663194 start: 1.5.2.4 compress-overlay (timeout 00:09:43) [common]
227 13:57:33.983167 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
228 13:57:33.983347 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:34) [common]
229 13:57:33.983451 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
230 13:57:33.983566 end: 1.5.2 lava-overlay (duration 00:00:13) [common]
231 13:57:33.983667 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
232 13:57:34.130184 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
233 13:57:34.130654 start: 1.5.4 extract-modules (timeout 00:09:34) [common]
234 13:57:34.130819 extracting modules file /var/lib/lava/dispatcher/tmp/10062407/tftp-deploy-m7acwk1s/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10062407/extract-nfsrootfs-mi4465mv
235 13:57:34.149065 extracting modules file /var/lib/lava/dispatcher/tmp/10062407/tftp-deploy-m7acwk1s/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10062407/extract-overlay-ramdisk-egp5xf3f/ramdisk
236 13:57:34.166820 end: 1.5.4 extract-modules (duration 00:00:00) [common]
237 13:57:34.166985 start: 1.5.5 apply-overlay-tftp (timeout 00:09:34) [common]
238 13:57:34.167098 [common] Applying overlay to NFS
239 13:57:34.167179 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10062407/compress-overlay-_h953aia/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10062407/extract-nfsrootfs-mi4465mv
240 13:57:35.113022 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
241 13:57:35.113209 start: 1.5.6 configure-preseed-file (timeout 00:09:33) [common]
242 13:57:35.113320 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
243 13:57:35.113426 start: 1.5.7 compress-ramdisk (timeout 00:09:33) [common]
244 13:57:35.113525 Building ramdisk /var/lib/lava/dispatcher/tmp/10062407/extract-overlay-ramdisk-egp5xf3f/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10062407/extract-overlay-ramdisk-egp5xf3f/ramdisk
245 13:57:35.195075 >> 30347 blocks
246 13:57:35.852777 rename /var/lib/lava/dispatcher/tmp/10062407/extract-overlay-ramdisk-egp5xf3f/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10062407/tftp-deploy-m7acwk1s/ramdisk/ramdisk.cpio.gz
247 13:57:35.853237 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
248 13:57:35.853387 start: 1.5.8 prepare-kernel (timeout 00:09:33) [common]
249 13:57:35.853531 start: 1.5.8.1 prepare-fit (timeout 00:09:33) [common]
250 13:57:35.853682 No mkimage arch provided, not using FIT.
251 13:57:35.853823 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
252 13:57:35.853955 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
253 13:57:35.854114 end: 1.5 prepare-tftp-overlay (duration 00:00:18) [common]
254 13:57:35.854256 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:33) [common]
255 13:57:35.854383 No LXC device requested
256 13:57:35.854508 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 13:57:35.854640 start: 1.7 deploy-device-env (timeout 00:09:33) [common]
258 13:57:35.854768 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 13:57:35.854878 Checking files for TFTP limit of 4294967296 bytes.
260 13:57:35.855430 end: 1 tftp-deploy (duration 00:00:27) [common]
261 13:57:35.855552 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 13:57:35.855653 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 13:57:35.855784 substitutions:
264 13:57:35.855858 - {DTB}: None
265 13:57:35.855927 - {INITRD}: 10062407/tftp-deploy-m7acwk1s/ramdisk/ramdisk.cpio.gz
266 13:57:35.855991 - {KERNEL}: 10062407/tftp-deploy-m7acwk1s/kernel/bzImage
267 13:57:35.856054 - {LAVA_MAC}: None
268 13:57:35.856151 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10062407/extract-nfsrootfs-mi4465mv
269 13:57:35.856249 - {NFS_SERVER_IP}: 192.168.201.1
270 13:57:35.856341 - {PRESEED_CONFIG}: None
271 13:57:35.856405 - {PRESEED_LOCAL}: None
272 13:57:35.856467 - {RAMDISK}: 10062407/tftp-deploy-m7acwk1s/ramdisk/ramdisk.cpio.gz
273 13:57:35.856527 - {ROOT_PART}: None
274 13:57:35.856588 - {ROOT}: None
275 13:57:35.856647 - {SERVER_IP}: 192.168.201.1
276 13:57:35.856711 - {TEE}: None
277 13:57:35.856776 Parsed boot commands:
278 13:57:35.856836 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
279 13:57:35.857028 Parsed boot commands: tftpboot 192.168.201.1 10062407/tftp-deploy-m7acwk1s/kernel/bzImage 10062407/tftp-deploy-m7acwk1s/kernel/cmdline 10062407/tftp-deploy-m7acwk1s/ramdisk/ramdisk.cpio.gz
280 13:57:35.857129 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
281 13:57:35.857222 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
282 13:57:35.857324 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
283 13:57:35.857434 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
284 13:57:35.857548 Not connected, no need to disconnect.
285 13:57:35.857658 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
286 13:57:35.857754 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
287 13:57:35.857831 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
288 13:57:35.861565 Setting prompt string to ['lava-test: # ']
289 13:57:35.861951 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
290 13:57:35.862087 end: 2.2.1 reset-connection (duration 00:00:00) [common]
291 13:57:35.862196 start: 2.2.2 reset-device (timeout 00:05:00) [common]
292 13:57:35.862300 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
293 13:57:35.862504 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
294 13:57:41.001773 >> Command sent successfully.
295 13:57:41.004238 Returned 0 in 5 seconds
296 13:57:41.105062 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
298 13:57:41.105433 end: 2.2.2 reset-device (duration 00:00:05) [common]
299 13:57:41.105549 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
300 13:57:41.105666 Setting prompt string to 'Starting depthcharge on Helios...'
301 13:57:41.105746 Changing prompt to 'Starting depthcharge on Helios...'
302 13:57:41.105837 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
303 13:57:41.106119 [Enter `^Ec?' for help]
304 13:57:41.728683
305 13:57:41.728860
306 13:57:41.738368 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
307 13:57:41.741798 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
308 13:57:41.748753 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
309 13:57:41.752005 CPU: AES supported, TXT NOT supported, VT supported
310 13:57:41.758972 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
311 13:57:41.762157 PCH: device id 0284 (rev 00) is Cometlake-U Premium
312 13:57:41.768524 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
313 13:57:41.771801 VBOOT: Loading verstage.
314 13:57:41.775066 FMAP: Found "FLASH" version 1.1 at 0xc04000.
315 13:57:41.781597 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
316 13:57:41.785030 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
317 13:57:41.788452 CBFS @ c08000 size 3f8000
318 13:57:41.794958 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
319 13:57:41.798229 CBFS: Locating 'fallback/verstage'
320 13:57:41.801642 CBFS: Found @ offset 10fb80 size 1072c
321 13:57:41.805258
322 13:57:41.805353
323 13:57:41.815457 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
324 13:57:41.829358 Probing TPM: . done!
325 13:57:41.832545 TPM ready after 0 ms
326 13:57:41.835841 Connected to device vid:did:rid of 1ae0:0028:00
327 13:57:41.846236 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
328 13:57:41.849722 Initialized TPM device CR50 revision 0
329 13:57:41.892194 tlcl_send_startup: Startup return code is 0
330 13:57:41.892355 TPM: setup succeeded
331 13:57:41.904817 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
332 13:57:41.908778 Chrome EC: UHEPI supported
333 13:57:41.912297 Phase 1
334 13:57:41.915735 FMAP: area GBB found @ c05000 (12288 bytes)
335 13:57:41.921948 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
336 13:57:41.925394 Phase 2
337 13:57:41.925519 Phase 3
338 13:57:41.928797 FMAP: area GBB found @ c05000 (12288 bytes)
339 13:57:41.935501 VB2:vb2_report_dev_firmware() This is developer signed firmware
340 13:57:41.942249 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
341 13:57:41.945118 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
342 13:57:41.951865 VB2:vb2_verify_keyblock() Checking keyblock signature...
343 13:57:41.967524 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
344 13:57:41.970939 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
345 13:57:41.977301 VB2:vb2_verify_fw_preamble() Verifying preamble.
346 13:57:41.981925 Phase 4
347 13:57:41.985066 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
348 13:57:41.991296 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
349 13:57:42.171281 VB2:vb2_rsa_verify_digest() Digest check failed!
350 13:57:42.177974 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
351 13:57:42.178089 Saving nvdata
352 13:57:42.180620 Reboot requested (10020007)
353 13:57:42.184151 board_reset() called!
354 13:57:42.184245 full_reset() called!
355 13:57:46.695399
356 13:57:46.695585
357 13:57:46.705285 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
358 13:57:46.708678 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
359 13:57:46.715279 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
360 13:57:46.718663 CPU: AES supported, TXT NOT supported, VT supported
361 13:57:46.725377 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
362 13:57:46.728661 PCH: device id 0284 (rev 00) is Cometlake-U Premium
363 13:57:46.735342 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
364 13:57:46.738647 VBOOT: Loading verstage.
365 13:57:46.742030 FMAP: Found "FLASH" version 1.1 at 0xc04000.
366 13:57:46.748606 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
367 13:57:46.751740 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
368 13:57:46.755037 CBFS @ c08000 size 3f8000
369 13:57:46.761815 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
370 13:57:46.765203 CBFS: Locating 'fallback/verstage'
371 13:57:46.768547 CBFS: Found @ offset 10fb80 size 1072c
372 13:57:46.771905
373 13:57:46.772060
374 13:57:46.781880 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
375 13:57:46.796584 Probing TPM: . done!
376 13:57:46.799452 TPM ready after 0 ms
377 13:57:46.803149 Connected to device vid:did:rid of 1ae0:0028:00
378 13:57:46.813426 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
379 13:57:46.816625 Initialized TPM device CR50 revision 0
380 13:57:46.859084 tlcl_send_startup: Startup return code is 0
381 13:57:46.859231 TPM: setup succeeded
382 13:57:46.871912 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
383 13:57:46.875390 Chrome EC: UHEPI supported
384 13:57:46.878692 Phase 1
385 13:57:46.881917 FMAP: area GBB found @ c05000 (12288 bytes)
386 13:57:46.888973 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
387 13:57:46.895398 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
388 13:57:46.898649 Recovery requested (1009000e)
389 13:57:46.904939 Saving nvdata
390 13:57:46.910523 tlcl_extend: response is 0
391 13:57:46.919333 tlcl_extend: response is 0
392 13:57:46.926654 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
393 13:57:46.930008 CBFS @ c08000 size 3f8000
394 13:57:46.936876 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
395 13:57:46.939537 CBFS: Locating 'fallback/romstage'
396 13:57:46.943433 CBFS: Found @ offset 80 size 145fc
397 13:57:46.946785 Accumulated console time in verstage 98 ms
398 13:57:46.947169
399 13:57:46.947459
400 13:57:46.959659 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
401 13:57:46.965848 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
402 13:57:46.969188 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
403 13:57:46.972613 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
404 13:57:46.979398 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
405 13:57:46.982668 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
406 13:57:46.986042 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
407 13:57:46.989448 TCO_STS: 0000 0000
408 13:57:46.992531 GEN_PMCON: e0015238 00000200
409 13:57:46.995794 GBLRST_CAUSE: 00000000 00000000
410 13:57:46.995889 prev_sleep_state 5
411 13:57:47.000654 Boot Count incremented to 51152
412 13:57:47.005896 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
413 13:57:47.009532 CBFS @ c08000 size 3f8000
414 13:57:47.015851 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
415 13:57:47.015948 CBFS: Locating 'fspm.bin'
416 13:57:47.022273 CBFS: Found @ offset 5ffc0 size 71000
417 13:57:47.025460 Chrome EC: UHEPI supported
418 13:57:47.032578 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
419 13:57:47.035918 Probing TPM: done!
420 13:57:47.042696 Connected to device vid:did:rid of 1ae0:0028:00
421 13:57:47.052577 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
422 13:57:47.058509 Initialized TPM device CR50 revision 0
423 13:57:47.067185 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
424 13:57:47.074055 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
425 13:57:47.077189 MRC cache found, size 1948
426 13:57:47.080602 bootmode is set to: 2
427 13:57:47.083998 PRMRR disabled by config.
428 13:57:47.087285 SPD INDEX = 1
429 13:57:47.090753 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
430 13:57:47.093920 CBFS @ c08000 size 3f8000
431 13:57:47.100584 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
432 13:57:47.100736 CBFS: Locating 'spd.bin'
433 13:57:47.103602 CBFS: Found @ offset 5fb80 size 400
434 13:57:47.107054 SPD: module type is LPDDR3
435 13:57:47.110752 SPD: module part is
436 13:57:47.117000 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
437 13:57:47.120530 SPD: device width 4 bits, bus width 8 bits
438 13:57:47.123889 SPD: module size is 4096 MB (per channel)
439 13:57:47.126967 memory slot: 0 configuration done.
440 13:57:47.130674 memory slot: 2 configuration done.
441 13:57:47.182272 CBMEM:
442 13:57:47.185637 IMD: root @ 99fff000 254 entries.
443 13:57:47.188836 IMD: root @ 99ffec00 62 entries.
444 13:57:47.192256 External stage cache:
445 13:57:47.195656 IMD: root @ 9abff000 254 entries.
446 13:57:47.198309 IMD: root @ 9abfec00 62 entries.
447 13:57:47.205524 Chrome EC: clear events_b mask to 0x0000000020004000
448 13:57:47.217947 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
449 13:57:47.228384 tlcl_write: response is 0
450 13:57:47.240590 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
451 13:57:47.246779 MRC: TPM MRC hash updated successfully.
452 13:57:47.247180 2 DIMMs found
453 13:57:47.249918 SMM Memory Map
454 13:57:47.253154 SMRAM : 0x9a000000 0x1000000
455 13:57:47.256486 Subregion 0: 0x9a000000 0xa00000
456 13:57:47.260013 Subregion 1: 0x9aa00000 0x200000
457 13:57:47.263316 Subregion 2: 0x9ac00000 0x400000
458 13:57:47.266592 top_of_ram = 0x9a000000
459 13:57:47.269943 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
460 13:57:47.276677 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
461 13:57:47.279940 MTRR Range: Start=ff000000 End=0 (Size 1000000)
462 13:57:47.286647 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
463 13:57:47.289701 CBFS @ c08000 size 3f8000
464 13:57:47.292950 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
465 13:57:47.296244 CBFS: Locating 'fallback/postcar'
466 13:57:47.303004 CBFS: Found @ offset 107000 size 4b44
467 13:57:47.306527 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
468 13:57:47.318460 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
469 13:57:47.322212 Processing 180 relocs. Offset value of 0x97c0c000
470 13:57:47.330597 Accumulated console time in romstage 286 ms
471 13:57:47.331025
472 13:57:47.331332
473 13:57:47.340489 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
474 13:57:47.346857 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
475 13:57:47.350497 CBFS @ c08000 size 3f8000
476 13:57:47.356680 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
477 13:57:47.360285 CBFS: Locating 'fallback/ramstage'
478 13:57:47.363707 CBFS: Found @ offset 43380 size 1b9e8
479 13:57:47.369689 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
480 13:57:47.402263 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
481 13:57:47.405588 Processing 3976 relocs. Offset value of 0x98db0000
482 13:57:47.412438 Accumulated console time in postcar 52 ms
483 13:57:47.413010
484 13:57:47.413535
485 13:57:47.422295 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
486 13:57:47.428854 FMAP: area RO_VPD found @ c00000 (16384 bytes)
487 13:57:47.432384 WARNING: RO_VPD is uninitialized or empty.
488 13:57:47.435214 FMAP: area RW_VPD found @ af8000 (8192 bytes)
489 13:57:47.441792 FMAP: area RW_VPD found @ af8000 (8192 bytes)
490 13:57:47.441898 Normal boot.
491 13:57:47.448100 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
492 13:57:47.451949 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
493 13:57:47.455143 CBFS @ c08000 size 3f8000
494 13:57:47.461411 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
495 13:57:47.465222 CBFS: Locating 'cpu_microcode_blob.bin'
496 13:57:47.468281 CBFS: Found @ offset 14700 size 2ec00
497 13:57:47.471508 microcode: sig=0x806ec pf=0x4 revision=0xc9
498 13:57:47.474798 Skip microcode update
499 13:57:47.481540 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
500 13:57:47.481649 CBFS @ c08000 size 3f8000
501 13:57:47.488359 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
502 13:57:47.491720 CBFS: Locating 'fsps.bin'
503 13:57:47.494357 CBFS: Found @ offset d1fc0 size 35000
504 13:57:47.520472 Detected 4 core, 8 thread CPU.
505 13:57:47.523170 Setting up SMI for CPU
506 13:57:47.526491 IED base = 0x9ac00000
507 13:57:47.526582 IED size = 0x00400000
508 13:57:47.530074 Will perform SMM setup.
509 13:57:47.536861 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
510 13:57:47.543488 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
511 13:57:47.546685 Processing 16 relocs. Offset value of 0x00030000
512 13:57:47.550481 Attempting to start 7 APs
513 13:57:47.553681 Waiting for 10ms after sending INIT.
514 13:57:47.569874 Waiting for 1st SIPI to complete...done.
515 13:57:47.570002 AP: slot 2 apic_id 1.
516 13:57:47.576861 Waiting for 2nd SIPI to complete...done.
517 13:57:47.576962 AP: slot 5 apic_id 5.
518 13:57:47.579729 AP: slot 4 apic_id 4.
519 13:57:47.582855 AP: slot 6 apic_id 7.
520 13:57:47.582975 AP: slot 7 apic_id 6.
521 13:57:47.586331 AP: slot 1 apic_id 3.
522 13:57:47.589614 AP: slot 3 apic_id 2.
523 13:57:47.596525 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
524 13:57:47.603160 Processing 13 relocs. Offset value of 0x00038000
525 13:57:47.609702 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
526 13:57:47.613027 Installing SMM handler to 0x9a000000
527 13:57:47.619817 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
528 13:57:47.626476 Processing 658 relocs. Offset value of 0x9a010000
529 13:57:47.632548 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
530 13:57:47.635848 Processing 13 relocs. Offset value of 0x9a008000
531 13:57:47.642501 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
532 13:57:47.649192 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
533 13:57:47.655952 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
534 13:57:47.659169 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
535 13:57:47.665568 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
536 13:57:47.672165 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
537 13:57:47.679067 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
538 13:57:47.682515 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
539 13:57:47.686316 Clearing SMI status registers
540 13:57:47.689379 SMI_STS: PM1
541 13:57:47.689473 PM1_STS: PWRBTN
542 13:57:47.692569 TCO_STS: SECOND_TO
543 13:57:47.695880 New SMBASE 0x9a000000
544 13:57:47.699219 In relocation handler: CPU 0
545 13:57:47.702372 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
546 13:57:47.705744 Writing SMRR. base = 0x9a000006, mask=0xff000800
547 13:57:47.709195 Relocation complete.
548 13:57:47.712586 New SMBASE 0x99fff800
549 13:57:47.712680 In relocation handler: CPU 2
550 13:57:47.719030 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
551 13:57:47.722374 Writing SMRR. base = 0x9a000006, mask=0xff000800
552 13:57:47.725687 Relocation complete.
553 13:57:47.729496 New SMBASE 0x99fff400
554 13:57:47.729596 In relocation handler: CPU 3
555 13:57:47.735632 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
556 13:57:47.738971 Writing SMRR. base = 0x9a000006, mask=0xff000800
557 13:57:47.742739 Relocation complete.
558 13:57:47.742833 New SMBASE 0x99fffc00
559 13:57:47.746126 In relocation handler: CPU 1
560 13:57:47.752195 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
561 13:57:47.755529 Writing SMRR. base = 0x9a000006, mask=0xff000800
562 13:57:47.758945 Relocation complete.
563 13:57:47.759038 New SMBASE 0x99ffec00
564 13:57:47.762291 In relocation handler: CPU 5
565 13:57:47.769313 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
566 13:57:47.772427 Writing SMRR. base = 0x9a000006, mask=0xff000800
567 13:57:47.775710 Relocation complete.
568 13:57:47.775833 New SMBASE 0x99fff000
569 13:57:47.778974 In relocation handler: CPU 4
570 13:57:47.782212 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
571 13:57:47.789205 Writing SMRR. base = 0x9a000006, mask=0xff000800
572 13:57:47.792548 Relocation complete.
573 13:57:47.792663 New SMBASE 0x99ffe400
574 13:57:47.795802 In relocation handler: CPU 7
575 13:57:47.799200 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
576 13:57:47.805863 Writing SMRR. base = 0x9a000006, mask=0xff000800
577 13:57:47.809088 Relocation complete.
578 13:57:47.809211 New SMBASE 0x99ffe800
579 13:57:47.812414 In relocation handler: CPU 6
580 13:57:47.815824 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
581 13:57:47.822549 Writing SMRR. base = 0x9a000006, mask=0xff000800
582 13:57:47.822645 Relocation complete.
583 13:57:47.825586 Initializing CPU #0
584 13:57:47.828928 CPU: vendor Intel device 806ec
585 13:57:47.832203 CPU: family 06, model 8e, stepping 0c
586 13:57:47.835433 Clearing out pending MCEs
587 13:57:47.838791 Setting up local APIC...
588 13:57:47.838922 apic_id: 0x00 done.
589 13:57:47.842017 Turbo is available but hidden
590 13:57:47.845361 Turbo is available and visible
591 13:57:47.848735 VMX status: enabled
592 13:57:47.852051 IA32_FEATURE_CONTROL status: locked
593 13:57:47.855321 Skip microcode update
594 13:57:47.855415 CPU #0 initialized
595 13:57:47.858878 Initializing CPU #2
596 13:57:47.861598 Initializing CPU #7
597 13:57:47.861696 Initializing CPU #6
598 13:57:47.865354 Initializing CPU #3
599 13:57:47.865448 Initializing CPU #1
600 13:57:47.868742 CPU: vendor Intel device 806ec
601 13:57:47.875313 CPU: family 06, model 8e, stepping 0c
602 13:57:47.875415 CPU: vendor Intel device 806ec
603 13:57:47.881856 CPU: family 06, model 8e, stepping 0c
604 13:57:47.881979 Clearing out pending MCEs
605 13:57:47.884951 Clearing out pending MCEs
606 13:57:47.888156 Setting up local APIC...
607 13:57:47.891810 CPU: vendor Intel device 806ec
608 13:57:47.895051 CPU: family 06, model 8e, stepping 0c
609 13:57:47.898173 CPU: vendor Intel device 806ec
610 13:57:47.901820 CPU: family 06, model 8e, stepping 0c
611 13:57:47.905036 CPU: vendor Intel device 806ec
612 13:57:47.908521 CPU: family 06, model 8e, stepping 0c
613 13:57:47.911840 Clearing out pending MCEs
614 13:57:47.915172 Clearing out pending MCEs
615 13:57:47.917877 Setting up local APIC...
616 13:57:47.917962 Clearing out pending MCEs
617 13:57:47.921206 apic_id: 0x02 done.
618 13:57:47.924580 Setting up local APIC...
619 13:57:47.927874 Setting up local APIC...
620 13:57:47.927956 Initializing CPU #5
621 13:57:47.931185 Initializing CPU #4
622 13:57:47.934997 CPU: vendor Intel device 806ec
623 13:57:47.938350 CPU: family 06, model 8e, stepping 0c
624 13:57:47.941784 CPU: vendor Intel device 806ec
625 13:57:47.944989 CPU: family 06, model 8e, stepping 0c
626 13:57:47.948168 Clearing out pending MCEs
627 13:57:47.951602 Clearing out pending MCEs
628 13:57:47.951686 Setting up local APIC...
629 13:57:47.954812 apic_id: 0x06 done.
630 13:57:47.957575 apic_id: 0x07 done.
631 13:57:47.957678 VMX status: enabled
632 13:57:47.961610 VMX status: enabled
633 13:57:47.961705 apic_id: 0x03 done.
634 13:57:47.964348 VMX status: enabled
635 13:57:47.967891 VMX status: enabled
636 13:57:47.971079 IA32_FEATURE_CONTROL status: locked
637 13:57:47.974552 IA32_FEATURE_CONTROL status: locked
638 13:57:47.977920 Skip microcode update
639 13:57:47.978043 Skip microcode update
640 13:57:47.981166 CPU #3 initialized
641 13:57:47.981259 CPU #1 initialized
642 13:57:47.984256 Setting up local APIC...
643 13:57:47.987376 Setting up local APIC...
644 13:57:47.991095 apic_id: 0x01 done.
645 13:57:47.991204 apic_id: 0x04 done.
646 13:57:47.994179 apic_id: 0x05 done.
647 13:57:47.997488 VMX status: enabled
648 13:57:47.997616 VMX status: enabled
649 13:57:48.001318 IA32_FEATURE_CONTROL status: locked
650 13:57:48.004231 IA32_FEATURE_CONTROL status: locked
651 13:57:48.007955 Skip microcode update
652 13:57:48.011168 Skip microcode update
653 13:57:48.011263 CPU #4 initialized
654 13:57:48.014208 CPU #5 initialized
655 13:57:48.017556 IA32_FEATURE_CONTROL status: locked
656 13:57:48.020861 IA32_FEATURE_CONTROL status: locked
657 13:57:48.024307 Skip microcode update
658 13:57:48.024401 Skip microcode update
659 13:57:48.027675 CPU #7 initialized
660 13:57:48.031124 CPU #6 initialized
661 13:57:48.031218 VMX status: enabled
662 13:57:48.034425 IA32_FEATURE_CONTROL status: locked
663 13:57:48.037058 Skip microcode update
664 13:57:48.040783 CPU #2 initialized
665 13:57:48.043893 bsp_do_flight_plan done after 466 msecs.
666 13:57:48.046947 CPU: frequency set to 4200 MHz
667 13:57:48.047042 Enabling SMIs.
668 13:57:48.050162 Locking SMM.
669 13:57:48.064318 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
670 13:57:48.067716 CBFS @ c08000 size 3f8000
671 13:57:48.074471 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
672 13:57:48.074568 CBFS: Locating 'vbt.bin'
673 13:57:48.081125 CBFS: Found @ offset 5f5c0 size 499
674 13:57:48.083810 Found a VBT of 4608 bytes after decompression
675 13:57:48.265512 Display FSP Version Info HOB
676 13:57:48.268738 Reference Code - CPU = 9.0.1e.30
677 13:57:48.271486 uCode Version = 0.0.0.ca
678 13:57:48.274826 TXT ACM version = ff.ff.ff.ffff
679 13:57:48.278106 Display FSP Version Info HOB
680 13:57:48.281353 Reference Code - ME = 9.0.1e.30
681 13:57:48.284603 MEBx version = 0.0.0.0
682 13:57:48.288553 ME Firmware Version = Consumer SKU
683 13:57:48.291144 Display FSP Version Info HOB
684 13:57:48.294536 Reference Code - CML PCH = 9.0.1e.30
685 13:57:48.298660 PCH-CRID Status = Disabled
686 13:57:48.301311 PCH-CRID Original Value = ff.ff.ff.ffff
687 13:57:48.304589 PCH-CRID New Value = ff.ff.ff.ffff
688 13:57:48.307959 OPROM - RST - RAID = ff.ff.ff.ffff
689 13:57:48.311229 ChipsetInit Base Version = ff.ff.ff.ffff
690 13:57:48.314434 ChipsetInit Oem Version = ff.ff.ff.ffff
691 13:57:48.317601 Display FSP Version Info HOB
692 13:57:48.324741 Reference Code - SA - System Agent = 9.0.1e.30
693 13:57:48.327775 Reference Code - MRC = 0.7.1.6c
694 13:57:48.331120 SA - PCIe Version = 9.0.1e.30
695 13:57:48.331208 SA-CRID Status = Disabled
696 13:57:48.334347 SA-CRID Original Value = 0.0.0.c
697 13:57:48.337983 SA-CRID New Value = 0.0.0.c
698 13:57:48.341178 OPROM - VBIOS = ff.ff.ff.ffff
699 13:57:48.344623 RTC Init
700 13:57:48.348016 Set power on after power failure.
701 13:57:48.348110 Disabling Deep S3
702 13:57:48.351410 Disabling Deep S3
703 13:57:48.351504 Disabling Deep S4
704 13:57:48.354891 Disabling Deep S4
705 13:57:48.357480 Disabling Deep S5
706 13:57:48.357609 Disabling Deep S5
707 13:57:48.364062 BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 191 exit 1
708 13:57:48.364162 Enumerating buses...
709 13:57:48.370850 Show all devs... Before device enumeration.
710 13:57:48.374125 Root Device: enabled 1
711 13:57:48.374248 CPU_CLUSTER: 0: enabled 1
712 13:57:48.377415 DOMAIN: 0000: enabled 1
713 13:57:48.380867 APIC: 00: enabled 1
714 13:57:48.380961 PCI: 00:00.0: enabled 1
715 13:57:48.384198 PCI: 00:02.0: enabled 1
716 13:57:48.387632 PCI: 00:04.0: enabled 0
717 13:57:48.391031 PCI: 00:05.0: enabled 0
718 13:57:48.391126 PCI: 00:12.0: enabled 1
719 13:57:48.394316 PCI: 00:12.5: enabled 0
720 13:57:48.397483 PCI: 00:12.6: enabled 0
721 13:57:48.400713 PCI: 00:14.0: enabled 1
722 13:57:48.400808 PCI: 00:14.1: enabled 0
723 13:57:48.403880 PCI: 00:14.3: enabled 1
724 13:57:48.407260 PCI: 00:14.5: enabled 0
725 13:57:48.407356 PCI: 00:15.0: enabled 1
726 13:57:48.410669 PCI: 00:15.1: enabled 1
727 13:57:48.414090 PCI: 00:15.2: enabled 0
728 13:57:48.417431 PCI: 00:15.3: enabled 0
729 13:57:48.417554 PCI: 00:16.0: enabled 1
730 13:57:48.420729 PCI: 00:16.1: enabled 0
731 13:57:48.423998 PCI: 00:16.2: enabled 0
732 13:57:48.427199 PCI: 00:16.3: enabled 0
733 13:57:48.427294 PCI: 00:16.4: enabled 0
734 13:57:48.430448 PCI: 00:16.5: enabled 0
735 13:57:48.433707 PCI: 00:17.0: enabled 1
736 13:57:48.437028 PCI: 00:19.0: enabled 1
737 13:57:48.437122 PCI: 00:19.1: enabled 0
738 13:57:48.440316 PCI: 00:19.2: enabled 0
739 13:57:48.443946 PCI: 00:1a.0: enabled 0
740 13:57:48.444104 PCI: 00:1c.0: enabled 0
741 13:57:48.447146 PCI: 00:1c.1: enabled 0
742 13:57:48.450571 PCI: 00:1c.2: enabled 0
743 13:57:48.453405 PCI: 00:1c.3: enabled 0
744 13:57:48.453556 PCI: 00:1c.4: enabled 0
745 13:57:48.456705 PCI: 00:1c.5: enabled 0
746 13:57:48.460203 PCI: 00:1c.6: enabled 0
747 13:57:48.463542 PCI: 00:1c.7: enabled 0
748 13:57:48.463676 PCI: 00:1d.0: enabled 1
749 13:57:48.466759 PCI: 00:1d.1: enabled 0
750 13:57:48.470011 PCI: 00:1d.2: enabled 0
751 13:57:48.473302 PCI: 00:1d.3: enabled 0
752 13:57:48.473450 PCI: 00:1d.4: enabled 0
753 13:57:48.476653 PCI: 00:1d.5: enabled 1
754 13:57:48.479862 PCI: 00:1e.0: enabled 1
755 13:57:48.483159 PCI: 00:1e.1: enabled 0
756 13:57:48.483288 PCI: 00:1e.2: enabled 1
757 13:57:48.486628 PCI: 00:1e.3: enabled 1
758 13:57:48.489913 PCI: 00:1f.0: enabled 1
759 13:57:48.490056 PCI: 00:1f.1: enabled 1
760 13:57:48.493278 PCI: 00:1f.2: enabled 1
761 13:57:48.496632 PCI: 00:1f.3: enabled 1
762 13:57:48.499983 PCI: 00:1f.4: enabled 1
763 13:57:48.500098 PCI: 00:1f.5: enabled 1
764 13:57:48.503130 PCI: 00:1f.6: enabled 0
765 13:57:48.506341 USB0 port 0: enabled 1
766 13:57:48.509783 I2C: 00:15: enabled 1
767 13:57:48.509877 I2C: 00:5d: enabled 1
768 13:57:48.513217 GENERIC: 0.0: enabled 1
769 13:57:48.516507 I2C: 00:1a: enabled 1
770 13:57:48.516602 I2C: 00:38: enabled 1
771 13:57:48.519992 I2C: 00:39: enabled 1
772 13:57:48.523543 I2C: 00:3a: enabled 1
773 13:57:48.523638 I2C: 00:3b: enabled 1
774 13:57:48.526716 PCI: 00:00.0: enabled 1
775 13:57:48.529852 SPI: 00: enabled 1
776 13:57:48.529946 SPI: 01: enabled 1
777 13:57:48.533097 PNP: 0c09.0: enabled 1
778 13:57:48.536280 USB2 port 0: enabled 1
779 13:57:48.536374 USB2 port 1: enabled 1
780 13:57:48.539410 USB2 port 2: enabled 0
781 13:57:48.543206 USB2 port 3: enabled 0
782 13:57:48.543302 USB2 port 5: enabled 0
783 13:57:48.546535 USB2 port 6: enabled 1
784 13:57:48.549712 USB2 port 9: enabled 1
785 13:57:48.552846 USB3 port 0: enabled 1
786 13:57:48.552939 USB3 port 1: enabled 1
787 13:57:48.556360 USB3 port 2: enabled 1
788 13:57:48.559523 USB3 port 3: enabled 1
789 13:57:48.559617 USB3 port 4: enabled 0
790 13:57:48.562950 APIC: 03: enabled 1
791 13:57:48.566270 APIC: 01: enabled 1
792 13:57:48.566367 APIC: 02: enabled 1
793 13:57:48.569412 APIC: 04: enabled 1
794 13:57:48.569507 APIC: 05: enabled 1
795 13:57:48.572667 APIC: 07: enabled 1
796 13:57:48.576017 APIC: 06: enabled 1
797 13:57:48.576112 Compare with tree...
798 13:57:48.579280 Root Device: enabled 1
799 13:57:48.582742 CPU_CLUSTER: 0: enabled 1
800 13:57:48.586198 APIC: 00: enabled 1
801 13:57:48.586333 APIC: 03: enabled 1
802 13:57:48.589447 APIC: 01: enabled 1
803 13:57:48.592781 APIC: 02: enabled 1
804 13:57:48.592875 APIC: 04: enabled 1
805 13:57:48.596161 APIC: 05: enabled 1
806 13:57:48.599379 APIC: 07: enabled 1
807 13:57:48.599474 APIC: 06: enabled 1
808 13:57:48.602797 DOMAIN: 0000: enabled 1
809 13:57:48.606024 PCI: 00:00.0: enabled 1
810 13:57:48.609220 PCI: 00:02.0: enabled 1
811 13:57:48.609315 PCI: 00:04.0: enabled 0
812 13:57:48.612588 PCI: 00:05.0: enabled 0
813 13:57:48.615834 PCI: 00:12.0: enabled 1
814 13:57:48.619266 PCI: 00:12.5: enabled 0
815 13:57:48.622649 PCI: 00:12.6: enabled 0
816 13:57:48.622752 PCI: 00:14.0: enabled 1
817 13:57:48.626030 USB0 port 0: enabled 1
818 13:57:48.629419 USB2 port 0: enabled 1
819 13:57:48.632046 USB2 port 1: enabled 1
820 13:57:48.635708 USB2 port 2: enabled 0
821 13:57:48.635824 USB2 port 3: enabled 0
822 13:57:48.638853 USB2 port 5: enabled 0
823 13:57:48.642180 USB2 port 6: enabled 1
824 13:57:48.645931 USB2 port 9: enabled 1
825 13:57:48.649148 USB3 port 0: enabled 1
826 13:57:48.652538 USB3 port 1: enabled 1
827 13:57:48.652623 USB3 port 2: enabled 1
828 13:57:48.655701 USB3 port 3: enabled 1
829 13:57:48.658806 USB3 port 4: enabled 0
830 13:57:48.662293 PCI: 00:14.1: enabled 0
831 13:57:48.665613 PCI: 00:14.3: enabled 1
832 13:57:48.665707 PCI: 00:14.5: enabled 0
833 13:57:48.669050 PCI: 00:15.0: enabled 1
834 13:57:48.672252 I2C: 00:15: enabled 1
835 13:57:48.675419 PCI: 00:15.1: enabled 1
836 13:57:48.678832 I2C: 00:5d: enabled 1
837 13:57:48.678926 GENERIC: 0.0: enabled 1
838 13:57:48.682281 PCI: 00:15.2: enabled 0
839 13:57:48.685610 PCI: 00:15.3: enabled 0
840 13:57:48.688938 PCI: 00:16.0: enabled 1
841 13:57:48.692216 PCI: 00:16.1: enabled 0
842 13:57:48.692341 PCI: 00:16.2: enabled 0
843 13:57:48.695538 PCI: 00:16.3: enabled 0
844 13:57:48.698811 PCI: 00:16.4: enabled 0
845 13:57:48.702027 PCI: 00:16.5: enabled 0
846 13:57:48.705422 PCI: 00:17.0: enabled 1
847 13:57:48.705546 PCI: 00:19.0: enabled 1
848 13:57:48.708761 I2C: 00:1a: enabled 1
849 13:57:48.711486 I2C: 00:38: enabled 1
850 13:57:48.715237 I2C: 00:39: enabled 1
851 13:57:48.715332 I2C: 00:3a: enabled 1
852 13:57:48.718518 I2C: 00:3b: enabled 1
853 13:57:48.721806 PCI: 00:19.1: enabled 0
854 13:57:48.725180 PCI: 00:19.2: enabled 0
855 13:57:48.728682 PCI: 00:1a.0: enabled 0
856 13:57:48.728777 PCI: 00:1c.0: enabled 0
857 13:57:48.731265 PCI: 00:1c.1: enabled 0
858 13:57:48.734656 PCI: 00:1c.2: enabled 0
859 13:57:48.737885 PCI: 00:1c.3: enabled 0
860 13:57:48.737980 PCI: 00:1c.4: enabled 0
861 13:57:48.741188 PCI: 00:1c.5: enabled 0
862 13:57:48.744832 PCI: 00:1c.6: enabled 0
863 13:57:48.748150 PCI: 00:1c.7: enabled 0
864 13:57:48.751313 PCI: 00:1d.0: enabled 1
865 13:57:48.751407 PCI: 00:1d.1: enabled 0
866 13:57:48.754462 PCI: 00:1d.2: enabled 0
867 13:57:48.757768 PCI: 00:1d.3: enabled 0
868 13:57:48.761043 PCI: 00:1d.4: enabled 0
869 13:57:48.764533 PCI: 00:1d.5: enabled 1
870 13:57:48.764627 PCI: 00:00.0: enabled 1
871 13:57:48.767761 PCI: 00:1e.0: enabled 1
872 13:57:48.771234 PCI: 00:1e.1: enabled 0
873 13:57:48.774552 PCI: 00:1e.2: enabled 1
874 13:57:48.774647 SPI: 00: enabled 1
875 13:57:48.777770 PCI: 00:1e.3: enabled 1
876 13:57:48.781711 SPI: 01: enabled 1
877 13:57:48.784425 PCI: 00:1f.0: enabled 1
878 13:57:48.787840 PNP: 0c09.0: enabled 1
879 13:57:48.787935 PCI: 00:1f.1: enabled 1
880 13:57:48.791301 PCI: 00:1f.2: enabled 1
881 13:57:48.794703 PCI: 00:1f.3: enabled 1
882 13:57:48.797922 PCI: 00:1f.4: enabled 1
883 13:57:48.801216 PCI: 00:1f.5: enabled 1
884 13:57:48.801340 PCI: 00:1f.6: enabled 0
885 13:57:48.804540 Root Device scanning...
886 13:57:48.807869 scan_static_bus for Root Device
887 13:57:48.811238 CPU_CLUSTER: 0 enabled
888 13:57:48.811333 DOMAIN: 0000 enabled
889 13:57:48.814669 DOMAIN: 0000 scanning...
890 13:57:48.817832 PCI: pci_scan_bus for bus 00
891 13:57:48.821202 PCI: 00:00.0 [8086/0000] ops
892 13:57:48.824392 PCI: 00:00.0 [8086/9b61] enabled
893 13:57:48.827752 PCI: 00:02.0 [8086/0000] bus ops
894 13:57:48.831204 PCI: 00:02.0 [8086/9b41] enabled
895 13:57:48.833923 PCI: 00:04.0 [8086/1903] disabled
896 13:57:48.837358 PCI: 00:08.0 [8086/1911] enabled
897 13:57:48.840656 PCI: 00:12.0 [8086/02f9] enabled
898 13:57:48.843954 PCI: 00:14.0 [8086/0000] bus ops
899 13:57:48.847214 PCI: 00:14.0 [8086/02ed] enabled
900 13:57:48.851005 PCI: 00:14.2 [8086/02ef] enabled
901 13:57:48.854162 PCI: 00:14.3 [8086/02f0] enabled
902 13:57:48.857283 PCI: 00:15.0 [8086/0000] bus ops
903 13:57:48.860955 PCI: 00:15.0 [8086/02e8] enabled
904 13:57:48.864181 PCI: 00:15.1 [8086/0000] bus ops
905 13:57:48.867503 PCI: 00:15.1 [8086/02e9] enabled
906 13:57:48.870589 PCI: 00:16.0 [8086/0000] ops
907 13:57:48.874183 PCI: 00:16.0 [8086/02e0] enabled
908 13:57:48.877455 PCI: 00:17.0 [8086/0000] ops
909 13:57:48.880813 PCI: 00:17.0 [8086/02d3] enabled
910 13:57:48.884190 PCI: 00:19.0 [8086/0000] bus ops
911 13:57:48.887436 PCI: 00:19.0 [8086/02c5] enabled
912 13:57:48.890837 PCI: 00:1d.0 [8086/0000] bus ops
913 13:57:48.894163 PCI: 00:1d.0 [8086/02b0] enabled
914 13:57:48.900907 PCI: Static device PCI: 00:1d.5 not found, disabling it.
915 13:57:48.903524 PCI: 00:1e.0 [8086/0000] ops
916 13:57:48.907236 PCI: 00:1e.0 [8086/02a8] enabled
917 13:57:48.910654 PCI: 00:1e.2 [8086/0000] bus ops
918 13:57:48.914074 PCI: 00:1e.2 [8086/02aa] enabled
919 13:57:48.917265 PCI: 00:1e.3 [8086/0000] bus ops
920 13:57:48.920724 PCI: 00:1e.3 [8086/02ab] enabled
921 13:57:48.924046 PCI: 00:1f.0 [8086/0000] bus ops
922 13:57:48.927259 PCI: 00:1f.0 [8086/0284] enabled
923 13:57:48.930634 PCI: Static device PCI: 00:1f.1 not found, disabling it.
924 13:57:48.936756 PCI: Static device PCI: 00:1f.2 not found, disabling it.
925 13:57:48.940100 PCI: 00:1f.3 [8086/0000] bus ops
926 13:57:48.943510 PCI: 00:1f.3 [8086/02c8] enabled
927 13:57:48.946937 PCI: 00:1f.4 [8086/0000] bus ops
928 13:57:48.950306 PCI: 00:1f.4 [8086/02a3] enabled
929 13:57:48.953496 PCI: 00:1f.5 [8086/0000] bus ops
930 13:57:48.956684 PCI: 00:1f.5 [8086/02a4] enabled
931 13:57:48.960398 PCI: Leftover static devices:
932 13:57:48.960539 PCI: 00:05.0
933 13:57:48.963612 PCI: 00:12.5
934 13:57:48.963731 PCI: 00:12.6
935 13:57:48.966781 PCI: 00:14.1
936 13:57:48.966897 PCI: 00:14.5
937 13:57:48.967005 PCI: 00:15.2
938 13:57:48.970627 PCI: 00:15.3
939 13:57:48.970750 PCI: 00:16.1
940 13:57:48.973529 PCI: 00:16.2
941 13:57:48.973646 PCI: 00:16.3
942 13:57:48.973723 PCI: 00:16.4
943 13:57:48.976897 PCI: 00:16.5
944 13:57:48.977019 PCI: 00:19.1
945 13:57:48.979957 PCI: 00:19.2
946 13:57:48.980051 PCI: 00:1a.0
947 13:57:48.980127 PCI: 00:1c.0
948 13:57:48.983453 PCI: 00:1c.1
949 13:57:48.983547 PCI: 00:1c.2
950 13:57:48.986689 PCI: 00:1c.3
951 13:57:48.986784 PCI: 00:1c.4
952 13:57:48.990101 PCI: 00:1c.5
953 13:57:48.990195 PCI: 00:1c.6
954 13:57:48.990270 PCI: 00:1c.7
955 13:57:48.993242 PCI: 00:1d.1
956 13:57:48.993336 PCI: 00:1d.2
957 13:57:48.996589 PCI: 00:1d.3
958 13:57:48.996683 PCI: 00:1d.4
959 13:57:48.996773 PCI: 00:1d.5
960 13:57:48.999901 PCI: 00:1e.1
961 13:57:48.999996 PCI: 00:1f.1
962 13:57:49.003256 PCI: 00:1f.2
963 13:57:49.003351 PCI: 00:1f.6
964 13:57:49.006526 PCI: Check your devicetree.cb.
965 13:57:49.009670 PCI: 00:02.0 scanning...
966 13:57:49.012967 scan_generic_bus for PCI: 00:02.0
967 13:57:49.016331 scan_generic_bus for PCI: 00:02.0 done
968 13:57:49.023048 scan_bus: scanning of bus PCI: 00:02.0 took 10190 usecs
969 13:57:49.026318 PCI: 00:14.0 scanning...
970 13:57:49.029488 scan_static_bus for PCI: 00:14.0
971 13:57:49.029582 USB0 port 0 enabled
972 13:57:49.033292 USB0 port 0 scanning...
973 13:57:49.036703 scan_static_bus for USB0 port 0
974 13:57:49.040016 USB2 port 0 enabled
975 13:57:49.040111 USB2 port 1 enabled
976 13:57:49.042857 USB2 port 2 disabled
977 13:57:49.046230 USB2 port 3 disabled
978 13:57:49.046324 USB2 port 5 disabled
979 13:57:49.049582 USB2 port 6 enabled
980 13:57:49.049684 USB2 port 9 enabled
981 13:57:49.052881 USB3 port 0 enabled
982 13:57:49.056230 USB3 port 1 enabled
983 13:57:49.056325 USB3 port 2 enabled
984 13:57:49.059492 USB3 port 3 enabled
985 13:57:49.062798 USB3 port 4 disabled
986 13:57:49.062892 USB2 port 0 scanning...
987 13:57:49.066118 scan_static_bus for USB2 port 0
988 13:57:49.069578 scan_static_bus for USB2 port 0 done
989 13:57:49.076436 scan_bus: scanning of bus USB2 port 0 took 9702 usecs
990 13:57:49.079728 USB2 port 1 scanning...
991 13:57:49.082715 scan_static_bus for USB2 port 1
992 13:57:49.085886 scan_static_bus for USB2 port 1 done
993 13:57:49.092736 scan_bus: scanning of bus USB2 port 1 took 9703 usecs
994 13:57:49.092863 USB2 port 6 scanning...
995 13:57:49.096111 scan_static_bus for USB2 port 6
996 13:57:49.099191 scan_static_bus for USB2 port 6 done
997 13:57:49.105838 scan_bus: scanning of bus USB2 port 6 took 9693 usecs
998 13:57:49.109345 USB2 port 9 scanning...
999 13:57:49.112473 scan_static_bus for USB2 port 9
1000 13:57:49.115916 scan_static_bus for USB2 port 9 done
1001 13:57:49.122476 scan_bus: scanning of bus USB2 port 9 took 9691 usecs
1002 13:57:49.122597 USB3 port 0 scanning...
1003 13:57:49.125870 scan_static_bus for USB3 port 0
1004 13:57:49.132466 scan_static_bus for USB3 port 0 done
1005 13:57:49.135745 scan_bus: scanning of bus USB3 port 0 took 9695 usecs
1006 13:57:49.139169 USB3 port 1 scanning...
1007 13:57:49.142588 scan_static_bus for USB3 port 1
1008 13:57:49.145843 scan_static_bus for USB3 port 1 done
1009 13:57:49.152598 scan_bus: scanning of bus USB3 port 1 took 9699 usecs
1010 13:57:49.152698 USB3 port 2 scanning...
1011 13:57:49.155805 scan_static_bus for USB3 port 2
1012 13:57:49.162367 scan_static_bus for USB3 port 2 done
1013 13:57:49.165568 scan_bus: scanning of bus USB3 port 2 took 9698 usecs
1014 13:57:49.169088 USB3 port 3 scanning...
1015 13:57:49.172618 scan_static_bus for USB3 port 3
1016 13:57:49.175371 scan_static_bus for USB3 port 3 done
1017 13:57:49.182460 scan_bus: scanning of bus USB3 port 3 took 9701 usecs
1018 13:57:49.185543 scan_static_bus for USB0 port 0 done
1019 13:57:49.191756 scan_bus: scanning of bus USB0 port 0 took 155309 usecs
1020 13:57:49.195413 scan_static_bus for PCI: 00:14.0 done
1021 13:57:49.198487 scan_bus: scanning of bus PCI: 00:14.0 took 172920 usecs
1022 13:57:49.201756 PCI: 00:15.0 scanning...
1023 13:57:49.205310 scan_generic_bus for PCI: 00:15.0
1024 13:57:49.208566 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1025 13:57:49.215577 scan_generic_bus for PCI: 00:15.0 done
1026 13:57:49.218948 scan_bus: scanning of bus PCI: 00:15.0 took 14299 usecs
1027 13:57:49.221648 PCI: 00:15.1 scanning...
1028 13:57:49.225069 scan_generic_bus for PCI: 00:15.1
1029 13:57:49.228441 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1030 13:57:49.234973 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1031 13:57:49.238255 scan_generic_bus for PCI: 00:15.1 done
1032 13:57:49.244927 scan_bus: scanning of bus PCI: 00:15.1 took 18571 usecs
1033 13:57:49.245019 PCI: 00:19.0 scanning...
1034 13:57:49.248335 scan_generic_bus for PCI: 00:19.0
1035 13:57:49.255081 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1036 13:57:49.258471 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1037 13:57:49.261870 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1038 13:57:49.265256 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1039 13:57:49.271813 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1040 13:57:49.275116 scan_generic_bus for PCI: 00:19.0 done
1041 13:57:49.278312 scan_bus: scanning of bus PCI: 00:19.0 took 30718 usecs
1042 13:57:49.281715 PCI: 00:1d.0 scanning...
1043 13:57:49.285082 do_pci_scan_bridge for PCI: 00:1d.0
1044 13:57:49.288333 PCI: pci_scan_bus for bus 01
1045 13:57:49.291331 PCI: 01:00.0 [1c5c/1327] enabled
1046 13:57:49.295043 Enabling Common Clock Configuration
1047 13:57:49.301246 L1 Sub-State supported from root port 29
1048 13:57:49.305041 L1 Sub-State Support = 0xf
1049 13:57:49.305131 CommonModeRestoreTime = 0x28
1050 13:57:49.311694 Power On Value = 0x16, Power On Scale = 0x0
1051 13:57:49.311782 ASPM: Enabled L1
1052 13:57:49.317841 scan_bus: scanning of bus PCI: 00:1d.0 took 32775 usecs
1053 13:57:49.321613 PCI: 00:1e.2 scanning...
1054 13:57:49.324932 scan_generic_bus for PCI: 00:1e.2
1055 13:57:49.328477 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1056 13:57:49.331645 scan_generic_bus for PCI: 00:1e.2 done
1057 13:57:49.338165 scan_bus: scanning of bus PCI: 00:1e.2 took 14007 usecs
1058 13:57:49.341498 PCI: 00:1e.3 scanning...
1059 13:57:49.344751 scan_generic_bus for PCI: 00:1e.3
1060 13:57:49.347979 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1061 13:57:49.351421 scan_generic_bus for PCI: 00:1e.3 done
1062 13:57:49.358303 scan_bus: scanning of bus PCI: 00:1e.3 took 13988 usecs
1063 13:57:49.358399 PCI: 00:1f.0 scanning...
1064 13:57:49.361490 scan_static_bus for PCI: 00:1f.0
1065 13:57:49.364295 PNP: 0c09.0 enabled
1066 13:57:49.367655 scan_static_bus for PCI: 00:1f.0 done
1067 13:57:49.374582 scan_bus: scanning of bus PCI: 00:1f.0 took 12042 usecs
1068 13:57:49.377905 PCI: 00:1f.3 scanning...
1069 13:57:49.381240 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1070 13:57:49.384756 PCI: 00:1f.4 scanning...
1071 13:57:49.388049 scan_generic_bus for PCI: 00:1f.4
1072 13:57:49.394056 scan_generic_bus for PCI: 00:1f.4 done
1073 13:57:49.397864 scan_bus: scanning of bus PCI: 00:1f.4 took 10182 usecs
1074 13:57:49.400998 PCI: 00:1f.5 scanning...
1075 13:57:49.404176 scan_generic_bus for PCI: 00:1f.5
1076 13:57:49.407445 scan_generic_bus for PCI: 00:1f.5 done
1077 13:57:49.414135 scan_bus: scanning of bus PCI: 00:1f.5 took 10180 usecs
1078 13:57:49.421115 scan_bus: scanning of bus DOMAIN: 0000 took 604698 usecs
1079 13:57:49.424252 scan_static_bus for Root Device done
1080 13:57:49.427351 scan_bus: scanning of bus Root Device took 624553 usecs
1081 13:57:49.430602 done
1082 13:57:49.433952 Chrome EC: UHEPI supported
1083 13:57:49.437215 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1084 13:57:49.444323 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1085 13:57:49.450804 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1086 13:57:49.457523 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1087 13:57:49.460398 SPI flash protection: WPSW=0 SRP0=0
1088 13:57:49.467029 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1089 13:57:49.470348 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1090 13:57:49.473698 found VGA at PCI: 00:02.0
1091 13:57:49.476987 Setting up VGA for PCI: 00:02.0
1092 13:57:49.483622 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1093 13:57:49.487012 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1094 13:57:49.490501 Allocating resources...
1095 13:57:49.493897 Reading resources...
1096 13:57:49.497229 Root Device read_resources bus 0 link: 0
1097 13:57:49.500505 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1098 13:57:49.507269 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1099 13:57:49.510296 DOMAIN: 0000 read_resources bus 0 link: 0
1100 13:57:49.517288 PCI: 00:14.0 read_resources bus 0 link: 0
1101 13:57:49.520369 USB0 port 0 read_resources bus 0 link: 0
1102 13:57:49.528654 USB0 port 0 read_resources bus 0 link: 0 done
1103 13:57:49.531795 PCI: 00:14.0 read_resources bus 0 link: 0 done
1104 13:57:49.539649 PCI: 00:15.0 read_resources bus 1 link: 0
1105 13:57:49.542770 PCI: 00:15.0 read_resources bus 1 link: 0 done
1106 13:57:49.549204 PCI: 00:15.1 read_resources bus 2 link: 0
1107 13:57:49.552558 PCI: 00:15.1 read_resources bus 2 link: 0 done
1108 13:57:49.560081 PCI: 00:19.0 read_resources bus 3 link: 0
1109 13:57:49.566807 PCI: 00:19.0 read_resources bus 3 link: 0 done
1110 13:57:49.570155 PCI: 00:1d.0 read_resources bus 1 link: 0
1111 13:57:49.576820 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1112 13:57:49.580181 PCI: 00:1e.2 read_resources bus 4 link: 0
1113 13:57:49.586692 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1114 13:57:49.590164 PCI: 00:1e.3 read_resources bus 5 link: 0
1115 13:57:49.596814 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1116 13:57:49.600177 PCI: 00:1f.0 read_resources bus 0 link: 0
1117 13:57:49.606725 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1118 13:57:49.613440 DOMAIN: 0000 read_resources bus 0 link: 0 done
1119 13:57:49.616608 Root Device read_resources bus 0 link: 0 done
1120 13:57:49.619820 Done reading resources.
1121 13:57:49.622943 Show resources in subtree (Root Device)...After reading.
1122 13:57:49.629404 Root Device child on link 0 CPU_CLUSTER: 0
1123 13:57:49.632814 CPU_CLUSTER: 0 child on link 0 APIC: 00
1124 13:57:49.632907 APIC: 00
1125 13:57:49.636103 APIC: 03
1126 13:57:49.636195 APIC: 01
1127 13:57:49.639469 APIC: 02
1128 13:57:49.639561 APIC: 04
1129 13:57:49.639634 APIC: 05
1130 13:57:49.643329 APIC: 07
1131 13:57:49.643420 APIC: 06
1132 13:57:49.646424 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1133 13:57:49.656365 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1134 13:57:49.712874 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1135 13:57:49.712987 PCI: 00:00.0
1136 13:57:49.713260 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1137 13:57:49.713343 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1138 13:57:49.713426 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1139 13:57:49.713534 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1140 13:57:49.762180 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1141 13:57:49.762832 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1142 13:57:49.763108 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1143 13:57:49.763199 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1144 13:57:49.763632 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1145 13:57:49.763730 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1146 13:57:49.812019 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1147 13:57:49.812121 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1148 13:57:49.812210 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1149 13:57:49.812467 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1150 13:57:49.812747 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1151 13:57:49.833195 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1152 13:57:49.833290 PCI: 00:02.0
1153 13:57:49.833548 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 13:57:49.840223 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1155 13:57:49.850143 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1156 13:57:49.850237 PCI: 00:04.0
1157 13:57:49.853218 PCI: 00:08.0
1158 13:57:49.863430 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1159 13:57:49.863524 PCI: 00:12.0
1160 13:57:49.873271 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1161 13:57:49.876441 PCI: 00:14.0 child on link 0 USB0 port 0
1162 13:57:49.886145 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1163 13:57:49.892972 USB0 port 0 child on link 0 USB2 port 0
1164 13:57:49.893093 USB2 port 0
1165 13:57:49.896090 USB2 port 1
1166 13:57:49.896201 USB2 port 2
1167 13:57:49.899430 USB2 port 3
1168 13:57:49.899543 USB2 port 5
1169 13:57:49.902721 USB2 port 6
1170 13:57:49.906105 USB2 port 9
1171 13:57:49.906215 USB3 port 0
1172 13:57:49.909313 USB3 port 1
1173 13:57:49.909429 USB3 port 2
1174 13:57:49.912632 USB3 port 3
1175 13:57:49.912743 USB3 port 4
1176 13:57:49.915869 PCI: 00:14.2
1177 13:57:49.925862 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1178 13:57:49.935912 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1179 13:57:49.936029 PCI: 00:14.3
1180 13:57:49.945805 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1181 13:57:49.949144 PCI: 00:15.0 child on link 0 I2C: 01:15
1182 13:57:49.958950 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 13:57:49.962262 I2C: 01:15
1184 13:57:49.965439 PCI: 00:15.1 child on link 0 I2C: 02:5d
1185 13:57:49.975786 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1186 13:57:49.979219 I2C: 02:5d
1187 13:57:49.979333 GENERIC: 0.0
1188 13:57:49.982377 PCI: 00:16.0
1189 13:57:49.992385 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 13:57:49.992508 PCI: 00:17.0
1191 13:57:50.002164 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1192 13:57:50.011905 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1193 13:57:50.018696 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1194 13:57:50.028751 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1195 13:57:50.035668 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1196 13:57:50.044956 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1197 13:57:50.048391 PCI: 00:19.0 child on link 0 I2C: 03:1a
1198 13:57:50.058640 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 13:57:50.061752 I2C: 03:1a
1200 13:57:50.061837 I2C: 03:38
1201 13:57:50.064870 I2C: 03:39
1202 13:57:50.064981 I2C: 03:3a
1203 13:57:50.068168 I2C: 03:3b
1204 13:57:50.071480 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1205 13:57:50.081651 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1206 13:57:50.088387 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1207 13:57:50.098233 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1208 13:57:50.101527 PCI: 01:00.0
1209 13:57:50.111241 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1210 13:57:50.111360 PCI: 00:1e.0
1211 13:57:50.124880 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1212 13:57:50.134301 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1213 13:57:50.137771 PCI: 00:1e.2 child on link 0 SPI: 00
1214 13:57:50.147809 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1215 13:57:50.147930 SPI: 00
1216 13:57:50.151283 PCI: 00:1e.3 child on link 0 SPI: 01
1217 13:57:50.160994 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1218 13:57:50.164291 SPI: 01
1219 13:57:50.167496 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1220 13:57:50.177668 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1221 13:57:50.183994 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1222 13:57:50.187179 PNP: 0c09.0
1223 13:57:50.197162 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1224 13:57:50.197285 PCI: 00:1f.3
1225 13:57:50.207486 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1226 13:57:50.217502 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1227 13:57:50.220850 PCI: 00:1f.4
1228 13:57:50.226917 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1229 13:57:50.237025 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1230 13:57:50.240362 PCI: 00:1f.5
1231 13:57:50.250406 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1232 13:57:50.257226 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1233 13:57:50.260651 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1234 13:57:50.270490 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1235 13:57:50.273494 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1236 13:57:50.276780 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1237 13:57:50.280111 PCI: 00:17.0 18 * [0x60 - 0x67] io
1238 13:57:50.283507 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1239 13:57:50.289944 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1240 13:57:50.296432 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1241 13:57:50.303144 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1242 13:57:50.313379 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1243 13:57:50.320155 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1244 13:57:50.323503 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1245 13:57:50.329637 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1246 13:57:50.336541 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1247 13:57:50.339906 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1248 13:57:50.346572 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1249 13:57:50.350003 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1250 13:57:50.356020 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1251 13:57:50.359999 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1252 13:57:50.366502 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1253 13:57:50.369277 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1254 13:57:50.376417 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1255 13:57:50.379533 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1256 13:57:50.385783 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1257 13:57:50.389479 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1258 13:57:50.392641 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1259 13:57:50.399042 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1260 13:57:50.402654 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1261 13:57:50.409190 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1262 13:57:50.412612 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1263 13:57:50.418977 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1264 13:57:50.422179 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1265 13:57:50.428716 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1266 13:57:50.432681 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1267 13:57:50.438930 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1268 13:57:50.442295 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1269 13:57:50.452310 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1270 13:57:50.455750 avoid_fixed_resources: DOMAIN: 0000
1271 13:57:50.461955 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1272 13:57:50.465361 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1273 13:57:50.474910 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1274 13:57:50.481580 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1275 13:57:50.488754 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1276 13:57:50.498382 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1277 13:57:50.505255 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1278 13:57:50.511401 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1279 13:57:50.521713 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1280 13:57:50.527882 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1281 13:57:50.534534 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1282 13:57:50.541178 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1283 13:57:50.544560 Setting resources...
1284 13:57:50.551383 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1285 13:57:50.554585 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1286 13:57:50.557965 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1287 13:57:50.564586 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1288 13:57:50.567906 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1289 13:57:50.574671 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1290 13:57:50.580650 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1291 13:57:50.584040 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1292 13:57:50.593866 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1293 13:57:50.597826 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1294 13:57:50.604076 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1295 13:57:50.607214 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1296 13:57:50.613840 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1297 13:57:50.617534 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1298 13:57:50.624237 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1299 13:57:50.627490 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1300 13:57:50.633579 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1301 13:57:50.636905 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1302 13:57:50.643736 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1303 13:57:50.647089 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1304 13:57:50.653803 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1305 13:57:50.657222 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1306 13:57:50.660591 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1307 13:57:50.667237 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1308 13:57:50.670511 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1309 13:57:50.676657 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1310 13:57:50.679979 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1311 13:57:50.686729 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1312 13:57:50.690042 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1313 13:57:50.696626 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1314 13:57:50.699914 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1315 13:57:50.706402 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1316 13:57:50.713431 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1317 13:57:50.720022 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1318 13:57:50.726320 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1319 13:57:50.736787 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1320 13:57:50.740014 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1321 13:57:50.746576 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1322 13:57:50.752880 Root Device assign_resources, bus 0 link: 0
1323 13:57:50.756216 DOMAIN: 0000 assign_resources, bus 0 link: 0
1324 13:57:50.766636 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1325 13:57:50.772670 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1326 13:57:50.782650 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1327 13:57:50.789319 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1328 13:57:50.799393 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1329 13:57:50.806124 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1330 13:57:50.809322 PCI: 00:14.0 assign_resources, bus 0 link: 0
1331 13:57:50.816138 PCI: 00:14.0 assign_resources, bus 0 link: 0
1332 13:57:50.822691 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1333 13:57:50.832327 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1334 13:57:50.838868 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1335 13:57:50.849220 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1336 13:57:50.852368 PCI: 00:15.0 assign_resources, bus 1 link: 0
1337 13:57:50.858811 PCI: 00:15.0 assign_resources, bus 1 link: 0
1338 13:57:50.865526 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1339 13:57:50.868869 PCI: 00:15.1 assign_resources, bus 2 link: 0
1340 13:57:50.875654 PCI: 00:15.1 assign_resources, bus 2 link: 0
1341 13:57:50.882462 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1342 13:57:50.891874 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1343 13:57:50.898723 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1344 13:57:50.905295 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1345 13:57:50.915211 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1346 13:57:50.921544 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1347 13:57:50.928491 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1348 13:57:50.938608 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1349 13:57:50.941799 PCI: 00:19.0 assign_resources, bus 3 link: 0
1350 13:57:50.948807 PCI: 00:19.0 assign_resources, bus 3 link: 0
1351 13:57:50.955397 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1352 13:57:50.964870 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1353 13:57:50.974828 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1354 13:57:50.977939 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1355 13:57:50.984740 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1356 13:57:50.991391 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1357 13:57:50.998116 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1358 13:57:51.008085 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1359 13:57:51.011460 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1360 13:57:51.018266 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1361 13:57:51.024254 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1362 13:57:51.031401 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1363 13:57:51.034355 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1364 13:57:51.037285 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1365 13:57:51.044727 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1366 13:57:51.048312 LPC: Trying to open IO window from 800 size 1ff
1367 13:57:51.058193 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1368 13:57:51.064428 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1369 13:57:51.074921 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1370 13:57:51.081003 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1371 13:57:51.087822 DOMAIN: 0000 assign_resources, bus 0 link: 0
1372 13:57:51.090588 Root Device assign_resources, bus 0 link: 0
1373 13:57:51.093924 Done setting resources.
1374 13:57:51.100808 Show resources in subtree (Root Device)...After assigning values.
1375 13:57:51.104081 Root Device child on link 0 CPU_CLUSTER: 0
1376 13:57:51.107595 CPU_CLUSTER: 0 child on link 0 APIC: 00
1377 13:57:51.110795 APIC: 00
1378 13:57:51.110900 APIC: 03
1379 13:57:51.114024 APIC: 01
1380 13:57:51.114119 APIC: 02
1381 13:57:51.114191 APIC: 04
1382 13:57:51.117422 APIC: 05
1383 13:57:51.117518 APIC: 07
1384 13:57:51.117599 APIC: 06
1385 13:57:51.124267 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1386 13:57:51.134105 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1387 13:57:51.143431 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1388 13:57:51.146672 PCI: 00:00.0
1389 13:57:51.156796 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1390 13:57:51.163420 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1391 13:57:51.173556 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1392 13:57:51.183334 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1393 13:57:51.193339 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1394 13:57:51.202934 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1395 13:57:51.209727 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1396 13:57:51.219867 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1397 13:57:51.229817 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1398 13:57:51.239788 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1399 13:57:51.249421 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1400 13:57:51.259367 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1401 13:57:51.265558 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1402 13:57:51.275851 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1403 13:57:51.285736 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1404 13:57:51.295396 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1405 13:57:51.299052 PCI: 00:02.0
1406 13:57:51.308857 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1407 13:57:51.319011 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1408 13:57:51.328389 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1409 13:57:51.328493 PCI: 00:04.0
1410 13:57:51.331842 PCI: 00:08.0
1411 13:57:51.341999 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1412 13:57:51.342093 PCI: 00:12.0
1413 13:57:51.351805 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1414 13:57:51.358683 PCI: 00:14.0 child on link 0 USB0 port 0
1415 13:57:51.368713 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1416 13:57:51.371891 USB0 port 0 child on link 0 USB2 port 0
1417 13:57:51.375010 USB2 port 0
1418 13:57:51.375106 USB2 port 1
1419 13:57:51.378075 USB2 port 2
1420 13:57:51.378174 USB2 port 3
1421 13:57:51.381784 USB2 port 5
1422 13:57:51.381880 USB2 port 6
1423 13:57:51.384977 USB2 port 9
1424 13:57:51.385071 USB3 port 0
1425 13:57:51.388415 USB3 port 1
1426 13:57:51.391663 USB3 port 2
1427 13:57:51.391759 USB3 port 3
1428 13:57:51.395024 USB3 port 4
1429 13:57:51.395119 PCI: 00:14.2
1430 13:57:51.404717 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1431 13:57:51.414936 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1432 13:57:51.418417 PCI: 00:14.3
1433 13:57:51.427766 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1434 13:57:51.431207 PCI: 00:15.0 child on link 0 I2C: 01:15
1435 13:57:51.441233 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1436 13:57:51.444703 I2C: 01:15
1437 13:57:51.447998 PCI: 00:15.1 child on link 0 I2C: 02:5d
1438 13:57:51.457961 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1439 13:57:51.461182 I2C: 02:5d
1440 13:57:51.461277 GENERIC: 0.0
1441 13:57:51.464385 PCI: 00:16.0
1442 13:57:51.474372 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1443 13:57:51.474470 PCI: 00:17.0
1444 13:57:51.484491 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1445 13:57:51.497247 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1446 13:57:51.504058 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1447 13:57:51.513787 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1448 13:57:51.523977 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1449 13:57:51.533742 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1450 13:57:51.537097 PCI: 00:19.0 child on link 0 I2C: 03:1a
1451 13:57:51.546705 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1452 13:57:51.549967 I2C: 03:1a
1453 13:57:51.550057 I2C: 03:38
1454 13:57:51.553367 I2C: 03:39
1455 13:57:51.553493 I2C: 03:3a
1456 13:57:51.557222 I2C: 03:3b
1457 13:57:51.559916 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1458 13:57:51.570472 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1459 13:57:51.580197 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1460 13:57:51.589903 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1461 13:57:51.593131 PCI: 01:00.0
1462 13:57:51.602997 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1463 13:57:51.603092 PCI: 00:1e.0
1464 13:57:51.616327 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1465 13:57:51.626494 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1466 13:57:51.629700 PCI: 00:1e.2 child on link 0 SPI: 00
1467 13:57:51.639650 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1468 13:57:51.639743 SPI: 00
1469 13:57:51.646287 PCI: 00:1e.3 child on link 0 SPI: 01
1470 13:57:51.655699 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1471 13:57:51.655793 SPI: 01
1472 13:57:51.659225 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1473 13:57:51.669265 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1474 13:57:51.679004 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1475 13:57:51.679099 PNP: 0c09.0
1476 13:57:51.689125 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1477 13:57:51.689217 PCI: 00:1f.3
1478 13:57:51.699255 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1479 13:57:51.711852 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1480 13:57:51.711983 PCI: 00:1f.4
1481 13:57:51.721841 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1482 13:57:51.731861 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1483 13:57:51.731988 PCI: 00:1f.5
1484 13:57:51.745408 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1485 13:57:51.745538 Done allocating resources.
1486 13:57:51.752114 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1487 13:57:51.754851 Enabling resources...
1488 13:57:51.758219 PCI: 00:00.0 subsystem <- 8086/9b61
1489 13:57:51.761499 PCI: 00:00.0 cmd <- 06
1490 13:57:51.764855 PCI: 00:02.0 subsystem <- 8086/9b41
1491 13:57:51.768173 PCI: 00:02.0 cmd <- 03
1492 13:57:51.771560 PCI: 00:08.0 cmd <- 06
1493 13:57:51.774988 PCI: 00:12.0 subsystem <- 8086/02f9
1494 13:57:51.777726 PCI: 00:12.0 cmd <- 02
1495 13:57:51.780978 PCI: 00:14.0 subsystem <- 8086/02ed
1496 13:57:51.784200 PCI: 00:14.0 cmd <- 02
1497 13:57:51.784331 PCI: 00:14.2 cmd <- 02
1498 13:57:51.791079 PCI: 00:14.3 subsystem <- 8086/02f0
1499 13:57:51.791200 PCI: 00:14.3 cmd <- 02
1500 13:57:51.794326 PCI: 00:15.0 subsystem <- 8086/02e8
1501 13:57:51.797445 PCI: 00:15.0 cmd <- 02
1502 13:57:51.801268 PCI: 00:15.1 subsystem <- 8086/02e9
1503 13:57:51.804214 PCI: 00:15.1 cmd <- 02
1504 13:57:51.807806 PCI: 00:16.0 subsystem <- 8086/02e0
1505 13:57:51.810932 PCI: 00:16.0 cmd <- 02
1506 13:57:51.814225 PCI: 00:17.0 subsystem <- 8086/02d3
1507 13:57:51.817502 PCI: 00:17.0 cmd <- 03
1508 13:57:51.820842 PCI: 00:19.0 subsystem <- 8086/02c5
1509 13:57:51.824173 PCI: 00:19.0 cmd <- 02
1510 13:57:51.827537 PCI: 00:1d.0 bridge ctrl <- 0013
1511 13:57:51.830889 PCI: 00:1d.0 subsystem <- 8086/02b0
1512 13:57:51.834107 PCI: 00:1d.0 cmd <- 06
1513 13:57:51.837866 PCI: 00:1e.0 subsystem <- 8086/02a8
1514 13:57:51.840495 PCI: 00:1e.0 cmd <- 06
1515 13:57:51.843742 PCI: 00:1e.2 subsystem <- 8086/02aa
1516 13:57:51.843859 PCI: 00:1e.2 cmd <- 06
1517 13:57:51.850658 PCI: 00:1e.3 subsystem <- 8086/02ab
1518 13:57:51.850776 PCI: 00:1e.3 cmd <- 02
1519 13:57:51.853791 PCI: 00:1f.0 subsystem <- 8086/0284
1520 13:57:51.857104 PCI: 00:1f.0 cmd <- 407
1521 13:57:51.860585 PCI: 00:1f.3 subsystem <- 8086/02c8
1522 13:57:51.863773 PCI: 00:1f.3 cmd <- 02
1523 13:57:51.867167 PCI: 00:1f.4 subsystem <- 8086/02a3
1524 13:57:51.870539 PCI: 00:1f.4 cmd <- 03
1525 13:57:51.873778 PCI: 00:1f.5 subsystem <- 8086/02a4
1526 13:57:51.877121 PCI: 00:1f.5 cmd <- 406
1527 13:57:51.885806 PCI: 01:00.0 cmd <- 02
1528 13:57:51.891131 done.
1529 13:57:51.900182 ME: Version: 14.0.39.1367
1530 13:57:51.906435 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 8
1531 13:57:51.910317 Initializing devices...
1532 13:57:51.910440 Root Device init ...
1533 13:57:51.916290 Chrome EC: Set SMI mask to 0x0000000000000000
1534 13:57:51.919630 Chrome EC: clear events_b mask to 0x0000000000000000
1535 13:57:51.926229 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1536 13:57:51.932770 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1537 13:57:51.939368 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1538 13:57:51.942625 Chrome EC: Set WAKE mask to 0x0000000000000000
1539 13:57:51.946034 Root Device init finished in 35227 usecs
1540 13:57:51.949860 CPU_CLUSTER: 0 init ...
1541 13:57:51.956263 CPU_CLUSTER: 0 init finished in 2447 usecs
1542 13:57:51.960782 PCI: 00:00.0 init ...
1543 13:57:51.964208 CPU TDP: 15 Watts
1544 13:57:51.967582 CPU PL2 = 64 Watts
1545 13:57:51.970726 PCI: 00:00.0 init finished in 7084 usecs
1546 13:57:51.974091 PCI: 00:02.0 init ...
1547 13:57:51.977460 PCI: 00:02.0 init finished in 2255 usecs
1548 13:57:51.980278 PCI: 00:08.0 init ...
1549 13:57:51.983766 PCI: 00:08.0 init finished in 2252 usecs
1550 13:57:51.987201 PCI: 00:12.0 init ...
1551 13:57:51.990418 PCI: 00:12.0 init finished in 2254 usecs
1552 13:57:51.993695 PCI: 00:14.0 init ...
1553 13:57:51.997030 PCI: 00:14.0 init finished in 2254 usecs
1554 13:57:52.000561 PCI: 00:14.2 init ...
1555 13:57:52.003792 PCI: 00:14.2 init finished in 2253 usecs
1556 13:57:52.007125 PCI: 00:14.3 init ...
1557 13:57:52.010576 PCI: 00:14.3 init finished in 2271 usecs
1558 13:57:52.013542 PCI: 00:15.0 init ...
1559 13:57:52.016462 DW I2C bus 0 at 0xd121f000 (400 KHz)
1560 13:57:52.020302 PCI: 00:15.0 init finished in 5977 usecs
1561 13:57:52.023373 PCI: 00:15.1 init ...
1562 13:57:52.027179 DW I2C bus 1 at 0xd1220000 (400 KHz)
1563 13:57:52.033830 PCI: 00:15.1 init finished in 5976 usecs
1564 13:57:52.033930 PCI: 00:16.0 init ...
1565 13:57:52.039735 PCI: 00:16.0 init finished in 2253 usecs
1566 13:57:52.043662 PCI: 00:19.0 init ...
1567 13:57:52.046402 DW I2C bus 4 at 0xd1222000 (400 KHz)
1568 13:57:52.050378 PCI: 00:19.0 init finished in 5979 usecs
1569 13:57:52.053551 PCI: 00:1d.0 init ...
1570 13:57:52.056952 Initializing PCH PCIe bridge.
1571 13:57:52.060113 PCI: 00:1d.0 init finished in 5286 usecs
1572 13:57:52.063462 PCI: 00:1f.0 init ...
1573 13:57:52.066722 IOAPIC: Initializing IOAPIC at 0xfec00000
1574 13:57:52.073104 IOAPIC: Bootstrap Processor Local APIC = 0x00
1575 13:57:52.073197 IOAPIC: ID = 0x02
1576 13:57:52.076486 IOAPIC: Dumping registers
1577 13:57:52.079874 reg 0x0000: 0x02000000
1578 13:57:52.083161 reg 0x0001: 0x00770020
1579 13:57:52.083253 reg 0x0002: 0x00000000
1580 13:57:52.089953 PCI: 00:1f.0 init finished in 23549 usecs
1581 13:57:52.093343 PCI: 00:1f.4 init ...
1582 13:57:52.095924 PCI: 00:1f.4 init finished in 2264 usecs
1583 13:57:52.106846 PCI: 01:00.0 init ...
1584 13:57:52.110204 PCI: 01:00.0 init finished in 2253 usecs
1585 13:57:52.114231 PNP: 0c09.0 init ...
1586 13:57:52.117381 Google Chrome EC uptime: 11.058 seconds
1587 13:57:52.124686 Google Chrome AP resets since EC boot: 0
1588 13:57:52.127781 Google Chrome most recent AP reset causes:
1589 13:57:52.134186 Google Chrome EC reset flags at last EC boot: reset-pin
1590 13:57:52.137281 PNP: 0c09.0 init finished in 20574 usecs
1591 13:57:52.141121 Devices initialized
1592 13:57:52.144377 Show all devs... After init.
1593 13:57:52.144470 Root Device: enabled 1
1594 13:57:52.147593 CPU_CLUSTER: 0: enabled 1
1595 13:57:52.150917 DOMAIN: 0000: enabled 1
1596 13:57:52.151009 APIC: 00: enabled 1
1597 13:57:52.154390 PCI: 00:00.0: enabled 1
1598 13:57:52.157102 PCI: 00:02.0: enabled 1
1599 13:57:52.160505 PCI: 00:04.0: enabled 0
1600 13:57:52.160597 PCI: 00:05.0: enabled 0
1601 13:57:52.164163 PCI: 00:12.0: enabled 1
1602 13:57:52.167408 PCI: 00:12.5: enabled 0
1603 13:57:52.170740 PCI: 00:12.6: enabled 0
1604 13:57:52.170831 PCI: 00:14.0: enabled 1
1605 13:57:52.173999 PCI: 00:14.1: enabled 0
1606 13:57:52.177098 PCI: 00:14.3: enabled 1
1607 13:57:52.177190 PCI: 00:14.5: enabled 0
1608 13:57:52.180408 PCI: 00:15.0: enabled 1
1609 13:57:52.183742 PCI: 00:15.1: enabled 1
1610 13:57:52.187113 PCI: 00:15.2: enabled 0
1611 13:57:52.187205 PCI: 00:15.3: enabled 0
1612 13:57:52.190516 PCI: 00:16.0: enabled 1
1613 13:57:52.193877 PCI: 00:16.1: enabled 0
1614 13:57:52.197161 PCI: 00:16.2: enabled 0
1615 13:57:52.197281 PCI: 00:16.3: enabled 0
1616 13:57:52.200404 PCI: 00:16.4: enabled 0
1617 13:57:52.203771 PCI: 00:16.5: enabled 0
1618 13:57:52.206918 PCI: 00:17.0: enabled 1
1619 13:57:52.207000 PCI: 00:19.0: enabled 1
1620 13:57:52.210309 PCI: 00:19.1: enabled 0
1621 13:57:52.213665 PCI: 00:19.2: enabled 0
1622 13:57:52.217173 PCI: 00:1a.0: enabled 0
1623 13:57:52.217260 PCI: 00:1c.0: enabled 0
1624 13:57:52.220225 PCI: 00:1c.1: enabled 0
1625 13:57:52.223454 PCI: 00:1c.2: enabled 0
1626 13:57:52.223546 PCI: 00:1c.3: enabled 0
1627 13:57:52.226790 PCI: 00:1c.4: enabled 0
1628 13:57:52.230390 PCI: 00:1c.5: enabled 0
1629 13:57:52.233428 PCI: 00:1c.6: enabled 0
1630 13:57:52.233520 PCI: 00:1c.7: enabled 0
1631 13:57:52.236770 PCI: 00:1d.0: enabled 1
1632 13:57:52.239994 PCI: 00:1d.1: enabled 0
1633 13:57:52.243366 PCI: 00:1d.2: enabled 0
1634 13:57:52.243463 PCI: 00:1d.3: enabled 0
1635 13:57:52.246519 PCI: 00:1d.4: enabled 0
1636 13:57:52.249880 PCI: 00:1d.5: enabled 0
1637 13:57:52.253066 PCI: 00:1e.0: enabled 1
1638 13:57:52.253158 PCI: 00:1e.1: enabled 0
1639 13:57:52.256327 PCI: 00:1e.2: enabled 1
1640 13:57:52.259660 PCI: 00:1e.3: enabled 1
1641 13:57:52.259752 PCI: 00:1f.0: enabled 1
1642 13:57:52.263060 PCI: 00:1f.1: enabled 0
1643 13:57:52.266435 PCI: 00:1f.2: enabled 0
1644 13:57:52.269922 PCI: 00:1f.3: enabled 1
1645 13:57:52.270014 PCI: 00:1f.4: enabled 1
1646 13:57:52.272863 PCI: 00:1f.5: enabled 1
1647 13:57:52.276573 PCI: 00:1f.6: enabled 0
1648 13:57:52.279813 USB0 port 0: enabled 1
1649 13:57:52.279905 I2C: 01:15: enabled 1
1650 13:57:52.282931 I2C: 02:5d: enabled 1
1651 13:57:52.286152 GENERIC: 0.0: enabled 1
1652 13:57:52.286244 I2C: 03:1a: enabled 1
1653 13:57:52.289534 I2C: 03:38: enabled 1
1654 13:57:52.292833 I2C: 03:39: enabled 1
1655 13:57:52.292925 I2C: 03:3a: enabled 1
1656 13:57:52.296180 I2C: 03:3b: enabled 1
1657 13:57:52.299521 PCI: 00:00.0: enabled 1
1658 13:57:52.299613 SPI: 00: enabled 1
1659 13:57:52.302826 SPI: 01: enabled 1
1660 13:57:52.306093 PNP: 0c09.0: enabled 1
1661 13:57:52.306187 USB2 port 0: enabled 1
1662 13:57:52.309385 USB2 port 1: enabled 1
1663 13:57:52.312895 USB2 port 2: enabled 0
1664 13:57:52.316238 USB2 port 3: enabled 0
1665 13:57:52.316331 USB2 port 5: enabled 0
1666 13:57:52.319607 USB2 port 6: enabled 1
1667 13:57:52.322896 USB2 port 9: enabled 1
1668 13:57:52.322989 USB3 port 0: enabled 1
1669 13:57:52.325924 USB3 port 1: enabled 1
1670 13:57:52.329244 USB3 port 2: enabled 1
1671 13:57:52.329336 USB3 port 3: enabled 1
1672 13:57:52.332664 USB3 port 4: enabled 0
1673 13:57:52.335981 APIC: 03: enabled 1
1674 13:57:52.336079 APIC: 01: enabled 1
1675 13:57:52.339054 APIC: 02: enabled 1
1676 13:57:52.342767 APIC: 04: enabled 1
1677 13:57:52.342859 APIC: 05: enabled 1
1678 13:57:52.345782 APIC: 07: enabled 1
1679 13:57:52.348931 APIC: 06: enabled 1
1680 13:57:52.349010 PCI: 00:08.0: enabled 1
1681 13:57:52.352130 PCI: 00:14.2: enabled 1
1682 13:57:52.355977 PCI: 01:00.0: enabled 1
1683 13:57:52.359081 Disabling ACPI via APMC:
1684 13:57:52.362334 done.
1685 13:57:52.365586 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1686 13:57:52.369016 ELOG: NV offset 0xaf0000 size 0x4000
1687 13:57:52.375875 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1688 13:57:52.382972 ELOG: Event(17) added with size 13 at 2023-04-20 13:57:52 UTC
1689 13:57:52.389549 ELOG: Event(92) added with size 9 at 2023-04-20 13:57:52 UTC
1690 13:57:52.396220 ELOG: Event(93) added with size 9 at 2023-04-20 13:57:52 UTC
1691 13:57:52.402433 ELOG: Event(9A) added with size 9 at 2023-04-20 13:57:52 UTC
1692 13:57:52.409558 ELOG: Event(9E) added with size 10 at 2023-04-20 13:57:52 UTC
1693 13:57:52.415617 ELOG: Event(9F) added with size 14 at 2023-04-20 13:57:52 UTC
1694 13:57:52.419001 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1695 13:57:52.426359 ELOG: Event(A1) added with size 10 at 2023-04-20 13:57:52 UTC
1696 13:57:52.436297 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1697 13:57:52.443011 ELOG: Event(A0) added with size 9 at 2023-04-20 13:57:52 UTC
1698 13:57:52.446353 elog_add_boot_reason: Logged dev mode boot
1699 13:57:52.449732 Finalize devices...
1700 13:57:52.449823 PCI: 00:17.0 final
1701 13:57:52.452832 Devices finalized
1702 13:57:52.456450 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1703 13:57:52.462874 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1704 13:57:52.466212 ME: HFSTS1 : 0x90000245
1705 13:57:52.469189 ME: HFSTS2 : 0x3B850126
1706 13:57:52.475671 ME: HFSTS3 : 0x00000020
1707 13:57:52.479065 ME: HFSTS4 : 0x00004800
1708 13:57:52.482423 ME: HFSTS5 : 0x00000000
1709 13:57:52.485703 ME: HFSTS6 : 0x40400006
1710 13:57:52.488927 ME: Manufacturing Mode : NO
1711 13:57:52.492755 ME: FW Partition Table : OK
1712 13:57:52.495824 ME: Bringup Loader Failure : NO
1713 13:57:52.499046 ME: Firmware Init Complete : YES
1714 13:57:52.502457 ME: Boot Options Present : NO
1715 13:57:52.505931 ME: Update In Progress : NO
1716 13:57:52.509283 ME: D0i3 Support : YES
1717 13:57:52.512070 ME: Low Power State Enabled : NO
1718 13:57:52.515824 ME: CPU Replaced : NO
1719 13:57:52.519254 ME: CPU Replacement Valid : YES
1720 13:57:52.522559 ME: Current Working State : 5
1721 13:57:52.525288 ME: Current Operation State : 1
1722 13:57:52.528713 ME: Current Operation Mode : 0
1723 13:57:52.532567 ME: Error Code : 0
1724 13:57:52.535658 ME: CPU Debug Disabled : YES
1725 13:57:52.539116 ME: TXT Support : NO
1726 13:57:52.545239 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1727 13:57:52.551718 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1728 13:57:52.551811 CBFS @ c08000 size 3f8000
1729 13:57:52.558348 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1730 13:57:52.561557 CBFS: Locating 'fallback/dsdt.aml'
1731 13:57:52.565577 CBFS: Found @ offset 10bb80 size 3fa5
1732 13:57:52.572088 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1733 13:57:52.575205 CBFS @ c08000 size 3f8000
1734 13:57:52.578350 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1735 13:57:52.581708 CBFS: Locating 'fallback/slic'
1736 13:57:52.587047 CBFS: 'fallback/slic' not found.
1737 13:57:52.593506 ACPI: Writing ACPI tables at 99b3e000.
1738 13:57:52.593629 ACPI: * FACS
1739 13:57:52.596909 ACPI: * DSDT
1740 13:57:52.600284 Ramoops buffer: 0x100000@0x99a3d000.
1741 13:57:52.603515 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1742 13:57:52.609923 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1743 13:57:52.613258 Google Chrome EC: version:
1744 13:57:52.616545 ro: helios_v2.0.2659-56403530b
1745 13:57:52.619813 rw: helios_v2.0.2849-c41de27e7d
1746 13:57:52.619906 running image: 1
1747 13:57:52.624383 ACPI: * FADT
1748 13:57:52.624475 SCI is IRQ9
1749 13:57:52.631043 ACPI: added table 1/32, length now 40
1750 13:57:52.631136 ACPI: * SSDT
1751 13:57:52.634267 Found 1 CPU(s) with 8 core(s) each.
1752 13:57:52.637372 Error: Could not locate 'wifi_sar' in VPD.
1753 13:57:52.644061 Checking CBFS for default SAR values
1754 13:57:52.647492 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1755 13:57:52.650843 CBFS @ c08000 size 3f8000
1756 13:57:52.657433 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1757 13:57:52.660810 CBFS: Locating 'wifi_sar_defaults.hex'
1758 13:57:52.664263 CBFS: Found @ offset 5fac0 size 77
1759 13:57:52.667607 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1760 13:57:52.673701 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1761 13:57:52.677519 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1762 13:57:52.683974 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1763 13:57:52.687274 failed to find key in VPD: dsm_calib_r0_0
1764 13:57:52.697016 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1765 13:57:52.700248 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1766 13:57:52.703565 failed to find key in VPD: dsm_calib_r0_1
1767 13:57:52.713302 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1768 13:57:52.719976 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1769 13:57:52.723301 failed to find key in VPD: dsm_calib_r0_2
1770 13:57:52.733487 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1771 13:57:52.736837 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1772 13:57:52.743259 failed to find key in VPD: dsm_calib_r0_3
1773 13:57:52.750017 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1774 13:57:52.756598 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1775 13:57:52.759870 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1776 13:57:52.766488 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1777 13:57:52.769891 EC returned error result code 1
1778 13:57:52.773154 EC returned error result code 1
1779 13:57:52.776590 EC returned error result code 1
1780 13:57:52.779914 PS2K: Bad resp from EC. Vivaldi disabled!
1781 13:57:52.786775 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1782 13:57:52.793392 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1783 13:57:52.796725 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1784 13:57:52.803174 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1785 13:57:52.806497 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1786 13:57:52.813017 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1787 13:57:52.819499 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1788 13:57:52.826050 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1789 13:57:52.829450 ACPI: added table 2/32, length now 44
1790 13:57:52.829561 ACPI: * MCFG
1791 13:57:52.836248 ACPI: added table 3/32, length now 48
1792 13:57:52.836363 ACPI: * TPM2
1793 13:57:52.839517 TPM2 log created at 99a2d000
1794 13:57:52.842856 ACPI: added table 4/32, length now 52
1795 13:57:52.846175 ACPI: * MADT
1796 13:57:52.846281 SCI is IRQ9
1797 13:57:52.849500 ACPI: added table 5/32, length now 56
1798 13:57:52.852875 current = 99b43ac0
1799 13:57:52.852984 ACPI: * DMAR
1800 13:57:52.856348 ACPI: added table 6/32, length now 60
1801 13:57:52.859032 ACPI: * IGD OpRegion
1802 13:57:52.862434 GMA: Found VBT in CBFS
1803 13:57:52.865890 GMA: Found valid VBT in CBFS
1804 13:57:52.869240 ACPI: added table 7/32, length now 64
1805 13:57:52.869351 ACPI: * HPET
1806 13:57:52.872629 ACPI: added table 8/32, length now 68
1807 13:57:52.876032 ACPI: done.
1808 13:57:52.879271 ACPI tables: 31744 bytes.
1809 13:57:52.882600 smbios_write_tables: 99a2c000
1810 13:57:52.885809 EC returned error result code 3
1811 13:57:52.888993 Couldn't obtain OEM name from CBI
1812 13:57:52.892756 Create SMBIOS type 17
1813 13:57:52.895650 PCI: 00:00.0 (Intel Cannonlake)
1814 13:57:52.895767 PCI: 00:14.3 (Intel WiFi)
1815 13:57:52.898823 SMBIOS tables: 939 bytes.
1816 13:57:52.902523 Writing table forward entry at 0x00000500
1817 13:57:52.908807 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1818 13:57:52.912125 Writing coreboot table at 0x99b62000
1819 13:57:52.918930 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1820 13:57:52.922211 1. 0000000000001000-000000000009ffff: RAM
1821 13:57:52.928459 2. 00000000000a0000-00000000000fffff: RESERVED
1822 13:57:52.931690 3. 0000000000100000-0000000099a2bfff: RAM
1823 13:57:52.938538 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1824 13:57:52.941890 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1825 13:57:52.948244 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1826 13:57:52.954968 7. 000000009a000000-000000009f7fffff: RESERVED
1827 13:57:52.958217 8. 00000000e0000000-00000000efffffff: RESERVED
1828 13:57:52.964969 9. 00000000fc000000-00000000fc000fff: RESERVED
1829 13:57:52.968103 10. 00000000fe000000-00000000fe00ffff: RESERVED
1830 13:57:52.971371 11. 00000000fed10000-00000000fed17fff: RESERVED
1831 13:57:52.978255 12. 00000000fed80000-00000000fed83fff: RESERVED
1832 13:57:52.981671 13. 00000000fed90000-00000000fed91fff: RESERVED
1833 13:57:52.988347 14. 00000000feda0000-00000000feda1fff: RESERVED
1834 13:57:52.991598 15. 0000000100000000-000000045e7fffff: RAM
1835 13:57:52.994922 Graphics framebuffer located at 0xc0000000
1836 13:57:52.998229 Passing 5 GPIOs to payload:
1837 13:57:53.004803 NAME | PORT | POLARITY | VALUE
1838 13:57:53.008022 write protect | undefined | high | low
1839 13:57:53.014699 lid | undefined | high | high
1840 13:57:53.021204 power | undefined | high | low
1841 13:57:53.024069 oprom | undefined | high | low
1842 13:57:53.031274 EC in RW | 0x000000cb | high | low
1843 13:57:53.031366 Board ID: 4
1844 13:57:53.037548 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1845 13:57:53.040712 CBFS @ c08000 size 3f8000
1846 13:57:53.043839 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1847 13:57:53.050613 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1848 13:57:53.054498 coreboot table: 1492 bytes.
1849 13:57:53.057081 IMD ROOT 0. 99fff000 00001000
1850 13:57:53.060399 IMD SMALL 1. 99ffe000 00001000
1851 13:57:53.063856 FSP MEMORY 2. 99c4e000 003b0000
1852 13:57:53.067344 CONSOLE 3. 99c2e000 00020000
1853 13:57:53.070542 FMAP 4. 99c2d000 0000054e
1854 13:57:53.073741 TIME STAMP 5. 99c2c000 00000910
1855 13:57:53.077148 VBOOT WORK 6. 99c18000 00014000
1856 13:57:53.081022 MRC DATA 7. 99c16000 00001958
1857 13:57:53.083726 ROMSTG STCK 8. 99c15000 00001000
1858 13:57:53.087128 AFTER CAR 9. 99c0b000 0000a000
1859 13:57:53.090413 RAMSTAGE 10. 99baf000 0005c000
1860 13:57:53.093577 REFCODE 11. 99b7a000 00035000
1861 13:57:53.096996 SMM BACKUP 12. 99b6a000 00010000
1862 13:57:53.100272 COREBOOT 13. 99b62000 00008000
1863 13:57:53.103578 ACPI 14. 99b3e000 00024000
1864 13:57:53.107339 ACPI GNVS 15. 99b3d000 00001000
1865 13:57:53.110538 RAMOOPS 16. 99a3d000 00100000
1866 13:57:53.113847 TPM2 TCGLOG17. 99a2d000 00010000
1867 13:57:53.117093 SMBIOS 18. 99a2c000 00000800
1868 13:57:53.120349 IMD small region:
1869 13:57:53.123754 IMD ROOT 0. 99ffec00 00000400
1870 13:57:53.127040 FSP RUNTIME 1. 99ffebe0 00000004
1871 13:57:53.130281 EC HOSTEVENT 2. 99ffebc0 00000008
1872 13:57:53.133562 POWER STATE 3. 99ffeb80 00000040
1873 13:57:53.136855 ROMSTAGE 4. 99ffeb60 00000004
1874 13:57:53.140276 MEM INFO 5. 99ffe9a0 000001b9
1875 13:57:53.143513 VPD 6. 99ffe920 0000006c
1876 13:57:53.147034 MTRR: Physical address space:
1877 13:57:53.153672 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1878 13:57:53.160021 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1879 13:57:53.166740 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1880 13:57:53.173569 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1881 13:57:53.176851 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1882 13:57:53.182966 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1883 13:57:53.189706 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1884 13:57:53.193028 MTRR: Fixed MSR 0x250 0x0606060606060606
1885 13:57:53.199819 MTRR: Fixed MSR 0x258 0x0606060606060606
1886 13:57:53.203054 MTRR: Fixed MSR 0x259 0x0000000000000000
1887 13:57:53.206400 MTRR: Fixed MSR 0x268 0x0606060606060606
1888 13:57:53.209770 MTRR: Fixed MSR 0x269 0x0606060606060606
1889 13:57:53.216134 MTRR: Fixed MSR 0x26a 0x0606060606060606
1890 13:57:53.219354 MTRR: Fixed MSR 0x26b 0x0606060606060606
1891 13:57:53.223155 MTRR: Fixed MSR 0x26c 0x0606060606060606
1892 13:57:53.226402 MTRR: Fixed MSR 0x26d 0x0606060606060606
1893 13:57:53.232731 MTRR: Fixed MSR 0x26e 0x0606060606060606
1894 13:57:53.235978 MTRR: Fixed MSR 0x26f 0x0606060606060606
1895 13:57:53.239214 call enable_fixed_mtrr()
1896 13:57:53.242540 CPU physical address size: 39 bits
1897 13:57:53.245968 MTRR: default type WB/UC MTRR counts: 6/8.
1898 13:57:53.249368 MTRR: WB selected as default type.
1899 13:57:53.255760 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1900 13:57:53.262204 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1901 13:57:53.269138 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1902 13:57:53.275331 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1903 13:57:53.282567 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1904 13:57:53.288660 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1905 13:57:53.292087 MTRR: Fixed MSR 0x250 0x0606060606060606
1906 13:57:53.295441 MTRR: Fixed MSR 0x258 0x0606060606060606
1907 13:57:53.302205 MTRR: Fixed MSR 0x259 0x0000000000000000
1908 13:57:53.305514 MTRR: Fixed MSR 0x268 0x0606060606060606
1909 13:57:53.308819 MTRR: Fixed MSR 0x269 0x0606060606060606
1910 13:57:53.311576 MTRR: Fixed MSR 0x26a 0x0606060606060606
1911 13:57:53.318130 MTRR: Fixed MSR 0x26b 0x0606060606060606
1912 13:57:53.321352 MTRR: Fixed MSR 0x26c 0x0606060606060606
1913 13:57:53.324637 MTRR: Fixed MSR 0x26d 0x0606060606060606
1914 13:57:53.328468 MTRR: Fixed MSR 0x26e 0x0606060606060606
1915 13:57:53.334849 MTRR: Fixed MSR 0x26f 0x0606060606060606
1916 13:57:53.334940
1917 13:57:53.335012 MTRR check
1918 13:57:53.337894 call enable_fixed_mtrr()
1919 13:57:53.341263 Fixed MTRRs : Enabled
1920 13:57:53.341382 Variable MTRRs: Enabled
1921 13:57:53.341484
1922 13:57:53.344457 CPU physical address size: 39 bits
1923 13:57:53.351188 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1924 13:57:53.354430 MTRR: Fixed MSR 0x250 0x0606060606060606
1925 13:57:53.360958 MTRR: Fixed MSR 0x258 0x0606060606060606
1926 13:57:53.364240 MTRR: Fixed MSR 0x259 0x0000000000000000
1927 13:57:53.367551 MTRR: Fixed MSR 0x268 0x0606060606060606
1928 13:57:53.371471 MTRR: Fixed MSR 0x269 0x0606060606060606
1929 13:57:53.377564 MTRR: Fixed MSR 0x26a 0x0606060606060606
1930 13:57:53.380936 MTRR: Fixed MSR 0x26b 0x0606060606060606
1931 13:57:53.384267 MTRR: Fixed MSR 0x26c 0x0606060606060606
1932 13:57:53.387516 MTRR: Fixed MSR 0x26d 0x0606060606060606
1933 13:57:53.394304 MTRR: Fixed MSR 0x26e 0x0606060606060606
1934 13:57:53.397612 MTRR: Fixed MSR 0x26f 0x0606060606060606
1935 13:57:53.400938 MTRR: Fixed MSR 0x250 0x0606060606060606
1936 13:57:53.404444 call enable_fixed_mtrr()
1937 13:57:53.407207 MTRR: Fixed MSR 0x258 0x0606060606060606
1938 13:57:53.411082 MTRR: Fixed MSR 0x259 0x0000000000000000
1939 13:57:53.417174 MTRR: Fixed MSR 0x268 0x0606060606060606
1940 13:57:53.420762 MTRR: Fixed MSR 0x269 0x0606060606060606
1941 13:57:53.423813 MTRR: Fixed MSR 0x26a 0x0606060606060606
1942 13:57:53.427074 MTRR: Fixed MSR 0x26b 0x0606060606060606
1943 13:57:53.433579 MTRR: Fixed MSR 0x26c 0x0606060606060606
1944 13:57:53.437503 MTRR: Fixed MSR 0x26d 0x0606060606060606
1945 13:57:53.440228 MTRR: Fixed MSR 0x26e 0x0606060606060606
1946 13:57:53.444015 MTRR: Fixed MSR 0x26f 0x0606060606060606
1947 13:57:53.447165 CPU physical address size: 39 bits
1948 13:57:53.450867 call enable_fixed_mtrr()
1949 13:57:53.457449 MTRR: Fixed MSR 0x250 0x0606060606060606
1950 13:57:53.460897 MTRR: Fixed MSR 0x258 0x0606060606060606
1951 13:57:53.463555 MTRR: Fixed MSR 0x259 0x0000000000000000
1952 13:57:53.467528 MTRR: Fixed MSR 0x268 0x0606060606060606
1953 13:57:53.470273 MTRR: Fixed MSR 0x269 0x0606060606060606
1954 13:57:53.476991 MTRR: Fixed MSR 0x26a 0x0606060606060606
1955 13:57:53.480323 MTRR: Fixed MSR 0x26b 0x0606060606060606
1956 13:57:53.483486 MTRR: Fixed MSR 0x26c 0x0606060606060606
1957 13:57:53.487278 MTRR: Fixed MSR 0x26d 0x0606060606060606
1958 13:57:53.493771 MTRR: Fixed MSR 0x26e 0x0606060606060606
1959 13:57:53.497161 MTRR: Fixed MSR 0x26f 0x0606060606060606
1960 13:57:53.500574 MTRR: Fixed MSR 0x250 0x0606060606060606
1961 13:57:53.503238 call enable_fixed_mtrr()
1962 13:57:53.506542 MTRR: Fixed MSR 0x258 0x0606060606060606
1963 13:57:53.509855 MTRR: Fixed MSR 0x259 0x0000000000000000
1964 13:57:53.516541 MTRR: Fixed MSR 0x268 0x0606060606060606
1965 13:57:53.519766 MTRR: Fixed MSR 0x269 0x0606060606060606
1966 13:57:53.523197 MTRR: Fixed MSR 0x26a 0x0606060606060606
1967 13:57:53.526581 MTRR: Fixed MSR 0x26b 0x0606060606060606
1968 13:57:53.533238 MTRR: Fixed MSR 0x26c 0x0606060606060606
1969 13:57:53.536453 MTRR: Fixed MSR 0x26d 0x0606060606060606
1970 13:57:53.539732 MTRR: Fixed MSR 0x26e 0x0606060606060606
1971 13:57:53.543115 MTRR: Fixed MSR 0x26f 0x0606060606060606
1972 13:57:53.549697 CPU physical address size: 39 bits
1973 13:57:53.549821 call enable_fixed_mtrr()
1974 13:57:53.553305 CPU physical address size: 39 bits
1975 13:57:53.559762 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1976 13:57:53.562901 CBFS @ c08000 size 3f8000
1977 13:57:53.569224 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1978 13:57:53.573093 CBFS: Locating 'fallback/payload'
1979 13:57:53.575775 CPU physical address size: 39 bits
1980 13:57:53.579073 MTRR: Fixed MSR 0x250 0x0606060606060606
1981 13:57:53.582450 MTRR: Fixed MSR 0x250 0x0606060606060606
1982 13:57:53.585741 MTRR: Fixed MSR 0x258 0x0606060606060606
1983 13:57:53.592358 MTRR: Fixed MSR 0x259 0x0000000000000000
1984 13:57:53.596160 MTRR: Fixed MSR 0x268 0x0606060606060606
1985 13:57:53.599377 MTRR: Fixed MSR 0x269 0x0606060606060606
1986 13:57:53.602706 MTRR: Fixed MSR 0x26a 0x0606060606060606
1987 13:57:53.606047 MTRR: Fixed MSR 0x26b 0x0606060606060606
1988 13:57:53.612794 MTRR: Fixed MSR 0x26c 0x0606060606060606
1989 13:57:53.616016 MTRR: Fixed MSR 0x26d 0x0606060606060606
1990 13:57:53.619300 MTRR: Fixed MSR 0x26e 0x0606060606060606
1991 13:57:53.622714 MTRR: Fixed MSR 0x26f 0x0606060606060606
1992 13:57:53.628758 MTRR: Fixed MSR 0x258 0x0606060606060606
1993 13:57:53.632592 call enable_fixed_mtrr()
1994 13:57:53.635924 MTRR: Fixed MSR 0x259 0x0000000000000000
1995 13:57:53.638662 MTRR: Fixed MSR 0x268 0x0606060606060606
1996 13:57:53.642417 MTRR: Fixed MSR 0x269 0x0606060606060606
1997 13:57:53.648402 MTRR: Fixed MSR 0x26a 0x0606060606060606
1998 13:57:53.652270 MTRR: Fixed MSR 0x26b 0x0606060606060606
1999 13:57:53.655669 MTRR: Fixed MSR 0x26c 0x0606060606060606
2000 13:57:53.659043 MTRR: Fixed MSR 0x26d 0x0606060606060606
2001 13:57:53.662283 MTRR: Fixed MSR 0x26e 0x0606060606060606
2002 13:57:53.668596 MTRR: Fixed MSR 0x26f 0x0606060606060606
2003 13:57:53.671740 CPU physical address size: 39 bits
2004 13:57:53.674940 call enable_fixed_mtrr()
2005 13:57:53.678270 CBFS: Found @ offset 1c96c0 size 3f798
2006 13:57:53.681625 CPU physical address size: 39 bits
2007 13:57:53.684907 Checking segment from ROM address 0xffdd16f8
2008 13:57:53.691499 Checking segment from ROM address 0xffdd1714
2009 13:57:53.695269 Loading segment from ROM address 0xffdd16f8
2010 13:57:53.698083 code (compression=0)
2011 13:57:53.704925 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2012 13:57:53.714613 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2013 13:57:53.718041 it's not compressed!
2014 13:57:53.809127 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2015 13:57:53.815449 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2016 13:57:53.818772 Loading segment from ROM address 0xffdd1714
2017 13:57:53.822230 Entry Point 0x30000000
2018 13:57:53.825669 Loaded segments
2019 13:57:53.831010 Finalizing chipset.
2020 13:57:53.834126 Finalizing SMM.
2021 13:57:53.837198 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2022 13:57:53.840493 mp_park_aps done after 0 msecs.
2023 13:57:53.847320 Jumping to boot code at 30000000(99b62000)
2024 13:57:53.853966 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2025 13:57:53.854084
2026 13:57:53.854161
2027 13:57:53.854231
2028 13:57:53.857156 Starting depthcharge on Helios...
2029 13:57:53.857250
2030 13:57:53.857629 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2031 13:57:53.857739 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2032 13:57:53.857834 Setting prompt string to ['hatch:']
2033 13:57:53.857929 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2034 13:57:53.867501 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2035 13:57:53.867597
2036 13:57:53.874042 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2037 13:57:53.874135
2038 13:57:53.880315 board_setup: Info: eMMC controller not present; skipping
2039 13:57:53.880425
2040 13:57:53.883577 New NVMe Controller 0x30053ac0 @ 00:1d:00
2041 13:57:53.883676
2042 13:57:53.890166 board_setup: Info: SDHCI controller not present; skipping
2043 13:57:53.890265
2044 13:57:53.897039 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2045 13:57:53.897145
2046 13:57:53.897273 Wipe memory regions:
2047 13:57:53.897383
2048 13:57:53.900349 [0x00000000001000, 0x000000000a0000)
2049 13:57:53.900435
2050 13:57:53.903852 [0x00000000100000, 0x00000030000000)
2051 13:57:53.969865
2052 13:57:53.973282 [0x00000030657430, 0x00000099a2c000)
2053 13:57:54.119603
2054 13:57:54.122882 [0x00000100000000, 0x0000045e800000)
2055 13:57:55.579905
2056 13:57:55.580536 R8152: Initializing
2057 13:57:55.581078
2058 13:57:55.583161 Version 9 (ocp_data = 6010)
2059 13:57:55.587584
2060 13:57:55.588006 R8152: Done initializing
2061 13:57:55.588421
2062 13:57:55.590785 Adding net device
2063 13:57:56.073553
2064 13:57:56.074074 R8152: Initializing
2065 13:57:56.074402
2066 13:57:56.076915 Version 6 (ocp_data = 5c30)
2067 13:57:56.077342
2068 13:57:56.080212 R8152: Done initializing
2069 13:57:56.080752
2070 13:57:56.083336 net_add_device: Attemp to include the same device
2071 13:57:56.086947
2072 13:57:56.094357 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2073 13:57:56.094769
2074 13:57:56.095087
2075 13:57:56.095383
2076 13:57:56.096101 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2078 13:57:56.197580 hatch: tftpboot 192.168.201.1 10062407/tftp-deploy-m7acwk1s/kernel/bzImage 10062407/tftp-deploy-m7acwk1s/kernel/cmdline 10062407/tftp-deploy-m7acwk1s/ramdisk/ramdisk.cpio.gz
2079 13:57:56.198201 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2080 13:57:56.198654 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2081 13:57:56.202950 tftpboot 192.168.201.1 10062407/tftp-deploy-m7acwk1s/kernel/bzImploy-m7acwk1s/kernel/cmdline 10062407/tftp-deploy-m7acwk1s/ramdisk/ramdisk.cpio.gz
2082 13:57:56.203434
2083 13:57:56.203947 Waiting for link
2084 13:57:56.403524
2085 13:57:56.403723 done.
2086 13:57:56.403841
2087 13:57:56.403966 MAC: 00:24:32:50:1a:59
2088 13:57:56.404082
2089 13:57:56.406788 Sending DHCP discover... done.
2090 13:57:56.406934
2091 13:57:56.409989 Waiting for reply... done.
2092 13:57:56.410134
2093 13:57:56.413293 Sending DHCP request... done.
2094 13:57:56.413485
2095 13:57:56.472660 Waiting for reply... done.
2096 13:57:56.473197
2097 13:57:56.473530 My ip is 192.168.201.14
2098 13:57:56.473944
2099 13:57:56.475918 The DHCP server ip is 192.168.201.1
2100 13:57:56.479455
2101 13:57:56.482160 TFTP server IP predefined by user: 192.168.201.1
2102 13:57:56.482603
2103 13:57:56.489335 Bootfile predefined by user: 10062407/tftp-deploy-m7acwk1s/kernel/bzImage
2104 13:57:56.489787
2105 13:57:56.492034 Sending tftp read request... done.
2106 13:57:56.492451
2107 13:57:56.500862 Waiting for the transfer...
2108 13:57:56.501284
2109 13:57:57.086932 00000000 ################################################################
2110 13:57:57.087075
2111 13:57:57.725495 00080000 ################################################################
2112 13:57:57.726108
2113 13:57:58.352310 00100000 ################################################################
2114 13:57:58.352458
2115 13:57:58.952267 00180000 ################################################################
2116 13:57:58.952429
2117 13:57:59.510442 00200000 ################################################################
2118 13:57:59.510593
2119 13:58:00.168329 00280000 ################################################################
2120 13:58:00.168863
2121 13:58:00.832727 00300000 ################################################################
2122 13:58:00.833321
2123 13:58:01.508377 00380000 ################################################################
2124 13:58:01.508907
2125 13:58:02.189872 00400000 ################################################################
2126 13:58:02.190375
2127 13:58:02.872878 00480000 ################################################################
2128 13:58:02.873406
2129 13:58:03.456896 00500000 ################################################################
2130 13:58:03.457051
2131 13:58:04.083949 00580000 ################################################################
2132 13:58:04.084508
2133 13:58:04.672209 00600000 ################################################################
2134 13:58:04.672369
2135 13:58:05.360812 00680000 ################################################################
2136 13:58:05.361058
2137 13:58:05.981527 00700000 ################################################################
2138 13:58:05.981720
2139 13:58:06.647440 00780000 ################################################################
2140 13:58:06.648004
2141 13:58:07.258746 00800000 ################################################################
2142 13:58:07.258904
2143 13:58:07.868520 00880000 ################################################################
2144 13:58:07.869033
2145 13:58:08.525373 00900000 ################################################################
2146 13:58:08.525536
2147 13:58:09.139450 00980000 ################################################################
2148 13:58:09.139636
2149 13:58:09.540107 00a00000 ############################################## done.
2150 13:58:09.540259
2151 13:58:09.543486 The bootfile was 10854400 bytes long.
2152 13:58:09.543580
2153 13:58:09.546783 Sending tftp read request... done.
2154 13:58:09.546883
2155 13:58:09.549523 Waiting for the transfer...
2156 13:58:09.549644
2157 13:58:10.098859 00000000 ################################################################
2158 13:58:10.099018
2159 13:58:10.641500 00080000 ################################################################
2160 13:58:10.641665
2161 13:58:11.184011 00100000 ################################################################
2162 13:58:11.184168
2163 13:58:11.722077 00180000 ################################################################
2164 13:58:11.722241
2165 13:58:12.262212 00200000 ################################################################
2166 13:58:12.262385
2167 13:58:12.796341 00280000 ################################################################
2168 13:58:12.796514
2169 13:58:13.349573 00300000 ################################################################
2170 13:58:13.349743
2171 13:58:13.914554 00380000 ################################################################
2172 13:58:13.914734
2173 13:58:14.461171 00400000 ################################################################
2174 13:58:14.461340
2175 13:58:14.980127 00480000 ################################################################
2176 13:58:14.980292
2177 13:58:15.519400 00500000 ################################################################
2178 13:58:15.519600
2179 13:58:15.922590 00580000 ################################################ done.
2180 13:58:15.922827
2181 13:58:15.925876 Sending tftp read request... done.
2182 13:58:15.925977
2183 13:58:15.929059 Waiting for the transfer...
2184 13:58:15.929159
2185 13:58:15.929232 00000000 # done.
2186 13:58:15.929302
2187 13:58:15.938604 Command line loaded dynamically from TFTP file: 10062407/tftp-deploy-m7acwk1s/kernel/cmdline
2188 13:58:15.938755
2189 13:58:15.965439 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10062407/extract-nfsrootfs-mi4465mv,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2190 13:58:15.965633
2191 13:58:15.971556 ec_init(0): CrosEC protocol v3 supported (256, 256)
2192 13:58:15.976676
2193 13:58:15.979774 Shutting down all USB controllers.
2194 13:58:15.979890
2195 13:58:15.979971 Removing current net device
2196 13:58:15.983734
2197 13:58:15.983833 Finalizing coreboot
2198 13:58:15.983908
2199 13:58:15.990444 Exiting depthcharge with code 4 at timestamp: 29475835
2200 13:58:15.990588
2201 13:58:15.990694
2202 13:58:15.990794 Starting kernel ...
2203 13:58:15.990892
2204 13:58:15.990987
2205 13:58:15.991653 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
2206 13:58:15.991793 start: 2.2.5 auto-login-action (timeout 00:04:20) [common]
2207 13:58:15.991909 Setting prompt string to ['Linux version [0-9]']
2208 13:58:15.992018 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2209 13:58:15.992126 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2211 14:02:35.992299 end: 2.2.5 auto-login-action (duration 00:04:20) [common]
2213 14:02:35.992883 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 260 seconds'
2215 14:02:35.993315 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2218 14:02:35.994044 end: 2 depthcharge-action (duration 00:05:00) [common]
2220 14:02:35.994627 Cleaning after the job
2221 14:02:35.994862 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062407/tftp-deploy-m7acwk1s/ramdisk
2222 14:02:35.996884 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062407/tftp-deploy-m7acwk1s/kernel
2223 14:02:35.998522 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062407/tftp-deploy-m7acwk1s/nfsrootfs
2224 14:02:36.070837 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062407/tftp-deploy-m7acwk1s/modules
2225 14:02:36.072196 start: 4.1 power-off (timeout 00:00:30) [common]
2226 14:02:36.072393 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2227 14:02:36.153916 >> Command sent successfully.
2228 14:02:36.160240 Returned 0 in 0 seconds
2229 14:02:36.261319 end: 4.1 power-off (duration 00:00:00) [common]
2231 14:02:36.261692 start: 4.2 read-feedback (timeout 00:10:00) [common]
2232 14:02:36.261977 Listened to connection for namespace 'common' for up to 1s
2234 14:02:36.262378 Listened to connection for namespace 'common' for up to 1s
2235 14:02:37.265868 Finalising connection for namespace 'common'
2236 14:02:37.266470 Disconnecting from shell: Finalise
2237 14:02:37.266857
2238 14:02:37.368242 end: 4.2 read-feedback (duration 00:00:01) [common]
2239 14:02:37.368817 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10062407
2240 14:02:37.907350 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10062407
2241 14:02:37.907556 JobError: Your job cannot terminate cleanly.