Boot log: asus-C436FA-Flip-hatch
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
1 13:51:11.957626 lava-dispatcher, installed at version: 2023.01
2 13:51:11.957860 start: 0 validate
3 13:51:11.958000 Start time: 2023-04-20 13:51:11.957993+00:00 (UTC)
4 13:51:11.958137 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:51:11.958275 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230414.0%2Famd64%2Finitrd.cpio.gz exists
6 13:51:12.250499 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:51:12.250763 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.280-cip96-59-g4b02e7efb967d%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:51:12.539646 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:51:12.539851 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230414.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 13:51:19.750894 Using caching service: 'http://localhost/cache/?uri=%s'
11 13:51:19.751084 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.280-cip96-59-g4b02e7efb967d%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 13:51:20.045591 validate duration: 8.09
14 13:51:20.045943 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 13:51:20.046057 start: 1.1 download-retry (timeout 00:10:00) [common]
16 13:51:20.046179 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 13:51:20.046355 Not decompressing ramdisk as can be used compressed.
18 13:51:20.046453 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230414.0/amd64/initrd.cpio.gz
19 13:51:20.046552 saving as /var/lib/lava/dispatcher/tmp/10062354/tftp-deploy-zlbtir9l/ramdisk/initrd.cpio.gz
20 13:51:20.046653 total size: 5432117 (5MB)
21 13:51:20.774344 progress 0% (0MB)
22 13:51:20.776025 progress 5% (0MB)
23 13:51:20.777487 progress 10% (0MB)
24 13:51:20.778931 progress 15% (0MB)
25 13:51:20.780515 progress 20% (1MB)
26 13:51:20.781998 progress 25% (1MB)
27 13:51:20.783470 progress 30% (1MB)
28 13:51:20.785041 progress 35% (1MB)
29 13:51:20.786445 progress 40% (2MB)
30 13:51:20.787901 progress 45% (2MB)
31 13:51:20.789297 progress 50% (2MB)
32 13:51:20.790860 progress 55% (2MB)
33 13:51:20.792266 progress 60% (3MB)
34 13:51:20.793674 progress 65% (3MB)
35 13:51:20.795239 progress 70% (3MB)
36 13:51:20.796829 progress 75% (3MB)
37 13:51:20.798403 progress 80% (4MB)
38 13:51:20.799953 progress 85% (4MB)
39 13:51:20.801593 progress 90% (4MB)
40 13:51:20.803002 progress 95% (4MB)
41 13:51:20.804462 progress 100% (5MB)
42 13:51:20.804702 5MB downloaded in 0.76s (6.83MB/s)
43 13:51:20.804906 end: 1.1.1 http-download (duration 00:00:01) [common]
45 13:51:20.805293 end: 1.1 download-retry (duration 00:00:01) [common]
46 13:51:20.805414 start: 1.2 download-retry (timeout 00:09:59) [common]
47 13:51:20.805546 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 13:51:20.805699 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.280-cip96-59-g4b02e7efb967d/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 13:51:20.805771 saving as /var/lib/lava/dispatcher/tmp/10062354/tftp-deploy-zlbtir9l/kernel/bzImage
50 13:51:20.805837 total size: 10854400 (10MB)
51 13:51:20.805898 No compression specified
52 13:51:20.807032 progress 0% (0MB)
53 13:51:20.809917 progress 5% (0MB)
54 13:51:20.812867 progress 10% (1MB)
55 13:51:20.815822 progress 15% (1MB)
56 13:51:20.818934 progress 20% (2MB)
57 13:51:20.821979 progress 25% (2MB)
58 13:51:20.825105 progress 30% (3MB)
59 13:51:20.828017 progress 35% (3MB)
60 13:51:20.831118 progress 40% (4MB)
61 13:51:20.834163 progress 45% (4MB)
62 13:51:20.837117 progress 50% (5MB)
63 13:51:20.840550 progress 55% (5MB)
64 13:51:20.843469 progress 60% (6MB)
65 13:51:20.846506 progress 65% (6MB)
66 13:51:20.849197 progress 70% (7MB)
67 13:51:20.852040 progress 75% (7MB)
68 13:51:20.854715 progress 80% (8MB)
69 13:51:20.857723 progress 85% (8MB)
70 13:51:20.860548 progress 90% (9MB)
71 13:51:20.863251 progress 95% (9MB)
72 13:51:20.866130 progress 100% (10MB)
73 13:51:20.866286 10MB downloaded in 0.06s (171.26MB/s)
74 13:51:20.866436 end: 1.2.1 http-download (duration 00:00:00) [common]
76 13:51:20.866668 end: 1.2 download-retry (duration 00:00:00) [common]
77 13:51:20.866758 start: 1.3 download-retry (timeout 00:09:59) [common]
78 13:51:20.866843 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 13:51:20.866971 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230414.0/amd64/full.rootfs.tar.xz
80 13:51:20.867041 saving as /var/lib/lava/dispatcher/tmp/10062354/tftp-deploy-zlbtir9l/nfsrootfs/full.rootfs.tar
81 13:51:20.867104 total size: 207129528 (197MB)
82 13:51:20.867166 Using unxz to decompress xz
83 13:51:20.870730 progress 0% (0MB)
84 13:51:21.427807 progress 5% (9MB)
85 13:51:21.963806 progress 10% (19MB)
86 13:51:22.573752 progress 15% (29MB)
87 13:51:22.946883 progress 20% (39MB)
88 13:51:23.318955 progress 25% (49MB)
89 13:51:23.937224 progress 30% (59MB)
90 13:51:24.500020 progress 35% (69MB)
91 13:51:25.118300 progress 40% (79MB)
92 13:51:25.678654 progress 45% (88MB)
93 13:51:26.257450 progress 50% (98MB)
94 13:51:26.878555 progress 55% (108MB)
95 13:51:27.557964 progress 60% (118MB)
96 13:51:27.696843 progress 65% (128MB)
97 13:51:27.835682 progress 70% (138MB)
98 13:51:27.927391 progress 75% (148MB)
99 13:51:27.999498 progress 80% (158MB)
100 13:51:28.065546 progress 85% (167MB)
101 13:51:28.171258 progress 90% (177MB)
102 13:51:28.440378 progress 95% (187MB)
103 13:51:29.029671 progress 100% (197MB)
104 13:51:29.034331 197MB downloaded in 8.17s (24.19MB/s)
105 13:51:29.034612 end: 1.3.1 http-download (duration 00:00:08) [common]
107 13:51:29.034869 end: 1.3 download-retry (duration 00:00:08) [common]
108 13:51:29.034960 start: 1.4 download-retry (timeout 00:09:51) [common]
109 13:51:29.035048 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 13:51:29.035194 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.280-cip96-59-g4b02e7efb967d/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 13:51:29.035267 saving as /var/lib/lava/dispatcher/tmp/10062354/tftp-deploy-zlbtir9l/modules/modules.tar
112 13:51:29.035329 total size: 483736 (0MB)
113 13:51:29.035392 Using unxz to decompress xz
114 13:51:29.038759 progress 6% (0MB)
115 13:51:29.039155 progress 13% (0MB)
116 13:51:29.039413 progress 20% (0MB)
117 13:51:29.040727 progress 27% (0MB)
118 13:51:29.042795 progress 33% (0MB)
119 13:51:29.044833 progress 40% (0MB)
120 13:51:29.046753 progress 47% (0MB)
121 13:51:29.048815 progress 54% (0MB)
122 13:51:29.050705 progress 60% (0MB)
123 13:51:29.052614 progress 67% (0MB)
124 13:51:29.054527 progress 74% (0MB)
125 13:51:29.056342 progress 81% (0MB)
126 13:51:29.058189 progress 88% (0MB)
127 13:51:29.060464 progress 94% (0MB)
128 13:51:29.062545 progress 100% (0MB)
129 13:51:29.069132 0MB downloaded in 0.03s (13.65MB/s)
130 13:51:29.069427 end: 1.4.1 http-download (duration 00:00:00) [common]
132 13:51:29.069752 end: 1.4 download-retry (duration 00:00:00) [common]
133 13:51:29.069845 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
134 13:51:29.069939 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
135 13:51:31.458924 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10062354/extract-nfsrootfs-ftxce6u6
136 13:51:31.459129 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
137 13:51:31.459228 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
138 13:51:31.459400 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10062354/lava-overlay-zt5s2a65
139 13:51:31.459530 makedir: /var/lib/lava/dispatcher/tmp/10062354/lava-overlay-zt5s2a65/lava-10062354/bin
140 13:51:31.459635 makedir: /var/lib/lava/dispatcher/tmp/10062354/lava-overlay-zt5s2a65/lava-10062354/tests
141 13:51:31.459731 makedir: /var/lib/lava/dispatcher/tmp/10062354/lava-overlay-zt5s2a65/lava-10062354/results
142 13:51:31.459832 Creating /var/lib/lava/dispatcher/tmp/10062354/lava-overlay-zt5s2a65/lava-10062354/bin/lava-add-keys
143 13:51:31.459973 Creating /var/lib/lava/dispatcher/tmp/10062354/lava-overlay-zt5s2a65/lava-10062354/bin/lava-add-sources
144 13:51:31.460166 Creating /var/lib/lava/dispatcher/tmp/10062354/lava-overlay-zt5s2a65/lava-10062354/bin/lava-background-process-start
145 13:51:31.460288 Creating /var/lib/lava/dispatcher/tmp/10062354/lava-overlay-zt5s2a65/lava-10062354/bin/lava-background-process-stop
146 13:51:31.460411 Creating /var/lib/lava/dispatcher/tmp/10062354/lava-overlay-zt5s2a65/lava-10062354/bin/lava-common-functions
147 13:51:31.460531 Creating /var/lib/lava/dispatcher/tmp/10062354/lava-overlay-zt5s2a65/lava-10062354/bin/lava-echo-ipv4
148 13:51:31.460650 Creating /var/lib/lava/dispatcher/tmp/10062354/lava-overlay-zt5s2a65/lava-10062354/bin/lava-install-packages
149 13:51:31.460768 Creating /var/lib/lava/dispatcher/tmp/10062354/lava-overlay-zt5s2a65/lava-10062354/bin/lava-installed-packages
150 13:51:31.460884 Creating /var/lib/lava/dispatcher/tmp/10062354/lava-overlay-zt5s2a65/lava-10062354/bin/lava-os-build
151 13:51:31.461007 Creating /var/lib/lava/dispatcher/tmp/10062354/lava-overlay-zt5s2a65/lava-10062354/bin/lava-probe-channel
152 13:51:31.461126 Creating /var/lib/lava/dispatcher/tmp/10062354/lava-overlay-zt5s2a65/lava-10062354/bin/lava-probe-ip
153 13:51:31.461244 Creating /var/lib/lava/dispatcher/tmp/10062354/lava-overlay-zt5s2a65/lava-10062354/bin/lava-target-ip
154 13:51:31.461362 Creating /var/lib/lava/dispatcher/tmp/10062354/lava-overlay-zt5s2a65/lava-10062354/bin/lava-target-mac
155 13:51:31.461648 Creating /var/lib/lava/dispatcher/tmp/10062354/lava-overlay-zt5s2a65/lava-10062354/bin/lava-target-storage
156 13:51:31.461792 Creating /var/lib/lava/dispatcher/tmp/10062354/lava-overlay-zt5s2a65/lava-10062354/bin/lava-test-case
157 13:51:31.461986 Creating /var/lib/lava/dispatcher/tmp/10062354/lava-overlay-zt5s2a65/lava-10062354/bin/lava-test-event
158 13:51:31.462104 Creating /var/lib/lava/dispatcher/tmp/10062354/lava-overlay-zt5s2a65/lava-10062354/bin/lava-test-feedback
159 13:51:31.462222 Creating /var/lib/lava/dispatcher/tmp/10062354/lava-overlay-zt5s2a65/lava-10062354/bin/lava-test-raise
160 13:51:31.462339 Creating /var/lib/lava/dispatcher/tmp/10062354/lava-overlay-zt5s2a65/lava-10062354/bin/lava-test-reference
161 13:51:31.462456 Creating /var/lib/lava/dispatcher/tmp/10062354/lava-overlay-zt5s2a65/lava-10062354/bin/lava-test-runner
162 13:51:31.462575 Creating /var/lib/lava/dispatcher/tmp/10062354/lava-overlay-zt5s2a65/lava-10062354/bin/lava-test-set
163 13:51:31.462692 Creating /var/lib/lava/dispatcher/tmp/10062354/lava-overlay-zt5s2a65/lava-10062354/bin/lava-test-shell
164 13:51:31.462813 Updating /var/lib/lava/dispatcher/tmp/10062354/lava-overlay-zt5s2a65/lava-10062354/bin/lava-add-keys (debian)
165 13:51:31.462960 Updating /var/lib/lava/dispatcher/tmp/10062354/lava-overlay-zt5s2a65/lava-10062354/bin/lava-add-sources (debian)
166 13:51:31.463101 Updating /var/lib/lava/dispatcher/tmp/10062354/lava-overlay-zt5s2a65/lava-10062354/bin/lava-install-packages (debian)
167 13:51:31.463238 Updating /var/lib/lava/dispatcher/tmp/10062354/lava-overlay-zt5s2a65/lava-10062354/bin/lava-installed-packages (debian)
168 13:51:31.463373 Updating /var/lib/lava/dispatcher/tmp/10062354/lava-overlay-zt5s2a65/lava-10062354/bin/lava-os-build (debian)
169 13:51:31.463494 Creating /var/lib/lava/dispatcher/tmp/10062354/lava-overlay-zt5s2a65/lava-10062354/environment
170 13:51:31.463591 LAVA metadata
171 13:51:31.463660 - LAVA_JOB_ID=10062354
172 13:51:31.463722 - LAVA_DISPATCHER_IP=192.168.201.1
173 13:51:31.463851 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
174 13:51:31.463916 skipped lava-vland-overlay
175 13:51:31.463991 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
176 13:51:31.464070 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
177 13:51:31.464130 skipped lava-multinode-overlay
178 13:51:31.464202 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
179 13:51:31.464279 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
180 13:51:31.464352 Loading test definitions
181 13:51:31.464437 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:49) [common]
182 13:51:31.464506 Using /lava-10062354 at stage 0
183 13:51:31.464779 uuid=10062354_1.5.2.3.1 testdef=None
184 13:51:31.464867 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
185 13:51:31.464950 start: 1.5.2.3.2 test-overlay (timeout 00:09:49) [common]
186 13:51:31.465387 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
188 13:51:31.465644 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:49) [common]
189 13:51:31.466279 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
191 13:51:31.466505 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
192 13:51:31.467023 runner path: /var/lib/lava/dispatcher/tmp/10062354/lava-overlay-zt5s2a65/lava-10062354/0/tests/0_timesync-off test_uuid 10062354_1.5.2.3.1
193 13:51:31.467176 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
195 13:51:31.467399 start: 1.5.2.3.5 git-repo-action (timeout 00:09:49) [common]
196 13:51:31.467470 Using /lava-10062354 at stage 0
197 13:51:31.467566 Fetching tests from https://github.com/kernelci/test-definitions.git
198 13:51:31.467642 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/10062354/lava-overlay-zt5s2a65/lava-10062354/0/tests/1_kselftest-futex'
199 13:51:41.706997 Running '/usr/bin/git checkout kernelci.org
200 13:51:41.854944 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/10062354/lava-overlay-zt5s2a65/lava-10062354/0/tests/1_kselftest-futex/automated/linux/kselftest/kselftest.yaml
201 13:51:41.855681 uuid=10062354_1.5.2.3.5 testdef=None
202 13:51:41.855848 end: 1.5.2.3.5 git-repo-action (duration 00:00:10) [common]
204 13:51:41.856106 start: 1.5.2.3.6 test-overlay (timeout 00:09:38) [common]
205 13:51:41.856903 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
207 13:51:41.857140 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:38) [common]
208 13:51:41.858987 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
210 13:51:41.859229 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:38) [common]
211 13:51:41.860788 runner path: /var/lib/lava/dispatcher/tmp/10062354/lava-overlay-zt5s2a65/lava-10062354/0/tests/1_kselftest-futex test_uuid 10062354_1.5.2.3.5
212 13:51:41.860884 BOARD='asus-C436FA-Flip-hatch'
213 13:51:41.860951 BRANCH='cip-gitlab'
214 13:51:41.861012 SKIPFILE='/dev/null'
215 13:51:41.861072 SKIP_INSTALL='True'
216 13:51:41.861129 TESTPROG_URL='None'
217 13:51:41.861186 TST_CASENAME=''
218 13:51:41.861243 TST_CMDFILES='futex'
219 13:51:41.861386 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
221 13:51:41.861613 Creating lava-test-runner.conf files
222 13:51:41.861681 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10062354/lava-overlay-zt5s2a65/lava-10062354/0 for stage 0
223 13:51:41.861774 - 0_timesync-off
224 13:51:41.861848 - 1_kselftest-futex
225 13:51:41.861988 end: 1.5.2.3 test-definition (duration 00:00:10) [common]
226 13:51:41.862080 start: 1.5.2.4 compress-overlay (timeout 00:09:38) [common]
227 13:51:49.485104 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
228 13:51:49.485263 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:31) [common]
229 13:51:49.485360 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
230 13:51:49.485464 end: 1.5.2 lava-overlay (duration 00:00:18) [common]
231 13:51:49.485561 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:31) [common]
232 13:51:49.621494 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
233 13:51:49.621891 start: 1.5.4 extract-modules (timeout 00:09:30) [common]
234 13:51:49.622061 extracting modules file /var/lib/lava/dispatcher/tmp/10062354/tftp-deploy-zlbtir9l/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10062354/extract-nfsrootfs-ftxce6u6
235 13:51:49.639709 extracting modules file /var/lib/lava/dispatcher/tmp/10062354/tftp-deploy-zlbtir9l/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10062354/extract-overlay-ramdisk-j9o24j0_/ramdisk
236 13:51:49.653571 end: 1.5.4 extract-modules (duration 00:00:00) [common]
237 13:51:49.653735 start: 1.5.5 apply-overlay-tftp (timeout 00:09:30) [common]
238 13:51:49.653842 [common] Applying overlay to NFS
239 13:51:49.653915 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10062354/compress-overlay-4neu2k99/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10062354/extract-nfsrootfs-ftxce6u6
240 13:51:50.525553 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
241 13:51:50.525738 start: 1.5.6 configure-preseed-file (timeout 00:09:30) [common]
242 13:51:50.525839 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
243 13:51:50.525930 start: 1.5.7 compress-ramdisk (timeout 00:09:30) [common]
244 13:51:50.526014 Building ramdisk /var/lib/lava/dispatcher/tmp/10062354/extract-overlay-ramdisk-j9o24j0_/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10062354/extract-overlay-ramdisk-j9o24j0_/ramdisk
245 13:51:50.600671 >> 30347 blocks
246 13:51:51.221843 rename /var/lib/lava/dispatcher/tmp/10062354/extract-overlay-ramdisk-j9o24j0_/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10062354/tftp-deploy-zlbtir9l/ramdisk/ramdisk.cpio.gz
247 13:51:51.222283 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
248 13:51:51.222412 start: 1.5.8 prepare-kernel (timeout 00:09:29) [common]
249 13:51:51.222521 start: 1.5.8.1 prepare-fit (timeout 00:09:29) [common]
250 13:51:51.222623 No mkimage arch provided, not using FIT.
251 13:51:51.222714 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
252 13:51:51.222802 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
253 13:51:51.222907 end: 1.5 prepare-tftp-overlay (duration 00:00:22) [common]
254 13:51:51.223004 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:29) [common]
255 13:51:51.223086 No LXC device requested
256 13:51:51.223168 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 13:51:51.223259 start: 1.7 deploy-device-env (timeout 00:09:29) [common]
258 13:51:51.223341 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 13:51:51.223417 Checking files for TFTP limit of 4294967296 bytes.
260 13:51:51.223821 end: 1 tftp-deploy (duration 00:00:31) [common]
261 13:51:51.223940 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 13:51:51.224068 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 13:51:51.224191 substitutions:
264 13:51:51.224258 - {DTB}: None
265 13:51:51.224323 - {INITRD}: 10062354/tftp-deploy-zlbtir9l/ramdisk/ramdisk.cpio.gz
266 13:51:51.224383 - {KERNEL}: 10062354/tftp-deploy-zlbtir9l/kernel/bzImage
267 13:51:51.224443 - {LAVA_MAC}: None
268 13:51:51.224501 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10062354/extract-nfsrootfs-ftxce6u6
269 13:51:51.224561 - {NFS_SERVER_IP}: 192.168.201.1
270 13:51:51.224618 - {PRESEED_CONFIG}: None
271 13:51:51.224674 - {PRESEED_LOCAL}: None
272 13:51:51.224730 - {RAMDISK}: 10062354/tftp-deploy-zlbtir9l/ramdisk/ramdisk.cpio.gz
273 13:51:51.224786 - {ROOT_PART}: None
274 13:51:51.224842 - {ROOT}: None
275 13:51:51.224898 - {SERVER_IP}: 192.168.201.1
276 13:51:51.224952 - {TEE}: None
277 13:51:51.225007 Parsed boot commands:
278 13:51:51.225063 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
279 13:51:51.225243 Parsed boot commands: tftpboot 192.168.201.1 10062354/tftp-deploy-zlbtir9l/kernel/bzImage 10062354/tftp-deploy-zlbtir9l/kernel/cmdline 10062354/tftp-deploy-zlbtir9l/ramdisk/ramdisk.cpio.gz
280 13:51:51.225336 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
281 13:51:51.225423 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
282 13:51:51.225528 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
283 13:51:51.225617 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
284 13:51:51.225687 Not connected, no need to disconnect.
285 13:51:51.225762 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
286 13:51:51.225841 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
287 13:51:51.225911 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
288 13:51:51.229254 Setting prompt string to ['lava-test: # ']
289 13:51:51.229614 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
290 13:51:51.229727 end: 2.2.1 reset-connection (duration 00:00:00) [common]
291 13:51:51.229832 start: 2.2.2 reset-device (timeout 00:05:00) [common]
292 13:51:51.229931 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
293 13:51:51.230123 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
294 13:51:56.368376 >> Command sent successfully.
295 13:51:56.370674 Returned 0 in 5 seconds
296 13:51:56.471466 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
298 13:51:56.471906 end: 2.2.2 reset-device (duration 00:00:05) [common]
299 13:51:56.472040 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
300 13:51:56.472162 Setting prompt string to 'Starting depthcharge on Helios...'
301 13:51:56.472261 Changing prompt to 'Starting depthcharge on Helios...'
302 13:51:56.472360 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
303 13:51:56.472728 [Enter `^Ec?' for help]
304 13:51:57.091126
305 13:51:57.091272
306 13:51:57.101073 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
307 13:51:57.104488 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
308 13:51:57.111133 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
309 13:51:57.114285 CPU: AES supported, TXT NOT supported, VT supported
310 13:51:57.121564 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
311 13:51:57.125004 PCH: device id 0284 (rev 00) is Cometlake-U Premium
312 13:51:57.131163 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
313 13:51:57.134579 VBOOT: Loading verstage.
314 13:51:57.138014 FMAP: Found "FLASH" version 1.1 at 0xc04000.
315 13:51:57.144336 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
316 13:51:57.147774 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
317 13:51:57.151149 CBFS @ c08000 size 3f8000
318 13:51:57.157501 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
319 13:51:57.161047 CBFS: Locating 'fallback/verstage'
320 13:51:57.164527 CBFS: Found @ offset 10fb80 size 1072c
321 13:51:57.167858
322 13:51:57.167965
323 13:51:57.177389 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
324 13:51:57.192156 Probing TPM: . done!
325 13:51:57.195187 TPM ready after 0 ms
326 13:51:57.198937 Connected to device vid:did:rid of 1ae0:0028:00
327 13:51:57.209065 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
328 13:51:57.211940 Initialized TPM device CR50 revision 0
329 13:51:57.255851 tlcl_send_startup: Startup return code is 0
330 13:51:57.255978 TPM: setup succeeded
331 13:51:57.268828 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
332 13:51:57.272747 Chrome EC: UHEPI supported
333 13:51:57.275667 Phase 1
334 13:51:57.278989 FMAP: area GBB found @ c05000 (12288 bytes)
335 13:51:57.285968 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
336 13:51:57.289335 Phase 2
337 13:51:57.289416 Phase 3
338 13:51:57.292186 FMAP: area GBB found @ c05000 (12288 bytes)
339 13:51:57.299267 VB2:vb2_report_dev_firmware() This is developer signed firmware
340 13:51:57.305666 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
341 13:51:57.309059 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
342 13:51:57.315374 VB2:vb2_verify_keyblock() Checking keyblock signature...
343 13:51:57.331353 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
344 13:51:57.334717 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
345 13:51:57.341337 VB2:vb2_verify_fw_preamble() Verifying preamble.
346 13:51:57.345322 Phase 4
347 13:51:57.348748 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
348 13:51:57.355096 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
349 13:51:57.534957 VB2:vb2_rsa_verify_digest() Digest check failed!
350 13:51:57.541558 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
351 13:51:57.541663 Saving nvdata
352 13:51:57.545023 Reboot requested (10020007)
353 13:51:57.548394 board_reset() called!
354 13:51:57.548504 full_reset() called!
355 13:52:02.057961
356 13:52:02.058098
357 13:52:02.067881 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
358 13:52:02.071018 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
359 13:52:02.077924 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
360 13:52:02.081201 CPU: AES supported, TXT NOT supported, VT supported
361 13:52:02.087754 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
362 13:52:02.091355 PCH: device id 0284 (rev 00) is Cometlake-U Premium
363 13:52:02.097701 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
364 13:52:02.101266 VBOOT: Loading verstage.
365 13:52:02.104990 FMAP: Found "FLASH" version 1.1 at 0xc04000.
366 13:52:02.111298 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
367 13:52:02.114303 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
368 13:52:02.117867 CBFS @ c08000 size 3f8000
369 13:52:02.124639 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
370 13:52:02.128096 CBFS: Locating 'fallback/verstage'
371 13:52:02.131033 CBFS: Found @ offset 10fb80 size 1072c
372 13:52:02.134696
373 13:52:02.134807
374 13:52:02.145042 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
375 13:52:02.158985 Probing TPM: . done!
376 13:52:02.162564 TPM ready after 0 ms
377 13:52:02.166010 Connected to device vid:did:rid of 1ae0:0028:00
378 13:52:02.176062 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
379 13:52:02.179251 Initialized TPM device CR50 revision 0
380 13:52:02.223258 tlcl_send_startup: Startup return code is 0
381 13:52:02.223394 TPM: setup succeeded
382 13:52:02.235384 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
383 13:52:02.239602 Chrome EC: UHEPI supported
384 13:52:02.242527 Phase 1
385 13:52:02.245981 FMAP: area GBB found @ c05000 (12288 bytes)
386 13:52:02.253034 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
387 13:52:02.259328 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
388 13:52:02.262932 Recovery requested (1009000e)
389 13:52:02.268751 Saving nvdata
390 13:52:02.274682 tlcl_extend: response is 0
391 13:52:02.283205 tlcl_extend: response is 0
392 13:52:02.290204 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
393 13:52:02.293380 CBFS @ c08000 size 3f8000
394 13:52:02.300200 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
395 13:52:02.303732 CBFS: Locating 'fallback/romstage'
396 13:52:02.306573 CBFS: Found @ offset 80 size 145fc
397 13:52:02.310055 Accumulated console time in verstage 98 ms
398 13:52:02.310142
399 13:52:02.310207
400 13:52:02.323654 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
401 13:52:02.330112 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
402 13:52:02.333098 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
403 13:52:02.336455 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
404 13:52:02.343514 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
405 13:52:02.346927 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
406 13:52:02.349669 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
407 13:52:02.353056 TCO_STS: 0000 0000
408 13:52:02.356660 GEN_PMCON: e0015238 00000200
409 13:52:02.359687 GBLRST_CAUSE: 00000000 00000000
410 13:52:02.359788 prev_sleep_state 5
411 13:52:02.363247 Boot Count incremented to 59953
412 13:52:02.369836 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
413 13:52:02.373315 CBFS @ c08000 size 3f8000
414 13:52:02.379894 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
415 13:52:02.379981 CBFS: Locating 'fspm.bin'
416 13:52:02.386368 CBFS: Found @ offset 5ffc0 size 71000
417 13:52:02.389892 Chrome EC: UHEPI supported
418 13:52:02.396082 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
419 13:52:02.399843 Probing TPM: done!
420 13:52:02.406277 Connected to device vid:did:rid of 1ae0:0028:00
421 13:52:02.416856 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
422 13:52:02.422529 Initialized TPM device CR50 revision 0
423 13:52:02.431538 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
424 13:52:02.438107 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
425 13:52:02.441613 MRC cache found, size 1948
426 13:52:02.444735 bootmode is set to: 2
427 13:52:02.448297 PRMRR disabled by config.
428 13:52:02.448404 SPD INDEX = 1
429 13:52:02.454521 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
430 13:52:02.458113 CBFS @ c08000 size 3f8000
431 13:52:02.464888 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
432 13:52:02.465012 CBFS: Locating 'spd.bin'
433 13:52:02.467829 CBFS: Found @ offset 5fb80 size 400
434 13:52:02.471328 SPD: module type is LPDDR3
435 13:52:02.474888 SPD: module part is
436 13:52:02.481444 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
437 13:52:02.484469 SPD: device width 4 bits, bus width 8 bits
438 13:52:02.488051 SPD: module size is 4096 MB (per channel)
439 13:52:02.491019 memory slot: 0 configuration done.
440 13:52:02.494270 memory slot: 2 configuration done.
441 13:52:02.545216 CBMEM:
442 13:52:02.548676 IMD: root @ 99fff000 254 entries.
443 13:52:02.551686 IMD: root @ 99ffec00 62 entries.
444 13:52:02.555142 External stage cache:
445 13:52:02.558486 IMD: root @ 9abff000 254 entries.
446 13:52:02.561903 IMD: root @ 9abfec00 62 entries.
447 13:52:02.568427 Chrome EC: clear events_b mask to 0x0000000020004000
448 13:52:02.581186 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
449 13:52:02.594848 tlcl_write: response is 0
450 13:52:02.603319 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
451 13:52:02.609910 MRC: TPM MRC hash updated successfully.
452 13:52:02.609996 2 DIMMs found
453 13:52:02.613464 SMM Memory Map
454 13:52:02.616724 SMRAM : 0x9a000000 0x1000000
455 13:52:02.620118 Subregion 0: 0x9a000000 0xa00000
456 13:52:02.623320 Subregion 1: 0x9aa00000 0x200000
457 13:52:02.626500 Subregion 2: 0x9ac00000 0x400000
458 13:52:02.629951 top_of_ram = 0x9a000000
459 13:52:02.633308 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
460 13:52:02.639938 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
461 13:52:02.643391 MTRR Range: Start=ff000000 End=0 (Size 1000000)
462 13:52:02.650280 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
463 13:52:02.653090 CBFS @ c08000 size 3f8000
464 13:52:02.656644 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
465 13:52:02.660055 CBFS: Locating 'fallback/postcar'
466 13:52:02.666821 CBFS: Found @ offset 107000 size 4b44
467 13:52:02.669855 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
468 13:52:02.682513 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
469 13:52:02.685896 Processing 180 relocs. Offset value of 0x97c0c000
470 13:52:02.694212 Accumulated console time in romstage 286 ms
471 13:52:02.694296
472 13:52:02.694363
473 13:52:02.704178 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
474 13:52:02.711058 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
475 13:52:02.714000 CBFS @ c08000 size 3f8000
476 13:52:02.717632 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
477 13:52:02.721087 CBFS: Locating 'fallback/ramstage'
478 13:52:02.727991 CBFS: Found @ offset 43380 size 1b9e8
479 13:52:02.734472 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
480 13:52:02.766316 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
481 13:52:02.769458 Processing 3976 relocs. Offset value of 0x98db0000
482 13:52:02.776026 Accumulated console time in postcar 52 ms
483 13:52:02.776111
484 13:52:02.776177
485 13:52:02.786172 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
486 13:52:02.792682 FMAP: area RO_VPD found @ c00000 (16384 bytes)
487 13:52:02.796265 WARNING: RO_VPD is uninitialized or empty.
488 13:52:02.799324 FMAP: area RW_VPD found @ af8000 (8192 bytes)
489 13:52:02.805885 FMAP: area RW_VPD found @ af8000 (8192 bytes)
490 13:52:02.805968 Normal boot.
491 13:52:02.812662 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
492 13:52:02.816127 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
493 13:52:02.819586 CBFS @ c08000 size 3f8000
494 13:52:02.825935 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
495 13:52:02.829594 CBFS: Locating 'cpu_microcode_blob.bin'
496 13:52:02.832541 CBFS: Found @ offset 14700 size 2ec00
497 13:52:02.835905 microcode: sig=0x806ec pf=0x4 revision=0xc9
498 13:52:02.839301 Skip microcode update
499 13:52:02.842596 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
500 13:52:02.845940 CBFS @ c08000 size 3f8000
501 13:52:02.852257 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
502 13:52:02.855906 CBFS: Locating 'fsps.bin'
503 13:52:02.858667 CBFS: Found @ offset d1fc0 size 35000
504 13:52:02.884193 Detected 4 core, 8 thread CPU.
505 13:52:02.887627 Setting up SMI for CPU
506 13:52:02.890618 IED base = 0x9ac00000
507 13:52:02.890706 IED size = 0x00400000
508 13:52:02.894133 Will perform SMM setup.
509 13:52:02.900715 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
510 13:52:02.907247 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
511 13:52:02.910756 Processing 16 relocs. Offset value of 0x00030000
512 13:52:02.914166 Attempting to start 7 APs
513 13:52:02.917670 Waiting for 10ms after sending INIT.
514 13:52:02.934125 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
515 13:52:02.934213 done.
516 13:52:02.936943 AP: slot 1 apic_id 2.
517 13:52:02.940542 AP: slot 4 apic_id 3.
518 13:52:02.940626 AP: slot 5 apic_id 4.
519 13:52:02.943921 AP: slot 6 apic_id 5.
520 13:52:02.947125 Waiting for 2nd SIPI to complete...done.
521 13:52:02.950596 AP: slot 2 apic_id 7.
522 13:52:02.953464 AP: slot 7 apic_id 6.
523 13:52:02.960336 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
524 13:52:02.963845 Processing 13 relocs. Offset value of 0x00038000
525 13:52:02.970337 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
526 13:52:02.977112 Installing SMM handler to 0x9a000000
527 13:52:02.983642 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
528 13:52:02.987215 Processing 658 relocs. Offset value of 0x9a010000
529 13:52:02.997186 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
530 13:52:03.000241 Processing 13 relocs. Offset value of 0x9a008000
531 13:52:03.007243 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
532 13:52:03.013768 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
533 13:52:03.017090 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
534 13:52:03.023296 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
535 13:52:03.030330 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
536 13:52:03.036594 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
537 13:52:03.039997 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
538 13:52:03.046536 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
539 13:52:03.049910 Clearing SMI status registers
540 13:52:03.053287 SMI_STS: PM1
541 13:52:03.053402 PM1_STS: PWRBTN
542 13:52:03.056684 TCO_STS: SECOND_TO
543 13:52:03.060042 New SMBASE 0x9a000000
544 13:52:03.063404 In relocation handler: CPU 0
545 13:52:03.066887 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
546 13:52:03.070337 Writing SMRR. base = 0x9a000006, mask=0xff000800
547 13:52:03.073273 Relocation complete.
548 13:52:03.076631 New SMBASE 0x99fff400
549 13:52:03.076734 In relocation handler: CPU 3
550 13:52:03.083493 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
551 13:52:03.086754 Writing SMRR. base = 0x9a000006, mask=0xff000800
552 13:52:03.090069 Relocation complete.
553 13:52:03.090174 New SMBASE 0x99ffe400
554 13:52:03.093538 In relocation handler: CPU 7
555 13:52:03.100062 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
556 13:52:03.103467 Writing SMRR. base = 0x9a000006, mask=0xff000800
557 13:52:03.106587 Relocation complete.
558 13:52:03.106690 New SMBASE 0x99fff800
559 13:52:03.109986 In relocation handler: CPU 2
560 13:52:03.116641 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
561 13:52:03.120201 Writing SMRR. base = 0x9a000006, mask=0xff000800
562 13:52:03.122937 Relocation complete.
563 13:52:03.123051 New SMBASE 0x99ffec00
564 13:52:03.126497 In relocation handler: CPU 5
565 13:52:03.130056 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
566 13:52:03.136585 Writing SMRR. base = 0x9a000006, mask=0xff000800
567 13:52:03.139952 Relocation complete.
568 13:52:03.140071 New SMBASE 0x99ffe800
569 13:52:03.142918 In relocation handler: CPU 6
570 13:52:03.146559 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
571 13:52:03.153021 Writing SMRR. base = 0x9a000006, mask=0xff000800
572 13:52:03.156559 Relocation complete.
573 13:52:03.156669 New SMBASE 0x99fff000
574 13:52:03.159485 In relocation handler: CPU 4
575 13:52:03.162977 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
576 13:52:03.169788 Writing SMRR. base = 0x9a000006, mask=0xff000800
577 13:52:03.169901 Relocation complete.
578 13:52:03.172705 New SMBASE 0x99fffc00
579 13:52:03.176203 In relocation handler: CPU 1
580 13:52:03.179693 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
581 13:52:03.186241 Writing SMRR. base = 0x9a000006, mask=0xff000800
582 13:52:03.186356 Relocation complete.
583 13:52:03.189487 Initializing CPU #0
584 13:52:03.192775 CPU: vendor Intel device 806ec
585 13:52:03.196119 CPU: family 06, model 8e, stepping 0c
586 13:52:03.199597 Clearing out pending MCEs
587 13:52:03.202613 Setting up local APIC...
588 13:52:03.202730 apic_id: 0x00 done.
589 13:52:03.205972 Turbo is available but hidden
590 13:52:03.209531 Turbo is available and visible
591 13:52:03.212534 VMX status: enabled
592 13:52:03.216300 IA32_FEATURE_CONTROL status: locked
593 13:52:03.219044 Skip microcode update
594 13:52:03.219128 CPU #0 initialized
595 13:52:03.222734 Initializing CPU #3
596 13:52:03.222818 Initializing CPU #7
597 13:52:03.226088 Initializing CPU #2
598 13:52:03.229479 CPU: vendor Intel device 806ec
599 13:52:03.232376 CPU: family 06, model 8e, stepping 0c
600 13:52:03.236095 CPU: vendor Intel device 806ec
601 13:52:03.238974 CPU: family 06, model 8e, stepping 0c
602 13:52:03.242517 Clearing out pending MCEs
603 13:52:03.245794 Clearing out pending MCEs
604 13:52:03.248896 Setting up local APIC...
605 13:52:03.248982 Initializing CPU #4
606 13:52:03.252364 Initializing CPU #1
607 13:52:03.255859 CPU: vendor Intel device 806ec
608 13:52:03.259268 CPU: family 06, model 8e, stepping 0c
609 13:52:03.262178 CPU: vendor Intel device 806ec
610 13:52:03.265727 CPU: family 06, model 8e, stepping 0c
611 13:52:03.269179 Clearing out pending MCEs
612 13:52:03.272592 Clearing out pending MCEs
613 13:52:03.272669 Setting up local APIC...
614 13:52:03.275465 Initializing CPU #6
615 13:52:03.278948 Initializing CPU #5
616 13:52:03.282507 CPU: vendor Intel device 806ec
617 13:52:03.285454 CPU: family 06, model 8e, stepping 0c
618 13:52:03.289083 CPU: vendor Intel device 806ec
619 13:52:03.292591 CPU: family 06, model 8e, stepping 0c
620 13:52:03.295905 Clearing out pending MCEs
621 13:52:03.296030 Clearing out pending MCEs
622 13:52:03.299113 Setting up local APIC...
623 13:52:03.302499 Setting up local APIC...
624 13:52:03.302611 apic_id: 0x03 done.
625 13:52:03.305408 Setting up local APIC...
626 13:52:03.308985 apic_id: 0x07 done.
627 13:52:03.311923 apic_id: 0x06 done.
628 13:52:03.312038 VMX status: enabled
629 13:52:03.315470 VMX status: enabled
630 13:52:03.318945 IA32_FEATURE_CONTROL status: locked
631 13:52:03.321941 IA32_FEATURE_CONTROL status: locked
632 13:52:03.325487 Skip microcode update
633 13:52:03.328572 CPU: vendor Intel device 806ec
634 13:52:03.331899 CPU: family 06, model 8e, stepping 0c
635 13:52:03.335449 Clearing out pending MCEs
636 13:52:03.335567 apic_id: 0x02 done.
637 13:52:03.338466 VMX status: enabled
638 13:52:03.338580 VMX status: enabled
639 13:52:03.341917 IA32_FEATURE_CONTROL status: locked
640 13:52:03.348803 IA32_FEATURE_CONTROL status: locked
641 13:52:03.348916 Skip microcode update
642 13:52:03.352170 Skip microcode update
643 13:52:03.352276 CPU #4 initialized
644 13:52:03.355219 CPU #1 initialized
645 13:52:03.358723 Setting up local APIC...
646 13:52:03.358832 CPU #2 initialized
647 13:52:03.362139 Skip microcode update
648 13:52:03.364981 Setting up local APIC...
649 13:52:03.365095 CPU #7 initialized
650 13:52:03.368630 apic_id: 0x05 done.
651 13:52:03.371646 apic_id: 0x04 done.
652 13:52:03.371754 VMX status: enabled
653 13:52:03.375243 VMX status: enabled
654 13:52:03.378585 IA32_FEATURE_CONTROL status: locked
655 13:52:03.381937 IA32_FEATURE_CONTROL status: locked
656 13:52:03.385152 Skip microcode update
657 13:52:03.385262 apic_id: 0x01 done.
658 13:52:03.388651 Skip microcode update
659 13:52:03.391549 CPU #6 initialized
660 13:52:03.391660 CPU #5 initialized
661 13:52:03.395033 VMX status: enabled
662 13:52:03.398551 IA32_FEATURE_CONTROL status: locked
663 13:52:03.401527 Skip microcode update
664 13:52:03.401615 CPU #3 initialized
665 13:52:03.408268 bsp_do_flight_plan done after 457 msecs.
666 13:52:03.411833 CPU: frequency set to 4200 MHz
667 13:52:03.411955 Enabling SMIs.
668 13:52:03.412067 Locking SMM.
669 13:52:03.427839 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
670 13:52:03.431293 CBFS @ c08000 size 3f8000
671 13:52:03.438087 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
672 13:52:03.438190 CBFS: Locating 'vbt.bin'
673 13:52:03.440958 CBFS: Found @ offset 5f5c0 size 499
674 13:52:03.448015 Found a VBT of 4608 bytes after decompression
675 13:52:03.627485 Display FSP Version Info HOB
676 13:52:03.631152 Reference Code - CPU = 9.0.1e.30
677 13:52:03.633871 uCode Version = 0.0.0.ca
678 13:52:03.637459 TXT ACM version = ff.ff.ff.ffff
679 13:52:03.641010 Display FSP Version Info HOB
680 13:52:03.644364 Reference Code - ME = 9.0.1e.30
681 13:52:03.647331 MEBx version = 0.0.0.0
682 13:52:03.650790 ME Firmware Version = Consumer SKU
683 13:52:03.654226 Display FSP Version Info HOB
684 13:52:03.657164 Reference Code - CML PCH = 9.0.1e.30
685 13:52:03.660573 PCH-CRID Status = Disabled
686 13:52:03.663953 PCH-CRID Original Value = ff.ff.ff.ffff
687 13:52:03.667412 PCH-CRID New Value = ff.ff.ff.ffff
688 13:52:03.670918 OPROM - RST - RAID = ff.ff.ff.ffff
689 13:52:03.673940 ChipsetInit Base Version = ff.ff.ff.ffff
690 13:52:03.677319 ChipsetInit Oem Version = ff.ff.ff.ffff
691 13:52:03.680523 Display FSP Version Info HOB
692 13:52:03.687434 Reference Code - SA - System Agent = 9.0.1e.30
693 13:52:03.690285 Reference Code - MRC = 0.7.1.6c
694 13:52:03.690397 SA - PCIe Version = 9.0.1e.30
695 13:52:03.693762 SA-CRID Status = Disabled
696 13:52:03.697188 SA-CRID Original Value = 0.0.0.c
697 13:52:03.700668 SA-CRID New Value = 0.0.0.c
698 13:52:03.703632 OPROM - VBIOS = ff.ff.ff.ffff
699 13:52:03.707241 RTC Init
700 13:52:03.710122 Set power on after power failure.
701 13:52:03.710205 Disabling Deep S3
702 13:52:03.713919 Disabling Deep S3
703 13:52:03.713997 Disabling Deep S4
704 13:52:03.716817 Disabling Deep S4
705 13:52:03.716920 Disabling Deep S5
706 13:52:03.720138 Disabling Deep S5
707 13:52:03.726756 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 190 exit 1
708 13:52:03.726865 Enumerating buses...
709 13:52:03.733432 Show all devs... Before device enumeration.
710 13:52:03.733532 Root Device: enabled 1
711 13:52:03.736920 CPU_CLUSTER: 0: enabled 1
712 13:52:03.740076 DOMAIN: 0000: enabled 1
713 13:52:03.743625 APIC: 00: enabled 1
714 13:52:03.743735 PCI: 00:00.0: enabled 1
715 13:52:03.747030 PCI: 00:02.0: enabled 1
716 13:52:03.750487 PCI: 00:04.0: enabled 0
717 13:52:03.753514 PCI: 00:05.0: enabled 0
718 13:52:03.753620 PCI: 00:12.0: enabled 1
719 13:52:03.757097 PCI: 00:12.5: enabled 0
720 13:52:03.760103 PCI: 00:12.6: enabled 0
721 13:52:03.760192 PCI: 00:14.0: enabled 1
722 13:52:03.763504 PCI: 00:14.1: enabled 0
723 13:52:03.766790 PCI: 00:14.3: enabled 1
724 13:52:03.770318 PCI: 00:14.5: enabled 0
725 13:52:03.770411 PCI: 00:15.0: enabled 1
726 13:52:03.773245 PCI: 00:15.1: enabled 1
727 13:52:03.776799 PCI: 00:15.2: enabled 0
728 13:52:03.780217 PCI: 00:15.3: enabled 0
729 13:52:03.780299 PCI: 00:16.0: enabled 1
730 13:52:03.783690 PCI: 00:16.1: enabled 0
731 13:52:03.786534 PCI: 00:16.2: enabled 0
732 13:52:03.790138 PCI: 00:16.3: enabled 0
733 13:52:03.790249 PCI: 00:16.4: enabled 0
734 13:52:03.793115 PCI: 00:16.5: enabled 0
735 13:52:03.796815 PCI: 00:17.0: enabled 1
736 13:52:03.796894 PCI: 00:19.0: enabled 1
737 13:52:03.800345 PCI: 00:19.1: enabled 0
738 13:52:03.803265 PCI: 00:19.2: enabled 0
739 13:52:03.806847 PCI: 00:1a.0: enabled 0
740 13:52:03.806924 PCI: 00:1c.0: enabled 0
741 13:52:03.810162 PCI: 00:1c.1: enabled 0
742 13:52:03.813205 PCI: 00:1c.2: enabled 0
743 13:52:03.816592 PCI: 00:1c.3: enabled 0
744 13:52:03.816668 PCI: 00:1c.4: enabled 0
745 13:52:03.820024 PCI: 00:1c.5: enabled 0
746 13:52:03.823229 PCI: 00:1c.6: enabled 0
747 13:52:03.826590 PCI: 00:1c.7: enabled 0
748 13:52:03.826683 PCI: 00:1d.0: enabled 1
749 13:52:03.830010 PCI: 00:1d.1: enabled 0
750 13:52:03.833010 PCI: 00:1d.2: enabled 0
751 13:52:03.833086 PCI: 00:1d.3: enabled 0
752 13:52:03.836604 PCI: 00:1d.4: enabled 0
753 13:52:03.840011 PCI: 00:1d.5: enabled 1
754 13:52:03.843013 PCI: 00:1e.0: enabled 1
755 13:52:03.843097 PCI: 00:1e.1: enabled 0
756 13:52:03.846540 PCI: 00:1e.2: enabled 1
757 13:52:03.849606 PCI: 00:1e.3: enabled 1
758 13:52:03.852990 PCI: 00:1f.0: enabled 1
759 13:52:03.853098 PCI: 00:1f.1: enabled 1
760 13:52:03.856392 PCI: 00:1f.2: enabled 1
761 13:52:03.859968 PCI: 00:1f.3: enabled 1
762 13:52:03.862836 PCI: 00:1f.4: enabled 1
763 13:52:03.862950 PCI: 00:1f.5: enabled 1
764 13:52:03.866258 PCI: 00:1f.6: enabled 0
765 13:52:03.869727 USB0 port 0: enabled 1
766 13:52:03.869806 I2C: 00:15: enabled 1
767 13:52:03.873037 I2C: 00:5d: enabled 1
768 13:52:03.876010 GENERIC: 0.0: enabled 1
769 13:52:03.876119 I2C: 00:1a: enabled 1
770 13:52:03.879578 I2C: 00:38: enabled 1
771 13:52:03.882690 I2C: 00:39: enabled 1
772 13:52:03.882800 I2C: 00:3a: enabled 1
773 13:52:03.886139 I2C: 00:3b: enabled 1
774 13:52:03.889417 PCI: 00:00.0: enabled 1
775 13:52:03.889527 SPI: 00: enabled 1
776 13:52:03.893010 SPI: 01: enabled 1
777 13:52:03.895955 PNP: 0c09.0: enabled 1
778 13:52:03.896074 USB2 port 0: enabled 1
779 13:52:03.899523 USB2 port 1: enabled 1
780 13:52:03.902965 USB2 port 2: enabled 0
781 13:52:03.905805 USB2 port 3: enabled 0
782 13:52:03.905910 USB2 port 5: enabled 0
783 13:52:03.909160 USB2 port 6: enabled 1
784 13:52:03.912661 USB2 port 9: enabled 1
785 13:52:03.912771 USB3 port 0: enabled 1
786 13:52:03.916322 USB3 port 1: enabled 1
787 13:52:03.919365 USB3 port 2: enabled 1
788 13:52:03.922860 USB3 port 3: enabled 1
789 13:52:03.922968 USB3 port 4: enabled 0
790 13:52:03.925759 APIC: 02: enabled 1
791 13:52:03.925868 APIC: 07: enabled 1
792 13:52:03.929445 APIC: 01: enabled 1
793 13:52:03.932712 APIC: 03: enabled 1
794 13:52:03.932817 APIC: 04: enabled 1
795 13:52:03.936217 APIC: 05: enabled 1
796 13:52:03.939237 APIC: 06: enabled 1
797 13:52:03.939346 Compare with tree...
798 13:52:03.942726 Root Device: enabled 1
799 13:52:03.945688 CPU_CLUSTER: 0: enabled 1
800 13:52:03.945795 APIC: 00: enabled 1
801 13:52:03.949272 APIC: 02: enabled 1
802 13:52:03.952274 APIC: 07: enabled 1
803 13:52:03.952377 APIC: 01: enabled 1
804 13:52:03.955635 APIC: 03: enabled 1
805 13:52:03.959006 APIC: 04: enabled 1
806 13:52:03.959112 APIC: 05: enabled 1
807 13:52:03.962321 APIC: 06: enabled 1
808 13:52:03.965938 DOMAIN: 0000: enabled 1
809 13:52:03.968936 PCI: 00:00.0: enabled 1
810 13:52:03.969047 PCI: 00:02.0: enabled 1
811 13:52:03.972458 PCI: 00:04.0: enabled 0
812 13:52:03.975818 PCI: 00:05.0: enabled 0
813 13:52:03.978827 PCI: 00:12.0: enabled 1
814 13:52:03.982251 PCI: 00:12.5: enabled 0
815 13:52:03.982366 PCI: 00:12.6: enabled 0
816 13:52:03.985815 PCI: 00:14.0: enabled 1
817 13:52:03.988812 USB0 port 0: enabled 1
818 13:52:03.992185 USB2 port 0: enabled 1
819 13:52:03.995714 USB2 port 1: enabled 1
820 13:52:03.998981 USB2 port 2: enabled 0
821 13:52:03.999090 USB2 port 3: enabled 0
822 13:52:04.001988 USB2 port 5: enabled 0
823 13:52:04.005526 USB2 port 6: enabled 1
824 13:52:04.009033 USB2 port 9: enabled 1
825 13:52:04.012411 USB3 port 0: enabled 1
826 13:52:04.012492 USB3 port 1: enabled 1
827 13:52:04.015388 USB3 port 2: enabled 1
828 13:52:04.018883 USB3 port 3: enabled 1
829 13:52:04.021821 USB3 port 4: enabled 0
830 13:52:04.025279 PCI: 00:14.1: enabled 0
831 13:52:04.025383 PCI: 00:14.3: enabled 1
832 13:52:04.028801 PCI: 00:14.5: enabled 0
833 13:52:04.032252 PCI: 00:15.0: enabled 1
834 13:52:04.035492 I2C: 00:15: enabled 1
835 13:52:04.038818 PCI: 00:15.1: enabled 1
836 13:52:04.038926 I2C: 00:5d: enabled 1
837 13:52:04.042243 GENERIC: 0.0: enabled 1
838 13:52:04.045284 PCI: 00:15.2: enabled 0
839 13:52:04.048817 PCI: 00:15.3: enabled 0
840 13:52:04.051724 PCI: 00:16.0: enabled 1
841 13:52:04.051842 PCI: 00:16.1: enabled 0
842 13:52:04.055287 PCI: 00:16.2: enabled 0
843 13:52:04.058337 PCI: 00:16.3: enabled 0
844 13:52:04.061548 PCI: 00:16.4: enabled 0
845 13:52:04.064843 PCI: 00:16.5: enabled 0
846 13:52:04.064956 PCI: 00:17.0: enabled 1
847 13:52:04.068270 PCI: 00:19.0: enabled 1
848 13:52:04.071700 I2C: 00:1a: enabled 1
849 13:52:04.075269 I2C: 00:38: enabled 1
850 13:52:04.075389 I2C: 00:39: enabled 1
851 13:52:04.078104 I2C: 00:3a: enabled 1
852 13:52:04.081629 I2C: 00:3b: enabled 1
853 13:52:04.085167 PCI: 00:19.1: enabled 0
854 13:52:04.088153 PCI: 00:19.2: enabled 0
855 13:52:04.088261 PCI: 00:1a.0: enabled 0
856 13:52:04.091728 PCI: 00:1c.0: enabled 0
857 13:52:04.095118 PCI: 00:1c.1: enabled 0
858 13:52:04.098271 PCI: 00:1c.2: enabled 0
859 13:52:04.101700 PCI: 00:1c.3: enabled 0
860 13:52:04.101804 PCI: 00:1c.4: enabled 0
861 13:52:04.104631 PCI: 00:1c.5: enabled 0
862 13:52:04.108204 PCI: 00:1c.6: enabled 0
863 13:52:04.111137 PCI: 00:1c.7: enabled 0
864 13:52:04.114614 PCI: 00:1d.0: enabled 1
865 13:52:04.114718 PCI: 00:1d.1: enabled 0
866 13:52:04.118092 PCI: 00:1d.2: enabled 0
867 13:52:04.121081 PCI: 00:1d.3: enabled 0
868 13:52:04.124613 PCI: 00:1d.4: enabled 0
869 13:52:04.124720 PCI: 00:1d.5: enabled 1
870 13:52:04.127661 PCI: 00:00.0: enabled 1
871 13:52:04.131233 PCI: 00:1e.0: enabled 1
872 13:52:04.134708 PCI: 00:1e.1: enabled 0
873 13:52:04.138192 PCI: 00:1e.2: enabled 1
874 13:52:04.138289 SPI: 00: enabled 1
875 13:52:04.141043 PCI: 00:1e.3: enabled 1
876 13:52:04.144924 SPI: 01: enabled 1
877 13:52:04.147617 PCI: 00:1f.0: enabled 1
878 13:52:04.147718 PNP: 0c09.0: enabled 1
879 13:52:04.151111 PCI: 00:1f.1: enabled 1
880 13:52:04.154625 PCI: 00:1f.2: enabled 1
881 13:52:04.158308 PCI: 00:1f.3: enabled 1
882 13:52:04.161128 PCI: 00:1f.4: enabled 1
883 13:52:04.161210 PCI: 00:1f.5: enabled 1
884 13:52:04.164780 PCI: 00:1f.6: enabled 0
885 13:52:04.168081 Root Device scanning...
886 13:52:04.171279 scan_static_bus for Root Device
887 13:52:04.174902 CPU_CLUSTER: 0 enabled
888 13:52:04.174981 DOMAIN: 0000 enabled
889 13:52:04.177886 DOMAIN: 0000 scanning...
890 13:52:04.181319 PCI: pci_scan_bus for bus 00
891 13:52:04.184623 PCI: 00:00.0 [8086/0000] ops
892 13:52:04.187556 PCI: 00:00.0 [8086/9b61] enabled
893 13:52:04.191039 PCI: 00:02.0 [8086/0000] bus ops
894 13:52:04.194797 PCI: 00:02.0 [8086/9b41] enabled
895 13:52:04.197659 PCI: 00:04.0 [8086/1903] disabled
896 13:52:04.201043 PCI: 00:08.0 [8086/1911] enabled
897 13:52:04.204277 PCI: 00:12.0 [8086/02f9] enabled
898 13:52:04.207721 PCI: 00:14.0 [8086/0000] bus ops
899 13:52:04.211142 PCI: 00:14.0 [8086/02ed] enabled
900 13:52:04.214640 PCI: 00:14.2 [8086/02ef] enabled
901 13:52:04.217643 PCI: 00:14.3 [8086/02f0] enabled
902 13:52:04.221056 PCI: 00:15.0 [8086/0000] bus ops
903 13:52:04.224490 PCI: 00:15.0 [8086/02e8] enabled
904 13:52:04.227455 PCI: 00:15.1 [8086/0000] bus ops
905 13:52:04.231066 PCI: 00:15.1 [8086/02e9] enabled
906 13:52:04.234634 PCI: 00:16.0 [8086/0000] ops
907 13:52:04.237422 PCI: 00:16.0 [8086/02e0] enabled
908 13:52:04.240917 PCI: 00:17.0 [8086/0000] ops
909 13:52:04.244431 PCI: 00:17.0 [8086/02d3] enabled
910 13:52:04.247721 PCI: 00:19.0 [8086/0000] bus ops
911 13:52:04.251002 PCI: 00:19.0 [8086/02c5] enabled
912 13:52:04.254348 PCI: 00:1d.0 [8086/0000] bus ops
913 13:52:04.257347 PCI: 00:1d.0 [8086/02b0] enabled
914 13:52:04.260846 PCI: Static device PCI: 00:1d.5 not found, disabling it.
915 13:52:04.264262 PCI: 00:1e.0 [8086/0000] ops
916 13:52:04.267268 PCI: 00:1e.0 [8086/02a8] enabled
917 13:52:04.270696 PCI: 00:1e.2 [8086/0000] bus ops
918 13:52:04.274088 PCI: 00:1e.2 [8086/02aa] enabled
919 13:52:04.277451 PCI: 00:1e.3 [8086/0000] bus ops
920 13:52:04.281159 PCI: 00:1e.3 [8086/02ab] enabled
921 13:52:04.284169 PCI: 00:1f.0 [8086/0000] bus ops
922 13:52:04.287616 PCI: 00:1f.0 [8086/0284] enabled
923 13:52:04.294437 PCI: Static device PCI: 00:1f.1 not found, disabling it.
924 13:52:04.300842 PCI: Static device PCI: 00:1f.2 not found, disabling it.
925 13:52:04.304124 PCI: 00:1f.3 [8086/0000] bus ops
926 13:52:04.307598 PCI: 00:1f.3 [8086/02c8] enabled
927 13:52:04.310900 PCI: 00:1f.4 [8086/0000] bus ops
928 13:52:04.314318 PCI: 00:1f.4 [8086/02a3] enabled
929 13:52:04.317708 PCI: 00:1f.5 [8086/0000] bus ops
930 13:52:04.321230 PCI: 00:1f.5 [8086/02a4] enabled
931 13:52:04.324207 PCI: Leftover static devices:
932 13:52:04.324294 PCI: 00:05.0
933 13:52:04.324381 PCI: 00:12.5
934 13:52:04.327835 PCI: 00:12.6
935 13:52:04.327921 PCI: 00:14.1
936 13:52:04.331289 PCI: 00:14.5
937 13:52:04.331375 PCI: 00:15.2
938 13:52:04.331462 PCI: 00:15.3
939 13:52:04.334192 PCI: 00:16.1
940 13:52:04.334278 PCI: 00:16.2
941 13:52:04.337687 PCI: 00:16.3
942 13:52:04.337797 PCI: 00:16.4
943 13:52:04.340708 PCI: 00:16.5
944 13:52:04.340794 PCI: 00:19.1
945 13:52:04.340880 PCI: 00:19.2
946 13:52:04.344330 PCI: 00:1a.0
947 13:52:04.344416 PCI: 00:1c.0
948 13:52:04.347319 PCI: 00:1c.1
949 13:52:04.347405 PCI: 00:1c.2
950 13:52:04.347492 PCI: 00:1c.3
951 13:52:04.350801 PCI: 00:1c.4
952 13:52:04.350887 PCI: 00:1c.5
953 13:52:04.354237 PCI: 00:1c.6
954 13:52:04.354323 PCI: 00:1c.7
955 13:52:04.354414 PCI: 00:1d.1
956 13:52:04.357566 PCI: 00:1d.2
957 13:52:04.357651 PCI: 00:1d.3
958 13:52:04.360849 PCI: 00:1d.4
959 13:52:04.360959 PCI: 00:1d.5
960 13:52:04.363811 PCI: 00:1e.1
961 13:52:04.363895 PCI: 00:1f.1
962 13:52:04.363999 PCI: 00:1f.2
963 13:52:04.367350 PCI: 00:1f.6
964 13:52:04.370959 PCI: Check your devicetree.cb.
965 13:52:04.371047 PCI: 00:02.0 scanning...
966 13:52:04.377286 scan_generic_bus for PCI: 00:02.0
967 13:52:04.380783 scan_generic_bus for PCI: 00:02.0 done
968 13:52:04.384377 scan_bus: scanning of bus PCI: 00:02.0 took 10198 usecs
969 13:52:04.387392 PCI: 00:14.0 scanning...
970 13:52:04.390808 scan_static_bus for PCI: 00:14.0
971 13:52:04.394106 USB0 port 0 enabled
972 13:52:04.397736 USB0 port 0 scanning...
973 13:52:04.400630 scan_static_bus for USB0 port 0
974 13:52:04.400716 USB2 port 0 enabled
975 13:52:04.404202 USB2 port 1 enabled
976 13:52:04.404288 USB2 port 2 disabled
977 13:52:04.407602 USB2 port 3 disabled
978 13:52:04.410990 USB2 port 5 disabled
979 13:52:04.411077 USB2 port 6 enabled
980 13:52:04.413985 USB2 port 9 enabled
981 13:52:04.417242 USB3 port 0 enabled
982 13:52:04.417333 USB3 port 1 enabled
983 13:52:04.420514 USB3 port 2 enabled
984 13:52:04.420597 USB3 port 3 enabled
985 13:52:04.424024 USB3 port 4 disabled
986 13:52:04.427579 USB2 port 0 scanning...
987 13:52:04.430469 scan_static_bus for USB2 port 0
988 13:52:04.434129 scan_static_bus for USB2 port 0 done
989 13:52:04.440673 scan_bus: scanning of bus USB2 port 0 took 9703 usecs
990 13:52:04.440765 USB2 port 1 scanning...
991 13:52:04.444213 scan_static_bus for USB2 port 1
992 13:52:04.450687 scan_static_bus for USB2 port 1 done
993 13:52:04.453596 scan_bus: scanning of bus USB2 port 1 took 9700 usecs
994 13:52:04.457228 USB2 port 6 scanning...
995 13:52:04.460674 scan_static_bus for USB2 port 6
996 13:52:04.463560 scan_static_bus for USB2 port 6 done
997 13:52:04.470698 scan_bus: scanning of bus USB2 port 6 took 9714 usecs
998 13:52:04.470787 USB2 port 9 scanning...
999 13:52:04.474037 scan_static_bus for USB2 port 9
1000 13:52:04.480235 scan_static_bus for USB2 port 9 done
1001 13:52:04.483662 scan_bus: scanning of bus USB2 port 9 took 9710 usecs
1002 13:52:04.487243 USB3 port 0 scanning...
1003 13:52:04.490176 scan_static_bus for USB3 port 0
1004 13:52:04.493746 scan_static_bus for USB3 port 0 done
1005 13:52:04.499930 scan_bus: scanning of bus USB3 port 0 took 9710 usecs
1006 13:52:04.503450 USB3 port 1 scanning...
1007 13:52:04.507024 scan_static_bus for USB3 port 1
1008 13:52:04.510524 scan_static_bus for USB3 port 1 done
1009 13:52:04.513409 scan_bus: scanning of bus USB3 port 1 took 9711 usecs
1010 13:52:04.516679 USB3 port 2 scanning...
1011 13:52:04.520122 scan_static_bus for USB3 port 2
1012 13:52:04.523468 scan_static_bus for USB3 port 2 done
1013 13:52:04.529755 scan_bus: scanning of bus USB3 port 2 took 9700 usecs
1014 13:52:04.533261 USB3 port 3 scanning...
1015 13:52:04.536159 scan_static_bus for USB3 port 3
1016 13:52:04.539705 scan_static_bus for USB3 port 3 done
1017 13:52:04.543187 scan_bus: scanning of bus USB3 port 3 took 9704 usecs
1018 13:52:04.549576 scan_static_bus for USB0 port 0 done
1019 13:52:04.552685 scan_bus: scanning of bus USB0 port 0 took 155428 usecs
1020 13:52:04.556245 scan_static_bus for PCI: 00:14.0 done
1021 13:52:04.562748 scan_bus: scanning of bus PCI: 00:14.0 took 173045 usecs
1022 13:52:04.566364 PCI: 00:15.0 scanning...
1023 13:52:04.569271 scan_generic_bus for PCI: 00:15.0
1024 13:52:04.572620 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1025 13:52:04.575833 scan_generic_bus for PCI: 00:15.0 done
1026 13:52:04.582445 scan_bus: scanning of bus PCI: 00:15.0 took 14305 usecs
1027 13:52:04.585947 PCI: 00:15.1 scanning...
1028 13:52:04.589317 scan_generic_bus for PCI: 00:15.1
1029 13:52:04.592341 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1030 13:52:04.595893 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1031 13:52:04.602292 scan_generic_bus for PCI: 00:15.1 done
1032 13:52:04.605651 scan_bus: scanning of bus PCI: 00:15.1 took 18613 usecs
1033 13:52:04.609113 PCI: 00:19.0 scanning...
1034 13:52:04.612560 scan_generic_bus for PCI: 00:19.0
1035 13:52:04.615436 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1036 13:52:04.622319 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1037 13:52:04.625538 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1038 13:52:04.628953 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1039 13:52:04.632449 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1040 13:52:04.638850 scan_generic_bus for PCI: 00:19.0 done
1041 13:52:04.642561 scan_bus: scanning of bus PCI: 00:19.0 took 30746 usecs
1042 13:52:04.645430 PCI: 00:1d.0 scanning...
1043 13:52:04.649034 do_pci_scan_bridge for PCI: 00:1d.0
1044 13:52:04.652032 PCI: pci_scan_bus for bus 01
1045 13:52:04.655607 PCI: 01:00.0 [1c5c/1327] enabled
1046 13:52:04.659070 Enabling Common Clock Configuration
1047 13:52:04.665551 L1 Sub-State supported from root port 29
1048 13:52:04.665636 L1 Sub-State Support = 0xf
1049 13:52:04.668546 CommonModeRestoreTime = 0x28
1050 13:52:04.675437 Power On Value = 0x16, Power On Scale = 0x0
1051 13:52:04.675522 ASPM: Enabled L1
1052 13:52:04.682172 scan_bus: scanning of bus PCI: 00:1d.0 took 32801 usecs
1053 13:52:04.685565 PCI: 00:1e.2 scanning...
1054 13:52:04.688385 scan_generic_bus for PCI: 00:1e.2
1055 13:52:04.691794 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1056 13:52:04.695054 scan_generic_bus for PCI: 00:1e.2 done
1057 13:52:04.702150 scan_bus: scanning of bus PCI: 00:1e.2 took 14020 usecs
1058 13:52:04.702261 PCI: 00:1e.3 scanning...
1059 13:52:04.708444 scan_generic_bus for PCI: 00:1e.3
1060 13:52:04.711949 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1061 13:52:04.715439 scan_generic_bus for PCI: 00:1e.3 done
1062 13:52:04.721887 scan_bus: scanning of bus PCI: 00:1e.3 took 14008 usecs
1063 13:52:04.722003 PCI: 00:1f.0 scanning...
1064 13:52:04.724962 scan_static_bus for PCI: 00:1f.0
1065 13:52:04.728285 PNP: 0c09.0 enabled
1066 13:52:04.731754 scan_static_bus for PCI: 00:1f.0 done
1067 13:52:04.738081 scan_bus: scanning of bus PCI: 00:1f.0 took 12058 usecs
1068 13:52:04.741866 PCI: 00:1f.3 scanning...
1069 13:52:04.744883 scan_bus: scanning of bus PCI: 00:1f.3 took 2867 usecs
1070 13:52:04.748411 PCI: 00:1f.4 scanning...
1071 13:52:04.751282 scan_generic_bus for PCI: 00:1f.4
1072 13:52:04.754876 scan_generic_bus for PCI: 00:1f.4 done
1073 13:52:04.761310 scan_bus: scanning of bus PCI: 00:1f.4 took 10186 usecs
1074 13:52:04.764899 PCI: 00:1f.5 scanning...
1075 13:52:04.767921 scan_generic_bus for PCI: 00:1f.5
1076 13:52:04.771653 scan_generic_bus for PCI: 00:1f.5 done
1077 13:52:04.777895 scan_bus: scanning of bus PCI: 00:1f.5 took 10179 usecs
1078 13:52:04.784581 scan_bus: scanning of bus DOMAIN: 0000 took 605245 usecs
1079 13:52:04.787950 scan_static_bus for Root Device done
1080 13:52:04.791254 scan_bus: scanning of bus Root Device took 625130 usecs
1081 13:52:04.794582 done
1082 13:52:04.794693 Chrome EC: UHEPI supported
1083 13:52:04.801213 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1084 13:52:04.807757 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1085 13:52:04.814542 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1086 13:52:04.821615 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1087 13:52:04.824504 SPI flash protection: WPSW=0 SRP0=0
1088 13:52:04.831308 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1089 13:52:04.834676 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1090 13:52:04.838014 found VGA at PCI: 00:02.0
1091 13:52:04.841577 Setting up VGA for PCI: 00:02.0
1092 13:52:04.847833 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1093 13:52:04.851306 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1094 13:52:04.854790 Allocating resources...
1095 13:52:04.854912 Reading resources...
1096 13:52:04.861279 Root Device read_resources bus 0 link: 0
1097 13:52:04.864202 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1098 13:52:04.870893 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1099 13:52:04.874517 DOMAIN: 0000 read_resources bus 0 link: 0
1100 13:52:04.881005 PCI: 00:14.0 read_resources bus 0 link: 0
1101 13:52:04.884532 USB0 port 0 read_resources bus 0 link: 0
1102 13:52:04.892878 USB0 port 0 read_resources bus 0 link: 0 done
1103 13:52:04.895711 PCI: 00:14.0 read_resources bus 0 link: 0 done
1104 13:52:04.903372 PCI: 00:15.0 read_resources bus 1 link: 0
1105 13:52:04.906619 PCI: 00:15.0 read_resources bus 1 link: 0 done
1106 13:52:04.913132 PCI: 00:15.1 read_resources bus 2 link: 0
1107 13:52:04.916613 PCI: 00:15.1 read_resources bus 2 link: 0 done
1108 13:52:04.924061 PCI: 00:19.0 read_resources bus 3 link: 0
1109 13:52:04.930451 PCI: 00:19.0 read_resources bus 3 link: 0 done
1110 13:52:04.933905 PCI: 00:1d.0 read_resources bus 1 link: 0
1111 13:52:04.940669 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1112 13:52:04.943642 PCI: 00:1e.2 read_resources bus 4 link: 0
1113 13:52:04.950733 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1114 13:52:04.953686 PCI: 00:1e.3 read_resources bus 5 link: 0
1115 13:52:04.960334 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1116 13:52:04.963867 PCI: 00:1f.0 read_resources bus 0 link: 0
1117 13:52:04.970335 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1118 13:52:04.977266 DOMAIN: 0000 read_resources bus 0 link: 0 done
1119 13:52:04.980161 Root Device read_resources bus 0 link: 0 done
1120 13:52:04.983625 Done reading resources.
1121 13:52:04.987069 Show resources in subtree (Root Device)...After reading.
1122 13:52:04.993403 Root Device child on link 0 CPU_CLUSTER: 0
1123 13:52:04.997161 CPU_CLUSTER: 0 child on link 0 APIC: 00
1124 13:52:04.997245 APIC: 00
1125 13:52:05.000183 APIC: 02
1126 13:52:05.000267 APIC: 07
1127 13:52:05.003818 APIC: 01
1128 13:52:05.003901 APIC: 03
1129 13:52:05.003967 APIC: 04
1130 13:52:05.007128 APIC: 05
1131 13:52:05.007212 APIC: 06
1132 13:52:05.010299 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1133 13:52:05.020144 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1134 13:52:05.029886 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1135 13:52:05.080097 PCI: 00:00.0
1136 13:52:05.080431 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1137 13:52:05.080509 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1138 13:52:05.080572 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1139 13:52:05.080645 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1140 13:52:05.080716 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1141 13:52:05.130268 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1142 13:52:05.130630 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1143 13:52:05.130754 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1144 13:52:05.130866 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1145 13:52:05.130946 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1146 13:52:05.142755 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1147 13:52:05.146048 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1148 13:52:05.153005 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1149 13:52:05.162545 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1150 13:52:05.172437 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1151 13:52:05.182837 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1152 13:52:05.182962 PCI: 00:02.0
1153 13:52:05.192410 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 13:52:05.205758 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1155 13:52:05.212281 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1156 13:52:05.215889 PCI: 00:04.0
1157 13:52:05.215965 PCI: 00:08.0
1158 13:52:05.225437 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1159 13:52:05.228757 PCI: 00:12.0
1160 13:52:05.238926 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1161 13:52:05.242157 PCI: 00:14.0 child on link 0 USB0 port 0
1162 13:52:05.251885 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1163 13:52:05.255390 USB0 port 0 child on link 0 USB2 port 0
1164 13:52:05.258695 USB2 port 0
1165 13:52:05.258775 USB2 port 1
1166 13:52:05.262162 USB2 port 2
1167 13:52:05.262263 USB2 port 3
1168 13:52:05.265784 USB2 port 5
1169 13:52:05.265866 USB2 port 6
1170 13:52:05.268782 USB2 port 9
1171 13:52:05.272343 USB3 port 0
1172 13:52:05.272445 USB3 port 1
1173 13:52:05.275405 USB3 port 2
1174 13:52:05.275479 USB3 port 3
1175 13:52:05.278430 USB3 port 4
1176 13:52:05.278502 PCI: 00:14.2
1177 13:52:05.288420 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1178 13:52:05.298234 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1179 13:52:05.301861 PCI: 00:14.3
1180 13:52:05.311789 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1181 13:52:05.315460 PCI: 00:15.0 child on link 0 I2C: 01:15
1182 13:52:05.324882 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 13:52:05.324971 I2C: 01:15
1184 13:52:05.332031 PCI: 00:15.1 child on link 0 I2C: 02:5d
1185 13:52:05.341623 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1186 13:52:05.341709 I2C: 02:5d
1187 13:52:05.345140 GENERIC: 0.0
1188 13:52:05.345249 PCI: 00:16.0
1189 13:52:05.354923 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 13:52:05.358290 PCI: 00:17.0
1191 13:52:05.364860 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1192 13:52:05.374815 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1193 13:52:05.384777 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1194 13:52:05.391832 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1195 13:52:05.401650 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1196 13:52:05.408025 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1197 13:52:05.414437 PCI: 00:19.0 child on link 0 I2C: 03:1a
1198 13:52:05.424561 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 13:52:05.424649 I2C: 03:1a
1200 13:52:05.428036 I2C: 03:38
1201 13:52:05.428122 I2C: 03:39
1202 13:52:05.428208 I2C: 03:3a
1203 13:52:05.431453 I2C: 03:3b
1204 13:52:05.434801 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1205 13:52:05.444544 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1206 13:52:05.454368 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1207 13:52:05.464320 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1208 13:52:05.464413 PCI: 01:00.0
1209 13:52:05.474255 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1210 13:52:05.477829 PCI: 00:1e.0
1211 13:52:05.487751 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1212 13:52:05.497369 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1213 13:52:05.500891 PCI: 00:1e.2 child on link 0 SPI: 00
1214 13:52:05.510874 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1215 13:52:05.514444 SPI: 00
1216 13:52:05.517643 PCI: 00:1e.3 child on link 0 SPI: 01
1217 13:52:05.527236 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1218 13:52:05.527321 SPI: 01
1219 13:52:05.530650 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1220 13:52:05.540847 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1221 13:52:05.550567 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1222 13:52:05.550655 PNP: 0c09.0
1223 13:52:05.560681 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1224 13:52:05.560767 PCI: 00:1f.3
1225 13:52:05.570608 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1226 13:52:05.580569 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1227 13:52:05.583542 PCI: 00:1f.4
1228 13:52:05.593803 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1229 13:52:05.603829 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1230 13:52:05.603918 PCI: 00:1f.5
1231 13:52:05.613608 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1232 13:52:05.620294 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1233 13:52:05.626684 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1234 13:52:05.633318 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1235 13:52:05.636914 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1236 13:52:05.639828 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1237 13:52:05.643317 PCI: 00:17.0 18 * [0x60 - 0x67] io
1238 13:52:05.646620 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1239 13:52:05.653540 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1240 13:52:05.660050 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1241 13:52:05.669490 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1242 13:52:05.676233 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1243 13:52:05.682887 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1244 13:52:05.686233 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1245 13:52:05.696215 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1246 13:52:05.699740 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1247 13:52:05.706262 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1248 13:52:05.709362 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1249 13:52:05.712833 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1250 13:52:05.719456 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1251 13:52:05.722845 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1252 13:52:05.729725 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1253 13:52:05.732638 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1254 13:52:05.739574 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1255 13:52:05.742947 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1256 13:52:05.749277 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1257 13:52:05.752590 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1258 13:52:05.759520 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1259 13:52:05.762952 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1260 13:52:05.769274 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1261 13:52:05.772852 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1262 13:52:05.778999 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1263 13:52:05.782325 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1264 13:52:05.785764 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1265 13:52:05.792206 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1266 13:52:05.795889 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1267 13:52:05.802428 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1268 13:52:05.805983 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1269 13:52:05.815785 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1270 13:52:05.818858 avoid_fixed_resources: DOMAIN: 0000
1271 13:52:05.825943 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1272 13:52:05.832162 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1273 13:52:05.838709 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1274 13:52:05.845595 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1275 13:52:05.855262 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1276 13:52:05.862209 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1277 13:52:05.868345 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1278 13:52:05.878845 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1279 13:52:05.885216 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1280 13:52:05.891506 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1281 13:52:05.898611 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1282 13:52:05.908076 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1283 13:52:05.908160 Setting resources...
1284 13:52:05.915196 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1285 13:52:05.918033 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1286 13:52:05.921687 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1287 13:52:05.928010 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1288 13:52:05.931458 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1289 13:52:05.937950 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1290 13:52:05.944883 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1291 13:52:05.951321 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1292 13:52:05.957694 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1293 13:52:05.961492 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1294 13:52:05.968110 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1295 13:52:05.970959 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1296 13:52:05.978091 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1297 13:52:05.981041 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1298 13:52:05.987481 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1299 13:52:05.991002 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1300 13:52:05.997799 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1301 13:52:06.001074 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1302 13:52:06.007782 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1303 13:52:06.011303 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1304 13:52:06.017283 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1305 13:52:06.020818 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1306 13:52:06.027348 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1307 13:52:06.030839 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1308 13:52:06.034331 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1309 13:52:06.040765 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1310 13:52:06.044312 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1311 13:52:06.050703 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1312 13:52:06.054201 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1313 13:52:06.060696 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1314 13:52:06.063832 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1315 13:52:06.070982 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1316 13:52:06.077280 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1317 13:52:06.083756 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1318 13:52:06.090787 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1319 13:52:06.100354 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1320 13:52:06.103829 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1321 13:52:06.110130 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1322 13:52:06.117092 Root Device assign_resources, bus 0 link: 0
1323 13:52:06.120530 DOMAIN: 0000 assign_resources, bus 0 link: 0
1324 13:52:06.130534 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1325 13:52:06.137014 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1326 13:52:06.146923 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1327 13:52:06.153515 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1328 13:52:06.163480 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1329 13:52:06.170224 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1330 13:52:06.173624 PCI: 00:14.0 assign_resources, bus 0 link: 0
1331 13:52:06.180314 PCI: 00:14.0 assign_resources, bus 0 link: 0
1332 13:52:06.186754 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1333 13:52:06.196781 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1334 13:52:06.203159 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1335 13:52:06.213353 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1336 13:52:06.216683 PCI: 00:15.0 assign_resources, bus 1 link: 0
1337 13:52:06.222873 PCI: 00:15.0 assign_resources, bus 1 link: 0
1338 13:52:06.229994 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1339 13:52:06.232986 PCI: 00:15.1 assign_resources, bus 2 link: 0
1340 13:52:06.239523 PCI: 00:15.1 assign_resources, bus 2 link: 0
1341 13:52:06.246277 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1342 13:52:06.256221 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1343 13:52:06.262795 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1344 13:52:06.269706 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1345 13:52:06.279234 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1346 13:52:06.285792 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1347 13:52:06.292828 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1348 13:52:06.302774 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1349 13:52:06.306402 PCI: 00:19.0 assign_resources, bus 3 link: 0
1350 13:52:06.312775 PCI: 00:19.0 assign_resources, bus 3 link: 0
1351 13:52:06.319589 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1352 13:52:06.328985 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1353 13:52:06.338927 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1354 13:52:06.342370 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1355 13:52:06.349320 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1356 13:52:06.355446 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1357 13:52:06.362440 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1358 13:52:06.372424 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1359 13:52:06.375276 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1360 13:52:06.382328 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1361 13:52:06.388984 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1362 13:52:06.395323 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1363 13:52:06.398915 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1364 13:52:06.401919 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1365 13:52:06.409172 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1366 13:52:06.412661 LPC: Trying to open IO window from 800 size 1ff
1367 13:52:06.422335 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1368 13:52:06.429248 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1369 13:52:06.438891 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1370 13:52:06.445428 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1371 13:52:06.451883 DOMAIN: 0000 assign_resources, bus 0 link: 0
1372 13:52:06.455180 Root Device assign_resources, bus 0 link: 0
1373 13:52:06.458487 Done setting resources.
1374 13:52:06.465390 Show resources in subtree (Root Device)...After assigning values.
1375 13:52:06.468600 Root Device child on link 0 CPU_CLUSTER: 0
1376 13:52:06.472150 CPU_CLUSTER: 0 child on link 0 APIC: 00
1377 13:52:06.474903 APIC: 00
1378 13:52:06.474975 APIC: 02
1379 13:52:06.478281 APIC: 07
1380 13:52:06.478367 APIC: 01
1381 13:52:06.478457 APIC: 03
1382 13:52:06.481797 APIC: 04
1383 13:52:06.481890 APIC: 05
1384 13:52:06.481962 APIC: 06
1385 13:52:06.488607 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1386 13:52:06.498102 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1387 13:52:06.508283 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1388 13:52:06.511291 PCI: 00:00.0
1389 13:52:06.517938 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1390 13:52:06.528199 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1391 13:52:06.537998 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1392 13:52:06.547809 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1393 13:52:06.557805 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1394 13:52:06.567610 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1395 13:52:06.574095 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1396 13:52:06.584181 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1397 13:52:06.593998 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1398 13:52:06.604118 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1399 13:52:06.614294 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1400 13:52:06.623894 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1401 13:52:06.630264 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1402 13:52:06.640430 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1403 13:52:06.650385 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1404 13:52:06.660305 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1405 13:52:06.660788 PCI: 00:02.0
1406 13:52:06.673730 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1407 13:52:06.683637 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1408 13:52:06.693649 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1409 13:52:06.694094 PCI: 00:04.0
1410 13:52:06.696624 PCI: 00:08.0
1411 13:52:06.706715 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1412 13:52:06.707146 PCI: 00:12.0
1413 13:52:06.716769 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1414 13:52:06.723311 PCI: 00:14.0 child on link 0 USB0 port 0
1415 13:52:06.733244 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1416 13:52:06.736586 USB0 port 0 child on link 0 USB2 port 0
1417 13:52:06.739942 USB2 port 0
1418 13:52:06.740541 USB2 port 1
1419 13:52:06.743321 USB2 port 2
1420 13:52:06.743854 USB2 port 3
1421 13:52:06.746639 USB2 port 5
1422 13:52:06.747080 USB2 port 6
1423 13:52:06.749997 USB2 port 9
1424 13:52:06.750456 USB3 port 0
1425 13:52:06.753267 USB3 port 1
1426 13:52:06.753781 USB3 port 2
1427 13:52:06.756688 USB3 port 3
1428 13:52:06.759584 USB3 port 4
1429 13:52:06.760003 PCI: 00:14.2
1430 13:52:06.769728 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1431 13:52:06.779871 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1432 13:52:06.782669 PCI: 00:14.3
1433 13:52:06.792619 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1434 13:52:06.796116 PCI: 00:15.0 child on link 0 I2C: 01:15
1435 13:52:06.805913 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1436 13:52:06.809297 I2C: 01:15
1437 13:52:06.812674 PCI: 00:15.1 child on link 0 I2C: 02:5d
1438 13:52:06.822867 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1439 13:52:06.825793 I2C: 02:5d
1440 13:52:06.826364 GENERIC: 0.0
1441 13:52:06.828756 PCI: 00:16.0
1442 13:52:06.839323 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1443 13:52:06.839748 PCI: 00:17.0
1444 13:52:06.848947 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1445 13:52:06.862095 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1446 13:52:06.868677 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1447 13:52:06.878963 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1448 13:52:06.888708 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1449 13:52:06.898338 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1450 13:52:06.901801 PCI: 00:19.0 child on link 0 I2C: 03:1a
1451 13:52:06.911822 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1452 13:52:06.914663 I2C: 03:1a
1453 13:52:06.915243 I2C: 03:38
1454 13:52:06.918161 I2C: 03:39
1455 13:52:06.918619 I2C: 03:3a
1456 13:52:06.921570 I2C: 03:3b
1457 13:52:06.925151 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1458 13:52:06.934648 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1459 13:52:06.944793 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1460 13:52:06.954809 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1461 13:52:06.958083 PCI: 01:00.0
1462 13:52:06.968187 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1463 13:52:06.968633 PCI: 00:1e.0
1464 13:52:06.978208 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1465 13:52:06.991188 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1466 13:52:06.994687 PCI: 00:1e.2 child on link 0 SPI: 00
1467 13:52:07.004145 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1468 13:52:07.004695 SPI: 00
1469 13:52:07.011106 PCI: 00:1e.3 child on link 0 SPI: 01
1470 13:52:07.020545 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1471 13:52:07.021116 SPI: 01
1472 13:52:07.024296 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1473 13:52:07.033731 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1474 13:52:07.043794 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1475 13:52:07.044358 PNP: 0c09.0
1476 13:52:07.053746 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1477 13:52:07.054312 PCI: 00:1f.3
1478 13:52:07.063685 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1479 13:52:07.077078 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1480 13:52:07.077613 PCI: 00:1f.4
1481 13:52:07.086795 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1482 13:52:07.096555 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1483 13:52:07.097109 PCI: 00:1f.5
1484 13:52:07.110261 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1485 13:52:07.110704 Done allocating resources.
1486 13:52:07.116959 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1487 13:52:07.119770 Enabling resources...
1488 13:52:07.123128 PCI: 00:00.0 subsystem <- 8086/9b61
1489 13:52:07.126548 PCI: 00:00.0 cmd <- 06
1490 13:52:07.130134 PCI: 00:02.0 subsystem <- 8086/9b41
1491 13:52:07.133171 PCI: 00:02.0 cmd <- 03
1492 13:52:07.136695 PCI: 00:08.0 cmd <- 06
1493 13:52:07.139735 PCI: 00:12.0 subsystem <- 8086/02f9
1494 13:52:07.143341 PCI: 00:12.0 cmd <- 02
1495 13:52:07.146259 PCI: 00:14.0 subsystem <- 8086/02ed
1496 13:52:07.146848 PCI: 00:14.0 cmd <- 02
1497 13:52:07.149580 PCI: 00:14.2 cmd <- 02
1498 13:52:07.153146 PCI: 00:14.3 subsystem <- 8086/02f0
1499 13:52:07.156206 PCI: 00:14.3 cmd <- 02
1500 13:52:07.159671 PCI: 00:15.0 subsystem <- 8086/02e8
1501 13:52:07.162752 PCI: 00:15.0 cmd <- 02
1502 13:52:07.166288 PCI: 00:15.1 subsystem <- 8086/02e9
1503 13:52:07.169789 PCI: 00:15.1 cmd <- 02
1504 13:52:07.172689 PCI: 00:16.0 subsystem <- 8086/02e0
1505 13:52:07.176241 PCI: 00:16.0 cmd <- 02
1506 13:52:07.179523 PCI: 00:17.0 subsystem <- 8086/02d3
1507 13:52:07.182777 PCI: 00:17.0 cmd <- 03
1508 13:52:07.186285 PCI: 00:19.0 subsystem <- 8086/02c5
1509 13:52:07.188996 PCI: 00:19.0 cmd <- 02
1510 13:52:07.192378 PCI: 00:1d.0 bridge ctrl <- 0013
1511 13:52:07.195984 PCI: 00:1d.0 subsystem <- 8086/02b0
1512 13:52:07.196442 PCI: 00:1d.0 cmd <- 06
1513 13:52:07.202826 PCI: 00:1e.0 subsystem <- 8086/02a8
1514 13:52:07.203272 PCI: 00:1e.0 cmd <- 06
1515 13:52:07.206266 PCI: 00:1e.2 subsystem <- 8086/02aa
1516 13:52:07.209166 PCI: 00:1e.2 cmd <- 06
1517 13:52:07.212518 PCI: 00:1e.3 subsystem <- 8086/02ab
1518 13:52:07.216169 PCI: 00:1e.3 cmd <- 02
1519 13:52:07.219145 PCI: 00:1f.0 subsystem <- 8086/0284
1520 13:52:07.222621 PCI: 00:1f.0 cmd <- 407
1521 13:52:07.226104 PCI: 00:1f.3 subsystem <- 8086/02c8
1522 13:52:07.229333 PCI: 00:1f.3 cmd <- 02
1523 13:52:07.232797 PCI: 00:1f.4 subsystem <- 8086/02a3
1524 13:52:07.235745 PCI: 00:1f.4 cmd <- 03
1525 13:52:07.239256 PCI: 00:1f.5 subsystem <- 8086/02a4
1526 13:52:07.242186 PCI: 00:1f.5 cmd <- 406
1527 13:52:07.250456 PCI: 01:00.0 cmd <- 02
1528 13:52:07.255738 done.
1529 13:52:07.267806 ME: Version: 14.0.39.1367
1530 13:52:07.274303 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1531 13:52:07.277843 Initializing devices...
1532 13:52:07.278342 Root Device init ...
1533 13:52:07.284665 Chrome EC: Set SMI mask to 0x0000000000000000
1534 13:52:07.287775 Chrome EC: clear events_b mask to 0x0000000000000000
1535 13:52:07.294532 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1536 13:52:07.300892 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1537 13:52:07.307616 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1538 13:52:07.310685 Chrome EC: Set WAKE mask to 0x0000000000000000
1539 13:52:07.317564 Root Device init finished in 35194 usecs
1540 13:52:07.317984 CPU_CLUSTER: 0 init ...
1541 13:52:07.323496 CPU_CLUSTER: 0 init finished in 2447 usecs
1542 13:52:07.328926 PCI: 00:00.0 init ...
1543 13:52:07.331746 CPU TDP: 15 Watts
1544 13:52:07.335027 CPU PL2 = 64 Watts
1545 13:52:07.338664 PCI: 00:00.0 init finished in 7079 usecs
1546 13:52:07.341678 PCI: 00:02.0 init ...
1547 13:52:07.345288 PCI: 00:02.0 init finished in 2255 usecs
1548 13:52:07.348301 PCI: 00:08.0 init ...
1549 13:52:07.351764 PCI: 00:08.0 init finished in 2251 usecs
1550 13:52:07.355199 PCI: 00:12.0 init ...
1551 13:52:07.358554 PCI: 00:12.0 init finished in 2244 usecs
1552 13:52:07.361511 PCI: 00:14.0 init ...
1553 13:52:07.365005 PCI: 00:14.0 init finished in 2252 usecs
1554 13:52:07.368010 PCI: 00:14.2 init ...
1555 13:52:07.371545 PCI: 00:14.2 init finished in 2253 usecs
1556 13:52:07.374535 PCI: 00:14.3 init ...
1557 13:52:07.378213 PCI: 00:14.3 init finished in 2260 usecs
1558 13:52:07.381578 PCI: 00:15.0 init ...
1559 13:52:07.385011 DW I2C bus 0 at 0xd121f000 (400 KHz)
1560 13:52:07.388430 PCI: 00:15.0 init finished in 5978 usecs
1561 13:52:07.391663 PCI: 00:15.1 init ...
1562 13:52:07.394975 DW I2C bus 1 at 0xd1220000 (400 KHz)
1563 13:52:07.401419 PCI: 00:15.1 init finished in 5978 usecs
1564 13:52:07.401909 PCI: 00:16.0 init ...
1565 13:52:07.407520 PCI: 00:16.0 init finished in 2252 usecs
1566 13:52:07.411356 PCI: 00:19.0 init ...
1567 13:52:07.414330 DW I2C bus 4 at 0xd1222000 (400 KHz)
1568 13:52:07.417895 PCI: 00:19.0 init finished in 5970 usecs
1569 13:52:07.421320 PCI: 00:1d.0 init ...
1570 13:52:07.424356 Initializing PCH PCIe bridge.
1571 13:52:07.427500 PCI: 00:1d.0 init finished in 5284 usecs
1572 13:52:07.430967 PCI: 00:1f.0 init ...
1573 13:52:07.434434 IOAPIC: Initializing IOAPIC at 0xfec00000
1574 13:52:07.441227 IOAPIC: Bootstrap Processor Local APIC = 0x00
1575 13:52:07.441739 IOAPIC: ID = 0x02
1576 13:52:07.444314 IOAPIC: Dumping registers
1577 13:52:07.447689 reg 0x0000: 0x02000000
1578 13:52:07.451288 reg 0x0001: 0x00770020
1579 13:52:07.451738 reg 0x0002: 0x00000000
1580 13:52:07.457224 PCI: 00:1f.0 init finished in 23541 usecs
1581 13:52:07.460766 PCI: 00:1f.4 init ...
1582 13:52:07.463508 PCI: 00:1f.4 init finished in 2261 usecs
1583 13:52:07.474075 PCI: 01:00.0 init ...
1584 13:52:07.477641 PCI: 01:00.0 init finished in 2252 usecs
1585 13:52:07.481882 PNP: 0c09.0 init ...
1586 13:52:07.484936 Google Chrome EC uptime: 11.096 seconds
1587 13:52:07.491821 Google Chrome AP resets since EC boot: 0
1588 13:52:07.494977 Google Chrome most recent AP reset causes:
1589 13:52:07.501492 Google Chrome EC reset flags at last EC boot: reset-pin
1590 13:52:07.504720 PNP: 0c09.0 init finished in 20598 usecs
1591 13:52:07.508104 Devices initialized
1592 13:52:07.511305 Show all devs... After init.
1593 13:52:07.511438 Root Device: enabled 1
1594 13:52:07.514907 CPU_CLUSTER: 0: enabled 1
1595 13:52:07.518114 DOMAIN: 0000: enabled 1
1596 13:52:07.518194 APIC: 00: enabled 1
1597 13:52:07.521636 PCI: 00:00.0: enabled 1
1598 13:52:07.524841 PCI: 00:02.0: enabled 1
1599 13:52:07.527817 PCI: 00:04.0: enabled 0
1600 13:52:07.527897 PCI: 00:05.0: enabled 0
1601 13:52:07.531413 PCI: 00:12.0: enabled 1
1602 13:52:07.534400 PCI: 00:12.5: enabled 0
1603 13:52:07.538043 PCI: 00:12.6: enabled 0
1604 13:52:07.538128 PCI: 00:14.0: enabled 1
1605 13:52:07.541527 PCI: 00:14.1: enabled 0
1606 13:52:07.544345 PCI: 00:14.3: enabled 1
1607 13:52:07.544425 PCI: 00:14.5: enabled 0
1608 13:52:07.547851 PCI: 00:15.0: enabled 1
1609 13:52:07.551365 PCI: 00:15.1: enabled 1
1610 13:52:07.554441 PCI: 00:15.2: enabled 0
1611 13:52:07.554522 PCI: 00:15.3: enabled 0
1612 13:52:07.557924 PCI: 00:16.0: enabled 1
1613 13:52:07.561356 PCI: 00:16.1: enabled 0
1614 13:52:07.564229 PCI: 00:16.2: enabled 0
1615 13:52:07.564309 PCI: 00:16.3: enabled 0
1616 13:52:07.567793 PCI: 00:16.4: enabled 0
1617 13:52:07.571269 PCI: 00:16.5: enabled 0
1618 13:52:07.574331 PCI: 00:17.0: enabled 1
1619 13:52:07.574412 PCI: 00:19.0: enabled 1
1620 13:52:07.577788 PCI: 00:19.1: enabled 0
1621 13:52:07.581305 PCI: 00:19.2: enabled 0
1622 13:52:07.584260 PCI: 00:1a.0: enabled 0
1623 13:52:07.584341 PCI: 00:1c.0: enabled 0
1624 13:52:07.587860 PCI: 00:1c.1: enabled 0
1625 13:52:07.590654 PCI: 00:1c.2: enabled 0
1626 13:52:07.590736 PCI: 00:1c.3: enabled 0
1627 13:52:07.594196 PCI: 00:1c.4: enabled 0
1628 13:52:07.597699 PCI: 00:1c.5: enabled 0
1629 13:52:07.600947 PCI: 00:1c.6: enabled 0
1630 13:52:07.601027 PCI: 00:1c.7: enabled 0
1631 13:52:07.604200 PCI: 00:1d.0: enabled 1
1632 13:52:07.607632 PCI: 00:1d.1: enabled 0
1633 13:52:07.610809 PCI: 00:1d.2: enabled 0
1634 13:52:07.610933 PCI: 00:1d.3: enabled 0
1635 13:52:07.614147 PCI: 00:1d.4: enabled 0
1636 13:52:07.617383 PCI: 00:1d.5: enabled 0
1637 13:52:07.620778 PCI: 00:1e.0: enabled 1
1638 13:52:07.620858 PCI: 00:1e.1: enabled 0
1639 13:52:07.624030 PCI: 00:1e.2: enabled 1
1640 13:52:07.627517 PCI: 00:1e.3: enabled 1
1641 13:52:07.630684 PCI: 00:1f.0: enabled 1
1642 13:52:07.630764 PCI: 00:1f.1: enabled 0
1643 13:52:07.633610 PCI: 00:1f.2: enabled 0
1644 13:52:07.636973 PCI: 00:1f.3: enabled 1
1645 13:52:07.637054 PCI: 00:1f.4: enabled 1
1646 13:52:07.640426 PCI: 00:1f.5: enabled 1
1647 13:52:07.643850 PCI: 00:1f.6: enabled 0
1648 13:52:07.646753 USB0 port 0: enabled 1
1649 13:52:07.646834 I2C: 01:15: enabled 1
1650 13:52:07.650238 I2C: 02:5d: enabled 1
1651 13:52:07.653793 GENERIC: 0.0: enabled 1
1652 13:52:07.653873 I2C: 03:1a: enabled 1
1653 13:52:07.656693 I2C: 03:38: enabled 1
1654 13:52:07.660258 I2C: 03:39: enabled 1
1655 13:52:07.660339 I2C: 03:3a: enabled 1
1656 13:52:07.663162 I2C: 03:3b: enabled 1
1657 13:52:07.666824 PCI: 00:00.0: enabled 1
1658 13:52:07.666921 SPI: 00: enabled 1
1659 13:52:07.670171 SPI: 01: enabled 1
1660 13:52:07.673210 PNP: 0c09.0: enabled 1
1661 13:52:07.673316 USB2 port 0: enabled 1
1662 13:52:07.676837 USB2 port 1: enabled 1
1663 13:52:07.679789 USB2 port 2: enabled 0
1664 13:52:07.683429 USB2 port 3: enabled 0
1665 13:52:07.683511 USB2 port 5: enabled 0
1666 13:52:07.686476 USB2 port 6: enabled 1
1667 13:52:07.690044 USB2 port 9: enabled 1
1668 13:52:07.690125 USB3 port 0: enabled 1
1669 13:52:07.692929 USB3 port 1: enabled 1
1670 13:52:07.696846 USB3 port 2: enabled 1
1671 13:52:07.699814 USB3 port 3: enabled 1
1672 13:52:07.699895 USB3 port 4: enabled 0
1673 13:52:07.703419 APIC: 02: enabled 1
1674 13:52:07.703500 APIC: 07: enabled 1
1675 13:52:07.706198 APIC: 01: enabled 1
1676 13:52:07.709723 APIC: 03: enabled 1
1677 13:52:07.709866 APIC: 04: enabled 1
1678 13:52:07.712997 APIC: 05: enabled 1
1679 13:52:07.716239 APIC: 06: enabled 1
1680 13:52:07.716319 PCI: 00:08.0: enabled 1
1681 13:52:07.719664 PCI: 00:14.2: enabled 1
1682 13:52:07.722902 PCI: 01:00.0: enabled 1
1683 13:52:07.726728 Disabling ACPI via APMC:
1684 13:52:07.730008 done.
1685 13:52:07.733356 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1686 13:52:07.736664 ELOG: NV offset 0xaf0000 size 0x4000
1687 13:52:07.743107 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1688 13:52:07.750343 ELOG: Event(17) added with size 13 at 2023-04-20 13:52:07 UTC
1689 13:52:07.756633 ELOG: Event(92) added with size 9 at 2023-04-20 13:52:07 UTC
1690 13:52:07.763291 ELOG: Event(93) added with size 9 at 2023-04-20 13:52:07 UTC
1691 13:52:07.769792 ELOG: Event(9A) added with size 9 at 2023-04-20 13:52:07 UTC
1692 13:52:07.776394 ELOG: Event(9E) added with size 10 at 2023-04-20 13:52:07 UTC
1693 13:52:07.783000 ELOG: Event(9F) added with size 14 at 2023-04-20 13:52:07 UTC
1694 13:52:07.786584 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1695 13:52:07.793780 ELOG: Event(A1) added with size 10 at 2023-04-20 13:52:07 UTC
1696 13:52:07.803602 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1697 13:52:07.810138 ELOG: Event(A0) added with size 9 at 2023-04-20 13:52:07 UTC
1698 13:52:07.813638 elog_add_boot_reason: Logged dev mode boot
1699 13:52:07.816601 Finalize devices...
1700 13:52:07.816695 PCI: 00:17.0 final
1701 13:52:07.819852 Devices finalized
1702 13:52:07.823366 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1703 13:52:07.829968 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1704 13:52:07.833370 ME: HFSTS1 : 0x90000245
1705 13:52:07.836579 ME: HFSTS2 : 0x3B850126
1706 13:52:07.843131 ME: HFSTS3 : 0x00000020
1707 13:52:07.846412 ME: HFSTS4 : 0x00004800
1708 13:52:07.849338 ME: HFSTS5 : 0x00000000
1709 13:52:07.852994 ME: HFSTS6 : 0x40400006
1710 13:52:07.856344 ME: Manufacturing Mode : NO
1711 13:52:07.859318 ME: FW Partition Table : OK
1712 13:52:07.862858 ME: Bringup Loader Failure : NO
1713 13:52:07.866337 ME: Firmware Init Complete : YES
1714 13:52:07.869194 ME: Boot Options Present : NO
1715 13:52:07.872675 ME: Update In Progress : NO
1716 13:52:07.876146 ME: D0i3 Support : YES
1717 13:52:07.879064 ME: Low Power State Enabled : NO
1718 13:52:07.882758 ME: CPU Replaced : NO
1719 13:52:07.885651 ME: CPU Replacement Valid : YES
1720 13:52:07.889047 ME: Current Working State : 5
1721 13:52:07.892623 ME: Current Operation State : 1
1722 13:52:07.895685 ME: Current Operation Mode : 0
1723 13:52:07.899218 ME: Error Code : 0
1724 13:52:07.902608 ME: CPU Debug Disabled : YES
1725 13:52:07.905675 ME: TXT Support : NO
1726 13:52:07.912785 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1727 13:52:07.919222 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1728 13:52:07.919308 CBFS @ c08000 size 3f8000
1729 13:52:07.925349 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1730 13:52:07.929135 CBFS: Locating 'fallback/dsdt.aml'
1731 13:52:07.932395 CBFS: Found @ offset 10bb80 size 3fa5
1732 13:52:07.938647 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1733 13:52:07.941873 CBFS @ c08000 size 3f8000
1734 13:52:07.948496 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1735 13:52:07.948581 CBFS: Locating 'fallback/slic'
1736 13:52:07.954204 CBFS: 'fallback/slic' not found.
1737 13:52:07.960979 ACPI: Writing ACPI tables at 99b3e000.
1738 13:52:07.961101 ACPI: * FACS
1739 13:52:07.964393 ACPI: * DSDT
1740 13:52:07.967304 Ramoops buffer: 0x100000@0x99a3d000.
1741 13:52:07.970661 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1742 13:52:07.977205 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1743 13:52:07.980801 Google Chrome EC: version:
1744 13:52:07.983845 ro: helios_v2.0.2659-56403530b
1745 13:52:07.987451 rw: helios_v2.0.2849-c41de27e7d
1746 13:52:07.987532 running image: 1
1747 13:52:07.991708 ACPI: * FADT
1748 13:52:07.991786 SCI is IRQ9
1749 13:52:07.998346 ACPI: added table 1/32, length now 40
1750 13:52:07.998428 ACPI: * SSDT
1751 13:52:08.001733 Found 1 CPU(s) with 8 core(s) each.
1752 13:52:08.004723 Error: Could not locate 'wifi_sar' in VPD.
1753 13:52:08.011350 Checking CBFS for default SAR values
1754 13:52:08.014883 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1755 13:52:08.017807 CBFS @ c08000 size 3f8000
1756 13:52:08.024848 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1757 13:52:08.027730 CBFS: Locating 'wifi_sar_defaults.hex'
1758 13:52:08.031182 CBFS: Found @ offset 5fac0 size 77
1759 13:52:08.034547 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1760 13:52:08.041580 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1761 13:52:08.044300 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1762 13:52:08.051029 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1763 13:52:08.054443 failed to find key in VPD: dsm_calib_r0_0
1764 13:52:08.064363 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1765 13:52:08.067757 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1766 13:52:08.071199 failed to find key in VPD: dsm_calib_r0_1
1767 13:52:08.081089 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1768 13:52:08.087699 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1769 13:52:08.090619 failed to find key in VPD: dsm_calib_r0_2
1770 13:52:08.100583 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1771 13:52:08.104070 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1772 13:52:08.110511 failed to find key in VPD: dsm_calib_r0_3
1773 13:52:08.116933 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1774 13:52:08.123630 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1775 13:52:08.127074 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1776 13:52:08.130725 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1777 13:52:08.134358 EC returned error result code 1
1778 13:52:08.138498 EC returned error result code 1
1779 13:52:08.142045 EC returned error result code 1
1780 13:52:08.148654 PS2K: Bad resp from EC. Vivaldi disabled!
1781 13:52:08.151987 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1782 13:52:08.158776 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1783 13:52:08.165133 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1784 13:52:08.168505 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1785 13:52:08.175324 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1786 13:52:08.181843 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1787 13:52:08.188382 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1788 13:52:08.191457 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1789 13:52:08.198358 ACPI: added table 2/32, length now 44
1790 13:52:08.198440 ACPI: * MCFG
1791 13:52:08.201519 ACPI: added table 3/32, length now 48
1792 13:52:08.204924 ACPI: * TPM2
1793 13:52:08.207756 TPM2 log created at 99a2d000
1794 13:52:08.211321 ACPI: added table 4/32, length now 52
1795 13:52:08.211402 ACPI: * MADT
1796 13:52:08.214953 SCI is IRQ9
1797 13:52:08.217920 ACPI: added table 5/32, length now 56
1798 13:52:08.218001 current = 99b43ac0
1799 13:52:08.221448 ACPI: * DMAR
1800 13:52:08.224541 ACPI: added table 6/32, length now 60
1801 13:52:08.227955 ACPI: * IGD OpRegion
1802 13:52:08.228035 GMA: Found VBT in CBFS
1803 13:52:08.231640 GMA: Found valid VBT in CBFS
1804 13:52:08.238004 ACPI: added table 7/32, length now 64
1805 13:52:08.238085 ACPI: * HPET
1806 13:52:08.240793 ACPI: added table 8/32, length now 68
1807 13:52:08.244420 ACPI: done.
1808 13:52:08.244499 ACPI tables: 31744 bytes.
1809 13:52:08.247883 smbios_write_tables: 99a2c000
1810 13:52:08.251310 EC returned error result code 3
1811 13:52:08.254740 Couldn't obtain OEM name from CBI
1812 13:52:08.258023 Create SMBIOS type 17
1813 13:52:08.261379 PCI: 00:00.0 (Intel Cannonlake)
1814 13:52:08.264878 PCI: 00:14.3 (Intel WiFi)
1815 13:52:08.268139 SMBIOS tables: 939 bytes.
1816 13:52:08.271309 Writing table forward entry at 0x00000500
1817 13:52:08.278002 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1818 13:52:08.281385 Writing coreboot table at 0x99b62000
1819 13:52:08.288005 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1820 13:52:08.290928 1. 0000000000001000-000000000009ffff: RAM
1821 13:52:08.294482 2. 00000000000a0000-00000000000fffff: RESERVED
1822 13:52:08.301014 3. 0000000000100000-0000000099a2bfff: RAM
1823 13:52:08.307515 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1824 13:52:08.311007 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1825 13:52:08.317492 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1826 13:52:08.321028 7. 000000009a000000-000000009f7fffff: RESERVED
1827 13:52:08.327640 8. 00000000e0000000-00000000efffffff: RESERVED
1828 13:52:08.330567 9. 00000000fc000000-00000000fc000fff: RESERVED
1829 13:52:08.337730 10. 00000000fe000000-00000000fe00ffff: RESERVED
1830 13:52:08.341041 11. 00000000fed10000-00000000fed17fff: RESERVED
1831 13:52:08.343908 12. 00000000fed80000-00000000fed83fff: RESERVED
1832 13:52:08.350298 13. 00000000fed90000-00000000fed91fff: RESERVED
1833 13:52:08.353898 14. 00000000feda0000-00000000feda1fff: RESERVED
1834 13:52:08.360552 15. 0000000100000000-000000045e7fffff: RAM
1835 13:52:08.363914 Graphics framebuffer located at 0xc0000000
1836 13:52:08.367099 Passing 5 GPIOs to payload:
1837 13:52:08.370033 NAME | PORT | POLARITY | VALUE
1838 13:52:08.377072 write protect | undefined | high | low
1839 13:52:08.383637 lid | undefined | high | high
1840 13:52:08.386973 power | undefined | high | low
1841 13:52:08.393583 oprom | undefined | high | low
1842 13:52:08.397132 EC in RW | 0x000000cb | high | low
1843 13:52:08.400061 Board ID: 4
1844 13:52:08.403601 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1845 13:52:08.406556 CBFS @ c08000 size 3f8000
1846 13:52:08.413017 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1847 13:52:08.419998 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1848 13:52:08.422959 coreboot table: 1492 bytes.
1849 13:52:08.426701 IMD ROOT 0. 99fff000 00001000
1850 13:52:08.429662 IMD SMALL 1. 99ffe000 00001000
1851 13:52:08.433193 FSP MEMORY 2. 99c4e000 003b0000
1852 13:52:08.436318 CONSOLE 3. 99c2e000 00020000
1853 13:52:08.439790 FMAP 4. 99c2d000 0000054e
1854 13:52:08.443241 TIME STAMP 5. 99c2c000 00000910
1855 13:52:08.446064 VBOOT WORK 6. 99c18000 00014000
1856 13:52:08.449617 MRC DATA 7. 99c16000 00001958
1857 13:52:08.453091 ROMSTG STCK 8. 99c15000 00001000
1858 13:52:08.456446 AFTER CAR 9. 99c0b000 0000a000
1859 13:52:08.459309 RAMSTAGE 10. 99baf000 0005c000
1860 13:52:08.462848 REFCODE 11. 99b7a000 00035000
1861 13:52:08.466331 SMM BACKUP 12. 99b6a000 00010000
1862 13:52:08.469729 COREBOOT 13. 99b62000 00008000
1863 13:52:08.473023 ACPI 14. 99b3e000 00024000
1864 13:52:08.475958 ACPI GNVS 15. 99b3d000 00001000
1865 13:52:08.479689 RAMOOPS 16. 99a3d000 00100000
1866 13:52:08.483080 TPM2 TCGLOG17. 99a2d000 00010000
1867 13:52:08.486321 SMBIOS 18. 99a2c000 00000800
1868 13:52:08.486408 IMD small region:
1869 13:52:08.489743 IMD ROOT 0. 99ffec00 00000400
1870 13:52:08.492678 FSP RUNTIME 1. 99ffebe0 00000004
1871 13:52:08.496297 EC HOSTEVENT 2. 99ffebc0 00000008
1872 13:52:08.499299 POWER STATE 3. 99ffeb80 00000040
1873 13:52:08.502848 ROMSTAGE 4. 99ffeb60 00000004
1874 13:52:08.509279 MEM INFO 5. 99ffe9a0 000001b9
1875 13:52:08.512798 VPD 6. 99ffe920 0000006c
1876 13:52:08.515843 MTRR: Physical address space:
1877 13:52:08.519525 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1878 13:52:08.526006 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1879 13:52:08.532628 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1880 13:52:08.539159 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1881 13:52:08.545364 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1882 13:52:08.552434 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1883 13:52:08.558995 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1884 13:52:08.561934 MTRR: Fixed MSR 0x250 0x0606060606060606
1885 13:52:08.565361 MTRR: Fixed MSR 0x258 0x0606060606060606
1886 13:52:08.568976 MTRR: Fixed MSR 0x259 0x0000000000000000
1887 13:52:08.575235 MTRR: Fixed MSR 0x268 0x0606060606060606
1888 13:52:08.578633 MTRR: Fixed MSR 0x269 0x0606060606060606
1889 13:52:08.581863 MTRR: Fixed MSR 0x26a 0x0606060606060606
1890 13:52:08.585282 MTRR: Fixed MSR 0x26b 0x0606060606060606
1891 13:52:08.591993 MTRR: Fixed MSR 0x26c 0x0606060606060606
1892 13:52:08.595342 MTRR: Fixed MSR 0x26d 0x0606060606060606
1893 13:52:08.598298 MTRR: Fixed MSR 0x26e 0x0606060606060606
1894 13:52:08.601974 MTRR: Fixed MSR 0x26f 0x0606060606060606
1895 13:52:08.605635 call enable_fixed_mtrr()
1896 13:52:08.608644 CPU physical address size: 39 bits
1897 13:52:08.615495 MTRR: default type WB/UC MTRR counts: 6/8.
1898 13:52:08.618914 MTRR: WB selected as default type.
1899 13:52:08.625532 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1900 13:52:08.628474 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1901 13:52:08.635592 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1902 13:52:08.641921 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1903 13:52:08.648508 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1904 13:52:08.654975 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1905 13:52:08.658633 MTRR: Fixed MSR 0x250 0x0606060606060606
1906 13:52:08.664956 MTRR: Fixed MSR 0x258 0x0606060606060606
1907 13:52:08.668595 MTRR: Fixed MSR 0x259 0x0000000000000000
1908 13:52:08.671636 MTRR: Fixed MSR 0x268 0x0606060606060606
1909 13:52:08.675150 MTRR: Fixed MSR 0x269 0x0606060606060606
1910 13:52:08.681538 MTRR: Fixed MSR 0x26a 0x0606060606060606
1911 13:52:08.684830 MTRR: Fixed MSR 0x26b 0x0606060606060606
1912 13:52:08.688233 MTRR: Fixed MSR 0x26c 0x0606060606060606
1913 13:52:08.691539 MTRR: Fixed MSR 0x26d 0x0606060606060606
1914 13:52:08.698248 MTRR: Fixed MSR 0x26e 0x0606060606060606
1915 13:52:08.701607 MTRR: Fixed MSR 0x26f 0x0606060606060606
1916 13:52:08.701685
1917 13:52:08.701764 MTRR check
1918 13:52:08.704588 Fixed MTRRs : Enabled
1919 13:52:08.708042 Variable MTRRs: Enabled
1920 13:52:08.708118
1921 13:52:08.711125 call enable_fixed_mtrr()
1922 13:52:08.714678 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1923 13:52:08.718202 CPU physical address size: 39 bits
1924 13:52:08.724773 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1925 13:52:08.728288 MTRR: Fixed MSR 0x250 0x0606060606060606
1926 13:52:08.731363 MTRR: Fixed MSR 0x250 0x0606060606060606
1927 13:52:08.738304 MTRR: Fixed MSR 0x258 0x0606060606060606
1928 13:52:08.741300 MTRR: Fixed MSR 0x259 0x0000000000000000
1929 13:52:08.744868 MTRR: Fixed MSR 0x268 0x0606060606060606
1930 13:52:08.748410 MTRR: Fixed MSR 0x269 0x0606060606060606
1931 13:52:08.754862 MTRR: Fixed MSR 0x26a 0x0606060606060606
1932 13:52:08.757816 MTRR: Fixed MSR 0x26b 0x0606060606060606
1933 13:52:08.761453 MTRR: Fixed MSR 0x26c 0x0606060606060606
1934 13:52:08.764847 MTRR: Fixed MSR 0x26d 0x0606060606060606
1935 13:52:08.767756 MTRR: Fixed MSR 0x26e 0x0606060606060606
1936 13:52:08.774380 MTRR: Fixed MSR 0x26f 0x0606060606060606
1937 13:52:08.777928 MTRR: Fixed MSR 0x258 0x0606060606060606
1938 13:52:08.780918 call enable_fixed_mtrr()
1939 13:52:08.784624 MTRR: Fixed MSR 0x259 0x0000000000000000
1940 13:52:08.787522 MTRR: Fixed MSR 0x268 0x0606060606060606
1941 13:52:08.794142 MTRR: Fixed MSR 0x269 0x0606060606060606
1942 13:52:08.797816 MTRR: Fixed MSR 0x26a 0x0606060606060606
1943 13:52:08.801248 MTRR: Fixed MSR 0x26b 0x0606060606060606
1944 13:52:08.804648 MTRR: Fixed MSR 0x26c 0x0606060606060606
1945 13:52:08.807828 MTRR: Fixed MSR 0x26d 0x0606060606060606
1946 13:52:08.814240 MTRR: Fixed MSR 0x26e 0x0606060606060606
1947 13:52:08.817790 MTRR: Fixed MSR 0x26f 0x0606060606060606
1948 13:52:08.820707 CPU physical address size: 39 bits
1949 13:52:08.824319 call enable_fixed_mtrr()
1950 13:52:08.827360 CBFS @ c08000 size 3f8000
1951 13:52:08.830776 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1952 13:52:08.837216 CPU physical address size: 39 bits
1953 13:52:08.840916 MTRR: Fixed MSR 0x250 0x0606060606060606
1954 13:52:08.843883 MTRR: Fixed MSR 0x250 0x0606060606060606
1955 13:52:08.847326 MTRR: Fixed MSR 0x258 0x0606060606060606
1956 13:52:08.850807 MTRR: Fixed MSR 0x259 0x0000000000000000
1957 13:52:08.857128 MTRR: Fixed MSR 0x268 0x0606060606060606
1958 13:52:08.860509 MTRR: Fixed MSR 0x269 0x0606060606060606
1959 13:52:08.863522 MTRR: Fixed MSR 0x26a 0x0606060606060606
1960 13:52:08.866912 MTRR: Fixed MSR 0x26b 0x0606060606060606
1961 13:52:08.873489 MTRR: Fixed MSR 0x26c 0x0606060606060606
1962 13:52:08.877091 MTRR: Fixed MSR 0x26d 0x0606060606060606
1963 13:52:08.880265 MTRR: Fixed MSR 0x26e 0x0606060606060606
1964 13:52:08.883743 MTRR: Fixed MSR 0x26f 0x0606060606060606
1965 13:52:08.890320 MTRR: Fixed MSR 0x258 0x0606060606060606
1966 13:52:08.893366 MTRR: Fixed MSR 0x259 0x0000000000000000
1967 13:52:08.896774 MTRR: Fixed MSR 0x268 0x0606060606060606
1968 13:52:08.900226 MTRR: Fixed MSR 0x269 0x0606060606060606
1969 13:52:08.906689 MTRR: Fixed MSR 0x26a 0x0606060606060606
1970 13:52:08.910028 MTRR: Fixed MSR 0x26b 0x0606060606060606
1971 13:52:08.913100 MTRR: Fixed MSR 0x26c 0x0606060606060606
1972 13:52:08.916261 MTRR: Fixed MSR 0x26d 0x0606060606060606
1973 13:52:08.923003 MTRR: Fixed MSR 0x26e 0x0606060606060606
1974 13:52:08.926657 MTRR: Fixed MSR 0x26f 0x0606060606060606
1975 13:52:08.929662 call enable_fixed_mtrr()
1976 13:52:08.929746 call enable_fixed_mtrr()
1977 13:52:08.936840 MTRR: Fixed MSR 0x250 0x0606060606060606
1978 13:52:08.939772 MTRR: Fixed MSR 0x250 0x0606060606060606
1979 13:52:08.943393 MTRR: Fixed MSR 0x258 0x0606060606060606
1980 13:52:08.946260 MTRR: Fixed MSR 0x259 0x0000000000000000
1981 13:52:08.953144 MTRR: Fixed MSR 0x268 0x0606060606060606
1982 13:52:08.956006 MTRR: Fixed MSR 0x269 0x0606060606060606
1983 13:52:08.959524 MTRR: Fixed MSR 0x26a 0x0606060606060606
1984 13:52:08.963135 MTRR: Fixed MSR 0x26b 0x0606060606060606
1985 13:52:08.969650 MTRR: Fixed MSR 0x26c 0x0606060606060606
1986 13:52:08.973195 MTRR: Fixed MSR 0x26d 0x0606060606060606
1987 13:52:08.976064 MTRR: Fixed MSR 0x26e 0x0606060606060606
1988 13:52:08.979664 MTRR: Fixed MSR 0x26f 0x0606060606060606
1989 13:52:08.986281 MTRR: Fixed MSR 0x258 0x0606060606060606
1990 13:52:08.986370 call enable_fixed_mtrr()
1991 13:52:08.992774 MTRR: Fixed MSR 0x259 0x0000000000000000
1992 13:52:08.996224 MTRR: Fixed MSR 0x268 0x0606060606060606
1993 13:52:08.999783 MTRR: Fixed MSR 0x269 0x0606060606060606
1994 13:52:09.002613 MTRR: Fixed MSR 0x26a 0x0606060606060606
1995 13:52:09.006022 MTRR: Fixed MSR 0x26b 0x0606060606060606
1996 13:52:09.012692 MTRR: Fixed MSR 0x26c 0x0606060606060606
1997 13:52:09.015935 MTRR: Fixed MSR 0x26d 0x0606060606060606
1998 13:52:09.019351 MTRR: Fixed MSR 0x26e 0x0606060606060606
1999 13:52:09.022978 MTRR: Fixed MSR 0x26f 0x0606060606060606
2000 13:52:09.029416 CPU physical address size: 39 bits
2001 13:52:09.029547 call enable_fixed_mtrr()
2002 13:52:09.035640 CBFS: Locating 'fallback/payload'
2003 13:52:09.039135 CPU physical address size: 39 bits
2004 13:52:09.042694 CPU physical address size: 39 bits
2005 13:52:09.045732 CBFS: Found @ offset 1c96c0 size 3f798
2006 13:52:09.049168 CPU physical address size: 39 bits
2007 13:52:09.052739 Checking segment from ROM address 0xffdd16f8
2008 13:52:09.059320 Checking segment from ROM address 0xffdd1714
2009 13:52:09.062209 Loading segment from ROM address 0xffdd16f8
2010 13:52:09.065779 code (compression=0)
2011 13:52:09.072185 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2012 13:52:09.082363 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2013 13:52:09.085308 it's not compressed!
2014 13:52:09.176293 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2015 13:52:09.182782 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2016 13:52:09.185794 Loading segment from ROM address 0xffdd1714
2017 13:52:09.189262 Entry Point 0x30000000
2018 13:52:09.192765 Loaded segments
2019 13:52:09.198150 Finalizing chipset.
2020 13:52:09.201722 Finalizing SMM.
2021 13:52:09.205211 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2022 13:52:09.208034 mp_park_aps done after 0 msecs.
2023 13:52:09.215096 Jumping to boot code at 30000000(99b62000)
2024 13:52:09.221626 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2025 13:52:09.221705
2026 13:52:09.221785
2027 13:52:09.221851
2028 13:52:09.224553 Starting depthcharge on Helios...
2029 13:52:09.224621
2030 13:52:09.225027 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2031 13:52:09.225162 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2032 13:52:09.225282 Setting prompt string to ['hatch:']
2033 13:52:09.225399 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2034 13:52:09.234638 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2035 13:52:09.234748
2036 13:52:09.241562 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2037 13:52:09.241642
2038 13:52:09.247948 board_setup: Info: eMMC controller not present; skipping
2039 13:52:09.248025
2040 13:52:09.251286 New NVMe Controller 0x30053ac0 @ 00:1d:00
2041 13:52:09.251366
2042 13:52:09.257973 board_setup: Info: SDHCI controller not present; skipping
2043 13:52:09.258064
2044 13:52:09.260967 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2045 13:52:09.264388
2046 13:52:09.264493 Wipe memory regions:
2047 13:52:09.264584
2048 13:52:09.267842 [0x00000000001000, 0x000000000a0000)
2049 13:52:09.267911
2050 13:52:09.270884 [0x00000000100000, 0x00000030000000)
2051 13:52:09.337401
2052 13:52:09.340506 [0x00000030657430, 0x00000099a2c000)
2053 13:52:09.477612
2054 13:52:09.480958 [0x00000100000000, 0x0000045e800000)
2055 13:52:10.863834
2056 13:52:10.863966 R8152: Initializing
2057 13:52:10.864036
2058 13:52:10.866733 Version 9 (ocp_data = 6010)
2059 13:52:10.871189
2060 13:52:10.871271 R8152: Done initializing
2061 13:52:10.871336
2062 13:52:10.874338 Adding net device
2063 13:52:11.484396
2064 13:52:11.484529 R8152: Initializing
2065 13:52:11.484595
2066 13:52:11.487829 Version 6 (ocp_data = 5c30)
2067 13:52:11.487904
2068 13:52:11.490722 R8152: Done initializing
2069 13:52:11.490800
2070 13:52:11.497611 net_add_device: Attemp to include the same device
2071 13:52:11.497686
2072 13:52:11.504696 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2073 13:52:11.504775
2074 13:52:11.504836
2075 13:52:11.504894
2076 13:52:11.505171 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2078 13:52:11.605881 hatch: tftpboot 192.168.201.1 10062354/tftp-deploy-zlbtir9l/kernel/bzImage 10062354/tftp-deploy-zlbtir9l/kernel/cmdline 10062354/tftp-deploy-zlbtir9l/ramdisk/ramdisk.cpio.gz
2079 13:52:11.606098 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2080 13:52:11.606208 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2081 13:52:11.610386 tftpboot 192.168.201.1 10062354/tftp-deploy-zlbtir9l/kernel/bzImploy-zlbtir9l/kernel/cmdline 10062354/tftp-deploy-zlbtir9l/ramdisk/ramdisk.cpio.gz
2082 13:52:11.610533
2083 13:52:11.610631 Waiting for link
2084 13:52:11.811202
2085 13:52:11.811794 done.
2086 13:52:11.812263
2087 13:52:11.812746 MAC: 00:24:32:50:1a:5f
2088 13:52:11.813197
2089 13:52:11.814665 Sending DHCP discover... done.
2090 13:52:11.815121
2091 13:52:11.817987 Waiting for reply... done.
2092 13:52:11.818432
2093 13:52:11.821371 Sending DHCP request... done.
2094 13:52:11.821866
2095 13:52:11.828829 Waiting for reply... done.
2096 13:52:11.829252
2097 13:52:11.829628 My ip is 192.168.201.21
2098 13:52:11.829949
2099 13:52:11.832323 The DHCP server ip is 192.168.201.1
2100 13:52:11.835408
2101 13:52:11.839058 TFTP server IP predefined by user: 192.168.201.1
2102 13:52:11.839659
2103 13:52:11.845650 Bootfile predefined by user: 10062354/tftp-deploy-zlbtir9l/kernel/bzImage
2104 13:52:11.846313
2105 13:52:11.849148 Sending tftp read request... done.
2106 13:52:11.849719
2107 13:52:11.858075 Waiting for the transfer...
2108 13:52:11.858562
2109 13:52:12.425847 00000000 ################################################################
2110 13:52:12.425984
2111 13:52:12.973263 00080000 ################################################################
2112 13:52:12.973402
2113 13:52:13.498317 00100000 ################################################################
2114 13:52:13.498452
2115 13:52:14.011294 00180000 ################################################################
2116 13:52:14.011437
2117 13:52:14.538661 00200000 ################################################################
2118 13:52:14.538849
2119 13:52:15.051457 00280000 ################################################################
2120 13:52:15.051594
2121 13:52:15.572910 00300000 ################################################################
2122 13:52:15.573078
2123 13:52:16.084916 00380000 ################################################################
2124 13:52:16.085055
2125 13:52:16.589697 00400000 ################################################################
2126 13:52:16.589837
2127 13:52:17.105485 00480000 ################################################################
2128 13:52:17.105648
2129 13:52:17.616148 00500000 ################################################################
2130 13:52:17.616320
2131 13:52:18.145232 00580000 ################################################################
2132 13:52:18.145394
2133 13:52:18.663944 00600000 ################################################################
2134 13:52:18.664121
2135 13:52:19.179272 00680000 ################################################################
2136 13:52:19.179421
2137 13:52:19.700802 00700000 ################################################################
2138 13:52:19.700936
2139 13:52:20.212517 00780000 ################################################################
2140 13:52:20.212656
2141 13:52:20.728424 00800000 ################################################################
2142 13:52:20.728603
2143 13:52:21.245553 00880000 ################################################################
2144 13:52:21.245725
2145 13:52:21.770499 00900000 ################################################################
2146 13:52:21.770655
2147 13:52:22.280058 00980000 ################################################################
2148 13:52:22.280204
2149 13:52:22.637798 00a00000 ############################################## done.
2150 13:52:22.637930
2151 13:52:22.640724 The bootfile was 10854400 bytes long.
2152 13:52:22.640807
2153 13:52:22.644178 Sending tftp read request... done.
2154 13:52:22.644262
2155 13:52:22.647475 Waiting for the transfer...
2156 13:52:22.647557
2157 13:52:23.162461 00000000 ################################################################
2158 13:52:23.162641
2159 13:52:23.676639 00080000 ################################################################
2160 13:52:23.676829
2161 13:52:24.199804 00100000 ################################################################
2162 13:52:24.199991
2163 13:52:24.738352 00180000 ################################################################
2164 13:52:24.738506
2165 13:52:25.310616 00200000 ################################################################
2166 13:52:25.310776
2167 13:52:25.842115 00280000 ################################################################
2168 13:52:25.842263
2169 13:52:26.375389 00300000 ################################################################
2170 13:52:26.375566
2171 13:52:26.895968 00380000 ################################################################
2172 13:52:26.896108
2173 13:52:27.414860 00400000 ################################################################
2174 13:52:27.415012
2175 13:52:27.930677 00480000 ################################################################
2176 13:52:27.930847
2177 13:52:28.452389 00500000 ################################################################
2178 13:52:28.452574
2179 13:52:28.882882 00580000 ################################################ done.
2180 13:52:28.883064
2181 13:52:28.886042 Sending tftp read request... done.
2182 13:52:28.886130
2183 13:52:28.889673 Waiting for the transfer...
2184 13:52:28.889763
2185 13:52:28.889851 00000000 # done.
2186 13:52:28.889940
2187 13:52:28.899676 Command line loaded dynamically from TFTP file: 10062354/tftp-deploy-zlbtir9l/kernel/cmdline
2188 13:52:28.899792
2189 13:52:28.925777 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10062354/extract-nfsrootfs-ftxce6u6,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2190 13:52:28.925923
2191 13:52:28.932178 ec_init(0): CrosEC protocol v3 supported (256, 256)
2192 13:52:28.936383
2193 13:52:28.939636 Shutting down all USB controllers.
2194 13:52:28.939739
2195 13:52:28.939836 Removing current net device
2196 13:52:28.947409
2197 13:52:28.947500 Finalizing coreboot
2198 13:52:28.947569
2199 13:52:28.953809 Exiting depthcharge with code 4 at timestamp: 27063213
2200 13:52:28.953892
2201 13:52:28.953955
2202 13:52:28.954015 Starting kernel ...
2203 13:52:28.954073
2204 13:52:28.954129
2205 13:52:28.954507 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2206 13:52:28.954602 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
2207 13:52:28.954678 Setting prompt string to ['Linux version [0-9]']
2208 13:52:28.954747 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2209 13:52:28.954817 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2211 13:56:50.955592 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
2213 13:56:50.956680 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
2215 13:56:50.957589 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2218 13:56:50.958949 end: 2 depthcharge-action (duration 00:05:00) [common]
2220 13:56:50.960010 Cleaning after the job
2221 13:56:50.960098 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062354/tftp-deploy-zlbtir9l/ramdisk
2222 13:56:50.960854 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062354/tftp-deploy-zlbtir9l/kernel
2223 13:56:50.962027 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062354/tftp-deploy-zlbtir9l/nfsrootfs
2224 13:56:51.023557 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062354/tftp-deploy-zlbtir9l/modules
2225 13:56:51.024181 start: 4.1 power-off (timeout 00:00:30) [common]
2226 13:56:51.024487 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2227 13:56:51.107344 >> Command sent successfully.
2228 13:56:51.117272 Returned 0 in 0 seconds
2229 13:56:51.218692 end: 4.1 power-off (duration 00:00:00) [common]
2231 13:56:51.219238 start: 4.2 read-feedback (timeout 00:10:00) [common]
2232 13:56:51.219650 Listened to connection for namespace 'common' for up to 1s
2234 13:56:51.220209 Listened to connection for namespace 'common' for up to 1s
2235 13:56:52.221791 Finalising connection for namespace 'common'
2236 13:56:52.222433 Disconnecting from shell: Finalise
2237 13:56:52.222862
2238 13:56:52.324370 end: 4.2 read-feedback (duration 00:00:01) [common]
2239 13:56:52.324992 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10062354
2240 13:56:52.759636 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10062354
2241 13:56:52.759827 JobError: Your job cannot terminate cleanly.