Boot log: asus-cx9400-volteer
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
1 13:51:31.950226 lava-dispatcher, installed at version: 2023.01
2 13:51:31.950448 start: 0 validate
3 13:51:31.950579 Start time: 2023-04-20 13:51:31.950571+00:00 (UTC)
4 13:51:31.950709 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:51:31.950838 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230414.0%2Famd64%2Finitrd.cpio.gz exists
6 13:51:32.244738 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:51:32.244918 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.280-cip96-59-g4b02e7efb967d%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:51:32.539027 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:51:32.539228 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230414.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 13:51:32.831460 Using caching service: 'http://localhost/cache/?uri=%s'
11 13:51:32.831631 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.280-cip96-59-g4b02e7efb967d%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 13:51:33.122468 validate duration: 1.17
14 13:51:33.122862 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 13:51:33.123005 start: 1.1 download-retry (timeout 00:10:00) [common]
16 13:51:33.123097 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 13:51:33.123226 Not decompressing ramdisk as can be used compressed.
18 13:51:33.123311 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230414.0/amd64/initrd.cpio.gz
19 13:51:33.123378 saving as /var/lib/lava/dispatcher/tmp/10062367/tftp-deploy-l10y4me_/ramdisk/initrd.cpio.gz
20 13:51:33.123440 total size: 5672848 (5MB)
21 13:51:33.124577 progress 0% (0MB)
22 13:51:33.126250 progress 5% (0MB)
23 13:51:33.128019 progress 10% (0MB)
24 13:51:33.129566 progress 15% (0MB)
25 13:51:33.131238 progress 20% (1MB)
26 13:51:33.133247 progress 25% (1MB)
27 13:51:33.134861 progress 30% (1MB)
28 13:51:33.136686 progress 35% (1MB)
29 13:51:33.138354 progress 40% (2MB)
30 13:51:33.139899 progress 45% (2MB)
31 13:51:33.141611 progress 50% (2MB)
32 13:51:33.143449 progress 55% (3MB)
33 13:51:33.144925 progress 60% (3MB)
34 13:51:33.146599 progress 65% (3MB)
35 13:51:33.148209 progress 70% (3MB)
36 13:51:33.149711 progress 75% (4MB)
37 13:51:33.151481 progress 80% (4MB)
38 13:51:33.153119 progress 85% (4MB)
39 13:51:33.154541 progress 90% (4MB)
40 13:51:33.156162 progress 95% (5MB)
41 13:51:33.157771 progress 100% (5MB)
42 13:51:33.157896 5MB downloaded in 0.03s (157.03MB/s)
43 13:51:33.158054 end: 1.1.1 http-download (duration 00:00:00) [common]
45 13:51:33.158299 end: 1.1 download-retry (duration 00:00:00) [common]
46 13:51:33.158388 start: 1.2 download-retry (timeout 00:10:00) [common]
47 13:51:33.158474 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 13:51:33.158608 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.280-cip96-59-g4b02e7efb967d/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 13:51:33.158680 saving as /var/lib/lava/dispatcher/tmp/10062367/tftp-deploy-l10y4me_/kernel/bzImage
50 13:51:33.158742 total size: 10854400 (10MB)
51 13:51:33.158804 No compression specified
52 13:51:33.160113 progress 0% (0MB)
53 13:51:33.163031 progress 5% (0MB)
54 13:51:33.166028 progress 10% (1MB)
55 13:51:33.168859 progress 15% (1MB)
56 13:51:33.171829 progress 20% (2MB)
57 13:51:33.174769 progress 25% (2MB)
58 13:51:33.177779 progress 30% (3MB)
59 13:51:33.180668 progress 35% (3MB)
60 13:51:33.183674 progress 40% (4MB)
61 13:51:33.186708 progress 45% (4MB)
62 13:51:33.189678 progress 50% (5MB)
63 13:51:33.192679 progress 55% (5MB)
64 13:51:33.195494 progress 60% (6MB)
65 13:51:33.198481 progress 65% (6MB)
66 13:51:33.201253 progress 70% (7MB)
67 13:51:33.204171 progress 75% (7MB)
68 13:51:33.206957 progress 80% (8MB)
69 13:51:33.209823 progress 85% (8MB)
70 13:51:33.212778 progress 90% (9MB)
71 13:51:33.215508 progress 95% (9MB)
72 13:51:33.218453 progress 100% (10MB)
73 13:51:33.218608 10MB downloaded in 0.06s (172.93MB/s)
74 13:51:33.218759 end: 1.2.1 http-download (duration 00:00:00) [common]
76 13:51:33.218998 end: 1.2 download-retry (duration 00:00:00) [common]
77 13:51:33.219087 start: 1.3 download-retry (timeout 00:10:00) [common]
78 13:51:33.219176 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 13:51:33.219315 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230414.0/amd64/full.rootfs.tar.xz
80 13:51:33.219387 saving as /var/lib/lava/dispatcher/tmp/10062367/tftp-deploy-l10y4me_/nfsrootfs/full.rootfs.tar
81 13:51:33.219451 total size: 125569244 (119MB)
82 13:51:33.219513 Using unxz to decompress xz
83 13:51:33.222733 progress 0% (0MB)
84 13:51:33.706856 progress 5% (6MB)
85 13:51:34.204762 progress 10% (12MB)
86 13:51:34.700108 progress 15% (17MB)
87 13:51:35.205101 progress 20% (23MB)
88 13:51:35.549781 progress 25% (29MB)
89 13:51:35.891466 progress 30% (35MB)
90 13:51:36.146401 progress 35% (41MB)
91 13:51:36.348328 progress 40% (47MB)
92 13:51:36.710999 progress 45% (53MB)
93 13:51:37.084960 progress 50% (59MB)
94 13:51:37.440903 progress 55% (65MB)
95 13:51:37.805579 progress 60% (71MB)
96 13:51:38.149119 progress 65% (77MB)
97 13:51:38.557402 progress 70% (83MB)
98 13:51:38.990991 progress 75% (89MB)
99 13:51:39.424665 progress 80% (95MB)
100 13:51:39.524020 progress 85% (101MB)
101 13:51:39.694565 progress 90% (107MB)
102 13:51:40.038212 progress 95% (113MB)
103 13:51:40.415127 progress 100% (119MB)
104 13:51:40.419885 119MB downloaded in 7.20s (16.63MB/s)
105 13:51:40.420195 end: 1.3.1 http-download (duration 00:00:07) [common]
107 13:51:40.420476 end: 1.3 download-retry (duration 00:00:07) [common]
108 13:51:40.420570 start: 1.4 download-retry (timeout 00:09:53) [common]
109 13:51:40.420663 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 13:51:40.420819 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.280-cip96-59-g4b02e7efb967d/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 13:51:40.420896 saving as /var/lib/lava/dispatcher/tmp/10062367/tftp-deploy-l10y4me_/modules/modules.tar
112 13:51:40.420960 total size: 483736 (0MB)
113 13:51:40.421026 Using unxz to decompress xz
114 13:51:40.424617 progress 6% (0MB)
115 13:51:40.425063 progress 13% (0MB)
116 13:51:40.425310 progress 20% (0MB)
117 13:51:40.426726 progress 27% (0MB)
118 13:51:40.428866 progress 33% (0MB)
119 13:51:40.431095 progress 40% (0MB)
120 13:51:40.433022 progress 47% (0MB)
121 13:51:40.435291 progress 54% (0MB)
122 13:51:40.437264 progress 60% (0MB)
123 13:51:40.439354 progress 67% (0MB)
124 13:51:40.441396 progress 74% (0MB)
125 13:51:40.443358 progress 81% (0MB)
126 13:51:40.445357 progress 88% (0MB)
127 13:51:40.447668 progress 94% (0MB)
128 13:51:40.449853 progress 100% (0MB)
129 13:51:40.456605 0MB downloaded in 0.04s (12.95MB/s)
130 13:51:40.456884 end: 1.4.1 http-download (duration 00:00:00) [common]
132 13:51:40.457162 end: 1.4 download-retry (duration 00:00:00) [common]
133 13:51:40.457290 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
134 13:51:40.457418 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
135 13:51:42.930931 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10062367/extract-nfsrootfs-2jp4sbi1
136 13:51:42.931133 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
137 13:51:42.931246 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
138 13:51:42.931421 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10062367/lava-overlay-zbfben0q
139 13:51:42.931551 makedir: /var/lib/lava/dispatcher/tmp/10062367/lava-overlay-zbfben0q/lava-10062367/bin
140 13:51:42.931658 makedir: /var/lib/lava/dispatcher/tmp/10062367/lava-overlay-zbfben0q/lava-10062367/tests
141 13:51:42.931789 makedir: /var/lib/lava/dispatcher/tmp/10062367/lava-overlay-zbfben0q/lava-10062367/results
142 13:51:42.931922 Creating /var/lib/lava/dispatcher/tmp/10062367/lava-overlay-zbfben0q/lava-10062367/bin/lava-add-keys
143 13:51:42.932097 Creating /var/lib/lava/dispatcher/tmp/10062367/lava-overlay-zbfben0q/lava-10062367/bin/lava-add-sources
144 13:51:42.932263 Creating /var/lib/lava/dispatcher/tmp/10062367/lava-overlay-zbfben0q/lava-10062367/bin/lava-background-process-start
145 13:51:42.932430 Creating /var/lib/lava/dispatcher/tmp/10062367/lava-overlay-zbfben0q/lava-10062367/bin/lava-background-process-stop
146 13:51:42.932587 Creating /var/lib/lava/dispatcher/tmp/10062367/lava-overlay-zbfben0q/lava-10062367/bin/lava-common-functions
147 13:51:42.932744 Creating /var/lib/lava/dispatcher/tmp/10062367/lava-overlay-zbfben0q/lava-10062367/bin/lava-echo-ipv4
148 13:51:42.932900 Creating /var/lib/lava/dispatcher/tmp/10062367/lava-overlay-zbfben0q/lava-10062367/bin/lava-install-packages
149 13:51:42.933055 Creating /var/lib/lava/dispatcher/tmp/10062367/lava-overlay-zbfben0q/lava-10062367/bin/lava-installed-packages
150 13:51:42.933214 Creating /var/lib/lava/dispatcher/tmp/10062367/lava-overlay-zbfben0q/lava-10062367/bin/lava-os-build
151 13:51:42.933372 Creating /var/lib/lava/dispatcher/tmp/10062367/lava-overlay-zbfben0q/lava-10062367/bin/lava-probe-channel
152 13:51:42.933787 Creating /var/lib/lava/dispatcher/tmp/10062367/lava-overlay-zbfben0q/lava-10062367/bin/lava-probe-ip
153 13:51:42.933916 Creating /var/lib/lava/dispatcher/tmp/10062367/lava-overlay-zbfben0q/lava-10062367/bin/lava-target-ip
154 13:51:42.934039 Creating /var/lib/lava/dispatcher/tmp/10062367/lava-overlay-zbfben0q/lava-10062367/bin/lava-target-mac
155 13:51:42.934164 Creating /var/lib/lava/dispatcher/tmp/10062367/lava-overlay-zbfben0q/lava-10062367/bin/lava-target-storage
156 13:51:42.934288 Creating /var/lib/lava/dispatcher/tmp/10062367/lava-overlay-zbfben0q/lava-10062367/bin/lava-test-case
157 13:51:42.934410 Creating /var/lib/lava/dispatcher/tmp/10062367/lava-overlay-zbfben0q/lava-10062367/bin/lava-test-event
158 13:51:42.934530 Creating /var/lib/lava/dispatcher/tmp/10062367/lava-overlay-zbfben0q/lava-10062367/bin/lava-test-feedback
159 13:51:42.934654 Creating /var/lib/lava/dispatcher/tmp/10062367/lava-overlay-zbfben0q/lava-10062367/bin/lava-test-raise
160 13:51:42.934776 Creating /var/lib/lava/dispatcher/tmp/10062367/lava-overlay-zbfben0q/lava-10062367/bin/lava-test-reference
161 13:51:42.934901 Creating /var/lib/lava/dispatcher/tmp/10062367/lava-overlay-zbfben0q/lava-10062367/bin/lava-test-runner
162 13:51:42.935022 Creating /var/lib/lava/dispatcher/tmp/10062367/lava-overlay-zbfben0q/lava-10062367/bin/lava-test-set
163 13:51:42.935145 Creating /var/lib/lava/dispatcher/tmp/10062367/lava-overlay-zbfben0q/lava-10062367/bin/lava-test-shell
164 13:51:42.935271 Updating /var/lib/lava/dispatcher/tmp/10062367/lava-overlay-zbfben0q/lava-10062367/bin/lava-install-packages (oe)
165 13:51:42.940317 Updating /var/lib/lava/dispatcher/tmp/10062367/lava-overlay-zbfben0q/lava-10062367/bin/lava-installed-packages (oe)
166 13:51:42.940511 Creating /var/lib/lava/dispatcher/tmp/10062367/lava-overlay-zbfben0q/lava-10062367/environment
167 13:51:42.940663 LAVA metadata
168 13:51:42.940768 - LAVA_JOB_ID=10062367
169 13:51:42.940866 - LAVA_DISPATCHER_IP=192.168.201.1
170 13:51:42.941016 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
171 13:51:42.941127 skipped lava-vland-overlay
172 13:51:42.941241 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 13:51:42.941367 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
174 13:51:42.941460 skipped lava-multinode-overlay
175 13:51:42.941580 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 13:51:42.941700 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
177 13:51:42.941821 Loading test definitions
178 13:51:42.941951 start: 1.5.2.3.1 git-repo-action (timeout 00:09:50) [common]
179 13:51:42.942057 Using /lava-10062367 at stage 0
180 13:51:42.942212 Fetching tests from https://github.com/kernelci/test-definitions
181 13:51:42.942321 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/10062367/lava-overlay-zbfben0q/lava-10062367/0/tests/0_ltp-ipc'
182 13:51:51.669696 Running '/usr/bin/git checkout kernelci.org
183 13:51:51.817779 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/10062367/lava-overlay-zbfben0q/lava-10062367/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
184 13:51:51.818859 uuid=10062367_1.5.2.3.1 testdef=None
185 13:51:51.819057 end: 1.5.2.3.1 git-repo-action (duration 00:00:09) [common]
187 13:51:51.819466 start: 1.5.2.3.2 test-overlay (timeout 00:09:41) [common]
188 13:51:51.820863 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
190 13:51:51.821274 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:41) [common]
191 13:51:51.823177 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
193 13:51:51.823596 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:41) [common]
194 13:51:51.825433 runner path: /var/lib/lava/dispatcher/tmp/10062367/lava-overlay-zbfben0q/lava-10062367/0/tests/0_ltp-ipc test_uuid 10062367_1.5.2.3.1
195 13:51:51.825571 SKIPFILE='skipfile-lkft.yaml'
196 13:51:51.825676 SKIP_INSTALL='true'
197 13:51:51.825779 TST_CMDFILES='ipc'
198 13:51:51.825985 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
200 13:51:51.826364 Creating lava-test-runner.conf files
201 13:51:51.826472 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10062367/lava-overlay-zbfben0q/lava-10062367/0 for stage 0
202 13:51:51.826616 - 0_ltp-ipc
203 13:51:51.826768 end: 1.5.2.3 test-definition (duration 00:00:09) [common]
204 13:51:51.826904 start: 1.5.2.4 compress-overlay (timeout 00:09:41) [common]
205 13:51:59.737901 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
206 13:51:59.738083 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:33) [common]
207 13:51:59.738219 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
208 13:51:59.738366 end: 1.5.2 lava-overlay (duration 00:00:17) [common]
209 13:51:59.738502 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:33) [common]
210 13:51:59.876001 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
211 13:51:59.876438 start: 1.5.4 extract-modules (timeout 00:09:33) [common]
212 13:51:59.876601 extracting modules file /var/lib/lava/dispatcher/tmp/10062367/tftp-deploy-l10y4me_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10062367/extract-nfsrootfs-2jp4sbi1
213 13:51:59.894399 extracting modules file /var/lib/lava/dispatcher/tmp/10062367/tftp-deploy-l10y4me_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10062367/extract-overlay-ramdisk-r7tmv8jj/ramdisk
214 13:51:59.912595 end: 1.5.4 extract-modules (duration 00:00:00) [common]
215 13:51:59.912771 start: 1.5.5 apply-overlay-tftp (timeout 00:09:33) [common]
216 13:51:59.912907 [common] Applying overlay to NFS
217 13:51:59.913018 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10062367/compress-overlay-nubara10/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10062367/extract-nfsrootfs-2jp4sbi1
218 13:52:00.870957 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
219 13:52:00.871121 start: 1.5.6 configure-preseed-file (timeout 00:09:32) [common]
220 13:52:00.871220 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
221 13:52:00.871315 start: 1.5.7 compress-ramdisk (timeout 00:09:32) [common]
222 13:52:00.871401 Building ramdisk /var/lib/lava/dispatcher/tmp/10062367/extract-overlay-ramdisk-r7tmv8jj/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10062367/extract-overlay-ramdisk-r7tmv8jj/ramdisk
223 13:52:00.947781 >> 31365 blocks
224 13:52:01.572876 rename /var/lib/lava/dispatcher/tmp/10062367/extract-overlay-ramdisk-r7tmv8jj/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10062367/tftp-deploy-l10y4me_/ramdisk/ramdisk.cpio.gz
225 13:52:01.573331 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
226 13:52:01.573464 start: 1.5.8 prepare-kernel (timeout 00:09:32) [common]
227 13:52:01.573584 start: 1.5.8.1 prepare-fit (timeout 00:09:32) [common]
228 13:52:01.573695 No mkimage arch provided, not using FIT.
229 13:52:01.573800 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
230 13:52:01.573894 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
231 13:52:01.574009 end: 1.5 prepare-tftp-overlay (duration 00:00:21) [common]
232 13:52:01.574110 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:32) [common]
233 13:52:01.574207 No LXC device requested
234 13:52:01.574301 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
235 13:52:01.574399 start: 1.7 deploy-device-env (timeout 00:09:32) [common]
236 13:52:01.574501 end: 1.7 deploy-device-env (duration 00:00:00) [common]
237 13:52:01.574597 Checking files for TFTP limit of 4294967296 bytes.
238 13:52:01.575039 end: 1 tftp-deploy (duration 00:00:28) [common]
239 13:52:01.575170 start: 2 depthcharge-action (timeout 00:05:00) [common]
240 13:52:01.575271 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
241 13:52:01.575404 substitutions:
242 13:52:01.575483 - {DTB}: None
243 13:52:01.575559 - {INITRD}: 10062367/tftp-deploy-l10y4me_/ramdisk/ramdisk.cpio.gz
244 13:52:01.575624 - {KERNEL}: 10062367/tftp-deploy-l10y4me_/kernel/bzImage
245 13:52:01.575688 - {LAVA_MAC}: None
246 13:52:01.575751 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10062367/extract-nfsrootfs-2jp4sbi1
247 13:52:01.575821 - {NFS_SERVER_IP}: 192.168.201.1
248 13:52:01.575880 - {PRESEED_CONFIG}: None
249 13:52:01.575943 - {PRESEED_LOCAL}: None
250 13:52:01.576005 - {RAMDISK}: 10062367/tftp-deploy-l10y4me_/ramdisk/ramdisk.cpio.gz
251 13:52:01.576082 - {ROOT_PART}: None
252 13:52:01.576142 - {ROOT}: None
253 13:52:01.576201 - {SERVER_IP}: 192.168.201.1
254 13:52:01.576261 - {TEE}: None
255 13:52:01.576328 Parsed boot commands:
256 13:52:01.576385 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
257 13:52:01.576574 Parsed boot commands: tftpboot 192.168.201.1 10062367/tftp-deploy-l10y4me_/kernel/bzImage 10062367/tftp-deploy-l10y4me_/kernel/cmdline 10062367/tftp-deploy-l10y4me_/ramdisk/ramdisk.cpio.gz
258 13:52:01.576686 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
259 13:52:01.576785 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
260 13:52:01.576883 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
261 13:52:01.576982 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
262 13:52:01.577057 Not connected, no need to disconnect.
263 13:52:01.577146 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
264 13:52:01.577231 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
265 13:52:01.577319 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-7'
266 13:52:01.580530 Setting prompt string to ['lava-test: # ']
267 13:52:01.580885 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
268 13:52:01.581005 end: 2.2.1 reset-connection (duration 00:00:00) [common]
269 13:52:01.581113 start: 2.2.2 reset-device (timeout 00:05:00) [common]
270 13:52:01.581212 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
271 13:52:01.581412 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-7' '--port=1' '--command=reboot'
272 13:52:06.731093 >> Command sent successfully.
273 13:52:06.742412 Returned 0 in 5 seconds
274 13:52:06.844043 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
276 13:52:06.845518 end: 2.2.2 reset-device (duration 00:00:05) [common]
277 13:52:06.846158 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
278 13:52:06.846613 Setting prompt string to 'Starting depthcharge on Voema...'
279 13:52:06.846964 Changing prompt to 'Starting depthcharge on Voema...'
280 13:52:06.847322 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
281 13:52:06.848897 [Enter `^Ec?' for help]
282 13:52:08.436232
283 13:52:08.436416
284 13:52:08.445931 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
285 13:52:08.449453 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
286 13:52:08.456337 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
287 13:52:08.459203 CPU: AES supported, TXT NOT supported, VT supported
288 13:52:08.466258 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
289 13:52:08.472837 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
290 13:52:08.475857 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
291 13:52:08.479586 VBOOT: Loading verstage.
292 13:52:08.482814 FMAP: Found "FLASH" version 1.1 at 0x1804000.
293 13:52:08.489442 FMAP: base = 0x0 size = 0x2000000 #areas = 32
294 13:52:08.492496 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
295 13:52:08.503359 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
296 13:52:08.509780 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
297 13:52:08.509860
298 13:52:08.509924
299 13:52:08.522962 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
300 13:52:08.536643 Probing TPM: . done!
301 13:52:08.540091 TPM ready after 0 ms
302 13:52:08.543671 Connected to device vid:did:rid of 1ae0:0028:00
303 13:52:08.554779 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
304 13:52:08.561109 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
305 13:52:08.564700 Initialized TPM device CR50 revision 0
306 13:52:08.616551 tlcl_send_startup: Startup return code is 0
307 13:52:08.616706 TPM: setup succeeded
308 13:52:08.631932 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
309 13:52:08.646065 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
310 13:52:08.659056 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
311 13:52:08.668465 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
312 13:52:08.672137 Chrome EC: UHEPI supported
313 13:52:08.675633 Phase 1
314 13:52:08.678609 FMAP: area GBB found @ 1805000 (458752 bytes)
315 13:52:08.688641 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
316 13:52:08.695416 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
317 13:52:08.702064 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
318 13:52:08.708478 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
319 13:52:08.712171 Recovery requested (1009000e)
320 13:52:08.715169 TPM: Extending digest for VBOOT: boot mode into PCR 0
321 13:52:08.727005 tlcl_extend: response is 0
322 13:52:08.734049 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
323 13:52:08.743520 tlcl_extend: response is 0
324 13:52:08.750044 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
325 13:52:08.757087 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
326 13:52:08.763561 BS: verstage times (exec / console): total (unknown) / 142 ms
327 13:52:08.763650
328 13:52:08.763736
329 13:52:08.776601 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
330 13:52:08.783268 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
331 13:52:08.786912 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
332 13:52:08.789717 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
333 13:52:08.796749 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
334 13:52:08.799980 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
335 13:52:08.803293 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
336 13:52:08.806658 TCO_STS: 0000 0000
337 13:52:08.809952 GEN_PMCON: d0015038 00002200
338 13:52:08.812942 GBLRST_CAUSE: 00000000 00000000
339 13:52:08.813021 HPR_CAUSE0: 00000000
340 13:52:08.816428 prev_sleep_state 5
341 13:52:08.819954 Boot Count incremented to 18688
342 13:52:08.826578 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
343 13:52:08.832886 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
344 13:52:08.839606 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
345 13:52:08.846611 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
346 13:52:08.851233 Chrome EC: UHEPI supported
347 13:52:08.857420 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
348 13:52:08.870351 Probing TPM: done!
349 13:52:08.876994 Connected to device vid:did:rid of 1ae0:0028:00
350 13:52:08.887837 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
351 13:52:08.897161 Initialized TPM device CR50 revision 0
352 13:52:08.909830 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
353 13:52:08.913050 MRC: Hash idx 0x100b comparison successful.
354 13:52:08.916831 MRC cache found, size faa8
355 13:52:08.916936 bootmode is set to: 2
356 13:52:08.920046 SPD index = 0
357 13:52:08.926438 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
358 13:52:08.930052 SPD: module type is LPDDR4X
359 13:52:08.933536 SPD: module part number is MT53E512M64D4NW-046
360 13:52:08.939697 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
361 13:52:08.943145 SPD: device width 16 bits, bus width 16 bits
362 13:52:08.949524 SPD: module size is 1024 MB (per channel)
363 13:52:09.381914 CBMEM:
364 13:52:09.385226 IMD: root @ 0x76fff000 254 entries.
365 13:52:09.388850 IMD: root @ 0x76ffec00 62 entries.
366 13:52:09.391700 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
367 13:52:09.398317 FMAP: area RW_VPD found @ f35000 (8192 bytes)
368 13:52:09.401854 External stage cache:
369 13:52:09.405325 IMD: root @ 0x7b3ff000 254 entries.
370 13:52:09.408838 IMD: root @ 0x7b3fec00 62 entries.
371 13:52:09.424013 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
372 13:52:09.430216 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
373 13:52:09.436724 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
374 13:52:09.451089 MRC: 'RECOVERY_MRC_CACHE' does not need update.
375 13:52:09.457343 cse_lite: Skip switching to RW in the recovery path
376 13:52:09.457428 8 DIMMs found
377 13:52:09.457545 SMM Memory Map
378 13:52:09.460814 SMRAM : 0x7b000000 0x800000
379 13:52:09.467344 Subregion 0: 0x7b000000 0x200000
380 13:52:09.471101 Subregion 1: 0x7b200000 0x200000
381 13:52:09.471184 Subregion 2: 0x7b400000 0x400000
382 13:52:09.475190 top_of_ram = 0x77000000
383 13:52:09.482004 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
384 13:52:09.485609 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
385 13:52:09.492049 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
386 13:52:09.495634 MTRR Range: Start=ff000000 End=0 (Size 1000000)
387 13:52:09.502122 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
388 13:52:09.508636 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
389 13:52:09.520559 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
390 13:52:09.526916 Processing 211 relocs. Offset value of 0x74c0b000
391 13:52:09.533777 BS: romstage times (exec / console): total (unknown) / 277 ms
392 13:52:09.539886
393 13:52:09.539970
394 13:52:09.549844 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
395 13:52:09.552948 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
396 13:52:09.562822 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
397 13:52:09.569444 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
398 13:52:09.576233 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
399 13:52:09.582777 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
400 13:52:09.629802 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
401 13:52:09.636173 Processing 5008 relocs. Offset value of 0x75d98000
402 13:52:09.639637 BS: postcar times (exec / console): total (unknown) / 59 ms
403 13:52:09.643304
404 13:52:09.643380
405 13:52:09.652732 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
406 13:52:09.652816 Normal boot
407 13:52:09.656172 FW_CONFIG value is 0x804c02
408 13:52:09.659898 PCI: 00:07.0 disabled by fw_config
409 13:52:09.662856 PCI: 00:07.1 disabled by fw_config
410 13:52:09.666899 PCI: 00:0d.2 disabled by fw_config
411 13:52:09.670111 PCI: 00:1c.7 disabled by fw_config
412 13:52:09.676999 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
413 13:52:09.683395 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 13:52:09.686578 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
415 13:52:09.690280 GENERIC: 0.0 disabled by fw_config
416 13:52:09.693216 GENERIC: 1.0 disabled by fw_config
417 13:52:09.699909 fw_config match found: DB_USB=USB3_ACTIVE
418 13:52:09.703559 fw_config match found: DB_USB=USB3_ACTIVE
419 13:52:09.706487 fw_config match found: DB_USB=USB3_ACTIVE
420 13:52:09.710014 fw_config match found: DB_USB=USB3_ACTIVE
421 13:52:09.716548 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
422 13:52:09.723120 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
423 13:52:09.730113 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
424 13:52:09.740214 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
425 13:52:09.743704 microcode: sig=0x806c1 pf=0x80 revision=0x86
426 13:52:09.750233 microcode: Update skipped, already up-to-date
427 13:52:09.756476 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
428 13:52:09.783721 Detected 4 core, 8 thread CPU.
429 13:52:09.786737 Setting up SMI for CPU
430 13:52:09.790047 IED base = 0x7b400000
431 13:52:09.790134 IED size = 0x00400000
432 13:52:09.793386 Will perform SMM setup.
433 13:52:09.800371 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
434 13:52:09.806974 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
435 13:52:09.813633 Processing 16 relocs. Offset value of 0x00030000
436 13:52:09.816987 Attempting to start 7 APs
437 13:52:09.819993 Waiting for 10ms after sending INIT.
438 13:52:09.835331 Waiting for 1st SIPI to complete...done.
439 13:52:09.835440 AP: slot 1 apic_id 1.
440 13:52:09.838966 AP: slot 2 apic_id 3.
441 13:52:09.842022 AP: slot 5 apic_id 2.
442 13:52:09.845321 Waiting for 2nd SIPI to complete...done.
443 13:52:09.848992 AP: slot 6 apic_id 6.
444 13:52:09.849096 AP: slot 3 apic_id 7.
445 13:52:09.852008 AP: slot 4 apic_id 5.
446 13:52:09.855468 AP: slot 7 apic_id 4.
447 13:52:09.862026 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
448 13:52:09.868898 Processing 13 relocs. Offset value of 0x00038000
449 13:52:09.869011 Unable to locate Global NVS
450 13:52:09.878920 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
451 13:52:09.881918 Installing permanent SMM handler to 0x7b000000
452 13:52:09.892098 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
453 13:52:09.895312 Processing 794 relocs. Offset value of 0x7b010000
454 13:52:09.905102 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
455 13:52:09.908229 Processing 13 relocs. Offset value of 0x7b008000
456 13:52:09.915308 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
457 13:52:09.921909 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
458 13:52:09.924849 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
459 13:52:09.931807 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
460 13:52:09.938413 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
461 13:52:09.944957 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
462 13:52:09.951686 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
463 13:52:09.951792 Unable to locate Global NVS
464 13:52:09.961727 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
465 13:52:09.965168 Clearing SMI status registers
466 13:52:09.965244 SMI_STS: PM1
467 13:52:09.967996 PM1_STS: PWRBTN
468 13:52:09.974737 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
469 13:52:09.978271 In relocation handler: CPU 0
470 13:52:09.981788 New SMBASE=0x7b000000 IEDBASE=0x7b400000
471 13:52:09.988177 Writing SMRR. base = 0x7b000006, mask=0xff800c00
472 13:52:09.988257 Relocation complete.
473 13:52:09.998123 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
474 13:52:09.998231 In relocation handler: CPU 1
475 13:52:10.004531 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
476 13:52:10.004648 Relocation complete.
477 13:52:10.014942 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
478 13:52:10.015026 In relocation handler: CPU 7
479 13:52:10.021385 New SMBASE=0x7affe400 IEDBASE=0x7b400000
480 13:52:10.025038 Writing SMRR. base = 0x7b000006, mask=0xff800c00
481 13:52:10.028017 Relocation complete.
482 13:52:10.035020 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
483 13:52:10.038017 In relocation handler: CPU 4
484 13:52:10.041560 New SMBASE=0x7afff000 IEDBASE=0x7b400000
485 13:52:10.045067 Relocation complete.
486 13:52:10.051635 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
487 13:52:10.055125 In relocation handler: CPU 6
488 13:52:10.058053 New SMBASE=0x7affe800 IEDBASE=0x7b400000
489 13:52:10.061561 Writing SMRR. base = 0x7b000006, mask=0xff800c00
490 13:52:10.065084 Relocation complete.
491 13:52:10.071569 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
492 13:52:10.074908 In relocation handler: CPU 3
493 13:52:10.078315 New SMBASE=0x7afff400 IEDBASE=0x7b400000
494 13:52:10.081305 Relocation complete.
495 13:52:10.088473 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
496 13:52:10.091467 In relocation handler: CPU 5
497 13:52:10.095021 New SMBASE=0x7affec00 IEDBASE=0x7b400000
498 13:52:10.101439 Writing SMRR. base = 0x7b000006, mask=0xff800c00
499 13:52:10.101592 Relocation complete.
500 13:52:10.111557 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
501 13:52:10.114807 In relocation handler: CPU 2
502 13:52:10.118119 New SMBASE=0x7afff800 IEDBASE=0x7b400000
503 13:52:10.118224 Relocation complete.
504 13:52:10.121319 Initializing CPU #0
505 13:52:10.124534 CPU: vendor Intel device 806c1
506 13:52:10.128187 CPU: family 06, model 8c, stepping 01
507 13:52:10.131107 Clearing out pending MCEs
508 13:52:10.134675 Setting up local APIC...
509 13:52:10.134784 apic_id: 0x00 done.
510 13:52:10.137720 Turbo is available but hidden
511 13:52:10.141831 Turbo is available and visible
512 13:52:10.145373 microcode: Update skipped, already up-to-date
513 13:52:10.149646 CPU #0 initialized
514 13:52:10.152552 Initializing CPU #4
515 13:52:10.152651 Initializing CPU #7
516 13:52:10.156104 CPU: vendor Intel device 806c1
517 13:52:10.159483 CPU: family 06, model 8c, stepping 01
518 13:52:10.162848 CPU: vendor Intel device 806c1
519 13:52:10.165804 CPU: family 06, model 8c, stepping 01
520 13:52:10.168845 Clearing out pending MCEs
521 13:52:10.172338 Clearing out pending MCEs
522 13:52:10.175870 Setting up local APIC...
523 13:52:10.175958 Initializing CPU #5
524 13:52:10.179227 Initializing CPU #2
525 13:52:10.182229 CPU: vendor Intel device 806c1
526 13:52:10.185799 CPU: family 06, model 8c, stepping 01
527 13:52:10.188701 CPU: vendor Intel device 806c1
528 13:52:10.192183 CPU: family 06, model 8c, stepping 01
529 13:52:10.195828 Clearing out pending MCEs
530 13:52:10.198899 Clearing out pending MCEs
531 13:52:10.202406 Setting up local APIC...
532 13:52:10.202498 Initializing CPU #6
533 13:52:10.205297 Initializing CPU #3
534 13:52:10.209055 CPU: vendor Intel device 806c1
535 13:52:10.211857 CPU: family 06, model 8c, stepping 01
536 13:52:10.215115 CPU: vendor Intel device 806c1
537 13:52:10.218487 CPU: family 06, model 8c, stepping 01
538 13:52:10.222277 Clearing out pending MCEs
539 13:52:10.225626 Clearing out pending MCEs
540 13:52:10.225710 Setting up local APIC...
541 13:52:10.228892 apic_id: 0x05 done.
542 13:52:10.232231 Setting up local APIC...
543 13:52:10.232350 Setting up local APIC...
544 13:52:10.235236 Initializing CPU #1
545 13:52:10.238777 apic_id: 0x04 done.
546 13:52:10.241784 microcode: Update skipped, already up-to-date
547 13:52:10.248403 microcode: Update skipped, already up-to-date
548 13:52:10.248491 CPU #4 initialized
549 13:52:10.251856 CPU #7 initialized
550 13:52:10.255312 CPU: vendor Intel device 806c1
551 13:52:10.258793 CPU: family 06, model 8c, stepping 01
552 13:52:10.258882 apic_id: 0x02 done.
553 13:52:10.262237 apic_id: 0x03 done.
554 13:52:10.265596 microcode: Update skipped, already up-to-date
555 13:52:10.271979 microcode: Update skipped, already up-to-date
556 13:52:10.272089 CPU #5 initialized
557 13:52:10.275384 CPU #2 initialized
558 13:52:10.278376 Clearing out pending MCEs
559 13:52:10.278465 apic_id: 0x06 done.
560 13:52:10.281805 Setting up local APIC...
561 13:52:10.285210 Setting up local APIC...
562 13:52:10.288740 apic_id: 0x07 done.
563 13:52:10.291680 microcode: Update skipped, already up-to-date
564 13:52:10.295160 microcode: Update skipped, already up-to-date
565 13:52:10.298254 CPU #6 initialized
566 13:52:10.301930 CPU #3 initialized
567 13:52:10.302015 apic_id: 0x01 done.
568 13:52:10.308320 microcode: Update skipped, already up-to-date
569 13:52:10.308423 CPU #1 initialized
570 13:52:10.314931 bsp_do_flight_plan done after 464 msecs.
571 13:52:10.315039 CPU: frequency set to 4000 MHz
572 13:52:10.318529 Enabling SMIs.
573 13:52:10.324774 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
574 13:52:10.340291 SATAXPCIE1 indicates PCIe NVMe is present
575 13:52:10.343888 Probing TPM: done!
576 13:52:10.347492 Connected to device vid:did:rid of 1ae0:0028:00
577 13:52:10.358126 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
578 13:52:10.361088 Initialized TPM device CR50 revision 0
579 13:52:10.364450 Enabling S0i3.4
580 13:52:10.371212 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
581 13:52:10.374215 Found a VBT of 8704 bytes after decompression
582 13:52:10.380756 cse_lite: CSE RO boot. HybridStorageMode disabled
583 13:52:10.387762 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
584 13:52:10.463685 FSPS returned 0
585 13:52:10.466639 Executing Phase 1 of FspMultiPhaseSiInit
586 13:52:10.476816 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
587 13:52:10.480338 port C0 DISC req: usage 1 usb3 1 usb2 5
588 13:52:10.483306 Raw Buffer output 0 00000511
589 13:52:10.486968 Raw Buffer output 1 00000000
590 13:52:10.490417 pmc_send_ipc_cmd succeeded
591 13:52:10.497191 port C1 DISC req: usage 1 usb3 2 usb2 3
592 13:52:10.497316 Raw Buffer output 0 00000321
593 13:52:10.500790 Raw Buffer output 1 00000000
594 13:52:10.504383 pmc_send_ipc_cmd succeeded
595 13:52:10.510089 Detected 4 core, 8 thread CPU.
596 13:52:10.512980 Detected 4 core, 8 thread CPU.
597 13:52:10.746584 Display FSP Version Info HOB
598 13:52:10.750051 Reference Code - CPU = a.0.4c.31
599 13:52:10.752843 uCode Version = 0.0.0.86
600 13:52:10.756736 TXT ACM version = ff.ff.ff.ffff
601 13:52:10.759711 Reference Code - ME = a.0.4c.31
602 13:52:10.763044 MEBx version = 0.0.0.0
603 13:52:10.766245 ME Firmware Version = Consumer SKU
604 13:52:10.769878 Reference Code - PCH = a.0.4c.31
605 13:52:10.773263 PCH-CRID Status = Disabled
606 13:52:10.776255 PCH-CRID Original Value = ff.ff.ff.ffff
607 13:52:10.779909 PCH-CRID New Value = ff.ff.ff.ffff
608 13:52:10.782759 OPROM - RST - RAID = ff.ff.ff.ffff
609 13:52:10.786194 PCH Hsio Version = 4.0.0.0
610 13:52:10.789712 Reference Code - SA - System Agent = a.0.4c.31
611 13:52:10.793066 Reference Code - MRC = 2.0.0.1
612 13:52:10.796656 SA - PCIe Version = a.0.4c.31
613 13:52:10.799669 SA-CRID Status = Disabled
614 13:52:10.803164 SA-CRID Original Value = 0.0.0.1
615 13:52:10.806618 SA-CRID New Value = 0.0.0.1
616 13:52:10.810040 OPROM - VBIOS = ff.ff.ff.ffff
617 13:52:10.812920 IO Manageability Engine FW Version = 11.1.4.0
618 13:52:10.816350 PHY Build Version = 0.0.0.e0
619 13:52:10.820046 Thunderbolt(TM) FW Version = 0.0.0.0
620 13:52:10.826495 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
621 13:52:10.829582 ITSS IRQ Polarities Before:
622 13:52:10.829665 IPC0: 0xffffffff
623 13:52:10.832976 IPC1: 0xffffffff
624 13:52:10.833086 IPC2: 0xffffffff
625 13:52:10.836470 IPC3: 0xffffffff
626 13:52:10.840017 ITSS IRQ Polarities After:
627 13:52:10.840101 IPC0: 0xffffffff
628 13:52:10.843382 IPC1: 0xffffffff
629 13:52:10.843465 IPC2: 0xffffffff
630 13:52:10.846329 IPC3: 0xffffffff
631 13:52:10.849776 Found PCIe Root Port #9 at PCI: 00:1d.0.
632 13:52:10.863179 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
633 13:52:10.873188 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
634 13:52:10.886618 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
635 13:52:10.893056 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
636 13:52:10.893146 Enumerating buses...
637 13:52:10.900089 Show all devs... Before device enumeration.
638 13:52:10.900173 Root Device: enabled 1
639 13:52:10.903033 DOMAIN: 0000: enabled 1
640 13:52:10.906738 CPU_CLUSTER: 0: enabled 1
641 13:52:10.910047 PCI: 00:00.0: enabled 1
642 13:52:10.910130 PCI: 00:02.0: enabled 1
643 13:52:10.912867 PCI: 00:04.0: enabled 1
644 13:52:10.916193 PCI: 00:05.0: enabled 1
645 13:52:10.919802 PCI: 00:06.0: enabled 0
646 13:52:10.919886 PCI: 00:07.0: enabled 0
647 13:52:10.923173 PCI: 00:07.1: enabled 0
648 13:52:10.926075 PCI: 00:07.2: enabled 0
649 13:52:10.929621 PCI: 00:07.3: enabled 0
650 13:52:10.929704 PCI: 00:08.0: enabled 1
651 13:52:10.932955 PCI: 00:09.0: enabled 0
652 13:52:10.936545 PCI: 00:0a.0: enabled 0
653 13:52:10.936634 PCI: 00:0d.0: enabled 1
654 13:52:10.939432 PCI: 00:0d.1: enabled 0
655 13:52:10.943026 PCI: 00:0d.2: enabled 0
656 13:52:10.946099 PCI: 00:0d.3: enabled 0
657 13:52:10.946183 PCI: 00:0e.0: enabled 0
658 13:52:10.949625 PCI: 00:10.2: enabled 1
659 13:52:10.953126 PCI: 00:10.6: enabled 0
660 13:52:10.956063 PCI: 00:10.7: enabled 0
661 13:52:10.956147 PCI: 00:12.0: enabled 0
662 13:52:10.959470 PCI: 00:12.6: enabled 0
663 13:52:10.962907 PCI: 00:13.0: enabled 0
664 13:52:10.966231 PCI: 00:14.0: enabled 1
665 13:52:10.966314 PCI: 00:14.1: enabled 0
666 13:52:10.969782 PCI: 00:14.2: enabled 1
667 13:52:10.972720 PCI: 00:14.3: enabled 1
668 13:52:10.972803 PCI: 00:15.0: enabled 1
669 13:52:10.976158 PCI: 00:15.1: enabled 1
670 13:52:10.979542 PCI: 00:15.2: enabled 1
671 13:52:10.983009 PCI: 00:15.3: enabled 1
672 13:52:10.983092 PCI: 00:16.0: enabled 1
673 13:52:10.986331 PCI: 00:16.1: enabled 0
674 13:52:10.989779 PCI: 00:16.2: enabled 0
675 13:52:10.992636 PCI: 00:16.3: enabled 0
676 13:52:10.992720 PCI: 00:16.4: enabled 0
677 13:52:10.996168 PCI: 00:16.5: enabled 0
678 13:52:10.999568 PCI: 00:17.0: enabled 1
679 13:52:11.003066 PCI: 00:19.0: enabled 0
680 13:52:11.003150 PCI: 00:19.1: enabled 1
681 13:52:11.006069 PCI: 00:19.2: enabled 0
682 13:52:11.009619 PCI: 00:1c.0: enabled 1
683 13:52:11.009702 PCI: 00:1c.1: enabled 0
684 13:52:11.013061 PCI: 00:1c.2: enabled 0
685 13:52:11.015895 PCI: 00:1c.3: enabled 0
686 13:52:11.019308 PCI: 00:1c.4: enabled 0
687 13:52:11.019391 PCI: 00:1c.5: enabled 0
688 13:52:11.022911 PCI: 00:1c.6: enabled 1
689 13:52:11.025829 PCI: 00:1c.7: enabled 0
690 13:52:11.029302 PCI: 00:1d.0: enabled 1
691 13:52:11.029430 PCI: 00:1d.1: enabled 0
692 13:52:11.032804 PCI: 00:1d.2: enabled 1
693 13:52:11.036256 PCI: 00:1d.3: enabled 0
694 13:52:11.039557 PCI: 00:1e.0: enabled 1
695 13:52:11.039640 PCI: 00:1e.1: enabled 0
696 13:52:11.042486 PCI: 00:1e.2: enabled 1
697 13:52:11.046052 PCI: 00:1e.3: enabled 1
698 13:52:11.046136 PCI: 00:1f.0: enabled 1
699 13:52:11.049701 PCI: 00:1f.1: enabled 0
700 13:52:11.052665 PCI: 00:1f.2: enabled 1
701 13:52:11.056207 PCI: 00:1f.3: enabled 1
702 13:52:11.056290 PCI: 00:1f.4: enabled 0
703 13:52:11.059175 PCI: 00:1f.5: enabled 1
704 13:52:11.062695 PCI: 00:1f.6: enabled 0
705 13:52:11.065978 PCI: 00:1f.7: enabled 0
706 13:52:11.066077 APIC: 00: enabled 1
707 13:52:11.069197 GENERIC: 0.0: enabled 1
708 13:52:11.072820 GENERIC: 0.0: enabled 1
709 13:52:11.072918 GENERIC: 1.0: enabled 1
710 13:52:11.075768 GENERIC: 0.0: enabled 1
711 13:52:11.079315 GENERIC: 1.0: enabled 1
712 13:52:11.082759 USB0 port 0: enabled 1
713 13:52:11.082844 GENERIC: 0.0: enabled 1
714 13:52:11.086087 USB0 port 0: enabled 1
715 13:52:11.089322 GENERIC: 0.0: enabled 1
716 13:52:11.089434 I2C: 00:1a: enabled 1
717 13:52:11.092738 I2C: 00:31: enabled 1
718 13:52:11.096178 I2C: 00:32: enabled 1
719 13:52:11.099683 I2C: 00:10: enabled 1
720 13:52:11.099767 I2C: 00:15: enabled 1
721 13:52:11.102574 GENERIC: 0.0: enabled 0
722 13:52:11.105878 GENERIC: 1.0: enabled 0
723 13:52:11.105963 GENERIC: 0.0: enabled 1
724 13:52:11.109214 SPI: 00: enabled 1
725 13:52:11.112744 SPI: 00: enabled 1
726 13:52:11.112828 PNP: 0c09.0: enabled 1
727 13:52:11.115844 GENERIC: 0.0: enabled 1
728 13:52:11.119176 USB3 port 0: enabled 1
729 13:52:11.119260 USB3 port 1: enabled 1
730 13:52:11.122713 USB3 port 2: enabled 0
731 13:52:11.126107 USB3 port 3: enabled 0
732 13:52:11.129102 USB2 port 0: enabled 0
733 13:52:11.129185 USB2 port 1: enabled 1
734 13:52:11.132627 USB2 port 2: enabled 1
735 13:52:11.136231 USB2 port 3: enabled 0
736 13:52:11.136326 USB2 port 4: enabled 1
737 13:52:11.139179 USB2 port 5: enabled 0
738 13:52:11.142703 USB2 port 6: enabled 0
739 13:52:11.142787 USB2 port 7: enabled 0
740 13:52:11.145524 USB2 port 8: enabled 0
741 13:52:11.149209 USB2 port 9: enabled 0
742 13:52:11.152804 USB3 port 0: enabled 0
743 13:52:11.152888 USB3 port 1: enabled 1
744 13:52:11.155685 USB3 port 2: enabled 0
745 13:52:11.159223 USB3 port 3: enabled 0
746 13:52:11.159307 GENERIC: 0.0: enabled 1
747 13:52:11.162291 GENERIC: 1.0: enabled 1
748 13:52:11.165978 APIC: 01: enabled 1
749 13:52:11.166071 APIC: 03: enabled 1
750 13:52:11.168944 APIC: 07: enabled 1
751 13:52:11.172391 APIC: 05: enabled 1
752 13:52:11.172476 APIC: 02: enabled 1
753 13:52:11.175889 APIC: 06: enabled 1
754 13:52:11.178821 APIC: 04: enabled 1
755 13:52:11.178905 Compare with tree...
756 13:52:11.182367 Root Device: enabled 1
757 13:52:11.185813 DOMAIN: 0000: enabled 1
758 13:52:11.185898 PCI: 00:00.0: enabled 1
759 13:52:11.189116 PCI: 00:02.0: enabled 1
760 13:52:11.192329 PCI: 00:04.0: enabled 1
761 13:52:11.195986 GENERIC: 0.0: enabled 1
762 13:52:11.199002 PCI: 00:05.0: enabled 1
763 13:52:11.199086 PCI: 00:06.0: enabled 0
764 13:52:11.202489 PCI: 00:07.0: enabled 0
765 13:52:11.205459 GENERIC: 0.0: enabled 1
766 13:52:11.208900 PCI: 00:07.1: enabled 0
767 13:52:11.212480 GENERIC: 1.0: enabled 1
768 13:52:11.212574 PCI: 00:07.2: enabled 0
769 13:52:11.215563 GENERIC: 0.0: enabled 1
770 13:52:11.219134 PCI: 00:07.3: enabled 0
771 13:52:11.222698 GENERIC: 1.0: enabled 1
772 13:52:11.226007 PCI: 00:08.0: enabled 1
773 13:52:11.226095 PCI: 00:09.0: enabled 0
774 13:52:11.229279 PCI: 00:0a.0: enabled 0
775 13:52:11.232209 PCI: 00:0d.0: enabled 1
776 13:52:11.235679 USB0 port 0: enabled 1
777 13:52:11.238715 USB3 port 0: enabled 1
778 13:52:11.238789 USB3 port 1: enabled 1
779 13:52:11.242179 USB3 port 2: enabled 0
780 13:52:11.245710 USB3 port 3: enabled 0
781 13:52:11.249206 PCI: 00:0d.1: enabled 0
782 13:52:11.252196 PCI: 00:0d.2: enabled 0
783 13:52:11.255824 GENERIC: 0.0: enabled 1
784 13:52:11.255895 PCI: 00:0d.3: enabled 0
785 13:52:11.258689 PCI: 00:0e.0: enabled 0
786 13:52:11.262243 PCI: 00:10.2: enabled 1
787 13:52:11.265823 PCI: 00:10.6: enabled 0
788 13:52:11.268714 PCI: 00:10.7: enabled 0
789 13:52:11.268798 PCI: 00:12.0: enabled 0
790 13:52:11.272291 PCI: 00:12.6: enabled 0
791 13:52:11.275714 PCI: 00:13.0: enabled 0
792 13:52:11.279107 PCI: 00:14.0: enabled 1
793 13:52:11.279193 USB0 port 0: enabled 1
794 13:52:11.282197 USB2 port 0: enabled 0
795 13:52:11.285658 USB2 port 1: enabled 1
796 13:52:11.288542 USB2 port 2: enabled 1
797 13:52:11.292050 USB2 port 3: enabled 0
798 13:52:11.295231 USB2 port 4: enabled 1
799 13:52:11.295307 USB2 port 5: enabled 0
800 13:52:11.298677 USB2 port 6: enabled 0
801 13:52:11.302148 USB2 port 7: enabled 0
802 13:52:11.305206 USB2 port 8: enabled 0
803 13:52:11.308649 USB2 port 9: enabled 0
804 13:52:11.311969 USB3 port 0: enabled 0
805 13:52:11.312049 USB3 port 1: enabled 1
806 13:52:11.315468 USB3 port 2: enabled 0
807 13:52:11.318820 USB3 port 3: enabled 0
808 13:52:11.321762 PCI: 00:14.1: enabled 0
809 13:52:11.325262 PCI: 00:14.2: enabled 1
810 13:52:11.325339 PCI: 00:14.3: enabled 1
811 13:52:11.328622 GENERIC: 0.0: enabled 1
812 13:52:11.332039 PCI: 00:15.0: enabled 1
813 13:52:11.334997 I2C: 00:1a: enabled 1
814 13:52:11.338587 I2C: 00:31: enabled 1
815 13:52:11.338671 I2C: 00:32: enabled 1
816 13:52:11.342170 PCI: 00:15.1: enabled 1
817 13:52:11.345048 I2C: 00:10: enabled 1
818 13:52:11.348659 PCI: 00:15.2: enabled 1
819 13:52:11.348797 PCI: 00:15.3: enabled 1
820 13:52:11.351721 PCI: 00:16.0: enabled 1
821 13:52:11.355155 PCI: 00:16.1: enabled 0
822 13:52:11.358774 PCI: 00:16.2: enabled 0
823 13:52:11.361783 PCI: 00:16.3: enabled 0
824 13:52:11.361861 PCI: 00:16.4: enabled 0
825 13:52:11.365272 PCI: 00:16.5: enabled 0
826 13:52:11.368310 PCI: 00:17.0: enabled 1
827 13:52:11.371779 PCI: 00:19.0: enabled 0
828 13:52:11.375340 PCI: 00:19.1: enabled 1
829 13:52:11.375424 I2C: 00:15: enabled 1
830 13:52:11.378220 PCI: 00:19.2: enabled 0
831 13:52:11.381530 PCI: 00:1d.0: enabled 1
832 13:52:11.385048 GENERIC: 0.0: enabled 1
833 13:52:11.388633 PCI: 00:1e.0: enabled 1
834 13:52:11.388758 PCI: 00:1e.1: enabled 0
835 13:52:11.391504 PCI: 00:1e.2: enabled 1
836 13:52:11.395651 SPI: 00: enabled 1
837 13:52:11.395748 PCI: 00:1e.3: enabled 1
838 13:52:11.399539 SPI: 00: enabled 1
839 13:52:11.403085 PCI: 00:1f.0: enabled 1
840 13:52:11.403168 PNP: 0c09.0: enabled 1
841 13:52:11.406631 PCI: 00:1f.1: enabled 0
842 13:52:11.454825 PCI: 00:1f.2: enabled 1
843 13:52:11.454963 GENERIC: 0.0: enabled 1
844 13:52:11.455035 GENERIC: 0.0: enabled 1
845 13:52:11.455124 GENERIC: 1.0: enabled 1
846 13:52:11.455234 PCI: 00:1f.3: enabled 1
847 13:52:11.455357 PCI: 00:1f.4: enabled 0
848 13:52:11.455447 PCI: 00:1f.5: enabled 1
849 13:52:11.455724 PCI: 00:1f.6: enabled 0
850 13:52:11.455815 PCI: 00:1f.7: enabled 0
851 13:52:11.455906 CPU_CLUSTER: 0: enabled 1
852 13:52:11.455967 APIC: 00: enabled 1
853 13:52:11.456024 APIC: 01: enabled 1
854 13:52:11.456080 APIC: 03: enabled 1
855 13:52:11.456134 APIC: 07: enabled 1
856 13:52:11.456189 APIC: 05: enabled 1
857 13:52:11.456243 APIC: 02: enabled 1
858 13:52:11.456297 APIC: 06: enabled 1
859 13:52:11.458938 APIC: 04: enabled 1
860 13:52:11.459022 Root Device scanning...
861 13:52:11.459105 scan_static_bus for Root Device
862 13:52:11.461849 DOMAIN: 0000 enabled
863 13:52:11.464902 CPU_CLUSTER: 0 enabled
864 13:52:11.464985 DOMAIN: 0000 scanning...
865 13:52:11.468429 PCI: pci_scan_bus for bus 00
866 13:52:11.471933 PCI: 00:00.0 [8086/0000] ops
867 13:52:11.475310 PCI: 00:00.0 [8086/9a12] enabled
868 13:52:11.478258 PCI: 00:02.0 [8086/0000] bus ops
869 13:52:11.481848 PCI: 00:02.0 [8086/9a40] enabled
870 13:52:11.485246 PCI: 00:04.0 [8086/0000] bus ops
871 13:52:11.488175 PCI: 00:04.0 [8086/9a03] enabled
872 13:52:11.491818 PCI: 00:05.0 [8086/9a19] enabled
873 13:52:11.495353 PCI: 00:07.0 [0000/0000] hidden
874 13:52:11.498106 PCI: 00:08.0 [8086/9a11] enabled
875 13:52:11.501616 PCI: 00:0a.0 [8086/9a0d] disabled
876 13:52:11.505084 PCI: 00:0d.0 [8086/0000] bus ops
877 13:52:11.508415 PCI: 00:0d.0 [8086/9a13] enabled
878 13:52:11.511970 PCI: 00:14.0 [8086/0000] bus ops
879 13:52:11.514848 PCI: 00:14.0 [8086/a0ed] enabled
880 13:52:11.518333 PCI: 00:14.2 [8086/a0ef] enabled
881 13:52:11.521889 PCI: 00:14.3 [8086/0000] bus ops
882 13:52:11.524707 PCI: 00:14.3 [8086/a0f0] enabled
883 13:52:11.528102 PCI: 00:15.0 [8086/0000] bus ops
884 13:52:11.531453 PCI: 00:15.0 [8086/a0e8] enabled
885 13:52:11.534825 PCI: 00:15.1 [8086/0000] bus ops
886 13:52:11.538205 PCI: 00:15.1 [8086/a0e9] enabled
887 13:52:11.541444 PCI: 00:15.2 [8086/0000] bus ops
888 13:52:11.545089 PCI: 00:15.2 [8086/a0ea] enabled
889 13:52:11.548706 PCI: 00:15.3 [8086/0000] bus ops
890 13:52:11.551730 PCI: 00:15.3 [8086/a0eb] enabled
891 13:52:11.555273 PCI: 00:16.0 [8086/0000] ops
892 13:52:11.558212 PCI: 00:16.0 [8086/a0e0] enabled
893 13:52:11.564723 PCI: Static device PCI: 00:17.0 not found, disabling it.
894 13:52:11.568280 PCI: 00:19.0 [8086/0000] bus ops
895 13:52:11.571871 PCI: 00:19.0 [8086/a0c5] disabled
896 13:52:11.574817 PCI: 00:19.1 [8086/0000] bus ops
897 13:52:11.578288 PCI: 00:19.1 [8086/a0c6] enabled
898 13:52:11.581329 PCI: 00:1d.0 [8086/0000] bus ops
899 13:52:11.585006 PCI: 00:1d.0 [8086/a0b0] enabled
900 13:52:11.588201 PCI: 00:1e.0 [8086/0000] ops
901 13:52:11.591717 PCI: 00:1e.0 [8086/a0a8] enabled
902 13:52:11.594774 PCI: 00:1e.2 [8086/0000] bus ops
903 13:52:11.598222 PCI: 00:1e.2 [8086/a0aa] enabled
904 13:52:11.601186 PCI: 00:1e.3 [8086/0000] bus ops
905 13:52:11.604684 PCI: 00:1e.3 [8086/a0ab] enabled
906 13:52:11.608161 PCI: 00:1f.0 [8086/0000] bus ops
907 13:52:11.611397 PCI: 00:1f.0 [8086/a087] enabled
908 13:52:11.611568 RTC Init
909 13:52:11.614914 Set power on after power failure.
910 13:52:11.617990 Disabling Deep S3
911 13:52:11.621591 Disabling Deep S3
912 13:52:11.621794 Disabling Deep S4
913 13:52:11.625029 Disabling Deep S4
914 13:52:11.625286 Disabling Deep S5
915 13:52:11.628008 Disabling Deep S5
916 13:52:11.631695 PCI: 00:1f.2 [0000/0000] hidden
917 13:52:11.634592 PCI: 00:1f.3 [8086/0000] bus ops
918 13:52:11.638389 PCI: 00:1f.3 [8086/a0c8] enabled
919 13:52:11.641787 PCI: 00:1f.5 [8086/0000] bus ops
920 13:52:11.644676 PCI: 00:1f.5 [8086/a0a4] enabled
921 13:52:11.648049 PCI: Leftover static devices:
922 13:52:11.648615 PCI: 00:10.2
923 13:52:11.649064 PCI: 00:10.6
924 13:52:11.651531 PCI: 00:10.7
925 13:52:11.651988 PCI: 00:06.0
926 13:52:11.655116 PCI: 00:07.1
927 13:52:11.655681 PCI: 00:07.2
928 13:52:11.658038 PCI: 00:07.3
929 13:52:11.658636 PCI: 00:09.0
930 13:52:11.659160 PCI: 00:0d.1
931 13:52:11.661582 PCI: 00:0d.2
932 13:52:11.662203 PCI: 00:0d.3
933 13:52:11.665175 PCI: 00:0e.0
934 13:52:11.665812 PCI: 00:12.0
935 13:52:11.666208 PCI: 00:12.6
936 13:52:11.667925 PCI: 00:13.0
937 13:52:11.668448 PCI: 00:14.1
938 13:52:11.671601 PCI: 00:16.1
939 13:52:11.672172 PCI: 00:16.2
940 13:52:11.672667 PCI: 00:16.3
941 13:52:11.674646 PCI: 00:16.4
942 13:52:11.675183 PCI: 00:16.5
943 13:52:11.678195 PCI: 00:17.0
944 13:52:11.678821 PCI: 00:19.2
945 13:52:11.681854 PCI: 00:1e.1
946 13:52:11.682431 PCI: 00:1f.1
947 13:52:11.682937 PCI: 00:1f.4
948 13:52:11.684734 PCI: 00:1f.6
949 13:52:11.685351 PCI: 00:1f.7
950 13:52:11.688248 PCI: Check your devicetree.cb.
951 13:52:11.691755 PCI: 00:02.0 scanning...
952 13:52:11.695063 scan_generic_bus for PCI: 00:02.0
953 13:52:11.698178 scan_generic_bus for PCI: 00:02.0 done
954 13:52:11.705044 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
955 13:52:11.705720 PCI: 00:04.0 scanning...
956 13:52:11.708006 scan_generic_bus for PCI: 00:04.0
957 13:52:11.711559 GENERIC: 0.0 enabled
958 13:52:11.718328 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
959 13:52:11.721318 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
960 13:52:11.724799 PCI: 00:0d.0 scanning...
961 13:52:11.728385 scan_static_bus for PCI: 00:0d.0
962 13:52:11.731443 USB0 port 0 enabled
963 13:52:11.735081 USB0 port 0 scanning...
964 13:52:11.737994 scan_static_bus for USB0 port 0
965 13:52:11.738597 USB3 port 0 enabled
966 13:52:11.741273 USB3 port 1 enabled
967 13:52:11.741924 USB3 port 2 disabled
968 13:52:11.744647 USB3 port 3 disabled
969 13:52:11.748026 USB3 port 0 scanning...
970 13:52:11.751414 scan_static_bus for USB3 port 0
971 13:52:11.754719 scan_static_bus for USB3 port 0 done
972 13:52:11.758090 scan_bus: bus USB3 port 0 finished in 6 msecs
973 13:52:11.761594 USB3 port 1 scanning...
974 13:52:11.764525 scan_static_bus for USB3 port 1
975 13:52:11.768121 scan_static_bus for USB3 port 1 done
976 13:52:11.774915 scan_bus: bus USB3 port 1 finished in 6 msecs
977 13:52:11.777966 scan_static_bus for USB0 port 0 done
978 13:52:11.781101 scan_bus: bus USB0 port 0 finished in 43 msecs
979 13:52:11.784673 scan_static_bus for PCI: 00:0d.0 done
980 13:52:11.791324 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
981 13:52:11.794239 PCI: 00:14.0 scanning...
982 13:52:11.797861 scan_static_bus for PCI: 00:14.0
983 13:52:11.798377 USB0 port 0 enabled
984 13:52:11.801082 USB0 port 0 scanning...
985 13:52:11.804537 scan_static_bus for USB0 port 0
986 13:52:11.808238 USB2 port 0 disabled
987 13:52:11.808713 USB2 port 1 enabled
988 13:52:11.811187 USB2 port 2 enabled
989 13:52:11.814462 USB2 port 3 disabled
990 13:52:11.815059 USB2 port 4 enabled
991 13:52:11.818021 USB2 port 5 disabled
992 13:52:11.818694 USB2 port 6 disabled
993 13:52:11.821251 USB2 port 7 disabled
994 13:52:11.824543 USB2 port 8 disabled
995 13:52:11.825164 USB2 port 9 disabled
996 13:52:11.827748 USB3 port 0 disabled
997 13:52:11.831098 USB3 port 1 enabled
998 13:52:11.831518 USB3 port 2 disabled
999 13:52:11.834127 USB3 port 3 disabled
1000 13:52:11.837794 USB2 port 1 scanning...
1001 13:52:11.840774 scan_static_bus for USB2 port 1
1002 13:52:11.844391 scan_static_bus for USB2 port 1 done
1003 13:52:11.847896 scan_bus: bus USB2 port 1 finished in 6 msecs
1004 13:52:11.850824 USB2 port 2 scanning...
1005 13:52:11.854443 scan_static_bus for USB2 port 2
1006 13:52:11.857216 scan_static_bus for USB2 port 2 done
1007 13:52:11.864204 scan_bus: bus USB2 port 2 finished in 6 msecs
1008 13:52:11.864651 USB2 port 4 scanning...
1009 13:52:11.867406 scan_static_bus for USB2 port 4
1010 13:52:11.870944 scan_static_bus for USB2 port 4 done
1011 13:52:11.877454 scan_bus: bus USB2 port 4 finished in 6 msecs
1012 13:52:11.880533 USB3 port 1 scanning...
1013 13:52:11.883997 scan_static_bus for USB3 port 1
1014 13:52:11.887456 scan_static_bus for USB3 port 1 done
1015 13:52:11.890477 scan_bus: bus USB3 port 1 finished in 6 msecs
1016 13:52:11.894145 scan_static_bus for USB0 port 0 done
1017 13:52:11.900629 scan_bus: bus USB0 port 0 finished in 93 msecs
1018 13:52:11.904043 scan_static_bus for PCI: 00:14.0 done
1019 13:52:11.907289 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1020 13:52:11.910685 PCI: 00:14.3 scanning...
1021 13:52:11.914173 scan_static_bus for PCI: 00:14.3
1022 13:52:11.917139 GENERIC: 0.0 enabled
1023 13:52:11.920676 scan_static_bus for PCI: 00:14.3 done
1024 13:52:11.923670 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1025 13:52:11.927049 PCI: 00:15.0 scanning...
1026 13:52:11.930475 scan_static_bus for PCI: 00:15.0
1027 13:52:11.934034 I2C: 00:1a enabled
1028 13:52:11.934598 I2C: 00:31 enabled
1029 13:52:11.937019 I2C: 00:32 enabled
1030 13:52:11.940609 scan_static_bus for PCI: 00:15.0 done
1031 13:52:11.943522 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1032 13:52:11.947104 PCI: 00:15.1 scanning...
1033 13:52:11.950651 scan_static_bus for PCI: 00:15.1
1034 13:52:11.953673 I2C: 00:10 enabled
1035 13:52:11.957337 scan_static_bus for PCI: 00:15.1 done
1036 13:52:11.960378 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1037 13:52:11.963869 PCI: 00:15.2 scanning...
1038 13:52:11.967296 scan_static_bus for PCI: 00:15.2
1039 13:52:11.970573 scan_static_bus for PCI: 00:15.2 done
1040 13:52:11.977439 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1041 13:52:11.977969 PCI: 00:15.3 scanning...
1042 13:52:11.981112 scan_static_bus for PCI: 00:15.3
1043 13:52:11.988091 scan_static_bus for PCI: 00:15.3 done
1044 13:52:11.991016 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1045 13:52:11.994626 PCI: 00:19.1 scanning...
1046 13:52:11.998192 scan_static_bus for PCI: 00:19.1
1047 13:52:11.998617 I2C: 00:15 enabled
1048 13:52:12.004653 scan_static_bus for PCI: 00:19.1 done
1049 13:52:12.007983 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1050 13:52:12.011126 PCI: 00:1d.0 scanning...
1051 13:52:12.014513 do_pci_scan_bridge for PCI: 00:1d.0
1052 13:52:12.017933 PCI: pci_scan_bus for bus 01
1053 13:52:12.021455 PCI: 01:00.0 [1c5c/174a] enabled
1054 13:52:12.021999 GENERIC: 0.0 enabled
1055 13:52:12.027909 Enabling Common Clock Configuration
1056 13:52:12.031036 L1 Sub-State supported from root port 29
1057 13:52:12.034676 L1 Sub-State Support = 0xf
1058 13:52:12.037746 CommonModeRestoreTime = 0x28
1059 13:52:12.041191 Power On Value = 0x16, Power On Scale = 0x0
1060 13:52:12.041832 ASPM: Enabled L1
1061 13:52:12.047536 PCIe: Max_Payload_Size adjusted to 128
1062 13:52:12.051181 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1063 13:52:12.054687 PCI: 00:1e.2 scanning...
1064 13:52:12.057998 scan_generic_bus for PCI: 00:1e.2
1065 13:52:12.058519 SPI: 00 enabled
1066 13:52:12.064279 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1067 13:52:12.071344 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1068 13:52:12.071833 PCI: 00:1e.3 scanning...
1069 13:52:12.074408 scan_generic_bus for PCI: 00:1e.3
1070 13:52:12.078013 SPI: 00 enabled
1071 13:52:12.084430 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1072 13:52:12.087785 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1073 13:52:12.091046 PCI: 00:1f.0 scanning...
1074 13:52:12.094478 scan_static_bus for PCI: 00:1f.0
1075 13:52:12.097658 PNP: 0c09.0 enabled
1076 13:52:12.098192 PNP: 0c09.0 scanning...
1077 13:52:12.101259 scan_static_bus for PNP: 0c09.0
1078 13:52:12.107688 scan_static_bus for PNP: 0c09.0 done
1079 13:52:12.111077 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1080 13:52:12.114342 scan_static_bus for PCI: 00:1f.0 done
1081 13:52:12.120917 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1082 13:52:12.121807 PCI: 00:1f.2 scanning...
1083 13:52:12.124270 scan_static_bus for PCI: 00:1f.2
1084 13:52:12.127888 GENERIC: 0.0 enabled
1085 13:52:12.131276 GENERIC: 0.0 scanning...
1086 13:52:12.134427 scan_static_bus for GENERIC: 0.0
1087 13:52:12.135008 GENERIC: 0.0 enabled
1088 13:52:12.137840 GENERIC: 1.0 enabled
1089 13:52:12.141331 scan_static_bus for GENERIC: 0.0 done
1090 13:52:12.147779 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1091 13:52:12.150870 scan_static_bus for PCI: 00:1f.2 done
1092 13:52:12.154134 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1093 13:52:12.157612 PCI: 00:1f.3 scanning...
1094 13:52:12.160420 scan_static_bus for PCI: 00:1f.3
1095 13:52:12.164140 scan_static_bus for PCI: 00:1f.3 done
1096 13:52:12.170699 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1097 13:52:12.170778 PCI: 00:1f.5 scanning...
1098 13:52:12.177234 scan_generic_bus for PCI: 00:1f.5
1099 13:52:12.180886 scan_generic_bus for PCI: 00:1f.5 done
1100 13:52:12.183768 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1101 13:52:12.190506 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1102 13:52:12.193854 scan_static_bus for Root Device done
1103 13:52:12.197012 scan_bus: bus Root Device finished in 736 msecs
1104 13:52:12.197089 done
1105 13:52:12.203932 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1106 13:52:12.206888 Chrome EC: UHEPI supported
1107 13:52:12.214022 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1108 13:52:12.220795 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1109 13:52:12.224188 SPI flash protection: WPSW=0 SRP0=0
1110 13:52:12.231121 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1111 13:52:12.234067 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1112 13:52:12.237549 found VGA at PCI: 00:02.0
1113 13:52:12.240496 Setting up VGA for PCI: 00:02.0
1114 13:52:12.247472 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1115 13:52:12.250482 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1116 13:52:12.254083 Allocating resources...
1117 13:52:12.257536 Reading resources...
1118 13:52:12.260483 Root Device read_resources bus 0 link: 0
1119 13:52:12.264052 DOMAIN: 0000 read_resources bus 0 link: 0
1120 13:52:12.270929 PCI: 00:04.0 read_resources bus 1 link: 0
1121 13:52:12.273854 PCI: 00:04.0 read_resources bus 1 link: 0 done
1122 13:52:12.280862 PCI: 00:0d.0 read_resources bus 0 link: 0
1123 13:52:12.283930 USB0 port 0 read_resources bus 0 link: 0
1124 13:52:12.290808 USB0 port 0 read_resources bus 0 link: 0 done
1125 13:52:12.294266 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1126 13:52:12.297072 PCI: 00:14.0 read_resources bus 0 link: 0
1127 13:52:12.303884 USB0 port 0 read_resources bus 0 link: 0
1128 13:52:12.307219 USB0 port 0 read_resources bus 0 link: 0 done
1129 13:52:12.314311 PCI: 00:14.0 read_resources bus 0 link: 0 done
1130 13:52:12.317403 PCI: 00:14.3 read_resources bus 0 link: 0
1131 13:52:12.324132 PCI: 00:14.3 read_resources bus 0 link: 0 done
1132 13:52:12.327390 PCI: 00:15.0 read_resources bus 0 link: 0
1133 13:52:12.334097 PCI: 00:15.0 read_resources bus 0 link: 0 done
1134 13:52:12.337706 PCI: 00:15.1 read_resources bus 0 link: 0
1135 13:52:12.344162 PCI: 00:15.1 read_resources bus 0 link: 0 done
1136 13:52:12.347681 PCI: 00:19.1 read_resources bus 0 link: 0
1137 13:52:12.354843 PCI: 00:19.1 read_resources bus 0 link: 0 done
1138 13:52:12.358182 PCI: 00:1d.0 read_resources bus 1 link: 0
1139 13:52:12.364517 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1140 13:52:12.368138 PCI: 00:1e.2 read_resources bus 2 link: 0
1141 13:52:12.374775 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1142 13:52:12.378223 PCI: 00:1e.3 read_resources bus 3 link: 0
1143 13:52:12.384847 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1144 13:52:12.388202 PCI: 00:1f.0 read_resources bus 0 link: 0
1145 13:52:12.394581 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1146 13:52:12.397843 PCI: 00:1f.2 read_resources bus 0 link: 0
1147 13:52:12.401188 GENERIC: 0.0 read_resources bus 0 link: 0
1148 13:52:12.408354 GENERIC: 0.0 read_resources bus 0 link: 0 done
1149 13:52:12.411664 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1150 13:52:12.418697 DOMAIN: 0000 read_resources bus 0 link: 0 done
1151 13:52:12.422204 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1152 13:52:12.429022 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1153 13:52:12.432287 Root Device read_resources bus 0 link: 0 done
1154 13:52:12.435627 Done reading resources.
1155 13:52:12.442101 Show resources in subtree (Root Device)...After reading.
1156 13:52:12.445765 Root Device child on link 0 DOMAIN: 0000
1157 13:52:12.448577 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1158 13:52:12.458589 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1159 13:52:12.468718 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1160 13:52:12.472255 PCI: 00:00.0
1161 13:52:12.482025 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1162 13:52:12.488435 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1163 13:52:12.498329 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1164 13:52:12.508510 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1165 13:52:12.518396 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1166 13:52:12.528472 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1167 13:52:12.535104 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1168 13:52:12.544721 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1169 13:52:12.555120 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1170 13:52:12.565105 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1171 13:52:12.575037 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1172 13:52:12.584818 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1173 13:52:12.591200 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1174 13:52:12.601705 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1175 13:52:12.611529 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1176 13:52:12.621078 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1177 13:52:12.630969 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1178 13:52:12.641188 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1179 13:52:12.647722 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1180 13:52:12.657676 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1181 13:52:12.661032 PCI: 00:02.0
1182 13:52:12.671232 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1183 13:52:12.681260 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1184 13:52:12.691162 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1185 13:52:12.694739 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1186 13:52:12.704818 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1187 13:52:12.704911 GENERIC: 0.0
1188 13:52:12.712962 PCI: 00:05.0
1189 13:52:12.717773 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1190 13:52:12.721317 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1191 13:52:12.724799 GENERIC: 0.0
1192 13:52:12.724906 PCI: 00:08.0
1193 13:52:12.734249 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 13:52:12.737569 PCI: 00:0a.0
1195 13:52:12.740914 PCI: 00:0d.0 child on link 0 USB0 port 0
1196 13:52:12.751308 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1197 13:52:12.757713 USB0 port 0 child on link 0 USB3 port 0
1198 13:52:12.757813 USB3 port 0
1199 13:52:12.761091 USB3 port 1
1200 13:52:12.761195 USB3 port 2
1201 13:52:12.764469 USB3 port 3
1202 13:52:12.767785 PCI: 00:14.0 child on link 0 USB0 port 0
1203 13:52:12.777836 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1204 13:52:12.780801 USB0 port 0 child on link 0 USB2 port 0
1205 13:52:12.784176 USB2 port 0
1206 13:52:12.784295 USB2 port 1
1207 13:52:12.787645 USB2 port 2
1208 13:52:12.787746 USB2 port 3
1209 13:52:12.791093 USB2 port 4
1210 13:52:12.794458 USB2 port 5
1211 13:52:12.794535 USB2 port 6
1212 13:52:12.797804 USB2 port 7
1213 13:52:12.797876 USB2 port 8
1214 13:52:12.801201 USB2 port 9
1215 13:52:12.801306 USB3 port 0
1216 13:52:12.804209 USB3 port 1
1217 13:52:12.804326 USB3 port 2
1218 13:52:12.807499 USB3 port 3
1219 13:52:12.807620 PCI: 00:14.2
1220 13:52:12.817597 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1221 13:52:12.827610 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1222 13:52:12.833952 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1223 13:52:12.843853 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1224 13:52:12.843988 GENERIC: 0.0
1225 13:52:12.847107 PCI: 00:15.0 child on link 0 I2C: 00:1a
1226 13:52:12.857084 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1227 13:52:12.860517 I2C: 00:1a
1228 13:52:12.860626 I2C: 00:31
1229 13:52:12.863815 I2C: 00:32
1230 13:52:12.867624 PCI: 00:15.1 child on link 0 I2C: 00:10
1231 13:52:12.877431 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1232 13:52:12.880841 I2C: 00:10
1233 13:52:12.880962 PCI: 00:15.2
1234 13:52:12.890496 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1235 13:52:12.893762 PCI: 00:15.3
1236 13:52:12.904089 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1237 13:52:12.904199 PCI: 00:16.0
1238 13:52:12.913645 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1239 13:52:12.917021 PCI: 00:19.0
1240 13:52:12.920498 PCI: 00:19.1 child on link 0 I2C: 00:15
1241 13:52:12.930529 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1242 13:52:12.930639 I2C: 00:15
1243 13:52:12.936962 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1244 13:52:12.943695 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1245 13:52:12.953721 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1246 13:52:12.963783 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1247 13:52:12.967189 GENERIC: 0.0
1248 13:52:12.967300 PCI: 01:00.0
1249 13:52:12.976950 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1250 13:52:12.986591 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1251 13:52:12.996853 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1252 13:52:12.996969 PCI: 00:1e.0
1253 13:52:13.009866 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1254 13:52:13.013316 PCI: 00:1e.2 child on link 0 SPI: 00
1255 13:52:13.023231 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1256 13:52:13.023337 SPI: 00
1257 13:52:13.026647 PCI: 00:1e.3 child on link 0 SPI: 00
1258 13:52:13.036638 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1259 13:52:13.040135 SPI: 00
1260 13:52:13.043623 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1261 13:52:13.053471 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1262 13:52:13.053582 PNP: 0c09.0
1263 13:52:13.063058 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1264 13:52:13.066461 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1265 13:52:13.076529 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1266 13:52:13.086876 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1267 13:52:13.089665 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1268 13:52:13.093170 GENERIC: 0.0
1269 13:52:13.093284 GENERIC: 1.0
1270 13:52:13.096662 PCI: 00:1f.3
1271 13:52:13.106644 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1272 13:52:13.116213 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1273 13:52:13.116326 PCI: 00:1f.5
1274 13:52:13.126492 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1275 13:52:13.129946 CPU_CLUSTER: 0 child on link 0 APIC: 00
1276 13:52:13.133096 APIC: 00
1277 13:52:13.133221 APIC: 01
1278 13:52:13.136452 APIC: 03
1279 13:52:13.136555 APIC: 07
1280 13:52:13.136648 APIC: 05
1281 13:52:13.139439 APIC: 02
1282 13:52:13.139551 APIC: 06
1283 13:52:13.139649 APIC: 04
1284 13:52:13.149654 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1285 13:52:13.153024 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1286 13:52:13.159649 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1287 13:52:13.166658 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1288 13:52:13.169979 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1289 13:52:13.176260 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1290 13:52:13.179675 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1291 13:52:13.186620 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1292 13:52:13.192868 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1293 13:52:13.203154 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1294 13:52:13.209762 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1295 13:52:13.216067 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1296 13:52:13.223033 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1297 13:52:13.229403 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1298 13:52:13.239420 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1299 13:52:13.239505 DOMAIN: 0000: Resource ranges:
1300 13:52:13.246316 * Base: 1000, Size: 800, Tag: 100
1301 13:52:13.249605 * Base: 1900, Size: e700, Tag: 100
1302 13:52:13.253057 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1303 13:52:13.259556 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1304 13:52:13.266167 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1305 13:52:13.275877 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1306 13:52:13.282679 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1307 13:52:13.289384 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1308 13:52:13.299375 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1309 13:52:13.305712 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1310 13:52:13.312552 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1311 13:52:13.322790 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1312 13:52:13.329007 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1313 13:52:13.335806 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1314 13:52:13.345393 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1315 13:52:13.352592 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1316 13:52:13.358844 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1317 13:52:13.365631 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1318 13:52:13.375693 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1319 13:52:13.381977 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1320 13:52:13.388658 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1321 13:52:13.398525 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1322 13:52:13.405373 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1323 13:52:13.411969 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1324 13:52:13.421909 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1325 13:52:13.428742 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1326 13:52:13.435118 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1327 13:52:13.438484 DOMAIN: 0000: Resource ranges:
1328 13:52:13.445090 * Base: 7fc00000, Size: 40400000, Tag: 200
1329 13:52:13.448502 * Base: d0000000, Size: 28000000, Tag: 200
1330 13:52:13.451878 * Base: fa000000, Size: 1000000, Tag: 200
1331 13:52:13.458506 * Base: fb001000, Size: 2fff000, Tag: 200
1332 13:52:13.461960 * Base: fe010000, Size: 2e000, Tag: 200
1333 13:52:13.464874 * Base: fe03f000, Size: d41000, Tag: 200
1334 13:52:13.468258 * Base: fed88000, Size: 8000, Tag: 200
1335 13:52:13.475035 * Base: fed93000, Size: d000, Tag: 200
1336 13:52:13.478465 * Base: feda2000, Size: 1e000, Tag: 200
1337 13:52:13.481813 * Base: fede0000, Size: 1220000, Tag: 200
1338 13:52:13.488804 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1339 13:52:13.495073 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1340 13:52:13.501565 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1341 13:52:13.508219 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1342 13:52:13.515138 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1343 13:52:13.521769 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1344 13:52:13.528314 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1345 13:52:13.535063 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1346 13:52:13.541839 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1347 13:52:13.548479 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1348 13:52:13.554666 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1349 13:52:13.561736 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1350 13:52:13.567942 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1351 13:52:13.574858 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1352 13:52:13.581158 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1353 13:52:13.587831 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1354 13:52:13.594534 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1355 13:52:13.601017 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1356 13:52:13.607980 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1357 13:52:13.614739 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1358 13:52:13.621645 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1359 13:52:13.627878 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1360 13:52:13.634484 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1361 13:52:13.641331 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1362 13:52:13.648066 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1363 13:52:13.650977 PCI: 00:1d.0: Resource ranges:
1364 13:52:13.654857 * Base: 7fc00000, Size: 100000, Tag: 200
1365 13:52:13.661053 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1366 13:52:13.667849 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1367 13:52:13.674594 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1368 13:52:13.684207 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1369 13:52:13.690906 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1370 13:52:13.694131 Root Device assign_resources, bus 0 link: 0
1371 13:52:13.700858 DOMAIN: 0000 assign_resources, bus 0 link: 0
1372 13:52:13.707648 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1373 13:52:13.717906 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1374 13:52:13.724061 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1375 13:52:13.734304 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1376 13:52:13.737645 PCI: 00:04.0 assign_resources, bus 1 link: 0
1377 13:52:13.744130 PCI: 00:04.0 assign_resources, bus 1 link: 0
1378 13:52:13.750940 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1379 13:52:13.757696 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1380 13:52:13.767676 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1381 13:52:13.771038 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1382 13:52:13.777460 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1383 13:52:13.784248 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1384 13:52:13.790584 PCI: 00:14.0 assign_resources, bus 0 link: 0
1385 13:52:13.793915 PCI: 00:14.0 assign_resources, bus 0 link: 0
1386 13:52:13.800812 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1387 13:52:13.810945 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1388 13:52:13.817220 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1389 13:52:13.824167 PCI: 00:14.3 assign_resources, bus 0 link: 0
1390 13:52:13.827441 PCI: 00:14.3 assign_resources, bus 0 link: 0
1391 13:52:13.837554 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1392 13:52:13.840922 PCI: 00:15.0 assign_resources, bus 0 link: 0
1393 13:52:13.843809 PCI: 00:15.0 assign_resources, bus 0 link: 0
1394 13:52:13.854237 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1395 13:52:13.857596 PCI: 00:15.1 assign_resources, bus 0 link: 0
1396 13:52:13.863808 PCI: 00:15.1 assign_resources, bus 0 link: 0
1397 13:52:13.870534 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1398 13:52:13.880384 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1399 13:52:13.887214 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1400 13:52:13.897342 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1401 13:52:13.900174 PCI: 00:19.1 assign_resources, bus 0 link: 0
1402 13:52:13.903609 PCI: 00:19.1 assign_resources, bus 0 link: 0
1403 13:52:13.913529 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1404 13:52:13.923732 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1405 13:52:13.933635 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1406 13:52:13.937051 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1407 13:52:13.943645 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1408 13:52:13.953425 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1409 13:52:13.959917 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1410 13:52:13.966615 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1411 13:52:13.973695 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1412 13:52:13.976569 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1413 13:52:13.983505 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1414 13:52:13.989747 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1415 13:52:13.996728 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1416 13:52:14.000159 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1417 13:52:14.006830 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1418 13:52:14.009995 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1419 13:52:14.013263 LPC: Trying to open IO window from 800 size 1ff
1420 13:52:14.023413 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1421 13:52:14.030280 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1422 13:52:14.040219 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1423 13:52:14.043514 DOMAIN: 0000 assign_resources, bus 0 link: 0
1424 13:52:14.049884 Root Device assign_resources, bus 0 link: 0
1425 13:52:14.049973 Done setting resources.
1426 13:52:14.056696 Show resources in subtree (Root Device)...After assigning values.
1427 13:52:14.063631 Root Device child on link 0 DOMAIN: 0000
1428 13:52:14.066977 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1429 13:52:14.076978 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1430 13:52:14.086817 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1431 13:52:14.086907 PCI: 00:00.0
1432 13:52:14.096899 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1433 13:52:14.106577 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1434 13:52:14.116461 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1435 13:52:14.126718 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1436 13:52:14.132949 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1437 13:52:14.143296 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1438 13:52:14.153035 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1439 13:52:14.163153 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1440 13:52:14.173261 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1441 13:52:14.179755 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1442 13:52:14.189896 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1443 13:52:14.199522 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1444 13:52:14.209756 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1445 13:52:14.219823 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1446 13:52:14.226194 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1447 13:52:14.236305 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1448 13:52:14.246265 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1449 13:52:14.255997 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1450 13:52:14.266185 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1451 13:52:14.276174 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1452 13:52:14.276294 PCI: 00:02.0
1453 13:52:14.289095 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1454 13:52:14.299347 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1455 13:52:14.309086 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1456 13:52:14.312506 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1457 13:52:14.322212 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1458 13:52:14.326132 GENERIC: 0.0
1459 13:52:14.326246 PCI: 00:05.0
1460 13:52:14.335701 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1461 13:52:14.342177 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1462 13:52:14.342259 GENERIC: 0.0
1463 13:52:14.345583 PCI: 00:08.0
1464 13:52:14.355717 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1465 13:52:14.355826 PCI: 00:0a.0
1466 13:52:14.362575 PCI: 00:0d.0 child on link 0 USB0 port 0
1467 13:52:14.372352 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1468 13:52:14.375724 USB0 port 0 child on link 0 USB3 port 0
1469 13:52:14.379146 USB3 port 0
1470 13:52:14.379265 USB3 port 1
1471 13:52:14.382504 USB3 port 2
1472 13:52:14.382622 USB3 port 3
1473 13:52:14.389023 PCI: 00:14.0 child on link 0 USB0 port 0
1474 13:52:14.399120 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1475 13:52:14.401975 USB0 port 0 child on link 0 USB2 port 0
1476 13:52:14.405412 USB2 port 0
1477 13:52:14.405537 USB2 port 1
1478 13:52:14.408836 USB2 port 2
1479 13:52:14.408993 USB2 port 3
1480 13:52:14.412225 USB2 port 4
1481 13:52:14.412344 USB2 port 5
1482 13:52:14.415700 USB2 port 6
1483 13:52:14.415810 USB2 port 7
1484 13:52:14.419056 USB2 port 8
1485 13:52:14.419168 USB2 port 9
1486 13:52:14.422020 USB3 port 0
1487 13:52:14.422137 USB3 port 1
1488 13:52:14.425436 USB3 port 2
1489 13:52:14.425571 USB3 port 3
1490 13:52:14.428905 PCI: 00:14.2
1491 13:52:14.439076 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1492 13:52:14.448651 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1493 13:52:14.451887 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1494 13:52:14.465595 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1495 13:52:14.465679 GENERIC: 0.0
1496 13:52:14.468792 PCI: 00:15.0 child on link 0 I2C: 00:1a
1497 13:52:14.481975 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1498 13:52:14.482061 I2C: 00:1a
1499 13:52:14.482135 I2C: 00:31
1500 13:52:14.485313 I2C: 00:32
1501 13:52:14.488849 PCI: 00:15.1 child on link 0 I2C: 00:10
1502 13:52:14.498738 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1503 13:52:14.502133 I2C: 00:10
1504 13:52:14.502215 PCI: 00:15.2
1505 13:52:14.511980 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1506 13:52:14.515560 PCI: 00:15.3
1507 13:52:14.524982 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1508 13:52:14.528291 PCI: 00:16.0
1509 13:52:14.538494 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1510 13:52:14.538591 PCI: 00:19.0
1511 13:52:14.541826 PCI: 00:19.1 child on link 0 I2C: 00:15
1512 13:52:14.555225 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1513 13:52:14.555343 I2C: 00:15
1514 13:52:14.558469 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1515 13:52:14.568236 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1516 13:52:14.581672 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1517 13:52:14.591609 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1518 13:52:14.591723 GENERIC: 0.0
1519 13:52:14.595019 PCI: 01:00.0
1520 13:52:14.604998 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1521 13:52:14.614927 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1522 13:52:14.624543 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1523 13:52:14.627951 PCI: 00:1e.0
1524 13:52:14.638198 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1525 13:52:14.641577 PCI: 00:1e.2 child on link 0 SPI: 00
1526 13:52:14.654668 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1527 13:52:14.654756 SPI: 00
1528 13:52:14.658044 PCI: 00:1e.3 child on link 0 SPI: 00
1529 13:52:14.668005 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1530 13:52:14.671482 SPI: 00
1531 13:52:14.674875 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1532 13:52:14.684691 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1533 13:52:14.684799 PNP: 0c09.0
1534 13:52:14.694614 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1535 13:52:14.697921 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1536 13:52:14.707844 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1537 13:52:14.717903 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1538 13:52:14.721357 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1539 13:52:14.724676 GENERIC: 0.0
1540 13:52:14.724752 GENERIC: 1.0
1541 13:52:14.727538 PCI: 00:1f.3
1542 13:52:14.737836 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1543 13:52:14.747725 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1544 13:52:14.747877 PCI: 00:1f.5
1545 13:52:14.760787 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1546 13:52:14.764127 CPU_CLUSTER: 0 child on link 0 APIC: 00
1547 13:52:14.764235 APIC: 00
1548 13:52:14.767610 APIC: 01
1549 13:52:14.767692 APIC: 03
1550 13:52:14.767760 APIC: 07
1551 13:52:14.770993 APIC: 05
1552 13:52:14.771099 APIC: 02
1553 13:52:14.771193 APIC: 06
1554 13:52:14.774321 APIC: 04
1555 13:52:14.777730 Done allocating resources.
1556 13:52:14.784294 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1557 13:52:14.787622 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1558 13:52:14.794432 Configure GPIOs for I2S audio on UP4.
1559 13:52:14.800592 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1560 13:52:14.800670 Enabling resources...
1561 13:52:14.807566 PCI: 00:00.0 subsystem <- 8086/9a12
1562 13:52:14.807672 PCI: 00:00.0 cmd <- 06
1563 13:52:14.810867 PCI: 00:02.0 subsystem <- 8086/9a40
1564 13:52:14.813978 PCI: 00:02.0 cmd <- 03
1565 13:52:14.817514 PCI: 00:04.0 subsystem <- 8086/9a03
1566 13:52:14.820867 PCI: 00:04.0 cmd <- 02
1567 13:52:14.824184 PCI: 00:05.0 subsystem <- 8086/9a19
1568 13:52:14.827616 PCI: 00:05.0 cmd <- 02
1569 13:52:14.830492 PCI: 00:08.0 subsystem <- 8086/9a11
1570 13:52:14.833910 PCI: 00:08.0 cmd <- 06
1571 13:52:14.837301 PCI: 00:0d.0 subsystem <- 8086/9a13
1572 13:52:14.840798 PCI: 00:0d.0 cmd <- 02
1573 13:52:14.843689 PCI: 00:14.0 subsystem <- 8086/a0ed
1574 13:52:14.843765 PCI: 00:14.0 cmd <- 02
1575 13:52:14.850923 PCI: 00:14.2 subsystem <- 8086/a0ef
1576 13:52:14.851008 PCI: 00:14.2 cmd <- 02
1577 13:52:14.854141 PCI: 00:14.3 subsystem <- 8086/a0f0
1578 13:52:14.857456 PCI: 00:14.3 cmd <- 02
1579 13:52:14.860965 PCI: 00:15.0 subsystem <- 8086/a0e8
1580 13:52:14.864516 PCI: 00:15.0 cmd <- 02
1581 13:52:14.867285 PCI: 00:15.1 subsystem <- 8086/a0e9
1582 13:52:14.871178 PCI: 00:15.1 cmd <- 02
1583 13:52:14.874069 PCI: 00:15.2 subsystem <- 8086/a0ea
1584 13:52:14.877447 PCI: 00:15.2 cmd <- 02
1585 13:52:14.880912 PCI: 00:15.3 subsystem <- 8086/a0eb
1586 13:52:14.884224 PCI: 00:15.3 cmd <- 02
1587 13:52:14.887679 PCI: 00:16.0 subsystem <- 8086/a0e0
1588 13:52:14.887781 PCI: 00:16.0 cmd <- 02
1589 13:52:14.894241 PCI: 00:19.1 subsystem <- 8086/a0c6
1590 13:52:14.894324 PCI: 00:19.1 cmd <- 02
1591 13:52:14.897760 PCI: 00:1d.0 bridge ctrl <- 0013
1592 13:52:14.901015 PCI: 00:1d.0 subsystem <- 8086/a0b0
1593 13:52:14.904438 PCI: 00:1d.0 cmd <- 06
1594 13:52:14.907849 PCI: 00:1e.0 subsystem <- 8086/a0a8
1595 13:52:14.911166 PCI: 00:1e.0 cmd <- 06
1596 13:52:14.914243 PCI: 00:1e.2 subsystem <- 8086/a0aa
1597 13:52:14.917430 PCI: 00:1e.2 cmd <- 06
1598 13:52:14.920904 PCI: 00:1e.3 subsystem <- 8086/a0ab
1599 13:52:14.924176 PCI: 00:1e.3 cmd <- 02
1600 13:52:14.927674 PCI: 00:1f.0 subsystem <- 8086/a087
1601 13:52:14.931022 PCI: 00:1f.0 cmd <- 407
1602 13:52:14.934434 PCI: 00:1f.3 subsystem <- 8086/a0c8
1603 13:52:14.934516 PCI: 00:1f.3 cmd <- 02
1604 13:52:14.941175 PCI: 00:1f.5 subsystem <- 8086/a0a4
1605 13:52:14.941257 PCI: 00:1f.5 cmd <- 406
1606 13:52:14.946497 PCI: 01:00.0 cmd <- 02
1607 13:52:14.950999 done.
1608 13:52:14.954267 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1609 13:52:14.957485 Initializing devices...
1610 13:52:14.960856 Root Device init
1611 13:52:14.964290 Chrome EC: Set SMI mask to 0x0000000000000000
1612 13:52:14.971034 Chrome EC: clear events_b mask to 0x0000000000000000
1613 13:52:14.977707 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1614 13:52:14.981037 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1615 13:52:14.987491 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1616 13:52:14.993991 Chrome EC: Set WAKE mask to 0x0000000000000000
1617 13:52:14.997362 fw_config match found: DB_USB=USB3_ACTIVE
1618 13:52:15.004302 Configure Right Type-C port orientation for retimer
1619 13:52:15.007645 Root Device init finished in 43 msecs
1620 13:52:15.010492 PCI: 00:00.0 init
1621 13:52:15.013921 CPU TDP = 9 Watts
1622 13:52:15.014000 CPU PL1 = 9 Watts
1623 13:52:15.017245 CPU PL2 = 40 Watts
1624 13:52:15.017320 CPU PL4 = 83 Watts
1625 13:52:15.023723 PCI: 00:00.0 init finished in 8 msecs
1626 13:52:15.023808 PCI: 00:02.0 init
1627 13:52:15.027452 GMA: Found VBT in CBFS
1628 13:52:15.030817 GMA: Found valid VBT in CBFS
1629 13:52:15.036972 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1630 13:52:15.043842 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1631 13:52:15.047226 PCI: 00:02.0 init finished in 18 msecs
1632 13:52:15.050690 PCI: 00:05.0 init
1633 13:52:15.053604 PCI: 00:05.0 init finished in 0 msecs
1634 13:52:15.057273 PCI: 00:08.0 init
1635 13:52:15.060692 PCI: 00:08.0 init finished in 0 msecs
1636 13:52:15.063500 PCI: 00:14.0 init
1637 13:52:15.066885 PCI: 00:14.0 init finished in 0 msecs
1638 13:52:15.070382 PCI: 00:14.2 init
1639 13:52:15.073844 PCI: 00:14.2 init finished in 0 msecs
1640 13:52:15.073944 PCI: 00:15.0 init
1641 13:52:15.077107 I2C bus 0 version 0x3230302a
1642 13:52:15.080394 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1643 13:52:15.087122 PCI: 00:15.0 init finished in 6 msecs
1644 13:52:15.087238 PCI: 00:15.1 init
1645 13:52:15.090672 I2C bus 1 version 0x3230302a
1646 13:52:15.093599 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1647 13:52:15.096856 PCI: 00:15.1 init finished in 6 msecs
1648 13:52:15.100177 PCI: 00:15.2 init
1649 13:52:15.103366 I2C bus 2 version 0x3230302a
1650 13:52:15.106776 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1651 13:52:15.110221 PCI: 00:15.2 init finished in 6 msecs
1652 13:52:15.113598 PCI: 00:15.3 init
1653 13:52:15.117078 I2C bus 3 version 0x3230302a
1654 13:52:15.120474 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1655 13:52:15.123805 PCI: 00:15.3 init finished in 6 msecs
1656 13:52:15.127138 PCI: 00:16.0 init
1657 13:52:15.130431 PCI: 00:16.0 init finished in 0 msecs
1658 13:52:15.133571 PCI: 00:19.1 init
1659 13:52:15.133651 I2C bus 5 version 0x3230302a
1660 13:52:15.140422 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1661 13:52:15.143237 PCI: 00:19.1 init finished in 6 msecs
1662 13:52:15.143327 PCI: 00:1d.0 init
1663 13:52:15.146722 Initializing PCH PCIe bridge.
1664 13:52:15.150128 PCI: 00:1d.0 init finished in 3 msecs
1665 13:52:15.154115 PCI: 00:1f.0 init
1666 13:52:15.157423 IOAPIC: Initializing IOAPIC at 0xfec00000
1667 13:52:15.164280 IOAPIC: Bootstrap Processor Local APIC = 0x00
1668 13:52:15.164393 IOAPIC: ID = 0x02
1669 13:52:15.167552 IOAPIC: Dumping registers
1670 13:52:15.170963 reg 0x0000: 0x02000000
1671 13:52:15.174499 reg 0x0001: 0x00770020
1672 13:52:15.174583 reg 0x0002: 0x00000000
1673 13:52:15.180743 PCI: 00:1f.0 init finished in 21 msecs
1674 13:52:15.180828 PCI: 00:1f.2 init
1675 13:52:15.184660 Disabling ACPI via APMC.
1676 13:52:15.187570 APMC done.
1677 13:52:15.190874 PCI: 00:1f.2 init finished in 5 msecs
1678 13:52:15.202657 PCI: 01:00.0 init
1679 13:52:15.205810 PCI: 01:00.0 init finished in 0 msecs
1680 13:52:15.209263 PNP: 0c09.0 init
1681 13:52:15.212720 Google Chrome EC uptime: 8.354 seconds
1682 13:52:15.219430 Google Chrome AP resets since EC boot: 1
1683 13:52:15.222880 Google Chrome most recent AP reset causes:
1684 13:52:15.225760 0.347: 32775 shutdown: entering G3
1685 13:52:15.232510 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1686 13:52:15.235760 PNP: 0c09.0 init finished in 22 msecs
1687 13:52:15.241873 Devices initialized
1688 13:52:15.245096 Show all devs... After init.
1689 13:52:15.248376 Root Device: enabled 1
1690 13:52:15.248489 DOMAIN: 0000: enabled 1
1691 13:52:15.251259 CPU_CLUSTER: 0: enabled 1
1692 13:52:15.254754 PCI: 00:00.0: enabled 1
1693 13:52:15.258049 PCI: 00:02.0: enabled 1
1694 13:52:15.258155 PCI: 00:04.0: enabled 1
1695 13:52:15.261423 PCI: 00:05.0: enabled 1
1696 13:52:15.264804 PCI: 00:06.0: enabled 0
1697 13:52:15.268225 PCI: 00:07.0: enabled 0
1698 13:52:15.268329 PCI: 00:07.1: enabled 0
1699 13:52:15.271539 PCI: 00:07.2: enabled 0
1700 13:52:15.275085 PCI: 00:07.3: enabled 0
1701 13:52:15.277950 PCI: 00:08.0: enabled 1
1702 13:52:15.278065 PCI: 00:09.0: enabled 0
1703 13:52:15.281189 PCI: 00:0a.0: enabled 0
1704 13:52:15.284577 PCI: 00:0d.0: enabled 1
1705 13:52:15.287894 PCI: 00:0d.1: enabled 0
1706 13:52:15.288004 PCI: 00:0d.2: enabled 0
1707 13:52:15.291094 PCI: 00:0d.3: enabled 0
1708 13:52:15.294560 PCI: 00:0e.0: enabled 0
1709 13:52:15.294662 PCI: 00:10.2: enabled 1
1710 13:52:15.297967 PCI: 00:10.6: enabled 0
1711 13:52:15.301302 PCI: 00:10.7: enabled 0
1712 13:52:15.304945 PCI: 00:12.0: enabled 0
1713 13:52:15.305054 PCI: 00:12.6: enabled 0
1714 13:52:15.307750 PCI: 00:13.0: enabled 0
1715 13:52:15.311454 PCI: 00:14.0: enabled 1
1716 13:52:15.314771 PCI: 00:14.1: enabled 0
1717 13:52:15.314879 PCI: 00:14.2: enabled 1
1718 13:52:15.318173 PCI: 00:14.3: enabled 1
1719 13:52:15.321645 PCI: 00:15.0: enabled 1
1720 13:52:15.324490 PCI: 00:15.1: enabled 1
1721 13:52:15.324573 PCI: 00:15.2: enabled 1
1722 13:52:15.327943 PCI: 00:15.3: enabled 1
1723 13:52:15.331339 PCI: 00:16.0: enabled 1
1724 13:52:15.331421 PCI: 00:16.1: enabled 0
1725 13:52:15.334744 PCI: 00:16.2: enabled 0
1726 13:52:15.337958 PCI: 00:16.3: enabled 0
1727 13:52:15.341200 PCI: 00:16.4: enabled 0
1728 13:52:15.341283 PCI: 00:16.5: enabled 0
1729 13:52:15.344936 PCI: 00:17.0: enabled 0
1730 13:52:15.348237 PCI: 00:19.0: enabled 0
1731 13:52:15.351288 PCI: 00:19.1: enabled 1
1732 13:52:15.351396 PCI: 00:19.2: enabled 0
1733 13:52:15.354567 PCI: 00:1c.0: enabled 1
1734 13:52:15.357936 PCI: 00:1c.1: enabled 0
1735 13:52:15.361384 PCI: 00:1c.2: enabled 0
1736 13:52:15.361505 PCI: 00:1c.3: enabled 0
1737 13:52:15.364738 PCI: 00:1c.4: enabled 0
1738 13:52:15.367722 PCI: 00:1c.5: enabled 0
1739 13:52:15.367823 PCI: 00:1c.6: enabled 1
1740 13:52:15.371049 PCI: 00:1c.7: enabled 0
1741 13:52:15.374392 PCI: 00:1d.0: enabled 1
1742 13:52:15.377810 PCI: 00:1d.1: enabled 0
1743 13:52:15.377897 PCI: 00:1d.2: enabled 1
1744 13:52:15.381203 PCI: 00:1d.3: enabled 0
1745 13:52:15.384731 PCI: 00:1e.0: enabled 1
1746 13:52:15.388054 PCI: 00:1e.1: enabled 0
1747 13:52:15.388163 PCI: 00:1e.2: enabled 1
1748 13:52:15.391385 PCI: 00:1e.3: enabled 1
1749 13:52:15.394591 PCI: 00:1f.0: enabled 1
1750 13:52:15.397981 PCI: 00:1f.1: enabled 0
1751 13:52:15.398087 PCI: 00:1f.2: enabled 1
1752 13:52:15.401305 PCI: 00:1f.3: enabled 1
1753 13:52:15.404790 PCI: 00:1f.4: enabled 0
1754 13:52:15.404919 PCI: 00:1f.5: enabled 1
1755 13:52:15.407663 PCI: 00:1f.6: enabled 0
1756 13:52:15.411061 PCI: 00:1f.7: enabled 0
1757 13:52:15.414198 APIC: 00: enabled 1
1758 13:52:15.414314 GENERIC: 0.0: enabled 1
1759 13:52:15.417519 GENERIC: 0.0: enabled 1
1760 13:52:15.420937 GENERIC: 1.0: enabled 1
1761 13:52:15.421039 GENERIC: 0.0: enabled 1
1762 13:52:15.424229 GENERIC: 1.0: enabled 1
1763 13:52:15.427706 USB0 port 0: enabled 1
1764 13:52:15.431156 GENERIC: 0.0: enabled 1
1765 13:52:15.431271 USB0 port 0: enabled 1
1766 13:52:15.434632 GENERIC: 0.0: enabled 1
1767 13:52:15.437998 I2C: 00:1a: enabled 1
1768 13:52:15.438113 I2C: 00:31: enabled 1
1769 13:52:15.440745 I2C: 00:32: enabled 1
1770 13:52:15.444107 I2C: 00:10: enabled 1
1771 13:52:15.444196 I2C: 00:15: enabled 1
1772 13:52:15.447449 GENERIC: 0.0: enabled 0
1773 13:52:15.451273 GENERIC: 1.0: enabled 0
1774 13:52:15.454557 GENERIC: 0.0: enabled 1
1775 13:52:15.454640 SPI: 00: enabled 1
1776 13:52:15.457725 SPI: 00: enabled 1
1777 13:52:15.460895 PNP: 0c09.0: enabled 1
1778 13:52:15.460987 GENERIC: 0.0: enabled 1
1779 13:52:15.464398 USB3 port 0: enabled 1
1780 13:52:15.467419 USB3 port 1: enabled 1
1781 13:52:15.467513 USB3 port 2: enabled 0
1782 13:52:15.470714 USB3 port 3: enabled 0
1783 13:52:15.474047 USB2 port 0: enabled 0
1784 13:52:15.477296 USB2 port 1: enabled 1
1785 13:52:15.477407 USB2 port 2: enabled 1
1786 13:52:15.480742 USB2 port 3: enabled 0
1787 13:52:15.484284 USB2 port 4: enabled 1
1788 13:52:15.484403 USB2 port 5: enabled 0
1789 13:52:15.487664 USB2 port 6: enabled 0
1790 13:52:15.491019 USB2 port 7: enabled 0
1791 13:52:15.491119 USB2 port 8: enabled 0
1792 13:52:15.493879 USB2 port 9: enabled 0
1793 13:52:15.497673 USB3 port 0: enabled 0
1794 13:52:15.501009 USB3 port 1: enabled 1
1795 13:52:15.501100 USB3 port 2: enabled 0
1796 13:52:15.503852 USB3 port 3: enabled 0
1797 13:52:15.507253 GENERIC: 0.0: enabled 1
1798 13:52:15.507345 GENERIC: 1.0: enabled 1
1799 13:52:15.510697 APIC: 01: enabled 1
1800 13:52:15.514129 APIC: 03: enabled 1
1801 13:52:15.514215 APIC: 07: enabled 1
1802 13:52:15.517422 APIC: 05: enabled 1
1803 13:52:15.520622 APIC: 02: enabled 1
1804 13:52:15.520721 APIC: 06: enabled 1
1805 13:52:15.523987 APIC: 04: enabled 1
1806 13:52:15.527419 PCI: 01:00.0: enabled 1
1807 13:52:15.530847 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1808 13:52:15.537212 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1809 13:52:15.540604 ELOG: NV offset 0xf30000 size 0x1000
1810 13:52:15.546911 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1811 13:52:15.553644 ELOG: Event(17) added with size 13 at 2023-04-20 13:52:14 UTC
1812 13:52:15.560699 ELOG: Event(92) added with size 9 at 2023-04-20 13:52:14 UTC
1813 13:52:15.567187 ELOG: Event(93) added with size 9 at 2023-04-20 13:52:14 UTC
1814 13:52:15.573864 ELOG: Event(9E) added with size 10 at 2023-04-20 13:52:14 UTC
1815 13:52:15.580765 ELOG: Event(9F) added with size 14 at 2023-04-20 13:52:14 UTC
1816 13:52:15.583530 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1817 13:52:15.590312 ELOG: Event(A1) added with size 10 at 2023-04-20 13:52:14 UTC
1818 13:52:15.600446 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1819 13:52:15.607215 ELOG: Event(A0) added with size 9 at 2023-04-20 13:52:14 UTC
1820 13:52:15.610582 elog_add_boot_reason: Logged dev mode boot
1821 13:52:15.616729 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1822 13:52:15.616816 Finalize devices...
1823 13:52:15.620168 Devices finalized
1824 13:52:15.623568 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1825 13:52:15.630605 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1826 13:52:15.636886 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1827 13:52:15.640278 ME: HFSTS1 : 0x80030055
1828 13:52:15.643723 ME: HFSTS2 : 0x30280116
1829 13:52:15.650525 ME: HFSTS3 : 0x00000050
1830 13:52:15.653258 ME: HFSTS4 : 0x00004000
1831 13:52:15.656660 ME: HFSTS5 : 0x00000000
1832 13:52:15.663792 ME: HFSTS6 : 0x00400006
1833 13:52:15.667113 ME: Manufacturing Mode : YES
1834 13:52:15.670493 ME: SPI Protection Mode Enabled : NO
1835 13:52:15.673735 ME: FW Partition Table : OK
1836 13:52:15.677091 ME: Bringup Loader Failure : NO
1837 13:52:15.679985 ME: Firmware Init Complete : NO
1838 13:52:15.686572 ME: Boot Options Present : NO
1839 13:52:15.689960 ME: Update In Progress : NO
1840 13:52:15.693444 ME: D0i3 Support : YES
1841 13:52:15.696755 ME: Low Power State Enabled : NO
1842 13:52:15.699741 ME: CPU Replaced : YES
1843 13:52:15.703002 ME: CPU Replacement Valid : YES
1844 13:52:15.706838 ME: Current Working State : 5
1845 13:52:15.710111 ME: Current Operation State : 1
1846 13:52:15.716587 ME: Current Operation Mode : 3
1847 13:52:15.719959 ME: Error Code : 0
1848 13:52:15.723234 ME: Enhanced Debug Mode : NO
1849 13:52:15.726587 ME: CPU Debug Disabled : YES
1850 13:52:15.729929 ME: TXT Support : NO
1851 13:52:15.736542 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1852 13:52:15.742874 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1853 13:52:15.746223 CBFS: 'fallback/slic' not found.
1854 13:52:15.749743 ACPI: Writing ACPI tables at 76b01000.
1855 13:52:15.753121 ACPI: * FACS
1856 13:52:15.753214 ACPI: * DSDT
1857 13:52:15.756473 Ramoops buffer: 0x100000@0x76a00000.
1858 13:52:15.762747 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1859 13:52:15.766691 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1860 13:52:15.769926 Google Chrome EC: version:
1861 13:52:15.773110 ro: voema_v2.0.7540-147f8d37d1
1862 13:52:15.776352 rw: voema_v2.0.7540-147f8d37d1
1863 13:52:15.779513 running image: 2
1864 13:52:15.786291 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1865 13:52:15.789701 ACPI: * FADT
1866 13:52:15.789788 SCI is IRQ9
1867 13:52:15.793028 ACPI: added table 1/32, length now 40
1868 13:52:15.796304 ACPI: * SSDT
1869 13:52:15.799723 Found 1 CPU(s) with 8 core(s) each.
1870 13:52:15.803172 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1871 13:52:15.809399 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1872 13:52:15.813162 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1873 13:52:15.815898 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1874 13:52:15.823274 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1875 13:52:15.829362 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1876 13:52:15.833266 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1877 13:52:15.839352 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1878 13:52:15.845940 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1879 13:52:15.849249 \_SB.PCI0.RP09: Added StorageD3Enable property
1880 13:52:15.852711 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1881 13:52:15.859085 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1882 13:52:15.865957 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1883 13:52:15.869252 PS2K: Passing 80 keymaps to kernel
1884 13:52:15.875958 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1885 13:52:15.882902 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1886 13:52:15.889507 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1887 13:52:15.896227 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1888 13:52:15.902514 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1889 13:52:15.909340 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1890 13:52:15.916014 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1891 13:52:15.922689 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1892 13:52:15.925551 ACPI: added table 2/32, length now 44
1893 13:52:15.925692 ACPI: * MCFG
1894 13:52:15.929101 ACPI: added table 3/32, length now 48
1895 13:52:15.932300 ACPI: * TPM2
1896 13:52:15.935796 TPM2 log created at 0x769f0000
1897 13:52:15.939139 ACPI: added table 4/32, length now 52
1898 13:52:15.942474 ACPI: * MADT
1899 13:52:15.942566 SCI is IRQ9
1900 13:52:15.945980 ACPI: added table 5/32, length now 56
1901 13:52:15.948838 current = 76b09850
1902 13:52:15.948941 ACPI: * DMAR
1903 13:52:15.952211 ACPI: added table 6/32, length now 60
1904 13:52:15.955676 ACPI: added table 7/32, length now 64
1905 13:52:15.959245 ACPI: * HPET
1906 13:52:15.962630 ACPI: added table 8/32, length now 68
1907 13:52:15.962717 ACPI: done.
1908 13:52:15.965959 ACPI tables: 35216 bytes.
1909 13:52:15.968805 smbios_write_tables: 769ef000
1910 13:52:15.972229 EC returned error result code 3
1911 13:52:15.975678 Couldn't obtain OEM name from CBI
1912 13:52:15.979020 Create SMBIOS type 16
1913 13:52:15.982320 Create SMBIOS type 17
1914 13:52:15.985517 GENERIC: 0.0 (WIFI Device)
1915 13:52:15.985612 SMBIOS tables: 1750 bytes.
1916 13:52:15.992294 Writing table forward entry at 0x00000500
1917 13:52:15.998804 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1918 13:52:16.002119 Writing coreboot table at 0x76b25000
1919 13:52:16.008809 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1920 13:52:16.012213 1. 0000000000001000-000000000009ffff: RAM
1921 13:52:16.015662 2. 00000000000a0000-00000000000fffff: RESERVED
1922 13:52:16.022401 3. 0000000000100000-00000000769eefff: RAM
1923 13:52:16.025741 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1924 13:52:16.032011 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1925 13:52:16.038921 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1926 13:52:16.042324 7. 0000000077000000-000000007fbfffff: RESERVED
1927 13:52:16.045715 8. 00000000c0000000-00000000cfffffff: RESERVED
1928 13:52:16.051984 9. 00000000f8000000-00000000f9ffffff: RESERVED
1929 13:52:16.055371 10. 00000000fb000000-00000000fb000fff: RESERVED
1930 13:52:16.062290 11. 00000000fe000000-00000000fe00ffff: RESERVED
1931 13:52:16.065249 12. 00000000fed80000-00000000fed87fff: RESERVED
1932 13:52:16.072215 13. 00000000fed90000-00000000fed92fff: RESERVED
1933 13:52:16.075528 14. 00000000feda0000-00000000feda1fff: RESERVED
1934 13:52:16.078482 15. 00000000fedc0000-00000000feddffff: RESERVED
1935 13:52:16.085353 16. 0000000100000000-00000002803fffff: RAM
1936 13:52:16.088836 Passing 4 GPIOs to payload:
1937 13:52:16.092005 NAME | PORT | POLARITY | VALUE
1938 13:52:16.098490 lid | undefined | high | high
1939 13:52:16.102217 power | undefined | high | low
1940 13:52:16.108760 oprom | undefined | high | low
1941 13:52:16.115506 EC in RW | 0x000000e5 | high | high
1942 13:52:16.118892 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 5cea
1943 13:52:16.122362 coreboot table: 1576 bytes.
1944 13:52:16.125453 IMD ROOT 0. 0x76fff000 0x00001000
1945 13:52:16.132299 IMD SMALL 1. 0x76ffe000 0x00001000
1946 13:52:16.135198 FSP MEMORY 2. 0x76c4e000 0x003b0000
1947 13:52:16.138604 VPD 3. 0x76c4d000 0x00000367
1948 13:52:16.142065 RO MCACHE 4. 0x76c4c000 0x00000fdc
1949 13:52:16.145492 CONSOLE 5. 0x76c2c000 0x00020000
1950 13:52:16.148922 FMAP 6. 0x76c2b000 0x00000578
1951 13:52:16.151748 TIME STAMP 7. 0x76c2a000 0x00000910
1952 13:52:16.155346 VBOOT WORK 8. 0x76c16000 0x00014000
1953 13:52:16.162158 ROMSTG STCK 9. 0x76c15000 0x00001000
1954 13:52:16.165048 AFTER CAR 10. 0x76c0a000 0x0000b000
1955 13:52:16.168452 RAMSTAGE 11. 0x76b97000 0x00073000
1956 13:52:16.171902 REFCODE 12. 0x76b42000 0x00055000
1957 13:52:16.175221 SMM BACKUP 13. 0x76b32000 0x00010000
1958 13:52:16.178678 4f444749 14. 0x76b30000 0x00002000
1959 13:52:16.182104 EXT VBT15. 0x76b2d000 0x0000219f
1960 13:52:16.184952 COREBOOT 16. 0x76b25000 0x00008000
1961 13:52:16.188472 ACPI 17. 0x76b01000 0x00024000
1962 13:52:16.191940 ACPI GNVS 18. 0x76b00000 0x00001000
1963 13:52:16.198722 RAMOOPS 19. 0x76a00000 0x00100000
1964 13:52:16.201615 TPM2 TCGLOG20. 0x769f0000 0x00010000
1965 13:52:16.205001 SMBIOS 21. 0x769ef000 0x00000800
1966 13:52:16.205110 IMD small region:
1967 13:52:16.211848 IMD ROOT 0. 0x76ffec00 0x00000400
1968 13:52:16.215146 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1969 13:52:16.218490 POWER STATE 2. 0x76ffeb80 0x00000044
1970 13:52:16.221713 ROMSTAGE 3. 0x76ffeb60 0x00000004
1971 13:52:16.225057 MEM INFO 4. 0x76ffe980 0x000001e0
1972 13:52:16.231614 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1973 13:52:16.234952 MTRR: Physical address space:
1974 13:52:16.241751 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1975 13:52:16.248603 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1976 13:52:16.255306 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1977 13:52:16.258080 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1978 13:52:16.264861 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1979 13:52:16.271709 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1980 13:52:16.278476 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1981 13:52:16.281331 MTRR: Fixed MSR 0x250 0x0606060606060606
1982 13:52:16.288135 MTRR: Fixed MSR 0x258 0x0606060606060606
1983 13:52:16.291814 MTRR: Fixed MSR 0x259 0x0000000000000000
1984 13:52:16.294718 MTRR: Fixed MSR 0x268 0x0606060606060606
1985 13:52:16.298176 MTRR: Fixed MSR 0x269 0x0606060606060606
1986 13:52:16.304902 MTRR: Fixed MSR 0x26a 0x0606060606060606
1987 13:52:16.307863 MTRR: Fixed MSR 0x26b 0x0606060606060606
1988 13:52:16.311288 MTRR: Fixed MSR 0x26c 0x0606060606060606
1989 13:52:16.314548 MTRR: Fixed MSR 0x26d 0x0606060606060606
1990 13:52:16.321366 MTRR: Fixed MSR 0x26e 0x0606060606060606
1991 13:52:16.324659 MTRR: Fixed MSR 0x26f 0x0606060606060606
1992 13:52:16.327843 call enable_fixed_mtrr()
1993 13:52:16.331584 CPU physical address size: 39 bits
1994 13:52:16.334907 MTRR: default type WB/UC MTRR counts: 6/6.
1995 13:52:16.338208 MTRR: UC selected as default type.
1996 13:52:16.344507 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1997 13:52:16.351279 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1998 13:52:16.357829 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1999 13:52:16.364686 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2000 13:52:16.371542 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2001 13:52:16.377819 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2002 13:52:16.381300 MTRR: Fixed MSR 0x250 0x0606060606060606
2003 13:52:16.384787 MTRR: Fixed MSR 0x258 0x0606060606060606
2004 13:52:16.391147 MTRR: Fixed MSR 0x259 0x0000000000000000
2005 13:52:16.394574 MTRR: Fixed MSR 0x268 0x0606060606060606
2006 13:52:16.398029 MTRR: Fixed MSR 0x269 0x0606060606060606
2007 13:52:16.400945 MTRR: Fixed MSR 0x26a 0x0606060606060606
2008 13:52:16.407644 MTRR: Fixed MSR 0x26b 0x0606060606060606
2009 13:52:16.411139 MTRR: Fixed MSR 0x26c 0x0606060606060606
2010 13:52:16.414493 MTRR: Fixed MSR 0x26d 0x0606060606060606
2011 13:52:16.417880 MTRR: Fixed MSR 0x26e 0x0606060606060606
2012 13:52:16.424152 MTRR: Fixed MSR 0x26f 0x0606060606060606
2013 13:52:16.424237
2014 13:52:16.424312 MTRR check
2015 13:52:16.427488 call enable_fixed_mtrr()
2016 13:52:16.430823 Fixed MTRRs : Enabled
2017 13:52:16.434401 Variable MTRRs: Enabled
2018 13:52:16.434485
2019 13:52:16.437597 CPU physical address size: 39 bits
2020 13:52:16.443910 BS: BS_WRITE_TABLES exit times (exec / console): 50 / 151 ms
2021 13:52:16.447510 MTRR: Fixed MSR 0x250 0x0606060606060606
2022 13:52:16.450731 MTRR: Fixed MSR 0x250 0x0606060606060606
2023 13:52:16.457679 MTRR: Fixed MSR 0x258 0x0606060606060606
2024 13:52:16.460936 MTRR: Fixed MSR 0x259 0x0000000000000000
2025 13:52:16.464321 MTRR: Fixed MSR 0x268 0x0606060606060606
2026 13:52:16.467694 MTRR: Fixed MSR 0x269 0x0606060606060606
2027 13:52:16.470613 MTRR: Fixed MSR 0x26a 0x0606060606060606
2028 13:52:16.477426 MTRR: Fixed MSR 0x26b 0x0606060606060606
2029 13:52:16.480873 MTRR: Fixed MSR 0x26c 0x0606060606060606
2030 13:52:16.484217 MTRR: Fixed MSR 0x26d 0x0606060606060606
2031 13:52:16.487595 MTRR: Fixed MSR 0x26e 0x0606060606060606
2032 13:52:16.493946 MTRR: Fixed MSR 0x26f 0x0606060606060606
2033 13:52:16.497278 MTRR: Fixed MSR 0x258 0x0606060606060606
2034 13:52:16.500775 call enable_fixed_mtrr()
2035 13:52:16.504134 MTRR: Fixed MSR 0x259 0x0000000000000000
2036 13:52:16.507026 MTRR: Fixed MSR 0x268 0x0606060606060606
2037 13:52:16.513653 MTRR: Fixed MSR 0x269 0x0606060606060606
2038 13:52:16.517053 MTRR: Fixed MSR 0x26a 0x0606060606060606
2039 13:52:16.520395 MTRR: Fixed MSR 0x26b 0x0606060606060606
2040 13:52:16.523724 MTRR: Fixed MSR 0x26c 0x0606060606060606
2041 13:52:16.530866 MTRR: Fixed MSR 0x26d 0x0606060606060606
2042 13:52:16.533773 MTRR: Fixed MSR 0x26e 0x0606060606060606
2043 13:52:16.537070 MTRR: Fixed MSR 0x26f 0x0606060606060606
2044 13:52:16.540320 CPU physical address size: 39 bits
2045 13:52:16.545093 call enable_fixed_mtrr()
2046 13:52:16.547941 MTRR: Fixed MSR 0x250 0x0606060606060606
2047 13:52:16.555064 MTRR: Fixed MSR 0x250 0x0606060606060606
2048 13:52:16.558157 MTRR: Fixed MSR 0x258 0x0606060606060606
2049 13:52:16.561518 MTRR: Fixed MSR 0x259 0x0000000000000000
2050 13:52:16.564876 MTRR: Fixed MSR 0x268 0x0606060606060606
2051 13:52:16.571664 MTRR: Fixed MSR 0x269 0x0606060606060606
2052 13:52:16.575052 MTRR: Fixed MSR 0x26a 0x0606060606060606
2053 13:52:16.578394 MTRR: Fixed MSR 0x26b 0x0606060606060606
2054 13:52:16.581728 MTRR: Fixed MSR 0x26c 0x0606060606060606
2055 13:52:16.587860 MTRR: Fixed MSR 0x26d 0x0606060606060606
2056 13:52:16.591219 MTRR: Fixed MSR 0x26e 0x0606060606060606
2057 13:52:16.594660 MTRR: Fixed MSR 0x26f 0x0606060606060606
2058 13:52:16.601458 MTRR: Fixed MSR 0x258 0x0606060606060606
2059 13:52:16.604972 MTRR: Fixed MSR 0x259 0x0000000000000000
2060 13:52:16.607869 MTRR: Fixed MSR 0x268 0x0606060606060606
2061 13:52:16.611433 MTRR: Fixed MSR 0x269 0x0606060606060606
2062 13:52:16.614702 MTRR: Fixed MSR 0x26a 0x0606060606060606
2063 13:52:16.621454 MTRR: Fixed MSR 0x26b 0x0606060606060606
2064 13:52:16.624844 MTRR: Fixed MSR 0x26c 0x0606060606060606
2065 13:52:16.628047 MTRR: Fixed MSR 0x26d 0x0606060606060606
2066 13:52:16.631238 MTRR: Fixed MSR 0x26e 0x0606060606060606
2067 13:52:16.637565 MTRR: Fixed MSR 0x26f 0x0606060606060606
2068 13:52:16.640956 call enable_fixed_mtrr()
2069 13:52:16.644406 call enable_fixed_mtrr()
2070 13:52:16.647563 CPU physical address size: 39 bits
2071 13:52:16.652207 Checking cr50 for pending updates
2072 13:52:16.652340 CPU physical address size: 39 bits
2073 13:52:16.656178 CPU physical address size: 39 bits
2074 13:52:16.659958 Reading cr50 TPM mode
2075 13:52:16.664112 MTRR: Fixed MSR 0x250 0x0606060606060606
2076 13:52:16.667316 MTRR: Fixed MSR 0x250 0x0606060606060606
2077 13:52:16.673882 MTRR: Fixed MSR 0x258 0x0606060606060606
2078 13:52:16.677257 MTRR: Fixed MSR 0x259 0x0000000000000000
2079 13:52:16.680697 MTRR: Fixed MSR 0x268 0x0606060606060606
2080 13:52:16.683579 MTRR: Fixed MSR 0x269 0x0606060606060606
2081 13:52:16.690504 MTRR: Fixed MSR 0x26a 0x0606060606060606
2082 13:52:16.693977 MTRR: Fixed MSR 0x26b 0x0606060606060606
2083 13:52:16.696943 MTRR: Fixed MSR 0x26c 0x0606060606060606
2084 13:52:16.700453 MTRR: Fixed MSR 0x26d 0x0606060606060606
2085 13:52:16.703762 MTRR: Fixed MSR 0x26e 0x0606060606060606
2086 13:52:16.710030 MTRR: Fixed MSR 0x26f 0x0606060606060606
2087 13:52:16.713524 MTRR: Fixed MSR 0x258 0x0606060606060606
2088 13:52:16.716919 call enable_fixed_mtrr()
2089 13:52:16.720128 MTRR: Fixed MSR 0x259 0x0000000000000000
2090 13:52:16.723429 MTRR: Fixed MSR 0x268 0x0606060606060606
2091 13:52:16.730294 MTRR: Fixed MSR 0x269 0x0606060606060606
2092 13:52:16.733592 MTRR: Fixed MSR 0x26a 0x0606060606060606
2093 13:52:16.736987 MTRR: Fixed MSR 0x26b 0x0606060606060606
2094 13:52:16.739797 MTRR: Fixed MSR 0x26c 0x0606060606060606
2095 13:52:16.746737 MTRR: Fixed MSR 0x26d 0x0606060606060606
2096 13:52:16.749985 MTRR: Fixed MSR 0x26e 0x0606060606060606
2097 13:52:16.753386 MTRR: Fixed MSR 0x26f 0x0606060606060606
2098 13:52:16.756742 CPU physical address size: 39 bits
2099 13:52:16.763375 call enable_fixed_mtrr()
2100 13:52:16.766216 BS: BS_PAYLOAD_LOAD entry times (exec / console): 215 / 6 ms
2101 13:52:16.769636 CPU physical address size: 39 bits
2102 13:52:16.779977 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2103 13:52:16.783262 Checking segment from ROM address 0xffc02b38
2104 13:52:16.786657 Checking segment from ROM address 0xffc02b54
2105 13:52:16.792933 Loading segment from ROM address 0xffc02b38
2106 13:52:16.796254 code (compression=0)
2107 13:52:16.803232 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2108 13:52:16.812959 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2109 13:52:16.813069 it's not compressed!
2110 13:52:16.953129 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2111 13:52:16.959750 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2112 13:52:16.966606 Loading segment from ROM address 0xffc02b54
2113 13:52:16.966726 Entry Point 0x30000000
2114 13:52:16.970036 Loaded segments
2115 13:52:16.976158 BS: BS_PAYLOAD_LOAD run times (exec / console): 139 / 63 ms
2116 13:52:17.019733 Finalizing chipset.
2117 13:52:17.022575 Finalizing SMM.
2118 13:52:17.022687 APMC done.
2119 13:52:17.029373 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2120 13:52:17.032696 mp_park_aps done after 0 msecs.
2121 13:52:17.035907 Jumping to boot code at 0x30000000(0x76b25000)
2122 13:52:17.046055 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2123 13:52:17.046209
2124 13:52:17.046311
2125 13:52:17.046434
2126 13:52:17.049244 Starting depthcharge on Voema...
2127 13:52:17.049344
2128 13:52:17.049768 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2129 13:52:17.049905 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2130 13:52:17.050000 Setting prompt string to ['volteer:']
2131 13:52:17.050094 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2132 13:52:17.059546 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2133 13:52:17.059673
2134 13:52:17.065961 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2135 13:52:17.066074
2136 13:52:17.069199 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2137 13:52:17.072674
2138 13:52:17.075619 Failed to find eMMC card reader
2139 13:52:17.075728
2140 13:52:17.075824 Wipe memory regions:
2141 13:52:17.075921
2142 13:52:17.082497 [0x00000000001000, 0x000000000a0000)
2143 13:52:17.082602
2144 13:52:17.085974 [0x00000000100000, 0x00000030000000)
2145 13:52:17.111285
2146 13:52:17.114550 [0x00000032662db0, 0x000000769ef000)
2147 13:52:17.150179
2148 13:52:17.153421 [0x00000100000000, 0x00000280400000)
2149 13:52:17.355397
2150 13:52:17.358770 ec_init: CrosEC protocol v3 supported (256, 256)
2151 13:52:17.358917
2152 13:52:17.365237 update_port_state: port C0 state: usb enable 1 mux conn 0
2153 13:52:17.365345
2154 13:52:17.374717 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2155 13:52:17.374825
2156 13:52:17.378067 pmc_check_ipc_sts: STS_BUSY done after 1562 us
2157 13:52:17.378212
2158 13:52:17.384807 send_conn_disc_msg: pmc_send_cmd succeeded
2159 13:52:17.815904
2160 13:52:17.816088 R8152: Initializing
2161 13:52:17.816204
2162 13:52:17.818740 Version 9 (ocp_data = 6010)
2163 13:52:17.818847
2164 13:52:17.822181 R8152: Done initializing
2165 13:52:17.822281
2166 13:52:17.825528 Adding net device
2167 13:52:18.128209
2168 13:52:18.131636 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2169 13:52:18.131749
2170 13:52:18.131849
2171 13:52:18.131950
2172 13:52:18.134685 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2174 13:52:18.235489 volteer: tftpboot 192.168.201.1 10062367/tftp-deploy-l10y4me_/kernel/bzImage 10062367/tftp-deploy-l10y4me_/kernel/cmdline 10062367/tftp-deploy-l10y4me_/ramdisk/ramdisk.cpio.gz
2175 13:52:18.235689 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2176 13:52:18.235801 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2177 13:52:18.240030 tftpboot 192.168.201.1 10062367/tftp-deploy-l10y4me_/kernel/bzImploy-l10y4me_/kernel/cmdline 10062367/tftp-deploy-l10y4me_/ramdisk/ramdisk.cpio.gz
2178 13:52:18.240141
2179 13:52:18.240255 Waiting for link
2180 13:52:18.443362
2181 13:52:18.443574 done.
2182 13:52:18.443670
2183 13:52:18.443773 MAC: 00:e0:4c:71:a6:42
2184 13:52:18.443864
2185 13:52:18.446747 Sending DHCP discover... done.
2186 13:52:18.446853
2187 13:52:18.449596 Waiting for reply... done.
2188 13:52:18.449698
2189 13:52:18.453025 Sending DHCP request... done.
2190 13:52:18.453141
2191 13:52:18.456517 Waiting for reply... done.
2192 13:52:18.456620
2193 13:52:18.459432 My ip is 192.168.201.18
2194 13:52:18.459538
2195 13:52:18.462899 The DHCP server ip is 192.168.201.1
2196 13:52:18.463003
2197 13:52:18.466190 TFTP server IP predefined by user: 192.168.201.1
2198 13:52:18.466296
2199 13:52:18.472817 Bootfile predefined by user: 10062367/tftp-deploy-l10y4me_/kernel/bzImage
2200 13:52:18.472928
2201 13:52:18.476358 Sending tftp read request... done.
2202 13:52:18.479144
2203 13:52:18.482957 Waiting for the transfer...
2204 13:52:18.483080
2205 13:52:18.730877 00000000 ################################################################
2206 13:52:18.731055
2207 13:52:18.974641 00080000 ################################################################
2208 13:52:18.974823
2209 13:52:19.210603 00100000 ################################################################
2210 13:52:19.210743
2211 13:52:19.452553 00180000 ################################################################
2212 13:52:19.452731
2213 13:52:19.695478 00200000 ################################################################
2214 13:52:19.695647
2215 13:52:19.934640 00280000 ################################################################
2216 13:52:19.934793
2217 13:52:20.171749 00300000 ################################################################
2218 13:52:20.171931
2219 13:52:20.417690 00380000 ################################################################
2220 13:52:20.417870
2221 13:52:20.681351 00400000 ################################################################
2222 13:52:20.681530
2223 13:52:20.923605 00480000 ################################################################
2224 13:52:20.923755
2225 13:52:21.172970 00500000 ################################################################
2226 13:52:21.173152
2227 13:52:21.426482 00580000 ################################################################
2228 13:52:21.426662
2229 13:52:21.663752 00600000 ################################################################
2230 13:52:21.663902
2231 13:52:21.900834 00680000 ################################################################
2232 13:52:21.900982
2233 13:52:22.147123 00700000 ################################################################
2234 13:52:22.147262
2235 13:52:22.405733 00780000 ################################################################
2236 13:52:22.405884
2237 13:52:22.676983 00800000 ################################################################
2238 13:52:22.677151
2239 13:52:22.935081 00880000 ################################################################
2240 13:52:22.935245
2241 13:52:23.194759 00900000 ################################################################
2242 13:52:23.194936
2243 13:52:23.446098 00980000 ################################################################
2244 13:52:23.446249
2245 13:52:23.622477 00a00000 ############################################## done.
2246 13:52:23.622612
2247 13:52:23.625664 The bootfile was 10854400 bytes long.
2248 13:52:23.625750
2249 13:52:23.628928 Sending tftp read request... done.
2250 13:52:23.629015
2251 13:52:23.632180 Waiting for the transfer...
2252 13:52:23.632274
2253 13:52:23.881018 00000000 ################################################################
2254 13:52:23.881215
2255 13:52:24.141591 00080000 ################################################################
2256 13:52:24.141781
2257 13:52:24.392487 00100000 ################################################################
2258 13:52:24.392688
2259 13:52:24.652168 00180000 ################################################################
2260 13:52:24.652337
2261 13:52:24.905154 00200000 ################################################################
2262 13:52:24.905343
2263 13:52:25.164273 00280000 ################################################################
2264 13:52:25.164455
2265 13:52:25.420695 00300000 ################################################################
2266 13:52:25.420844
2267 13:52:25.680770 00380000 ################################################################
2268 13:52:25.680915
2269 13:52:25.955879 00400000 ################################################################
2270 13:52:25.956031
2271 13:52:26.221598 00480000 ################################################################
2272 13:52:26.221752
2273 13:52:26.492391 00500000 ################################################################
2274 13:52:26.492557
2275 13:52:26.758423 00580000 ################################################################
2276 13:52:26.758581
2277 13:52:26.814091 00600000 ############# done.
2278 13:52:26.814242
2279 13:52:26.817381 Sending tftp read request... done.
2280 13:52:26.817474
2281 13:52:26.820791 Waiting for the transfer...
2282 13:52:26.820876
2283 13:52:26.820944 00000000 # done.
2284 13:52:26.821008
2285 13:52:26.830355 Command line loaded dynamically from TFTP file: 10062367/tftp-deploy-l10y4me_/kernel/cmdline
2286 13:52:26.830441
2287 13:52:26.853384 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10062367/extract-nfsrootfs-2jp4sbi1,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2288 13:52:26.857056
2289 13:52:26.860457 Shutting down all USB controllers.
2290 13:52:26.860542
2291 13:52:26.860609 Removing current net device
2292 13:52:26.860672
2293 13:52:26.863923 Finalizing coreboot
2294 13:52:26.864023
2295 13:52:26.870751 Exiting depthcharge with code 4 at timestamp: 18469286
2296 13:52:26.870837
2297 13:52:26.870903
2298 13:52:26.870966 Starting kernel ...
2299 13:52:26.871027
2300 13:52:26.871085
2301 13:52:26.871456 end: 2.2.4 bootloader-commands (duration 00:00:10) [common]
2302 13:52:26.871571 start: 2.2.5 auto-login-action (timeout 00:04:35) [common]
2303 13:52:26.871675 Setting prompt string to ['Linux version [0-9]']
2304 13:52:26.871777 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2305 13:52:26.871870 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2307 13:57:01.871935 end: 2.2.5 auto-login-action (duration 00:04:35) [common]
2309 13:57:01.872168 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 275 seconds'
2311 13:57:01.872345 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2314 13:57:01.872639 end: 2 depthcharge-action (duration 00:05:00) [common]
2316 13:57:01.872915 Cleaning after the job
2317 13:57:01.873020 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062367/tftp-deploy-l10y4me_/ramdisk
2318 13:57:01.873973 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062367/tftp-deploy-l10y4me_/kernel
2319 13:57:01.875370 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062367/tftp-deploy-l10y4me_/nfsrootfs
2320 13:57:01.954540 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062367/tftp-deploy-l10y4me_/modules
2321 13:57:01.955187 start: 4.1 power-off (timeout 00:00:30) [common]
2322 13:57:01.955356 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-7' '--port=1' '--command=off'
2323 13:57:02.030621 >> Command sent successfully.
2324 13:57:02.032945 Returned 0 in 0 seconds
2325 13:57:02.134010 end: 4.1 power-off (duration 00:00:00) [common]
2327 13:57:02.135408 start: 4.2 read-feedback (timeout 00:10:00) [common]
2328 13:57:02.136653 Listened to connection for namespace 'common' for up to 1s
2329 13:57:03.141352 Finalising connection for namespace 'common'
2330 13:57:03.142070 Disconnecting from shell: Finalise
2331 13:57:03.142493
2332 13:57:03.244043 end: 4.2 read-feedback (duration 00:00:01) [common]
2333 13:57:03.244694 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10062367
2334 13:57:03.629531 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10062367
2335 13:57:03.629733 JobError: Your job cannot terminate cleanly.