Boot log: asus-cx9400-volteer
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
1 12:55:35.742080 lava-dispatcher, installed at version: 2023.03
2 12:55:35.742287 start: 0 validate
3 12:55:35.742416 Start time: 2023-04-26 12:55:35.742409+00:00 (UTC)
4 12:55:35.742542 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:55:35.742673 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230414.0%2Fx86%2Frootfs.cpio.gz exists
6 12:55:36.021845 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:55:36.022680 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.280-cip96-89-g355dfa824cb4%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:55:39.528047 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:55:39.528864 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.280-cip96-89-g355dfa824cb4%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:55:39.811937 validate duration: 4.07
12 12:55:39.812223 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:55:39.812321 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:55:39.812480 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:55:39.812644 Not decompressing ramdisk as can be used compressed.
16 12:55:39.812730 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230414.0/x86/rootfs.cpio.gz
17 12:55:39.812796 saving as /var/lib/lava/dispatcher/tmp/10130720/tftp-deploy-_q0fsbag/ramdisk/rootfs.cpio.gz
18 12:55:39.812859 total size: 8429655 (8MB)
19 12:55:40.500353 progress 0% (0MB)
20 12:55:40.513639 progress 5% (0MB)
21 12:55:40.525709 progress 10% (0MB)
22 12:55:40.533066 progress 15% (1MB)
23 12:55:40.538446 progress 20% (1MB)
24 12:55:40.542888 progress 25% (2MB)
25 12:55:40.546738 progress 30% (2MB)
26 12:55:40.550294 progress 35% (2MB)
27 12:55:40.553214 progress 40% (3MB)
28 12:55:40.556396 progress 45% (3MB)
29 12:55:40.559211 progress 50% (4MB)
30 12:55:40.561792 progress 55% (4MB)
31 12:55:40.564295 progress 60% (4MB)
32 12:55:40.566593 progress 65% (5MB)
33 12:55:40.568855 progress 70% (5MB)
34 12:55:40.570899 progress 75% (6MB)
35 12:55:40.573096 progress 80% (6MB)
36 12:55:40.575265 progress 85% (6MB)
37 12:55:40.577453 progress 90% (7MB)
38 12:55:40.579647 progress 95% (7MB)
39 12:55:40.581811 progress 100% (8MB)
40 12:55:40.581947 8MB downloaded in 0.77s (10.45MB/s)
41 12:55:40.582096 end: 1.1.1 http-download (duration 00:00:01) [common]
43 12:55:40.582340 end: 1.1 download-retry (duration 00:00:01) [common]
44 12:55:40.582435 start: 1.2 download-retry (timeout 00:09:59) [common]
45 12:55:40.582533 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 12:55:40.582663 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.280-cip96-89-g355dfa824cb4/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:55:40.582755 saving as /var/lib/lava/dispatcher/tmp/10130720/tftp-deploy-_q0fsbag/kernel/bzImage
48 12:55:40.582876 total size: 10858496 (10MB)
49 12:55:40.582945 No compression specified
50 12:55:40.584101 progress 0% (0MB)
51 12:55:40.587023 progress 5% (0MB)
52 12:55:40.589894 progress 10% (1MB)
53 12:55:40.592600 progress 15% (1MB)
54 12:55:40.595486 progress 20% (2MB)
55 12:55:40.598231 progress 25% (2MB)
56 12:55:40.601218 progress 30% (3MB)
57 12:55:40.603923 progress 35% (3MB)
58 12:55:40.606831 progress 40% (4MB)
59 12:55:40.609710 progress 45% (4MB)
60 12:55:40.612513 progress 50% (5MB)
61 12:55:40.615402 progress 55% (5MB)
62 12:55:40.618122 progress 60% (6MB)
63 12:55:40.621008 progress 65% (6MB)
64 12:55:40.623676 progress 70% (7MB)
65 12:55:40.626444 progress 75% (7MB)
66 12:55:40.629298 progress 80% (8MB)
67 12:55:40.632009 progress 85% (8MB)
68 12:55:40.634779 progress 90% (9MB)
69 12:55:40.637452 progress 95% (9MB)
70 12:55:40.640325 progress 100% (10MB)
71 12:55:40.640478 10MB downloaded in 0.06s (179.79MB/s)
72 12:55:40.640623 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:55:40.640852 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:55:40.640938 start: 1.3 download-retry (timeout 00:09:59) [common]
76 12:55:40.641026 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 12:55:40.641159 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.280-cip96-89-g355dfa824cb4/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:55:40.641230 saving as /var/lib/lava/dispatcher/tmp/10130720/tftp-deploy-_q0fsbag/modules/modules.tar
79 12:55:40.641292 total size: 483612 (0MB)
80 12:55:40.641353 Using unxz to decompress xz
81 12:55:40.644797 progress 6% (0MB)
82 12:55:40.645177 progress 13% (0MB)
83 12:55:40.645414 progress 20% (0MB)
84 12:55:40.646949 progress 27% (0MB)
85 12:55:40.648982 progress 33% (0MB)
86 12:55:40.650749 progress 40% (0MB)
87 12:55:40.652877 progress 47% (0MB)
88 12:55:40.654777 progress 54% (0MB)
89 12:55:40.656832 progress 60% (0MB)
90 12:55:40.658666 progress 67% (0MB)
91 12:55:40.660714 progress 74% (0MB)
92 12:55:40.663081 progress 81% (0MB)
93 12:55:40.664960 progress 88% (0MB)
94 12:55:40.666728 progress 94% (0MB)
95 12:55:40.669298 progress 100% (0MB)
96 12:55:40.675426 0MB downloaded in 0.03s (13.52MB/s)
97 12:55:40.675695 end: 1.3.1 http-download (duration 00:00:00) [common]
99 12:55:40.675957 end: 1.3 download-retry (duration 00:00:00) [common]
100 12:55:40.676051 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
101 12:55:40.676144 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
102 12:55:40.676227 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 12:55:40.676310 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
104 12:55:40.676529 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10130720/lava-overlay-9h3mp5c6
105 12:55:40.676658 makedir: /var/lib/lava/dispatcher/tmp/10130720/lava-overlay-9h3mp5c6/lava-10130720/bin
106 12:55:40.676762 makedir: /var/lib/lava/dispatcher/tmp/10130720/lava-overlay-9h3mp5c6/lava-10130720/tests
107 12:55:40.676858 makedir: /var/lib/lava/dispatcher/tmp/10130720/lava-overlay-9h3mp5c6/lava-10130720/results
108 12:55:40.676972 Creating /var/lib/lava/dispatcher/tmp/10130720/lava-overlay-9h3mp5c6/lava-10130720/bin/lava-add-keys
109 12:55:40.677117 Creating /var/lib/lava/dispatcher/tmp/10130720/lava-overlay-9h3mp5c6/lava-10130720/bin/lava-add-sources
110 12:55:40.677249 Creating /var/lib/lava/dispatcher/tmp/10130720/lava-overlay-9h3mp5c6/lava-10130720/bin/lava-background-process-start
111 12:55:40.677376 Creating /var/lib/lava/dispatcher/tmp/10130720/lava-overlay-9h3mp5c6/lava-10130720/bin/lava-background-process-stop
112 12:55:40.677500 Creating /var/lib/lava/dispatcher/tmp/10130720/lava-overlay-9h3mp5c6/lava-10130720/bin/lava-common-functions
113 12:55:40.677624 Creating /var/lib/lava/dispatcher/tmp/10130720/lava-overlay-9h3mp5c6/lava-10130720/bin/lava-echo-ipv4
114 12:55:40.677747 Creating /var/lib/lava/dispatcher/tmp/10130720/lava-overlay-9h3mp5c6/lava-10130720/bin/lava-install-packages
115 12:55:40.677868 Creating /var/lib/lava/dispatcher/tmp/10130720/lava-overlay-9h3mp5c6/lava-10130720/bin/lava-installed-packages
116 12:55:40.677990 Creating /var/lib/lava/dispatcher/tmp/10130720/lava-overlay-9h3mp5c6/lava-10130720/bin/lava-os-build
117 12:55:40.678112 Creating /var/lib/lava/dispatcher/tmp/10130720/lava-overlay-9h3mp5c6/lava-10130720/bin/lava-probe-channel
118 12:55:40.678234 Creating /var/lib/lava/dispatcher/tmp/10130720/lava-overlay-9h3mp5c6/lava-10130720/bin/lava-probe-ip
119 12:55:40.678358 Creating /var/lib/lava/dispatcher/tmp/10130720/lava-overlay-9h3mp5c6/lava-10130720/bin/lava-target-ip
120 12:55:40.678481 Creating /var/lib/lava/dispatcher/tmp/10130720/lava-overlay-9h3mp5c6/lava-10130720/bin/lava-target-mac
121 12:55:40.678602 Creating /var/lib/lava/dispatcher/tmp/10130720/lava-overlay-9h3mp5c6/lava-10130720/bin/lava-target-storage
122 12:55:40.678738 Creating /var/lib/lava/dispatcher/tmp/10130720/lava-overlay-9h3mp5c6/lava-10130720/bin/lava-test-case
123 12:55:40.678862 Creating /var/lib/lava/dispatcher/tmp/10130720/lava-overlay-9h3mp5c6/lava-10130720/bin/lava-test-event
124 12:55:40.678981 Creating /var/lib/lava/dispatcher/tmp/10130720/lava-overlay-9h3mp5c6/lava-10130720/bin/lava-test-feedback
125 12:55:40.679142 Creating /var/lib/lava/dispatcher/tmp/10130720/lava-overlay-9h3mp5c6/lava-10130720/bin/lava-test-raise
126 12:55:40.679324 Creating /var/lib/lava/dispatcher/tmp/10130720/lava-overlay-9h3mp5c6/lava-10130720/bin/lava-test-reference
127 12:55:40.679454 Creating /var/lib/lava/dispatcher/tmp/10130720/lava-overlay-9h3mp5c6/lava-10130720/bin/lava-test-runner
128 12:55:40.679578 Creating /var/lib/lava/dispatcher/tmp/10130720/lava-overlay-9h3mp5c6/lava-10130720/bin/lava-test-set
129 12:55:40.679701 Creating /var/lib/lava/dispatcher/tmp/10130720/lava-overlay-9h3mp5c6/lava-10130720/bin/lava-test-shell
130 12:55:40.679826 Updating /var/lib/lava/dispatcher/tmp/10130720/lava-overlay-9h3mp5c6/lava-10130720/bin/lava-install-packages (oe)
131 12:55:40.679971 Updating /var/lib/lava/dispatcher/tmp/10130720/lava-overlay-9h3mp5c6/lava-10130720/bin/lava-installed-packages (oe)
132 12:55:40.680097 Creating /var/lib/lava/dispatcher/tmp/10130720/lava-overlay-9h3mp5c6/lava-10130720/environment
133 12:55:40.680201 LAVA metadata
134 12:55:40.680276 - LAVA_JOB_ID=10130720
135 12:55:40.680341 - LAVA_DISPATCHER_IP=192.168.201.1
136 12:55:40.680443 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
137 12:55:40.680512 skipped lava-vland-overlay
138 12:55:40.680586 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 12:55:40.680672 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
140 12:55:40.680735 skipped lava-multinode-overlay
141 12:55:40.680809 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 12:55:40.680890 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
143 12:55:40.680968 Loading test definitions
144 12:55:40.681061 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
145 12:55:40.681134 Using /lava-10130720 at stage 0
146 12:55:40.681425 uuid=10130720_1.4.2.3.1 testdef=None
147 12:55:40.681515 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 12:55:40.681603 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
149 12:55:40.682112 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 12:55:40.682330 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
152 12:55:40.682959 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 12:55:40.683188 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
155 12:55:40.683890 runner path: /var/lib/lava/dispatcher/tmp/10130720/lava-overlay-9h3mp5c6/lava-10130720/0/tests/0_dmesg test_uuid 10130720_1.4.2.3.1
156 12:55:40.684043 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 12:55:40.684267 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
159 12:55:40.684341 Using /lava-10130720 at stage 1
160 12:55:40.684628 uuid=10130720_1.4.2.3.5 testdef=None
161 12:55:40.684716 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 12:55:40.684829 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
163 12:55:40.685352 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 12:55:40.685606 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
166 12:55:40.686327 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 12:55:40.686630 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
169 12:55:40.687306 runner path: /var/lib/lava/dispatcher/tmp/10130720/lava-overlay-9h3mp5c6/lava-10130720/1/tests/1_bootrr test_uuid 10130720_1.4.2.3.5
170 12:55:40.687460 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 12:55:40.687671 Creating lava-test-runner.conf files
173 12:55:40.687735 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10130720/lava-overlay-9h3mp5c6/lava-10130720/0 for stage 0
174 12:55:40.687823 - 0_dmesg
175 12:55:40.687901 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10130720/lava-overlay-9h3mp5c6/lava-10130720/1 for stage 1
176 12:55:40.687989 - 1_bootrr
177 12:55:40.688106 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 12:55:40.688203 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
179 12:55:40.696873 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 12:55:40.696982 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
181 12:55:40.697069 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 12:55:40.697156 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 12:55:40.697245 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
184 12:55:40.933198 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 12:55:40.933555 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
186 12:55:40.933678 extracting modules file /var/lib/lava/dispatcher/tmp/10130720/tftp-deploy-_q0fsbag/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10130720/extract-overlay-ramdisk-kk295iwd/ramdisk
187 12:55:40.952578 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 12:55:40.952739 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
189 12:55:40.952831 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10130720/compress-overlay-khgmhyiv/overlay-1.4.2.4.tar.gz to ramdisk
190 12:55:40.952900 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10130720/compress-overlay-khgmhyiv/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10130720/extract-overlay-ramdisk-kk295iwd/ramdisk
191 12:55:40.961462 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 12:55:40.961609 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
193 12:55:40.961703 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 12:55:40.961792 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
195 12:55:40.961872 Building ramdisk /var/lib/lava/dispatcher/tmp/10130720/extract-overlay-ramdisk-kk295iwd/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10130720/extract-overlay-ramdisk-kk295iwd/ramdisk
196 12:55:41.087313 >> 53976 blocks
197 12:55:42.000405 rename /var/lib/lava/dispatcher/tmp/10130720/extract-overlay-ramdisk-kk295iwd/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10130720/tftp-deploy-_q0fsbag/ramdisk/ramdisk.cpio.gz
198 12:55:42.000822 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 12:55:42.000952 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 12:55:42.001055 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 12:55:42.001155 No mkimage arch provided, not using FIT.
202 12:55:42.001244 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 12:55:42.001328 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 12:55:42.001437 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 12:55:42.001529 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 12:55:42.001643 No LXC device requested
207 12:55:42.001725 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 12:55:42.001813 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 12:55:42.001895 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 12:55:42.001970 Checking files for TFTP limit of 4294967296 bytes.
211 12:55:42.002392 end: 1 tftp-deploy (duration 00:00:02) [common]
212 12:55:42.002500 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 12:55:42.002592 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 12:55:42.002717 substitutions:
215 12:55:42.002784 - {DTB}: None
216 12:55:42.002848 - {INITRD}: 10130720/tftp-deploy-_q0fsbag/ramdisk/ramdisk.cpio.gz
217 12:55:42.002909 - {KERNEL}: 10130720/tftp-deploy-_q0fsbag/kernel/bzImage
218 12:55:42.002967 - {LAVA_MAC}: None
219 12:55:42.003025 - {PRESEED_CONFIG}: None
220 12:55:42.003080 - {PRESEED_LOCAL}: None
221 12:55:42.003136 - {RAMDISK}: 10130720/tftp-deploy-_q0fsbag/ramdisk/ramdisk.cpio.gz
222 12:55:42.003192 - {ROOT_PART}: None
223 12:55:42.003248 - {ROOT}: None
224 12:55:42.003345 - {SERVER_IP}: 192.168.201.1
225 12:55:42.003401 - {TEE}: None
226 12:55:42.003456 Parsed boot commands:
227 12:55:42.003510 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 12:55:42.003697 Parsed boot commands: tftpboot 192.168.201.1 10130720/tftp-deploy-_q0fsbag/kernel/bzImage 10130720/tftp-deploy-_q0fsbag/kernel/cmdline 10130720/tftp-deploy-_q0fsbag/ramdisk/ramdisk.cpio.gz
229 12:55:42.003803 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 12:55:42.003891 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 12:55:42.003985 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 12:55:42.004072 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 12:55:42.004144 Not connected, no need to disconnect.
234 12:55:42.004220 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 12:55:42.004351 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 12:55:42.004452 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-12'
237 12:55:42.007615 Setting prompt string to ['lava-test: # ']
238 12:55:42.007963 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 12:55:42.008101 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 12:55:42.008232 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 12:55:42.008339 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 12:55:42.008590 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-12' '--port=1' '--command=reboot'
243 12:55:47.143681 >> Command sent successfully.
244 12:55:47.146028 Returned 0 in 5 seconds
245 12:55:47.246385 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 12:55:47.246820 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 12:55:47.246924 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 12:55:47.247045 Setting prompt string to 'Starting depthcharge on Voema...'
250 12:55:47.247116 Changing prompt to 'Starting depthcharge on Voema...'
251 12:55:47.247186 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
252 12:55:47.247474 [Enter `^Ec?' for help]
253 12:55:48.810913
254 12:55:48.811083
255 12:55:48.820900 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
256 12:55:48.827699 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
257 12:55:48.830289 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
258 12:55:48.834158 CPU: AES supported, TXT NOT supported, VT supported
259 12:55:48.841129 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
260 12:55:48.844467 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
261 12:55:48.851052 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
262 12:55:48.854644 VBOOT: Loading verstage.
263 12:55:48.857962 FMAP: Found "FLASH" version 1.1 at 0x1804000.
264 12:55:48.864198 FMAP: base = 0x0 size = 0x2000000 #areas = 32
265 12:55:48.867498 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
266 12:55:48.877883 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
267 12:55:48.884946 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
268 12:55:48.885037
269 12:55:48.885105
270 12:55:48.894973 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
271 12:55:48.911852 Probing TPM: . done!
272 12:55:48.914890 TPM ready after 0 ms
273 12:55:48.918518 Connected to device vid:did:rid of 1ae0:0028:00
274 12:55:48.929805 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
275 12:55:48.935903 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
276 12:55:48.939412 Initialized TPM device CR50 revision 0
277 12:55:48.996783 tlcl_send_startup: Startup return code is 0
278 12:55:48.996928 TPM: setup succeeded
279 12:55:49.012810 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
280 12:55:49.026600 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
281 12:55:49.039802 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
282 12:55:49.049147 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
283 12:55:49.052806 Chrome EC: UHEPI supported
284 12:55:49.055955 Phase 1
285 12:55:49.059178 FMAP: area GBB found @ 1805000 (458752 bytes)
286 12:55:49.069199 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
287 12:55:49.075668 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
288 12:55:49.082279 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
289 12:55:49.089265 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
290 12:55:49.092352 Recovery requested (1009000e)
291 12:55:49.095796 TPM: Extending digest for VBOOT: boot mode into PCR 0
292 12:55:49.107629 tlcl_extend: response is 0
293 12:55:49.113656 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
294 12:55:49.123995 tlcl_extend: response is 0
295 12:55:49.130292 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
296 12:55:49.137172 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
297 12:55:49.144058 BS: verstage times (exec / console): total (unknown) / 142 ms
298 12:55:49.144165
299 12:55:49.144232
300 12:55:49.156901 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
301 12:55:49.163897 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
302 12:55:49.166984 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
303 12:55:49.170453 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
304 12:55:49.177272 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
305 12:55:49.180627 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
306 12:55:49.183625 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
307 12:55:49.186530 TCO_STS: 0000 0000
308 12:55:49.189992 GEN_PMCON: d0015038 00002200
309 12:55:49.193162 GBLRST_CAUSE: 00000000 00000000
310 12:55:49.196751 HPR_CAUSE0: 00000000
311 12:55:49.196827 prev_sleep_state 5
312 12:55:49.200346 Boot Count incremented to 17119
313 12:55:49.206559 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
314 12:55:49.213277 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
315 12:55:49.222797 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
316 12:55:49.229946 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
317 12:55:49.233439 Chrome EC: UHEPI supported
318 12:55:49.239370 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
319 12:55:49.250798 Probing TPM: done!
320 12:55:49.257575 Connected to device vid:did:rid of 1ae0:0028:00
321 12:55:49.267354 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
322 12:55:49.270780 Initialized TPM device CR50 revision 0
323 12:55:49.285809 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
324 12:55:49.292681 MRC: Hash idx 0x100b comparison successful.
325 12:55:49.295778 MRC cache found, size faa8
326 12:55:49.295873 bootmode is set to: 2
327 12:55:49.298943 SPD index = 2
328 12:55:49.305665 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
329 12:55:49.308952 SPD: module type is LPDDR4X
330 12:55:49.312541 SPD: module part number is MT53D1G64D4NW-046
331 12:55:49.319365 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
332 12:55:49.322271 SPD: device width 16 bits, bus width 16 bits
333 12:55:49.329045 SPD: module size is 2048 MB (per channel)
334 12:55:49.758172 CBMEM:
335 12:55:49.761625 IMD: root @ 0x76fff000 254 entries.
336 12:55:49.765001 IMD: root @ 0x76ffec00 62 entries.
337 12:55:49.768817 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
338 12:55:49.774703 FMAP: area RW_VPD found @ f35000 (8192 bytes)
339 12:55:49.778154 External stage cache:
340 12:55:49.781544 IMD: root @ 0x7b3ff000 254 entries.
341 12:55:49.784421 IMD: root @ 0x7b3fec00 62 entries.
342 12:55:49.799490 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
343 12:55:49.806365 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
344 12:55:49.813103 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
345 12:55:49.826485 MRC: 'RECOVERY_MRC_CACHE' does not need update.
346 12:55:49.833297 cse_lite: Skip switching to RW in the recovery path
347 12:55:49.833397 8 DIMMs found
348 12:55:49.833485 SMM Memory Map
349 12:55:49.839589 SMRAM : 0x7b000000 0x800000
350 12:55:49.842798 Subregion 0: 0x7b000000 0x200000
351 12:55:49.846629 Subregion 1: 0x7b200000 0x200000
352 12:55:49.849825 Subregion 2: 0x7b400000 0x400000
353 12:55:49.849921 top_of_ram = 0x77000000
354 12:55:49.856165 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
355 12:55:49.863181 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
356 12:55:49.866042 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
357 12:55:49.873185 MTRR Range: Start=ff000000 End=0 (Size 1000000)
358 12:55:49.879234 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
359 12:55:49.886022 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
360 12:55:49.896200 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
361 12:55:49.902903 Processing 211 relocs. Offset value of 0x74c0b000
362 12:55:49.909502 BS: romstage times (exec / console): total (unknown) / 277 ms
363 12:55:49.916040
364 12:55:49.916168
365 12:55:49.926348 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
366 12:55:49.929547 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
367 12:55:49.936026 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
368 12:55:49.945786 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
369 12:55:49.952750 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
370 12:55:49.958876 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
371 12:55:50.002184 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
372 12:55:50.008468 Processing 5008 relocs. Offset value of 0x75d98000
373 12:55:50.012341 BS: postcar times (exec / console): total (unknown) / 59 ms
374 12:55:50.015800
375 12:55:50.015888
376 12:55:50.025126 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
377 12:55:50.025217 Normal boot
378 12:55:50.028428 FW_CONFIG value is 0x804c02
379 12:55:50.031733 PCI: 00:07.0 disabled by fw_config
380 12:55:50.035585 PCI: 00:07.1 disabled by fw_config
381 12:55:50.038297 PCI: 00:0d.2 disabled by fw_config
382 12:55:50.044917 PCI: 00:1c.7 disabled by fw_config
383 12:55:50.048620 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
384 12:55:50.055017 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
385 12:55:50.058179 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
386 12:55:50.065295 GENERIC: 0.0 disabled by fw_config
387 12:55:50.068037 GENERIC: 1.0 disabled by fw_config
388 12:55:50.072023 fw_config match found: DB_USB=USB3_ACTIVE
389 12:55:50.074991 fw_config match found: DB_USB=USB3_ACTIVE
390 12:55:50.078652 fw_config match found: DB_USB=USB3_ACTIVE
391 12:55:50.084758 fw_config match found: DB_USB=USB3_ACTIVE
392 12:55:50.088454 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
393 12:55:50.094883 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
394 12:55:50.104950 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
395 12:55:50.111718 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
396 12:55:50.114565 microcode: sig=0x806c1 pf=0x80 revision=0x86
397 12:55:50.121149 microcode: Update skipped, already up-to-date
398 12:55:50.128098 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
399 12:55:50.155932 Detected 4 core, 8 thread CPU.
400 12:55:50.159205 Setting up SMI for CPU
401 12:55:50.162288 IED base = 0x7b400000
402 12:55:50.162376 IED size = 0x00400000
403 12:55:50.165919 Will perform SMM setup.
404 12:55:50.172165 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
405 12:55:50.178900 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
406 12:55:50.185230 Processing 16 relocs. Offset value of 0x00030000
407 12:55:50.188605 Attempting to start 7 APs
408 12:55:50.192425 Waiting for 10ms after sending INIT.
409 12:55:50.207635 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
410 12:55:50.211051 AP: slot 2 apic_id 3.
411 12:55:50.213981 AP: slot 6 apic_id 2.
412 12:55:50.214066 AP: slot 5 apic_id 4.
413 12:55:50.217930 AP: slot 4 apic_id 5.
414 12:55:50.218015 done.
415 12:55:50.220893 AP: slot 3 apic_id 7.
416 12:55:50.220967 AP: slot 7 apic_id 6.
417 12:55:50.227412 Waiting for 2nd SIPI to complete...done.
418 12:55:50.234752 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
419 12:55:50.240456 Processing 13 relocs. Offset value of 0x00038000
420 12:55:50.243864 Unable to locate Global NVS
421 12:55:50.251065 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
422 12:55:50.254148 Installing permanent SMM handler to 0x7b000000
423 12:55:50.263909 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
424 12:55:50.267205 Processing 794 relocs. Offset value of 0x7b010000
425 12:55:50.276856 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
426 12:55:50.280518 Processing 13 relocs. Offset value of 0x7b008000
427 12:55:50.287228 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
428 12:55:50.293845 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
429 12:55:50.296710 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
430 12:55:50.303741 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
431 12:55:50.309917 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
432 12:55:50.316557 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
433 12:55:50.323645 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
434 12:55:50.326832 Unable to locate Global NVS
435 12:55:50.333334 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
436 12:55:50.336738 Clearing SMI status registers
437 12:55:50.336894 SMI_STS: PM1
438 12:55:50.339601 PM1_STS: PWRBTN
439 12:55:50.346666 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
440 12:55:50.349552 In relocation handler: CPU 0
441 12:55:50.353135 New SMBASE=0x7b000000 IEDBASE=0x7b400000
442 12:55:50.359485 Writing SMRR. base = 0x7b000006, mask=0xff800c00
443 12:55:50.362647 Relocation complete.
444 12:55:50.369517 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
445 12:55:50.372744 In relocation handler: CPU 1
446 12:55:50.376312 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
447 12:55:50.376465 Relocation complete.
448 12:55:50.386422 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
449 12:55:50.389646 In relocation handler: CPU 3
450 12:55:50.392623 New SMBASE=0x7afff400 IEDBASE=0x7b400000
451 12:55:50.392782 Relocation complete.
452 12:55:50.402354 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
453 12:55:50.405767 In relocation handler: CPU 5
454 12:55:50.409535 New SMBASE=0x7affec00 IEDBASE=0x7b400000
455 12:55:50.412491 Writing SMRR. base = 0x7b000006, mask=0xff800c00
456 12:55:50.415640 Relocation complete.
457 12:55:50.422104 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
458 12:55:50.425640 In relocation handler: CPU 4
459 12:55:50.429370 New SMBASE=0x7afff000 IEDBASE=0x7b400000
460 12:55:50.432774 Relocation complete.
461 12:55:50.439070 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
462 12:55:50.442019 In relocation handler: CPU 2
463 12:55:50.445416 New SMBASE=0x7afff800 IEDBASE=0x7b400000
464 12:55:50.448638 Relocation complete.
465 12:55:50.455200 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
466 12:55:50.458500 In relocation handler: CPU 6
467 12:55:50.462039 New SMBASE=0x7affe800 IEDBASE=0x7b400000
468 12:55:50.468453 Writing SMRR. base = 0x7b000006, mask=0xff800c00
469 12:55:50.468539 Relocation complete.
470 12:55:50.478457 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
471 12:55:50.481428 In relocation handler: CPU 7
472 12:55:50.485261 New SMBASE=0x7affe400 IEDBASE=0x7b400000
473 12:55:50.488268 Writing SMRR. base = 0x7b000006, mask=0xff800c00
474 12:55:50.491525 Relocation complete.
475 12:55:50.494863 Initializing CPU #0
476 12:55:50.498114 CPU: vendor Intel device 806c1
477 12:55:50.501341 CPU: family 06, model 8c, stepping 01
478 12:55:50.504741 Clearing out pending MCEs
479 12:55:50.504826 Setting up local APIC...
480 12:55:50.508181 apic_id: 0x00 done.
481 12:55:50.511554 Turbo is available but hidden
482 12:55:50.514800 Turbo is available and visible
483 12:55:50.517796 microcode: Update skipped, already up-to-date
484 12:55:50.521289 CPU #0 initialized
485 12:55:50.524455 Initializing CPU #6
486 12:55:50.524539 Initializing CPU #2
487 12:55:50.528137 CPU: vendor Intel device 806c1
488 12:55:50.531141 CPU: family 06, model 8c, stepping 01
489 12:55:50.534194 CPU: vendor Intel device 806c1
490 12:55:50.537831 CPU: family 06, model 8c, stepping 01
491 12:55:50.541335 Clearing out pending MCEs
492 12:55:50.544137 Clearing out pending MCEs
493 12:55:50.547985 Setting up local APIC...
494 12:55:50.548089 Initializing CPU #7
495 12:55:50.550918 Initializing CPU #3
496 12:55:50.554234 CPU: vendor Intel device 806c1
497 12:55:50.558226 CPU: family 06, model 8c, stepping 01
498 12:55:50.560804 Initializing CPU #1
499 12:55:50.564117 CPU: vendor Intel device 806c1
500 12:55:50.567642 CPU: family 06, model 8c, stepping 01
501 12:55:50.570979 Clearing out pending MCEs
502 12:55:50.571064 Clearing out pending MCEs
503 12:55:50.574044 Setting up local APIC...
504 12:55:50.577290 Initializing CPU #5
505 12:55:50.577374 Initializing CPU #4
506 12:55:50.580690 CPU: vendor Intel device 806c1
507 12:55:50.584369 CPU: family 06, model 8c, stepping 01
508 12:55:50.588305 CPU: vendor Intel device 806c1
509 12:55:50.591660 CPU: family 06, model 8c, stepping 01
510 12:55:50.595045 Clearing out pending MCEs
511 12:55:50.598146 Clearing out pending MCEs
512 12:55:50.601761 Setting up local APIC...
513 12:55:50.601846 apic_id: 0x07 done.
514 12:55:50.604949 Setting up local APIC...
515 12:55:50.608155 Setting up local APIC...
516 12:55:50.608239 apic_id: 0x06 done.
517 12:55:50.614707 microcode: Update skipped, already up-to-date
518 12:55:50.618048 microcode: Update skipped, already up-to-date
519 12:55:50.621349 CPU #3 initialized
520 12:55:50.621433 CPU #7 initialized
521 12:55:50.624910 apic_id: 0x04 done.
522 12:55:50.628735 Setting up local APIC...
523 12:55:50.628818 apic_id: 0x03 done.
524 12:55:50.631518 apic_id: 0x02 done.
525 12:55:50.634697 microcode: Update skipped, already up-to-date
526 12:55:50.641813 microcode: Update skipped, already up-to-date
527 12:55:50.645098 CPU: vendor Intel device 806c1
528 12:55:50.647928 CPU: family 06, model 8c, stepping 01
529 12:55:50.651081 Clearing out pending MCEs
530 12:55:50.651166 CPU #2 initialized
531 12:55:50.654686 CPU #6 initialized
532 12:55:50.657750 apic_id: 0x05 done.
533 12:55:50.661130 microcode: Update skipped, already up-to-date
534 12:55:50.664584 microcode: Update skipped, already up-to-date
535 12:55:50.667674 CPU #5 initialized
536 12:55:50.671516 CPU #4 initialized
537 12:55:50.671602 Setting up local APIC...
538 12:55:50.674740 apic_id: 0x01 done.
539 12:55:50.677687 microcode: Update skipped, already up-to-date
540 12:55:50.680938 CPU #1 initialized
541 12:55:50.684502 bsp_do_flight_plan done after 454 msecs.
542 12:55:50.687961 CPU: frequency set to 4400 MHz
543 12:55:50.690690 Enabling SMIs.
544 12:55:50.697697 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
545 12:55:50.712571 SATAXPCIE1 indicates PCIe NVMe is present
546 12:55:50.715937 Probing TPM: done!
547 12:55:50.719150 Connected to device vid:did:rid of 1ae0:0028:00
548 12:55:50.729832 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
549 12:55:50.733286 Initialized TPM device CR50 revision 0
550 12:55:50.736403 Enabling S0i3.4
551 12:55:50.742871 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
552 12:55:50.746249 Found a VBT of 8704 bytes after decompression
553 12:55:50.752773 cse_lite: CSE RO boot. HybridStorageMode disabled
554 12:55:50.759247 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
555 12:55:50.834747 FSPS returned 0
556 12:55:50.838566 Executing Phase 1 of FspMultiPhaseSiInit
557 12:55:50.847873 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
558 12:55:50.851396 port C0 DISC req: usage 1 usb3 1 usb2 5
559 12:55:50.855004 Raw Buffer output 0 00000511
560 12:55:50.858114 Raw Buffer output 1 00000000
561 12:55:50.861654 pmc_send_ipc_cmd succeeded
562 12:55:50.868492 port C1 DISC req: usage 1 usb3 2 usb2 3
563 12:55:50.868580 Raw Buffer output 0 00000321
564 12:55:50.871593 Raw Buffer output 1 00000000
565 12:55:50.876086 pmc_send_ipc_cmd succeeded
566 12:55:50.880958 Detected 4 core, 8 thread CPU.
567 12:55:50.884149 Detected 4 core, 8 thread CPU.
568 12:55:51.084428 Display FSP Version Info HOB
569 12:55:51.087729 Reference Code - CPU = a.0.4c.31
570 12:55:51.090732 uCode Version = 0.0.0.86
571 12:55:51.094283 TXT ACM version = ff.ff.ff.ffff
572 12:55:51.097222 Reference Code - ME = a.0.4c.31
573 12:55:51.101350 MEBx version = 0.0.0.0
574 12:55:51.103883 ME Firmware Version = Consumer SKU
575 12:55:51.107376 Reference Code - PCH = a.0.4c.31
576 12:55:51.110664 PCH-CRID Status = Disabled
577 12:55:51.113857 PCH-CRID Original Value = ff.ff.ff.ffff
578 12:55:51.117232 PCH-CRID New Value = ff.ff.ff.ffff
579 12:55:51.120955 OPROM - RST - RAID = ff.ff.ff.ffff
580 12:55:51.124135 PCH Hsio Version = 4.0.0.0
581 12:55:51.127604 Reference Code - SA - System Agent = a.0.4c.31
582 12:55:51.130625 Reference Code - MRC = 2.0.0.1
583 12:55:51.133716 SA - PCIe Version = a.0.4c.31
584 12:55:51.136847 SA-CRID Status = Disabled
585 12:55:51.140528 SA-CRID Original Value = 0.0.0.1
586 12:55:51.143362 SA-CRID New Value = 0.0.0.1
587 12:55:51.146578 OPROM - VBIOS = ff.ff.ff.ffff
588 12:55:51.150191 IO Manageability Engine FW Version = 11.1.4.0
589 12:55:51.153341 PHY Build Version = 0.0.0.e0
590 12:55:51.156489 Thunderbolt(TM) FW Version = 0.0.0.0
591 12:55:51.163211 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
592 12:55:51.166389 ITSS IRQ Polarities Before:
593 12:55:51.170021 IPC0: 0xffffffff
594 12:55:51.170107 IPC1: 0xffffffff
595 12:55:51.170175 IPC2: 0xffffffff
596 12:55:51.173795 IPC3: 0xffffffff
597 12:55:51.177927 ITSS IRQ Polarities After:
598 12:55:51.178013 IPC0: 0xffffffff
599 12:55:51.181086 IPC1: 0xffffffff
600 12:55:51.181197 IPC2: 0xffffffff
601 12:55:51.184378 IPC3: 0xffffffff
602 12:55:51.187769 Found PCIe Root Port #9 at PCI: 00:1d.0.
603 12:55:51.200588 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
604 12:55:51.210548 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
605 12:55:51.224194 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
606 12:55:51.230637 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
607 12:55:51.230719 Enumerating buses...
608 12:55:51.237499 Show all devs... Before device enumeration.
609 12:55:51.237585 Root Device: enabled 1
610 12:55:51.240578 DOMAIN: 0000: enabled 1
611 12:55:51.243782 CPU_CLUSTER: 0: enabled 1
612 12:55:51.247197 PCI: 00:00.0: enabled 1
613 12:55:51.250712 PCI: 00:02.0: enabled 1
614 12:55:51.250799 PCI: 00:04.0: enabled 1
615 12:55:51.253837 PCI: 00:05.0: enabled 1
616 12:55:51.256934 PCI: 00:06.0: enabled 0
617 12:55:51.257019 PCI: 00:07.0: enabled 0
618 12:55:51.260699 PCI: 00:07.1: enabled 0
619 12:55:51.263685 PCI: 00:07.2: enabled 0
620 12:55:51.266827 PCI: 00:07.3: enabled 0
621 12:55:51.266912 PCI: 00:08.0: enabled 1
622 12:55:51.270115 PCI: 00:09.0: enabled 0
623 12:55:51.273794 PCI: 00:0a.0: enabled 0
624 12:55:51.276853 PCI: 00:0d.0: enabled 1
625 12:55:51.276938 PCI: 00:0d.1: enabled 0
626 12:55:51.280205 PCI: 00:0d.2: enabled 0
627 12:55:51.284021 PCI: 00:0d.3: enabled 0
628 12:55:51.287098 PCI: 00:0e.0: enabled 0
629 12:55:51.287209 PCI: 00:10.2: enabled 1
630 12:55:51.290576 PCI: 00:10.6: enabled 0
631 12:55:51.293609 PCI: 00:10.7: enabled 0
632 12:55:51.296733 PCI: 00:12.0: enabled 0
633 12:55:51.296818 PCI: 00:12.6: enabled 0
634 12:55:51.300119 PCI: 00:13.0: enabled 0
635 12:55:51.303394 PCI: 00:14.0: enabled 1
636 12:55:51.303481 PCI: 00:14.1: enabled 0
637 12:55:51.306611 PCI: 00:14.2: enabled 1
638 12:55:51.309943 PCI: 00:14.3: enabled 1
639 12:55:51.313904 PCI: 00:15.0: enabled 1
640 12:55:51.313990 PCI: 00:15.1: enabled 1
641 12:55:51.316881 PCI: 00:15.2: enabled 1
642 12:55:51.319991 PCI: 00:15.3: enabled 1
643 12:55:51.323566 PCI: 00:16.0: enabled 1
644 12:55:51.323654 PCI: 00:16.1: enabled 0
645 12:55:51.326922 PCI: 00:16.2: enabled 0
646 12:55:51.329858 PCI: 00:16.3: enabled 0
647 12:55:51.333453 PCI: 00:16.4: enabled 0
648 12:55:51.333539 PCI: 00:16.5: enabled 0
649 12:55:51.336617 PCI: 00:17.0: enabled 1
650 12:55:51.339838 PCI: 00:19.0: enabled 0
651 12:55:51.342898 PCI: 00:19.1: enabled 1
652 12:55:51.342984 PCI: 00:19.2: enabled 0
653 12:55:51.346345 PCI: 00:1c.0: enabled 1
654 12:55:51.349823 PCI: 00:1c.1: enabled 0
655 12:55:51.349931 PCI: 00:1c.2: enabled 0
656 12:55:51.353233 PCI: 00:1c.3: enabled 0
657 12:55:51.356686 PCI: 00:1c.4: enabled 0
658 12:55:51.359680 PCI: 00:1c.5: enabled 0
659 12:55:51.359766 PCI: 00:1c.6: enabled 1
660 12:55:51.362829 PCI: 00:1c.7: enabled 0
661 12:55:51.366692 PCI: 00:1d.0: enabled 1
662 12:55:51.369939 PCI: 00:1d.1: enabled 0
663 12:55:51.370024 PCI: 00:1d.2: enabled 1
664 12:55:51.372916 PCI: 00:1d.3: enabled 0
665 12:55:51.376454 PCI: 00:1e.0: enabled 1
666 12:55:51.379623 PCI: 00:1e.1: enabled 0
667 12:55:51.379738 PCI: 00:1e.2: enabled 1
668 12:55:51.382685 PCI: 00:1e.3: enabled 1
669 12:55:51.386531 PCI: 00:1f.0: enabled 1
670 12:55:51.389584 PCI: 00:1f.1: enabled 0
671 12:55:51.389698 PCI: 00:1f.2: enabled 1
672 12:55:51.392864 PCI: 00:1f.3: enabled 1
673 12:55:51.395839 PCI: 00:1f.4: enabled 0
674 12:55:51.395932 PCI: 00:1f.5: enabled 1
675 12:55:51.399550 PCI: 00:1f.6: enabled 0
676 12:55:51.402701 PCI: 00:1f.7: enabled 0
677 12:55:51.405972 APIC: 00: enabled 1
678 12:55:51.406056 GENERIC: 0.0: enabled 1
679 12:55:51.409211 GENERIC: 0.0: enabled 1
680 12:55:51.412682 GENERIC: 1.0: enabled 1
681 12:55:51.415681 GENERIC: 0.0: enabled 1
682 12:55:51.415787 GENERIC: 1.0: enabled 1
683 12:55:51.419403 USB0 port 0: enabled 1
684 12:55:51.422834 GENERIC: 0.0: enabled 1
685 12:55:51.422919 USB0 port 0: enabled 1
686 12:55:51.425543 GENERIC: 0.0: enabled 1
687 12:55:51.429385 I2C: 00:1a: enabled 1
688 12:55:51.432094 I2C: 00:31: enabled 1
689 12:55:51.432179 I2C: 00:32: enabled 1
690 12:55:51.435943 I2C: 00:10: enabled 1
691 12:55:51.438917 I2C: 00:15: enabled 1
692 12:55:51.438989 GENERIC: 0.0: enabled 0
693 12:55:51.442472 GENERIC: 1.0: enabled 0
694 12:55:51.445653 GENERIC: 0.0: enabled 1
695 12:55:51.445724 SPI: 00: enabled 1
696 12:55:51.448974 SPI: 00: enabled 1
697 12:55:51.452315 PNP: 0c09.0: enabled 1
698 12:55:51.452425 GENERIC: 0.0: enabled 1
699 12:55:51.455673 USB3 port 0: enabled 1
700 12:55:51.459109 USB3 port 1: enabled 1
701 12:55:51.462238 USB3 port 2: enabled 0
702 12:55:51.462313 USB3 port 3: enabled 0
703 12:55:51.465205 USB2 port 0: enabled 0
704 12:55:51.468777 USB2 port 1: enabled 1
705 12:55:51.468865 USB2 port 2: enabled 1
706 12:55:51.472107 USB2 port 3: enabled 0
707 12:55:51.475746 USB2 port 4: enabled 1
708 12:55:51.478880 USB2 port 5: enabled 0
709 12:55:51.479017 USB2 port 6: enabled 0
710 12:55:51.481759 USB2 port 7: enabled 0
711 12:55:51.485547 USB2 port 8: enabled 0
712 12:55:51.485634 USB2 port 9: enabled 0
713 12:55:51.488539 USB3 port 0: enabled 0
714 12:55:51.491749 USB3 port 1: enabled 1
715 12:55:51.495454 USB3 port 2: enabled 0
716 12:55:51.495570 USB3 port 3: enabled 0
717 12:55:51.498527 GENERIC: 0.0: enabled 1
718 12:55:51.502030 GENERIC: 1.0: enabled 1
719 12:55:51.502186 APIC: 01: enabled 1
720 12:55:51.505199 APIC: 03: enabled 1
721 12:55:51.508446 APIC: 07: enabled 1
722 12:55:51.508562 APIC: 05: enabled 1
723 12:55:51.511401 APIC: 04: enabled 1
724 12:55:51.511520 APIC: 02: enabled 1
725 12:55:51.514963 APIC: 06: enabled 1
726 12:55:51.518286 Compare with tree...
727 12:55:51.518400 Root Device: enabled 1
728 12:55:51.521588 DOMAIN: 0000: enabled 1
729 12:55:51.524717 PCI: 00:00.0: enabled 1
730 12:55:51.528299 PCI: 00:02.0: enabled 1
731 12:55:51.531333 PCI: 00:04.0: enabled 1
732 12:55:51.531450 GENERIC: 0.0: enabled 1
733 12:55:51.534918 PCI: 00:05.0: enabled 1
734 12:55:51.537857 PCI: 00:06.0: enabled 0
735 12:55:51.541100 PCI: 00:07.0: enabled 0
736 12:55:51.544734 GENERIC: 0.0: enabled 1
737 12:55:51.544822 PCI: 00:07.1: enabled 0
738 12:55:51.547940 GENERIC: 1.0: enabled 1
739 12:55:51.551069 PCI: 00:07.2: enabled 0
740 12:55:51.554725 GENERIC: 0.0: enabled 1
741 12:55:51.558013 PCI: 00:07.3: enabled 0
742 12:55:51.558130 GENERIC: 1.0: enabled 1
743 12:55:51.561382 PCI: 00:08.0: enabled 1
744 12:55:51.564337 PCI: 00:09.0: enabled 0
745 12:55:51.567934 PCI: 00:0a.0: enabled 0
746 12:55:51.571550 PCI: 00:0d.0: enabled 1
747 12:55:51.571639 USB0 port 0: enabled 1
748 12:55:51.574733 USB3 port 0: enabled 1
749 12:55:51.577748 USB3 port 1: enabled 1
750 12:55:51.581061 USB3 port 2: enabled 0
751 12:55:51.584677 USB3 port 3: enabled 0
752 12:55:51.587845 PCI: 00:0d.1: enabled 0
753 12:55:51.587961 PCI: 00:0d.2: enabled 0
754 12:55:51.590819 GENERIC: 0.0: enabled 1
755 12:55:51.593997 PCI: 00:0d.3: enabled 0
756 12:55:51.597521 PCI: 00:0e.0: enabled 0
757 12:55:51.600887 PCI: 00:10.2: enabled 1
758 12:55:51.600995 PCI: 00:10.6: enabled 0
759 12:55:51.604283 PCI: 00:10.7: enabled 0
760 12:55:51.607655 PCI: 00:12.0: enabled 0
761 12:55:51.610841 PCI: 00:12.6: enabled 0
762 12:55:51.614451 PCI: 00:13.0: enabled 0
763 12:55:51.614529 PCI: 00:14.0: enabled 1
764 12:55:51.617543 USB0 port 0: enabled 1
765 12:55:51.620708 USB2 port 0: enabled 0
766 12:55:51.623996 USB2 port 1: enabled 1
767 12:55:51.627368 USB2 port 2: enabled 1
768 12:55:51.627478 USB2 port 3: enabled 0
769 12:55:51.630671 USB2 port 4: enabled 1
770 12:55:51.633993 USB2 port 5: enabled 0
771 12:55:51.637324 USB2 port 6: enabled 0
772 12:55:51.640782 USB2 port 7: enabled 0
773 12:55:51.643936 USB2 port 8: enabled 0
774 12:55:51.644057 USB2 port 9: enabled 0
775 12:55:51.647188 USB3 port 0: enabled 0
776 12:55:51.650378 USB3 port 1: enabled 1
777 12:55:51.653649 USB3 port 2: enabled 0
778 12:55:51.657386 USB3 port 3: enabled 0
779 12:55:51.660537 PCI: 00:14.1: enabled 0
780 12:55:51.660623 PCI: 00:14.2: enabled 1
781 12:55:51.663572 PCI: 00:14.3: enabled 1
782 12:55:51.666797 GENERIC: 0.0: enabled 1
783 12:55:51.670364 PCI: 00:15.0: enabled 1
784 12:55:51.673871 I2C: 00:1a: enabled 1
785 12:55:51.673956 I2C: 00:31: enabled 1
786 12:55:51.677153 I2C: 00:32: enabled 1
787 12:55:51.680104 PCI: 00:15.1: enabled 1
788 12:55:51.683548 I2C: 00:10: enabled 1
789 12:55:51.683634 PCI: 00:15.2: enabled 1
790 12:55:51.686941 PCI: 00:15.3: enabled 1
791 12:55:51.690011 PCI: 00:16.0: enabled 1
792 12:55:51.693480 PCI: 00:16.1: enabled 0
793 12:55:51.696726 PCI: 00:16.2: enabled 0
794 12:55:51.696813 PCI: 00:16.3: enabled 0
795 12:55:51.700396 PCI: 00:16.4: enabled 0
796 12:55:51.703587 PCI: 00:16.5: enabled 0
797 12:55:51.706710 PCI: 00:17.0: enabled 1
798 12:55:51.710341 PCI: 00:19.0: enabled 0
799 12:55:51.710422 PCI: 00:19.1: enabled 1
800 12:55:51.713277 I2C: 00:15: enabled 1
801 12:55:51.716529 PCI: 00:19.2: enabled 0
802 12:55:51.719720 PCI: 00:1d.0: enabled 1
803 12:55:51.723537 GENERIC: 0.0: enabled 1
804 12:55:51.723624 PCI: 00:1e.0: enabled 1
805 12:55:51.726768 PCI: 00:1e.1: enabled 0
806 12:55:51.729772 PCI: 00:1e.2: enabled 1
807 12:55:51.733138 SPI: 00: enabled 1
808 12:55:51.733246 PCI: 00:1e.3: enabled 1
809 12:55:51.736579 SPI: 00: enabled 1
810 12:55:51.739851 PCI: 00:1f.0: enabled 1
811 12:55:51.743197 PNP: 0c09.0: enabled 1
812 12:55:51.746679 PCI: 00:1f.1: enabled 0
813 12:55:51.746794 PCI: 00:1f.2: enabled 1
814 12:55:51.749785 GENERIC: 0.0: enabled 1
815 12:55:51.752725 GENERIC: 0.0: enabled 1
816 12:55:51.756422 GENERIC: 1.0: enabled 1
817 12:55:51.759623 PCI: 00:1f.3: enabled 1
818 12:55:51.759709 PCI: 00:1f.4: enabled 0
819 12:55:51.811289 PCI: 00:1f.5: enabled 1
820 12:55:51.811445 PCI: 00:1f.6: enabled 0
821 12:55:51.811740 PCI: 00:1f.7: enabled 0
822 12:55:51.811863 CPU_CLUSTER: 0: enabled 1
823 12:55:51.812027 APIC: 00: enabled 1
824 12:55:51.812118 APIC: 01: enabled 1
825 12:55:51.812203 APIC: 03: enabled 1
826 12:55:51.812301 APIC: 07: enabled 1
827 12:55:51.812394 APIC: 05: enabled 1
828 12:55:51.812484 APIC: 04: enabled 1
829 12:55:51.812585 APIC: 02: enabled 1
830 12:55:51.812660 APIC: 06: enabled 1
831 12:55:51.812722 Root Device scanning...
832 12:55:51.812795 scan_static_bus for Root Device
833 12:55:51.812854 DOMAIN: 0000 enabled
834 12:55:51.813094 CPU_CLUSTER: 0 enabled
835 12:55:51.813156 DOMAIN: 0000 scanning...
836 12:55:51.813213 PCI: pci_scan_bus for bus 00
837 12:55:51.813269 PCI: 00:00.0 [8086/0000] ops
838 12:55:51.819314 PCI: 00:00.0 [8086/9a12] enabled
839 12:55:51.819412 PCI: 00:02.0 [8086/0000] bus ops
840 12:55:51.822588 PCI: 00:02.0 [8086/9a40] enabled
841 12:55:51.822678 PCI: 00:04.0 [8086/0000] bus ops
842 12:55:51.826411 PCI: 00:04.0 [8086/9a03] enabled
843 12:55:51.829464 PCI: 00:05.0 [8086/9a19] enabled
844 12:55:51.832895 PCI: 00:07.0 [0000/0000] hidden
845 12:55:51.835756 PCI: 00:08.0 [8086/9a11] enabled
846 12:55:51.839287 PCI: 00:0a.0 [8086/9a0d] disabled
847 12:55:51.843150 PCI: 00:0d.0 [8086/0000] bus ops
848 12:55:51.846886 PCI: 00:0d.0 [8086/9a13] enabled
849 12:55:51.850255 PCI: 00:14.0 [8086/0000] bus ops
850 12:55:51.853479 PCI: 00:14.0 [8086/a0ed] enabled
851 12:55:51.856892 PCI: 00:14.2 [8086/a0ef] enabled
852 12:55:51.859734 PCI: 00:14.3 [8086/0000] bus ops
853 12:55:51.863240 PCI: 00:14.3 [8086/a0f0] enabled
854 12:55:51.866561 PCI: 00:15.0 [8086/0000] bus ops
855 12:55:51.869905 PCI: 00:15.0 [8086/a0e8] enabled
856 12:55:51.873317 PCI: 00:15.1 [8086/0000] bus ops
857 12:55:51.876571 PCI: 00:15.1 [8086/a0e9] enabled
858 12:55:51.880110 PCI: 00:15.2 [8086/0000] bus ops
859 12:55:51.883082 PCI: 00:15.2 [8086/a0ea] enabled
860 12:55:51.886349 PCI: 00:15.3 [8086/0000] bus ops
861 12:55:51.889440 PCI: 00:15.3 [8086/a0eb] enabled
862 12:55:51.892580 PCI: 00:16.0 [8086/0000] ops
863 12:55:51.895928 PCI: 00:16.0 [8086/a0e0] enabled
864 12:55:51.902707 PCI: Static device PCI: 00:17.0 not found, disabling it.
865 12:55:51.905832 PCI: 00:19.0 [8086/0000] bus ops
866 12:55:51.908972 PCI: 00:19.0 [8086/a0c5] disabled
867 12:55:51.912746 PCI: 00:19.1 [8086/0000] bus ops
868 12:55:51.915745 PCI: 00:19.1 [8086/a0c6] enabled
869 12:55:51.919268 PCI: 00:1d.0 [8086/0000] bus ops
870 12:55:51.922418 PCI: 00:1d.0 [8086/a0b0] enabled
871 12:55:51.925407 PCI: 00:1e.0 [8086/0000] ops
872 12:55:51.929268 PCI: 00:1e.0 [8086/a0a8] enabled
873 12:55:51.932370 PCI: 00:1e.2 [8086/0000] bus ops
874 12:55:51.935848 PCI: 00:1e.2 [8086/a0aa] enabled
875 12:55:51.939180 PCI: 00:1e.3 [8086/0000] bus ops
876 12:55:51.942000 PCI: 00:1e.3 [8086/a0ab] enabled
877 12:55:51.945293 PCI: 00:1f.0 [8086/0000] bus ops
878 12:55:51.948936 PCI: 00:1f.0 [8086/a087] enabled
879 12:55:51.949061 RTC Init
880 12:55:51.952225 Set power on after power failure.
881 12:55:51.955735 Disabling Deep S3
882 12:55:51.955845 Disabling Deep S3
883 12:55:51.958562 Disabling Deep S4
884 12:55:51.961624 Disabling Deep S4
885 12:55:51.961730 Disabling Deep S5
886 12:55:51.965521 Disabling Deep S5
887 12:55:51.968436 PCI: 00:1f.2 [0000/0000] hidden
888 12:55:51.971745 PCI: 00:1f.3 [8086/0000] bus ops
889 12:55:51.975419 PCI: 00:1f.3 [8086/a0c8] enabled
890 12:55:51.978218 PCI: 00:1f.5 [8086/0000] bus ops
891 12:55:51.981788 PCI: 00:1f.5 [8086/a0a4] enabled
892 12:55:51.985209 PCI: Leftover static devices:
893 12:55:51.985313 PCI: 00:10.2
894 12:55:51.985407 PCI: 00:10.6
895 12:55:51.988314 PCI: 00:10.7
896 12:55:51.988415 PCI: 00:06.0
897 12:55:51.991751 PCI: 00:07.1
898 12:55:51.991854 PCI: 00:07.2
899 12:55:51.994823 PCI: 00:07.3
900 12:55:51.994920 PCI: 00:09.0
901 12:55:51.995010 PCI: 00:0d.1
902 12:55:51.998279 PCI: 00:0d.2
903 12:55:51.998379 PCI: 00:0d.3
904 12:55:52.001366 PCI: 00:0e.0
905 12:55:52.001468 PCI: 00:12.0
906 12:55:52.001560 PCI: 00:12.6
907 12:55:52.005002 PCI: 00:13.0
908 12:55:52.005105 PCI: 00:14.1
909 12:55:52.008465 PCI: 00:16.1
910 12:55:52.008571 PCI: 00:16.2
911 12:55:52.011784 PCI: 00:16.3
912 12:55:52.011887 PCI: 00:16.4
913 12:55:52.011977 PCI: 00:16.5
914 12:55:52.014730 PCI: 00:17.0
915 12:55:52.014803 PCI: 00:19.2
916 12:55:52.017722 PCI: 00:1e.1
917 12:55:52.017793 PCI: 00:1f.1
918 12:55:52.017854 PCI: 00:1f.4
919 12:55:52.021512 PCI: 00:1f.6
920 12:55:52.021594 PCI: 00:1f.7
921 12:55:52.024383 PCI: Check your devicetree.cb.
922 12:55:52.028034 PCI: 00:02.0 scanning...
923 12:55:52.031166 scan_generic_bus for PCI: 00:02.0
924 12:55:52.034325 scan_generic_bus for PCI: 00:02.0 done
925 12:55:52.041149 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
926 12:55:52.041258 PCI: 00:04.0 scanning...
927 12:55:52.048112 scan_generic_bus for PCI: 00:04.0
928 12:55:52.048220 GENERIC: 0.0 enabled
929 12:55:52.054508 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
930 12:55:52.058092 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
931 12:55:52.061154 PCI: 00:0d.0 scanning...
932 12:55:52.064425 scan_static_bus for PCI: 00:0d.0
933 12:55:52.067837 USB0 port 0 enabled
934 12:55:52.070960 USB0 port 0 scanning...
935 12:55:52.074287 scan_static_bus for USB0 port 0
936 12:55:52.074385 USB3 port 0 enabled
937 12:55:52.077413 USB3 port 1 enabled
938 12:55:52.080790 USB3 port 2 disabled
939 12:55:52.080899 USB3 port 3 disabled
940 12:55:52.084342 USB3 port 0 scanning...
941 12:55:52.087162 scan_static_bus for USB3 port 0
942 12:55:52.090615 scan_static_bus for USB3 port 0 done
943 12:55:52.097042 scan_bus: bus USB3 port 0 finished in 6 msecs
944 12:55:52.097165 USB3 port 1 scanning...
945 12:55:52.100646 scan_static_bus for USB3 port 1
946 12:55:52.107162 scan_static_bus for USB3 port 1 done
947 12:55:52.110312 scan_bus: bus USB3 port 1 finished in 6 msecs
948 12:55:52.114011 scan_static_bus for USB0 port 0 done
949 12:55:52.117333 scan_bus: bus USB0 port 0 finished in 43 msecs
950 12:55:52.123465 scan_static_bus for PCI: 00:0d.0 done
951 12:55:52.126839 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
952 12:55:52.130155 PCI: 00:14.0 scanning...
953 12:55:52.133446 scan_static_bus for PCI: 00:14.0
954 12:55:52.136709 USB0 port 0 enabled
955 12:55:52.136831 USB0 port 0 scanning...
956 12:55:52.140433 scan_static_bus for USB0 port 0
957 12:55:52.143316 USB2 port 0 disabled
958 12:55:52.146640 USB2 port 1 enabled
959 12:55:52.146741 USB2 port 2 enabled
960 12:55:52.149801 USB2 port 3 disabled
961 12:55:52.153454 USB2 port 4 enabled
962 12:55:52.153568 USB2 port 5 disabled
963 12:55:52.156469 USB2 port 6 disabled
964 12:55:52.156559 USB2 port 7 disabled
965 12:55:52.160187 USB2 port 8 disabled
966 12:55:52.163231 USB2 port 9 disabled
967 12:55:52.163342 USB3 port 0 disabled
968 12:55:52.166643 USB3 port 1 enabled
969 12:55:52.170148 USB3 port 2 disabled
970 12:55:52.170251 USB3 port 3 disabled
971 12:55:52.173532 USB2 port 1 scanning...
972 12:55:52.176251 scan_static_bus for USB2 port 1
973 12:55:52.179460 scan_static_bus for USB2 port 1 done
974 12:55:52.186356 scan_bus: bus USB2 port 1 finished in 6 msecs
975 12:55:52.186486 USB2 port 2 scanning...
976 12:55:52.189469 scan_static_bus for USB2 port 2
977 12:55:52.196054 scan_static_bus for USB2 port 2 done
978 12:55:52.199998 scan_bus: bus USB2 port 2 finished in 6 msecs
979 12:55:52.202957 USB2 port 4 scanning...
980 12:55:52.206034 scan_static_bus for USB2 port 4
981 12:55:52.209737 scan_static_bus for USB2 port 4 done
982 12:55:52.212750 scan_bus: bus USB2 port 4 finished in 6 msecs
983 12:55:52.216202 USB3 port 1 scanning...
984 12:55:52.219481 scan_static_bus for USB3 port 1
985 12:55:52.222446 scan_static_bus for USB3 port 1 done
986 12:55:52.229387 scan_bus: bus USB3 port 1 finished in 6 msecs
987 12:55:52.232705 scan_static_bus for USB0 port 0 done
988 12:55:52.235665 scan_bus: bus USB0 port 0 finished in 93 msecs
989 12:55:52.239011 scan_static_bus for PCI: 00:14.0 done
990 12:55:52.245997 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
991 12:55:52.246086 PCI: 00:14.3 scanning...
992 12:55:52.249744 scan_static_bus for PCI: 00:14.3
993 12:55:52.252384 GENERIC: 0.0 enabled
994 12:55:52.255855 scan_static_bus for PCI: 00:14.3 done
995 12:55:52.262442 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
996 12:55:52.262527 PCI: 00:15.0 scanning...
997 12:55:52.265989 scan_static_bus for PCI: 00:15.0
998 12:55:52.269415 I2C: 00:1a enabled
999 12:55:52.272630 I2C: 00:31 enabled
1000 12:55:52.272716 I2C: 00:32 enabled
1001 12:55:52.276032 scan_static_bus for PCI: 00:15.0 done
1002 12:55:52.282567 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1003 12:55:52.286013 PCI: 00:15.1 scanning...
1004 12:55:52.289007 scan_static_bus for PCI: 00:15.1
1005 12:55:52.289095 I2C: 00:10 enabled
1006 12:55:52.292807 scan_static_bus for PCI: 00:15.1 done
1007 12:55:52.298904 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1008 12:55:52.302552 PCI: 00:15.2 scanning...
1009 12:55:52.306106 scan_static_bus for PCI: 00:15.2
1010 12:55:52.309219 scan_static_bus for PCI: 00:15.2 done
1011 12:55:52.312297 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1012 12:55:52.315539 PCI: 00:15.3 scanning...
1013 12:55:52.319122 scan_static_bus for PCI: 00:15.3
1014 12:55:52.322215 scan_static_bus for PCI: 00:15.3 done
1015 12:55:52.328779 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1016 12:55:52.328907 PCI: 00:19.1 scanning...
1017 12:55:52.332444 scan_static_bus for PCI: 00:19.1
1018 12:55:52.335585 I2C: 00:15 enabled
1019 12:55:52.338928 scan_static_bus for PCI: 00:19.1 done
1020 12:55:52.345553 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1021 12:55:52.345688 PCI: 00:1d.0 scanning...
1022 12:55:52.351925 do_pci_scan_bridge for PCI: 00:1d.0
1023 12:55:52.352061 PCI: pci_scan_bus for bus 01
1024 12:55:52.355586 PCI: 01:00.0 [15b7/5009] enabled
1025 12:55:52.358835 GENERIC: 0.0 enabled
1026 12:55:52.361984 Enabling Common Clock Configuration
1027 12:55:52.368926 L1 Sub-State supported from root port 29
1028 12:55:52.369034 L1 Sub-State Support = 0x5
1029 12:55:52.372355 CommonModeRestoreTime = 0x28
1030 12:55:52.378774 Power On Value = 0x16, Power On Scale = 0x0
1031 12:55:52.378860 ASPM: Enabled L1
1032 12:55:52.381909 PCIe: Max_Payload_Size adjusted to 128
1033 12:55:52.388747 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1034 12:55:52.391722 PCI: 00:1e.2 scanning...
1035 12:55:52.395178 scan_generic_bus for PCI: 00:1e.2
1036 12:55:52.395324 SPI: 00 enabled
1037 12:55:52.401679 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1038 12:55:52.405298 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1039 12:55:52.408113 PCI: 00:1e.3 scanning...
1040 12:55:52.411884 scan_generic_bus for PCI: 00:1e.3
1041 12:55:52.414814 SPI: 00 enabled
1042 12:55:52.421827 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1043 12:55:52.425586 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1044 12:55:52.429236 PCI: 00:1f.0 scanning...
1045 12:55:52.432454 scan_static_bus for PCI: 00:1f.0
1046 12:55:52.432557 PNP: 0c09.0 enabled
1047 12:55:52.435859 PNP: 0c09.0 scanning...
1048 12:55:52.438848 scan_static_bus for PNP: 0c09.0
1049 12:55:52.442438 scan_static_bus for PNP: 0c09.0 done
1050 12:55:52.448949 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1051 12:55:52.452569 scan_static_bus for PCI: 00:1f.0 done
1052 12:55:52.455647 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1053 12:55:52.459185 PCI: 00:1f.2 scanning...
1054 12:55:52.462182 scan_static_bus for PCI: 00:1f.2
1055 12:55:52.465471 GENERIC: 0.0 enabled
1056 12:55:52.465563 GENERIC: 0.0 scanning...
1057 12:55:52.468925 scan_static_bus for GENERIC: 0.0
1058 12:55:52.472109 GENERIC: 0.0 enabled
1059 12:55:52.475209 GENERIC: 1.0 enabled
1060 12:55:52.478526 scan_static_bus for GENERIC: 0.0 done
1061 12:55:52.481689 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1062 12:55:52.488466 scan_static_bus for PCI: 00:1f.2 done
1063 12:55:52.491917 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1064 12:55:52.495531 PCI: 00:1f.3 scanning...
1065 12:55:52.498776 scan_static_bus for PCI: 00:1f.3
1066 12:55:52.502114 scan_static_bus for PCI: 00:1f.3 done
1067 12:55:52.505368 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1068 12:55:52.508884 PCI: 00:1f.5 scanning...
1069 12:55:52.511910 scan_generic_bus for PCI: 00:1f.5
1070 12:55:52.515398 scan_generic_bus for PCI: 00:1f.5 done
1071 12:55:52.522365 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1072 12:55:52.525545 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1073 12:55:52.528449 scan_static_bus for Root Device done
1074 12:55:52.535284 scan_bus: bus Root Device finished in 735 msecs
1075 12:55:52.535726 done
1076 12:55:52.541899 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1077 12:55:52.544785 Chrome EC: UHEPI supported
1078 12:55:52.551386 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1079 12:55:52.558721 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1080 12:55:52.561888 SPI flash protection: WPSW=0 SRP0=1
1081 12:55:52.564677 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1082 12:55:52.571830 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1083 12:55:52.574699 found VGA at PCI: 00:02.0
1084 12:55:52.578073 Setting up VGA for PCI: 00:02.0
1085 12:55:52.584710 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1086 12:55:52.587918 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1087 12:55:52.591675 Allocating resources...
1088 12:55:52.592038 Reading resources...
1089 12:55:52.597904 Root Device read_resources bus 0 link: 0
1090 12:55:52.601083 DOMAIN: 0000 read_resources bus 0 link: 0
1091 12:55:52.607581 PCI: 00:04.0 read_resources bus 1 link: 0
1092 12:55:52.611231 PCI: 00:04.0 read_resources bus 1 link: 0 done
1093 12:55:52.617812 PCI: 00:0d.0 read_resources bus 0 link: 0
1094 12:55:52.620886 USB0 port 0 read_resources bus 0 link: 0
1095 12:55:52.627221 USB0 port 0 read_resources bus 0 link: 0 done
1096 12:55:52.630801 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1097 12:55:52.634150 PCI: 00:14.0 read_resources bus 0 link: 0
1098 12:55:52.640787 USB0 port 0 read_resources bus 0 link: 0
1099 12:55:52.644251 USB0 port 0 read_resources bus 0 link: 0 done
1100 12:55:52.650896 PCI: 00:14.0 read_resources bus 0 link: 0 done
1101 12:55:52.653830 PCI: 00:14.3 read_resources bus 0 link: 0
1102 12:55:52.660777 PCI: 00:14.3 read_resources bus 0 link: 0 done
1103 12:55:52.664339 PCI: 00:15.0 read_resources bus 0 link: 0
1104 12:55:52.671058 PCI: 00:15.0 read_resources bus 0 link: 0 done
1105 12:55:52.674343 PCI: 00:15.1 read_resources bus 0 link: 0
1106 12:55:52.680531 PCI: 00:15.1 read_resources bus 0 link: 0 done
1107 12:55:52.683883 PCI: 00:19.1 read_resources bus 0 link: 0
1108 12:55:52.691016 PCI: 00:19.1 read_resources bus 0 link: 0 done
1109 12:55:52.694084 PCI: 00:1d.0 read_resources bus 1 link: 0
1110 12:55:52.701148 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1111 12:55:52.704467 PCI: 00:1e.2 read_resources bus 2 link: 0
1112 12:55:52.711350 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1113 12:55:52.714346 PCI: 00:1e.3 read_resources bus 3 link: 0
1114 12:55:52.721144 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1115 12:55:52.724095 PCI: 00:1f.0 read_resources bus 0 link: 0
1116 12:55:52.731083 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1117 12:55:52.734958 PCI: 00:1f.2 read_resources bus 0 link: 0
1118 12:55:52.737641 GENERIC: 0.0 read_resources bus 0 link: 0
1119 12:55:52.744854 GENERIC: 0.0 read_resources bus 0 link: 0 done
1120 12:55:52.748186 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1121 12:55:52.754962 DOMAIN: 0000 read_resources bus 0 link: 0 done
1122 12:55:52.758756 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1123 12:55:52.765061 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1124 12:55:52.768645 Root Device read_resources bus 0 link: 0 done
1125 12:55:52.771972 Done reading resources.
1126 12:55:52.778386 Show resources in subtree (Root Device)...After reading.
1127 12:55:52.781684 Root Device child on link 0 DOMAIN: 0000
1128 12:55:52.784861 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1129 12:55:52.795092 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1130 12:55:52.804562 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1131 12:55:52.808401 PCI: 00:00.0
1132 12:55:52.818199 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1133 12:55:52.824340 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1134 12:55:52.834463 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1135 12:55:52.845014 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1136 12:55:52.854494 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1137 12:55:52.864570 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1138 12:55:52.874499 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1139 12:55:52.880794 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1140 12:55:52.890896 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1141 12:55:52.900916 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1142 12:55:52.910679 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1143 12:55:52.920312 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1144 12:55:52.930769 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1145 12:55:52.937364 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1146 12:55:52.947451 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1147 12:55:52.956598 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1148 12:55:52.966954 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1149 12:55:52.976812 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1150 12:55:52.986827 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1151 12:55:52.996576 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1152 12:55:52.997110 PCI: 00:02.0
1153 12:55:53.006382 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 12:55:53.016062 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1155 12:55:53.026001 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1156 12:55:53.029563 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1157 12:55:53.039205 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1158 12:55:53.042345 GENERIC: 0.0
1159 12:55:53.042788 PCI: 00:05.0
1160 12:55:53.052553 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1161 12:55:53.060034 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1162 12:55:53.060464 GENERIC: 0.0
1163 12:55:53.062232 PCI: 00:08.0
1164 12:55:53.072556 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 12:55:53.073113 PCI: 00:0a.0
1166 12:55:53.078946 PCI: 00:0d.0 child on link 0 USB0 port 0
1167 12:55:53.088885 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 12:55:53.092150 USB0 port 0 child on link 0 USB3 port 0
1169 12:55:53.095710 USB3 port 0
1170 12:55:53.096100 USB3 port 1
1171 12:55:53.098962 USB3 port 2
1172 12:55:53.099408 USB3 port 3
1173 12:55:53.105337 PCI: 00:14.0 child on link 0 USB0 port 0
1174 12:55:53.114960 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1175 12:55:53.118544 USB0 port 0 child on link 0 USB2 port 0
1176 12:55:53.118936 USB2 port 0
1177 12:55:53.121753 USB2 port 1
1178 12:55:53.125242 USB2 port 2
1179 12:55:53.125658 USB2 port 3
1180 12:55:53.128260 USB2 port 4
1181 12:55:53.128630 USB2 port 5
1182 12:55:53.131252 USB2 port 6
1183 12:55:53.131486 USB2 port 7
1184 12:55:53.134955 USB2 port 8
1185 12:55:53.135241 USB2 port 9
1186 12:55:53.138130 USB3 port 0
1187 12:55:53.138364 USB3 port 1
1188 12:55:53.141229 USB3 port 2
1189 12:55:53.141423 USB3 port 3
1190 12:55:53.144831 PCI: 00:14.2
1191 12:55:53.154459 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1192 12:55:53.164547 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1193 12:55:53.167773 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1194 12:55:53.177645 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1195 12:55:53.180891 GENERIC: 0.0
1196 12:55:53.184111 PCI: 00:15.0 child on link 0 I2C: 00:1a
1197 12:55:53.194543 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1198 12:55:53.197424 I2C: 00:1a
1199 12:55:53.197508 I2C: 00:31
1200 12:55:53.200918 I2C: 00:32
1201 12:55:53.203833 PCI: 00:15.1 child on link 0 I2C: 00:10
1202 12:55:53.213952 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 12:55:53.214054 I2C: 00:10
1204 12:55:53.216958 PCI: 00:15.2
1205 12:55:53.227157 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 12:55:53.227245 PCI: 00:15.3
1207 12:55:53.237365 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1208 12:55:53.240016 PCI: 00:16.0
1209 12:55:53.250506 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1210 12:55:53.250594 PCI: 00:19.0
1211 12:55:53.256630 PCI: 00:19.1 child on link 0 I2C: 00:15
1212 12:55:53.266689 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1213 12:55:53.266778 I2C: 00:15
1214 12:55:53.274215 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1215 12:55:53.279666 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1216 12:55:53.289701 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1217 12:55:53.299700 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1218 12:55:53.299806 GENERIC: 0.0
1219 12:55:53.302935 PCI: 01:00.0
1220 12:55:53.312836 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1221 12:55:53.322691 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1222 12:55:53.326405 PCI: 00:1e.0
1223 12:55:53.335860 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1224 12:55:53.339003 PCI: 00:1e.2 child on link 0 SPI: 00
1225 12:55:53.349138 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1226 12:55:53.352610 SPI: 00
1227 12:55:53.356113 PCI: 00:1e.3 child on link 0 SPI: 00
1228 12:55:53.366227 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1229 12:55:53.366340 SPI: 00
1230 12:55:53.369108 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1231 12:55:53.379202 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1232 12:55:53.382167 PNP: 0c09.0
1233 12:55:53.388691 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1234 12:55:53.395869 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1235 12:55:53.402133 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1236 12:55:53.412054 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1237 12:55:53.418781 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1238 12:55:53.419126 GENERIC: 0.0
1239 12:55:53.422151 GENERIC: 1.0
1240 12:55:53.422506 PCI: 00:1f.3
1241 12:55:53.432175 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1242 12:55:53.441628 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1243 12:55:53.445572 PCI: 00:1f.5
1244 12:55:53.455396 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1245 12:55:53.458149 CPU_CLUSTER: 0 child on link 0 APIC: 00
1246 12:55:53.458653 APIC: 00
1247 12:55:53.461550 APIC: 01
1248 12:55:53.462087 APIC: 03
1249 12:55:53.462494 APIC: 07
1250 12:55:53.465414 APIC: 05
1251 12:55:53.465737 APIC: 04
1252 12:55:53.468331 APIC: 02
1253 12:55:53.468575 APIC: 06
1254 12:55:53.474783 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1255 12:55:53.481032 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1256 12:55:53.488169 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1257 12:55:53.494671 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1258 12:55:53.498024 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1259 12:55:53.501443 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1260 12:55:53.508392 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1261 12:55:53.517762 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1262 12:55:53.524572 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1263 12:55:53.530875 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1264 12:55:53.537502 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1265 12:55:53.544056 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1266 12:55:53.554439 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1267 12:55:53.560928 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1268 12:55:53.563983 DOMAIN: 0000: Resource ranges:
1269 12:55:53.567619 * Base: 1000, Size: 800, Tag: 100
1270 12:55:53.571127 * Base: 1900, Size: e700, Tag: 100
1271 12:55:53.577516 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1272 12:55:53.583906 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1273 12:55:53.590680 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1274 12:55:53.597158 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1275 12:55:53.603646 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1276 12:55:53.613438 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1277 12:55:53.620025 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1278 12:55:53.626827 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1279 12:55:53.636905 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1280 12:55:53.643045 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1281 12:55:53.649787 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1282 12:55:53.659923 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1283 12:55:53.666313 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1284 12:55:53.672925 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1285 12:55:53.682433 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1286 12:55:53.688963 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1287 12:55:53.696000 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1288 12:55:53.705831 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1289 12:55:53.712713 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1290 12:55:53.722233 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1291 12:55:53.729248 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1292 12:55:53.735500 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1293 12:55:53.745496 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1294 12:55:53.752519 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1295 12:55:53.758850 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1296 12:55:53.762204 DOMAIN: 0000: Resource ranges:
1297 12:55:53.765834 * Base: 7fc00000, Size: 40400000, Tag: 200
1298 12:55:53.772228 * Base: d0000000, Size: 28000000, Tag: 200
1299 12:55:53.775347 * Base: fa000000, Size: 1000000, Tag: 200
1300 12:55:53.778837 * Base: fb001000, Size: 2fff000, Tag: 200
1301 12:55:53.785197 * Base: fe010000, Size: 2e000, Tag: 200
1302 12:55:53.788768 * Base: fe03f000, Size: d41000, Tag: 200
1303 12:55:53.792306 * Base: fed88000, Size: 8000, Tag: 200
1304 12:55:53.795105 * Base: fed93000, Size: d000, Tag: 200
1305 12:55:53.801954 * Base: feda2000, Size: 1e000, Tag: 200
1306 12:55:53.804934 * Base: fede0000, Size: 1220000, Tag: 200
1307 12:55:53.808608 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1308 12:55:53.814906 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1309 12:55:53.824593 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1310 12:55:53.831529 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1311 12:55:53.838196 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1312 12:55:53.844564 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1313 12:55:53.851450 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1314 12:55:53.857651 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1315 12:55:53.864340 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1316 12:55:53.870727 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1317 12:55:53.878040 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1318 12:55:53.884177 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1319 12:55:53.890953 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1320 12:55:53.897157 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1321 12:55:53.904166 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1322 12:55:53.910354 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1323 12:55:53.917535 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1324 12:55:53.924024 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1325 12:55:53.930508 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1326 12:55:53.936843 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1327 12:55:53.943481 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1328 12:55:53.950176 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1329 12:55:53.956762 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1330 12:55:53.963407 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1331 12:55:53.969682 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1332 12:55:53.972844 PCI: 00:1d.0: Resource ranges:
1333 12:55:53.979635 * Base: 7fc00000, Size: 100000, Tag: 200
1334 12:55:53.986443 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1335 12:55:53.993202 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1336 12:55:53.999643 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1337 12:55:54.006351 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1338 12:55:54.012773 Root Device assign_resources, bus 0 link: 0
1339 12:55:54.016575 DOMAIN: 0000 assign_resources, bus 0 link: 0
1340 12:55:54.026182 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1341 12:55:54.032801 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1342 12:55:54.039059 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1343 12:55:54.049740 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1344 12:55:54.052785 PCI: 00:04.0 assign_resources, bus 1 link: 0
1345 12:55:54.059134 PCI: 00:04.0 assign_resources, bus 1 link: 0
1346 12:55:54.066303 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1347 12:55:54.075955 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1348 12:55:54.082412 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1349 12:55:54.089015 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1350 12:55:54.092623 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1351 12:55:54.099243 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1352 12:55:54.105769 PCI: 00:14.0 assign_resources, bus 0 link: 0
1353 12:55:54.108956 PCI: 00:14.0 assign_resources, bus 0 link: 0
1354 12:55:54.119096 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1355 12:55:54.125869 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1356 12:55:54.135282 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1357 12:55:54.138680 PCI: 00:14.3 assign_resources, bus 0 link: 0
1358 12:55:54.141481 PCI: 00:14.3 assign_resources, bus 0 link: 0
1359 12:55:54.151722 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1360 12:55:54.155170 PCI: 00:15.0 assign_resources, bus 0 link: 0
1361 12:55:54.162021 PCI: 00:15.0 assign_resources, bus 0 link: 0
1362 12:55:54.168782 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1363 12:55:54.174859 PCI: 00:15.1 assign_resources, bus 0 link: 0
1364 12:55:54.178171 PCI: 00:15.1 assign_resources, bus 0 link: 0
1365 12:55:54.184762 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1366 12:55:54.195024 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1367 12:55:54.201781 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1368 12:55:54.211788 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1369 12:55:54.214796 PCI: 00:19.1 assign_resources, bus 0 link: 0
1370 12:55:54.221232 PCI: 00:19.1 assign_resources, bus 0 link: 0
1371 12:55:54.228066 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1372 12:55:54.237602 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1373 12:55:54.247602 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1374 12:55:54.250974 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1375 12:55:54.261535 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1376 12:55:54.267719 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1377 12:55:54.274136 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1378 12:55:54.280814 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1379 12:55:54.287958 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1380 12:55:54.290481 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1381 12:55:54.297346 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1382 12:55:54.303757 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1383 12:55:54.307614 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1384 12:55:54.313730 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1385 12:55:54.316981 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1386 12:55:54.323597 LPC: Trying to open IO window from 800 size 1ff
1387 12:55:54.330806 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1388 12:55:54.340210 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1389 12:55:54.346683 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1390 12:55:54.350012 DOMAIN: 0000 assign_resources, bus 0 link: 0
1391 12:55:54.356856 Root Device assign_resources, bus 0 link: 0
1392 12:55:54.360557 Done setting resources.
1393 12:55:54.366814 Show resources in subtree (Root Device)...After assigning values.
1394 12:55:54.370172 Root Device child on link 0 DOMAIN: 0000
1395 12:55:54.373411 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1396 12:55:54.383713 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1397 12:55:54.393759 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1398 12:55:54.394376 PCI: 00:00.0
1399 12:55:54.403224 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1400 12:55:54.413330 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1401 12:55:54.423317 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1402 12:55:54.433316 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1403 12:55:54.443184 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1404 12:55:54.452971 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1405 12:55:54.459658 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1406 12:55:54.469774 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1407 12:55:54.479905 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1408 12:55:54.489580 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1409 12:55:54.499297 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1410 12:55:54.506369 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1411 12:55:54.516164 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1412 12:55:54.525853 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1413 12:55:54.535837 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1414 12:55:54.545925 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1415 12:55:54.555642 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1416 12:55:54.565865 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1417 12:55:54.572375 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1418 12:55:54.582248 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1419 12:55:54.585548 PCI: 00:02.0
1420 12:55:54.595754 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1421 12:55:54.605317 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1422 12:55:54.615559 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1423 12:55:54.618642 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1424 12:55:54.628403 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1425 12:55:54.631742 GENERIC: 0.0
1426 12:55:54.632041 PCI: 00:05.0
1427 12:55:54.645253 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1428 12:55:54.648801 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1429 12:55:54.652049 GENERIC: 0.0
1430 12:55:54.652351 PCI: 00:08.0
1431 12:55:54.661646 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1432 12:55:54.664789 PCI: 00:0a.0
1433 12:55:54.668098 PCI: 00:0d.0 child on link 0 USB0 port 0
1434 12:55:54.678181 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1435 12:55:54.685255 USB0 port 0 child on link 0 USB3 port 0
1436 12:55:54.685576 USB3 port 0
1437 12:55:54.687898 USB3 port 1
1438 12:55:54.688201 USB3 port 2
1439 12:55:54.691699 USB3 port 3
1440 12:55:54.695171 PCI: 00:14.0 child on link 0 USB0 port 0
1441 12:55:54.704976 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1442 12:55:54.708134 USB0 port 0 child on link 0 USB2 port 0
1443 12:55:54.711356 USB2 port 0
1444 12:55:54.714915 USB2 port 1
1445 12:55:54.715420 USB2 port 2
1446 12:55:54.718471 USB2 port 3
1447 12:55:54.718858 USB2 port 4
1448 12:55:54.721248 USB2 port 5
1449 12:55:54.721669 USB2 port 6
1450 12:55:54.724422 USB2 port 7
1451 12:55:54.724864 USB2 port 8
1452 12:55:54.728145 USB2 port 9
1453 12:55:54.728566 USB3 port 0
1454 12:55:54.730952 USB3 port 1
1455 12:55:54.731462 USB3 port 2
1456 12:55:54.734133 USB3 port 3
1457 12:55:54.734433 PCI: 00:14.2
1458 12:55:54.747939 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1459 12:55:54.757667 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1460 12:55:54.761290 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1461 12:55:54.770629 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1462 12:55:54.774151 GENERIC: 0.0
1463 12:55:54.777724 PCI: 00:15.0 child on link 0 I2C: 00:1a
1464 12:55:54.787281 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1465 12:55:54.790463 I2C: 00:1a
1466 12:55:54.790792 I2C: 00:31
1467 12:55:54.793942 I2C: 00:32
1468 12:55:54.796946 PCI: 00:15.1 child on link 0 I2C: 00:10
1469 12:55:54.807072 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1470 12:55:54.810280 I2C: 00:10
1471 12:55:54.810607 PCI: 00:15.2
1472 12:55:54.820553 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1473 12:55:54.823812 PCI: 00:15.3
1474 12:55:54.833729 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1475 12:55:54.834061 PCI: 00:16.0
1476 12:55:54.843392 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1477 12:55:54.847174 PCI: 00:19.0
1478 12:55:54.850161 PCI: 00:19.1 child on link 0 I2C: 00:15
1479 12:55:54.860111 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1480 12:55:54.863821 I2C: 00:15
1481 12:55:54.866606 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1482 12:55:54.876692 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1483 12:55:54.886727 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1484 12:55:54.900265 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1485 12:55:54.900717 GENERIC: 0.0
1486 12:55:54.903304 PCI: 01:00.0
1487 12:55:54.912961 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1488 12:55:54.922916 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1489 12:55:54.923403 PCI: 00:1e.0
1490 12:55:54.936209 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1491 12:55:54.939860 PCI: 00:1e.2 child on link 0 SPI: 00
1492 12:55:54.949486 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1493 12:55:54.952667 SPI: 00
1494 12:55:54.956196 PCI: 00:1e.3 child on link 0 SPI: 00
1495 12:55:54.965821 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1496 12:55:54.966269 SPI: 00
1497 12:55:54.972459 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1498 12:55:54.979175 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1499 12:55:54.982344 PNP: 0c09.0
1500 12:55:54.988868 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1501 12:55:54.995343 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1502 12:55:55.005560 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1503 12:55:55.012283 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1504 12:55:55.018421 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1505 12:55:55.018847 GENERIC: 0.0
1506 12:55:55.021964 GENERIC: 1.0
1507 12:55:55.022409 PCI: 00:1f.3
1508 12:55:55.035230 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1509 12:55:55.044866 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1510 12:55:55.045379 PCI: 00:1f.5
1511 12:55:55.058089 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1512 12:55:55.061072 CPU_CLUSTER: 0 child on link 0 APIC: 00
1513 12:55:55.061811 APIC: 00
1514 12:55:55.064559 APIC: 01
1515 12:55:55.065060 APIC: 03
1516 12:55:55.065509 APIC: 07
1517 12:55:55.067555 APIC: 05
1518 12:55:55.067985 APIC: 04
1519 12:55:55.068433 APIC: 02
1520 12:55:55.070847 APIC: 06
1521 12:55:55.073885 Done allocating resources.
1522 12:55:55.080409 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1523 12:55:55.083772 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1524 12:55:55.090535 Configure GPIOs for I2S audio on UP4.
1525 12:55:55.096999 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1526 12:55:55.097083 Enabling resources...
1527 12:55:55.104006 PCI: 00:00.0 subsystem <- 8086/9a12
1528 12:55:55.104097 PCI: 00:00.0 cmd <- 06
1529 12:55:55.107753 PCI: 00:02.0 subsystem <- 8086/9a40
1530 12:55:55.110350 PCI: 00:02.0 cmd <- 03
1531 12:55:55.113793 PCI: 00:04.0 subsystem <- 8086/9a03
1532 12:55:55.117458 PCI: 00:04.0 cmd <- 02
1533 12:55:55.119996 PCI: 00:05.0 subsystem <- 8086/9a19
1534 12:55:55.123902 PCI: 00:05.0 cmd <- 02
1535 12:55:55.127052 PCI: 00:08.0 subsystem <- 8086/9a11
1536 12:55:55.129765 PCI: 00:08.0 cmd <- 06
1537 12:55:55.133200 PCI: 00:0d.0 subsystem <- 8086/9a13
1538 12:55:55.136582 PCI: 00:0d.0 cmd <- 02
1539 12:55:55.139738 PCI: 00:14.0 subsystem <- 8086/a0ed
1540 12:55:55.143523 PCI: 00:14.0 cmd <- 02
1541 12:55:55.146316 PCI: 00:14.2 subsystem <- 8086/a0ef
1542 12:55:55.146393 PCI: 00:14.2 cmd <- 02
1543 12:55:55.153061 PCI: 00:14.3 subsystem <- 8086/a0f0
1544 12:55:55.153158 PCI: 00:14.3 cmd <- 02
1545 12:55:55.156327 PCI: 00:15.0 subsystem <- 8086/a0e8
1546 12:55:55.159416 PCI: 00:15.0 cmd <- 02
1547 12:55:55.162839 PCI: 00:15.1 subsystem <- 8086/a0e9
1548 12:55:55.166090 PCI: 00:15.1 cmd <- 02
1549 12:55:55.169461 PCI: 00:15.2 subsystem <- 8086/a0ea
1550 12:55:55.172941 PCI: 00:15.2 cmd <- 02
1551 12:55:55.176234 PCI: 00:15.3 subsystem <- 8086/a0eb
1552 12:55:55.179227 PCI: 00:15.3 cmd <- 02
1553 12:55:55.182889 PCI: 00:16.0 subsystem <- 8086/a0e0
1554 12:55:55.186135 PCI: 00:16.0 cmd <- 02
1555 12:55:55.189395 PCI: 00:19.1 subsystem <- 8086/a0c6
1556 12:55:55.192574 PCI: 00:19.1 cmd <- 02
1557 12:55:55.196330 PCI: 00:1d.0 bridge ctrl <- 0013
1558 12:55:55.199277 PCI: 00:1d.0 subsystem <- 8086/a0b0
1559 12:55:55.199449 PCI: 00:1d.0 cmd <- 06
1560 12:55:55.206162 PCI: 00:1e.0 subsystem <- 8086/a0a8
1561 12:55:55.206399 PCI: 00:1e.0 cmd <- 06
1562 12:55:55.209355 PCI: 00:1e.2 subsystem <- 8086/a0aa
1563 12:55:55.212968 PCI: 00:1e.2 cmd <- 06
1564 12:55:55.215894 PCI: 00:1e.3 subsystem <- 8086/a0ab
1565 12:55:55.219302 PCI: 00:1e.3 cmd <- 02
1566 12:55:55.222342 PCI: 00:1f.0 subsystem <- 8086/a087
1567 12:55:55.226026 PCI: 00:1f.0 cmd <- 407
1568 12:55:55.228898 PCI: 00:1f.3 subsystem <- 8086/a0c8
1569 12:55:55.232600 PCI: 00:1f.3 cmd <- 02
1570 12:55:55.235953 PCI: 00:1f.5 subsystem <- 8086/a0a4
1571 12:55:55.239203 PCI: 00:1f.5 cmd <- 406
1572 12:55:55.242298 PCI: 01:00.0 cmd <- 02
1573 12:55:55.247012 done.
1574 12:55:55.250423 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1575 12:55:55.253946 Initializing devices...
1576 12:55:55.257093 Root Device init
1577 12:55:55.260466 Chrome EC: Set SMI mask to 0x0000000000000000
1578 12:55:55.266859 Chrome EC: clear events_b mask to 0x0000000000000000
1579 12:55:55.273715 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1580 12:55:55.280146 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1581 12:55:55.286840 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1582 12:55:55.290057 Chrome EC: Set WAKE mask to 0x0000000000000000
1583 12:55:55.297420 fw_config match found: DB_USB=USB3_ACTIVE
1584 12:55:55.301272 Configure Right Type-C port orientation for retimer
1585 12:55:55.304247 Root Device init finished in 45 msecs
1586 12:55:55.308198 PCI: 00:00.0 init
1587 12:55:55.311707 CPU TDP = 9 Watts
1588 12:55:55.311931 CPU PL1 = 9 Watts
1589 12:55:55.315014 CPU PL2 = 40 Watts
1590 12:55:55.318087 CPU PL4 = 83 Watts
1591 12:55:55.320887 PCI: 00:00.0 init finished in 8 msecs
1592 12:55:55.324178 PCI: 00:02.0 init
1593 12:55:55.324339 GMA: Found VBT in CBFS
1594 12:55:55.327908 GMA: Found valid VBT in CBFS
1595 12:55:55.334226 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1596 12:55:55.340750 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1597 12:55:55.344372 PCI: 00:02.0 init finished in 18 msecs
1598 12:55:55.347691 PCI: 00:05.0 init
1599 12:55:55.350678 PCI: 00:05.0 init finished in 0 msecs
1600 12:55:55.354186 PCI: 00:08.0 init
1601 12:55:55.357733 PCI: 00:08.0 init finished in 0 msecs
1602 12:55:55.360826 PCI: 00:14.0 init
1603 12:55:55.364140 PCI: 00:14.0 init finished in 0 msecs
1604 12:55:55.367568 PCI: 00:14.2 init
1605 12:55:55.370660 PCI: 00:14.2 init finished in 0 msecs
1606 12:55:55.373781 PCI: 00:15.0 init
1607 12:55:55.377641 I2C bus 0 version 0x3230302a
1608 12:55:55.380652 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1609 12:55:55.383870 PCI: 00:15.0 init finished in 6 msecs
1610 12:55:55.387235 PCI: 00:15.1 init
1611 12:55:55.387594 I2C bus 1 version 0x3230302a
1612 12:55:55.393808 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1613 12:55:55.397056 PCI: 00:15.1 init finished in 6 msecs
1614 12:55:55.397438 PCI: 00:15.2 init
1615 12:55:55.400449 I2C bus 2 version 0x3230302a
1616 12:55:55.403482 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1617 12:55:55.409993 PCI: 00:15.2 init finished in 6 msecs
1618 12:55:55.410420 PCI: 00:15.3 init
1619 12:55:55.413639 I2C bus 3 version 0x3230302a
1620 12:55:55.416620 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1621 12:55:55.420393 PCI: 00:15.3 init finished in 6 msecs
1622 12:55:55.423372 PCI: 00:16.0 init
1623 12:55:55.426916 PCI: 00:16.0 init finished in 0 msecs
1624 12:55:55.429835 PCI: 00:19.1 init
1625 12:55:55.433171 I2C bus 5 version 0x3230302a
1626 12:55:55.437435 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1627 12:55:55.439890 PCI: 00:19.1 init finished in 6 msecs
1628 12:55:55.443133 PCI: 00:1d.0 init
1629 12:55:55.446489 Initializing PCH PCIe bridge.
1630 12:55:55.449876 PCI: 00:1d.0 init finished in 3 msecs
1631 12:55:55.452934 PCI: 00:1f.0 init
1632 12:55:55.456376 IOAPIC: Initializing IOAPIC at 0xfec00000
1633 12:55:55.459689 IOAPIC: Bootstrap Processor Local APIC = 0x00
1634 12:55:55.463006 IOAPIC: ID = 0x02
1635 12:55:55.466003 IOAPIC: Dumping registers
1636 12:55:55.469277 reg 0x0000: 0x02000000
1637 12:55:55.469672 reg 0x0001: 0x00770020
1638 12:55:55.472875 reg 0x0002: 0x00000000
1639 12:55:55.476033 PCI: 00:1f.0 init finished in 21 msecs
1640 12:55:55.479290 PCI: 00:1f.2 init
1641 12:55:55.482775 Disabling ACPI via APMC.
1642 12:55:55.486026 APMC done.
1643 12:55:55.489244 PCI: 00:1f.2 init finished in 5 msecs
1644 12:55:55.500103 PCI: 01:00.0 init
1645 12:55:55.503372 PCI: 01:00.0 init finished in 0 msecs
1646 12:55:55.506457 PNP: 0c09.0 init
1647 12:55:55.510064 Google Chrome EC uptime: 8.232 seconds
1648 12:55:55.516701 Google Chrome AP resets since EC boot: 1
1649 12:55:55.519944 Google Chrome most recent AP reset causes:
1650 12:55:55.523007 0.451: 32775 shutdown: entering G3
1651 12:55:55.529874 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1652 12:55:55.533220 PNP: 0c09.0 init finished in 22 msecs
1653 12:55:55.538963 Devices initialized
1654 12:55:55.542549 Show all devs... After init.
1655 12:55:55.545521 Root Device: enabled 1
1656 12:55:55.545656 DOMAIN: 0000: enabled 1
1657 12:55:55.549140 CPU_CLUSTER: 0: enabled 1
1658 12:55:55.552094 PCI: 00:00.0: enabled 1
1659 12:55:55.555284 PCI: 00:02.0: enabled 1
1660 12:55:55.555470 PCI: 00:04.0: enabled 1
1661 12:55:55.558890 PCI: 00:05.0: enabled 1
1662 12:55:55.561773 PCI: 00:06.0: enabled 0
1663 12:55:55.565135 PCI: 00:07.0: enabled 0
1664 12:55:55.565402 PCI: 00:07.1: enabled 0
1665 12:55:55.568427 PCI: 00:07.2: enabled 0
1666 12:55:55.572122 PCI: 00:07.3: enabled 0
1667 12:55:55.575738 PCI: 00:08.0: enabled 1
1668 12:55:55.576156 PCI: 00:09.0: enabled 0
1669 12:55:55.578985 PCI: 00:0a.0: enabled 0
1670 12:55:55.582150 PCI: 00:0d.0: enabled 1
1671 12:55:55.585411 PCI: 00:0d.1: enabled 0
1672 12:55:55.585896 PCI: 00:0d.2: enabled 0
1673 12:55:55.588437 PCI: 00:0d.3: enabled 0
1674 12:55:55.592164 PCI: 00:0e.0: enabled 0
1675 12:55:55.595217 PCI: 00:10.2: enabled 1
1676 12:55:55.595671 PCI: 00:10.6: enabled 0
1677 12:55:55.598609 PCI: 00:10.7: enabled 0
1678 12:55:55.601923 PCI: 00:12.0: enabled 0
1679 12:55:55.602340 PCI: 00:12.6: enabled 0
1680 12:55:55.605159 PCI: 00:13.0: enabled 0
1681 12:55:55.608836 PCI: 00:14.0: enabled 1
1682 12:55:55.611861 PCI: 00:14.1: enabled 0
1683 12:55:55.612277 PCI: 00:14.2: enabled 1
1684 12:55:55.615357 PCI: 00:14.3: enabled 1
1685 12:55:55.618414 PCI: 00:15.0: enabled 1
1686 12:55:55.621475 PCI: 00:15.1: enabled 1
1687 12:55:55.621898 PCI: 00:15.2: enabled 1
1688 12:55:55.624736 PCI: 00:15.3: enabled 1
1689 12:55:55.628280 PCI: 00:16.0: enabled 1
1690 12:55:55.631503 PCI: 00:16.1: enabled 0
1691 12:55:55.631919 PCI: 00:16.2: enabled 0
1692 12:55:55.634610 PCI: 00:16.3: enabled 0
1693 12:55:55.637900 PCI: 00:16.4: enabled 0
1694 12:55:55.641458 PCI: 00:16.5: enabled 0
1695 12:55:55.641876 PCI: 00:17.0: enabled 0
1696 12:55:55.644688 PCI: 00:19.0: enabled 0
1697 12:55:55.648340 PCI: 00:19.1: enabled 1
1698 12:55:55.651702 PCI: 00:19.2: enabled 0
1699 12:55:55.652123 PCI: 00:1c.0: enabled 1
1700 12:55:55.654861 PCI: 00:1c.1: enabled 0
1701 12:55:55.658022 PCI: 00:1c.2: enabled 0
1702 12:55:55.661562 PCI: 00:1c.3: enabled 0
1703 12:55:55.662003 PCI: 00:1c.4: enabled 0
1704 12:55:55.664513 PCI: 00:1c.5: enabled 0
1705 12:55:55.668192 PCI: 00:1c.6: enabled 1
1706 12:55:55.668715 PCI: 00:1c.7: enabled 0
1707 12:55:55.671396 PCI: 00:1d.0: enabled 1
1708 12:55:55.674310 PCI: 00:1d.1: enabled 0
1709 12:55:55.677737 PCI: 00:1d.2: enabled 1
1710 12:55:55.678150 PCI: 00:1d.3: enabled 0
1711 12:55:55.680979 PCI: 00:1e.0: enabled 1
1712 12:55:55.684466 PCI: 00:1e.1: enabled 0
1713 12:55:55.687656 PCI: 00:1e.2: enabled 1
1714 12:55:55.688165 PCI: 00:1e.3: enabled 1
1715 12:55:55.691050 PCI: 00:1f.0: enabled 1
1716 12:55:55.694379 PCI: 00:1f.1: enabled 0
1717 12:55:55.698073 PCI: 00:1f.2: enabled 1
1718 12:55:55.698575 PCI: 00:1f.3: enabled 1
1719 12:55:55.701541 PCI: 00:1f.4: enabled 0
1720 12:55:55.704560 PCI: 00:1f.5: enabled 1
1721 12:55:55.707847 PCI: 00:1f.6: enabled 0
1722 12:55:55.708368 PCI: 00:1f.7: enabled 0
1723 12:55:55.711318 APIC: 00: enabled 1
1724 12:55:55.714451 GENERIC: 0.0: enabled 1
1725 12:55:55.714867 GENERIC: 0.0: enabled 1
1726 12:55:55.717696 GENERIC: 1.0: enabled 1
1727 12:55:55.721030 GENERIC: 0.0: enabled 1
1728 12:55:55.724670 GENERIC: 1.0: enabled 1
1729 12:55:55.725161 USB0 port 0: enabled 1
1730 12:55:55.727731 GENERIC: 0.0: enabled 1
1731 12:55:55.731057 USB0 port 0: enabled 1
1732 12:55:55.731633 GENERIC: 0.0: enabled 1
1733 12:55:55.734092 I2C: 00:1a: enabled 1
1734 12:55:55.737318 I2C: 00:31: enabled 1
1735 12:55:55.737730 I2C: 00:32: enabled 1
1736 12:55:55.740723 I2C: 00:10: enabled 1
1737 12:55:55.744253 I2C: 00:15: enabled 1
1738 12:55:55.747365 GENERIC: 0.0: enabled 0
1739 12:55:55.747822 GENERIC: 1.0: enabled 0
1740 12:55:55.750816 GENERIC: 0.0: enabled 1
1741 12:55:55.754483 SPI: 00: enabled 1
1742 12:55:55.754908 SPI: 00: enabled 1
1743 12:55:55.757645 PNP: 0c09.0: enabled 1
1744 12:55:55.760673 GENERIC: 0.0: enabled 1
1745 12:55:55.761098 USB3 port 0: enabled 1
1746 12:55:55.764021 USB3 port 1: enabled 1
1747 12:55:55.767326 USB3 port 2: enabled 0
1748 12:55:55.767794 USB3 port 3: enabled 0
1749 12:55:55.770589 USB2 port 0: enabled 0
1750 12:55:55.774372 USB2 port 1: enabled 1
1751 12:55:55.777065 USB2 port 2: enabled 1
1752 12:55:55.777488 USB2 port 3: enabled 0
1753 12:55:55.780549 USB2 port 4: enabled 1
1754 12:55:55.784285 USB2 port 5: enabled 0
1755 12:55:55.784735 USB2 port 6: enabled 0
1756 12:55:55.787542 USB2 port 7: enabled 0
1757 12:55:55.790616 USB2 port 8: enabled 0
1758 12:55:55.793853 USB2 port 9: enabled 0
1759 12:55:55.794383 USB3 port 0: enabled 0
1760 12:55:55.797431 USB3 port 1: enabled 1
1761 12:55:55.800613 USB3 port 2: enabled 0
1762 12:55:55.801052 USB3 port 3: enabled 0
1763 12:55:55.803980 GENERIC: 0.0: enabled 1
1764 12:55:55.807180 GENERIC: 1.0: enabled 1
1765 12:55:55.807657 APIC: 01: enabled 1
1766 12:55:55.810216 APIC: 03: enabled 1
1767 12:55:55.813750 APIC: 07: enabled 1
1768 12:55:55.814174 APIC: 05: enabled 1
1769 12:55:55.817178 APIC: 04: enabled 1
1770 12:55:55.820652 APIC: 02: enabled 1
1771 12:55:55.821207 APIC: 06: enabled 1
1772 12:55:55.823801 PCI: 01:00.0: enabled 1
1773 12:55:55.830256 BS: BS_DEV_INIT run times (exec / console): 31 / 540 ms
1774 12:55:55.833434 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1775 12:55:55.837289 ELOG: NV offset 0xf30000 size 0x1000
1776 12:55:55.844365 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1777 12:55:55.851094 ELOG: Event(17) added with size 13 at 2023-04-26 12:55:53 UTC
1778 12:55:55.857417 ELOG: Event(92) added with size 9 at 2023-04-26 12:55:53 UTC
1779 12:55:55.863978 ELOG: Event(93) added with size 9 at 2023-04-26 12:55:53 UTC
1780 12:55:55.871125 ELOG: Event(9E) added with size 10 at 2023-04-26 12:55:53 UTC
1781 12:55:55.877143 ELOG: Event(9F) added with size 14 at 2023-04-26 12:55:53 UTC
1782 12:55:55.883837 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1783 12:55:55.890445 ELOG: Event(A1) added with size 10 at 2023-04-26 12:55:53 UTC
1784 12:55:55.897040 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1785 12:55:55.903288 ELOG: Event(A0) added with size 9 at 2023-04-26 12:55:53 UTC
1786 12:55:55.906568 elog_add_boot_reason: Logged dev mode boot
1787 12:55:55.913934 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1788 12:55:55.917273 Finalize devices...
1789 12:55:55.917849 Devices finalized
1790 12:55:55.923943 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1791 12:55:55.926371 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1792 12:55:55.933376 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1793 12:55:55.936642 ME: HFSTS1 : 0x80030055
1794 12:55:55.943452 ME: HFSTS2 : 0x30280116
1795 12:55:55.946657 ME: HFSTS3 : 0x00000050
1796 12:55:55.949796 ME: HFSTS4 : 0x00004000
1797 12:55:55.956663 ME: HFSTS5 : 0x00000000
1798 12:55:55.959601 ME: HFSTS6 : 0x40400006
1799 12:55:55.963029 ME: Manufacturing Mode : YES
1800 12:55:55.966383 ME: SPI Protection Mode Enabled : NO
1801 12:55:55.972977 ME: FW Partition Table : OK
1802 12:55:55.976909 ME: Bringup Loader Failure : NO
1803 12:55:55.979702 ME: Firmware Init Complete : NO
1804 12:55:55.982942 ME: Boot Options Present : NO
1805 12:55:55.986119 ME: Update In Progress : NO
1806 12:55:55.989468 ME: D0i3 Support : YES
1807 12:55:55.992922 ME: Low Power State Enabled : NO
1808 12:55:55.996182 ME: CPU Replaced : YES
1809 12:55:56.003096 ME: CPU Replacement Valid : YES
1810 12:55:56.006128 ME: Current Working State : 5
1811 12:55:56.009355 ME: Current Operation State : 1
1812 12:55:56.012851 ME: Current Operation Mode : 3
1813 12:55:56.016313 ME: Error Code : 0
1814 12:55:56.019559 ME: Enhanced Debug Mode : NO
1815 12:55:56.022535 ME: CPU Debug Disabled : YES
1816 12:55:56.025798 ME: TXT Support : NO
1817 12:55:56.032574 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1818 12:55:56.042828 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1819 12:55:56.046109 CBFS: 'fallback/slic' not found.
1820 12:55:56.049044 ACPI: Writing ACPI tables at 76b01000.
1821 12:55:56.049649 ACPI: * FACS
1822 12:55:56.052161 ACPI: * DSDT
1823 12:55:56.055397 Ramoops buffer: 0x100000@0x76a00000.
1824 12:55:56.059515 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1825 12:55:56.065317 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1826 12:55:56.069043 Google Chrome EC: version:
1827 12:55:56.072170 ro: voema_v2.0.10114-a447f03e46
1828 12:55:56.075508 rw: voema_v2.0.10114-a447f03e46
1829 12:55:56.078857 running image: 2
1830 12:55:56.085613 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1831 12:55:56.088422 ACPI: * FADT
1832 12:55:56.088857 SCI is IRQ9
1833 12:55:56.091902 ACPI: added table 1/32, length now 40
1834 12:55:56.095612 ACPI: * SSDT
1835 12:55:56.098877 Found 1 CPU(s) with 8 core(s) each.
1836 12:55:56.102130 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1837 12:55:56.108446 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1838 12:55:56.111731 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1839 12:55:56.115006 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1840 12:55:56.121639 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1841 12:55:56.128270 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1842 12:55:56.132122 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1843 12:55:56.138131 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1844 12:55:56.145091 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1845 12:55:56.148203 \_SB.PCI0.RP09: Added StorageD3Enable property
1846 12:55:56.151874 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1847 12:55:56.158119 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1848 12:55:56.165143 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1849 12:55:56.168354 PS2K: Passing 80 keymaps to kernel
1850 12:55:56.174318 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1851 12:55:56.181315 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1852 12:55:56.188018 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1853 12:55:56.194721 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1854 12:55:56.201317 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1855 12:55:56.208180 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1856 12:55:56.214360 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1857 12:55:56.221026 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1858 12:55:56.224001 ACPI: added table 2/32, length now 44
1859 12:55:56.227280 ACPI: * MCFG
1860 12:55:56.230973 ACPI: added table 3/32, length now 48
1861 12:55:56.231329 ACPI: * TPM2
1862 12:55:56.233820 TPM2 log created at 0x769f0000
1863 12:55:56.237775 ACPI: added table 4/32, length now 52
1864 12:55:56.240319 ACPI: * MADT
1865 12:55:56.240639 SCI is IRQ9
1866 12:55:56.243378 ACPI: added table 5/32, length now 56
1867 12:55:56.246941 current = 76b09850
1868 12:55:56.247377 ACPI: * DMAR
1869 12:55:56.253745 ACPI: added table 6/32, length now 60
1870 12:55:56.256923 ACPI: added table 7/32, length now 64
1871 12:55:56.257311 ACPI: * HPET
1872 12:55:56.260582 ACPI: added table 8/32, length now 68
1873 12:55:56.263688 ACPI: done.
1874 12:55:56.267045 ACPI tables: 35216 bytes.
1875 12:55:56.267454 smbios_write_tables: 769ef000
1876 12:55:56.270078 EC returned error result code 3
1877 12:55:56.276728 Couldn't obtain OEM name from CBI
1878 12:55:56.279842 Create SMBIOS type 16
1879 12:55:56.279947 Create SMBIOS type 17
1880 12:55:56.283245 GENERIC: 0.0 (WIFI Device)
1881 12:55:56.286786 SMBIOS tables: 1734 bytes.
1882 12:55:56.290147 Writing table forward entry at 0x00000500
1883 12:55:56.297149 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1884 12:55:56.300060 Writing coreboot table at 0x76b25000
1885 12:55:56.306413 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1886 12:55:56.313321 1. 0000000000001000-000000000009ffff: RAM
1887 12:55:56.316495 2. 00000000000a0000-00000000000fffff: RESERVED
1888 12:55:56.319540 3. 0000000000100000-00000000769eefff: RAM
1889 12:55:56.326293 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1890 12:55:56.333017 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1891 12:55:56.336006 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1892 12:55:56.342940 7. 0000000077000000-000000007fbfffff: RESERVED
1893 12:55:56.346151 8. 00000000c0000000-00000000cfffffff: RESERVED
1894 12:55:56.352950 9. 00000000f8000000-00000000f9ffffff: RESERVED
1895 12:55:56.356211 10. 00000000fb000000-00000000fb000fff: RESERVED
1896 12:55:56.362389 11. 00000000fe000000-00000000fe00ffff: RESERVED
1897 12:55:56.366055 12. 00000000fed80000-00000000fed87fff: RESERVED
1898 12:55:56.369108 13. 00000000fed90000-00000000fed92fff: RESERVED
1899 12:55:56.375897 14. 00000000feda0000-00000000feda1fff: RESERVED
1900 12:55:56.379073 15. 00000000fedc0000-00000000feddffff: RESERVED
1901 12:55:56.386221 16. 0000000100000000-00000004803fffff: RAM
1902 12:55:56.389230 Passing 4 GPIOs to payload:
1903 12:55:56.392338 NAME | PORT | POLARITY | VALUE
1904 12:55:56.399041 lid | undefined | high | high
1905 12:55:56.402563 power | undefined | high | low
1906 12:55:56.408746 oprom | undefined | high | low
1907 12:55:56.415563 EC in RW | 0x000000e5 | high | high
1908 12:55:56.418613 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e94e
1909 12:55:56.422143 coreboot table: 1576 bytes.
1910 12:55:56.425099 IMD ROOT 0. 0x76fff000 0x00001000
1911 12:55:56.431762 IMD SMALL 1. 0x76ffe000 0x00001000
1912 12:55:56.435449 FSP MEMORY 2. 0x76c4e000 0x003b0000
1913 12:55:56.438545 VPD 3. 0x76c4d000 0x00000367
1914 12:55:56.441761 RO MCACHE 4. 0x76c4c000 0x00000fdc
1915 12:55:56.445130 CONSOLE 5. 0x76c2c000 0x00020000
1916 12:55:56.448578 FMAP 6. 0x76c2b000 0x00000578
1917 12:55:56.452101 TIME STAMP 7. 0x76c2a000 0x00000910
1918 12:55:56.455408 VBOOT WORK 8. 0x76c16000 0x00014000
1919 12:55:56.461489 ROMSTG STCK 9. 0x76c15000 0x00001000
1920 12:55:56.464811 AFTER CAR 10. 0x76c0a000 0x0000b000
1921 12:55:56.467876 RAMSTAGE 11. 0x76b97000 0x00073000
1922 12:55:56.471177 REFCODE 12. 0x76b42000 0x00055000
1923 12:55:56.474418 SMM BACKUP 13. 0x76b32000 0x00010000
1924 12:55:56.477703 4f444749 14. 0x76b30000 0x00002000
1925 12:55:56.481538 EXT VBT15. 0x76b2d000 0x0000219f
1926 12:55:56.484595 COREBOOT 16. 0x76b25000 0x00008000
1927 12:55:56.490901 ACPI 17. 0x76b01000 0x00024000
1928 12:55:56.494180 ACPI GNVS 18. 0x76b00000 0x00001000
1929 12:55:56.497741 RAMOOPS 19. 0x76a00000 0x00100000
1930 12:55:56.500971 TPM2 TCGLOG20. 0x769f0000 0x00010000
1931 12:55:56.504048 SMBIOS 21. 0x769ef000 0x00000800
1932 12:55:56.507798 IMD small region:
1933 12:55:56.510669 IMD ROOT 0. 0x76ffec00 0x00000400
1934 12:55:56.514071 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1935 12:55:56.517527 POWER STATE 2. 0x76ffeb80 0x00000044
1936 12:55:56.520974 ROMSTAGE 3. 0x76ffeb60 0x00000004
1937 12:55:56.527299 MEM INFO 4. 0x76ffe980 0x000001e0
1938 12:55:56.530830 BS: BS_WRITE_TABLES run times (exec / console): 9 / 484 ms
1939 12:55:56.534092 MTRR: Physical address space:
1940 12:55:56.540874 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1941 12:55:56.547832 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1942 12:55:56.554066 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1943 12:55:56.561003 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1944 12:55:56.567295 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1945 12:55:56.574119 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1946 12:55:56.580499 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1947 12:55:56.583704 MTRR: Fixed MSR 0x250 0x0606060606060606
1948 12:55:56.587492 MTRR: Fixed MSR 0x258 0x0606060606060606
1949 12:55:56.590773 MTRR: Fixed MSR 0x259 0x0000000000000000
1950 12:55:56.593887 MTRR: Fixed MSR 0x268 0x0606060606060606
1951 12:55:56.600350 MTRR: Fixed MSR 0x269 0x0606060606060606
1952 12:55:56.603717 MTRR: Fixed MSR 0x26a 0x0606060606060606
1953 12:55:56.607522 MTRR: Fixed MSR 0x26b 0x0606060606060606
1954 12:55:56.610856 MTRR: Fixed MSR 0x26c 0x0606060606060606
1955 12:55:56.617081 MTRR: Fixed MSR 0x26d 0x0606060606060606
1956 12:55:56.620470 MTRR: Fixed MSR 0x26e 0x0606060606060606
1957 12:55:56.623336 MTRR: Fixed MSR 0x26f 0x0606060606060606
1958 12:55:56.627844 call enable_fixed_mtrr()
1959 12:55:56.631191 CPU physical address size: 39 bits
1960 12:55:56.637739 MTRR: default type WB/UC MTRR counts: 6/7.
1961 12:55:56.641191 MTRR: WB selected as default type.
1962 12:55:56.647771 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1963 12:55:56.651105 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1964 12:55:56.658156 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1965 12:55:56.664285 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1966 12:55:56.671114 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1967 12:55:56.677884 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1968 12:55:56.681450
1969 12:55:56.682026 MTRR check
1970 12:55:56.684710 Fixed MTRRs : Enabled
1971 12:55:56.685125 Variable MTRRs: Enabled
1972 12:55:56.685451
1973 12:55:56.691205 MTRR: Fixed MSR 0x250 0x0606060606060606
1974 12:55:56.694448 MTRR: Fixed MSR 0x258 0x0606060606060606
1975 12:55:56.697861 MTRR: Fixed MSR 0x259 0x0000000000000000
1976 12:55:56.700914 MTRR: Fixed MSR 0x268 0x0606060606060606
1977 12:55:56.707793 MTRR: Fixed MSR 0x269 0x0606060606060606
1978 12:55:56.711037 MTRR: Fixed MSR 0x26a 0x0606060606060606
1979 12:55:56.714257 MTRR: Fixed MSR 0x26b 0x0606060606060606
1980 12:55:56.717515 MTRR: Fixed MSR 0x26c 0x0606060606060606
1981 12:55:56.724425 MTRR: Fixed MSR 0x26d 0x0606060606060606
1982 12:55:56.727501 MTRR: Fixed MSR 0x26e 0x0606060606060606
1983 12:55:56.731123 MTRR: Fixed MSR 0x26f 0x0606060606060606
1984 12:55:56.738020 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
1985 12:55:56.741596 call enable_fixed_mtrr()
1986 12:55:56.745367 Checking cr50 for pending updates
1987 12:55:56.748172 CPU physical address size: 39 bits
1988 12:55:56.751909 MTRR: Fixed MSR 0x250 0x0606060606060606
1989 12:55:56.755110 MTRR: Fixed MSR 0x250 0x0606060606060606
1990 12:55:56.762120 MTRR: Fixed MSR 0x258 0x0606060606060606
1991 12:55:56.765680 MTRR: Fixed MSR 0x259 0x0000000000000000
1992 12:55:56.768864 MTRR: Fixed MSR 0x268 0x0606060606060606
1993 12:55:56.771729 MTRR: Fixed MSR 0x269 0x0606060606060606
1994 12:55:56.775559 MTRR: Fixed MSR 0x26a 0x0606060606060606
1995 12:55:56.781931 MTRR: Fixed MSR 0x26b 0x0606060606060606
1996 12:55:56.785442 MTRR: Fixed MSR 0x26c 0x0606060606060606
1997 12:55:56.788430 MTRR: Fixed MSR 0x26d 0x0606060606060606
1998 12:55:56.792246 MTRR: Fixed MSR 0x26e 0x0606060606060606
1999 12:55:56.798544 MTRR: Fixed MSR 0x26f 0x0606060606060606
2000 12:55:56.801590 MTRR: Fixed MSR 0x258 0x0606060606060606
2001 12:55:56.808340 MTRR: Fixed MSR 0x259 0x0000000000000000
2002 12:55:56.811703 MTRR: Fixed MSR 0x268 0x0606060606060606
2003 12:55:56.814881 MTRR: Fixed MSR 0x269 0x0606060606060606
2004 12:55:56.818333 MTRR: Fixed MSR 0x26a 0x0606060606060606
2005 12:55:56.825167 MTRR: Fixed MSR 0x26b 0x0606060606060606
2006 12:55:56.828572 MTRR: Fixed MSR 0x26c 0x0606060606060606
2007 12:55:56.831736 MTRR: Fixed MSR 0x26d 0x0606060606060606
2008 12:55:56.834785 MTRR: Fixed MSR 0x26e 0x0606060606060606
2009 12:55:56.841356 MTRR: Fixed MSR 0x26f 0x0606060606060606
2010 12:55:56.845095 call enable_fixed_mtrr()
2011 12:55:56.848939 call enable_fixed_mtrr()
2012 12:55:56.849477 Reading cr50 TPM mode
2013 12:55:56.852005 MTRR: Fixed MSR 0x250 0x0606060606060606
2014 12:55:56.858811 MTRR: Fixed MSR 0x250 0x0606060606060606
2015 12:55:56.862176 MTRR: Fixed MSR 0x258 0x0606060606060606
2016 12:55:56.865339 MTRR: Fixed MSR 0x259 0x0000000000000000
2017 12:55:56.868511 MTRR: Fixed MSR 0x268 0x0606060606060606
2018 12:55:56.875243 MTRR: Fixed MSR 0x269 0x0606060606060606
2019 12:55:56.878906 MTRR: Fixed MSR 0x26a 0x0606060606060606
2020 12:55:56.881844 MTRR: Fixed MSR 0x26b 0x0606060606060606
2021 12:55:56.885121 MTRR: Fixed MSR 0x26c 0x0606060606060606
2022 12:55:56.889053 MTRR: Fixed MSR 0x26d 0x0606060606060606
2023 12:55:56.895426 MTRR: Fixed MSR 0x26e 0x0606060606060606
2024 12:55:56.898303 MTRR: Fixed MSR 0x26f 0x0606060606060606
2025 12:55:56.905126 MTRR: Fixed MSR 0x258 0x0606060606060606
2026 12:55:56.908409 MTRR: Fixed MSR 0x259 0x0000000000000000
2027 12:55:56.911785 MTRR: Fixed MSR 0x268 0x0606060606060606
2028 12:55:56.915284 MTRR: Fixed MSR 0x269 0x0606060606060606
2029 12:55:56.922087 MTRR: Fixed MSR 0x26a 0x0606060606060606
2030 12:55:56.925268 MTRR: Fixed MSR 0x26b 0x0606060606060606
2031 12:55:56.928547 MTRR: Fixed MSR 0x26c 0x0606060606060606
2032 12:55:56.931792 MTRR: Fixed MSR 0x26d 0x0606060606060606
2033 12:55:56.938549 MTRR: Fixed MSR 0x26e 0x0606060606060606
2034 12:55:56.941620 MTRR: Fixed MSR 0x26f 0x0606060606060606
2035 12:55:56.944944 call enable_fixed_mtrr()
2036 12:55:56.948286 call enable_fixed_mtrr()
2037 12:55:56.951388 CPU physical address size: 39 bits
2038 12:55:56.954996 CPU physical address size: 39 bits
2039 12:55:56.961554 MTRR: Fixed MSR 0x250 0x0606060606060606
2040 12:55:56.964640 MTRR: Fixed MSR 0x250 0x0606060606060606
2041 12:55:56.967733 MTRR: Fixed MSR 0x258 0x0606060606060606
2042 12:55:56.971224 MTRR: Fixed MSR 0x259 0x0000000000000000
2043 12:55:56.977926 MTRR: Fixed MSR 0x268 0x0606060606060606
2044 12:55:56.981420 MTRR: Fixed MSR 0x269 0x0606060606060606
2045 12:55:56.984362 MTRR: Fixed MSR 0x26a 0x0606060606060606
2046 12:55:56.988117 MTRR: Fixed MSR 0x26b 0x0606060606060606
2047 12:55:56.994474 MTRR: Fixed MSR 0x26c 0x0606060606060606
2048 12:55:56.997946 MTRR: Fixed MSR 0x26d 0x0606060606060606
2049 12:55:57.000947 MTRR: Fixed MSR 0x26e 0x0606060606060606
2050 12:55:57.004324 MTRR: Fixed MSR 0x26f 0x0606060606060606
2051 12:55:57.012562 MTRR: Fixed MSR 0x258 0x0606060606060606
2052 12:55:57.013051 call enable_fixed_mtrr()
2053 12:55:57.019484 MTRR: Fixed MSR 0x259 0x0000000000000000
2054 12:55:57.022587 MTRR: Fixed MSR 0x268 0x0606060606060606
2055 12:55:57.025759 MTRR: Fixed MSR 0x269 0x0606060606060606
2056 12:55:57.029248 MTRR: Fixed MSR 0x26a 0x0606060606060606
2057 12:55:57.035440 MTRR: Fixed MSR 0x26b 0x0606060606060606
2058 12:55:57.039879 MTRR: Fixed MSR 0x26c 0x0606060606060606
2059 12:55:57.042619 MTRR: Fixed MSR 0x26d 0x0606060606060606
2060 12:55:57.046015 MTRR: Fixed MSR 0x26e 0x0606060606060606
2061 12:55:57.052502 MTRR: Fixed MSR 0x26f 0x0606060606060606
2062 12:55:57.055887 CPU physical address size: 39 bits
2063 12:55:57.059991 call enable_fixed_mtrr()
2064 12:55:57.062610 CPU physical address size: 39 bits
2065 12:55:57.067550 CPU physical address size: 39 bits
2066 12:55:57.073902 BS: BS_PAYLOAD_LOAD entry times (exec / console): 109 / 6 ms
2067 12:55:57.077251 CPU physical address size: 39 bits
2068 12:55:57.087189 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2069 12:55:57.090745 Checking segment from ROM address 0xffc02b38
2070 12:55:57.093715 Checking segment from ROM address 0xffc02b54
2071 12:55:57.100664 Loading segment from ROM address 0xffc02b38
2072 12:55:57.101224 code (compression=0)
2073 12:55:57.110442 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2074 12:55:57.120158 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2075 12:55:57.120749 it's not compressed!
2076 12:55:57.259661 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2077 12:55:57.266117 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2078 12:55:57.273274 Loading segment from ROM address 0xffc02b54
2079 12:55:57.276324 Entry Point 0x30000000
2080 12:55:57.276419 Loaded segments
2081 12:55:57.282916 BS: BS_PAYLOAD_LOAD run times (exec / console): 139 / 63 ms
2082 12:55:57.327971 Finalizing chipset.
2083 12:55:57.331498 Finalizing SMM.
2084 12:55:57.331605 APMC done.
2085 12:55:57.337562 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2086 12:55:57.341653 mp_park_aps done after 0 msecs.
2087 12:55:57.344948 Jumping to boot code at 0x30000000(0x76b25000)
2088 12:55:57.354570 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2089 12:55:57.354656
2090 12:55:57.357574
2091 12:55:57.357652
2092 12:55:57.358004 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2093 12:55:57.358105 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2094 12:55:57.358198 Setting prompt string to ['volteer:']
2095 12:55:57.358280 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2096 12:55:57.360701 Starting depthcharge on Voema...
2097 12:55:57.360784
2098 12:55:57.367444 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2099 12:55:57.367526
2100 12:55:57.374273 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2101 12:55:57.374391
2102 12:55:57.380987 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2103 12:55:57.381066
2104 12:55:57.383979 Failed to find eMMC card reader
2105 12:55:57.384076
2106 12:55:57.387322 Wipe memory regions:
2107 12:55:57.387405
2108 12:55:57.390443 [0x00000000001000, 0x000000000a0000)
2109 12:55:57.390515
2110 12:55:57.394252 [0x00000000100000, 0x00000030000000)
2111 12:55:57.428602
2112 12:55:57.431829 [0x00000032662db0, 0x000000769ef000)
2113 12:55:57.479195
2114 12:55:57.482677 [0x00000100000000, 0x00000480400000)
2115 12:55:58.091866
2116 12:55:58.095219 ec_init: CrosEC protocol v3 supported (256, 256)
2117 12:55:58.527147
2118 12:55:58.527673 R8152: Initializing
2119 12:55:58.528015
2120 12:55:58.530757 Version 6 (ocp_data = 5c30)
2121 12:55:58.531178
2122 12:55:58.533958 R8152: Done initializing
2123 12:55:58.534378
2124 12:55:58.537181 Adding net device
2125 12:55:58.839732
2126 12:55:58.842764 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2127 12:55:58.843195
2128 12:55:58.843597
2129 12:55:58.843920
2130 12:55:58.846494 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2132 12:55:58.947811 volteer: tftpboot 192.168.201.1 10130720/tftp-deploy-_q0fsbag/kernel/bzImage 10130720/tftp-deploy-_q0fsbag/kernel/cmdline 10130720/tftp-deploy-_q0fsbag/ramdisk/ramdisk.cpio.gz
2133 12:55:58.948637 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2134 12:55:58.949276 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2135 12:55:58.953118 tftpboot 192.168.201.1 10130720/tftp-deploy-_q0fsbag/kernel/bzIploy-_q0fsbag/kernel/cmdline 10130720/tftp-deploy-_q0fsbag/ramdisk/ramdisk.cpio.gz
2136 12:55:58.953557
2137 12:55:58.953889 Waiting for link
2138 12:55:59.158000
2139 12:55:59.158557 done.
2140 12:55:59.158988
2141 12:55:59.159531 MAC: 00:24:32:30:78:e4
2142 12:55:59.159971
2143 12:55:59.160875 Sending DHCP discover... done.
2144 12:55:59.161438
2145 12:55:59.163968 Waiting for reply... done.
2146 12:55:59.164491
2147 12:55:59.167153 Sending DHCP request... done.
2148 12:55:59.167676
2149 12:55:59.170715 Waiting for reply... done.
2150 12:55:59.171197
2151 12:55:59.174118 My ip is 192.168.201.13
2152 12:55:59.174582
2153 12:55:59.177202 The DHCP server ip is 192.168.201.1
2154 12:55:59.177913
2155 12:55:59.184215 TFTP server IP predefined by user: 192.168.201.1
2156 12:55:59.184686
2157 12:55:59.190295 Bootfile predefined by user: 10130720/tftp-deploy-_q0fsbag/kernel/bzImage
2158 12:55:59.190797
2159 12:55:59.193531 Sending tftp read request... done.
2160 12:55:59.193994
2161 12:55:59.201184 Waiting for the transfer...
2162 12:55:59.201836
2163 12:55:59.862705 00000000 ################################################################
2164 12:55:59.862958
2165 12:56:00.421954 00080000 ################################################################
2166 12:56:00.422102
2167 12:56:01.003600 00100000 ################################################################
2168 12:56:01.003763
2169 12:56:01.526587 00180000 ################################################################
2170 12:56:01.526738
2171 12:56:02.049929 00200000 ################################################################
2172 12:56:02.050079
2173 12:56:02.608331 00280000 ################################################################
2174 12:56:02.608479
2175 12:56:03.148057 00300000 ################################################################
2176 12:56:03.148194
2177 12:56:03.705436 00380000 ################################################################
2178 12:56:03.705574
2179 12:56:04.251880 00400000 ################################################################
2180 12:56:04.252046
2181 12:56:04.785796 00480000 ################################################################
2182 12:56:04.785930
2183 12:56:05.305240 00500000 ################################################################
2184 12:56:05.305436
2185 12:56:05.840360 00580000 ################################################################
2186 12:56:05.840517
2187 12:56:06.371494 00600000 ################################################################
2188 12:56:06.371628
2189 12:56:06.901824 00680000 ################################################################
2190 12:56:06.901955
2191 12:56:07.427592 00700000 ################################################################
2192 12:56:07.427740
2193 12:56:08.026117 00780000 ################################################################
2194 12:56:08.026262
2195 12:56:08.557391 00800000 ################################################################
2196 12:56:08.557587
2197 12:56:09.089954 00880000 ################################################################
2198 12:56:09.090098
2199 12:56:09.630128 00900000 ################################################################
2200 12:56:09.630274
2201 12:56:10.243980 00980000 ################################################################
2202 12:56:10.244134
2203 12:56:10.694847 00a00000 ############################################## done.
2204 12:56:10.695413
2205 12:56:10.697978 The bootfile was 10858496 bytes long.
2206 12:56:10.698610
2207 12:56:10.701336 Sending tftp read request... done.
2208 12:56:10.701759
2209 12:56:10.704309 Waiting for the transfer...
2210 12:56:10.704729
2211 12:56:11.290667 00000000 ################################################################
2212 12:56:11.290814
2213 12:56:11.815037 00080000 ################################################################
2214 12:56:11.815181
2215 12:56:12.326771 00100000 ################################################################
2216 12:56:12.326918
2217 12:56:12.884172 00180000 ################################################################
2218 12:56:12.884347
2219 12:56:13.414190 00200000 ################################################################
2220 12:56:13.414365
2221 12:56:13.926542 00280000 ################################################################
2222 12:56:13.926725
2223 12:56:14.440205 00300000 ################################################################
2224 12:56:14.440375
2225 12:56:14.962325 00380000 ################################################################
2226 12:56:14.962467
2227 12:56:15.480717 00400000 ################################################################
2228 12:56:15.480862
2229 12:56:15.993797 00480000 ################################################################
2230 12:56:15.993941
2231 12:56:16.536172 00500000 ################################################################
2232 12:56:16.536346
2233 12:56:17.074955 00580000 ################################################################
2234 12:56:17.075091
2235 12:56:17.595121 00600000 ################################################################
2236 12:56:17.595317
2237 12:56:18.168776 00680000 ################################################################
2238 12:56:18.168951
2239 12:56:18.682232 00700000 ################################################################
2240 12:56:18.682372
2241 12:56:19.194710 00780000 ################################################################
2242 12:56:19.194864
2243 12:56:19.784747 00800000 ################################################################
2244 12:56:19.785244
2245 12:56:20.176703 00880000 ##################################### done.
2246 12:56:20.177326
2247 12:56:20.179832 Sending tftp read request... done.
2248 12:56:20.180350
2249 12:56:20.183442 Waiting for the transfer...
2250 12:56:20.183923
2251 12:56:20.184287 00000000 # done.
2252 12:56:20.184640
2253 12:56:20.193206 Command line loaded dynamically from TFTP file: 10130720/tftp-deploy-_q0fsbag/kernel/cmdline
2254 12:56:20.193817
2255 12:56:20.206574 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2256 12:56:20.211218
2257 12:56:20.214557 Shutting down all USB controllers.
2258 12:56:20.215129
2259 12:56:20.215551 Removing current net device
2260 12:56:20.215973
2261 12:56:20.217517 Finalizing coreboot
2262 12:56:20.217985
2263 12:56:20.224487 Exiting depthcharge with code 4 at timestamp: 31439496
2264 12:56:20.225046
2265 12:56:20.225416
2266 12:56:20.225759 Starting kernel ...
2267 12:56:20.226087
2268 12:56:20.226405
2269 12:56:20.227773 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
2270 12:56:20.228307 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
2271 12:56:20.228723 Setting prompt string to ['Linux version [0-9]']
2272 12:56:20.229107 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2273 12:56:20.229487 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2275 13:00:42.229196 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
2277 13:00:42.230268 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
2279 13:00:42.231063 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2282 13:00:42.232970 end: 2 depthcharge-action (duration 00:05:00) [common]
2284 13:00:42.234603 Cleaning after the job
2285 13:00:42.235171 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10130720/tftp-deploy-_q0fsbag/ramdisk
2286 13:00:42.240152 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10130720/tftp-deploy-_q0fsbag/kernel
2287 13:00:42.245619 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10130720/tftp-deploy-_q0fsbag/modules
2288 13:00:42.247397 start: 5.1 power-off (timeout 00:00:30) [common]
2289 13:00:42.247939 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-12' '--port=1' '--command=off'
2290 13:00:42.334055 >> Command sent successfully.
2291 13:00:42.345131 Returned 0 in 0 seconds
2292 13:00:42.446428 end: 5.1 power-off (duration 00:00:00) [common]
2294 13:00:42.447989 start: 5.2 read-feedback (timeout 00:10:00) [common]
2295 13:00:42.449211 Listened to connection for namespace 'common' for up to 1s
2296 13:00:43.449840 Finalising connection for namespace 'common'
2297 13:00:43.450437 Disconnecting from shell: Finalise
2298 13:00:43.450834
2299 13:00:43.551809 end: 5.2 read-feedback (duration 00:00:01) [common]
2300 13:00:43.552426 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10130720
2301 13:00:43.602199 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10130720
2302 13:00:43.602405 JobError: Your job cannot terminate cleanly.