Boot log: asus-cx9400-volteer

    1 12:55:36.091225  lava-dispatcher, installed at version: 2023.03
    2 12:55:36.091435  start: 0 validate
    3 12:55:36.091565  Start time: 2023-04-26 12:55:36.091555+00:00 (UTC)
    4 12:55:36.091727  Using caching service: 'http://localhost/cache/?uri=%s'
    5 12:55:36.091851  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230414.0%2Famd64%2Frootfs.cpio.gz exists
    6 12:55:36.371903  Using caching service: 'http://localhost/cache/?uri=%s'
    7 12:55:36.372166  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.280-cip96-89-g355dfa824cb4%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 12:55:40.872626  Using caching service: 'http://localhost/cache/?uri=%s'
    9 12:55:40.872895  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.280-cip96-89-g355dfa824cb4%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 12:55:41.873662  validate duration: 5.78
   12 12:55:41.874051  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 12:55:41.874213  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 12:55:41.874360  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 12:55:41.874541  Not decompressing ramdisk as can be used compressed.
   16 12:55:41.874678  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230414.0/amd64/rootfs.cpio.gz
   17 12:55:41.874791  saving as /var/lib/lava/dispatcher/tmp/10130712/tftp-deploy-dop7g3xg/ramdisk/rootfs.cpio.gz
   18 12:55:41.874901  total size: 35757907 (34MB)
   19 12:55:41.876543  progress   0% (0MB)
   20 12:55:41.886812  progress   5% (1MB)
   21 12:55:41.896518  progress  10% (3MB)
   22 12:55:41.906400  progress  15% (5MB)
   23 12:55:41.915889  progress  20% (6MB)
   24 12:55:41.925116  progress  25% (8MB)
   25 12:55:41.934695  progress  30% (10MB)
   26 12:55:41.944259  progress  35% (11MB)
   27 12:55:41.953636  progress  40% (13MB)
   28 12:55:41.963780  progress  45% (15MB)
   29 12:55:41.978864  progress  50% (17MB)
   30 12:55:41.994756  progress  55% (18MB)
   31 12:55:42.009490  progress  60% (20MB)
   32 12:55:42.019320  progress  65% (22MB)
   33 12:55:42.029421  progress  70% (23MB)
   34 12:55:42.038886  progress  75% (25MB)
   35 12:55:42.048407  progress  80% (27MB)
   36 12:55:42.058270  progress  85% (29MB)
   37 12:55:42.068153  progress  90% (30MB)
   38 12:55:42.078101  progress  95% (32MB)
   39 12:55:42.087585  progress 100% (34MB)
   40 12:55:42.087800  34MB downloaded in 0.21s (160.18MB/s)
   41 12:55:42.087960  end: 1.1.1 http-download (duration 00:00:00) [common]
   43 12:55:42.088233  end: 1.1 download-retry (duration 00:00:00) [common]
   44 12:55:42.088322  start: 1.2 download-retry (timeout 00:10:00) [common]
   45 12:55:42.088406  start: 1.2.1 http-download (timeout 00:10:00) [common]
   46 12:55:42.088540  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.280-cip96-89-g355dfa824cb4/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 12:55:42.088610  saving as /var/lib/lava/dispatcher/tmp/10130712/tftp-deploy-dop7g3xg/kernel/bzImage
   48 12:55:42.088671  total size: 10858496 (10MB)
   49 12:55:42.088732  No compression specified
   50 12:55:42.090051  progress   0% (0MB)
   51 12:55:42.093422  progress   5% (0MB)
   52 12:55:42.096491  progress  10% (1MB)
   53 12:55:42.099245  progress  15% (1MB)
   54 12:55:42.102243  progress  20% (2MB)
   55 12:55:42.105029  progress  25% (2MB)
   56 12:55:42.107967  progress  30% (3MB)
   57 12:55:42.110726  progress  35% (3MB)
   58 12:55:42.115038  progress  40% (4MB)
   59 12:55:42.118057  progress  45% (4MB)
   60 12:55:42.120872  progress  50% (5MB)
   61 12:55:42.123872  progress  55% (5MB)
   62 12:55:42.126861  progress  60% (6MB)
   63 12:55:42.131518  progress  65% (6MB)
   64 12:55:42.135637  progress  70% (7MB)
   65 12:55:42.138526  progress  75% (7MB)
   66 12:55:42.141417  progress  80% (8MB)
   67 12:55:42.144178  progress  85% (8MB)
   68 12:55:42.147104  progress  90% (9MB)
   69 12:55:42.149818  progress  95% (9MB)
   70 12:55:42.152823  progress 100% (10MB)
   71 12:55:42.152995  10MB downloaded in 0.06s (161.00MB/s)
   72 12:55:42.153143  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 12:55:42.153377  end: 1.2 download-retry (duration 00:00:00) [common]
   75 12:55:42.153471  start: 1.3 download-retry (timeout 00:10:00) [common]
   76 12:55:42.153561  start: 1.3.1 http-download (timeout 00:10:00) [common]
   77 12:55:42.153697  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.280-cip96-89-g355dfa824cb4/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 12:55:42.153767  saving as /var/lib/lava/dispatcher/tmp/10130712/tftp-deploy-dop7g3xg/modules/modules.tar
   79 12:55:42.153830  total size: 483612 (0MB)
   80 12:55:42.153892  Using unxz to decompress xz
   81 12:55:42.157619  progress   6% (0MB)
   82 12:55:42.158045  progress  13% (0MB)
   83 12:55:42.158293  progress  20% (0MB)
   84 12:55:42.159783  progress  27% (0MB)
   85 12:55:42.161875  progress  33% (0MB)
   86 12:55:42.163744  progress  40% (0MB)
   87 12:55:42.165952  progress  47% (0MB)
   88 12:55:42.168056  progress  54% (0MB)
   89 12:55:42.170087  progress  60% (0MB)
   90 12:55:42.172020  progress  67% (0MB)
   91 12:55:42.174164  progress  74% (0MB)
   92 12:55:42.177817  progress  81% (0MB)
   93 12:55:42.179768  progress  88% (0MB)
   94 12:55:42.181698  progress  94% (0MB)
   95 12:55:42.184362  progress 100% (0MB)
   96 12:55:42.191317  0MB downloaded in 0.04s (12.31MB/s)
   97 12:55:42.191693  end: 1.3.1 http-download (duration 00:00:00) [common]
   99 12:55:42.192002  end: 1.3 download-retry (duration 00:00:00) [common]
  100 12:55:42.192124  start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
  101 12:55:42.192231  start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
  102 12:55:42.192316  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
  103 12:55:42.192402  start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
  104 12:55:42.192613  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10130712/lava-overlay-7s8la607
  105 12:55:42.192747  makedir: /var/lib/lava/dispatcher/tmp/10130712/lava-overlay-7s8la607/lava-10130712/bin
  106 12:55:42.192852  makedir: /var/lib/lava/dispatcher/tmp/10130712/lava-overlay-7s8la607/lava-10130712/tests
  107 12:55:42.192955  makedir: /var/lib/lava/dispatcher/tmp/10130712/lava-overlay-7s8la607/lava-10130712/results
  108 12:55:42.193077  Creating /var/lib/lava/dispatcher/tmp/10130712/lava-overlay-7s8la607/lava-10130712/bin/lava-add-keys
  109 12:55:42.193223  Creating /var/lib/lava/dispatcher/tmp/10130712/lava-overlay-7s8la607/lava-10130712/bin/lava-add-sources
  110 12:55:42.193351  Creating /var/lib/lava/dispatcher/tmp/10130712/lava-overlay-7s8la607/lava-10130712/bin/lava-background-process-start
  111 12:55:42.193477  Creating /var/lib/lava/dispatcher/tmp/10130712/lava-overlay-7s8la607/lava-10130712/bin/lava-background-process-stop
  112 12:55:42.193600  Creating /var/lib/lava/dispatcher/tmp/10130712/lava-overlay-7s8la607/lava-10130712/bin/lava-common-functions
  113 12:55:42.193721  Creating /var/lib/lava/dispatcher/tmp/10130712/lava-overlay-7s8la607/lava-10130712/bin/lava-echo-ipv4
  114 12:55:42.193843  Creating /var/lib/lava/dispatcher/tmp/10130712/lava-overlay-7s8la607/lava-10130712/bin/lava-install-packages
  115 12:55:42.193964  Creating /var/lib/lava/dispatcher/tmp/10130712/lava-overlay-7s8la607/lava-10130712/bin/lava-installed-packages
  116 12:55:42.194084  Creating /var/lib/lava/dispatcher/tmp/10130712/lava-overlay-7s8la607/lava-10130712/bin/lava-os-build
  117 12:55:42.194205  Creating /var/lib/lava/dispatcher/tmp/10130712/lava-overlay-7s8la607/lava-10130712/bin/lava-probe-channel
  118 12:55:42.194329  Creating /var/lib/lava/dispatcher/tmp/10130712/lava-overlay-7s8la607/lava-10130712/bin/lava-probe-ip
  119 12:55:42.194451  Creating /var/lib/lava/dispatcher/tmp/10130712/lava-overlay-7s8la607/lava-10130712/bin/lava-target-ip
  120 12:55:42.194573  Creating /var/lib/lava/dispatcher/tmp/10130712/lava-overlay-7s8la607/lava-10130712/bin/lava-target-mac
  121 12:55:42.194693  Creating /var/lib/lava/dispatcher/tmp/10130712/lava-overlay-7s8la607/lava-10130712/bin/lava-target-storage
  122 12:55:42.194818  Creating /var/lib/lava/dispatcher/tmp/10130712/lava-overlay-7s8la607/lava-10130712/bin/lava-test-case
  123 12:55:42.194953  Creating /var/lib/lava/dispatcher/tmp/10130712/lava-overlay-7s8la607/lava-10130712/bin/lava-test-event
  124 12:55:42.195077  Creating /var/lib/lava/dispatcher/tmp/10130712/lava-overlay-7s8la607/lava-10130712/bin/lava-test-feedback
  125 12:55:42.195201  Creating /var/lib/lava/dispatcher/tmp/10130712/lava-overlay-7s8la607/lava-10130712/bin/lava-test-raise
  126 12:55:42.195324  Creating /var/lib/lava/dispatcher/tmp/10130712/lava-overlay-7s8la607/lava-10130712/bin/lava-test-reference
  127 12:55:42.195446  Creating /var/lib/lava/dispatcher/tmp/10130712/lava-overlay-7s8la607/lava-10130712/bin/lava-test-runner
  128 12:55:42.195566  Creating /var/lib/lava/dispatcher/tmp/10130712/lava-overlay-7s8la607/lava-10130712/bin/lava-test-set
  129 12:55:42.195699  Creating /var/lib/lava/dispatcher/tmp/10130712/lava-overlay-7s8la607/lava-10130712/bin/lava-test-shell
  130 12:55:42.195824  Updating /var/lib/lava/dispatcher/tmp/10130712/lava-overlay-7s8la607/lava-10130712/bin/lava-install-packages (oe)
  131 12:55:42.195974  Updating /var/lib/lava/dispatcher/tmp/10130712/lava-overlay-7s8la607/lava-10130712/bin/lava-installed-packages (oe)
  132 12:55:42.196102  Creating /var/lib/lava/dispatcher/tmp/10130712/lava-overlay-7s8la607/lava-10130712/environment
  133 12:55:42.196208  LAVA metadata
  134 12:55:42.196282  - LAVA_JOB_ID=10130712
  135 12:55:42.196349  - LAVA_DISPATCHER_IP=192.168.201.1
  136 12:55:42.196459  start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
  137 12:55:42.196529  skipped lava-vland-overlay
  138 12:55:42.196605  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  139 12:55:42.196689  start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
  140 12:55:42.196753  skipped lava-multinode-overlay
  141 12:55:42.196828  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  142 12:55:42.196912  start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
  143 12:55:42.196988  Loading test definitions
  144 12:55:42.197080  start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
  145 12:55:42.197153  Using /lava-10130712 at stage 0
  146 12:55:42.197461  uuid=10130712_1.4.2.3.1 testdef=None
  147 12:55:42.197551  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  148 12:55:42.197637  start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
  149 12:55:42.198151  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  151 12:55:42.198374  start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
  152 12:55:42.198971  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  154 12:55:42.199203  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
  155 12:55:42.199800  runner path: /var/lib/lava/dispatcher/tmp/10130712/lava-overlay-7s8la607/lava-10130712/0/tests/0_cros-ec test_uuid 10130712_1.4.2.3.1
  156 12:55:42.199955  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  158 12:55:42.200172  Creating lava-test-runner.conf files
  159 12:55:42.200236  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10130712/lava-overlay-7s8la607/lava-10130712/0 for stage 0
  160 12:55:42.200324  - 0_cros-ec
  161 12:55:42.200422  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  162 12:55:42.200508  start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
  163 12:55:42.207128  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  164 12:55:42.207272  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
  165 12:55:42.207363  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  166 12:55:42.207455  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  167 12:55:42.207540  start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
  168 12:55:43.311192  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
  169 12:55:43.311689  start: 1.4.4 extract-modules (timeout 00:09:59) [common]
  170 12:55:43.311872  extracting modules file /var/lib/lava/dispatcher/tmp/10130712/tftp-deploy-dop7g3xg/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10130712/extract-overlay-ramdisk-hd0ugris/ramdisk
  171 12:55:43.338797  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  172 12:55:43.338976  start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
  173 12:55:43.339075  [common] Applying overlay /var/lib/lava/dispatcher/tmp/10130712/compress-overlay-slwpnd30/overlay-1.4.2.4.tar.gz to ramdisk
  174 12:55:43.339152  [common] Applying overlay /var/lib/lava/dispatcher/tmp/10130712/compress-overlay-slwpnd30/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10130712/extract-overlay-ramdisk-hd0ugris/ramdisk
  175 12:55:43.347332  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  176 12:55:43.347499  start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
  177 12:55:43.347645  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  178 12:55:43.347758  start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
  179 12:55:43.347848  Building ramdisk /var/lib/lava/dispatcher/tmp/10130712/extract-overlay-ramdisk-hd0ugris/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10130712/extract-overlay-ramdisk-hd0ugris/ramdisk
  180 12:55:43.842315  >> 188232 blocks

  181 12:55:47.489016  rename /var/lib/lava/dispatcher/tmp/10130712/extract-overlay-ramdisk-hd0ugris/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10130712/tftp-deploy-dop7g3xg/ramdisk/ramdisk.cpio.gz
  182 12:55:47.489465  end: 1.4.7 compress-ramdisk (duration 00:00:04) [common]
  183 12:55:47.489591  start: 1.4.8 prepare-kernel (timeout 00:09:54) [common]
  184 12:55:47.489695  start: 1.4.8.1 prepare-fit (timeout 00:09:54) [common]
  185 12:55:47.489987  No mkimage arch provided, not using FIT.
  186 12:55:47.490078  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  187 12:55:47.490165  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  188 12:55:47.490269  end: 1.4 prepare-tftp-overlay (duration 00:00:05) [common]
  189 12:55:47.490360  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:54) [common]
  190 12:55:47.490478  No LXC device requested
  191 12:55:47.490587  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  192 12:55:47.490705  start: 1.6 deploy-device-env (timeout 00:09:54) [common]
  193 12:55:47.490786  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  194 12:55:47.490861  Checking files for TFTP limit of 4294967296 bytes.
  195 12:55:47.491259  end: 1 tftp-deploy (duration 00:00:06) [common]
  196 12:55:47.491359  start: 2 depthcharge-action (timeout 00:05:00) [common]
  197 12:55:47.491468  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  198 12:55:47.491632  substitutions:
  199 12:55:47.491704  - {DTB}: None
  200 12:55:47.491783  - {INITRD}: 10130712/tftp-deploy-dop7g3xg/ramdisk/ramdisk.cpio.gz
  201 12:55:47.491843  - {KERNEL}: 10130712/tftp-deploy-dop7g3xg/kernel/bzImage
  202 12:55:47.491931  - {LAVA_MAC}: None
  203 12:55:47.492019  - {PRESEED_CONFIG}: None
  204 12:55:47.492111  - {PRESEED_LOCAL}: None
  205 12:55:47.492204  - {RAMDISK}: 10130712/tftp-deploy-dop7g3xg/ramdisk/ramdisk.cpio.gz
  206 12:55:47.492293  - {ROOT_PART}: None
  207 12:55:47.492389  - {ROOT}: None
  208 12:55:47.492475  - {SERVER_IP}: 192.168.201.1
  209 12:55:47.492554  - {TEE}: None
  210 12:55:47.492654  Parsed boot commands:
  211 12:55:47.492739  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  212 12:55:47.492963  Parsed boot commands: tftpboot 192.168.201.1 10130712/tftp-deploy-dop7g3xg/kernel/bzImage 10130712/tftp-deploy-dop7g3xg/kernel/cmdline 10130712/tftp-deploy-dop7g3xg/ramdisk/ramdisk.cpio.gz
  213 12:55:47.493080  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  214 12:55:47.493195  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  215 12:55:47.493320  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  216 12:55:47.493435  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  217 12:55:47.493535  Not connected, no need to disconnect.
  218 12:55:47.493643  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  219 12:55:47.493756  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  220 12:55:47.493853  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-3'
  221 12:55:47.497547  Setting prompt string to ['lava-test: # ']
  222 12:55:47.497978  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  223 12:55:47.498127  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  224 12:55:47.498277  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  225 12:55:47.498412  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  226 12:55:47.498703  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-3' '--port=1' '--command=reboot'
  227 12:55:52.630830  >> Command sent successfully.

  228 12:55:52.633518  Returned 0 in 5 seconds
  229 12:55:52.733913  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  231 12:55:52.734232  end: 2.2.2 reset-device (duration 00:00:05) [common]
  232 12:55:52.734332  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  233 12:55:52.734419  Setting prompt string to 'Starting depthcharge on Voema...'
  234 12:55:52.734484  Changing prompt to 'Starting depthcharge on Voema...'
  235 12:55:52.734553  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  236 12:55:52.734809  [Enter `^Ec?' for help]

  237 12:55:54.336723  

  238 12:55:54.336913  

  239 12:55:54.346336  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...

  240 12:55:54.349798  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz

  241 12:55:54.356348  CPU: ID 806c1, Tigerlake B0, ucode: 00000086

  242 12:55:54.359825  CPU: AES supported, TXT NOT supported, VT supported

  243 12:55:54.366136  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2

  244 12:55:54.372772  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU

  245 12:55:54.376239  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2

  246 12:55:54.379543  VBOOT: Loading verstage.

  247 12:55:54.382664  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  248 12:55:54.389321  FMAP: base = 0x0 size = 0x2000000 #areas = 32

  249 12:55:54.392775  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  250 12:55:54.403315  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes

  251 12:55:54.409859  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984

  252 12:55:54.410021  

  253 12:55:54.410106  

  254 12:55:54.423100  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...

  255 12:55:54.437368  Probing TPM: . done!

  256 12:55:54.440460  TPM ready after 0 ms

  257 12:55:54.443470  Connected to device vid:did:rid of 1ae0:0028:00

  258 12:55:54.455204  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6

  259 12:55:54.461437  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  260 12:55:54.464885  Initialized TPM device CR50 revision 0

  261 12:55:54.515042  tlcl_send_startup: Startup return code is 0

  262 12:55:54.515145  TPM: setup succeeded

  263 12:55:54.529725  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  264 12:55:54.543708  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  265 12:55:54.556406  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

  266 12:55:54.566077  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  267 12:55:54.570632  Chrome EC: UHEPI supported

  268 12:55:54.573983  Phase 1

  269 12:55:54.577249  FMAP: area GBB found @ 1805000 (458752 bytes)

  270 12:55:54.587695  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  271 12:55:54.594228  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  272 12:55:54.600681  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  273 12:55:54.607498  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7

  274 12:55:54.610729  Recovery requested (1009000e)

  275 12:55:54.614099  TPM: Extending digest for VBOOT: boot mode into PCR 0

  276 12:55:54.625728  tlcl_extend: response is 0

  277 12:55:54.632107  TPM: Extending digest for VBOOT: GBB HWID into PCR 1

  278 12:55:54.641621  tlcl_extend: response is 0

  279 12:55:54.648468  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  280 12:55:54.655018  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638

  281 12:55:54.661716  BS: verstage times (exec / console): total (unknown) / 142 ms

  282 12:55:54.661801  

  283 12:55:54.661868  

  284 12:55:54.674768  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...

  285 12:55:54.681576  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  286 12:55:54.684945  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  287 12:55:54.688201  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000

  288 12:55:54.694995  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  289 12:55:54.698295  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000

  290 12:55:54.701415  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000

  291 12:55:54.704735  TCO_STS:   0000 0000

  292 12:55:54.708194  GEN_PMCON: d0015038 00002200

  293 12:55:54.711440  GBLRST_CAUSE: 00000000 00000000

  294 12:55:54.714897  HPR_CAUSE0: 00000000

  295 12:55:54.714983  prev_sleep_state 5

  296 12:55:54.717883  Boot Count incremented to 19009

  297 12:55:54.724612  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  298 12:55:54.731168  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  299 12:55:54.741087  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  300 12:55:54.747914  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c

  301 12:55:54.751062  Chrome EC: UHEPI supported

  302 12:55:54.757866  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  303 12:55:54.768690  Probing TPM:  done!

  304 12:55:54.776544  Connected to device vid:did:rid of 1ae0:0028:00

  305 12:55:54.784035  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6

  306 12:55:54.793557  Initialized TPM device CR50 revision 0

  307 12:55:54.803802  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  308 12:55:54.810322  MRC: Hash idx 0x100b comparison successful.

  309 12:55:54.813814  MRC cache found, size faa8

  310 12:55:54.813897  bootmode is set to: 2

  311 12:55:54.816946  SPD index = 0

  312 12:55:54.823543  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c

  313 12:55:54.826927  SPD: module type is LPDDR4X

  314 12:55:54.829991  SPD: module part number is MT53E512M64D4NW-046

  315 12:55:54.836836  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  316 12:55:54.840209  SPD: device width 16 bits, bus width 16 bits

  317 12:55:54.846969  SPD: module size is 1024 MB (per channel)

  318 12:55:55.278974  CBMEM:

  319 12:55:55.282624  IMD: root @ 0x76fff000 254 entries.

  320 12:55:55.285751  IMD: root @ 0x76ffec00 62 entries.

  321 12:55:55.288971  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  322 12:55:55.295995  FMAP: area RW_VPD found @ f35000 (8192 bytes)

  323 12:55:55.299162  External stage cache:

  324 12:55:55.302536  IMD: root @ 0x7b3ff000 254 entries.

  325 12:55:55.305591  IMD: root @ 0x7b3fec00 62 entries.

  326 12:55:55.321204  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  327 12:55:55.327779  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  328 12:55:55.334321  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  329 12:55:55.348096  MRC: 'RECOVERY_MRC_CACHE' does not need update.

  330 12:55:55.355131  cse_lite: Skip switching to RW in the recovery path

  331 12:55:55.355215  8 DIMMs found

  332 12:55:55.355282  SMM Memory Map

  333 12:55:55.358393  SMRAM       : 0x7b000000 0x800000

  334 12:55:55.361812   Subregion 0: 0x7b000000 0x200000

  335 12:55:55.365135   Subregion 1: 0x7b200000 0x200000

  336 12:55:55.368428   Subregion 2: 0x7b400000 0x400000

  337 12:55:55.371801  top_of_ram = 0x77000000

  338 12:55:55.378897  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  339 12:55:55.381663  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)

  340 12:55:55.388248  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  341 12:55:55.395281  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  342 12:55:55.401669  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c

  343 12:55:55.408508  Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)

  344 12:55:55.418355  Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500

  345 12:55:55.421751  Processing 211 relocs. Offset value of 0x74c0b000

  346 12:55:55.431424  BS: romstage times (exec / console): total (unknown) / 277 ms

  347 12:55:55.436836  

  348 12:55:55.436918  

  349 12:55:55.446887  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...

  350 12:55:55.450162  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  351 12:55:55.460555  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  352 12:55:55.466835  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  353 12:55:55.473250  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec

  354 12:55:55.479948  Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)

  355 12:55:55.527172  Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270

  356 12:55:55.533975  Processing 5008 relocs. Offset value of 0x75d98000

  357 12:55:55.537260  BS: postcar times (exec / console): total (unknown) / 59 ms

  358 12:55:55.540542  

  359 12:55:55.540643  

  360 12:55:55.550703  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...

  361 12:55:55.550791  Normal boot

  362 12:55:55.553876  FW_CONFIG value is 0x804c02

  363 12:55:55.557180  PCI: 00:07.0 disabled by fw_config

  364 12:55:55.560578  PCI: 00:07.1 disabled by fw_config

  365 12:55:55.567388  PCI: 00:0d.2 disabled by fw_config

  366 12:55:55.570394  PCI: 00:1c.7 disabled by fw_config

  367 12:55:55.574140  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  368 12:55:55.580758  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  369 12:55:55.587307  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  370 12:55:55.590654  GENERIC: 0.0 disabled by fw_config

  371 12:55:55.593991  GENERIC: 1.0 disabled by fw_config

  372 12:55:55.597411  fw_config match found: DB_USB=USB3_ACTIVE

  373 12:55:55.600693  fw_config match found: DB_USB=USB3_ACTIVE

  374 12:55:55.603939  fw_config match found: DB_USB=USB3_ACTIVE

  375 12:55:55.610116  fw_config match found: DB_USB=USB3_ACTIVE

  376 12:55:55.613877  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  377 12:55:55.623361  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  378 12:55:55.630177  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  379 12:55:55.636871  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c

  380 12:55:55.643689  microcode: sig=0x806c1 pf=0x80 revision=0x86

  381 12:55:55.646683  microcode: Update skipped, already up-to-date

  382 12:55:55.653516  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c

  383 12:55:55.681422  Detected 4 core, 8 thread CPU.

  384 12:55:55.684820  Setting up SMI for CPU

  385 12:55:55.688328  IED base = 0x7b400000

  386 12:55:55.688404  IED size = 0x00400000

  387 12:55:55.691567  Will perform SMM setup.

  388 12:55:55.697951  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.

  389 12:55:55.704604  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

  390 12:55:55.711410  Processing 16 relocs. Offset value of 0x00030000

  391 12:55:55.714519  Attempting to start 7 APs

  392 12:55:55.717715  Waiting for 10ms after sending INIT.

  393 12:55:55.733864  Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.

  394 12:55:55.733975  done.

  395 12:55:55.736595  AP: slot 5 apic_id 6.

  396 12:55:55.739894  AP: slot 2 apic_id 7.

  397 12:55:55.739992  AP: slot 3 apic_id 2.

  398 12:55:55.743748  AP: slot 6 apic_id 3.

  399 12:55:55.746578  AP: slot 4 apic_id 4.

  400 12:55:55.746661  AP: slot 7 apic_id 5.

  401 12:55:55.753315  Waiting for 2nd SIPI to complete...done.

  402 12:55:55.759960  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

  403 12:55:55.766631  Processing 13 relocs. Offset value of 0x00038000

  404 12:55:55.766718  Unable to locate Global NVS

  405 12:55:55.776986  SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)

  406 12:55:55.780058  Installing permanent SMM handler to 0x7b000000

  407 12:55:55.789706  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908

  408 12:55:55.793090  Processing 794 relocs. Offset value of 0x7b010000

  409 12:55:55.803157  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8

  410 12:55:55.806542  Processing 13 relocs. Offset value of 0x7b008000

  411 12:55:55.812775  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd

  412 12:55:55.819653  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd

  413 12:55:55.822829  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd

  414 12:55:55.829722  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd

  415 12:55:55.835857  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd

  416 12:55:55.842509  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd

  417 12:55:55.849281  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd

  418 12:55:55.852670  Unable to locate Global NVS

  419 12:55:55.859465  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)

  420 12:55:55.862791  Clearing SMI status registers

  421 12:55:55.862899  SMI_STS: PM1 

  422 12:55:55.865526  PM1_STS: PWRBTN 

  423 12:55:55.872799  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0

  424 12:55:55.875509  In relocation handler: CPU 0

  425 12:55:55.879173  New SMBASE=0x7b000000 IEDBASE=0x7b400000

  426 12:55:55.885961  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  427 12:55:55.886041  Relocation complete.

  428 12:55:55.895649  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1

  429 12:55:55.899203  In relocation handler: CPU 1

  430 12:55:55.902379  New SMBASE=0x7afffc00 IEDBASE=0x7b400000

  431 12:55:55.902465  Relocation complete.

  432 12:55:55.912230  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6

  433 12:55:55.912317  In relocation handler: CPU 6

  434 12:55:55.918948  New SMBASE=0x7affe800 IEDBASE=0x7b400000

  435 12:55:55.919034  Relocation complete.

  436 12:55:55.928792  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3

  437 12:55:55.928877  In relocation handler: CPU 3

  438 12:55:55.935520  New SMBASE=0x7afff400 IEDBASE=0x7b400000

  439 12:55:55.939206  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  440 12:55:55.942199  Relocation complete.

  441 12:55:55.948836  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5

  442 12:55:55.952258  In relocation handler: CPU 5

  443 12:55:55.955438  New SMBASE=0x7affec00 IEDBASE=0x7b400000

  444 12:55:55.962085  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  445 12:55:55.962169  Relocation complete.

  446 12:55:55.968846  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2

  447 12:55:55.972082  In relocation handler: CPU 2

  448 12:55:55.978759  New SMBASE=0x7afff800 IEDBASE=0x7b400000

  449 12:55:55.978843  Relocation complete.

  450 12:55:55.985453  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4

  451 12:55:55.988846  In relocation handler: CPU 4

  452 12:55:55.995324  New SMBASE=0x7afff000 IEDBASE=0x7b400000

  453 12:55:55.998594  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  454 12:55:56.002182  Relocation complete.

  455 12:55:56.008871  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7

  456 12:55:56.011786  In relocation handler: CPU 7

  457 12:55:56.015103  New SMBASE=0x7affe400 IEDBASE=0x7b400000

  458 12:55:56.018830  Relocation complete.

  459 12:55:56.018934  Initializing CPU #0

  460 12:55:56.022126  CPU: vendor Intel device 806c1

  461 12:55:56.026015  CPU: family 06, model 8c, stepping 01

  462 12:55:56.029186  Clearing out pending MCEs

  463 12:55:56.032893  Setting up local APIC...

  464 12:55:56.033024   apic_id: 0x00 done.

  465 12:55:56.035937  Turbo is available but hidden

  466 12:55:56.039094  Turbo is available and visible

  467 12:55:56.045968  microcode: Update skipped, already up-to-date

  468 12:55:56.046052  CPU #0 initialized

  469 12:55:56.049575  Initializing CPU #5

  470 12:55:56.052788  Initializing CPU #2

  471 12:55:56.052883  Initializing CPU #3

  472 12:55:56.056156  Initializing CPU #6

  473 12:55:56.059375  CPU: vendor Intel device 806c1

  474 12:55:56.062777  CPU: family 06, model 8c, stepping 01

  475 12:55:56.066230  CPU: vendor Intel device 806c1

  476 12:55:56.069160  CPU: family 06, model 8c, stepping 01

  477 12:55:56.072362  Clearing out pending MCEs

  478 12:55:56.072443  Initializing CPU #7

  479 12:55:56.076065  Initializing CPU #4

  480 12:55:56.079385  CPU: vendor Intel device 806c1

  481 12:55:56.082323  CPU: family 06, model 8c, stepping 01

  482 12:55:56.086174  CPU: vendor Intel device 806c1

  483 12:55:56.089333  CPU: family 06, model 8c, stepping 01

  484 12:55:56.092596  Clearing out pending MCEs

  485 12:55:56.095915  Clearing out pending MCEs

  486 12:55:56.099380  Setting up local APIC...

  487 12:55:56.099462  Setting up local APIC...

  488 12:55:56.102198   apic_id: 0x05 done.

  489 12:55:56.105999  Setting up local APIC...

  490 12:55:56.106081   apic_id: 0x02 done.

  491 12:55:56.109159  Clearing out pending MCEs

  492 12:55:56.115810  microcode: Update skipped, already up-to-date

  493 12:55:56.115896  Setting up local APIC...

  494 12:55:56.119174  Initializing CPU #1

  495 12:55:56.122399  CPU: vendor Intel device 806c1

  496 12:55:56.125607  CPU: family 06, model 8c, stepping 01

  497 12:55:56.129165  CPU: vendor Intel device 806c1

  498 12:55:56.132457  CPU: family 06, model 8c, stepping 01

  499 12:55:56.135555  Clearing out pending MCEs

  500 12:55:56.139138  Clearing out pending MCEs

  501 12:55:56.139222  Setting up local APIC...

  502 12:55:56.142236   apic_id: 0x04 done.

  503 12:55:56.145747  microcode: Update skipped, already up-to-date

  504 12:55:56.152098  microcode: Update skipped, already up-to-date

  505 12:55:56.152210  CPU #7 initialized

  506 12:55:56.155771  CPU #4 initialized

  507 12:55:56.158994  Setting up local APIC...

  508 12:55:56.159071  CPU #3 initialized

  509 12:55:56.162094   apic_id: 0x03 done.

  510 12:55:56.165529   apic_id: 0x06 done.

  511 12:55:56.165601   apic_id: 0x07 done.

  512 12:55:56.172052  microcode: Update skipped, already up-to-date

  513 12:55:56.175412  microcode: Update skipped, already up-to-date

  514 12:55:56.178544  CPU #5 initialized

  515 12:55:56.178658  CPU #2 initialized

  516 12:55:56.185287  microcode: Update skipped, already up-to-date

  517 12:55:56.188750  CPU: vendor Intel device 806c1

  518 12:55:56.192022  CPU: family 06, model 8c, stepping 01

  519 12:55:56.192128  CPU #6 initialized

  520 12:55:56.195379  Clearing out pending MCEs

  521 12:55:56.198600  Setting up local APIC...

  522 12:55:56.202046   apic_id: 0x01 done.

  523 12:55:56.205340  microcode: Update skipped, already up-to-date

  524 12:55:56.208739  CPU #1 initialized

  525 12:55:56.211877  bsp_do_flight_plan done after 455 msecs.

  526 12:55:56.215286  CPU: frequency set to 4000 MHz

  527 12:55:56.215371  Enabling SMIs.

  528 12:55:56.221480  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 348 / 317 ms

  529 12:55:56.238629  SATAXPCIE1 indicates PCIe NVMe is present

  530 12:55:56.241966  Probing TPM:  done!

  531 12:55:56.245584  Connected to device vid:did:rid of 1ae0:0028:00

  532 12:55:56.256111  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6

  533 12:55:56.259188  Initialized TPM device CR50 revision 0

  534 12:55:56.263013  Enabling S0i3.4

  535 12:55:56.269174  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc

  536 12:55:56.272520  Found a VBT of 8704 bytes after decompression

  537 12:55:56.279195  cse_lite: CSE RO boot. HybridStorageMode disabled

  538 12:55:56.285774  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called

  539 12:55:56.361530  FSPS returned 0

  540 12:55:56.364574  Executing Phase 1 of FspMultiPhaseSiInit

  541 12:55:56.374415  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  542 12:55:56.377923  port C0 DISC req: usage 1 usb3 1 usb2 5

  543 12:55:56.381278  Raw Buffer output 0 00000511

  544 12:55:56.384580  Raw Buffer output 1 00000000

  545 12:55:56.388411  pmc_send_ipc_cmd succeeded

  546 12:55:56.394775  port C1 DISC req: usage 1 usb3 2 usb2 3

  547 12:55:56.394907  Raw Buffer output 0 00000321

  548 12:55:56.397968  Raw Buffer output 1 00000000

  549 12:55:56.402280  pmc_send_ipc_cmd succeeded

  550 12:55:56.407829  Detected 4 core, 8 thread CPU.

  551 12:55:56.411017  Detected 4 core, 8 thread CPU.

  552 12:55:56.645245  Display FSP Version Info HOB

  553 12:55:56.648607  Reference Code - CPU = a.0.4c.31

  554 12:55:56.651835  uCode Version = 0.0.0.86

  555 12:55:56.655140  TXT ACM version = ff.ff.ff.ffff

  556 12:55:56.658369  Reference Code - ME = a.0.4c.31

  557 12:55:56.661673  MEBx version = 0.0.0.0

  558 12:55:56.665187  ME Firmware Version = Consumer SKU

  559 12:55:56.668425  Reference Code - PCH = a.0.4c.31

  560 12:55:56.671700  PCH-CRID Status = Disabled

  561 12:55:56.675050  PCH-CRID Original Value = ff.ff.ff.ffff

  562 12:55:56.678372  PCH-CRID New Value = ff.ff.ff.ffff

  563 12:55:56.681624  OPROM - RST - RAID = ff.ff.ff.ffff

  564 12:55:56.684780  PCH Hsio Version = 4.0.0.0

  565 12:55:56.688343  Reference Code - SA - System Agent = a.0.4c.31

  566 12:55:56.691565  Reference Code - MRC = 2.0.0.1

  567 12:55:56.694722  SA - PCIe Version = a.0.4c.31

  568 12:55:56.698085  SA-CRID Status = Disabled

  569 12:55:56.701838  SA-CRID Original Value = 0.0.0.1

  570 12:55:56.704623  SA-CRID New Value = 0.0.0.1

  571 12:55:56.707990  OPROM - VBIOS = ff.ff.ff.ffff

  572 12:55:56.711197  IO Manageability Engine FW Version = 11.1.4.0

  573 12:55:56.714633  PHY Build Version = 0.0.0.e0

  574 12:55:56.717904  Thunderbolt(TM) FW Version = 0.0.0.0

  575 12:55:56.724556  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  576 12:55:56.727847  ITSS IRQ Polarities Before:

  577 12:55:56.727985  IPC0: 0xffffffff

  578 12:55:56.731213  IPC1: 0xffffffff

  579 12:55:56.731297  IPC2: 0xffffffff

  580 12:55:56.734643  IPC3: 0xffffffff

  581 12:55:56.737979  ITSS IRQ Polarities After:

  582 12:55:56.738128  IPC0: 0xffffffff

  583 12:55:56.741406  IPC1: 0xffffffff

  584 12:55:56.741480  IPC2: 0xffffffff

  585 12:55:56.744527  IPC3: 0xffffffff

  586 12:55:56.747834  Found PCIe Root Port #9 at PCI: 00:1d.0.

  587 12:55:56.761009  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.

  588 12:55:56.771002  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.

  589 12:55:56.784382  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.

  590 12:55:56.790705  BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms

  591 12:55:56.794553  Enumerating buses...

  592 12:55:56.797679  Show all devs... Before device enumeration.

  593 12:55:56.800746  Root Device: enabled 1

  594 12:55:56.800830  DOMAIN: 0000: enabled 1

  595 12:55:56.804528  CPU_CLUSTER: 0: enabled 1

  596 12:55:56.807565  PCI: 00:00.0: enabled 1

  597 12:55:56.810908  PCI: 00:02.0: enabled 1

  598 12:55:56.811008  PCI: 00:04.0: enabled 1

  599 12:55:56.814217  PCI: 00:05.0: enabled 1

  600 12:55:56.817403  PCI: 00:06.0: enabled 0

  601 12:55:56.817489  PCI: 00:07.0: enabled 0

  602 12:55:56.820744  PCI: 00:07.1: enabled 0

  603 12:55:56.823932  PCI: 00:07.2: enabled 0

  604 12:55:56.827295  PCI: 00:07.3: enabled 0

  605 12:55:56.827404  PCI: 00:08.0: enabled 1

  606 12:55:56.830704  PCI: 00:09.0: enabled 0

  607 12:55:56.834054  PCI: 00:0a.0: enabled 0

  608 12:55:56.837545  PCI: 00:0d.0: enabled 1

  609 12:55:56.837630  PCI: 00:0d.1: enabled 0

  610 12:55:56.840832  PCI: 00:0d.2: enabled 0

  611 12:55:56.844266  PCI: 00:0d.3: enabled 0

  612 12:55:56.847429  PCI: 00:0e.0: enabled 0

  613 12:55:56.847514  PCI: 00:10.2: enabled 1

  614 12:55:56.850688  PCI: 00:10.6: enabled 0

  615 12:55:56.853891  PCI: 00:10.7: enabled 0

  616 12:55:56.857189  PCI: 00:12.0: enabled 0

  617 12:55:56.857273  PCI: 00:12.6: enabled 0

  618 12:55:56.860546  PCI: 00:13.0: enabled 0

  619 12:55:56.864004  PCI: 00:14.0: enabled 1

  620 12:55:56.864087  PCI: 00:14.1: enabled 0

  621 12:55:56.867209  PCI: 00:14.2: enabled 1

  622 12:55:56.870474  PCI: 00:14.3: enabled 1

  623 12:55:56.873742  PCI: 00:15.0: enabled 1

  624 12:55:56.873826  PCI: 00:15.1: enabled 1

  625 12:55:56.877596  PCI: 00:15.2: enabled 1

  626 12:55:56.880851  PCI: 00:15.3: enabled 1

  627 12:55:56.883667  PCI: 00:16.0: enabled 1

  628 12:55:56.883761  PCI: 00:16.1: enabled 0

  629 12:55:56.886996  PCI: 00:16.2: enabled 0

  630 12:55:56.890344  PCI: 00:16.3: enabled 0

  631 12:55:56.893781  PCI: 00:16.4: enabled 0

  632 12:55:56.893865  PCI: 00:16.5: enabled 0

  633 12:55:56.897235  PCI: 00:17.0: enabled 1

  634 12:55:56.900539  PCI: 00:19.0: enabled 0

  635 12:55:56.903523  PCI: 00:19.1: enabled 1

  636 12:55:56.903662  PCI: 00:19.2: enabled 0

  637 12:55:56.907184  PCI: 00:1c.0: enabled 1

  638 12:55:56.910464  PCI: 00:1c.1: enabled 0

  639 12:55:56.910548  PCI: 00:1c.2: enabled 0

  640 12:55:56.913508  PCI: 00:1c.3: enabled 0

  641 12:55:56.917255  PCI: 00:1c.4: enabled 0

  642 12:55:56.920208  PCI: 00:1c.5: enabled 0

  643 12:55:56.920295  PCI: 00:1c.6: enabled 1

  644 12:55:56.923470  PCI: 00:1c.7: enabled 0

  645 12:55:56.926924  PCI: 00:1d.0: enabled 1

  646 12:55:56.930682  PCI: 00:1d.1: enabled 0

  647 12:55:56.930766  PCI: 00:1d.2: enabled 1

  648 12:55:56.933549  PCI: 00:1d.3: enabled 0

  649 12:55:56.936944  PCI: 00:1e.0: enabled 1

  650 12:55:56.940290  PCI: 00:1e.1: enabled 0

  651 12:55:56.940374  PCI: 00:1e.2: enabled 1

  652 12:55:56.943606  PCI: 00:1e.3: enabled 1

  653 12:55:56.947121  PCI: 00:1f.0: enabled 1

  654 12:55:56.950397  PCI: 00:1f.1: enabled 0

  655 12:55:56.950482  PCI: 00:1f.2: enabled 1

  656 12:55:56.953739  PCI: 00:1f.3: enabled 1

  657 12:55:56.957001  PCI: 00:1f.4: enabled 0

  658 12:55:56.957086  PCI: 00:1f.5: enabled 1

  659 12:55:56.960192  PCI: 00:1f.6: enabled 0

  660 12:55:56.963358  PCI: 00:1f.7: enabled 0

  661 12:55:56.966971  APIC: 00: enabled 1

  662 12:55:56.967068  GENERIC: 0.0: enabled 1

  663 12:55:56.970050  GENERIC: 0.0: enabled 1

  664 12:55:56.973399  GENERIC: 1.0: enabled 1

  665 12:55:56.973490  GENERIC: 0.0: enabled 1

  666 12:55:56.977037  GENERIC: 1.0: enabled 1

  667 12:55:56.980289  USB0 port 0: enabled 1

  668 12:55:56.983424  GENERIC: 0.0: enabled 1

  669 12:55:56.983502  USB0 port 0: enabled 1

  670 12:55:56.986754  GENERIC: 0.0: enabled 1

  671 12:55:56.990082  I2C: 00:1a: enabled 1

  672 12:55:56.990165  I2C: 00:31: enabled 1

  673 12:55:56.993526  I2C: 00:32: enabled 1

  674 12:55:56.996746  I2C: 00:10: enabled 1

  675 12:55:56.996826  I2C: 00:15: enabled 1

  676 12:55:57.000136  GENERIC: 0.0: enabled 0

  677 12:55:57.003332  GENERIC: 1.0: enabled 0

  678 12:55:57.006521  GENERIC: 0.0: enabled 1

  679 12:55:57.006596  SPI: 00: enabled 1

  680 12:55:57.010061  SPI: 00: enabled 1

  681 12:55:57.013679  PNP: 0c09.0: enabled 1

  682 12:55:57.013761  GENERIC: 0.0: enabled 1

  683 12:55:57.016887  USB3 port 0: enabled 1

  684 12:55:57.020065  USB3 port 1: enabled 1

  685 12:55:57.020142  USB3 port 2: enabled 0

  686 12:55:57.023229  USB3 port 3: enabled 0

  687 12:55:57.026814  USB2 port 0: enabled 0

  688 12:55:57.029830  USB2 port 1: enabled 1

  689 12:55:57.029911  USB2 port 2: enabled 1

  690 12:55:57.033403  USB2 port 3: enabled 0

  691 12:55:57.036816  USB2 port 4: enabled 1

  692 12:55:57.036896  USB2 port 5: enabled 0

  693 12:55:57.039710  USB2 port 6: enabled 0

  694 12:55:57.042993  USB2 port 7: enabled 0

  695 12:55:57.043069  USB2 port 8: enabled 0

  696 12:55:57.046450  USB2 port 9: enabled 0

  697 12:55:57.049749  USB3 port 0: enabled 0

  698 12:55:57.053167  USB3 port 1: enabled 1

  699 12:55:57.053250  USB3 port 2: enabled 0

  700 12:55:57.056462  USB3 port 3: enabled 0

  701 12:55:57.059878  GENERIC: 0.0: enabled 1

  702 12:55:57.063117  GENERIC: 1.0: enabled 1

  703 12:55:57.063195  APIC: 01: enabled 1

  704 12:55:57.066437  APIC: 07: enabled 1

  705 12:55:57.066519  APIC: 02: enabled 1

  706 12:55:57.069671  APIC: 04: enabled 1

  707 12:55:57.073154  APIC: 06: enabled 1

  708 12:55:57.073237  APIC: 03: enabled 1

  709 12:55:57.076624  APIC: 05: enabled 1

  710 12:55:57.076698  Compare with tree...

  711 12:55:57.079799  Root Device: enabled 1

  712 12:55:57.083007   DOMAIN: 0000: enabled 1

  713 12:55:57.086117    PCI: 00:00.0: enabled 1

  714 12:55:57.089905    PCI: 00:02.0: enabled 1

  715 12:55:57.089984    PCI: 00:04.0: enabled 1

  716 12:55:57.092865     GENERIC: 0.0: enabled 1

  717 12:55:57.096110    PCI: 00:05.0: enabled 1

  718 12:55:57.099507    PCI: 00:06.0: enabled 0

  719 12:55:57.102875    PCI: 00:07.0: enabled 0

  720 12:55:57.102955     GENERIC: 0.0: enabled 1

  721 12:55:57.106081    PCI: 00:07.1: enabled 0

  722 12:55:57.109528     GENERIC: 1.0: enabled 1

  723 12:55:57.113182    PCI: 00:07.2: enabled 0

  724 12:55:57.116246     GENERIC: 0.0: enabled 1

  725 12:55:57.116331    PCI: 00:07.3: enabled 0

  726 12:55:57.119446     GENERIC: 1.0: enabled 1

  727 12:55:57.123088    PCI: 00:08.0: enabled 1

  728 12:55:57.126010    PCI: 00:09.0: enabled 0

  729 12:55:57.129231    PCI: 00:0a.0: enabled 0

  730 12:55:57.129324    PCI: 00:0d.0: enabled 1

  731 12:55:57.132804     USB0 port 0: enabled 1

  732 12:55:57.136348      USB3 port 0: enabled 1

  733 12:55:57.139229      USB3 port 1: enabled 1

  734 12:55:57.142686      USB3 port 2: enabled 0

  735 12:55:57.146306      USB3 port 3: enabled 0

  736 12:55:57.146387    PCI: 00:0d.1: enabled 0

  737 12:55:57.149599    PCI: 00:0d.2: enabled 0

  738 12:55:57.152767     GENERIC: 0.0: enabled 1

  739 12:55:57.156254    PCI: 00:0d.3: enabled 0

  740 12:55:57.159125    PCI: 00:0e.0: enabled 0

  741 12:55:57.159233    PCI: 00:10.2: enabled 1

  742 12:55:57.162376    PCI: 00:10.6: enabled 0

  743 12:55:57.165785    PCI: 00:10.7: enabled 0

  744 12:55:57.169345    PCI: 00:12.0: enabled 0

  745 12:55:57.169430    PCI: 00:12.6: enabled 0

  746 12:55:57.172630    PCI: 00:13.0: enabled 0

  747 12:55:57.175941    PCI: 00:14.0: enabled 1

  748 12:55:57.179246     USB0 port 0: enabled 1

  749 12:55:57.182595      USB2 port 0: enabled 0

  750 12:55:57.185854      USB2 port 1: enabled 1

  751 12:55:57.185940      USB2 port 2: enabled 1

  752 12:55:57.189051      USB2 port 3: enabled 0

  753 12:55:57.192702      USB2 port 4: enabled 1

  754 12:55:57.195872      USB2 port 5: enabled 0

  755 12:55:57.199118      USB2 port 6: enabled 0

  756 12:55:57.199231      USB2 port 7: enabled 0

  757 12:55:57.202515      USB2 port 8: enabled 0

  758 12:55:57.205804      USB2 port 9: enabled 0

  759 12:55:57.209084      USB3 port 0: enabled 0

  760 12:55:57.212493      USB3 port 1: enabled 1

  761 12:55:57.215609      USB3 port 2: enabled 0

  762 12:55:57.215695      USB3 port 3: enabled 0

  763 12:55:57.219394    PCI: 00:14.1: enabled 0

  764 12:55:57.222623    PCI: 00:14.2: enabled 1

  765 12:55:57.225737    PCI: 00:14.3: enabled 1

  766 12:55:57.229185     GENERIC: 0.0: enabled 1

  767 12:55:57.229303    PCI: 00:15.0: enabled 1

  768 12:55:57.232396     I2C: 00:1a: enabled 1

  769 12:55:57.235559     I2C: 00:31: enabled 1

  770 12:55:57.239162     I2C: 00:32: enabled 1

  771 12:55:57.239244    PCI: 00:15.1: enabled 1

  772 12:55:57.242326     I2C: 00:10: enabled 1

  773 12:55:57.245972    PCI: 00:15.2: enabled 1

  774 12:55:57.248812    PCI: 00:15.3: enabled 1

  775 12:55:57.252418    PCI: 00:16.0: enabled 1

  776 12:55:57.252498    PCI: 00:16.1: enabled 0

  777 12:55:57.255848    PCI: 00:16.2: enabled 0

  778 12:55:57.259030    PCI: 00:16.3: enabled 0

  779 12:55:57.262378    PCI: 00:16.4: enabled 0

  780 12:55:57.266346    PCI: 00:16.5: enabled 0

  781 12:55:57.266441    PCI: 00:17.0: enabled 1

  782 12:55:57.269834    PCI: 00:19.0: enabled 0

  783 12:55:57.273733    PCI: 00:19.1: enabled 1

  784 12:55:57.273852     I2C: 00:15: enabled 1

  785 12:55:57.276496    PCI: 00:19.2: enabled 0

  786 12:55:57.279855    PCI: 00:1d.0: enabled 1

  787 12:55:57.283275     GENERIC: 0.0: enabled 1

  788 12:55:57.286502    PCI: 00:1e.0: enabled 1

  789 12:55:57.286627    PCI: 00:1e.1: enabled 0

  790 12:55:57.289852    PCI: 00:1e.2: enabled 1

  791 12:55:57.293351     SPI: 00: enabled 1

  792 12:55:57.296589    PCI: 00:1e.3: enabled 1

  793 12:55:57.296675     SPI: 00: enabled 1

  794 12:55:57.299905    PCI: 00:1f.0: enabled 1

  795 12:55:57.351323     PNP: 0c09.0: enabled 1

  796 12:55:57.351446    PCI: 00:1f.1: enabled 0

  797 12:55:57.351516    PCI: 00:1f.2: enabled 1

  798 12:55:57.351607     GENERIC: 0.0: enabled 1

  799 12:55:57.351686      GENERIC: 0.0: enabled 1

  800 12:55:57.351943      GENERIC: 1.0: enabled 1

  801 12:55:57.352006    PCI: 00:1f.3: enabled 1

  802 12:55:57.352065    PCI: 00:1f.4: enabled 0

  803 12:55:57.352170    PCI: 00:1f.5: enabled 1

  804 12:55:57.352240    PCI: 00:1f.6: enabled 0

  805 12:55:57.352294    PCI: 00:1f.7: enabled 0

  806 12:55:57.352348   CPU_CLUSTER: 0: enabled 1

  807 12:55:57.352402    APIC: 00: enabled 1

  808 12:55:57.352491    APIC: 01: enabled 1

  809 12:55:57.352545    APIC: 07: enabled 1

  810 12:55:57.352598    APIC: 02: enabled 1

  811 12:55:57.352652    APIC: 04: enabled 1

  812 12:55:57.352723    APIC: 06: enabled 1

  813 12:55:57.352792    APIC: 03: enabled 1

  814 12:55:57.352845    APIC: 05: enabled 1

  815 12:55:57.359929  Root Device scanning...

  816 12:55:57.360031  scan_static_bus for Root Device

  817 12:55:57.363386  DOMAIN: 0000 enabled

  818 12:55:57.363474  CPU_CLUSTER: 0 enabled

  819 12:55:57.366788  DOMAIN: 0000 scanning...

  820 12:55:57.370116  PCI: pci_scan_bus for bus 00

  821 12:55:57.370201  PCI: 00:00.0 [8086/0000] ops

  822 12:55:57.372954  PCI: 00:00.0 [8086/9a12] enabled

  823 12:55:57.376348  PCI: 00:02.0 [8086/0000] bus ops

  824 12:55:57.379658  PCI: 00:02.0 [8086/9a40] enabled

  825 12:55:57.383201  PCI: 00:04.0 [8086/0000] bus ops

  826 12:55:57.386568  PCI: 00:04.0 [8086/9a03] enabled

  827 12:55:57.390020  PCI: 00:05.0 [8086/9a19] enabled

  828 12:55:57.393489  PCI: 00:07.0 [0000/0000] hidden

  829 12:55:57.396187  PCI: 00:08.0 [8086/9a11] enabled

  830 12:55:57.399589  PCI: 00:0a.0 [8086/9a0d] disabled

  831 12:55:57.402960  PCI: 00:0d.0 [8086/0000] bus ops

  832 12:55:57.406140  PCI: 00:0d.0 [8086/9a13] enabled

  833 12:55:57.409913  PCI: 00:14.0 [8086/0000] bus ops

  834 12:55:57.413211  PCI: 00:14.0 [8086/a0ed] enabled

  835 12:55:57.416473  PCI: 00:14.2 [8086/a0ef] enabled

  836 12:55:57.419843  PCI: 00:14.3 [8086/0000] bus ops

  837 12:55:57.423205  PCI: 00:14.3 [8086/a0f0] enabled

  838 12:55:57.426580  PCI: 00:15.0 [8086/0000] bus ops

  839 12:55:57.430091  PCI: 00:15.0 [8086/a0e8] enabled

  840 12:55:57.432888  PCI: 00:15.1 [8086/0000] bus ops

  841 12:55:57.436639  PCI: 00:15.1 [8086/a0e9] enabled

  842 12:55:57.439704  PCI: 00:15.2 [8086/0000] bus ops

  843 12:55:57.443341  PCI: 00:15.2 [8086/a0ea] enabled

  844 12:55:57.446249  PCI: 00:15.3 [8086/0000] bus ops

  845 12:55:57.449412  PCI: 00:15.3 [8086/a0eb] enabled

  846 12:55:57.453001  PCI: 00:16.0 [8086/0000] ops

  847 12:55:57.456108  PCI: 00:16.0 [8086/a0e0] enabled

  848 12:55:57.462889  PCI: Static device PCI: 00:17.0 not found, disabling it.

  849 12:55:57.466143  PCI: 00:19.0 [8086/0000] bus ops

  850 12:55:57.469347  PCI: 00:19.0 [8086/a0c5] disabled

  851 12:55:57.472820  PCI: 00:19.1 [8086/0000] bus ops

  852 12:55:57.476186  PCI: 00:19.1 [8086/a0c6] enabled

  853 12:55:57.479504  PCI: 00:1d.0 [8086/0000] bus ops

  854 12:55:57.482951  PCI: 00:1d.0 [8086/a0b0] enabled

  855 12:55:57.486063  PCI: 00:1e.0 [8086/0000] ops

  856 12:55:57.489203  PCI: 00:1e.0 [8086/a0a8] enabled

  857 12:55:57.492498  PCI: 00:1e.2 [8086/0000] bus ops

  858 12:55:57.495836  PCI: 00:1e.2 [8086/a0aa] enabled

  859 12:55:57.499150  PCI: 00:1e.3 [8086/0000] bus ops

  860 12:55:57.502625  PCI: 00:1e.3 [8086/a0ab] enabled

  861 12:55:57.505856  PCI: 00:1f.0 [8086/0000] bus ops

  862 12:55:57.509137  PCI: 00:1f.0 [8086/a087] enabled

  863 12:55:57.509256  RTC Init

  864 12:55:57.516175  Set power on after power failure.

  865 12:55:57.516264  Disabling Deep S3

  866 12:55:57.519328  Disabling Deep S3

  867 12:55:57.519440  Disabling Deep S4

  868 12:55:57.522613  Disabling Deep S4

  869 12:55:57.522697  Disabling Deep S5

  870 12:55:57.525897  Disabling Deep S5

  871 12:55:57.529028  PCI: 00:1f.2 [0000/0000] hidden

  872 12:55:57.532521  PCI: 00:1f.3 [8086/0000] bus ops

  873 12:55:57.535628  PCI: 00:1f.3 [8086/a0c8] enabled

  874 12:55:57.539080  PCI: 00:1f.5 [8086/0000] bus ops

  875 12:55:57.542569  PCI: 00:1f.5 [8086/a0a4] enabled

  876 12:55:57.546100  PCI: Leftover static devices:

  877 12:55:57.546188  PCI: 00:10.2

  878 12:55:57.549203  PCI: 00:10.6

  879 12:55:57.549280  PCI: 00:10.7

  880 12:55:57.549345  PCI: 00:06.0

  881 12:55:57.552411  PCI: 00:07.1

  882 12:55:57.552487  PCI: 00:07.2

  883 12:55:57.555570  PCI: 00:07.3

  884 12:55:57.555663  PCI: 00:09.0

  885 12:55:57.559174  PCI: 00:0d.1

  886 12:55:57.559255  PCI: 00:0d.2

  887 12:55:57.559325  PCI: 00:0d.3

  888 12:55:57.562496  PCI: 00:0e.0

  889 12:55:57.562580  PCI: 00:12.0

  890 12:55:57.565638  PCI: 00:12.6

  891 12:55:57.565716  PCI: 00:13.0

  892 12:55:57.565780  PCI: 00:14.1

  893 12:55:57.569232  PCI: 00:16.1

  894 12:55:57.569322  PCI: 00:16.2

  895 12:55:57.572273  PCI: 00:16.3

  896 12:55:57.572365  PCI: 00:16.4

  897 12:55:57.572433  PCI: 00:16.5

  898 12:55:57.576167  PCI: 00:17.0

  899 12:55:57.576249  PCI: 00:19.2

  900 12:55:57.578972  PCI: 00:1e.1

  901 12:55:57.579088  PCI: 00:1f.1

  902 12:55:57.582256  PCI: 00:1f.4

  903 12:55:57.582337  PCI: 00:1f.6

  904 12:55:57.582403  PCI: 00:1f.7

  905 12:55:57.585614  PCI: Check your devicetree.cb.

  906 12:55:57.588963  PCI: 00:02.0 scanning...

  907 12:55:57.592305  scan_generic_bus for PCI: 00:02.0

  908 12:55:57.595972  scan_generic_bus for PCI: 00:02.0 done

  909 12:55:57.602363  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

  910 12:55:57.605717  PCI: 00:04.0 scanning...

  911 12:55:57.608700  scan_generic_bus for PCI: 00:04.0

  912 12:55:57.608780  GENERIC: 0.0 enabled

  913 12:55:57.615755  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

  914 12:55:57.622277  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

  915 12:55:57.622395  PCI: 00:0d.0 scanning...

  916 12:55:57.625495  scan_static_bus for PCI: 00:0d.0

  917 12:55:57.628835  USB0 port 0 enabled

  918 12:55:57.632171  USB0 port 0 scanning...

  919 12:55:57.635489  scan_static_bus for USB0 port 0

  920 12:55:57.635604  USB3 port 0 enabled

  921 12:55:57.638993  USB3 port 1 enabled

  922 12:55:57.642124  USB3 port 2 disabled

  923 12:55:57.642206  USB3 port 3 disabled

  924 12:55:57.645516  USB3 port 0 scanning...

  925 12:55:57.648898  scan_static_bus for USB3 port 0

  926 12:55:57.652143  scan_static_bus for USB3 port 0 done

  927 12:55:57.658483  scan_bus: bus USB3 port 0 finished in 6 msecs

  928 12:55:57.658566  USB3 port 1 scanning...

  929 12:55:57.661671  scan_static_bus for USB3 port 1

  930 12:55:57.668524  scan_static_bus for USB3 port 1 done

  931 12:55:57.671562  scan_bus: bus USB3 port 1 finished in 6 msecs

  932 12:55:57.675215  scan_static_bus for USB0 port 0 done

  933 12:55:57.681541  scan_bus: bus USB0 port 0 finished in 43 msecs

  934 12:55:57.684901  scan_static_bus for PCI: 00:0d.0 done

  935 12:55:57.688304  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs

  936 12:55:57.691878  PCI: 00:14.0 scanning...

  937 12:55:57.695074  scan_static_bus for PCI: 00:14.0

  938 12:55:57.697937  USB0 port 0 enabled

  939 12:55:57.698054  USB0 port 0 scanning...

  940 12:55:57.701624  scan_static_bus for USB0 port 0

  941 12:55:57.704775  USB2 port 0 disabled

  942 12:55:57.708121  USB2 port 1 enabled

  943 12:55:57.708233  USB2 port 2 enabled

  944 12:55:57.711512  USB2 port 3 disabled

  945 12:55:57.714725  USB2 port 4 enabled

  946 12:55:57.714857  USB2 port 5 disabled

  947 12:55:57.718032  USB2 port 6 disabled

  948 12:55:57.718153  USB2 port 7 disabled

  949 12:55:57.721304  USB2 port 8 disabled

  950 12:55:57.724681  USB2 port 9 disabled

  951 12:55:57.724793  USB3 port 0 disabled

  952 12:55:57.728046  USB3 port 1 enabled

  953 12:55:57.731277  USB3 port 2 disabled

  954 12:55:57.731370  USB3 port 3 disabled

  955 12:55:57.734520  USB2 port 1 scanning...

  956 12:55:57.737750  scan_static_bus for USB2 port 1

  957 12:55:57.741154  scan_static_bus for USB2 port 1 done

  958 12:55:57.747939  scan_bus: bus USB2 port 1 finished in 6 msecs

  959 12:55:57.748026  USB2 port 2 scanning...

  960 12:55:57.751189  scan_static_bus for USB2 port 2

  961 12:55:57.757833  scan_static_bus for USB2 port 2 done

  962 12:55:57.761223  scan_bus: bus USB2 port 2 finished in 6 msecs

  963 12:55:57.764594  USB2 port 4 scanning...

  964 12:55:57.767804  scan_static_bus for USB2 port 4

  965 12:55:57.771556  scan_static_bus for USB2 port 4 done

  966 12:55:57.774681  scan_bus: bus USB2 port 4 finished in 6 msecs

  967 12:55:57.777812  USB3 port 1 scanning...

  968 12:55:57.781321  scan_static_bus for USB3 port 1

  969 12:55:57.784308  scan_static_bus for USB3 port 1 done

  970 12:55:57.787797  scan_bus: bus USB3 port 1 finished in 6 msecs

  971 12:55:57.794245  scan_static_bus for USB0 port 0 done

  972 12:55:57.797742  scan_bus: bus USB0 port 0 finished in 93 msecs

  973 12:55:57.801008  scan_static_bus for PCI: 00:14.0 done

  974 12:55:57.807734  scan_bus: bus PCI: 00:14.0 finished in 110 msecs

  975 12:55:57.807847  PCI: 00:14.3 scanning...

  976 12:55:57.810942  scan_static_bus for PCI: 00:14.3

  977 12:55:57.814245  GENERIC: 0.0 enabled

  978 12:55:57.817494  scan_static_bus for PCI: 00:14.3 done

  979 12:55:57.824023  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

  980 12:55:57.824136  PCI: 00:15.0 scanning...

  981 12:55:57.827385  scan_static_bus for PCI: 00:15.0

  982 12:55:57.831198  I2C: 00:1a enabled

  983 12:55:57.834509  I2C: 00:31 enabled

  984 12:55:57.834610  I2C: 00:32 enabled

  985 12:55:57.837750  scan_static_bus for PCI: 00:15.0 done

  986 12:55:57.844430  scan_bus: bus PCI: 00:15.0 finished in 12 msecs

  987 12:55:57.847695  PCI: 00:15.1 scanning...

  988 12:55:57.851092  scan_static_bus for PCI: 00:15.1

  989 12:55:57.851180  I2C: 00:10 enabled

  990 12:55:57.854670  scan_static_bus for PCI: 00:15.1 done

  991 12:55:57.861114  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

  992 12:55:57.864476  PCI: 00:15.2 scanning...

  993 12:55:57.867910  scan_static_bus for PCI: 00:15.2

  994 12:55:57.870981  scan_static_bus for PCI: 00:15.2 done

  995 12:55:57.874444  scan_bus: bus PCI: 00:15.2 finished in 7 msecs

  996 12:55:57.877733  PCI: 00:15.3 scanning...

  997 12:55:57.880747  scan_static_bus for PCI: 00:15.3

  998 12:55:57.884011  scan_static_bus for PCI: 00:15.3 done

  999 12:55:57.890751  scan_bus: bus PCI: 00:15.3 finished in 7 msecs

 1000 12:55:57.890839  PCI: 00:19.1 scanning...

 1001 12:55:57.894056  scan_static_bus for PCI: 00:19.1

 1002 12:55:57.897239  I2C: 00:15 enabled

 1003 12:55:57.900545  scan_static_bus for PCI: 00:19.1 done

 1004 12:55:57.907048  scan_bus: bus PCI: 00:19.1 finished in 9 msecs

 1005 12:55:57.907137  PCI: 00:1d.0 scanning...

 1006 12:55:57.913808  do_pci_scan_bridge for PCI: 00:1d.0

 1007 12:55:57.913936  PCI: pci_scan_bus for bus 01

 1008 12:55:57.916961  PCI: 01:00.0 [1c5c/174a] enabled

 1009 12:55:57.920884  GENERIC: 0.0 enabled

 1010 12:55:57.923549  Enabling Common Clock Configuration

 1011 12:55:57.930259  L1 Sub-State supported from root port 29

 1012 12:55:57.930367  L1 Sub-State Support = 0xf

 1013 12:55:57.933565  CommonModeRestoreTime = 0x28

 1014 12:55:57.940351  Power On Value = 0x16, Power On Scale = 0x0

 1015 12:55:57.940437  ASPM: Enabled L1

 1016 12:55:57.943570  PCIe: Max_Payload_Size adjusted to 128

 1017 12:55:57.950062  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs

 1018 12:55:57.953467  PCI: 00:1e.2 scanning...

 1019 12:55:57.956543  scan_generic_bus for PCI: 00:1e.2

 1020 12:55:57.956629  SPI: 00 enabled

 1021 12:55:57.963394  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done

 1022 12:55:57.966508  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs

 1023 12:55:57.969706  PCI: 00:1e.3 scanning...

 1024 12:55:57.973019  scan_generic_bus for PCI: 00:1e.3

 1025 12:55:57.976481  SPI: 00 enabled

 1026 12:55:57.983186  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1027 12:55:57.986353  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1028 12:55:57.989555  PCI: 00:1f.0 scanning...

 1029 12:55:57.993328  scan_static_bus for PCI: 00:1f.0

 1030 12:55:57.996479  PNP: 0c09.0 enabled

 1031 12:55:57.996558  PNP: 0c09.0 scanning...

 1032 12:55:57.999451  scan_static_bus for PNP: 0c09.0

 1033 12:55:58.002835  scan_static_bus for PNP: 0c09.0 done

 1034 12:55:58.009927  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1035 12:55:58.013363  scan_static_bus for PCI: 00:1f.0 done

 1036 12:55:58.016238  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1037 12:55:58.019357  PCI: 00:1f.2 scanning...

 1038 12:55:58.023244  scan_static_bus for PCI: 00:1f.2

 1039 12:55:58.026542  GENERIC: 0.0 enabled

 1040 12:55:58.029823  GENERIC: 0.0 scanning...

 1041 12:55:58.032880  scan_static_bus for GENERIC: 0.0

 1042 12:55:58.032970  GENERIC: 0.0 enabled

 1043 12:55:58.036307  GENERIC: 1.0 enabled

 1044 12:55:58.039755  scan_static_bus for GENERIC: 0.0 done

 1045 12:55:58.046059  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1046 12:55:58.049871  scan_static_bus for PCI: 00:1f.2 done

 1047 12:55:58.052990  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1048 12:55:58.056230  PCI: 00:1f.3 scanning...

 1049 12:55:58.059209  scan_static_bus for PCI: 00:1f.3

 1050 12:55:58.062544  scan_static_bus for PCI: 00:1f.3 done

 1051 12:55:58.069327  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1052 12:55:58.069460  PCI: 00:1f.5 scanning...

 1053 12:55:58.076098  scan_generic_bus for PCI: 00:1f.5

 1054 12:55:58.079511  scan_generic_bus for PCI: 00:1f.5 done

 1055 12:55:58.082849  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1056 12:55:58.089028  scan_bus: bus DOMAIN: 0000 finished in 717 msecs

 1057 12:55:58.092489  scan_static_bus for Root Device done

 1058 12:55:58.096210  scan_bus: bus Root Device finished in 737 msecs

 1059 12:55:58.096326  done

 1060 12:55:58.102513  BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms

 1061 12:55:58.106187  Chrome EC: UHEPI supported

 1062 12:55:58.112825  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)

 1063 12:55:58.119463  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1064 12:55:58.122792  SPI flash protection: WPSW=0 SRP0=0

 1065 12:55:58.129321  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1066 12:55:58.132674  BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms

 1067 12:55:58.135988  found VGA at PCI: 00:02.0

 1068 12:55:58.139286  Setting up VGA for PCI: 00:02.0

 1069 12:55:58.146080  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1070 12:55:58.149628  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1071 12:55:58.152385  Allocating resources...

 1072 12:55:58.155619  Reading resources...

 1073 12:55:58.159317  Root Device read_resources bus 0 link: 0

 1074 12:55:58.162489  DOMAIN: 0000 read_resources bus 0 link: 0

 1075 12:55:58.169198  PCI: 00:04.0 read_resources bus 1 link: 0

 1076 12:55:58.172344  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1077 12:55:58.178884  PCI: 00:0d.0 read_resources bus 0 link: 0

 1078 12:55:58.182246  USB0 port 0 read_resources bus 0 link: 0

 1079 12:55:58.189155  USB0 port 0 read_resources bus 0 link: 0 done

 1080 12:55:58.192501  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1081 12:55:58.195744  PCI: 00:14.0 read_resources bus 0 link: 0

 1082 12:55:58.202199  USB0 port 0 read_resources bus 0 link: 0

 1083 12:55:58.206414  USB0 port 0 read_resources bus 0 link: 0 done

 1084 12:55:58.212751  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1085 12:55:58.215865  PCI: 00:14.3 read_resources bus 0 link: 0

 1086 12:55:58.222106  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1087 12:55:58.225493  PCI: 00:15.0 read_resources bus 0 link: 0

 1088 12:55:58.232673  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1089 12:55:58.235993  PCI: 00:15.1 read_resources bus 0 link: 0

 1090 12:55:58.242679  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1091 12:55:58.245921  PCI: 00:19.1 read_resources bus 0 link: 0

 1092 12:55:58.253409  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1093 12:55:58.256250  PCI: 00:1d.0 read_resources bus 1 link: 0

 1094 12:55:58.262730  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1095 12:55:58.266329  PCI: 00:1e.2 read_resources bus 2 link: 0

 1096 12:55:58.273546  PCI: 00:1e.2 read_resources bus 2 link: 0 done

 1097 12:55:58.276157  PCI: 00:1e.3 read_resources bus 3 link: 0

 1098 12:55:58.282744  PCI: 00:1e.3 read_resources bus 3 link: 0 done

 1099 12:55:58.286040  PCI: 00:1f.0 read_resources bus 0 link: 0

 1100 12:55:58.292819  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1101 12:55:58.296137  PCI: 00:1f.2 read_resources bus 0 link: 0

 1102 12:55:58.299606  GENERIC: 0.0 read_resources bus 0 link: 0

 1103 12:55:58.306866  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1104 12:55:58.310121  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1105 12:55:58.316996  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1106 12:55:58.320803  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1107 12:55:58.327390  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1108 12:55:58.330320  Root Device read_resources bus 0 link: 0 done

 1109 12:55:58.333817  Done reading resources.

 1110 12:55:58.340394  Show resources in subtree (Root Device)...After reading.

 1111 12:55:58.343499   Root Device child on link 0 DOMAIN: 0000

 1112 12:55:58.347240    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1113 12:55:58.356805    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1114 12:55:58.367211    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1115 12:55:58.370603     PCI: 00:00.0

 1116 12:55:58.380494     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1117 12:55:58.386786     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1118 12:55:58.396980     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1119 12:55:58.406963     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1120 12:55:58.416634     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1121 12:55:58.426648     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1122 12:55:58.433367     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1123 12:55:58.443143     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1124 12:55:58.453130     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1125 12:55:58.463285     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1126 12:55:58.473269     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1127 12:55:58.483015     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1128 12:55:58.490096     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1129 12:55:58.499601     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1130 12:55:58.509899     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1131 12:55:58.519372     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1132 12:55:58.529403     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1133 12:55:58.539328     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1134 12:55:58.546093     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1135 12:55:58.555689     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1136 12:55:58.559232     PCI: 00:02.0

 1137 12:55:58.569361     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1138 12:55:58.579339     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1139 12:55:58.589251     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1140 12:55:58.592448     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1141 12:55:58.602317     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1142 12:55:58.605866      GENERIC: 0.0

 1143 12:55:58.605959     PCI: 00:05.0

 1144 12:55:58.615999     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1145 12:55:58.622131     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1146 12:55:58.622220      GENERIC: 0.0

 1147 12:55:58.625462     PCI: 00:08.0

 1148 12:55:58.635624     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1149 12:55:58.635715     PCI: 00:0a.0

 1150 12:55:58.638762     PCI: 00:0d.0 child on link 0 USB0 port 0

 1151 12:55:58.648838     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1152 12:55:58.655309      USB0 port 0 child on link 0 USB3 port 0

 1153 12:55:58.655423       USB3 port 0

 1154 12:55:58.658590       USB3 port 1

 1155 12:55:58.658701       USB3 port 2

 1156 12:55:58.662281       USB3 port 3

 1157 12:55:58.665726     PCI: 00:14.0 child on link 0 USB0 port 0

 1158 12:55:58.675528     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1159 12:55:58.682380      USB0 port 0 child on link 0 USB2 port 0

 1160 12:55:58.682468       USB2 port 0

 1161 12:55:58.685597       USB2 port 1

 1162 12:55:58.685683       USB2 port 2

 1163 12:55:58.688896       USB2 port 3

 1164 12:55:58.688982       USB2 port 4

 1165 12:55:58.692310       USB2 port 5

 1166 12:55:58.692394       USB2 port 6

 1167 12:55:58.695678       USB2 port 7

 1168 12:55:58.695763       USB2 port 8

 1169 12:55:58.698972       USB2 port 9

 1170 12:55:58.699057       USB3 port 0

 1171 12:55:58.702091       USB3 port 1

 1172 12:55:58.702176       USB3 port 2

 1173 12:55:58.705347       USB3 port 3

 1174 12:55:58.705437     PCI: 00:14.2

 1175 12:55:58.715485     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1176 12:55:58.725207     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1177 12:55:58.732114     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1178 12:55:58.741642     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1179 12:55:58.741736      GENERIC: 0.0

 1180 12:55:58.748212     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1181 12:55:58.758556     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1182 12:55:58.758645      I2C: 00:1a

 1183 12:55:58.761686      I2C: 00:31

 1184 12:55:58.761763      I2C: 00:32

 1185 12:55:58.765078     PCI: 00:15.1 child on link 0 I2C: 00:10

 1186 12:55:58.775111     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1187 12:55:58.778461      I2C: 00:10

 1188 12:55:58.778551     PCI: 00:15.2

 1189 12:55:58.788103     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1190 12:55:58.791383     PCI: 00:15.3

 1191 12:55:58.801607     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1192 12:55:58.801697     PCI: 00:16.0

 1193 12:55:58.811190     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1194 12:55:58.814510     PCI: 00:19.0

 1195 12:55:58.818391     PCI: 00:19.1 child on link 0 I2C: 00:15

 1196 12:55:58.828220     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1197 12:55:58.831454      I2C: 00:15

 1198 12:55:58.834746     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1199 12:55:58.844963     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1200 12:55:58.854460     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1201 12:55:58.861045     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1202 12:55:58.864674      GENERIC: 0.0

 1203 12:55:58.864760      PCI: 01:00.0

 1204 12:55:58.874434      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1205 12:55:58.884808      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18

 1206 12:55:58.894289      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c

 1207 12:55:58.894385     PCI: 00:1e.0

 1208 12:55:58.907916     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1209 12:55:58.911008     PCI: 00:1e.2 child on link 0 SPI: 00

 1210 12:55:58.920845     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1211 12:55:58.920946      SPI: 00

 1212 12:55:58.927648     PCI: 00:1e.3 child on link 0 SPI: 00

 1213 12:55:58.937665     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1214 12:55:58.937799      SPI: 00

 1215 12:55:58.940764     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1216 12:55:58.950810     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1217 12:55:58.950901      PNP: 0c09.0

 1218 12:55:58.960717      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1219 12:55:58.964074     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1220 12:55:58.974119     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1221 12:55:58.983986     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1222 12:55:58.987298      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1223 12:55:58.990486       GENERIC: 0.0

 1224 12:55:58.993835       GENERIC: 1.0

 1225 12:55:58.993944     PCI: 00:1f.3

 1226 12:55:59.003729     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1227 12:55:59.013831     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1228 12:55:59.016986     PCI: 00:1f.5

 1229 12:55:59.023705     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1230 12:55:59.030296    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1231 12:55:59.030409     APIC: 00

 1232 12:55:59.030506     APIC: 01

 1233 12:55:59.033656     APIC: 07

 1234 12:55:59.033758     APIC: 02

 1235 12:55:59.036979     APIC: 04

 1236 12:55:59.037080     APIC: 06

 1237 12:55:59.037171     APIC: 03

 1238 12:55:59.040046     APIC: 05

 1239 12:55:59.046726  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1240 12:55:59.053428   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1241 12:55:59.059966   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1242 12:55:59.066739   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1243 12:55:59.069989    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1244 12:55:59.073334    PCI: 01:00.0 18 *  [0x4000 - 0x4fff] mem

 1245 12:55:59.076695    PCI: 01:00.0 1c *  [0x5000 - 0x5fff] mem

 1246 12:55:59.083201   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1247 12:55:59.093310   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1248 12:55:59.099870   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1249 12:55:59.106622  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1250 12:55:59.113314  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1251 12:55:59.119961   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1252 12:55:59.129912   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1253 12:55:59.136543   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1254 12:55:59.139874   DOMAIN: 0000: Resource ranges:

 1255 12:55:59.143416   * Base: 1000, Size: 800, Tag: 100

 1256 12:55:59.146187   * Base: 1900, Size: e700, Tag: 100

 1257 12:55:59.153250    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1258 12:55:59.159794  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1259 12:55:59.166572  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1260 12:55:59.172901   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)

 1261 12:55:59.179481   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)

 1262 12:55:59.189767   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)

 1263 12:55:59.196321   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)

 1264 12:55:59.202840   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)

 1265 12:55:59.212833   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)

 1266 12:55:59.219114   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)

 1267 12:55:59.226157   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)

 1268 12:55:59.235907   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)

 1269 12:55:59.242391   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)

 1270 12:55:59.249108   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)

 1271 12:55:59.259076   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)

 1272 12:55:59.265539   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)

 1273 12:55:59.272130   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)

 1274 12:55:59.282203   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)

 1275 12:55:59.289060   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)

 1276 12:55:59.295702   update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)

 1277 12:55:59.305562   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)

 1278 12:55:59.311813   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)

 1279 12:55:59.318599   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)

 1280 12:55:59.328699   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1281 12:55:59.335317   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1282 12:55:59.338645   DOMAIN: 0000: Resource ranges:

 1283 12:55:59.342167   * Base: 7fc00000, Size: 40400000, Tag: 200

 1284 12:55:59.348547   * Base: d0000000, Size: 28000000, Tag: 200

 1285 12:55:59.351889   * Base: fa000000, Size: 1000000, Tag: 200

 1286 12:55:59.355339   * Base: fb001000, Size: 2fff000, Tag: 200

 1287 12:55:59.358774   * Base: fe010000, Size: 2e000, Tag: 200

 1288 12:55:59.365403   * Base: fe03f000, Size: d41000, Tag: 200

 1289 12:55:59.368510   * Base: fed88000, Size: 8000, Tag: 200

 1290 12:55:59.371732   * Base: fed93000, Size: d000, Tag: 200

 1291 12:55:59.375121   * Base: feda2000, Size: 1e000, Tag: 200

 1292 12:55:59.381790   * Base: fede0000, Size: 1220000, Tag: 200

 1293 12:55:59.385097   * Base: 280400000, Size: 7d7fc00000, Tag: 100200

 1294 12:55:59.391885    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem

 1295 12:55:59.398433    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem

 1296 12:55:59.404925    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem

 1297 12:55:59.411447    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem

 1298 12:55:59.418517    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem

 1299 12:55:59.425125    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem

 1300 12:55:59.431244    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem

 1301 12:55:59.438367    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem

 1302 12:55:59.444598    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem

 1303 12:55:59.451216    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem

 1304 12:55:59.458355    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem

 1305 12:55:59.464438    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem

 1306 12:55:59.471055    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem

 1307 12:55:59.478138    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem

 1308 12:55:59.484438    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem

 1309 12:55:59.491173    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem

 1310 12:55:59.497746    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem

 1311 12:55:59.504760    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem

 1312 12:55:59.511227    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem

 1313 12:55:59.517536    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem

 1314 12:55:59.524425    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem

 1315 12:55:59.530793    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem

 1316 12:55:59.537448  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1317 12:55:59.547789  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff

 1318 12:55:59.550624   PCI: 00:1d.0: Resource ranges:

 1319 12:55:59.554049   * Base: 7fc00000, Size: 100000, Tag: 200

 1320 12:55:59.561087    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem

 1321 12:55:59.567264    PCI: 01:00.0 18 *  [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem

 1322 12:55:59.574104    PCI: 01:00.0 1c *  [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem

 1323 12:55:59.583976  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done

 1324 12:55:59.590517  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1325 12:55:59.593819  Root Device assign_resources, bus 0 link: 0

 1326 12:55:59.600854  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1327 12:55:59.607387  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64

 1328 12:55:59.617177  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64

 1329 12:55:59.624162  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1330 12:55:59.630233  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64

 1331 12:55:59.636938  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1332 12:55:59.640379  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1333 12:55:59.649911  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64

 1334 12:55:59.656903  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64

 1335 12:55:59.666615  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64

 1336 12:55:59.669835  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1337 12:55:59.676813  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1338 12:55:59.683250  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64

 1339 12:55:59.686808  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1340 12:55:59.693338  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1341 12:55:59.699627  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64

 1342 12:55:59.709470  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64

 1343 12:55:59.716597  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64

 1344 12:55:59.723135  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1345 12:55:59.725957  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1346 12:55:59.736048  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64

 1347 12:55:59.739166  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1348 12:55:59.742987  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1349 12:55:59.752673  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64

 1350 12:55:59.755878  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1351 12:55:59.762722  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1352 12:55:59.768904  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64

 1353 12:55:59.778962  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64

 1354 12:55:59.785551  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64

 1355 12:55:59.795497  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64

 1356 12:55:59.798571  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1357 12:55:59.801907  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1358 12:55:59.811754  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1359 12:55:59.821842  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1360 12:55:59.831965  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem

 1361 12:55:59.835331  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1362 12:55:59.841536  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64

 1363 12:55:59.851541  PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem

 1364 12:55:59.858423  PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem

 1365 12:55:59.864914  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1366 12:55:59.871697  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64

 1367 12:55:59.877796  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1368 12:55:59.881289  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1369 12:55:59.888017  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64

 1370 12:55:59.894970  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1371 12:55:59.898116  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1372 12:55:59.904825  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1373 12:55:59.908089  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1374 12:55:59.914601  LPC: Trying to open IO window from 800 size 1ff

 1375 12:55:59.920942  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64

 1376 12:55:59.930816  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64

 1377 12:55:59.937847  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem

 1378 12:55:59.941321  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1379 12:55:59.947891  Root Device assign_resources, bus 0 link: 0

 1380 12:55:59.951049  Done setting resources.

 1381 12:55:59.958002  Show resources in subtree (Root Device)...After assigning values.

 1382 12:55:59.961181   Root Device child on link 0 DOMAIN: 0000

 1383 12:55:59.964620    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1384 12:55:59.974520    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1385 12:55:59.984528    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1386 12:55:59.984667     PCI: 00:00.0

 1387 12:55:59.994498     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1388 12:56:00.004531     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1389 12:56:00.014150     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1390 12:56:00.024283     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1391 12:56:00.033994     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1392 12:56:00.040970     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1393 12:56:00.050986     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1394 12:56:00.060556     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1395 12:56:00.070430     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1396 12:56:00.080663     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1397 12:56:00.090754     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1398 12:56:00.096989     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1399 12:56:00.106789     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1400 12:56:00.116848     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1401 12:56:00.126835     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1402 12:56:00.136669     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1403 12:56:00.146706     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1404 12:56:00.153484     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1405 12:56:00.163294     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1406 12:56:00.173300     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1407 12:56:00.176646     PCI: 00:02.0

 1408 12:56:00.186972     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10

 1409 12:56:00.196745     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18

 1410 12:56:00.206414     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1411 12:56:00.209780     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1412 12:56:00.219489     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10

 1413 12:56:00.223054      GENERIC: 0.0

 1414 12:56:00.223172     PCI: 00:05.0

 1415 12:56:00.236078     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10

 1416 12:56:00.239870     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1417 12:56:00.243005      GENERIC: 0.0

 1418 12:56:00.243085     PCI: 00:08.0

 1419 12:56:00.252652     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10

 1420 12:56:00.255934     PCI: 00:0a.0

 1421 12:56:00.259322     PCI: 00:0d.0 child on link 0 USB0 port 0

 1422 12:56:00.269730     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10

 1423 12:56:00.272949      USB0 port 0 child on link 0 USB3 port 0

 1424 12:56:00.276199       USB3 port 0

 1425 12:56:00.279245       USB3 port 1

 1426 12:56:00.279350       USB3 port 2

 1427 12:56:00.282879       USB3 port 3

 1428 12:56:00.286135     PCI: 00:14.0 child on link 0 USB0 port 0

 1429 12:56:00.296336     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10

 1430 12:56:00.299196      USB0 port 0 child on link 0 USB2 port 0

 1431 12:56:00.302975       USB2 port 0

 1432 12:56:00.303076       USB2 port 1

 1433 12:56:00.305988       USB2 port 2

 1434 12:56:00.309325       USB2 port 3

 1435 12:56:00.309402       USB2 port 4

 1436 12:56:00.312840       USB2 port 5

 1437 12:56:00.312918       USB2 port 6

 1438 12:56:00.316151       USB2 port 7

 1439 12:56:00.316237       USB2 port 8

 1440 12:56:00.319328       USB2 port 9

 1441 12:56:00.319415       USB3 port 0

 1442 12:56:00.322488       USB3 port 1

 1443 12:56:00.322575       USB3 port 2

 1444 12:56:00.325836       USB3 port 3

 1445 12:56:00.325923     PCI: 00:14.2

 1446 12:56:00.335589     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10

 1447 12:56:00.349069     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18

 1448 12:56:00.352553     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1449 12:56:00.362269     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10

 1450 12:56:00.365962      GENERIC: 0.0

 1451 12:56:00.368867     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1452 12:56:00.378987     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10

 1453 12:56:00.379084      I2C: 00:1a

 1454 12:56:00.382279      I2C: 00:31

 1455 12:56:00.382359      I2C: 00:32

 1456 12:56:00.389094     PCI: 00:15.1 child on link 0 I2C: 00:10

 1457 12:56:00.399053     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10

 1458 12:56:00.399208      I2C: 00:10

 1459 12:56:00.401976     PCI: 00:15.2

 1460 12:56:00.412099     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10

 1461 12:56:00.412225     PCI: 00:15.3

 1462 12:56:00.425598     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10

 1463 12:56:00.425716     PCI: 00:16.0

 1464 12:56:00.435328     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10

 1465 12:56:00.438661     PCI: 00:19.0

 1466 12:56:00.441934     PCI: 00:19.1 child on link 0 I2C: 00:15

 1467 12:56:00.451723     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10

 1468 12:56:00.455310      I2C: 00:15

 1469 12:56:00.458608     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1470 12:56:00.468604     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1471 12:56:00.478518     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1472 12:56:00.488547     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20

 1473 12:56:00.491708      GENERIC: 0.0

 1474 12:56:00.491800      PCI: 01:00.0

 1475 12:56:00.505382      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10

 1476 12:56:00.514852      PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18

 1477 12:56:00.525109      PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c

 1478 12:56:00.525253     PCI: 00:1e.0

 1479 12:56:00.538023     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1480 12:56:00.541363     PCI: 00:1e.2 child on link 0 SPI: 00

 1481 12:56:00.551660     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10

 1482 12:56:00.551764      SPI: 00

 1483 12:56:00.558114     PCI: 00:1e.3 child on link 0 SPI: 00

 1484 12:56:00.567948     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10

 1485 12:56:00.568086      SPI: 00

 1486 12:56:00.571358     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1487 12:56:00.581270     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1488 12:56:00.584557      PNP: 0c09.0

 1489 12:56:00.591319      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1490 12:56:00.597931     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1491 12:56:00.604773     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1492 12:56:00.614301     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1493 12:56:00.621035      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1494 12:56:00.621152       GENERIC: 0.0

 1495 12:56:00.624351       GENERIC: 1.0

 1496 12:56:00.624436     PCI: 00:1f.3

 1497 12:56:00.634479     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10

 1498 12:56:00.647720     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20

 1499 12:56:00.647866     PCI: 00:1f.5

 1500 12:56:00.657435     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10

 1501 12:56:00.661124    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1502 12:56:00.663973     APIC: 00

 1503 12:56:00.664065     APIC: 01

 1504 12:56:00.667728     APIC: 07

 1505 12:56:00.667810     APIC: 02

 1506 12:56:00.667874     APIC: 04

 1507 12:56:00.671108     APIC: 06

 1508 12:56:00.671189     APIC: 03

 1509 12:56:00.671250     APIC: 05

 1510 12:56:00.674324  Done allocating resources.

 1511 12:56:00.680897  BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms

 1512 12:56:00.687479  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

 1513 12:56:00.690727  Configure GPIOs for I2S audio on UP4.

 1514 12:56:00.697842  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms

 1515 12:56:00.700789  Enabling resources...

 1516 12:56:00.704612  PCI: 00:00.0 subsystem <- 8086/9a12

 1517 12:56:00.707743  PCI: 00:00.0 cmd <- 06

 1518 12:56:00.711013  PCI: 00:02.0 subsystem <- 8086/9a40

 1519 12:56:00.714333  PCI: 00:02.0 cmd <- 03

 1520 12:56:00.717807  PCI: 00:04.0 subsystem <- 8086/9a03

 1521 12:56:00.717892  PCI: 00:04.0 cmd <- 02

 1522 12:56:00.724441  PCI: 00:05.0 subsystem <- 8086/9a19

 1523 12:56:00.724547  PCI: 00:05.0 cmd <- 02

 1524 12:56:00.727842  PCI: 00:08.0 subsystem <- 8086/9a11

 1525 12:56:00.731193  PCI: 00:08.0 cmd <- 06

 1526 12:56:00.734458  PCI: 00:0d.0 subsystem <- 8086/9a13

 1527 12:56:00.737579  PCI: 00:0d.0 cmd <- 02

 1528 12:56:00.740805  PCI: 00:14.0 subsystem <- 8086/a0ed

 1529 12:56:00.744036  PCI: 00:14.0 cmd <- 02

 1530 12:56:00.747406  PCI: 00:14.2 subsystem <- 8086/a0ef

 1531 12:56:00.750540  PCI: 00:14.2 cmd <- 02

 1532 12:56:00.753896  PCI: 00:14.3 subsystem <- 8086/a0f0

 1533 12:56:00.757178  PCI: 00:14.3 cmd <- 02

 1534 12:56:00.760538  PCI: 00:15.0 subsystem <- 8086/a0e8

 1535 12:56:00.763773  PCI: 00:15.0 cmd <- 02

 1536 12:56:00.767149  PCI: 00:15.1 subsystem <- 8086/a0e9

 1537 12:56:00.767258  PCI: 00:15.1 cmd <- 02

 1538 12:56:00.774113  PCI: 00:15.2 subsystem <- 8086/a0ea

 1539 12:56:00.774230  PCI: 00:15.2 cmd <- 02

 1540 12:56:00.777636  PCI: 00:15.3 subsystem <- 8086/a0eb

 1541 12:56:00.780827  PCI: 00:15.3 cmd <- 02

 1542 12:56:00.784088  PCI: 00:16.0 subsystem <- 8086/a0e0

 1543 12:56:00.787544  PCI: 00:16.0 cmd <- 02

 1544 12:56:00.790540  PCI: 00:19.1 subsystem <- 8086/a0c6

 1545 12:56:00.793826  PCI: 00:19.1 cmd <- 02

 1546 12:56:00.797295  PCI: 00:1d.0 bridge ctrl <- 0013

 1547 12:56:00.800478  PCI: 00:1d.0 subsystem <- 8086/a0b0

 1548 12:56:00.803761  PCI: 00:1d.0 cmd <- 06

 1549 12:56:00.807108  PCI: 00:1e.0 subsystem <- 8086/a0a8

 1550 12:56:00.810445  PCI: 00:1e.0 cmd <- 06

 1551 12:56:00.813658  PCI: 00:1e.2 subsystem <- 8086/a0aa

 1552 12:56:00.816884  PCI: 00:1e.2 cmd <- 06

 1553 12:56:00.820264  PCI: 00:1e.3 subsystem <- 8086/a0ab

 1554 12:56:00.820439  PCI: 00:1e.3 cmd <- 02

 1555 12:56:00.827082  PCI: 00:1f.0 subsystem <- 8086/a087

 1556 12:56:00.827183  PCI: 00:1f.0 cmd <- 407

 1557 12:56:00.830310  PCI: 00:1f.3 subsystem <- 8086/a0c8

 1558 12:56:00.833724  PCI: 00:1f.3 cmd <- 02

 1559 12:56:00.836960  PCI: 00:1f.5 subsystem <- 8086/a0a4

 1560 12:56:00.840335  PCI: 00:1f.5 cmd <- 406

 1561 12:56:00.845400  PCI: 01:00.0 cmd <- 02

 1562 12:56:00.849451  done.

 1563 12:56:00.852684  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms

 1564 12:56:00.856228  Initializing devices...

 1565 12:56:00.859354  Root Device init

 1566 12:56:00.862522  Chrome EC: Set SMI mask to 0x0000000000000000

 1567 12:56:00.869203  Chrome EC: clear events_b mask to 0x0000000000000000

 1568 12:56:00.876089  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1569 12:56:00.879305  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e

 1570 12:56:00.886455  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e

 1571 12:56:00.893153  Chrome EC: Set WAKE mask to 0x0000000000000000

 1572 12:56:00.896042  fw_config match found: DB_USB=USB3_ACTIVE

 1573 12:56:00.902742  Configure Right Type-C port orientation for retimer

 1574 12:56:00.905931  Root Device init finished in 44 msecs

 1575 12:56:00.909244  PCI: 00:00.0 init

 1576 12:56:00.912647  CPU TDP = 9 Watts

 1577 12:56:00.912732  CPU PL1 = 9 Watts

 1578 12:56:00.916016  CPU PL2 = 40 Watts

 1579 12:56:00.919697  CPU PL4 = 83 Watts

 1580 12:56:00.922857  PCI: 00:00.0 init finished in 8 msecs

 1581 12:56:00.922950  PCI: 00:02.0 init

 1582 12:56:00.926141  GMA: Found VBT in CBFS

 1583 12:56:00.929602  GMA: Found valid VBT in CBFS

 1584 12:56:00.935866  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1585 12:56:00.942434                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000

 1586 12:56:00.945718  PCI: 00:02.0 init finished in 18 msecs

 1587 12:56:00.949577  PCI: 00:05.0 init

 1588 12:56:00.952723  PCI: 00:05.0 init finished in 0 msecs

 1589 12:56:00.956051  PCI: 00:08.0 init

 1590 12:56:00.959392  PCI: 00:08.0 init finished in 0 msecs

 1591 12:56:00.962235  PCI: 00:14.0 init

 1592 12:56:00.965956  PCI: 00:14.0 init finished in 0 msecs

 1593 12:56:00.968964  PCI: 00:14.2 init

 1594 12:56:00.972468  PCI: 00:14.2 init finished in 0 msecs

 1595 12:56:00.975932  PCI: 00:15.0 init

 1596 12:56:00.978767  I2C bus 0 version 0x3230302a

 1597 12:56:00.982472  DW I2C bus 0 at 0x7fe4e000 (400 KHz)

 1598 12:56:00.985662  PCI: 00:15.0 init finished in 6 msecs

 1599 12:56:00.985769  PCI: 00:15.1 init

 1600 12:56:00.988894  I2C bus 1 version 0x3230302a

 1601 12:56:00.992014  DW I2C bus 1 at 0x7fe4f000 (400 KHz)

 1602 12:56:00.998785  PCI: 00:15.1 init finished in 6 msecs

 1603 12:56:00.998879  PCI: 00:15.2 init

 1604 12:56:01.002066  I2C bus 2 version 0x3230302a

 1605 12:56:01.005483  DW I2C bus 2 at 0x7fe50000 (400 KHz)

 1606 12:56:01.008712  PCI: 00:15.2 init finished in 6 msecs

 1607 12:56:01.012126  PCI: 00:15.3 init

 1608 12:56:01.015432  I2C bus 3 version 0x3230302a

 1609 12:56:01.018678  DW I2C bus 3 at 0x7fe51000 (400 KHz)

 1610 12:56:01.022022  PCI: 00:15.3 init finished in 6 msecs

 1611 12:56:01.025302  PCI: 00:16.0 init

 1612 12:56:01.029011  PCI: 00:16.0 init finished in 0 msecs

 1613 12:56:01.032276  PCI: 00:19.1 init

 1614 12:56:01.035491  I2C bus 5 version 0x3230302a

 1615 12:56:01.038534  DW I2C bus 5 at 0x7fe53000 (400 KHz)

 1616 12:56:01.041603  PCI: 00:19.1 init finished in 6 msecs

 1617 12:56:01.045032  PCI: 00:1d.0 init

 1618 12:56:01.048360  Initializing PCH PCIe bridge.

 1619 12:56:01.051552  PCI: 00:1d.0 init finished in 3 msecs

 1620 12:56:01.055072  PCI: 00:1f.0 init

 1621 12:56:01.058366  IOAPIC: Initializing IOAPIC at 0xfec00000

 1622 12:56:01.061572  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1623 12:56:01.064805  IOAPIC: ID = 0x02

 1624 12:56:01.068468  IOAPIC: Dumping registers

 1625 12:56:01.068559    reg 0x0000: 0x02000000

 1626 12:56:01.071498    reg 0x0001: 0x00770020

 1627 12:56:01.074700    reg 0x0002: 0x00000000

 1628 12:56:01.078076  PCI: 00:1f.0 init finished in 21 msecs

 1629 12:56:01.081513  PCI: 00:1f.2 init

 1630 12:56:01.084883  Disabling ACPI via APMC.

 1631 12:56:01.085000  APMC done.

 1632 12:56:01.091243  PCI: 00:1f.2 init finished in 5 msecs

 1633 12:56:01.101933  PCI: 01:00.0 init

 1634 12:56:01.105353  PCI: 01:00.0 init finished in 0 msecs

 1635 12:56:01.108697  PNP: 0c09.0 init

 1636 12:56:01.112001  Google Chrome EC uptime: 8.411 seconds

 1637 12:56:01.118445  Google Chrome AP resets since EC boot: 1

 1638 12:56:01.121958  Google Chrome most recent AP reset causes:

 1639 12:56:01.125584  	0.348: 32775 shutdown: entering G3

 1640 12:56:01.131539  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

 1641 12:56:01.135251  PNP: 0c09.0 init finished in 22 msecs

 1642 12:56:01.140642  Devices initialized

 1643 12:56:01.144100  Show all devs... After init.

 1644 12:56:01.147308  Root Device: enabled 1

 1645 12:56:01.147413  DOMAIN: 0000: enabled 1

 1646 12:56:01.150880  CPU_CLUSTER: 0: enabled 1

 1647 12:56:01.154208  PCI: 00:00.0: enabled 1

 1648 12:56:01.157665  PCI: 00:02.0: enabled 1

 1649 12:56:01.157778  PCI: 00:04.0: enabled 1

 1650 12:56:01.160963  PCI: 00:05.0: enabled 1

 1651 12:56:01.164298  PCI: 00:06.0: enabled 0

 1652 12:56:01.167434  PCI: 00:07.0: enabled 0

 1653 12:56:01.167518  PCI: 00:07.1: enabled 0

 1654 12:56:01.170599  PCI: 00:07.2: enabled 0

 1655 12:56:01.173772  PCI: 00:07.3: enabled 0

 1656 12:56:01.177487  PCI: 00:08.0: enabled 1

 1657 12:56:01.177575  PCI: 00:09.0: enabled 0

 1658 12:56:01.180681  PCI: 00:0a.0: enabled 0

 1659 12:56:01.184079  PCI: 00:0d.0: enabled 1

 1660 12:56:01.187430  PCI: 00:0d.1: enabled 0

 1661 12:56:01.187513  PCI: 00:0d.2: enabled 0

 1662 12:56:01.190818  PCI: 00:0d.3: enabled 0

 1663 12:56:01.194057  PCI: 00:0e.0: enabled 0

 1664 12:56:01.194175  PCI: 00:10.2: enabled 1

 1665 12:56:01.197273  PCI: 00:10.6: enabled 0

 1666 12:56:01.200369  PCI: 00:10.7: enabled 0

 1667 12:56:01.203930  PCI: 00:12.0: enabled 0

 1668 12:56:01.204021  PCI: 00:12.6: enabled 0

 1669 12:56:01.207160  PCI: 00:13.0: enabled 0

 1670 12:56:01.210562  PCI: 00:14.0: enabled 1

 1671 12:56:01.213577  PCI: 00:14.1: enabled 0

 1672 12:56:01.213682  PCI: 00:14.2: enabled 1

 1673 12:56:01.217273  PCI: 00:14.3: enabled 1

 1674 12:56:01.220580  PCI: 00:15.0: enabled 1

 1675 12:56:01.224023  PCI: 00:15.1: enabled 1

 1676 12:56:01.224132  PCI: 00:15.2: enabled 1

 1677 12:56:01.227161  PCI: 00:15.3: enabled 1

 1678 12:56:01.230763  PCI: 00:16.0: enabled 1

 1679 12:56:01.233563  PCI: 00:16.1: enabled 0

 1680 12:56:01.233686  PCI: 00:16.2: enabled 0

 1681 12:56:01.236993  PCI: 00:16.3: enabled 0

 1682 12:56:01.240175  PCI: 00:16.4: enabled 0

 1683 12:56:01.243316  PCI: 00:16.5: enabled 0

 1684 12:56:01.243423  PCI: 00:17.0: enabled 0

 1685 12:56:01.246680  PCI: 00:19.0: enabled 0

 1686 12:56:01.250062  PCI: 00:19.1: enabled 1

 1687 12:56:01.250170  PCI: 00:19.2: enabled 0

 1688 12:56:01.253495  PCI: 00:1c.0: enabled 1

 1689 12:56:01.256639  PCI: 00:1c.1: enabled 0

 1690 12:56:01.260156  PCI: 00:1c.2: enabled 0

 1691 12:56:01.260264  PCI: 00:1c.3: enabled 0

 1692 12:56:01.263502  PCI: 00:1c.4: enabled 0

 1693 12:56:01.266961  PCI: 00:1c.5: enabled 0

 1694 12:56:01.269867  PCI: 00:1c.6: enabled 1

 1695 12:56:01.269976  PCI: 00:1c.7: enabled 0

 1696 12:56:01.272973  PCI: 00:1d.0: enabled 1

 1697 12:56:01.276702  PCI: 00:1d.1: enabled 0

 1698 12:56:01.279596  PCI: 00:1d.2: enabled 1

 1699 12:56:01.279678  PCI: 00:1d.3: enabled 0

 1700 12:56:01.283218  PCI: 00:1e.0: enabled 1

 1701 12:56:01.286267  PCI: 00:1e.1: enabled 0

 1702 12:56:01.290063  PCI: 00:1e.2: enabled 1

 1703 12:56:01.290172  PCI: 00:1e.3: enabled 1

 1704 12:56:01.293365  PCI: 00:1f.0: enabled 1

 1705 12:56:01.296773  PCI: 00:1f.1: enabled 0

 1706 12:56:01.296876  PCI: 00:1f.2: enabled 1

 1707 12:56:01.299567  PCI: 00:1f.3: enabled 1

 1708 12:56:01.302802  PCI: 00:1f.4: enabled 0

 1709 12:56:01.306054  PCI: 00:1f.5: enabled 1

 1710 12:56:01.306159  PCI: 00:1f.6: enabled 0

 1711 12:56:01.309685  PCI: 00:1f.7: enabled 0

 1712 12:56:01.312939  APIC: 00: enabled 1

 1713 12:56:01.316353  GENERIC: 0.0: enabled 1

 1714 12:56:01.316451  GENERIC: 0.0: enabled 1

 1715 12:56:01.319527  GENERIC: 1.0: enabled 1

 1716 12:56:01.322874  GENERIC: 0.0: enabled 1

 1717 12:56:01.322967  GENERIC: 1.0: enabled 1

 1718 12:56:01.326115  USB0 port 0: enabled 1

 1719 12:56:01.329779  GENERIC: 0.0: enabled 1

 1720 12:56:01.333209  USB0 port 0: enabled 1

 1721 12:56:01.333342  GENERIC: 0.0: enabled 1

 1722 12:56:01.336589  I2C: 00:1a: enabled 1

 1723 12:56:01.339543  I2C: 00:31: enabled 1

 1724 12:56:01.339637  I2C: 00:32: enabled 1

 1725 12:56:01.342719  I2C: 00:10: enabled 1

 1726 12:56:01.346034  I2C: 00:15: enabled 1

 1727 12:56:01.346124  GENERIC: 0.0: enabled 0

 1728 12:56:01.349674  GENERIC: 1.0: enabled 0

 1729 12:56:01.352774  GENERIC: 0.0: enabled 1

 1730 12:56:01.356132  SPI: 00: enabled 1

 1731 12:56:01.356217  SPI: 00: enabled 1

 1732 12:56:01.359463  PNP: 0c09.0: enabled 1

 1733 12:56:01.362791  GENERIC: 0.0: enabled 1

 1734 12:56:01.362881  USB3 port 0: enabled 1

 1735 12:56:01.366133  USB3 port 1: enabled 1

 1736 12:56:01.369636  USB3 port 2: enabled 0

 1737 12:56:01.369716  USB3 port 3: enabled 0

 1738 12:56:01.372464  USB2 port 0: enabled 0

 1739 12:56:01.375941  USB2 port 1: enabled 1

 1740 12:56:01.379117  USB2 port 2: enabled 1

 1741 12:56:01.379196  USB2 port 3: enabled 0

 1742 12:56:01.382342  USB2 port 4: enabled 1

 1743 12:56:01.385946  USB2 port 5: enabled 0

 1744 12:56:01.386032  USB2 port 6: enabled 0

 1745 12:56:01.389203  USB2 port 7: enabled 0

 1746 12:56:01.392417  USB2 port 8: enabled 0

 1747 12:56:01.392499  USB2 port 9: enabled 0

 1748 12:56:01.395518  USB3 port 0: enabled 0

 1749 12:56:01.399166  USB3 port 1: enabled 1

 1750 12:56:01.402301  USB3 port 2: enabled 0

 1751 12:56:01.402385  USB3 port 3: enabled 0

 1752 12:56:01.405480  GENERIC: 0.0: enabled 1

 1753 12:56:01.408736  GENERIC: 1.0: enabled 1

 1754 12:56:01.408809  APIC: 01: enabled 1

 1755 12:56:01.412005  APIC: 07: enabled 1

 1756 12:56:01.415489  APIC: 02: enabled 1

 1757 12:56:01.415559  APIC: 04: enabled 1

 1758 12:56:01.418811  APIC: 06: enabled 1

 1759 12:56:01.422253  APIC: 03: enabled 1

 1760 12:56:01.422333  APIC: 05: enabled 1

 1761 12:56:01.425563  PCI: 01:00.0: enabled 1

 1762 12:56:01.432088  BS: BS_DEV_INIT run times (exec / console): 31 / 540 ms

 1763 12:56:01.435647  FMAP: area RW_ELOG found @ f30000 (4096 bytes)

 1764 12:56:01.438341  ELOG: NV offset 0xf30000 size 0x1000

 1765 12:56:01.446293  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1766 12:56:01.452498  ELOG: Event(17) added with size 13 at 2023-04-26 12:55:57 UTC

 1767 12:56:01.459120  ELOG: Event(92) added with size 9 at 2023-04-26 12:55:57 UTC

 1768 12:56:01.465524  ELOG: Event(93) added with size 9 at 2023-04-26 12:55:57 UTC

 1769 12:56:01.472572  ELOG: Event(9E) added with size 10 at 2023-04-26 12:55:57 UTC

 1770 12:56:01.479451  ELOG: Event(9F) added with size 14 at 2023-04-26 12:55:57 UTC

 1771 12:56:01.485628  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms

 1772 12:56:01.492101  ELOG: Event(A1) added with size 10 at 2023-04-26 12:55:57 UTC

 1773 12:56:01.495424  elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b

 1774 12:56:01.502473  BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms

 1775 12:56:01.505511  Finalize devices...

 1776 12:56:01.505632  Devices finalized

 1777 12:56:01.512321  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms

 1778 12:56:01.518900  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)

 1779 12:56:01.522039  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 1780 12:56:01.528580  ME: HFSTS1                      : 0x80030055

 1781 12:56:01.531939  ME: HFSTS2                      : 0x30280116

 1782 12:56:01.535349  ME: HFSTS3                      : 0x00000050

 1783 12:56:01.542257  ME: HFSTS4                      : 0x00004000

 1784 12:56:01.545186  ME: HFSTS5                      : 0x00000000

 1785 12:56:01.548322  ME: HFSTS6                      : 0x00400006

 1786 12:56:01.555462  ME: Manufacturing Mode          : YES

 1787 12:56:01.558321  ME: SPI Protection Mode Enabled : NO

 1788 12:56:01.562050  ME: FW Partition Table          : OK

 1789 12:56:01.565119  ME: Bringup Loader Failure      : NO

 1790 12:56:01.568524  ME: Firmware Init Complete      : NO

 1791 12:56:01.571894  ME: Boot Options Present        : NO

 1792 12:56:01.575187  ME: Update In Progress          : NO

 1793 12:56:01.578548  ME: D0i3 Support                : YES

 1794 12:56:01.584815  ME: Low Power State Enabled     : NO

 1795 12:56:01.588344  ME: CPU Replaced                : YES

 1796 12:56:01.591615  ME: CPU Replacement Valid       : YES

 1797 12:56:01.594803  ME: Current Working State       : 5

 1798 12:56:01.598506  ME: Current Operation State     : 1

 1799 12:56:01.601661  ME: Current Operation Mode      : 3

 1800 12:56:01.605002  ME: Error Code                  : 0

 1801 12:56:01.608543  ME: Enhanced Debug Mode         : NO

 1802 12:56:01.614994  ME: CPU Debug Disabled          : YES

 1803 12:56:01.618302  ME: TXT Support                 : NO

 1804 12:56:01.621602  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms

 1805 12:56:01.631809  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4

 1806 12:56:01.635057  CBFS: 'fallback/slic' not found.

 1807 12:56:01.638243  ACPI: Writing ACPI tables at 76b01000.

 1808 12:56:01.638346  ACPI:    * FACS

 1809 12:56:01.641562  ACPI:    * DSDT

 1810 12:56:01.644917  Ramoops buffer: 0x100000@0x76a00000.

 1811 12:56:01.651641  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

 1812 12:56:01.654565  FMAP: area RW_VPD found @ f35000 (8192 bytes)

 1813 12:56:01.658470  Google Chrome EC: version:

 1814 12:56:01.661744  	ro: voema_v2.0.7540-147f8d37d1

 1815 12:56:01.665181  	rw: voema_v2.0.7540-147f8d37d1

 1816 12:56:01.668320    running image: 2

 1817 12:56:01.671488  PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000

 1818 12:56:01.676956  ACPI:    * FADT

 1819 12:56:01.677042  SCI is IRQ9

 1820 12:56:01.683242  ACPI: added table 1/32, length now 40

 1821 12:56:01.683352  ACPI:     * SSDT

 1822 12:56:01.686616  Found 1 CPU(s) with 8 core(s) each.

 1823 12:56:01.693469  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2

 1824 12:56:01.696691  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 1825 12:56:01.699956  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 1826 12:56:01.703537  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a

 1827 12:56:01.709589  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 1828 12:56:01.716611  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 1829 12:56:01.719713  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10

 1830 12:56:01.726446  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 1831 12:56:01.732845  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)

 1832 12:56:01.736586  \_SB.PCI0.RP09: Added StorageD3Enable property

 1833 12:56:01.743198  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1834 12:56:01.746444  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 1835 12:56:01.752720  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 1836 12:56:01.755979  PS2K: Passing 80 keymaps to kernel

 1837 12:56:01.762767  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 1838 12:56:01.769503  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1

 1839 12:56:01.776086  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1

 1840 12:56:01.782646  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 1841 12:56:01.789486  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4

 1842 12:56:01.795958  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1

 1843 12:56:01.802514  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 1844 12:56:01.809198  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 1845 12:56:01.812555  ACPI: added table 2/32, length now 44

 1846 12:56:01.812657  ACPI:    * MCFG

 1847 12:56:01.815922  ACPI: added table 3/32, length now 48

 1848 12:56:01.819178  ACPI:    * TPM2

 1849 12:56:01.822471  TPM2 log created at 0x769f0000

 1850 12:56:01.825969  ACPI: added table 4/32, length now 52

 1851 12:56:01.826057  ACPI:    * MADT

 1852 12:56:01.829021  SCI is IRQ9

 1853 12:56:01.832368  ACPI: added table 5/32, length now 56

 1854 12:56:01.835759  current = 76b09850

 1855 12:56:01.835855  ACPI:    * DMAR

 1856 12:56:01.839219  ACPI: added table 6/32, length now 60

 1857 12:56:01.842310  ACPI: added table 7/32, length now 64

 1858 12:56:01.845802  ACPI:    * HPET

 1859 12:56:01.849038  ACPI: added table 8/32, length now 68

 1860 12:56:01.849124  ACPI: done.

 1861 12:56:01.852349  ACPI tables: 35216 bytes.

 1862 12:56:01.855697  smbios_write_tables: 769ef000

 1863 12:56:01.859127  EC returned error result code 3

 1864 12:56:01.862463  Couldn't obtain OEM name from CBI

 1865 12:56:01.865451  Create SMBIOS type 16

 1866 12:56:01.868807  Create SMBIOS type 17

 1867 12:56:01.872633  GENERIC: 0.0 (WIFI Device)

 1868 12:56:01.872737  SMBIOS tables: 1750 bytes.

 1869 12:56:01.878694  Writing table forward entry at 0x00000500

 1870 12:56:01.885526  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c

 1871 12:56:01.889159  Writing coreboot table at 0x76b25000

 1872 12:56:01.891943   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1873 12:56:01.898668   1. 0000000000001000-000000000009ffff: RAM

 1874 12:56:01.901983   2. 00000000000a0000-00000000000fffff: RESERVED

 1875 12:56:01.905292   3. 0000000000100000-00000000769eefff: RAM

 1876 12:56:01.912265   4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES

 1877 12:56:01.918675   5. 0000000076b98000-0000000076c09fff: RAMSTAGE

 1878 12:56:01.922026   6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES

 1879 12:56:01.928495   7. 0000000077000000-000000007fbfffff: RESERVED

 1880 12:56:01.931729   8. 00000000c0000000-00000000cfffffff: RESERVED

 1881 12:56:01.938736   9. 00000000f8000000-00000000f9ffffff: RESERVED

 1882 12:56:01.941988  10. 00000000fb000000-00000000fb000fff: RESERVED

 1883 12:56:01.948345  11. 00000000fe000000-00000000fe00ffff: RESERVED

 1884 12:56:01.951927  12. 00000000fed80000-00000000fed87fff: RESERVED

 1885 12:56:01.958515  13. 00000000fed90000-00000000fed92fff: RESERVED

 1886 12:56:01.961976  14. 00000000feda0000-00000000feda1fff: RESERVED

 1887 12:56:01.965355  15. 00000000fedc0000-00000000feddffff: RESERVED

 1888 12:56:01.971468  16. 0000000100000000-00000002803fffff: RAM

 1889 12:56:01.975033  Passing 4 GPIOs to payload:

 1890 12:56:01.978179              NAME |       PORT | POLARITY |     VALUE

 1891 12:56:01.985134               lid |  undefined |     high |      high

 1892 12:56:01.988364             power |  undefined |     high |       low

 1893 12:56:01.995146             oprom |  undefined |     high |       low

 1894 12:56:02.001441          EC in RW | 0x000000e5 |     high |      high

 1895 12:56:02.004803  Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 66dc

 1896 12:56:02.008071  coreboot table: 1576 bytes.

 1897 12:56:02.011516  IMD ROOT    0. 0x76fff000 0x00001000

 1898 12:56:02.018520  IMD SMALL   1. 0x76ffe000 0x00001000

 1899 12:56:02.021391  FSP MEMORY  2. 0x76c4e000 0x003b0000

 1900 12:56:02.024755  VPD         3. 0x76c4d000 0x00000367

 1901 12:56:02.028126  RO MCACHE   4. 0x76c4c000 0x00000fdc

 1902 12:56:02.031262  CONSOLE     5. 0x76c2c000 0x00020000

 1903 12:56:02.035068  FMAP        6. 0x76c2b000 0x00000578

 1904 12:56:02.038111  TIME STAMP  7. 0x76c2a000 0x00000910

 1905 12:56:02.041250  VBOOT WORK  8. 0x76c16000 0x00014000

 1906 12:56:02.047935  ROMSTG STCK 9. 0x76c15000 0x00001000

 1907 12:56:02.051278  AFTER CAR  10. 0x76c0a000 0x0000b000

 1908 12:56:02.054619  RAMSTAGE   11. 0x76b97000 0x00073000

 1909 12:56:02.057819  REFCODE    12. 0x76b42000 0x00055000

 1910 12:56:02.061575  SMM BACKUP 13. 0x76b32000 0x00010000

 1911 12:56:02.064254  4f444749   14. 0x76b30000 0x00002000

 1912 12:56:02.067848  EXT VBT15. 0x76b2d000 0x0000219f

 1913 12:56:02.071251  COREBOOT   16. 0x76b25000 0x00008000

 1914 12:56:02.074671  ACPI       17. 0x76b01000 0x00024000

 1915 12:56:02.081339  ACPI GNVS  18. 0x76b00000 0x00001000

 1916 12:56:02.084388  RAMOOPS    19. 0x76a00000 0x00100000

 1917 12:56:02.087859  TPM2 TCGLOG20. 0x769f0000 0x00010000

 1918 12:56:02.091126  SMBIOS     21. 0x769ef000 0x00000800

 1919 12:56:02.091232  IMD small region:

 1920 12:56:02.097700    IMD ROOT    0. 0x76ffec00 0x00000400

 1921 12:56:02.101304    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 1922 12:56:02.104756    POWER STATE 2. 0x76ffeb80 0x00000044

 1923 12:56:02.107952    ROMSTAGE    3. 0x76ffeb60 0x00000004

 1924 12:56:02.111342    MEM INFO    4. 0x76ffe980 0x000001e0

 1925 12:56:02.117800  BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms

 1926 12:56:02.121134  MTRR: Physical address space:

 1927 12:56:02.127891  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1928 12:56:02.134676  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1929 12:56:02.140851  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 1930 12:56:02.147445  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0

 1931 12:56:02.151169  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1

 1932 12:56:02.157446  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0

 1933 12:56:02.164269  0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6

 1934 12:56:02.167436  MTRR: Fixed MSR 0x250 0x0606060606060606

 1935 12:56:02.174240  MTRR: Fixed MSR 0x258 0x0606060606060606

 1936 12:56:02.177553  MTRR: Fixed MSR 0x259 0x0000000000000000

 1937 12:56:02.180858  MTRR: Fixed MSR 0x268 0x0606060606060606

 1938 12:56:02.184175  MTRR: Fixed MSR 0x269 0x0606060606060606

 1939 12:56:02.190751  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1940 12:56:02.194309  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1941 12:56:02.197535  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1942 12:56:02.200565  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1943 12:56:02.207520  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1944 12:56:02.210511  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1945 12:56:02.213773  call enable_fixed_mtrr()

 1946 12:56:02.217078  CPU physical address size: 39 bits

 1947 12:56:02.220395  MTRR: default type WB/UC MTRR counts: 6/6.

 1948 12:56:02.224056  MTRR: UC selected as default type.

 1949 12:56:02.230349  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 1950 12:56:02.237079  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 1951 12:56:02.243918  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 1952 12:56:02.250627  MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1

 1953 12:56:02.256927  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 1954 12:56:02.263413  MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6

 1955 12:56:02.263522  

 1956 12:56:02.266983  MTRR check

 1957 12:56:02.267088  Fixed MTRRs   : Enabled

 1958 12:56:02.270206  Variable MTRRs: Enabled

 1959 12:56:02.270313  

 1960 12:56:02.273351  MTRR: Fixed MSR 0x250 0x0606060606060606

 1961 12:56:02.280264  MTRR: Fixed MSR 0x258 0x0606060606060606

 1962 12:56:02.283467  MTRR: Fixed MSR 0x259 0x0000000000000000

 1963 12:56:02.286945  MTRR: Fixed MSR 0x268 0x0606060606060606

 1964 12:56:02.290380  MTRR: Fixed MSR 0x269 0x0606060606060606

 1965 12:56:02.293655  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1966 12:56:02.299867  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1967 12:56:02.303291  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1968 12:56:02.306681  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1969 12:56:02.309837  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1970 12:56:02.316562  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1971 12:56:02.323226  BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms

 1972 12:56:02.326600  call enable_fixed_mtrr()

 1973 12:56:02.330725  Checking cr50 for pending updates

 1974 12:56:02.330835  CPU physical address size: 39 bits

 1975 12:56:02.336967  MTRR: Fixed MSR 0x250 0x0606060606060606

 1976 12:56:02.340321  MTRR: Fixed MSR 0x250 0x0606060606060606

 1977 12:56:02.343766  MTRR: Fixed MSR 0x258 0x0606060606060606

 1978 12:56:02.347114  MTRR: Fixed MSR 0x259 0x0000000000000000

 1979 12:56:02.353662  MTRR: Fixed MSR 0x268 0x0606060606060606

 1980 12:56:02.357097  MTRR: Fixed MSR 0x269 0x0606060606060606

 1981 12:56:02.360701  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1982 12:56:02.363709  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1983 12:56:02.370582  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1984 12:56:02.373888  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1985 12:56:02.377211  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1986 12:56:02.380394  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1987 12:56:02.387588  MTRR: Fixed MSR 0x258 0x0606060606060606

 1988 12:56:02.387700  call enable_fixed_mtrr()

 1989 12:56:02.394352  MTRR: Fixed MSR 0x259 0x0000000000000000

 1990 12:56:02.397176  MTRR: Fixed MSR 0x268 0x0606060606060606

 1991 12:56:02.400493  MTRR: Fixed MSR 0x269 0x0606060606060606

 1992 12:56:02.403725  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1993 12:56:02.410624  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1994 12:56:02.413954  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1995 12:56:02.417121  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1996 12:56:02.420317  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1997 12:56:02.427089  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1998 12:56:02.430344  CPU physical address size: 39 bits

 1999 12:56:02.433504  call enable_fixed_mtrr()

 2000 12:56:02.437425  MTRR: Fixed MSR 0x250 0x0606060606060606

 2001 12:56:02.443651  MTRR: Fixed MSR 0x250 0x0606060606060606

 2002 12:56:02.447062  MTRR: Fixed MSR 0x258 0x0606060606060606

 2003 12:56:02.450515  MTRR: Fixed MSR 0x259 0x0000000000000000

 2004 12:56:02.453878  MTRR: Fixed MSR 0x268 0x0606060606060606

 2005 12:56:02.456984  MTRR: Fixed MSR 0x269 0x0606060606060606

 2006 12:56:02.463732  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2007 12:56:02.466930  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2008 12:56:02.470234  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2009 12:56:02.473460  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2010 12:56:02.480234  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2011 12:56:02.483672  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2012 12:56:02.486458  MTRR: Fixed MSR 0x258 0x0606060606060606

 2013 12:56:02.490181  call enable_fixed_mtrr()

 2014 12:56:02.493282  MTRR: Fixed MSR 0x259 0x0000000000000000

 2015 12:56:02.500427  MTRR: Fixed MSR 0x268 0x0606060606060606

 2016 12:56:02.503198  MTRR: Fixed MSR 0x269 0x0606060606060606

 2017 12:56:02.506379  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2018 12:56:02.510309  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2019 12:56:02.516364  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2020 12:56:02.519588  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2021 12:56:02.522953  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2022 12:56:02.526266  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2023 12:56:02.530784  CPU physical address size: 39 bits

 2024 12:56:02.537265  call enable_fixed_mtrr()

 2025 12:56:02.541216  CPU physical address size: 39 bits

 2026 12:56:02.541324  Reading cr50 TPM mode

 2027 12:56:02.544661  CPU physical address size: 39 bits

 2028 12:56:02.547942  MTRR: Fixed MSR 0x250 0x0606060606060606

 2029 12:56:02.554815  MTRR: Fixed MSR 0x250 0x0606060606060606

 2030 12:56:02.558148  MTRR: Fixed MSR 0x258 0x0606060606060606

 2031 12:56:02.561460  MTRR: Fixed MSR 0x259 0x0000000000000000

 2032 12:56:02.564830  MTRR: Fixed MSR 0x268 0x0606060606060606

 2033 12:56:02.571464  MTRR: Fixed MSR 0x269 0x0606060606060606

 2034 12:56:02.574719  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2035 12:56:02.578014  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2036 12:56:02.581147  MTRR: Fixed MSR 0x258 0x0606060606060606

 2037 12:56:02.584318  MTRR: Fixed MSR 0x259 0x0000000000000000

 2038 12:56:02.591234  MTRR: Fixed MSR 0x268 0x0606060606060606

 2039 12:56:02.594462  MTRR: Fixed MSR 0x269 0x0606060606060606

 2040 12:56:02.597704  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2041 12:56:02.600921  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2042 12:56:02.607706  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2043 12:56:02.611057  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2044 12:56:02.614420  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2045 12:56:02.617834  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2046 12:56:02.624953  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2047 12:56:02.625067  call enable_fixed_mtrr()

 2048 12:56:02.631678  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2049 12:56:02.634805  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2050 12:56:02.638157  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2051 12:56:02.641978  CPU physical address size: 39 bits

 2052 12:56:02.648498  call enable_fixed_mtrr()

 2053 12:56:02.651914  BS: BS_PAYLOAD_LOAD entry times (exec / console): 218 / 6 ms

 2054 12:56:02.654847  CPU physical address size: 39 bits

 2055 12:56:02.665271  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60

 2056 12:56:02.668368  Checking segment from ROM address 0xffc02b38

 2057 12:56:02.671827  Checking segment from ROM address 0xffc02b54

 2058 12:56:02.678485  Loading segment from ROM address 0xffc02b38

 2059 12:56:02.678597    code (compression=0)

 2060 12:56:02.688378    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64

 2061 12:56:02.698065  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64

 2062 12:56:02.698183  it's not compressed!

 2063 12:56:02.838150  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70

 2064 12:56:02.844949  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c

 2065 12:56:02.851308  Loading segment from ROM address 0xffc02b54

 2066 12:56:02.851420    Entry Point 0x30000000

 2067 12:56:02.855308  Loaded segments

 2068 12:56:02.861335  BS: BS_PAYLOAD_LOAD run times (exec / console): 139 / 63 ms

 2069 12:56:02.904469  Finalizing chipset.

 2070 12:56:02.907844  Finalizing SMM.

 2071 12:56:02.907959  APMC done.

 2072 12:56:02.914259  BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms

 2073 12:56:02.917501  mp_park_aps done after 0 msecs.

 2074 12:56:02.921228  Jumping to boot code at 0x30000000(0x76b25000)

 2075 12:56:02.931189  CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes

 2076 12:56:02.931312  

 2077 12:56:02.931411  

 2078 12:56:02.934487  

 2079 12:56:02.934594  Starting depthcharge on Voema...

 2080 12:56:02.935003  end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
 2081 12:56:02.935143  start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
 2082 12:56:02.935268  Setting prompt string to ['volteer:']
 2083 12:56:02.935384  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
 2084 12:56:02.937980  

 2085 12:56:02.944219  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2086 12:56:02.944331  

 2087 12:56:02.950919  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2088 12:56:02.951031  

 2089 12:56:02.957410  Looking for NVMe Controller 0x3005f220 @ 00:1d:00

 2090 12:56:02.957520  

 2091 12:56:02.960520  Failed to find eMMC card reader

 2092 12:56:02.960628  

 2093 12:56:02.960721  Wipe memory regions:

 2094 12:56:02.964253  

 2095 12:56:02.967488  	[0x00000000001000, 0x000000000a0000)

 2096 12:56:02.967600  

 2097 12:56:02.970835  	[0x00000000100000, 0x00000030000000)

 2098 12:56:02.996150  

 2099 12:56:02.999462  	[0x00000032662db0, 0x000000769ef000)

 2100 12:56:03.035562  

 2101 12:56:03.039003  	[0x00000100000000, 0x00000280400000)

 2102 12:56:03.242548  

 2103 12:56:03.245761  ec_init: CrosEC protocol v3 supported (256, 256)

 2104 12:56:03.245884  

 2105 12:56:03.252494  update_port_state: port C0 state: usb enable 1 mux conn 0

 2106 12:56:03.252607  

 2107 12:56:03.259212  update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1

 2108 12:56:03.263587  

 2109 12:56:03.266854  pmc_check_ipc_sts: STS_BUSY done after 1532 us

 2110 12:56:03.266961  

 2111 12:56:03.270157  send_conn_disc_msg: pmc_send_cmd succeeded

 2112 12:56:03.702959  

 2113 12:56:03.703131  R8152: Initializing

 2114 12:56:03.703230  

 2115 12:56:03.706287  Version 6 (ocp_data = 5c30)

 2116 12:56:03.706395  

 2117 12:56:03.709785  R8152: Done initializing

 2118 12:56:03.709892  

 2119 12:56:03.713297  Adding net device

 2120 12:56:04.014671  

 2121 12:56:04.018143  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35

 2122 12:56:04.018267  

 2123 12:56:04.018355  

 2124 12:56:04.018444  

 2125 12:56:04.021162  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2127 12:56:04.121575  volteer: tftpboot 192.168.201.1 10130712/tftp-deploy-dop7g3xg/kernel/bzImage 10130712/tftp-deploy-dop7g3xg/kernel/cmdline 10130712/tftp-deploy-dop7g3xg/ramdisk/ramdisk.cpio.gz

 2128 12:56:04.121784  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2129 12:56:04.121913  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
 2130 12:56:04.126134  tftpboot 192.168.201.1 10130712/tftp-deploy-dop7g3xg/kernel/bzIploy-dop7g3xg/kernel/cmdline 10130712/tftp-deploy-dop7g3xg/ramdisk/ramdisk.cpio.gz

 2131 12:56:04.126257  

 2132 12:56:04.126353  Waiting for link

 2133 12:56:04.329551  

 2134 12:56:04.329719  done.

 2135 12:56:04.329820  

 2136 12:56:04.329911  MAC: 00:24:32:30:7c:e4

 2137 12:56:04.330018  

 2138 12:56:04.332596  Sending DHCP discover... done.

 2139 12:56:04.332709  

 2140 12:56:04.335856  Waiting for reply... done.

 2141 12:56:04.335971  

 2142 12:56:04.339198  Sending DHCP request... done.

 2143 12:56:04.339332  

 2144 12:56:04.342925  Waiting for reply... done.

 2145 12:56:04.343033  

 2146 12:56:04.346213  My ip is 192.168.201.23

 2147 12:56:04.346310  

 2148 12:56:04.349481  The DHCP server ip is 192.168.201.1

 2149 12:56:04.349570  

 2150 12:56:04.352831  TFTP server IP predefined by user: 192.168.201.1

 2151 12:56:04.352917  

 2152 12:56:04.359227  Bootfile predefined by user: 10130712/tftp-deploy-dop7g3xg/kernel/bzImage

 2153 12:56:04.359329  

 2154 12:56:04.362698  Sending tftp read request... done.

 2155 12:56:04.362787  

 2156 12:56:04.369875  Waiting for the transfer... 

 2157 12:56:04.370011  

 2158 12:56:04.896380  00000000 ################################################################

 2159 12:56:04.896528  

 2160 12:56:05.414480  00080000 ################################################################

 2161 12:56:05.414651  

 2162 12:56:05.945212  00100000 ################################################################

 2163 12:56:05.945346  

 2164 12:56:06.500564  00180000 ################################################################

 2165 12:56:06.500694  

 2166 12:56:07.032513  00200000 ################################################################

 2167 12:56:07.032654  

 2168 12:56:07.569581  00280000 ################################################################

 2169 12:56:07.569718  

 2170 12:56:08.100132  00300000 ################################################################

 2171 12:56:08.100264  

 2172 12:56:08.621734  00380000 ################################################################

 2173 12:56:08.621875  

 2174 12:56:09.148873  00400000 ################################################################

 2175 12:56:09.149043  

 2176 12:56:09.672248  00480000 ################################################################

 2177 12:56:09.672397  

 2178 12:56:10.189142  00500000 ################################################################

 2179 12:56:10.189295  

 2180 12:56:10.716737  00580000 ################################################################

 2181 12:56:10.716873  

 2182 12:56:11.241176  00600000 ################################################################

 2183 12:56:11.241348  

 2184 12:56:11.764218  00680000 ################################################################

 2185 12:56:11.764354  

 2186 12:56:12.290788  00700000 ################################################################

 2187 12:56:12.290929  

 2188 12:56:12.812956  00780000 ################################################################

 2189 12:56:12.813104  

 2190 12:56:13.338884  00800000 ################################################################

 2191 12:56:13.339037  

 2192 12:56:13.883873  00880000 ################################################################

 2193 12:56:13.884017  

 2194 12:56:14.409630  00900000 ################################################################

 2195 12:56:14.409863  

 2196 12:56:14.915902  00980000 ################################################################

 2197 12:56:14.916036  

 2198 12:56:15.280166  00a00000 ############################################## done.

 2199 12:56:15.280302  

 2200 12:56:15.283834  The bootfile was 10858496 bytes long.

 2201 12:56:15.283952  

 2202 12:56:15.286800  Sending tftp read request... done.

 2203 12:56:15.286875  

 2204 12:56:15.289807  Waiting for the transfer... 

 2205 12:56:15.289888  

 2206 12:56:15.806404  00000000 ################################################################

 2207 12:56:15.806540  

 2208 12:56:16.327593  00080000 ################################################################

 2209 12:56:16.327728  

 2210 12:56:16.845754  00100000 ################################################################

 2211 12:56:16.845892  

 2212 12:56:17.368235  00180000 ################################################################

 2213 12:56:17.368398  

 2214 12:56:17.889469  00200000 ################################################################

 2215 12:56:17.889604  

 2216 12:56:18.425349  00280000 ################################################################

 2217 12:56:18.425483  

 2218 12:56:18.973790  00300000 ################################################################

 2219 12:56:18.973929  

 2220 12:56:19.512948  00380000 ################################################################

 2221 12:56:19.513109  

 2222 12:56:20.045647  00400000 ################################################################

 2223 12:56:20.045806  

 2224 12:56:20.576975  00480000 ################################################################

 2225 12:56:20.577107  

 2226 12:56:21.103964  00500000 ################################################################

 2227 12:56:21.104139  

 2228 12:56:21.622384  00580000 ################################################################

 2229 12:56:21.622566  

 2230 12:56:22.134635  00600000 ################################################################

 2231 12:56:22.134776  

 2232 12:56:22.650451  00680000 ################################################################

 2233 12:56:22.650613  

 2234 12:56:23.164990  00700000 ################################################################

 2235 12:56:23.165164  

 2236 12:56:23.679598  00780000 ################################################################

 2237 12:56:23.679779  

 2238 12:56:24.203821  00800000 ################################################################

 2239 12:56:24.203965  

 2240 12:56:24.736327  00880000 ################################################################

 2241 12:56:24.736466  

 2242 12:56:25.267584  00900000 ################################################################

 2243 12:56:25.267725  

 2244 12:56:25.790737  00980000 ################################################################

 2245 12:56:25.790901  

 2246 12:56:26.329183  00a00000 ################################################################

 2247 12:56:26.329319  

 2248 12:56:26.843931  00a80000 ################################################################

 2249 12:56:26.844069  

 2250 12:56:27.365657  00b00000 ################################################################

 2251 12:56:27.365796  

 2252 12:56:27.890748  00b80000 ################################################################

 2253 12:56:27.890928  

 2254 12:56:28.418721  00c00000 ################################################################

 2255 12:56:28.418880  

 2256 12:56:28.936124  00c80000 ################################################################

 2257 12:56:28.936267  

 2258 12:56:29.456335  00d00000 ################################################################

 2259 12:56:29.456471  

 2260 12:56:29.978480  00d80000 ################################################################

 2261 12:56:29.978651  

 2262 12:56:30.503770  00e00000 ################################################################

 2263 12:56:30.503906  

 2264 12:56:31.033722  00e80000 ################################################################

 2265 12:56:31.033938  

 2266 12:56:31.564973  00f00000 ################################################################

 2267 12:56:31.565116  

 2268 12:56:32.077310  00f80000 ################################################################

 2269 12:56:32.077475  

 2270 12:56:32.586909  01000000 ################################################################

 2271 12:56:32.587048  

 2272 12:56:33.097862  01080000 ################################################################

 2273 12:56:33.098028  

 2274 12:56:33.618102  01100000 ################################################################

 2275 12:56:33.618272  

 2276 12:56:34.129975  01180000 ################################################################

 2277 12:56:34.130107  

 2278 12:56:34.654067  01200000 ################################################################

 2279 12:56:34.654222  

 2280 12:56:35.170724  01280000 ################################################################

 2281 12:56:35.170871  

 2282 12:56:35.683474  01300000 ################################################################

 2283 12:56:35.683652  

 2284 12:56:36.207173  01380000 ################################################################

 2285 12:56:36.207308  

 2286 12:56:36.731430  01400000 ################################################################

 2287 12:56:36.731615  

 2288 12:56:37.248711  01480000 ################################################################

 2289 12:56:37.248877  

 2290 12:56:37.771900  01500000 ################################################################

 2291 12:56:37.772082  

 2292 12:56:38.296230  01580000 ################################################################

 2293 12:56:38.296393  

 2294 12:56:38.901716  01600000 ################################################################

 2295 12:56:38.901874  

 2296 12:56:39.503174  01680000 ################################################################

 2297 12:56:39.503366  

 2298 12:56:40.031063  01700000 ################################################################

 2299 12:56:40.031218  

 2300 12:56:40.548933  01780000 ################################################################

 2301 12:56:40.549078  

 2302 12:56:41.076999  01800000 ################################################################

 2303 12:56:41.077171  

 2304 12:56:41.595947  01880000 ################################################################

 2305 12:56:41.596093  

 2306 12:56:42.129098  01900000 ################################################################

 2307 12:56:42.129244  

 2308 12:56:42.663388  01980000 ################################################################

 2309 12:56:42.663533  

 2310 12:56:43.196799  01a00000 ################################################################

 2311 12:56:43.196973  

 2312 12:56:43.720645  01a80000 ################################################################

 2313 12:56:43.720797  

 2314 12:56:44.237434  01b00000 ################################################################

 2315 12:56:44.237577  

 2316 12:56:44.751481  01b80000 ################################################################

 2317 12:56:44.751672  

 2318 12:56:45.264802  01c00000 ################################################################

 2319 12:56:45.264958  

 2320 12:56:45.778252  01c80000 ################################################################

 2321 12:56:45.778384  

 2322 12:56:46.290132  01d00000 ################################################################

 2323 12:56:46.290291  

 2324 12:56:46.803078  01d80000 ################################################################

 2325 12:56:46.803244  

 2326 12:56:47.315434  01e00000 ################################################################

 2327 12:56:47.315621  

 2328 12:56:47.826571  01e80000 ################################################################

 2329 12:56:47.826713  

 2330 12:56:48.338574  01f00000 ################################################################

 2331 12:56:48.338724  

 2332 12:56:48.849214  01f80000 ################################################################

 2333 12:56:48.849380  

 2334 12:56:49.362547  02000000 ################################################################

 2335 12:56:49.362696  

 2336 12:56:49.874587  02080000 ################################################################

 2337 12:56:49.874751  

 2338 12:56:50.387539  02100000 ################################################################

 2339 12:56:50.387720  

 2340 12:56:50.902644  02180000 ################################################################

 2341 12:56:50.902797  

 2342 12:56:51.416706  02200000 ################################################################

 2343 12:56:51.416953  

 2344 12:56:51.712686  02280000 ##################################### done.

 2345 12:56:51.712831  

 2346 12:56:51.716025  Sending tftp read request... done.

 2347 12:56:51.716100  

 2348 12:56:51.719442  Waiting for the transfer... 

 2349 12:56:51.719545  

 2350 12:56:51.719632  00000000 # done.

 2351 12:56:51.719693  

 2352 12:56:51.729370  Command line loaded dynamically from TFTP file: 10130712/tftp-deploy-dop7g3xg/kernel/cmdline

 2353 12:56:51.729456  

 2354 12:56:51.742036  The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2355 12:56:51.749758  

 2356 12:56:51.752929  Shutting down all USB controllers.

 2357 12:56:51.753016  

 2358 12:56:51.753101  Removing current net device

 2359 12:56:51.753197  

 2360 12:56:51.756147  Finalizing coreboot

 2361 12:56:51.756231  

 2362 12:56:51.763068  Exiting depthcharge with code 4 at timestamp: 57478269

 2363 12:56:51.763152  

 2364 12:56:51.763218  

 2365 12:56:51.763277  Starting kernel ...

 2366 12:56:51.763335  

 2367 12:56:51.763392  

 2368 12:56:51.763768  end: 2.2.4 bootloader-commands (duration 00:00:49) [common]
 2369 12:56:51.763875  start: 2.2.5 auto-login-action (timeout 00:03:56) [common]
 2370 12:56:51.763952  Setting prompt string to ['Linux version [0-9]']
 2371 12:56:51.764019  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2372 12:56:51.764088  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2374 13:00:47.764155  end: 2.2.5 auto-login-action (duration 00:03:56) [common]
 2376 13:00:47.764364  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 236 seconds'
 2378 13:00:47.764521  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2381 13:00:47.764765  end: 2 depthcharge-action (duration 00:05:00) [common]
 2383 13:00:47.764987  Cleaning after the job
 2384 13:00:47.765078  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10130712/tftp-deploy-dop7g3xg/ramdisk
 2385 13:00:47.769213  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10130712/tftp-deploy-dop7g3xg/kernel
 2386 13:00:47.770553  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10130712/tftp-deploy-dop7g3xg/modules
 2387 13:00:47.771141  start: 4.1 power-off (timeout 00:00:30) [common]
 2388 13:00:47.771303  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-3' '--port=1' '--command=off'
 2389 13:00:47.846704  >> Command sent successfully.

 2390 13:00:47.849321  Returned 0 in 0 seconds
 2391 13:00:47.949743  end: 4.1 power-off (duration 00:00:00) [common]
 2393 13:00:47.950082  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2394 13:00:47.950341  Listened to connection for namespace 'common' for up to 1s
 2395 13:00:48.951274  Finalising connection for namespace 'common'
 2396 13:00:48.951479  Disconnecting from shell: Finalise
 2397 13:00:48.951591  

 2398 13:00:49.051965  end: 4.2 read-feedback (duration 00:00:01) [common]
 2399 13:00:49.052123  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10130712
 2400 13:00:49.128537  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10130712
 2401 13:00:49.128732  JobError: Your job cannot terminate cleanly.