Boot log: asus-cx9400-volteer
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
1 12:55:46.201379 lava-dispatcher, installed at version: 2023.03
2 12:55:46.201580 start: 0 validate
3 12:55:46.201699 Start time: 2023-04-26 12:55:46.201692+00:00 (UTC)
4 12:55:46.201817 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:55:46.201943 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20230414.0%2Famd64%2Finitrd.cpio.gz exists
6 12:55:46.486990 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:55:46.487819 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.280-cip96-89-g355dfa824cb4%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:55:51.998984 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:55:51.999726 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20230414.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:55:52.271050 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:55:52.271250 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.280-cip96-89-g355dfa824cb4%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:55:53.272447 validate duration: 7.07
14 12:55:53.272718 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:55:53.272815 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:55:53.272900 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:55:53.273021 Not decompressing ramdisk as can be used compressed.
18 12:55:53.273104 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20230414.0/amd64/initrd.cpio.gz
19 12:55:53.273183 saving as /var/lib/lava/dispatcher/tmp/10130708/tftp-deploy-5ko6a6tk/ramdisk/initrd.cpio.gz
20 12:55:53.273245 total size: 6136586 (5MB)
21 12:55:53.274376 progress 0% (0MB)
22 12:55:53.276109 progress 5% (0MB)
23 12:55:53.277723 progress 10% (0MB)
24 12:55:53.279451 progress 15% (0MB)
25 12:55:53.281004 progress 20% (1MB)
26 12:55:53.282595 progress 25% (1MB)
27 12:55:53.284319 progress 30% (1MB)
28 12:55:53.285909 progress 35% (2MB)
29 12:55:53.287446 progress 40% (2MB)
30 12:55:53.289128 progress 45% (2MB)
31 12:55:53.290698 progress 50% (2MB)
32 12:55:53.292420 progress 55% (3MB)
33 12:55:53.293981 progress 60% (3MB)
34 12:55:53.295501 progress 65% (3MB)
35 12:55:53.297185 progress 70% (4MB)
36 12:55:53.298713 progress 75% (4MB)
37 12:55:53.300372 progress 80% (4MB)
38 12:55:53.302095 progress 85% (5MB)
39 12:55:53.303615 progress 90% (5MB)
40 12:55:53.305133 progress 95% (5MB)
41 12:55:53.306866 progress 100% (5MB)
42 12:55:53.307007 5MB downloaded in 0.03s (173.36MB/s)
43 12:55:53.307186 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:55:53.307422 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:55:53.307507 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:55:53.307591 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:55:53.307726 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.280-cip96-89-g355dfa824cb4/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:55:53.307794 saving as /var/lib/lava/dispatcher/tmp/10130708/tftp-deploy-5ko6a6tk/kernel/bzImage
50 12:55:53.307855 total size: 10858496 (10MB)
51 12:55:53.307914 No compression specified
52 12:55:53.309157 progress 0% (0MB)
53 12:55:53.312007 progress 5% (0MB)
54 12:55:53.314904 progress 10% (1MB)
55 12:55:53.317621 progress 15% (1MB)
56 12:55:53.320452 progress 20% (2MB)
57 12:55:53.323203 progress 25% (2MB)
58 12:55:53.326198 progress 30% (3MB)
59 12:55:53.329010 progress 35% (3MB)
60 12:55:53.331985 progress 40% (4MB)
61 12:55:53.334855 progress 45% (4MB)
62 12:55:53.337554 progress 50% (5MB)
63 12:55:53.340385 progress 55% (5MB)
64 12:55:53.343205 progress 60% (6MB)
65 12:55:53.346056 progress 65% (6MB)
66 12:55:53.348716 progress 70% (7MB)
67 12:55:53.351533 progress 75% (7MB)
68 12:55:53.354378 progress 80% (8MB)
69 12:55:53.357089 progress 85% (8MB)
70 12:55:53.359918 progress 90% (9MB)
71 12:55:53.362588 progress 95% (9MB)
72 12:55:53.365393 progress 100% (10MB)
73 12:55:53.365594 10MB downloaded in 0.06s (179.37MB/s)
74 12:55:53.365737 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:55:53.365964 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:55:53.366047 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:55:53.366130 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:55:53.366272 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20230414.0/amd64/full.rootfs.tar.xz
80 12:55:53.366342 saving as /var/lib/lava/dispatcher/tmp/10130708/tftp-deploy-5ko6a6tk/nfsrootfs/full.rootfs.tar
81 12:55:53.366403 total size: 202709988 (193MB)
82 12:55:53.366463 Using unxz to decompress xz
83 12:55:53.369970 progress 0% (0MB)
84 12:55:53.966308 progress 5% (9MB)
85 12:55:54.488440 progress 10% (19MB)
86 12:55:55.067724 progress 15% (29MB)
87 12:55:55.350078 progress 20% (38MB)
88 12:55:55.922775 progress 25% (48MB)
89 12:55:56.659356 progress 30% (58MB)
90 12:55:57.230730 progress 35% (67MB)
91 12:55:57.787201 progress 40% (77MB)
92 12:55:58.353229 progress 45% (87MB)
93 12:55:58.948165 progress 50% (96MB)
94 12:55:59.540319 progress 55% (106MB)
95 12:56:00.215149 progress 60% (116MB)
96 12:56:00.636693 progress 65% (125MB)
97 12:56:00.727493 progress 70% (135MB)
98 12:56:00.866356 progress 75% (145MB)
99 12:56:00.951011 progress 80% (154MB)
100 12:56:01.001512 progress 85% (164MB)
101 12:56:01.091452 progress 90% (174MB)
102 12:56:01.465711 progress 95% (183MB)
103 12:56:02.068110 progress 100% (193MB)
104 12:56:02.073286 193MB downloaded in 8.71s (22.20MB/s)
105 12:56:02.073672 end: 1.3.1 http-download (duration 00:00:09) [common]
107 12:56:02.073941 end: 1.3 download-retry (duration 00:00:09) [common]
108 12:56:02.074033 start: 1.4 download-retry (timeout 00:09:51) [common]
109 12:56:02.074120 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 12:56:02.074255 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.280-cip96-89-g355dfa824cb4/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:56:02.074325 saving as /var/lib/lava/dispatcher/tmp/10130708/tftp-deploy-5ko6a6tk/modules/modules.tar
112 12:56:02.074385 total size: 483612 (0MB)
113 12:56:02.074444 Using unxz to decompress xz
114 12:56:02.077979 progress 6% (0MB)
115 12:56:02.078404 progress 13% (0MB)
116 12:56:02.078638 progress 20% (0MB)
117 12:56:02.080041 progress 27% (0MB)
118 12:56:02.082142 progress 33% (0MB)
119 12:56:02.083982 progress 40% (0MB)
120 12:56:02.086286 progress 47% (0MB)
121 12:56:02.088149 progress 54% (0MB)
122 12:56:02.090166 progress 60% (0MB)
123 12:56:02.092012 progress 67% (0MB)
124 12:56:02.094079 progress 74% (0MB)
125 12:56:02.096502 progress 81% (0MB)
126 12:56:02.098430 progress 88% (0MB)
127 12:56:02.100240 progress 94% (0MB)
128 12:56:02.102670 progress 100% (0MB)
129 12:56:02.109129 0MB downloaded in 0.03s (13.28MB/s)
130 12:56:02.109498 end: 1.4.1 http-download (duration 00:00:00) [common]
132 12:56:02.109780 end: 1.4 download-retry (duration 00:00:00) [common]
133 12:56:02.109873 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
134 12:56:02.109971 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
135 12:56:05.576238 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10130708/extract-nfsrootfs-34tqjyal
136 12:56:05.576445 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
137 12:56:05.576546 start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
138 12:56:05.576713 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10130708/lava-overlay-1jhrz428
139 12:56:05.576839 makedir: /var/lib/lava/dispatcher/tmp/10130708/lava-overlay-1jhrz428/lava-10130708/bin
140 12:56:05.576942 makedir: /var/lib/lava/dispatcher/tmp/10130708/lava-overlay-1jhrz428/lava-10130708/tests
141 12:56:05.577037 makedir: /var/lib/lava/dispatcher/tmp/10130708/lava-overlay-1jhrz428/lava-10130708/results
142 12:56:05.577140 Creating /var/lib/lava/dispatcher/tmp/10130708/lava-overlay-1jhrz428/lava-10130708/bin/lava-add-keys
143 12:56:05.577277 Creating /var/lib/lava/dispatcher/tmp/10130708/lava-overlay-1jhrz428/lava-10130708/bin/lava-add-sources
144 12:56:05.577403 Creating /var/lib/lava/dispatcher/tmp/10130708/lava-overlay-1jhrz428/lava-10130708/bin/lava-background-process-start
145 12:56:05.577570 Creating /var/lib/lava/dispatcher/tmp/10130708/lava-overlay-1jhrz428/lava-10130708/bin/lava-background-process-stop
146 12:56:05.577694 Creating /var/lib/lava/dispatcher/tmp/10130708/lava-overlay-1jhrz428/lava-10130708/bin/lava-common-functions
147 12:56:05.577816 Creating /var/lib/lava/dispatcher/tmp/10130708/lava-overlay-1jhrz428/lava-10130708/bin/lava-echo-ipv4
148 12:56:05.577938 Creating /var/lib/lava/dispatcher/tmp/10130708/lava-overlay-1jhrz428/lava-10130708/bin/lava-install-packages
149 12:56:05.578060 Creating /var/lib/lava/dispatcher/tmp/10130708/lava-overlay-1jhrz428/lava-10130708/bin/lava-installed-packages
150 12:56:05.578181 Creating /var/lib/lava/dispatcher/tmp/10130708/lava-overlay-1jhrz428/lava-10130708/bin/lava-os-build
151 12:56:05.578303 Creating /var/lib/lava/dispatcher/tmp/10130708/lava-overlay-1jhrz428/lava-10130708/bin/lava-probe-channel
152 12:56:05.578425 Creating /var/lib/lava/dispatcher/tmp/10130708/lava-overlay-1jhrz428/lava-10130708/bin/lava-probe-ip
153 12:56:05.578546 Creating /var/lib/lava/dispatcher/tmp/10130708/lava-overlay-1jhrz428/lava-10130708/bin/lava-target-ip
154 12:56:05.578668 Creating /var/lib/lava/dispatcher/tmp/10130708/lava-overlay-1jhrz428/lava-10130708/bin/lava-target-mac
155 12:56:05.578791 Creating /var/lib/lava/dispatcher/tmp/10130708/lava-overlay-1jhrz428/lava-10130708/bin/lava-target-storage
156 12:56:05.578914 Creating /var/lib/lava/dispatcher/tmp/10130708/lava-overlay-1jhrz428/lava-10130708/bin/lava-test-case
157 12:56:05.579037 Creating /var/lib/lava/dispatcher/tmp/10130708/lava-overlay-1jhrz428/lava-10130708/bin/lava-test-event
158 12:56:05.579158 Creating /var/lib/lava/dispatcher/tmp/10130708/lava-overlay-1jhrz428/lava-10130708/bin/lava-test-feedback
159 12:56:05.579279 Creating /var/lib/lava/dispatcher/tmp/10130708/lava-overlay-1jhrz428/lava-10130708/bin/lava-test-raise
160 12:56:05.579400 Creating /var/lib/lava/dispatcher/tmp/10130708/lava-overlay-1jhrz428/lava-10130708/bin/lava-test-reference
161 12:56:05.579527 Creating /var/lib/lava/dispatcher/tmp/10130708/lava-overlay-1jhrz428/lava-10130708/bin/lava-test-runner
162 12:56:05.579649 Creating /var/lib/lava/dispatcher/tmp/10130708/lava-overlay-1jhrz428/lava-10130708/bin/lava-test-set
163 12:56:05.579777 Creating /var/lib/lava/dispatcher/tmp/10130708/lava-overlay-1jhrz428/lava-10130708/bin/lava-test-shell
164 12:56:05.579938 Updating /var/lib/lava/dispatcher/tmp/10130708/lava-overlay-1jhrz428/lava-10130708/bin/lava-add-keys (debian)
165 12:56:05.580105 Updating /var/lib/lava/dispatcher/tmp/10130708/lava-overlay-1jhrz428/lava-10130708/bin/lava-add-sources (debian)
166 12:56:05.580247 Updating /var/lib/lava/dispatcher/tmp/10130708/lava-overlay-1jhrz428/lava-10130708/bin/lava-install-packages (debian)
167 12:56:05.580391 Updating /var/lib/lava/dispatcher/tmp/10130708/lava-overlay-1jhrz428/lava-10130708/bin/lava-installed-packages (debian)
168 12:56:05.580535 Updating /var/lib/lava/dispatcher/tmp/10130708/lava-overlay-1jhrz428/lava-10130708/bin/lava-os-build (debian)
169 12:56:05.580654 Creating /var/lib/lava/dispatcher/tmp/10130708/lava-overlay-1jhrz428/lava-10130708/environment
170 12:56:05.580754 LAVA metadata
171 12:56:05.580826 - LAVA_JOB_ID=10130708
172 12:56:05.580890 - LAVA_DISPATCHER_IP=192.168.201.1
173 12:56:05.580990 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
174 12:56:05.581059 skipped lava-vland-overlay
175 12:56:05.581134 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
176 12:56:05.581213 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
177 12:56:05.581276 skipped lava-multinode-overlay
178 12:56:05.581350 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
179 12:56:05.581429 start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
180 12:56:05.581542 Loading test definitions
181 12:56:05.581634 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:48) [common]
182 12:56:05.581706 Using /lava-10130708 at stage 0
183 12:56:05.581974 uuid=10130708_1.5.2.3.1 testdef=None
184 12:56:05.582064 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
185 12:56:05.582195 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
186 12:56:05.582704 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
188 12:56:05.582927 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
189 12:56:05.583469 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
191 12:56:05.583700 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
192 12:56:05.584227 runner path: /var/lib/lava/dispatcher/tmp/10130708/lava-overlay-1jhrz428/lava-10130708/0/tests/0_timesync-off test_uuid 10130708_1.5.2.3.1
193 12:56:05.584379 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
195 12:56:05.584604 start: 1.5.2.3.5 git-repo-action (timeout 00:09:48) [common]
196 12:56:05.584676 Using /lava-10130708 at stage 0
197 12:56:05.584771 Fetching tests from https://github.com/kernelci/test-definitions.git
198 12:56:05.584849 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/10130708/lava-overlay-1jhrz428/lava-10130708/0/tests/1_kselftest-alsa'
199 12:56:12.905402 Running '/usr/bin/git checkout kernelci.org
200 12:56:13.049756 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/10130708/lava-overlay-1jhrz428/lava-10130708/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
201 12:56:13.050456 uuid=10130708_1.5.2.3.5 testdef=None
202 12:56:13.050619 end: 1.5.2.3.5 git-repo-action (duration 00:00:07) [common]
204 12:56:13.050870 start: 1.5.2.3.6 test-overlay (timeout 00:09:40) [common]
205 12:56:13.051616 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
207 12:56:13.051852 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:40) [common]
208 12:56:13.052817 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
210 12:56:13.053055 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:40) [common]
211 12:56:13.054055 runner path: /var/lib/lava/dispatcher/tmp/10130708/lava-overlay-1jhrz428/lava-10130708/0/tests/1_kselftest-alsa test_uuid 10130708_1.5.2.3.5
212 12:56:13.054150 BOARD='asus-cx9400-volteer'
213 12:56:13.054215 BRANCH='cip-gitlab'
214 12:56:13.054276 SKIPFILE='/dev/null'
215 12:56:13.054335 SKIP_INSTALL='True'
216 12:56:13.054392 TESTPROG_URL='None'
217 12:56:13.054448 TST_CASENAME=''
218 12:56:13.054504 TST_CMDFILES='alsa'
219 12:56:13.054643 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
221 12:56:13.054862 Creating lava-test-runner.conf files
222 12:56:13.054937 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10130708/lava-overlay-1jhrz428/lava-10130708/0 for stage 0
223 12:56:13.055029 - 0_timesync-off
224 12:56:13.055101 - 1_kselftest-alsa
225 12:56:13.055196 end: 1.5.2.3 test-definition (duration 00:00:07) [common]
226 12:56:13.055295 start: 1.5.2.4 compress-overlay (timeout 00:09:40) [common]
227 12:56:20.522970 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
228 12:56:20.523128 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:33) [common]
229 12:56:20.523232 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
230 12:56:20.523335 end: 1.5.2 lava-overlay (duration 00:00:15) [common]
231 12:56:20.523424 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:33) [common]
232 12:56:20.676237 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
233 12:56:20.676654 start: 1.5.4 extract-modules (timeout 00:09:33) [common]
234 12:56:20.676802 extracting modules file /var/lib/lava/dispatcher/tmp/10130708/tftp-deploy-5ko6a6tk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10130708/extract-nfsrootfs-34tqjyal
235 12:56:20.706380 extracting modules file /var/lib/lava/dispatcher/tmp/10130708/tftp-deploy-5ko6a6tk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10130708/extract-overlay-ramdisk-lyqtlrim/ramdisk
236 12:56:20.734954 end: 1.5.4 extract-modules (duration 00:00:00) [common]
237 12:56:20.735141 start: 1.5.5 apply-overlay-tftp (timeout 00:09:33) [common]
238 12:56:20.735269 [common] Applying overlay to NFS
239 12:56:20.735366 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10130708/compress-overlay-7t8433mx/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10130708/extract-nfsrootfs-34tqjyal
240 12:56:21.640988 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
241 12:56:21.641165 start: 1.5.6 configure-preseed-file (timeout 00:09:32) [common]
242 12:56:21.641263 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
243 12:56:21.641350 start: 1.5.7 compress-ramdisk (timeout 00:09:32) [common]
244 12:56:21.641445 Building ramdisk /var/lib/lava/dispatcher/tmp/10130708/extract-overlay-ramdisk-lyqtlrim/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10130708/extract-overlay-ramdisk-lyqtlrim/ramdisk
245 12:56:21.723709 >> 34850 blocks
246 12:56:22.407192 rename /var/lib/lava/dispatcher/tmp/10130708/extract-overlay-ramdisk-lyqtlrim/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10130708/tftp-deploy-5ko6a6tk/ramdisk/ramdisk.cpio.gz
247 12:56:22.407641 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
248 12:56:22.407759 start: 1.5.8 prepare-kernel (timeout 00:09:31) [common]
249 12:56:22.407864 start: 1.5.8.1 prepare-fit (timeout 00:09:31) [common]
250 12:56:22.407974 No mkimage arch provided, not using FIT.
251 12:56:22.408064 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
252 12:56:22.408151 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
253 12:56:22.408260 end: 1.5 prepare-tftp-overlay (duration 00:00:20) [common]
254 12:56:22.408356 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:31) [common]
255 12:56:22.408433 No LXC device requested
256 12:56:22.408529 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 12:56:22.408615 start: 1.7 deploy-device-env (timeout 00:09:31) [common]
258 12:56:22.408697 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 12:56:22.408767 Checking files for TFTP limit of 4294967296 bytes.
260 12:56:22.409181 end: 1 tftp-deploy (duration 00:00:29) [common]
261 12:56:22.409284 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 12:56:22.409370 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 12:56:22.409521 substitutions:
264 12:56:22.409618 - {DTB}: None
265 12:56:22.409715 - {INITRD}: 10130708/tftp-deploy-5ko6a6tk/ramdisk/ramdisk.cpio.gz
266 12:56:22.409803 - {KERNEL}: 10130708/tftp-deploy-5ko6a6tk/kernel/bzImage
267 12:56:22.409891 - {LAVA_MAC}: None
268 12:56:22.409966 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10130708/extract-nfsrootfs-34tqjyal
269 12:56:22.410027 - {NFS_SERVER_IP}: 192.168.201.1
270 12:56:22.410083 - {PRESEED_CONFIG}: None
271 12:56:22.410138 - {PRESEED_LOCAL}: None
272 12:56:22.410208 - {RAMDISK}: 10130708/tftp-deploy-5ko6a6tk/ramdisk/ramdisk.cpio.gz
273 12:56:22.410263 - {ROOT_PART}: None
274 12:56:22.410317 - {ROOT}: None
275 12:56:22.410372 - {SERVER_IP}: 192.168.201.1
276 12:56:22.410426 - {TEE}: None
277 12:56:22.410480 Parsed boot commands:
278 12:56:22.410533 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
279 12:56:22.410715 Parsed boot commands: tftpboot 192.168.201.1 10130708/tftp-deploy-5ko6a6tk/kernel/bzImage 10130708/tftp-deploy-5ko6a6tk/kernel/cmdline 10130708/tftp-deploy-5ko6a6tk/ramdisk/ramdisk.cpio.gz
280 12:56:22.410807 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
281 12:56:22.410894 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
282 12:56:22.410983 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
283 12:56:22.411069 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
284 12:56:22.411139 Not connected, no need to disconnect.
285 12:56:22.411211 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
286 12:56:22.411294 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
287 12:56:22.411361 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-10'
288 12:56:22.414670 Setting prompt string to ['lava-test: # ']
289 12:56:22.415013 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
290 12:56:22.415120 end: 2.2.1 reset-connection (duration 00:00:00) [common]
291 12:56:22.415215 start: 2.2.2 reset-device (timeout 00:05:00) [common]
292 12:56:22.415304 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
293 12:56:22.415499 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=reboot'
294 12:56:27.547908 >> Command sent successfully.
295 12:56:27.550280 Returned 0 in 5 seconds
296 12:56:27.650650 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
298 12:56:27.651099 end: 2.2.2 reset-device (duration 00:00:05) [common]
299 12:56:27.651257 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
300 12:56:27.651397 Setting prompt string to 'Starting depthcharge on Voema...'
301 12:56:27.651510 Changing prompt to 'Starting depthcharge on Voema...'
302 12:56:27.651615 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
303 12:56:27.651980 [Enter `^Ec?' for help]
304 12:56:27.707139
305 12:56:29.310906 pass: trace/gl
306 12:56:29.311470
307 12:56:29.320645 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
308 12:56:29.327062 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
309 12:56:29.330061 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
310 12:56:29.333698 CPU: AES supported, TXT NOT supported, VT supported
311 12:56:29.339967 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
312 12:56:29.346611 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
313 12:56:29.350386 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
314 12:56:29.353958 VBOOT: Loading verstage.
315 12:56:29.356970 FMAP: Found "FLASH" version 1.1 at 0x1804000.
316 12:56:29.364386 FMAP: base = 0x0 size = 0x2000000 #areas = 32
317 12:56:29.368062 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
318 12:56:29.377893 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
319 12:56:29.384566 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
320 12:56:29.384993
321 12:56:29.385326
322 12:56:29.397920 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
323 12:56:29.411412 Probing TPM: . done!
324 12:56:29.414975 TPM ready after 0 ms
325 12:56:29.417825 Connected to device vid:did:rid of 1ae0:0028:00
326 12:56:29.429155 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
327 12:56:29.435702 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
328 12:56:29.439234 Initialized TPM device CR50 revision 0
329 12:56:29.490766 tlcl_send_startup: Startup return code is 0
330 12:56:29.491220 TPM: setup succeeded
331 12:56:29.505867 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
332 12:56:29.520446 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
333 12:56:29.532819 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
334 12:56:29.543027 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
335 12:56:29.546433 Chrome EC: UHEPI supported
336 12:56:29.549979 Phase 1
337 12:56:29.553456 FMAP: area GBB found @ 1805000 (458752 bytes)
338 12:56:29.563030 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
339 12:56:29.569502 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
340 12:56:29.576053 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
341 12:56:29.582720 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
342 12:56:29.586339 Recovery requested (1009000e)
343 12:56:29.589761 TPM: Extending digest for VBOOT: boot mode into PCR 0
344 12:56:29.601445 tlcl_extend: response is 0
345 12:56:29.607926 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
346 12:56:29.617851 tlcl_extend: response is 0
347 12:56:29.624808 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
348 12:56:29.631105 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
349 12:56:29.638002 BS: verstage times (exec / console): total (unknown) / 142 ms
350 12:56:29.638523
351 12:56:29.638921
352 12:56:29.650965 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
353 12:56:29.657408 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
354 12:56:29.660957 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
355 12:56:29.664068 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
356 12:56:29.670938 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
357 12:56:29.674117 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
358 12:56:29.677588 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
359 12:56:29.680703 TCO_STS: 0000 0000
360 12:56:29.683886 GEN_PMCON: d0015038 00002200
361 12:56:29.687455 GBLRST_CAUSE: 00000000 00000000
362 12:56:29.690540 HPR_CAUSE0: 00000000
363 12:56:29.690964 prev_sleep_state 5
364 12:56:29.693863 Boot Count incremented to 16677
365 12:56:29.700346 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
366 12:56:29.706969 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
367 12:56:29.716742 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
368 12:56:29.723626 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
369 12:56:29.727179 Chrome EC: UHEPI supported
370 12:56:29.736654 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
371 12:56:29.749895 Probing TPM: done!
372 12:56:29.756129 Connected to device vid:did:rid of 1ae0:0028:00
373 12:56:29.766292 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
374 12:56:29.769321 Initialized TPM device CR50 revision 0
375 12:56:29.784524 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
376 12:56:29.791124 MRC: Hash idx 0x100b comparison successful.
377 12:56:29.794341 MRC cache found, size faa8
378 12:56:29.794769 bootmode is set to: 2
379 12:56:29.797764 SPD index = 2
380 12:56:29.804525 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
381 12:56:29.807439 SPD: module type is LPDDR4X
382 12:56:29.814371 SPD: module part number is MT53D1G64D4NW-046
383 12:56:29.820935 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
384 12:56:29.824551 SPD: device width 16 bits, bus width 16 bits
385 12:56:29.827374 SPD: module size is 2048 MB (per channel)
386 12:56:30.259884 CBMEM:
387 12:56:30.263295 IMD: root @ 0x76fff000 254 entries.
388 12:56:30.266627 IMD: root @ 0x76ffec00 62 entries.
389 12:56:30.269589 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
390 12:56:30.276576 FMAP: area RW_VPD found @ f35000 (8192 bytes)
391 12:56:30.279574 External stage cache:
392 12:56:30.282872 IMD: root @ 0x7b3ff000 254 entries.
393 12:56:30.286374 IMD: root @ 0x7b3fec00 62 entries.
394 12:56:30.301462 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
395 12:56:30.309158 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
396 12:56:30.315744 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
397 12:56:30.328518 MRC: 'RECOVERY_MRC_CACHE' does not need update.
398 12:56:30.334617 cse_lite: Skip switching to RW in the recovery path
399 12:56:30.335051 8 DIMMs found
400 12:56:30.335415 SMM Memory Map
401 12:56:30.341556 SMRAM : 0x7b000000 0x800000
402 12:56:30.344470 Subregion 0: 0x7b000000 0x200000
403 12:56:30.347975 Subregion 1: 0x7b200000 0x200000
404 12:56:30.351249 Subregion 2: 0x7b400000 0x400000
405 12:56:30.351680 top_of_ram = 0x77000000
406 12:56:30.357847 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
407 12:56:30.364633 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
408 12:56:30.367834 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
409 12:56:30.374194 MTRR Range: Start=ff000000 End=0 (Size 1000000)
410 12:56:30.380846 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
411 12:56:30.387401 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
412 12:56:30.397821 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
413 12:56:30.404285 Processing 211 relocs. Offset value of 0x74c0b000
414 12:56:30.411331 BS: romstage times (exec / console): total (unknown) / 277 ms
415 12:56:30.417046
416 12:56:30.417516
417 12:56:30.426922 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
418 12:56:30.429934 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
419 12:56:30.440237 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
420 12:56:30.446387 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
421 12:56:30.453511 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
422 12:56:30.459431 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
423 12:56:30.503980 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
424 12:56:30.510542 Processing 5008 relocs. Offset value of 0x75d98000
425 12:56:30.513560 BS: postcar times (exec / console): total (unknown) / 59 ms
426 12:56:30.517091
427 12:56:30.517555
428 12:56:30.527577 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
429 12:56:30.528024 Normal boot
430 12:56:30.530582 FW_CONFIG value is 0x804c02
431 12:56:30.534120 PCI: 00:07.0 disabled by fw_config
432 12:56:30.537121 PCI: 00:07.1 disabled by fw_config
433 12:56:30.540467 PCI: 00:0d.2 disabled by fw_config
434 12:56:30.543829 PCI: 00:1c.7 disabled by fw_config
435 12:56:30.550406 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
436 12:56:30.557318 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
437 12:56:30.560284 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
438 12:56:30.563873 GENERIC: 0.0 disabled by fw_config
439 12:56:30.567405 GENERIC: 1.0 disabled by fw_config
440 12:56:30.573616 fw_config match found: DB_USB=USB3_ACTIVE
441 12:56:30.577206 fw_config match found: DB_USB=USB3_ACTIVE
442 12:56:30.580394 fw_config match found: DB_USB=USB3_ACTIVE
443 12:56:30.586851 fw_config match found: DB_USB=USB3_ACTIVE
444 12:56:30.590396 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
445 12:56:30.596662 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
446 12:56:30.606833 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
447 12:56:30.613565 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
448 12:56:30.616469 microcode: sig=0x806c1 pf=0x80 revision=0x86
449 12:56:30.623177 microcode: Update skipped, already up-to-date
450 12:56:30.629935 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
451 12:56:30.657784 Detected 4 core, 8 thread CPU.
452 12:56:30.660918 Setting up SMI for CPU
453 12:56:30.663869 IED base = 0x7b400000
454 12:56:30.667270 IED size = 0x00400000
455 12:56:30.667724 Will perform SMM setup.
456 12:56:30.673845 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
457 12:56:30.680269 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
458 12:56:30.686757 Processing 16 relocs. Offset value of 0x00030000
459 12:56:30.690375 Attempting to start 7 APs
460 12:56:30.693333 Waiting for 10ms after sending INIT.
461 12:56:30.709257 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
462 12:56:30.712703 AP: slot 4 apic_id 2.
463 12:56:30.716271 AP: slot 7 apic_id 3.
464 12:56:30.716702 AP: slot 6 apic_id 6.
465 12:56:30.719333 AP: slot 3 apic_id 7.
466 12:56:30.719769 done.
467 12:56:30.722813 AP: slot 2 apic_id 5.
468 12:56:30.723271 AP: slot 5 apic_id 4.
469 12:56:30.729078 Waiting for 2nd SIPI to complete...done.
470 12:56:30.735837 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
471 12:56:30.742296 Processing 13 relocs. Offset value of 0x00038000
472 12:56:30.745378 Unable to locate Global NVS
473 12:56:30.752246 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
474 12:56:30.755505 Installing permanent SMM handler to 0x7b000000
475 12:56:30.765430 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
476 12:56:30.768368 Processing 794 relocs. Offset value of 0x7b010000
477 12:56:30.778565 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
478 12:56:30.781536 Processing 13 relocs. Offset value of 0x7b008000
479 12:56:30.787934 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
480 12:56:30.794744 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
481 12:56:30.801163 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
482 12:56:30.804360 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
483 12:56:30.811503 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
484 12:56:30.817892 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
485 12:56:30.824348 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
486 12:56:30.827868 Unable to locate Global NVS
487 12:56:30.833983 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
488 12:56:30.837800 Clearing SMI status registers
489 12:56:30.840981 SMI_STS: PM1
490 12:56:30.841561 PM1_STS: PWRBTN
491 12:56:30.847634 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
492 12:56:30.850673 In relocation handler: CPU 0
493 12:56:30.856927 New SMBASE=0x7b000000 IEDBASE=0x7b400000
494 12:56:30.860188 Writing SMRR. base = 0x7b000006, mask=0xff800c00
495 12:56:30.864037 Relocation complete.
496 12:56:30.870354 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
497 12:56:30.873345 In relocation handler: CPU 1
498 12:56:30.876835 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
499 12:56:30.880349 Relocation complete.
500 12:56:30.886546 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
501 12:56:30.890037 In relocation handler: CPU 6
502 12:56:30.893271 New SMBASE=0x7affe800 IEDBASE=0x7b400000
503 12:56:30.899579 Writing SMRR. base = 0x7b000006, mask=0xff800c00
504 12:56:30.900008 Relocation complete.
505 12:56:30.909889 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
506 12:56:30.910346 In relocation handler: CPU 3
507 12:56:30.916022 New SMBASE=0x7afff400 IEDBASE=0x7b400000
508 12:56:30.916452 Relocation complete.
509 12:56:30.926092 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
510 12:56:30.926555 In relocation handler: CPU 7
511 12:56:30.932614 New SMBASE=0x7affe400 IEDBASE=0x7b400000
512 12:56:30.933038 Relocation complete.
513 12:56:30.942309 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
514 12:56:30.942753 In relocation handler: CPU 4
515 12:56:30.949336 New SMBASE=0x7afff000 IEDBASE=0x7b400000
516 12:56:30.952499 Writing SMRR. base = 0x7b000006, mask=0xff800c00
517 12:56:30.955877 Relocation complete.
518 12:56:30.962383 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
519 12:56:30.966100 In relocation handler: CPU 2
520 12:56:30.969665 New SMBASE=0x7afff800 IEDBASE=0x7b400000
521 12:56:30.973272 Relocation complete.
522 12:56:30.979755 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
523 12:56:30.983418 In relocation handler: CPU 5
524 12:56:30.986687 New SMBASE=0x7affec00 IEDBASE=0x7b400000
525 12:56:30.989621 Writing SMRR. base = 0x7b000006, mask=0xff800c00
526 12:56:30.993276 Relocation complete.
527 12:56:30.996549 Initializing CPU #0
528 12:56:30.999885 CPU: vendor Intel device 806c1
529 12:56:31.002970 CPU: family 06, model 8c, stepping 01
530 12:56:31.006248 Clearing out pending MCEs
531 12:56:31.006709 Setting up local APIC...
532 12:56:31.009517 apic_id: 0x00 done.
533 12:56:31.012542 Turbo is available but hidden
534 12:56:31.015903 Turbo is available and visible
535 12:56:31.019070 microcode: Update skipped, already up-to-date
536 12:56:31.022577 CPU #0 initialized
537 12:56:31.025776 Initializing CPU #7
538 12:56:31.026205 Initializing CPU #4
539 12:56:31.029202 CPU: vendor Intel device 806c1
540 12:56:31.032401 CPU: family 06, model 8c, stepping 01
541 12:56:31.036081 CPU: vendor Intel device 806c1
542 12:56:31.042095 CPU: family 06, model 8c, stepping 01
543 12:56:31.042540 Initializing CPU #3
544 12:56:31.045585 Initializing CPU #6
545 12:56:31.049030 CPU: vendor Intel device 806c1
546 12:56:31.052535 CPU: family 06, model 8c, stepping 01
547 12:56:31.055467 CPU: vendor Intel device 806c1
548 12:56:31.058965 CPU: family 06, model 8c, stepping 01
549 12:56:31.062468 Clearing out pending MCEs
550 12:56:31.062924 Initializing CPU #5
551 12:56:31.065347 Initializing CPU #2
552 12:56:31.068771 CPU: vendor Intel device 806c1
553 12:56:31.072170 CPU: family 06, model 8c, stepping 01
554 12:56:31.075684 CPU: vendor Intel device 806c1
555 12:56:31.078859 CPU: family 06, model 8c, stepping 01
556 12:56:31.081895 Clearing out pending MCEs
557 12:56:31.085365 Clearing out pending MCEs
558 12:56:31.088847 Setting up local APIC...
559 12:56:31.089564 Initializing CPU #1
560 12:56:31.091755 Clearing out pending MCEs
561 12:56:31.095317 Clearing out pending MCEs
562 12:56:31.098930 Setting up local APIC...
563 12:56:31.099468 apic_id: 0x04 done.
564 12:56:31.101823 Setting up local APIC...
565 12:56:31.105401 Setting up local APIC...
566 12:56:31.108656 microcode: Update skipped, already up-to-date
567 12:56:31.111818 apic_id: 0x02 done.
568 12:56:31.112348 apic_id: 0x03 done.
569 12:56:31.118556 microcode: Update skipped, already up-to-date
570 12:56:31.121772 microcode: Update skipped, already up-to-date
571 12:56:31.124881 CPU #4 initialized
572 12:56:31.125380 CPU #7 initialized
573 12:56:31.128481 CPU #5 initialized
574 12:56:31.131489 apic_id: 0x05 done.
575 12:56:31.135182 CPU: vendor Intel device 806c1
576 12:56:31.138091 CPU: family 06, model 8c, stepping 01
577 12:56:31.138658 Setting up local APIC...
578 12:56:31.141659 Clearing out pending MCEs
579 12:56:31.145173 apic_id: 0x07 done.
580 12:56:31.147993 Clearing out pending MCEs
581 12:56:31.151452 microcode: Update skipped, already up-to-date
582 12:56:31.154733 Setting up local APIC...
583 12:56:31.158180 Setting up local APIC...
584 12:56:31.158620 CPU #3 initialized
585 12:56:31.161678 apic_id: 0x06 done.
586 12:56:31.164611 microcode: Update skipped, already up-to-date
587 12:56:31.171168 microcode: Update skipped, already up-to-date
588 12:56:31.171595 apic_id: 0x01 done.
589 12:56:31.174392 CPU #2 initialized
590 12:56:31.174818 CPU #6 initialized
591 12:56:31.181307 microcode: Update skipped, already up-to-date
592 12:56:31.184249 CPU #1 initialized
593 12:56:31.187929 bsp_do_flight_plan done after 454 msecs.
594 12:56:31.190809 CPU: frequency set to 4400 MHz
595 12:56:31.191240 Enabling SMIs.
596 12:56:31.197341 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
597 12:56:31.214400 SATAXPCIE1 indicates PCIe NVMe is present
598 12:56:31.217448 Probing TPM: done!
599 12:56:31.220539 Connected to device vid:did:rid of 1ae0:0028:00
600 12:56:31.231618 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
601 12:56:31.234785 Initialized TPM device CR50 revision 0
602 12:56:31.237759 Enabling S0i3.4
603 12:56:31.244830 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
604 12:56:31.247859 Found a VBT of 8704 bytes after decompression
605 12:56:31.254430 cse_lite: CSE RO boot. HybridStorageMode disabled
606 12:56:31.261019 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
607 12:56:31.337026 FSPS returned 0
608 12:56:31.340295 Executing Phase 1 of FspMultiPhaseSiInit
609 12:56:31.350415 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
610 12:56:31.353606 port C0 DISC req: usage 1 usb3 1 usb2 5
611 12:56:31.356673 Raw Buffer output 0 00000511
612 12:56:31.359956 Raw Buffer output 1 00000000
613 12:56:31.363726 pmc_send_ipc_cmd succeeded
614 12:56:31.370966 port C1 DISC req: usage 1 usb3 2 usb2 3
615 12:56:31.371481 Raw Buffer output 0 00000321
616 12:56:31.373779 Raw Buffer output 1 00000000
617 12:56:31.377776 pmc_send_ipc_cmd succeeded
618 12:56:31.382788 Detected 4 core, 8 thread CPU.
619 12:56:31.386049 Detected 4 core, 8 thread CPU.
620 12:56:31.586320 Display FSP Version Info HOB
621 12:56:31.589367 Reference Code - CPU = a.0.4c.31
622 12:56:31.592785 uCode Version = 0.0.0.86
623 12:56:31.596374 TXT ACM version = ff.ff.ff.ffff
624 12:56:31.599371 Reference Code - ME = a.0.4c.31
625 12:56:31.602885 MEBx version = 0.0.0.0
626 12:56:31.605930 ME Firmware Version = Consumer SKU
627 12:56:31.609432 Reference Code - PCH = a.0.4c.31
628 12:56:31.612425 PCH-CRID Status = Disabled
629 12:56:31.615810 PCH-CRID Original Value = ff.ff.ff.ffff
630 12:56:31.619307 PCH-CRID New Value = ff.ff.ff.ffff
631 12:56:31.622124 OPROM - RST - RAID = ff.ff.ff.ffff
632 12:56:31.625574 PCH Hsio Version = 4.0.0.0
633 12:56:31.629084 Reference Code - SA - System Agent = a.0.4c.31
634 12:56:31.632172 Reference Code - MRC = 2.0.0.1
635 12:56:31.635763 SA - PCIe Version = a.0.4c.31
636 12:56:31.638611 SA-CRID Status = Disabled
637 12:56:31.642064 SA-CRID Original Value = 0.0.0.1
638 12:56:31.645176 SA-CRID New Value = 0.0.0.1
639 12:56:31.648762 OPROM - VBIOS = ff.ff.ff.ffff
640 12:56:31.651570 IO Manageability Engine FW Version = 11.1.4.0
641 12:56:31.655199 PHY Build Version = 0.0.0.e0
642 12:56:31.658202 Thunderbolt(TM) FW Version = 0.0.0.0
643 12:56:31.664724 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
644 12:56:31.668167 ITSS IRQ Polarities Before:
645 12:56:31.671525 IPC0: 0xffffffff
646 12:56:31.671927 IPC1: 0xffffffff
647 12:56:31.674538 IPC2: 0xffffffff
648 12:56:31.674845 IPC3: 0xffffffff
649 12:56:31.677920 ITSS IRQ Polarities After:
650 12:56:31.681119 IPC0: 0xffffffff
651 12:56:31.681425 IPC1: 0xffffffff
652 12:56:31.684272 IPC2: 0xffffffff
653 12:56:31.684522 IPC3: 0xffffffff
654 12:56:31.690712 Found PCIe Root Port #9 at PCI: 00:1d.0.
655 12:56:31.700499 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
656 12:56:31.713642 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
657 12:56:31.723367 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
658 12:56:31.729922 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
659 12:56:31.733457 Enumerating buses...
660 12:56:31.736518 Show all devs... Before device enumeration.
661 12:56:31.740141 Root Device: enabled 1
662 12:56:31.743576 DOMAIN: 0000: enabled 1
663 12:56:31.746643 CPU_CLUSTER: 0: enabled 1
664 12:56:31.746725 PCI: 00:00.0: enabled 1
665 12:56:31.749635 PCI: 00:02.0: enabled 1
666 12:56:31.753160 PCI: 00:04.0: enabled 1
667 12:56:31.756381 PCI: 00:05.0: enabled 1
668 12:56:31.756465 PCI: 00:06.0: enabled 0
669 12:56:31.759948 PCI: 00:07.0: enabled 0
670 12:56:31.762877 PCI: 00:07.1: enabled 0
671 12:56:31.766567 PCI: 00:07.2: enabled 0
672 12:56:31.766650 PCI: 00:07.3: enabled 0
673 12:56:31.769370 PCI: 00:08.0: enabled 1
674 12:56:31.773128 PCI: 00:09.0: enabled 0
675 12:56:31.776215 PCI: 00:0a.0: enabled 0
676 12:56:31.776314 PCI: 00:0d.0: enabled 1
677 12:56:31.779247 PCI: 00:0d.1: enabled 0
678 12:56:31.782436 PCI: 00:0d.2: enabled 0
679 12:56:31.785855 PCI: 00:0d.3: enabled 0
680 12:56:31.785938 PCI: 00:0e.0: enabled 0
681 12:56:31.789056 PCI: 00:10.2: enabled 1
682 12:56:31.792547 PCI: 00:10.6: enabled 0
683 12:56:31.792631 PCI: 00:10.7: enabled 0
684 12:56:31.796100 PCI: 00:12.0: enabled 0
685 12:56:31.799084 PCI: 00:12.6: enabled 0
686 12:56:31.802433 PCI: 00:13.0: enabled 0
687 12:56:31.802517 PCI: 00:14.0: enabled 1
688 12:56:31.805903 PCI: 00:14.1: enabled 0
689 12:56:31.809026 PCI: 00:14.2: enabled 1
690 12:56:31.812095 PCI: 00:14.3: enabled 1
691 12:56:31.812178 PCI: 00:15.0: enabled 1
692 12:56:31.815603 PCI: 00:15.1: enabled 1
693 12:56:31.818627 PCI: 00:15.2: enabled 1
694 12:56:31.822187 PCI: 00:15.3: enabled 1
695 12:56:31.822271 PCI: 00:16.0: enabled 1
696 12:56:31.825599 PCI: 00:16.1: enabled 0
697 12:56:31.828652 PCI: 00:16.2: enabled 0
698 12:56:31.832109 PCI: 00:16.3: enabled 0
699 12:56:31.832197 PCI: 00:16.4: enabled 0
700 12:56:31.835136 PCI: 00:16.5: enabled 0
701 12:56:31.838534 PCI: 00:17.0: enabled 1
702 12:56:31.842161 PCI: 00:19.0: enabled 0
703 12:56:31.842249 PCI: 00:19.1: enabled 1
704 12:56:31.845025 PCI: 00:19.2: enabled 0
705 12:56:31.848497 PCI: 00:1c.0: enabled 1
706 12:56:31.851961 PCI: 00:1c.1: enabled 0
707 12:56:31.852049 PCI: 00:1c.2: enabled 0
708 12:56:31.855026 PCI: 00:1c.3: enabled 0
709 12:56:31.858252 PCI: 00:1c.4: enabled 0
710 12:56:31.861616 PCI: 00:1c.5: enabled 0
711 12:56:31.861704 PCI: 00:1c.6: enabled 1
712 12:56:31.865301 PCI: 00:1c.7: enabled 0
713 12:56:31.868312 PCI: 00:1d.0: enabled 1
714 12:56:31.871489 PCI: 00:1d.1: enabled 0
715 12:56:31.871605 PCI: 00:1d.2: enabled 1
716 12:56:31.874917 PCI: 00:1d.3: enabled 0
717 12:56:31.877922 PCI: 00:1e.0: enabled 1
718 12:56:31.881025 PCI: 00:1e.1: enabled 0
719 12:56:31.881110 PCI: 00:1e.2: enabled 1
720 12:56:31.884675 PCI: 00:1e.3: enabled 1
721 12:56:31.887709 PCI: 00:1f.0: enabled 1
722 12:56:31.887794 PCI: 00:1f.1: enabled 0
723 12:56:31.891325 PCI: 00:1f.2: enabled 1
724 12:56:31.894568 PCI: 00:1f.3: enabled 1
725 12:56:31.897778 PCI: 00:1f.4: enabled 0
726 12:56:31.897866 PCI: 00:1f.5: enabled 1
727 12:56:31.900887 PCI: 00:1f.6: enabled 0
728 12:56:31.904241 PCI: 00:1f.7: enabled 0
729 12:56:31.907686 APIC: 00: enabled 1
730 12:56:31.907771 GENERIC: 0.0: enabled 1
731 12:56:31.911091 GENERIC: 0.0: enabled 1
732 12:56:31.914070 GENERIC: 1.0: enabled 1
733 12:56:31.917613 GENERIC: 0.0: enabled 1
734 12:56:31.917698 GENERIC: 1.0: enabled 1
735 12:56:31.920805 USB0 port 0: enabled 1
736 12:56:31.924155 GENERIC: 0.0: enabled 1
737 12:56:31.924239 USB0 port 0: enabled 1
738 12:56:31.927226 GENERIC: 0.0: enabled 1
739 12:56:31.930728 I2C: 00:1a: enabled 1
740 12:56:31.934199 I2C: 00:31: enabled 1
741 12:56:31.934284 I2C: 00:32: enabled 1
742 12:56:31.936988 I2C: 00:10: enabled 1
743 12:56:31.940445 I2C: 00:15: enabled 1
744 12:56:31.940530 GENERIC: 0.0: enabled 0
745 12:56:31.943646 GENERIC: 1.0: enabled 0
746 12:56:31.947174 GENERIC: 0.0: enabled 1
747 12:56:31.947259 SPI: 00: enabled 1
748 12:56:31.950194 SPI: 00: enabled 1
749 12:56:31.953661 PNP: 0c09.0: enabled 1
750 12:56:31.953746 GENERIC: 0.0: enabled 1
751 12:56:31.957106 USB3 port 0: enabled 1
752 12:56:31.960097 USB3 port 1: enabled 1
753 12:56:31.963735 USB3 port 2: enabled 0
754 12:56:31.963820 USB3 port 3: enabled 0
755 12:56:31.967435 USB2 port 0: enabled 0
756 12:56:31.970022 USB2 port 1: enabled 1
757 12:56:31.970107 USB2 port 2: enabled 1
758 12:56:31.973542 USB2 port 3: enabled 0
759 12:56:31.976834 USB2 port 4: enabled 1
760 12:56:31.979962 USB2 port 5: enabled 0
761 12:56:31.980047 USB2 port 6: enabled 0
762 12:56:31.983363 USB2 port 7: enabled 0
763 12:56:31.986654 USB2 port 8: enabled 0
764 12:56:31.986737 USB2 port 9: enabled 0
765 12:56:31.990187 USB3 port 0: enabled 0
766 12:56:31.992981 USB3 port 1: enabled 1
767 12:56:31.996530 USB3 port 2: enabled 0
768 12:56:31.996645 USB3 port 3: enabled 0
769 12:56:32.000042 GENERIC: 0.0: enabled 1
770 12:56:32.003115 GENERIC: 1.0: enabled 1
771 12:56:32.003204 APIC: 01: enabled 1
772 12:56:32.006147 APIC: 05: enabled 1
773 12:56:32.009291 APIC: 07: enabled 1
774 12:56:32.009400 APIC: 02: enabled 1
775 12:56:32.013277 APIC: 04: enabled 1
776 12:56:32.013362 APIC: 06: enabled 1
777 12:56:32.016033 APIC: 03: enabled 1
778 12:56:32.019556 Compare with tree...
779 12:56:32.019640 Root Device: enabled 1
780 12:56:32.022534 DOMAIN: 0000: enabled 1
781 12:56:32.026040 PCI: 00:00.0: enabled 1
782 12:56:32.029636 PCI: 00:02.0: enabled 1
783 12:56:32.032551 PCI: 00:04.0: enabled 1
784 12:56:32.032634 GENERIC: 0.0: enabled 1
785 12:56:32.035820 PCI: 00:05.0: enabled 1
786 12:56:32.039428 PCI: 00:06.0: enabled 0
787 12:56:32.042392 PCI: 00:07.0: enabled 0
788 12:56:32.045914 GENERIC: 0.0: enabled 1
789 12:56:32.048945 PCI: 00:07.1: enabled 0
790 12:56:32.049028 GENERIC: 1.0: enabled 1
791 12:56:32.052398 PCI: 00:07.2: enabled 0
792 12:56:32.055537 GENERIC: 0.0: enabled 1
793 12:56:32.058816 PCI: 00:07.3: enabled 0
794 12:56:32.062296 GENERIC: 1.0: enabled 1
795 12:56:32.062395 PCI: 00:08.0: enabled 1
796 12:56:32.065646 PCI: 00:09.0: enabled 0
797 12:56:32.069010 PCI: 00:0a.0: enabled 0
798 12:56:32.072272 PCI: 00:0d.0: enabled 1
799 12:56:32.075239 USB0 port 0: enabled 1
800 12:56:32.075339 USB3 port 0: enabled 1
801 12:56:32.078563 USB3 port 1: enabled 1
802 12:56:32.081708 USB3 port 2: enabled 0
803 12:56:32.085206 USB3 port 3: enabled 0
804 12:56:32.088551 PCI: 00:0d.1: enabled 0
805 12:56:32.091959 PCI: 00:0d.2: enabled 0
806 12:56:32.092059 GENERIC: 0.0: enabled 1
807 12:56:32.095019 PCI: 00:0d.3: enabled 0
808 12:56:32.098524 PCI: 00:0e.0: enabled 0
809 12:56:32.101378 PCI: 00:10.2: enabled 1
810 12:56:32.105150 PCI: 00:10.6: enabled 0
811 12:56:32.105250 PCI: 00:10.7: enabled 0
812 12:56:32.108389 PCI: 00:12.0: enabled 0
813 12:56:32.111561 PCI: 00:12.6: enabled 0
814 12:56:32.114982 PCI: 00:13.0: enabled 0
815 12:56:32.118242 PCI: 00:14.0: enabled 1
816 12:56:32.118327 USB0 port 0: enabled 1
817 12:56:32.121462 USB2 port 0: enabled 0
818 12:56:32.124807 USB2 port 1: enabled 1
819 12:56:32.127902 USB2 port 2: enabled 1
820 12:56:32.131495 USB2 port 3: enabled 0
821 12:56:32.135161 USB2 port 4: enabled 1
822 12:56:32.135246 USB2 port 5: enabled 0
823 12:56:32.138373 USB2 port 6: enabled 0
824 12:56:32.141119 USB2 port 7: enabled 0
825 12:56:32.144393 USB2 port 8: enabled 0
826 12:56:32.147946 USB2 port 9: enabled 0
827 12:56:32.151017 USB3 port 0: enabled 0
828 12:56:32.151142 USB3 port 1: enabled 1
829 12:56:32.154468 USB3 port 2: enabled 0
830 12:56:32.157890 USB3 port 3: enabled 0
831 12:56:32.161242 PCI: 00:14.1: enabled 0
832 12:56:32.164111 PCI: 00:14.2: enabled 1
833 12:56:32.164198 PCI: 00:14.3: enabled 1
834 12:56:32.167660 GENERIC: 0.0: enabled 1
835 12:56:32.171509 PCI: 00:15.0: enabled 1
836 12:56:32.174139 I2C: 00:1a: enabled 1
837 12:56:32.177365 I2C: 00:31: enabled 1
838 12:56:32.177480 I2C: 00:32: enabled 1
839 12:56:32.180913 PCI: 00:15.1: enabled 1
840 12:56:32.184628 I2C: 00:10: enabled 1
841 12:56:32.187369 PCI: 00:15.2: enabled 1
842 12:56:32.187452 PCI: 00:15.3: enabled 1
843 12:56:32.190921 PCI: 00:16.0: enabled 1
844 12:56:32.194016 PCI: 00:16.1: enabled 0
845 12:56:32.197366 PCI: 00:16.2: enabled 0
846 12:56:32.200858 PCI: 00:16.3: enabled 0
847 12:56:32.200942 PCI: 00:16.4: enabled 0
848 12:56:32.203921 PCI: 00:16.5: enabled 0
849 12:56:32.207252 PCI: 00:17.0: enabled 1
850 12:56:32.211296 PCI: 00:19.0: enabled 0
851 12:56:32.211402 PCI: 00:19.1: enabled 1
852 12:56:32.214789 I2C: 00:15: enabled 1
853 12:56:32.217901 PCI: 00:19.2: enabled 0
854 12:56:32.221167 PCI: 00:1d.0: enabled 1
855 12:56:32.225037 GENERIC: 0.0: enabled 1
856 12:56:32.225137 PCI: 00:1e.0: enabled 1
857 12:56:32.228027 PCI: 00:1e.1: enabled 0
858 12:56:32.231683 PCI: 00:1e.2: enabled 1
859 12:56:32.235097 SPI: 00: enabled 1
860 12:56:32.235181 PCI: 00:1e.3: enabled 1
861 12:56:32.237922 SPI: 00: enabled 1
862 12:56:32.241071 PCI: 00:1f.0: enabled 1
863 12:56:32.244578 PNP: 0c09.0: enabled 1
864 12:56:32.247861 PCI: 00:1f.1: enabled 0
865 12:56:32.247945 PCI: 00:1f.2: enabled 1
866 12:56:32.251238 GENERIC: 0.0: enabled 1
867 12:56:32.302894 GENERIC: 0.0: enabled 1
868 12:56:32.303034 GENERIC: 1.0: enabled 1
869 12:56:32.303323 PCI: 00:1f.3: enabled 1
870 12:56:32.303398 PCI: 00:1f.4: enabled 0
871 12:56:32.303477 PCI: 00:1f.5: enabled 1
872 12:56:32.303554 PCI: 00:1f.6: enabled 0
873 12:56:32.303630 PCI: 00:1f.7: enabled 0
874 12:56:32.303891 CPU_CLUSTER: 0: enabled 1
875 12:56:32.303962 APIC: 00: enabled 1
876 12:56:32.304038 APIC: 01: enabled 1
877 12:56:32.304326 APIC: 05: enabled 1
878 12:56:32.304422 APIC: 07: enabled 1
879 12:56:32.304702 APIC: 02: enabled 1
880 12:56:32.304795 APIC: 04: enabled 1
881 12:56:32.304889 APIC: 06: enabled 1
882 12:56:32.305365 APIC: 03: enabled 1
883 12:56:32.305450 Root Device scanning...
884 12:56:32.305750 scan_static_bus for Root Device
885 12:56:32.305850 DOMAIN: 0000 enabled
886 12:56:32.305931 CPU_CLUSTER: 0 enabled
887 12:56:32.326268 DOMAIN: 0000 scanning...
888 12:56:32.326357 PCI: pci_scan_bus for bus 00
889 12:56:32.326846 PCI: 00:00.0 [8086/0000] ops
890 12:56:32.326930 PCI: 00:00.0 [8086/9a12] enabled
891 12:56:32.327194 PCI: 00:02.0 [8086/0000] bus ops
892 12:56:32.327266 PCI: 00:02.0 [8086/9a40] enabled
893 12:56:32.329915 PCI: 00:04.0 [8086/0000] bus ops
894 12:56:32.329999 PCI: 00:04.0 [8086/9a03] enabled
895 12:56:32.333037 PCI: 00:05.0 [8086/9a19] enabled
896 12:56:32.336191 PCI: 00:07.0 [0000/0000] hidden
897 12:56:32.339846 PCI: 00:08.0 [8086/9a11] enabled
898 12:56:32.343169 PCI: 00:0a.0 [8086/9a0d] disabled
899 12:56:32.346203 PCI: 00:0d.0 [8086/0000] bus ops
900 12:56:32.349874 PCI: 00:0d.0 [8086/9a13] enabled
901 12:56:32.352823 PCI: 00:14.0 [8086/0000] bus ops
902 12:56:32.355873 PCI: 00:14.0 [8086/a0ed] enabled
903 12:56:32.359424 PCI: 00:14.2 [8086/a0ef] enabled
904 12:56:32.362883 PCI: 00:14.3 [8086/0000] bus ops
905 12:56:32.366005 PCI: 00:14.3 [8086/a0f0] enabled
906 12:56:32.369355 PCI: 00:15.0 [8086/0000] bus ops
907 12:56:32.372348 PCI: 00:15.0 [8086/a0e8] enabled
908 12:56:32.375754 PCI: 00:15.1 [8086/0000] bus ops
909 12:56:32.379510 PCI: 00:15.1 [8086/a0e9] enabled
910 12:56:32.382478 PCI: 00:15.2 [8086/0000] bus ops
911 12:56:32.385727 PCI: 00:15.2 [8086/a0ea] enabled
912 12:56:32.389232 PCI: 00:15.3 [8086/0000] bus ops
913 12:56:32.392262 PCI: 00:15.3 [8086/a0eb] enabled
914 12:56:32.395788 PCI: 00:16.0 [8086/0000] ops
915 12:56:32.398815 PCI: 00:16.0 [8086/a0e0] enabled
916 12:56:32.402412 PCI: Static device PCI: 00:17.0 not found, disabling it.
917 12:56:32.405575 PCI: 00:19.0 [8086/0000] bus ops
918 12:56:32.408710 PCI: 00:19.0 [8086/a0c5] disabled
919 12:56:32.412254 PCI: 00:19.1 [8086/0000] bus ops
920 12:56:32.415524 PCI: 00:19.1 [8086/a0c6] enabled
921 12:56:32.418454 PCI: 00:1d.0 [8086/0000] bus ops
922 12:56:32.421931 PCI: 00:1d.0 [8086/a0b0] enabled
923 12:56:32.425458 PCI: 00:1e.0 [8086/0000] ops
924 12:56:32.428425 PCI: 00:1e.0 [8086/a0a8] enabled
925 12:56:32.431878 PCI: 00:1e.2 [8086/0000] bus ops
926 12:56:32.435023 PCI: 00:1e.2 [8086/a0aa] enabled
927 12:56:32.438221 PCI: 00:1e.3 [8086/0000] bus ops
928 12:56:32.442190 PCI: 00:1e.3 [8086/a0ab] enabled
929 12:56:32.445237 PCI: 00:1f.0 [8086/0000] bus ops
930 12:56:32.448125 PCI: 00:1f.0 [8086/a087] enabled
931 12:56:32.451597 RTC Init
932 12:56:32.454895 Set power on after power failure.
933 12:56:32.454977 Disabling Deep S3
934 12:56:32.458387 Disabling Deep S3
935 12:56:32.461586 Disabling Deep S4
936 12:56:32.461668 Disabling Deep S4
937 12:56:32.465361 Disabling Deep S5
938 12:56:32.465475 Disabling Deep S5
939 12:56:32.468132 PCI: 00:1f.2 [0000/0000] hidden
940 12:56:32.471345 PCI: 00:1f.3 [8086/0000] bus ops
941 12:56:32.474981 PCI: 00:1f.3 [8086/a0c8] enabled
942 12:56:32.478035 PCI: 00:1f.5 [8086/0000] bus ops
943 12:56:32.481516 PCI: 00:1f.5 [8086/a0a4] enabled
944 12:56:32.484556 PCI: Leftover static devices:
945 12:56:32.488058 PCI: 00:10.2
946 12:56:32.488139 PCI: 00:10.6
947 12:56:32.491209 PCI: 00:10.7
948 12:56:32.491290 PCI: 00:06.0
949 12:56:32.491354 PCI: 00:07.1
950 12:56:32.494936 PCI: 00:07.2
951 12:56:32.495017 PCI: 00:07.3
952 12:56:32.497793 PCI: 00:09.0
953 12:56:32.497874 PCI: 00:0d.1
954 12:56:32.497938 PCI: 00:0d.2
955 12:56:32.501304 PCI: 00:0d.3
956 12:56:32.501385 PCI: 00:0e.0
957 12:56:32.504298 PCI: 00:12.0
958 12:56:32.504379 PCI: 00:12.6
959 12:56:32.507577 PCI: 00:13.0
960 12:56:32.507664 PCI: 00:14.1
961 12:56:32.507742 PCI: 00:16.1
962 12:56:32.511007 PCI: 00:16.2
963 12:56:32.511087 PCI: 00:16.3
964 12:56:32.514078 PCI: 00:16.4
965 12:56:32.514158 PCI: 00:16.5
966 12:56:32.514221 PCI: 00:17.0
967 12:56:32.517463 PCI: 00:19.2
968 12:56:32.517567 PCI: 00:1e.1
969 12:56:32.520611 PCI: 00:1f.1
970 12:56:32.520691 PCI: 00:1f.4
971 12:56:32.520754 PCI: 00:1f.6
972 12:56:32.524136 PCI: 00:1f.7
973 12:56:32.527151 PCI: Check your devicetree.cb.
974 12:56:32.530725 PCI: 00:02.0 scanning...
975 12:56:32.533794 scan_generic_bus for PCI: 00:02.0
976 12:56:32.537178 scan_generic_bus for PCI: 00:02.0 done
977 12:56:32.540551 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
978 12:56:32.543970 PCI: 00:04.0 scanning...
979 12:56:32.547179 scan_generic_bus for PCI: 00:04.0
980 12:56:32.550252 GENERIC: 0.0 enabled
981 12:56:32.557042 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
982 12:56:32.560355 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
983 12:56:32.563887 PCI: 00:0d.0 scanning...
984 12:56:32.566980 scan_static_bus for PCI: 00:0d.0
985 12:56:32.570331 USB0 port 0 enabled
986 12:56:32.570414 USB0 port 0 scanning...
987 12:56:32.573414 scan_static_bus for USB0 port 0
988 12:56:32.576756 USB3 port 0 enabled
989 12:56:32.580358 USB3 port 1 enabled
990 12:56:32.580443 USB3 port 2 disabled
991 12:56:32.583617 USB3 port 3 disabled
992 12:56:32.586561 USB3 port 0 scanning...
993 12:56:32.590101 scan_static_bus for USB3 port 0
994 12:56:32.593442 scan_static_bus for USB3 port 0 done
995 12:56:32.596589 scan_bus: bus USB3 port 0 finished in 6 msecs
996 12:56:32.599890 USB3 port 1 scanning...
997 12:56:32.603381 scan_static_bus for USB3 port 1
998 12:56:32.606435 scan_static_bus for USB3 port 1 done
999 12:56:32.613265 scan_bus: bus USB3 port 1 finished in 6 msecs
1000 12:56:32.616367 scan_static_bus for USB0 port 0 done
1001 12:56:32.620012 scan_bus: bus USB0 port 0 finished in 43 msecs
1002 12:56:32.623136 scan_static_bus for PCI: 00:0d.0 done
1003 12:56:32.629477 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
1004 12:56:32.632911 PCI: 00:14.0 scanning...
1005 12:56:32.636075 scan_static_bus for PCI: 00:14.0
1006 12:56:32.636180 USB0 port 0 enabled
1007 12:56:32.639535 USB0 port 0 scanning...
1008 12:56:32.642371 scan_static_bus for USB0 port 0
1009 12:56:32.645874 USB2 port 0 disabled
1010 12:56:32.645960 USB2 port 1 enabled
1011 12:56:32.649236 USB2 port 2 enabled
1012 12:56:32.652239 USB2 port 3 disabled
1013 12:56:32.652323 USB2 port 4 enabled
1014 12:56:32.655976 USB2 port 5 disabled
1015 12:56:32.659160 USB2 port 6 disabled
1016 12:56:32.659246 USB2 port 7 disabled
1017 12:56:32.662279 USB2 port 8 disabled
1018 12:56:32.662358 USB2 port 9 disabled
1019 12:56:32.665454 USB3 port 0 disabled
1020 12:56:32.668996 USB3 port 1 enabled
1021 12:56:32.669071 USB3 port 2 disabled
1022 12:56:32.672503 USB3 port 3 disabled
1023 12:56:32.675412 USB2 port 1 scanning...
1024 12:56:32.679058 scan_static_bus for USB2 port 1
1025 12:56:32.681998 scan_static_bus for USB2 port 1 done
1026 12:56:32.685414 scan_bus: bus USB2 port 1 finished in 6 msecs
1027 12:56:32.688978 USB2 port 2 scanning...
1028 12:56:32.691933 scan_static_bus for USB2 port 2
1029 12:56:32.695470 scan_static_bus for USB2 port 2 done
1030 12:56:32.701649 scan_bus: bus USB2 port 2 finished in 6 msecs
1031 12:56:32.701733 USB2 port 4 scanning...
1032 12:56:32.705176 scan_static_bus for USB2 port 4
1033 12:56:32.711573 scan_static_bus for USB2 port 4 done
1034 12:56:32.714987 scan_bus: bus USB2 port 4 finished in 6 msecs
1035 12:56:32.718368 USB3 port 1 scanning...
1036 12:56:32.721870 scan_static_bus for USB3 port 1
1037 12:56:32.724949 scan_static_bus for USB3 port 1 done
1038 12:56:32.728271 scan_bus: bus USB3 port 1 finished in 6 msecs
1039 12:56:32.731519 scan_static_bus for USB0 port 0 done
1040 12:56:32.738307 scan_bus: bus USB0 port 0 finished in 93 msecs
1041 12:56:32.741328 scan_static_bus for PCI: 00:14.0 done
1042 12:56:32.744983 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1043 12:56:32.747888 PCI: 00:14.3 scanning...
1044 12:56:32.751433 scan_static_bus for PCI: 00:14.3
1045 12:56:32.754681 GENERIC: 0.0 enabled
1046 12:56:32.758129 scan_static_bus for PCI: 00:14.3 done
1047 12:56:32.764822 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1048 12:56:32.764929 PCI: 00:15.0 scanning...
1049 12:56:32.767864 scan_static_bus for PCI: 00:15.0
1050 12:56:32.771469 I2C: 00:1a enabled
1051 12:56:32.774268 I2C: 00:31 enabled
1052 12:56:32.774349 I2C: 00:32 enabled
1053 12:56:32.777908 scan_static_bus for PCI: 00:15.0 done
1054 12:56:32.784712 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1055 12:56:32.784794 PCI: 00:15.1 scanning...
1056 12:56:32.788213 scan_static_bus for PCI: 00:15.1
1057 12:56:32.791208 I2C: 00:10 enabled
1058 12:56:32.794836 scan_static_bus for PCI: 00:15.1 done
1059 12:56:32.801224 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1060 12:56:32.801309 PCI: 00:15.2 scanning...
1061 12:56:32.804463 scan_static_bus for PCI: 00:15.2
1062 12:56:32.811389 scan_static_bus for PCI: 00:15.2 done
1063 12:56:32.814434 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1064 12:56:32.817836 PCI: 00:15.3 scanning...
1065 12:56:32.821193 scan_static_bus for PCI: 00:15.3
1066 12:56:32.824603 scan_static_bus for PCI: 00:15.3 done
1067 12:56:32.827683 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1068 12:56:32.831041 PCI: 00:19.1 scanning...
1069 12:56:32.834445 scan_static_bus for PCI: 00:19.1
1070 12:56:32.837806 I2C: 00:15 enabled
1071 12:56:32.840916 scan_static_bus for PCI: 00:19.1 done
1072 12:56:32.847483 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1073 12:56:32.847566 PCI: 00:1d.0 scanning...
1074 12:56:32.850857 do_pci_scan_bridge for PCI: 00:1d.0
1075 12:56:32.854117 PCI: pci_scan_bus for bus 01
1076 12:56:32.857213 PCI: 01:00.0 [15b7/5009] enabled
1077 12:56:32.860739 GENERIC: 0.0 enabled
1078 12:56:32.864033 Enabling Common Clock Configuration
1079 12:56:32.867425 L1 Sub-State supported from root port 29
1080 12:56:32.870346 L1 Sub-State Support = 0x5
1081 12:56:32.874026 CommonModeRestoreTime = 0x28
1082 12:56:32.880387 Power On Value = 0x16, Power On Scale = 0x0
1083 12:56:32.880469 ASPM: Enabled L1
1084 12:56:32.883807 PCIe: Max_Payload_Size adjusted to 128
1085 12:56:32.890375 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1086 12:56:32.890491 PCI: 00:1e.2 scanning...
1087 12:56:32.896944 scan_generic_bus for PCI: 00:1e.2
1088 12:56:32.897094 SPI: 00 enabled
1089 12:56:32.903715 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1090 12:56:32.906826 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1091 12:56:32.910215 PCI: 00:1e.3 scanning...
1092 12:56:32.913224 scan_generic_bus for PCI: 00:1e.3
1093 12:56:32.916681 SPI: 00 enabled
1094 12:56:32.923105 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1095 12:56:32.926531 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1096 12:56:32.930063 PCI: 00:1f.0 scanning...
1097 12:56:32.933129 scan_static_bus for PCI: 00:1f.0
1098 12:56:32.936501 PNP: 0c09.0 enabled
1099 12:56:32.936596 PNP: 0c09.0 scanning...
1100 12:56:32.939821 scan_static_bus for PNP: 0c09.0
1101 12:56:32.942868 scan_static_bus for PNP: 0c09.0 done
1102 12:56:32.949354 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1103 12:56:32.952944 scan_static_bus for PCI: 00:1f.0 done
1104 12:56:32.956301 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1105 12:56:32.959582 PCI: 00:1f.2 scanning...
1106 12:56:32.962634 scan_static_bus for PCI: 00:1f.2
1107 12:56:32.966081 GENERIC: 0.0 enabled
1108 12:56:32.969310 GENERIC: 0.0 scanning...
1109 12:56:32.972321 scan_static_bus for GENERIC: 0.0
1110 12:56:32.972404 GENERIC: 0.0 enabled
1111 12:56:32.976078 GENERIC: 1.0 enabled
1112 12:56:32.979174 scan_static_bus for GENERIC: 0.0 done
1113 12:56:32.985455 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1114 12:56:32.988826 scan_static_bus for PCI: 00:1f.2 done
1115 12:56:32.992203 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1116 12:56:32.995579 PCI: 00:1f.3 scanning...
1117 12:56:32.998610 scan_static_bus for PCI: 00:1f.3
1118 12:56:33.002113 scan_static_bus for PCI: 00:1f.3 done
1119 12:56:33.008451 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1120 12:56:33.012068 PCI: 00:1f.5 scanning...
1121 12:56:33.015418 scan_generic_bus for PCI: 00:1f.5
1122 12:56:33.018343 scan_generic_bus for PCI: 00:1f.5 done
1123 12:56:33.021801 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1124 12:56:33.028505 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1125 12:56:33.031980 scan_static_bus for Root Device done
1126 12:56:33.034981 scan_bus: bus Root Device finished in 736 msecs
1127 12:56:33.038658 done
1128 12:56:33.041961 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1129 12:56:33.045121 Chrome EC: UHEPI supported
1130 12:56:33.051181 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1131 12:56:33.058028 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1132 12:56:33.061485 SPI flash protection: WPSW=0 SRP0=1
1133 12:56:33.068032 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1134 12:56:33.070973 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1135 12:56:33.074453 found VGA at PCI: 00:02.0
1136 12:56:33.077853 Setting up VGA for PCI: 00:02.0
1137 12:56:33.084487 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1138 12:56:33.087450 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1139 12:56:33.090664 Allocating resources...
1140 12:56:33.094016 Reading resources...
1141 12:56:33.097457 Root Device read_resources bus 0 link: 0
1142 12:56:33.100648 DOMAIN: 0000 read_resources bus 0 link: 0
1143 12:56:33.107732 PCI: 00:04.0 read_resources bus 1 link: 0
1144 12:56:33.110735 PCI: 00:04.0 read_resources bus 1 link: 0 done
1145 12:56:33.117701 PCI: 00:0d.0 read_resources bus 0 link: 0
1146 12:56:33.120783 USB0 port 0 read_resources bus 0 link: 0
1147 12:56:33.127186 USB0 port 0 read_resources bus 0 link: 0 done
1148 12:56:33.130796 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1149 12:56:33.137200 PCI: 00:14.0 read_resources bus 0 link: 0
1150 12:56:33.140709 USB0 port 0 read_resources bus 0 link: 0
1151 12:56:33.146928 USB0 port 0 read_resources bus 0 link: 0 done
1152 12:56:33.150356 PCI: 00:14.0 read_resources bus 0 link: 0 done
1153 12:56:33.156745 PCI: 00:14.3 read_resources bus 0 link: 0
1154 12:56:33.160104 PCI: 00:14.3 read_resources bus 0 link: 0 done
1155 12:56:33.167016 PCI: 00:15.0 read_resources bus 0 link: 0
1156 12:56:33.170106 PCI: 00:15.0 read_resources bus 0 link: 0 done
1157 12:56:33.176391 PCI: 00:15.1 read_resources bus 0 link: 0
1158 12:56:33.180122 PCI: 00:15.1 read_resources bus 0 link: 0 done
1159 12:56:33.186522 PCI: 00:19.1 read_resources bus 0 link: 0
1160 12:56:33.190259 PCI: 00:19.1 read_resources bus 0 link: 0 done
1161 12:56:33.196883 PCI: 00:1d.0 read_resources bus 1 link: 0
1162 12:56:33.199974 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1163 12:56:33.206609 PCI: 00:1e.2 read_resources bus 2 link: 0
1164 12:56:33.210043 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1165 12:56:33.216322 PCI: 00:1e.3 read_resources bus 3 link: 0
1166 12:56:33.219820 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1167 12:56:33.226369 PCI: 00:1f.0 read_resources bus 0 link: 0
1168 12:56:33.229359 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1169 12:56:33.236348 PCI: 00:1f.2 read_resources bus 0 link: 0
1170 12:56:33.239483 GENERIC: 0.0 read_resources bus 0 link: 0
1171 12:56:33.246083 GENERIC: 0.0 read_resources bus 0 link: 0 done
1172 12:56:33.249032 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1173 12:56:33.255793 DOMAIN: 0000 read_resources bus 0 link: 0 done
1174 12:56:33.258908 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1175 12:56:33.265595 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1176 12:56:33.269016 Root Device read_resources bus 0 link: 0 done
1177 12:56:33.272350 Done reading resources.
1178 12:56:33.278717 Show resources in subtree (Root Device)...After reading.
1179 12:56:33.282287 Root Device child on link 0 DOMAIN: 0000
1180 12:56:33.285354 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1181 12:56:33.295217 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1182 12:56:33.305078 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1183 12:56:33.308312 PCI: 00:00.0
1184 12:56:33.318027 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1185 12:56:33.324946 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1186 12:56:33.334766 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1187 12:56:33.344734 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1188 12:56:33.354564 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1189 12:56:33.364378 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1190 12:56:33.374542 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1191 12:56:33.381070 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1192 12:56:33.390927 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1193 12:56:33.401335 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1194 12:56:33.411022 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1195 12:56:33.420840 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1196 12:56:33.430508 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1197 12:56:33.437154 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1198 12:56:33.447145 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1199 12:56:33.457026 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1200 12:56:33.467362 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1201 12:56:33.477189 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1202 12:56:33.486562 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1203 12:56:33.496757 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1204 12:56:33.496840 PCI: 00:02.0
1205 12:56:33.506433 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1206 12:56:33.516211 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1207 12:56:33.526582 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1208 12:56:33.529643 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1209 12:56:33.539824 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1210 12:56:33.542879 GENERIC: 0.0
1211 12:56:33.542988 PCI: 00:05.0
1212 12:56:33.556329 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1213 12:56:33.559452 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1214 12:56:33.559572 GENERIC: 0.0
1215 12:56:33.562899 PCI: 00:08.0
1216 12:56:33.572815 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1217 12:56:33.572945 PCI: 00:0a.0
1218 12:56:33.579035 PCI: 00:0d.0 child on link 0 USB0 port 0
1219 12:56:33.589143 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1220 12:56:33.592362 USB0 port 0 child on link 0 USB3 port 0
1221 12:56:33.595514 USB3 port 0
1222 12:56:33.595616 USB3 port 1
1223 12:56:33.598934 USB3 port 2
1224 12:56:33.599049 USB3 port 3
1225 12:56:33.605403 PCI: 00:14.0 child on link 0 USB0 port 0
1226 12:56:33.615499 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1227 12:56:33.619105 USB0 port 0 child on link 0 USB2 port 0
1228 12:56:33.621938 USB2 port 0
1229 12:56:33.622020 USB2 port 1
1230 12:56:33.625363 USB2 port 2
1231 12:56:33.625444 USB2 port 3
1232 12:56:33.628407 USB2 port 4
1233 12:56:33.628488 USB2 port 5
1234 12:56:33.632007 USB2 port 6
1235 12:56:33.632104 USB2 port 7
1236 12:56:33.635530 USB2 port 8
1237 12:56:33.635611 USB2 port 9
1238 12:56:33.638487 USB3 port 0
1239 12:56:33.638567 USB3 port 1
1240 12:56:33.641951 USB3 port 2
1241 12:56:33.645034 USB3 port 3
1242 12:56:33.645114 PCI: 00:14.2
1243 12:56:33.655096 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1244 12:56:33.664757 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1245 12:56:33.668251 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1246 12:56:33.678043 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1247 12:56:33.681379 GENERIC: 0.0
1248 12:56:33.684405 PCI: 00:15.0 child on link 0 I2C: 00:1a
1249 12:56:33.694359 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1250 12:56:33.698093 I2C: 00:1a
1251 12:56:33.698184 I2C: 00:31
1252 12:56:33.701082 I2C: 00:32
1253 12:56:33.704525 PCI: 00:15.1 child on link 0 I2C: 00:10
1254 12:56:33.714236 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1255 12:56:33.717417 I2C: 00:10
1256 12:56:33.717540 PCI: 00:15.2
1257 12:56:33.727516 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1258 12:56:33.730830 PCI: 00:15.3
1259 12:56:33.740627 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1260 12:56:33.740712 PCI: 00:16.0
1261 12:56:33.750826 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1262 12:56:33.753947 PCI: 00:19.0
1263 12:56:33.757328 PCI: 00:19.1 child on link 0 I2C: 00:15
1264 12:56:33.767063 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1265 12:56:33.767148 I2C: 00:15
1266 12:56:33.773746 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1267 12:56:33.780314 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1268 12:56:33.790494 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1269 12:56:33.800256 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1270 12:56:33.803303 GENERIC: 0.0
1271 12:56:33.803386 PCI: 01:00.0
1272 12:56:33.813431 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1273 12:56:33.823328 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1274 12:56:33.826942 PCI: 00:1e.0
1275 12:56:33.836441 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1276 12:56:33.839654 PCI: 00:1e.2 child on link 0 SPI: 00
1277 12:56:33.849837 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1278 12:56:33.852985 SPI: 00
1279 12:56:33.856019 PCI: 00:1e.3 child on link 0 SPI: 00
1280 12:56:33.865981 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1281 12:56:33.866065 SPI: 00
1282 12:56:33.872551 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1283 12:56:33.879401 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1284 12:56:33.883033 PNP: 0c09.0
1285 12:56:33.889120 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1286 12:56:33.895669 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1287 12:56:33.905895 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1288 12:56:33.912367 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1289 12:56:33.918633 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1290 12:56:33.918717 GENERIC: 0.0
1291 12:56:33.922227 GENERIC: 1.0
1292 12:56:33.922300 PCI: 00:1f.3
1293 12:56:33.932272 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1294 12:56:33.944940 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1295 12:56:33.945023 PCI: 00:1f.5
1296 12:56:33.955110 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1297 12:56:33.958536 CPU_CLUSTER: 0 child on link 0 APIC: 00
1298 12:56:33.961728 APIC: 00
1299 12:56:33.961801 APIC: 01
1300 12:56:33.961862 APIC: 05
1301 12:56:33.965162 APIC: 07
1302 12:56:33.965232 APIC: 02
1303 12:56:33.965297 APIC: 04
1304 12:56:33.968183 APIC: 06
1305 12:56:33.968253 APIC: 03
1306 12:56:33.978409 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1307 12:56:33.981563 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1308 12:56:33.988154 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1309 12:56:33.994461 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1310 12:56:33.997887 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1311 12:56:34.004638 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1312 12:56:34.010941 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1313 12:56:34.017675 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1314 12:56:34.024488 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1315 12:56:34.031000 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1316 12:56:34.037652 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1317 12:56:34.047232 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1318 12:56:34.053962 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1319 12:56:34.060414 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1320 12:56:34.064082 DOMAIN: 0000: Resource ranges:
1321 12:56:34.067099 * Base: 1000, Size: 800, Tag: 100
1322 12:56:34.070406 * Base: 1900, Size: e700, Tag: 100
1323 12:56:34.077154 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1324 12:56:34.083552 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1325 12:56:34.089933 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1326 12:56:34.096941 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1327 12:56:34.106531 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1328 12:56:34.113019 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1329 12:56:34.119771 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1330 12:56:34.129425 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1331 12:56:34.136163 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1332 12:56:34.142518 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1333 12:56:34.152713 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1334 12:56:34.159312 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1335 12:56:34.165922 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1336 12:56:34.175938 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1337 12:56:34.182430 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1338 12:56:34.189361 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1339 12:56:34.198880 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1340 12:56:34.205436 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1341 12:56:34.211966 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1342 12:56:34.221800 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1343 12:56:34.228747 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1344 12:56:34.238140 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1345 12:56:34.244960 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1346 12:56:34.251937 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1347 12:56:34.261577 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1348 12:56:34.264434 DOMAIN: 0000: Resource ranges:
1349 12:56:34.268215 * Base: 7fc00000, Size: 40400000, Tag: 200
1350 12:56:34.271081 * Base: d0000000, Size: 28000000, Tag: 200
1351 12:56:34.277764 * Base: fa000000, Size: 1000000, Tag: 200
1352 12:56:34.281415 * Base: fb001000, Size: 2fff000, Tag: 200
1353 12:56:34.284437 * Base: fe010000, Size: 2e000, Tag: 200
1354 12:56:34.287931 * Base: fe03f000, Size: d41000, Tag: 200
1355 12:56:34.294516 * Base: fed88000, Size: 8000, Tag: 200
1356 12:56:34.297635 * Base: fed93000, Size: d000, Tag: 200
1357 12:56:34.301021 * Base: feda2000, Size: 1e000, Tag: 200
1358 12:56:34.304521 * Base: fede0000, Size: 1220000, Tag: 200
1359 12:56:34.310769 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1360 12:56:34.317430 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1361 12:56:34.324151 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1362 12:56:34.330528 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1363 12:56:34.337030 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1364 12:56:34.343980 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1365 12:56:34.350341 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1366 12:56:34.357075 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1367 12:56:34.363840 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1368 12:56:34.370078 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1369 12:56:34.376725 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1370 12:56:34.383285 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1371 12:56:34.389801 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1372 12:56:34.396488 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1373 12:56:34.403166 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1374 12:56:34.409820 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1375 12:56:34.416346 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1376 12:56:34.423187 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1377 12:56:34.429875 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1378 12:56:34.435994 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1379 12:56:34.442669 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1380 12:56:34.449328 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1381 12:56:34.455613 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1382 12:56:34.462396 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1383 12:56:34.472450 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1384 12:56:34.475768 PCI: 00:1d.0: Resource ranges:
1385 12:56:34.478927 * Base: 7fc00000, Size: 100000, Tag: 200
1386 12:56:34.485863 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1387 12:56:34.492453 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1388 12:56:34.501860 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1389 12:56:34.509003 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1390 12:56:34.512038 Root Device assign_resources, bus 0 link: 0
1391 12:56:34.518544 DOMAIN: 0000 assign_resources, bus 0 link: 0
1392 12:56:34.525264 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1393 12:56:34.535146 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1394 12:56:34.541595 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1395 12:56:34.551584 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1396 12:56:34.554654 PCI: 00:04.0 assign_resources, bus 1 link: 0
1397 12:56:34.558291 PCI: 00:04.0 assign_resources, bus 1 link: 0
1398 12:56:34.568158 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1399 12:56:34.574618 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1400 12:56:34.584255 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1401 12:56:34.587622 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1402 12:56:34.594233 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1403 12:56:34.600924 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1404 12:56:34.607491 PCI: 00:14.0 assign_resources, bus 0 link: 0
1405 12:56:34.610453 PCI: 00:14.0 assign_resources, bus 0 link: 0
1406 12:56:34.617071 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1407 12:56:34.627315 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1408 12:56:34.633628 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1409 12:56:34.640198 PCI: 00:14.3 assign_resources, bus 0 link: 0
1410 12:56:34.643351 PCI: 00:14.3 assign_resources, bus 0 link: 0
1411 12:56:34.653671 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1412 12:56:34.656718 PCI: 00:15.0 assign_resources, bus 0 link: 0
1413 12:56:34.659985 PCI: 00:15.0 assign_resources, bus 0 link: 0
1414 12:56:34.670087 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1415 12:56:34.673245 PCI: 00:15.1 assign_resources, bus 0 link: 0
1416 12:56:34.679728 PCI: 00:15.1 assign_resources, bus 0 link: 0
1417 12:56:34.686413 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1418 12:56:34.696372 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1419 12:56:34.702859 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1420 12:56:34.712630 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1421 12:56:34.716059 PCI: 00:19.1 assign_resources, bus 0 link: 0
1422 12:56:34.722546 PCI: 00:19.1 assign_resources, bus 0 link: 0
1423 12:56:34.729213 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1424 12:56:34.739569 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1425 12:56:34.749224 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1426 12:56:34.752568 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1427 12:56:34.762311 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1428 12:56:34.768612 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1429 12:56:34.775268 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1430 12:56:34.782203 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1431 12:56:34.785049 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1432 12:56:34.791794 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1433 12:56:34.798422 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1434 12:56:34.805007 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1435 12:56:34.808394 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1436 12:56:34.815068 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1437 12:56:34.818267 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1438 12:56:34.824577 LPC: Trying to open IO window from 800 size 1ff
1439 12:56:34.831245 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1440 12:56:34.841109 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1441 12:56:34.847756 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1442 12:56:34.851297 DOMAIN: 0000 assign_resources, bus 0 link: 0
1443 12:56:34.858186 Root Device assign_resources, bus 0 link: 0
1444 12:56:34.861048 Done setting resources.
1445 12:56:34.867609 Show resources in subtree (Root Device)...After assigning values.
1446 12:56:34.871222 Root Device child on link 0 DOMAIN: 0000
1447 12:56:34.874439 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1448 12:56:34.884211 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1449 12:56:34.894074 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1450 12:56:34.894155 PCI: 00:00.0
1451 12:56:34.903845 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1452 12:56:34.913821 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1453 12:56:34.923613 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1454 12:56:34.933743 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1455 12:56:34.943448 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1456 12:56:34.953140 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1457 12:56:34.963270 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1458 12:56:34.969423 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1459 12:56:34.979413 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1460 12:56:34.989507 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1461 12:56:34.999357 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1462 12:56:35.008906 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1463 12:56:35.018881 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1464 12:56:35.025353 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1465 12:56:35.035724 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1466 12:56:35.045237 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1467 12:56:35.055010 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1468 12:56:35.065332 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1469 12:56:35.074948 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1470 12:56:35.085212 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1471 12:56:35.085298 PCI: 00:02.0
1472 12:56:35.094593 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1473 12:56:35.108194 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1474 12:56:35.114549 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1475 12:56:35.121280 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1476 12:56:35.130879 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1477 12:56:35.134296 GENERIC: 0.0
1478 12:56:35.134380 PCI: 00:05.0
1479 12:56:35.144032 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1480 12:56:35.150997 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1481 12:56:35.151080 GENERIC: 0.0
1482 12:56:35.154518 PCI: 00:08.0
1483 12:56:35.164108 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1484 12:56:35.164193 PCI: 00:0a.0
1485 12:56:35.170786 PCI: 00:0d.0 child on link 0 USB0 port 0
1486 12:56:35.180519 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1487 12:56:35.183740 USB0 port 0 child on link 0 USB3 port 0
1488 12:56:35.187270 USB3 port 0
1489 12:56:35.187353 USB3 port 1
1490 12:56:35.190477 USB3 port 2
1491 12:56:35.190560 USB3 port 3
1492 12:56:35.196956 PCI: 00:14.0 child on link 0 USB0 port 0
1493 12:56:35.206803 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1494 12:56:35.210159 USB0 port 0 child on link 0 USB2 port 0
1495 12:56:35.213401 USB2 port 0
1496 12:56:35.213505 USB2 port 1
1497 12:56:35.217001 USB2 port 2
1498 12:56:35.217074 USB2 port 3
1499 12:56:35.219865 USB2 port 4
1500 12:56:35.219956 USB2 port 5
1501 12:56:35.223711 USB2 port 6
1502 12:56:35.223790 USB2 port 7
1503 12:56:35.227121 USB2 port 8
1504 12:56:35.227197 USB2 port 9
1505 12:56:35.230286 USB3 port 0
1506 12:56:35.230370 USB3 port 1
1507 12:56:35.233239 USB3 port 2
1508 12:56:35.236600 USB3 port 3
1509 12:56:35.236671 PCI: 00:14.2
1510 12:56:35.246695 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1511 12:56:35.256460 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1512 12:56:35.263274 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1513 12:56:35.273170 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1514 12:56:35.273258 GENERIC: 0.0
1515 12:56:35.279765 PCI: 00:15.0 child on link 0 I2C: 00:1a
1516 12:56:35.289715 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1517 12:56:35.289800 I2C: 00:1a
1518 12:56:35.292694 I2C: 00:31
1519 12:56:35.292776 I2C: 00:32
1520 12:56:35.299678 PCI: 00:15.1 child on link 0 I2C: 00:10
1521 12:56:35.309355 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1522 12:56:35.309462 I2C: 00:10
1523 12:56:35.312595 PCI: 00:15.2
1524 12:56:35.322589 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1525 12:56:35.322670 PCI: 00:15.3
1526 12:56:35.332631 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1527 12:56:35.335534 PCI: 00:16.0
1528 12:56:35.345693 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1529 12:56:35.348915 PCI: 00:19.0
1530 12:56:35.352062 PCI: 00:19.1 child on link 0 I2C: 00:15
1531 12:56:35.362074 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1532 12:56:35.362161 I2C: 00:15
1533 12:56:35.368718 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1534 12:56:35.378570 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1535 12:56:35.388627 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1536 12:56:35.398149 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1537 12:56:35.401661 GENERIC: 0.0
1538 12:56:35.401774 PCI: 01:00.0
1539 12:56:35.415070 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1540 12:56:35.424970 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1541 12:56:35.425055 PCI: 00:1e.0
1542 12:56:35.437979 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1543 12:56:35.440960 PCI: 00:1e.2 child on link 0 SPI: 00
1544 12:56:35.451057 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1545 12:56:35.451144 SPI: 00
1546 12:56:35.454436 PCI: 00:1e.3 child on link 0 SPI: 00
1547 12:56:35.467949 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1548 12:56:35.468040 SPI: 00
1549 12:56:35.471149 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1550 12:56:35.480765 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1551 12:56:35.480851 PNP: 0c09.0
1552 12:56:35.490681 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1553 12:56:35.494236 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1554 12:56:35.503948 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1555 12:56:35.514065 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1556 12:56:35.520580 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1557 12:56:35.520661 GENERIC: 0.0
1558 12:56:35.523792 GENERIC: 1.0
1559 12:56:35.523864 PCI: 00:1f.3
1560 12:56:35.533586 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1561 12:56:35.543388 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1562 12:56:35.546891 PCI: 00:1f.5
1563 12:56:35.556848 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1564 12:56:35.559720 CPU_CLUSTER: 0 child on link 0 APIC: 00
1565 12:56:35.563004 APIC: 00
1566 12:56:35.563080 APIC: 01
1567 12:56:35.566328 APIC: 05
1568 12:56:35.566411 APIC: 07
1569 12:56:35.566493 APIC: 02
1570 12:56:35.569977 APIC: 04
1571 12:56:35.570058 APIC: 06
1572 12:56:35.570122 APIC: 03
1573 12:56:35.572842 Done allocating resources.
1574 12:56:35.579924 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1575 12:56:35.586097 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1576 12:56:35.589563 Configure GPIOs for I2S audio on UP4.
1577 12:56:35.596398 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1578 12:56:35.599491 Enabling resources...
1579 12:56:35.603061 PCI: 00:00.0 subsystem <- 8086/9a12
1580 12:56:35.606197 PCI: 00:00.0 cmd <- 06
1581 12:56:35.609326 PCI: 00:02.0 subsystem <- 8086/9a40
1582 12:56:35.612923 PCI: 00:02.0 cmd <- 03
1583 12:56:35.616114 PCI: 00:04.0 subsystem <- 8086/9a03
1584 12:56:35.619202 PCI: 00:04.0 cmd <- 02
1585 12:56:35.622539 PCI: 00:05.0 subsystem <- 8086/9a19
1586 12:56:35.622638 PCI: 00:05.0 cmd <- 02
1587 12:56:35.629414 PCI: 00:08.0 subsystem <- 8086/9a11
1588 12:56:35.629559 PCI: 00:08.0 cmd <- 06
1589 12:56:35.632874 PCI: 00:0d.0 subsystem <- 8086/9a13
1590 12:56:35.635705 PCI: 00:0d.0 cmd <- 02
1591 12:56:35.639293 PCI: 00:14.0 subsystem <- 8086/a0ed
1592 12:56:35.642866 PCI: 00:14.0 cmd <- 02
1593 12:56:35.645941 PCI: 00:14.2 subsystem <- 8086/a0ef
1594 12:56:35.649061 PCI: 00:14.2 cmd <- 02
1595 12:56:35.652212 PCI: 00:14.3 subsystem <- 8086/a0f0
1596 12:56:35.655428 PCI: 00:14.3 cmd <- 02
1597 12:56:35.659146 PCI: 00:15.0 subsystem <- 8086/a0e8
1598 12:56:35.662316 PCI: 00:15.0 cmd <- 02
1599 12:56:35.665803 PCI: 00:15.1 subsystem <- 8086/a0e9
1600 12:56:35.668761 PCI: 00:15.1 cmd <- 02
1601 12:56:35.672062 PCI: 00:15.2 subsystem <- 8086/a0ea
1602 12:56:35.672144 PCI: 00:15.2 cmd <- 02
1603 12:56:35.678964 PCI: 00:15.3 subsystem <- 8086/a0eb
1604 12:56:35.679047 PCI: 00:15.3 cmd <- 02
1605 12:56:35.682313 PCI: 00:16.0 subsystem <- 8086/a0e0
1606 12:56:35.685461 PCI: 00:16.0 cmd <- 02
1607 12:56:35.689087 PCI: 00:19.1 subsystem <- 8086/a0c6
1608 12:56:35.692258 PCI: 00:19.1 cmd <- 02
1609 12:56:35.695488 PCI: 00:1d.0 bridge ctrl <- 0013
1610 12:56:35.699168 PCI: 00:1d.0 subsystem <- 8086/a0b0
1611 12:56:35.702296 PCI: 00:1d.0 cmd <- 06
1612 12:56:35.705303 PCI: 00:1e.0 subsystem <- 8086/a0a8
1613 12:56:35.708922 PCI: 00:1e.0 cmd <- 06
1614 12:56:35.711967 PCI: 00:1e.2 subsystem <- 8086/a0aa
1615 12:56:35.715613 PCI: 00:1e.2 cmd <- 06
1616 12:56:35.718609 PCI: 00:1e.3 subsystem <- 8086/a0ab
1617 12:56:35.721862 PCI: 00:1e.3 cmd <- 02
1618 12:56:35.725322 PCI: 00:1f.0 subsystem <- 8086/a087
1619 12:56:35.728445 PCI: 00:1f.0 cmd <- 407
1620 12:56:35.731476 PCI: 00:1f.3 subsystem <- 8086/a0c8
1621 12:56:35.731560 PCI: 00:1f.3 cmd <- 02
1622 12:56:35.738477 PCI: 00:1f.5 subsystem <- 8086/a0a4
1623 12:56:35.738561 PCI: 00:1f.5 cmd <- 406
1624 12:56:35.743308 PCI: 01:00.0 cmd <- 02
1625 12:56:35.747906 done.
1626 12:56:35.751441 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1627 12:56:35.754467 Initializing devices...
1628 12:56:35.758241 Root Device init
1629 12:56:35.761340 Chrome EC: Set SMI mask to 0x0000000000000000
1630 12:56:35.768187 Chrome EC: clear events_b mask to 0x0000000000000000
1631 12:56:35.775117 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1632 12:56:35.781666 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1633 12:56:35.788327 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1634 12:56:35.791682 Chrome EC: Set WAKE mask to 0x0000000000000000
1635 12:56:35.799352 fw_config match found: DB_USB=USB3_ACTIVE
1636 12:56:35.803029 Configure Right Type-C port orientation for retimer
1637 12:56:35.805955 Root Device init finished in 46 msecs
1638 12:56:35.809981 PCI: 00:00.0 init
1639 12:56:35.813140 CPU TDP = 9 Watts
1640 12:56:35.816642 CPU PL1 = 9 Watts
1641 12:56:35.816724 CPU PL2 = 40 Watts
1642 12:56:35.819840 CPU PL4 = 83 Watts
1643 12:56:35.823493 PCI: 00:00.0 init finished in 8 msecs
1644 12:56:35.826902 PCI: 00:02.0 init
1645 12:56:35.826983 GMA: Found VBT in CBFS
1646 12:56:35.829732 GMA: Found valid VBT in CBFS
1647 12:56:35.836327 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1648 12:56:35.842886 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1649 12:56:35.846302 PCI: 00:02.0 init finished in 18 msecs
1650 12:56:35.849951 PCI: 00:05.0 init
1651 12:56:35.852967 PCI: 00:05.0 init finished in 0 msecs
1652 12:56:35.856583 PCI: 00:08.0 init
1653 12:56:35.859562 PCI: 00:08.0 init finished in 0 msecs
1654 12:56:35.863095 PCI: 00:14.0 init
1655 12:56:35.866114 PCI: 00:14.0 init finished in 0 msecs
1656 12:56:35.869638 PCI: 00:14.2 init
1657 12:56:35.872590 PCI: 00:14.2 init finished in 0 msecs
1658 12:56:35.876917 PCI: 00:15.0 init
1659 12:56:35.879263 I2C bus 0 version 0x3230302a
1660 12:56:35.882363 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1661 12:56:35.885949 PCI: 00:15.0 init finished in 6 msecs
1662 12:56:35.888981 PCI: 00:15.1 init
1663 12:56:35.889084 I2C bus 1 version 0x3230302a
1664 12:56:35.895800 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1665 12:56:35.899052 PCI: 00:15.1 init finished in 6 msecs
1666 12:56:35.899134 PCI: 00:15.2 init
1667 12:56:35.902277 I2C bus 2 version 0x3230302a
1668 12:56:35.905606 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1669 12:56:35.911785 PCI: 00:15.2 init finished in 6 msecs
1670 12:56:35.911868 PCI: 00:15.3 init
1671 12:56:35.915408 I2C bus 3 version 0x3230302a
1672 12:56:35.918443 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1673 12:56:35.921968 PCI: 00:15.3 init finished in 6 msecs
1674 12:56:35.925113 PCI: 00:16.0 init
1675 12:56:35.928746 PCI: 00:16.0 init finished in 0 msecs
1676 12:56:35.931817 PCI: 00:19.1 init
1677 12:56:35.934937 I2C bus 5 version 0x3230302a
1678 12:56:35.938514 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1679 12:56:35.941935 PCI: 00:19.1 init finished in 6 msecs
1680 12:56:35.945037 PCI: 00:1d.0 init
1681 12:56:35.948167 Initializing PCH PCIe bridge.
1682 12:56:35.951930 PCI: 00:1d.0 init finished in 3 msecs
1683 12:56:35.954985 PCI: 00:1f.0 init
1684 12:56:35.958571 IOAPIC: Initializing IOAPIC at 0xfec00000
1685 12:56:35.964785 IOAPIC: Bootstrap Processor Local APIC = 0x00
1686 12:56:35.964869 IOAPIC: ID = 0x02
1687 12:56:35.968251 IOAPIC: Dumping registers
1688 12:56:35.971187 reg 0x0000: 0x02000000
1689 12:56:35.971270 reg 0x0001: 0x00770020
1690 12:56:35.974721 reg 0x0002: 0x00000000
1691 12:56:35.977936 PCI: 00:1f.0 init finished in 21 msecs
1692 12:56:35.981489 PCI: 00:1f.2 init
1693 12:56:35.985058 Disabling ACPI via APMC.
1694 12:56:35.988760 APMC done.
1695 12:56:35.991803 PCI: 00:1f.2 init finished in 6 msecs
1696 12:56:36.004094 PCI: 01:00.0 init
1697 12:56:36.007049 PCI: 01:00.0 init finished in 0 msecs
1698 12:56:36.010316 PNP: 0c09.0 init
1699 12:56:36.016740 Google Chrome EC uptime: 8.420 seconds
1700 12:56:36.020018 Google Chrome AP resets since EC boot: 1
1701 12:56:36.023804 Google Chrome most recent AP reset causes:
1702 12:56:36.026889 0.455: 32775 shutdown: entering G3
1703 12:56:36.033401 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1704 12:56:36.036514 PNP: 0c09.0 init finished in 23 msecs
1705 12:56:36.043803 Devices initialized
1706 12:56:36.046861 Show all devs... After init.
1707 12:56:36.050045 Root Device: enabled 1
1708 12:56:36.050128 DOMAIN: 0000: enabled 1
1709 12:56:36.053414 CPU_CLUSTER: 0: enabled 1
1710 12:56:36.056998 PCI: 00:00.0: enabled 1
1711 12:56:36.059899 PCI: 00:02.0: enabled 1
1712 12:56:36.063330 PCI: 00:04.0: enabled 1
1713 12:56:36.063413 PCI: 00:05.0: enabled 1
1714 12:56:36.066444 PCI: 00:06.0: enabled 0
1715 12:56:36.069940 PCI: 00:07.0: enabled 0
1716 12:56:36.070023 PCI: 00:07.1: enabled 0
1717 12:56:36.072938 PCI: 00:07.2: enabled 0
1718 12:56:36.076322 PCI: 00:07.3: enabled 0
1719 12:56:36.079840 PCI: 00:08.0: enabled 1
1720 12:56:36.079923 PCI: 00:09.0: enabled 0
1721 12:56:36.083223 PCI: 00:0a.0: enabled 0
1722 12:56:36.086364 PCI: 00:0d.0: enabled 1
1723 12:56:36.089741 PCI: 00:0d.1: enabled 0
1724 12:56:36.089823 PCI: 00:0d.2: enabled 0
1725 12:56:36.093080 PCI: 00:0d.3: enabled 0
1726 12:56:36.096353 PCI: 00:0e.0: enabled 0
1727 12:56:36.099329 PCI: 00:10.2: enabled 1
1728 12:56:36.099412 PCI: 00:10.6: enabled 0
1729 12:56:36.103101 PCI: 00:10.7: enabled 0
1730 12:56:36.106476 PCI: 00:12.0: enabled 0
1731 12:56:36.109227 PCI: 00:12.6: enabled 0
1732 12:56:36.109309 PCI: 00:13.0: enabled 0
1733 12:56:36.112989 PCI: 00:14.0: enabled 1
1734 12:56:36.116269 PCI: 00:14.1: enabled 0
1735 12:56:36.119608 PCI: 00:14.2: enabled 1
1736 12:56:36.119690 PCI: 00:14.3: enabled 1
1737 12:56:36.122748 PCI: 00:15.0: enabled 1
1738 12:56:36.125995 PCI: 00:15.1: enabled 1
1739 12:56:36.126077 PCI: 00:15.2: enabled 1
1740 12:56:36.129624 PCI: 00:15.3: enabled 1
1741 12:56:36.132641 PCI: 00:16.0: enabled 1
1742 12:56:36.136175 PCI: 00:16.1: enabled 0
1743 12:56:36.136257 PCI: 00:16.2: enabled 0
1744 12:56:36.139257 PCI: 00:16.3: enabled 0
1745 12:56:36.142354 PCI: 00:16.4: enabled 0
1746 12:56:36.146048 PCI: 00:16.5: enabled 0
1747 12:56:36.146130 PCI: 00:17.0: enabled 0
1748 12:56:36.149005 PCI: 00:19.0: enabled 0
1749 12:56:36.152737 PCI: 00:19.1: enabled 1
1750 12:56:36.155621 PCI: 00:19.2: enabled 0
1751 12:56:36.155704 PCI: 00:1c.0: enabled 1
1752 12:56:36.158980 PCI: 00:1c.1: enabled 0
1753 12:56:36.162595 PCI: 00:1c.2: enabled 0
1754 12:56:36.165425 PCI: 00:1c.3: enabled 0
1755 12:56:36.165548 PCI: 00:1c.4: enabled 0
1756 12:56:36.169087 PCI: 00:1c.5: enabled 0
1757 12:56:36.172318 PCI: 00:1c.6: enabled 1
1758 12:56:36.175306 PCI: 00:1c.7: enabled 0
1759 12:56:36.175388 PCI: 00:1d.0: enabled 1
1760 12:56:36.178598 PCI: 00:1d.1: enabled 0
1761 12:56:36.182109 PCI: 00:1d.2: enabled 1
1762 12:56:36.185116 PCI: 00:1d.3: enabled 0
1763 12:56:36.185198 PCI: 00:1e.0: enabled 1
1764 12:56:36.188773 PCI: 00:1e.1: enabled 0
1765 12:56:36.191858 PCI: 00:1e.2: enabled 1
1766 12:56:36.194946 PCI: 00:1e.3: enabled 1
1767 12:56:36.195029 PCI: 00:1f.0: enabled 1
1768 12:56:36.198535 PCI: 00:1f.1: enabled 0
1769 12:56:36.201572 PCI: 00:1f.2: enabled 1
1770 12:56:36.201654 PCI: 00:1f.3: enabled 1
1771 12:56:36.204847 PCI: 00:1f.4: enabled 0
1772 12:56:36.208475 PCI: 00:1f.5: enabled 1
1773 12:56:36.211257 PCI: 00:1f.6: enabled 0
1774 12:56:36.211339 PCI: 00:1f.7: enabled 0
1775 12:56:36.215041 APIC: 00: enabled 1
1776 12:56:36.218312 GENERIC: 0.0: enabled 1
1777 12:56:36.221706 GENERIC: 0.0: enabled 1
1778 12:56:36.221786 GENERIC: 1.0: enabled 1
1779 12:56:36.224526 GENERIC: 0.0: enabled 1
1780 12:56:36.228347 GENERIC: 1.0: enabled 1
1781 12:56:36.231451 USB0 port 0: enabled 1
1782 12:56:36.231546 GENERIC: 0.0: enabled 1
1783 12:56:36.234520 USB0 port 0: enabled 1
1784 12:56:36.237720 GENERIC: 0.0: enabled 1
1785 12:56:36.237800 I2C: 00:1a: enabled 1
1786 12:56:36.241217 I2C: 00:31: enabled 1
1787 12:56:36.244496 I2C: 00:32: enabled 1
1788 12:56:36.244576 I2C: 00:10: enabled 1
1789 12:56:36.247785 I2C: 00:15: enabled 1
1790 12:56:36.251342 GENERIC: 0.0: enabled 0
1791 12:56:36.254591 GENERIC: 1.0: enabled 0
1792 12:56:36.254672 GENERIC: 0.0: enabled 1
1793 12:56:36.257408 SPI: 00: enabled 1
1794 12:56:36.260966 SPI: 00: enabled 1
1795 12:56:36.261046 PNP: 0c09.0: enabled 1
1796 12:56:36.264391 GENERIC: 0.0: enabled 1
1797 12:56:36.267272 USB3 port 0: enabled 1
1798 12:56:36.267353 USB3 port 1: enabled 1
1799 12:56:36.270618 USB3 port 2: enabled 0
1800 12:56:36.274177 USB3 port 3: enabled 0
1801 12:56:36.277370 USB2 port 0: enabled 0
1802 12:56:36.277450 USB2 port 1: enabled 1
1803 12:56:36.280633 USB2 port 2: enabled 1
1804 12:56:36.284132 USB2 port 3: enabled 0
1805 12:56:36.284213 USB2 port 4: enabled 1
1806 12:56:36.286967 USB2 port 5: enabled 0
1807 12:56:36.290843 USB2 port 6: enabled 0
1808 12:56:36.293795 USB2 port 7: enabled 0
1809 12:56:36.293875 USB2 port 8: enabled 0
1810 12:56:36.296808 USB2 port 9: enabled 0
1811 12:56:36.300025 USB3 port 0: enabled 0
1812 12:56:36.300105 USB3 port 1: enabled 1
1813 12:56:36.303577 USB3 port 2: enabled 0
1814 12:56:36.306743 USB3 port 3: enabled 0
1815 12:56:36.310421 GENERIC: 0.0: enabled 1
1816 12:56:36.310533 GENERIC: 1.0: enabled 1
1817 12:56:36.313522 APIC: 01: enabled 1
1818 12:56:36.316941 APIC: 05: enabled 1
1819 12:56:36.317046 APIC: 07: enabled 1
1820 12:56:36.319875 APIC: 02: enabled 1
1821 12:56:36.319955 APIC: 04: enabled 1
1822 12:56:36.323354 APIC: 06: enabled 1
1823 12:56:36.326876 APIC: 03: enabled 1
1824 12:56:36.326956 PCI: 01:00.0: enabled 1
1825 12:56:36.333294 BS: BS_DEV_INIT run times (exec / console): 35 / 540 ms
1826 12:56:36.336565 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1827 12:56:36.343008 ELOG: NV offset 0xf30000 size 0x1000
1828 12:56:36.349744 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1829 12:56:36.356552 ELOG: Event(17) added with size 13 at 2023-04-26 12:56:35 UTC
1830 12:56:36.362966 ELOG: Event(92) added with size 9 at 2023-04-26 12:56:35 UTC
1831 12:56:36.369875 ELOG: Event(93) added with size 9 at 2023-04-26 12:56:35 UTC
1832 12:56:36.376181 ELOG: Event(9E) added with size 10 at 2023-04-26 12:56:35 UTC
1833 12:56:36.382558 ELOG: Event(9F) added with size 14 at 2023-04-26 12:56:35 UTC
1834 12:56:36.385997 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1835 12:56:36.392587 ELOG: Event(A1) added with size 10 at 2023-04-26 12:56:35 UTC
1836 12:56:36.402864 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1837 12:56:36.405759 ELOG: Event(A0) added with size 9 at 2023-04-26 12:56:35 UTC
1838 12:56:36.412476 elog_add_boot_reason: Logged dev mode boot
1839 12:56:36.419373 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1840 12:56:36.419454 Finalize devices...
1841 12:56:36.422423 Devices finalized
1842 12:56:36.425840 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1843 12:56:36.432432 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1844 12:56:36.439028 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1845 12:56:36.442360 ME: HFSTS1 : 0x80030055
1846 12:56:36.445707 ME: HFSTS2 : 0x30280116
1847 12:56:36.452646 ME: HFSTS3 : 0x00000050
1848 12:56:36.455704 ME: HFSTS4 : 0x00004000
1849 12:56:36.462421 ME: HFSTS5 : 0x00000000
1850 12:56:36.465587 ME: HFSTS6 : 0x40400006
1851 12:56:36.469014 ME: Manufacturing Mode : YES
1852 12:56:36.472094 ME: SPI Protection Mode Enabled : NO
1853 12:56:36.475238 ME: FW Partition Table : OK
1854 12:56:36.478649 ME: Bringup Loader Failure : NO
1855 12:56:36.485440 ME: Firmware Init Complete : NO
1856 12:56:36.488703 ME: Boot Options Present : NO
1857 12:56:36.492004 ME: Update In Progress : NO
1858 12:56:36.495105 ME: D0i3 Support : YES
1859 12:56:36.498584 ME: Low Power State Enabled : NO
1860 12:56:36.501787 ME: CPU Replaced : YES
1861 12:56:36.505394 ME: CPU Replacement Valid : YES
1862 12:56:36.508297 ME: Current Working State : 5
1863 12:56:36.514934 ME: Current Operation State : 1
1864 12:56:36.518242 ME: Current Operation Mode : 3
1865 12:56:36.521659 ME: Error Code : 0
1866 12:56:36.525023 ME: Enhanced Debug Mode : NO
1867 12:56:36.528176 ME: CPU Debug Disabled : YES
1868 12:56:36.531365 ME: TXT Support : NO
1869 12:56:36.537877 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1870 12:56:36.544569 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1871 12:56:36.548106 CBFS: 'fallback/slic' not found.
1872 12:56:36.554413 ACPI: Writing ACPI tables at 76b01000.
1873 12:56:36.554494 ACPI: * FACS
1874 12:56:36.558164 ACPI: * DSDT
1875 12:56:36.561316 Ramoops buffer: 0x100000@0x76a00000.
1876 12:56:36.564602 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1877 12:56:36.567621 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1878 12:56:36.571720 Google Chrome EC: version:
1879 12:56:36.575234 ro: voema_v2.0.10114-a447f03e46
1880 12:56:36.578668 rw: voema_v2.0.10114-a447f03e46
1881 12:56:36.581946 running image: 2
1882 12:56:36.588023 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1883 12:56:36.591616 ACPI: * FADT
1884 12:56:36.591697 SCI is IRQ9
1885 12:56:36.598292 ACPI: added table 1/32, length now 40
1886 12:56:36.598374 ACPI: * SSDT
1887 12:56:36.601482 Found 1 CPU(s) with 8 core(s) each.
1888 12:56:36.608119 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1889 12:56:36.611681 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1890 12:56:36.614783 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1891 12:56:36.618025 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1892 12:56:36.624450 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1893 12:56:36.631051 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1894 12:56:36.634660 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1895 12:56:36.640930 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1896 12:56:36.647502 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1897 12:56:36.651217 \_SB.PCI0.RP09: Added StorageD3Enable property
1898 12:56:36.657529 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1899 12:56:36.660943 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1900 12:56:36.667316 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1901 12:56:36.670419 PS2K: Passing 80 keymaps to kernel
1902 12:56:36.677420 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1903 12:56:36.683941 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1904 12:56:36.690417 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1905 12:56:36.697434 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1906 12:56:36.703750 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1907 12:56:36.710385 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1908 12:56:36.717054 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1909 12:56:36.723380 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1910 12:56:36.727158 ACPI: added table 2/32, length now 44
1911 12:56:36.730110 ACPI: * MCFG
1912 12:56:36.733356 ACPI: added table 3/32, length now 48
1913 12:56:36.733437 ACPI: * TPM2
1914 12:56:36.737106 TPM2 log created at 0x769f0000
1915 12:56:36.739937 ACPI: added table 4/32, length now 52
1916 12:56:36.743503 ACPI: * MADT
1917 12:56:36.743584 SCI is IRQ9
1918 12:56:36.746455 ACPI: added table 5/32, length now 56
1919 12:56:36.750081 current = 76b09850
1920 12:56:36.750163 ACPI: * DMAR
1921 12:56:36.756858 ACPI: added table 6/32, length now 60
1922 12:56:36.759798 ACPI: added table 7/32, length now 64
1923 12:56:36.759880 ACPI: * HPET
1924 12:56:36.762833 ACPI: added table 8/32, length now 68
1925 12:56:36.766283 ACPI: done.
1926 12:56:36.769662 ACPI tables: 35216 bytes.
1927 12:56:36.772889 smbios_write_tables: 769ef000
1928 12:56:36.776091 EC returned error result code 3
1929 12:56:36.779502 Couldn't obtain OEM name from CBI
1930 12:56:36.783096 Create SMBIOS type 16
1931 12:56:36.786313 Create SMBIOS type 17
1932 12:56:36.786393 GENERIC: 0.0 (WIFI Device)
1933 12:56:36.789481 SMBIOS tables: 1734 bytes.
1934 12:56:36.792493 Writing table forward entry at 0x00000500
1935 12:56:36.799123 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1936 12:56:36.802585 Writing coreboot table at 0x76b25000
1937 12:56:36.809023 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1938 12:56:36.816080 1. 0000000000001000-000000000009ffff: RAM
1939 12:56:36.819086 2. 00000000000a0000-00000000000fffff: RESERVED
1940 12:56:36.822672 3. 0000000000100000-00000000769eefff: RAM
1941 12:56:36.828963 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1942 12:56:36.835440 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1943 12:56:36.839098 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1944 12:56:36.845731 7. 0000000077000000-000000007fbfffff: RESERVED
1945 12:56:36.848964 8. 00000000c0000000-00000000cfffffff: RESERVED
1946 12:56:36.855504 9. 00000000f8000000-00000000f9ffffff: RESERVED
1947 12:56:36.858453 10. 00000000fb000000-00000000fb000fff: RESERVED
1948 12:56:36.865207 11. 00000000fe000000-00000000fe00ffff: RESERVED
1949 12:56:36.868736 12. 00000000fed80000-00000000fed87fff: RESERVED
1950 12:56:36.875235 13. 00000000fed90000-00000000fed92fff: RESERVED
1951 12:56:36.878878 14. 00000000feda0000-00000000feda1fff: RESERVED
1952 12:56:36.881837 15. 00000000fedc0000-00000000feddffff: RESERVED
1953 12:56:36.888892 16. 0000000100000000-00000004803fffff: RAM
1954 12:56:36.892025 Passing 4 GPIOs to payload:
1955 12:56:36.895412 NAME | PORT | POLARITY | VALUE
1956 12:56:36.901877 lid | undefined | high | high
1957 12:56:36.905402 power | undefined | high | low
1958 12:56:36.911930 oprom | undefined | high | low
1959 12:56:36.918148 EC in RW | 0x000000e5 | high | high
1960 12:56:36.925000 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f865
1961 12:56:36.925409 coreboot table: 1576 bytes.
1962 12:56:36.931630 IMD ROOT 0. 0x76fff000 0x00001000
1963 12:56:36.934681 IMD SMALL 1. 0x76ffe000 0x00001000
1964 12:56:36.938156 FSP MEMORY 2. 0x76c4e000 0x003b0000
1965 12:56:36.941048 VPD 3. 0x76c4d000 0x00000367
1966 12:56:36.944412 RO MCACHE 4. 0x76c4c000 0x00000fdc
1967 12:56:36.948219 CONSOLE 5. 0x76c2c000 0x00020000
1968 12:56:36.951363 FMAP 6. 0x76c2b000 0x00000578
1969 12:56:36.954578 TIME STAMP 7. 0x76c2a000 0x00000910
1970 12:56:36.961225 VBOOT WORK 8. 0x76c16000 0x00014000
1971 12:56:36.964347 ROMSTG STCK 9. 0x76c15000 0x00001000
1972 12:56:36.968015 AFTER CAR 10. 0x76c0a000 0x0000b000
1973 12:56:36.971176 RAMSTAGE 11. 0x76b97000 0x00073000
1974 12:56:36.974270 REFCODE 12. 0x76b42000 0x00055000
1975 12:56:36.977739 SMM BACKUP 13. 0x76b32000 0x00010000
1976 12:56:36.981013 4f444749 14. 0x76b30000 0x00002000
1977 12:56:36.984212 EXT VBT15. 0x76b2d000 0x0000219f
1978 12:56:36.987383 COREBOOT 16. 0x76b25000 0x00008000
1979 12:56:36.993978 ACPI 17. 0x76b01000 0x00024000
1980 12:56:36.997558 ACPI GNVS 18. 0x76b00000 0x00001000
1981 12:56:37.000919 RAMOOPS 19. 0x76a00000 0x00100000
1982 12:56:37.004119 TPM2 TCGLOG20. 0x769f0000 0x00010000
1983 12:56:37.007254 SMBIOS 21. 0x769ef000 0x00000800
1984 12:56:37.010647 IMD small region:
1985 12:56:37.013962 IMD ROOT 0. 0x76ffec00 0x00000400
1986 12:56:37.017274 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1987 12:56:37.020761 POWER STATE 2. 0x76ffeb80 0x00000044
1988 12:56:37.023768 ROMSTAGE 3. 0x76ffeb60 0x00000004
1989 12:56:37.030433 MEM INFO 4. 0x76ffe980 0x000001e0
1990 12:56:37.034102 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1991 12:56:37.037058 MTRR: Physical address space:
1992 12:56:37.043870 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1993 12:56:37.050212 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1994 12:56:37.056648 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1995 12:56:37.063458 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1996 12:56:37.069946 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1997 12:56:37.076700 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1998 12:56:37.083124 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1999 12:56:37.086699 MTRR: Fixed MSR 0x250 0x0606060606060606
2000 12:56:37.089630 MTRR: Fixed MSR 0x258 0x0606060606060606
2001 12:56:37.092820 MTRR: Fixed MSR 0x259 0x0000000000000000
2002 12:56:37.100059 MTRR: Fixed MSR 0x268 0x0606060606060606
2003 12:56:37.102868 MTRR: Fixed MSR 0x269 0x0606060606060606
2004 12:56:37.106422 MTRR: Fixed MSR 0x26a 0x0606060606060606
2005 12:56:37.109403 MTRR: Fixed MSR 0x26b 0x0606060606060606
2006 12:56:37.116475 MTRR: Fixed MSR 0x26c 0x0606060606060606
2007 12:56:37.120061 MTRR: Fixed MSR 0x26d 0x0606060606060606
2008 12:56:37.122928 MTRR: Fixed MSR 0x26e 0x0606060606060606
2009 12:56:37.125860 MTRR: Fixed MSR 0x26f 0x0606060606060606
2010 12:56:37.130983 call enable_fixed_mtrr()
2011 12:56:37.134128 CPU physical address size: 39 bits
2012 12:56:37.140757 MTRR: default type WB/UC MTRR counts: 6/7.
2013 12:56:37.144362 MTRR: WB selected as default type.
2014 12:56:37.150783 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2015 12:56:37.154214 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2016 12:56:37.160682 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2017 12:56:37.167401 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
2018 12:56:37.174084 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
2019 12:56:37.180174 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
2020 12:56:37.184181
2021 12:56:37.184595 MTRR check
2022 12:56:37.187723 Fixed MTRRs : Enabled
2023 12:56:37.188140 Variable MTRRs: Enabled
2024 12:56:37.188464
2025 12:56:37.194047 MTRR: Fixed MSR 0x250 0x0606060606060606
2026 12:56:37.197562 MTRR: Fixed MSR 0x258 0x0606060606060606
2027 12:56:37.200722 MTRR: Fixed MSR 0x259 0x0000000000000000
2028 12:56:37.204333 MTRR: Fixed MSR 0x268 0x0606060606060606
2029 12:56:37.210832 MTRR: Fixed MSR 0x269 0x0606060606060606
2030 12:56:37.214060 MTRR: Fixed MSR 0x26a 0x0606060606060606
2031 12:56:37.217124 MTRR: Fixed MSR 0x26b 0x0606060606060606
2032 12:56:37.220617 MTRR: Fixed MSR 0x26c 0x0606060606060606
2033 12:56:37.226946 MTRR: Fixed MSR 0x26d 0x0606060606060606
2034 12:56:37.230350 MTRR: Fixed MSR 0x26e 0x0606060606060606
2035 12:56:37.233556 MTRR: Fixed MSR 0x26f 0x0606060606060606
2036 12:56:37.241200 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
2037 12:56:37.244342 call enable_fixed_mtrr()
2038 12:56:37.248338 Checking cr50 for pending updates
2039 12:56:37.251556 CPU physical address size: 39 bits
2040 12:56:37.255361 MTRR: Fixed MSR 0x250 0x0606060606060606
2041 12:56:37.258782 MTRR: Fixed MSR 0x258 0x0606060606060606
2042 12:56:37.262417 MTRR: Fixed MSR 0x259 0x0000000000000000
2043 12:56:37.269460 MTRR: Fixed MSR 0x268 0x0606060606060606
2044 12:56:37.272979 MTRR: Fixed MSR 0x269 0x0606060606060606
2045 12:56:37.276519 MTRR: Fixed MSR 0x26a 0x0606060606060606
2046 12:56:37.280150 MTRR: Fixed MSR 0x26b 0x0606060606060606
2047 12:56:37.283751 MTRR: Fixed MSR 0x26c 0x0606060606060606
2048 12:56:37.287262 MTRR: Fixed MSR 0x26d 0x0606060606060606
2049 12:56:37.294441 MTRR: Fixed MSR 0x26e 0x0606060606060606
2050 12:56:37.297830 MTRR: Fixed MSR 0x26f 0x0606060606060606
2051 12:56:37.301369 MTRR: Fixed MSR 0x250 0x0606060606060606
2052 12:56:37.304453 call enable_fixed_mtrr()
2053 12:56:37.308129 MTRR: Fixed MSR 0x258 0x0606060606060606
2054 12:56:37.311752 MTRR: Fixed MSR 0x259 0x0000000000000000
2055 12:56:37.318951 MTRR: Fixed MSR 0x268 0x0606060606060606
2056 12:56:37.322239 MTRR: Fixed MSR 0x269 0x0606060606060606
2057 12:56:37.325672 MTRR: Fixed MSR 0x26a 0x0606060606060606
2058 12:56:37.329440 MTRR: Fixed MSR 0x26b 0x0606060606060606
2059 12:56:37.332953 MTRR: Fixed MSR 0x26c 0x0606060606060606
2060 12:56:37.336312 MTRR: Fixed MSR 0x26d 0x0606060606060606
2061 12:56:37.343269 MTRR: Fixed MSR 0x26e 0x0606060606060606
2062 12:56:37.346928 MTRR: Fixed MSR 0x26f 0x0606060606060606
2063 12:56:37.350320 CPU physical address size: 39 bits
2064 12:56:37.355470 call enable_fixed_mtrr()
2065 12:56:37.358448 MTRR: Fixed MSR 0x250 0x0606060606060606
2066 12:56:37.364929 MTRR: Fixed MSR 0x250 0x0606060606060606
2067 12:56:37.368300 MTRR: Fixed MSR 0x258 0x0606060606060606
2068 12:56:37.371750 MTRR: Fixed MSR 0x259 0x0000000000000000
2069 12:56:37.374872 MTRR: Fixed MSR 0x268 0x0606060606060606
2070 12:56:37.381549 MTRR: Fixed MSR 0x269 0x0606060606060606
2071 12:56:37.385063 MTRR: Fixed MSR 0x26a 0x0606060606060606
2072 12:56:37.388114 MTRR: Fixed MSR 0x26b 0x0606060606060606
2073 12:56:37.391287 MTRR: Fixed MSR 0x26c 0x0606060606060606
2074 12:56:37.397954 MTRR: Fixed MSR 0x26d 0x0606060606060606
2075 12:56:37.401391 MTRR: Fixed MSR 0x26e 0x0606060606060606
2076 12:56:37.404413 MTRR: Fixed MSR 0x26f 0x0606060606060606
2077 12:56:37.411926 MTRR: Fixed MSR 0x258 0x0606060606060606
2078 12:56:37.412345 call enable_fixed_mtrr()
2079 12:56:37.419021 MTRR: Fixed MSR 0x259 0x0000000000000000
2080 12:56:37.421864 MTRR: Fixed MSR 0x268 0x0606060606060606
2081 12:56:37.425354 MTRR: Fixed MSR 0x269 0x0606060606060606
2082 12:56:37.428491 MTRR: Fixed MSR 0x26a 0x0606060606060606
2083 12:56:37.435184 MTRR: Fixed MSR 0x26b 0x0606060606060606
2084 12:56:37.438636 MTRR: Fixed MSR 0x26c 0x0606060606060606
2085 12:56:37.441782 MTRR: Fixed MSR 0x26d 0x0606060606060606
2086 12:56:37.445023 MTRR: Fixed MSR 0x26e 0x0606060606060606
2087 12:56:37.451694 MTRR: Fixed MSR 0x26f 0x0606060606060606
2088 12:56:37.454699 CPU physical address size: 39 bits
2089 12:56:37.459494 call enable_fixed_mtrr()
2090 12:56:37.463004 MTRR: Fixed MSR 0x250 0x0606060606060606
2091 12:56:37.469281 MTRR: Fixed MSR 0x250 0x0606060606060606
2092 12:56:37.472994 MTRR: Fixed MSR 0x258 0x0606060606060606
2093 12:56:37.475753 MTRR: Fixed MSR 0x259 0x0000000000000000
2094 12:56:37.479521 MTRR: Fixed MSR 0x268 0x0606060606060606
2095 12:56:37.485738 MTRR: Fixed MSR 0x269 0x0606060606060606
2096 12:56:37.489048 MTRR: Fixed MSR 0x26a 0x0606060606060606
2097 12:56:37.492199 MTRR: Fixed MSR 0x26b 0x0606060606060606
2098 12:56:37.495889 MTRR: Fixed MSR 0x26c 0x0606060606060606
2099 12:56:37.502686 MTRR: Fixed MSR 0x26d 0x0606060606060606
2100 12:56:37.505389 MTRR: Fixed MSR 0x26e 0x0606060606060606
2101 12:56:37.508824 MTRR: Fixed MSR 0x26f 0x0606060606060606
2102 12:56:37.516472 MTRR: Fixed MSR 0x258 0x0606060606060606
2103 12:56:37.516959 call enable_fixed_mtrr()
2104 12:56:37.522691 MTRR: Fixed MSR 0x259 0x0000000000000000
2105 12:56:37.525875 MTRR: Fixed MSR 0x268 0x0606060606060606
2106 12:56:37.529307 MTRR: Fixed MSR 0x269 0x0606060606060606
2107 12:56:37.532639 MTRR: Fixed MSR 0x26a 0x0606060606060606
2108 12:56:37.539210 MTRR: Fixed MSR 0x26b 0x0606060606060606
2109 12:56:37.542360 MTRR: Fixed MSR 0x26c 0x0606060606060606
2110 12:56:37.546046 MTRR: Fixed MSR 0x26d 0x0606060606060606
2111 12:56:37.549055 MTRR: Fixed MSR 0x26e 0x0606060606060606
2112 12:56:37.555725 MTRR: Fixed MSR 0x26f 0x0606060606060606
2113 12:56:37.559058 CPU physical address size: 39 bits
2114 12:56:37.563749 call enable_fixed_mtrr()
2115 12:56:37.566677 CPU physical address size: 39 bits
2116 12:56:37.569958 CPU physical address size: 39 bits
2117 12:56:37.573530 CPU physical address size: 39 bits
2118 12:56:37.576627 TPM flow control failure
2119 12:56:37.579905 unexpected intermediate status 0x0
2120 12:56:37.583153 tpm transaction failed
2121 12:56:37.586748 ERROR: Attempt to enable CR50 update failed: 1f
2122 12:56:37.593155 BS: BS_PAYLOAD_LOAD entry times (exec / console): 323 / 17 ms
2123 12:56:37.602923 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2124 12:56:37.606658 Checking segment from ROM address 0xffc02b38
2125 12:56:37.609696 Checking segment from ROM address 0xffc02b54
2126 12:56:37.616221 Loading segment from ROM address 0xffc02b38
2127 12:56:37.616644 code (compression=0)
2128 12:56:37.626485 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2129 12:56:37.636278 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2130 12:56:37.636703 it's not compressed!
2131 12:56:37.776771 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2132 12:56:37.783506 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2133 12:56:37.790352 Loading segment from ROM address 0xffc02b54
2134 12:56:37.793284 Entry Point 0x30000000
2135 12:56:37.793838 Loaded segments
2136 12:56:37.799835 BS: BS_PAYLOAD_LOAD run times (exec / console): 137 / 63 ms
2137 12:56:37.845385 Finalizing chipset.
2138 12:56:37.848504 Finalizing SMM.
2139 12:56:37.848950 APMC done.
2140 12:56:37.855018 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2141 12:56:37.858123 mp_park_aps done after 0 msecs.
2142 12:56:37.861592 Jumping to boot code at 0x30000000(0x76b25000)
2143 12:56:37.871183 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2144 12:56:37.874541
2145 12:56:37.875007
2146 12:56:37.875366
2147 12:56:37.878033 Starting depthcharge on Voema...
2148 12:56:37.878577
2149 12:56:37.879724 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2150 12:56:37.880220 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2151 12:56:37.880670 Setting prompt string to ['volteer:']
2152 12:56:37.881082 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2153 12:56:37.884771 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2154 12:56:37.885196
2155 12:56:37.891117 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2156 12:56:37.891542
2157 12:56:37.897492 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2158 12:56:37.897920
2159 12:56:37.901091 Failed to find eMMC card reader
2160 12:56:37.901537
2161 12:56:37.904230 Wipe memory regions:
2162 12:56:37.904703
2163 12:56:37.907773 [0x00000000001000, 0x000000000a0000)
2164 12:56:37.908199
2165 12:56:37.910866 [0x00000000100000, 0x00000030000000)
2166 12:56:37.946890
2167 12:56:37.950435 [0x00000032662db0, 0x000000769ef000)
2168 12:56:37.999918
2169 12:56:38.003374 [0x00000100000000, 0x00000480400000)
2170 12:56:38.643349
2171 12:56:38.646949 ec_init: CrosEC protocol v3 supported (256, 256)
2172 12:56:39.078339
2173 12:56:39.078532 R8152: Initializing
2174 12:56:39.078656
2175 12:56:39.081756 Version 6 (ocp_data = 5c30)
2176 12:56:39.081893
2177 12:56:39.085044 R8152: Done initializing
2178 12:56:39.085175
2179 12:56:39.088044 Adding net device
2180 12:56:39.389707
2181 12:56:39.392673 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2182 12:56:39.392860
2183 12:56:39.393036
2184 12:56:39.393203
2185 12:56:39.396578 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2187 12:56:39.497375 volteer: tftpboot 192.168.201.1 10130708/tftp-deploy-5ko6a6tk/kernel/bzImage 10130708/tftp-deploy-5ko6a6tk/kernel/cmdline 10130708/tftp-deploy-5ko6a6tk/ramdisk/ramdisk.cpio.gz
2188 12:56:39.497955 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2189 12:56:39.498397 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2190 12:56:39.502822 tftpboot 192.168.201.1 10130708/tftp-deploy-5ko6a6tk/kernel/bzIploy-5ko6a6tk/kernel/cmdline 10130708/tftp-deploy-5ko6a6tk/ramdisk/ramdisk.cpio.gz
2191 12:56:39.503263
2192 12:56:39.503611 Waiting for link
2193 12:56:39.705884
2194 12:56:39.706379 done.
2195 12:56:39.706715
2196 12:56:39.707021 MAC: 00:24:32:30:7a:04
2197 12:56:39.707466
2198 12:56:39.708974 Sending DHCP discover... done.
2199 12:56:39.709395
2200 12:56:39.712534 Waiting for reply... done.
2201 12:56:39.712984
2202 12:56:39.716306 Sending DHCP request... done.
2203 12:56:39.716730
2204 12:56:39.724994 Waiting for reply... done.
2205 12:56:39.725448
2206 12:56:39.725814 My ip is 192.168.201.22
2207 12:56:39.726127
2208 12:56:39.731543 The DHCP server ip is 192.168.201.1
2209 12:56:39.731964
2210 12:56:39.735133 TFTP server IP predefined by user: 192.168.201.1
2211 12:56:39.735559
2212 12:56:39.741401 Bootfile predefined by user: 10130708/tftp-deploy-5ko6a6tk/kernel/bzImage
2213 12:56:39.741862
2214 12:56:39.744736 Sending tftp read request... done.
2215 12:56:39.745161
2216 12:56:39.753228 Waiting for the transfer...
2217 12:56:39.753692
2218 12:56:40.408089 00000000 ################################################################
2219 12:56:40.408741
2220 12:56:41.060244 00080000 ################################################################
2221 12:56:41.060376
2222 12:56:41.605760 00100000 ################################################################
2223 12:56:41.605897
2224 12:56:42.150439 00180000 ################################################################
2225 12:56:42.150571
2226 12:56:42.822639 00200000 ################################################################
2227 12:56:42.823275
2228 12:56:43.415972 00280000 ################################################################
2229 12:56:43.416131
2230 12:56:43.963291 00300000 ################################################################
2231 12:56:43.963441
2232 12:56:44.492486 00380000 ################################################################
2233 12:56:44.492620
2234 12:56:45.101388 00400000 ################################################################
2235 12:56:45.101923
2236 12:56:45.693613 00480000 ################################################################
2237 12:56:45.693758
2238 12:56:46.243197 00500000 ################################################################
2239 12:56:46.243361
2240 12:56:46.803107 00580000 ################################################################
2241 12:56:46.803277
2242 12:56:47.367416 00600000 ################################################################
2243 12:56:47.367588
2244 12:56:47.892109 00680000 ################################################################
2245 12:56:47.892247
2246 12:56:48.402853 00700000 ################################################################
2247 12:56:48.402998
2248 12:56:48.920329 00780000 ################################################################
2249 12:56:48.920468
2250 12:56:49.451305 00800000 ################################################################
2251 12:56:49.451441
2252 12:56:49.985847 00880000 ################################################################
2253 12:56:49.986020
2254 12:56:50.516760 00900000 ################################################################
2255 12:56:50.516926
2256 12:56:51.038897 00980000 ################################################################
2257 12:56:51.039048
2258 12:56:51.412020 00a00000 ############################################## done.
2259 12:56:51.412163
2260 12:56:51.415078 The bootfile was 10858496 bytes long.
2261 12:56:51.415161
2262 12:56:51.418764 Sending tftp read request... done.
2263 12:56:51.418878
2264 12:56:51.421699 Waiting for the transfer...
2265 12:56:51.421780
2266 12:56:51.943881 00000000 ################################################################
2267 12:56:51.944056
2268 12:56:52.462331 00080000 ################################################################
2269 12:56:52.462499
2270 12:56:52.979758 00100000 ################################################################
2271 12:56:52.979934
2272 12:56:53.496643 00180000 ################################################################
2273 12:56:53.496797
2274 12:56:54.018784 00200000 ################################################################
2275 12:56:54.018961
2276 12:56:54.531835 00280000 ################################################################
2277 12:56:54.532009
2278 12:56:55.045068 00300000 ################################################################
2279 12:56:55.045245
2280 12:56:55.558841 00380000 ################################################################
2281 12:56:55.558986
2282 12:56:56.086643 00400000 ################################################################
2283 12:56:56.086805
2284 12:56:56.599134 00480000 ################################################################
2285 12:56:56.599303
2286 12:56:57.114246 00500000 ################################################################
2287 12:56:57.114398
2288 12:56:57.632706 00580000 ################################################################
2289 12:56:57.632867
2290 12:56:58.152882 00600000 ################################################################
2291 12:56:58.153045
2292 12:56:58.194192 00680000 ###### done.
2293 12:56:58.194315
2294 12:56:58.196966 Sending tftp read request... done.
2295 12:56:58.197070
2296 12:56:58.200401 Waiting for the transfer...
2297 12:56:58.200503
2298 12:56:58.200582 00000000 # done.
2299 12:56:58.200646
2300 12:56:58.210214 Command line loaded dynamically from TFTP file: 10130708/tftp-deploy-5ko6a6tk/kernel/cmdline
2301 12:56:58.210386
2302 12:56:58.233303 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10130708/extract-nfsrootfs-34tqjyal,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2303 12:56:58.237988
2304 12:56:58.241497 Shutting down all USB controllers.
2305 12:56:58.241628
2306 12:56:58.241756 Removing current net device
2307 12:56:58.241869
2308 12:56:58.244629 Finalizing coreboot
2309 12:56:58.244765
2310 12:56:58.251312 Exiting depthcharge with code 4 at timestamp: 28967470
2311 12:56:58.251525
2312 12:56:58.251742
2313 12:56:58.251960 Starting kernel ...
2314 12:56:58.252171
2315 12:56:58.252380
2316 12:56:58.253093 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2317 12:56:58.253349 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
2318 12:56:58.253595 Setting prompt string to ['Linux version [0-9]']
2319 12:56:58.253763 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2320 12:56:58.253935 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2322 13:01:22.254450 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
2324 13:01:22.255535 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
2326 13:01:22.256374 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2329 13:01:22.257843 end: 2 depthcharge-action (duration 00:05:00) [common]
2331 13:01:22.259003 Cleaning after the job
2332 13:01:22.259473 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10130708/tftp-deploy-5ko6a6tk/ramdisk
2333 13:01:22.263859 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10130708/tftp-deploy-5ko6a6tk/kernel
2334 13:01:22.270219 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10130708/tftp-deploy-5ko6a6tk/nfsrootfs
2335 13:01:22.368938 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10130708/tftp-deploy-5ko6a6tk/modules
2336 13:01:22.369659 start: 4.1 power-off (timeout 00:00:30) [common]
2337 13:01:22.369835 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=off'
2338 13:01:22.444235 >> Command sent successfully.
2339 13:01:22.448331 Returned 0 in 0 seconds
2340 13:01:22.549285 end: 4.1 power-off (duration 00:00:00) [common]
2342 13:01:22.551801 start: 4.2 read-feedback (timeout 00:10:00) [common]
2343 13:01:22.553315 Listened to connection for namespace 'common' for up to 1s
2344 13:01:23.553880 Finalising connection for namespace 'common'
2345 13:01:23.554635 Disconnecting from shell: Finalise
2346 13:01:23.555150
2347 13:01:23.656321 end: 4.2 read-feedback (duration 00:00:01) [common]
2348 13:01:23.656943 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10130708
2349 13:01:24.152683 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10130708
2350 13:01:24.152885 JobError: Your job cannot terminate cleanly.