Boot log: asus-cx9400-volteer

    1 14:20:48.824306  lava-dispatcher, installed at version: 2023.03
    2 14:20:48.824548  start: 0 validate
    3 14:20:48.824708  Start time: 2023-05-30 14:20:48.824698+00:00 (UTC)
    4 14:20:48.824839  Using caching service: 'http://localhost/cache/?uri=%s'
    5 14:20:48.824971  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230527.0%2Famd64%2Frootfs.cpio.gz exists
    6 14:20:49.114255  Using caching service: 'http://localhost/cache/?uri=%s'
    7 14:20:49.114819  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.283-cip98-135-g4ed206c5dc11%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 14:20:49.413749  Using caching service: 'http://localhost/cache/?uri=%s'
    9 14:20:49.414850  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.283-cip98-135-g4ed206c5dc11%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 14:20:53.653055  validate duration: 4.83
   12 14:20:53.653331  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 14:20:53.653431  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 14:20:53.653521  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 14:20:53.653637  Not decompressing ramdisk as can be used compressed.
   16 14:20:53.653720  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230527.0/amd64/rootfs.cpio.gz
   17 14:20:53.653792  saving as /var/lib/lava/dispatcher/tmp/10525251/tftp-deploy-1rjzylkh/ramdisk/rootfs.cpio.gz
   18 14:20:53.653853  total size: 35744549 (34MB)
   19 14:20:54.721508  progress   0% (0MB)
   20 14:20:54.735863  progress   5% (1MB)
   21 14:20:54.745217  progress  10% (3MB)
   22 14:20:54.754197  progress  15% (5MB)
   23 14:20:54.763392  progress  20% (6MB)
   24 14:20:54.772429  progress  25% (8MB)
   25 14:20:54.781565  progress  30% (10MB)
   26 14:20:54.790480  progress  35% (11MB)
   27 14:20:54.799576  progress  40% (13MB)
   28 14:20:54.808528  progress  45% (15MB)
   29 14:20:54.817800  progress  50% (17MB)
   30 14:20:54.826754  progress  55% (18MB)
   31 14:20:54.835944  progress  60% (20MB)
   32 14:20:54.845268  progress  65% (22MB)
   33 14:20:54.854416  progress  70% (23MB)
   34 14:20:54.863673  progress  75% (25MB)
   35 14:20:54.872843  progress  80% (27MB)
   36 14:20:54.881990  progress  85% (29MB)
   37 14:20:54.891010  progress  90% (30MB)
   38 14:20:54.900059  progress  95% (32MB)
   39 14:20:54.908932  progress 100% (34MB)
   40 14:20:54.909197  34MB downloaded in 1.26s (27.15MB/s)
   41 14:20:54.909354  end: 1.1.1 http-download (duration 00:00:01) [common]
   43 14:20:54.909599  end: 1.1 download-retry (duration 00:00:01) [common]
   44 14:20:54.909686  start: 1.2 download-retry (timeout 00:09:59) [common]
   45 14:20:54.909769  start: 1.2.1 http-download (timeout 00:09:59) [common]
   46 14:20:54.909889  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.283-cip98-135-g4ed206c5dc11/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 14:20:54.909958  saving as /var/lib/lava/dispatcher/tmp/10525251/tftp-deploy-1rjzylkh/kernel/bzImage
   48 14:20:54.910018  total size: 10858496 (10MB)
   49 14:20:54.910077  No compression specified
   50 14:20:54.911320  progress   0% (0MB)
   51 14:20:54.914142  progress   5% (0MB)
   52 14:20:54.917062  progress  10% (1MB)
   53 14:20:54.919861  progress  15% (1MB)
   54 14:20:54.922760  progress  20% (2MB)
   55 14:20:54.925543  progress  25% (2MB)
   56 14:20:54.928465  progress  30% (3MB)
   57 14:20:54.931226  progress  35% (3MB)
   58 14:20:54.934092  progress  40% (4MB)
   59 14:20:54.937062  progress  45% (4MB)
   60 14:20:54.939805  progress  50% (5MB)
   61 14:20:54.942666  progress  55% (5MB)
   62 14:20:54.945460  progress  60% (6MB)
   63 14:20:54.948366  progress  65% (6MB)
   64 14:20:54.951128  progress  70% (7MB)
   65 14:20:54.953985  progress  75% (7MB)
   66 14:20:54.956839  progress  80% (8MB)
   67 14:20:54.959528  progress  85% (8MB)
   68 14:20:54.962344  progress  90% (9MB)
   69 14:20:54.965016  progress  95% (9MB)
   70 14:20:54.967838  progress 100% (10MB)
   71 14:20:54.967990  10MB downloaded in 0.06s (178.64MB/s)
   72 14:20:54.968135  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 14:20:54.968365  end: 1.2 download-retry (duration 00:00:00) [common]
   75 14:20:54.968454  start: 1.3 download-retry (timeout 00:09:59) [common]
   76 14:20:54.968542  start: 1.3.1 http-download (timeout 00:09:59) [common]
   77 14:20:54.968680  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.283-cip98-135-g4ed206c5dc11/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 14:20:54.968750  saving as /var/lib/lava/dispatcher/tmp/10525251/tftp-deploy-1rjzylkh/modules/modules.tar
   79 14:20:54.968810  total size: 484032 (0MB)
   80 14:20:54.968870  Using unxz to decompress xz
   81 14:20:54.972567  progress   6% (0MB)
   82 14:20:54.973015  progress  13% (0MB)
   83 14:20:54.973258  progress  20% (0MB)
   84 14:20:54.974657  progress  27% (0MB)
   85 14:20:54.976925  progress  33% (0MB)
   86 14:20:54.979226  progress  40% (0MB)
   87 14:20:54.981281  progress  47% (0MB)
   88 14:20:54.983612  progress  54% (0MB)
   89 14:20:54.985810  progress  60% (0MB)
   90 14:20:54.987963  progress  67% (0MB)
   91 14:20:54.990348  progress  74% (0MB)
   92 14:20:54.992667  progress  81% (0MB)
   93 14:20:54.994864  progress  88% (0MB)
   94 14:20:54.996847  progress  94% (0MB)
   95 14:20:54.998874  progress 100% (0MB)
   96 14:20:55.005039  0MB downloaded in 0.04s (12.74MB/s)
   97 14:20:55.005313  end: 1.3.1 http-download (duration 00:00:00) [common]
   99 14:20:55.005582  end: 1.3 download-retry (duration 00:00:00) [common]
  100 14:20:55.005678  start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
  101 14:20:55.005777  start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
  102 14:20:55.005858  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
  103 14:20:55.005944  start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
  104 14:20:55.006158  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10525251/lava-overlay-70u9v9qr
  105 14:20:55.006287  makedir: /var/lib/lava/dispatcher/tmp/10525251/lava-overlay-70u9v9qr/lava-10525251/bin
  106 14:20:55.006388  makedir: /var/lib/lava/dispatcher/tmp/10525251/lava-overlay-70u9v9qr/lava-10525251/tests
  107 14:20:55.006484  makedir: /var/lib/lava/dispatcher/tmp/10525251/lava-overlay-70u9v9qr/lava-10525251/results
  108 14:20:55.006599  Creating /var/lib/lava/dispatcher/tmp/10525251/lava-overlay-70u9v9qr/lava-10525251/bin/lava-add-keys
  109 14:20:55.006743  Creating /var/lib/lava/dispatcher/tmp/10525251/lava-overlay-70u9v9qr/lava-10525251/bin/lava-add-sources
  110 14:20:55.006869  Creating /var/lib/lava/dispatcher/tmp/10525251/lava-overlay-70u9v9qr/lava-10525251/bin/lava-background-process-start
  111 14:20:55.006997  Creating /var/lib/lava/dispatcher/tmp/10525251/lava-overlay-70u9v9qr/lava-10525251/bin/lava-background-process-stop
  112 14:20:55.007122  Creating /var/lib/lava/dispatcher/tmp/10525251/lava-overlay-70u9v9qr/lava-10525251/bin/lava-common-functions
  113 14:20:55.007262  Creating /var/lib/lava/dispatcher/tmp/10525251/lava-overlay-70u9v9qr/lava-10525251/bin/lava-echo-ipv4
  114 14:20:55.007388  Creating /var/lib/lava/dispatcher/tmp/10525251/lava-overlay-70u9v9qr/lava-10525251/bin/lava-install-packages
  115 14:20:55.007511  Creating /var/lib/lava/dispatcher/tmp/10525251/lava-overlay-70u9v9qr/lava-10525251/bin/lava-installed-packages
  116 14:20:55.007632  Creating /var/lib/lava/dispatcher/tmp/10525251/lava-overlay-70u9v9qr/lava-10525251/bin/lava-os-build
  117 14:20:55.007755  Creating /var/lib/lava/dispatcher/tmp/10525251/lava-overlay-70u9v9qr/lava-10525251/bin/lava-probe-channel
  118 14:20:55.007877  Creating /var/lib/lava/dispatcher/tmp/10525251/lava-overlay-70u9v9qr/lava-10525251/bin/lava-probe-ip
  119 14:20:55.007999  Creating /var/lib/lava/dispatcher/tmp/10525251/lava-overlay-70u9v9qr/lava-10525251/bin/lava-target-ip
  120 14:20:55.008121  Creating /var/lib/lava/dispatcher/tmp/10525251/lava-overlay-70u9v9qr/lava-10525251/bin/lava-target-mac
  121 14:20:55.008244  Creating /var/lib/lava/dispatcher/tmp/10525251/lava-overlay-70u9v9qr/lava-10525251/bin/lava-target-storage
  122 14:20:55.008370  Creating /var/lib/lava/dispatcher/tmp/10525251/lava-overlay-70u9v9qr/lava-10525251/bin/lava-test-case
  123 14:20:55.008490  Creating /var/lib/lava/dispatcher/tmp/10525251/lava-overlay-70u9v9qr/lava-10525251/bin/lava-test-event
  124 14:20:55.008610  Creating /var/lib/lava/dispatcher/tmp/10525251/lava-overlay-70u9v9qr/lava-10525251/bin/lava-test-feedback
  125 14:20:55.008732  Creating /var/lib/lava/dispatcher/tmp/10525251/lava-overlay-70u9v9qr/lava-10525251/bin/lava-test-raise
  126 14:20:55.008854  Creating /var/lib/lava/dispatcher/tmp/10525251/lava-overlay-70u9v9qr/lava-10525251/bin/lava-test-reference
  127 14:20:55.008976  Creating /var/lib/lava/dispatcher/tmp/10525251/lava-overlay-70u9v9qr/lava-10525251/bin/lava-test-runner
  128 14:20:55.009096  Creating /var/lib/lava/dispatcher/tmp/10525251/lava-overlay-70u9v9qr/lava-10525251/bin/lava-test-set
  129 14:20:55.009219  Creating /var/lib/lava/dispatcher/tmp/10525251/lava-overlay-70u9v9qr/lava-10525251/bin/lava-test-shell
  130 14:20:55.009344  Updating /var/lib/lava/dispatcher/tmp/10525251/lava-overlay-70u9v9qr/lava-10525251/bin/lava-install-packages (oe)
  131 14:20:55.009500  Updating /var/lib/lava/dispatcher/tmp/10525251/lava-overlay-70u9v9qr/lava-10525251/bin/lava-installed-packages (oe)
  132 14:20:55.009620  Creating /var/lib/lava/dispatcher/tmp/10525251/lava-overlay-70u9v9qr/lava-10525251/environment
  133 14:20:55.009723  LAVA metadata
  134 14:20:55.009799  - LAVA_JOB_ID=10525251
  135 14:20:55.009865  - LAVA_DISPATCHER_IP=192.168.201.1
  136 14:20:55.009967  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
  137 14:20:55.010035  skipped lava-vland-overlay
  138 14:20:55.010110  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  139 14:20:55.010194  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
  140 14:20:55.010259  skipped lava-multinode-overlay
  141 14:20:55.010332  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  142 14:20:55.010417  start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
  143 14:20:55.010492  Loading test definitions
  144 14:20:55.010583  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
  145 14:20:55.010679  Using /lava-10525251 at stage 0
  146 14:20:55.011090  uuid=10525251_1.4.2.3.1 testdef=None
  147 14:20:55.011247  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  148 14:20:55.011339  start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
  149 14:20:55.011845  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  151 14:20:55.012064  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
  152 14:20:55.012697  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  154 14:20:55.012931  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
  155 14:20:55.013686  runner path: /var/lib/lava/dispatcher/tmp/10525251/lava-overlay-70u9v9qr/lava-10525251/0/tests/0_cros-ec test_uuid 10525251_1.4.2.3.1
  156 14:20:55.013881  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  158 14:20:55.014095  Creating lava-test-runner.conf files
  159 14:20:55.014159  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10525251/lava-overlay-70u9v9qr/lava-10525251/0 for stage 0
  160 14:20:55.014247  - 0_cros-ec
  161 14:20:55.014343  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  162 14:20:55.014430  start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
  163 14:20:55.021289  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  164 14:20:55.021397  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
  165 14:20:55.021484  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  166 14:20:55.021569  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  167 14:20:55.021653  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
  168 14:20:56.003410  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
  169 14:20:56.003790  start: 1.4.4 extract-modules (timeout 00:09:58) [common]
  170 14:20:56.003905  extracting modules file /var/lib/lava/dispatcher/tmp/10525251/tftp-deploy-1rjzylkh/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10525251/extract-overlay-ramdisk-qk6jo6v3/ramdisk
  171 14:20:56.024553  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  172 14:20:56.024698  start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
  173 14:20:56.024790  [common] Applying overlay /var/lib/lava/dispatcher/tmp/10525251/compress-overlay-2u3xrqgd/overlay-1.4.2.4.tar.gz to ramdisk
  174 14:20:56.024864  [common] Applying overlay /var/lib/lava/dispatcher/tmp/10525251/compress-overlay-2u3xrqgd/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10525251/extract-overlay-ramdisk-qk6jo6v3/ramdisk
  175 14:20:56.031780  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  176 14:20:56.031894  start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
  177 14:20:56.031987  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  178 14:20:56.032081  start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
  179 14:20:56.032162  Building ramdisk /var/lib/lava/dispatcher/tmp/10525251/extract-overlay-ramdisk-qk6jo6v3/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10525251/extract-overlay-ramdisk-qk6jo6v3/ramdisk
  180 14:20:56.542936  >> 188273 blocks

  181 14:20:59.980879  rename /var/lib/lava/dispatcher/tmp/10525251/extract-overlay-ramdisk-qk6jo6v3/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10525251/tftp-deploy-1rjzylkh/ramdisk/ramdisk.cpio.gz
  182 14:20:59.981310  end: 1.4.7 compress-ramdisk (duration 00:00:04) [common]
  183 14:20:59.981431  start: 1.4.8 prepare-kernel (timeout 00:09:54) [common]
  184 14:20:59.981523  start: 1.4.8.1 prepare-fit (timeout 00:09:54) [common]
  185 14:20:59.981773  No mkimage arch provided, not using FIT.
  186 14:20:59.981858  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  187 14:20:59.981935  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  188 14:20:59.982027  end: 1.4 prepare-tftp-overlay (duration 00:00:05) [common]
  189 14:20:59.982116  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:54) [common]
  190 14:20:59.982191  No LXC device requested
  191 14:20:59.982264  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  192 14:20:59.982347  start: 1.6 deploy-device-env (timeout 00:09:54) [common]
  193 14:20:59.982421  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  194 14:20:59.982487  Checking files for TFTP limit of 4294967296 bytes.
  195 14:20:59.982869  end: 1 tftp-deploy (duration 00:00:06) [common]
  196 14:20:59.982972  start: 2 depthcharge-action (timeout 00:05:00) [common]
  197 14:20:59.983057  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  198 14:20:59.983178  substitutions:
  199 14:20:59.983278  - {DTB}: None
  200 14:20:59.983337  - {INITRD}: 10525251/tftp-deploy-1rjzylkh/ramdisk/ramdisk.cpio.gz
  201 14:20:59.983394  - {KERNEL}: 10525251/tftp-deploy-1rjzylkh/kernel/bzImage
  202 14:20:59.983448  - {LAVA_MAC}: None
  203 14:20:59.983501  - {PRESEED_CONFIG}: None
  204 14:20:59.983552  - {PRESEED_LOCAL}: None
  205 14:20:59.983605  - {RAMDISK}: 10525251/tftp-deploy-1rjzylkh/ramdisk/ramdisk.cpio.gz
  206 14:20:59.983656  - {ROOT_PART}: None
  207 14:20:59.983708  - {ROOT}: None
  208 14:20:59.983759  - {SERVER_IP}: 192.168.201.1
  209 14:20:59.983809  - {TEE}: None
  210 14:20:59.983860  Parsed boot commands:
  211 14:20:59.983909  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  212 14:20:59.984072  Parsed boot commands: tftpboot 192.168.201.1 10525251/tftp-deploy-1rjzylkh/kernel/bzImage 10525251/tftp-deploy-1rjzylkh/kernel/cmdline 10525251/tftp-deploy-1rjzylkh/ramdisk/ramdisk.cpio.gz
  213 14:20:59.984154  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  214 14:20:59.984232  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  215 14:20:59.984317  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  216 14:20:59.984398  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  217 14:20:59.984464  Not connected, no need to disconnect.
  218 14:20:59.984536  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  219 14:20:59.984612  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  220 14:20:59.984672  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-5'
  221 14:20:59.988136  Setting prompt string to ['lava-test: # ']
  222 14:20:59.988457  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  223 14:20:59.988559  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  224 14:20:59.988652  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  225 14:20:59.988737  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  226 14:20:59.988916  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-5' '--port=1' '--command=reboot'
  227 14:21:05.137204  >> Command sent successfully.

  228 14:21:05.147404  Returned 0 in 5 seconds
  229 14:21:05.248611  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  231 14:21:05.249984  end: 2.2.2 reset-device (duration 00:00:05) [common]
  232 14:21:05.250539  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  233 14:21:05.250978  Setting prompt string to 'Starting depthcharge on Voema...'
  234 14:21:05.251463  Changing prompt to 'Starting depthcharge on Voema...'
  235 14:21:05.251892  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  236 14:21:05.253129  [Enter `^Ec?' for help]

  237 14:21:06.842720  

  238 14:21:06.843378  

  239 14:21:06.851457  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...

  240 14:21:06.854872  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz

  241 14:21:06.862162  CPU: ID 806c1, Tigerlake B0, ucode: 00000086

  242 14:21:06.865663  CPU: AES supported, TXT NOT supported, VT supported

  243 14:21:06.871799  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2

  244 14:21:06.878021  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU

  245 14:21:06.881266  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2

  246 14:21:06.884931  VBOOT: Loading verstage.

  247 14:21:06.891666  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  248 14:21:06.895014  FMAP: base = 0x0 size = 0x2000000 #areas = 32

  249 14:21:06.898261  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  250 14:21:06.909192  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes

  251 14:21:06.915872  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984

  252 14:21:06.916314  

  253 14:21:06.916658  

  254 14:21:06.929085  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...

  255 14:21:06.942681  Probing TPM: . done!

  256 14:21:06.945970  TPM ready after 0 ms

  257 14:21:06.949087  Connected to device vid:did:rid of 1ae0:0028:00

  258 14:21:06.960264  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6

  259 14:21:06.966879  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  260 14:21:06.970455  Initialized TPM device CR50 revision 0

  261 14:21:07.021298  tlcl_send_startup: Startup return code is 0

  262 14:21:07.021833  TPM: setup succeeded

  263 14:21:07.035456  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  264 14:21:07.049745  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  265 14:21:07.062442  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

  266 14:21:07.072102  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  267 14:21:07.075850  Chrome EC: UHEPI supported

  268 14:21:07.079454  Phase 1

  269 14:21:07.082227  FMAP: area GBB found @ 1805000 (458752 bytes)

  270 14:21:07.089584  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  271 14:21:07.098905  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  272 14:21:07.105744  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  273 14:21:07.112209  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7

  274 14:21:07.116000  Recovery requested (1009000e)

  275 14:21:07.119611  TPM: Extending digest for VBOOT: boot mode into PCR 0

  276 14:21:07.130226  tlcl_extend: response is 0

  277 14:21:07.137486  TPM: Extending digest for VBOOT: GBB HWID into PCR 1

  278 14:21:07.146734  tlcl_extend: response is 0

  279 14:21:07.153712  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  280 14:21:07.160063  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638

  281 14:21:07.166737  BS: verstage times (exec / console): total (unknown) / 142 ms

  282 14:21:07.167210  

  283 14:21:07.167577  

  284 14:21:07.180358  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...

  285 14:21:07.186554  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  286 14:21:07.189779  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  287 14:21:07.192997  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000

  288 14:21:07.199611  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  289 14:21:07.203157  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000

  290 14:21:07.206568  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000

  291 14:21:07.209888  TCO_STS:   0000 0000

  292 14:21:07.213152  GEN_PMCON: d0015038 00002200

  293 14:21:07.216502  GBLRST_CAUSE: 00000000 00000000

  294 14:21:07.216942  HPR_CAUSE0: 00000000

  295 14:21:07.220039  prev_sleep_state 5

  296 14:21:07.223142  Boot Count incremented to 19866

  297 14:21:07.230102  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  298 14:21:07.236484  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  299 14:21:07.243299  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  300 14:21:07.249930  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c

  301 14:21:07.254351  Chrome EC: UHEPI supported

  302 14:21:07.261231  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  303 14:21:07.273907  Probing TPM:  done!

  304 14:21:07.282110  Connected to device vid:did:rid of 1ae0:0028:00

  305 14:21:07.289679  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6

  306 14:21:07.298439  Initialized TPM device CR50 revision 0

  307 14:21:07.308735  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  308 14:21:07.315447  MRC: Hash idx 0x100b comparison successful.

  309 14:21:07.318905  MRC cache found, size faa8

  310 14:21:07.319586  bootmode is set to: 2

  311 14:21:07.322524  SPD index = 0

  312 14:21:07.328960  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c

  313 14:21:07.332511  SPD: module type is LPDDR4X

  314 14:21:07.335933  SPD: module part number is MT53E512M64D4NW-046

  315 14:21:07.342277  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  316 14:21:07.345677  SPD: device width 16 bits, bus width 16 bits

  317 14:21:07.352304  SPD: module size is 1024 MB (per channel)

  318 14:21:07.785223  CBMEM:

  319 14:21:07.788312  IMD: root @ 0x76fff000 254 entries.

  320 14:21:07.791496  IMD: root @ 0x76ffec00 62 entries.

  321 14:21:07.794518  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  322 14:21:07.801584  FMAP: area RW_VPD found @ f35000 (8192 bytes)

  323 14:21:07.804828  External stage cache:

  324 14:21:07.807867  IMD: root @ 0x7b3ff000 254 entries.

  325 14:21:07.811359  IMD: root @ 0x7b3fec00 62 entries.

  326 14:21:07.826240  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  327 14:21:07.833206  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  328 14:21:07.840229  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  329 14:21:07.853434  MRC: 'RECOVERY_MRC_CACHE' does not need update.

  330 14:21:07.857229  cse_lite: Skip switching to RW in the recovery path

  331 14:21:07.860747  8 DIMMs found

  332 14:21:07.861249  SMM Memory Map

  333 14:21:07.864514  SMRAM       : 0x7b000000 0x800000

  334 14:21:07.868232   Subregion 0: 0x7b000000 0x200000

  335 14:21:07.871516   Subregion 1: 0x7b200000 0x200000

  336 14:21:07.875001   Subregion 2: 0x7b400000 0x400000

  337 14:21:07.877906  top_of_ram = 0x77000000

  338 14:21:07.884692  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  339 14:21:07.888013  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)

  340 14:21:07.895110  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  341 14:21:07.898195  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  342 14:21:07.907756  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c

  343 14:21:07.914808  Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)

  344 14:21:07.924766  Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500

  345 14:21:07.927910  Processing 211 relocs. Offset value of 0x74c0b000

  346 14:21:07.936315  BS: romstage times (exec / console): total (unknown) / 277 ms

  347 14:21:07.942517  

  348 14:21:07.942953  

  349 14:21:07.952347  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...

  350 14:21:07.955716  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  351 14:21:07.965954  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  352 14:21:07.972759  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  353 14:21:07.978949  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec

  354 14:21:07.985514  Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)

  355 14:21:08.033029  Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270

  356 14:21:08.039245  Processing 5008 relocs. Offset value of 0x75d98000

  357 14:21:08.042548  BS: postcar times (exec / console): total (unknown) / 59 ms

  358 14:21:08.045991  

  359 14:21:08.046498  

  360 14:21:08.056317  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...

  361 14:21:08.056844  Normal boot

  362 14:21:08.059890  FW_CONFIG value is 0x804c02

  363 14:21:08.062856  PCI: 00:07.0 disabled by fw_config

  364 14:21:08.066851  PCI: 00:07.1 disabled by fw_config

  365 14:21:08.069273  PCI: 00:0d.2 disabled by fw_config

  366 14:21:08.072674  PCI: 00:1c.7 disabled by fw_config

  367 14:21:08.079514  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  368 14:21:08.086536  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  369 14:21:08.089878  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  370 14:21:08.093126  GENERIC: 0.0 disabled by fw_config

  371 14:21:08.096358  GENERIC: 1.0 disabled by fw_config

  372 14:21:08.103059  fw_config match found: DB_USB=USB3_ACTIVE

  373 14:21:08.106251  fw_config match found: DB_USB=USB3_ACTIVE

  374 14:21:08.109456  fw_config match found: DB_USB=USB3_ACTIVE

  375 14:21:08.112831  fw_config match found: DB_USB=USB3_ACTIVE

  376 14:21:08.119554  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  377 14:21:08.125862  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  378 14:21:08.133120  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  379 14:21:08.142574  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c

  380 14:21:08.146037  microcode: sig=0x806c1 pf=0x80 revision=0x86

  381 14:21:08.152466  microcode: Update skipped, already up-to-date

  382 14:21:08.159115  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c

  383 14:21:08.186207  Detected 4 core, 8 thread CPU.

  384 14:21:08.189305  Setting up SMI for CPU

  385 14:21:08.192498  IED base = 0x7b400000

  386 14:21:08.193045  IED size = 0x00400000

  387 14:21:08.196142  Will perform SMM setup.

  388 14:21:08.202329  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.

  389 14:21:08.209013  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

  390 14:21:08.216023  Processing 16 relocs. Offset value of 0x00030000

  391 14:21:08.219486  Attempting to start 7 APs

  392 14:21:08.222853  Waiting for 10ms after sending INIT.

  393 14:21:08.237952  Waiting for 1st SIPI to complete...done.

  394 14:21:08.238454  AP: slot 1 apic_id 1.

  395 14:21:08.245054  Waiting for 2nd SIPI to complete...done.

  396 14:21:08.245579  AP: slot 7 apic_id 7.

  397 14:21:08.247969  AP: slot 3 apic_id 6.

  398 14:21:08.251505  AP: slot 2 apic_id 3.

  399 14:21:08.251940  AP: slot 6 apic_id 2.

  400 14:21:08.254664  AP: slot 5 apic_id 4.

  401 14:21:08.258091  AP: slot 4 apic_id 5.

  402 14:21:08.264921  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

  403 14:21:08.271902  Processing 13 relocs. Offset value of 0x00038000

  404 14:21:08.272431  Unable to locate Global NVS

  405 14:21:08.281679  SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)

  406 14:21:08.284790  Installing permanent SMM handler to 0x7b000000

  407 14:21:08.294833  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908

  408 14:21:08.297687  Processing 794 relocs. Offset value of 0x7b010000

  409 14:21:08.307739  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8

  410 14:21:08.311140  Processing 13 relocs. Offset value of 0x7b008000

  411 14:21:08.317953  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd

  412 14:21:08.324842  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd

  413 14:21:08.327865  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd

  414 14:21:08.334851  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd

  415 14:21:08.340911  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd

  416 14:21:08.347738  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd

  417 14:21:08.351206  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd

  418 14:21:08.354785  Unable to locate Global NVS

  419 14:21:08.361422  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)

  420 14:21:08.365765  Clearing SMI status registers

  421 14:21:08.369457  SMI_STS: PM1 

  422 14:21:08.369983  PM1_STS: PWRBTN 

  423 14:21:08.379525  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0

  424 14:21:08.380021  In relocation handler: CPU 0

  425 14:21:08.386379  New SMBASE=0x7b000000 IEDBASE=0x7b400000

  426 14:21:08.389270  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  427 14:21:08.392516  Relocation complete.

  428 14:21:08.399676  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1

  429 14:21:08.402394  In relocation handler: CPU 1

  430 14:21:08.405935  New SMBASE=0x7afffc00 IEDBASE=0x7b400000

  431 14:21:08.409248  Relocation complete.

  432 14:21:08.415616  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6

  433 14:21:08.419234  In relocation handler: CPU 6

  434 14:21:08.422901  New SMBASE=0x7affe800 IEDBASE=0x7b400000

  435 14:21:08.429357  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  436 14:21:08.429893  Relocation complete.

  437 14:21:08.435493  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2

  438 14:21:08.438690  In relocation handler: CPU 2

  439 14:21:08.445435  New SMBASE=0x7afff800 IEDBASE=0x7b400000

  440 14:21:08.445876  Relocation complete.

  441 14:21:08.452866  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3

  442 14:21:08.455955  In relocation handler: CPU 3

  443 14:21:08.459149  New SMBASE=0x7afff400 IEDBASE=0x7b400000

  444 14:21:08.466066  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  445 14:21:08.469170  Relocation complete.

  446 14:21:08.475609  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4

  447 14:21:08.479332  In relocation handler: CPU 4

  448 14:21:08.482814  New SMBASE=0x7afff000 IEDBASE=0x7b400000

  449 14:21:08.486038  Relocation complete.

  450 14:21:08.492575  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5

  451 14:21:08.495824  In relocation handler: CPU 5

  452 14:21:08.499327  New SMBASE=0x7affec00 IEDBASE=0x7b400000

  453 14:21:08.502361  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  454 14:21:08.506224  Relocation complete.

  455 14:21:08.512455  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7

  456 14:21:08.515502  In relocation handler: CPU 7

  457 14:21:08.519289  New SMBASE=0x7affe400 IEDBASE=0x7b400000

  458 14:21:08.522484  Relocation complete.

  459 14:21:08.526065  Initializing CPU #0

  460 14:21:08.526751  CPU: vendor Intel device 806c1

  461 14:21:08.529889  CPU: family 06, model 8c, stepping 01

  462 14:21:08.533955  Clearing out pending MCEs

  463 14:21:08.537059  Setting up local APIC...

  464 14:21:08.540438   apic_id: 0x00 done.

  465 14:21:08.540883  Turbo is available but hidden

  466 14:21:08.543836  Turbo is available and visible

  467 14:21:08.550362  microcode: Update skipped, already up-to-date

  468 14:21:08.550805  CPU #0 initialized

  469 14:21:08.553573  Initializing CPU #5

  470 14:21:08.557337  Initializing CPU #4

  471 14:21:08.560969  CPU: vendor Intel device 806c1

  472 14:21:08.563972  CPU: family 06, model 8c, stepping 01

  473 14:21:08.566901  CPU: vendor Intel device 806c1

  474 14:21:08.570500  CPU: family 06, model 8c, stepping 01

  475 14:21:08.573929  Clearing out pending MCEs

  476 14:21:08.574392  Initializing CPU #2

  477 14:21:08.577311  Initializing CPU #6

  478 14:21:08.580191  Setting up local APIC...

  479 14:21:08.583433  CPU: vendor Intel device 806c1

  480 14:21:08.586822  CPU: family 06, model 8c, stepping 01

  481 14:21:08.589984  CPU: vendor Intel device 806c1

  482 14:21:08.593498  CPU: family 06, model 8c, stepping 01

  483 14:21:08.597392  Clearing out pending MCEs

  484 14:21:08.597946  Clearing out pending MCEs

  485 14:21:08.600106  Setting up local APIC...

  486 14:21:08.603343   apic_id: 0x04 done.

  487 14:21:08.606662  Clearing out pending MCEs

  488 14:21:08.610060  microcode: Update skipped, already up-to-date

  489 14:21:08.613441  Setting up local APIC...

  490 14:21:08.613883   apic_id: 0x02 done.

  491 14:21:08.616846  Setting up local APIC...

  492 14:21:08.620581   apic_id: 0x05 done.

  493 14:21:08.621028  CPU #5 initialized

  494 14:21:08.626774  microcode: Update skipped, already up-to-date

  495 14:21:08.627259   apic_id: 0x03 done.

  496 14:21:08.633503  microcode: Update skipped, already up-to-date

  497 14:21:08.636780  microcode: Update skipped, already up-to-date

  498 14:21:08.640133  Initializing CPU #3

  499 14:21:08.640577  Initializing CPU #7

  500 14:21:08.643616  CPU: vendor Intel device 806c1

  501 14:21:08.646726  CPU: family 06, model 8c, stepping 01

  502 14:21:08.650345  CPU: vendor Intel device 806c1

  503 14:21:08.656883  CPU: family 06, model 8c, stepping 01

  504 14:21:08.657445  Clearing out pending MCEs

  505 14:21:08.660160  Initializing CPU #1

  506 14:21:08.663692  CPU #6 initialized

  507 14:21:08.664227  CPU #2 initialized

  508 14:21:08.667453  CPU: vendor Intel device 806c1

  509 14:21:08.670114  CPU: family 06, model 8c, stepping 01

  510 14:21:08.673383  Clearing out pending MCEs

  511 14:21:08.676744  Setting up local APIC...

  512 14:21:08.677185  CPU #4 initialized

  513 14:21:08.680060  Setting up local APIC...

  514 14:21:08.683526   apic_id: 0x06 done.

  515 14:21:08.686779  Clearing out pending MCEs

  516 14:21:08.690464  microcode: Update skipped, already up-to-date

  517 14:21:08.693729  Setting up local APIC...

  518 14:21:08.694203   apic_id: 0x01 done.

  519 14:21:08.696737   apic_id: 0x07 done.

  520 14:21:08.699840  CPU #3 initialized

  521 14:21:08.703338  microcode: Update skipped, already up-to-date

  522 14:21:08.706756  microcode: Update skipped, already up-to-date

  523 14:21:08.710307  CPU #7 initialized

  524 14:21:08.713134  CPU #1 initialized

  525 14:21:08.716837  bsp_do_flight_plan done after 468 msecs.

  526 14:21:08.719913  CPU: frequency set to 4000 MHz

  527 14:21:08.720357  Enabling SMIs.

  528 14:21:08.726240  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms

  529 14:21:08.742648  SATAXPCIE1 indicates PCIe NVMe is present

  530 14:21:08.746550  Probing TPM:  done!

  531 14:21:08.749795  Connected to device vid:did:rid of 1ae0:0028:00

  532 14:21:08.760104  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6

  533 14:21:08.763447  Initialized TPM device CR50 revision 0

  534 14:21:08.766923  Enabling S0i3.4

  535 14:21:08.774067  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc

  536 14:21:08.777259  Found a VBT of 8704 bytes after decompression

  537 14:21:08.783819  cse_lite: CSE RO boot. HybridStorageMode disabled

  538 14:21:08.790095  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called

  539 14:21:08.864888  FSPS returned 0

  540 14:21:08.868132  Executing Phase 1 of FspMultiPhaseSiInit

  541 14:21:08.877864  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  542 14:21:08.881490  port C0 DISC req: usage 1 usb3 1 usb2 5

  543 14:21:08.884942  Raw Buffer output 0 00000511

  544 14:21:08.888898  Raw Buffer output 1 00000000

  545 14:21:08.892053  pmc_send_ipc_cmd succeeded

  546 14:21:08.898658  port C1 DISC req: usage 1 usb3 2 usb2 3

  547 14:21:08.899086  Raw Buffer output 0 00000321

  548 14:21:08.902350  Raw Buffer output 1 00000000

  549 14:21:08.906109  pmc_send_ipc_cmd succeeded

  550 14:21:08.910992  Detected 4 core, 8 thread CPU.

  551 14:21:08.914820  Detected 4 core, 8 thread CPU.

  552 14:21:09.148631  Display FSP Version Info HOB

  553 14:21:09.152046  Reference Code - CPU = a.0.4c.31

  554 14:21:09.155359  uCode Version = 0.0.0.86

  555 14:21:09.158463  TXT ACM version = ff.ff.ff.ffff

  556 14:21:09.162227  Reference Code - ME = a.0.4c.31

  557 14:21:09.165273  MEBx version = 0.0.0.0

  558 14:21:09.168504  ME Firmware Version = Consumer SKU

  559 14:21:09.171836  Reference Code - PCH = a.0.4c.31

  560 14:21:09.175407  PCH-CRID Status = Disabled

  561 14:21:09.178675  PCH-CRID Original Value = ff.ff.ff.ffff

  562 14:21:09.181775  PCH-CRID New Value = ff.ff.ff.ffff

  563 14:21:09.185282  OPROM - RST - RAID = ff.ff.ff.ffff

  564 14:21:09.188870  PCH Hsio Version = 4.0.0.0

  565 14:21:09.191703  Reference Code - SA - System Agent = a.0.4c.31

  566 14:21:09.195243  Reference Code - MRC = 2.0.0.1

  567 14:21:09.198444  SA - PCIe Version = a.0.4c.31

  568 14:21:09.201866  SA-CRID Status = Disabled

  569 14:21:09.205007  SA-CRID Original Value = 0.0.0.1

  570 14:21:09.208460  SA-CRID New Value = 0.0.0.1

  571 14:21:09.211614  OPROM - VBIOS = ff.ff.ff.ffff

  572 14:21:09.215684  IO Manageability Engine FW Version = 11.1.4.0

  573 14:21:09.219138  PHY Build Version = 0.0.0.e0

  574 14:21:09.222133  Thunderbolt(TM) FW Version = 0.0.0.0

  575 14:21:09.229132  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  576 14:21:09.231944  ITSS IRQ Polarities Before:

  577 14:21:09.232473  IPC0: 0xffffffff

  578 14:21:09.235102  IPC1: 0xffffffff

  579 14:21:09.235578  IPC2: 0xffffffff

  580 14:21:09.238607  IPC3: 0xffffffff

  581 14:21:09.242072  ITSS IRQ Polarities After:

  582 14:21:09.242594  IPC0: 0xffffffff

  583 14:21:09.245406  IPC1: 0xffffffff

  584 14:21:09.245859  IPC2: 0xffffffff

  585 14:21:09.248362  IPC3: 0xffffffff

  586 14:21:09.252113  Found PCIe Root Port #9 at PCI: 00:1d.0.

  587 14:21:09.265351  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.

  588 14:21:09.275365  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.

  589 14:21:09.288721  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.

  590 14:21:09.294985  BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms

  591 14:21:09.295529  Enumerating buses...

  592 14:21:09.302028  Show all devs... Before device enumeration.

  593 14:21:09.302568  Root Device: enabled 1

  594 14:21:09.305370  DOMAIN: 0000: enabled 1

  595 14:21:09.308967  CPU_CLUSTER: 0: enabled 1

  596 14:21:09.312128  PCI: 00:00.0: enabled 1

  597 14:21:09.312578  PCI: 00:02.0: enabled 1

  598 14:21:09.315259  PCI: 00:04.0: enabled 1

  599 14:21:09.318504  PCI: 00:05.0: enabled 1

  600 14:21:09.321889  PCI: 00:06.0: enabled 0

  601 14:21:09.322336  PCI: 00:07.0: enabled 0

  602 14:21:09.325683  PCI: 00:07.1: enabled 0

  603 14:21:09.328521  PCI: 00:07.2: enabled 0

  604 14:21:09.332190  PCI: 00:07.3: enabled 0

  605 14:21:09.332729  PCI: 00:08.0: enabled 1

  606 14:21:09.335155  PCI: 00:09.0: enabled 0

  607 14:21:09.338480  PCI: 00:0a.0: enabled 0

  608 14:21:09.338996  PCI: 00:0d.0: enabled 1

  609 14:21:09.341796  PCI: 00:0d.1: enabled 0

  610 14:21:09.345007  PCI: 00:0d.2: enabled 0

  611 14:21:09.348183  PCI: 00:0d.3: enabled 0

  612 14:21:09.348786  PCI: 00:0e.0: enabled 0

  613 14:21:09.351814  PCI: 00:10.2: enabled 1

  614 14:21:09.354944  PCI: 00:10.6: enabled 0

  615 14:21:09.358430  PCI: 00:10.7: enabled 0

  616 14:21:09.358957  PCI: 00:12.0: enabled 0

  617 14:21:09.361467  PCI: 00:12.6: enabled 0

  618 14:21:09.365048  PCI: 00:13.0: enabled 0

  619 14:21:09.368273  PCI: 00:14.0: enabled 1

  620 14:21:09.368711  PCI: 00:14.1: enabled 0

  621 14:21:09.371530  PCI: 00:14.2: enabled 1

  622 14:21:09.374902  PCI: 00:14.3: enabled 1

  623 14:21:09.378076  PCI: 00:15.0: enabled 1

  624 14:21:09.378513  PCI: 00:15.1: enabled 1

  625 14:21:09.381563  PCI: 00:15.2: enabled 1

  626 14:21:09.384680  PCI: 00:15.3: enabled 1

  627 14:21:09.385115  PCI: 00:16.0: enabled 1

  628 14:21:09.388276  PCI: 00:16.1: enabled 0

  629 14:21:09.391639  PCI: 00:16.2: enabled 0

  630 14:21:09.394618  PCI: 00:16.3: enabled 0

  631 14:21:09.395070  PCI: 00:16.4: enabled 0

  632 14:21:09.398178  PCI: 00:16.5: enabled 0

  633 14:21:09.401794  PCI: 00:17.0: enabled 1

  634 14:21:09.404819  PCI: 00:19.0: enabled 0

  635 14:21:09.405265  PCI: 00:19.1: enabled 1

  636 14:21:09.408524  PCI: 00:19.2: enabled 0

  637 14:21:09.411812  PCI: 00:1c.0: enabled 1

  638 14:21:09.414713  PCI: 00:1c.1: enabled 0

  639 14:21:09.415140  PCI: 00:1c.2: enabled 0

  640 14:21:09.418151  PCI: 00:1c.3: enabled 0

  641 14:21:09.421484  PCI: 00:1c.4: enabled 0

  642 14:21:09.421914  PCI: 00:1c.5: enabled 0

  643 14:21:09.425072  PCI: 00:1c.6: enabled 1

  644 14:21:09.428487  PCI: 00:1c.7: enabled 0

  645 14:21:09.431260  PCI: 00:1d.0: enabled 1

  646 14:21:09.431822  PCI: 00:1d.1: enabled 0

  647 14:21:09.435260  PCI: 00:1d.2: enabled 1

  648 14:21:09.438050  PCI: 00:1d.3: enabled 0

  649 14:21:09.441638  PCI: 00:1e.0: enabled 1

  650 14:21:09.442070  PCI: 00:1e.1: enabled 0

  651 14:21:09.444632  PCI: 00:1e.2: enabled 1

  652 14:21:09.448078  PCI: 00:1e.3: enabled 1

  653 14:21:09.451396  PCI: 00:1f.0: enabled 1

  654 14:21:09.451839  PCI: 00:1f.1: enabled 0

  655 14:21:09.455053  PCI: 00:1f.2: enabled 1

  656 14:21:09.458032  PCI: 00:1f.3: enabled 1

  657 14:21:09.458554  PCI: 00:1f.4: enabled 0

  658 14:21:09.461263  PCI: 00:1f.5: enabled 1

  659 14:21:09.464970  PCI: 00:1f.6: enabled 0

  660 14:21:09.467956  PCI: 00:1f.7: enabled 0

  661 14:21:09.468408  APIC: 00: enabled 1

  662 14:21:09.471253  GENERIC: 0.0: enabled 1

  663 14:21:09.474810  GENERIC: 0.0: enabled 1

  664 14:21:09.477989  GENERIC: 1.0: enabled 1

  665 14:21:09.478559  GENERIC: 0.0: enabled 1

  666 14:21:09.481280  GENERIC: 1.0: enabled 1

  667 14:21:09.484532  USB0 port 0: enabled 1

  668 14:21:09.484980  GENERIC: 0.0: enabled 1

  669 14:21:09.487886  USB0 port 0: enabled 1

  670 14:21:09.491200  GENERIC: 0.0: enabled 1

  671 14:21:09.494768  I2C: 00:1a: enabled 1

  672 14:21:09.495351  I2C: 00:31: enabled 1

  673 14:21:09.498190  I2C: 00:32: enabled 1

  674 14:21:09.501343  I2C: 00:10: enabled 1

  675 14:21:09.502047  I2C: 00:15: enabled 1

  676 14:21:09.504451  GENERIC: 0.0: enabled 0

  677 14:21:09.507838  GENERIC: 1.0: enabled 0

  678 14:21:09.508437  GENERIC: 0.0: enabled 1

  679 14:21:09.511025  SPI: 00: enabled 1

  680 14:21:09.514875  SPI: 00: enabled 1

  681 14:21:09.515485  PNP: 0c09.0: enabled 1

  682 14:21:09.518200  GENERIC: 0.0: enabled 1

  683 14:21:09.521144  USB3 port 0: enabled 1

  684 14:21:09.521552  USB3 port 1: enabled 1

  685 14:21:09.524650  USB3 port 2: enabled 0

  686 14:21:09.528076  USB3 port 3: enabled 0

  687 14:21:09.531114  USB2 port 0: enabled 0

  688 14:21:09.531604  USB2 port 1: enabled 1

  689 14:21:09.534389  USB2 port 2: enabled 1

  690 14:21:09.537845  USB2 port 3: enabled 0

  691 14:21:09.538295  USB2 port 4: enabled 1

  692 14:21:09.541365  USB2 port 5: enabled 0

  693 14:21:09.544969  USB2 port 6: enabled 0

  694 14:21:09.547880  USB2 port 7: enabled 0

  695 14:21:09.548328  USB2 port 8: enabled 0

  696 14:21:09.551266  USB2 port 9: enabled 0

  697 14:21:09.554555  USB3 port 0: enabled 0

  698 14:21:09.555136  USB3 port 1: enabled 1

  699 14:21:09.558069  USB3 port 2: enabled 0

  700 14:21:09.561411  USB3 port 3: enabled 0

  701 14:21:09.564455  GENERIC: 0.0: enabled 1

  702 14:21:09.564911  GENERIC: 1.0: enabled 1

  703 14:21:09.568048  APIC: 01: enabled 1

  704 14:21:09.568509  APIC: 03: enabled 1

  705 14:21:09.571276  APIC: 06: enabled 1

  706 14:21:09.574297  APIC: 05: enabled 1

  707 14:21:09.574746  APIC: 04: enabled 1

  708 14:21:09.577723  APIC: 02: enabled 1

  709 14:21:09.581453  APIC: 07: enabled 1

  710 14:21:09.581903  Compare with tree...

  711 14:21:09.584846  Root Device: enabled 1

  712 14:21:09.587417   DOMAIN: 0000: enabled 1

  713 14:21:09.587871    PCI: 00:00.0: enabled 1

  714 14:21:09.591040    PCI: 00:02.0: enabled 1

  715 14:21:09.594215    PCI: 00:04.0: enabled 1

  716 14:21:09.598067     GENERIC: 0.0: enabled 1

  717 14:21:09.600698    PCI: 00:05.0: enabled 1

  718 14:21:09.601101    PCI: 00:06.0: enabled 0

  719 14:21:09.604165    PCI: 00:07.0: enabled 0

  720 14:21:09.607688     GENERIC: 0.0: enabled 1

  721 14:21:09.610978    PCI: 00:07.1: enabled 0

  722 14:21:09.614071     GENERIC: 1.0: enabled 1

  723 14:21:09.617707    PCI: 00:07.2: enabled 0

  724 14:21:09.618273     GENERIC: 0.0: enabled 1

  725 14:21:09.620814    PCI: 00:07.3: enabled 0

  726 14:21:09.624283     GENERIC: 1.0: enabled 1

  727 14:21:09.627451    PCI: 00:08.0: enabled 1

  728 14:21:09.630662    PCI: 00:09.0: enabled 0

  729 14:21:09.631121    PCI: 00:0a.0: enabled 0

  730 14:21:09.634159    PCI: 00:0d.0: enabled 1

  731 14:21:09.637895     USB0 port 0: enabled 1

  732 14:21:09.640882      USB3 port 0: enabled 1

  733 14:21:09.644337      USB3 port 1: enabled 1

  734 14:21:09.644781      USB3 port 2: enabled 0

  735 14:21:09.647872      USB3 port 3: enabled 0

  736 14:21:09.650879    PCI: 00:0d.1: enabled 0

  737 14:21:09.654702    PCI: 00:0d.2: enabled 0

  738 14:21:09.657615     GENERIC: 0.0: enabled 1

  739 14:21:09.658159    PCI: 00:0d.3: enabled 0

  740 14:21:09.660809    PCI: 00:0e.0: enabled 0

  741 14:21:09.664370    PCI: 00:10.2: enabled 1

  742 14:21:09.667308    PCI: 00:10.6: enabled 0

  743 14:21:09.671001    PCI: 00:10.7: enabled 0

  744 14:21:09.671561    PCI: 00:12.0: enabled 0

  745 14:21:09.673855    PCI: 00:12.6: enabled 0

  746 14:21:09.677469    PCI: 00:13.0: enabled 0

  747 14:21:09.680658    PCI: 00:14.0: enabled 1

  748 14:21:09.684160     USB0 port 0: enabled 1

  749 14:21:09.684603      USB2 port 0: enabled 0

  750 14:21:09.687565      USB2 port 1: enabled 1

  751 14:21:09.690877      USB2 port 2: enabled 1

  752 14:21:09.694309      USB2 port 3: enabled 0

  753 14:21:09.697221      USB2 port 4: enabled 1

  754 14:21:09.697663      USB2 port 5: enabled 0

  755 14:21:09.701120      USB2 port 6: enabled 0

  756 14:21:09.704286      USB2 port 7: enabled 0

  757 14:21:09.707440      USB2 port 8: enabled 0

  758 14:21:09.710910      USB2 port 9: enabled 0

  759 14:21:09.714305      USB3 port 0: enabled 0

  760 14:21:09.714742      USB3 port 1: enabled 1

  761 14:21:09.717321      USB3 port 2: enabled 0

  762 14:21:09.720649      USB3 port 3: enabled 0

  763 14:21:09.724631    PCI: 00:14.1: enabled 0

  764 14:21:09.727156    PCI: 00:14.2: enabled 1

  765 14:21:09.727762    PCI: 00:14.3: enabled 1

  766 14:21:09.730461     GENERIC: 0.0: enabled 1

  767 14:21:09.733994    PCI: 00:15.0: enabled 1

  768 14:21:09.737205     I2C: 00:1a: enabled 1

  769 14:21:09.740700     I2C: 00:31: enabled 1

  770 14:21:09.741140     I2C: 00:32: enabled 1

  771 14:21:09.744007    PCI: 00:15.1: enabled 1

  772 14:21:09.747131     I2C: 00:10: enabled 1

  773 14:21:09.751152    PCI: 00:15.2: enabled 1

  774 14:21:09.751849    PCI: 00:15.3: enabled 1

  775 14:21:09.754241    PCI: 00:16.0: enabled 1

  776 14:21:09.757332    PCI: 00:16.1: enabled 0

  777 14:21:09.760716    PCI: 00:16.2: enabled 0

  778 14:21:09.764286    PCI: 00:16.3: enabled 0

  779 14:21:09.764766    PCI: 00:16.4: enabled 0

  780 14:21:09.767697    PCI: 00:16.5: enabled 0

  781 14:21:09.771030    PCI: 00:17.0: enabled 1

  782 14:21:09.774798    PCI: 00:19.0: enabled 0

  783 14:21:09.775344    PCI: 00:19.1: enabled 1

  784 14:21:09.778178     I2C: 00:15: enabled 1

  785 14:21:09.781351    PCI: 00:19.2: enabled 0

  786 14:21:09.785223    PCI: 00:1d.0: enabled 1

  787 14:21:09.788297     GENERIC: 0.0: enabled 1

  788 14:21:09.788746    PCI: 00:1e.0: enabled 1

  789 14:21:09.791315    PCI: 00:1e.1: enabled 0

  790 14:21:09.794913    PCI: 00:1e.2: enabled 1

  791 14:21:09.798074     SPI: 00: enabled 1

  792 14:21:09.798508    PCI: 00:1e.3: enabled 1

  793 14:21:09.801375     SPI: 00: enabled 1

  794 14:21:09.804978    PCI: 00:1f.0: enabled 1

  795 14:21:09.808683     PNP: 0c09.0: enabled 1

  796 14:21:09.809167    PCI: 00:1f.1: enabled 0

  797 14:21:09.811557    PCI: 00:1f.2: enabled 1

  798 14:21:09.814552     GENERIC: 0.0: enabled 1

  799 14:21:09.817848      GENERIC: 0.0: enabled 1

  800 14:21:09.869888      GENERIC: 1.0: enabled 1

  801 14:21:09.870419    PCI: 00:1f.3: enabled 1

  802 14:21:09.870889    PCI: 00:1f.4: enabled 0

  803 14:21:09.871744    PCI: 00:1f.5: enabled 1

  804 14:21:09.872128    PCI: 00:1f.6: enabled 0

  805 14:21:09.872544    PCI: 00:1f.7: enabled 0

  806 14:21:09.872954   CPU_CLUSTER: 0: enabled 1

  807 14:21:09.873355    APIC: 00: enabled 1

  808 14:21:09.873757    APIC: 01: enabled 1

  809 14:21:09.874257    APIC: 03: enabled 1

  810 14:21:09.874658    APIC: 06: enabled 1

  811 14:21:09.875149    APIC: 05: enabled 1

  812 14:21:09.875577    APIC: 04: enabled 1

  813 14:21:09.876076    APIC: 02: enabled 1

  814 14:21:09.876468    APIC: 07: enabled 1

  815 14:21:09.876858  Root Device scanning...

  816 14:21:09.877319  scan_static_bus for Root Device

  817 14:21:09.877723  DOMAIN: 0000 enabled

  818 14:21:09.878201  CPU_CLUSTER: 0 enabled

  819 14:21:09.878575  DOMAIN: 0000 scanning...

  820 14:21:09.913423  PCI: pci_scan_bus for bus 00

  821 14:21:09.913725  PCI: 00:00.0 [8086/0000] ops

  822 14:21:09.914150  PCI: 00:00.0 [8086/9a12] enabled

  823 14:21:09.914340  PCI: 00:02.0 [8086/0000] bus ops

  824 14:21:09.914514  PCI: 00:02.0 [8086/9a40] enabled

  825 14:21:09.914680  PCI: 00:04.0 [8086/0000] bus ops

  826 14:21:09.914874  PCI: 00:04.0 [8086/9a03] enabled

  827 14:21:09.915043  PCI: 00:05.0 [8086/9a19] enabled

  828 14:21:09.915225  PCI: 00:07.0 [0000/0000] hidden

  829 14:21:09.915387  PCI: 00:08.0 [8086/9a11] enabled

  830 14:21:09.915585  PCI: 00:0a.0 [8086/9a0d] disabled

  831 14:21:09.915752  PCI: 00:0d.0 [8086/0000] bus ops

  832 14:21:09.915910  PCI: 00:0d.0 [8086/9a13] enabled

  833 14:21:09.916064  PCI: 00:14.0 [8086/0000] bus ops

  834 14:21:09.918057  PCI: 00:14.0 [8086/a0ed] enabled

  835 14:21:09.921499  PCI: 00:14.2 [8086/a0ef] enabled

  836 14:21:09.925018  PCI: 00:14.3 [8086/0000] bus ops

  837 14:21:09.928114  PCI: 00:14.3 [8086/a0f0] enabled

  838 14:21:09.931622  PCI: 00:15.0 [8086/0000] bus ops

  839 14:21:09.934621  PCI: 00:15.0 [8086/a0e8] enabled

  840 14:21:09.938048  PCI: 00:15.1 [8086/0000] bus ops

  841 14:21:09.941090  PCI: 00:15.1 [8086/a0e9] enabled

  842 14:21:09.944798  PCI: 00:15.2 [8086/0000] bus ops

  843 14:21:09.947913  PCI: 00:15.2 [8086/a0ea] enabled

  844 14:21:09.951536  PCI: 00:15.3 [8086/0000] bus ops

  845 14:21:09.955048  PCI: 00:15.3 [8086/a0eb] enabled

  846 14:21:09.958979  PCI: 00:16.0 [8086/0000] ops

  847 14:21:09.961616  PCI: 00:16.0 [8086/a0e0] enabled

  848 14:21:09.968054  PCI: Static device PCI: 00:17.0 not found, disabling it.

  849 14:21:09.971611  PCI: 00:19.0 [8086/0000] bus ops

  850 14:21:09.974867  PCI: 00:19.0 [8086/a0c5] disabled

  851 14:21:09.977859  PCI: 00:19.1 [8086/0000] bus ops

  852 14:21:09.981524  PCI: 00:19.1 [8086/a0c6] enabled

  853 14:21:09.984808  PCI: 00:1d.0 [8086/0000] bus ops

  854 14:21:09.988651  PCI: 00:1d.0 [8086/a0b0] enabled

  855 14:21:09.991486  PCI: 00:1e.0 [8086/0000] ops

  856 14:21:09.994799  PCI: 00:1e.0 [8086/a0a8] enabled

  857 14:21:09.998215  PCI: 00:1e.2 [8086/0000] bus ops

  858 14:21:10.001772  PCI: 00:1e.2 [8086/a0aa] enabled

  859 14:21:10.004829  PCI: 00:1e.3 [8086/0000] bus ops

  860 14:21:10.008683  PCI: 00:1e.3 [8086/a0ab] enabled

  861 14:21:10.011550  PCI: 00:1f.0 [8086/0000] bus ops

  862 14:21:10.015272  PCI: 00:1f.0 [8086/a087] enabled

  863 14:21:10.015731  RTC Init

  864 14:21:10.018145  Set power on after power failure.

  865 14:21:10.021161  Disabling Deep S3

  866 14:21:10.021621  Disabling Deep S3

  867 14:21:10.025022  Disabling Deep S4

  868 14:21:10.025460  Disabling Deep S4

  869 14:21:10.028252  Disabling Deep S5

  870 14:21:10.028712  Disabling Deep S5

  871 14:21:10.031656  PCI: 00:1f.2 [0000/0000] hidden

  872 14:21:10.035428  PCI: 00:1f.3 [8086/0000] bus ops

  873 14:21:10.038019  PCI: 00:1f.3 [8086/a0c8] enabled

  874 14:21:10.041189  PCI: 00:1f.5 [8086/0000] bus ops

  875 14:21:10.044717  PCI: 00:1f.5 [8086/a0a4] enabled

  876 14:21:10.047851  PCI: Leftover static devices:

  877 14:21:10.051189  PCI: 00:10.2

  878 14:21:10.051643  PCI: 00:10.6

  879 14:21:10.054969  PCI: 00:10.7

  880 14:21:10.055544  PCI: 00:06.0

  881 14:21:10.055895  PCI: 00:07.1

  882 14:21:10.058053  PCI: 00:07.2

  883 14:21:10.058489  PCI: 00:07.3

  884 14:21:10.061788  PCI: 00:09.0

  885 14:21:10.062327  PCI: 00:0d.1

  886 14:21:10.062680  PCI: 00:0d.2

  887 14:21:10.065064  PCI: 00:0d.3

  888 14:21:10.065604  PCI: 00:0e.0

  889 14:21:10.067934  PCI: 00:12.0

  890 14:21:10.068363  PCI: 00:12.6

  891 14:21:10.068702  PCI: 00:13.0

  892 14:21:10.071166  PCI: 00:14.1

  893 14:21:10.071660  PCI: 00:16.1

  894 14:21:10.074699  PCI: 00:16.2

  895 14:21:10.075124  PCI: 00:16.3

  896 14:21:10.077896  PCI: 00:16.4

  897 14:21:10.078318  PCI: 00:16.5

  898 14:21:10.078653  PCI: 00:17.0

  899 14:21:10.081071  PCI: 00:19.2

  900 14:21:10.081497  PCI: 00:1e.1

  901 14:21:10.085009  PCI: 00:1f.1

  902 14:21:10.085533  PCI: 00:1f.4

  903 14:21:10.085873  PCI: 00:1f.6

  904 14:21:10.087866  PCI: 00:1f.7

  905 14:21:10.091002  PCI: Check your devicetree.cb.

  906 14:21:10.094649  PCI: 00:02.0 scanning...

  907 14:21:10.097690  scan_generic_bus for PCI: 00:02.0

  908 14:21:10.101004  scan_generic_bus for PCI: 00:02.0 done

  909 14:21:10.104535  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

  910 14:21:10.107893  PCI: 00:04.0 scanning...

  911 14:21:10.111635  scan_generic_bus for PCI: 00:04.0

  912 14:21:10.114574  GENERIC: 0.0 enabled

  913 14:21:10.121605  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

  914 14:21:10.124866  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

  915 14:21:10.127875  PCI: 00:0d.0 scanning...

  916 14:21:10.131015  scan_static_bus for PCI: 00:0d.0

  917 14:21:10.131517  USB0 port 0 enabled

  918 14:21:10.134617  USB0 port 0 scanning...

  919 14:21:10.137828  scan_static_bus for USB0 port 0

  920 14:21:10.141277  USB3 port 0 enabled

  921 14:21:10.141702  USB3 port 1 enabled

  922 14:21:10.144290  USB3 port 2 disabled

  923 14:21:10.147822  USB3 port 3 disabled

  924 14:21:10.151150  USB3 port 0 scanning...

  925 14:21:10.154234  scan_static_bus for USB3 port 0

  926 14:21:10.157839  scan_static_bus for USB3 port 0 done

  927 14:21:10.161337  scan_bus: bus USB3 port 0 finished in 6 msecs

  928 14:21:10.164535  USB3 port 1 scanning...

  929 14:21:10.167666  scan_static_bus for USB3 port 1

  930 14:21:10.171075  scan_static_bus for USB3 port 1 done

  931 14:21:10.174530  scan_bus: bus USB3 port 1 finished in 6 msecs

  932 14:21:10.177422  scan_static_bus for USB0 port 0 done

  933 14:21:10.184953  scan_bus: bus USB0 port 0 finished in 43 msecs

  934 14:21:10.187426  scan_static_bus for PCI: 00:0d.0 done

  935 14:21:10.190785  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs

  936 14:21:10.194918  PCI: 00:14.0 scanning...

  937 14:21:10.197475  scan_static_bus for PCI: 00:14.0

  938 14:21:10.200952  USB0 port 0 enabled

  939 14:21:10.204853  USB0 port 0 scanning...

  940 14:21:10.207327  scan_static_bus for USB0 port 0

  941 14:21:10.207748  USB2 port 0 disabled

  942 14:21:10.211374  USB2 port 1 enabled

  943 14:21:10.214279  USB2 port 2 enabled

  944 14:21:10.214798  USB2 port 3 disabled

  945 14:21:10.217912  USB2 port 4 enabled

  946 14:21:10.218433  USB2 port 5 disabled

  947 14:21:10.220861  USB2 port 6 disabled

  948 14:21:10.224410  USB2 port 7 disabled

  949 14:21:10.224927  USB2 port 8 disabled

  950 14:21:10.227820  USB2 port 9 disabled

  951 14:21:10.231535  USB3 port 0 disabled

  952 14:21:10.232051  USB3 port 1 enabled

  953 14:21:10.234106  USB3 port 2 disabled

  954 14:21:10.237087  USB3 port 3 disabled

  955 14:21:10.237550  USB2 port 1 scanning...

  956 14:21:10.241097  scan_static_bus for USB2 port 1

  957 14:21:10.244572  scan_static_bus for USB2 port 1 done

  958 14:21:10.250749  scan_bus: bus USB2 port 1 finished in 6 msecs

  959 14:21:10.254311  USB2 port 2 scanning...

  960 14:21:10.257702  scan_static_bus for USB2 port 2

  961 14:21:10.260651  scan_static_bus for USB2 port 2 done

  962 14:21:10.263911  scan_bus: bus USB2 port 2 finished in 6 msecs

  963 14:21:10.267515  USB2 port 4 scanning...

  964 14:21:10.270517  scan_static_bus for USB2 port 4

  965 14:21:10.274277  scan_static_bus for USB2 port 4 done

  966 14:21:10.277318  scan_bus: bus USB2 port 4 finished in 6 msecs

  967 14:21:10.280693  USB3 port 1 scanning...

  968 14:21:10.283821  scan_static_bus for USB3 port 1

  969 14:21:10.287580  scan_static_bus for USB3 port 1 done

  970 14:21:10.293938  scan_bus: bus USB3 port 1 finished in 6 msecs

  971 14:21:10.297100  scan_static_bus for USB0 port 0 done

  972 14:21:10.300656  scan_bus: bus USB0 port 0 finished in 93 msecs

  973 14:21:10.304204  scan_static_bus for PCI: 00:14.0 done

  974 14:21:10.310471  scan_bus: bus PCI: 00:14.0 finished in 110 msecs

  975 14:21:10.314171  PCI: 00:14.3 scanning...

  976 14:21:10.317470  scan_static_bus for PCI: 00:14.3

  977 14:21:10.318003  GENERIC: 0.0 enabled

  978 14:21:10.320420  scan_static_bus for PCI: 00:14.3 done

  979 14:21:10.327355  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

  980 14:21:10.330729  PCI: 00:15.0 scanning...

  981 14:21:10.333895  scan_static_bus for PCI: 00:15.0

  982 14:21:10.334388  I2C: 00:1a enabled

  983 14:21:10.336964  I2C: 00:31 enabled

  984 14:21:10.340719  I2C: 00:32 enabled

  985 14:21:10.343523  scan_static_bus for PCI: 00:15.0 done

  986 14:21:10.347609  scan_bus: bus PCI: 00:15.0 finished in 12 msecs

  987 14:21:10.350641  PCI: 00:15.1 scanning...

  988 14:21:10.354456  scan_static_bus for PCI: 00:15.1

  989 14:21:10.354893  I2C: 00:10 enabled

  990 14:21:10.358039  scan_static_bus for PCI: 00:15.1 done

  991 14:21:10.364522  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

  992 14:21:10.367652  PCI: 00:15.2 scanning...

  993 14:21:10.371294  scan_static_bus for PCI: 00:15.2

  994 14:21:10.374447  scan_static_bus for PCI: 00:15.2 done

  995 14:21:10.377698  scan_bus: bus PCI: 00:15.2 finished in 7 msecs

  996 14:21:10.380884  PCI: 00:15.3 scanning...

  997 14:21:10.384440  scan_static_bus for PCI: 00:15.3

  998 14:21:10.387909  scan_static_bus for PCI: 00:15.3 done

  999 14:21:10.394608  scan_bus: bus PCI: 00:15.3 finished in 7 msecs

 1000 14:21:10.395266  PCI: 00:19.1 scanning...

 1001 14:21:10.397345  scan_static_bus for PCI: 00:19.1

 1002 14:21:10.400648  I2C: 00:15 enabled

 1003 14:21:10.404154  scan_static_bus for PCI: 00:19.1 done

 1004 14:21:10.410985  scan_bus: bus PCI: 00:19.1 finished in 9 msecs

 1005 14:21:10.411454  PCI: 00:1d.0 scanning...

 1006 14:21:10.418147  do_pci_scan_bridge for PCI: 00:1d.0

 1007 14:21:10.418686  PCI: pci_scan_bus for bus 01

 1008 14:21:10.420845  PCI: 01:00.0 [1c5c/174a] enabled

 1009 14:21:10.424517  GENERIC: 0.0 enabled

 1010 14:21:10.428533  Enabling Common Clock Configuration

 1011 14:21:10.434619  L1 Sub-State supported from root port 29

 1012 14:21:10.435203  L1 Sub-State Support = 0xf

 1013 14:21:10.437559  CommonModeRestoreTime = 0x28

 1014 14:21:10.444514  Power On Value = 0x16, Power On Scale = 0x0

 1015 14:21:10.445061  ASPM: Enabled L1

 1016 14:21:10.447388  PCIe: Max_Payload_Size adjusted to 128

 1017 14:21:10.454121  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs

 1018 14:21:10.454661  PCI: 00:1e.2 scanning...

 1019 14:21:10.461194  scan_generic_bus for PCI: 00:1e.2

 1020 14:21:10.461640  SPI: 00 enabled

 1021 14:21:10.467381  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done

 1022 14:21:10.470907  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs

 1023 14:21:10.474011  PCI: 00:1e.3 scanning...

 1024 14:21:10.477374  scan_generic_bus for PCI: 00:1e.3

 1025 14:21:10.480883  SPI: 00 enabled

 1026 14:21:10.484326  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1027 14:21:10.490707  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1028 14:21:10.494775  PCI: 00:1f.0 scanning...

 1029 14:21:10.497518  scan_static_bus for PCI: 00:1f.0

 1030 14:21:10.497943  PNP: 0c09.0 enabled

 1031 14:21:10.500786  PNP: 0c09.0 scanning...

 1032 14:21:10.504086  scan_static_bus for PNP: 0c09.0

 1033 14:21:10.507760  scan_static_bus for PNP: 0c09.0 done

 1034 14:21:10.514507  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1035 14:21:10.517834  scan_static_bus for PCI: 00:1f.0 done

 1036 14:21:10.520762  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1037 14:21:10.523958  PCI: 00:1f.2 scanning...

 1038 14:21:10.527056  scan_static_bus for PCI: 00:1f.2

 1039 14:21:10.530609  GENERIC: 0.0 enabled

 1040 14:21:10.533698  GENERIC: 0.0 scanning...

 1041 14:21:10.538132  scan_static_bus for GENERIC: 0.0

 1042 14:21:10.538638  GENERIC: 0.0 enabled

 1043 14:21:10.540686  GENERIC: 1.0 enabled

 1044 14:21:10.543726  scan_static_bus for GENERIC: 0.0 done

 1045 14:21:10.546983  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1046 14:21:10.554116  scan_static_bus for PCI: 00:1f.2 done

 1047 14:21:10.557305  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1048 14:21:10.560747  PCI: 00:1f.3 scanning...

 1049 14:21:10.563857  scan_static_bus for PCI: 00:1f.3

 1050 14:21:10.567249  scan_static_bus for PCI: 00:1f.3 done

 1051 14:21:10.570735  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1052 14:21:10.573587  PCI: 00:1f.5 scanning...

 1053 14:21:10.577058  scan_generic_bus for PCI: 00:1f.5

 1054 14:21:10.583936  scan_generic_bus for PCI: 00:1f.5 done

 1055 14:21:10.587212  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1056 14:21:10.590818  scan_bus: bus DOMAIN: 0000 finished in 717 msecs

 1057 14:21:10.597149  scan_static_bus for Root Device done

 1058 14:21:10.600233  scan_bus: bus Root Device finished in 736 msecs

 1059 14:21:10.600660  done

 1060 14:21:10.607120  BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms

 1061 14:21:10.610407  Chrome EC: UHEPI supported

 1062 14:21:10.616945  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)

 1063 14:21:10.623358  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1064 14:21:10.626882  SPI flash protection: WPSW=1 SRP0=0

 1065 14:21:10.630480  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1066 14:21:10.636950  BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms

 1067 14:21:10.640198  found VGA at PCI: 00:02.0

 1068 14:21:10.643456  Setting up VGA for PCI: 00:02.0

 1069 14:21:10.646857  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1070 14:21:10.653155  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1071 14:21:10.657223  Allocating resources...

 1072 14:21:10.657721  Reading resources...

 1073 14:21:10.663431  Root Device read_resources bus 0 link: 0

 1074 14:21:10.666543  DOMAIN: 0000 read_resources bus 0 link: 0

 1075 14:21:10.670133  PCI: 00:04.0 read_resources bus 1 link: 0

 1076 14:21:10.676853  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1077 14:21:10.680064  PCI: 00:0d.0 read_resources bus 0 link: 0

 1078 14:21:10.686440  USB0 port 0 read_resources bus 0 link: 0

 1079 14:21:10.690488  USB0 port 0 read_resources bus 0 link: 0 done

 1080 14:21:10.696564  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1081 14:21:10.699981  PCI: 00:14.0 read_resources bus 0 link: 0

 1082 14:21:10.703387  USB0 port 0 read_resources bus 0 link: 0

 1083 14:21:10.711310  USB0 port 0 read_resources bus 0 link: 0 done

 1084 14:21:10.714268  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1085 14:21:10.721598  PCI: 00:14.3 read_resources bus 0 link: 0

 1086 14:21:10.724247  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1087 14:21:10.731075  PCI: 00:15.0 read_resources bus 0 link: 0

 1088 14:21:10.734491  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1089 14:21:10.741003  PCI: 00:15.1 read_resources bus 0 link: 0

 1090 14:21:10.745050  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1091 14:21:10.751637  PCI: 00:19.1 read_resources bus 0 link: 0

 1092 14:21:10.755353  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1093 14:21:10.761936  PCI: 00:1d.0 read_resources bus 1 link: 0

 1094 14:21:10.765315  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1095 14:21:10.772025  PCI: 00:1e.2 read_resources bus 2 link: 0

 1096 14:21:10.775282  PCI: 00:1e.2 read_resources bus 2 link: 0 done

 1097 14:21:10.781714  PCI: 00:1e.3 read_resources bus 3 link: 0

 1098 14:21:10.785778  PCI: 00:1e.3 read_resources bus 3 link: 0 done

 1099 14:21:10.791592  PCI: 00:1f.0 read_resources bus 0 link: 0

 1100 14:21:10.795084  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1101 14:21:10.798184  PCI: 00:1f.2 read_resources bus 0 link: 0

 1102 14:21:10.804839  GENERIC: 0.0 read_resources bus 0 link: 0

 1103 14:21:10.808465  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1104 14:21:10.815312  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1105 14:21:10.821693  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1106 14:21:10.825011  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1107 14:21:10.831389  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1108 14:21:10.835082  Root Device read_resources bus 0 link: 0 done

 1109 14:21:10.838189  Done reading resources.

 1110 14:21:10.841505  Show resources in subtree (Root Device)...After reading.

 1111 14:21:10.848396   Root Device child on link 0 DOMAIN: 0000

 1112 14:21:10.851529    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1113 14:21:10.861531    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1114 14:21:10.871482    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1115 14:21:10.872008     PCI: 00:00.0

 1116 14:21:10.882182     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1117 14:21:10.891359     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1118 14:21:10.901067     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1119 14:21:10.911348     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1120 14:21:10.917907     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1121 14:21:10.927801     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1122 14:21:10.938431     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1123 14:21:10.947841     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1124 14:21:10.957774     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1125 14:21:10.967980     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1126 14:21:10.974366     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1127 14:21:10.984380     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1128 14:21:10.994398     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1129 14:21:11.004015     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1130 14:21:11.014166     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1131 14:21:11.020594     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1132 14:21:11.030867     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1133 14:21:11.040499     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1134 14:21:11.050453     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1135 14:21:11.060533     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1136 14:21:11.061024     PCI: 00:02.0

 1137 14:21:11.074034     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1138 14:21:11.084527     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1139 14:21:11.091107     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1140 14:21:11.097205     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1141 14:21:11.107388     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1142 14:21:11.107909      GENERIC: 0.0

 1143 14:21:11.110873     PCI: 00:05.0

 1144 14:21:11.120195     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1145 14:21:11.123627     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1146 14:21:11.126799      GENERIC: 0.0

 1147 14:21:11.127252     PCI: 00:08.0

 1148 14:21:11.136966     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1149 14:21:11.140231     PCI: 00:0a.0

 1150 14:21:11.143356     PCI: 00:0d.0 child on link 0 USB0 port 0

 1151 14:21:11.153673     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1152 14:21:11.157366      USB0 port 0 child on link 0 USB3 port 0

 1153 14:21:11.160987       USB3 port 0

 1154 14:21:11.161510       USB3 port 1

 1155 14:21:11.163361       USB3 port 2

 1156 14:21:11.163783       USB3 port 3

 1157 14:21:11.170765     PCI: 00:14.0 child on link 0 USB0 port 0

 1158 14:21:11.180109     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1159 14:21:11.183751      USB0 port 0 child on link 0 USB2 port 0

 1160 14:21:11.187212       USB2 port 0

 1161 14:21:11.187744       USB2 port 1

 1162 14:21:11.190506       USB2 port 2

 1163 14:21:11.191030       USB2 port 3

 1164 14:21:11.193871       USB2 port 4

 1165 14:21:11.194391       USB2 port 5

 1166 14:21:11.197162       USB2 port 6

 1167 14:21:11.197584       USB2 port 7

 1168 14:21:11.200064       USB2 port 8

 1169 14:21:11.200481       USB2 port 9

 1170 14:21:11.203514       USB3 port 0

 1171 14:21:11.203936       USB3 port 1

 1172 14:21:11.206964       USB3 port 2

 1173 14:21:11.210061       USB3 port 3

 1174 14:21:11.210480     PCI: 00:14.2

 1175 14:21:11.220218     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1176 14:21:11.230242     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1177 14:21:11.233762     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1178 14:21:11.243444     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1179 14:21:11.247054      GENERIC: 0.0

 1180 14:21:11.249998     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1181 14:21:11.259975     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1182 14:21:11.263558      I2C: 00:1a

 1183 14:21:11.264087      I2C: 00:31

 1184 14:21:11.266780      I2C: 00:32

 1185 14:21:11.270023     PCI: 00:15.1 child on link 0 I2C: 00:10

 1186 14:21:11.280011     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1187 14:21:11.280535      I2C: 00:10

 1188 14:21:11.283616     PCI: 00:15.2

 1189 14:21:11.293315     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1190 14:21:11.293841     PCI: 00:15.3

 1191 14:21:11.303661     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1192 14:21:11.307032     PCI: 00:16.0

 1193 14:21:11.316393     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1194 14:21:11.316953     PCI: 00:19.0

 1195 14:21:11.323153     PCI: 00:19.1 child on link 0 I2C: 00:15

 1196 14:21:11.333204     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1197 14:21:11.333728      I2C: 00:15

 1198 14:21:11.336829     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1199 14:21:11.346389     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1200 14:21:11.356250     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1201 14:21:11.366327     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1202 14:21:11.366867      GENERIC: 0.0

 1203 14:21:11.369870      PCI: 01:00.0

 1204 14:21:11.380004      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1205 14:21:11.389693      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18

 1206 14:21:11.395903      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c

 1207 14:21:11.399719     PCI: 00:1e.0

 1208 14:21:11.409740     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1209 14:21:11.416566     PCI: 00:1e.2 child on link 0 SPI: 00

 1210 14:21:11.426028     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1211 14:21:11.426562      SPI: 00

 1212 14:21:11.429693     PCI: 00:1e.3 child on link 0 SPI: 00

 1213 14:21:11.439510     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1214 14:21:11.442708      SPI: 00

 1215 14:21:11.446184     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1216 14:21:11.453248     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1217 14:21:11.455689      PNP: 0c09.0

 1218 14:21:11.465916      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1219 14:21:11.469333     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1220 14:21:11.479384     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1221 14:21:11.489420     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1222 14:21:11.493342      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1223 14:21:11.493864       GENERIC: 0.0

 1224 14:21:11.495724       GENERIC: 1.0

 1225 14:21:11.499265     PCI: 00:1f.3

 1226 14:21:11.508991     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1227 14:21:11.519094     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1228 14:21:11.519649     PCI: 00:1f.5

 1229 14:21:11.529356     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1230 14:21:11.532454    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1231 14:21:11.532964     APIC: 00

 1232 14:21:11.536040     APIC: 01

 1233 14:21:11.536558     APIC: 03

 1234 14:21:11.539405     APIC: 06

 1235 14:21:11.539916     APIC: 05

 1236 14:21:11.540252     APIC: 04

 1237 14:21:11.542496     APIC: 02

 1238 14:21:11.542915     APIC: 07

 1239 14:21:11.552317  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1240 14:21:11.555423   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1241 14:21:11.562487   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1242 14:21:11.568735   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1243 14:21:11.572364    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1244 14:21:11.575860    PCI: 01:00.0 18 *  [0x4000 - 0x4fff] mem

 1245 14:21:11.582393    PCI: 01:00.0 1c *  [0x5000 - 0x5fff] mem

 1246 14:21:11.588917   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1247 14:21:11.595366   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1248 14:21:11.602818   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1249 14:21:11.612592  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1250 14:21:11.615446  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1251 14:21:11.625107   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1252 14:21:11.632135   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1253 14:21:11.639520   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1254 14:21:11.642331   DOMAIN: 0000: Resource ranges:

 1255 14:21:11.645055   * Base: 1000, Size: 800, Tag: 100

 1256 14:21:11.648700   * Base: 1900, Size: e700, Tag: 100

 1257 14:21:11.655298    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1258 14:21:11.661605  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1259 14:21:11.668723  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1260 14:21:11.675020   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)

 1261 14:21:11.684910   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)

 1262 14:21:11.691410   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)

 1263 14:21:11.698106   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)

 1264 14:21:11.708106   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)

 1265 14:21:11.714886   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)

 1266 14:21:11.721766   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)

 1267 14:21:11.731529   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)

 1268 14:21:11.738340   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)

 1269 14:21:11.744857   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)

 1270 14:21:11.754696   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)

 1271 14:21:11.761318   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)

 1272 14:21:11.768333   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)

 1273 14:21:11.777775   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)

 1274 14:21:11.784400   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)

 1275 14:21:11.791268   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)

 1276 14:21:11.800952   update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)

 1277 14:21:11.807526   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)

 1278 14:21:11.814033   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)

 1279 14:21:11.823867   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)

 1280 14:21:11.830614   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1281 14:21:11.837080   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1282 14:21:11.840742   DOMAIN: 0000: Resource ranges:

 1283 14:21:11.847155   * Base: 7fc00000, Size: 40400000, Tag: 200

 1284 14:21:11.850536   * Base: d0000000, Size: 28000000, Tag: 200

 1285 14:21:11.854376   * Base: fa000000, Size: 1000000, Tag: 200

 1286 14:21:11.860532   * Base: fb001000, Size: 2fff000, Tag: 200

 1287 14:21:11.863698   * Base: fe010000, Size: 2e000, Tag: 200

 1288 14:21:11.867275   * Base: fe03f000, Size: d41000, Tag: 200

 1289 14:21:11.870121   * Base: fed88000, Size: 8000, Tag: 200

 1290 14:21:11.873709   * Base: fed93000, Size: d000, Tag: 200

 1291 14:21:11.880738   * Base: feda2000, Size: 1e000, Tag: 200

 1292 14:21:11.883688   * Base: fede0000, Size: 1220000, Tag: 200

 1293 14:21:11.890537   * Base: 280400000, Size: 7d7fc00000, Tag: 100200

 1294 14:21:11.896885    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem

 1295 14:21:11.903675    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem

 1296 14:21:11.910642    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem

 1297 14:21:11.916984    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem

 1298 14:21:11.923690    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem

 1299 14:21:11.930796    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem

 1300 14:21:11.936731    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem

 1301 14:21:11.943785    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem

 1302 14:21:11.950234    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem

 1303 14:21:11.956885    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem

 1304 14:21:11.963137    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem

 1305 14:21:11.969969    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem

 1306 14:21:11.976784    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem

 1307 14:21:11.983732    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem

 1308 14:21:11.989713    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem

 1309 14:21:11.996440    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem

 1310 14:21:12.003570    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem

 1311 14:21:12.009842    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem

 1312 14:21:12.016415    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem

 1313 14:21:12.022818    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem

 1314 14:21:12.029781    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem

 1315 14:21:12.036682    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem

 1316 14:21:12.043093  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1317 14:21:12.049929  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff

 1318 14:21:12.052944   PCI: 00:1d.0: Resource ranges:

 1319 14:21:12.056332   * Base: 7fc00000, Size: 100000, Tag: 200

 1320 14:21:12.062673    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem

 1321 14:21:12.069607    PCI: 01:00.0 18 *  [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem

 1322 14:21:12.076115    PCI: 01:00.0 1c *  [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem

 1323 14:21:12.086297  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done

 1324 14:21:12.092923  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1325 14:21:12.095988  Root Device assign_resources, bus 0 link: 0

 1326 14:21:12.102662  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1327 14:21:12.109297  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64

 1328 14:21:12.119536  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64

 1329 14:21:12.125950  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1330 14:21:12.136346  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64

 1331 14:21:12.139430  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1332 14:21:12.142743  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1333 14:21:12.153219  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64

 1334 14:21:12.159271  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64

 1335 14:21:12.168925  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64

 1336 14:21:12.172562  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1337 14:21:12.178934  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1338 14:21:12.185830  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64

 1339 14:21:12.192882  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1340 14:21:12.195304  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1341 14:21:12.202118  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64

 1342 14:21:12.212074  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64

 1343 14:21:12.218584  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64

 1344 14:21:12.225723  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1345 14:21:12.228484  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1346 14:21:12.238815  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64

 1347 14:21:12.242155  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1348 14:21:12.245761  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1349 14:21:12.255076  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64

 1350 14:21:12.258456  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1351 14:21:12.265304  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1352 14:21:12.271837  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64

 1353 14:21:12.281489  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64

 1354 14:21:12.288465  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64

 1355 14:21:12.298358  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64

 1356 14:21:12.301742  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1357 14:21:12.305153  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1358 14:21:12.314963  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1359 14:21:12.325004  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1360 14:21:12.335034  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem

 1361 14:21:12.338430  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1362 14:21:12.344775  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64

 1363 14:21:12.354801  PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem

 1364 14:21:12.361381  PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem

 1365 14:21:12.364735  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1366 14:21:12.375078  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64

 1367 14:21:12.378406  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1368 14:21:12.385312  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1369 14:21:12.392065  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64

 1370 14:21:12.398631  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1371 14:21:12.402060  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1372 14:21:12.404780  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1373 14:21:12.411908  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1374 14:21:12.415166  LPC: Trying to open IO window from 800 size 1ff

 1375 14:21:12.425438  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64

 1376 14:21:12.431579  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64

 1377 14:21:12.441716  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem

 1378 14:21:12.444900  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1379 14:21:12.451596  Root Device assign_resources, bus 0 link: 0

 1380 14:21:12.451680  Done setting resources.

 1381 14:21:12.458549  Show resources in subtree (Root Device)...After assigning values.

 1382 14:21:12.464997   Root Device child on link 0 DOMAIN: 0000

 1383 14:21:12.468000    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1384 14:21:12.478507    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1385 14:21:12.488245    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1386 14:21:12.488330     PCI: 00:00.0

 1387 14:21:12.497956     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1388 14:21:12.508114     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1389 14:21:12.517869     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1390 14:21:12.528035     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1391 14:21:12.534693     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1392 14:21:12.544289     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1393 14:21:12.554297     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1394 14:21:12.564836     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1395 14:21:12.574429     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1396 14:21:12.581003     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1397 14:21:12.591156     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1398 14:21:12.600974     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1399 14:21:12.610971     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1400 14:21:12.620929     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1401 14:21:12.627513     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1402 14:21:12.637925     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1403 14:21:12.647558     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1404 14:21:12.657236     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1405 14:21:12.667494     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1406 14:21:12.677383     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1407 14:21:12.677467     PCI: 00:02.0

 1408 14:21:12.690479     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10

 1409 14:21:12.700601     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18

 1410 14:21:12.710326     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1411 14:21:12.714203     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1412 14:21:12.723627     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10

 1413 14:21:12.727464      GENERIC: 0.0

 1414 14:21:12.727540     PCI: 00:05.0

 1415 14:21:12.736924     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10

 1416 14:21:12.744565     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1417 14:21:12.744642      GENERIC: 0.0

 1418 14:21:12.746938     PCI: 00:08.0

 1419 14:21:12.757269     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10

 1420 14:21:12.757351     PCI: 00:0a.0

 1421 14:21:12.763612     PCI: 00:0d.0 child on link 0 USB0 port 0

 1422 14:21:12.773636     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10

 1423 14:21:12.776926      USB0 port 0 child on link 0 USB3 port 0

 1424 14:21:12.780428       USB3 port 0

 1425 14:21:12.780507       USB3 port 1

 1426 14:21:12.783571       USB3 port 2

 1427 14:21:12.783647       USB3 port 3

 1428 14:21:12.787326     PCI: 00:14.0 child on link 0 USB0 port 0

 1429 14:21:12.800778     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10

 1430 14:21:12.803669      USB0 port 0 child on link 0 USB2 port 0

 1431 14:21:12.803749       USB2 port 0

 1432 14:21:12.807107       USB2 port 1

 1433 14:21:12.810670       USB2 port 2

 1434 14:21:12.810773       USB2 port 3

 1435 14:21:12.813342       USB2 port 4

 1436 14:21:12.813444       USB2 port 5

 1437 14:21:12.816667       USB2 port 6

 1438 14:21:12.816776       USB2 port 7

 1439 14:21:12.820181       USB2 port 8

 1440 14:21:12.820289       USB2 port 9

 1441 14:21:12.823404       USB3 port 0

 1442 14:21:12.823504       USB3 port 1

 1443 14:21:12.826823       USB3 port 2

 1444 14:21:12.826930       USB3 port 3

 1445 14:21:12.830425     PCI: 00:14.2

 1446 14:21:12.840472     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10

 1447 14:21:12.850547     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18

 1448 14:21:12.853425     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1449 14:21:12.864029     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10

 1450 14:21:12.866822      GENERIC: 0.0

 1451 14:21:12.870146     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1452 14:21:12.880050     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10

 1453 14:21:12.883377      I2C: 00:1a

 1454 14:21:12.883454      I2C: 00:31

 1455 14:21:12.886804      I2C: 00:32

 1456 14:21:12.890703     PCI: 00:15.1 child on link 0 I2C: 00:10

 1457 14:21:12.899974     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10

 1458 14:21:12.903602      I2C: 00:10

 1459 14:21:12.903675     PCI: 00:15.2

 1460 14:21:12.913404     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10

 1461 14:21:12.916861     PCI: 00:15.3

 1462 14:21:12.927318     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10

 1463 14:21:12.927398     PCI: 00:16.0

 1464 14:21:12.940095     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10

 1465 14:21:12.940202     PCI: 00:19.0

 1466 14:21:12.943692     PCI: 00:19.1 child on link 0 I2C: 00:15

 1467 14:21:12.953365     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10

 1468 14:21:12.956621      I2C: 00:15

 1469 14:21:12.960054     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1470 14:21:12.969721     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1471 14:21:12.982903     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1472 14:21:12.993146     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20

 1473 14:21:12.993230      GENERIC: 0.0

 1474 14:21:12.996542      PCI: 01:00.0

 1475 14:21:13.006479      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10

 1476 14:21:13.016360      PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18

 1477 14:21:13.026217      PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c

 1478 14:21:13.029902     PCI: 00:1e.0

 1479 14:21:13.039584     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1480 14:21:13.042861     PCI: 00:1e.2 child on link 0 SPI: 00

 1481 14:21:13.052779     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10

 1482 14:21:13.056707      SPI: 00

 1483 14:21:13.059468     PCI: 00:1e.3 child on link 0 SPI: 00

 1484 14:21:13.069695     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10

 1485 14:21:13.069775      SPI: 00

 1486 14:21:13.076029     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1487 14:21:13.083327     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1488 14:21:13.086397      PNP: 0c09.0

 1489 14:21:13.096025      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1490 14:21:13.099702     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1491 14:21:13.109348     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1492 14:21:13.119843     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1493 14:21:13.122983      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1494 14:21:13.123083       GENERIC: 0.0

 1495 14:21:13.126370       GENERIC: 1.0

 1496 14:21:13.129235     PCI: 00:1f.3

 1497 14:21:13.139527     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10

 1498 14:21:13.149258     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20

 1499 14:21:13.149339     PCI: 00:1f.5

 1500 14:21:13.159305     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10

 1501 14:21:13.166045    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1502 14:21:13.166145     APIC: 00

 1503 14:21:13.166237     APIC: 01

 1504 14:21:13.169177     APIC: 03

 1505 14:21:13.169249     APIC: 06

 1506 14:21:13.172677     APIC: 05

 1507 14:21:13.172747     APIC: 04

 1508 14:21:13.172830     APIC: 02

 1509 14:21:13.176023     APIC: 07

 1510 14:21:13.179273  Done allocating resources.

 1511 14:21:13.182331  BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms

 1512 14:21:13.189508  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

 1513 14:21:13.192656  Configure GPIOs for I2S audio on UP4.

 1514 14:21:13.200156  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms

 1515 14:21:13.203805  Enabling resources...

 1516 14:21:13.206686  PCI: 00:00.0 subsystem <- 8086/9a12

 1517 14:21:13.210102  PCI: 00:00.0 cmd <- 06

 1518 14:21:13.213527  PCI: 00:02.0 subsystem <- 8086/9a40

 1519 14:21:13.216894  PCI: 00:02.0 cmd <- 03

 1520 14:21:13.220408  PCI: 00:04.0 subsystem <- 8086/9a03

 1521 14:21:13.223888  PCI: 00:04.0 cmd <- 02

 1522 14:21:13.226926  PCI: 00:05.0 subsystem <- 8086/9a19

 1523 14:21:13.227028  PCI: 00:05.0 cmd <- 02

 1524 14:21:13.233464  PCI: 00:08.0 subsystem <- 8086/9a11

 1525 14:21:13.233584  PCI: 00:08.0 cmd <- 06

 1526 14:21:13.236605  PCI: 00:0d.0 subsystem <- 8086/9a13

 1527 14:21:13.239757  PCI: 00:0d.0 cmd <- 02

 1528 14:21:13.243599  PCI: 00:14.0 subsystem <- 8086/a0ed

 1529 14:21:13.246699  PCI: 00:14.0 cmd <- 02

 1530 14:21:13.250134  PCI: 00:14.2 subsystem <- 8086/a0ef

 1531 14:21:13.253410  PCI: 00:14.2 cmd <- 02

 1532 14:21:13.256813  PCI: 00:14.3 subsystem <- 8086/a0f0

 1533 14:21:13.259746  PCI: 00:14.3 cmd <- 02

 1534 14:21:13.263388  PCI: 00:15.0 subsystem <- 8086/a0e8

 1535 14:21:13.266557  PCI: 00:15.0 cmd <- 02

 1536 14:21:13.269957  PCI: 00:15.1 subsystem <- 8086/a0e9

 1537 14:21:13.270028  PCI: 00:15.1 cmd <- 02

 1538 14:21:13.276903  PCI: 00:15.2 subsystem <- 8086/a0ea

 1539 14:21:13.277005  PCI: 00:15.2 cmd <- 02

 1540 14:21:13.280127  PCI: 00:15.3 subsystem <- 8086/a0eb

 1541 14:21:13.284021  PCI: 00:15.3 cmd <- 02

 1542 14:21:13.286856  PCI: 00:16.0 subsystem <- 8086/a0e0

 1543 14:21:13.290320  PCI: 00:16.0 cmd <- 02

 1544 14:21:13.293271  PCI: 00:19.1 subsystem <- 8086/a0c6

 1545 14:21:13.296975  PCI: 00:19.1 cmd <- 02

 1546 14:21:13.300078  PCI: 00:1d.0 bridge ctrl <- 0013

 1547 14:21:13.303679  PCI: 00:1d.0 subsystem <- 8086/a0b0

 1548 14:21:13.306632  PCI: 00:1d.0 cmd <- 06

 1549 14:21:13.309756  PCI: 00:1e.0 subsystem <- 8086/a0a8

 1550 14:21:13.313636  PCI: 00:1e.0 cmd <- 06

 1551 14:21:13.316451  PCI: 00:1e.2 subsystem <- 8086/a0aa

 1552 14:21:13.316534  PCI: 00:1e.2 cmd <- 06

 1553 14:21:13.323919  PCI: 00:1e.3 subsystem <- 8086/a0ab

 1554 14:21:13.324000  PCI: 00:1e.3 cmd <- 02

 1555 14:21:13.327326  PCI: 00:1f.0 subsystem <- 8086/a087

 1556 14:21:13.330247  PCI: 00:1f.0 cmd <- 407

 1557 14:21:13.333346  PCI: 00:1f.3 subsystem <- 8086/a0c8

 1558 14:21:13.336645  PCI: 00:1f.3 cmd <- 02

 1559 14:21:13.340315  PCI: 00:1f.5 subsystem <- 8086/a0a4

 1560 14:21:13.343760  PCI: 00:1f.5 cmd <- 406

 1561 14:21:13.347999  PCI: 01:00.0 cmd <- 02

 1562 14:21:13.352132  done.

 1563 14:21:13.355746  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms

 1564 14:21:13.358839  Initializing devices...

 1565 14:21:13.362509  Root Device init

 1566 14:21:13.366021  Chrome EC: Set SMI mask to 0x0000000000000000

 1567 14:21:13.372480  Chrome EC: clear events_b mask to 0x0000000000000000

 1568 14:21:13.378911  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1569 14:21:13.382307  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e

 1570 14:21:13.390292  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e

 1571 14:21:13.396779  Chrome EC: Set WAKE mask to 0x0000000000000000

 1572 14:21:13.403431  fw_config match found: DB_USB=USB3_ACTIVE

 1573 14:21:13.406973  Configure Right Type-C port orientation for retimer

 1574 14:21:13.409911  Root Device init finished in 46 msecs

 1575 14:21:13.413836  PCI: 00:00.0 init

 1576 14:21:13.417156  CPU TDP = 9 Watts

 1577 14:21:13.417283  CPU PL1 = 9 Watts

 1578 14:21:13.420743  CPU PL2 = 40 Watts

 1579 14:21:13.424068  CPU PL4 = 83 Watts

 1580 14:21:13.426885  PCI: 00:00.0 init finished in 8 msecs

 1581 14:21:13.426967  PCI: 00:02.0 init

 1582 14:21:13.430336  GMA: Found VBT in CBFS

 1583 14:21:13.433575  GMA: Found valid VBT in CBFS

 1584 14:21:13.440379  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1585 14:21:13.447283                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000

 1586 14:21:13.450934  PCI: 00:02.0 init finished in 18 msecs

 1587 14:21:13.454110  PCI: 00:05.0 init

 1588 14:21:13.457087  PCI: 00:05.0 init finished in 0 msecs

 1589 14:21:13.460468  PCI: 00:08.0 init

 1590 14:21:13.463857  PCI: 00:08.0 init finished in 0 msecs

 1591 14:21:13.467207  PCI: 00:14.0 init

 1592 14:21:13.470650  PCI: 00:14.0 init finished in 0 msecs

 1593 14:21:13.473536  PCI: 00:14.2 init

 1594 14:21:13.477154  PCI: 00:14.2 init finished in 0 msecs

 1595 14:21:13.477236  PCI: 00:15.0 init

 1596 14:21:13.480276  I2C bus 0 version 0x3230302a

 1597 14:21:13.483616  DW I2C bus 0 at 0x7fe4e000 (400 KHz)

 1598 14:21:13.490185  PCI: 00:15.0 init finished in 6 msecs

 1599 14:21:13.490266  PCI: 00:15.1 init

 1600 14:21:13.493585  I2C bus 1 version 0x3230302a

 1601 14:21:13.497261  DW I2C bus 1 at 0x7fe4f000 (400 KHz)

 1602 14:21:13.501066  PCI: 00:15.1 init finished in 6 msecs

 1603 14:21:13.503551  PCI: 00:15.2 init

 1604 14:21:13.506881  I2C bus 2 version 0x3230302a

 1605 14:21:13.510338  DW I2C bus 2 at 0x7fe50000 (400 KHz)

 1606 14:21:13.514047  PCI: 00:15.2 init finished in 6 msecs

 1607 14:21:13.517182  PCI: 00:15.3 init

 1608 14:21:13.520636  I2C bus 3 version 0x3230302a

 1609 14:21:13.523831  DW I2C bus 3 at 0x7fe51000 (400 KHz)

 1610 14:21:13.526997  PCI: 00:15.3 init finished in 6 msecs

 1611 14:21:13.530501  PCI: 00:16.0 init

 1612 14:21:13.533781  PCI: 00:16.0 init finished in 0 msecs

 1613 14:21:13.537007  PCI: 00:19.1 init

 1614 14:21:13.537088  I2C bus 5 version 0x3230302a

 1615 14:21:13.543859  DW I2C bus 5 at 0x7fe53000 (400 KHz)

 1616 14:21:13.547139  PCI: 00:19.1 init finished in 6 msecs

 1617 14:21:13.547259  PCI: 00:1d.0 init

 1618 14:21:13.550282  Initializing PCH PCIe bridge.

 1619 14:21:13.553741  PCI: 00:1d.0 init finished in 3 msecs

 1620 14:21:13.558153  PCI: 00:1f.0 init

 1621 14:21:13.561173  IOAPIC: Initializing IOAPIC at 0xfec00000

 1622 14:21:13.567874  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1623 14:21:13.567955  IOAPIC: ID = 0x02

 1624 14:21:13.571466  IOAPIC: Dumping registers

 1625 14:21:13.574818    reg 0x0000: 0x02000000

 1626 14:21:13.577939    reg 0x0001: 0x00770020

 1627 14:21:13.578020    reg 0x0002: 0x00000000

 1628 14:21:13.584416  PCI: 00:1f.0 init finished in 21 msecs

 1629 14:21:13.584498  PCI: 00:1f.2 init

 1630 14:21:13.587589  Disabling ACPI via APMC.

 1631 14:21:13.591622  APMC done.

 1632 14:21:13.594324  PCI: 00:1f.2 init finished in 5 msecs

 1633 14:21:13.606278  PCI: 01:00.0 init

 1634 14:21:13.609505  PCI: 01:00.0 init finished in 0 msecs

 1635 14:21:13.612794  PNP: 0c09.0 init

 1636 14:21:13.616196  Google Chrome EC uptime: 8.410 seconds

 1637 14:21:13.622808  Google Chrome AP resets since EC boot: 1

 1638 14:21:13.626316  Google Chrome most recent AP reset causes:

 1639 14:21:13.629317  	0.350: 32775 shutdown: entering G3

 1640 14:21:13.636046  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

 1641 14:21:13.639289  PNP: 0c09.0 init finished in 22 msecs

 1642 14:21:13.645140  Devices initialized

 1643 14:21:13.648300  Show all devs... After init.

 1644 14:21:13.651493  Root Device: enabled 1

 1645 14:21:13.651574  DOMAIN: 0000: enabled 1

 1646 14:21:13.654953  CPU_CLUSTER: 0: enabled 1

 1647 14:21:13.658027  PCI: 00:00.0: enabled 1

 1648 14:21:13.661835  PCI: 00:02.0: enabled 1

 1649 14:21:13.661944  PCI: 00:04.0: enabled 1

 1650 14:21:13.665248  PCI: 00:05.0: enabled 1

 1651 14:21:13.668418  PCI: 00:06.0: enabled 0

 1652 14:21:13.671371  PCI: 00:07.0: enabled 0

 1653 14:21:13.671488  PCI: 00:07.1: enabled 0

 1654 14:21:13.674844  PCI: 00:07.2: enabled 0

 1655 14:21:13.678562  PCI: 00:07.3: enabled 0

 1656 14:21:13.681212  PCI: 00:08.0: enabled 1

 1657 14:21:13.681309  PCI: 00:09.0: enabled 0

 1658 14:21:13.684871  PCI: 00:0a.0: enabled 0

 1659 14:21:13.687960  PCI: 00:0d.0: enabled 1

 1660 14:21:13.691219  PCI: 00:0d.1: enabled 0

 1661 14:21:13.691299  PCI: 00:0d.2: enabled 0

 1662 14:21:13.694699  PCI: 00:0d.3: enabled 0

 1663 14:21:13.698710  PCI: 00:0e.0: enabled 0

 1664 14:21:13.698791  PCI: 00:10.2: enabled 1

 1665 14:21:13.701307  PCI: 00:10.6: enabled 0

 1666 14:21:13.704612  PCI: 00:10.7: enabled 0

 1667 14:21:13.707733  PCI: 00:12.0: enabled 0

 1668 14:21:13.707830  PCI: 00:12.6: enabled 0

 1669 14:21:13.711428  PCI: 00:13.0: enabled 0

 1670 14:21:13.714388  PCI: 00:14.0: enabled 1

 1671 14:21:13.718010  PCI: 00:14.1: enabled 0

 1672 14:21:13.718092  PCI: 00:14.2: enabled 1

 1673 14:21:13.721527  PCI: 00:14.3: enabled 1

 1674 14:21:13.724589  PCI: 00:15.0: enabled 1

 1675 14:21:13.728263  PCI: 00:15.1: enabled 1

 1676 14:21:13.728344  PCI: 00:15.2: enabled 1

 1677 14:21:13.731011  PCI: 00:15.3: enabled 1

 1678 14:21:13.734394  PCI: 00:16.0: enabled 1

 1679 14:21:13.737572  PCI: 00:16.1: enabled 0

 1680 14:21:13.737700  PCI: 00:16.2: enabled 0

 1681 14:21:13.740726  PCI: 00:16.3: enabled 0

 1682 14:21:13.744181  PCI: 00:16.4: enabled 0

 1683 14:21:13.747678  PCI: 00:16.5: enabled 0

 1684 14:21:13.747759  PCI: 00:17.0: enabled 0

 1685 14:21:13.750777  PCI: 00:19.0: enabled 0

 1686 14:21:13.754498  PCI: 00:19.1: enabled 1

 1687 14:21:13.754607  PCI: 00:19.2: enabled 0

 1688 14:21:13.757446  PCI: 00:1c.0: enabled 1

 1689 14:21:13.760989  PCI: 00:1c.1: enabled 0

 1690 14:21:13.764396  PCI: 00:1c.2: enabled 0

 1691 14:21:13.764477  PCI: 00:1c.3: enabled 0

 1692 14:21:13.767413  PCI: 00:1c.4: enabled 0

 1693 14:21:13.771163  PCI: 00:1c.5: enabled 0

 1694 14:21:13.774188  PCI: 00:1c.6: enabled 1

 1695 14:21:13.774269  PCI: 00:1c.7: enabled 0

 1696 14:21:13.777319  PCI: 00:1d.0: enabled 1

 1697 14:21:13.781047  PCI: 00:1d.1: enabled 0

 1698 14:21:13.784551  PCI: 00:1d.2: enabled 1

 1699 14:21:13.784632  PCI: 00:1d.3: enabled 0

 1700 14:21:13.787706  PCI: 00:1e.0: enabled 1

 1701 14:21:13.791050  PCI: 00:1e.1: enabled 0

 1702 14:21:13.791132  PCI: 00:1e.2: enabled 1

 1703 14:21:13.794230  PCI: 00:1e.3: enabled 1

 1704 14:21:13.797518  PCI: 00:1f.0: enabled 1

 1705 14:21:13.801044  PCI: 00:1f.1: enabled 0

 1706 14:21:13.801126  PCI: 00:1f.2: enabled 1

 1707 14:21:13.804610  PCI: 00:1f.3: enabled 1

 1708 14:21:13.807590  PCI: 00:1f.4: enabled 0

 1709 14:21:13.811075  PCI: 00:1f.5: enabled 1

 1710 14:21:13.811178  PCI: 00:1f.6: enabled 0

 1711 14:21:13.814176  PCI: 00:1f.7: enabled 0

 1712 14:21:13.817453  APIC: 00: enabled 1

 1713 14:21:13.817534  GENERIC: 0.0: enabled 1

 1714 14:21:13.820760  GENERIC: 0.0: enabled 1

 1715 14:21:13.824124  GENERIC: 1.0: enabled 1

 1716 14:21:13.827415  GENERIC: 0.0: enabled 1

 1717 14:21:13.827503  GENERIC: 1.0: enabled 1

 1718 14:21:13.830824  USB0 port 0: enabled 1

 1719 14:21:13.834204  GENERIC: 0.0: enabled 1

 1720 14:21:13.838123  USB0 port 0: enabled 1

 1721 14:21:13.838205  GENERIC: 0.0: enabled 1

 1722 14:21:13.840956  I2C: 00:1a: enabled 1

 1723 14:21:13.844186  I2C: 00:31: enabled 1

 1724 14:21:13.844268  I2C: 00:32: enabled 1

 1725 14:21:13.847690  I2C: 00:10: enabled 1

 1726 14:21:13.850615  I2C: 00:15: enabled 1

 1727 14:21:13.850696  GENERIC: 0.0: enabled 0

 1728 14:21:13.853932  GENERIC: 1.0: enabled 0

 1729 14:21:13.857357  GENERIC: 0.0: enabled 1

 1730 14:21:13.857439  SPI: 00: enabled 1

 1731 14:21:13.860888  SPI: 00: enabled 1

 1732 14:21:13.864468  PNP: 0c09.0: enabled 1

 1733 14:21:13.864550  GENERIC: 0.0: enabled 1

 1734 14:21:13.867503  USB3 port 0: enabled 1

 1735 14:21:13.870997  USB3 port 1: enabled 1

 1736 14:21:13.874248  USB3 port 2: enabled 0

 1737 14:21:13.874346  USB3 port 3: enabled 0

 1738 14:21:13.877653  USB2 port 0: enabled 0

 1739 14:21:13.880370  USB2 port 1: enabled 1

 1740 14:21:13.880451  USB2 port 2: enabled 1

 1741 14:21:13.883905  USB2 port 3: enabled 0

 1742 14:21:13.887010  USB2 port 4: enabled 1

 1743 14:21:13.890337  USB2 port 5: enabled 0

 1744 14:21:13.890436  USB2 port 6: enabled 0

 1745 14:21:13.893788  USB2 port 7: enabled 0

 1746 14:21:13.897196  USB2 port 8: enabled 0

 1747 14:21:13.897277  USB2 port 9: enabled 0

 1748 14:21:13.900735  USB3 port 0: enabled 0

 1749 14:21:13.903719  USB3 port 1: enabled 1

 1750 14:21:13.903801  USB3 port 2: enabled 0

 1751 14:21:13.907075  USB3 port 3: enabled 0

 1752 14:21:13.910314  GENERIC: 0.0: enabled 1

 1753 14:21:13.914051  GENERIC: 1.0: enabled 1

 1754 14:21:13.914175  APIC: 01: enabled 1

 1755 14:21:13.917072  APIC: 03: enabled 1

 1756 14:21:13.917153  APIC: 06: enabled 1

 1757 14:21:13.920564  APIC: 05: enabled 1

 1758 14:21:13.923628  APIC: 04: enabled 1

 1759 14:21:13.923710  APIC: 02: enabled 1

 1760 14:21:13.927126  APIC: 07: enabled 1

 1761 14:21:13.930659  PCI: 01:00.0: enabled 1

 1762 14:21:13.933622  BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms

 1763 14:21:13.940454  FMAP: area RW_ELOG found @ f30000 (4096 bytes)

 1764 14:21:13.943854  ELOG: NV offset 0xf30000 size 0x1000

 1765 14:21:13.950234  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1766 14:21:13.956876  ELOG: Event(17) added with size 13 at 2023-05-30 14:21:13 UTC

 1767 14:21:13.963511  ELOG: Event(92) added with size 9 at 2023-05-30 14:21:13 UTC

 1768 14:21:13.970133  ELOG: Event(93) added with size 9 at 2023-05-30 14:21:13 UTC

 1769 14:21:13.976780  ELOG: Event(9E) added with size 10 at 2023-05-30 14:21:13 UTC

 1770 14:21:13.983380  ELOG: Event(9F) added with size 14 at 2023-05-30 14:21:13 UTC

 1771 14:21:13.990435  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms

 1772 14:21:13.993430  ELOG: Event(A1) added with size 10 at 2023-05-30 14:21:13 UTC

 1773 14:21:14.000449  elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b

 1774 14:21:14.006925  BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms

 1775 14:21:14.010028  Finalize devices...

 1776 14:21:14.010110  Devices finalized

 1777 14:21:14.017006  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms

 1778 14:21:14.020072  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)

 1779 14:21:14.026674  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 1780 14:21:14.033971  ME: HFSTS1                      : 0x80030055

 1781 14:21:14.036559  ME: HFSTS2                      : 0x30280116

 1782 14:21:14.040309  ME: HFSTS3                      : 0x00000050

 1783 14:21:14.046997  ME: HFSTS4                      : 0x00004000

 1784 14:21:14.050359  ME: HFSTS5                      : 0x00000000

 1785 14:21:14.053374  ME: HFSTS6                      : 0x00400006

 1786 14:21:14.056899  ME: Manufacturing Mode          : YES

 1787 14:21:14.063382  ME: SPI Protection Mode Enabled : NO

 1788 14:21:14.066932  ME: FW Partition Table          : OK

 1789 14:21:14.069937  ME: Bringup Loader Failure      : NO

 1790 14:21:14.073423  ME: Firmware Init Complete      : NO

 1791 14:21:14.076448  ME: Boot Options Present        : NO

 1792 14:21:14.079827  ME: Update In Progress          : NO

 1793 14:21:14.082982  ME: D0i3 Support                : YES

 1794 14:21:14.086611  ME: Low Power State Enabled     : NO

 1795 14:21:14.093013  ME: CPU Replaced                : YES

 1796 14:21:14.096423  ME: CPU Replacement Valid       : YES

 1797 14:21:14.100177  ME: Current Working State       : 5

 1798 14:21:14.103167  ME: Current Operation State     : 1

 1799 14:21:14.106277  ME: Current Operation Mode      : 3

 1800 14:21:14.110012  ME: Error Code                  : 0

 1801 14:21:14.112924  ME: Enhanced Debug Mode         : NO

 1802 14:21:14.116763  ME: CPU Debug Disabled          : YES

 1803 14:21:14.119623  ME: TXT Support                 : NO

 1804 14:21:14.126822  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms

 1805 14:21:14.136361  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4

 1806 14:21:14.139854  CBFS: 'fallback/slic' not found.

 1807 14:21:14.142983  ACPI: Writing ACPI tables at 76b01000.

 1808 14:21:14.143065  ACPI:    * FACS

 1809 14:21:14.146635  ACPI:    * DSDT

 1810 14:21:14.149553  Ramoops buffer: 0x100000@0x76a00000.

 1811 14:21:14.153186  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

 1812 14:21:14.159940  FMAP: area RW_VPD found @ f35000 (8192 bytes)

 1813 14:21:14.162941  Google Chrome EC: version:

 1814 14:21:14.166480  	ro: voema_v2.0.7540-147f8d37d1

 1815 14:21:14.169496  	rw: voema_v2.0.7540-147f8d37d1

 1816 14:21:14.169578    running image: 2

 1817 14:21:14.176378  PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000

 1818 14:21:14.180827  ACPI:    * FADT

 1819 14:21:14.180908  SCI is IRQ9

 1820 14:21:14.187691  ACPI: added table 1/32, length now 40

 1821 14:21:14.187773  ACPI:     * SSDT

 1822 14:21:14.190853  Found 1 CPU(s) with 8 core(s) each.

 1823 14:21:14.197641  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2

 1824 14:21:14.200586  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 1825 14:21:14.204074  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 1826 14:21:14.207470  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a

 1827 14:21:14.214055  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 1828 14:21:14.220831  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 1829 14:21:14.224505  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10

 1830 14:21:14.230661  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 1831 14:21:14.237825  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)

 1832 14:21:14.241167  \_SB.PCI0.RP09: Added StorageD3Enable property

 1833 14:21:14.244096  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1834 14:21:14.250666  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 1835 14:21:14.257803  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 1836 14:21:14.260882  PS2K: Passing 80 keymaps to kernel

 1837 14:21:14.267298  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 1838 14:21:14.274346  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1

 1839 14:21:14.280632  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1

 1840 14:21:14.287589  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 1841 14:21:14.294452  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4

 1842 14:21:14.300970  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1

 1843 14:21:14.307911  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 1844 14:21:14.313883  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 1845 14:21:14.317449  ACPI: added table 2/32, length now 44

 1846 14:21:14.317531  ACPI:    * MCFG

 1847 14:21:14.320573  ACPI: added table 3/32, length now 48

 1848 14:21:14.324081  ACPI:    * TPM2

 1849 14:21:14.327074  TPM2 log created at 0x769f0000

 1850 14:21:14.330618  ACPI: added table 4/32, length now 52

 1851 14:21:14.330699  ACPI:    * MADT

 1852 14:21:14.333939  SCI is IRQ9

 1853 14:21:14.337034  ACPI: added table 5/32, length now 56

 1854 14:21:14.340554  current = 76b09850

 1855 14:21:14.340635  ACPI:    * DMAR

 1856 14:21:14.344153  ACPI: added table 6/32, length now 60

 1857 14:21:14.347190  ACPI: added table 7/32, length now 64

 1858 14:21:14.350340  ACPI:    * HPET

 1859 14:21:14.353713  ACPI: added table 8/32, length now 68

 1860 14:21:14.353795  ACPI: done.

 1861 14:21:14.357059  ACPI tables: 35216 bytes.

 1862 14:21:14.360217  smbios_write_tables: 769ef000

 1863 14:21:14.363972  EC returned error result code 3

 1864 14:21:14.367289  Couldn't obtain OEM name from CBI

 1865 14:21:14.371448  Create SMBIOS type 16

 1866 14:21:14.375029  Create SMBIOS type 17

 1867 14:21:14.377998  GENERIC: 0.0 (WIFI Device)

 1868 14:21:14.378081  SMBIOS tables: 1750 bytes.

 1869 14:21:14.384343  Writing table forward entry at 0x00000500

 1870 14:21:14.391041  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c

 1871 14:21:14.394277  Writing coreboot table at 0x76b25000

 1872 14:21:14.400957   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1873 14:21:14.404512   1. 0000000000001000-000000000009ffff: RAM

 1874 14:21:14.407774   2. 00000000000a0000-00000000000fffff: RESERVED

 1875 14:21:14.414728   3. 0000000000100000-00000000769eefff: RAM

 1876 14:21:14.417585   4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES

 1877 14:21:14.425002   5. 0000000076b98000-0000000076c09fff: RAMSTAGE

 1878 14:21:14.430959   6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES

 1879 14:21:14.434490   7. 0000000077000000-000000007fbfffff: RESERVED

 1880 14:21:14.437786   8. 00000000c0000000-00000000cfffffff: RESERVED

 1881 14:21:14.444206   9. 00000000f8000000-00000000f9ffffff: RESERVED

 1882 14:21:14.447590  10. 00000000fb000000-00000000fb000fff: RESERVED

 1883 14:21:14.454011  11. 00000000fe000000-00000000fe00ffff: RESERVED

 1884 14:21:14.457846  12. 00000000fed80000-00000000fed87fff: RESERVED

 1885 14:21:14.464565  13. 00000000fed90000-00000000fed92fff: RESERVED

 1886 14:21:14.467575  14. 00000000feda0000-00000000feda1fff: RESERVED

 1887 14:21:14.474025  15. 00000000fedc0000-00000000feddffff: RESERVED

 1888 14:21:14.477291  16. 0000000100000000-00000002803fffff: RAM

 1889 14:21:14.480688  Passing 4 GPIOs to payload:

 1890 14:21:14.484069              NAME |       PORT | POLARITY |     VALUE

 1891 14:21:14.490636               lid |  undefined |     high |      high

 1892 14:21:14.494651             power |  undefined |     high |       low

 1893 14:21:14.500817             oprom |  undefined |     high |       low

 1894 14:21:14.507618          EC in RW | 0x000000e5 |     high |      high

 1895 14:21:14.513941  Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum a65e

 1896 14:21:14.514024  coreboot table: 1576 bytes.

 1897 14:21:14.521098  IMD ROOT    0. 0x76fff000 0x00001000

 1898 14:21:14.523965  IMD SMALL   1. 0x76ffe000 0x00001000

 1899 14:21:14.528024  FSP MEMORY  2. 0x76c4e000 0x003b0000

 1900 14:21:14.530773  VPD         3. 0x76c4d000 0x00000367

 1901 14:21:14.534061  RO MCACHE   4. 0x76c4c000 0x00000fdc

 1902 14:21:14.537277  CONSOLE     5. 0x76c2c000 0x00020000

 1903 14:21:14.540827  FMAP        6. 0x76c2b000 0x00000578

 1904 14:21:14.544455  TIME STAMP  7. 0x76c2a000 0x00000910

 1905 14:21:14.547217  VBOOT WORK  8. 0x76c16000 0x00014000

 1906 14:21:14.554082  ROMSTG STCK 9. 0x76c15000 0x00001000

 1907 14:21:14.557459  AFTER CAR  10. 0x76c0a000 0x0000b000

 1908 14:21:14.560741  RAMSTAGE   11. 0x76b97000 0x00073000

 1909 14:21:14.563921  REFCODE    12. 0x76b42000 0x00055000

 1910 14:21:14.567188  SMM BACKUP 13. 0x76b32000 0x00010000

 1911 14:21:14.570619  4f444749   14. 0x76b30000 0x00002000

 1912 14:21:14.574079  EXT VBT15. 0x76b2d000 0x0000219f

 1913 14:21:14.577478  COREBOOT   16. 0x76b25000 0x00008000

 1914 14:21:14.580985  ACPI       17. 0x76b01000 0x00024000

 1915 14:21:14.587307  ACPI GNVS  18. 0x76b00000 0x00001000

 1916 14:21:14.590934  RAMOOPS    19. 0x76a00000 0x00100000

 1917 14:21:14.594097  TPM2 TCGLOG20. 0x769f0000 0x00010000

 1918 14:21:14.597651  SMBIOS     21. 0x769ef000 0x00000800

 1919 14:21:14.597731  IMD small region:

 1920 14:21:14.604241    IMD ROOT    0. 0x76ffec00 0x00000400

 1921 14:21:14.607722    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 1922 14:21:14.611020    POWER STATE 2. 0x76ffeb80 0x00000044

 1923 14:21:14.614296    ROMSTAGE    3. 0x76ffeb60 0x00000004

 1924 14:21:14.617808    MEM INFO    4. 0x76ffe980 0x000001e0

 1925 14:21:14.624004  BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms

 1926 14:21:14.627448  MTRR: Physical address space:

 1927 14:21:14.633907  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1928 14:21:14.641018  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1929 14:21:14.647067  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 1930 14:21:14.654054  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0

 1931 14:21:14.657124  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1

 1932 14:21:14.663668  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0

 1933 14:21:14.670663  0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6

 1934 14:21:14.673879  MTRR: Fixed MSR 0x250 0x0606060606060606

 1935 14:21:14.680373  MTRR: Fixed MSR 0x258 0x0606060606060606

 1936 14:21:14.683926  MTRR: Fixed MSR 0x259 0x0000000000000000

 1937 14:21:14.687683  MTRR: Fixed MSR 0x268 0x0606060606060606

 1938 14:21:14.690590  MTRR: Fixed MSR 0x269 0x0606060606060606

 1939 14:21:14.697084  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1940 14:21:14.700629  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1941 14:21:14.703606  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1942 14:21:14.707031  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1943 14:21:14.713719  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1944 14:21:14.716683  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1945 14:21:14.720082  call enable_fixed_mtrr()

 1946 14:21:14.723794  CPU physical address size: 39 bits

 1947 14:21:14.727034  MTRR: default type WB/UC MTRR counts: 6/6.

 1948 14:21:14.730164  MTRR: UC selected as default type.

 1949 14:21:14.736771  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 1950 14:21:14.743584  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 1951 14:21:14.750038  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 1952 14:21:14.756579  MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1

 1953 14:21:14.763336  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 1954 14:21:14.769697  MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6

 1955 14:21:14.773562  MTRR: Fixed MSR 0x250 0x0606060606060606

 1956 14:21:14.780092  MTRR: Fixed MSR 0x258 0x0606060606060606

 1957 14:21:14.783257  MTRR: Fixed MSR 0x259 0x0000000000000000

 1958 14:21:14.786505  MTRR: Fixed MSR 0x268 0x0606060606060606

 1959 14:21:14.789852  MTRR: Fixed MSR 0x269 0x0606060606060606

 1960 14:21:14.793229  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1961 14:21:14.800331  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1962 14:21:14.803039  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1963 14:21:14.806686  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1964 14:21:14.809916  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1965 14:21:14.816584  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1966 14:21:14.819647  MTRR: Fixed MSR 0x250 0x0606060606060606

 1967 14:21:14.823070  call enable_fixed_mtrr()

 1968 14:21:14.826640  MTRR: Fixed MSR 0x258 0x0606060606060606

 1969 14:21:14.829664  MTRR: Fixed MSR 0x259 0x0000000000000000

 1970 14:21:14.836658  MTRR: Fixed MSR 0x268 0x0606060606060606

 1971 14:21:14.840288  MTRR: Fixed MSR 0x269 0x0606060606060606

 1972 14:21:14.843070  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1973 14:21:14.846268  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1974 14:21:14.853051  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1975 14:21:14.856016  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1976 14:21:14.859721  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1977 14:21:14.862970  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1978 14:21:14.866669  CPU physical address size: 39 bits

 1979 14:21:14.873505  call enable_fixed_mtrr()

 1980 14:21:14.876670  MTRR: Fixed MSR 0x250 0x0606060606060606

 1981 14:21:14.879937  MTRR: Fixed MSR 0x250 0x0606060606060606

 1982 14:21:14.883214  MTRR: Fixed MSR 0x258 0x0606060606060606

 1983 14:21:14.889756  MTRR: Fixed MSR 0x259 0x0000000000000000

 1984 14:21:14.893332  MTRR: Fixed MSR 0x268 0x0606060606060606

 1985 14:21:14.896401  MTRR: Fixed MSR 0x269 0x0606060606060606

 1986 14:21:14.900064  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1987 14:21:14.903067  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1988 14:21:14.909976  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1989 14:21:14.913182  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1990 14:21:14.916543  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1991 14:21:14.919857  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1992 14:21:14.927449  MTRR: Fixed MSR 0x258 0x0606060606060606

 1993 14:21:14.927532  call enable_fixed_mtrr()

 1994 14:21:14.934364  MTRR: Fixed MSR 0x259 0x0000000000000000

 1995 14:21:14.937663  MTRR: Fixed MSR 0x268 0x0606060606060606

 1996 14:21:14.941092  MTRR: Fixed MSR 0x269 0x0606060606060606

 1997 14:21:14.944309  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1998 14:21:14.950582  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1999 14:21:14.953789  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2000 14:21:14.957379  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2001 14:21:14.960529  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2002 14:21:14.967061  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2003 14:21:14.971016  CPU physical address size: 39 bits

 2004 14:21:14.973912  call enable_fixed_mtrr()

 2005 14:21:14.977600  MTRR: Fixed MSR 0x250 0x0606060606060606

 2006 14:21:14.980425  MTRR: Fixed MSR 0x250 0x0606060606060606

 2007 14:21:14.987475  MTRR: Fixed MSR 0x258 0x0606060606060606

 2008 14:21:14.990748  MTRR: Fixed MSR 0x259 0x0000000000000000

 2009 14:21:14.993503  MTRR: Fixed MSR 0x268 0x0606060606060606

 2010 14:21:14.997073  MTRR: Fixed MSR 0x269 0x0606060606060606

 2011 14:21:15.004178  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2012 14:21:15.006982  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2013 14:21:15.010562  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2014 14:21:15.013559  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2015 14:21:15.020294  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2016 14:21:15.023549  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2017 14:21:15.026851  MTRR: Fixed MSR 0x258 0x0606060606060606

 2018 14:21:15.030236  call enable_fixed_mtrr()

 2019 14:21:15.033766  MTRR: Fixed MSR 0x259 0x0000000000000000

 2020 14:21:15.040065  MTRR: Fixed MSR 0x268 0x0606060606060606

 2021 14:21:15.043845  MTRR: Fixed MSR 0x269 0x0606060606060606

 2022 14:21:15.046991  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2023 14:21:15.050117  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2024 14:21:15.056713  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2025 14:21:15.060113  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2026 14:21:15.063366  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2027 14:21:15.066951  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2028 14:21:15.070558  CPU physical address size: 39 bits

 2029 14:21:15.077138  call enable_fixed_mtrr()

 2030 14:21:15.080336  CPU physical address size: 39 bits

 2031 14:21:15.083727  CPU physical address size: 39 bits

 2032 14:21:15.086977  CPU physical address size: 39 bits

 2033 14:21:15.087059  

 2034 14:21:15.087123  MTRR check

 2035 14:21:15.090220  MTRR: Fixed MSR 0x250 0x0606060606060606

 2036 14:21:15.093550  Fixed MTRRs   : Enabled

 2037 14:21:15.097399  Variable MTRRs: Enabled

 2038 14:21:15.097480  

 2039 14:21:15.100341  MTRR: Fixed MSR 0x258 0x0606060606060606

 2040 14:21:15.103888  MTRR: Fixed MSR 0x259 0x0000000000000000

 2041 14:21:15.110602  MTRR: Fixed MSR 0x268 0x0606060606060606

 2042 14:21:15.113646  MTRR: Fixed MSR 0x269 0x0606060606060606

 2043 14:21:15.116802  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2044 14:21:15.120349  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2045 14:21:15.127058  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2046 14:21:15.130067  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2047 14:21:15.133706  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2048 14:21:15.137093  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2049 14:21:15.144149  BS: BS_WRITE_TABLES exit times (exec / console): 323 / 150 ms

 2050 14:21:15.147548  call enable_fixed_mtrr()

 2051 14:21:15.151243  Checking cr50 for pending updates

 2052 14:21:15.154723  CPU physical address size: 39 bits

 2053 14:21:15.159537  Reading cr50 TPM mode

 2054 14:21:15.169559  BS: BS_PAYLOAD_LOAD entry times (exec / console): 13 / 6 ms

 2055 14:21:15.179846  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60

 2056 14:21:15.183184  Checking segment from ROM address 0xffc02b38

 2057 14:21:15.186261  Checking segment from ROM address 0xffc02b54

 2058 14:21:15.192966  Loading segment from ROM address 0xffc02b38

 2059 14:21:15.193048    code (compression=0)

 2060 14:21:15.203026    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64

 2061 14:21:15.209507  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64

 2062 14:21:15.212911  it's not compressed!

 2063 14:21:15.352101  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70

 2064 14:21:15.358901  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c

 2065 14:21:15.365178  Loading segment from ROM address 0xffc02b54

 2066 14:21:15.365260    Entry Point 0x30000000

 2067 14:21:15.368713  Loaded segments

 2068 14:21:15.375610  BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms

 2069 14:21:15.418240  Finalizing chipset.

 2070 14:21:15.421591  Finalizing SMM.

 2071 14:21:15.421673  APMC done.

 2072 14:21:15.428482  BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms

 2073 14:21:15.431557  mp_park_aps done after 0 msecs.

 2074 14:21:15.434803  Jumping to boot code at 0x30000000(0x76b25000)

 2075 14:21:15.445289  CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes

 2076 14:21:15.445372  

 2077 14:21:15.445436  

 2078 14:21:15.445495  

 2079 14:21:15.448387  Starting depthcharge on Voema...

 2080 14:21:15.448470  

 2081 14:21:15.448822  end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
 2082 14:21:15.448917  start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
 2083 14:21:15.449003  Setting prompt string to ['volteer:']
 2084 14:21:15.449082  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
 2085 14:21:15.458158  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2086 14:21:15.458242  

 2087 14:21:15.464830  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2088 14:21:15.464913  

 2089 14:21:15.468223  Looking for NVMe Controller 0x3005f220 @ 00:1d:00

 2090 14:21:15.472592  

 2091 14:21:15.472673  Failed to find eMMC card reader

 2092 14:21:15.472739  

 2093 14:21:15.475950  Wipe memory regions:

 2094 14:21:15.476031  

 2095 14:21:15.478812  	[0x00000000001000, 0x000000000a0000)

 2096 14:21:15.478893  

 2097 14:21:15.482055  	[0x00000000100000, 0x00000030000000)

 2098 14:21:15.510401  

 2099 14:21:15.513483  	[0x00000032662db0, 0x000000769ef000)

 2100 14:21:15.549060  

 2101 14:21:15.552518  	[0x00000100000000, 0x00000280400000)

 2102 14:21:15.753516  

 2103 14:21:15.756596  ec_init: CrosEC protocol v3 supported (256, 256)

 2104 14:21:15.756676  

 2105 14:21:15.763175  update_port_state: port C0 state: usb enable 1 mux conn 0

 2106 14:21:15.763273  

 2107 14:21:15.769811  update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1

 2108 14:21:15.774487  

 2109 14:21:15.777959  pmc_check_ipc_sts: STS_BUSY done after 1612 us

 2110 14:21:15.778058  

 2111 14:21:15.781153  send_conn_disc_msg: pmc_send_cmd succeeded

 2112 14:21:16.214129  

 2113 14:21:16.214308  R8152: Initializing

 2114 14:21:16.214427  

 2115 14:21:16.217570  Version 6 (ocp_data = 5c30)

 2116 14:21:16.217653  

 2117 14:21:16.220942  R8152: Done initializing

 2118 14:21:16.221024  

 2119 14:21:16.223837  Adding net device

 2120 14:21:16.525483  

 2121 14:21:16.529284  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35

 2122 14:21:16.529370  

 2123 14:21:16.529434  

 2124 14:21:16.529493  

 2125 14:21:16.532330  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2127 14:21:16.632697  volteer: tftpboot 192.168.201.1 10525251/tftp-deploy-1rjzylkh/kernel/bzImage 10525251/tftp-deploy-1rjzylkh/kernel/cmdline 10525251/tftp-deploy-1rjzylkh/ramdisk/ramdisk.cpio.gz

 2128 14:21:16.632827  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2129 14:21:16.632959  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
 2130 14:21:16.636929  tftpboot 192.168.201.1 10525251/tftp-deploy-1rjzylkh/kernel/bzIploy-1rjzylkh/kernel/cmdline 10525251/tftp-deploy-1rjzylkh/ramdisk/ramdisk.cpio.gz

 2131 14:21:16.637030  

 2132 14:21:16.637119  Waiting for link

 2133 14:21:16.840424  

 2134 14:21:16.840561  done.

 2135 14:21:16.840627  

 2136 14:21:16.840689  MAC: 00:24:32:30:7d:bc

 2137 14:21:16.840746  

 2138 14:21:16.843476  Sending DHCP discover... done.

 2139 14:21:16.843558  

 2140 14:21:16.847118  Waiting for reply... done.

 2141 14:21:16.847238  

 2142 14:21:16.850231  Sending DHCP request... done.

 2143 14:21:16.850313  

 2144 14:21:16.854353  Waiting for reply... done.

 2145 14:21:16.854435  

 2146 14:21:16.856945  My ip is 192.168.201.22

 2147 14:21:16.857025  

 2148 14:21:16.860234  The DHCP server ip is 192.168.201.1

 2149 14:21:16.860316  

 2150 14:21:16.866711  TFTP server IP predefined by user: 192.168.201.1

 2151 14:21:16.866794  

 2152 14:21:16.873272  Bootfile predefined by user: 10525251/tftp-deploy-1rjzylkh/kernel/bzImage

 2153 14:21:16.873358  

 2154 14:21:16.876608  Sending tftp read request... done.

 2155 14:21:16.876693  

 2156 14:21:16.879876  Waiting for the transfer... 

 2157 14:21:16.879962  

 2158 14:21:17.398422  00000000 ################################################################

 2159 14:21:17.398577  

 2160 14:21:17.915794  00080000 ################################################################

 2161 14:21:17.915962  

 2162 14:21:18.436199  00100000 ################################################################

 2163 14:21:18.436350  

 2164 14:21:18.958733  00180000 ################################################################

 2165 14:21:18.958902  

 2166 14:21:19.476492  00200000 ################################################################

 2167 14:21:19.476635  

 2168 14:21:19.998187  00280000 ################################################################

 2169 14:21:19.998356  

 2170 14:21:20.520925  00300000 ################################################################

 2171 14:21:20.521069  

 2172 14:21:21.049681  00380000 ################################################################

 2173 14:21:21.049815  

 2174 14:21:21.565212  00400000 ################################################################

 2175 14:21:21.565376  

 2176 14:21:22.184770  00480000 ################################################################

 2177 14:21:22.185280  

 2178 14:21:22.844095  00500000 ################################################################

 2179 14:21:22.844660  

 2180 14:21:23.501044  00580000 ################################################################

 2181 14:21:23.501637  

 2182 14:21:24.148439  00600000 ################################################################

 2183 14:21:24.148995  

 2184 14:21:24.793569  00680000 ################################################################

 2185 14:21:24.793705  

 2186 14:21:25.381420  00700000 ################################################################

 2187 14:21:25.381550  

 2188 14:21:26.003847  00780000 ################################################################

 2189 14:21:26.003992  

 2190 14:21:26.549862  00800000 ################################################################

 2191 14:21:26.550033  

 2192 14:21:27.118917  00880000 ################################################################

 2193 14:21:27.119053  

 2194 14:21:27.746916  00900000 ################################################################

 2195 14:21:27.747461  

 2196 14:21:28.342949  00980000 ################################################################

 2197 14:21:28.343088  

 2198 14:21:28.744008  00a00000 ############################################## done.

 2199 14:21:28.744146  

 2200 14:21:28.747479  The bootfile was 10858496 bytes long.

 2201 14:21:28.747564  

 2202 14:21:28.751330  Sending tftp read request... done.

 2203 14:21:28.751419  

 2204 14:21:28.753971  Waiting for the transfer... 

 2205 14:21:28.754059  

 2206 14:21:29.425989  00000000 ################################################################

 2207 14:21:29.426526  

 2208 14:21:30.062167  00080000 ################################################################

 2209 14:21:30.062774  

 2210 14:21:30.730011  00100000 ################################################################

 2211 14:21:30.730508  

 2212 14:21:31.402819  00180000 ################################################################

 2213 14:21:31.403365  

 2214 14:21:32.030757  00200000 ################################################################

 2215 14:21:32.030892  

 2216 14:21:32.642594  00280000 ################################################################

 2217 14:21:32.642736  

 2218 14:21:33.231625  00300000 ################################################################

 2219 14:21:33.231767  

 2220 14:21:33.801576  00380000 ################################################################

 2221 14:21:33.801713  

 2222 14:21:34.430080  00400000 ################################################################

 2223 14:21:34.430582  

 2224 14:21:35.125679  00480000 ################################################################

 2225 14:21:35.126251  

 2226 14:21:35.804735  00500000 ################################################################

 2227 14:21:35.805251  

 2228 14:21:36.511449  00580000 ################################################################

 2229 14:21:36.511938  

 2230 14:21:37.208033  00600000 ################################################################

 2231 14:21:37.208538  

 2232 14:21:37.914097  00680000 ################################################################

 2233 14:21:37.914642  

 2234 14:21:38.635621  00700000 ################################################################

 2235 14:21:38.636153  

 2236 14:21:39.348664  00780000 ################################################################

 2237 14:21:39.349258  

 2238 14:21:40.068480  00800000 ################################################################

 2239 14:21:40.068998  

 2240 14:21:40.784354  00880000 ################################################################

 2241 14:21:40.784919  

 2242 14:21:41.513874  00900000 ################################################################

 2243 14:21:41.514391  

 2244 14:21:42.235313  00980000 ################################################################

 2245 14:21:42.235854  

 2246 14:21:42.953233  00a00000 ################################################################

 2247 14:21:42.953749  

 2248 14:21:43.646222  00a80000 ################################################################

 2249 14:21:43.646794  

 2250 14:21:44.343327  00b00000 ################################################################

 2251 14:21:44.343504  

 2252 14:21:45.055285  00b80000 ################################################################

 2253 14:21:45.055812  

 2254 14:21:45.751790  00c00000 ################################################################

 2255 14:21:45.751953  

 2256 14:21:46.448421  00c80000 ################################################################

 2257 14:21:46.448940  

 2258 14:21:47.155506  00d00000 ################################################################

 2259 14:21:47.156016  

 2260 14:21:47.871844  00d80000 ################################################################

 2261 14:21:47.872375  

 2262 14:21:48.586493  00e00000 ################################################################

 2263 14:21:48.587054  

 2264 14:21:49.309154  00e80000 ################################################################

 2265 14:21:49.309741  

 2266 14:21:50.037082  00f00000 ################################################################

 2267 14:21:50.037600  

 2268 14:21:50.752425  00f80000 ################################################################

 2269 14:21:50.753032  

 2270 14:21:51.478580  01000000 ################################################################

 2271 14:21:51.479095  

 2272 14:21:52.192661  01080000 ################################################################

 2273 14:21:52.193188  

 2274 14:21:52.910928  01100000 ################################################################

 2275 14:21:52.911475  

 2276 14:21:53.630115  01180000 ################################################################

 2277 14:21:53.630677  

 2278 14:21:54.354123  01200000 ################################################################

 2279 14:21:54.354647  

 2280 14:21:55.098088  01280000 ################################################################

 2281 14:21:55.098627  

 2282 14:21:55.823169  01300000 ################################################################

 2283 14:21:55.823726  

 2284 14:21:56.539272  01380000 ################################################################

 2285 14:21:56.539811  

 2286 14:21:57.246890  01400000 ################################################################

 2287 14:21:57.247484  

 2288 14:21:57.969291  01480000 ################################################################

 2289 14:21:57.969873  

 2290 14:21:58.674922  01500000 ################################################################

 2291 14:21:58.675500  

 2292 14:21:59.396809  01580000 ################################################################

 2293 14:21:59.397317  

 2294 14:22:00.113561  01600000 ################################################################

 2295 14:22:00.114099  

 2296 14:22:00.834759  01680000 ################################################################

 2297 14:22:00.835345  

 2298 14:22:01.542888  01700000 ################################################################

 2299 14:22:01.543475  

 2300 14:22:02.253693  01780000 ################################################################

 2301 14:22:02.254256  

 2302 14:22:02.961200  01800000 ################################################################

 2303 14:22:02.961763  

 2304 14:22:03.673575  01880000 ################################################################

 2305 14:22:03.674141  

 2306 14:22:04.390709  01900000 ################################################################

 2307 14:22:04.391239  

 2308 14:22:05.099594  01980000 ################################################################

 2309 14:22:05.100125  

 2310 14:22:05.809570  01a00000 ################################################################

 2311 14:22:05.810155  

 2312 14:22:06.524785  01a80000 ################################################################

 2313 14:22:06.525358  

 2314 14:22:07.243149  01b00000 ################################################################

 2315 14:22:07.243691  

 2316 14:22:07.976396  01b80000 ################################################################

 2317 14:22:07.976984  

 2318 14:22:08.671619  01c00000 ################################################################

 2319 14:22:08.672186  

 2320 14:22:09.383241  01c80000 ################################################################

 2321 14:22:09.383758  

 2322 14:22:10.087513  01d00000 ################################################################

 2323 14:22:10.088030  

 2324 14:22:10.802692  01d80000 ################################################################

 2325 14:22:10.803243  

 2326 14:22:11.516665  01e00000 ################################################################

 2327 14:22:11.517191  

 2328 14:22:12.228233  01e80000 ################################################################

 2329 14:22:12.228744  

 2330 14:22:12.950360  01f00000 ################################################################

 2331 14:22:12.950898  

 2332 14:22:13.637732  01f80000 ################################################################

 2333 14:22:13.638260  

 2334 14:22:14.347941  02000000 ################################################################

 2335 14:22:14.348493  

 2336 14:22:15.054835  02080000 ################################################################

 2337 14:22:15.055431  

 2338 14:22:15.766997  02100000 ################################################################

 2339 14:22:15.767753  

 2340 14:22:16.475452  02180000 ################################################################

 2341 14:22:16.475993  

 2342 14:22:17.184205  02200000 ################################################################

 2343 14:22:17.184723  

 2344 14:22:17.589583  02280000 ##################################### done.

 2345 14:22:17.590116  

 2346 14:22:17.592937  Sending tftp read request... done.

 2347 14:22:17.593355  

 2348 14:22:17.595773  Waiting for the transfer... 

 2349 14:22:17.596214  

 2350 14:22:17.596553  00000000 # done.

 2351 14:22:17.596875  

 2352 14:22:17.606183  Command line loaded dynamically from TFTP file: 10525251/tftp-deploy-1rjzylkh/kernel/cmdline

 2353 14:22:17.606721  

 2354 14:22:17.619240  The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2355 14:22:17.625861  

 2356 14:22:17.629363  Shutting down all USB controllers.

 2357 14:22:17.629932  

 2358 14:22:17.630307  Removing current net device

 2359 14:22:17.630653  

 2360 14:22:17.632226  Finalizing coreboot

 2361 14:22:17.632694  

 2362 14:22:17.639157  Exiting depthcharge with code 4 at timestamp: 70855230

 2363 14:22:17.639790  

 2364 14:22:17.640163  

 2365 14:22:17.640511  Starting kernel ...

 2366 14:22:17.640844  

 2367 14:22:17.641163  

 2368 14:22:17.642642  end: 2.2.4 bootloader-commands (duration 00:01:02) [common]
 2369 14:22:17.643160  start: 2.2.5 auto-login-action (timeout 00:03:42) [common]
 2370 14:22:17.643593  Setting prompt string to ['Linux version [0-9]']
 2371 14:22:17.643972  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2372 14:22:17.644363  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2374 14:25:59.644306  end: 2.2.5 auto-login-action (duration 00:03:42) [common]
 2376 14:25:59.645416  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 222 seconds'
 2378 14:25:59.646287  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2381 14:25:59.647723  end: 2 depthcharge-action (duration 00:05:00) [common]
 2383 14:25:59.648917  Cleaning after the job
 2384 14:25:59.649092  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10525251/tftp-deploy-1rjzylkh/ramdisk
 2385 14:25:59.652995  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10525251/tftp-deploy-1rjzylkh/kernel
 2386 14:25:59.654241  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10525251/tftp-deploy-1rjzylkh/modules
 2387 14:25:59.654769  start: 4.1 power-off (timeout 00:00:30) [common]
 2388 14:25:59.654926  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-5' '--port=1' '--command=off'
 2389 14:25:59.737140  >> Command sent successfully.

 2390 14:25:59.742434  Returned 0 in 0 seconds
 2391 14:25:59.843605  end: 4.1 power-off (duration 00:00:00) [common]
 2393 14:25:59.845181  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2394 14:25:59.846432  Listened to connection for namespace 'common' for up to 1s
 2395 14:26:00.847256  Finalising connection for namespace 'common'
 2396 14:26:00.847953  Disconnecting from shell: Finalise
 2397 14:26:00.848392  

 2398 14:26:00.949423  end: 4.2 read-feedback (duration 00:00:01) [common]
 2399 14:26:00.950035  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10525251
 2400 14:26:01.024827  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10525251
 2401 14:26:01.025023  JobError: Your job cannot terminate cleanly.