Boot log: asus-C436FA-Flip-hatch
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
1 14:26:57.412662 lava-dispatcher, installed at version: 2023.03
2 14:26:57.412883 start: 0 validate
3 14:26:57.413014 Start time: 2023-05-30 14:26:57.413006+00:00 (UTC)
4 14:26:57.413143 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:26:57.413276 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230527.0%2Famd64%2Finitrd.cpio.gz exists
6 14:26:57.705265 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:26:57.705441 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.283-cip98-135-g4ed206c5dc11%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:26:57.993425 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:26:57.993686 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230527.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 14:26:58.279201 Using caching service: 'http://localhost/cache/?uri=%s'
11 14:26:58.279390 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.283-cip98-135-g4ed206c5dc11%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 14:26:58.572460 validate duration: 1.16
14 14:26:58.572726 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 14:26:58.572825 start: 1.1 download-retry (timeout 00:10:00) [common]
16 14:26:58.572912 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 14:26:58.573033 Not decompressing ramdisk as can be used compressed.
18 14:26:58.573118 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230527.0/amd64/initrd.cpio.gz
19 14:26:58.573182 saving as /var/lib/lava/dispatcher/tmp/10525278/tftp-deploy-7mwljxy5/ramdisk/initrd.cpio.gz
20 14:26:58.573244 total size: 5432291 (5MB)
21 14:26:58.574272 progress 0% (0MB)
22 14:26:58.575838 progress 5% (0MB)
23 14:26:58.577245 progress 10% (0MB)
24 14:26:58.578651 progress 15% (0MB)
25 14:26:58.580200 progress 20% (1MB)
26 14:26:58.581589 progress 25% (1MB)
27 14:26:58.582963 progress 30% (1MB)
28 14:26:58.584475 progress 35% (1MB)
29 14:26:58.585833 progress 40% (2MB)
30 14:26:58.587186 progress 45% (2MB)
31 14:26:58.588536 progress 50% (2MB)
32 14:26:58.590042 progress 55% (2MB)
33 14:26:58.591390 progress 60% (3MB)
34 14:26:58.592745 progress 65% (3MB)
35 14:26:58.594275 progress 70% (3MB)
36 14:26:58.595623 progress 75% (3MB)
37 14:26:58.596966 progress 80% (4MB)
38 14:26:58.598316 progress 85% (4MB)
39 14:26:58.599854 progress 90% (4MB)
40 14:26:58.601200 progress 95% (4MB)
41 14:26:58.602620 progress 100% (5MB)
42 14:26:58.602829 5MB downloaded in 0.03s (175.13MB/s)
43 14:26:58.602975 end: 1.1.1 http-download (duration 00:00:00) [common]
45 14:26:58.603210 end: 1.1 download-retry (duration 00:00:00) [common]
46 14:26:58.603298 start: 1.2 download-retry (timeout 00:10:00) [common]
47 14:26:58.603382 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 14:26:58.603509 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.283-cip98-135-g4ed206c5dc11/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 14:26:58.603577 saving as /var/lib/lava/dispatcher/tmp/10525278/tftp-deploy-7mwljxy5/kernel/bzImage
50 14:26:58.603637 total size: 10858496 (10MB)
51 14:26:58.603695 No compression specified
52 14:26:58.604767 progress 0% (0MB)
53 14:26:58.607506 progress 5% (0MB)
54 14:26:58.610453 progress 10% (1MB)
55 14:26:58.613125 progress 15% (1MB)
56 14:26:58.616009 progress 20% (2MB)
57 14:26:58.618763 progress 25% (2MB)
58 14:26:58.621637 progress 30% (3MB)
59 14:26:58.624314 progress 35% (3MB)
60 14:26:58.627213 progress 40% (4MB)
61 14:26:58.630085 progress 45% (4MB)
62 14:26:58.632763 progress 50% (5MB)
63 14:26:58.635670 progress 55% (5MB)
64 14:26:58.638378 progress 60% (6MB)
65 14:26:58.641231 progress 65% (6MB)
66 14:26:58.643930 progress 70% (7MB)
67 14:26:58.646822 progress 75% (7MB)
68 14:26:58.649682 progress 80% (8MB)
69 14:26:58.652310 progress 85% (8MB)
70 14:26:58.655133 progress 90% (9MB)
71 14:26:58.657815 progress 95% (9MB)
72 14:26:58.660617 progress 100% (10MB)
73 14:26:58.660774 10MB downloaded in 0.06s (181.25MB/s)
74 14:26:58.660915 end: 1.2.1 http-download (duration 00:00:00) [common]
76 14:26:58.661141 end: 1.2 download-retry (duration 00:00:00) [common]
77 14:26:58.661226 start: 1.3 download-retry (timeout 00:10:00) [common]
78 14:26:58.661310 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 14:26:58.661442 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230527.0/amd64/full.rootfs.tar.xz
80 14:26:58.661516 saving as /var/lib/lava/dispatcher/tmp/10525278/tftp-deploy-7mwljxy5/nfsrootfs/full.rootfs.tar
81 14:26:58.661578 total size: 207183956 (197MB)
82 14:26:58.661637 Using unxz to decompress xz
83 14:26:58.665292 progress 0% (0MB)
84 14:26:59.219982 progress 5% (9MB)
85 14:26:59.755934 progress 10% (19MB)
86 14:27:00.365753 progress 15% (29MB)
87 14:27:00.733975 progress 20% (39MB)
88 14:27:01.100953 progress 25% (49MB)
89 14:27:01.716797 progress 30% (59MB)
90 14:27:02.293408 progress 35% (69MB)
91 14:27:02.924376 progress 40% (79MB)
92 14:27:03.495100 progress 45% (88MB)
93 14:27:04.087470 progress 50% (98MB)
94 14:27:04.731728 progress 55% (108MB)
95 14:27:05.424529 progress 60% (118MB)
96 14:27:05.572398 progress 65% (128MB)
97 14:27:05.718027 progress 70% (138MB)
98 14:27:05.817043 progress 75% (148MB)
99 14:27:05.884773 progress 80% (158MB)
100 14:27:05.954893 progress 85% (167MB)
101 14:27:06.062117 progress 90% (177MB)
102 14:27:06.346507 progress 95% (187MB)
103 14:27:06.957186 progress 100% (197MB)
104 14:27:06.963606 197MB downloaded in 8.30s (23.80MB/s)
105 14:27:06.963913 end: 1.3.1 http-download (duration 00:00:08) [common]
107 14:27:06.964233 end: 1.3 download-retry (duration 00:00:08) [common]
108 14:27:06.964337 start: 1.4 download-retry (timeout 00:09:52) [common]
109 14:27:06.964441 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 14:27:06.964612 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.283-cip98-135-g4ed206c5dc11/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 14:27:06.964702 saving as /var/lib/lava/dispatcher/tmp/10525278/tftp-deploy-7mwljxy5/modules/modules.tar
112 14:27:06.964837 total size: 484032 (0MB)
113 14:27:06.964965 Using unxz to decompress xz
114 14:27:06.969326 progress 6% (0MB)
115 14:27:06.969775 progress 13% (0MB)
116 14:27:06.970017 progress 20% (0MB)
117 14:27:06.971437 progress 27% (0MB)
118 14:27:06.973440 progress 33% (0MB)
119 14:27:06.975483 progress 40% (0MB)
120 14:27:06.977353 progress 47% (0MB)
121 14:27:06.979438 progress 54% (0MB)
122 14:27:06.981542 progress 60% (0MB)
123 14:27:06.983419 progress 67% (0MB)
124 14:27:06.985838 progress 74% (0MB)
125 14:27:06.988280 progress 81% (0MB)
126 14:27:06.990336 progress 88% (0MB)
127 14:27:06.992298 progress 94% (0MB)
128 14:27:06.994340 progress 100% (0MB)
129 14:27:07.000481 0MB downloaded in 0.04s (12.95MB/s)
130 14:27:07.000752 end: 1.4.1 http-download (duration 00:00:00) [common]
132 14:27:07.001045 end: 1.4 download-retry (duration 00:00:00) [common]
133 14:27:07.001151 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
134 14:27:07.001262 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
135 14:27:10.291213 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10525278/extract-nfsrootfs-7ddrh0er
136 14:27:10.291417 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
137 14:27:10.291520 start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
138 14:27:10.291678 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10525278/lava-overlay-85e9xi7q
139 14:27:10.291803 makedir: /var/lib/lava/dispatcher/tmp/10525278/lava-overlay-85e9xi7q/lava-10525278/bin
140 14:27:10.291938 makedir: /var/lib/lava/dispatcher/tmp/10525278/lava-overlay-85e9xi7q/lava-10525278/tests
141 14:27:10.292032 makedir: /var/lib/lava/dispatcher/tmp/10525278/lava-overlay-85e9xi7q/lava-10525278/results
142 14:27:10.292129 Creating /var/lib/lava/dispatcher/tmp/10525278/lava-overlay-85e9xi7q/lava-10525278/bin/lava-add-keys
143 14:27:10.292264 Creating /var/lib/lava/dispatcher/tmp/10525278/lava-overlay-85e9xi7q/lava-10525278/bin/lava-add-sources
144 14:27:10.292385 Creating /var/lib/lava/dispatcher/tmp/10525278/lava-overlay-85e9xi7q/lava-10525278/bin/lava-background-process-start
145 14:27:10.292505 Creating /var/lib/lava/dispatcher/tmp/10525278/lava-overlay-85e9xi7q/lava-10525278/bin/lava-background-process-stop
146 14:27:10.292623 Creating /var/lib/lava/dispatcher/tmp/10525278/lava-overlay-85e9xi7q/lava-10525278/bin/lava-common-functions
147 14:27:10.292739 Creating /var/lib/lava/dispatcher/tmp/10525278/lava-overlay-85e9xi7q/lava-10525278/bin/lava-echo-ipv4
148 14:27:10.292856 Creating /var/lib/lava/dispatcher/tmp/10525278/lava-overlay-85e9xi7q/lava-10525278/bin/lava-install-packages
149 14:27:10.292972 Creating /var/lib/lava/dispatcher/tmp/10525278/lava-overlay-85e9xi7q/lava-10525278/bin/lava-installed-packages
150 14:27:10.293089 Creating /var/lib/lava/dispatcher/tmp/10525278/lava-overlay-85e9xi7q/lava-10525278/bin/lava-os-build
151 14:27:10.293205 Creating /var/lib/lava/dispatcher/tmp/10525278/lava-overlay-85e9xi7q/lava-10525278/bin/lava-probe-channel
152 14:27:10.293322 Creating /var/lib/lava/dispatcher/tmp/10525278/lava-overlay-85e9xi7q/lava-10525278/bin/lava-probe-ip
153 14:27:10.293465 Creating /var/lib/lava/dispatcher/tmp/10525278/lava-overlay-85e9xi7q/lava-10525278/bin/lava-target-ip
154 14:27:10.294212 Creating /var/lib/lava/dispatcher/tmp/10525278/lava-overlay-85e9xi7q/lava-10525278/bin/lava-target-mac
155 14:27:10.294349 Creating /var/lib/lava/dispatcher/tmp/10525278/lava-overlay-85e9xi7q/lava-10525278/bin/lava-target-storage
156 14:27:10.294483 Creating /var/lib/lava/dispatcher/tmp/10525278/lava-overlay-85e9xi7q/lava-10525278/bin/lava-test-case
157 14:27:10.294608 Creating /var/lib/lava/dispatcher/tmp/10525278/lava-overlay-85e9xi7q/lava-10525278/bin/lava-test-event
158 14:27:10.294731 Creating /var/lib/lava/dispatcher/tmp/10525278/lava-overlay-85e9xi7q/lava-10525278/bin/lava-test-feedback
159 14:27:10.294853 Creating /var/lib/lava/dispatcher/tmp/10525278/lava-overlay-85e9xi7q/lava-10525278/bin/lava-test-raise
160 14:27:10.294974 Creating /var/lib/lava/dispatcher/tmp/10525278/lava-overlay-85e9xi7q/lava-10525278/bin/lava-test-reference
161 14:27:10.295098 Creating /var/lib/lava/dispatcher/tmp/10525278/lava-overlay-85e9xi7q/lava-10525278/bin/lava-test-runner
162 14:27:10.295241 Creating /var/lib/lava/dispatcher/tmp/10525278/lava-overlay-85e9xi7q/lava-10525278/bin/lava-test-set
163 14:27:10.295368 Creating /var/lib/lava/dispatcher/tmp/10525278/lava-overlay-85e9xi7q/lava-10525278/bin/lava-test-shell
164 14:27:10.295491 Updating /var/lib/lava/dispatcher/tmp/10525278/lava-overlay-85e9xi7q/lava-10525278/bin/lava-add-keys (debian)
165 14:27:10.295639 Updating /var/lib/lava/dispatcher/tmp/10525278/lava-overlay-85e9xi7q/lava-10525278/bin/lava-add-sources (debian)
166 14:27:10.295781 Updating /var/lib/lava/dispatcher/tmp/10525278/lava-overlay-85e9xi7q/lava-10525278/bin/lava-install-packages (debian)
167 14:27:10.295920 Updating /var/lib/lava/dispatcher/tmp/10525278/lava-overlay-85e9xi7q/lava-10525278/bin/lava-installed-packages (debian)
168 14:27:10.296058 Updating /var/lib/lava/dispatcher/tmp/10525278/lava-overlay-85e9xi7q/lava-10525278/bin/lava-os-build (debian)
169 14:27:10.296177 Creating /var/lib/lava/dispatcher/tmp/10525278/lava-overlay-85e9xi7q/lava-10525278/environment
170 14:27:10.296275 LAVA metadata
171 14:27:10.296343 - LAVA_JOB_ID=10525278
172 14:27:10.296406 - LAVA_DISPATCHER_IP=192.168.201.1
173 14:27:10.296509 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
174 14:27:10.296577 skipped lava-vland-overlay
175 14:27:10.296652 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
176 14:27:10.296731 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
177 14:27:10.296793 skipped lava-multinode-overlay
178 14:27:10.296865 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
179 14:27:10.296946 start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
180 14:27:10.297021 Loading test definitions
181 14:27:10.297110 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:48) [common]
182 14:27:10.297180 Using /lava-10525278 at stage 0
183 14:27:10.297454 uuid=10525278_1.5.2.3.1 testdef=None
184 14:27:10.297585 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
185 14:27:10.297671 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
186 14:27:10.298168 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
188 14:27:10.298390 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
189 14:27:10.299000 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
191 14:27:10.299229 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
192 14:27:10.299752 runner path: /var/lib/lava/dispatcher/tmp/10525278/lava-overlay-85e9xi7q/lava-10525278/0/tests/0_timesync-off test_uuid 10525278_1.5.2.3.1
193 14:27:10.299901 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
195 14:27:10.300123 start: 1.5.2.3.5 git-repo-action (timeout 00:09:48) [common]
196 14:27:10.300194 Using /lava-10525278 at stage 0
197 14:27:10.300288 Fetching tests from https://github.com/kernelci/test-definitions.git
198 14:27:10.300364 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/10525278/lava-overlay-85e9xi7q/lava-10525278/0/tests/1_kselftest-futex'
199 14:27:23.502981 Running '/usr/bin/git checkout kernelci.org
200 14:27:23.650542 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/10525278/lava-overlay-85e9xi7q/lava-10525278/0/tests/1_kselftest-futex/automated/linux/kselftest/kselftest.yaml
201 14:27:23.651429 uuid=10525278_1.5.2.3.5 testdef=None
202 14:27:23.651631 end: 1.5.2.3.5 git-repo-action (duration 00:00:13) [common]
204 14:27:23.652028 start: 1.5.2.3.6 test-overlay (timeout 00:09:35) [common]
205 14:27:23.653083 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
207 14:27:23.653477 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:35) [common]
208 14:27:23.654974 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
210 14:27:23.655378 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:35) [common]
211 14:27:23.656893 runner path: /var/lib/lava/dispatcher/tmp/10525278/lava-overlay-85e9xi7q/lava-10525278/0/tests/1_kselftest-futex test_uuid 10525278_1.5.2.3.5
212 14:27:23.657025 BOARD='asus-C436FA-Flip-hatch'
213 14:27:23.657119 BRANCH='cip-gitlab'
214 14:27:23.657218 SKIPFILE='/dev/null'
215 14:27:23.657306 SKIP_INSTALL='True'
216 14:27:23.657403 TESTPROG_URL='None'
217 14:27:23.657489 TST_CASENAME=''
218 14:27:23.657611 TST_CMDFILES='futex'
219 14:27:23.657759 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
221 14:27:23.657996 Creating lava-test-runner.conf files
222 14:27:23.658064 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10525278/lava-overlay-85e9xi7q/lava-10525278/0 for stage 0
223 14:27:23.658164 - 0_timesync-off
224 14:27:23.658267 - 1_kselftest-futex
225 14:27:23.658403 end: 1.5.2.3 test-definition (duration 00:00:13) [common]
226 14:27:23.658529 start: 1.5.2.4 compress-overlay (timeout 00:09:35) [common]
227 14:27:31.114156 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
228 14:27:31.114352 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:27) [common]
229 14:27:31.114465 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
230 14:27:31.114571 end: 1.5.2 lava-overlay (duration 00:00:21) [common]
231 14:27:31.114661 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:27) [common]
232 14:27:31.245784 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
233 14:27:31.246145 start: 1.5.4 extract-modules (timeout 00:09:27) [common]
234 14:27:31.246268 extracting modules file /var/lib/lava/dispatcher/tmp/10525278/tftp-deploy-7mwljxy5/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10525278/extract-nfsrootfs-7ddrh0er
235 14:27:31.265781 extracting modules file /var/lib/lava/dispatcher/tmp/10525278/tftp-deploy-7mwljxy5/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10525278/extract-overlay-ramdisk-5gvt0ye3/ramdisk
236 14:27:31.285677 end: 1.5.4 extract-modules (duration 00:00:00) [common]
237 14:27:31.285847 start: 1.5.5 apply-overlay-tftp (timeout 00:09:27) [common]
238 14:27:31.285944 [common] Applying overlay to NFS
239 14:27:31.286016 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10525278/compress-overlay-q_66mi22/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10525278/extract-nfsrootfs-7ddrh0er
240 14:27:32.186785 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
241 14:27:32.186961 start: 1.5.6 configure-preseed-file (timeout 00:09:26) [common]
242 14:27:32.187058 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
243 14:27:32.187150 start: 1.5.7 compress-ramdisk (timeout 00:09:26) [common]
244 14:27:32.187238 Building ramdisk /var/lib/lava/dispatcher/tmp/10525278/extract-overlay-ramdisk-5gvt0ye3/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10525278/extract-overlay-ramdisk-5gvt0ye3/ramdisk
245 14:27:32.262568 >> 30350 blocks
246 14:27:32.853734 rename /var/lib/lava/dispatcher/tmp/10525278/extract-overlay-ramdisk-5gvt0ye3/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10525278/tftp-deploy-7mwljxy5/ramdisk/ramdisk.cpio.gz
247 14:27:32.854176 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
248 14:27:32.854301 start: 1.5.8 prepare-kernel (timeout 00:09:26) [common]
249 14:27:32.854404 start: 1.5.8.1 prepare-fit (timeout 00:09:26) [common]
250 14:27:32.854498 No mkimage arch provided, not using FIT.
251 14:27:32.854587 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
252 14:27:32.854673 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
253 14:27:32.854783 end: 1.5 prepare-tftp-overlay (duration 00:00:26) [common]
254 14:27:32.854876 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:26) [common]
255 14:27:32.854959 No LXC device requested
256 14:27:32.855040 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 14:27:32.855129 start: 1.7 deploy-device-env (timeout 00:09:26) [common]
258 14:27:32.855213 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 14:27:32.855287 Checking files for TFTP limit of 4294967296 bytes.
260 14:27:32.855697 end: 1 tftp-deploy (duration 00:00:34) [common]
261 14:27:32.855802 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 14:27:32.855893 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 14:27:32.856017 substitutions:
264 14:27:32.856083 - {DTB}: None
265 14:27:32.856147 - {INITRD}: 10525278/tftp-deploy-7mwljxy5/ramdisk/ramdisk.cpio.gz
266 14:27:32.856206 - {KERNEL}: 10525278/tftp-deploy-7mwljxy5/kernel/bzImage
267 14:27:32.856263 - {LAVA_MAC}: None
268 14:27:32.856320 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10525278/extract-nfsrootfs-7ddrh0er
269 14:27:32.856409 - {NFS_SERVER_IP}: 192.168.201.1
270 14:27:32.856465 - {PRESEED_CONFIG}: None
271 14:27:32.856520 - {PRESEED_LOCAL}: None
272 14:27:32.856574 - {RAMDISK}: 10525278/tftp-deploy-7mwljxy5/ramdisk/ramdisk.cpio.gz
273 14:27:32.856628 - {ROOT_PART}: None
274 14:27:32.856682 - {ROOT}: None
275 14:27:32.856736 - {SERVER_IP}: 192.168.201.1
276 14:27:32.856789 - {TEE}: None
277 14:27:32.856843 Parsed boot commands:
278 14:27:32.856896 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
279 14:27:32.857068 Parsed boot commands: tftpboot 192.168.201.1 10525278/tftp-deploy-7mwljxy5/kernel/bzImage 10525278/tftp-deploy-7mwljxy5/kernel/cmdline 10525278/tftp-deploy-7mwljxy5/ramdisk/ramdisk.cpio.gz
280 14:27:32.857156 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
281 14:27:32.857243 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
282 14:27:32.857336 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
283 14:27:32.857423 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
284 14:27:32.857492 Not connected, no need to disconnect.
285 14:27:32.857607 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
286 14:27:32.857689 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
287 14:27:32.857757 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-3'
288 14:27:32.861207 Setting prompt string to ['lava-test: # ']
289 14:27:32.861577 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
290 14:27:32.861685 end: 2.2.1 reset-connection (duration 00:00:00) [common]
291 14:27:32.861786 start: 2.2.2 reset-device (timeout 00:05:00) [common]
292 14:27:32.861874 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
293 14:27:32.862074 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
294 14:27:37.997419 >> Command sent successfully.
295 14:27:37.999930 Returned 0 in 5 seconds
296 14:27:38.100347 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
298 14:27:38.100672 end: 2.2.2 reset-device (duration 00:00:05) [common]
299 14:27:38.100807 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
300 14:27:38.100909 Setting prompt string to 'Starting depthcharge on Helios...'
301 14:27:38.101026 Changing prompt to 'Starting depthcharge on Helios...'
302 14:27:38.101102 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
303 14:27:38.101366 [Enter `^Ec?' for help]
304 14:27:38.723093
305 14:27:38.723250
306 14:27:38.733210 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
307 14:27:38.737317 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
308 14:27:38.740304 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
309 14:27:38.746938 CPU: AES supported, TXT NOT supported, VT supported
310 14:27:38.753479 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
311 14:27:38.757206 PCH: device id 0284 (rev 00) is Cometlake-U Premium
312 14:27:38.763915 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
313 14:27:38.767000 VBOOT: Loading verstage.
314 14:27:38.770759 FMAP: Found "FLASH" version 1.1 at 0xc04000.
315 14:27:38.777415 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
316 14:27:38.780285 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
317 14:27:38.783673 CBFS @ c08000 size 3f8000
318 14:27:38.790582 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
319 14:27:38.793830 CBFS: Locating 'fallback/verstage'
320 14:27:38.797036 CBFS: Found @ offset 10fb80 size 1072c
321 14:27:38.797140
322 14:27:38.797207
323 14:27:38.810413 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
324 14:27:38.823732 Probing TPM: . done!
325 14:27:38.827331 TPM ready after 0 ms
326 14:27:38.830885 Connected to device vid:did:rid of 1ae0:0028:00
327 14:27:38.841029 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
328 14:27:38.844502 Initialized TPM device CR50 revision 0
329 14:27:38.889239 tlcl_send_startup: Startup return code is 0
330 14:27:38.889413 TPM: setup succeeded
331 14:27:38.901199 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
332 14:27:38.905302 Chrome EC: UHEPI supported
333 14:27:38.908615 Phase 1
334 14:27:38.911997 FMAP: area GBB found @ c05000 (12288 bytes)
335 14:27:38.918728 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
336 14:27:38.921776 Phase 2
337 14:27:38.921882 Phase 3
338 14:27:38.924919 FMAP: area GBB found @ c05000 (12288 bytes)
339 14:27:38.931618 VB2:vb2_report_dev_firmware() This is developer signed firmware
340 14:27:38.938796 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
341 14:27:38.941696 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
342 14:27:38.948178 VB2:vb2_verify_keyblock() Checking keyblock signature...
343 14:27:38.963897 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
344 14:27:38.967545 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
345 14:27:38.973631 VB2:vb2_verify_fw_preamble() Verifying preamble.
346 14:27:38.978533 Phase 4
347 14:27:38.981607 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
348 14:27:38.988156 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
349 14:27:39.167752 VB2:vb2_rsa_verify_digest() Digest check failed!
350 14:27:39.174319 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
351 14:27:39.174484 Saving nvdata
352 14:27:39.177794 Reboot requested (10020007)
353 14:27:39.180838 board_reset() called!
354 14:27:39.180962 full_reset() called!
355 14:27:43.691088
356 14:27:43.691262
357 14:27:43.700849 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
358 14:27:43.703683 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
359 14:27:43.710546 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
360 14:27:43.713915 CPU: AES supported, TXT NOT supported, VT supported
361 14:27:43.720474 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
362 14:27:43.724035 PCH: device id 0284 (rev 00) is Cometlake-U Premium
363 14:27:43.730510 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
364 14:27:43.733776 VBOOT: Loading verstage.
365 14:27:43.737328 FMAP: Found "FLASH" version 1.1 at 0xc04000.
366 14:27:43.744032 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
367 14:27:43.747004 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
368 14:27:43.750209 CBFS @ c08000 size 3f8000
369 14:27:43.756834 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
370 14:27:43.760457 CBFS: Locating 'fallback/verstage'
371 14:27:43.763522 CBFS: Found @ offset 10fb80 size 1072c
372 14:27:43.767114
373 14:27:43.767200
374 14:27:43.777159 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
375 14:27:43.791724 Probing TPM: . done!
376 14:27:43.794725 TPM ready after 0 ms
377 14:27:43.797999 Connected to device vid:did:rid of 1ae0:0028:00
378 14:27:43.808235 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
379 14:27:43.811755 Initialized TPM device CR50 revision 0
380 14:27:43.856259 tlcl_send_startup: Startup return code is 0
381 14:27:43.856397 TPM: setup succeeded
382 14:27:43.868796 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
383 14:27:43.872541 Chrome EC: UHEPI supported
384 14:27:43.876217 Phase 1
385 14:27:43.879236 FMAP: area GBB found @ c05000 (12288 bytes)
386 14:27:43.886005 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
387 14:27:43.892645 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
388 14:27:43.896145 Recovery requested (1009000e)
389 14:27:43.901346 Saving nvdata
390 14:27:43.907873 tlcl_extend: response is 0
391 14:27:43.916688 tlcl_extend: response is 0
392 14:27:43.923399 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
393 14:27:43.926877 CBFS @ c08000 size 3f8000
394 14:27:43.933694 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
395 14:27:43.936969 CBFS: Locating 'fallback/romstage'
396 14:27:43.940443 CBFS: Found @ offset 80 size 145fc
397 14:27:43.943444 Accumulated console time in verstage 98 ms
398 14:27:43.943530
399 14:27:43.943595
400 14:27:43.956379 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
401 14:27:43.963196 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
402 14:27:43.966194 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
403 14:27:43.969844 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
404 14:27:43.976390 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
405 14:27:43.979486 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
406 14:27:43.982531 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
407 14:27:43.986154 TCO_STS: 0000 0000
408 14:27:43.989762 GEN_PMCON: e0015238 00000200
409 14:27:43.992590 GBLRST_CAUSE: 00000000 00000000
410 14:27:43.992677 prev_sleep_state 5
411 14:27:43.996595 Boot Count incremented to 57614
412 14:27:44.002921 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
413 14:27:44.006428 CBFS @ c08000 size 3f8000
414 14:27:44.012977 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
415 14:27:44.013065 CBFS: Locating 'fspm.bin'
416 14:27:44.019448 CBFS: Found @ offset 5ffc0 size 71000
417 14:27:44.022953 Chrome EC: UHEPI supported
418 14:27:44.029756 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
419 14:27:44.033189 Probing TPM: done!
420 14:27:44.039918 Connected to device vid:did:rid of 1ae0:0028:00
421 14:27:44.049634 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
422 14:27:44.054952 Initialized TPM device CR50 revision 0
423 14:27:44.064511 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
424 14:27:44.071227 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
425 14:27:44.074343 MRC cache found, size 1948
426 14:27:44.077955 bootmode is set to: 2
427 14:27:44.081094 PRMRR disabled by config.
428 14:27:44.081181 SPD INDEX = 1
429 14:27:44.087786 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
430 14:27:44.091495 CBFS @ c08000 size 3f8000
431 14:27:44.094496 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
432 14:27:44.097478 CBFS: Locating 'spd.bin'
433 14:27:44.100966 CBFS: Found @ offset 5fb80 size 400
434 14:27:44.104379 SPD: module type is LPDDR3
435 14:27:44.107968 SPD: module part is
436 14:27:44.114466 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
437 14:27:44.117896 SPD: device width 4 bits, bus width 8 bits
438 14:27:44.120915 SPD: module size is 4096 MB (per channel)
439 14:27:44.124496 memory slot: 0 configuration done.
440 14:27:44.127451 memory slot: 2 configuration done.
441 14:27:44.179310 CBMEM:
442 14:27:44.182723 IMD: root @ 99fff000 254 entries.
443 14:27:44.185767 IMD: root @ 99ffec00 62 entries.
444 14:27:44.188953 External stage cache:
445 14:27:44.192600 IMD: root @ 9abff000 254 entries.
446 14:27:44.195671 IMD: root @ 9abfec00 62 entries.
447 14:27:44.199077 Chrome EC: clear events_b mask to 0x0000000020004000
448 14:27:44.215287 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
449 14:27:44.228040 tlcl_write: response is 0
450 14:27:44.237368 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
451 14:27:44.244237 MRC: TPM MRC hash updated successfully.
452 14:27:44.244349 2 DIMMs found
453 14:27:44.247111 SMM Memory Map
454 14:27:44.250359 SMRAM : 0x9a000000 0x1000000
455 14:27:44.254016 Subregion 0: 0x9a000000 0xa00000
456 14:27:44.257437 Subregion 1: 0x9aa00000 0x200000
457 14:27:44.260294 Subregion 2: 0x9ac00000 0x400000
458 14:27:44.263832 top_of_ram = 0x9a000000
459 14:27:44.267361 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
460 14:27:44.273657 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
461 14:27:44.277219 MTRR Range: Start=ff000000 End=0 (Size 1000000)
462 14:27:44.283862 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
463 14:27:44.286919 CBFS @ c08000 size 3f8000
464 14:27:44.290531 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
465 14:27:44.293665 CBFS: Locating 'fallback/postcar'
466 14:27:44.300342 CBFS: Found @ offset 107000 size 4b44
467 14:27:44.303268 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
468 14:27:44.316311 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
469 14:27:44.320170 Processing 180 relocs. Offset value of 0x97c0c000
470 14:27:44.327948 Accumulated console time in romstage 285 ms
471 14:27:44.328084
472 14:27:44.328151
473 14:27:44.337822 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
474 14:27:44.344724 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
475 14:27:44.348133 CBFS @ c08000 size 3f8000
476 14:27:44.351021 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
477 14:27:44.357875 CBFS: Locating 'fallback/ramstage'
478 14:27:44.360838 CBFS: Found @ offset 43380 size 1b9e8
479 14:27:44.367545 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
480 14:27:44.399764 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
481 14:27:44.402861 Processing 3976 relocs. Offset value of 0x98db0000
482 14:27:44.409520 Accumulated console time in postcar 52 ms
483 14:27:44.409641
484 14:27:44.409709
485 14:27:44.419893 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
486 14:27:44.426288 FMAP: area RO_VPD found @ c00000 (16384 bytes)
487 14:27:44.429314 WARNING: RO_VPD is uninitialized or empty.
488 14:27:44.432792 FMAP: area RW_VPD found @ af8000 (8192 bytes)
489 14:27:44.439354 FMAP: area RW_VPD found @ af8000 (8192 bytes)
490 14:27:44.439446 Normal boot.
491 14:27:44.446239 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
492 14:27:44.449730 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
493 14:27:44.452593 CBFS @ c08000 size 3f8000
494 14:27:44.459348 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
495 14:27:44.462692 CBFS: Locating 'cpu_microcode_blob.bin'
496 14:27:44.466028 CBFS: Found @ offset 14700 size 2ec00
497 14:27:44.469634 microcode: sig=0x806ec pf=0x4 revision=0xc9
498 14:27:44.472352 Skip microcode update
499 14:27:44.479290 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
500 14:27:44.479380 CBFS @ c08000 size 3f8000
501 14:27:44.486101 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
502 14:27:44.489179 CBFS: Locating 'fsps.bin'
503 14:27:44.492122 CBFS: Found @ offset d1fc0 size 35000
504 14:27:44.517768 Detected 4 core, 8 thread CPU.
505 14:27:44.521313 Setting up SMI for CPU
506 14:27:44.524261 IED base = 0x9ac00000
507 14:27:44.524347 IED size = 0x00400000
508 14:27:44.527744 Will perform SMM setup.
509 14:27:44.534332 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
510 14:27:44.540746 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
511 14:27:44.544325 Processing 16 relocs. Offset value of 0x00030000
512 14:27:44.547970 Attempting to start 7 APs
513 14:27:44.551424 Waiting for 10ms after sending INIT.
514 14:27:44.567632 Waiting for 1st SIPI to complete...done.
515 14:27:44.567735 AP: slot 2 apic_id 1.
516 14:27:44.574113 Waiting for 2nd SIPI to complete...done.
517 14:27:44.574208 AP: slot 4 apic_id 2.
518 14:27:44.577697 AP: slot 1 apic_id 3.
519 14:27:44.580876 AP: slot 6 apic_id 5.
520 14:27:44.580964 AP: slot 5 apic_id 4.
521 14:27:44.584142 AP: slot 3 apic_id 6.
522 14:27:44.587503 AP: slot 7 apic_id 7.
523 14:27:44.594352 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
524 14:27:44.600368 Processing 13 relocs. Offset value of 0x00038000
525 14:27:44.604121 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
526 14:27:44.610340 Installing SMM handler to 0x9a000000
527 14:27:44.617130 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
528 14:27:44.620766 Processing 658 relocs. Offset value of 0x9a010000
529 14:27:44.630373 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
530 14:27:44.633850 Processing 13 relocs. Offset value of 0x9a008000
531 14:27:44.640561 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
532 14:27:44.647190 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
533 14:27:44.653726 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
534 14:27:44.657216 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
535 14:27:44.663516 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
536 14:27:44.669950 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
537 14:27:44.673291 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
538 14:27:44.680101 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
539 14:27:44.683596 Clearing SMI status registers
540 14:27:44.687054 SMI_STS: PM1
541 14:27:44.687151 PM1_STS: PWRBTN
542 14:27:44.690509 TCO_STS: SECOND_TO
543 14:27:44.693369 New SMBASE 0x9a000000
544 14:27:44.696872 In relocation handler: CPU 0
545 14:27:44.700555 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
546 14:27:44.703632 Writing SMRR. base = 0x9a000006, mask=0xff000800
547 14:27:44.706653 Relocation complete.
548 14:27:44.710236 New SMBASE 0x99fff800
549 14:27:44.710321 In relocation handler: CPU 2
550 14:27:44.717136 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
551 14:27:44.720249 Writing SMRR. base = 0x9a000006, mask=0xff000800
552 14:27:44.723735 Relocation complete.
553 14:27:44.726825 New SMBASE 0x99fff400
554 14:27:44.726937 In relocation handler: CPU 3
555 14:27:44.733770 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
556 14:27:44.736981 Writing SMRR. base = 0x9a000006, mask=0xff000800
557 14:27:44.740148 Relocation complete.
558 14:27:44.740381 New SMBASE 0x99ffe400
559 14:27:44.743722 In relocation handler: CPU 7
560 14:27:44.750249 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
561 14:27:44.753296 Writing SMRR. base = 0x9a000006, mask=0xff000800
562 14:27:44.756761 Relocation complete.
563 14:27:44.756950 New SMBASE 0x99fff000
564 14:27:44.759783 In relocation handler: CPU 4
565 14:27:44.763459 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
566 14:27:44.769899 Writing SMRR. base = 0x9a000006, mask=0xff000800
567 14:27:44.773537 Relocation complete.
568 14:27:44.773734 New SMBASE 0x99fffc00
569 14:27:44.776841 In relocation handler: CPU 1
570 14:27:44.779796 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
571 14:27:44.786765 Writing SMRR. base = 0x9a000006, mask=0xff000800
572 14:27:44.786948 Relocation complete.
573 14:27:44.790007 New SMBASE 0x99ffec00
574 14:27:44.793582 In relocation handler: CPU 5
575 14:27:44.797010 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
576 14:27:44.803554 Writing SMRR. base = 0x9a000006, mask=0xff000800
577 14:27:44.803679 Relocation complete.
578 14:27:44.806788 New SMBASE 0x99ffe800
579 14:27:44.809939 In relocation handler: CPU 6
580 14:27:44.813714 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
581 14:27:44.819785 Writing SMRR. base = 0x9a000006, mask=0xff000800
582 14:27:44.819907 Relocation complete.
583 14:27:44.823547 Initializing CPU #0
584 14:27:44.826473 CPU: vendor Intel device 806ec
585 14:27:44.830055 CPU: family 06, model 8e, stepping 0c
586 14:27:44.833063 Clearing out pending MCEs
587 14:27:44.836690 Setting up local APIC...
588 14:27:44.836778 apic_id: 0x00 done.
589 14:27:44.840139 Turbo is available but hidden
590 14:27:44.843200 Turbo is available and visible
591 14:27:44.846896 VMX status: enabled
592 14:27:44.849959 IA32_FEATURE_CONTROL status: locked
593 14:27:44.853009 Skip microcode update
594 14:27:44.853125 CPU #0 initialized
595 14:27:44.856421 Initializing CPU #2
596 14:27:44.856519 Initializing CPU #3
597 14:27:44.859868 Initializing CPU #7
598 14:27:44.863341 CPU: vendor Intel device 806ec
599 14:27:44.866221 CPU: family 06, model 8e, stepping 0c
600 14:27:44.869626 CPU: vendor Intel device 806ec
601 14:27:44.873207 CPU: family 06, model 8e, stepping 0c
602 14:27:44.876184 Clearing out pending MCEs
603 14:27:44.879819 Clearing out pending MCEs
604 14:27:44.883113 Setting up local APIC...
605 14:27:44.883200 Initializing CPU #5
606 14:27:44.886599 Initializing CPU #6
607 14:27:44.889477 CPU: vendor Intel device 806ec
608 14:27:44.892993 CPU: family 06, model 8e, stepping 0c
609 14:27:44.896448 CPU: vendor Intel device 806ec
610 14:27:44.899759 CPU: family 06, model 8e, stepping 0c
611 14:27:44.902691 Clearing out pending MCEs
612 14:27:44.905896 Clearing out pending MCEs
613 14:27:44.905984 Setting up local APIC...
614 14:27:44.909647 CPU: vendor Intel device 806ec
615 14:27:44.912783 CPU: family 06, model 8e, stepping 0c
616 14:27:44.915859 Clearing out pending MCEs
617 14:27:44.919589 Initializing CPU #4
618 14:27:44.919742 Initializing CPU #1
619 14:27:44.922468 CPU: vendor Intel device 806ec
620 14:27:44.929346 CPU: family 06, model 8e, stepping 0c
621 14:27:44.929530 CPU: vendor Intel device 806ec
622 14:27:44.935784 CPU: family 06, model 8e, stepping 0c
623 14:27:44.935937 Clearing out pending MCEs
624 14:27:44.939427 Clearing out pending MCEs
625 14:27:44.942386 Setting up local APIC...
626 14:27:44.945826 apic_id: 0x06 done.
627 14:27:44.945922 Setting up local APIC...
628 14:27:44.948993 Setting up local APIC...
629 14:27:44.952821 Setting up local APIC...
630 14:27:44.955803 Setting up local APIC...
631 14:27:44.955891 apic_id: 0x02 done.
632 14:27:44.959444 apic_id: 0x03 done.
633 14:27:44.962437 VMX status: enabled
634 14:27:44.962526 VMX status: enabled
635 14:27:44.965778 IA32_FEATURE_CONTROL status: locked
636 14:27:44.968767 IA32_FEATURE_CONTROL status: locked
637 14:27:44.972156 Skip microcode update
638 14:27:44.975549 Skip microcode update
639 14:27:44.975638 CPU #4 initialized
640 14:27:44.979145 CPU #1 initialized
641 14:27:44.982640 apic_id: 0x05 done.
642 14:27:44.982731 apic_id: 0x04 done.
643 14:27:44.985848 VMX status: enabled
644 14:27:44.985934 VMX status: enabled
645 14:27:44.992379 IA32_FEATURE_CONTROL status: locked
646 14:27:44.995284 IA32_FEATURE_CONTROL status: locked
647 14:27:44.995377 Skip microcode update
648 14:27:44.998794 Skip microcode update
649 14:27:45.002439 CPU #6 initialized
650 14:27:45.002569 CPU #5 initialized
651 14:27:45.005718 apic_id: 0x01 done.
652 14:27:45.005818 apic_id: 0x07 done.
653 14:27:45.008657 VMX status: enabled
654 14:27:45.012040 VMX status: enabled
655 14:27:45.015563 IA32_FEATURE_CONTROL status: locked
656 14:27:45.018630 IA32_FEATURE_CONTROL status: locked
657 14:27:45.018741 Skip microcode update
658 14:27:45.022263 VMX status: enabled
659 14:27:45.025353 Skip microcode update
660 14:27:45.025439 CPU #3 initialized
661 14:27:45.028410 CPU #7 initialized
662 14:27:45.032112 IA32_FEATURE_CONTROL status: locked
663 14:27:45.035081 Skip microcode update
664 14:27:45.035168 CPU #2 initialized
665 14:27:45.042295 bsp_do_flight_plan done after 466 msecs.
666 14:27:45.045358 CPU: frequency set to 4200 MHz
667 14:27:45.045447 Enabling SMIs.
668 14:27:45.045561 Locking SMM.
669 14:27:45.061446 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
670 14:27:45.065001 CBFS @ c08000 size 3f8000
671 14:27:45.071418 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
672 14:27:45.071538 CBFS: Locating 'vbt.bin'
673 14:27:45.078264 CBFS: Found @ offset 5f5c0 size 499
674 14:27:45.081354 Found a VBT of 4608 bytes after decompression
675 14:27:45.267912 Display FSP Version Info HOB
676 14:27:45.270722 Reference Code - CPU = 9.0.1e.30
677 14:27:45.274301 uCode Version = 0.0.0.ca
678 14:27:45.277468 TXT ACM version = ff.ff.ff.ffff
679 14:27:45.281124 Display FSP Version Info HOB
680 14:27:45.284533 Reference Code - ME = 9.0.1e.30
681 14:27:45.287668 MEBx version = 0.0.0.0
682 14:27:45.291252 ME Firmware Version = Consumer SKU
683 14:27:45.294313 Display FSP Version Info HOB
684 14:27:45.297873 Reference Code - CML PCH = 9.0.1e.30
685 14:27:45.300766 PCH-CRID Status = Disabled
686 14:27:45.304306 PCH-CRID Original Value = ff.ff.ff.ffff
687 14:27:45.307366 PCH-CRID New Value = ff.ff.ff.ffff
688 14:27:45.310873 OPROM - RST - RAID = ff.ff.ff.ffff
689 14:27:45.313897 ChipsetInit Base Version = ff.ff.ff.ffff
690 14:27:45.317276 ChipsetInit Oem Version = ff.ff.ff.ffff
691 14:27:45.320545 Display FSP Version Info HOB
692 14:27:45.327316 Reference Code - SA - System Agent = 9.0.1e.30
693 14:27:45.330747 Reference Code - MRC = 0.7.1.6c
694 14:27:45.330834 SA - PCIe Version = 9.0.1e.30
695 14:27:45.334276 SA-CRID Status = Disabled
696 14:27:45.337531 SA-CRID Original Value = 0.0.0.c
697 14:27:45.340539 SA-CRID New Value = 0.0.0.c
698 14:27:45.344264 OPROM - VBIOS = ff.ff.ff.ffff
699 14:27:45.347228 RTC Init
700 14:27:45.350501 Set power on after power failure.
701 14:27:45.350586 Disabling Deep S3
702 14:27:45.353866 Disabling Deep S3
703 14:27:45.353951 Disabling Deep S4
704 14:27:45.357452 Disabling Deep S4
705 14:27:45.357579 Disabling Deep S5
706 14:27:45.360445 Disabling Deep S5
707 14:27:45.367062 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 197 exit 1
708 14:27:45.367149 Enumerating buses...
709 14:27:45.373800 Show all devs... Before device enumeration.
710 14:27:45.373899 Root Device: enabled 1
711 14:27:45.377389 CPU_CLUSTER: 0: enabled 1
712 14:27:45.380524 DOMAIN: 0000: enabled 1
713 14:27:45.384271 APIC: 00: enabled 1
714 14:27:45.384385 PCI: 00:00.0: enabled 1
715 14:27:45.387088 PCI: 00:02.0: enabled 1
716 14:27:45.390627 PCI: 00:04.0: enabled 0
717 14:27:45.390752 PCI: 00:05.0: enabled 0
718 14:27:45.393533 PCI: 00:12.0: enabled 1
719 14:27:45.397044 PCI: 00:12.5: enabled 0
720 14:27:45.400620 PCI: 00:12.6: enabled 0
721 14:27:45.400719 PCI: 00:14.0: enabled 1
722 14:27:45.403982 PCI: 00:14.1: enabled 0
723 14:27:45.407211 PCI: 00:14.3: enabled 1
724 14:27:45.410111 PCI: 00:14.5: enabled 0
725 14:27:45.410196 PCI: 00:15.0: enabled 1
726 14:27:45.413676 PCI: 00:15.1: enabled 1
727 14:27:45.416731 PCI: 00:15.2: enabled 0
728 14:27:45.420175 PCI: 00:15.3: enabled 0
729 14:27:45.420259 PCI: 00:16.0: enabled 1
730 14:27:45.423482 PCI: 00:16.1: enabled 0
731 14:27:45.426832 PCI: 00:16.2: enabled 0
732 14:27:45.430242 PCI: 00:16.3: enabled 0
733 14:27:45.430330 PCI: 00:16.4: enabled 0
734 14:27:45.433165 PCI: 00:16.5: enabled 0
735 14:27:45.436602 PCI: 00:17.0: enabled 1
736 14:27:45.436685 PCI: 00:19.0: enabled 1
737 14:27:45.440015 PCI: 00:19.1: enabled 0
738 14:27:45.443437 PCI: 00:19.2: enabled 0
739 14:27:45.446481 PCI: 00:1a.0: enabled 0
740 14:27:45.446609 PCI: 00:1c.0: enabled 0
741 14:27:45.450012 PCI: 00:1c.1: enabled 0
742 14:27:45.453155 PCI: 00:1c.2: enabled 0
743 14:27:45.456499 PCI: 00:1c.3: enabled 0
744 14:27:45.456586 PCI: 00:1c.4: enabled 0
745 14:27:45.460170 PCI: 00:1c.5: enabled 0
746 14:27:45.463134 PCI: 00:1c.6: enabled 0
747 14:27:45.466633 PCI: 00:1c.7: enabled 0
748 14:27:45.466734 PCI: 00:1d.0: enabled 1
749 14:27:45.469480 PCI: 00:1d.1: enabled 0
750 14:27:45.473402 PCI: 00:1d.2: enabled 0
751 14:27:45.473516 PCI: 00:1d.3: enabled 0
752 14:27:45.476320 PCI: 00:1d.4: enabled 0
753 14:27:45.479943 PCI: 00:1d.5: enabled 1
754 14:27:45.483061 PCI: 00:1e.0: enabled 1
755 14:27:45.483151 PCI: 00:1e.1: enabled 0
756 14:27:45.486602 PCI: 00:1e.2: enabled 1
757 14:27:45.489700 PCI: 00:1e.3: enabled 1
758 14:27:45.492719 PCI: 00:1f.0: enabled 1
759 14:27:45.492829 PCI: 00:1f.1: enabled 1
760 14:27:45.496167 PCI: 00:1f.2: enabled 1
761 14:27:45.499755 PCI: 00:1f.3: enabled 1
762 14:27:45.503278 PCI: 00:1f.4: enabled 1
763 14:27:45.503362 PCI: 00:1f.5: enabled 1
764 14:27:45.506409 PCI: 00:1f.6: enabled 0
765 14:27:45.509431 USB0 port 0: enabled 1
766 14:27:45.509570 I2C: 00:15: enabled 1
767 14:27:45.512918 I2C: 00:5d: enabled 1
768 14:27:45.516504 GENERIC: 0.0: enabled 1
769 14:27:45.516603 I2C: 00:1a: enabled 1
770 14:27:45.519567 I2C: 00:38: enabled 1
771 14:27:45.522888 I2C: 00:39: enabled 1
772 14:27:45.522970 I2C: 00:3a: enabled 1
773 14:27:45.526489 I2C: 00:3b: enabled 1
774 14:27:45.529295 PCI: 00:00.0: enabled 1
775 14:27:45.529378 SPI: 00: enabled 1
776 14:27:45.533204 SPI: 01: enabled 1
777 14:27:45.536153 PNP: 0c09.0: enabled 1
778 14:27:45.536237 USB2 port 0: enabled 1
779 14:27:45.539449 USB2 port 1: enabled 1
780 14:27:45.542897 USB2 port 2: enabled 0
781 14:27:45.546232 USB2 port 3: enabled 0
782 14:27:45.546339 USB2 port 5: enabled 0
783 14:27:45.549134 USB2 port 6: enabled 1
784 14:27:45.552624 USB2 port 9: enabled 1
785 14:27:45.552728 USB3 port 0: enabled 1
786 14:27:45.556267 USB3 port 1: enabled 1
787 14:27:45.559130 USB3 port 2: enabled 1
788 14:27:45.562752 USB3 port 3: enabled 1
789 14:27:45.562871 USB3 port 4: enabled 0
790 14:27:45.565802 APIC: 03: enabled 1
791 14:27:45.565911 APIC: 01: enabled 1
792 14:27:45.569312 APIC: 06: enabled 1
793 14:27:45.572309 APIC: 02: enabled 1
794 14:27:45.572420 APIC: 04: enabled 1
795 14:27:45.575929 APIC: 05: enabled 1
796 14:27:45.578914 APIC: 07: enabled 1
797 14:27:45.579023 Compare with tree...
798 14:27:45.582599 Root Device: enabled 1
799 14:27:45.585674 CPU_CLUSTER: 0: enabled 1
800 14:27:45.585792 APIC: 00: enabled 1
801 14:27:45.589360 APIC: 03: enabled 1
802 14:27:45.592406 APIC: 01: enabled 1
803 14:27:45.592517 APIC: 06: enabled 1
804 14:27:45.595530 APIC: 02: enabled 1
805 14:27:45.599083 APIC: 04: enabled 1
806 14:27:45.599195 APIC: 05: enabled 1
807 14:27:45.602160 APIC: 07: enabled 1
808 14:27:45.605365 DOMAIN: 0000: enabled 1
809 14:27:45.609071 PCI: 00:00.0: enabled 1
810 14:27:45.611979 PCI: 00:02.0: enabled 1
811 14:27:45.612089 PCI: 00:04.0: enabled 0
812 14:27:45.615604 PCI: 00:05.0: enabled 0
813 14:27:45.619111 PCI: 00:12.0: enabled 1
814 14:27:45.622152 PCI: 00:12.5: enabled 0
815 14:27:45.622264 PCI: 00:12.6: enabled 0
816 14:27:45.625656 PCI: 00:14.0: enabled 1
817 14:27:45.629114 USB0 port 0: enabled 1
818 14:27:45.632373 USB2 port 0: enabled 1
819 14:27:45.635360 USB2 port 1: enabled 1
820 14:27:45.638673 USB2 port 2: enabled 0
821 14:27:45.638787 USB2 port 3: enabled 0
822 14:27:45.642234 USB2 port 5: enabled 0
823 14:27:45.645475 USB2 port 6: enabled 1
824 14:27:45.648456 USB2 port 9: enabled 1
825 14:27:45.651945 USB3 port 0: enabled 1
826 14:27:45.652056 USB3 port 1: enabled 1
827 14:27:45.655432 USB3 port 2: enabled 1
828 14:27:45.659051 USB3 port 3: enabled 1
829 14:27:45.661725 USB3 port 4: enabled 0
830 14:27:45.665228 PCI: 00:14.1: enabled 0
831 14:27:45.668262 PCI: 00:14.3: enabled 1
832 14:27:45.668378 PCI: 00:14.5: enabled 0
833 14:27:45.671792 PCI: 00:15.0: enabled 1
834 14:27:45.675348 I2C: 00:15: enabled 1
835 14:27:45.678345 PCI: 00:15.1: enabled 1
836 14:27:45.678454 I2C: 00:5d: enabled 1
837 14:27:45.681984 GENERIC: 0.0: enabled 1
838 14:27:45.684956 PCI: 00:15.2: enabled 0
839 14:27:45.688667 PCI: 00:15.3: enabled 0
840 14:27:45.691769 PCI: 00:16.0: enabled 1
841 14:27:45.691880 PCI: 00:16.1: enabled 0
842 14:27:45.694917 PCI: 00:16.2: enabled 0
843 14:27:45.698569 PCI: 00:16.3: enabled 0
844 14:27:45.701624 PCI: 00:16.4: enabled 0
845 14:27:45.704668 PCI: 00:16.5: enabled 0
846 14:27:45.704777 PCI: 00:17.0: enabled 1
847 14:27:45.708172 PCI: 00:19.0: enabled 1
848 14:27:45.711943 I2C: 00:1a: enabled 1
849 14:27:45.715018 I2C: 00:38: enabled 1
850 14:27:45.718095 I2C: 00:39: enabled 1
851 14:27:45.718205 I2C: 00:3a: enabled 1
852 14:27:45.721149 I2C: 00:3b: enabled 1
853 14:27:45.724764 PCI: 00:19.1: enabled 0
854 14:27:45.728346 PCI: 00:19.2: enabled 0
855 14:27:45.728459 PCI: 00:1a.0: enabled 0
856 14:27:45.731410 PCI: 00:1c.0: enabled 0
857 14:27:45.734389 PCI: 00:1c.1: enabled 0
858 14:27:45.737723 PCI: 00:1c.2: enabled 0
859 14:27:45.741194 PCI: 00:1c.3: enabled 0
860 14:27:45.741304 PCI: 00:1c.4: enabled 0
861 14:27:45.744401 PCI: 00:1c.5: enabled 0
862 14:27:45.747877 PCI: 00:1c.6: enabled 0
863 14:27:45.751328 PCI: 00:1c.7: enabled 0
864 14:27:45.754260 PCI: 00:1d.0: enabled 1
865 14:27:45.754373 PCI: 00:1d.1: enabled 0
866 14:27:45.757632 PCI: 00:1d.2: enabled 0
867 14:27:45.761102 PCI: 00:1d.3: enabled 0
868 14:27:45.764564 PCI: 00:1d.4: enabled 0
869 14:27:45.767421 PCI: 00:1d.5: enabled 1
870 14:27:45.767531 PCI: 00:00.0: enabled 1
871 14:27:45.771002 PCI: 00:1e.0: enabled 1
872 14:27:45.774253 PCI: 00:1e.1: enabled 0
873 14:27:45.777563 PCI: 00:1e.2: enabled 1
874 14:27:45.777672 SPI: 00: enabled 1
875 14:27:45.781118 PCI: 00:1e.3: enabled 1
876 14:27:45.784162 SPI: 01: enabled 1
877 14:27:45.787734 PCI: 00:1f.0: enabled 1
878 14:27:45.787844 PNP: 0c09.0: enabled 1
879 14:27:45.790815 PCI: 00:1f.1: enabled 1
880 14:27:45.794409 PCI: 00:1f.2: enabled 1
881 14:27:45.797456 PCI: 00:1f.3: enabled 1
882 14:27:45.800583 PCI: 00:1f.4: enabled 1
883 14:27:45.800690 PCI: 00:1f.5: enabled 1
884 14:27:45.804219 PCI: 00:1f.6: enabled 0
885 14:27:45.807245 Root Device scanning...
886 14:27:45.810834 scan_static_bus for Root Device
887 14:27:45.813896 CPU_CLUSTER: 0 enabled
888 14:27:45.814005 DOMAIN: 0000 enabled
889 14:27:45.817256 DOMAIN: 0000 scanning...
890 14:27:45.820667 PCI: pci_scan_bus for bus 00
891 14:27:45.823741 PCI: 00:00.0 [8086/0000] ops
892 14:27:45.827493 PCI: 00:00.0 [8086/9b61] enabled
893 14:27:45.830404 PCI: 00:02.0 [8086/0000] bus ops
894 14:27:45.833966 PCI: 00:02.0 [8086/9b41] enabled
895 14:27:45.837018 PCI: 00:04.0 [8086/1903] disabled
896 14:27:45.840574 PCI: 00:08.0 [8086/1911] enabled
897 14:27:45.844102 PCI: 00:12.0 [8086/02f9] enabled
898 14:27:45.846937 PCI: 00:14.0 [8086/0000] bus ops
899 14:27:45.850543 PCI: 00:14.0 [8086/02ed] enabled
900 14:27:45.854129 PCI: 00:14.2 [8086/02ef] enabled
901 14:27:45.856844 PCI: 00:14.3 [8086/02f0] enabled
902 14:27:45.860378 PCI: 00:15.0 [8086/0000] bus ops
903 14:27:45.863849 PCI: 00:15.0 [8086/02e8] enabled
904 14:27:45.866758 PCI: 00:15.1 [8086/0000] bus ops
905 14:27:45.870130 PCI: 00:15.1 [8086/02e9] enabled
906 14:27:45.878286 PCI: 00:16.0 [8086/0000] ops
907 14:27:45.878418 PCI: 00:16.0 [8086/02e0] enabled
908 14:27:45.880325 PCI: 00:17.0 [8086/0000] ops
909 14:27:45.883867 PCI: 00:17.0 [8086/02d3] enabled
910 14:27:45.886878 PCI: 00:19.0 [8086/0000] bus ops
911 14:27:45.890537 PCI: 00:19.0 [8086/02c5] enabled
912 14:27:45.893545 PCI: 00:1d.0 [8086/0000] bus ops
913 14:27:45.896744 PCI: 00:1d.0 [8086/02b0] enabled
914 14:27:45.903375 PCI: Static device PCI: 00:1d.5 not found, disabling it.
915 14:27:45.907042 PCI: 00:1e.0 [8086/0000] ops
916 14:27:45.910160 PCI: 00:1e.0 [8086/02a8] enabled
917 14:27:45.913351 PCI: 00:1e.2 [8086/0000] bus ops
918 14:27:45.916884 PCI: 00:1e.2 [8086/02aa] enabled
919 14:27:45.919985 PCI: 00:1e.3 [8086/0000] bus ops
920 14:27:45.923816 PCI: 00:1e.3 [8086/02ab] enabled
921 14:27:45.926638 PCI: 00:1f.0 [8086/0000] bus ops
922 14:27:45.929872 PCI: 00:1f.0 [8086/0284] enabled
923 14:27:45.933546 PCI: Static device PCI: 00:1f.1 not found, disabling it.
924 14:27:45.940058 PCI: Static device PCI: 00:1f.2 not found, disabling it.
925 14:27:45.943050 PCI: 00:1f.3 [8086/0000] bus ops
926 14:27:45.946717 PCI: 00:1f.3 [8086/02c8] enabled
927 14:27:45.950206 PCI: 00:1f.4 [8086/0000] bus ops
928 14:27:45.953109 PCI: 00:1f.4 [8086/02a3] enabled
929 14:27:45.956648 PCI: 00:1f.5 [8086/0000] bus ops
930 14:27:45.959610 PCI: 00:1f.5 [8086/02a4] enabled
931 14:27:45.963168 PCI: Leftover static devices:
932 14:27:45.963252 PCI: 00:05.0
933 14:27:45.966626 PCI: 00:12.5
934 14:27:45.966709 PCI: 00:12.6
935 14:27:45.969519 PCI: 00:14.1
936 14:27:45.969641 PCI: 00:14.5
937 14:27:45.969734 PCI: 00:15.2
938 14:27:45.973001 PCI: 00:15.3
939 14:27:45.973083 PCI: 00:16.1
940 14:27:45.976389 PCI: 00:16.2
941 14:27:45.976475 PCI: 00:16.3
942 14:27:45.976556 PCI: 00:16.4
943 14:27:45.979957 PCI: 00:16.5
944 14:27:45.980039 PCI: 00:19.1
945 14:27:45.982851 PCI: 00:19.2
946 14:27:45.982938 PCI: 00:1a.0
947 14:27:45.983013 PCI: 00:1c.0
948 14:27:45.986365 PCI: 00:1c.1
949 14:27:45.986463 PCI: 00:1c.2
950 14:27:45.989758 PCI: 00:1c.3
951 14:27:45.989842 PCI: 00:1c.4
952 14:27:45.992858 PCI: 00:1c.5
953 14:27:45.992941 PCI: 00:1c.6
954 14:27:45.993006 PCI: 00:1c.7
955 14:27:45.996547 PCI: 00:1d.1
956 14:27:45.996631 PCI: 00:1d.2
957 14:27:45.999542 PCI: 00:1d.3
958 14:27:45.999625 PCI: 00:1d.4
959 14:27:45.999691 PCI: 00:1d.5
960 14:27:46.003241 PCI: 00:1e.1
961 14:27:46.003325 PCI: 00:1f.1
962 14:27:46.006307 PCI: 00:1f.2
963 14:27:46.006390 PCI: 00:1f.6
964 14:27:46.009853 PCI: Check your devicetree.cb.
965 14:27:46.012845 PCI: 00:02.0 scanning...
966 14:27:46.015978 scan_generic_bus for PCI: 00:02.0
967 14:27:46.019567 scan_generic_bus for PCI: 00:02.0 done
968 14:27:46.026383 scan_bus: scanning of bus PCI: 00:02.0 took 10196 usecs
969 14:27:46.026468 PCI: 00:14.0 scanning...
970 14:27:46.029983 scan_static_bus for PCI: 00:14.0
971 14:27:46.032938 USB0 port 0 enabled
972 14:27:46.036410 USB0 port 0 scanning...
973 14:27:46.039483 scan_static_bus for USB0 port 0
974 14:27:46.043093 USB2 port 0 enabled
975 14:27:46.043178 USB2 port 1 enabled
976 14:27:46.046025 USB2 port 2 disabled
977 14:27:46.046109 USB2 port 3 disabled
978 14:27:46.049668 USB2 port 5 disabled
979 14:27:46.053149 USB2 port 6 enabled
980 14:27:46.053232 USB2 port 9 enabled
981 14:27:46.056137 USB3 port 0 enabled
982 14:27:46.059537 USB3 port 1 enabled
983 14:27:46.059621 USB3 port 2 enabled
984 14:27:46.062995 USB3 port 3 enabled
985 14:27:46.063079 USB3 port 4 disabled
986 14:27:46.065978 USB2 port 0 scanning...
987 14:27:46.069331 scan_static_bus for USB2 port 0
988 14:27:46.072925 scan_static_bus for USB2 port 0 done
989 14:27:46.079446 scan_bus: scanning of bus USB2 port 0 took 9697 usecs
990 14:27:46.082521 USB2 port 1 scanning...
991 14:27:46.086065 scan_static_bus for USB2 port 1
992 14:27:46.089531 scan_static_bus for USB2 port 1 done
993 14:27:46.092507 scan_bus: scanning of bus USB2 port 1 took 9700 usecs
994 14:27:46.095970 USB2 port 6 scanning...
995 14:27:46.099121 scan_static_bus for USB2 port 6
996 14:27:46.102964 scan_static_bus for USB2 port 6 done
997 14:27:46.109451 scan_bus: scanning of bus USB2 port 6 took 9703 usecs
998 14:27:46.112726 USB2 port 9 scanning...
999 14:27:46.115683 scan_static_bus for USB2 port 9
1000 14:27:46.119309 scan_static_bus for USB2 port 9 done
1001 14:27:46.126023 scan_bus: scanning of bus USB2 port 9 took 9680 usecs
1002 14:27:46.126109 USB3 port 0 scanning...
1003 14:27:46.128948 scan_static_bus for USB3 port 0
1004 14:27:46.132724 scan_static_bus for USB3 port 0 done
1005 14:27:46.139146 scan_bus: scanning of bus USB3 port 0 took 9701 usecs
1006 14:27:46.142119 USB3 port 1 scanning...
1007 14:27:46.145678 scan_static_bus for USB3 port 1
1008 14:27:46.149209 scan_static_bus for USB3 port 1 done
1009 14:27:46.155831 scan_bus: scanning of bus USB3 port 1 took 9705 usecs
1010 14:27:46.155919 USB3 port 2 scanning...
1011 14:27:46.158807 scan_static_bus for USB3 port 2
1012 14:27:46.162397 scan_static_bus for USB3 port 2 done
1013 14:27:46.168701 scan_bus: scanning of bus USB3 port 2 took 9707 usecs
1014 14:27:46.172209 USB3 port 3 scanning...
1015 14:27:46.175544 scan_static_bus for USB3 port 3
1016 14:27:46.179192 scan_static_bus for USB3 port 3 done
1017 14:27:46.185353 scan_bus: scanning of bus USB3 port 3 took 9703 usecs
1018 14:27:46.188877 scan_static_bus for USB0 port 0 done
1019 14:27:46.191761 scan_bus: scanning of bus USB0 port 0 took 155368 usecs
1020 14:27:46.198958 scan_static_bus for PCI: 00:14.0 done
1021 14:27:46.202265 scan_bus: scanning of bus PCI: 00:14.0 took 172980 usecs
1022 14:27:46.205228 PCI: 00:15.0 scanning...
1023 14:27:46.208845 scan_generic_bus for PCI: 00:15.0
1024 14:27:46.211838 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1025 14:27:46.218437 scan_generic_bus for PCI: 00:15.0 done
1026 14:27:46.222137 scan_bus: scanning of bus PCI: 00:15.0 took 14296 usecs
1027 14:27:46.225194 PCI: 00:15.1 scanning...
1028 14:27:46.228135 scan_generic_bus for PCI: 00:15.1
1029 14:27:46.232461 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1030 14:27:46.238624 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1031 14:27:46.241391 scan_generic_bus for PCI: 00:15.1 done
1032 14:27:46.248125 scan_bus: scanning of bus PCI: 00:15.1 took 18583 usecs
1033 14:27:46.248213 PCI: 00:19.0 scanning...
1034 14:27:46.251665 scan_generic_bus for PCI: 00:19.0
1035 14:27:46.258139 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1036 14:27:46.261666 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1037 14:27:46.264624 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1038 14:27:46.268236 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1039 14:27:46.274562 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1040 14:27:46.277970 scan_generic_bus for PCI: 00:19.0 done
1041 14:27:46.281358 scan_bus: scanning of bus PCI: 00:19.0 took 30706 usecs
1042 14:27:46.284716 PCI: 00:1d.0 scanning...
1043 14:27:46.288239 do_pci_scan_bridge for PCI: 00:1d.0
1044 14:27:46.291598 PCI: pci_scan_bus for bus 01
1045 14:27:46.295098 PCI: 01:00.0 [1c5c/1327] enabled
1046 14:27:46.297963 Enabling Common Clock Configuration
1047 14:27:46.304398 L1 Sub-State supported from root port 29
1048 14:27:46.304486 L1 Sub-State Support = 0xf
1049 14:27:46.307778 CommonModeRestoreTime = 0x28
1050 14:27:46.314390 Power On Value = 0x16, Power On Scale = 0x0
1051 14:27:46.314475 ASPM: Enabled L1
1052 14:27:46.321120 scan_bus: scanning of bus PCI: 00:1d.0 took 32783 usecs
1053 14:27:46.324706 PCI: 00:1e.2 scanning...
1054 14:27:46.327810 scan_generic_bus for PCI: 00:1e.2
1055 14:27:46.331554 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1056 14:27:46.334536 scan_generic_bus for PCI: 00:1e.2 done
1057 14:27:46.341355 scan_bus: scanning of bus PCI: 00:1e.2 took 13995 usecs
1058 14:27:46.341484 PCI: 00:1e.3 scanning...
1059 14:27:46.347883 scan_generic_bus for PCI: 00:1e.3
1060 14:27:46.351602 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1061 14:27:46.354458 scan_generic_bus for PCI: 00:1e.3 done
1062 14:27:46.361489 scan_bus: scanning of bus PCI: 00:1e.3 took 14014 usecs
1063 14:27:46.361613 PCI: 00:1f.0 scanning...
1064 14:27:46.364547 scan_static_bus for PCI: 00:1f.0
1065 14:27:46.367690 PNP: 0c09.0 enabled
1066 14:27:46.371289 scan_static_bus for PCI: 00:1f.0 done
1067 14:27:46.378109 scan_bus: scanning of bus PCI: 00:1f.0 took 12034 usecs
1068 14:27:46.381136 PCI: 00:1f.3 scanning...
1069 14:27:46.384374 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1070 14:27:46.387849 PCI: 00:1f.4 scanning...
1071 14:27:46.391314 scan_generic_bus for PCI: 00:1f.4
1072 14:27:46.394707 scan_generic_bus for PCI: 00:1f.4 done
1073 14:27:46.400930 scan_bus: scanning of bus PCI: 00:1f.4 took 10187 usecs
1074 14:27:46.404493 PCI: 00:1f.5 scanning...
1075 14:27:46.407463 scan_generic_bus for PCI: 00:1f.5
1076 14:27:46.410943 scan_generic_bus for PCI: 00:1f.5 done
1077 14:27:46.417616 scan_bus: scanning of bus PCI: 00:1f.5 took 10193 usecs
1078 14:27:46.424430 scan_bus: scanning of bus DOMAIN: 0000 took 604956 usecs
1079 14:27:46.427266 scan_static_bus for Root Device done
1080 14:27:46.430863 scan_bus: scanning of bus Root Device took 624799 usecs
1081 14:27:46.433951 done
1082 14:27:46.434024 Chrome EC: UHEPI supported
1083 14:27:46.441179 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1084 14:27:46.447864 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1085 14:27:46.454159 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1086 14:27:46.460783 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1087 14:27:46.464216 SPI flash protection: WPSW=0 SRP0=1
1088 14:27:46.470559 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1089 14:27:46.474234 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1090 14:27:46.477382 found VGA at PCI: 00:02.0
1091 14:27:46.480793 Setting up VGA for PCI: 00:02.0
1092 14:27:46.487964 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1093 14:27:46.490718 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1094 14:27:46.494124 Allocating resources...
1095 14:27:46.494204 Reading resources...
1096 14:27:46.500424 Root Device read_resources bus 0 link: 0
1097 14:27:46.503697 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1098 14:27:46.510587 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1099 14:27:46.513865 DOMAIN: 0000 read_resources bus 0 link: 0
1100 14:27:46.520313 PCI: 00:14.0 read_resources bus 0 link: 0
1101 14:27:46.523746 USB0 port 0 read_resources bus 0 link: 0
1102 14:27:46.531698 USB0 port 0 read_resources bus 0 link: 0 done
1103 14:27:46.535364 PCI: 00:14.0 read_resources bus 0 link: 0 done
1104 14:27:46.542598 PCI: 00:15.0 read_resources bus 1 link: 0
1105 14:27:46.545765 PCI: 00:15.0 read_resources bus 1 link: 0 done
1106 14:27:46.552450 PCI: 00:15.1 read_resources bus 2 link: 0
1107 14:27:46.556138 PCI: 00:15.1 read_resources bus 2 link: 0 done
1108 14:27:46.563357 PCI: 00:19.0 read_resources bus 3 link: 0
1109 14:27:46.569727 PCI: 00:19.0 read_resources bus 3 link: 0 done
1110 14:27:46.573384 PCI: 00:1d.0 read_resources bus 1 link: 0
1111 14:27:46.579925 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1112 14:27:46.583007 PCI: 00:1e.2 read_resources bus 4 link: 0
1113 14:27:46.589963 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1114 14:27:46.592932 PCI: 00:1e.3 read_resources bus 5 link: 0
1115 14:27:46.599680 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1116 14:27:46.603111 PCI: 00:1f.0 read_resources bus 0 link: 0
1117 14:27:46.609570 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1118 14:27:46.616392 DOMAIN: 0000 read_resources bus 0 link: 0 done
1119 14:27:46.619880 Root Device read_resources bus 0 link: 0 done
1120 14:27:46.623055 Done reading resources.
1121 14:27:46.626770 Show resources in subtree (Root Device)...After reading.
1122 14:27:46.632950 Root Device child on link 0 CPU_CLUSTER: 0
1123 14:27:46.635923 CPU_CLUSTER: 0 child on link 0 APIC: 00
1124 14:27:46.636007 APIC: 00
1125 14:27:46.639646 APIC: 03
1126 14:27:46.639729 APIC: 01
1127 14:27:46.642690 APIC: 06
1128 14:27:46.642773 APIC: 02
1129 14:27:46.642838 APIC: 04
1130 14:27:46.646435 APIC: 05
1131 14:27:46.646548 APIC: 07
1132 14:27:46.649430 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1133 14:27:46.705801 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1134 14:27:46.706122 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1135 14:27:46.706387 PCI: 00:00.0
1136 14:27:46.706481 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1137 14:27:46.706944 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1138 14:27:46.707227 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1139 14:27:46.755301 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1140 14:27:46.755686 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1141 14:27:46.756190 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1142 14:27:46.756334 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1143 14:27:46.756699 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1144 14:27:46.756848 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1145 14:27:46.787317 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1146 14:27:46.787626 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1147 14:27:46.788002 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1148 14:27:46.794346 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1149 14:27:46.804631 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1150 14:27:46.811076 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1151 14:27:46.821009 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1152 14:27:46.823900 PCI: 00:02.0
1153 14:27:46.833930 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 14:27:46.843857 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1155 14:27:46.850484 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1156 14:27:46.853606 PCI: 00:04.0
1157 14:27:46.853706 PCI: 00:08.0
1158 14:27:46.863975 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1159 14:27:46.867006 PCI: 00:12.0
1160 14:27:46.876940 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1161 14:27:46.880154 PCI: 00:14.0 child on link 0 USB0 port 0
1162 14:27:46.890284 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1163 14:27:46.896699 USB0 port 0 child on link 0 USB2 port 0
1164 14:27:46.896786 USB2 port 0
1165 14:27:46.900163 USB2 port 1
1166 14:27:46.900266 USB2 port 2
1167 14:27:46.903706 USB2 port 3
1168 14:27:46.903783 USB2 port 5
1169 14:27:46.906800 USB2 port 6
1170 14:27:46.906874 USB2 port 9
1171 14:27:46.910274 USB3 port 0
1172 14:27:46.910347 USB3 port 1
1173 14:27:46.913431 USB3 port 2
1174 14:27:46.913547 USB3 port 3
1175 14:27:46.917102 USB3 port 4
1176 14:27:46.917176 PCI: 00:14.2
1177 14:27:46.926896 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1178 14:27:46.936802 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1179 14:27:46.939703 PCI: 00:14.3
1180 14:27:46.950091 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1181 14:27:46.953111 PCI: 00:15.0 child on link 0 I2C: 01:15
1182 14:27:46.962976 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 14:27:46.966613 I2C: 01:15
1184 14:27:46.969495 PCI: 00:15.1 child on link 0 I2C: 02:5d
1185 14:27:46.979784 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1186 14:27:46.979862 I2C: 02:5d
1187 14:27:46.982908 GENERIC: 0.0
1188 14:27:46.986601 PCI: 00:16.0
1189 14:27:46.995923 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 14:27:46.996055 PCI: 00:17.0
1191 14:27:47.005920 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1192 14:27:47.012732 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1193 14:27:47.022914 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1194 14:27:47.029348 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1195 14:27:47.039022 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1196 14:27:47.049159 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1197 14:27:47.052641 PCI: 00:19.0 child on link 0 I2C: 03:1a
1198 14:27:47.062531 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 14:27:47.062627 I2C: 03:1a
1200 14:27:47.065613 I2C: 03:38
1201 14:27:47.065688 I2C: 03:39
1202 14:27:47.069149 I2C: 03:3a
1203 14:27:47.069215 I2C: 03:3b
1204 14:27:47.075606 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1205 14:27:47.082317 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1206 14:27:47.092033 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1207 14:27:47.102118 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1208 14:27:47.105570 PCI: 01:00.0
1209 14:27:47.115344 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1210 14:27:47.115423 PCI: 00:1e.0
1211 14:27:47.125413 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1212 14:27:47.135527 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1213 14:27:47.141750 PCI: 00:1e.2 child on link 0 SPI: 00
1214 14:27:47.152023 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1215 14:27:47.152130 SPI: 00
1216 14:27:47.155302 PCI: 00:1e.3 child on link 0 SPI: 01
1217 14:27:47.165338 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1218 14:27:47.168329 SPI: 01
1219 14:27:47.172179 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1220 14:27:47.178483 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1221 14:27:47.188477 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1222 14:27:47.191384 PNP: 0c09.0
1223 14:27:47.198362 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1224 14:27:47.201875 PCI: 00:1f.3
1225 14:27:47.211210 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1226 14:27:47.221624 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1227 14:27:47.221706 PCI: 00:1f.4
1228 14:27:47.231183 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1229 14:27:47.241293 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1230 14:27:47.244681 PCI: 00:1f.5
1231 14:27:47.251383 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1232 14:27:47.257623 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1233 14:27:47.264757 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1234 14:27:47.270910 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1235 14:27:47.274503 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1236 14:27:47.277624 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1237 14:27:47.284375 PCI: 00:17.0 18 * [0x60 - 0x67] io
1238 14:27:47.287263 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1239 14:27:47.293998 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1240 14:27:47.300849 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1241 14:27:47.307467 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1242 14:27:47.317042 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1243 14:27:47.323552 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1244 14:27:47.327195 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1245 14:27:47.333428 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1246 14:27:47.340460 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1247 14:27:47.343492 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1248 14:27:47.350144 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1249 14:27:47.353439 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1250 14:27:47.359829 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1251 14:27:47.363198 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1252 14:27:47.367016 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1253 14:27:47.373164 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1254 14:27:47.376653 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1255 14:27:47.383270 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1256 14:27:47.386201 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1257 14:27:47.393028 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1258 14:27:47.396111 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1259 14:27:47.402866 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1260 14:27:47.406468 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1261 14:27:47.412592 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1262 14:27:47.416413 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1263 14:27:47.422823 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1264 14:27:47.426232 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1265 14:27:47.432987 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1266 14:27:47.435784 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1267 14:27:47.442489 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1268 14:27:47.445938 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1269 14:27:47.455423 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1270 14:27:47.458871 avoid_fixed_resources: DOMAIN: 0000
1271 14:27:47.465827 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1272 14:27:47.469231 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1273 14:27:47.478982 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1274 14:27:47.485322 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1275 14:27:47.491994 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1276 14:27:47.501879 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1277 14:27:47.508620 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1278 14:27:47.515268 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1279 14:27:47.521929 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1280 14:27:47.531726 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1281 14:27:47.538177 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1282 14:27:47.544700 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1283 14:27:47.548389 Setting resources...
1284 14:27:47.555142 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1285 14:27:47.557916 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1286 14:27:47.561706 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1287 14:27:47.564535 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1288 14:27:47.571458 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1289 14:27:47.574925 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1290 14:27:47.581307 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1291 14:27:47.587755 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1292 14:27:47.597926 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1293 14:27:47.601054 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1294 14:27:47.607728 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1295 14:27:47.610775 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1296 14:27:47.617405 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1297 14:27:47.621110 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1298 14:27:47.627262 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1299 14:27:47.630921 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1300 14:27:47.634013 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1301 14:27:47.641163 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1302 14:27:47.643773 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1303 14:27:47.650963 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1304 14:27:47.654015 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1305 14:27:47.660494 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1306 14:27:47.664194 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1307 14:27:47.670790 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1308 14:27:47.673669 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1309 14:27:47.680487 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1310 14:27:47.683920 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1311 14:27:47.690209 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1312 14:27:47.693927 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1313 14:27:47.699916 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1314 14:27:47.703590 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1315 14:27:47.710384 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1316 14:27:47.716883 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1317 14:27:47.723108 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1318 14:27:47.729952 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1319 14:27:47.736709 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1320 14:27:47.743355 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1321 14:27:47.749734 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1322 14:27:47.756593 Root Device assign_resources, bus 0 link: 0
1323 14:27:47.759719 DOMAIN: 0000 assign_resources, bus 0 link: 0
1324 14:27:47.769719 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1325 14:27:47.776315 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1326 14:27:47.782475 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1327 14:27:47.792680 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1328 14:27:47.799222 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1329 14:27:47.809531 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1330 14:27:47.812744 PCI: 00:14.0 assign_resources, bus 0 link: 0
1331 14:27:47.819369 PCI: 00:14.0 assign_resources, bus 0 link: 0
1332 14:27:47.826152 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1333 14:27:47.835946 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1334 14:27:47.842680 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1335 14:27:47.852328 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1336 14:27:47.855915 PCI: 00:15.0 assign_resources, bus 1 link: 0
1337 14:27:47.858755 PCI: 00:15.0 assign_resources, bus 1 link: 0
1338 14:27:47.868813 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1339 14:27:47.872273 PCI: 00:15.1 assign_resources, bus 2 link: 0
1340 14:27:47.879168 PCI: 00:15.1 assign_resources, bus 2 link: 0
1341 14:27:47.885658 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1342 14:27:47.895456 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1343 14:27:47.902377 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1344 14:27:47.908685 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1345 14:27:47.918481 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1346 14:27:47.925145 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1347 14:27:47.931890 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1348 14:27:47.941944 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1349 14:27:47.945024 PCI: 00:19.0 assign_resources, bus 3 link: 0
1350 14:27:47.951693 PCI: 00:19.0 assign_resources, bus 3 link: 0
1351 14:27:47.958296 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1352 14:27:47.968388 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1353 14:27:47.975180 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1354 14:27:47.981479 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1355 14:27:47.988178 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1356 14:27:47.994494 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1357 14:27:48.001480 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1358 14:27:48.011444 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1359 14:27:48.014361 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1360 14:27:48.020872 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1361 14:27:48.027650 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1362 14:27:48.031350 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1363 14:27:48.038154 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1364 14:27:48.041272 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1365 14:27:48.047973 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1366 14:27:48.050936 LPC: Trying to open IO window from 800 size 1ff
1367 14:27:48.061227 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1368 14:27:48.067707 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1369 14:27:48.077493 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1370 14:27:48.083959 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1371 14:27:48.090780 DOMAIN: 0000 assign_resources, bus 0 link: 0
1372 14:27:48.093791 Root Device assign_resources, bus 0 link: 0
1373 14:27:48.097139 Done setting resources.
1374 14:27:48.103810 Show resources in subtree (Root Device)...After assigning values.
1375 14:27:48.107345 Root Device child on link 0 CPU_CLUSTER: 0
1376 14:27:48.110718 CPU_CLUSTER: 0 child on link 0 APIC: 00
1377 14:27:48.113652 APIC: 00
1378 14:27:48.113839 APIC: 03
1379 14:27:48.113977 APIC: 01
1380 14:27:48.117381 APIC: 06
1381 14:27:48.117584 APIC: 02
1382 14:27:48.120363 APIC: 04
1383 14:27:48.120526 APIC: 05
1384 14:27:48.120657 APIC: 07
1385 14:27:48.127230 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1386 14:27:48.136953 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1387 14:27:48.146675 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1388 14:27:48.146890 PCI: 00:00.0
1389 14:27:48.156782 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1390 14:27:48.167010 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1391 14:27:48.176639 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1392 14:27:48.186215 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1393 14:27:48.196440 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1394 14:27:48.206488 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1395 14:27:48.213188 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1396 14:27:48.222926 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1397 14:27:48.233023 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1398 14:27:48.242530 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1399 14:27:48.252470 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1400 14:27:48.259250 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1401 14:27:48.269074 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1402 14:27:48.279259 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1403 14:27:48.288892 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1404 14:27:48.298731 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1405 14:27:48.298865 PCI: 00:02.0
1406 14:27:48.312074 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1407 14:27:48.321772 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1408 14:27:48.331701 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1409 14:27:48.331838 PCI: 00:04.0
1410 14:27:48.335146 PCI: 00:08.0
1411 14:27:48.345111 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1412 14:27:48.345263 PCI: 00:12.0
1413 14:27:48.354892 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1414 14:27:48.361763 PCI: 00:14.0 child on link 0 USB0 port 0
1415 14:27:48.371371 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1416 14:27:48.375177 USB0 port 0 child on link 0 USB2 port 0
1417 14:27:48.378108 USB2 port 0
1418 14:27:48.378204 USB2 port 1
1419 14:27:48.381753 USB2 port 2
1420 14:27:48.381850 USB2 port 3
1421 14:27:48.384902 USB2 port 5
1422 14:27:48.384990 USB2 port 6
1423 14:27:48.387926 USB2 port 9
1424 14:27:48.388019 USB3 port 0
1425 14:27:48.391582 USB3 port 1
1426 14:27:48.391686 USB3 port 2
1427 14:27:48.395086 USB3 port 3
1428 14:27:48.395218 USB3 port 4
1429 14:27:48.398103 PCI: 00:14.2
1430 14:27:48.408230 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1431 14:27:48.417777 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1432 14:27:48.421108 PCI: 00:14.3
1433 14:27:48.431305 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1434 14:27:48.434259 PCI: 00:15.0 child on link 0 I2C: 01:15
1435 14:27:48.444536 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1436 14:27:48.447342 I2C: 01:15
1437 14:27:48.450818 PCI: 00:15.1 child on link 0 I2C: 02:5d
1438 14:27:48.460610 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1439 14:27:48.464246 I2C: 02:5d
1440 14:27:48.464372 GENERIC: 0.0
1441 14:27:48.467342 PCI: 00:16.0
1442 14:27:48.477019 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1443 14:27:48.477188 PCI: 00:17.0
1444 14:27:48.487116 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1445 14:27:48.497031 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1446 14:27:48.507142 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1447 14:27:48.516724 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1448 14:27:48.526613 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1449 14:27:48.536827 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1450 14:27:48.540264 PCI: 00:19.0 child on link 0 I2C: 03:1a
1451 14:27:48.550372 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1452 14:27:48.553238 I2C: 03:1a
1453 14:27:48.553423 I2C: 03:38
1454 14:27:48.556718 I2C: 03:39
1455 14:27:48.556850 I2C: 03:3a
1456 14:27:48.560223 I2C: 03:3b
1457 14:27:48.563221 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1458 14:27:48.573682 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1459 14:27:48.583043 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1460 14:27:48.593312 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1461 14:27:48.593488 PCI: 01:00.0
1462 14:27:48.605980 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1463 14:27:48.606148 PCI: 00:1e.0
1464 14:27:48.616109 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1465 14:27:48.629212 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1466 14:27:48.632704 PCI: 00:1e.2 child on link 0 SPI: 00
1467 14:27:48.642412 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1468 14:27:48.642550 SPI: 00
1469 14:27:48.645948 PCI: 00:1e.3 child on link 0 SPI: 01
1470 14:27:48.659387 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1471 14:27:48.659575 SPI: 01
1472 14:27:48.662326 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1473 14:27:48.672303 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1474 14:27:48.682470 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1475 14:27:48.682620 PNP: 0c09.0
1476 14:27:48.692084 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1477 14:27:48.692238 PCI: 00:1f.3
1478 14:27:48.701913 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1479 14:27:48.712203 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1480 14:27:48.715296 PCI: 00:1f.4
1481 14:27:48.725376 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1482 14:27:48.734858 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1483 14:27:48.735009 PCI: 00:1f.5
1484 14:27:48.745106 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1485 14:27:48.748439 Done allocating resources.
1486 14:27:48.754593 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1487 14:27:48.758189 Enabling resources...
1488 14:27:48.761619 PCI: 00:00.0 subsystem <- 8086/9b61
1489 14:27:48.764510 PCI: 00:00.0 cmd <- 06
1490 14:27:48.767725 PCI: 00:02.0 subsystem <- 8086/9b41
1491 14:27:48.771191 PCI: 00:02.0 cmd <- 03
1492 14:27:48.774630 PCI: 00:08.0 cmd <- 06
1493 14:27:48.777683 PCI: 00:12.0 subsystem <- 8086/02f9
1494 14:27:48.777781 PCI: 00:12.0 cmd <- 02
1495 14:27:48.784967 PCI: 00:14.0 subsystem <- 8086/02ed
1496 14:27:48.785084 PCI: 00:14.0 cmd <- 02
1497 14:27:48.787881 PCI: 00:14.2 cmd <- 02
1498 14:27:48.791620 PCI: 00:14.3 subsystem <- 8086/02f0
1499 14:27:48.794573 PCI: 00:14.3 cmd <- 02
1500 14:27:48.798070 PCI: 00:15.0 subsystem <- 8086/02e8
1501 14:27:48.801130 PCI: 00:15.0 cmd <- 02
1502 14:27:48.804656 PCI: 00:15.1 subsystem <- 8086/02e9
1503 14:27:48.807833 PCI: 00:15.1 cmd <- 02
1504 14:27:48.810915 PCI: 00:16.0 subsystem <- 8086/02e0
1505 14:27:48.814678 PCI: 00:16.0 cmd <- 02
1506 14:27:48.817616 PCI: 00:17.0 subsystem <- 8086/02d3
1507 14:27:48.821166 PCI: 00:17.0 cmd <- 03
1508 14:27:48.824239 PCI: 00:19.0 subsystem <- 8086/02c5
1509 14:27:48.824323 PCI: 00:19.0 cmd <- 02
1510 14:27:48.828113 PCI: 00:1d.0 bridge ctrl <- 0013
1511 14:27:48.834717 PCI: 00:1d.0 subsystem <- 8086/02b0
1512 14:27:48.834805 PCI: 00:1d.0 cmd <- 06
1513 14:27:48.841153 PCI: 00:1e.0 subsystem <- 8086/02a8
1514 14:27:48.841237 PCI: 00:1e.0 cmd <- 06
1515 14:27:48.844162 PCI: 00:1e.2 subsystem <- 8086/02aa
1516 14:27:48.847552 PCI: 00:1e.2 cmd <- 06
1517 14:27:48.850889 PCI: 00:1e.3 subsystem <- 8086/02ab
1518 14:27:48.854445 PCI: 00:1e.3 cmd <- 02
1519 14:27:48.857769 PCI: 00:1f.0 subsystem <- 8086/0284
1520 14:27:48.860735 PCI: 00:1f.0 cmd <- 407
1521 14:27:48.864162 PCI: 00:1f.3 subsystem <- 8086/02c8
1522 14:27:48.867682 PCI: 00:1f.3 cmd <- 02
1523 14:27:48.871130 PCI: 00:1f.4 subsystem <- 8086/02a3
1524 14:27:48.874379 PCI: 00:1f.4 cmd <- 03
1525 14:27:48.877829 PCI: 00:1f.5 subsystem <- 8086/02a4
1526 14:27:48.880798 PCI: 00:1f.5 cmd <- 406
1527 14:27:48.888521 PCI: 01:00.0 cmd <- 02
1528 14:27:48.893891 done.
1529 14:27:48.906606 ME: Version: 14.0.39.1367
1530 14:27:48.912710 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1531 14:27:48.916333 Initializing devices...
1532 14:27:48.916456 Root Device init ...
1533 14:27:48.922950 Chrome EC: Set SMI mask to 0x0000000000000000
1534 14:27:48.926459 Chrome EC: clear events_b mask to 0x0000000000000000
1535 14:27:48.932770 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1536 14:27:48.939398 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1537 14:27:48.946020 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1538 14:27:48.949656 Chrome EC: Set WAKE mask to 0x0000000000000000
1539 14:27:48.952534 Root Device init finished in 35160 usecs
1540 14:27:48.956043 CPU_CLUSTER: 0 init ...
1541 14:27:48.962845 CPU_CLUSTER: 0 init finished in 2447 usecs
1542 14:27:48.967058 PCI: 00:00.0 init ...
1543 14:27:48.970469 CPU TDP: 15 Watts
1544 14:27:48.973429 CPU PL2 = 64 Watts
1545 14:27:48.976805 PCI: 00:00.0 init finished in 7076 usecs
1546 14:27:48.980313 PCI: 00:02.0 init ...
1547 14:27:48.983647 PCI: 00:02.0 init finished in 2253 usecs
1548 14:27:48.987249 PCI: 00:08.0 init ...
1549 14:27:48.990199 PCI: 00:08.0 init finished in 2250 usecs
1550 14:27:48.993798 PCI: 00:12.0 init ...
1551 14:27:48.996701 PCI: 00:12.0 init finished in 2252 usecs
1552 14:27:49.000441 PCI: 00:14.0 init ...
1553 14:27:49.003555 PCI: 00:14.0 init finished in 2250 usecs
1554 14:27:49.006950 PCI: 00:14.2 init ...
1555 14:27:49.010128 PCI: 00:14.2 init finished in 2253 usecs
1556 14:27:49.013204 PCI: 00:14.3 init ...
1557 14:27:49.016912 PCI: 00:14.3 init finished in 2271 usecs
1558 14:27:49.019986 PCI: 00:15.0 init ...
1559 14:27:49.023166 DW I2C bus 0 at 0xd121f000 (400 KHz)
1560 14:27:49.026864 PCI: 00:15.0 init finished in 5976 usecs
1561 14:27:49.029687 PCI: 00:15.1 init ...
1562 14:27:49.033195 DW I2C bus 1 at 0xd1220000 (400 KHz)
1563 14:27:49.039983 PCI: 00:15.1 init finished in 5976 usecs
1564 14:27:49.040093 PCI: 00:16.0 init ...
1565 14:27:49.046428 PCI: 00:16.0 init finished in 2252 usecs
1566 14:27:49.049409 PCI: 00:19.0 init ...
1567 14:27:49.052909 DW I2C bus 4 at 0xd1222000 (400 KHz)
1568 14:27:49.056382 PCI: 00:19.0 init finished in 5976 usecs
1569 14:27:49.059765 PCI: 00:1d.0 init ...
1570 14:27:49.063181 Initializing PCH PCIe bridge.
1571 14:27:49.065936 PCI: 00:1d.0 init finished in 5286 usecs
1572 14:27:49.069289 PCI: 00:1f.0 init ...
1573 14:27:49.072804 IOAPIC: Initializing IOAPIC at 0xfec00000
1574 14:27:49.079393 IOAPIC: Bootstrap Processor Local APIC = 0x00
1575 14:27:49.079537 IOAPIC: ID = 0x02
1576 14:27:49.082827 IOAPIC: Dumping registers
1577 14:27:49.085763 reg 0x0000: 0x02000000
1578 14:27:49.089248 reg 0x0001: 0x00770020
1579 14:27:49.089374 reg 0x0002: 0x00000000
1580 14:27:49.095855 PCI: 00:1f.0 init finished in 23551 usecs
1581 14:27:49.099366 PCI: 00:1f.4 init ...
1582 14:27:49.102437 PCI: 00:1f.4 init finished in 2262 usecs
1583 14:27:49.113312 PCI: 01:00.0 init ...
1584 14:27:49.116234 PCI: 01:00.0 init finished in 2253 usecs
1585 14:27:49.120574 PNP: 0c09.0 init ...
1586 14:27:49.124296 Google Chrome EC uptime: 11.098 seconds
1587 14:27:49.130901 Google Chrome AP resets since EC boot: 0
1588 14:27:49.133921 Google Chrome most recent AP reset causes:
1589 14:27:49.141134 Google Chrome EC reset flags at last EC boot: reset-pin
1590 14:27:49.144028 PNP: 0c09.0 init finished in 20640 usecs
1591 14:27:49.147568 Devices initialized
1592 14:27:49.147677 Show all devs... After init.
1593 14:27:49.150678 Root Device: enabled 1
1594 14:27:49.153907 CPU_CLUSTER: 0: enabled 1
1595 14:27:49.157390 DOMAIN: 0000: enabled 1
1596 14:27:49.157477 APIC: 00: enabled 1
1597 14:27:49.160439 PCI: 00:00.0: enabled 1
1598 14:27:49.163772 PCI: 00:02.0: enabled 1
1599 14:27:49.167225 PCI: 00:04.0: enabled 0
1600 14:27:49.167326 PCI: 00:05.0: enabled 0
1601 14:27:49.170779 PCI: 00:12.0: enabled 1
1602 14:27:49.173678 PCI: 00:12.5: enabled 0
1603 14:27:49.173762 PCI: 00:12.6: enabled 0
1604 14:27:49.176975 PCI: 00:14.0: enabled 1
1605 14:27:49.180598 PCI: 00:14.1: enabled 0
1606 14:27:49.183457 PCI: 00:14.3: enabled 1
1607 14:27:49.183555 PCI: 00:14.5: enabled 0
1608 14:27:49.187204 PCI: 00:15.0: enabled 1
1609 14:27:49.190449 PCI: 00:15.1: enabled 1
1610 14:27:49.193293 PCI: 00:15.2: enabled 0
1611 14:27:49.193423 PCI: 00:15.3: enabled 0
1612 14:27:49.196898 PCI: 00:16.0: enabled 1
1613 14:27:49.200445 PCI: 00:16.1: enabled 0
1614 14:27:49.203367 PCI: 00:16.2: enabled 0
1615 14:27:49.203470 PCI: 00:16.3: enabled 0
1616 14:27:49.207021 PCI: 00:16.4: enabled 0
1617 14:27:49.210174 PCI: 00:16.5: enabled 0
1618 14:27:49.213122 PCI: 00:17.0: enabled 1
1619 14:27:49.213199 PCI: 00:19.0: enabled 1
1620 14:27:49.216624 PCI: 00:19.1: enabled 0
1621 14:27:49.219798 PCI: 00:19.2: enabled 0
1622 14:27:49.219884 PCI: 00:1a.0: enabled 0
1623 14:27:49.223530 PCI: 00:1c.0: enabled 0
1624 14:27:49.226482 PCI: 00:1c.1: enabled 0
1625 14:27:49.229490 PCI: 00:1c.2: enabled 0
1626 14:27:49.229632 PCI: 00:1c.3: enabled 0
1627 14:27:49.233282 PCI: 00:1c.4: enabled 0
1628 14:27:49.236327 PCI: 00:1c.5: enabled 0
1629 14:27:49.239434 PCI: 00:1c.6: enabled 0
1630 14:27:49.239507 PCI: 00:1c.7: enabled 0
1631 14:27:49.243000 PCI: 00:1d.0: enabled 1
1632 14:27:49.246493 PCI: 00:1d.1: enabled 0
1633 14:27:49.249893 PCI: 00:1d.2: enabled 0
1634 14:27:49.249970 PCI: 00:1d.3: enabled 0
1635 14:27:49.252852 PCI: 00:1d.4: enabled 0
1636 14:27:49.256520 PCI: 00:1d.5: enabled 0
1637 14:27:49.259510 PCI: 00:1e.0: enabled 1
1638 14:27:49.259601 PCI: 00:1e.1: enabled 0
1639 14:27:49.262587 PCI: 00:1e.2: enabled 1
1640 14:27:49.265887 PCI: 00:1e.3: enabled 1
1641 14:27:49.269483 PCI: 00:1f.0: enabled 1
1642 14:27:49.269567 PCI: 00:1f.1: enabled 0
1643 14:27:49.272686 PCI: 00:1f.2: enabled 0
1644 14:27:49.276249 PCI: 00:1f.3: enabled 1
1645 14:27:49.276342 PCI: 00:1f.4: enabled 1
1646 14:27:49.279171 PCI: 00:1f.5: enabled 1
1647 14:27:49.282498 PCI: 00:1f.6: enabled 0
1648 14:27:49.286253 USB0 port 0: enabled 1
1649 14:27:49.286339 I2C: 01:15: enabled 1
1650 14:27:49.289091 I2C: 02:5d: enabled 1
1651 14:27:49.292857 GENERIC: 0.0: enabled 1
1652 14:27:49.292947 I2C: 03:1a: enabled 1
1653 14:27:49.295658 I2C: 03:38: enabled 1
1654 14:27:49.299065 I2C: 03:39: enabled 1
1655 14:27:49.299150 I2C: 03:3a: enabled 1
1656 14:27:49.302392 I2C: 03:3b: enabled 1
1657 14:27:49.305907 PCI: 00:00.0: enabled 1
1658 14:27:49.305991 SPI: 00: enabled 1
1659 14:27:49.308802 SPI: 01: enabled 1
1660 14:27:49.312464 PNP: 0c09.0: enabled 1
1661 14:27:49.312546 USB2 port 0: enabled 1
1662 14:27:49.315433 USB2 port 1: enabled 1
1663 14:27:49.319040 USB2 port 2: enabled 0
1664 14:27:49.322091 USB2 port 3: enabled 0
1665 14:27:49.322173 USB2 port 5: enabled 0
1666 14:27:49.325796 USB2 port 6: enabled 1
1667 14:27:49.328712 USB2 port 9: enabled 1
1668 14:27:49.328793 USB3 port 0: enabled 1
1669 14:27:49.331844 USB3 port 1: enabled 1
1670 14:27:49.335113 USB3 port 2: enabled 1
1671 14:27:49.338649 USB3 port 3: enabled 1
1672 14:27:49.338731 USB3 port 4: enabled 0
1673 14:27:49.341754 APIC: 03: enabled 1
1674 14:27:49.345485 APIC: 01: enabled 1
1675 14:27:49.345583 APIC: 06: enabled 1
1676 14:27:49.348279 APIC: 02: enabled 1
1677 14:27:49.348362 APIC: 04: enabled 1
1678 14:27:49.352318 APIC: 05: enabled 1
1679 14:27:49.355088 APIC: 07: enabled 1
1680 14:27:49.355174 PCI: 00:08.0: enabled 1
1681 14:27:49.358546 PCI: 00:14.2: enabled 1
1682 14:27:49.362214 PCI: 01:00.0: enabled 1
1683 14:27:49.365470 Disabling ACPI via APMC:
1684 14:27:49.368422 done.
1685 14:27:49.371875 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1686 14:27:49.375532 ELOG: NV offset 0xaf0000 size 0x4000
1687 14:27:49.382239 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1688 14:27:49.389100 ELOG: Event(17) added with size 13 at 2023-05-30 14:27:49 UTC
1689 14:27:49.395782 POST: Unexpected post code in previous boot: 0x73
1690 14:27:49.402237 ELOG: Event(A3) added with size 11 at 2023-05-30 14:27:49 UTC
1691 14:27:49.409054 ELOG: Event(A6) added with size 13 at 2023-05-30 14:27:49 UTC
1692 14:27:49.415611 ELOG: Event(92) added with size 9 at 2023-05-30 14:27:49 UTC
1693 14:27:49.419174 ELOG: Event(93) added with size 9 at 2023-05-30 14:27:49 UTC
1694 14:27:49.425805 ELOG: Event(9A) added with size 9 at 2023-05-30 14:27:49 UTC
1695 14:27:49.431981 ELOG: Event(9E) added with size 10 at 2023-05-30 14:27:49 UTC
1696 14:27:49.438664 ELOG: Event(9F) added with size 14 at 2023-05-30 14:27:49 UTC
1697 14:27:49.445395 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1698 14:27:49.452102 ELOG: Event(A1) added with size 10 at 2023-05-30 14:27:49 UTC
1699 14:27:49.458583 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1700 14:27:49.465756 ELOG: Event(A0) added with size 9 at 2023-05-30 14:27:49 UTC
1701 14:27:49.468845 elog_add_boot_reason: Logged dev mode boot
1702 14:27:49.471954 Finalize devices...
1703 14:27:49.475580 PCI: 00:17.0 final
1704 14:27:49.475676 Devices finalized
1705 14:27:49.481709 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1706 14:27:49.485112 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1707 14:27:49.491864 ME: HFSTS1 : 0x90000245
1708 14:27:49.495325 ME: HFSTS2 : 0x3B850126
1709 14:27:49.498492 ME: HFSTS3 : 0x00000020
1710 14:27:49.501991 ME: HFSTS4 : 0x00004800
1711 14:27:49.504956 ME: HFSTS5 : 0x00000000
1712 14:27:49.511882 ME: HFSTS6 : 0x40400006
1713 14:27:49.515204 ME: Manufacturing Mode : NO
1714 14:27:49.518067 ME: FW Partition Table : OK
1715 14:27:49.521681 ME: Bringup Loader Failure : NO
1716 14:27:49.524738 ME: Firmware Init Complete : YES
1717 14:27:49.528224 ME: Boot Options Present : NO
1718 14:27:49.531351 ME: Update In Progress : NO
1719 14:27:49.535052 ME: D0i3 Support : YES
1720 14:27:49.538181 ME: Low Power State Enabled : NO
1721 14:27:49.541735 ME: CPU Replaced : NO
1722 14:27:49.544814 ME: CPU Replacement Valid : YES
1723 14:27:49.548028 ME: Current Working State : 5
1724 14:27:49.551697 ME: Current Operation State : 1
1725 14:27:49.554783 ME: Current Operation Mode : 0
1726 14:27:49.557875 ME: Error Code : 0
1727 14:27:49.561383 ME: CPU Debug Disabled : YES
1728 14:27:49.564664 ME: TXT Support : NO
1729 14:27:49.567635 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1730 14:27:49.574269 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1731 14:27:49.577801 CBFS @ c08000 size 3f8000
1732 14:27:49.584458 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1733 14:27:49.587807 CBFS: Locating 'fallback/dsdt.aml'
1734 14:27:49.590824 CBFS: Found @ offset 10bb80 size 3fa5
1735 14:27:49.594517 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1736 14:27:49.597307 CBFS @ c08000 size 3f8000
1737 14:27:49.604099 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1738 14:27:49.607703 CBFS: Locating 'fallback/slic'
1739 14:27:49.610904 CBFS: 'fallback/slic' not found.
1740 14:27:49.617224 ACPI: Writing ACPI tables at 99b3e000.
1741 14:27:49.617330 ACPI: * FACS
1742 14:27:49.620683 ACPI: * DSDT
1743 14:27:49.624137 Ramoops buffer: 0x100000@0x99a3d000.
1744 14:27:49.627236 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1745 14:27:49.633775 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1746 14:27:49.637430 Google Chrome EC: version:
1747 14:27:49.640436 ro: helios_v2.0.2659-56403530b
1748 14:27:49.643494 rw: helios_v2.0.2849-c41de27e7d
1749 14:27:49.643585 running image: 1
1750 14:27:49.647795 ACPI: * FADT
1751 14:27:49.647885 SCI is IRQ9
1752 14:27:49.654649 ACPI: added table 1/32, length now 40
1753 14:27:49.654751 ACPI: * SSDT
1754 14:27:49.657865 Found 1 CPU(s) with 8 core(s) each.
1755 14:27:49.661494 Error: Could not locate 'wifi_sar' in VPD.
1756 14:27:49.668011 Checking CBFS for default SAR values
1757 14:27:49.671183 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1758 14:27:49.674654 CBFS @ c08000 size 3f8000
1759 14:27:49.681494 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1760 14:27:49.684736 CBFS: Locating 'wifi_sar_defaults.hex'
1761 14:27:49.687750 CBFS: Found @ offset 5fac0 size 77
1762 14:27:49.691259 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1763 14:27:49.694848 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1764 14:27:49.701489 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1765 14:27:49.707771 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1766 14:27:49.711169 failed to find key in VPD: dsm_calib_r0_0
1767 14:27:49.720998 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1768 14:27:49.724422 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1769 14:27:49.727832 failed to find key in VPD: dsm_calib_r0_1
1770 14:27:49.737690 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1771 14:27:49.744177 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1772 14:27:49.747304 failed to find key in VPD: dsm_calib_r0_2
1773 14:27:49.757680 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1774 14:27:49.760745 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1775 14:27:49.767015 failed to find key in VPD: dsm_calib_r0_3
1776 14:27:49.773814 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1777 14:27:49.780293 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1778 14:27:49.783798 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1779 14:27:49.787318 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1780 14:27:49.790960 EC returned error result code 1
1781 14:27:49.794603 EC returned error result code 1
1782 14:27:49.798308 EC returned error result code 1
1783 14:27:49.805185 PS2K: Bad resp from EC. Vivaldi disabled!
1784 14:27:49.808429 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1785 14:27:49.815202 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1786 14:27:49.821922 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1787 14:27:49.824837 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1788 14:27:49.831578 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1789 14:27:49.838102 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1790 14:27:49.844867 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1791 14:27:49.848257 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1792 14:27:49.855148 ACPI: added table 2/32, length now 44
1793 14:27:49.855354 ACPI: * MCFG
1794 14:27:49.858076 ACPI: added table 3/32, length now 48
1795 14:27:49.861675 ACPI: * TPM2
1796 14:27:49.864857 TPM2 log created at 99a2d000
1797 14:27:49.867785 ACPI: added table 4/32, length now 52
1798 14:27:49.867935 ACPI: * MADT
1799 14:27:49.871572 SCI is IRQ9
1800 14:27:49.874541 ACPI: added table 5/32, length now 56
1801 14:27:49.874697 current = 99b43ac0
1802 14:27:49.878279 ACPI: * DMAR
1803 14:27:49.881009 ACPI: added table 6/32, length now 60
1804 14:27:49.884551 ACPI: * IGD OpRegion
1805 14:27:49.884711 GMA: Found VBT in CBFS
1806 14:27:49.888052 GMA: Found valid VBT in CBFS
1807 14:27:49.890896 ACPI: added table 7/32, length now 64
1808 14:27:49.894568 ACPI: * HPET
1809 14:27:49.897763 ACPI: added table 8/32, length now 68
1810 14:27:49.897930 ACPI: done.
1811 14:27:49.901188 ACPI tables: 31744 bytes.
1812 14:27:49.904933 smbios_write_tables: 99a2c000
1813 14:27:49.908071 EC returned error result code 3
1814 14:27:49.911496 Couldn't obtain OEM name from CBI
1815 14:27:49.914803 Create SMBIOS type 17
1816 14:27:49.918165 PCI: 00:00.0 (Intel Cannonlake)
1817 14:27:49.921567 PCI: 00:14.3 (Intel WiFi)
1818 14:27:49.924415 SMBIOS tables: 939 bytes.
1819 14:27:49.927882 Writing table forward entry at 0x00000500
1820 14:27:49.934588 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1821 14:27:49.938343 Writing coreboot table at 0x99b62000
1822 14:27:49.944260 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1823 14:27:49.947710 1. 0000000000001000-000000000009ffff: RAM
1824 14:27:49.951121 2. 00000000000a0000-00000000000fffff: RESERVED
1825 14:27:49.958060 3. 0000000000100000-0000000099a2bfff: RAM
1826 14:27:49.961082 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1827 14:27:49.967926 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1828 14:27:49.974086 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1829 14:27:49.978058 7. 000000009a000000-000000009f7fffff: RESERVED
1830 14:27:49.983987 8. 00000000e0000000-00000000efffffff: RESERVED
1831 14:27:49.987395 9. 00000000fc000000-00000000fc000fff: RESERVED
1832 14:27:49.991124 10. 00000000fe000000-00000000fe00ffff: RESERVED
1833 14:27:49.997500 11. 00000000fed10000-00000000fed17fff: RESERVED
1834 14:27:50.000594 12. 00000000fed80000-00000000fed83fff: RESERVED
1835 14:27:50.007532 13. 00000000fed90000-00000000fed91fff: RESERVED
1836 14:27:50.010656 14. 00000000feda0000-00000000feda1fff: RESERVED
1837 14:27:50.017326 15. 0000000100000000-000000045e7fffff: RAM
1838 14:27:50.020786 Graphics framebuffer located at 0xc0000000
1839 14:27:50.024091 Passing 5 GPIOs to payload:
1840 14:27:50.027697 NAME | PORT | POLARITY | VALUE
1841 14:27:50.033681 write protect | undefined | high | low
1842 14:27:50.037300 lid | undefined | high | high
1843 14:27:50.044346 power | undefined | high | low
1844 14:27:50.050393 oprom | undefined | high | low
1845 14:27:50.053705 EC in RW | 0x000000cb | high | low
1846 14:27:50.056882 Board ID: 4
1847 14:27:50.060360 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1848 14:27:50.063668 CBFS @ c08000 size 3f8000
1849 14:27:50.070300 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1850 14:27:50.074002 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1851 14:27:50.077039 coreboot table: 1492 bytes.
1852 14:27:50.080027 IMD ROOT 0. 99fff000 00001000
1853 14:27:50.083662 IMD SMALL 1. 99ffe000 00001000
1854 14:27:50.086718 FSP MEMORY 2. 99c4e000 003b0000
1855 14:27:50.090330 CONSOLE 3. 99c2e000 00020000
1856 14:27:50.093303 FMAP 4. 99c2d000 0000054e
1857 14:27:50.096737 TIME STAMP 5. 99c2c000 00000910
1858 14:27:50.100536 VBOOT WORK 6. 99c18000 00014000
1859 14:27:50.103240 MRC DATA 7. 99c16000 00001958
1860 14:27:50.106949 ROMSTG STCK 8. 99c15000 00001000
1861 14:27:50.110132 AFTER CAR 9. 99c0b000 0000a000
1862 14:27:50.113201 RAMSTAGE 10. 99baf000 0005c000
1863 14:27:50.116817 REFCODE 11. 99b7a000 00035000
1864 14:27:50.119899 SMM BACKUP 12. 99b6a000 00010000
1865 14:27:50.123425 COREBOOT 13. 99b62000 00008000
1866 14:27:50.126889 ACPI 14. 99b3e000 00024000
1867 14:27:50.129753 ACPI GNVS 15. 99b3d000 00001000
1868 14:27:50.133452 RAMOOPS 16. 99a3d000 00100000
1869 14:27:50.136689 TPM2 TCGLOG17. 99a2d000 00010000
1870 14:27:50.140086 SMBIOS 18. 99a2c000 00000800
1871 14:27:50.143642 IMD small region:
1872 14:27:50.146537 IMD ROOT 0. 99ffec00 00000400
1873 14:27:50.150169 FSP RUNTIME 1. 99ffebe0 00000004
1874 14:27:50.152960 EC HOSTEVENT 2. 99ffebc0 00000008
1875 14:27:50.156531 POWER STATE 3. 99ffeb80 00000040
1876 14:27:50.159899 ROMSTAGE 4. 99ffeb60 00000004
1877 14:27:50.163238 MEM INFO 5. 99ffe9a0 000001b9
1878 14:27:50.166688 VPD 6. 99ffe920 0000006c
1879 14:27:50.169931 MTRR: Physical address space:
1880 14:27:50.176132 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1881 14:27:50.182832 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1882 14:27:50.189673 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1883 14:27:50.196278 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1884 14:27:50.202766 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1885 14:27:50.209282 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1886 14:27:50.216092 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1887 14:27:50.219699 MTRR: Fixed MSR 0x250 0x0606060606060606
1888 14:27:50.222771 MTRR: Fixed MSR 0x258 0x0606060606060606
1889 14:27:50.226307 MTRR: Fixed MSR 0x259 0x0000000000000000
1890 14:27:50.229194 MTRR: Fixed MSR 0x268 0x0606060606060606
1891 14:27:50.235709 MTRR: Fixed MSR 0x269 0x0606060606060606
1892 14:27:50.239203 MTRR: Fixed MSR 0x26a 0x0606060606060606
1893 14:27:50.242581 MTRR: Fixed MSR 0x26b 0x0606060606060606
1894 14:27:50.246006 MTRR: Fixed MSR 0x26c 0x0606060606060606
1895 14:27:50.252540 MTRR: Fixed MSR 0x26d 0x0606060606060606
1896 14:27:50.255855 MTRR: Fixed MSR 0x26e 0x0606060606060606
1897 14:27:50.258851 MTRR: Fixed MSR 0x26f 0x0606060606060606
1898 14:27:50.262638 call enable_fixed_mtrr()
1899 14:27:50.265925 CPU physical address size: 39 bits
1900 14:27:50.272276 MTRR: default type WB/UC MTRR counts: 6/8.
1901 14:27:50.275654 MTRR: WB selected as default type.
1902 14:27:50.279209 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1903 14:27:50.285322 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1904 14:27:50.291954 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1905 14:27:50.298805 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1906 14:27:50.305437 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1907 14:27:50.312026 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1908 14:27:50.315498 MTRR: Fixed MSR 0x250 0x0606060606060606
1909 14:27:50.322197 MTRR: Fixed MSR 0x258 0x0606060606060606
1910 14:27:50.325129 MTRR: Fixed MSR 0x259 0x0000000000000000
1911 14:27:50.328693 MTRR: Fixed MSR 0x268 0x0606060606060606
1912 14:27:50.331737 MTRR: Fixed MSR 0x269 0x0606060606060606
1913 14:27:50.338511 MTRR: Fixed MSR 0x26a 0x0606060606060606
1914 14:27:50.341498 MTRR: Fixed MSR 0x26b 0x0606060606060606
1915 14:27:50.345048 MTRR: Fixed MSR 0x26c 0x0606060606060606
1916 14:27:50.348515 MTRR: Fixed MSR 0x26d 0x0606060606060606
1917 14:27:50.355156 MTRR: Fixed MSR 0x26e 0x0606060606060606
1918 14:27:50.358399 MTRR: Fixed MSR 0x26f 0x0606060606060606
1919 14:27:50.358566
1920 14:27:50.358703 MTRR check
1921 14:27:50.361701 call enable_fixed_mtrr()
1922 14:27:50.365289 Fixed MTRRs : Enabled
1923 14:27:50.368501 Variable MTRRs: Enabled
1924 14:27:50.368604
1925 14:27:50.371748 CPU physical address size: 39 bits
1926 14:27:50.375082 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1927 14:27:50.381400 MTRR: Fixed MSR 0x250 0x0606060606060606
1928 14:27:50.384579 MTRR: Fixed MSR 0x258 0x0606060606060606
1929 14:27:50.388352 MTRR: Fixed MSR 0x259 0x0000000000000000
1930 14:27:50.391237 MTRR: Fixed MSR 0x268 0x0606060606060606
1931 14:27:50.398041 MTRR: Fixed MSR 0x269 0x0606060606060606
1932 14:27:50.401630 MTRR: Fixed MSR 0x26a 0x0606060606060606
1933 14:27:50.404694 MTRR: Fixed MSR 0x26b 0x0606060606060606
1934 14:27:50.407802 MTRR: Fixed MSR 0x26c 0x0606060606060606
1935 14:27:50.411226 MTRR: Fixed MSR 0x26d 0x0606060606060606
1936 14:27:50.418142 MTRR: Fixed MSR 0x26e 0x0606060606060606
1937 14:27:50.421331 MTRR: Fixed MSR 0x26f 0x0606060606060606
1938 14:27:50.424278 MTRR: Fixed MSR 0x250 0x0606060606060606
1939 14:27:50.427844 call enable_fixed_mtrr()
1940 14:27:50.430955 MTRR: Fixed MSR 0x258 0x0606060606060606
1941 14:27:50.437479 MTRR: Fixed MSR 0x259 0x0000000000000000
1942 14:27:50.441266 MTRR: Fixed MSR 0x268 0x0606060606060606
1943 14:27:50.444408 MTRR: Fixed MSR 0x269 0x0606060606060606
1944 14:27:50.447944 MTRR: Fixed MSR 0x26a 0x0606060606060606
1945 14:27:50.451012 MTRR: Fixed MSR 0x26b 0x0606060606060606
1946 14:27:50.457506 MTRR: Fixed MSR 0x26c 0x0606060606060606
1947 14:27:50.460816 MTRR: Fixed MSR 0x26d 0x0606060606060606
1948 14:27:50.464051 MTRR: Fixed MSR 0x26e 0x0606060606060606
1949 14:27:50.467226 MTRR: Fixed MSR 0x26f 0x0606060606060606
1950 14:27:50.474209 CPU physical address size: 39 bits
1951 14:27:50.474359 call enable_fixed_mtrr()
1952 14:27:50.480476 MTRR: Fixed MSR 0x250 0x0606060606060606
1953 14:27:50.484224 MTRR: Fixed MSR 0x258 0x0606060606060606
1954 14:27:50.487123 MTRR: Fixed MSR 0x259 0x0000000000000000
1955 14:27:50.490718 MTRR: Fixed MSR 0x268 0x0606060606060606
1956 14:27:50.497331 MTRR: Fixed MSR 0x269 0x0606060606060606
1957 14:27:50.500408 MTRR: Fixed MSR 0x26a 0x0606060606060606
1958 14:27:50.504078 MTRR: Fixed MSR 0x26b 0x0606060606060606
1959 14:27:50.507189 MTRR: Fixed MSR 0x26c 0x0606060606060606
1960 14:27:50.513894 MTRR: Fixed MSR 0x26d 0x0606060606060606
1961 14:27:50.517006 MTRR: Fixed MSR 0x26e 0x0606060606060606
1962 14:27:50.520529 MTRR: Fixed MSR 0x26f 0x0606060606060606
1963 14:27:50.523682 MTRR: Fixed MSR 0x250 0x0606060606060606
1964 14:27:50.527400 call enable_fixed_mtrr()
1965 14:27:50.530263 MTRR: Fixed MSR 0x258 0x0606060606060606
1966 14:27:50.536839 MTRR: Fixed MSR 0x259 0x0000000000000000
1967 14:27:50.540455 MTRR: Fixed MSR 0x268 0x0606060606060606
1968 14:27:50.543449 MTRR: Fixed MSR 0x269 0x0606060606060606
1969 14:27:50.546552 MTRR: Fixed MSR 0x26a 0x0606060606060606
1970 14:27:50.553704 MTRR: Fixed MSR 0x26b 0x0606060606060606
1971 14:27:50.556630 MTRR: Fixed MSR 0x26c 0x0606060606060606
1972 14:27:50.560041 MTRR: Fixed MSR 0x26d 0x0606060606060606
1973 14:27:50.563383 MTRR: Fixed MSR 0x26e 0x0606060606060606
1974 14:27:50.566378 MTRR: Fixed MSR 0x26f 0x0606060606060606
1975 14:27:50.573212 CPU physical address size: 39 bits
1976 14:27:50.576764 call enable_fixed_mtrr()
1977 14:27:50.579816 CPU physical address size: 39 bits
1978 14:27:50.583132 CPU physical address size: 39 bits
1979 14:27:50.586561 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1980 14:27:50.589851 MTRR: Fixed MSR 0x250 0x0606060606060606
1981 14:27:50.596246 MTRR: Fixed MSR 0x250 0x0606060606060606
1982 14:27:50.599942 MTRR: Fixed MSR 0x258 0x0606060606060606
1983 14:27:50.602872 MTRR: Fixed MSR 0x259 0x0000000000000000
1984 14:27:50.606566 MTRR: Fixed MSR 0x268 0x0606060606060606
1985 14:27:50.613396 MTRR: Fixed MSR 0x269 0x0606060606060606
1986 14:27:50.616162 MTRR: Fixed MSR 0x26a 0x0606060606060606
1987 14:27:50.619852 MTRR: Fixed MSR 0x26b 0x0606060606060606
1988 14:27:50.622779 MTRR: Fixed MSR 0x26c 0x0606060606060606
1989 14:27:50.629728 MTRR: Fixed MSR 0x26d 0x0606060606060606
1990 14:27:50.632709 MTRR: Fixed MSR 0x26e 0x0606060606060606
1991 14:27:50.636159 MTRR: Fixed MSR 0x26f 0x0606060606060606
1992 14:27:50.639587 MTRR: Fixed MSR 0x258 0x0606060606060606
1993 14:27:50.642632 call enable_fixed_mtrr()
1994 14:27:50.646177 MTRR: Fixed MSR 0x259 0x0000000000000000
1995 14:27:50.652271 MTRR: Fixed MSR 0x268 0x0606060606060606
1996 14:27:50.656086 MTRR: Fixed MSR 0x269 0x0606060606060606
1997 14:27:50.658932 MTRR: Fixed MSR 0x26a 0x0606060606060606
1998 14:27:50.662820 MTRR: Fixed MSR 0x26b 0x0606060606060606
1999 14:27:50.669193 MTRR: Fixed MSR 0x26c 0x0606060606060606
2000 14:27:50.672615 MTRR: Fixed MSR 0x26d 0x0606060606060606
2001 14:27:50.675838 MTRR: Fixed MSR 0x26e 0x0606060606060606
2002 14:27:50.678713 MTRR: Fixed MSR 0x26f 0x0606060606060606
2003 14:27:50.682290 CPU physical address size: 39 bits
2004 14:27:50.685722 call enable_fixed_mtrr()
2005 14:27:50.689137 CBFS @ c08000 size 3f8000
2006 14:27:50.695280 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
2007 14:27:50.698693 CBFS: Locating 'fallback/payload'
2008 14:27:50.702278 CPU physical address size: 39 bits
2009 14:27:50.705323 CBFS: Found @ offset 1c96c0 size 3f798
2010 14:27:50.709075 Checking segment from ROM address 0xffdd16f8
2011 14:27:50.715697 Checking segment from ROM address 0xffdd1714
2012 14:27:50.718755 Loading segment from ROM address 0xffdd16f8
2013 14:27:50.722538 code (compression=0)
2014 14:27:50.728758 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2015 14:27:50.738794 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2016 14:27:50.741715 it's not compressed!
2017 14:27:50.832610 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2018 14:27:50.839102 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2019 14:27:50.842627 Loading segment from ROM address 0xffdd1714
2020 14:27:50.845657 Entry Point 0x30000000
2021 14:27:50.849233 Loaded segments
2022 14:27:50.855041 Finalizing chipset.
2023 14:27:50.858729 Finalizing SMM.
2024 14:27:50.861796 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2025 14:27:50.864889 mp_park_aps done after 0 msecs.
2026 14:27:50.871704 Jumping to boot code at 30000000(99b62000)
2027 14:27:50.878241 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2028 14:27:50.878378
2029 14:27:50.878450
2030 14:27:50.878510
2031 14:27:50.881550 Starting depthcharge on Helios...
2032 14:27:50.881642
2033 14:27:50.882047 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2034 14:27:50.882176 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2035 14:27:50.882288 Setting prompt string to ['hatch:']
2036 14:27:50.882410 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2037 14:27:50.891399 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2038 14:27:50.891563
2039 14:27:50.898517 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2040 14:27:50.898655
2041 14:27:50.904743 board_setup: Info: eMMC controller not present; skipping
2042 14:27:50.904867
2043 14:27:50.907674 New NVMe Controller 0x30053ac0 @ 00:1d:00
2044 14:27:50.907767
2045 14:27:50.914776 board_setup: Info: SDHCI controller not present; skipping
2046 14:27:50.914905
2047 14:27:50.921264 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2048 14:27:50.921385
2049 14:27:50.921456 Wipe memory regions:
2050 14:27:50.921530
2051 14:27:50.924313 [0x00000000001000, 0x000000000a0000)
2052 14:27:50.924400
2053 14:27:50.931046 [0x00000000100000, 0x00000030000000)
2054 14:27:50.993591
2055 14:27:50.996846 [0x00000030657430, 0x00000099a2c000)
2056 14:27:51.134087
2057 14:27:51.137713 [0x00000100000000, 0x0000045e800000)
2058 14:27:52.963697
2059 14:27:52.963876 R8152: Initializing
2060 14:27:52.963952
2061 14:27:52.964195 Version 9 (ocp_data = 6010)
2062 14:27:52.964267
2063 14:27:52.964345 R8152: Done initializing
2064 14:27:52.964414
2065 14:27:52.964472 Adding net device
2066 14:27:53.013663
2067 14:27:53.013817 R8152: Initializing
2068 14:27:53.013892
2069 14:27:53.017223 Version 6 (ocp_data = 5c30)
2070 14:27:53.017342
2071 14:27:53.020275 R8152: Done initializing
2072 14:27:53.020365
2073 14:27:53.023851 net_add_device: Attemp to include the same device
2074 14:27:53.027037
2075 14:27:53.034024 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2076 14:27:53.034189
2077 14:27:53.034288
2078 14:27:53.034374
2079 14:27:53.034684 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2081 14:27:53.135112 hatch: tftpboot 192.168.201.1 10525278/tftp-deploy-7mwljxy5/kernel/bzImage 10525278/tftp-deploy-7mwljxy5/kernel/cmdline 10525278/tftp-deploy-7mwljxy5/ramdisk/ramdisk.cpio.gz
2082 14:27:53.135288 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2083 14:27:53.135392 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2084 14:27:53.140518 tftpboot 192.168.201.1 10525278/tftp-deploy-7mwljxy5/kernel/bzImploy-7mwljxy5/kernel/cmdline 10525278/tftp-deploy-7mwljxy5/ramdisk/ramdisk.cpio.gz
2085 14:27:53.140613
2086 14:27:53.140677 Waiting for link
2087 14:27:53.340912
2088 14:27:53.341090 done.
2089 14:27:53.341186
2090 14:27:53.341274 MAC: 00:24:32:50:19:be
2091 14:27:53.341361
2092 14:27:53.344009 Sending DHCP discover... done.
2093 14:27:53.344084
2094 14:27:53.347640 Waiting for reply... done.
2095 14:27:53.347711
2096 14:27:53.350745 Sending DHCP request... done.
2097 14:27:53.350827
2098 14:27:53.470420 Waiting for reply... done.
2099 14:27:53.470568
2100 14:27:53.470642 My ip is 192.168.201.15
2101 14:27:53.470705
2102 14:27:53.473836 The DHCP server ip is 192.168.201.1
2103 14:27:53.476903
2104 14:27:53.480340 TFTP server IP predefined by user: 192.168.201.1
2105 14:27:53.480442
2106 14:27:53.487020 Bootfile predefined by user: 10525278/tftp-deploy-7mwljxy5/kernel/bzImage
2107 14:27:53.487108
2108 14:27:53.490402 Sending tftp read request... done.
2109 14:27:53.490490
2110 14:27:53.493490 Waiting for the transfer...
2111 14:27:53.493659
2112 14:27:54.031173 00000000 ################################################################
2113 14:27:54.031329
2114 14:27:54.564287 00080000 ################################################################
2115 14:27:54.564470
2116 14:27:55.108951 00100000 ################################################################
2117 14:27:55.109101
2118 14:27:55.684468 00180000 ################################################################
2119 14:27:55.684918
2120 14:27:56.309673 00200000 ################################################################
2121 14:27:56.309951
2122 14:27:56.980903 00280000 ################################################################
2123 14:27:56.981455
2124 14:27:57.674018 00300000 ################################################################
2125 14:27:57.674493
2126 14:27:58.350323 00380000 ################################################################
2127 14:27:58.350832
2128 14:27:59.015539 00400000 ################################################################
2129 14:27:59.016183
2130 14:27:59.648425 00480000 ################################################################
2131 14:27:59.648581
2132 14:28:00.213841 00500000 ################################################################
2133 14:28:00.213989
2134 14:28:00.756643 00580000 ################################################################
2135 14:28:00.756782
2136 14:28:01.320292 00600000 ################################################################
2137 14:28:01.320439
2138 14:28:01.847876 00680000 ################################################################
2139 14:28:01.848026
2140 14:28:02.364169 00700000 ################################################################
2141 14:28:02.364316
2142 14:28:02.881973 00780000 ################################################################
2143 14:28:02.882128
2144 14:28:03.403410 00800000 ################################################################
2145 14:28:03.403548
2146 14:28:03.920941 00880000 ################################################################
2147 14:28:03.921080
2148 14:28:04.438789 00900000 ################################################################
2149 14:28:04.438923
2150 14:28:04.973538 00980000 ################################################################
2151 14:28:04.973686
2152 14:28:05.361906 00a00000 ############################################## done.
2153 14:28:05.362043
2154 14:28:05.365679 The bootfile was 10858496 bytes long.
2155 14:28:05.365787
2156 14:28:05.369064 Sending tftp read request... done.
2157 14:28:05.369147
2158 14:28:05.371864 Waiting for the transfer...
2159 14:28:05.371947
2160 14:28:05.893371 00000000 ################################################################
2161 14:28:05.893513
2162 14:28:06.425236 00080000 ################################################################
2163 14:28:06.425368
2164 14:28:06.935009 00100000 ################################################################
2165 14:28:06.935148
2166 14:28:07.460737 00180000 ################################################################
2167 14:28:07.460875
2168 14:28:07.971597 00200000 ################################################################
2169 14:28:07.971736
2170 14:28:08.480364 00280000 ################################################################
2171 14:28:08.480502
2172 14:28:08.998587 00300000 ################################################################
2173 14:28:08.998725
2174 14:28:09.511622 00380000 ################################################################
2175 14:28:09.511757
2176 14:28:10.021692 00400000 ################################################################
2177 14:28:10.021828
2178 14:28:10.534454 00480000 ################################################################
2179 14:28:10.534594
2180 14:28:11.049718 00500000 ################################################################
2181 14:28:11.049876
2182 14:28:11.579415 00580000 ################################################ done.
2183 14:28:11.579557
2184 14:28:11.579633 Sending tftp read request... done.
2185 14:28:11.579694
2186 14:28:11.597979 Waiting for the transfer...
2187 14:28:11.598069
2188 14:28:11.598136 00000000 # done.
2189 14:28:11.598199
2190 14:28:11.608186 Command line loaded dynamically from TFTP file: 10525278/tftp-deploy-7mwljxy5/kernel/cmdline
2191 14:28:11.608302
2192 14:28:11.630893 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10525278/extract-nfsrootfs-7ddrh0er,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2193 14:28:11.631022
2194 14:28:11.637886 ec_init(0): CrosEC protocol v3 supported (256, 256)
2195 14:28:11.641739
2196 14:28:11.644853 Shutting down all USB controllers.
2197 14:28:11.644939
2198 14:28:11.645039 Removing current net device
2199 14:28:11.648680
2200 14:28:11.648767 Finalizing coreboot
2201 14:28:11.648832
2202 14:28:11.655087 Exiting depthcharge with code 4 at timestamp: 28138115
2203 14:28:11.655169
2204 14:28:11.655233
2205 14:28:11.655292 Starting kernel ...
2206 14:28:11.655349
2207 14:28:11.655404
2208 14:28:11.655767 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2209 14:28:11.655862 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2210 14:28:11.655939 Setting prompt string to ['Linux version [0-9]']
2211 14:28:11.656006 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2212 14:28:11.656072 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2214 14:32:32.656195 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2216 14:32:32.656404 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2218 14:32:32.656560 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2221 14:32:32.656806 end: 2 depthcharge-action (duration 00:05:00) [common]
2223 14:32:32.657025 Cleaning after the job
2224 14:32:32.657118 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10525278/tftp-deploy-7mwljxy5/ramdisk
2225 14:32:32.657987 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10525278/tftp-deploy-7mwljxy5/kernel
2226 14:32:32.659228 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10525278/tftp-deploy-7mwljxy5/nfsrootfs
2227 14:32:32.726529 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10525278/tftp-deploy-7mwljxy5/modules
2228 14:32:32.727225 start: 4.1 power-off (timeout 00:00:30) [common]
2229 14:32:32.727400 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2230 14:32:32.802624 >> Command sent successfully.
2231 14:32:32.806142 Returned 0 in 0 seconds
2232 14:32:32.906617 end: 4.1 power-off (duration 00:00:00) [common]
2234 14:32:32.906949 start: 4.2 read-feedback (timeout 00:10:00) [common]
2235 14:32:32.907216 Listened to connection for namespace 'common' for up to 1s
2237 14:32:32.907585 Listened to connection for namespace 'common' for up to 1s
2238 14:32:33.908363 Finalising connection for namespace 'common'
2239 14:32:33.908980 Disconnecting from shell: Finalise
2240 14:32:33.909381
2241 14:32:34.010545 end: 4.2 read-feedback (duration 00:00:01) [common]
2242 14:32:34.011172 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10525278
2243 14:32:34.503572 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10525278
2244 14:32:34.503752 JobError: Your job cannot terminate cleanly.