Boot log: asus-C436FA-Flip-hatch
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
1 14:28:04.154602 lava-dispatcher, installed at version: 2023.03
2 14:28:04.154824 start: 0 validate
3 14:28:04.154968 Start time: 2023-05-30 14:28:04.154960+00:00 (UTC)
4 14:28:04.155108 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:28:04.155250 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230527.0%2Famd64%2Finitrd.cpio.gz exists
6 14:28:04.444795 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:28:04.445004 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.283-cip98-135-g4ed206c5dc11%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:28:04.733364 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:28:04.733562 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230527.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 14:28:05.015113 Using caching service: 'http://localhost/cache/?uri=%s'
11 14:28:05.015305 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.283-cip98-135-g4ed206c5dc11%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 14:28:05.302364 validate duration: 1.15
14 14:28:05.302685 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 14:28:05.302823 start: 1.1 download-retry (timeout 00:10:00) [common]
16 14:28:05.302920 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 14:28:05.303082 Not decompressing ramdisk as can be used compressed.
18 14:28:05.303178 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230527.0/amd64/initrd.cpio.gz
19 14:28:05.303249 saving as /var/lib/lava/dispatcher/tmp/10525244/tftp-deploy-cd4o9ppk/ramdisk/initrd.cpio.gz
20 14:28:05.303345 total size: 5671546 (5MB)
21 14:28:05.304561 progress 0% (0MB)
22 14:28:05.306482 progress 5% (0MB)
23 14:28:05.308363 progress 10% (0MB)
24 14:28:05.310072 progress 15% (0MB)
25 14:28:05.311942 progress 20% (1MB)
26 14:28:05.313828 progress 25% (1MB)
27 14:28:05.315491 progress 30% (1MB)
28 14:28:05.317198 progress 35% (1MB)
29 14:28:05.319023 progress 40% (2MB)
30 14:28:05.320705 progress 45% (2MB)
31 14:28:05.322567 progress 50% (2MB)
32 14:28:05.324368 progress 55% (3MB)
33 14:28:05.326030 progress 60% (3MB)
34 14:28:05.327890 progress 65% (3MB)
35 14:28:05.329738 progress 70% (3MB)
36 14:28:05.331384 progress 75% (4MB)
37 14:28:05.333104 progress 80% (4MB)
38 14:28:05.334949 progress 85% (4MB)
39 14:28:05.336676 progress 90% (4MB)
40 14:28:05.338522 progress 95% (5MB)
41 14:28:05.340471 progress 100% (5MB)
42 14:28:05.340590 5MB downloaded in 0.04s (145.23MB/s)
43 14:28:05.340777 end: 1.1.1 http-download (duration 00:00:00) [common]
45 14:28:05.341059 end: 1.1 download-retry (duration 00:00:00) [common]
46 14:28:05.341156 start: 1.2 download-retry (timeout 00:10:00) [common]
47 14:28:05.341262 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 14:28:05.341403 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.283-cip98-135-g4ed206c5dc11/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 14:28:05.341482 saving as /var/lib/lava/dispatcher/tmp/10525244/tftp-deploy-cd4o9ppk/kernel/bzImage
50 14:28:05.341551 total size: 10858496 (10MB)
51 14:28:05.341634 No compression specified
52 14:28:05.342936 progress 0% (0MB)
53 14:28:05.346368 progress 5% (0MB)
54 14:28:05.349948 progress 10% (1MB)
55 14:28:05.353403 progress 15% (1MB)
56 14:28:05.356848 progress 20% (2MB)
57 14:28:05.360124 progress 25% (2MB)
58 14:28:05.363652 progress 30% (3MB)
59 14:28:05.366738 progress 35% (3MB)
60 14:28:05.369914 progress 40% (4MB)
61 14:28:05.373085 progress 45% (4MB)
62 14:28:05.376085 progress 50% (5MB)
63 14:28:05.379258 progress 55% (5MB)
64 14:28:05.382250 progress 60% (6MB)
65 14:28:05.385407 progress 65% (6MB)
66 14:28:05.388356 progress 70% (7MB)
67 14:28:05.391488 progress 75% (7MB)
68 14:28:05.394613 progress 80% (8MB)
69 14:28:05.397638 progress 85% (8MB)
70 14:28:05.400762 progress 90% (9MB)
71 14:28:05.403717 progress 95% (9MB)
72 14:28:05.406866 progress 100% (10MB)
73 14:28:05.407034 10MB downloaded in 0.07s (158.15MB/s)
74 14:28:05.407192 end: 1.2.1 http-download (duration 00:00:00) [common]
76 14:28:05.407446 end: 1.2 download-retry (duration 00:00:00) [common]
77 14:28:05.407543 start: 1.3 download-retry (timeout 00:10:00) [common]
78 14:28:05.407644 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 14:28:05.407793 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230527.0/amd64/full.rootfs.tar.xz
80 14:28:05.407870 saving as /var/lib/lava/dispatcher/tmp/10525244/tftp-deploy-cd4o9ppk/nfsrootfs/full.rootfs.tar
81 14:28:05.407939 total size: 125914312 (120MB)
82 14:28:05.408007 Using unxz to decompress xz
83 14:28:05.411902 progress 0% (0MB)
84 14:28:05.933610 progress 5% (6MB)
85 14:28:06.462458 progress 10% (12MB)
86 14:28:06.995835 progress 15% (18MB)
87 14:28:07.543133 progress 20% (24MB)
88 14:28:07.914716 progress 25% (30MB)
89 14:28:08.284014 progress 30% (36MB)
90 14:28:08.576258 progress 35% (42MB)
91 14:28:08.795009 progress 40% (48MB)
92 14:28:09.207438 progress 45% (54MB)
93 14:28:09.636139 progress 50% (60MB)
94 14:28:10.012718 progress 55% (66MB)
95 14:28:10.428427 progress 60% (72MB)
96 14:28:10.797030 progress 65% (78MB)
97 14:28:11.226055 progress 70% (84MB)
98 14:28:11.679310 progress 75% (90MB)
99 14:28:12.136188 progress 80% (96MB)
100 14:28:12.236755 progress 85% (102MB)
101 14:28:12.410534 progress 90% (108MB)
102 14:28:12.775420 progress 95% (114MB)
103 14:28:13.178362 progress 100% (120MB)
104 14:28:13.184611 120MB downloaded in 7.78s (15.44MB/s)
105 14:28:13.184920 end: 1.3.1 http-download (duration 00:00:08) [common]
107 14:28:13.185212 end: 1.3 download-retry (duration 00:00:08) [common]
108 14:28:13.185316 start: 1.4 download-retry (timeout 00:09:52) [common]
109 14:28:13.185420 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 14:28:13.185596 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.283-cip98-135-g4ed206c5dc11/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 14:28:13.185682 saving as /var/lib/lava/dispatcher/tmp/10525244/tftp-deploy-cd4o9ppk/modules/modules.tar
112 14:28:13.185753 total size: 484032 (0MB)
113 14:28:13.185824 Using unxz to decompress xz
114 14:28:13.189543 progress 6% (0MB)
115 14:28:13.189976 progress 13% (0MB)
116 14:28:13.190236 progress 20% (0MB)
117 14:28:13.191754 progress 27% (0MB)
118 14:28:13.193988 progress 33% (0MB)
119 14:28:13.196224 progress 40% (0MB)
120 14:28:13.198291 progress 47% (0MB)
121 14:28:13.200580 progress 54% (0MB)
122 14:28:13.202955 progress 60% (0MB)
123 14:28:13.204984 progress 67% (0MB)
124 14:28:13.207494 progress 74% (0MB)
125 14:28:13.209935 progress 81% (0MB)
126 14:28:13.212146 progress 88% (0MB)
127 14:28:13.214321 progress 94% (0MB)
128 14:28:13.216584 progress 100% (0MB)
129 14:28:13.223463 0MB downloaded in 0.04s (12.24MB/s)
130 14:28:13.223750 end: 1.4.1 http-download (duration 00:00:00) [common]
132 14:28:13.224045 end: 1.4 download-retry (duration 00:00:00) [common]
133 14:28:13.224152 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
134 14:28:13.224258 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
135 14:28:16.192728 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10525244/extract-nfsrootfs-i3hh2jim
136 14:28:16.192924 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
137 14:28:16.193075 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
138 14:28:16.193365 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10525244/lava-overlay-tccvxys0
139 14:28:16.193513 makedir: /var/lib/lava/dispatcher/tmp/10525244/lava-overlay-tccvxys0/lava-10525244/bin
140 14:28:16.193823 makedir: /var/lib/lava/dispatcher/tmp/10525244/lava-overlay-tccvxys0/lava-10525244/tests
141 14:28:16.193935 makedir: /var/lib/lava/dispatcher/tmp/10525244/lava-overlay-tccvxys0/lava-10525244/results
142 14:28:16.194058 Creating /var/lib/lava/dispatcher/tmp/10525244/lava-overlay-tccvxys0/lava-10525244/bin/lava-add-keys
143 14:28:16.194217 Creating /var/lib/lava/dispatcher/tmp/10525244/lava-overlay-tccvxys0/lava-10525244/bin/lava-add-sources
144 14:28:16.194355 Creating /var/lib/lava/dispatcher/tmp/10525244/lava-overlay-tccvxys0/lava-10525244/bin/lava-background-process-start
145 14:28:16.194491 Creating /var/lib/lava/dispatcher/tmp/10525244/lava-overlay-tccvxys0/lava-10525244/bin/lava-background-process-stop
146 14:28:16.194625 Creating /var/lib/lava/dispatcher/tmp/10525244/lava-overlay-tccvxys0/lava-10525244/bin/lava-common-functions
147 14:28:16.194756 Creating /var/lib/lava/dispatcher/tmp/10525244/lava-overlay-tccvxys0/lava-10525244/bin/lava-echo-ipv4
148 14:28:16.194889 Creating /var/lib/lava/dispatcher/tmp/10525244/lava-overlay-tccvxys0/lava-10525244/bin/lava-install-packages
149 14:28:16.195019 Creating /var/lib/lava/dispatcher/tmp/10525244/lava-overlay-tccvxys0/lava-10525244/bin/lava-installed-packages
150 14:28:16.195189 Creating /var/lib/lava/dispatcher/tmp/10525244/lava-overlay-tccvxys0/lava-10525244/bin/lava-os-build
151 14:28:16.195321 Creating /var/lib/lava/dispatcher/tmp/10525244/lava-overlay-tccvxys0/lava-10525244/bin/lava-probe-channel
152 14:28:16.195452 Creating /var/lib/lava/dispatcher/tmp/10525244/lava-overlay-tccvxys0/lava-10525244/bin/lava-probe-ip
153 14:28:16.195582 Creating /var/lib/lava/dispatcher/tmp/10525244/lava-overlay-tccvxys0/lava-10525244/bin/lava-target-ip
154 14:28:16.195713 Creating /var/lib/lava/dispatcher/tmp/10525244/lava-overlay-tccvxys0/lava-10525244/bin/lava-target-mac
155 14:28:16.195841 Creating /var/lib/lava/dispatcher/tmp/10525244/lava-overlay-tccvxys0/lava-10525244/bin/lava-target-storage
156 14:28:16.195973 Creating /var/lib/lava/dispatcher/tmp/10525244/lava-overlay-tccvxys0/lava-10525244/bin/lava-test-case
157 14:28:16.196105 Creating /var/lib/lava/dispatcher/tmp/10525244/lava-overlay-tccvxys0/lava-10525244/bin/lava-test-event
158 14:28:16.196239 Creating /var/lib/lava/dispatcher/tmp/10525244/lava-overlay-tccvxys0/lava-10525244/bin/lava-test-feedback
159 14:28:16.196369 Creating /var/lib/lava/dispatcher/tmp/10525244/lava-overlay-tccvxys0/lava-10525244/bin/lava-test-raise
160 14:28:16.196499 Creating /var/lib/lava/dispatcher/tmp/10525244/lava-overlay-tccvxys0/lava-10525244/bin/lava-test-reference
161 14:28:16.196689 Creating /var/lib/lava/dispatcher/tmp/10525244/lava-overlay-tccvxys0/lava-10525244/bin/lava-test-runner
162 14:28:16.196872 Creating /var/lib/lava/dispatcher/tmp/10525244/lava-overlay-tccvxys0/lava-10525244/bin/lava-test-set
163 14:28:16.197036 Creating /var/lib/lava/dispatcher/tmp/10525244/lava-overlay-tccvxys0/lava-10525244/bin/lava-test-shell
164 14:28:16.197176 Updating /var/lib/lava/dispatcher/tmp/10525244/lava-overlay-tccvxys0/lava-10525244/bin/lava-install-packages (oe)
165 14:28:16.197339 Updating /var/lib/lava/dispatcher/tmp/10525244/lava-overlay-tccvxys0/lava-10525244/bin/lava-installed-packages (oe)
166 14:28:16.197477 Creating /var/lib/lava/dispatcher/tmp/10525244/lava-overlay-tccvxys0/lava-10525244/environment
167 14:28:16.197579 LAVA metadata
168 14:28:16.197699 - LAVA_JOB_ID=10525244
169 14:28:16.197769 - LAVA_DISPATCHER_IP=192.168.201.1
170 14:28:16.197878 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
171 14:28:16.197952 skipped lava-vland-overlay
172 14:28:16.198032 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 14:28:16.198118 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
174 14:28:16.198184 skipped lava-multinode-overlay
175 14:28:16.198262 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 14:28:16.198345 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
177 14:28:16.198423 Loading test definitions
178 14:28:16.198518 start: 1.5.2.3.1 git-repo-action (timeout 00:09:49) [common]
179 14:28:16.198593 Using /lava-10525244 at stage 0
180 14:28:16.198695 Fetching tests from https://github.com/kernelci/test-definitions
181 14:28:16.198777 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/10525244/lava-overlay-tccvxys0/lava-10525244/0/tests/0_ltp-timers'
182 14:28:23.582178 Running '/usr/bin/git checkout kernelci.org
183 14:28:23.744589 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/10525244/lava-overlay-tccvxys0/lava-10525244/0/tests/0_ltp-timers/automated/linux/ltp-open-posix/ltp-open-posix.yaml
184 14:28:23.745462 uuid=10525244_1.5.2.3.1 testdef=None
185 14:28:23.745679 end: 1.5.2.3.1 git-repo-action (duration 00:00:08) [common]
187 14:28:23.745959 start: 1.5.2.3.2 test-overlay (timeout 00:09:42) [common]
188 14:28:23.746719 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
190 14:28:23.746989 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:42) [common]
191 14:28:23.747981 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
193 14:28:23.748251 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:42) [common]
194 14:28:23.749227 runner path: /var/lib/lava/dispatcher/tmp/10525244/lava-overlay-tccvxys0/lava-10525244/0/tests/0_ltp-timers test_uuid 10525244_1.5.2.3.1
195 14:28:23.749368 GRP_TEST='TMR'
196 14:28:23.749473 SKIPFILE='skipfile-lkft.yaml'
197 14:28:23.749574 SKIP_INSTALL='true'
198 14:28:23.749655 TST_CMDFILES=''
199 14:28:23.749812 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
201 14:28:23.750043 Creating lava-test-runner.conf files
202 14:28:23.750116 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10525244/lava-overlay-tccvxys0/lava-10525244/0 for stage 0
203 14:28:23.750218 - 0_ltp-timers
204 14:28:23.750332 end: 1.5.2.3 test-definition (duration 00:00:08) [common]
205 14:28:23.750429 start: 1.5.2.4 compress-overlay (timeout 00:09:42) [common]
206 14:28:32.046078 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
207 14:28:32.046249 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:33) [common]
208 14:28:32.046352 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 14:28:32.046461 end: 1.5.2 lava-overlay (duration 00:00:16) [common]
210 14:28:32.046563 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:33) [common]
211 14:28:32.197160 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 14:28:32.197563 start: 1.5.4 extract-modules (timeout 00:09:33) [common]
213 14:28:32.197736 extracting modules file /var/lib/lava/dispatcher/tmp/10525244/tftp-deploy-cd4o9ppk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10525244/extract-nfsrootfs-i3hh2jim
214 14:28:32.218683 extracting modules file /var/lib/lava/dispatcher/tmp/10525244/tftp-deploy-cd4o9ppk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10525244/extract-overlay-ramdisk-0r022idj/ramdisk
215 14:28:32.239715 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 14:28:32.239861 start: 1.5.5 apply-overlay-tftp (timeout 00:09:33) [common]
217 14:28:32.239962 [common] Applying overlay to NFS
218 14:28:32.240042 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10525244/compress-overlay-6o26urxe/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10525244/extract-nfsrootfs-i3hh2jim
219 14:28:33.226513 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
220 14:28:33.226715 start: 1.5.6 configure-preseed-file (timeout 00:09:32) [common]
221 14:28:33.226827 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 14:28:33.226924 start: 1.5.7 compress-ramdisk (timeout 00:09:32) [common]
223 14:28:33.227018 Building ramdisk /var/lib/lava/dispatcher/tmp/10525244/extract-overlay-ramdisk-0r022idj/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10525244/extract-overlay-ramdisk-0r022idj/ramdisk
224 14:28:33.309091 >> 31369 blocks
225 14:28:34.005916 rename /var/lib/lava/dispatcher/tmp/10525244/extract-overlay-ramdisk-0r022idj/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10525244/tftp-deploy-cd4o9ppk/ramdisk/ramdisk.cpio.gz
226 14:28:34.006379 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 14:28:34.006513 start: 1.5.8 prepare-kernel (timeout 00:09:31) [common]
228 14:28:34.006623 start: 1.5.8.1 prepare-fit (timeout 00:09:31) [common]
229 14:28:34.006726 No mkimage arch provided, not using FIT.
230 14:28:34.006822 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 14:28:34.006913 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 14:28:34.007084 end: 1.5 prepare-tftp-overlay (duration 00:00:21) [common]
233 14:28:34.007185 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:31) [common]
234 14:28:34.007277 No LXC device requested
235 14:28:34.007373 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 14:28:34.007471 start: 1.7 deploy-device-env (timeout 00:09:31) [common]
237 14:28:34.007560 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 14:28:34.007639 Checking files for TFTP limit of 4294967296 bytes.
239 14:28:34.008067 end: 1 tftp-deploy (duration 00:00:29) [common]
240 14:28:34.008176 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 14:28:34.008273 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 14:28:34.008411 substitutions:
243 14:28:34.008484 - {DTB}: None
244 14:28:34.008551 - {INITRD}: 10525244/tftp-deploy-cd4o9ppk/ramdisk/ramdisk.cpio.gz
245 14:28:34.008617 - {KERNEL}: 10525244/tftp-deploy-cd4o9ppk/kernel/bzImage
246 14:28:34.008680 - {LAVA_MAC}: None
247 14:28:34.008742 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10525244/extract-nfsrootfs-i3hh2jim
248 14:28:34.008805 - {NFS_SERVER_IP}: 192.168.201.1
249 14:28:34.008864 - {PRESEED_CONFIG}: None
250 14:28:34.008924 - {PRESEED_LOCAL}: None
251 14:28:34.008982 - {RAMDISK}: 10525244/tftp-deploy-cd4o9ppk/ramdisk/ramdisk.cpio.gz
252 14:28:34.009041 - {ROOT_PART}: None
253 14:28:34.009099 - {ROOT}: None
254 14:28:34.009158 - {SERVER_IP}: 192.168.201.1
255 14:28:34.009216 - {TEE}: None
256 14:28:34.009274 Parsed boot commands:
257 14:28:34.009331 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 14:28:34.009520 Parsed boot commands: tftpboot 192.168.201.1 10525244/tftp-deploy-cd4o9ppk/kernel/bzImage 10525244/tftp-deploy-cd4o9ppk/kernel/cmdline 10525244/tftp-deploy-cd4o9ppk/ramdisk/ramdisk.cpio.gz
259 14:28:34.009650 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 14:28:34.009752 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 14:28:34.009850 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 14:28:34.009943 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 14:28:34.010023 Not connected, no need to disconnect.
264 14:28:34.010105 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 14:28:34.010188 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 14:28:34.010258 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
267 14:28:34.013835 Setting prompt string to ['lava-test: # ']
268 14:28:34.014199 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 14:28:34.014315 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 14:28:34.014421 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 14:28:34.014519 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 14:28:34.014729 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
273 14:28:39.168475 >> Command sent successfully.
274 14:28:39.178877 Returned 0 in 5 seconds
275 14:28:39.280088 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 14:28:39.281509 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 14:28:39.282068 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 14:28:39.282628 Setting prompt string to 'Starting depthcharge on Helios...'
280 14:28:39.282990 Changing prompt to 'Starting depthcharge on Helios...'
281 14:28:39.283363 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
282 14:28:39.284501 [Enter `^Ec?' for help]
283 14:28:39.894619
284 14:28:39.895180
285 14:28:39.904310 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
286 14:28:39.907824 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
287 14:28:39.914709 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
288 14:28:39.917718 CPU: AES supported, TXT NOT supported, VT supported
289 14:28:39.924746 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
290 14:28:39.928198 PCH: device id 0284 (rev 00) is Cometlake-U Premium
291 14:28:39.934622 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
292 14:28:39.938318 VBOOT: Loading verstage.
293 14:28:39.941567 FMAP: Found "FLASH" version 1.1 at 0xc04000.
294 14:28:39.948320 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
295 14:28:39.951420 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
296 14:28:39.954493 CBFS @ c08000 size 3f8000
297 14:28:39.961522 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
298 14:28:39.964878 CBFS: Locating 'fallback/verstage'
299 14:28:39.967980 CBFS: Found @ offset 10fb80 size 1072c
300 14:28:39.971475
301 14:28:39.972067
302 14:28:39.981641 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
303 14:28:39.995739 Probing TPM: . done!
304 14:28:39.998694 TPM ready after 0 ms
305 14:28:40.002443 Connected to device vid:did:rid of 1ae0:0028:00
306 14:28:40.012366 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
307 14:28:40.015833 Initialized TPM device CR50 revision 0
308 14:28:40.056848 tlcl_send_startup: Startup return code is 0
309 14:28:40.057476 TPM: setup succeeded
310 14:28:40.069763 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
311 14:28:40.073654 Chrome EC: UHEPI supported
312 14:28:40.076937 Phase 1
313 14:28:40.080050 FMAP: area GBB found @ c05000 (12288 bytes)
314 14:28:40.087012 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
315 14:28:40.087593 Phase 2
316 14:28:40.090097 Phase 3
317 14:28:40.093794 FMAP: area GBB found @ c05000 (12288 bytes)
318 14:28:40.100136 VB2:vb2_report_dev_firmware() This is developer signed firmware
319 14:28:40.106885 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
320 14:28:40.110685 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
321 14:28:40.116835 VB2:vb2_verify_keyblock() Checking keyblock signature...
322 14:28:40.132830 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
323 14:28:40.135617 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
324 14:28:40.142384 VB2:vb2_verify_fw_preamble() Verifying preamble.
325 14:28:40.146438 Phase 4
326 14:28:40.149781 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
327 14:28:40.156655 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
328 14:28:40.335588 VB2:vb2_rsa_verify_digest() Digest check failed!
329 14:28:40.342333 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
330 14:28:40.342432 Saving nvdata
331 14:28:40.345303 Reboot requested (10020007)
332 14:28:40.348761 board_reset() called!
333 14:28:40.348857 full_reset() called!
334 14:28:44.861652
335 14:28:44.861828
336 14:28:44.871928 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
337 14:28:44.875077 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
338 14:28:44.881937 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
339 14:28:44.884969 CPU: AES supported, TXT NOT supported, VT supported
340 14:28:44.892025 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
341 14:28:44.894839 PCH: device id 0284 (rev 00) is Cometlake-U Premium
342 14:28:44.901368 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
343 14:28:44.905374 VBOOT: Loading verstage.
344 14:28:44.908195 FMAP: Found "FLASH" version 1.1 at 0xc04000.
345 14:28:44.915661 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
346 14:28:44.918239 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
347 14:28:44.921430 CBFS @ c08000 size 3f8000
348 14:28:44.928409 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
349 14:28:44.931464 CBFS: Locating 'fallback/verstage'
350 14:28:44.934557 CBFS: Found @ offset 10fb80 size 1072c
351 14:28:44.938824
352 14:28:44.939357
353 14:28:44.948837 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
354 14:28:44.963086 Probing TPM: . done!
355 14:28:44.966694 TPM ready after 0 ms
356 14:28:44.969846 Connected to device vid:did:rid of 1ae0:0028:00
357 14:28:44.980272 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
358 14:28:44.983656 Initialized TPM device CR50 revision 0
359 14:28:45.025887 tlcl_send_startup: Startup return code is 0
360 14:28:45.026496 TPM: setup succeeded
361 14:28:45.038232 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
362 14:28:45.042166 Chrome EC: UHEPI supported
363 14:28:45.045842 Phase 1
364 14:28:45.048637 FMAP: area GBB found @ c05000 (12288 bytes)
365 14:28:45.055201 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
366 14:28:45.062270 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
367 14:28:45.065664 Recovery requested (1009000e)
368 14:28:45.070758 Saving nvdata
369 14:28:45.077115 tlcl_extend: response is 0
370 14:28:45.085534 tlcl_extend: response is 0
371 14:28:45.092467 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
372 14:28:45.095995 CBFS @ c08000 size 3f8000
373 14:28:45.102953 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
374 14:28:45.105898 CBFS: Locating 'fallback/romstage'
375 14:28:45.109317 CBFS: Found @ offset 80 size 145fc
376 14:28:45.112829 Accumulated console time in verstage 98 ms
377 14:28:45.113059
378 14:28:45.113209
379 14:28:45.125766 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
380 14:28:45.133232 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
381 14:28:45.135900 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
382 14:28:45.139427 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
383 14:28:45.145550 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
384 14:28:45.149192 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
385 14:28:45.152716 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
386 14:28:45.156261 TCO_STS: 0000 0000
387 14:28:45.159201 GEN_PMCON: e0015238 00000200
388 14:28:45.162344 GBLRST_CAUSE: 00000000 00000000
389 14:28:45.162778 prev_sleep_state 5
390 14:28:45.165882 Boot Count incremented to 57990
391 14:28:45.172679 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
392 14:28:45.176122 CBFS @ c08000 size 3f8000
393 14:28:45.182769 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
394 14:28:45.183304 CBFS: Locating 'fspm.bin'
395 14:28:45.189756 CBFS: Found @ offset 5ffc0 size 71000
396 14:28:45.192312 Chrome EC: UHEPI supported
397 14:28:45.198818 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
398 14:28:45.202772 Probing TPM: done!
399 14:28:45.209702 Connected to device vid:did:rid of 1ae0:0028:00
400 14:28:45.219197 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
401 14:28:45.225329 Initialized TPM device CR50 revision 0
402 14:28:45.234310 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
403 14:28:45.240835 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
404 14:28:45.243864 MRC cache found, size 1948
405 14:28:45.247452 bootmode is set to: 2
406 14:28:45.250914 PRMRR disabled by config.
407 14:28:45.251349 SPD INDEX = 1
408 14:28:45.257985 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
409 14:28:45.260846 CBFS @ c08000 size 3f8000
410 14:28:45.267343 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
411 14:28:45.267779 CBFS: Locating 'spd.bin'
412 14:28:45.270325 CBFS: Found @ offset 5fb80 size 400
413 14:28:45.273748 SPD: module type is LPDDR3
414 14:28:45.277745 SPD: module part is
415 14:28:45.283633 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
416 14:28:45.287505 SPD: device width 4 bits, bus width 8 bits
417 14:28:45.290495 SPD: module size is 4096 MB (per channel)
418 14:28:45.293840 memory slot: 0 configuration done.
419 14:28:45.296981 memory slot: 2 configuration done.
420 14:28:45.348131 CBMEM:
421 14:28:45.351302 IMD: root @ 99fff000 254 entries.
422 14:28:45.354798 IMD: root @ 99ffec00 62 entries.
423 14:28:45.358055 External stage cache:
424 14:28:45.361778 IMD: root @ 9abff000 254 entries.
425 14:28:45.364836 IMD: root @ 9abfec00 62 entries.
426 14:28:45.367789 Chrome EC: clear events_b mask to 0x0000000020004000
427 14:28:45.384770 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
428 14:28:45.397883 tlcl_write: response is 0
429 14:28:45.406806 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
430 14:28:45.412920 MRC: TPM MRC hash updated successfully.
431 14:28:45.413504 2 DIMMs found
432 14:28:45.416740 SMM Memory Map
433 14:28:45.419616 SMRAM : 0x9a000000 0x1000000
434 14:28:45.422659 Subregion 0: 0x9a000000 0xa00000
435 14:28:45.425968 Subregion 1: 0x9aa00000 0x200000
436 14:28:45.429543 Subregion 2: 0x9ac00000 0x400000
437 14:28:45.432733 top_of_ram = 0x9a000000
438 14:28:45.436033 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
439 14:28:45.442692 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
440 14:28:45.446214 MTRR Range: Start=ff000000 End=0 (Size 1000000)
441 14:28:45.452837 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 14:28:45.455778 CBFS @ c08000 size 3f8000
443 14:28:45.459159 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 14:28:45.463102 CBFS: Locating 'fallback/postcar'
445 14:28:45.469212 CBFS: Found @ offset 107000 size 4b44
446 14:28:45.472613 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
447 14:28:45.485033 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
448 14:28:45.488179 Processing 180 relocs. Offset value of 0x97c0c000
449 14:28:45.496377 Accumulated console time in romstage 286 ms
450 14:28:45.496937
451 14:28:45.497313
452 14:28:45.506226 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
453 14:28:45.512935 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
454 14:28:45.516716 CBFS @ c08000 size 3f8000
455 14:28:45.519469 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
456 14:28:45.526500 CBFS: Locating 'fallback/ramstage'
457 14:28:45.529572 CBFS: Found @ offset 43380 size 1b9e8
458 14:28:45.536234 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
459 14:28:45.568304 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
460 14:28:45.571812 Processing 3976 relocs. Offset value of 0x98db0000
461 14:28:45.578326 Accumulated console time in postcar 52 ms
462 14:28:45.578765
463 14:28:45.579104
464 14:28:45.588285 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
465 14:28:45.594568 FMAP: area RO_VPD found @ c00000 (16384 bytes)
466 14:28:45.598377 WARNING: RO_VPD is uninitialized or empty.
467 14:28:45.601557 FMAP: area RW_VPD found @ af8000 (8192 bytes)
468 14:28:45.607920 FMAP: area RW_VPD found @ af8000 (8192 bytes)
469 14:28:45.608454 Normal boot.
470 14:28:45.615020 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
471 14:28:45.617920 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
472 14:28:45.621030 CBFS @ c08000 size 3f8000
473 14:28:45.627354 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
474 14:28:45.631651 CBFS: Locating 'cpu_microcode_blob.bin'
475 14:28:45.634267 CBFS: Found @ offset 14700 size 2ec00
476 14:28:45.637744 microcode: sig=0x806ec pf=0x4 revision=0xc9
477 14:28:45.640964 Skip microcode update
478 14:28:45.647763 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
479 14:28:45.648397 CBFS @ c08000 size 3f8000
480 14:28:45.654468 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
481 14:28:45.657444 CBFS: Locating 'fsps.bin'
482 14:28:45.660650 CBFS: Found @ offset d1fc0 size 35000
483 14:28:45.686274 Detected 4 core, 8 thread CPU.
484 14:28:45.689698 Setting up SMI for CPU
485 14:28:45.693113 IED base = 0x9ac00000
486 14:28:45.693586 IED size = 0x00400000
487 14:28:45.696694 Will perform SMM setup.
488 14:28:45.703410 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
489 14:28:45.709798 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
490 14:28:45.713230 Processing 16 relocs. Offset value of 0x00030000
491 14:28:45.716647 Attempting to start 7 APs
492 14:28:45.719842 Waiting for 10ms after sending INIT.
493 14:28:45.736534 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
494 14:28:45.737126 done.
495 14:28:45.739646 AP: slot 3 apic_id 5.
496 14:28:45.742648 AP: slot 5 apic_id 4.
497 14:28:45.743180 AP: slot 7 apic_id 6.
498 14:28:45.746458 AP: slot 6 apic_id 7.
499 14:28:45.749654 AP: slot 1 apic_id 2.
500 14:28:45.750182 AP: slot 4 apic_id 3.
501 14:28:45.756593 Waiting for 2nd SIPI to complete...done.
502 14:28:45.762304 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
503 14:28:45.766098 Processing 13 relocs. Offset value of 0x00038000
504 14:28:45.772658 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
505 14:28:45.779517 Installing SMM handler to 0x9a000000
506 14:28:45.786296 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
507 14:28:45.789031 Processing 658 relocs. Offset value of 0x9a010000
508 14:28:45.799206 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
509 14:28:45.802781 Processing 13 relocs. Offset value of 0x9a008000
510 14:28:45.809332 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
511 14:28:45.815454 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
512 14:28:45.819188 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
513 14:28:45.825471 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
514 14:28:45.832486 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
515 14:28:45.839076 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
516 14:28:45.841875 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
517 14:28:45.849053 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
518 14:28:45.852875 Clearing SMI status registers
519 14:28:45.855433 SMI_STS: PM1
520 14:28:45.856004 PM1_STS: PWRBTN
521 14:28:45.859327 TCO_STS: SECOND_TO
522 14:28:45.862252 New SMBASE 0x9a000000
523 14:28:45.865199 In relocation handler: CPU 0
524 14:28:45.868855 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
525 14:28:45.871890 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 14:28:45.874992 Relocation complete.
527 14:28:45.878633 New SMBASE 0x99fff800
528 14:28:45.881817 In relocation handler: CPU 2
529 14:28:45.885698 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
530 14:28:45.888675 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 14:28:45.891712 Relocation complete.
532 14:28:45.895253 New SMBASE 0x99ffe800
533 14:28:45.895693 In relocation handler: CPU 6
534 14:28:45.901621 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
535 14:28:45.905006 Writing SMRR. base = 0x9a000006, mask=0xff000800
536 14:28:45.908609 Relocation complete.
537 14:28:45.909150 New SMBASE 0x99ffe400
538 14:28:45.911670 In relocation handler: CPU 7
539 14:28:45.918796 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
540 14:28:45.921556 Writing SMRR. base = 0x9a000006, mask=0xff000800
541 14:28:45.925236 Relocation complete.
542 14:28:45.925715 New SMBASE 0x99fff400
543 14:28:45.928495 In relocation handler: CPU 3
544 14:28:45.934739 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
545 14:28:45.938192 Writing SMRR. base = 0x9a000006, mask=0xff000800
546 14:28:45.940923 Relocation complete.
547 14:28:45.941024 New SMBASE 0x99ffec00
548 14:28:45.944695 In relocation handler: CPU 5
549 14:28:45.947711 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
550 14:28:45.955467 Writing SMRR. base = 0x9a000006, mask=0xff000800
551 14:28:45.958330 Relocation complete.
552 14:28:45.958768 New SMBASE 0x99fff000
553 14:28:45.961745 In relocation handler: CPU 4
554 14:28:45.965451 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
555 14:28:45.971952 Writing SMRR. base = 0x9a000006, mask=0xff000800
556 14:28:45.972531 Relocation complete.
557 14:28:45.975137 New SMBASE 0x99fffc00
558 14:28:45.978333 In relocation handler: CPU 1
559 14:28:45.981771 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
560 14:28:45.988146 Writing SMRR. base = 0x9a000006, mask=0xff000800
561 14:28:45.988678 Relocation complete.
562 14:28:45.991891 Initializing CPU #0
563 14:28:45.994673 CPU: vendor Intel device 806ec
564 14:28:45.998328 CPU: family 06, model 8e, stepping 0c
565 14:28:46.001544 Clearing out pending MCEs
566 14:28:46.005626 Setting up local APIC...
567 14:28:46.006211 apic_id: 0x00 done.
568 14:28:46.008178 Turbo is available but hidden
569 14:28:46.011336 Turbo is available and visible
570 14:28:46.014785 VMX status: enabled
571 14:28:46.018311 IA32_FEATURE_CONTROL status: locked
572 14:28:46.022080 Skip microcode update
573 14:28:46.022510 CPU #0 initialized
574 14:28:46.025103 Initializing CPU #2
575 14:28:46.025535 Initializing CPU #7
576 14:28:46.028035 Initializing CPU #6
577 14:28:46.031820 CPU: vendor Intel device 806ec
578 14:28:46.034946 CPU: family 06, model 8e, stepping 0c
579 14:28:46.037912 CPU: vendor Intel device 806ec
580 14:28:46.041283 CPU: family 06, model 8e, stepping 0c
581 14:28:46.045017 Clearing out pending MCEs
582 14:28:46.047699 Clearing out pending MCEs
583 14:28:46.051063 Setting up local APIC...
584 14:28:46.051497 Initializing CPU #1
585 14:28:46.055002 Initializing CPU #4
586 14:28:46.057824 CPU: vendor Intel device 806ec
587 14:28:46.061064 CPU: family 06, model 8e, stepping 0c
588 14:28:46.065074 CPU: vendor Intel device 806ec
589 14:28:46.068368 CPU: family 06, model 8e, stepping 0c
590 14:28:46.071113 Clearing out pending MCEs
591 14:28:46.075015 Clearing out pending MCEs
592 14:28:46.075591 Setting up local APIC...
593 14:28:46.077995 CPU: vendor Intel device 806ec
594 14:28:46.081247 CPU: family 06, model 8e, stepping 0c
595 14:28:46.084576 Clearing out pending MCEs
596 14:28:46.087528 Initializing CPU #3
597 14:28:46.088017 Initializing CPU #5
598 14:28:46.091173 Setting up local APIC...
599 14:28:46.094135 CPU: vendor Intel device 806ec
600 14:28:46.097560 CPU: family 06, model 8e, stepping 0c
601 14:28:46.101243 CPU: vendor Intel device 806ec
602 14:28:46.103856 CPU: family 06, model 8e, stepping 0c
603 14:28:46.107600 Clearing out pending MCEs
604 14:28:46.110915 Clearing out pending MCEs
605 14:28:46.114217 Setting up local APIC...
606 14:28:46.114400 apic_id: 0x01 done.
607 14:28:46.117557 Setting up local APIC...
608 14:28:46.120673 Setting up local APIC...
609 14:28:46.124149 Setting up local APIC...
610 14:28:46.124367 apic_id: 0x07 done.
611 14:28:46.127251 apic_id: 0x06 done.
612 14:28:46.131002 VMX status: enabled
613 14:28:46.131256 VMX status: enabled
614 14:28:46.134253 IA32_FEATURE_CONTROL status: locked
615 14:28:46.137048 IA32_FEATURE_CONTROL status: locked
616 14:28:46.140593 Skip microcode update
617 14:28:46.143760 Skip microcode update
618 14:28:46.144105 CPU #6 initialized
619 14:28:46.147915 CPU #7 initialized
620 14:28:46.151199 apic_id: 0x03 done.
621 14:28:46.151693 apic_id: 0x02 done.
622 14:28:46.153846 VMX status: enabled
623 14:28:46.154380 VMX status: enabled
624 14:28:46.157470 IA32_FEATURE_CONTROL status: locked
625 14:28:46.164294 IA32_FEATURE_CONTROL status: locked
626 14:28:46.164730 Skip microcode update
627 14:28:46.167431 Skip microcode update
628 14:28:46.167860 CPU #4 initialized
629 14:28:46.170649 CPU #1 initialized
630 14:28:46.174521 VMX status: enabled
631 14:28:46.175054 apic_id: 0x04 done.
632 14:28:46.177544 apic_id: 0x05 done.
633 14:28:46.181434 VMX status: enabled
634 14:28:46.182004 VMX status: enabled
635 14:28:46.184157 IA32_FEATURE_CONTROL status: locked
636 14:28:46.187728 IA32_FEATURE_CONTROL status: locked
637 14:28:46.190981 Skip microcode update
638 14:28:46.194366 IA32_FEATURE_CONTROL status: locked
639 14:28:46.198205 CPU #5 initialized
640 14:28:46.198956 Skip microcode update
641 14:28:46.200820 Skip microcode update
642 14:28:46.203923 CPU #3 initialized
643 14:28:46.204398 CPU #2 initialized
644 14:28:46.207984 bsp_do_flight_plan done after 452 msecs.
645 14:28:46.211033 CPU: frequency set to 4200 MHz
646 14:28:46.214286 Enabling SMIs.
647 14:28:46.214722 Locking SMM.
648 14:28:46.229759 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
649 14:28:46.233146 CBFS @ c08000 size 3f8000
650 14:28:46.239767 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
651 14:28:46.240201 CBFS: Locating 'vbt.bin'
652 14:28:46.243264 CBFS: Found @ offset 5f5c0 size 499
653 14:28:46.249785 Found a VBT of 4608 bytes after decompression
654 14:28:46.431954 Display FSP Version Info HOB
655 14:28:46.435441 Reference Code - CPU = 9.0.1e.30
656 14:28:46.438549 uCode Version = 0.0.0.ca
657 14:28:46.441735 TXT ACM version = ff.ff.ff.ffff
658 14:28:46.445180 Display FSP Version Info HOB
659 14:28:46.448484 Reference Code - ME = 9.0.1e.30
660 14:28:46.451814 MEBx version = 0.0.0.0
661 14:28:46.454729 ME Firmware Version = Consumer SKU
662 14:28:46.458319 Display FSP Version Info HOB
663 14:28:46.461463 Reference Code - CML PCH = 9.0.1e.30
664 14:28:46.465069 PCH-CRID Status = Disabled
665 14:28:46.468274 PCH-CRID Original Value = ff.ff.ff.ffff
666 14:28:46.471687 PCH-CRID New Value = ff.ff.ff.ffff
667 14:28:46.475271 OPROM - RST - RAID = ff.ff.ff.ffff
668 14:28:46.478300 ChipsetInit Base Version = ff.ff.ff.ffff
669 14:28:46.481631 ChipsetInit Oem Version = ff.ff.ff.ffff
670 14:28:46.485388 Display FSP Version Info HOB
671 14:28:46.491431 Reference Code - SA - System Agent = 9.0.1e.30
672 14:28:46.495123 Reference Code - MRC = 0.7.1.6c
673 14:28:46.495602 SA - PCIe Version = 9.0.1e.30
674 14:28:46.498089 SA-CRID Status = Disabled
675 14:28:46.501136 SA-CRID Original Value = 0.0.0.c
676 14:28:46.505143 SA-CRID New Value = 0.0.0.c
677 14:28:46.508175 OPROM - VBIOS = ff.ff.ff.ffff
678 14:28:46.511171 RTC Init
679 14:28:46.514785 Set power on after power failure.
680 14:28:46.515261 Disabling Deep S3
681 14:28:46.517920 Disabling Deep S3
682 14:28:46.518355 Disabling Deep S4
683 14:28:46.520879 Disabling Deep S4
684 14:28:46.521312 Disabling Deep S5
685 14:28:46.524520 Disabling Deep S5
686 14:28:46.530914 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 192 exit 1
687 14:28:46.531350 Enumerating buses...
688 14:28:46.537897 Show all devs... Before device enumeration.
689 14:28:46.538331 Root Device: enabled 1
690 14:28:46.541561 CPU_CLUSTER: 0: enabled 1
691 14:28:46.544082 DOMAIN: 0000: enabled 1
692 14:28:46.547538 APIC: 00: enabled 1
693 14:28:46.547981 PCI: 00:00.0: enabled 1
694 14:28:46.551327 PCI: 00:02.0: enabled 1
695 14:28:46.554541 PCI: 00:04.0: enabled 0
696 14:28:46.557865 PCI: 00:05.0: enabled 0
697 14:28:46.558298 PCI: 00:12.0: enabled 1
698 14:28:46.560824 PCI: 00:12.5: enabled 0
699 14:28:46.564532 PCI: 00:12.6: enabled 0
700 14:28:46.564964 PCI: 00:14.0: enabled 1
701 14:28:46.567460 PCI: 00:14.1: enabled 0
702 14:28:46.570893 PCI: 00:14.3: enabled 1
703 14:28:46.574459 PCI: 00:14.5: enabled 0
704 14:28:46.574896 PCI: 00:15.0: enabled 1
705 14:28:46.577435 PCI: 00:15.1: enabled 1
706 14:28:46.581329 PCI: 00:15.2: enabled 0
707 14:28:46.584282 PCI: 00:15.3: enabled 0
708 14:28:46.584824 PCI: 00:16.0: enabled 1
709 14:28:46.587918 PCI: 00:16.1: enabled 0
710 14:28:46.590672 PCI: 00:16.2: enabled 0
711 14:28:46.594331 PCI: 00:16.3: enabled 0
712 14:28:46.594771 PCI: 00:16.4: enabled 0
713 14:28:46.597528 PCI: 00:16.5: enabled 0
714 14:28:46.601289 PCI: 00:17.0: enabled 1
715 14:28:46.601757 PCI: 00:19.0: enabled 1
716 14:28:46.604402 PCI: 00:19.1: enabled 0
717 14:28:46.607783 PCI: 00:19.2: enabled 0
718 14:28:46.611385 PCI: 00:1a.0: enabled 0
719 14:28:46.611920 PCI: 00:1c.0: enabled 0
720 14:28:46.614290 PCI: 00:1c.1: enabled 0
721 14:28:46.617405 PCI: 00:1c.2: enabled 0
722 14:28:46.620735 PCI: 00:1c.3: enabled 0
723 14:28:46.621266 PCI: 00:1c.4: enabled 0
724 14:28:46.624635 PCI: 00:1c.5: enabled 0
725 14:28:46.627397 PCI: 00:1c.6: enabled 0
726 14:28:46.627831 PCI: 00:1c.7: enabled 0
727 14:28:46.631257 PCI: 00:1d.0: enabled 1
728 14:28:46.634375 PCI: 00:1d.1: enabled 0
729 14:28:46.637639 PCI: 00:1d.2: enabled 0
730 14:28:46.638075 PCI: 00:1d.3: enabled 0
731 14:28:46.640635 PCI: 00:1d.4: enabled 0
732 14:28:46.643841 PCI: 00:1d.5: enabled 1
733 14:28:46.647745 PCI: 00:1e.0: enabled 1
734 14:28:46.648178 PCI: 00:1e.1: enabled 0
735 14:28:46.650886 PCI: 00:1e.2: enabled 1
736 14:28:46.654102 PCI: 00:1e.3: enabled 1
737 14:28:46.657586 PCI: 00:1f.0: enabled 1
738 14:28:46.658142 PCI: 00:1f.1: enabled 1
739 14:28:46.660425 PCI: 00:1f.2: enabled 1
740 14:28:46.663677 PCI: 00:1f.3: enabled 1
741 14:28:46.664150 PCI: 00:1f.4: enabled 1
742 14:28:46.667067 PCI: 00:1f.5: enabled 1
743 14:28:46.670483 PCI: 00:1f.6: enabled 0
744 14:28:46.674002 USB0 port 0: enabled 1
745 14:28:46.674505 I2C: 00:15: enabled 1
746 14:28:46.677412 I2C: 00:5d: enabled 1
747 14:28:46.680408 GENERIC: 0.0: enabled 1
748 14:28:46.680841 I2C: 00:1a: enabled 1
749 14:28:46.683896 I2C: 00:38: enabled 1
750 14:28:46.687684 I2C: 00:39: enabled 1
751 14:28:46.688214 I2C: 00:3a: enabled 1
752 14:28:46.690757 I2C: 00:3b: enabled 1
753 14:28:46.694086 PCI: 00:00.0: enabled 1
754 14:28:46.694516 SPI: 00: enabled 1
755 14:28:46.697054 SPI: 01: enabled 1
756 14:28:46.701062 PNP: 0c09.0: enabled 1
757 14:28:46.701511 USB2 port 0: enabled 1
758 14:28:46.703755 USB2 port 1: enabled 1
759 14:28:46.707532 USB2 port 2: enabled 0
760 14:28:46.708058 USB2 port 3: enabled 0
761 14:28:46.710698 USB2 port 5: enabled 0
762 14:28:46.713673 USB2 port 6: enabled 1
763 14:28:46.717610 USB2 port 9: enabled 1
764 14:28:46.718046 USB3 port 0: enabled 1
765 14:28:46.720612 USB3 port 1: enabled 1
766 14:28:46.723988 USB3 port 2: enabled 1
767 14:28:46.724522 USB3 port 3: enabled 1
768 14:28:46.727623 USB3 port 4: enabled 0
769 14:28:46.730668 APIC: 02: enabled 1
770 14:28:46.731099 APIC: 01: enabled 1
771 14:28:46.733671 APIC: 05: enabled 1
772 14:28:46.737686 APIC: 03: enabled 1
773 14:28:46.738119 APIC: 04: enabled 1
774 14:28:46.740709 APIC: 07: enabled 1
775 14:28:46.741142 APIC: 06: enabled 1
776 14:28:46.743809 Compare with tree...
777 14:28:46.746998 Root Device: enabled 1
778 14:28:46.750826 CPU_CLUSTER: 0: enabled 1
779 14:28:46.751258 APIC: 00: enabled 1
780 14:28:46.754064 APIC: 02: enabled 1
781 14:28:46.757062 APIC: 01: enabled 1
782 14:28:46.757493 APIC: 05: enabled 1
783 14:28:46.760649 APIC: 03: enabled 1
784 14:28:46.763609 APIC: 04: enabled 1
785 14:28:46.764194 APIC: 07: enabled 1
786 14:28:46.767001 APIC: 06: enabled 1
787 14:28:46.770394 DOMAIN: 0000: enabled 1
788 14:28:46.773682 PCI: 00:00.0: enabled 1
789 14:28:46.774117 PCI: 00:02.0: enabled 1
790 14:28:46.777133 PCI: 00:04.0: enabled 0
791 14:28:46.780743 PCI: 00:05.0: enabled 0
792 14:28:46.784135 PCI: 00:12.0: enabled 1
793 14:28:46.784802 PCI: 00:12.5: enabled 0
794 14:28:46.786965 PCI: 00:12.6: enabled 0
795 14:28:46.790358 PCI: 00:14.0: enabled 1
796 14:28:46.793875 USB0 port 0: enabled 1
797 14:28:46.797113 USB2 port 0: enabled 1
798 14:28:46.800447 USB2 port 1: enabled 1
799 14:28:46.800907 USB2 port 2: enabled 0
800 14:28:46.803755 USB2 port 3: enabled 0
801 14:28:46.807274 USB2 port 5: enabled 0
802 14:28:46.810708 USB2 port 6: enabled 1
803 14:28:46.813769 USB2 port 9: enabled 1
804 14:28:46.814202 USB3 port 0: enabled 1
805 14:28:46.816899 USB3 port 1: enabled 1
806 14:28:46.820652 USB3 port 2: enabled 1
807 14:28:46.823857 USB3 port 3: enabled 1
808 14:28:46.827645 USB3 port 4: enabled 0
809 14:28:46.828075 PCI: 00:14.1: enabled 0
810 14:28:46.830732 PCI: 00:14.3: enabled 1
811 14:28:46.834154 PCI: 00:14.5: enabled 0
812 14:28:46.837409 PCI: 00:15.0: enabled 1
813 14:28:46.840078 I2C: 00:15: enabled 1
814 14:28:46.840517 PCI: 00:15.1: enabled 1
815 14:28:46.843328 I2C: 00:5d: enabled 1
816 14:28:46.847309 GENERIC: 0.0: enabled 1
817 14:28:46.850250 PCI: 00:15.2: enabled 0
818 14:28:46.853453 PCI: 00:15.3: enabled 0
819 14:28:46.854073 PCI: 00:16.0: enabled 1
820 14:28:46.856421 PCI: 00:16.1: enabled 0
821 14:28:46.860170 PCI: 00:16.2: enabled 0
822 14:28:46.863604 PCI: 00:16.3: enabled 0
823 14:28:46.866563 PCI: 00:16.4: enabled 0
824 14:28:46.867011 PCI: 00:16.5: enabled 0
825 14:28:46.869891 PCI: 00:17.0: enabled 1
826 14:28:46.873513 PCI: 00:19.0: enabled 1
827 14:28:46.877002 I2C: 00:1a: enabled 1
828 14:28:46.877536 I2C: 00:38: enabled 1
829 14:28:46.880283 I2C: 00:39: enabled 1
830 14:28:46.882958 I2C: 00:3a: enabled 1
831 14:28:46.886280 I2C: 00:3b: enabled 1
832 14:28:46.889837 PCI: 00:19.1: enabled 0
833 14:28:46.890269 PCI: 00:19.2: enabled 0
834 14:28:46.893234 PCI: 00:1a.0: enabled 0
835 14:28:46.896265 PCI: 00:1c.0: enabled 0
836 14:28:46.899864 PCI: 00:1c.1: enabled 0
837 14:28:46.903235 PCI: 00:1c.2: enabled 0
838 14:28:46.903670 PCI: 00:1c.3: enabled 0
839 14:28:46.906476 PCI: 00:1c.4: enabled 0
840 14:28:46.909737 PCI: 00:1c.5: enabled 0
841 14:28:46.913129 PCI: 00:1c.6: enabled 0
842 14:28:46.913567 PCI: 00:1c.7: enabled 0
843 14:28:46.916440 PCI: 00:1d.0: enabled 1
844 14:28:46.919452 PCI: 00:1d.1: enabled 0
845 14:28:46.923187 PCI: 00:1d.2: enabled 0
846 14:28:46.926081 PCI: 00:1d.3: enabled 0
847 14:28:46.926546 PCI: 00:1d.4: enabled 0
848 14:28:46.929378 PCI: 00:1d.5: enabled 1
849 14:28:46.933108 PCI: 00:00.0: enabled 1
850 14:28:46.936645 PCI: 00:1e.0: enabled 1
851 14:28:46.939569 PCI: 00:1e.1: enabled 0
852 14:28:46.940027 PCI: 00:1e.2: enabled 1
853 14:28:46.943663 SPI: 00: enabled 1
854 14:28:46.946355 PCI: 00:1e.3: enabled 1
855 14:28:46.949472 SPI: 01: enabled 1
856 14:28:46.949950 PCI: 00:1f.0: enabled 1
857 14:28:46.952624 PNP: 0c09.0: enabled 1
858 14:28:46.956232 PCI: 00:1f.1: enabled 1
859 14:28:46.959616 PCI: 00:1f.2: enabled 1
860 14:28:46.962629 PCI: 00:1f.3: enabled 1
861 14:28:46.963056 PCI: 00:1f.4: enabled 1
862 14:28:46.965952 PCI: 00:1f.5: enabled 1
863 14:28:46.969965 PCI: 00:1f.6: enabled 0
864 14:28:46.972740 Root Device scanning...
865 14:28:46.976574 scan_static_bus for Root Device
866 14:28:46.977127 CPU_CLUSTER: 0 enabled
867 14:28:46.979214 DOMAIN: 0000 enabled
868 14:28:46.983213 DOMAIN: 0000 scanning...
869 14:28:46.986334 PCI: pci_scan_bus for bus 00
870 14:28:46.989332 PCI: 00:00.0 [8086/0000] ops
871 14:28:46.992903 PCI: 00:00.0 [8086/9b61] enabled
872 14:28:46.996360 PCI: 00:02.0 [8086/0000] bus ops
873 14:28:46.998981 PCI: 00:02.0 [8086/9b41] enabled
874 14:28:47.002741 PCI: 00:04.0 [8086/1903] disabled
875 14:28:47.005664 PCI: 00:08.0 [8086/1911] enabled
876 14:28:47.009382 PCI: 00:12.0 [8086/02f9] enabled
877 14:28:47.012373 PCI: 00:14.0 [8086/0000] bus ops
878 14:28:47.016107 PCI: 00:14.0 [8086/02ed] enabled
879 14:28:47.019384 PCI: 00:14.2 [8086/02ef] enabled
880 14:28:47.022528 PCI: 00:14.3 [8086/02f0] enabled
881 14:28:47.025950 PCI: 00:15.0 [8086/0000] bus ops
882 14:28:47.029101 PCI: 00:15.0 [8086/02e8] enabled
883 14:28:47.031875 PCI: 00:15.1 [8086/0000] bus ops
884 14:28:47.035622 PCI: 00:15.1 [8086/02e9] enabled
885 14:28:47.039030 PCI: 00:16.0 [8086/0000] ops
886 14:28:47.042020 PCI: 00:16.0 [8086/02e0] enabled
887 14:28:47.045127 PCI: 00:17.0 [8086/0000] ops
888 14:28:47.048862 PCI: 00:17.0 [8086/02d3] enabled
889 14:28:47.052156 PCI: 00:19.0 [8086/0000] bus ops
890 14:28:47.055145 PCI: 00:19.0 [8086/02c5] enabled
891 14:28:47.059268 PCI: 00:1d.0 [8086/0000] bus ops
892 14:28:47.062266 PCI: 00:1d.0 [8086/02b0] enabled
893 14:28:47.065438 PCI: Static device PCI: 00:1d.5 not found, disabling it.
894 14:28:47.068813 PCI: 00:1e.0 [8086/0000] ops
895 14:28:47.071756 PCI: 00:1e.0 [8086/02a8] enabled
896 14:28:47.075360 PCI: 00:1e.2 [8086/0000] bus ops
897 14:28:47.078447 PCI: 00:1e.2 [8086/02aa] enabled
898 14:28:47.082324 PCI: 00:1e.3 [8086/0000] bus ops
899 14:28:47.085545 PCI: 00:1e.3 [8086/02ab] enabled
900 14:28:47.088939 PCI: 00:1f.0 [8086/0000] bus ops
901 14:28:47.092529 PCI: 00:1f.0 [8086/0284] enabled
902 14:28:47.099137 PCI: Static device PCI: 00:1f.1 not found, disabling it.
903 14:28:47.105369 PCI: Static device PCI: 00:1f.2 not found, disabling it.
904 14:28:47.108818 PCI: 00:1f.3 [8086/0000] bus ops
905 14:28:47.112489 PCI: 00:1f.3 [8086/02c8] enabled
906 14:28:47.115579 PCI: 00:1f.4 [8086/0000] bus ops
907 14:28:47.119288 PCI: 00:1f.4 [8086/02a3] enabled
908 14:28:47.122502 PCI: 00:1f.5 [8086/0000] bus ops
909 14:28:47.122931 PCI: 00:1f.5 [8086/02a4] enabled
910 14:28:47.126141 PCI: Leftover static devices:
911 14:28:47.129140 PCI: 00:05.0
912 14:28:47.129708 PCI: 00:12.5
913 14:28:47.132676 PCI: 00:12.6
914 14:28:47.133100 PCI: 00:14.1
915 14:28:47.133480 PCI: 00:14.5
916 14:28:47.135615 PCI: 00:15.2
917 14:28:47.136039 PCI: 00:15.3
918 14:28:47.139122 PCI: 00:16.1
919 14:28:47.139636 PCI: 00:16.2
920 14:28:47.139983 PCI: 00:16.3
921 14:28:47.142264 PCI: 00:16.4
922 14:28:47.142711 PCI: 00:16.5
923 14:28:47.145521 PCI: 00:19.1
924 14:28:47.145990 PCI: 00:19.2
925 14:28:47.148844 PCI: 00:1a.0
926 14:28:47.149296 PCI: 00:1c.0
927 14:28:47.149677 PCI: 00:1c.1
928 14:28:47.152403 PCI: 00:1c.2
929 14:28:47.152931 PCI: 00:1c.3
930 14:28:47.155693 PCI: 00:1c.4
931 14:28:47.156116 PCI: 00:1c.5
932 14:28:47.156454 PCI: 00:1c.6
933 14:28:47.159121 PCI: 00:1c.7
934 14:28:47.159655 PCI: 00:1d.1
935 14:28:47.162440 PCI: 00:1d.2
936 14:28:47.162866 PCI: 00:1d.3
937 14:28:47.163202 PCI: 00:1d.4
938 14:28:47.165927 PCI: 00:1d.5
939 14:28:47.166353 PCI: 00:1e.1
940 14:28:47.169022 PCI: 00:1f.1
941 14:28:47.169569 PCI: 00:1f.2
942 14:28:47.172571 PCI: 00:1f.6
943 14:28:47.172997 PCI: Check your devicetree.cb.
944 14:28:47.175258 PCI: 00:02.0 scanning...
945 14:28:47.178457 scan_generic_bus for PCI: 00:02.0
946 14:28:47.185731 scan_generic_bus for PCI: 00:02.0 done
947 14:28:47.188935 scan_bus: scanning of bus PCI: 00:02.0 took 10190 usecs
948 14:28:47.192397 PCI: 00:14.0 scanning...
949 14:28:47.195684 scan_static_bus for PCI: 00:14.0
950 14:28:47.199021 USB0 port 0 enabled
951 14:28:47.199551 USB0 port 0 scanning...
952 14:28:47.202375 scan_static_bus for USB0 port 0
953 14:28:47.205321 USB2 port 0 enabled
954 14:28:47.208821 USB2 port 1 enabled
955 14:28:47.209388 USB2 port 2 disabled
956 14:28:47.212285 USB2 port 3 disabled
957 14:28:47.215471 USB2 port 5 disabled
958 14:28:47.216056 USB2 port 6 enabled
959 14:28:47.219125 USB2 port 9 enabled
960 14:28:47.219655 USB3 port 0 enabled
961 14:28:47.221769 USB3 port 1 enabled
962 14:28:47.225403 USB3 port 2 enabled
963 14:28:47.225882 USB3 port 3 enabled
964 14:28:47.229036 USB3 port 4 disabled
965 14:28:47.231828 USB2 port 0 scanning...
966 14:28:47.235907 scan_static_bus for USB2 port 0
967 14:28:47.239037 scan_static_bus for USB2 port 0 done
968 14:28:47.241869 scan_bus: scanning of bus USB2 port 0 took 9707 usecs
969 14:28:47.245304 USB2 port 1 scanning...
970 14:28:47.248635 scan_static_bus for USB2 port 1
971 14:28:47.252152 scan_static_bus for USB2 port 1 done
972 14:28:47.258877 scan_bus: scanning of bus USB2 port 1 took 9700 usecs
973 14:28:47.262041 USB2 port 6 scanning...
974 14:28:47.265674 scan_static_bus for USB2 port 6
975 14:28:47.268983 scan_static_bus for USB2 port 6 done
976 14:28:47.272054 scan_bus: scanning of bus USB2 port 6 took 9697 usecs
977 14:28:47.275940 USB2 port 9 scanning...
978 14:28:47.278978 scan_static_bus for USB2 port 9
979 14:28:47.282171 scan_static_bus for USB2 port 9 done
980 14:28:47.289056 scan_bus: scanning of bus USB2 port 9 took 9697 usecs
981 14:28:47.292195 USB3 port 0 scanning...
982 14:28:47.295280 scan_static_bus for USB3 port 0
983 14:28:47.298400 scan_static_bus for USB3 port 0 done
984 14:28:47.305044 scan_bus: scanning of bus USB3 port 0 took 9689 usecs
985 14:28:47.305672 USB3 port 1 scanning...
986 14:28:47.308780 scan_static_bus for USB3 port 1
987 14:28:47.312054 scan_static_bus for USB3 port 1 done
988 14:28:47.318295 scan_bus: scanning of bus USB3 port 1 took 9698 usecs
989 14:28:47.321874 USB3 port 2 scanning...
990 14:28:47.325536 scan_static_bus for USB3 port 2
991 14:28:47.328435 scan_static_bus for USB3 port 2 done
992 14:28:47.334893 scan_bus: scanning of bus USB3 port 2 took 9692 usecs
993 14:28:47.335321 USB3 port 3 scanning...
994 14:28:47.338813 scan_static_bus for USB3 port 3
995 14:28:47.341779 scan_static_bus for USB3 port 3 done
996 14:28:47.348976 scan_bus: scanning of bus USB3 port 3 took 9699 usecs
997 14:28:47.352235 scan_static_bus for USB0 port 0 done
998 14:28:47.358676 scan_bus: scanning of bus USB0 port 0 took 155344 usecs
999 14:28:47.361404 scan_static_bus for PCI: 00:14.0 done
1000 14:28:47.368451 scan_bus: scanning of bus PCI: 00:14.0 took 172975 usecs
1001 14:28:47.368994 PCI: 00:15.0 scanning...
1002 14:28:47.375593 scan_generic_bus for PCI: 00:15.0
1003 14:28:47.378312 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1004 14:28:47.381861 scan_generic_bus for PCI: 00:15.0 done
1005 14:28:47.388526 scan_bus: scanning of bus PCI: 00:15.0 took 14309 usecs
1006 14:28:47.389066 PCI: 00:15.1 scanning...
1007 14:28:47.391333 scan_generic_bus for PCI: 00:15.1
1008 14:28:47.398160 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1009 14:28:47.401381 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1010 14:28:47.404813 scan_generic_bus for PCI: 00:15.1 done
1011 14:28:47.412032 scan_bus: scanning of bus PCI: 00:15.1 took 18593 usecs
1012 14:28:47.414708 PCI: 00:19.0 scanning...
1013 14:28:47.417909 scan_generic_bus for PCI: 00:19.0
1014 14:28:47.421423 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1015 14:28:47.425047 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1016 14:28:47.427843 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1017 14:28:47.434938 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1018 14:28:47.437902 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1019 14:28:47.441767 scan_generic_bus for PCI: 00:19.0 done
1020 14:28:47.448278 scan_bus: scanning of bus PCI: 00:19.0 took 30750 usecs
1021 14:28:47.448734 PCI: 00:1d.0 scanning...
1022 14:28:47.455022 do_pci_scan_bridge for PCI: 00:1d.0
1023 14:28:47.455614 PCI: pci_scan_bus for bus 01
1024 14:28:47.458135 PCI: 01:00.0 [1c5c/1327] enabled
1025 14:28:47.465186 Enabling Common Clock Configuration
1026 14:28:47.468045 L1 Sub-State supported from root port 29
1027 14:28:47.471563 L1 Sub-State Support = 0xf
1028 14:28:47.475267 CommonModeRestoreTime = 0x28
1029 14:28:47.478531 Power On Value = 0x16, Power On Scale = 0x0
1030 14:28:47.478969 ASPM: Enabled L1
1031 14:28:47.485289 scan_bus: scanning of bus PCI: 00:1d.0 took 32795 usecs
1032 14:28:47.489251 PCI: 00:1e.2 scanning...
1033 14:28:47.492026 scan_generic_bus for PCI: 00:1e.2
1034 14:28:47.495304 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1035 14:28:47.498529 scan_generic_bus for PCI: 00:1e.2 done
1036 14:28:47.505017 scan_bus: scanning of bus PCI: 00:1e.2 took 14004 usecs
1037 14:28:47.507913 PCI: 00:1e.3 scanning...
1038 14:28:47.511715 scan_generic_bus for PCI: 00:1e.3
1039 14:28:47.514850 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1040 14:28:47.518429 scan_generic_bus for PCI: 00:1e.3 done
1041 14:28:47.524750 scan_bus: scanning of bus PCI: 00:1e.3 took 14004 usecs
1042 14:28:47.528246 PCI: 00:1f.0 scanning...
1043 14:28:47.531609 scan_static_bus for PCI: 00:1f.0
1044 14:28:47.532035 PNP: 0c09.0 enabled
1045 14:28:47.534755 scan_static_bus for PCI: 00:1f.0 done
1046 14:28:47.541722 scan_bus: scanning of bus PCI: 00:1f.0 took 12054 usecs
1047 14:28:47.544527 PCI: 00:1f.3 scanning...
1048 14:28:47.551413 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1049 14:28:47.551844 PCI: 00:1f.4 scanning...
1050 14:28:47.554745 scan_generic_bus for PCI: 00:1f.4
1051 14:28:47.561320 scan_generic_bus for PCI: 00:1f.4 done
1052 14:28:47.564676 scan_bus: scanning of bus PCI: 00:1f.4 took 10189 usecs
1053 14:28:47.568085 PCI: 00:1f.5 scanning...
1054 14:28:47.571369 scan_generic_bus for PCI: 00:1f.5
1055 14:28:47.574355 scan_generic_bus for PCI: 00:1f.5 done
1056 14:28:47.581166 scan_bus: scanning of bus PCI: 00:1f.5 took 10196 usecs
1057 14:28:47.587895 scan_bus: scanning of bus DOMAIN: 0000 took 605047 usecs
1058 14:28:47.591022 scan_static_bus for Root Device done
1059 14:28:47.597539 scan_bus: scanning of bus Root Device took 624934 usecs
1060 14:28:47.598123 done
1061 14:28:47.601126 Chrome EC: UHEPI supported
1062 14:28:47.608103 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1063 14:28:47.610914 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1064 14:28:47.617370 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1065 14:28:47.624819 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1066 14:28:47.628126 SPI flash protection: WPSW=0 SRP0=0
1067 14:28:47.634868 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1068 14:28:47.637764 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1069 14:28:47.641349 found VGA at PCI: 00:02.0
1070 14:28:47.644845 Setting up VGA for PCI: 00:02.0
1071 14:28:47.651139 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1072 14:28:47.654933 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1073 14:28:47.657957 Allocating resources...
1074 14:28:47.658395 Reading resources...
1075 14:28:47.665307 Root Device read_resources bus 0 link: 0
1076 14:28:47.667972 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1077 14:28:47.674675 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1078 14:28:47.678360 DOMAIN: 0000 read_resources bus 0 link: 0
1079 14:28:47.684377 PCI: 00:14.0 read_resources bus 0 link: 0
1080 14:28:47.687972 USB0 port 0 read_resources bus 0 link: 0
1081 14:28:47.696462 USB0 port 0 read_resources bus 0 link: 0 done
1082 14:28:47.699693 PCI: 00:14.0 read_resources bus 0 link: 0 done
1083 14:28:47.707113 PCI: 00:15.0 read_resources bus 1 link: 0
1084 14:28:47.710386 PCI: 00:15.0 read_resources bus 1 link: 0 done
1085 14:28:47.716609 PCI: 00:15.1 read_resources bus 2 link: 0
1086 14:28:47.719945 PCI: 00:15.1 read_resources bus 2 link: 0 done
1087 14:28:47.727297 PCI: 00:19.0 read_resources bus 3 link: 0
1088 14:28:47.734497 PCI: 00:19.0 read_resources bus 3 link: 0 done
1089 14:28:47.737489 PCI: 00:1d.0 read_resources bus 1 link: 0
1090 14:28:47.744433 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1091 14:28:47.748048 PCI: 00:1e.2 read_resources bus 4 link: 0
1092 14:28:47.754534 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1093 14:28:47.757717 PCI: 00:1e.3 read_resources bus 5 link: 0
1094 14:28:47.764423 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1095 14:28:47.767535 PCI: 00:1f.0 read_resources bus 0 link: 0
1096 14:28:47.774392 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1097 14:28:47.778265 DOMAIN: 0000 read_resources bus 0 link: 0 done
1098 14:28:47.785039 Root Device read_resources bus 0 link: 0 done
1099 14:28:47.787989 Done reading resources.
1100 14:28:47.791449 Show resources in subtree (Root Device)...After reading.
1101 14:28:47.797964 Root Device child on link 0 CPU_CLUSTER: 0
1102 14:28:47.801290 CPU_CLUSTER: 0 child on link 0 APIC: 00
1103 14:28:47.801836 APIC: 00
1104 14:28:47.804816 APIC: 02
1105 14:28:47.805242 APIC: 01
1106 14:28:47.805581 APIC: 05
1107 14:28:47.808233 APIC: 03
1108 14:28:47.808753 APIC: 04
1109 14:28:47.811527 APIC: 07
1110 14:28:47.812051 APIC: 06
1111 14:28:47.814193 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1112 14:28:47.824374 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1113 14:28:47.880774 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1114 14:28:47.881205 PCI: 00:00.0
1115 14:28:47.881853 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1116 14:28:47.882101 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1117 14:28:47.882316 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1118 14:28:47.882558 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1119 14:28:47.930621 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1120 14:28:47.930881 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1121 14:28:47.931247 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1122 14:28:47.931802 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1123 14:28:47.932780 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1124 14:28:47.933357 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1125 14:28:47.945270 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1126 14:28:47.948855 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1127 14:28:47.959211 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1128 14:28:47.969084 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1129 14:28:47.975365 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1130 14:28:47.985371 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1131 14:28:47.988886 PCI: 00:02.0
1132 14:28:47.998591 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1133 14:28:48.008767 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1134 14:28:48.015323 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1135 14:28:48.018344 PCI: 00:04.0
1136 14:28:48.018767 PCI: 00:08.0
1137 14:28:48.028763 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1138 14:28:48.032478 PCI: 00:12.0
1139 14:28:48.041721 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1140 14:28:48.045279 PCI: 00:14.0 child on link 0 USB0 port 0
1141 14:28:48.054812 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1142 14:28:48.061711 USB0 port 0 child on link 0 USB2 port 0
1143 14:28:48.062165 USB2 port 0
1144 14:28:48.065269 USB2 port 1
1145 14:28:48.065728 USB2 port 2
1146 14:28:48.068585 USB2 port 3
1147 14:28:48.069143 USB2 port 5
1148 14:28:48.071859 USB2 port 6
1149 14:28:48.072277 USB2 port 9
1150 14:28:48.074950 USB3 port 0
1151 14:28:48.075369 USB3 port 1
1152 14:28:48.078696 USB3 port 2
1153 14:28:48.079118 USB3 port 3
1154 14:28:48.081483 USB3 port 4
1155 14:28:48.081946 PCI: 00:14.2
1156 14:28:48.091718 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1157 14:28:48.101671 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1158 14:28:48.105218 PCI: 00:14.3
1159 14:28:48.115157 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1160 14:28:48.118058 PCI: 00:15.0 child on link 0 I2C: 01:15
1161 14:28:48.127755 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1162 14:28:48.131118 I2C: 01:15
1163 14:28:48.134892 PCI: 00:15.1 child on link 0 I2C: 02:5d
1164 14:28:48.145440 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 14:28:48.146040 I2C: 02:5d
1166 14:28:48.148208 GENERIC: 0.0
1167 14:28:48.148627 PCI: 00:16.0
1168 14:28:48.157812 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 14:28:48.160932 PCI: 00:17.0
1170 14:28:48.171525 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1171 14:28:48.178025 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1172 14:28:48.188063 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1173 14:28:48.194179 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1174 14:28:48.204169 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1175 14:28:48.211347 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1176 14:28:48.217911 PCI: 00:19.0 child on link 0 I2C: 03:1a
1177 14:28:48.227793 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1178 14:28:48.228309 I2C: 03:1a
1179 14:28:48.231167 I2C: 03:38
1180 14:28:48.231587 I2C: 03:39
1181 14:28:48.234331 I2C: 03:3a
1182 14:28:48.234747 I2C: 03:3b
1183 14:28:48.237655 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1184 14:28:48.247743 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1185 14:28:48.257356 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1186 14:28:48.267442 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1187 14:28:48.268011 PCI: 01:00.0
1188 14:28:48.277213 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1189 14:28:48.280827 PCI: 00:1e.0
1190 14:28:48.290921 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1191 14:28:48.300487 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1192 14:28:48.304073 PCI: 00:1e.2 child on link 0 SPI: 00
1193 14:28:48.313683 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 14:28:48.316988 SPI: 00
1195 14:28:48.321131 PCI: 00:1e.3 child on link 0 SPI: 01
1196 14:28:48.330487 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 14:28:48.331049 SPI: 01
1198 14:28:48.337104 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1199 14:28:48.343502 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1200 14:28:48.353817 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1201 14:28:48.354356 PNP: 0c09.0
1202 14:28:48.363574 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1203 14:28:48.366845 PCI: 00:1f.3
1204 14:28:48.377465 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1205 14:28:48.386988 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1206 14:28:48.387525 PCI: 00:1f.4
1207 14:28:48.397052 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1208 14:28:48.407197 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1209 14:28:48.407957 PCI: 00:1f.5
1210 14:28:48.416736 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1211 14:28:48.423639 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1212 14:28:48.430500 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1213 14:28:48.437093 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1214 14:28:48.440266 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1215 14:28:48.444104 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1216 14:28:48.446917 PCI: 00:17.0 18 * [0x60 - 0x67] io
1217 14:28:48.450219 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1218 14:28:48.456946 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1219 14:28:48.463457 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1220 14:28:48.473437 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1221 14:28:48.480151 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1222 14:28:48.486316 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1223 14:28:48.489544 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1224 14:28:48.499732 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1225 14:28:48.503442 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1226 14:28:48.510033 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1227 14:28:48.513543 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1228 14:28:48.519684 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1229 14:28:48.523211 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1230 14:28:48.529245 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1231 14:28:48.532646 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1232 14:28:48.536370 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1233 14:28:48.542891 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1234 14:28:48.546613 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1235 14:28:48.553048 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1236 14:28:48.555994 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1237 14:28:48.562540 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1238 14:28:48.565776 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1239 14:28:48.572984 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1240 14:28:48.575993 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1241 14:28:48.582370 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1242 14:28:48.586125 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1243 14:28:48.592840 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1244 14:28:48.596163 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1245 14:28:48.602147 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1246 14:28:48.605710 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1247 14:28:48.612711 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1248 14:28:48.619013 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1249 14:28:48.621958 avoid_fixed_resources: DOMAIN: 0000
1250 14:28:48.628609 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1251 14:28:48.635313 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1252 14:28:48.641943 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1253 14:28:48.648540 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1254 14:28:48.658709 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1255 14:28:48.665385 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1256 14:28:48.672339 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1257 14:28:48.681920 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1258 14:28:48.688907 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1259 14:28:48.695497 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1260 14:28:48.702297 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1261 14:28:48.711998 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1262 14:28:48.712458 Setting resources...
1263 14:28:48.718990 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1264 14:28:48.721810 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1265 14:28:48.728812 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1266 14:28:48.731520 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1267 14:28:48.735106 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1268 14:28:48.741634 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1269 14:28:48.748246 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1270 14:28:48.755546 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1271 14:28:48.761457 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1272 14:28:48.765438 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1273 14:28:48.771687 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1274 14:28:48.774794 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1275 14:28:48.781720 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1276 14:28:48.784805 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1277 14:28:48.792155 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1278 14:28:48.795330 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1279 14:28:48.801754 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1280 14:28:48.804728 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1281 14:28:48.811418 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1282 14:28:48.814579 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1283 14:28:48.821308 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1284 14:28:48.824630 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1285 14:28:48.828095 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1286 14:28:48.834688 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1287 14:28:48.837726 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1288 14:28:48.844491 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1289 14:28:48.847846 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1290 14:28:48.854645 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1291 14:28:48.857719 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1292 14:28:48.864536 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1293 14:28:48.867471 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1294 14:28:48.874142 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1295 14:28:48.881008 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1296 14:28:48.887917 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1297 14:28:48.894533 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1298 14:28:48.903605 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1299 14:28:48.906713 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1300 14:28:48.913689 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1301 14:28:48.919958 Root Device assign_resources, bus 0 link: 0
1302 14:28:48.923698 DOMAIN: 0000 assign_resources, bus 0 link: 0
1303 14:28:48.933454 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1304 14:28:48.940118 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1305 14:28:48.950006 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1306 14:28:48.956978 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1307 14:28:48.966727 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1308 14:28:48.973584 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1309 14:28:48.976506 PCI: 00:14.0 assign_resources, bus 0 link: 0
1310 14:28:48.983434 PCI: 00:14.0 assign_resources, bus 0 link: 0
1311 14:28:48.990373 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1312 14:28:49.000167 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1313 14:28:49.006513 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1314 14:28:49.016556 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1315 14:28:49.019657 PCI: 00:15.0 assign_resources, bus 1 link: 0
1316 14:28:49.026384 PCI: 00:15.0 assign_resources, bus 1 link: 0
1317 14:28:49.033182 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1318 14:28:49.036075 PCI: 00:15.1 assign_resources, bus 2 link: 0
1319 14:28:49.043007 PCI: 00:15.1 assign_resources, bus 2 link: 0
1320 14:28:49.049480 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1321 14:28:49.059329 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1322 14:28:49.066122 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1323 14:28:49.072685 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1324 14:28:49.082775 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1325 14:28:49.089766 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1326 14:28:49.096007 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1327 14:28:49.106167 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1328 14:28:49.109187 PCI: 00:19.0 assign_resources, bus 3 link: 0
1329 14:28:49.115994 PCI: 00:19.0 assign_resources, bus 3 link: 0
1330 14:28:49.122750 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1331 14:28:49.132331 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1332 14:28:49.142743 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1333 14:28:49.145666 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1334 14:28:49.152374 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1335 14:28:49.159469 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1336 14:28:49.165831 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1337 14:28:49.175558 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1338 14:28:49.179235 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1339 14:28:49.185573 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1340 14:28:49.191992 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1341 14:28:49.195225 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1342 14:28:49.202149 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1343 14:28:49.205955 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1344 14:28:49.212147 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1345 14:28:49.215291 LPC: Trying to open IO window from 800 size 1ff
1346 14:28:49.225531 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1347 14:28:49.232397 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1348 14:28:49.241911 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1349 14:28:49.248535 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1350 14:28:49.255524 DOMAIN: 0000 assign_resources, bus 0 link: 0
1351 14:28:49.259181 Root Device assign_resources, bus 0 link: 0
1352 14:28:49.261930 Done setting resources.
1353 14:28:49.268623 Show resources in subtree (Root Device)...After assigning values.
1354 14:28:49.272215 Root Device child on link 0 CPU_CLUSTER: 0
1355 14:28:49.275118 CPU_CLUSTER: 0 child on link 0 APIC: 00
1356 14:28:49.278584 APIC: 00
1357 14:28:49.278703 APIC: 02
1358 14:28:49.278816 APIC: 01
1359 14:28:49.281698 APIC: 05
1360 14:28:49.281786 APIC: 03
1361 14:28:49.285257 APIC: 04
1362 14:28:49.285369 APIC: 07
1363 14:28:49.285479 APIC: 06
1364 14:28:49.291794 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1365 14:28:49.301657 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1366 14:28:49.311866 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1367 14:28:49.311987 PCI: 00:00.0
1368 14:28:49.321413 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1369 14:28:49.331591 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1370 14:28:49.341218 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1371 14:28:49.351541 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1372 14:28:49.361457 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1373 14:28:49.367740 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1374 14:28:49.377691 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1375 14:28:49.387725 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1376 14:28:49.397834 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1377 14:28:49.407613 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1378 14:28:49.414620 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1379 14:28:49.423996 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1380 14:28:49.433858 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1381 14:28:49.444032 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1382 14:28:49.454035 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1383 14:28:49.463637 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1384 14:28:49.463769 PCI: 00:02.0
1385 14:28:49.473894 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1386 14:28:49.486831 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1387 14:28:49.493341 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1388 14:28:49.497178 PCI: 00:04.0
1389 14:28:49.497305 PCI: 00:08.0
1390 14:28:49.510292 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1391 14:28:49.510391 PCI: 00:12.0
1392 14:28:49.520334 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1393 14:28:49.523274 PCI: 00:14.0 child on link 0 USB0 port 0
1394 14:28:49.536714 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1395 14:28:49.539947 USB0 port 0 child on link 0 USB2 port 0
1396 14:28:49.540064 USB2 port 0
1397 14:28:49.543056 USB2 port 1
1398 14:28:49.546977 USB2 port 2
1399 14:28:49.547084 USB2 port 3
1400 14:28:49.549977 USB2 port 5
1401 14:28:49.550086 USB2 port 6
1402 14:28:49.553114 USB2 port 9
1403 14:28:49.553231 USB3 port 0
1404 14:28:49.556240 USB3 port 1
1405 14:28:49.556349 USB3 port 2
1406 14:28:49.560069 USB3 port 3
1407 14:28:49.560189 USB3 port 4
1408 14:28:49.563034 PCI: 00:14.2
1409 14:28:49.572969 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1410 14:28:49.583069 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1411 14:28:49.586049 PCI: 00:14.3
1412 14:28:49.595962 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1413 14:28:49.599568 PCI: 00:15.0 child on link 0 I2C: 01:15
1414 14:28:49.609608 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1415 14:28:49.613060 I2C: 01:15
1416 14:28:49.616068 PCI: 00:15.1 child on link 0 I2C: 02:5d
1417 14:28:49.625942 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1418 14:28:49.626032 I2C: 02:5d
1419 14:28:49.629587 GENERIC: 0.0
1420 14:28:49.629709 PCI: 00:16.0
1421 14:28:49.642780 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1422 14:28:49.642871 PCI: 00:17.0
1423 14:28:49.653033 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1424 14:28:49.662307 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1425 14:28:49.672167 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1426 14:28:49.682266 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1427 14:28:49.688796 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1428 14:28:49.702130 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1429 14:28:49.705565 PCI: 00:19.0 child on link 0 I2C: 03:1a
1430 14:28:49.715550 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1431 14:28:49.715674 I2C: 03:1a
1432 14:28:49.718653 I2C: 03:38
1433 14:28:49.718773 I2C: 03:39
1434 14:28:49.722795 I2C: 03:3a
1435 14:28:49.722916 I2C: 03:3b
1436 14:28:49.728930 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1437 14:28:49.735063 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1438 14:28:49.744952 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1439 14:28:49.758189 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1440 14:28:49.758281 PCI: 01:00.0
1441 14:28:49.768417 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1442 14:28:49.771797 PCI: 00:1e.0
1443 14:28:49.781722 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1444 14:28:49.791515 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1445 14:28:49.795063 PCI: 00:1e.2 child on link 0 SPI: 00
1446 14:28:49.807909 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1447 14:28:49.808003 SPI: 00
1448 14:28:49.811346 PCI: 00:1e.3 child on link 0 SPI: 01
1449 14:28:49.821282 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1450 14:28:49.824338 SPI: 01
1451 14:28:49.827939 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1452 14:28:49.838162 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1453 14:28:49.844502 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1454 14:28:49.847892 PNP: 0c09.0
1455 14:28:49.854200 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1456 14:28:49.857526 PCI: 00:1f.3
1457 14:28:49.867541 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1458 14:28:49.877567 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1459 14:28:49.881093 PCI: 00:1f.4
1460 14:28:49.890652 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1461 14:28:49.900337 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1462 14:28:49.900432 PCI: 00:1f.5
1463 14:28:49.910587 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1464 14:28:49.914068 Done allocating resources.
1465 14:28:49.920778 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1466 14:28:49.923895 Enabling resources...
1467 14:28:49.927250 PCI: 00:00.0 subsystem <- 8086/9b61
1468 14:28:49.930752 PCI: 00:00.0 cmd <- 06
1469 14:28:49.933853 PCI: 00:02.0 subsystem <- 8086/9b41
1470 14:28:49.933940 PCI: 00:02.0 cmd <- 03
1471 14:28:49.937499 PCI: 00:08.0 cmd <- 06
1472 14:28:49.940535 PCI: 00:12.0 subsystem <- 8086/02f9
1473 14:28:49.943873 PCI: 00:12.0 cmd <- 02
1474 14:28:49.947441 PCI: 00:14.0 subsystem <- 8086/02ed
1475 14:28:49.951023 PCI: 00:14.0 cmd <- 02
1476 14:28:49.954048 PCI: 00:14.2 cmd <- 02
1477 14:28:49.957466 PCI: 00:14.3 subsystem <- 8086/02f0
1478 14:28:49.960887 PCI: 00:14.3 cmd <- 02
1479 14:28:49.963804 PCI: 00:15.0 subsystem <- 8086/02e8
1480 14:28:49.967592 PCI: 00:15.0 cmd <- 02
1481 14:28:49.970235 PCI: 00:15.1 subsystem <- 8086/02e9
1482 14:28:49.970317 PCI: 00:15.1 cmd <- 02
1483 14:28:49.977114 PCI: 00:16.0 subsystem <- 8086/02e0
1484 14:28:49.977204 PCI: 00:16.0 cmd <- 02
1485 14:28:49.980334 PCI: 00:17.0 subsystem <- 8086/02d3
1486 14:28:49.983932 PCI: 00:17.0 cmd <- 03
1487 14:28:49.987020 PCI: 00:19.0 subsystem <- 8086/02c5
1488 14:28:49.990632 PCI: 00:19.0 cmd <- 02
1489 14:28:49.993534 PCI: 00:1d.0 bridge ctrl <- 0013
1490 14:28:49.996933 PCI: 00:1d.0 subsystem <- 8086/02b0
1491 14:28:50.000332 PCI: 00:1d.0 cmd <- 06
1492 14:28:50.003882 PCI: 00:1e.0 subsystem <- 8086/02a8
1493 14:28:50.006890 PCI: 00:1e.0 cmd <- 06
1494 14:28:50.010520 PCI: 00:1e.2 subsystem <- 8086/02aa
1495 14:28:50.013873 PCI: 00:1e.2 cmd <- 06
1496 14:28:50.016786 PCI: 00:1e.3 subsystem <- 8086/02ab
1497 14:28:50.020329 PCI: 00:1e.3 cmd <- 02
1498 14:28:50.023804 PCI: 00:1f.0 subsystem <- 8086/0284
1499 14:28:50.023894 PCI: 00:1f.0 cmd <- 407
1500 14:28:50.030618 PCI: 00:1f.3 subsystem <- 8086/02c8
1501 14:28:50.030702 PCI: 00:1f.3 cmd <- 02
1502 14:28:50.033842 PCI: 00:1f.4 subsystem <- 8086/02a3
1503 14:28:50.037705 PCI: 00:1f.4 cmd <- 03
1504 14:28:50.040515 PCI: 00:1f.5 subsystem <- 8086/02a4
1505 14:28:50.044305 PCI: 00:1f.5 cmd <- 406
1506 14:28:50.053366 PCI: 01:00.0 cmd <- 02
1507 14:28:50.058546 done.
1508 14:28:50.071627 ME: Version: 14.0.39.1367
1509 14:28:50.078676 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13
1510 14:28:50.081787 Initializing devices...
1511 14:28:50.081876 Root Device init ...
1512 14:28:50.088075 Chrome EC: Set SMI mask to 0x0000000000000000
1513 14:28:50.091973 Chrome EC: clear events_b mask to 0x0000000000000000
1514 14:28:50.098352 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1515 14:28:50.104755 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1516 14:28:50.111566 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1517 14:28:50.115146 Chrome EC: Set WAKE mask to 0x0000000000000000
1518 14:28:50.117828 Root Device init finished in 35165 usecs
1519 14:28:50.121435 CPU_CLUSTER: 0 init ...
1520 14:28:50.127910 CPU_CLUSTER: 0 init finished in 2448 usecs
1521 14:28:50.132191 PCI: 00:00.0 init ...
1522 14:28:50.135935 CPU TDP: 15 Watts
1523 14:28:50.139098 CPU PL2 = 64 Watts
1524 14:28:50.142216 PCI: 00:00.0 init finished in 7081 usecs
1525 14:28:50.145430 PCI: 00:02.0 init ...
1526 14:28:50.149233 PCI: 00:02.0 init finished in 2245 usecs
1527 14:28:50.152186 PCI: 00:08.0 init ...
1528 14:28:50.155310 PCI: 00:08.0 init finished in 2253 usecs
1529 14:28:50.158989 PCI: 00:12.0 init ...
1530 14:28:50.161969 PCI: 00:12.0 init finished in 2251 usecs
1531 14:28:50.165698 PCI: 00:14.0 init ...
1532 14:28:50.168970 PCI: 00:14.0 init finished in 2251 usecs
1533 14:28:50.172559 PCI: 00:14.2 init ...
1534 14:28:50.175658 PCI: 00:14.2 init finished in 2253 usecs
1535 14:28:50.178758 PCI: 00:14.3 init ...
1536 14:28:50.181915 PCI: 00:14.3 init finished in 2271 usecs
1537 14:28:50.185868 PCI: 00:15.0 init ...
1538 14:28:50.188860 DW I2C bus 0 at 0xd121f000 (400 KHz)
1539 14:28:50.191954 PCI: 00:15.0 init finished in 5975 usecs
1540 14:28:50.196000 PCI: 00:15.1 init ...
1541 14:28:50.198447 DW I2C bus 1 at 0xd1220000 (400 KHz)
1542 14:28:50.202143 PCI: 00:15.1 init finished in 5970 usecs
1543 14:28:50.205542 PCI: 00:16.0 init ...
1544 14:28:50.208961 PCI: 00:16.0 init finished in 2251 usecs
1545 14:28:50.212989 PCI: 00:19.0 init ...
1546 14:28:50.216028 DW I2C bus 4 at 0xd1222000 (400 KHz)
1547 14:28:50.222389 PCI: 00:19.0 init finished in 5977 usecs
1548 14:28:50.222483 PCI: 00:1d.0 init ...
1549 14:28:50.226110 Initializing PCH PCIe bridge.
1550 14:28:50.232339 PCI: 00:1d.0 init finished in 5285 usecs
1551 14:28:50.235820 PCI: 00:1f.0 init ...
1552 14:28:50.238994 IOAPIC: Initializing IOAPIC at 0xfec00000
1553 14:28:50.242252 IOAPIC: Bootstrap Processor Local APIC = 0x00
1554 14:28:50.246135 IOAPIC: ID = 0x02
1555 14:28:50.248912 IOAPIC: Dumping registers
1556 14:28:50.252330 reg 0x0000: 0x02000000
1557 14:28:50.252423 reg 0x0001: 0x00770020
1558 14:28:50.255361 reg 0x0002: 0x00000000
1559 14:28:50.258538 PCI: 00:1f.0 init finished in 23545 usecs
1560 14:28:50.262700 PCI: 00:1f.4 init ...
1561 14:28:50.265649 PCI: 00:1f.4 init finished in 2261 usecs
1562 14:28:50.278367 PCI: 01:00.0 init ...
1563 14:28:50.281545 PCI: 01:00.0 init finished in 2243 usecs
1564 14:28:50.286037 PNP: 0c09.0 init ...
1565 14:28:50.289138 Google Chrome EC uptime: 11.053 seconds
1566 14:28:50.295974 Google Chrome AP resets since EC boot: 0
1567 14:28:50.299129 Google Chrome most recent AP reset causes:
1568 14:28:50.306039 Google Chrome EC reset flags at last EC boot: reset-pin
1569 14:28:50.309059 PNP: 0c09.0 init finished in 20551 usecs
1570 14:28:50.312697 Devices initialized
1571 14:28:50.312789 Show all devs... After init.
1572 14:28:50.315692 Root Device: enabled 1
1573 14:28:50.319300 CPU_CLUSTER: 0: enabled 1
1574 14:28:50.322284 DOMAIN: 0000: enabled 1
1575 14:28:50.322377 APIC: 00: enabled 1
1576 14:28:50.325526 PCI: 00:00.0: enabled 1
1577 14:28:50.329244 PCI: 00:02.0: enabled 1
1578 14:28:50.332789 PCI: 00:04.0: enabled 0
1579 14:28:50.332880 PCI: 00:05.0: enabled 0
1580 14:28:50.335477 PCI: 00:12.0: enabled 1
1581 14:28:50.338821 PCI: 00:12.5: enabled 0
1582 14:28:50.338907 PCI: 00:12.6: enabled 0
1583 14:28:50.342254 PCI: 00:14.0: enabled 1
1584 14:28:50.345347 PCI: 00:14.1: enabled 0
1585 14:28:50.348525 PCI: 00:14.3: enabled 1
1586 14:28:50.348640 PCI: 00:14.5: enabled 0
1587 14:28:50.352259 PCI: 00:15.0: enabled 1
1588 14:28:50.355276 PCI: 00:15.1: enabled 1
1589 14:28:50.359177 PCI: 00:15.2: enabled 0
1590 14:28:50.359288 PCI: 00:15.3: enabled 0
1591 14:28:50.362162 PCI: 00:16.0: enabled 1
1592 14:28:50.365332 PCI: 00:16.1: enabled 0
1593 14:28:50.368806 PCI: 00:16.2: enabled 0
1594 14:28:50.368917 PCI: 00:16.3: enabled 0
1595 14:28:50.371931 PCI: 00:16.4: enabled 0
1596 14:28:50.375538 PCI: 00:16.5: enabled 0
1597 14:28:50.378591 PCI: 00:17.0: enabled 1
1598 14:28:50.378704 PCI: 00:19.0: enabled 1
1599 14:28:50.382287 PCI: 00:19.1: enabled 0
1600 14:28:50.385394 PCI: 00:19.2: enabled 0
1601 14:28:50.385506 PCI: 00:1a.0: enabled 0
1602 14:28:50.388607 PCI: 00:1c.0: enabled 0
1603 14:28:50.391833 PCI: 00:1c.1: enabled 0
1604 14:28:50.394895 PCI: 00:1c.2: enabled 0
1605 14:28:50.394976 PCI: 00:1c.3: enabled 0
1606 14:28:50.398661 PCI: 00:1c.4: enabled 0
1607 14:28:50.401829 PCI: 00:1c.5: enabled 0
1608 14:28:50.405167 PCI: 00:1c.6: enabled 0
1609 14:28:50.405282 PCI: 00:1c.7: enabled 0
1610 14:28:50.408100 PCI: 00:1d.0: enabled 1
1611 14:28:50.411775 PCI: 00:1d.1: enabled 0
1612 14:28:50.414902 PCI: 00:1d.2: enabled 0
1613 14:28:50.415003 PCI: 00:1d.3: enabled 0
1614 14:28:50.418386 PCI: 00:1d.4: enabled 0
1615 14:28:50.421666 PCI: 00:1d.5: enabled 0
1616 14:28:50.421760 PCI: 00:1e.0: enabled 1
1617 14:28:50.425076 PCI: 00:1e.1: enabled 0
1618 14:28:50.428592 PCI: 00:1e.2: enabled 1
1619 14:28:50.431576 PCI: 00:1e.3: enabled 1
1620 14:28:50.431667 PCI: 00:1f.0: enabled 1
1621 14:28:50.434997 PCI: 00:1f.1: enabled 0
1622 14:28:50.437958 PCI: 00:1f.2: enabled 0
1623 14:28:50.441428 PCI: 00:1f.3: enabled 1
1624 14:28:50.441520 PCI: 00:1f.4: enabled 1
1625 14:28:50.444918 PCI: 00:1f.5: enabled 1
1626 14:28:50.448261 PCI: 00:1f.6: enabled 0
1627 14:28:50.451254 USB0 port 0: enabled 1
1628 14:28:50.451350 I2C: 01:15: enabled 1
1629 14:28:50.455100 I2C: 02:5d: enabled 1
1630 14:28:50.458124 GENERIC: 0.0: enabled 1
1631 14:28:50.458215 I2C: 03:1a: enabled 1
1632 14:28:50.461068 I2C: 03:38: enabled 1
1633 14:28:50.464830 I2C: 03:39: enabled 1
1634 14:28:50.464921 I2C: 03:3a: enabled 1
1635 14:28:50.467993 I2C: 03:3b: enabled 1
1636 14:28:50.471270 PCI: 00:00.0: enabled 1
1637 14:28:50.471360 SPI: 00: enabled 1
1638 14:28:50.474644 SPI: 01: enabled 1
1639 14:28:50.477638 PNP: 0c09.0: enabled 1
1640 14:28:50.477729 USB2 port 0: enabled 1
1641 14:28:50.481316 USB2 port 1: enabled 1
1642 14:28:50.484551 USB2 port 2: enabled 0
1643 14:28:50.484642 USB2 port 3: enabled 0
1644 14:28:50.487648 USB2 port 5: enabled 0
1645 14:28:50.491107 USB2 port 6: enabled 1
1646 14:28:50.494343 USB2 port 9: enabled 1
1647 14:28:50.494433 USB3 port 0: enabled 1
1648 14:28:50.497457 USB3 port 1: enabled 1
1649 14:28:50.501305 USB3 port 2: enabled 1
1650 14:28:50.501387 USB3 port 3: enabled 1
1651 14:28:50.504446 USB3 port 4: enabled 0
1652 14:28:50.507563 APIC: 02: enabled 1
1653 14:28:50.507647 APIC: 01: enabled 1
1654 14:28:50.511351 APIC: 05: enabled 1
1655 14:28:50.514479 APIC: 03: enabled 1
1656 14:28:50.514560 APIC: 04: enabled 1
1657 14:28:50.517719 APIC: 07: enabled 1
1658 14:28:50.517800 APIC: 06: enabled 1
1659 14:28:50.521116 PCI: 00:08.0: enabled 1
1660 14:28:50.523993 PCI: 00:14.2: enabled 1
1661 14:28:50.527548 PCI: 01:00.0: enabled 1
1662 14:28:50.531036 Disabling ACPI via APMC:
1663 14:28:50.531113 done.
1664 14:28:50.537494 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1665 14:28:50.541114 ELOG: NV offset 0xaf0000 size 0x4000
1666 14:28:50.547740 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1667 14:28:50.554356 ELOG: Event(17) added with size 13 at 2023-05-30 14:28:50 UTC
1668 14:28:50.560987 ELOG: Event(92) added with size 9 at 2023-05-30 14:28:50 UTC
1669 14:28:50.567743 ELOG: Event(93) added with size 9 at 2023-05-30 14:28:50 UTC
1670 14:28:50.574021 ELOG: Event(9A) added with size 9 at 2023-05-30 14:28:50 UTC
1671 14:28:50.580717 ELOG: Event(9E) added with size 10 at 2023-05-30 14:28:50 UTC
1672 14:28:50.587793 ELOG: Event(9F) added with size 14 at 2023-05-30 14:28:50 UTC
1673 14:28:50.591041 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1674 14:28:50.597708 ELOG: Event(A1) added with size 10 at 2023-05-30 14:28:50 UTC
1675 14:28:50.607723 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1676 14:28:50.614673 ELOG: Event(A0) added with size 9 at 2023-05-30 14:28:50 UTC
1677 14:28:50.617834 elog_add_boot_reason: Logged dev mode boot
1678 14:28:50.617928 Finalize devices...
1679 14:28:50.621001 PCI: 00:17.0 final
1680 14:28:50.624660 Devices finalized
1681 14:28:50.627896 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1682 14:28:50.634636 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1683 14:28:50.638270 ME: HFSTS1 : 0x90000245
1684 14:28:50.641088 ME: HFSTS2 : 0x3B850126
1685 14:28:50.647739 ME: HFSTS3 : 0x00000020
1686 14:28:50.650867 ME: HFSTS4 : 0x00004800
1687 14:28:50.654387 ME: HFSTS5 : 0x00000000
1688 14:28:50.657823 ME: HFSTS6 : 0x40400006
1689 14:28:50.660691 ME: Manufacturing Mode : NO
1690 14:28:50.664177 ME: FW Partition Table : OK
1691 14:28:50.667259 ME: Bringup Loader Failure : NO
1692 14:28:50.670678 ME: Firmware Init Complete : YES
1693 14:28:50.674265 ME: Boot Options Present : NO
1694 14:28:50.677356 ME: Update In Progress : NO
1695 14:28:50.680563 ME: D0i3 Support : YES
1696 14:28:50.683824 ME: Low Power State Enabled : NO
1697 14:28:50.687733 ME: CPU Replaced : NO
1698 14:28:50.690422 ME: CPU Replacement Valid : YES
1699 14:28:50.693920 ME: Current Working State : 5
1700 14:28:50.697258 ME: Current Operation State : 1
1701 14:28:50.700805 ME: Current Operation Mode : 0
1702 14:28:50.703853 ME: Error Code : 0
1703 14:28:50.707006 ME: CPU Debug Disabled : YES
1704 14:28:50.710215 ME: TXT Support : NO
1705 14:28:50.717267 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1706 14:28:50.720283 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1707 14:28:50.723538 CBFS @ c08000 size 3f8000
1708 14:28:50.730371 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1709 14:28:50.733486 CBFS: Locating 'fallback/dsdt.aml'
1710 14:28:50.736978 CBFS: Found @ offset 10bb80 size 3fa5
1711 14:28:50.743625 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1712 14:28:50.746829 CBFS @ c08000 size 3f8000
1713 14:28:50.750314 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1714 14:28:50.753761 CBFS: Locating 'fallback/slic'
1715 14:28:50.758507 CBFS: 'fallback/slic' not found.
1716 14:28:50.764907 ACPI: Writing ACPI tables at 99b3e000.
1717 14:28:50.764994 ACPI: * FACS
1718 14:28:50.768410 ACPI: * DSDT
1719 14:28:50.771922 Ramoops buffer: 0x100000@0x99a3d000.
1720 14:28:50.774798 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1721 14:28:50.781406 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1722 14:28:50.785116 Google Chrome EC: version:
1723 14:28:50.788267 ro: helios_v2.0.2659-56403530b
1724 14:28:50.791513 rw: helios_v2.0.2849-c41de27e7d
1725 14:28:50.791593 running image: 1
1726 14:28:50.795821 ACPI: * FADT
1727 14:28:50.795909 SCI is IRQ9
1728 14:28:50.803060 ACPI: added table 1/32, length now 40
1729 14:28:50.803147 ACPI: * SSDT
1730 14:28:50.805506 Found 1 CPU(s) with 8 core(s) each.
1731 14:28:50.809154 Error: Could not locate 'wifi_sar' in VPD.
1732 14:28:50.815447 Checking CBFS for default SAR values
1733 14:28:50.819272 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1734 14:28:50.822389 CBFS @ c08000 size 3f8000
1735 14:28:50.828787 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1736 14:28:50.832562 CBFS: Locating 'wifi_sar_defaults.hex'
1737 14:28:50.835730 CBFS: Found @ offset 5fac0 size 77
1738 14:28:50.838981 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1739 14:28:50.842040 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1740 14:28:50.848594 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1741 14:28:50.855188 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1742 14:28:50.858617 failed to find key in VPD: dsm_calib_r0_0
1743 14:28:50.868804 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1744 14:28:50.871869 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1745 14:28:50.875384 failed to find key in VPD: dsm_calib_r0_1
1746 14:28:50.885094 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1747 14:28:50.891959 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1748 14:28:50.895285 failed to find key in VPD: dsm_calib_r0_2
1749 14:28:50.904832 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1750 14:28:50.908384 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1751 14:28:50.915061 failed to find key in VPD: dsm_calib_r0_3
1752 14:28:50.921327 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1753 14:28:50.928213 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1754 14:28:50.931344 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1755 14:28:50.935097 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1756 14:28:50.938884 EC returned error result code 1
1757 14:28:50.942840 EC returned error result code 1
1758 14:28:50.946189 EC returned error result code 1
1759 14:28:50.952497 PS2K: Bad resp from EC. Vivaldi disabled!
1760 14:28:50.955973 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1761 14:28:50.962495 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1762 14:28:50.969538 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1763 14:28:50.972490 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1764 14:28:50.978986 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1765 14:28:50.985972 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1766 14:28:50.992465 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1767 14:28:50.995562 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1768 14:28:51.002413 ACPI: added table 2/32, length now 44
1769 14:28:51.002531 ACPI: * MCFG
1770 14:28:51.005357 ACPI: added table 3/32, length now 48
1771 14:28:51.009047 ACPI: * TPM2
1772 14:28:51.012022 TPM2 log created at 99a2d000
1773 14:28:51.015617 ACPI: added table 4/32, length now 52
1774 14:28:51.015731 ACPI: * MADT
1775 14:28:51.018646 SCI is IRQ9
1776 14:28:51.022256 ACPI: added table 5/32, length now 56
1777 14:28:51.022379 current = 99b43ac0
1778 14:28:51.025354 ACPI: * DMAR
1779 14:28:51.028482 ACPI: added table 6/32, length now 60
1780 14:28:51.032329 ACPI: * IGD OpRegion
1781 14:28:51.032443 GMA: Found VBT in CBFS
1782 14:28:51.035475 GMA: Found valid VBT in CBFS
1783 14:28:51.038669 ACPI: added table 7/32, length now 64
1784 14:28:51.041684 ACPI: * HPET
1785 14:28:51.044972 ACPI: added table 8/32, length now 68
1786 14:28:51.045084 ACPI: done.
1787 14:28:51.048745 ACPI tables: 31744 bytes.
1788 14:28:51.052265 smbios_write_tables: 99a2c000
1789 14:28:51.055394 EC returned error result code 3
1790 14:28:51.059163 Couldn't obtain OEM name from CBI
1791 14:28:51.062225 Create SMBIOS type 17
1792 14:28:51.065690 PCI: 00:00.0 (Intel Cannonlake)
1793 14:28:51.069351 PCI: 00:14.3 (Intel WiFi)
1794 14:28:51.072064 SMBIOS tables: 939 bytes.
1795 14:28:51.075652 Writing table forward entry at 0x00000500
1796 14:28:51.082144 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1797 14:28:51.085603 Writing coreboot table at 0x99b62000
1798 14:28:51.091917 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1799 14:28:51.095667 1. 0000000000001000-000000000009ffff: RAM
1800 14:28:51.098496 2. 00000000000a0000-00000000000fffff: RESERVED
1801 14:28:51.105461 3. 0000000000100000-0000000099a2bfff: RAM
1802 14:28:51.108693 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1803 14:28:51.115541 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1804 14:28:51.122074 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1805 14:28:51.125190 7. 000000009a000000-000000009f7fffff: RESERVED
1806 14:28:51.128873 8. 00000000e0000000-00000000efffffff: RESERVED
1807 14:28:51.135064 9. 00000000fc000000-00000000fc000fff: RESERVED
1808 14:28:51.138831 10. 00000000fe000000-00000000fe00ffff: RESERVED
1809 14:28:51.145365 11. 00000000fed10000-00000000fed17fff: RESERVED
1810 14:28:51.148340 12. 00000000fed80000-00000000fed83fff: RESERVED
1811 14:28:51.155377 13. 00000000fed90000-00000000fed91fff: RESERVED
1812 14:28:51.158385 14. 00000000feda0000-00000000feda1fff: RESERVED
1813 14:28:51.161598 15. 0000000100000000-000000045e7fffff: RAM
1814 14:28:51.168238 Graphics framebuffer located at 0xc0000000
1815 14:28:51.171230 Passing 5 GPIOs to payload:
1816 14:28:51.174725 NAME | PORT | POLARITY | VALUE
1817 14:28:51.181477 write protect | undefined | high | low
1818 14:28:51.185019 lid | undefined | high | high
1819 14:28:51.191622 power | undefined | high | low
1820 14:28:51.197845 oprom | undefined | high | low
1821 14:28:51.201259 EC in RW | 0x000000cb | high | low
1822 14:28:51.204926 Board ID: 4
1823 14:28:51.207997 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1824 14:28:51.211148 CBFS @ c08000 size 3f8000
1825 14:28:51.218026 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1826 14:28:51.221188 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1827 14:28:51.224261 coreboot table: 1492 bytes.
1828 14:28:51.227963 IMD ROOT 0. 99fff000 00001000
1829 14:28:51.231377 IMD SMALL 1. 99ffe000 00001000
1830 14:28:51.234367 FSP MEMORY 2. 99c4e000 003b0000
1831 14:28:51.237746 CONSOLE 3. 99c2e000 00020000
1832 14:28:51.241384 FMAP 4. 99c2d000 0000054e
1833 14:28:51.244413 TIME STAMP 5. 99c2c000 00000910
1834 14:28:51.247613 VBOOT WORK 6. 99c18000 00014000
1835 14:28:51.251385 MRC DATA 7. 99c16000 00001958
1836 14:28:51.254482 ROMSTG STCK 8. 99c15000 00001000
1837 14:28:51.257627 AFTER CAR 9. 99c0b000 0000a000
1838 14:28:51.261384 RAMSTAGE 10. 99baf000 0005c000
1839 14:28:51.264341 REFCODE 11. 99b7a000 00035000
1840 14:28:51.268049 SMM BACKUP 12. 99b6a000 00010000
1841 14:28:51.271415 COREBOOT 13. 99b62000 00008000
1842 14:28:51.274193 ACPI 14. 99b3e000 00024000
1843 14:28:51.277674 ACPI GNVS 15. 99b3d000 00001000
1844 14:28:51.281372 RAMOOPS 16. 99a3d000 00100000
1845 14:28:51.284179 TPM2 TCGLOG17. 99a2d000 00010000
1846 14:28:51.287524 SMBIOS 18. 99a2c000 00000800
1847 14:28:51.291170 IMD small region:
1848 14:28:51.294204 IMD ROOT 0. 99ffec00 00000400
1849 14:28:51.297818 FSP RUNTIME 1. 99ffebe0 00000004
1850 14:28:51.301350 EC HOSTEVENT 2. 99ffebc0 00000008
1851 14:28:51.304218 POWER STATE 3. 99ffeb80 00000040
1852 14:28:51.307769 ROMSTAGE 4. 99ffeb60 00000004
1853 14:28:51.311299 MEM INFO 5. 99ffe9a0 000001b9
1854 14:28:51.314306 VPD 6. 99ffe920 0000006c
1855 14:28:51.317369 MTRR: Physical address space:
1856 14:28:51.324330 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1857 14:28:51.331083 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1858 14:28:51.337553 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1859 14:28:51.344151 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1860 14:28:51.350651 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1861 14:28:51.353779 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1862 14:28:51.360708 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1863 14:28:51.367218 MTRR: Fixed MSR 0x250 0x0606060606060606
1864 14:28:51.370557 MTRR: Fixed MSR 0x258 0x0606060606060606
1865 14:28:51.374151 MTRR: Fixed MSR 0x259 0x0000000000000000
1866 14:28:51.377511 MTRR: Fixed MSR 0x268 0x0606060606060606
1867 14:28:51.383961 MTRR: Fixed MSR 0x269 0x0606060606060606
1868 14:28:51.386925 MTRR: Fixed MSR 0x26a 0x0606060606060606
1869 14:28:51.390369 MTRR: Fixed MSR 0x26b 0x0606060606060606
1870 14:28:51.394065 MTRR: Fixed MSR 0x26c 0x0606060606060606
1871 14:28:51.400316 MTRR: Fixed MSR 0x26d 0x0606060606060606
1872 14:28:51.403787 MTRR: Fixed MSR 0x26e 0x0606060606060606
1873 14:28:51.407236 MTRR: Fixed MSR 0x26f 0x0606060606060606
1874 14:28:51.410070 call enable_fixed_mtrr()
1875 14:28:51.413578 CPU physical address size: 39 bits
1876 14:28:51.416679 MTRR: default type WB/UC MTRR counts: 6/8.
1877 14:28:51.420229 MTRR: WB selected as default type.
1878 14:28:51.426840 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1879 14:28:51.433800 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1880 14:28:51.439840 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1881 14:28:51.446553 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1882 14:28:51.453493 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1883 14:28:51.459698 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1884 14:28:51.463454 MTRR: Fixed MSR 0x250 0x0606060606060606
1885 14:28:51.466513 MTRR: Fixed MSR 0x258 0x0606060606060606
1886 14:28:51.473158 MTRR: Fixed MSR 0x259 0x0000000000000000
1887 14:28:51.476367 MTRR: Fixed MSR 0x268 0x0606060606060606
1888 14:28:51.479563 MTRR: Fixed MSR 0x269 0x0606060606060606
1889 14:28:51.483476 MTRR: Fixed MSR 0x26a 0x0606060606060606
1890 14:28:51.489506 MTRR: Fixed MSR 0x26b 0x0606060606060606
1891 14:28:51.493046 MTRR: Fixed MSR 0x26c 0x0606060606060606
1892 14:28:51.496634 MTRR: Fixed MSR 0x26d 0x0606060606060606
1893 14:28:51.499724 MTRR: Fixed MSR 0x26e 0x0606060606060606
1894 14:28:51.506469 MTRR: Fixed MSR 0x26f 0x0606060606060606
1895 14:28:51.506560
1896 14:28:51.506632 MTRR check
1897 14:28:51.509445 Fixed MTRRs : Enabled
1898 14:28:51.512878 Variable MTRRs: Enabled
1899 14:28:51.512969
1900 14:28:51.513041 call enable_fixed_mtrr()
1901 14:28:51.519253 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1902 14:28:51.522804 CPU physical address size: 39 bits
1903 14:28:51.529085 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1904 14:28:51.532727 MTRR: Fixed MSR 0x250 0x0606060606060606
1905 14:28:51.536075 MTRR: Fixed MSR 0x250 0x0606060606060606
1906 14:28:51.539083 MTRR: Fixed MSR 0x258 0x0606060606060606
1907 14:28:51.546135 MTRR: Fixed MSR 0x259 0x0000000000000000
1908 14:28:51.549121 MTRR: Fixed MSR 0x268 0x0606060606060606
1909 14:28:51.552651 MTRR: Fixed MSR 0x269 0x0606060606060606
1910 14:28:51.555714 MTRR: Fixed MSR 0x26a 0x0606060606060606
1911 14:28:51.562815 MTRR: Fixed MSR 0x26b 0x0606060606060606
1912 14:28:51.566026 MTRR: Fixed MSR 0x26c 0x0606060606060606
1913 14:28:51.569139 MTRR: Fixed MSR 0x26d 0x0606060606060606
1914 14:28:51.572128 MTRR: Fixed MSR 0x26e 0x0606060606060606
1915 14:28:51.578914 MTRR: Fixed MSR 0x26f 0x0606060606060606
1916 14:28:51.582732 MTRR: Fixed MSR 0x258 0x0606060606060606
1917 14:28:51.585953 MTRR: Fixed MSR 0x259 0x0000000000000000
1918 14:28:51.589030 MTRR: Fixed MSR 0x268 0x0606060606060606
1919 14:28:51.595844 MTRR: Fixed MSR 0x269 0x0606060606060606
1920 14:28:51.598975 MTRR: Fixed MSR 0x26a 0x0606060606060606
1921 14:28:51.602346 MTRR: Fixed MSR 0x26b 0x0606060606060606
1922 14:28:51.605509 MTRR: Fixed MSR 0x26c 0x0606060606060606
1923 14:28:51.612729 MTRR: Fixed MSR 0x26d 0x0606060606060606
1924 14:28:51.615920 MTRR: Fixed MSR 0x26e 0x0606060606060606
1925 14:28:51.618638 MTRR: Fixed MSR 0x26f 0x0606060606060606
1926 14:28:51.622112 call enable_fixed_mtrr()
1927 14:28:51.625511 call enable_fixed_mtrr()
1928 14:28:51.628554 MTRR: Fixed MSR 0x250 0x0606060606060606
1929 14:28:51.631981 MTRR: Fixed MSR 0x250 0x0606060606060606
1930 14:28:51.635759 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 14:28:51.642144 MTRR: Fixed MSR 0x259 0x0000000000000000
1932 14:28:51.645325 MTRR: Fixed MSR 0x268 0x0606060606060606
1933 14:28:51.648414 MTRR: Fixed MSR 0x269 0x0606060606060606
1934 14:28:51.652136 MTRR: Fixed MSR 0x26a 0x0606060606060606
1935 14:28:51.655153 MTRR: Fixed MSR 0x26b 0x0606060606060606
1936 14:28:51.661970 MTRR: Fixed MSR 0x26c 0x0606060606060606
1937 14:28:51.665054 MTRR: Fixed MSR 0x26d 0x0606060606060606
1938 14:28:51.668406 MTRR: Fixed MSR 0x26e 0x0606060606060606
1939 14:28:51.671972 MTRR: Fixed MSR 0x26f 0x0606060606060606
1940 14:28:51.678133 MTRR: Fixed MSR 0x258 0x0606060606060606
1941 14:28:51.681790 call enable_fixed_mtrr()
1942 14:28:51.684831 MTRR: Fixed MSR 0x250 0x0606060606060606
1943 14:28:51.688248 MTRR: Fixed MSR 0x250 0x0606060606060606
1944 14:28:51.691972 MTRR: Fixed MSR 0x258 0x0606060606060606
1945 14:28:51.695036 MTRR: Fixed MSR 0x259 0x0000000000000000
1946 14:28:51.701842 MTRR: Fixed MSR 0x268 0x0606060606060606
1947 14:28:51.705131 MTRR: Fixed MSR 0x269 0x0606060606060606
1948 14:28:51.708348 MTRR: Fixed MSR 0x26a 0x0606060606060606
1949 14:28:51.711691 MTRR: Fixed MSR 0x26b 0x0606060606060606
1950 14:28:51.718092 MTRR: Fixed MSR 0x26c 0x0606060606060606
1951 14:28:51.721823 MTRR: Fixed MSR 0x26d 0x0606060606060606
1952 14:28:51.724730 MTRR: Fixed MSR 0x26e 0x0606060606060606
1953 14:28:51.727708 MTRR: Fixed MSR 0x26f 0x0606060606060606
1954 14:28:51.734472 MTRR: Fixed MSR 0x258 0x0606060606060606
1955 14:28:51.734564 call enable_fixed_mtrr()
1956 14:28:51.741695 MTRR: Fixed MSR 0x259 0x0000000000000000
1957 14:28:51.744256 MTRR: Fixed MSR 0x268 0x0606060606060606
1958 14:28:51.747850 MTRR: Fixed MSR 0x269 0x0606060606060606
1959 14:28:51.750883 MTRR: Fixed MSR 0x26a 0x0606060606060606
1960 14:28:51.757459 MTRR: Fixed MSR 0x26b 0x0606060606060606
1961 14:28:51.761196 MTRR: Fixed MSR 0x26c 0x0606060606060606
1962 14:28:51.764609 MTRR: Fixed MSR 0x26d 0x0606060606060606
1963 14:28:51.767645 MTRR: Fixed MSR 0x26e 0x0606060606060606
1964 14:28:51.774566 MTRR: Fixed MSR 0x26f 0x0606060606060606
1965 14:28:51.777784 CPU physical address size: 39 bits
1966 14:28:51.780923 call enable_fixed_mtrr()
1967 14:28:51.781046 CBFS @ c08000 size 3f8000
1968 14:28:51.787676 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1969 14:28:51.790762 CPU physical address size: 39 bits
1970 14:28:51.793980 CPU physical address size: 39 bits
1971 14:28:51.797207 CPU physical address size: 39 bits
1972 14:28:51.804220 MTRR: Fixed MSR 0x259 0x0000000000000000
1973 14:28:51.807140 MTRR: Fixed MSR 0x268 0x0606060606060606
1974 14:28:51.810889 MTRR: Fixed MSR 0x269 0x0606060606060606
1975 14:28:51.813959 MTRR: Fixed MSR 0x26a 0x0606060606060606
1976 14:28:51.820589 MTRR: Fixed MSR 0x26b 0x0606060606060606
1977 14:28:51.823819 MTRR: Fixed MSR 0x26c 0x0606060606060606
1978 14:28:51.827513 MTRR: Fixed MSR 0x26d 0x0606060606060606
1979 14:28:51.830339 MTRR: Fixed MSR 0x26e 0x0606060606060606
1980 14:28:51.837389 MTRR: Fixed MSR 0x26f 0x0606060606060606
1981 14:28:51.840711 CPU physical address size: 39 bits
1982 14:28:51.840802 call enable_fixed_mtrr()
1983 14:28:51.843594 CBFS: Locating 'fallback/payload'
1984 14:28:51.847123 CPU physical address size: 39 bits
1985 14:28:51.853982 CBFS: Found @ offset 1c96c0 size 3f798
1986 14:28:51.857291 Checking segment from ROM address 0xffdd16f8
1987 14:28:51.860508 Checking segment from ROM address 0xffdd1714
1988 14:28:51.866911 Loading segment from ROM address 0xffdd16f8
1989 14:28:51.867004 code (compression=0)
1990 14:28:51.876829 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1991 14:28:51.886793 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1992 14:28:51.886887 it's not compressed!
1993 14:28:51.979501 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1994 14:28:51.986330 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1995 14:28:51.989431 Loading segment from ROM address 0xffdd1714
1996 14:28:51.993076 Entry Point 0x30000000
1997 14:28:51.996220 Loaded segments
1998 14:28:52.001859 Finalizing chipset.
1999 14:28:52.005140 Finalizing SMM.
2000 14:28:52.008782 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2001 14:28:52.011822 mp_park_aps done after 0 msecs.
2002 14:28:52.018872 Jumping to boot code at 30000000(99b62000)
2003 14:28:52.024930 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2004 14:28:52.025023
2005 14:28:52.025096
2006 14:28:52.025171
2007 14:28:52.028127 Starting depthcharge on Helios...
2008 14:28:52.028220
2009 14:28:52.028586 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2010 14:28:52.028700 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2011 14:28:52.028798 Setting prompt string to ['hatch:']
2012 14:28:52.028890 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2013 14:28:52.038354 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2014 14:28:52.038454
2015 14:28:52.044625 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2016 14:28:52.044725
2017 14:28:52.051368 board_setup: Info: eMMC controller not present; skipping
2018 14:28:52.051472
2019 14:28:52.054701 New NVMe Controller 0x30053ac0 @ 00:1d:00
2020 14:28:52.054788
2021 14:28:52.061553 board_setup: Info: SDHCI controller not present; skipping
2022 14:28:52.061656
2023 14:28:52.064641 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2024 14:28:52.068325
2025 14:28:52.068418 Wipe memory regions:
2026 14:28:52.068491
2027 14:28:52.071610 [0x00000000001000, 0x000000000a0000)
2028 14:28:52.071703
2029 14:28:52.074635 [0x00000000100000, 0x00000030000000)
2030 14:28:52.141234
2031 14:28:52.144164 [0x00000030657430, 0x00000099a2c000)
2032 14:28:52.290736
2033 14:28:52.294105 [0x00000100000000, 0x0000045e800000)
2034 14:28:53.751125
2035 14:28:53.751295 R8152: Initializing
2036 14:28:53.751374
2037 14:28:53.754148 Version 9 (ocp_data = 6010)
2038 14:28:53.757876
2039 14:28:53.757970 R8152: Done initializing
2040 14:28:53.758045
2041 14:28:53.761538 Adding net device
2042 14:28:54.244204
2043 14:28:54.244363 R8152: Initializing
2044 14:28:54.244442
2045 14:28:54.247567 Version 6 (ocp_data = 5c30)
2046 14:28:54.247677
2047 14:28:54.250679 R8152: Done initializing
2048 14:28:54.250772
2049 14:28:54.254153 net_add_device: Attemp to include the same device
2050 14:28:54.257496
2051 14:28:54.264580 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2052 14:28:54.264675
2053 14:28:54.264747
2054 14:28:54.264813
2055 14:28:54.265107 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2057 14:28:54.365482 hatch: tftpboot 192.168.201.1 10525244/tftp-deploy-cd4o9ppk/kernel/bzImage 10525244/tftp-deploy-cd4o9ppk/kernel/cmdline 10525244/tftp-deploy-cd4o9ppk/ramdisk/ramdisk.cpio.gz
2058 14:28:54.365688 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2059 14:28:54.365781 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2060 14:28:54.370436 tftpboot 192.168.201.1 10525244/tftp-deploy-cd4o9ppk/kernel/bzImaploy-cd4o9ppk/kernel/cmdline 10525244/tftp-deploy-cd4o9ppk/ramdisk/ramdisk.cpio.gz
2061 14:28:54.370536
2062 14:28:54.370611 Waiting for link
2063 14:28:54.571063
2064 14:28:54.571231 done.
2065 14:28:54.571310
2066 14:28:54.571380 MAC: 00:24:32:50:1a:59
2067 14:28:54.571446
2068 14:28:54.574626 Sending DHCP discover... done.
2069 14:28:54.574730
2070 14:28:54.577744 Waiting for reply... done.
2071 14:28:54.577838
2072 14:28:54.580976 Sending DHCP request... done.
2073 14:28:54.581070
2074 14:28:54.584502 Waiting for reply... done.
2075 14:28:54.584596
2076 14:28:54.587559 My ip is 192.168.201.14
2077 14:28:54.587653
2078 14:28:54.590728 The DHCP server ip is 192.168.201.1
2079 14:28:54.590822
2080 14:28:54.594607 TFTP server IP predefined by user: 192.168.201.1
2081 14:28:54.594702
2082 14:28:54.601251 Bootfile predefined by user: 10525244/tftp-deploy-cd4o9ppk/kernel/bzImage
2083 14:28:54.601344
2084 14:28:54.604253 Sending tftp read request... done.
2085 14:28:54.604346
2086 14:28:54.611162 Waiting for the transfer...
2087 14:28:54.611258
2088 14:28:55.204495 00000000 ################################################################
2089 14:28:55.204654
2090 14:28:55.753334 00080000 ################################################################
2091 14:28:55.753494
2092 14:28:56.279739 00100000 ################################################################
2093 14:28:56.279903
2094 14:28:56.818179 00180000 ################################################################
2095 14:28:56.818341
2096 14:28:57.363610 00200000 ################################################################
2097 14:28:57.363806
2098 14:28:57.950157 00280000 ################################################################
2099 14:28:57.950319
2100 14:28:58.489882 00300000 ################################################################
2101 14:28:58.490044
2102 14:28:59.059312 00380000 ################################################################
2103 14:28:59.059480
2104 14:28:59.635121 00400000 ################################################################
2105 14:28:59.635668
2106 14:29:00.227487 00480000 ################################################################
2107 14:29:00.227660
2108 14:29:00.779506 00500000 ################################################################
2109 14:29:00.779670
2110 14:29:01.346115 00580000 ################################################################
2111 14:29:01.346275
2112 14:29:01.921570 00600000 ################################################################
2113 14:29:01.921741
2114 14:29:02.545387 00680000 ################################################################
2115 14:29:02.545949
2116 14:29:03.200149 00700000 ################################################################
2117 14:29:03.200686
2118 14:29:03.854733 00780000 ################################################################
2119 14:29:03.855242
2120 14:29:04.458979 00800000 ################################################################
2121 14:29:04.459146
2122 14:29:05.111212 00880000 ################################################################
2123 14:29:05.111733
2124 14:29:05.730668 00900000 ################################################################
2125 14:29:05.731241
2126 14:29:06.346519 00980000 ################################################################
2127 14:29:06.346686
2128 14:29:06.737212 00a00000 ############################################## done.
2129 14:29:06.737376
2130 14:29:06.740309 The bootfile was 10858496 bytes long.
2131 14:29:06.740404
2132 14:29:06.744009 Sending tftp read request... done.
2133 14:29:06.744110
2134 14:29:06.746892 Waiting for the transfer...
2135 14:29:06.746985
2136 14:29:07.377040 00000000 ################################################################
2137 14:29:07.377203
2138 14:29:08.008160 00080000 ################################################################
2139 14:29:08.008684
2140 14:29:08.699871 00100000 ################################################################
2141 14:29:08.700428
2142 14:29:09.389676 00180000 ################################################################
2143 14:29:09.390201
2144 14:29:09.994270 00200000 ################################################################
2145 14:29:09.994808
2146 14:29:10.663477 00280000 ################################################################
2147 14:29:10.663986
2148 14:29:11.256706 00300000 ################################################################
2149 14:29:11.256886
2150 14:29:11.890514 00380000 ################################################################
2151 14:29:11.891083
2152 14:29:12.599474 00400000 ################################################################
2153 14:29:12.600056
2154 14:29:13.316916 00480000 ################################################################
2155 14:29:13.317650
2156 14:29:14.024928 00500000 ################################################################
2157 14:29:14.025473
2158 14:29:14.741432 00580000 ################################################################
2159 14:29:14.741982
2160 14:29:14.880622 00600000 ############# done.
2161 14:29:14.881172
2162 14:29:14.884041 Sending tftp read request... done.
2163 14:29:14.884469
2164 14:29:14.887325 Waiting for the transfer...
2165 14:29:14.887755
2166 14:29:14.888095 00000000 # done.
2167 14:29:14.888423
2168 14:29:14.897431 Command line loaded dynamically from TFTP file: 10525244/tftp-deploy-cd4o9ppk/kernel/cmdline
2169 14:29:14.897958
2170 14:29:14.924165 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10525244/extract-nfsrootfs-i3hh2jim,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2171 14:29:14.924712
2172 14:29:14.930662 ec_init(0): CrosEC protocol v3 supported (256, 256)
2173 14:29:14.935026
2174 14:29:14.937888 Shutting down all USB controllers.
2175 14:29:14.938314
2176 14:29:14.938654 Removing current net device
2177 14:29:14.942047
2178 14:29:14.942473 Finalizing coreboot
2179 14:29:14.942814
2180 14:29:14.948610 Exiting depthcharge with code 4 at timestamp: 30271699
2181 14:29:14.949143
2182 14:29:14.949484
2183 14:29:14.949858 Starting kernel ...
2184 14:29:14.950176
2185 14:29:14.950476
2186 14:29:14.951657 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
2187 14:29:14.952152 start: 2.2.5 auto-login-action (timeout 00:04:19) [common]
2188 14:29:14.952530 Setting prompt string to ['Linux version [0-9]']
2189 14:29:14.952877 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2190 14:29:14.953226 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2192 14:33:33.952409 end: 2.2.5 auto-login-action (duration 00:04:19) [common]
2194 14:33:33.952639 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 259 seconds'
2196 14:33:33.952812 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2199 14:33:33.953098 end: 2 depthcharge-action (duration 00:05:00) [common]
2201 14:33:33.953379 Cleaning after the job
2202 14:33:33.953479 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10525244/tftp-deploy-cd4o9ppk/ramdisk
2203 14:33:33.954468 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10525244/tftp-deploy-cd4o9ppk/kernel
2204 14:33:33.955945 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10525244/tftp-deploy-cd4o9ppk/nfsrootfs
2205 14:33:34.050104 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10525244/tftp-deploy-cd4o9ppk/modules
2206 14:33:34.050837 start: 4.1 power-off (timeout 00:00:30) [common]
2207 14:33:34.051031 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2208 14:33:34.129254 >> Command sent successfully.
2209 14:33:34.131788 Returned 0 in 0 seconds
2210 14:33:34.232207 end: 4.1 power-off (duration 00:00:00) [common]
2212 14:33:34.232569 start: 4.2 read-feedback (timeout 00:10:00) [common]
2213 14:33:34.232853 Listened to connection for namespace 'common' for up to 1s
2215 14:33:34.233259 Listened to connection for namespace 'common' for up to 1s
2216 14:33:35.233708 Finalising connection for namespace 'common'
2217 14:33:35.233889 Disconnecting from shell: Finalise
2218 14:33:35.233977
2219 14:33:35.334288 end: 4.2 read-feedback (duration 00:00:01) [common]
2220 14:33:35.334449 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10525244
2221 14:33:35.774658 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10525244
2222 14:33:35.774863 JobError: Your job cannot terminate cleanly.