Boot log: acer-cb317-1h-c3z6-dedede
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
1 11:27:37.830663 lava-dispatcher, installed at version: 2023.05.1
2 11:27:37.830868 start: 0 validate
3 11:27:37.830996 Start time: 2023-06-09 11:27:37.830989+00:00 (UTC)
4 11:27:37.831112 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:27:37.831276 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230527.0%2Fx86%2Frootfs.cpio.gz exists
6 11:27:38.114281 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:27:38.115104 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.283-cip98-224-g5f5303d7920a9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:27:38.372275 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:27:38.373057 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.283-cip98-224-g5f5303d7920a9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 11:27:41.693964 validate duration: 3.86
12 11:27:41.694269 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 11:27:41.694365 start: 1.1 download-retry (timeout 00:10:00) [common]
14 11:27:41.694451 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 11:27:41.694569 Not decompressing ramdisk as can be used compressed.
16 11:27:41.694652 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230527.0/x86/rootfs.cpio.gz
17 11:27:41.694715 saving as /var/lib/lava/dispatcher/tmp/10657506/tftp-deploy-4s6mispj/ramdisk/rootfs.cpio.gz
18 11:27:41.694773 total size: 8430069 (8MB)
19 11:27:42.354628 progress 0% (0MB)
20 11:27:42.360142 progress 5% (0MB)
21 11:27:42.362327 progress 10% (0MB)
22 11:27:42.364713 progress 15% (1MB)
23 11:27:42.367005 progress 20% (1MB)
24 11:27:42.369302 progress 25% (2MB)
25 11:27:42.371596 progress 30% (2MB)
26 11:27:42.373889 progress 35% (2MB)
27 11:27:42.376012 progress 40% (3MB)
28 11:27:42.378306 progress 45% (3MB)
29 11:27:42.380604 progress 50% (4MB)
30 11:27:42.382882 progress 55% (4MB)
31 11:27:42.385144 progress 60% (4MB)
32 11:27:42.387404 progress 65% (5MB)
33 11:27:42.389660 progress 70% (5MB)
34 11:27:42.391705 progress 75% (6MB)
35 11:27:42.393812 progress 80% (6MB)
36 11:27:42.395979 progress 85% (6MB)
37 11:27:42.398085 progress 90% (7MB)
38 11:27:42.400338 progress 95% (7MB)
39 11:27:42.402463 progress 100% (8MB)
40 11:27:42.402595 8MB downloaded in 0.71s (11.36MB/s)
41 11:27:42.402744 end: 1.1.1 http-download (duration 00:00:01) [common]
43 11:27:42.402975 end: 1.1 download-retry (duration 00:00:01) [common]
44 11:27:42.403060 start: 1.2 download-retry (timeout 00:09:59) [common]
45 11:27:42.403173 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 11:27:42.403317 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.283-cip98-224-g5f5303d7920a9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 11:27:42.403384 saving as /var/lib/lava/dispatcher/tmp/10657506/tftp-deploy-4s6mispj/kernel/bzImage
48 11:27:42.403443 total size: 10863104 (10MB)
49 11:27:42.403502 No compression specified
50 11:27:42.404574 progress 0% (0MB)
51 11:27:42.407314 progress 5% (0MB)
52 11:27:42.410105 progress 10% (1MB)
53 11:27:42.412816 progress 15% (1MB)
54 11:27:42.415680 progress 20% (2MB)
55 11:27:42.418306 progress 25% (2MB)
56 11:27:42.421170 progress 30% (3MB)
57 11:27:42.424027 progress 35% (3MB)
58 11:27:42.426665 progress 40% (4MB)
59 11:27:42.429493 progress 45% (4MB)
60 11:27:42.432173 progress 50% (5MB)
61 11:27:42.434971 progress 55% (5MB)
62 11:27:42.437608 progress 60% (6MB)
63 11:27:42.440419 progress 65% (6MB)
64 11:27:42.443168 progress 70% (7MB)
65 11:27:42.445754 progress 75% (7MB)
66 11:27:42.448550 progress 80% (8MB)
67 11:27:42.451133 progress 85% (8MB)
68 11:27:42.453905 progress 90% (9MB)
69 11:27:42.456490 progress 95% (9MB)
70 11:27:42.459288 progress 100% (10MB)
71 11:27:42.459457 10MB downloaded in 0.06s (184.96MB/s)
72 11:27:42.459594 end: 1.2.1 http-download (duration 00:00:00) [common]
74 11:27:42.459814 end: 1.2 download-retry (duration 00:00:00) [common]
75 11:27:42.459901 start: 1.3 download-retry (timeout 00:09:59) [common]
76 11:27:42.459986 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 11:27:42.460116 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.283-cip98-224-g5f5303d7920a9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 11:27:42.460183 saving as /var/lib/lava/dispatcher/tmp/10657506/tftp-deploy-4s6mispj/modules/modules.tar
79 11:27:42.460243 total size: 484428 (0MB)
80 11:27:42.460302 Using unxz to decompress xz
81 11:27:42.464139 progress 6% (0MB)
82 11:27:42.464522 progress 13% (0MB)
83 11:27:42.464753 progress 20% (0MB)
84 11:27:42.466196 progress 27% (0MB)
85 11:27:42.468308 progress 33% (0MB)
86 11:27:42.470510 progress 40% (0MB)
87 11:27:42.473179 progress 47% (0MB)
88 11:27:42.475271 progress 54% (0MB)
89 11:27:42.477006 progress 60% (0MB)
90 11:27:42.478938 progress 67% (0MB)
91 11:27:42.481021 progress 74% (0MB)
92 11:27:42.483057 progress 81% (0MB)
93 11:27:42.484979 progress 87% (0MB)
94 11:27:42.486991 progress 94% (0MB)
95 11:27:42.488959 progress 100% (0MB)
96 11:27:42.495121 0MB downloaded in 0.03s (13.25MB/s)
97 11:27:42.495433 end: 1.3.1 http-download (duration 00:00:00) [common]
99 11:27:42.495690 end: 1.3 download-retry (duration 00:00:00) [common]
100 11:27:42.495785 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
101 11:27:42.495883 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
102 11:27:42.495964 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 11:27:42.496049 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
104 11:27:42.496265 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10657506/lava-overlay-ymqostu5
105 11:27:42.496393 makedir: /var/lib/lava/dispatcher/tmp/10657506/lava-overlay-ymqostu5/lava-10657506/bin
106 11:27:42.496496 makedir: /var/lib/lava/dispatcher/tmp/10657506/lava-overlay-ymqostu5/lava-10657506/tests
107 11:27:42.496591 makedir: /var/lib/lava/dispatcher/tmp/10657506/lava-overlay-ymqostu5/lava-10657506/results
108 11:27:42.496703 Creating /var/lib/lava/dispatcher/tmp/10657506/lava-overlay-ymqostu5/lava-10657506/bin/lava-add-keys
109 11:27:42.496846 Creating /var/lib/lava/dispatcher/tmp/10657506/lava-overlay-ymqostu5/lava-10657506/bin/lava-add-sources
110 11:27:42.496975 Creating /var/lib/lava/dispatcher/tmp/10657506/lava-overlay-ymqostu5/lava-10657506/bin/lava-background-process-start
111 11:27:42.497122 Creating /var/lib/lava/dispatcher/tmp/10657506/lava-overlay-ymqostu5/lava-10657506/bin/lava-background-process-stop
112 11:27:42.497258 Creating /var/lib/lava/dispatcher/tmp/10657506/lava-overlay-ymqostu5/lava-10657506/bin/lava-common-functions
113 11:27:42.497380 Creating /var/lib/lava/dispatcher/tmp/10657506/lava-overlay-ymqostu5/lava-10657506/bin/lava-echo-ipv4
114 11:27:42.497501 Creating /var/lib/lava/dispatcher/tmp/10657506/lava-overlay-ymqostu5/lava-10657506/bin/lava-install-packages
115 11:27:42.497620 Creating /var/lib/lava/dispatcher/tmp/10657506/lava-overlay-ymqostu5/lava-10657506/bin/lava-installed-packages
116 11:27:42.497739 Creating /var/lib/lava/dispatcher/tmp/10657506/lava-overlay-ymqostu5/lava-10657506/bin/lava-os-build
117 11:27:42.497859 Creating /var/lib/lava/dispatcher/tmp/10657506/lava-overlay-ymqostu5/lava-10657506/bin/lava-probe-channel
118 11:27:42.497978 Creating /var/lib/lava/dispatcher/tmp/10657506/lava-overlay-ymqostu5/lava-10657506/bin/lava-probe-ip
119 11:27:42.498097 Creating /var/lib/lava/dispatcher/tmp/10657506/lava-overlay-ymqostu5/lava-10657506/bin/lava-target-ip
120 11:27:42.498217 Creating /var/lib/lava/dispatcher/tmp/10657506/lava-overlay-ymqostu5/lava-10657506/bin/lava-target-mac
121 11:27:42.498338 Creating /var/lib/lava/dispatcher/tmp/10657506/lava-overlay-ymqostu5/lava-10657506/bin/lava-target-storage
122 11:27:42.498462 Creating /var/lib/lava/dispatcher/tmp/10657506/lava-overlay-ymqostu5/lava-10657506/bin/lava-test-case
123 11:27:42.498584 Creating /var/lib/lava/dispatcher/tmp/10657506/lava-overlay-ymqostu5/lava-10657506/bin/lava-test-event
124 11:27:42.498704 Creating /var/lib/lava/dispatcher/tmp/10657506/lava-overlay-ymqostu5/lava-10657506/bin/lava-test-feedback
125 11:27:42.498824 Creating /var/lib/lava/dispatcher/tmp/10657506/lava-overlay-ymqostu5/lava-10657506/bin/lava-test-raise
126 11:27:42.498947 Creating /var/lib/lava/dispatcher/tmp/10657506/lava-overlay-ymqostu5/lava-10657506/bin/lava-test-reference
127 11:27:42.499072 Creating /var/lib/lava/dispatcher/tmp/10657506/lava-overlay-ymqostu5/lava-10657506/bin/lava-test-runner
128 11:27:42.499249 Creating /var/lib/lava/dispatcher/tmp/10657506/lava-overlay-ymqostu5/lava-10657506/bin/lava-test-set
129 11:27:42.499373 Creating /var/lib/lava/dispatcher/tmp/10657506/lava-overlay-ymqostu5/lava-10657506/bin/lava-test-shell
130 11:27:42.499498 Updating /var/lib/lava/dispatcher/tmp/10657506/lava-overlay-ymqostu5/lava-10657506/bin/lava-install-packages (oe)
131 11:27:42.499647 Updating /var/lib/lava/dispatcher/tmp/10657506/lava-overlay-ymqostu5/lava-10657506/bin/lava-installed-packages (oe)
132 11:27:42.499765 Creating /var/lib/lava/dispatcher/tmp/10657506/lava-overlay-ymqostu5/lava-10657506/environment
133 11:27:42.499862 LAVA metadata
134 11:27:42.499934 - LAVA_JOB_ID=10657506
135 11:27:42.499999 - LAVA_DISPATCHER_IP=192.168.201.1
136 11:27:42.500099 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
137 11:27:42.500166 skipped lava-vland-overlay
138 11:27:42.500237 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 11:27:42.500319 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
140 11:27:42.500380 skipped lava-multinode-overlay
141 11:27:42.500453 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 11:27:42.500530 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
143 11:27:42.500607 Loading test definitions
144 11:27:42.500699 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
145 11:27:42.500772 Using /lava-10657506 at stage 0
146 11:27:42.501084 uuid=10657506_1.4.2.3.1 testdef=None
147 11:27:42.501174 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 11:27:42.501257 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
149 11:27:42.501789 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 11:27:42.502011 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
152 11:27:42.502641 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 11:27:42.502872 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
155 11:27:42.503528 runner path: /var/lib/lava/dispatcher/tmp/10657506/lava-overlay-ymqostu5/lava-10657506/0/tests/0_dmesg test_uuid 10657506_1.4.2.3.1
156 11:27:42.503681 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 11:27:42.503911 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
159 11:27:42.503982 Using /lava-10657506 at stage 1
160 11:27:42.504264 uuid=10657506_1.4.2.3.5 testdef=None
161 11:27:42.504352 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 11:27:42.504436 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
163 11:27:42.504898 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 11:27:42.505115 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
166 11:27:42.505749 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 11:27:42.505978 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
169 11:27:42.506591 runner path: /var/lib/lava/dispatcher/tmp/10657506/lava-overlay-ymqostu5/lava-10657506/1/tests/1_bootrr test_uuid 10657506_1.4.2.3.5
170 11:27:42.506739 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 11:27:42.506942 Creating lava-test-runner.conf files
173 11:27:42.507005 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10657506/lava-overlay-ymqostu5/lava-10657506/0 for stage 0
174 11:27:42.507091 - 0_dmesg
175 11:27:42.507205 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10657506/lava-overlay-ymqostu5/lava-10657506/1 for stage 1
176 11:27:42.507294 - 1_bootrr
177 11:27:42.507386 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 11:27:42.507472 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
179 11:27:42.515797 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 11:27:42.515899 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
181 11:27:42.515986 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 11:27:42.516071 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 11:27:42.516158 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
184 11:27:42.754395 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 11:27:42.754779 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
186 11:27:42.754896 extracting modules file /var/lib/lava/dispatcher/tmp/10657506/tftp-deploy-4s6mispj/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10657506/extract-overlay-ramdisk-e2oy0v3v/ramdisk
187 11:27:42.775266 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 11:27:42.775397 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
189 11:27:42.775490 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10657506/compress-overlay-t8b8h7s5/overlay-1.4.2.4.tar.gz to ramdisk
190 11:27:42.775564 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10657506/compress-overlay-t8b8h7s5/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10657506/extract-overlay-ramdisk-e2oy0v3v/ramdisk
191 11:27:42.783559 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 11:27:42.783741 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
193 11:27:42.783841 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 11:27:42.783931 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
195 11:27:42.784008 Building ramdisk /var/lib/lava/dispatcher/tmp/10657506/extract-overlay-ramdisk-e2oy0v3v/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10657506/extract-overlay-ramdisk-e2oy0v3v/ramdisk
196 11:27:42.916590 >> 53980 blocks
197 11:27:43.793628 rename /var/lib/lava/dispatcher/tmp/10657506/extract-overlay-ramdisk-e2oy0v3v/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10657506/tftp-deploy-4s6mispj/ramdisk/ramdisk.cpio.gz
198 11:27:43.794063 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 11:27:43.794197 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 11:27:43.794296 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 11:27:43.794387 No mkimage arch provided, not using FIT.
202 11:27:43.794475 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 11:27:43.794561 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 11:27:43.794662 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 11:27:43.794778 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 11:27:43.794863 No LXC device requested
207 11:27:43.794944 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 11:27:43.795025 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 11:27:43.795106 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 11:27:43.795236 Checking files for TFTP limit of 4294967296 bytes.
211 11:27:43.795630 end: 1 tftp-deploy (duration 00:00:02) [common]
212 11:27:43.795741 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 11:27:43.795840 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 11:27:43.795961 substitutions:
215 11:27:43.796027 - {DTB}: None
216 11:27:43.796090 - {INITRD}: 10657506/tftp-deploy-4s6mispj/ramdisk/ramdisk.cpio.gz
217 11:27:43.796149 - {KERNEL}: 10657506/tftp-deploy-4s6mispj/kernel/bzImage
218 11:27:43.796206 - {LAVA_MAC}: None
219 11:27:43.796262 - {PRESEED_CONFIG}: None
220 11:27:43.796316 - {PRESEED_LOCAL}: None
221 11:27:43.796370 - {RAMDISK}: 10657506/tftp-deploy-4s6mispj/ramdisk/ramdisk.cpio.gz
222 11:27:43.796425 - {ROOT_PART}: None
223 11:27:43.796480 - {ROOT}: None
224 11:27:43.796535 - {SERVER_IP}: 192.168.201.1
225 11:27:43.796588 - {TEE}: None
226 11:27:43.796642 Parsed boot commands:
227 11:27:43.796695 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 11:27:43.796888 Parsed boot commands: tftpboot 192.168.201.1 10657506/tftp-deploy-4s6mispj/kernel/bzImage 10657506/tftp-deploy-4s6mispj/kernel/cmdline 10657506/tftp-deploy-4s6mispj/ramdisk/ramdisk.cpio.gz
229 11:27:43.796975 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 11:27:43.797063 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 11:27:43.797151 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 11:27:43.797232 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 11:27:43.797300 Not connected, no need to disconnect.
234 11:27:43.797373 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 11:27:43.797452 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 11:27:43.797515 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost acer-cb317-1h-c3z6-dedede-cbg-7'
237 11:27:43.800843 Setting prompt string to ['lava-test: # ']
238 11:27:43.801212 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 11:27:43.801319 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 11:27:43.801419 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 11:27:43.801506 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 11:27:43.801699 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-7' '--port=1' '--command=reboot'
243 11:27:48.952395 >> Command sent successfully.
244 11:27:48.964052 Returned 0 in 5 seconds
245 11:27:49.065433 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 11:27:49.066953 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 11:27:49.067561 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 11:27:49.068063 Setting prompt string to 'Starting depthcharge on Magolor...'
250 11:27:49.068440 Changing prompt to 'Starting depthcharge on Magolor...'
251 11:27:49.068840 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
252 11:27:49.070137 [Enter `^Ec?' for help]
253 11:27:50.200412
254 11:27:50.201199
255 11:27:50.207675 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
256 11:27:50.216164 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
257 11:27:50.219500 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
258 11:27:50.222638 CPU: AES supported, TXT NOT supported, VT supported
259 11:27:50.229389 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
260 11:27:50.233458 PCH: device id 4d87 (rev 01) is Jasperlake Super
261 11:27:50.237004 IGD: device id 4e55 (rev 01) is Jasperlake GT4
262 11:27:50.241376 VBOOT: Loading verstage.
263 11:27:50.244830 FMAP: Found "FLASH" version 1.1 at 0xc04000.
264 11:27:50.252657 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
265 11:27:50.256756 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
266 11:27:50.260541 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
267 11:27:50.264860
268 11:27:50.265331
269 11:27:50.275002 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
270 11:27:50.288198 Probing TPM: . done!
271 11:27:50.291520 TPM ready after 0 ms
272 11:27:50.296332 Connected to device vid:did:rid of 1ae0:0028:00
273 11:27:50.306810 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
274 11:27:50.313713 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
275 11:27:50.366538 Initialized TPM device CR50 revision 0
276 11:27:50.385221 tlcl_send_startup: Startup return code is 0
277 11:27:50.385794 TPM: setup succeeded
278 11:27:50.394600 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
279 11:27:50.410942 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
280 11:27:50.423461 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
281 11:27:50.432847 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
282 11:27:50.436275 Chrome EC: UHEPI supported
283 11:27:50.439880 Phase 1
284 11:27:50.443726 FMAP: area GBB found @ c05000 (12288 bytes)
285 11:27:50.450371 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
286 11:27:50.457746 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
287 11:27:50.460663 Recovery requested (1009000e)
288 11:27:50.472614 TPM: Extending digest for VBOOT: boot mode into PCR 0
289 11:27:50.478959 tlcl_extend: response is 0
290 11:27:50.487931 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
291 11:27:50.494627 tlcl_extend: response is 0
292 11:27:50.500841 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
293 11:27:50.504500 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
294 11:27:50.510868 BS: verstage times (exec / console): total (unknown) / 124 ms
295 11:27:50.514911
296 11:27:50.515513
297 11:27:50.524614 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
298 11:27:50.531029 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
299 11:27:50.534547 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
300 11:27:50.537437 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
301 11:27:50.544335 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
302 11:27:50.547798 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
303 11:27:50.550643 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
304 11:27:50.554408 TCO_STS: 0000 0001
305 11:27:50.558006 GEN_PMCON: d0015038 00002200
306 11:27:50.561109 GBLRST_CAUSE: 00000000 00000000
307 11:27:50.561677 prev_sleep_state 5
308 11:27:50.564190 Boot Count incremented to 10713
309 11:27:50.571243 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
310 11:27:50.574774 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
311 11:27:50.579027 Chrome EC: UHEPI supported
312 11:27:50.585624 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
313 11:27:50.591815 Probing TPM: done!
314 11:27:50.598449 Connected to device vid:did:rid of 1ae0:0028:00
315 11:27:50.608547 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
316 11:27:50.615836 Initialized TPM device CR50 revision 0
317 11:27:50.626194 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
318 11:27:50.632448 MRC: Hash idx 0x100b comparison successful.
319 11:27:50.635765 MRC cache found, size 5458
320 11:27:50.636235 bootmode is set to: 2
321 11:27:50.639184 SPD INDEX = 0
322 11:27:50.643393 CBFS: Found 'spd.bin' @0x40c40 size 0x600
323 11:27:50.647688 SPD: module type is LPDDR4X
324 11:27:50.650696 SPD: module part number is MT53E512M32D2NP-046 WT:E
325 11:27:50.657593 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
326 11:27:50.664093 SPD: device width 16 bits, bus width 32 bits
327 11:27:50.667156 SPD: module size is 4096 MB (per channel)
328 11:27:50.670554 meminit_channels: DRAM half-populated
329 11:27:50.752661 CBMEM:
330 11:27:50.755806 IMD: root @ 0x76fff000 254 entries.
331 11:27:50.759568 IMD: root @ 0x76ffec00 62 entries.
332 11:27:50.762915 FMAP: area RO_VPD found @ c00000 (16384 bytes)
333 11:27:50.769221 WARNING: RO_VPD is uninitialized or empty.
334 11:27:50.772507 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
335 11:27:50.776674 External stage cache:
336 11:27:50.779280 IMD: root @ 0x7b3ff000 254 entries.
337 11:27:50.782419 IMD: root @ 0x7b3fec00 62 entries.
338 11:27:50.792638 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
339 11:27:50.799425 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
340 11:27:50.805750 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
341 11:27:50.814565 MRC: 'RECOVERY_MRC_CACHE' does not need update.
342 11:27:50.818193 cse_lite: Skip switching to RW in the recovery path
343 11:27:50.821411 1 DIMMs found
344 11:27:50.822001 SMM Memory Map
345 11:27:50.824294 SMRAM : 0x7b000000 0x800000
346 11:27:50.827831 Subregion 0: 0x7b000000 0x200000
347 11:27:50.830689 Subregion 1: 0x7b200000 0x200000
348 11:27:50.834208 Subregion 2: 0x7b400000 0x400000
349 11:27:50.837483 top_of_ram = 0x77000000
350 11:27:50.844525 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
351 11:27:50.847408 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
352 11:27:50.854483 MTRR Range: Start=ff000000 End=0 (Size 1000000)
353 11:27:50.857766 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
354 11:27:50.864017 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
355 11:27:50.876540 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
356 11:27:50.882357 Processing 188 relocs. Offset value of 0x74c0e000
357 11:27:50.889608 BS: romstage times (exec / console): total (unknown) / 255 ms
358 11:27:50.894071
359 11:27:50.894535
360 11:27:50.903854 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
361 11:27:50.910732 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
362 11:27:50.914338 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
363 11:27:50.920395 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
364 11:27:50.976657 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
365 11:27:50.983269 Processing 4805 relocs. Offset value of 0x75da8000
366 11:27:50.986723 BS: postcar times (exec / console): total (unknown) / 42 ms
367 11:27:50.990380
368 11:27:50.990945
369 11:27:50.999914 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
370 11:27:51.000487 Normal boot
371 11:27:51.003602 EC returned error result code 3
372 11:27:51.006980 FW_CONFIG value is 0x204
373 11:27:51.010182 GENERIC: 0.0 disabled by fw_config
374 11:27:51.017082 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
375 11:27:51.020050 I2C: 00:10 disabled by fw_config
376 11:27:51.023647 I2C: 00:10 disabled by fw_config
377 11:27:51.027487 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
378 11:27:51.033367 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
379 11:27:51.036616 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
380 11:27:51.045032 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
381 11:27:51.047786 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
382 11:27:51.051189 I2C: 00:10 disabled by fw_config
383 11:27:51.057944 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
384 11:27:51.064479 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
385 11:27:51.067855 I2C: 00:1a disabled by fw_config
386 11:27:51.071057 I2C: 00:1a disabled by fw_config
387 11:27:51.074867 fw_config match found: AUDIO_AMP=UNPROVISIONED
388 11:27:51.081397 fw_config match found: AUDIO_AMP=UNPROVISIONED
389 11:27:51.084783 GENERIC: 0.0 disabled by fw_config
390 11:27:51.088103 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
391 11:27:51.094642 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
392 11:27:51.098041 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
393 11:27:51.104757 microcode: Update skipped, already up-to-date
394 11:27:51.107631 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
395 11:27:51.135628 Detected 2 core, 2 thread CPU.
396 11:27:51.138436 Setting up SMI for CPU
397 11:27:51.142028 IED base = 0x7b400000
398 11:27:51.142586 IED size = 0x00400000
399 11:27:51.145277 Will perform SMM setup.
400 11:27:51.148744 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
401 11:27:51.159724 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
402 11:27:51.161908 Processing 16 relocs. Offset value of 0x00030000
403 11:27:51.166042 Attempting to start 1 APs
404 11:27:51.168926 Waiting for 10ms after sending INIT.
405 11:27:51.185569 Waiting for 1st SIPI to complete...done.
406 11:27:51.186148 AP: slot 1 apic_id 2.
407 11:27:51.192202 Waiting for 2nd SIPI to complete...done.
408 11:27:51.198974 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
409 11:27:51.205225 Processing 13 relocs. Offset value of 0x00038000
410 11:27:51.205786 Unable to locate Global NVS
411 11:27:51.215358 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
412 11:27:51.218442 Installing permanent SMM handler to 0x7b000000
413 11:27:51.228369 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
414 11:27:51.231335 Processing 704 relocs. Offset value of 0x7b010000
415 11:27:51.241853 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
416 11:27:51.245167 Processing 13 relocs. Offset value of 0x7b008000
417 11:27:51.251334 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
418 11:27:51.254604 Unable to locate Global NVS
419 11:27:51.261883 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
420 11:27:51.265176 Clearing SMI status registers
421 11:27:51.265784 SMI_STS: PM1
422 11:27:51.268083 PM1_STS: PWRBTN
423 11:27:51.268642 TCO_STS: INTRD_DET
424 11:27:51.277862 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
425 11:27:51.278450 In relocation handler: CPU 0
426 11:27:51.284541 New SMBASE=0x7b000000 IEDBASE=0x7b400000
427 11:27:51.287750 Writing SMRR. base = 0x7b000006, mask=0xff800800
428 11:27:51.291392 Relocation complete.
429 11:27:51.298590 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
430 11:27:51.301637 In relocation handler: CPU 1
431 11:27:51.305013 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
432 11:27:51.311550 Writing SMRR. base = 0x7b000006, mask=0xff800800
433 11:27:51.312129 Relocation complete.
434 11:27:51.314880 Initializing CPU #0
435 11:27:51.317919 CPU: vendor Intel device 906c0
436 11:27:51.321544 CPU: family 06, model 9c, stepping 00
437 11:27:51.324686 Clearing out pending MCEs
438 11:27:51.328009 Setting up local APIC...
439 11:27:51.328592 apic_id: 0x00 done.
440 11:27:51.331167 Turbo is available but hidden
441 11:27:51.334800 Turbo is available and visible
442 11:27:51.337941 microcode: Update skipped, already up-to-date
443 11:27:51.341889 CPU #0 initialized
444 11:27:51.344339 Initializing CPU #1
445 11:27:51.348172 CPU: vendor Intel device 906c0
446 11:27:51.351257 CPU: family 06, model 9c, stepping 00
447 11:27:51.354286 Clearing out pending MCEs
448 11:27:51.354756 Setting up local APIC...
449 11:27:51.358012 apic_id: 0x02 done.
450 11:27:51.361186 microcode: Update skipped, already up-to-date
451 11:27:51.364406 CPU #1 initialized
452 11:27:51.367757 bsp_do_flight_plan done after 173 msecs.
453 11:27:51.371554 CPU: frequency set to 2800 MHz
454 11:27:51.374444 Enabling SMIs.
455 11:27:51.380848 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 86 / 287 ms
456 11:27:51.389889 Probing TPM: done!
457 11:27:51.396417 Connected to device vid:did:rid of 1ae0:0028:00
458 11:27:51.406686 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
459 11:27:51.409798 Initialized TPM device CR50 revision 0
460 11:27:51.413191 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
461 11:27:51.419849 Found a VBT of 7680 bytes after decompression
462 11:27:51.426918 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
463 11:27:51.461980 Detected 2 core, 2 thread CPU.
464 11:27:51.465658 Detected 2 core, 2 thread CPU.
465 11:27:51.827826 Display FSP Version Info HOB
466 11:27:51.830920 Reference Code - CPU = 8.7.22.30
467 11:27:51.834071 uCode Version = 24.0.0.1f
468 11:27:51.837722 TXT ACM version = ff.ff.ff.ffff
469 11:27:51.840751 Reference Code - ME = 8.7.22.30
470 11:27:51.844180 MEBx version = 0.0.0.0
471 11:27:51.847412 ME Firmware Version = Consumer SKU
472 11:27:51.850785 Reference Code - PCH = 8.7.22.30
473 11:27:51.854489 PCH-CRID Status = Disabled
474 11:27:51.858020 PCH-CRID Original Value = ff.ff.ff.ffff
475 11:27:51.860881 PCH-CRID New Value = ff.ff.ff.ffff
476 11:27:51.864258 OPROM - RST - RAID = ff.ff.ff.ffff
477 11:27:51.867308 PCH Hsio Version = 4.0.0.0
478 11:27:51.870871 Reference Code - SA - System Agent = 8.7.22.30
479 11:27:51.874141 Reference Code - MRC = 0.0.4.68
480 11:27:51.877856 SA - PCIe Version = 8.7.22.30
481 11:27:51.880796 SA-CRID Status = Disabled
482 11:27:51.884459 SA-CRID Original Value = 0.0.0.0
483 11:27:51.887365 SA-CRID New Value = 0.0.0.0
484 11:27:51.890853 OPROM - VBIOS = ff.ff.ff.ffff
485 11:27:51.894308 IO Manageability Engine FW Version = ff.ff.ff.ffff
486 11:27:51.897261 PHY Build Version = ff.ff.ff.ffff
487 11:27:51.900766 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
488 11:27:51.907874 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
489 11:27:51.910848 ITSS IRQ Polarities Before:
490 11:27:51.914193 IPC0: 0xffffffff
491 11:27:51.914754 IPC1: 0xffffffff
492 11:27:51.917143 IPC2: 0xffffffff
493 11:27:51.917705 IPC3: 0xffffffff
494 11:27:51.920766 ITSS IRQ Polarities After:
495 11:27:51.923849 IPC0: 0xffffffff
496 11:27:51.924458 IPC1: 0xffffffff
497 11:27:51.927876 IPC2: 0xffffffff
498 11:27:51.928448 IPC3: 0xffffffff
499 11:27:51.940274 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
500 11:27:51.947150 BS: BS_DEV_INIT_CHIPS run times (exec / console): 404 / 156 ms
501 11:27:51.947762 Enumerating buses...
502 11:27:51.953688 Show all devs... Before device enumeration.
503 11:27:51.954159 Root Device: enabled 1
504 11:27:51.957145 CPU_CLUSTER: 0: enabled 1
505 11:27:51.960343 DOMAIN: 0000: enabled 1
506 11:27:51.963561 PCI: 00:00.0: enabled 1
507 11:27:51.964030 PCI: 00:02.0: enabled 1
508 11:27:51.966820 PCI: 00:04.0: enabled 1
509 11:27:51.970221 PCI: 00:05.0: enabled 1
510 11:27:51.973326 PCI: 00:09.0: enabled 0
511 11:27:51.973790 PCI: 00:12.6: enabled 0
512 11:27:51.977119 PCI: 00:14.0: enabled 1
513 11:27:51.979960 PCI: 00:14.1: enabled 0
514 11:27:51.983485 PCI: 00:14.2: enabled 0
515 11:27:51.984050 PCI: 00:14.3: enabled 1
516 11:27:51.986675 PCI: 00:14.5: enabled 1
517 11:27:51.990419 PCI: 00:15.0: enabled 1
518 11:27:51.993262 PCI: 00:15.1: enabled 1
519 11:27:51.993730 PCI: 00:15.2: enabled 1
520 11:27:51.996607 PCI: 00:15.3: enabled 1
521 11:27:52.000536 PCI: 00:16.0: enabled 1
522 11:27:52.001108 PCI: 00:16.1: enabled 0
523 11:27:52.003419 PCI: 00:16.4: enabled 0
524 11:27:52.006404 PCI: 00:16.5: enabled 0
525 11:27:52.009911 PCI: 00:17.0: enabled 0
526 11:27:52.010478 PCI: 00:19.0: enabled 1
527 11:27:52.013991 PCI: 00:19.1: enabled 0
528 11:27:52.016936 PCI: 00:19.2: enabled 1
529 11:27:52.019992 PCI: 00:1a.0: enabled 1
530 11:27:52.020569 PCI: 00:1c.0: enabled 0
531 11:27:52.023402 PCI: 00:1c.1: enabled 0
532 11:27:52.027094 PCI: 00:1c.2: enabled 0
533 11:27:52.027695 PCI: 00:1c.3: enabled 0
534 11:27:52.030252 PCI: 00:1c.4: enabled 0
535 11:27:52.033791 PCI: 00:1c.5: enabled 0
536 11:27:52.037013 PCI: 00:1c.6: enabled 0
537 11:27:52.037483 PCI: 00:1c.7: enabled 1
538 11:27:52.039852 PCI: 00:1e.0: enabled 0
539 11:27:52.043410 PCI: 00:1e.1: enabled 0
540 11:27:52.046551 PCI: 00:1e.2: enabled 1
541 11:27:52.047031 PCI: 00:1e.3: enabled 0
542 11:27:52.050016 PCI: 00:1f.0: enabled 1
543 11:27:52.053106 PCI: 00:1f.1: enabled 1
544 11:27:52.053570 PCI: 00:1f.2: enabled 1
545 11:27:52.056565 PCI: 00:1f.3: enabled 1
546 11:27:52.059936 PCI: 00:1f.4: enabled 0
547 11:27:52.064084 PCI: 00:1f.5: enabled 1
548 11:27:52.064549 PCI: 00:1f.7: enabled 0
549 11:27:52.066538 GENERIC: 0.0: enabled 1
550 11:27:52.069828 GENERIC: 0.0: enabled 1
551 11:27:52.073402 USB0 port 0: enabled 1
552 11:27:52.073968 GENERIC: 0.0: enabled 1
553 11:27:52.076493 I2C: 00:2c: enabled 1
554 11:27:52.080024 I2C: 00:15: enabled 1
555 11:27:52.080584 GENERIC: 0.0: enabled 0
556 11:27:52.083656 I2C: 00:15: enabled 1
557 11:27:52.086513 I2C: 00:10: enabled 0
558 11:27:52.086974 I2C: 00:10: enabled 0
559 11:27:52.090101 I2C: 00:2c: enabled 1
560 11:27:52.093032 I2C: 00:40: enabled 1
561 11:27:52.093568 I2C: 00:10: enabled 1
562 11:27:52.096729 I2C: 00:39: enabled 1
563 11:27:52.100474 I2C: 00:36: enabled 1
564 11:27:52.101033 I2C: 00:10: enabled 0
565 11:27:52.104012 I2C: 00:0c: enabled 1
566 11:27:52.107042 I2C: 00:50: enabled 1
567 11:27:52.107661 I2C: 00:1a: enabled 1
568 11:27:52.109948 I2C: 00:1a: enabled 0
569 11:27:52.113504 I2C: 00:1a: enabled 0
570 11:27:52.114069 I2C: 00:28: enabled 1
571 11:27:52.117014 I2C: 00:29: enabled 1
572 11:27:52.120021 PCI: 00:00.0: enabled 1
573 11:27:52.120580 SPI: 00: enabled 1
574 11:27:52.123068 PNP: 0c09.0: enabled 1
575 11:27:52.126577 GENERIC: 0.0: enabled 0
576 11:27:52.130193 USB2 port 0: enabled 1
577 11:27:52.130755 USB2 port 1: enabled 1
578 11:27:52.133416 USB2 port 2: enabled 1
579 11:27:52.137219 USB2 port 3: enabled 1
580 11:27:52.137784 USB2 port 4: enabled 0
581 11:27:52.140062 USB2 port 5: enabled 1
582 11:27:52.142822 USB2 port 6: enabled 0
583 11:27:52.146339 USB2 port 7: enabled 1
584 11:27:52.146905 USB3 port 0: enabled 1
585 11:27:52.149808 USB3 port 1: enabled 1
586 11:27:52.153030 USB3 port 2: enabled 1
587 11:27:52.153504 USB3 port 3: enabled 1
588 11:27:52.156189 APIC: 00: enabled 1
589 11:27:52.159728 APIC: 02: enabled 1
590 11:27:52.160405 Compare with tree...
591 11:27:52.163408 Root Device: enabled 1
592 11:27:52.167034 CPU_CLUSTER: 0: enabled 1
593 11:27:52.167764 APIC: 00: enabled 1
594 11:27:52.169478 APIC: 02: enabled 1
595 11:27:52.172718 DOMAIN: 0000: enabled 1
596 11:27:52.176315 PCI: 00:00.0: enabled 1
597 11:27:52.176779 PCI: 00:02.0: enabled 1
598 11:27:52.179925 PCI: 00:04.0: enabled 1
599 11:27:52.182890 GENERIC: 0.0: enabled 1
600 11:27:52.186019 PCI: 00:05.0: enabled 1
601 11:27:52.190171 GENERIC: 0.0: enabled 1
602 11:27:52.190780 PCI: 00:09.0: enabled 0
603 11:27:52.193223 PCI: 00:12.6: enabled 0
604 11:27:52.196371 PCI: 00:14.0: enabled 1
605 11:27:52.199903 USB0 port 0: enabled 1
606 11:27:52.203282 USB2 port 0: enabled 1
607 11:27:52.203853 USB2 port 1: enabled 1
608 11:27:52.206119 USB2 port 2: enabled 1
609 11:27:52.209461 USB2 port 3: enabled 1
610 11:27:52.212958 USB2 port 4: enabled 0
611 11:27:52.216065 USB2 port 5: enabled 1
612 11:27:52.219483 USB2 port 6: enabled 0
613 11:27:52.220052 USB2 port 7: enabled 1
614 11:27:52.222646 USB3 port 0: enabled 1
615 11:27:52.226654 USB3 port 1: enabled 1
616 11:27:52.229142 USB3 port 2: enabled 1
617 11:27:52.232662 USB3 port 3: enabled 1
618 11:27:52.233125 PCI: 00:14.1: enabled 0
619 11:27:52.235749 PCI: 00:14.2: enabled 0
620 11:27:52.239763 PCI: 00:14.3: enabled 1
621 11:27:52.242660 GENERIC: 0.0: enabled 1
622 11:27:52.246651 PCI: 00:14.5: enabled 1
623 11:27:52.247270 PCI: 00:15.0: enabled 1
624 11:27:52.249011 I2C: 00:2c: enabled 1
625 11:27:52.252398 I2C: 00:15: enabled 1
626 11:27:52.255953 PCI: 00:15.1: enabled 1
627 11:27:52.259189 PCI: 00:15.2: enabled 1
628 11:27:52.259656 GENERIC: 0.0: enabled 0
629 11:27:52.262739 I2C: 00:15: enabled 1
630 11:27:52.266354 I2C: 00:10: enabled 0
631 11:27:52.269251 I2C: 00:10: enabled 0
632 11:27:52.269722 I2C: 00:2c: enabled 1
633 11:27:52.272289 I2C: 00:40: enabled 1
634 11:27:52.275659 I2C: 00:10: enabled 1
635 11:27:52.279204 I2C: 00:39: enabled 1
636 11:27:52.279670 PCI: 00:15.3: enabled 1
637 11:27:52.282266 I2C: 00:36: enabled 1
638 11:27:52.285749 I2C: 00:10: enabled 0
639 11:27:52.289176 I2C: 00:0c: enabled 1
640 11:27:52.292333 I2C: 00:50: enabled 1
641 11:27:52.292801 PCI: 00:16.0: enabled 1
642 11:27:52.295621 PCI: 00:16.1: enabled 0
643 11:27:52.299073 PCI: 00:16.4: enabled 0
644 11:27:52.302603 PCI: 00:16.5: enabled 0
645 11:27:52.303191 PCI: 00:17.0: enabled 0
646 11:27:52.306865 PCI: 00:19.0: enabled 1
647 11:27:52.310466 I2C: 00:1a: enabled 1
648 11:27:52.311032 I2C: 00:1a: enabled 0
649 11:27:52.313540 I2C: 00:1a: enabled 0
650 11:27:52.317560 I2C: 00:28: enabled 1
651 11:27:52.320674 I2C: 00:29: enabled 1
652 11:27:52.321237 PCI: 00:19.1: enabled 0
653 11:27:52.324175 PCI: 00:19.2: enabled 1
654 11:27:52.327362 PCI: 00:1a.0: enabled 1
655 11:27:52.330206 PCI: 00:1e.0: enabled 0
656 11:27:52.333878 PCI: 00:1e.1: enabled 0
657 11:27:52.334439 PCI: 00:1e.2: enabled 1
658 11:27:52.337103 SPI: 00: enabled 1
659 11:27:52.339989 PCI: 00:1e.3: enabled 0
660 11:27:52.343583 PCI: 00:1f.0: enabled 1
661 11:27:52.344047 PNP: 0c09.0: enabled 1
662 11:27:52.346864 PCI: 00:1f.1: enabled 1
663 11:27:52.350222 PCI: 00:1f.2: enabled 1
664 11:27:52.353531 PCI: 00:1f.3: enabled 1
665 11:27:52.356957 GENERIC: 0.0: enabled 0
666 11:27:52.357702 PCI: 00:1f.4: enabled 0
667 11:27:52.360279 PCI: 00:1f.5: enabled 1
668 11:27:52.363758 PCI: 00:1f.7: enabled 0
669 11:27:52.366715 Root Device scanning...
670 11:27:52.369951 scan_static_bus for Root Device
671 11:27:52.373033 CPU_CLUSTER: 0 enabled
672 11:27:52.373498 DOMAIN: 0000 enabled
673 11:27:52.376799 DOMAIN: 0000 scanning...
674 11:27:52.379673 PCI: pci_scan_bus for bus 00
675 11:27:52.383090 PCI: 00:00.0 [8086/0000] ops
676 11:27:52.386437 PCI: 00:00.0 [8086/4e22] enabled
677 11:27:52.389990 PCI: 00:02.0 [8086/0000] bus ops
678 11:27:52.393217 PCI: 00:02.0 [8086/4e55] enabled
679 11:27:52.396352 PCI: 00:04.0 [8086/0000] bus ops
680 11:27:52.399880 PCI: 00:04.0 [8086/4e03] enabled
681 11:27:52.403694 PCI: 00:05.0 [8086/0000] bus ops
682 11:27:52.406527 PCI: 00:05.0 [8086/4e19] enabled
683 11:27:52.410261 PCI: 00:08.0 [8086/4e11] enabled
684 11:27:52.413038 PCI: 00:14.0 [8086/0000] bus ops
685 11:27:52.417656 PCI: 00:14.0 [8086/4ded] enabled
686 11:27:52.419743 PCI: 00:14.2 [8086/4def] disabled
687 11:27:52.423563 PCI: 00:14.3 [8086/0000] bus ops
688 11:27:52.426614 PCI: 00:14.3 [8086/4df0] enabled
689 11:27:52.429732 PCI: 00:14.5 [8086/0000] ops
690 11:27:52.433006 PCI: 00:14.5 [8086/4df8] enabled
691 11:27:52.436366 PCI: 00:15.0 [8086/0000] bus ops
692 11:27:52.439737 PCI: 00:15.0 [8086/4de8] enabled
693 11:27:52.442682 PCI: 00:15.1 [8086/0000] bus ops
694 11:27:52.446745 PCI: 00:15.1 [8086/4de9] enabled
695 11:27:52.449756 PCI: 00:15.2 [8086/0000] bus ops
696 11:27:52.452849 PCI: 00:15.2 [8086/4dea] enabled
697 11:27:52.456196 PCI: 00:15.3 [8086/0000] bus ops
698 11:27:52.459585 PCI: 00:15.3 [8086/4deb] enabled
699 11:27:52.463056 PCI: 00:16.0 [8086/0000] ops
700 11:27:52.466224 PCI: 00:16.0 [8086/4de0] enabled
701 11:27:52.469579 PCI: 00:19.0 [8086/0000] bus ops
702 11:27:52.473035 PCI: 00:19.0 [8086/4dc5] enabled
703 11:27:52.473608 PCI: 00:19.2 [8086/0000] ops
704 11:27:52.475977 PCI: 00:19.2 [8086/4dc7] enabled
705 11:27:52.479462 PCI: 00:1a.0 [8086/0000] ops
706 11:27:52.483248 PCI: 00:1a.0 [8086/4dc4] enabled
707 11:27:52.485918 PCI: 00:1e.0 [8086/0000] ops
708 11:27:52.489504 PCI: 00:1e.0 [8086/4da8] disabled
709 11:27:52.492615 PCI: 00:1e.2 [8086/0000] bus ops
710 11:27:52.495826 PCI: 00:1e.2 [8086/4daa] enabled
711 11:27:52.499184 PCI: 00:1f.0 [8086/0000] bus ops
712 11:27:52.503247 PCI: 00:1f.0 [8086/4d87] enabled
713 11:27:52.509970 PCI: Static device PCI: 00:1f.1 not found, disabling it.
714 11:27:52.510543 RTC Init
715 11:27:52.512738 Set power on after power failure.
716 11:27:52.516146 Disabling Deep S3
717 11:27:52.516612 Disabling Deep S3
718 11:27:52.519699 Disabling Deep S4
719 11:27:52.520267 Disabling Deep S4
720 11:27:52.522812 Disabling Deep S5
721 11:27:52.526313 Disabling Deep S5
722 11:27:52.529546 PCI: 00:1f.2 [0000/0000] hidden
723 11:27:52.532579 PCI: 00:1f.3 [8086/0000] bus ops
724 11:27:52.536777 PCI: 00:1f.3 [8086/4dc8] enabled
725 11:27:52.539340 PCI: 00:1f.5 [8086/0000] bus ops
726 11:27:52.542450 PCI: 00:1f.5 [8086/4da4] enabled
727 11:27:52.542923 PCI: Leftover static devices:
728 11:27:52.546906 PCI: 00:12.6
729 11:27:52.547535 PCI: 00:09.0
730 11:27:52.549413 PCI: 00:14.1
731 11:27:52.549882 PCI: 00:16.1
732 11:27:52.552531 PCI: 00:16.4
733 11:27:52.553004 PCI: 00:16.5
734 11:27:52.553379 PCI: 00:17.0
735 11:27:52.556639 PCI: 00:19.1
736 11:27:52.557217 PCI: 00:1e.1
737 11:27:52.559436 PCI: 00:1e.3
738 11:27:52.559908 PCI: 00:1f.1
739 11:27:52.560284 PCI: 00:1f.4
740 11:27:52.562687 PCI: 00:1f.7
741 11:27:52.566052 PCI: Check your devicetree.cb.
742 11:27:52.566627 PCI: 00:02.0 scanning...
743 11:27:52.572879 scan_generic_bus for PCI: 00:02.0
744 11:27:52.576283 scan_generic_bus for PCI: 00:02.0 done
745 11:27:52.579440 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
746 11:27:52.582397 PCI: 00:04.0 scanning...
747 11:27:52.586199 scan_generic_bus for PCI: 00:04.0
748 11:27:52.589447 GENERIC: 0.0 enabled
749 11:27:52.592563 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
750 11:27:52.599214 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
751 11:27:52.602440 PCI: 00:05.0 scanning...
752 11:27:52.606097 scan_generic_bus for PCI: 00:05.0
753 11:27:52.606663 GENERIC: 0.0 enabled
754 11:27:52.612710 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
755 11:27:52.618846 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
756 11:27:52.619363 PCI: 00:14.0 scanning...
757 11:27:52.622797 scan_static_bus for PCI: 00:14.0
758 11:27:52.625658 USB0 port 0 enabled
759 11:27:52.628978 USB0 port 0 scanning...
760 11:27:52.632418 scan_static_bus for USB0 port 0
761 11:27:52.632920 USB2 port 0 enabled
762 11:27:52.635253 USB2 port 1 enabled
763 11:27:52.639226 USB2 port 2 enabled
764 11:27:52.639791 USB2 port 3 enabled
765 11:27:52.642184 USB2 port 4 disabled
766 11:27:52.645526 USB2 port 5 enabled
767 11:27:52.645991 USB2 port 6 disabled
768 11:27:52.649241 USB2 port 7 enabled
769 11:27:52.649804 USB3 port 0 enabled
770 11:27:52.652350 USB3 port 1 enabled
771 11:27:52.655745 USB3 port 2 enabled
772 11:27:52.656311 USB3 port 3 enabled
773 11:27:52.659214 USB2 port 0 scanning...
774 11:27:52.662117 scan_static_bus for USB2 port 0
775 11:27:52.665905 scan_static_bus for USB2 port 0 done
776 11:27:52.669117 scan_bus: bus USB2 port 0 finished in 6 msecs
777 11:27:52.672186 USB2 port 1 scanning...
778 11:27:52.675454 scan_static_bus for USB2 port 1
779 11:27:52.678696 scan_static_bus for USB2 port 1 done
780 11:27:52.685920 scan_bus: bus USB2 port 1 finished in 6 msecs
781 11:27:52.686491 USB2 port 2 scanning...
782 11:27:52.689238 scan_static_bus for USB2 port 2
783 11:27:52.695162 scan_static_bus for USB2 port 2 done
784 11:27:52.698640 scan_bus: bus USB2 port 2 finished in 6 msecs
785 11:27:52.702183 USB2 port 3 scanning...
786 11:27:52.705432 scan_static_bus for USB2 port 3
787 11:27:52.708477 scan_static_bus for USB2 port 3 done
788 11:27:52.711941 scan_bus: bus USB2 port 3 finished in 6 msecs
789 11:27:52.715430 USB2 port 5 scanning...
790 11:27:52.718650 scan_static_bus for USB2 port 5
791 11:27:52.722439 scan_static_bus for USB2 port 5 done
792 11:27:52.725229 scan_bus: bus USB2 port 5 finished in 6 msecs
793 11:27:52.728848 USB2 port 7 scanning...
794 11:27:52.732571 scan_static_bus for USB2 port 7
795 11:27:52.735417 scan_static_bus for USB2 port 7 done
796 11:27:52.742137 scan_bus: bus USB2 port 7 finished in 6 msecs
797 11:27:52.742790 USB3 port 0 scanning...
798 11:27:52.745068 scan_static_bus for USB3 port 0
799 11:27:52.751945 scan_static_bus for USB3 port 0 done
800 11:27:52.755405 scan_bus: bus USB3 port 0 finished in 6 msecs
801 11:27:52.758677 USB3 port 1 scanning...
802 11:27:52.761841 scan_static_bus for USB3 port 1
803 11:27:52.765203 scan_static_bus for USB3 port 1 done
804 11:27:52.768266 scan_bus: bus USB3 port 1 finished in 6 msecs
805 11:27:52.771905 USB3 port 2 scanning...
806 11:27:52.775194 scan_static_bus for USB3 port 2
807 11:27:52.778679 scan_static_bus for USB3 port 2 done
808 11:27:52.781764 scan_bus: bus USB3 port 2 finished in 6 msecs
809 11:27:52.784907 USB3 port 3 scanning...
810 11:27:52.788150 scan_static_bus for USB3 port 3
811 11:27:52.791867 scan_static_bus for USB3 port 3 done
812 11:27:52.798227 scan_bus: bus USB3 port 3 finished in 6 msecs
813 11:27:52.801392 scan_static_bus for USB0 port 0 done
814 11:27:52.804658 scan_bus: bus USB0 port 0 finished in 172 msecs
815 11:27:52.808488 scan_static_bus for PCI: 00:14.0 done
816 11:27:52.814793 scan_bus: bus PCI: 00:14.0 finished in 188 msecs
817 11:27:52.818291 PCI: 00:14.3 scanning...
818 11:27:52.821377 scan_static_bus for PCI: 00:14.3
819 11:27:52.821960 GENERIC: 0.0 enabled
820 11:27:52.824489 scan_static_bus for PCI: 00:14.3 done
821 11:27:52.831315 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
822 11:27:52.834369 PCI: 00:15.0 scanning...
823 11:27:52.837947 scan_static_bus for PCI: 00:15.0
824 11:27:52.838524 I2C: 00:2c enabled
825 11:27:52.841249 I2C: 00:15 enabled
826 11:27:52.844795 scan_static_bus for PCI: 00:15.0 done
827 11:27:52.847815 scan_bus: bus PCI: 00:15.0 finished in 10 msecs
828 11:27:52.851151 PCI: 00:15.1 scanning...
829 11:27:52.854603 scan_static_bus for PCI: 00:15.1
830 11:27:52.857914 scan_static_bus for PCI: 00:15.1 done
831 11:27:52.864948 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
832 11:27:52.867605 PCI: 00:15.2 scanning...
833 11:27:52.871246 scan_static_bus for PCI: 00:15.2
834 11:27:52.871808 GENERIC: 0.0 disabled
835 11:27:52.874375 I2C: 00:15 enabled
836 11:27:52.877839 I2C: 00:10 disabled
837 11:27:52.878456 I2C: 00:10 disabled
838 11:27:52.881133 I2C: 00:2c enabled
839 11:27:52.881714 I2C: 00:40 enabled
840 11:27:52.884580 I2C: 00:10 enabled
841 11:27:52.885145 I2C: 00:39 enabled
842 11:27:52.888224 scan_static_bus for PCI: 00:15.2 done
843 11:27:52.895469 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
844 11:27:52.896030 PCI: 00:15.3 scanning...
845 11:27:52.898615 scan_static_bus for PCI: 00:15.3
846 11:27:52.902518 I2C: 00:36 enabled
847 11:27:52.906319 I2C: 00:10 disabled
848 11:27:52.906881 I2C: 00:0c enabled
849 11:27:52.909522 I2C: 00:50 enabled
850 11:27:52.912958 scan_static_bus for PCI: 00:15.3 done
851 11:27:52.916477 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
852 11:27:52.920024 PCI: 00:19.0 scanning...
853 11:27:52.923218 scan_static_bus for PCI: 00:19.0
854 11:27:52.926322 I2C: 00:1a enabled
855 11:27:52.926908 I2C: 00:1a disabled
856 11:27:52.929518 I2C: 00:1a disabled
857 11:27:52.929982 I2C: 00:28 enabled
858 11:27:52.932915 I2C: 00:29 enabled
859 11:27:52.936571 scan_static_bus for PCI: 00:19.0 done
860 11:27:52.943157 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
861 11:27:52.943836 PCI: 00:1e.2 scanning...
862 11:27:52.946092 scan_generic_bus for PCI: 00:1e.2
863 11:27:52.949806 SPI: 00 enabled
864 11:27:52.956114 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
865 11:27:52.959614 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
866 11:27:52.963040 PCI: 00:1f.0 scanning...
867 11:27:52.966231 scan_static_bus for PCI: 00:1f.0
868 11:27:52.970017 PNP: 0c09.0 enabled
869 11:27:52.970587 PNP: 0c09.0 scanning...
870 11:27:52.972667 scan_static_bus for PNP: 0c09.0
871 11:27:52.976771 scan_static_bus for PNP: 0c09.0 done
872 11:27:52.982776 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
873 11:27:52.986302 scan_static_bus for PCI: 00:1f.0 done
874 11:27:52.989399 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
875 11:27:52.993060 PCI: 00:1f.3 scanning...
876 11:27:52.995808 scan_static_bus for PCI: 00:1f.3
877 11:27:52.999276 GENERIC: 0.0 disabled
878 11:27:53.002533 scan_static_bus for PCI: 00:1f.3 done
879 11:27:53.006249 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
880 11:27:53.009746 PCI: 00:1f.5 scanning...
881 11:27:53.012753 scan_generic_bus for PCI: 00:1f.5
882 11:27:53.015927 scan_generic_bus for PCI: 00:1f.5 done
883 11:27:53.022651 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
884 11:27:53.025861 scan_bus: bus DOMAIN: 0000 finished in 645 msecs
885 11:27:53.029131 scan_static_bus for Root Device done
886 11:27:53.036043 scan_bus: bus Root Device finished in 664 msecs
887 11:27:53.036607 done
888 11:27:53.042387 BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 1084 ms
889 11:27:53.045597 Chrome EC: UHEPI supported
890 11:27:53.052106 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
891 11:27:53.058875 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
892 11:27:53.062551 SPI flash protection: WPSW=0 SRP0=1
893 11:27:53.065983 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
894 11:27:53.071913 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
895 11:27:53.075305 found VGA at PCI: 00:02.0
896 11:27:53.078946 Setting up VGA for PCI: 00:02.0
897 11:27:53.082246 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
898 11:27:53.088809 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
899 11:27:53.089383 Allocating resources...
900 11:27:53.092158 Reading resources...
901 11:27:53.095648 Root Device read_resources bus 0 link: 0
902 11:27:53.102157 CPU_CLUSTER: 0 read_resources bus 0 link: 0
903 11:27:53.105466 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
904 11:27:53.111777 DOMAIN: 0000 read_resources bus 0 link: 0
905 11:27:53.115733 PCI: 00:04.0 read_resources bus 1 link: 0
906 11:27:53.122158 PCI: 00:04.0 read_resources bus 1 link: 0 done
907 11:27:53.125424 PCI: 00:05.0 read_resources bus 2 link: 0
908 11:27:53.128362 PCI: 00:05.0 read_resources bus 2 link: 0 done
909 11:27:53.135638 PCI: 00:14.0 read_resources bus 0 link: 0
910 11:27:53.138673 USB0 port 0 read_resources bus 0 link: 0
911 11:27:53.145656 USB0 port 0 read_resources bus 0 link: 0 done
912 11:27:53.149461 PCI: 00:14.0 read_resources bus 0 link: 0 done
913 11:27:53.208697 PCI: 00:14.3 read_resources bus 0 link: 0
914 11:27:53.209291 PCI: 00:14.3 read_resources bus 0 link: 0 done
915 11:27:53.209677 PCI: 00:15.0 read_resources bus 0 link: 0
916 11:27:53.210385 PCI: 00:15.0 read_resources bus 0 link: 0 done
917 11:27:53.210769 PCI: 00:15.2 read_resources bus 0 link: 0
918 11:27:53.211110 PCI: 00:15.2 read_resources bus 0 link: 0 done
919 11:27:53.211478 PCI: 00:15.3 read_resources bus 0 link: 0
920 11:27:53.211810 PCI: 00:15.3 read_resources bus 0 link: 0 done
921 11:27:53.212130 PCI: 00:19.0 read_resources bus 0 link: 0
922 11:27:53.212511 PCI: 00:19.0 read_resources bus 0 link: 0 done
923 11:27:53.212838 PCI: 00:1e.2 read_resources bus 3 link: 0
924 11:27:53.213151 PCI: 00:1e.2 read_resources bus 3 link: 0 done
925 11:27:53.259719 PCI: 00:1f.0 read_resources bus 0 link: 0
926 11:27:53.260598 PCI: 00:1f.0 read_resources bus 0 link: 0 done
927 11:27:53.261118 PCI: 00:1f.3 read_resources bus 0 link: 0
928 11:27:53.261648 PCI: 00:1f.3 read_resources bus 0 link: 0 done
929 11:27:53.262046 DOMAIN: 0000 read_resources bus 0 link: 0 done
930 11:27:53.262460 Root Device read_resources bus 0 link: 0 done
931 11:27:53.262811 Done reading resources.
932 11:27:53.263435 Show resources in subtree (Root Device)...After reading.
933 11:27:53.263805 Root Device child on link 0 CPU_CLUSTER: 0
934 11:27:53.264137 CPU_CLUSTER: 0 child on link 0 APIC: 00
935 11:27:53.264460 APIC: 00
936 11:27:53.264773 APIC: 02
937 11:27:53.309794 DOMAIN: 0000 child on link 0 PCI: 00:00.0
938 11:27:53.310385 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
939 11:27:53.311084 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
940 11:27:53.311573 PCI: 00:00.0
941 11:27:53.312157 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
942 11:27:53.312573 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
943 11:27:53.312988 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
944 11:27:53.324041 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
945 11:27:53.330710 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
946 11:27:53.340010 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
947 11:27:53.347077 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
948 11:27:53.356702 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
949 11:27:53.366606 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
950 11:27:53.377348 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
951 11:27:53.386633 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
952 11:27:53.393508 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
953 11:27:53.403679 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
954 11:27:53.413482 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
955 11:27:53.423406 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
956 11:27:53.434051 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
957 11:27:53.443875 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
958 11:27:53.449931 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
959 11:27:53.459836 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
960 11:27:53.463350 PCI: 00:02.0
961 11:27:53.473660 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
962 11:27:53.483218 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
963 11:27:53.489568 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
964 11:27:53.496480 PCI: 00:04.0 child on link 0 GENERIC: 0.0
965 11:27:53.506588 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
966 11:27:53.507197 GENERIC: 0.0
967 11:27:53.513236 PCI: 00:05.0 child on link 0 GENERIC: 0.0
968 11:27:53.522813 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
969 11:27:53.523423 GENERIC: 0.0
970 11:27:53.526522 PCI: 00:08.0
971 11:27:53.536516 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
972 11:27:53.539558 PCI: 00:14.0 child on link 0 USB0 port 0
973 11:27:53.549990 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
974 11:27:53.552733 USB0 port 0 child on link 0 USB2 port 0
975 11:27:53.556220 USB2 port 0
976 11:27:53.556781 USB2 port 1
977 11:27:53.560159 USB2 port 2
978 11:27:53.560733 USB2 port 3
979 11:27:53.563032 USB2 port 4
980 11:27:53.563651 USB2 port 5
981 11:27:53.566273 USB2 port 6
982 11:27:53.566840 USB2 port 7
983 11:27:53.570352 USB3 port 0
984 11:27:53.570845 USB3 port 1
985 11:27:53.574097 USB3 port 2
986 11:27:53.574560 USB3 port 3
987 11:27:53.577585 PCI: 00:14.2
988 11:27:53.580646 PCI: 00:14.3 child on link 0 GENERIC: 0.0
989 11:27:53.590601 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
990 11:27:53.594067 GENERIC: 0.0
991 11:27:53.594631 PCI: 00:14.5
992 11:27:53.604509 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
993 11:27:53.607655 PCI: 00:15.0 child on link 0 I2C: 00:2c
994 11:27:53.617056 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
995 11:27:53.620450 I2C: 00:2c
996 11:27:53.621026 I2C: 00:15
997 11:27:53.623692 PCI: 00:15.1
998 11:27:53.634220 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
999 11:27:53.636806 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1000 11:27:53.646855 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1001 11:27:53.650096 GENERIC: 0.0
1002 11:27:53.650588 I2C: 00:15
1003 11:27:53.654044 I2C: 00:10
1004 11:27:53.654628 I2C: 00:10
1005 11:27:53.656575 I2C: 00:2c
1006 11:27:53.657056 I2C: 00:40
1007 11:27:53.660342 I2C: 00:10
1008 11:27:53.660955 I2C: 00:39
1009 11:27:53.663846 PCI: 00:15.3 child on link 0 I2C: 00:36
1010 11:27:53.673426 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1011 11:27:53.676980 I2C: 00:36
1012 11:27:53.677580 I2C: 00:10
1013 11:27:53.679820 I2C: 00:0c
1014 11:27:53.680302 I2C: 00:50
1015 11:27:53.683588 PCI: 00:16.0
1016 11:27:53.693667 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1017 11:27:53.696713 PCI: 00:19.0 child on link 0 I2C: 00:1a
1018 11:27:53.706538 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1019 11:27:53.707117 I2C: 00:1a
1020 11:27:53.710354 I2C: 00:1a
1021 11:27:53.710931 I2C: 00:1a
1022 11:27:53.713322 I2C: 00:28
1023 11:27:53.713887 I2C: 00:29
1024 11:27:53.717046 PCI: 00:19.2
1025 11:27:53.726760 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1026 11:27:53.736578 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1027 11:27:53.740229 PCI: 00:1a.0
1028 11:27:53.750263 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1029 11:27:53.750812 PCI: 00:1e.0
1030 11:27:53.753665 PCI: 00:1e.2 child on link 0 SPI: 00
1031 11:27:53.763326 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1032 11:27:53.767853 SPI: 00
1033 11:27:53.770362 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1034 11:27:53.779638 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1035 11:27:53.780275 PNP: 0c09.0
1036 11:27:53.789234 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1037 11:27:53.789780 PCI: 00:1f.2
1038 11:27:53.799322 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1039 11:27:53.809645 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1040 11:27:53.812834 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1041 11:27:53.822508 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1042 11:27:53.832667 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1043 11:27:53.836003 GENERIC: 0.0
1044 11:27:53.836455 PCI: 00:1f.5
1045 11:27:53.845757 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1046 11:27:53.852459 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1047 11:27:53.859114 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1048 11:27:53.866029 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1049 11:27:53.875628 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1050 11:27:53.882113 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1051 11:27:53.888977 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1052 11:27:53.892489 DOMAIN: 0000: Resource ranges:
1053 11:27:53.895516 * Base: 1000, Size: 800, Tag: 100
1054 11:27:53.899369 * Base: 1900, Size: e700, Tag: 100
1055 11:27:53.905789 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1056 11:27:53.912216 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1057 11:27:53.919310 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1058 11:27:53.925636 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1059 11:27:53.935313 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1060 11:27:53.942135 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1061 11:27:53.948264 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1062 11:27:53.955454 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1063 11:27:53.965117 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1064 11:27:53.971430 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1065 11:27:53.978680 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1066 11:27:53.988223 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1067 11:27:53.994943 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1068 11:27:54.001484 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1069 11:27:54.011575 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1070 11:27:54.018249 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1071 11:27:54.024650 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1072 11:27:54.034837 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1073 11:27:54.041064 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1074 11:27:54.047596 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1075 11:27:54.058140 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1076 11:27:54.064529 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1077 11:27:54.071359 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1078 11:27:54.081252 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1079 11:27:54.083968 DOMAIN: 0000: Resource ranges:
1080 11:27:54.087670 * Base: 7fc00000, Size: 40400000, Tag: 200
1081 11:27:54.091026 * Base: d0000000, Size: 2b000000, Tag: 200
1082 11:27:54.094364 * Base: fb001000, Size: 2fff000, Tag: 200
1083 11:27:54.101080 * Base: fe010000, Size: 22000, Tag: 200
1084 11:27:54.104221 * Base: fe033000, Size: a4d000, Tag: 200
1085 11:27:54.107879 * Base: fea88000, Size: 2f8000, Tag: 200
1086 11:27:54.110966 * Base: fed88000, Size: 8000, Tag: 200
1087 11:27:54.117435 * Base: fed93000, Size: d000, Tag: 200
1088 11:27:54.121016 * Base: feda2000, Size: 125e000, Tag: 200
1089 11:27:54.123951 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1090 11:27:54.133903 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1091 11:27:54.140549 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1092 11:27:54.147526 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1093 11:27:54.151267 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1094 11:27:54.158343 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1095 11:27:54.165211 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1096 11:27:54.172370 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1097 11:27:54.178406 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1098 11:27:54.185165 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1099 11:27:54.191534 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1100 11:27:54.198549 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1101 11:27:54.205039 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1102 11:27:54.211713 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1103 11:27:54.218057 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1104 11:27:54.224697 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1105 11:27:54.231223 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1106 11:27:54.237956 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1107 11:27:54.244764 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1108 11:27:54.250896 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1109 11:27:54.258120 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1110 11:27:54.264515 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1111 11:27:54.271294 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1112 11:27:54.277659 Root Device assign_resources, bus 0 link: 0
1113 11:27:54.281566 DOMAIN: 0000 assign_resources, bus 0 link: 0
1114 11:27:54.291093 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1115 11:27:54.297602 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1116 11:27:54.304502 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1117 11:27:54.314334 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1118 11:27:54.317706 PCI: 00:04.0 assign_resources, bus 1 link: 0
1119 11:27:54.324172 PCI: 00:04.0 assign_resources, bus 1 link: 0
1120 11:27:54.330744 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1121 11:27:54.334210 PCI: 00:05.0 assign_resources, bus 2 link: 0
1122 11:27:54.340585 PCI: 00:05.0 assign_resources, bus 2 link: 0
1123 11:27:54.347476 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1124 11:27:54.357211 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1125 11:27:54.360781 PCI: 00:14.0 assign_resources, bus 0 link: 0
1126 11:27:54.363943 PCI: 00:14.0 assign_resources, bus 0 link: 0
1127 11:27:54.374069 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1128 11:27:54.377409 PCI: 00:14.3 assign_resources, bus 0 link: 0
1129 11:27:54.383821 PCI: 00:14.3 assign_resources, bus 0 link: 0
1130 11:27:54.390606 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1131 11:27:54.400437 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1132 11:27:54.403922 PCI: 00:15.0 assign_resources, bus 0 link: 0
1133 11:27:54.407633 PCI: 00:15.0 assign_resources, bus 0 link: 0
1134 11:27:54.417351 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1135 11:27:54.424247 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1136 11:27:54.431032 PCI: 00:15.2 assign_resources, bus 0 link: 0
1137 11:27:54.434204 PCI: 00:15.2 assign_resources, bus 0 link: 0
1138 11:27:54.441053 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1139 11:27:54.447280 PCI: 00:15.3 assign_resources, bus 0 link: 0
1140 11:27:54.450330 PCI: 00:15.3 assign_resources, bus 0 link: 0
1141 11:27:54.460097 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1142 11:27:54.467246 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1143 11:27:54.470373 PCI: 00:19.0 assign_resources, bus 0 link: 0
1144 11:27:54.476822 PCI: 00:19.0 assign_resources, bus 0 link: 0
1145 11:27:54.484697 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1146 11:27:54.493386 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1147 11:27:54.500013 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1148 11:27:54.506894 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1149 11:27:54.510028 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1150 11:27:54.513167 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1151 11:27:54.520588 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1152 11:27:54.523247 LPC: Trying to open IO window from 800 size 1ff
1153 11:27:54.533210 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1154 11:27:54.539722 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1155 11:27:54.546628 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1156 11:27:54.550004 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1157 11:27:54.556140 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1158 11:27:54.562823 DOMAIN: 0000 assign_resources, bus 0 link: 0
1159 11:27:54.566074 Root Device assign_resources, bus 0 link: 0
1160 11:27:54.569664 Done setting resources.
1161 11:27:54.575863 Show resources in subtree (Root Device)...After assigning values.
1162 11:27:54.579397 Root Device child on link 0 CPU_CLUSTER: 0
1163 11:27:54.583181 CPU_CLUSTER: 0 child on link 0 APIC: 00
1164 11:27:54.586150 APIC: 00
1165 11:27:54.586716 APIC: 02
1166 11:27:54.593128 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1167 11:27:54.599186 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1168 11:27:54.609734 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1169 11:27:54.612625 PCI: 00:00.0
1170 11:27:54.622991 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1171 11:27:54.629226 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1172 11:27:54.639425 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1173 11:27:54.649206 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1174 11:27:54.659644 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1175 11:27:54.669066 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1176 11:27:54.678850 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1177 11:27:54.685550 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1178 11:27:54.695488 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1179 11:27:54.706162 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1180 11:27:54.715632 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1181 11:27:54.725488 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1182 11:27:54.732270 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1183 11:27:54.742116 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1184 11:27:54.752002 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1185 11:27:54.761850 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1186 11:27:54.771668 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1187 11:27:54.781442 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1188 11:27:54.788334 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1189 11:27:54.791242 PCI: 00:02.0
1190 11:27:54.801190 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1191 11:27:54.811362 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1192 11:27:54.821337 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1193 11:27:54.824621 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1194 11:27:54.837659 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1195 11:27:54.838219 GENERIC: 0.0
1196 11:27:54.844373 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1197 11:27:54.854351 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1198 11:27:54.854905 GENERIC: 0.0
1199 11:27:54.857241 PCI: 00:08.0
1200 11:27:54.867415 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1201 11:27:54.870950 PCI: 00:14.0 child on link 0 USB0 port 0
1202 11:27:54.880481 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1203 11:27:54.887634 USB0 port 0 child on link 0 USB2 port 0
1204 11:27:54.888191 USB2 port 0
1205 11:27:54.890423 USB2 port 1
1206 11:27:54.891008 USB2 port 2
1207 11:27:54.893685 USB2 port 3
1208 11:27:54.894142 USB2 port 4
1209 11:27:54.897157 USB2 port 5
1210 11:27:54.897714 USB2 port 6
1211 11:27:54.900529 USB2 port 7
1212 11:27:54.901134 USB3 port 0
1213 11:27:54.903663 USB3 port 1
1214 11:27:54.904216 USB3 port 2
1215 11:27:54.906781 USB3 port 3
1216 11:27:54.910419 PCI: 00:14.2
1217 11:27:54.913859 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1218 11:27:54.923740 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1219 11:27:54.926886 GENERIC: 0.0
1220 11:27:54.927476 PCI: 00:14.5
1221 11:27:54.936491 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1222 11:27:54.939993 PCI: 00:15.0 child on link 0 I2C: 00:2c
1223 11:27:54.953464 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1224 11:27:54.954047 I2C: 00:2c
1225 11:27:54.956254 I2C: 00:15
1226 11:27:54.956779 PCI: 00:15.1
1227 11:27:54.966936 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1228 11:27:54.973339 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1229 11:27:54.983115 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1230 11:27:54.983720 GENERIC: 0.0
1231 11:27:54.986366 I2C: 00:15
1232 11:27:54.986821 I2C: 00:10
1233 11:27:54.989233 I2C: 00:10
1234 11:27:54.989689 I2C: 00:2c
1235 11:27:54.990051 I2C: 00:40
1236 11:27:54.992816 I2C: 00:10
1237 11:27:54.993338 I2C: 00:39
1238 11:27:55.000120 PCI: 00:15.3 child on link 0 I2C: 00:36
1239 11:27:55.009147 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1240 11:27:55.009700 I2C: 00:36
1241 11:27:55.012605 I2C: 00:10
1242 11:27:55.013063 I2C: 00:0c
1243 11:27:55.016308 I2C: 00:50
1244 11:27:55.016766 PCI: 00:16.0
1245 11:27:55.026102 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1246 11:27:55.032734 PCI: 00:19.0 child on link 0 I2C: 00:1a
1247 11:27:55.043432 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1248 11:27:55.043995 I2C: 00:1a
1249 11:27:55.045830 I2C: 00:1a
1250 11:27:55.046385 I2C: 00:1a
1251 11:27:55.049240 I2C: 00:28
1252 11:27:55.049698 I2C: 00:29
1253 11:27:55.052370 PCI: 00:19.2
1254 11:27:55.062821 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1255 11:27:55.072377 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1256 11:27:55.075937 PCI: 00:1a.0
1257 11:27:55.085715 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1258 11:27:55.086278 PCI: 00:1e.0
1259 11:27:55.089098 PCI: 00:1e.2 child on link 0 SPI: 00
1260 11:27:55.098978 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1261 11:27:55.102124 SPI: 00
1262 11:27:55.105985 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1263 11:27:55.115175 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1264 11:27:55.115735 PNP: 0c09.0
1265 11:27:55.125000 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1266 11:27:55.125546 PCI: 00:1f.2
1267 11:27:55.135099 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1268 11:27:55.145273 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1269 11:27:55.148424 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1270 11:27:55.161831 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1271 11:27:55.171975 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1272 11:27:55.172535 GENERIC: 0.0
1273 11:27:55.174858 PCI: 00:1f.5
1274 11:27:55.184822 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1275 11:27:55.188888 Done allocating resources.
1276 11:27:55.191555 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2095 ms
1277 11:27:55.195218 Enabling resources...
1278 11:27:55.199278 PCI: 00:00.0 subsystem <- 8086/4e22
1279 11:27:55.201787 PCI: 00:00.0 cmd <- 06
1280 11:27:55.205041 PCI: 00:02.0 subsystem <- 8086/4e55
1281 11:27:55.209186 PCI: 00:02.0 cmd <- 03
1282 11:27:55.212224 PCI: 00:04.0 subsystem <- 8086/4e03
1283 11:27:55.215233 PCI: 00:04.0 cmd <- 02
1284 11:27:55.218814 PCI: 00:05.0 bridge ctrl <- 0003
1285 11:27:55.222033 PCI: 00:05.0 subsystem <- 8086/4e19
1286 11:27:55.225581 PCI: 00:05.0 cmd <- 02
1287 11:27:55.226040 PCI: 00:08.0 cmd <- 06
1288 11:27:55.228252 PCI: 00:14.0 subsystem <- 8086/4ded
1289 11:27:55.231783 PCI: 00:14.0 cmd <- 02
1290 11:27:55.235219 PCI: 00:14.3 subsystem <- 8086/4df0
1291 11:27:55.238378 PCI: 00:14.3 cmd <- 02
1292 11:27:55.241583 PCI: 00:14.5 subsystem <- 8086/4df8
1293 11:27:55.245230 PCI: 00:14.5 cmd <- 06
1294 11:27:55.248286 PCI: 00:15.0 subsystem <- 8086/4de8
1295 11:27:55.251906 PCI: 00:15.0 cmd <- 02
1296 11:27:55.255216 PCI: 00:15.1 subsystem <- 8086/4de9
1297 11:27:55.258784 PCI: 00:15.1 cmd <- 02
1298 11:27:55.261967 PCI: 00:15.2 subsystem <- 8086/4dea
1299 11:27:55.262522 PCI: 00:15.2 cmd <- 02
1300 11:27:55.268126 PCI: 00:15.3 subsystem <- 8086/4deb
1301 11:27:55.268681 PCI: 00:15.3 cmd <- 02
1302 11:27:55.271686 PCI: 00:16.0 subsystem <- 8086/4de0
1303 11:27:55.274804 PCI: 00:16.0 cmd <- 02
1304 11:27:55.278436 PCI: 00:19.0 subsystem <- 8086/4dc5
1305 11:27:55.281955 PCI: 00:19.0 cmd <- 02
1306 11:27:55.284725 PCI: 00:19.2 subsystem <- 8086/4dc7
1307 11:27:55.288048 PCI: 00:19.2 cmd <- 06
1308 11:27:55.291667 PCI: 00:1a.0 subsystem <- 8086/4dc4
1309 11:27:55.295088 PCI: 00:1a.0 cmd <- 06
1310 11:27:55.298461 PCI: 00:1e.2 subsystem <- 8086/4daa
1311 11:27:55.299014 PCI: 00:1e.2 cmd <- 06
1312 11:27:55.305094 PCI: 00:1f.0 subsystem <- 8086/4d87
1313 11:27:55.305649 PCI: 00:1f.0 cmd <- 407
1314 11:27:55.308352 PCI: 00:1f.3 subsystem <- 8086/4dc8
1315 11:27:55.311625 PCI: 00:1f.3 cmd <- 02
1316 11:27:55.314966 PCI: 00:1f.5 subsystem <- 8086/4da4
1317 11:27:55.318180 PCI: 00:1f.5 cmd <- 406
1318 11:27:55.322636 done.
1319 11:27:55.326063 BS: BS_DEV_ENABLE run times (exec / console): 7 / 121 ms
1320 11:27:55.329089 Initializing devices...
1321 11:27:55.332487 Root Device init
1322 11:27:55.333037 mainboard: EC init
1323 11:27:55.338767 Chrome EC: Set SMI mask to 0x0000000000000000
1324 11:27:55.348958 Chrome EC: clear events_b mask to 0x0000000000000000
1325 11:27:55.349403 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1326 11:27:55.355106 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1327 11:27:55.361995 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1328 11:27:55.368598 Chrome EC: Set WAKE mask to 0x0000000000000000
1329 11:27:55.372067 Root Device init finished in 37 msecs
1330 11:27:55.375363 PCI: 00:00.0 init
1331 11:27:55.378975 CPU TDP = 6 Watts
1332 11:27:55.379168 CPU PL1 = 7 Watts
1333 11:27:55.382042 CPU PL2 = 12 Watts
1334 11:27:55.385471 PCI: 00:00.0 init finished in 6 msecs
1335 11:27:55.388601 PCI: 00:02.0 init
1336 11:27:55.392301 GMA: Found VBT in CBFS
1337 11:27:55.392516 GMA: Found valid VBT in CBFS
1338 11:27:55.398927 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1339 11:27:55.405317 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1340 11:27:55.412173 PCI: 00:02.0 init finished in 18 msecs
1341 11:27:55.412464 PCI: 00:08.0 init
1342 11:27:55.415505 PCI: 00:08.0 init finished in 0 msecs
1343 11:27:55.419558 PCI: 00:14.0 init
1344 11:27:55.422313 XHCI: Updated LFPS sampling OFF time to 9 ms
1345 11:27:55.429167 PCI: 00:14.0 init finished in 4 msecs
1346 11:27:55.429762 PCI: 00:15.0 init
1347 11:27:55.432702 I2C bus 0 version 0x3230302a
1348 11:27:55.435652 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1349 11:27:55.442171 PCI: 00:15.0 init finished in 6 msecs
1350 11:27:55.442726 PCI: 00:15.1 init
1351 11:27:55.445607 I2C bus 1 version 0x3230302a
1352 11:27:55.448667 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1353 11:27:55.452078 PCI: 00:15.1 init finished in 6 msecs
1354 11:27:55.455773 PCI: 00:15.2 init
1355 11:27:55.458915 I2C bus 2 version 0x3230302a
1356 11:27:55.462274 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1357 11:27:55.465217 PCI: 00:15.2 init finished in 6 msecs
1358 11:27:55.468632 PCI: 00:15.3 init
1359 11:27:55.472219 I2C bus 3 version 0x3230302a
1360 11:27:55.475484 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1361 11:27:55.478916 PCI: 00:15.3 init finished in 6 msecs
1362 11:27:55.479524 PCI: 00:16.0 init
1363 11:27:55.485602 PCI: 00:16.0 init finished in 0 msecs
1364 11:27:55.486157 PCI: 00:19.0 init
1365 11:27:55.488840 I2C bus 4 version 0x3230302a
1366 11:27:55.492139 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1367 11:27:55.495394 PCI: 00:19.0 init finished in 6 msecs
1368 11:27:55.499012 PCI: 00:1a.0 init
1369 11:27:55.502295 PCI: 00:1a.0 init finished in 0 msecs
1370 11:27:55.505990 PCI: 00:1f.0 init
1371 11:27:55.508803 IOAPIC: Initializing IOAPIC at 0xfec00000
1372 11:27:55.515969 IOAPIC: Bootstrap Processor Local APIC = 0x00
1373 11:27:55.516524 IOAPIC: ID = 0x02
1374 11:27:55.519082 IOAPIC: Dumping registers
1375 11:27:55.522334 reg 0x0000: 0x02000000
1376 11:27:55.522791 reg 0x0001: 0x00770020
1377 11:27:55.525629 reg 0x0002: 0x00000000
1378 11:27:55.528809 PCI: 00:1f.0 init finished in 21 msecs
1379 11:27:55.532483 PCI: 00:1f.2 init
1380 11:27:55.535656 Disabling ACPI via APMC.
1381 11:27:55.539262 APMC done.
1382 11:27:55.542334 PCI: 00:1f.2 init finished in 6 msecs
1383 11:27:55.553782 PNP: 0c09.0 init
1384 11:27:55.556950 Google Chrome EC uptime: 6.517 seconds
1385 11:27:55.564295 Google Chrome AP resets since EC boot: 0
1386 11:27:55.566580 Google Chrome most recent AP reset causes:
1387 11:27:55.573604 Google Chrome EC reset flags at last EC boot: reset-pin
1388 11:27:55.576899 PNP: 0c09.0 init finished in 18 msecs
1389 11:27:55.577445 Devices initialized
1390 11:27:55.580420 Show all devs... After init.
1391 11:27:55.583337 Root Device: enabled 1
1392 11:27:55.586925 CPU_CLUSTER: 0: enabled 1
1393 11:27:55.590466 DOMAIN: 0000: enabled 1
1394 11:27:55.591019 PCI: 00:00.0: enabled 1
1395 11:27:55.593780 PCI: 00:02.0: enabled 1
1396 11:27:55.597180 PCI: 00:04.0: enabled 1
1397 11:27:55.597739 PCI: 00:05.0: enabled 1
1398 11:27:55.600008 PCI: 00:09.0: enabled 0
1399 11:27:55.603600 PCI: 00:12.6: enabled 0
1400 11:27:55.607056 PCI: 00:14.0: enabled 1
1401 11:27:55.607657 PCI: 00:14.1: enabled 0
1402 11:27:55.610631 PCI: 00:14.2: enabled 0
1403 11:27:55.613805 PCI: 00:14.3: enabled 1
1404 11:27:55.617039 PCI: 00:14.5: enabled 1
1405 11:27:55.617603 PCI: 00:15.0: enabled 1
1406 11:27:55.620369 PCI: 00:15.1: enabled 1
1407 11:27:55.623780 PCI: 00:15.2: enabled 1
1408 11:27:55.627177 PCI: 00:15.3: enabled 1
1409 11:27:55.627741 PCI: 00:16.0: enabled 1
1410 11:27:55.630565 PCI: 00:16.1: enabled 0
1411 11:27:55.633422 PCI: 00:16.4: enabled 0
1412 11:27:55.633948 PCI: 00:16.5: enabled 0
1413 11:27:55.636944 PCI: 00:17.0: enabled 0
1414 11:27:55.639778 PCI: 00:19.0: enabled 1
1415 11:27:55.643476 PCI: 00:19.1: enabled 0
1416 11:27:55.644036 PCI: 00:19.2: enabled 1
1417 11:27:55.646692 PCI: 00:1a.0: enabled 1
1418 11:27:55.649775 PCI: 00:1c.0: enabled 0
1419 11:27:55.653019 PCI: 00:1c.1: enabled 0
1420 11:27:55.653478 PCI: 00:1c.2: enabled 0
1421 11:27:55.656772 PCI: 00:1c.3: enabled 0
1422 11:27:55.659899 PCI: 00:1c.4: enabled 0
1423 11:27:55.663292 PCI: 00:1c.5: enabled 0
1424 11:27:55.663750 PCI: 00:1c.6: enabled 0
1425 11:27:55.666472 PCI: 00:1c.7: enabled 1
1426 11:27:55.670132 PCI: 00:1e.0: enabled 0
1427 11:27:55.672959 PCI: 00:1e.1: enabled 0
1428 11:27:55.673419 PCI: 00:1e.2: enabled 1
1429 11:27:55.676394 PCI: 00:1e.3: enabled 0
1430 11:27:55.679880 PCI: 00:1f.0: enabled 1
1431 11:27:55.680340 PCI: 00:1f.1: enabled 0
1432 11:27:55.683170 PCI: 00:1f.2: enabled 1
1433 11:27:55.686317 PCI: 00:1f.3: enabled 1
1434 11:27:55.689813 PCI: 00:1f.4: enabled 0
1435 11:27:55.690371 PCI: 00:1f.5: enabled 1
1436 11:27:55.693393 PCI: 00:1f.7: enabled 0
1437 11:27:55.696043 GENERIC: 0.0: enabled 1
1438 11:27:55.700026 GENERIC: 0.0: enabled 1
1439 11:27:55.700581 USB0 port 0: enabled 1
1440 11:27:55.703184 GENERIC: 0.0: enabled 1
1441 11:27:55.706429 I2C: 00:2c: enabled 1
1442 11:27:55.706984 I2C: 00:15: enabled 1
1443 11:27:55.709730 GENERIC: 0.0: enabled 0
1444 11:27:55.713266 I2C: 00:15: enabled 1
1445 11:27:55.713827 I2C: 00:10: enabled 0
1446 11:27:55.716110 I2C: 00:10: enabled 0
1447 11:27:55.720096 I2C: 00:2c: enabled 1
1448 11:27:55.720650 I2C: 00:40: enabled 1
1449 11:27:55.723066 I2C: 00:10: enabled 1
1450 11:27:55.725999 I2C: 00:39: enabled 1
1451 11:27:55.726463 I2C: 00:36: enabled 1
1452 11:27:55.729901 I2C: 00:10: enabled 0
1453 11:27:55.733557 I2C: 00:0c: enabled 1
1454 11:27:55.736232 I2C: 00:50: enabled 1
1455 11:27:55.736790 I2C: 00:1a: enabled 1
1456 11:27:55.739487 I2C: 00:1a: enabled 0
1457 11:27:55.742972 I2C: 00:1a: enabled 0
1458 11:27:55.743581 I2C: 00:28: enabled 1
1459 11:27:55.746055 I2C: 00:29: enabled 1
1460 11:27:55.749091 PCI: 00:00.0: enabled 1
1461 11:27:55.749557 SPI: 00: enabled 1
1462 11:27:55.753062 PNP: 0c09.0: enabled 1
1463 11:27:55.755804 GENERIC: 0.0: enabled 0
1464 11:27:55.756400 USB2 port 0: enabled 1
1465 11:27:55.759172 USB2 port 1: enabled 1
1466 11:27:55.762829 USB2 port 2: enabled 1
1467 11:27:55.763440 USB2 port 3: enabled 1
1468 11:27:55.766139 USB2 port 4: enabled 0
1469 11:27:55.769378 USB2 port 5: enabled 1
1470 11:27:55.772511 USB2 port 6: enabled 0
1471 11:27:55.772976 USB2 port 7: enabled 1
1472 11:27:55.775805 USB3 port 0: enabled 1
1473 11:27:55.779322 USB3 port 1: enabled 1
1474 11:27:55.779784 USB3 port 2: enabled 1
1475 11:27:55.782434 USB3 port 3: enabled 1
1476 11:27:55.785850 APIC: 00: enabled 1
1477 11:27:55.786411 APIC: 02: enabled 1
1478 11:27:55.789105 PCI: 00:08.0: enabled 1
1479 11:27:55.796318 BS: BS_DEV_INIT run times (exec / console): 25 / 437 ms
1480 11:27:55.799259 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1481 11:27:55.802334 ELOG: NV offset 0xbfa000 size 0x1000
1482 11:27:55.810781 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1483 11:27:55.817000 ELOG: Event(17) added with size 13 at 2023-06-09 11:27:55 UTC
1484 11:27:55.823635 ELOG: Event(92) added with size 9 at 2023-06-09 11:27:55 UTC
1485 11:27:55.830376 ELOG: Event(93) added with size 9 at 2023-06-09 11:27:55 UTC
1486 11:27:55.836824 ELOG: Event(9E) added with size 10 at 2023-06-09 11:27:55 UTC
1487 11:27:55.843871 ELOG: Event(9F) added with size 14 at 2023-06-09 11:27:55 UTC
1488 11:27:55.847571 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1489 11:27:55.853682 ELOG: Event(A1) added with size 10 at 2023-06-09 11:27:55 UTC
1490 11:27:55.863286 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1491 11:27:55.867021 ELOG: Event(A0) added with size 9 at 2023-06-09 11:27:55 UTC
1492 11:27:55.873412 elog_add_boot_reason: Logged dev mode boot
1493 11:27:55.880034 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1494 11:27:55.880503 Finalize devices...
1495 11:27:55.883366 Devices finalized
1496 11:27:55.887205 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1497 11:27:55.893512 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1498 11:27:55.900012 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1499 11:27:55.903388 ME: HFSTS1 : 0x80030045
1500 11:27:55.907099 ME: HFSTS2 : 0x30280136
1501 11:27:55.909923 ME: HFSTS3 : 0x00000050
1502 11:27:55.916602 ME: HFSTS4 : 0x00004000
1503 11:27:55.919971 ME: HFSTS5 : 0x00000000
1504 11:27:55.923395 ME: HFSTS6 : 0x40400006
1505 11:27:55.926738 ME: Manufacturing Mode : NO
1506 11:27:55.929842 ME: FW Partition Table : OK
1507 11:27:55.933151 ME: Bringup Loader Failure : NO
1508 11:27:55.936556 ME: Firmware Init Complete : NO
1509 11:27:55.939994 ME: Boot Options Present : NO
1510 11:27:55.943518 ME: Update In Progress : NO
1511 11:27:55.947014 ME: D0i3 Support : YES
1512 11:27:55.950091 ME: Low Power State Enabled : NO
1513 11:27:55.953286 ME: CPU Replaced : YES
1514 11:27:55.956681 ME: CPU Replacement Valid : YES
1515 11:27:55.959669 ME: Current Working State : 5
1516 11:27:55.962995 ME: Current Operation State : 1
1517 11:27:55.966363 ME: Current Operation Mode : 3
1518 11:27:55.969739 ME: Error Code : 0
1519 11:27:55.972808 ME: CPU Debug Disabled : YES
1520 11:27:55.976014 ME: TXT Support : NO
1521 11:27:55.982657 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1522 11:27:55.985854 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1523 11:27:55.993080 ACPI: Writing ACPI tables at 76b27000.
1524 11:27:55.993636 ACPI: * FACS
1525 11:27:55.996372 ACPI: * DSDT
1526 11:27:56.000144 Ramoops buffer: 0x100000@0x76a26000.
1527 11:27:56.003369 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1528 11:27:56.010183 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1529 11:27:56.012961 Google Chrome EC: version:
1530 11:27:56.016161 ro: magolor_1.1.9999-103b6f9
1531 11:27:56.016624 rw: magolor_1.1.9999-103b6f9
1532 11:27:56.019844 running image: 1
1533 11:27:56.027238 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1534 11:27:56.029974 ACPI: * FADT
1535 11:27:56.030531 SCI is IRQ9
1536 11:27:56.032942 ACPI: added table 1/32, length now 40
1537 11:27:56.036343 ACPI: * SSDT
1538 11:27:56.039647 Found 1 CPU(s) with 2 core(s) each.
1539 11:27:56.042883 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1540 11:27:56.049606 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1541 11:27:56.053030 Could not locate 'wifi_sar' in VPD.
1542 11:27:56.056704 Checking CBFS for default SAR values
1543 11:27:56.062873 wifi_sar_defaults.hex has bad len in CBFS
1544 11:27:56.066263 failed from getting SAR limits!
1545 11:27:56.069286 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1546 11:27:56.072778 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1547 11:27:56.079559 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1548 11:27:56.082702 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1549 11:27:56.089373 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1550 11:27:56.092710 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1551 11:27:56.099277 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1552 11:27:56.105878 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1553 11:27:56.112672 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1554 11:27:56.115476 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1555 11:27:56.122488 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1556 11:27:56.129140 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1557 11:27:56.132319 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1558 11:27:56.139368 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1559 11:27:56.142533 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1560 11:27:56.149848 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1561 11:27:56.152956 PS2K: Passing 101 keymaps to kernel
1562 11:27:56.160136 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1563 11:27:56.166231 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1564 11:27:56.169240 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1565 11:27:56.175714 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1566 11:27:56.179594 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1567 11:27:56.186333 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1568 11:27:56.192554 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1569 11:27:56.195821 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1570 11:27:56.202688 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1571 11:27:56.209477 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1572 11:27:56.212522 ACPI: added table 2/32, length now 44
1573 11:27:56.215538 ACPI: * MCFG
1574 11:27:56.219347 ACPI: added table 3/32, length now 48
1575 11:27:56.219802 ACPI: * TPM2
1576 11:27:56.222444 TPM2 log created at 0x76a16000
1577 11:27:56.225937 ACPI: added table 4/32, length now 52
1578 11:27:56.229102 ACPI: * MADT
1579 11:27:56.229658 SCI is IRQ9
1580 11:27:56.232814 ACPI: added table 5/32, length now 56
1581 11:27:56.236092 current = 76b2d580
1582 11:27:56.236647 ACPI: * DMAR
1583 11:27:56.242099 ACPI: added table 6/32, length now 60
1584 11:27:56.246148 ACPI: added table 7/32, length now 64
1585 11:27:56.246705 ACPI: * HPET
1586 11:27:56.249372 ACPI: added table 8/32, length now 68
1587 11:27:56.252398 ACPI: done.
1588 11:27:56.255685 ACPI tables: 26304 bytes.
1589 11:27:56.259703 smbios_write_tables: 76a15000
1590 11:27:56.262817 EC returned error result code 3
1591 11:27:56.265492 Couldn't obtain OEM name from CBI
1592 11:27:56.269024 Create SMBIOS type 16
1593 11:27:56.269479 Create SMBIOS type 17
1594 11:27:56.272420 GENERIC: 0.0 (WIFI Device)
1595 11:27:56.275647 SMBIOS tables: 913 bytes.
1596 11:27:56.278857 Writing table forward entry at 0x00000500
1597 11:27:56.285559 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1598 11:27:56.289106 Writing coreboot table at 0x76b4b000
1599 11:27:56.295777 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1600 11:27:56.298563 1. 0000000000001000-000000000009ffff: RAM
1601 11:27:56.305387 2. 00000000000a0000-00000000000fffff: RESERVED
1602 11:27:56.308734 3. 0000000000100000-0000000076a14fff: RAM
1603 11:27:56.315396 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1604 11:27:56.318645 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1605 11:27:56.325227 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1606 11:27:56.331912 7. 0000000077000000-000000007fbfffff: RESERVED
1607 11:27:56.335500 8. 00000000c0000000-00000000cfffffff: RESERVED
1608 11:27:56.338467 9. 00000000fb000000-00000000fb000fff: RESERVED
1609 11:27:56.345283 10. 00000000fe000000-00000000fe00ffff: RESERVED
1610 11:27:56.348325 11. 00000000fea80000-00000000fea87fff: RESERVED
1611 11:27:56.355786 12. 00000000fed80000-00000000fed87fff: RESERVED
1612 11:27:56.358527 13. 00000000fed90000-00000000fed92fff: RESERVED
1613 11:27:56.365430 14. 00000000feda0000-00000000feda1fff: RESERVED
1614 11:27:56.368312 15. 0000000100000000-00000001803fffff: RAM
1615 11:27:56.371613 Passing 4 GPIOs to payload:
1616 11:27:56.375055 NAME | PORT | POLARITY | VALUE
1617 11:27:56.381559 lid | undefined | high | high
1618 11:27:56.388080 power | undefined | high | low
1619 11:27:56.391589 oprom | undefined | high | low
1620 11:27:56.397889 EC in RW | 0x000000b9 | high | low
1621 11:27:56.404857 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum 77f9
1622 11:27:56.405404 coreboot table: 1504 bytes.
1623 11:27:56.411100 IMD ROOT 0. 0x76fff000 0x00001000
1624 11:27:56.414681 IMD SMALL 1. 0x76ffe000 0x00001000
1625 11:27:56.418071 FSP MEMORY 2. 0x76c4e000 0x003b0000
1626 11:27:56.421441 CONSOLE 3. 0x76c2e000 0x00020000
1627 11:27:56.424537 FMAP 4. 0x76c2d000 0x00000578
1628 11:27:56.428250 TIME STAMP 5. 0x76c2c000 0x00000910
1629 11:27:56.431444 VBOOT WORK 6. 0x76c18000 0x00014000
1630 11:27:56.434630 ROMSTG STCK 7. 0x76c17000 0x00001000
1631 11:27:56.440982 AFTER CAR 8. 0x76c0d000 0x0000a000
1632 11:27:56.445075 RAMSTAGE 9. 0x76ba7000 0x00066000
1633 11:27:56.447957 REFCODE 10. 0x76b67000 0x00040000
1634 11:27:56.451677 SMM BACKUP 11. 0x76b57000 0x00010000
1635 11:27:56.455075 4f444749 12. 0x76b55000 0x00002000
1636 11:27:56.458222 EXT VBT13. 0x76b53000 0x00001c43
1637 11:27:56.461076 COREBOOT 14. 0x76b4b000 0x00008000
1638 11:27:56.465026 ACPI 15. 0x76b27000 0x00024000
1639 11:27:56.467769 ACPI GNVS 16. 0x76b26000 0x00001000
1640 11:27:56.471518 RAMOOPS 17. 0x76a26000 0x00100000
1641 11:27:56.478047 TPM2 TCGLOG18. 0x76a16000 0x00010000
1642 11:27:56.480886 SMBIOS 19. 0x76a15000 0x00000800
1643 11:27:56.481375 IMD small region:
1644 11:27:56.484352 IMD ROOT 0. 0x76ffec00 0x00000400
1645 11:27:56.491444 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1646 11:27:56.494539 VPD 2. 0x76ffeb60 0x0000006c
1647 11:27:56.497585 POWER STATE 3. 0x76ffeb20 0x00000040
1648 11:27:56.501139 ROMSTAGE 4. 0x76ffeb00 0x00000004
1649 11:27:56.504666 MEM INFO 5. 0x76ffe920 0x000001e0
1650 11:27:56.511425 BS: BS_WRITE_TABLES run times (exec / console): 7 / 516 ms
1651 11:27:56.514600 MTRR: Physical address space:
1652 11:27:56.520980 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1653 11:27:56.527740 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1654 11:27:56.534446 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1655 11:27:56.537665 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1656 11:27:56.544477 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1657 11:27:56.551145 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1658 11:27:56.558311 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1659 11:27:56.560919 MTRR: Fixed MSR 0x250 0x0606060606060606
1660 11:27:56.564238 MTRR: Fixed MSR 0x258 0x0606060606060606
1661 11:27:56.570930 MTRR: Fixed MSR 0x259 0x0000000000000000
1662 11:27:56.574214 MTRR: Fixed MSR 0x268 0x0606060606060606
1663 11:27:56.577870 MTRR: Fixed MSR 0x269 0x0606060606060606
1664 11:27:56.580703 MTRR: Fixed MSR 0x26a 0x0606060606060606
1665 11:27:56.587606 MTRR: Fixed MSR 0x26b 0x0606060606060606
1666 11:27:56.590968 MTRR: Fixed MSR 0x26c 0x0606060606060606
1667 11:27:56.594300 MTRR: Fixed MSR 0x26d 0x0606060606060606
1668 11:27:56.597587 MTRR: Fixed MSR 0x26e 0x0606060606060606
1669 11:27:56.603968 MTRR: Fixed MSR 0x26f 0x0606060606060606
1670 11:27:56.604544 call enable_fixed_mtrr()
1671 11:27:56.610880 CPU physical address size: 39 bits
1672 11:27:56.614017 MTRR: default type WB/UC MTRR counts: 6/5.
1673 11:27:56.617840 MTRR: UC selected as default type.
1674 11:27:56.624010 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1675 11:27:56.630772 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1676 11:27:56.637278 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1677 11:27:56.640548 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1678 11:27:56.646847 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1679 11:27:56.650863
1680 11:27:56.651479 MTRR check
1681 11:27:56.653754 Fixed MTRRs : Enabled
1682 11:27:56.654315 Variable MTRRs: Enabled
1683 11:27:56.654685
1684 11:27:56.660099 MTRR: Fixed MSR 0x250 0x0606060606060606
1685 11:27:56.663719 MTRR: Fixed MSR 0x258 0x0606060606060606
1686 11:27:56.666905 MTRR: Fixed MSR 0x259 0x0000000000000000
1687 11:27:56.670313 MTRR: Fixed MSR 0x268 0x0606060606060606
1688 11:27:56.677080 MTRR: Fixed MSR 0x269 0x0606060606060606
1689 11:27:56.680553 MTRR: Fixed MSR 0x26a 0x0606060606060606
1690 11:27:56.683368 MTRR: Fixed MSR 0x26b 0x0606060606060606
1691 11:27:56.687276 MTRR: Fixed MSR 0x26c 0x0606060606060606
1692 11:27:56.693422 MTRR: Fixed MSR 0x26d 0x0606060606060606
1693 11:27:56.696864 MTRR: Fixed MSR 0x26e 0x0606060606060606
1694 11:27:56.700377 MTRR: Fixed MSR 0x26f 0x0606060606060606
1695 11:27:56.706526 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1696 11:27:56.709758 call enable_fixed_mtrr()
1697 11:27:56.714381 Checking cr50 for pending updates
1698 11:27:56.715013 CPU physical address size: 39 bits
1699 11:27:56.718522 Reading cr50 TPM mode
1700 11:27:56.728547 BS: BS_PAYLOAD_LOAD entry times (exec / console): 11 / 6 ms
1701 11:27:56.736424 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1702 11:27:56.739351 Checking segment from ROM address 0xfff9d5b8
1703 11:27:56.746105 Checking segment from ROM address 0xfff9d5d4
1704 11:27:56.749501 Loading segment from ROM address 0xfff9d5b8
1705 11:27:56.752633 code (compression=0)
1706 11:27:56.759336 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1707 11:27:56.769731 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1708 11:27:56.772295 it's not compressed!
1709 11:27:56.898268 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1710 11:27:56.904800 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1711 11:27:56.912369 Loading segment from ROM address 0xfff9d5d4
1712 11:27:56.915985 Entry Point 0x30000000
1713 11:27:56.916539 Loaded segments
1714 11:27:56.922205 BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms
1715 11:27:56.938169 Finalizing chipset.
1716 11:27:56.941708 Finalizing SMM.
1717 11:27:56.942173 APMC done.
1718 11:27:56.948167 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1719 11:27:56.951536 mp_park_aps done after 0 msecs.
1720 11:27:56.954673 Jumping to boot code at 0x30000000(0x76b4b000)
1721 11:27:56.964778 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1722 11:27:56.965370
1723 11:27:56.965743
1724 11:27:56.966083
1725 11:27:56.968484 Starting depthcharge on Magolor...
1726 11:27:56.968941
1727 11:27:56.969958 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1728 11:27:56.970482 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1729 11:27:56.970923 Setting prompt string to ['dedede:']
1730 11:27:56.971413 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1731 11:27:56.978495 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1732 11:27:56.979070
1733 11:27:56.984691 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1734 11:27:56.985158
1735 11:27:56.988327 fw_config match found: AUDIO_AMP=UNPROVISIONED
1736 11:27:56.988889
1737 11:27:56.991802 Wipe memory regions:
1738 11:27:56.992262
1739 11:27:56.994835 [0x00000000001000, 0x000000000a0000)
1740 11:27:56.995321
1741 11:27:56.998497 [0x00000000100000, 0x00000030000000)
1742 11:27:57.127331
1743 11:27:57.130229 [0x00000031062170, 0x00000076a15000)
1744 11:27:57.299998
1745 11:27:57.303716 [0x00000100000000, 0x00000180400000)
1746 11:27:58.365643
1747 11:27:58.365833 R8152: Initializing
1748 11:27:58.365938
1749 11:27:58.368831 Version 6 (ocp_data = 5c30)
1750 11:27:58.373338
1751 11:27:58.373545 R8152: Done initializing
1752 11:27:58.373660
1753 11:27:58.375752 Adding net device
1754 11:27:58.375978
1755 11:27:58.379039 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1756 11:27:58.382338
1757 11:27:58.382585
1758 11:27:58.382727
1759 11:27:58.383167 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1761 11:27:58.483980 dedede: tftpboot 192.168.201.1 10657506/tftp-deploy-4s6mispj/kernel/bzImage 10657506/tftp-deploy-4s6mispj/kernel/cmdline 10657506/tftp-deploy-4s6mispj/ramdisk/ramdisk.cpio.gz
1762 11:27:58.484177 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1763 11:27:58.484292 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1764 11:27:58.489131 tftpboot 192.168.201.1 10657506/tftp-deploy-4s6mispj/kernel/bzImploy-4s6mispj/kernel/cmdline 10657506/tftp-deploy-4s6mispj/ramdisk/ramdisk.cpio.gz
1765 11:27:58.489221
1766 11:27:58.489286 Waiting for link
1767 11:27:58.690367
1768 11:27:58.690503 done.
1769 11:27:58.690571
1770 11:27:58.690631 MAC: 00:24:32:30:79:17
1771 11:27:58.690689
1772 11:27:58.693581 Sending DHCP discover... done.
1773 11:27:58.693686
1774 11:27:58.697185 Waiting for reply... done.
1775 11:27:58.697279
1776 11:27:58.700145 Sending DHCP request... done.
1777 11:27:58.700236
1778 11:27:58.703736 Waiting for reply... done.
1779 11:27:58.703823
1780 11:27:58.707022 My ip is 192.168.201.10
1781 11:27:58.707155
1782 11:27:58.710260 The DHCP server ip is 192.168.201.1
1783 11:27:58.710364
1784 11:27:58.713449 TFTP server IP predefined by user: 192.168.201.1
1785 11:27:58.713598
1786 11:27:58.720237 Bootfile predefined by user: 10657506/tftp-deploy-4s6mispj/kernel/bzImage
1787 11:27:58.720348
1788 11:27:58.723419 Sending tftp read request... done.
1789 11:27:58.723510
1790 11:27:58.730611 Waiting for the transfer...
1791 11:27:58.730729
1792 11:27:59.278534 00000000 ################################################################
1793 11:27:59.278736
1794 11:27:59.815929 00080000 ################################################################
1795 11:27:59.816105
1796 11:28:00.354767 00100000 ################################################################
1797 11:28:00.354975
1798 11:28:00.902246 00180000 ################################################################
1799 11:28:00.902451
1800 11:28:01.448420 00200000 ################################################################
1801 11:28:01.448621
1802 11:28:01.993342 00280000 ################################################################
1803 11:28:01.993549
1804 11:28:02.530041 00300000 ################################################################
1805 11:28:02.530242
1806 11:28:03.069596 00380000 ################################################################
1807 11:28:03.069774
1808 11:28:03.606080 00400000 ################################################################
1809 11:28:03.606284
1810 11:28:04.141906 00480000 ################################################################
1811 11:28:04.142114
1812 11:28:04.673035 00500000 ################################################################
1813 11:28:04.673237
1814 11:28:05.208626 00580000 ################################################################
1815 11:28:05.208842
1816 11:28:05.745783 00600000 ################################################################
1817 11:28:05.745976
1818 11:28:06.285587 00680000 ################################################################
1819 11:28:06.285751
1820 11:28:06.835070 00700000 ################################################################
1821 11:28:06.835256
1822 11:28:07.389592 00780000 ################################################################
1823 11:28:07.389768
1824 11:28:07.934070 00800000 ################################################################
1825 11:28:07.934247
1826 11:28:08.487263 00880000 ################################################################
1827 11:28:08.487476
1828 11:28:09.039554 00900000 ################################################################
1829 11:28:09.039701
1830 11:28:09.589491 00980000 ################################################################
1831 11:28:09.589635
1832 11:28:09.983235 00a00000 ############################################### done.
1833 11:28:09.983374
1834 11:28:09.986482 The bootfile was 10863104 bytes long.
1835 11:28:09.986585
1836 11:28:09.989326 Sending tftp read request... done.
1837 11:28:09.989414
1838 11:28:09.992996 Waiting for the transfer...
1839 11:28:09.993085
1840 11:28:10.544756 00000000 ################################################################
1841 11:28:10.544933
1842 11:28:11.115384 00080000 ################################################################
1843 11:28:11.115561
1844 11:28:11.683054 00100000 ################################################################
1845 11:28:11.683221
1846 11:28:12.236634 00180000 ################################################################
1847 11:28:12.236773
1848 11:28:12.792053 00200000 ################################################################
1849 11:28:12.792184
1850 11:28:13.342707 00280000 ################################################################
1851 11:28:13.342849
1852 11:28:13.885195 00300000 ################################################################
1853 11:28:13.885332
1854 11:28:14.427277 00380000 ################################################################
1855 11:28:14.427414
1856 11:28:14.972482 00400000 ################################################################
1857 11:28:14.972619
1858 11:28:15.519203 00480000 ################################################################
1859 11:28:15.519370
1860 11:28:16.062974 00500000 ################################################################
1861 11:28:16.063112
1862 11:28:16.599955 00580000 ################################################################
1863 11:28:16.600118
1864 11:28:17.142251 00600000 ################################################################
1865 11:28:17.142440
1866 11:28:17.681494 00680000 ################################################################
1867 11:28:17.681625
1868 11:28:18.216767 00700000 ################################################################
1869 11:28:18.216922
1870 11:28:18.747669 00780000 ################################################################
1871 11:28:18.747800
1872 11:28:19.277478 00800000 ################################################################
1873 11:28:19.277613
1874 11:28:19.583909 00880000 ##################################### done.
1875 11:28:19.584050
1876 11:28:19.587579 Sending tftp read request... done.
1877 11:28:19.587670
1878 11:28:19.590666 Waiting for the transfer...
1879 11:28:19.590744
1880 11:28:19.590807 00000000 # done.
1881 11:28:19.590870
1882 11:28:19.600271 Command line loaded dynamically from TFTP file: 10657506/tftp-deploy-4s6mispj/kernel/cmdline
1883 11:28:19.600360
1884 11:28:19.613442 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1885 11:28:19.613570
1886 11:28:19.617146 ec_init: CrosEC protocol v3 supported (256, 256)
1887 11:28:19.625686
1888 11:28:19.629345 Shutting down all USB controllers.
1889 11:28:19.629451
1890 11:28:19.629549 Removing current net device
1891 11:28:19.629639
1892 11:28:19.632760 Finalizing coreboot
1893 11:28:19.632865
1894 11:28:19.639041 Exiting depthcharge with code 4 at timestamp: 29483732
1895 11:28:19.639153
1896 11:28:19.639223
1897 11:28:19.639288 Starting kernel ...
1898 11:28:19.639348
1899 11:28:19.639407
1900 11:28:19.639788 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
1901 11:28:19.639888 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
1902 11:28:19.639967 Setting prompt string to ['Linux version [0-9]']
1903 11:28:19.640042 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1904 11:28:19.640113 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1906 11:32:43.640185 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
1908 11:32:43.640437 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
1910 11:32:43.640633 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1913 11:32:43.640906 end: 2 depthcharge-action (duration 00:05:00) [common]
1915 11:32:43.641172 Cleaning after the job
1916 11:32:43.641291 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10657506/tftp-deploy-4s6mispj/ramdisk
1917 11:32:43.642507 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10657506/tftp-deploy-4s6mispj/kernel
1918 11:32:43.643890 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10657506/tftp-deploy-4s6mispj/modules
1919 11:32:43.644427 start: 5.1 power-off (timeout 00:00:30) [common]
1920 11:32:43.644581 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-7' '--port=1' '--command=off'
1921 11:32:43.721211 >> Command sent successfully.
1922 11:32:43.723603 Returned 0 in 0 seconds
1923 11:32:43.824021 end: 5.1 power-off (duration 00:00:00) [common]
1925 11:32:43.824342 start: 5.2 read-feedback (timeout 00:10:00) [common]
1926 11:32:43.824634 Listened to connection for namespace 'common' for up to 1s
1928 11:32:43.825013 Listened to connection for namespace 'common' for up to 1s
1929 11:32:44.825530 Finalising connection for namespace 'common'
1930 11:32:44.825711 Disconnecting from shell: Finalise
1931 11:32:44.825808
1932 11:32:44.926170 end: 5.2 read-feedback (duration 00:00:01) [common]
1933 11:32:44.926316 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10657506
1934 11:32:44.940892 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10657506
1935 11:32:44.941050 JobError: Your job cannot terminate cleanly.