Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
1 11:28:14.821061 lava-dispatcher, installed at version: 2023.05.1
2 11:28:14.821260 start: 0 validate
3 11:28:14.821393 Start time: 2023-06-09 11:28:14.821386+00:00 (UTC)
4 11:28:14.821508 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:28:14.821633 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230527.0%2Fx86%2Frootfs.cpio.gz exists
6 11:28:15.089226 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:28:15.089411 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.283-cip98-224-g5f5303d7920a9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:28:15.354514 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:28:15.354781 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.283-cip98-224-g5f5303d7920a9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 11:28:15.612900 validate duration: 0.79
12 11:28:15.613196 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 11:28:15.613294 start: 1.1 download-retry (timeout 00:10:00) [common]
14 11:28:15.613383 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 11:28:15.613524 Not decompressing ramdisk as can be used compressed.
16 11:28:15.613640 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230527.0/x86/rootfs.cpio.gz
17 11:28:15.613720 saving as /var/lib/lava/dispatcher/tmp/10657533/tftp-deploy-658iipsq/ramdisk/rootfs.cpio.gz
18 11:28:15.613781 total size: 8430069 (8MB)
19 11:28:15.614895 progress 0% (0MB)
20 11:28:15.617254 progress 5% (0MB)
21 11:28:15.619495 progress 10% (0MB)
22 11:28:15.621747 progress 15% (1MB)
23 11:28:15.623978 progress 20% (1MB)
24 11:28:15.626213 progress 25% (2MB)
25 11:28:15.628422 progress 30% (2MB)
26 11:28:15.630780 progress 35% (2MB)
27 11:28:15.632833 progress 40% (3MB)
28 11:28:15.635054 progress 45% (3MB)
29 11:28:15.637287 progress 50% (4MB)
30 11:28:15.639478 progress 55% (4MB)
31 11:28:15.641681 progress 60% (4MB)
32 11:28:15.643939 progress 65% (5MB)
33 11:28:15.646131 progress 70% (5MB)
34 11:28:15.648117 progress 75% (6MB)
35 11:28:15.650297 progress 80% (6MB)
36 11:28:15.652439 progress 85% (6MB)
37 11:28:15.654760 progress 90% (7MB)
38 11:28:15.656976 progress 95% (7MB)
39 11:28:15.659152 progress 100% (8MB)
40 11:28:15.659292 8MB downloaded in 0.05s (176.67MB/s)
41 11:28:15.659444 end: 1.1.1 http-download (duration 00:00:00) [common]
43 11:28:15.659679 end: 1.1 download-retry (duration 00:00:00) [common]
44 11:28:15.659764 start: 1.2 download-retry (timeout 00:10:00) [common]
45 11:28:15.659851 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 11:28:15.659978 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.283-cip98-224-g5f5303d7920a9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 11:28:15.660046 saving as /var/lib/lava/dispatcher/tmp/10657533/tftp-deploy-658iipsq/kernel/bzImage
48 11:28:15.660106 total size: 10863104 (10MB)
49 11:28:15.660165 No compression specified
50 11:28:15.661330 progress 0% (0MB)
51 11:28:15.664052 progress 5% (0MB)
52 11:28:15.666893 progress 10% (1MB)
53 11:28:15.669573 progress 15% (1MB)
54 11:28:15.672389 progress 20% (2MB)
55 11:28:15.675098 progress 25% (2MB)
56 11:28:15.677935 progress 30% (3MB)
57 11:28:15.680772 progress 35% (3MB)
58 11:28:15.683522 progress 40% (4MB)
59 11:28:15.686486 progress 45% (4MB)
60 11:28:15.689325 progress 50% (5MB)
61 11:28:15.692198 progress 55% (5MB)
62 11:28:15.695019 progress 60% (6MB)
63 11:28:15.697994 progress 65% (6MB)
64 11:28:15.701061 progress 70% (7MB)
65 11:28:15.703840 progress 75% (7MB)
66 11:28:15.706842 progress 80% (8MB)
67 11:28:15.709565 progress 85% (8MB)
68 11:28:15.712467 progress 90% (9MB)
69 11:28:15.715304 progress 95% (9MB)
70 11:28:15.718209 progress 100% (10MB)
71 11:28:15.718413 10MB downloaded in 0.06s (177.70MB/s)
72 11:28:15.718661 end: 1.2.1 http-download (duration 00:00:00) [common]
74 11:28:15.718893 end: 1.2 download-retry (duration 00:00:00) [common]
75 11:28:15.718981 start: 1.3 download-retry (timeout 00:10:00) [common]
76 11:28:15.719136 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 11:28:15.719297 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.283-cip98-224-g5f5303d7920a9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 11:28:15.719367 saving as /var/lib/lava/dispatcher/tmp/10657533/tftp-deploy-658iipsq/modules/modules.tar
79 11:28:15.719426 total size: 484428 (0MB)
80 11:28:15.719486 Using unxz to decompress xz
81 11:28:15.723475 progress 6% (0MB)
82 11:28:15.723914 progress 13% (0MB)
83 11:28:15.724199 progress 20% (0MB)
84 11:28:15.725872 progress 27% (0MB)
85 11:28:15.728032 progress 33% (0MB)
86 11:28:15.730380 progress 40% (0MB)
87 11:28:15.733296 progress 47% (0MB)
88 11:28:15.735642 progress 54% (0MB)
89 11:28:15.737708 progress 60% (0MB)
90 11:28:15.739876 progress 67% (0MB)
91 11:28:15.742141 progress 74% (0MB)
92 11:28:15.744450 progress 81% (0MB)
93 11:28:15.746746 progress 87% (0MB)
94 11:28:15.749123 progress 94% (0MB)
95 11:28:15.751223 progress 100% (0MB)
96 11:28:15.757723 0MB downloaded in 0.04s (12.07MB/s)
97 11:28:15.758050 end: 1.3.1 http-download (duration 00:00:00) [common]
99 11:28:15.758320 end: 1.3 download-retry (duration 00:00:00) [common]
100 11:28:15.758414 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
101 11:28:15.758506 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
102 11:28:15.758589 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 11:28:15.758672 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
104 11:28:15.758877 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10657533/lava-overlay-ekbdteb5
105 11:28:15.759003 makedir: /var/lib/lava/dispatcher/tmp/10657533/lava-overlay-ekbdteb5/lava-10657533/bin
106 11:28:15.759106 makedir: /var/lib/lava/dispatcher/tmp/10657533/lava-overlay-ekbdteb5/lava-10657533/tests
107 11:28:15.759202 makedir: /var/lib/lava/dispatcher/tmp/10657533/lava-overlay-ekbdteb5/lava-10657533/results
108 11:28:15.759314 Creating /var/lib/lava/dispatcher/tmp/10657533/lava-overlay-ekbdteb5/lava-10657533/bin/lava-add-keys
109 11:28:15.759455 Creating /var/lib/lava/dispatcher/tmp/10657533/lava-overlay-ekbdteb5/lava-10657533/bin/lava-add-sources
110 11:28:15.759582 Creating /var/lib/lava/dispatcher/tmp/10657533/lava-overlay-ekbdteb5/lava-10657533/bin/lava-background-process-start
111 11:28:15.759708 Creating /var/lib/lava/dispatcher/tmp/10657533/lava-overlay-ekbdteb5/lava-10657533/bin/lava-background-process-stop
112 11:28:15.759828 Creating /var/lib/lava/dispatcher/tmp/10657533/lava-overlay-ekbdteb5/lava-10657533/bin/lava-common-functions
113 11:28:15.759948 Creating /var/lib/lava/dispatcher/tmp/10657533/lava-overlay-ekbdteb5/lava-10657533/bin/lava-echo-ipv4
114 11:28:15.760067 Creating /var/lib/lava/dispatcher/tmp/10657533/lava-overlay-ekbdteb5/lava-10657533/bin/lava-install-packages
115 11:28:15.760217 Creating /var/lib/lava/dispatcher/tmp/10657533/lava-overlay-ekbdteb5/lava-10657533/bin/lava-installed-packages
116 11:28:15.760336 Creating /var/lib/lava/dispatcher/tmp/10657533/lava-overlay-ekbdteb5/lava-10657533/bin/lava-os-build
117 11:28:15.760455 Creating /var/lib/lava/dispatcher/tmp/10657533/lava-overlay-ekbdteb5/lava-10657533/bin/lava-probe-channel
118 11:28:15.760576 Creating /var/lib/lava/dispatcher/tmp/10657533/lava-overlay-ekbdteb5/lava-10657533/bin/lava-probe-ip
119 11:28:15.760695 Creating /var/lib/lava/dispatcher/tmp/10657533/lava-overlay-ekbdteb5/lava-10657533/bin/lava-target-ip
120 11:28:15.760841 Creating /var/lib/lava/dispatcher/tmp/10657533/lava-overlay-ekbdteb5/lava-10657533/bin/lava-target-mac
121 11:28:15.760979 Creating /var/lib/lava/dispatcher/tmp/10657533/lava-overlay-ekbdteb5/lava-10657533/bin/lava-target-storage
122 11:28:15.761102 Creating /var/lib/lava/dispatcher/tmp/10657533/lava-overlay-ekbdteb5/lava-10657533/bin/lava-test-case
123 11:28:15.761221 Creating /var/lib/lava/dispatcher/tmp/10657533/lava-overlay-ekbdteb5/lava-10657533/bin/lava-test-event
124 11:28:15.761338 Creating /var/lib/lava/dispatcher/tmp/10657533/lava-overlay-ekbdteb5/lava-10657533/bin/lava-test-feedback
125 11:28:15.761473 Creating /var/lib/lava/dispatcher/tmp/10657533/lava-overlay-ekbdteb5/lava-10657533/bin/lava-test-raise
126 11:28:15.761598 Creating /var/lib/lava/dispatcher/tmp/10657533/lava-overlay-ekbdteb5/lava-10657533/bin/lava-test-reference
127 11:28:15.761723 Creating /var/lib/lava/dispatcher/tmp/10657533/lava-overlay-ekbdteb5/lava-10657533/bin/lava-test-runner
128 11:28:15.761843 Creating /var/lib/lava/dispatcher/tmp/10657533/lava-overlay-ekbdteb5/lava-10657533/bin/lava-test-set
129 11:28:15.761966 Creating /var/lib/lava/dispatcher/tmp/10657533/lava-overlay-ekbdteb5/lava-10657533/bin/lava-test-shell
130 11:28:15.762088 Updating /var/lib/lava/dispatcher/tmp/10657533/lava-overlay-ekbdteb5/lava-10657533/bin/lava-install-packages (oe)
131 11:28:15.762337 Updating /var/lib/lava/dispatcher/tmp/10657533/lava-overlay-ekbdteb5/lava-10657533/bin/lava-installed-packages (oe)
132 11:28:15.762483 Creating /var/lib/lava/dispatcher/tmp/10657533/lava-overlay-ekbdteb5/lava-10657533/environment
133 11:28:15.762590 LAVA metadata
134 11:28:15.762664 - LAVA_JOB_ID=10657533
135 11:28:15.762730 - LAVA_DISPATCHER_IP=192.168.201.1
136 11:28:15.762831 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
137 11:28:15.762899 skipped lava-vland-overlay
138 11:28:15.762972 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 11:28:15.763053 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
140 11:28:15.763114 skipped lava-multinode-overlay
141 11:28:15.763216 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 11:28:15.763297 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
143 11:28:15.763372 Loading test definitions
144 11:28:15.763461 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
145 11:28:15.763534 Using /lava-10657533 at stage 0
146 11:28:15.763838 uuid=10657533_1.4.2.3.1 testdef=None
147 11:28:15.763925 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 11:28:15.764009 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
149 11:28:15.764533 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 11:28:15.764757 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
152 11:28:15.765545 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 11:28:15.765775 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
155 11:28:15.766407 runner path: /var/lib/lava/dispatcher/tmp/10657533/lava-overlay-ekbdteb5/lava-10657533/0/tests/0_dmesg test_uuid 10657533_1.4.2.3.1
156 11:28:15.766558 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 11:28:15.766786 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
159 11:28:15.766858 Using /lava-10657533 at stage 1
160 11:28:15.767141 uuid=10657533_1.4.2.3.5 testdef=None
161 11:28:15.767228 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 11:28:15.767310 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
163 11:28:15.767768 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 11:28:15.767985 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
166 11:28:15.768612 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 11:28:15.768865 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
169 11:28:15.769591 runner path: /var/lib/lava/dispatcher/tmp/10657533/lava-overlay-ekbdteb5/lava-10657533/1/tests/1_bootrr test_uuid 10657533_1.4.2.3.5
170 11:28:15.769739 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 11:28:15.769942 Creating lava-test-runner.conf files
173 11:28:15.770006 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10657533/lava-overlay-ekbdteb5/lava-10657533/0 for stage 0
174 11:28:15.770093 - 0_dmesg
175 11:28:15.770172 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10657533/lava-overlay-ekbdteb5/lava-10657533/1 for stage 1
176 11:28:15.770260 - 1_bootrr
177 11:28:15.770361 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 11:28:15.770452 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
179 11:28:15.778892 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 11:28:15.779016 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
181 11:28:15.779106 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 11:28:15.779191 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 11:28:15.779275 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
184 11:28:16.030239 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 11:28:16.030747 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
186 11:28:16.030905 extracting modules file /var/lib/lava/dispatcher/tmp/10657533/tftp-deploy-658iipsq/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10657533/extract-overlay-ramdisk-vzz7fv9g/ramdisk
187 11:28:16.053270 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 11:28:16.053454 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
189 11:28:16.053569 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10657533/compress-overlay-i6f4j6t3/overlay-1.4.2.4.tar.gz to ramdisk
190 11:28:16.053644 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10657533/compress-overlay-i6f4j6t3/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10657533/extract-overlay-ramdisk-vzz7fv9g/ramdisk
191 11:28:16.062605 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 11:28:16.062766 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
193 11:28:16.062867 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 11:28:16.062960 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
195 11:28:16.063055 Building ramdisk /var/lib/lava/dispatcher/tmp/10657533/extract-overlay-ramdisk-vzz7fv9g/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10657533/extract-overlay-ramdisk-vzz7fv9g/ramdisk
196 11:28:16.202040 >> 53980 blocks
197 11:28:17.125796 rename /var/lib/lava/dispatcher/tmp/10657533/extract-overlay-ramdisk-vzz7fv9g/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10657533/tftp-deploy-658iipsq/ramdisk/ramdisk.cpio.gz
198 11:28:17.126368 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 11:28:17.126562 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 11:28:17.126723 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 11:28:17.126885 No mkimage arch provided, not using FIT.
202 11:28:17.127037 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 11:28:17.127178 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 11:28:17.127349 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 11:28:17.127509 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 11:28:17.127646 No LXC device requested
207 11:28:17.127802 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 11:28:17.127957 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 11:28:17.128095 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 11:28:17.128231 Checking files for TFTP limit of 4294967296 bytes.
211 11:28:17.128832 end: 1 tftp-deploy (duration 00:00:02) [common]
212 11:28:17.128990 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 11:28:17.129126 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 11:28:17.129305 substitutions:
215 11:28:17.129416 - {DTB}: None
216 11:28:17.129520 - {INITRD}: 10657533/tftp-deploy-658iipsq/ramdisk/ramdisk.cpio.gz
217 11:28:17.129620 - {KERNEL}: 10657533/tftp-deploy-658iipsq/kernel/bzImage
218 11:28:17.129721 - {LAVA_MAC}: None
219 11:28:17.129824 - {PRESEED_CONFIG}: None
220 11:28:17.129920 - {PRESEED_LOCAL}: None
221 11:28:17.130020 - {RAMDISK}: 10657533/tftp-deploy-658iipsq/ramdisk/ramdisk.cpio.gz
222 11:28:17.130123 - {ROOT_PART}: None
223 11:28:17.130219 - {ROOT}: None
224 11:28:17.130320 - {SERVER_IP}: 192.168.201.1
225 11:28:17.130426 - {TEE}: None
226 11:28:17.130539 Parsed boot commands:
227 11:28:17.130655 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 11:28:17.130946 Parsed boot commands: tftpboot 192.168.201.1 10657533/tftp-deploy-658iipsq/kernel/bzImage 10657533/tftp-deploy-658iipsq/kernel/cmdline 10657533/tftp-deploy-658iipsq/ramdisk/ramdisk.cpio.gz
229 11:28:17.131051 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 11:28:17.131147 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 11:28:17.131251 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 11:28:17.131340 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 11:28:17.131413 Not connected, no need to disconnect.
234 11:28:17.131500 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 11:28:17.131591 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 11:28:17.131662 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-3'
237 11:28:17.135325 Setting prompt string to ['lava-test: # ']
238 11:28:17.135717 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 11:28:17.135832 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 11:28:17.135940 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 11:28:17.136034 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 11:28:17.136228 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
243 11:28:22.268512 >> Command sent successfully.
244 11:28:22.271097 Returned 0 in 5 seconds
245 11:28:22.371460 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 11:28:22.371866 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 11:28:22.371997 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 11:28:22.372089 Setting prompt string to 'Starting depthcharge on Helios...'
250 11:28:22.372165 Changing prompt to 'Starting depthcharge on Helios...'
251 11:28:22.372234 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
252 11:28:22.372490 [Enter `^Ec?' for help]
253 11:28:22.992181
254 11:28:22.992325
255 11:28:23.002604 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
256 11:28:23.006482 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
257 11:28:23.013231 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
258 11:28:23.016205 CPU: AES supported, TXT NOT supported, VT supported
259 11:28:23.022750 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
260 11:28:23.025979 PCH: device id 0284 (rev 00) is Cometlake-U Premium
261 11:28:23.032743 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
262 11:28:23.036527 VBOOT: Loading verstage.
263 11:28:23.040208 FMAP: Found "FLASH" version 1.1 at 0xc04000.
264 11:28:23.046487 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
265 11:28:23.050181 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
266 11:28:23.053121 CBFS @ c08000 size 3f8000
267 11:28:23.059468 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
268 11:28:23.062758 CBFS: Locating 'fallback/verstage'
269 11:28:23.066445 CBFS: Found @ offset 10fb80 size 1072c
270 11:28:23.066554
271 11:28:23.066623
272 11:28:23.079303 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
273 11:28:23.093030 Probing TPM: . done!
274 11:28:23.096890 TPM ready after 0 ms
275 11:28:23.100079 Connected to device vid:did:rid of 1ae0:0028:00
276 11:28:23.110138 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
277 11:28:23.113612 Initialized TPM device CR50 revision 0
278 11:28:23.172024 tlcl_send_startup: Startup return code is 0
279 11:28:23.172181 TPM: setup succeeded
280 11:28:23.184532 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
281 11:28:23.188684 Chrome EC: UHEPI supported
282 11:28:23.191919 Phase 1
283 11:28:23.195067 FMAP: area GBB found @ c05000 (12288 bytes)
284 11:28:23.202129 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
285 11:28:23.205133 Phase 2
286 11:28:23.205227 Phase 3
287 11:28:23.208395 FMAP: area GBB found @ c05000 (12288 bytes)
288 11:28:23.215401 VB2:vb2_report_dev_firmware() This is developer signed firmware
289 11:28:23.221661 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
290 11:28:23.224782 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
291 11:28:23.231801 VB2:vb2_verify_keyblock() Checking keyblock signature...
292 11:28:23.247229 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
293 11:28:23.250389 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
294 11:28:23.257235 VB2:vb2_verify_fw_preamble() Verifying preamble.
295 11:28:23.261268 Phase 4
296 11:28:23.264404 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
297 11:28:23.271093 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
298 11:28:23.451043 VB2:vb2_rsa_verify_digest() Digest check failed!
299 11:28:23.457647 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
300 11:28:23.457754 Saving nvdata
301 11:28:23.461276 Reboot requested (10020007)
302 11:28:23.464080 board_reset() called!
303 11:28:23.464175 full_reset() called!
304 11:28:27.959599
305 11:28:27.959754
306 11:28:27.969340 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
307 11:28:27.972442 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
308 11:28:27.978814 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
309 11:28:27.982652 CPU: AES supported, TXT NOT supported, VT supported
310 11:28:27.989277 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
311 11:28:27.992574 PCH: device id 0284 (rev 00) is Cometlake-U Premium
312 11:28:27.999110 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
313 11:28:28.002403 VBOOT: Loading verstage.
314 11:28:28.005559 FMAP: Found "FLASH" version 1.1 at 0xc04000.
315 11:28:28.012067 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
316 11:28:28.015359 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
317 11:28:28.019066 CBFS @ c08000 size 3f8000
318 11:28:28.025523 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
319 11:28:28.029159 CBFS: Locating 'fallback/verstage'
320 11:28:28.032337 CBFS: Found @ offset 10fb80 size 1072c
321 11:28:28.036138
322 11:28:28.036237
323 11:28:28.045832 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
324 11:28:28.060338 Probing TPM: . done!
325 11:28:28.063745 TPM ready after 0 ms
326 11:28:28.066982 Connected to device vid:did:rid of 1ae0:0028:00
327 11:28:28.077040 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
328 11:28:28.080713 Initialized TPM device CR50 revision 0
329 11:28:28.138742 tlcl_send_startup: Startup return code is 0
330 11:28:28.138884 TPM: setup succeeded
331 11:28:28.151556 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
332 11:28:28.155461 Chrome EC: UHEPI supported
333 11:28:28.158659 Phase 1
334 11:28:28.161887 FMAP: area GBB found @ c05000 (12288 bytes)
335 11:28:28.169115 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
336 11:28:28.174954 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
337 11:28:28.178847 Recovery requested (1009000e)
338 11:28:28.184358 Saving nvdata
339 11:28:28.190447 tlcl_extend: response is 0
340 11:28:28.199410 tlcl_extend: response is 0
341 11:28:28.206423 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
342 11:28:28.209606 CBFS @ c08000 size 3f8000
343 11:28:28.216099 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
344 11:28:28.219323 CBFS: Locating 'fallback/romstage'
345 11:28:28.222486 CBFS: Found @ offset 80 size 145fc
346 11:28:28.226354 Accumulated console time in verstage 98 ms
347 11:28:28.226457
348 11:28:28.226550
349 11:28:28.239001 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
350 11:28:28.246096 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
351 11:28:28.248978 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
352 11:28:28.252698 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
353 11:28:28.259044 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
354 11:28:28.262336 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
355 11:28:28.265508 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
356 11:28:28.269378 TCO_STS: 0000 0000
357 11:28:28.272663 GEN_PMCON: e0015238 00000200
358 11:28:28.275793 GBLRST_CAUSE: 00000000 00000000
359 11:28:28.275893 prev_sleep_state 5
360 11:28:28.278939 Boot Count incremented to 58361
361 11:28:28.285975 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
362 11:28:28.289194 CBFS @ c08000 size 3f8000
363 11:28:28.295526 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
364 11:28:28.295634 CBFS: Locating 'fspm.bin'
365 11:28:28.302171 CBFS: Found @ offset 5ffc0 size 71000
366 11:28:28.305756 Chrome EC: UHEPI supported
367 11:28:28.312301 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
368 11:28:28.315639 Probing TPM: done!
369 11:28:28.322834 Connected to device vid:did:rid of 1ae0:0028:00
370 11:28:28.332570 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
371 11:28:28.337898 Initialized TPM device CR50 revision 0
372 11:28:28.347439 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
373 11:28:28.353639 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
374 11:28:28.357458 MRC cache found, size 1948
375 11:28:28.360624 bootmode is set to: 2
376 11:28:28.363681 PRMRR disabled by config.
377 11:28:28.363776 SPD INDEX = 1
378 11:28:28.370721 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 11:28:28.373897 CBFS @ c08000 size 3f8000
380 11:28:28.380295 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 11:28:28.380386 CBFS: Locating 'spd.bin'
382 11:28:28.383507 CBFS: Found @ offset 5fb80 size 400
383 11:28:28.387251 SPD: module type is LPDDR3
384 11:28:28.390307 SPD: module part is
385 11:28:28.396573 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
386 11:28:28.400449 SPD: device width 4 bits, bus width 8 bits
387 11:28:28.403505 SPD: module size is 4096 MB (per channel)
388 11:28:28.407062 memory slot: 0 configuration done.
389 11:28:28.410188 memory slot: 2 configuration done.
390 11:28:28.461137 CBMEM:
391 11:28:28.464583 IMD: root @ 99fff000 254 entries.
392 11:28:28.467753 IMD: root @ 99ffec00 62 entries.
393 11:28:28.471500 External stage cache:
394 11:28:28.474881 IMD: root @ 9abff000 254 entries.
395 11:28:28.477992 IMD: root @ 9abfec00 62 entries.
396 11:28:28.481233 Chrome EC: clear events_b mask to 0x0000000020004000
397 11:28:28.497720 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
398 11:28:28.510698 tlcl_write: response is 0
399 11:28:28.519833 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
400 11:28:28.526466 MRC: TPM MRC hash updated successfully.
401 11:28:28.526578 2 DIMMs found
402 11:28:28.529485 SMM Memory Map
403 11:28:28.532943 SMRAM : 0x9a000000 0x1000000
404 11:28:28.536050 Subregion 0: 0x9a000000 0xa00000
405 11:28:28.539473 Subregion 1: 0x9aa00000 0x200000
406 11:28:28.543366 Subregion 2: 0x9ac00000 0x400000
407 11:28:28.546562 top_of_ram = 0x9a000000
408 11:28:28.549791 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
409 11:28:28.556175 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
410 11:28:28.559374 MTRR Range: Start=ff000000 End=0 (Size 1000000)
411 11:28:28.566385 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
412 11:28:28.569356 CBFS @ c08000 size 3f8000
413 11:28:28.573022 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
414 11:28:28.576307 CBFS: Locating 'fallback/postcar'
415 11:28:28.579348 CBFS: Found @ offset 107000 size 4b44
416 11:28:28.585842 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
417 11:28:28.598814 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
418 11:28:28.602035 Processing 180 relocs. Offset value of 0x97c0c000
419 11:28:28.610601 Accumulated console time in romstage 285 ms
420 11:28:28.610714
421 11:28:28.610814
422 11:28:28.620593 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
423 11:28:28.626768 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
424 11:28:28.630420 CBFS @ c08000 size 3f8000
425 11:28:28.633429 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
426 11:28:28.640199 CBFS: Locating 'fallback/ramstage'
427 11:28:28.643471 CBFS: Found @ offset 43380 size 1b9e8
428 11:28:28.649760 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
429 11:28:28.681758 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
430 11:28:28.685366 Processing 3976 relocs. Offset value of 0x98db0000
431 11:28:28.691864 Accumulated console time in postcar 52 ms
432 11:28:28.691954
433 11:28:28.692022
434 11:28:28.702139 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
435 11:28:28.708777 FMAP: area RO_VPD found @ c00000 (16384 bytes)
436 11:28:28.711775 WARNING: RO_VPD is uninitialized or empty.
437 11:28:28.715493 FMAP: area RW_VPD found @ af8000 (8192 bytes)
438 11:28:28.721724 FMAP: area RW_VPD found @ af8000 (8192 bytes)
439 11:28:28.721846 Normal boot.
440 11:28:28.728318 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
441 11:28:28.732216 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 11:28:28.735205 CBFS @ c08000 size 3f8000
443 11:28:28.742037 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 11:28:28.745107 CBFS: Locating 'cpu_microcode_blob.bin'
445 11:28:28.748227 CBFS: Found @ offset 14700 size 2ec00
446 11:28:28.751386 microcode: sig=0x806ec pf=0x4 revision=0xc9
447 11:28:28.755389 Skip microcode update
448 11:28:28.758513 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
449 11:28:28.761547 CBFS @ c08000 size 3f8000
450 11:28:28.768383 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
451 11:28:28.771558 CBFS: Locating 'fsps.bin'
452 11:28:28.774786 CBFS: Found @ offset d1fc0 size 35000
453 11:28:28.799914 Detected 4 core, 8 thread CPU.
454 11:28:28.803208 Setting up SMI for CPU
455 11:28:28.807037 IED base = 0x9ac00000
456 11:28:28.807123 IED size = 0x00400000
457 11:28:28.810256 Will perform SMM setup.
458 11:28:28.816595 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
459 11:28:28.823495 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
460 11:28:28.826611 Processing 16 relocs. Offset value of 0x00030000
461 11:28:28.830284 Attempting to start 7 APs
462 11:28:28.833535 Waiting for 10ms after sending INIT.
463 11:28:28.849609 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
464 11:28:28.849699 done.
465 11:28:28.853810 AP: slot 2 apic_id 4.
466 11:28:28.856554 AP: slot 5 apic_id 5.
467 11:28:28.859916 Waiting for 2nd SIPI to complete...done.
468 11:28:28.863170 AP: slot 6 apic_id 6.
469 11:28:28.863257 AP: slot 7 apic_id 7.
470 11:28:28.866153 AP: slot 1 apic_id 3.
471 11:28:28.870024 AP: slot 4 apic_id 2.
472 11:28:28.876221 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
473 11:28:28.882745 Processing 13 relocs. Offset value of 0x00038000
474 11:28:28.886605 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
475 11:28:28.892784 Installing SMM handler to 0x9a000000
476 11:28:28.899802 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
477 11:28:28.902817 Processing 658 relocs. Offset value of 0x9a010000
478 11:28:28.913165 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
479 11:28:28.916423 Processing 13 relocs. Offset value of 0x9a008000
480 11:28:28.922757 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
481 11:28:28.929135 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
482 11:28:28.936061 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
483 11:28:28.939316 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
484 11:28:28.945874 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
485 11:28:28.952696 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
486 11:28:28.955636 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
487 11:28:28.962306 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
488 11:28:28.966182 Clearing SMI status registers
489 11:28:28.969322 SMI_STS: PM1
490 11:28:28.969425 PM1_STS: PWRBTN
491 11:28:28.972524 TCO_STS: SECOND_TO
492 11:28:28.976283 New SMBASE 0x9a000000
493 11:28:28.979482 In relocation handler: CPU 0
494 11:28:28.982797 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
495 11:28:28.986065 Writing SMRR. base = 0x9a000006, mask=0xff000800
496 11:28:28.989321 Relocation complete.
497 11:28:28.992492 New SMBASE 0x99fff400
498 11:28:28.992583 In relocation handler: CPU 3
499 11:28:28.999418 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
500 11:28:29.002435 Writing SMRR. base = 0x9a000006, mask=0xff000800
501 11:28:29.006175 Relocation complete.
502 11:28:29.006264 New SMBASE 0x99ffec00
503 11:28:29.009358 In relocation handler: CPU 5
504 11:28:29.015824 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
505 11:28:29.019002 Writing SMRR. base = 0x9a000006, mask=0xff000800
506 11:28:29.022249 Relocation complete.
507 11:28:29.022366 New SMBASE 0x99fff800
508 11:28:29.025538 In relocation handler: CPU 2
509 11:28:29.032630 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
510 11:28:29.035557 Writing SMRR. base = 0x9a000006, mask=0xff000800
511 11:28:29.039191 Relocation complete.
512 11:28:29.039327 New SMBASE 0x99ffe800
513 11:28:29.042372 In relocation handler: CPU 6
514 11:28:29.045584 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
515 11:28:29.052678 Writing SMRR. base = 0x9a000006, mask=0xff000800
516 11:28:29.055885 Relocation complete.
517 11:28:29.055972 New SMBASE 0x99fffc00
518 11:28:29.058839 In relocation handler: CPU 1
519 11:28:29.062417 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
520 11:28:29.069212 Writing SMRR. base = 0x9a000006, mask=0xff000800
521 11:28:29.072445 Relocation complete.
522 11:28:29.072533 New SMBASE 0x99fff000
523 11:28:29.075549 In relocation handler: CPU 4
524 11:28:29.078793 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
525 11:28:29.085700 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 11:28:29.085788 Relocation complete.
527 11:28:29.088976 New SMBASE 0x99ffe400
528 11:28:29.092406 In relocation handler: CPU 7
529 11:28:29.095501 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
530 11:28:29.102171 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 11:28:29.102263 Relocation complete.
532 11:28:29.105759 Initializing CPU #0
533 11:28:29.108754 CPU: vendor Intel device 806ec
534 11:28:29.112497 CPU: family 06, model 8e, stepping 0c
535 11:28:29.115558 Clearing out pending MCEs
536 11:28:29.118768 Setting up local APIC...
537 11:28:29.118845 apic_id: 0x00 done.
538 11:28:29.122120 Turbo is available but hidden
539 11:28:29.125324 Turbo is available and visible
540 11:28:29.128435 VMX status: enabled
541 11:28:29.132320 IA32_FEATURE_CONTROL status: locked
542 11:28:29.135618 Skip microcode update
543 11:28:29.135692 CPU #0 initialized
544 11:28:29.138862 Initializing CPU #3
545 11:28:29.138936 Initializing CPU #6
546 11:28:29.142122 Initializing CPU #1
547 11:28:29.145616 Initializing CPU #4
548 11:28:29.148678 CPU: vendor Intel device 806ec
549 11:28:29.151860 CPU: family 06, model 8e, stepping 0c
550 11:28:29.155107 CPU: vendor Intel device 806ec
551 11:28:29.158830 CPU: family 06, model 8e, stepping 0c
552 11:28:29.161934 Clearing out pending MCEs
553 11:28:29.162009 Clearing out pending MCEs
554 11:28:29.165128 Setting up local APIC...
555 11:28:29.168730 CPU: vendor Intel device 806ec
556 11:28:29.171692 CPU: family 06, model 8e, stepping 0c
557 11:28:29.175378 Clearing out pending MCEs
558 11:28:29.178456 Setting up local APIC...
559 11:28:29.181614 Setting up local APIC...
560 11:28:29.181723 apic_id: 0x03 done.
561 11:28:29.184785 apic_id: 0x02 done.
562 11:28:29.188642 VMX status: enabled
563 11:28:29.188721 VMX status: enabled
564 11:28:29.191988 IA32_FEATURE_CONTROL status: locked
565 11:28:29.195259 IA32_FEATURE_CONTROL status: locked
566 11:28:29.198357 Skip microcode update
567 11:28:29.201521 Skip microcode update
568 11:28:29.201595 CPU #1 initialized
569 11:28:29.204885 CPU #4 initialized
570 11:28:29.204964 Initializing CPU #5
571 11:28:29.208051 Initializing CPU #2
572 11:28:29.211815 CPU: vendor Intel device 806ec
573 11:28:29.214802 CPU: family 06, model 8e, stepping 0c
574 11:28:29.218004 CPU: vendor Intel device 806ec
575 11:28:29.221789 CPU: family 06, model 8e, stepping 0c
576 11:28:29.225083 Clearing out pending MCEs
577 11:28:29.228014 Clearing out pending MCEs
578 11:28:29.231260 Setting up local APIC...
579 11:28:29.234522 CPU: vendor Intel device 806ec
580 11:28:29.237785 CPU: family 06, model 8e, stepping 0c
581 11:28:29.237873 Initializing CPU #7
582 11:28:29.241647 Clearing out pending MCEs
583 11:28:29.244967 CPU: vendor Intel device 806ec
584 11:28:29.248227 CPU: family 06, model 8e, stepping 0c
585 11:28:29.251360 Clearing out pending MCEs
586 11:28:29.254483 Setting up local APIC...
587 11:28:29.254569 apic_id: 0x05 done.
588 11:28:29.258154 Setting up local APIC...
589 11:28:29.261481 apic_id: 0x06 done.
590 11:28:29.264582 Setting up local APIC...
591 11:28:29.264707 apic_id: 0x01 done.
592 11:28:29.267562 apic_id: 0x04 done.
593 11:28:29.267676 VMX status: enabled
594 11:28:29.271450 VMX status: enabled
595 11:28:29.274589 IA32_FEATURE_CONTROL status: locked
596 11:28:29.277720 IA32_FEATURE_CONTROL status: locked
597 11:28:29.281290 Skip microcode update
598 11:28:29.284302 Skip microcode update
599 11:28:29.284417 VMX status: enabled
600 11:28:29.287379 VMX status: enabled
601 11:28:29.291154 apic_id: 0x07 done.
602 11:28:29.294432 IA32_FEATURE_CONTROL status: locked
603 11:28:29.294518 VMX status: enabled
604 11:28:29.297684 Skip microcode update
605 11:28:29.300809 IA32_FEATURE_CONTROL status: locked
606 11:28:29.304121 CPU #6 initialized
607 11:28:29.304207 Skip microcode update
608 11:28:29.307403 CPU #5 initialized
609 11:28:29.307489 CPU #2 initialized
610 11:28:29.311323 CPU #7 initialized
611 11:28:29.314341 IA32_FEATURE_CONTROL status: locked
612 11:28:29.317478 Skip microcode update
613 11:28:29.317593 CPU #3 initialized
614 11:28:29.324543 bsp_do_flight_plan done after 461 msecs.
615 11:28:29.327536 CPU: frequency set to 4200 MHz
616 11:28:29.327622 Enabling SMIs.
617 11:28:29.327691 Locking SMM.
618 11:28:29.343744 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
619 11:28:29.346944 CBFS @ c08000 size 3f8000
620 11:28:29.354144 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
621 11:28:29.354231 CBFS: Locating 'vbt.bin'
622 11:28:29.357266 CBFS: Found @ offset 5f5c0 size 499
623 11:28:29.364026 Found a VBT of 4608 bytes after decompression
624 11:28:29.548358 Display FSP Version Info HOB
625 11:28:29.552001 Reference Code - CPU = 9.0.1e.30
626 11:28:29.554905 uCode Version = 0.0.0.ca
627 11:28:29.558128 TXT ACM version = ff.ff.ff.ffff
628 11:28:29.561342 Display FSP Version Info HOB
629 11:28:29.565147 Reference Code - ME = 9.0.1e.30
630 11:28:29.568392 MEBx version = 0.0.0.0
631 11:28:29.571822 ME Firmware Version = Consumer SKU
632 11:28:29.574963 Display FSP Version Info HOB
633 11:28:29.577962 Reference Code - CML PCH = 9.0.1e.30
634 11:28:29.581307 PCH-CRID Status = Disabled
635 11:28:29.584551 PCH-CRID Original Value = ff.ff.ff.ffff
636 11:28:29.588332 PCH-CRID New Value = ff.ff.ff.ffff
637 11:28:29.591431 OPROM - RST - RAID = ff.ff.ff.ffff
638 11:28:29.594690 ChipsetInit Base Version = ff.ff.ff.ffff
639 11:28:29.598279 ChipsetInit Oem Version = ff.ff.ff.ffff
640 11:28:29.601346 Display FSP Version Info HOB
641 11:28:29.608388 Reference Code - SA - System Agent = 9.0.1e.30
642 11:28:29.611286 Reference Code - MRC = 0.7.1.6c
643 11:28:29.611365 SA - PCIe Version = 9.0.1e.30
644 11:28:29.614804 SA-CRID Status = Disabled
645 11:28:29.617925 SA-CRID Original Value = 0.0.0.c
646 11:28:29.621192 SA-CRID New Value = 0.0.0.c
647 11:28:29.624353 OPROM - VBIOS = ff.ff.ff.ffff
648 11:28:29.627653 RTC Init
649 11:28:29.631317 Set power on after power failure.
650 11:28:29.631398 Disabling Deep S3
651 11:28:29.634539 Disabling Deep S3
652 11:28:29.634612 Disabling Deep S4
653 11:28:29.637852 Disabling Deep S4
654 11:28:29.637924 Disabling Deep S5
655 11:28:29.640996 Disabling Deep S5
656 11:28:29.647880 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 195 exit 1
657 11:28:29.647962 Enumerating buses...
658 11:28:29.654371 Show all devs... Before device enumeration.
659 11:28:29.654448 Root Device: enabled 1
660 11:28:29.657453 CPU_CLUSTER: 0: enabled 1
661 11:28:29.661179 DOMAIN: 0000: enabled 1
662 11:28:29.664197 APIC: 00: enabled 1
663 11:28:29.664276 PCI: 00:00.0: enabled 1
664 11:28:29.667460 PCI: 00:02.0: enabled 1
665 11:28:29.671207 PCI: 00:04.0: enabled 0
666 11:28:29.674463 PCI: 00:05.0: enabled 0
667 11:28:29.674538 PCI: 00:12.0: enabled 1
668 11:28:29.677757 PCI: 00:12.5: enabled 0
669 11:28:29.680899 PCI: 00:12.6: enabled 0
670 11:28:29.680988 PCI: 00:14.0: enabled 1
671 11:28:29.684073 PCI: 00:14.1: enabled 0
672 11:28:29.687886 PCI: 00:14.3: enabled 1
673 11:28:29.691170 PCI: 00:14.5: enabled 0
674 11:28:29.691250 PCI: 00:15.0: enabled 1
675 11:28:29.694260 PCI: 00:15.1: enabled 1
676 11:28:29.697412 PCI: 00:15.2: enabled 0
677 11:28:29.700722 PCI: 00:15.3: enabled 0
678 11:28:29.700866 PCI: 00:16.0: enabled 1
679 11:28:29.704420 PCI: 00:16.1: enabled 0
680 11:28:29.707534 PCI: 00:16.2: enabled 0
681 11:28:29.711084 PCI: 00:16.3: enabled 0
682 11:28:29.711187 PCI: 00:16.4: enabled 0
683 11:28:29.714113 PCI: 00:16.5: enabled 0
684 11:28:29.717730 PCI: 00:17.0: enabled 1
685 11:28:29.717816 PCI: 00:19.0: enabled 1
686 11:28:29.720843 PCI: 00:19.1: enabled 0
687 11:28:29.724700 PCI: 00:19.2: enabled 0
688 11:28:29.727754 PCI: 00:1a.0: enabled 0
689 11:28:29.727842 PCI: 00:1c.0: enabled 0
690 11:28:29.730990 PCI: 00:1c.1: enabled 0
691 11:28:29.734075 PCI: 00:1c.2: enabled 0
692 11:28:29.737318 PCI: 00:1c.3: enabled 0
693 11:28:29.737403 PCI: 00:1c.4: enabled 0
694 11:28:29.741179 PCI: 00:1c.5: enabled 0
695 11:28:29.743868 PCI: 00:1c.6: enabled 0
696 11:28:29.747358 PCI: 00:1c.7: enabled 0
697 11:28:29.747443 PCI: 00:1d.0: enabled 1
698 11:28:29.750893 PCI: 00:1d.1: enabled 0
699 11:28:29.754051 PCI: 00:1d.2: enabled 0
700 11:28:29.754137 PCI: 00:1d.3: enabled 0
701 11:28:29.757416 PCI: 00:1d.4: enabled 0
702 11:28:29.760725 PCI: 00:1d.5: enabled 1
703 11:28:29.763899 PCI: 00:1e.0: enabled 1
704 11:28:29.763985 PCI: 00:1e.1: enabled 0
705 11:28:29.767005 PCI: 00:1e.2: enabled 1
706 11:28:29.770607 PCI: 00:1e.3: enabled 1
707 11:28:29.773714 PCI: 00:1f.0: enabled 1
708 11:28:29.773830 PCI: 00:1f.1: enabled 1
709 11:28:29.776826 PCI: 00:1f.2: enabled 1
710 11:28:29.780122 PCI: 00:1f.3: enabled 1
711 11:28:29.783999 PCI: 00:1f.4: enabled 1
712 11:28:29.784085 PCI: 00:1f.5: enabled 1
713 11:28:29.787293 PCI: 00:1f.6: enabled 0
714 11:28:29.790365 USB0 port 0: enabled 1
715 11:28:29.790476 I2C: 00:15: enabled 1
716 11:28:29.793654 I2C: 00:5d: enabled 1
717 11:28:29.796773 GENERIC: 0.0: enabled 1
718 11:28:29.800589 I2C: 00:1a: enabled 1
719 11:28:29.800676 I2C: 00:38: enabled 1
720 11:28:29.803455 I2C: 00:39: enabled 1
721 11:28:29.806967 I2C: 00:3a: enabled 1
722 11:28:29.807079 I2C: 00:3b: enabled 1
723 11:28:29.810179 PCI: 00:00.0: enabled 1
724 11:28:29.813405 SPI: 00: enabled 1
725 11:28:29.813522 SPI: 01: enabled 1
726 11:28:29.816464 PNP: 0c09.0: enabled 1
727 11:28:29.819996 USB2 port 0: enabled 1
728 11:28:29.820082 USB2 port 1: enabled 1
729 11:28:29.823157 USB2 port 2: enabled 0
730 11:28:29.826778 USB2 port 3: enabled 0
731 11:28:29.826865 USB2 port 5: enabled 0
732 11:28:29.829853 USB2 port 6: enabled 1
733 11:28:29.833013 USB2 port 9: enabled 1
734 11:28:29.836865 USB3 port 0: enabled 1
735 11:28:29.836951 USB3 port 1: enabled 1
736 11:28:29.840058 USB3 port 2: enabled 1
737 11:28:29.843354 USB3 port 3: enabled 1
738 11:28:29.843439 USB3 port 4: enabled 0
739 11:28:29.846523 APIC: 03: enabled 1
740 11:28:29.849871 APIC: 04: enabled 1
741 11:28:29.849958 APIC: 01: enabled 1
742 11:28:29.853075 APIC: 02: enabled 1
743 11:28:29.853161 APIC: 05: enabled 1
744 11:28:29.856351 APIC: 06: enabled 1
745 11:28:29.859494 APIC: 07: enabled 1
746 11:28:29.859581 Compare with tree...
747 11:28:29.863325 Root Device: enabled 1
748 11:28:29.866509 CPU_CLUSTER: 0: enabled 1
749 11:28:29.869818 APIC: 00: enabled 1
750 11:28:29.869905 APIC: 03: enabled 1
751 11:28:29.872731 APIC: 04: enabled 1
752 11:28:29.876432 APIC: 01: enabled 1
753 11:28:29.876518 APIC: 02: enabled 1
754 11:28:29.879614 APIC: 05: enabled 1
755 11:28:29.882908 APIC: 06: enabled 1
756 11:28:29.882997 APIC: 07: enabled 1
757 11:28:29.886158 DOMAIN: 0000: enabled 1
758 11:28:29.889332 PCI: 00:00.0: enabled 1
759 11:28:29.892575 PCI: 00:02.0: enabled 1
760 11:28:29.892661 PCI: 00:04.0: enabled 0
761 11:28:29.896294 PCI: 00:05.0: enabled 0
762 11:28:29.899528 PCI: 00:12.0: enabled 1
763 11:28:29.902644 PCI: 00:12.5: enabled 0
764 11:28:29.905779 PCI: 00:12.6: enabled 0
765 11:28:29.905876 PCI: 00:14.0: enabled 1
766 11:28:29.908996 USB0 port 0: enabled 1
767 11:28:29.912789 USB2 port 0: enabled 1
768 11:28:29.915958 USB2 port 1: enabled 1
769 11:28:29.919154 USB2 port 2: enabled 0
770 11:28:29.919240 USB2 port 3: enabled 0
771 11:28:29.922669 USB2 port 5: enabled 0
772 11:28:29.925974 USB2 port 6: enabled 1
773 11:28:29.929127 USB2 port 9: enabled 1
774 11:28:29.932150 USB3 port 0: enabled 1
775 11:28:29.935974 USB3 port 1: enabled 1
776 11:28:29.936062 USB3 port 2: enabled 1
777 11:28:29.939240 USB3 port 3: enabled 1
778 11:28:29.942293 USB3 port 4: enabled 0
779 11:28:29.945386 PCI: 00:14.1: enabled 0
780 11:28:29.949195 PCI: 00:14.3: enabled 1
781 11:28:29.949297 PCI: 00:14.5: enabled 0
782 11:28:29.952447 PCI: 00:15.0: enabled 1
783 11:28:29.955599 I2C: 00:15: enabled 1
784 11:28:29.958727 PCI: 00:15.1: enabled 1
785 11:28:29.961935 I2C: 00:5d: enabled 1
786 11:28:29.962049 GENERIC: 0.0: enabled 1
787 11:28:29.965167 PCI: 00:15.2: enabled 0
788 11:28:29.968961 PCI: 00:15.3: enabled 0
789 11:28:29.972142 PCI: 00:16.0: enabled 1
790 11:28:29.975556 PCI: 00:16.1: enabled 0
791 11:28:29.975658 PCI: 00:16.2: enabled 0
792 11:28:29.978775 PCI: 00:16.3: enabled 0
793 11:28:29.981692 PCI: 00:16.4: enabled 0
794 11:28:29.985511 PCI: 00:16.5: enabled 0
795 11:28:29.988521 PCI: 00:17.0: enabled 1
796 11:28:29.988619 PCI: 00:19.0: enabled 1
797 11:28:29.991720 I2C: 00:1a: enabled 1
798 11:28:29.995137 I2C: 00:38: enabled 1
799 11:28:29.998826 I2C: 00:39: enabled 1
800 11:28:29.998925 I2C: 00:3a: enabled 1
801 11:28:30.001932 I2C: 00:3b: enabled 1
802 11:28:30.005153 PCI: 00:19.1: enabled 0
803 11:28:30.008288 PCI: 00:19.2: enabled 0
804 11:28:30.011381 PCI: 00:1a.0: enabled 0
805 11:28:30.011479 PCI: 00:1c.0: enabled 0
806 11:28:30.015248 PCI: 00:1c.1: enabled 0
807 11:28:30.018542 PCI: 00:1c.2: enabled 0
808 11:28:30.021669 PCI: 00:1c.3: enabled 0
809 11:28:30.024784 PCI: 00:1c.4: enabled 0
810 11:28:30.024907 PCI: 00:1c.5: enabled 0
811 11:28:30.028516 PCI: 00:1c.6: enabled 0
812 11:28:30.031510 PCI: 00:1c.7: enabled 0
813 11:28:30.034508 PCI: 00:1d.0: enabled 1
814 11:28:30.038151 PCI: 00:1d.1: enabled 0
815 11:28:30.038254 PCI: 00:1d.2: enabled 0
816 11:28:30.041181 PCI: 00:1d.3: enabled 0
817 11:28:30.044399 PCI: 00:1d.4: enabled 0
818 11:28:30.048175 PCI: 00:1d.5: enabled 1
819 11:28:30.051455 PCI: 00:00.0: enabled 1
820 11:28:30.051557 PCI: 00:1e.0: enabled 1
821 11:28:30.054680 PCI: 00:1e.1: enabled 0
822 11:28:30.057964 PCI: 00:1e.2: enabled 1
823 11:28:30.061147 SPI: 00: enabled 1
824 11:28:30.061261 PCI: 00:1e.3: enabled 1
825 11:28:30.064308 SPI: 01: enabled 1
826 11:28:30.067555 PCI: 00:1f.0: enabled 1
827 11:28:30.070826 PNP: 0c09.0: enabled 1
828 11:28:30.070940 PCI: 00:1f.1: enabled 1
829 11:28:30.074644 PCI: 00:1f.2: enabled 1
830 11:28:30.077867 PCI: 00:1f.3: enabled 1
831 11:28:30.081107 PCI: 00:1f.4: enabled 1
832 11:28:30.084075 PCI: 00:1f.5: enabled 1
833 11:28:30.084148 PCI: 00:1f.6: enabled 0
834 11:28:30.087949 Root Device scanning...
835 11:28:30.090906 scan_static_bus for Root Device
836 11:28:30.094008 CPU_CLUSTER: 0 enabled
837 11:28:30.097723 DOMAIN: 0000 enabled
838 11:28:30.097821 DOMAIN: 0000 scanning...
839 11:28:30.100971 PCI: pci_scan_bus for bus 00
840 11:28:30.104240 PCI: 00:00.0 [8086/0000] ops
841 11:28:30.107283 PCI: 00:00.0 [8086/9b61] enabled
842 11:28:30.110530 PCI: 00:02.0 [8086/0000] bus ops
843 11:28:30.114257 PCI: 00:02.0 [8086/9b41] enabled
844 11:28:30.117478 PCI: 00:04.0 [8086/1903] disabled
845 11:28:30.120682 PCI: 00:08.0 [8086/1911] enabled
846 11:28:30.123940 PCI: 00:12.0 [8086/02f9] enabled
847 11:28:30.127742 PCI: 00:14.0 [8086/0000] bus ops
848 11:28:30.130729 PCI: 00:14.0 [8086/02ed] enabled
849 11:28:30.133823 PCI: 00:14.2 [8086/02ef] enabled
850 11:28:30.137410 PCI: 00:14.3 [8086/02f0] enabled
851 11:28:30.140485 PCI: 00:15.0 [8086/0000] bus ops
852 11:28:30.144058 PCI: 00:15.0 [8086/02e8] enabled
853 11:28:30.147128 PCI: 00:15.1 [8086/0000] bus ops
854 11:28:30.150969 PCI: 00:15.1 [8086/02e9] enabled
855 11:28:30.154104 PCI: 00:16.0 [8086/0000] ops
856 11:28:30.157202 PCI: 00:16.0 [8086/02e0] enabled
857 11:28:30.160374 PCI: 00:17.0 [8086/0000] ops
858 11:28:30.163628 PCI: 00:17.0 [8086/02d3] enabled
859 11:28:30.167448 PCI: 00:19.0 [8086/0000] bus ops
860 11:28:30.170697 PCI: 00:19.0 [8086/02c5] enabled
861 11:28:30.174027 PCI: 00:1d.0 [8086/0000] bus ops
862 11:28:30.177204 PCI: 00:1d.0 [8086/02b0] enabled
863 11:28:30.183768 PCI: Static device PCI: 00:1d.5 not found, disabling it.
864 11:28:30.186997 PCI: 00:1e.0 [8086/0000] ops
865 11:28:30.190899 PCI: 00:1e.0 [8086/02a8] enabled
866 11:28:30.194062 PCI: 00:1e.2 [8086/0000] bus ops
867 11:28:30.197280 PCI: 00:1e.2 [8086/02aa] enabled
868 11:28:30.200346 PCI: 00:1e.3 [8086/0000] bus ops
869 11:28:30.203589 PCI: 00:1e.3 [8086/02ab] enabled
870 11:28:30.207492 PCI: 00:1f.0 [8086/0000] bus ops
871 11:28:30.210778 PCI: 00:1f.0 [8086/0284] enabled
872 11:28:30.213805 PCI: Static device PCI: 00:1f.1 not found, disabling it.
873 11:28:30.220618 PCI: Static device PCI: 00:1f.2 not found, disabling it.
874 11:28:30.223869 PCI: 00:1f.3 [8086/0000] bus ops
875 11:28:30.227070 PCI: 00:1f.3 [8086/02c8] enabled
876 11:28:30.230249 PCI: 00:1f.4 [8086/0000] bus ops
877 11:28:30.233453 PCI: 00:1f.4 [8086/02a3] enabled
878 11:28:30.237099 PCI: 00:1f.5 [8086/0000] bus ops
879 11:28:30.240273 PCI: 00:1f.5 [8086/02a4] enabled
880 11:28:30.244085 PCI: Leftover static devices:
881 11:28:30.244185 PCI: 00:05.0
882 11:28:30.247086 PCI: 00:12.5
883 11:28:30.247182 PCI: 00:12.6
884 11:28:30.250110 PCI: 00:14.1
885 11:28:30.250205 PCI: 00:14.5
886 11:28:30.250295 PCI: 00:15.2
887 11:28:30.253868 PCI: 00:15.3
888 11:28:30.253965 PCI: 00:16.1
889 11:28:30.256903 PCI: 00:16.2
890 11:28:30.257000 PCI: 00:16.3
891 11:28:30.260533 PCI: 00:16.4
892 11:28:30.260608 PCI: 00:16.5
893 11:28:30.260671 PCI: 00:19.1
894 11:28:30.263798 PCI: 00:19.2
895 11:28:30.263895 PCI: 00:1a.0
896 11:28:30.267092 PCI: 00:1c.0
897 11:28:30.267187 PCI: 00:1c.1
898 11:28:30.267275 PCI: 00:1c.2
899 11:28:30.270356 PCI: 00:1c.3
900 11:28:30.270451 PCI: 00:1c.4
901 11:28:30.273562 PCI: 00:1c.5
902 11:28:30.273631 PCI: 00:1c.6
903 11:28:30.273691 PCI: 00:1c.7
904 11:28:30.276674 PCI: 00:1d.1
905 11:28:30.276767 PCI: 00:1d.2
906 11:28:30.279867 PCI: 00:1d.3
907 11:28:30.279935 PCI: 00:1d.4
908 11:28:30.283638 PCI: 00:1d.5
909 11:28:30.283738 PCI: 00:1e.1
910 11:28:30.283831 PCI: 00:1f.1
911 11:28:30.287022 PCI: 00:1f.2
912 11:28:30.287135 PCI: 00:1f.6
913 11:28:30.290274 PCI: Check your devicetree.cb.
914 11:28:30.293498 PCI: 00:02.0 scanning...
915 11:28:30.296704 scan_generic_bus for PCI: 00:02.0
916 11:28:30.300610 scan_generic_bus for PCI: 00:02.0 done
917 11:28:30.306516 scan_bus: scanning of bus PCI: 00:02.0 took 10198 usecs
918 11:28:30.310305 PCI: 00:14.0 scanning...
919 11:28:30.313452 scan_static_bus for PCI: 00:14.0
920 11:28:30.313526 USB0 port 0 enabled
921 11:28:30.316698 USB0 port 0 scanning...
922 11:28:30.319758 scan_static_bus for USB0 port 0
923 11:28:30.323354 USB2 port 0 enabled
924 11:28:30.323451 USB2 port 1 enabled
925 11:28:30.326461 USB2 port 2 disabled
926 11:28:30.329748 USB2 port 3 disabled
927 11:28:30.329820 USB2 port 5 disabled
928 11:28:30.333034 USB2 port 6 enabled
929 11:28:30.336975 USB2 port 9 enabled
930 11:28:30.337048 USB3 port 0 enabled
931 11:28:30.340086 USB3 port 1 enabled
932 11:28:30.340154 USB3 port 2 enabled
933 11:28:30.343215 USB3 port 3 enabled
934 11:28:30.346678 USB3 port 4 disabled
935 11:28:30.346780 USB2 port 0 scanning...
936 11:28:30.349806 scan_static_bus for USB2 port 0
937 11:28:30.356559 scan_static_bus for USB2 port 0 done
938 11:28:30.359738 scan_bus: scanning of bus USB2 port 0 took 9707 usecs
939 11:28:30.363361 USB2 port 1 scanning...
940 11:28:30.366324 scan_static_bus for USB2 port 1
941 11:28:30.369690 scan_static_bus for USB2 port 1 done
942 11:28:30.376591 scan_bus: scanning of bus USB2 port 1 took 9700 usecs
943 11:28:30.376695 USB2 port 6 scanning...
944 11:28:30.379835 scan_static_bus for USB2 port 6
945 11:28:30.386357 scan_static_bus for USB2 port 6 done
946 11:28:30.390073 scan_bus: scanning of bus USB2 port 6 took 9710 usecs
947 11:28:30.393395 USB2 port 9 scanning...
948 11:28:30.396494 scan_static_bus for USB2 port 9
949 11:28:30.399780 scan_static_bus for USB2 port 9 done
950 11:28:30.406167 scan_bus: scanning of bus USB2 port 9 took 9702 usecs
951 11:28:30.406272 USB3 port 0 scanning...
952 11:28:30.409855 scan_static_bus for USB3 port 0
953 11:28:30.416723 scan_static_bus for USB3 port 0 done
954 11:28:30.419977 scan_bus: scanning of bus USB3 port 0 took 9709 usecs
955 11:28:30.423146 USB3 port 1 scanning...
956 11:28:30.426320 scan_static_bus for USB3 port 1
957 11:28:30.429395 scan_static_bus for USB3 port 1 done
958 11:28:30.436148 scan_bus: scanning of bus USB3 port 1 took 9705 usecs
959 11:28:30.436255 USB3 port 2 scanning...
960 11:28:30.439982 scan_static_bus for USB3 port 2
961 11:28:30.446410 scan_static_bus for USB3 port 2 done
962 11:28:30.449599 scan_bus: scanning of bus USB3 port 2 took 9698 usecs
963 11:28:30.453162 USB3 port 3 scanning...
964 11:28:30.456150 scan_static_bus for USB3 port 3
965 11:28:30.459717 scan_static_bus for USB3 port 3 done
966 11:28:30.466553 scan_bus: scanning of bus USB3 port 3 took 9701 usecs
967 11:28:30.469690 scan_static_bus for USB0 port 0 done
968 11:28:30.473227 scan_bus: scanning of bus USB0 port 0 took 155402 usecs
969 11:28:30.479564 scan_static_bus for PCI: 00:14.0 done
970 11:28:30.482800 scan_bus: scanning of bus PCI: 00:14.0 took 173029 usecs
971 11:28:30.486014 PCI: 00:15.0 scanning...
972 11:28:30.489767 scan_generic_bus for PCI: 00:15.0
973 11:28:30.492907 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
974 11:28:30.499317 scan_generic_bus for PCI: 00:15.0 done
975 11:28:30.502632 scan_bus: scanning of bus PCI: 00:15.0 took 14312 usecs
976 11:28:30.505870 PCI: 00:15.1 scanning...
977 11:28:30.509102 scan_generic_bus for PCI: 00:15.1
978 11:28:30.513037 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
979 11:28:30.519236 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
980 11:28:30.523015 scan_generic_bus for PCI: 00:15.1 done
981 11:28:30.529045 scan_bus: scanning of bus PCI: 00:15.1 took 18608 usecs
982 11:28:30.529136 PCI: 00:19.0 scanning...
983 11:28:30.532370 scan_generic_bus for PCI: 00:19.0
984 11:28:30.539287 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
985 11:28:30.542372 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
986 11:28:30.546002 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
987 11:28:30.549146 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
988 11:28:30.555655 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
989 11:28:30.558910 scan_generic_bus for PCI: 00:19.0 done
990 11:28:30.562373 scan_bus: scanning of bus PCI: 00:19.0 took 30735 usecs
991 11:28:30.565937 PCI: 00:1d.0 scanning...
992 11:28:30.568992 do_pci_scan_bridge for PCI: 00:1d.0
993 11:28:30.572636 PCI: pci_scan_bus for bus 01
994 11:28:30.575682 PCI: 01:00.0 [1c5c/1327] enabled
995 11:28:30.578688 Enabling Common Clock Configuration
996 11:28:30.585935 L1 Sub-State supported from root port 29
997 11:28:30.589139 L1 Sub-State Support = 0xf
998 11:28:30.589220 CommonModeRestoreTime = 0x28
999 11:28:30.595689 Power On Value = 0x16, Power On Scale = 0x0
1000 11:28:30.595773 ASPM: Enabled L1
1001 11:28:30.602598 scan_bus: scanning of bus PCI: 00:1d.0 took 32790 usecs
1002 11:28:30.605733 PCI: 00:1e.2 scanning...
1003 11:28:30.609023 scan_generic_bus for PCI: 00:1e.2
1004 11:28:30.612361 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1005 11:28:30.615484 scan_generic_bus for PCI: 00:1e.2 done
1006 11:28:30.621924 scan_bus: scanning of bus PCI: 00:1e.2 took 14017 usecs
1007 11:28:30.625659 PCI: 00:1e.3 scanning...
1008 11:28:30.628789 scan_generic_bus for PCI: 00:1e.3
1009 11:28:30.631812 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1010 11:28:30.635705 scan_generic_bus for PCI: 00:1e.3 done
1011 11:28:30.642091 scan_bus: scanning of bus PCI: 00:1e.3 took 14014 usecs
1012 11:28:30.645338 PCI: 00:1f.0 scanning...
1013 11:28:30.648598 scan_static_bus for PCI: 00:1f.0
1014 11:28:30.648683 PNP: 0c09.0 enabled
1015 11:28:30.651689 scan_static_bus for PCI: 00:1f.0 done
1016 11:28:30.658181 scan_bus: scanning of bus PCI: 00:1f.0 took 12051 usecs
1017 11:28:30.662170 PCI: 00:1f.3 scanning...
1018 11:28:30.668430 scan_bus: scanning of bus PCI: 00:1f.3 took 2852 usecs
1019 11:28:30.668552 PCI: 00:1f.4 scanning...
1020 11:28:30.671611 scan_generic_bus for PCI: 00:1f.4
1021 11:28:30.678131 scan_generic_bus for PCI: 00:1f.4 done
1022 11:28:30.681825 scan_bus: scanning of bus PCI: 00:1f.4 took 10194 usecs
1023 11:28:30.684838 PCI: 00:1f.5 scanning...
1024 11:28:30.688459 scan_generic_bus for PCI: 00:1f.5
1025 11:28:30.691470 scan_generic_bus for PCI: 00:1f.5 done
1026 11:28:30.698260 scan_bus: scanning of bus PCI: 00:1f.5 took 10196 usecs
1027 11:28:30.704729 scan_bus: scanning of bus DOMAIN: 0000 took 605282 usecs
1028 11:28:30.707958 scan_static_bus for Root Device done
1029 11:28:30.714526 scan_bus: scanning of bus Root Device took 625154 usecs
1030 11:28:30.714615 done
1031 11:28:30.717833 Chrome EC: UHEPI supported
1032 11:28:30.724438 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1033 11:28:30.728050 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1034 11:28:30.734180 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1035 11:28:30.741720 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1036 11:28:30.744973 SPI flash protection: WPSW=0 SRP0=1
1037 11:28:30.751843 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1038 11:28:30.755029 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1039 11:28:30.758133 found VGA at PCI: 00:02.0
1040 11:28:30.761320 Setting up VGA for PCI: 00:02.0
1041 11:28:30.767831 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1042 11:28:30.771537 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1043 11:28:30.774744 Allocating resources...
1044 11:28:30.777874 Reading resources...
1045 11:28:30.780988 Root Device read_resources bus 0 link: 0
1046 11:28:30.784934 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1047 11:28:30.791478 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1048 11:28:30.794574 DOMAIN: 0000 read_resources bus 0 link: 0
1049 11:28:30.801841 PCI: 00:14.0 read_resources bus 0 link: 0
1050 11:28:30.804857 USB0 port 0 read_resources bus 0 link: 0
1051 11:28:30.813279 USB0 port 0 read_resources bus 0 link: 0 done
1052 11:28:30.816569 PCI: 00:14.0 read_resources bus 0 link: 0 done
1053 11:28:30.823838 PCI: 00:15.0 read_resources bus 1 link: 0
1054 11:28:30.826987 PCI: 00:15.0 read_resources bus 1 link: 0 done
1055 11:28:30.833957 PCI: 00:15.1 read_resources bus 2 link: 0
1056 11:28:30.837093 PCI: 00:15.1 read_resources bus 2 link: 0 done
1057 11:28:30.844598 PCI: 00:19.0 read_resources bus 3 link: 0
1058 11:28:30.851553 PCI: 00:19.0 read_resources bus 3 link: 0 done
1059 11:28:30.854770 PCI: 00:1d.0 read_resources bus 1 link: 0
1060 11:28:30.861272 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1061 11:28:30.864388 PCI: 00:1e.2 read_resources bus 4 link: 0
1062 11:28:30.871566 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1063 11:28:30.874720 PCI: 00:1e.3 read_resources bus 5 link: 0
1064 11:28:30.881094 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1065 11:28:30.884997 PCI: 00:1f.0 read_resources bus 0 link: 0
1066 11:28:30.891181 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1067 11:28:30.897796 DOMAIN: 0000 read_resources bus 0 link: 0 done
1068 11:28:30.901527 Root Device read_resources bus 0 link: 0 done
1069 11:28:30.904533 Done reading resources.
1070 11:28:30.908149 Show resources in subtree (Root Device)...After reading.
1071 11:28:30.914332 Root Device child on link 0 CPU_CLUSTER: 0
1072 11:28:30.917598 CPU_CLUSTER: 0 child on link 0 APIC: 00
1073 11:28:30.917683 APIC: 00
1074 11:28:30.920791 APIC: 03
1075 11:28:30.920897 APIC: 04
1076 11:28:30.924696 APIC: 01
1077 11:28:30.924780 APIC: 02
1078 11:28:30.924887 APIC: 05
1079 11:28:30.974085 APIC: 06
1080 11:28:30.974197 APIC: 07
1081 11:28:30.974450 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1082 11:28:30.974519 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1083 11:28:30.974779 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1084 11:28:30.974875 PCI: 00:00.0
1085 11:28:30.974946 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1086 11:28:30.975205 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1087 11:28:30.999401 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1088 11:28:30.999859 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1089 11:28:30.999962 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1090 11:28:31.009694 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1091 11:28:31.019748 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1092 11:28:31.029421 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1093 11:28:31.035952 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1094 11:28:31.046205 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1095 11:28:31.055927 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1096 11:28:31.065785 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1097 11:28:31.076030 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1098 11:28:31.085760 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1099 11:28:31.092367 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1100 11:28:31.102609 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1101 11:28:31.106246 PCI: 00:02.0
1102 11:28:31.115504 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1103 11:28:31.125279 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1104 11:28:31.132255 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1105 11:28:31.135578 PCI: 00:04.0
1106 11:28:31.135664 PCI: 00:08.0
1107 11:28:31.145193 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1108 11:28:31.149000 PCI: 00:12.0
1109 11:28:31.158886 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1110 11:28:31.162087 PCI: 00:14.0 child on link 0 USB0 port 0
1111 11:28:31.171808 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1112 11:28:31.178298 USB0 port 0 child on link 0 USB2 port 0
1113 11:28:31.178406 USB2 port 0
1114 11:28:31.182016 USB2 port 1
1115 11:28:31.182097 USB2 port 2
1116 11:28:31.185148 USB2 port 3
1117 11:28:31.185224 USB2 port 5
1118 11:28:31.188300 USB2 port 6
1119 11:28:31.188376 USB2 port 9
1120 11:28:31.192145 USB3 port 0
1121 11:28:31.192224 USB3 port 1
1122 11:28:31.195346 USB3 port 2
1123 11:28:31.195449 USB3 port 3
1124 11:28:31.198547 USB3 port 4
1125 11:28:31.198625 PCI: 00:14.2
1126 11:28:31.208618 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1127 11:28:31.218019 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1128 11:28:31.221669 PCI: 00:14.3
1129 11:28:31.231626 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1130 11:28:31.234899 PCI: 00:15.0 child on link 0 I2C: 01:15
1131 11:28:31.244710 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 11:28:31.248103 I2C: 01:15
1133 11:28:31.251251 PCI: 00:15.1 child on link 0 I2C: 02:5d
1134 11:28:31.261303 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1135 11:28:31.261390 I2C: 02:5d
1136 11:28:31.264462 GENERIC: 0.0
1137 11:28:31.264546 PCI: 00:16.0
1138 11:28:31.274778 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1139 11:28:31.277697 PCI: 00:17.0
1140 11:28:31.287972 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1141 11:28:31.294479 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1142 11:28:31.304259 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1143 11:28:31.310740 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1144 11:28:31.320772 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1145 11:28:31.330997 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1146 11:28:31.334031 PCI: 00:19.0 child on link 0 I2C: 03:1a
1147 11:28:31.344008 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 11:28:31.344118 I2C: 03:1a
1149 11:28:31.347296 I2C: 03:38
1150 11:28:31.347385 I2C: 03:39
1151 11:28:31.350594 I2C: 03:3a
1152 11:28:31.350695 I2C: 03:3b
1153 11:28:31.357625 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1154 11:28:31.363716 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1155 11:28:31.374134 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1156 11:28:31.383976 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1157 11:28:31.384064 PCI: 01:00.0
1158 11:28:31.394031 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1159 11:28:31.397214 PCI: 00:1e.0
1160 11:28:31.407144 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1161 11:28:31.416988 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1162 11:28:31.420778 PCI: 00:1e.2 child on link 0 SPI: 00
1163 11:28:31.430453 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 11:28:31.433931 SPI: 00
1165 11:28:31.437043 PCI: 00:1e.3 child on link 0 SPI: 01
1166 11:28:31.446789 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1167 11:28:31.446878 SPI: 01
1168 11:28:31.453769 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1169 11:28:31.460297 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1170 11:28:31.469943 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1171 11:28:31.473792 PNP: 0c09.0
1172 11:28:31.480199 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1173 11:28:31.483266 PCI: 00:1f.3
1174 11:28:31.493481 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1175 11:28:31.503299 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1176 11:28:31.503403 PCI: 00:1f.4
1177 11:28:31.513105 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1178 11:28:31.522995 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1179 11:28:31.523088 PCI: 00:1f.5
1180 11:28:31.532995 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1181 11:28:31.539637 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1182 11:28:31.546200 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1183 11:28:31.552908 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1184 11:28:31.556422 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1185 11:28:31.559582 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1186 11:28:31.562932 PCI: 00:17.0 18 * [0x60 - 0x67] io
1187 11:28:31.566069 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1188 11:28:31.576380 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1189 11:28:31.582885 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1190 11:28:31.589213 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1191 11:28:31.595681 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1192 11:28:31.605950 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1193 11:28:31.609118 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1194 11:28:31.615402 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1195 11:28:31.619044 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1196 11:28:31.625695 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1197 11:28:31.628934 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1198 11:28:31.635366 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1199 11:28:31.638662 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1200 11:28:31.645421 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1201 11:28:31.648992 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1202 11:28:31.655037 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1203 11:28:31.658780 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1204 11:28:31.665064 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1205 11:28:31.668394 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1206 11:28:31.675159 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1207 11:28:31.678390 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1208 11:28:31.684879 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1209 11:28:31.688673 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1210 11:28:31.694961 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1211 11:28:31.698304 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1212 11:28:31.701389 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1213 11:28:31.708336 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1214 11:28:31.711474 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1215 11:28:31.718623 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1216 11:28:31.721571 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1217 11:28:31.727998 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1218 11:28:31.735237 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1219 11:28:31.738071 avoid_fixed_resources: DOMAIN: 0000
1220 11:28:31.744711 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1221 11:28:31.751425 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1222 11:28:31.758090 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1223 11:28:31.767955 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1224 11:28:31.774796 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1225 11:28:31.780640 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1226 11:28:31.790991 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1227 11:28:31.797406 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1228 11:28:31.803947 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1229 11:28:31.814078 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1230 11:28:31.820421 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1231 11:28:31.826981 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1232 11:28:31.830755 Setting resources...
1233 11:28:31.837423 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1234 11:28:31.840705 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1235 11:28:31.843839 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1236 11:28:31.847179 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1237 11:28:31.850476 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1238 11:28:31.856961 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1239 11:28:31.863588 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1240 11:28:31.870381 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1241 11:28:31.877254 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1242 11:28:31.883900 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1243 11:28:31.886940 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1244 11:28:31.893306 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1245 11:28:31.897161 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1246 11:28:31.903574 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1247 11:28:31.906838 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1248 11:28:31.913561 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1249 11:28:31.916877 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1250 11:28:31.923668 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1251 11:28:31.926897 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1252 11:28:31.933752 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1253 11:28:31.937069 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1254 11:28:31.940247 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1255 11:28:31.946555 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1256 11:28:31.949759 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1257 11:28:31.956840 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1258 11:28:31.960073 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1259 11:28:31.966439 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1260 11:28:31.969587 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1261 11:28:31.976177 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1262 11:28:31.979832 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1263 11:28:31.986161 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1264 11:28:31.989823 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1265 11:28:31.995985 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1266 11:28:32.005997 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1267 11:28:32.012414 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1268 11:28:32.019473 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1269 11:28:32.025747 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1270 11:28:32.032454 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1271 11:28:32.035840 Root Device assign_resources, bus 0 link: 0
1272 11:28:32.042879 DOMAIN: 0000 assign_resources, bus 0 link: 0
1273 11:28:32.049386 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1274 11:28:32.059245 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1275 11:28:32.065834 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1276 11:28:32.076022 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1277 11:28:32.082102 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1278 11:28:32.088953 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1279 11:28:32.095751 PCI: 00:14.0 assign_resources, bus 0 link: 0
1280 11:28:32.098870 PCI: 00:14.0 assign_resources, bus 0 link: 0
1281 11:28:32.109106 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1282 11:28:32.115582 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1283 11:28:32.125274 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1284 11:28:32.132502 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1285 11:28:32.138578 PCI: 00:15.0 assign_resources, bus 1 link: 0
1286 11:28:32.142262 PCI: 00:15.0 assign_resources, bus 1 link: 0
1287 11:28:32.148547 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1288 11:28:32.155047 PCI: 00:15.1 assign_resources, bus 2 link: 0
1289 11:28:32.158938 PCI: 00:15.1 assign_resources, bus 2 link: 0
1290 11:28:32.168829 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1291 11:28:32.175116 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1292 11:28:32.185273 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1293 11:28:32.192120 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1294 11:28:32.198328 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1295 11:28:32.208081 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1296 11:28:32.215038 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1297 11:28:32.221563 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1298 11:28:32.227979 PCI: 00:19.0 assign_resources, bus 3 link: 0
1299 11:28:32.231834 PCI: 00:19.0 assign_resources, bus 3 link: 0
1300 11:28:32.241798 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1301 11:28:32.248184 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1302 11:28:32.257987 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1303 11:28:32.261393 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1304 11:28:32.271393 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1305 11:28:32.274788 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1306 11:28:32.284457 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1307 11:28:32.290962 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1308 11:28:32.297690 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1309 11:28:32.301063 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1310 11:28:32.311360 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1311 11:28:32.314248 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1312 11:28:32.317821 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1313 11:28:32.324234 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1314 11:28:32.327474 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1315 11:28:32.334050 LPC: Trying to open IO window from 800 size 1ff
1316 11:28:32.340604 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1317 11:28:32.350760 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1318 11:28:32.357862 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1319 11:28:32.367402 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1320 11:28:32.370602 DOMAIN: 0000 assign_resources, bus 0 link: 0
1321 11:28:32.373977 Root Device assign_resources, bus 0 link: 0
1322 11:28:32.377337 Done setting resources.
1323 11:28:32.383655 Show resources in subtree (Root Device)...After assigning values.
1324 11:28:32.390722 Root Device child on link 0 CPU_CLUSTER: 0
1325 11:28:32.393982 CPU_CLUSTER: 0 child on link 0 APIC: 00
1326 11:28:32.394109 APIC: 00
1327 11:28:32.397185 APIC: 03
1328 11:28:32.397382 APIC: 04
1329 11:28:32.397505 APIC: 01
1330 11:28:32.400819 APIC: 02
1331 11:28:32.400913 APIC: 05
1332 11:28:32.401013 APIC: 06
1333 11:28:32.403929 APIC: 07
1334 11:28:32.407646 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1335 11:28:32.417344 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1336 11:28:32.426865 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1337 11:28:32.430638 PCI: 00:00.0
1338 11:28:32.440748 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1339 11:28:32.450561 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1340 11:28:32.460115 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1341 11:28:32.466638 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1342 11:28:32.476799 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1343 11:28:32.486690 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1344 11:28:32.496210 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1345 11:28:32.506337 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1346 11:28:32.515831 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1347 11:28:32.522541 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1348 11:28:32.532319 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1349 11:28:32.542340 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1350 11:28:32.552090 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1351 11:28:32.562226 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1352 11:28:32.572058 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1353 11:28:32.578582 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1354 11:28:32.581840 PCI: 00:02.0
1355 11:28:32.592318 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1356 11:28:32.602022 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1357 11:28:32.612148 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1358 11:28:32.615372 PCI: 00:04.0
1359 11:28:32.615456 PCI: 00:08.0
1360 11:28:32.624752 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1361 11:28:32.627999 PCI: 00:12.0
1362 11:28:32.638424 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1363 11:28:32.641374 PCI: 00:14.0 child on link 0 USB0 port 0
1364 11:28:32.651151 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1365 11:28:32.658339 USB0 port 0 child on link 0 USB2 port 0
1366 11:28:32.658426 USB2 port 0
1367 11:28:32.661574 USB2 port 1
1368 11:28:32.661720 USB2 port 2
1369 11:28:32.664685 USB2 port 3
1370 11:28:32.664784 USB2 port 5
1371 11:28:32.667791 USB2 port 6
1372 11:28:32.667889 USB2 port 9
1373 11:28:32.671375 USB3 port 0
1374 11:28:32.671457 USB3 port 1
1375 11:28:32.674416 USB3 port 2
1376 11:28:32.678162 USB3 port 3
1377 11:28:32.678260 USB3 port 4
1378 11:28:32.681306 PCI: 00:14.2
1379 11:28:32.691034 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1380 11:28:32.701131 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1381 11:28:32.701218 PCI: 00:14.3
1382 11:28:32.710907 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1383 11:28:32.717417 PCI: 00:15.0 child on link 0 I2C: 01:15
1384 11:28:32.727293 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1385 11:28:32.727381 I2C: 01:15
1386 11:28:32.733925 PCI: 00:15.1 child on link 0 I2C: 02:5d
1387 11:28:32.743783 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1388 11:28:32.743896 I2C: 02:5d
1389 11:28:32.746910 GENERIC: 0.0
1390 11:28:32.747042 PCI: 00:16.0
1391 11:28:32.757275 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1392 11:28:32.760212 PCI: 00:17.0
1393 11:28:32.769977 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1394 11:28:32.780094 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1395 11:28:32.790087 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1396 11:28:32.799687 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1397 11:28:32.806659 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1398 11:28:32.816223 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1399 11:28:32.822694 PCI: 00:19.0 child on link 0 I2C: 03:1a
1400 11:28:32.833053 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1401 11:28:32.833211 I2C: 03:1a
1402 11:28:32.836173 I2C: 03:38
1403 11:28:32.836259 I2C: 03:39
1404 11:28:32.839912 I2C: 03:3a
1405 11:28:32.839998 I2C: 03:3b
1406 11:28:32.846076 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1407 11:28:32.852920 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1408 11:28:32.862425 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1409 11:28:32.875816 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1410 11:28:32.875901 PCI: 01:00.0
1411 11:28:32.886202 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1412 11:28:32.889018 PCI: 00:1e.0
1413 11:28:32.899027 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1414 11:28:32.909211 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1415 11:28:32.911834 PCI: 00:1e.2 child on link 0 SPI: 00
1416 11:28:32.925278 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1417 11:28:32.925367 SPI: 00
1418 11:28:32.928470 PCI: 00:1e.3 child on link 0 SPI: 01
1419 11:28:32.938800 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1420 11:28:32.941974 SPI: 01
1421 11:28:32.945108 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1422 11:28:32.955043 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1423 11:28:32.962022 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1424 11:28:32.964873 PNP: 0c09.0
1425 11:28:32.971502 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1426 11:28:32.974769 PCI: 00:1f.3
1427 11:28:32.984736 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1428 11:28:32.994302 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1429 11:28:32.998057 PCI: 00:1f.4
1430 11:28:33.007850 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1431 11:28:33.017661 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1432 11:28:33.017752 PCI: 00:1f.5
1433 11:28:33.027736 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1434 11:28:33.031028 Done allocating resources.
1435 11:28:33.037468 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1436 11:28:33.040758 Enabling resources...
1437 11:28:33.044107 PCI: 00:00.0 subsystem <- 8086/9b61
1438 11:28:33.047333 PCI: 00:00.0 cmd <- 06
1439 11:28:33.050891 PCI: 00:02.0 subsystem <- 8086/9b41
1440 11:28:33.054168 PCI: 00:02.0 cmd <- 03
1441 11:28:33.054243 PCI: 00:08.0 cmd <- 06
1442 11:28:33.060367 PCI: 00:12.0 subsystem <- 8086/02f9
1443 11:28:33.060459 PCI: 00:12.0 cmd <- 02
1444 11:28:33.063999 PCI: 00:14.0 subsystem <- 8086/02ed
1445 11:28:33.066965 PCI: 00:14.0 cmd <- 02
1446 11:28:33.070846 PCI: 00:14.2 cmd <- 02
1447 11:28:33.073896 PCI: 00:14.3 subsystem <- 8086/02f0
1448 11:28:33.077100 PCI: 00:14.3 cmd <- 02
1449 11:28:33.080365 PCI: 00:15.0 subsystem <- 8086/02e8
1450 11:28:33.083532 PCI: 00:15.0 cmd <- 02
1451 11:28:33.086896 PCI: 00:15.1 subsystem <- 8086/02e9
1452 11:28:33.090036 PCI: 00:15.1 cmd <- 02
1453 11:28:33.093369 PCI: 00:16.0 subsystem <- 8086/02e0
1454 11:28:33.096579 PCI: 00:16.0 cmd <- 02
1455 11:28:33.099944 PCI: 00:17.0 subsystem <- 8086/02d3
1456 11:28:33.100030 PCI: 00:17.0 cmd <- 03
1457 11:28:33.106709 PCI: 00:19.0 subsystem <- 8086/02c5
1458 11:28:33.106797 PCI: 00:19.0 cmd <- 02
1459 11:28:33.110157 PCI: 00:1d.0 bridge ctrl <- 0013
1460 11:28:33.113092 PCI: 00:1d.0 subsystem <- 8086/02b0
1461 11:28:33.116990 PCI: 00:1d.0 cmd <- 06
1462 11:28:33.119968 PCI: 00:1e.0 subsystem <- 8086/02a8
1463 11:28:33.123241 PCI: 00:1e.0 cmd <- 06
1464 11:28:33.126470 PCI: 00:1e.2 subsystem <- 8086/02aa
1465 11:28:33.130358 PCI: 00:1e.2 cmd <- 06
1466 11:28:33.133525 PCI: 00:1e.3 subsystem <- 8086/02ab
1467 11:28:33.136737 PCI: 00:1e.3 cmd <- 02
1468 11:28:33.140020 PCI: 00:1f.0 subsystem <- 8086/0284
1469 11:28:33.143238 PCI: 00:1f.0 cmd <- 407
1470 11:28:33.146565 PCI: 00:1f.3 subsystem <- 8086/02c8
1471 11:28:33.149893 PCI: 00:1f.3 cmd <- 02
1472 11:28:33.153059 PCI: 00:1f.4 subsystem <- 8086/02a3
1473 11:28:33.156204 PCI: 00:1f.4 cmd <- 03
1474 11:28:33.159472 PCI: 00:1f.5 subsystem <- 8086/02a4
1475 11:28:33.162540 PCI: 00:1f.5 cmd <- 406
1476 11:28:33.170127 PCI: 01:00.0 cmd <- 02
1477 11:28:33.175630 done.
1478 11:28:33.188555 ME: Version: 14.0.39.1367
1479 11:28:33.194997 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1480 11:28:33.198303 Initializing devices...
1481 11:28:33.198385 Root Device init ...
1482 11:28:33.204750 Chrome EC: Set SMI mask to 0x0000000000000000
1483 11:28:33.207907 Chrome EC: clear events_b mask to 0x0000000000000000
1484 11:28:33.214982 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1485 11:28:33.221457 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1486 11:28:33.227900 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1487 11:28:33.231731 Chrome EC: Set WAKE mask to 0x0000000000000000
1488 11:28:33.234826 Root Device init finished in 35188 usecs
1489 11:28:33.238089 CPU_CLUSTER: 0 init ...
1490 11:28:33.242056 CPU_CLUSTER: 0 init finished in 2437 usecs
1491 11:28:33.249067 PCI: 00:00.0 init ...
1492 11:28:33.252379 CPU TDP: 15 Watts
1493 11:28:33.255689 CPU PL2 = 64 Watts
1494 11:28:33.258964 PCI: 00:00.0 init finished in 7068 usecs
1495 11:28:33.262550 PCI: 00:02.0 init ...
1496 11:28:33.265815 PCI: 00:02.0 init finished in 2251 usecs
1497 11:28:33.268761 PCI: 00:08.0 init ...
1498 11:28:33.272498 PCI: 00:08.0 init finished in 2252 usecs
1499 11:28:33.275789 PCI: 00:12.0 init ...
1500 11:28:33.279089 PCI: 00:12.0 init finished in 2252 usecs
1501 11:28:33.282174 PCI: 00:14.0 init ...
1502 11:28:33.285706 PCI: 00:14.0 init finished in 2241 usecs
1503 11:28:33.288752 PCI: 00:14.2 init ...
1504 11:28:33.292028 PCI: 00:14.2 init finished in 2251 usecs
1505 11:28:33.295251 PCI: 00:14.3 init ...
1506 11:28:33.299109 PCI: 00:14.3 init finished in 2270 usecs
1507 11:28:33.302246 PCI: 00:15.0 init ...
1508 11:28:33.305510 DW I2C bus 0 at 0xd121f000 (400 KHz)
1509 11:28:33.308810 PCI: 00:15.0 init finished in 5977 usecs
1510 11:28:33.312026 PCI: 00:15.1 init ...
1511 11:28:33.315361 DW I2C bus 1 at 0xd1220000 (400 KHz)
1512 11:28:33.318572 PCI: 00:15.1 init finished in 5973 usecs
1513 11:28:33.322452 PCI: 00:16.0 init ...
1514 11:28:33.325863 PCI: 00:16.0 init finished in 2252 usecs
1515 11:28:33.329687 PCI: 00:19.0 init ...
1516 11:28:33.332740 DW I2C bus 4 at 0xd1222000 (400 KHz)
1517 11:28:33.339680 PCI: 00:19.0 init finished in 5975 usecs
1518 11:28:33.339769 PCI: 00:1d.0 init ...
1519 11:28:33.342935 Initializing PCH PCIe bridge.
1520 11:28:33.346187 PCI: 00:1d.0 init finished in 5282 usecs
1521 11:28:33.351226 PCI: 00:1f.0 init ...
1522 11:28:33.354615 IOAPIC: Initializing IOAPIC at 0xfec00000
1523 11:28:33.361126 IOAPIC: Bootstrap Processor Local APIC = 0x00
1524 11:28:33.361212 IOAPIC: ID = 0x02
1525 11:28:33.364411 IOAPIC: Dumping registers
1526 11:28:33.367514 reg 0x0000: 0x02000000
1527 11:28:33.370719 reg 0x0001: 0x00770020
1528 11:28:33.370797 reg 0x0002: 0x00000000
1529 11:28:33.377704 PCI: 00:1f.0 init finished in 23530 usecs
1530 11:28:33.380848 PCI: 00:1f.4 init ...
1531 11:28:33.384446 PCI: 00:1f.4 init finished in 2260 usecs
1532 11:28:33.394972 PCI: 01:00.0 init ...
1533 11:28:33.398746 PCI: 01:00.0 init finished in 2252 usecs
1534 11:28:33.402400 PNP: 0c09.0 init ...
1535 11:28:33.406171 Google Chrome EC uptime: 11.109 seconds
1536 11:28:33.412599 Google Chrome AP resets since EC boot: 0
1537 11:28:33.415863 Google Chrome most recent AP reset causes:
1538 11:28:33.422242 Google Chrome EC reset flags at last EC boot: reset-pin
1539 11:28:33.425912 PNP: 0c09.0 init finished in 20585 usecs
1540 11:28:33.429166 Devices initialized
1541 11:28:33.432435 Show all devs... After init.
1542 11:28:33.432520 Root Device: enabled 1
1543 11:28:33.435695 CPU_CLUSTER: 0: enabled 1
1544 11:28:33.438758 DOMAIN: 0000: enabled 1
1545 11:28:33.438844 APIC: 00: enabled 1
1546 11:28:33.442427 PCI: 00:00.0: enabled 1
1547 11:28:33.445897 PCI: 00:02.0: enabled 1
1548 11:28:33.448913 PCI: 00:04.0: enabled 0
1549 11:28:33.449027 PCI: 00:05.0: enabled 0
1550 11:28:33.452235 PCI: 00:12.0: enabled 1
1551 11:28:33.455499 PCI: 00:12.5: enabled 0
1552 11:28:33.458850 PCI: 00:12.6: enabled 0
1553 11:28:33.458934 PCI: 00:14.0: enabled 1
1554 11:28:33.462074 PCI: 00:14.1: enabled 0
1555 11:28:33.465311 PCI: 00:14.3: enabled 1
1556 11:28:33.465396 PCI: 00:14.5: enabled 0
1557 11:28:33.469181 PCI: 00:15.0: enabled 1
1558 11:28:33.472395 PCI: 00:15.1: enabled 1
1559 11:28:33.475658 PCI: 00:15.2: enabled 0
1560 11:28:33.475767 PCI: 00:15.3: enabled 0
1561 11:28:33.478839 PCI: 00:16.0: enabled 1
1562 11:28:33.482186 PCI: 00:16.1: enabled 0
1563 11:28:33.485870 PCI: 00:16.2: enabled 0
1564 11:28:33.485962 PCI: 00:16.3: enabled 0
1565 11:28:33.489039 PCI: 00:16.4: enabled 0
1566 11:28:33.492175 PCI: 00:16.5: enabled 0
1567 11:28:33.495684 PCI: 00:17.0: enabled 1
1568 11:28:33.495768 PCI: 00:19.0: enabled 1
1569 11:28:33.498805 PCI: 00:19.1: enabled 0
1570 11:28:33.501762 PCI: 00:19.2: enabled 0
1571 11:28:33.501846 PCI: 00:1a.0: enabled 0
1572 11:28:33.505277 PCI: 00:1c.0: enabled 0
1573 11:28:33.508314 PCI: 00:1c.1: enabled 0
1574 11:28:33.512137 PCI: 00:1c.2: enabled 0
1575 11:28:33.512221 PCI: 00:1c.3: enabled 0
1576 11:28:33.515328 PCI: 00:1c.4: enabled 0
1577 11:28:33.518493 PCI: 00:1c.5: enabled 0
1578 11:28:33.521779 PCI: 00:1c.6: enabled 0
1579 11:28:33.521864 PCI: 00:1c.7: enabled 0
1580 11:28:33.525045 PCI: 00:1d.0: enabled 1
1581 11:28:33.528117 PCI: 00:1d.1: enabled 0
1582 11:28:33.531387 PCI: 00:1d.2: enabled 0
1583 11:28:33.531471 PCI: 00:1d.3: enabled 0
1584 11:28:33.535223 PCI: 00:1d.4: enabled 0
1585 11:28:33.538495 PCI: 00:1d.5: enabled 0
1586 11:28:33.538597 PCI: 00:1e.0: enabled 1
1587 11:28:33.541537 PCI: 00:1e.1: enabled 0
1588 11:28:33.544664 PCI: 00:1e.2: enabled 1
1589 11:28:33.547968 PCI: 00:1e.3: enabled 1
1590 11:28:33.548068 PCI: 00:1f.0: enabled 1
1591 11:28:33.551775 PCI: 00:1f.1: enabled 0
1592 11:28:33.554980 PCI: 00:1f.2: enabled 0
1593 11:28:33.558304 PCI: 00:1f.3: enabled 1
1594 11:28:33.558389 PCI: 00:1f.4: enabled 1
1595 11:28:33.561694 PCI: 00:1f.5: enabled 1
1596 11:28:33.565097 PCI: 00:1f.6: enabled 0
1597 11:28:33.568352 USB0 port 0: enabled 1
1598 11:28:33.568437 I2C: 01:15: enabled 1
1599 11:28:33.571722 I2C: 02:5d: enabled 1
1600 11:28:33.574864 GENERIC: 0.0: enabled 1
1601 11:28:33.574948 I2C: 03:1a: enabled 1
1602 11:28:33.578071 I2C: 03:38: enabled 1
1603 11:28:33.581068 I2C: 03:39: enabled 1
1604 11:28:33.581169 I2C: 03:3a: enabled 1
1605 11:28:33.584958 I2C: 03:3b: enabled 1
1606 11:28:33.588347 PCI: 00:00.0: enabled 1
1607 11:28:33.588446 SPI: 00: enabled 1
1608 11:28:33.591258 SPI: 01: enabled 1
1609 11:28:33.594542 PNP: 0c09.0: enabled 1
1610 11:28:33.594627 USB2 port 0: enabled 1
1611 11:28:33.597738 USB2 port 1: enabled 1
1612 11:28:33.601513 USB2 port 2: enabled 0
1613 11:28:33.601601 USB2 port 3: enabled 0
1614 11:28:33.604619 USB2 port 5: enabled 0
1615 11:28:33.607812 USB2 port 6: enabled 1
1616 11:28:33.610811 USB2 port 9: enabled 1
1617 11:28:33.610897 USB3 port 0: enabled 1
1618 11:28:33.614451 USB3 port 1: enabled 1
1619 11:28:33.617504 USB3 port 2: enabled 1
1620 11:28:33.617589 USB3 port 3: enabled 1
1621 11:28:33.620674 USB3 port 4: enabled 0
1622 11:28:33.624538 APIC: 03: enabled 1
1623 11:28:33.624624 APIC: 04: enabled 1
1624 11:28:33.627622 APIC: 01: enabled 1
1625 11:28:33.630735 APIC: 02: enabled 1
1626 11:28:33.630821 APIC: 05: enabled 1
1627 11:28:33.633905 APIC: 06: enabled 1
1628 11:28:33.633991 APIC: 07: enabled 1
1629 11:28:33.637159 PCI: 00:08.0: enabled 1
1630 11:28:33.641025 PCI: 00:14.2: enabled 1
1631 11:28:33.644228 PCI: 01:00.0: enabled 1
1632 11:28:33.647407 Disabling ACPI via APMC:
1633 11:28:33.647492 done.
1634 11:28:33.654427 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1635 11:28:33.657488 ELOG: NV offset 0xaf0000 size 0x4000
1636 11:28:33.664435 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1637 11:28:33.670848 ELOG: Event(17) added with size 13 at 2023-06-09 11:28:18 UTC
1638 11:28:33.677347 POST: Unexpected post code in previous boot: 0x73
1639 11:28:33.683793 ELOG: Event(A3) added with size 11 at 2023-06-09 11:28:18 UTC
1640 11:28:33.690380 ELOG: Event(A6) added with size 13 at 2023-06-09 11:28:18 UTC
1641 11:28:33.697379 ELOG: Event(92) added with size 9 at 2023-06-09 11:28:18 UTC
1642 11:28:33.703680 ELOG: Event(93) added with size 9 at 2023-06-09 11:28:18 UTC
1643 11:28:33.706858 ELOG: Event(9A) added with size 9 at 2023-06-09 11:28:18 UTC
1644 11:28:33.713743 ELOG: Event(9E) added with size 10 at 2023-06-09 11:28:18 UTC
1645 11:28:33.720562 ELOG: Event(9F) added with size 14 at 2023-06-09 11:28:18 UTC
1646 11:28:33.726939 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1647 11:28:33.733423 ELOG: Event(A1) added with size 10 at 2023-06-09 11:28:18 UTC
1648 11:28:33.739815 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1649 11:28:33.746368 ELOG: Event(A0) added with size 9 at 2023-06-09 11:28:18 UTC
1650 11:28:33.750241 elog_add_boot_reason: Logged dev mode boot
1651 11:28:33.753340 Finalize devices...
1652 11:28:33.756596 PCI: 00:17.0 final
1653 11:28:33.756682 Devices finalized
1654 11:28:33.762912 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1655 11:28:33.766666 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1656 11:28:33.773041 ME: HFSTS1 : 0x90000245
1657 11:28:33.776334 ME: HFSTS2 : 0x3B850126
1658 11:28:33.779540 ME: HFSTS3 : 0x00000020
1659 11:28:33.782813 ME: HFSTS4 : 0x00004800
1660 11:28:33.789394 ME: HFSTS5 : 0x00000000
1661 11:28:33.792495 ME: HFSTS6 : 0x40400006
1662 11:28:33.796251 ME: Manufacturing Mode : NO
1663 11:28:33.799413 ME: FW Partition Table : OK
1664 11:28:33.802493 ME: Bringup Loader Failure : NO
1665 11:28:33.806227 ME: Firmware Init Complete : YES
1666 11:28:33.809341 ME: Boot Options Present : NO
1667 11:28:33.812448 ME: Update In Progress : NO
1668 11:28:33.816202 ME: D0i3 Support : YES
1669 11:28:33.819305 ME: Low Power State Enabled : NO
1670 11:28:33.822379 ME: CPU Replaced : NO
1671 11:28:33.826149 ME: CPU Replacement Valid : YES
1672 11:28:33.829289 ME: Current Working State : 5
1673 11:28:33.832468 ME: Current Operation State : 1
1674 11:28:33.835688 ME: Current Operation Mode : 0
1675 11:28:33.838894 ME: Error Code : 0
1676 11:28:33.842032 ME: CPU Debug Disabled : YES
1677 11:28:33.845317 ME: TXT Support : NO
1678 11:28:33.852362 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1679 11:28:33.855662 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1680 11:28:33.859053 CBFS @ c08000 size 3f8000
1681 11:28:33.865131 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1682 11:28:33.868930 CBFS: Locating 'fallback/dsdt.aml'
1683 11:28:33.872081 CBFS: Found @ offset 10bb80 size 3fa5
1684 11:28:33.878494 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1685 11:28:33.878607 CBFS @ c08000 size 3f8000
1686 11:28:33.885108 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1687 11:28:33.888303 CBFS: Locating 'fallback/slic'
1688 11:28:33.892796 CBFS: 'fallback/slic' not found.
1689 11:28:33.899372 ACPI: Writing ACPI tables at 99b3e000.
1690 11:28:33.899482 ACPI: * FACS
1691 11:28:33.902603 ACPI: * DSDT
1692 11:28:33.905770 Ramoops buffer: 0x100000@0x99a3d000.
1693 11:28:33.908876 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1694 11:28:33.915637 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1695 11:28:33.919257 Google Chrome EC: version:
1696 11:28:33.922406 ro: helios_v2.0.2659-56403530b
1697 11:28:33.925702 rw: helios_v2.0.2849-c41de27e7d
1698 11:28:33.925802 running image: 1
1699 11:28:33.930072 ACPI: * FADT
1700 11:28:33.930170 SCI is IRQ9
1701 11:28:33.936346 ACPI: added table 1/32, length now 40
1702 11:28:33.936451 ACPI: * SSDT
1703 11:28:33.939527 Found 1 CPU(s) with 8 core(s) each.
1704 11:28:33.942861 Error: Could not locate 'wifi_sar' in VPD.
1705 11:28:33.949904 Checking CBFS for default SAR values
1706 11:28:33.953147 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1707 11:28:33.956402 CBFS @ c08000 size 3f8000
1708 11:28:33.962899 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1709 11:28:33.966016 CBFS: Locating 'wifi_sar_defaults.hex'
1710 11:28:33.969735 CBFS: Found @ offset 5fac0 size 77
1711 11:28:33.972987 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1712 11:28:33.979327 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1713 11:28:33.983164 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1714 11:28:33.989514 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1715 11:28:33.993058 failed to find key in VPD: dsm_calib_r0_0
1716 11:28:34.002522 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1717 11:28:34.005826 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1718 11:28:34.009332 failed to find key in VPD: dsm_calib_r0_1
1719 11:28:34.019344 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1720 11:28:34.025539 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1721 11:28:34.029127 failed to find key in VPD: dsm_calib_r0_2
1722 11:28:34.038810 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1723 11:28:34.042506 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1724 11:28:34.049032 failed to find key in VPD: dsm_calib_r0_3
1725 11:28:34.055424 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1726 11:28:34.062004 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1727 11:28:34.065770 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1728 11:28:34.068830 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1729 11:28:34.072578 EC returned error result code 1
1730 11:28:34.076477 EC returned error result code 1
1731 11:28:34.080431 EC returned error result code 1
1732 11:28:34.086718 PS2K: Bad resp from EC. Vivaldi disabled!
1733 11:28:34.089958 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1734 11:28:34.097102 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1735 11:28:34.103567 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1736 11:28:34.106734 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1737 11:28:34.113173 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1738 11:28:34.120031 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1739 11:28:34.126848 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1740 11:28:34.130063 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1741 11:28:34.136223 ACPI: added table 2/32, length now 44
1742 11:28:34.136339 ACPI: * MCFG
1743 11:28:34.139863 ACPI: added table 3/32, length now 48
1744 11:28:34.143071 ACPI: * TPM2
1745 11:28:34.146598 TPM2 log created at 99a2d000
1746 11:28:34.150009 ACPI: added table 4/32, length now 52
1747 11:28:34.150119 ACPI: * MADT
1748 11:28:34.153228 SCI is IRQ9
1749 11:28:34.156285 ACPI: added table 5/32, length now 56
1750 11:28:34.156362 current = 99b43ac0
1751 11:28:34.159537 ACPI: * DMAR
1752 11:28:34.162797 ACPI: added table 6/32, length now 60
1753 11:28:34.165932 ACPI: * IGD OpRegion
1754 11:28:34.166033 GMA: Found VBT in CBFS
1755 11:28:34.169270 GMA: Found valid VBT in CBFS
1756 11:28:34.172962 ACPI: added table 7/32, length now 64
1757 11:28:34.176158 ACPI: * HPET
1758 11:28:34.179439 ACPI: added table 8/32, length now 68
1759 11:28:34.179541 ACPI: done.
1760 11:28:34.183111 ACPI tables: 31744 bytes.
1761 11:28:34.186658 smbios_write_tables: 99a2c000
1762 11:28:34.189855 EC returned error result code 3
1763 11:28:34.192966 Couldn't obtain OEM name from CBI
1764 11:28:34.196217 Create SMBIOS type 17
1765 11:28:34.199467 PCI: 00:00.0 (Intel Cannonlake)
1766 11:28:34.202806 PCI: 00:14.3 (Intel WiFi)
1767 11:28:34.206025 SMBIOS tables: 939 bytes.
1768 11:28:34.209291 Writing table forward entry at 0x00000500
1769 11:28:34.215853 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1770 11:28:34.219618 Writing coreboot table at 0x99b62000
1771 11:28:34.225729 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1772 11:28:34.229559 1. 0000000000001000-000000000009ffff: RAM
1773 11:28:34.232668 2. 00000000000a0000-00000000000fffff: RESERVED
1774 11:28:34.239536 3. 0000000000100000-0000000099a2bfff: RAM
1775 11:28:34.242668 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1776 11:28:34.249009 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1777 11:28:34.255858 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1778 11:28:34.258987 7. 000000009a000000-000000009f7fffff: RESERVED
1779 11:28:34.265487 8. 00000000e0000000-00000000efffffff: RESERVED
1780 11:28:34.268940 9. 00000000fc000000-00000000fc000fff: RESERVED
1781 11:28:34.272602 10. 00000000fe000000-00000000fe00ffff: RESERVED
1782 11:28:34.278796 11. 00000000fed10000-00000000fed17fff: RESERVED
1783 11:28:34.282494 12. 00000000fed80000-00000000fed83fff: RESERVED
1784 11:28:34.288958 13. 00000000fed90000-00000000fed91fff: RESERVED
1785 11:28:34.292273 14. 00000000feda0000-00000000feda1fff: RESERVED
1786 11:28:34.298586 15. 0000000100000000-000000045e7fffff: RAM
1787 11:28:34.302253 Graphics framebuffer located at 0xc0000000
1788 11:28:34.305454 Passing 5 GPIOs to payload:
1789 11:28:34.308712 NAME | PORT | POLARITY | VALUE
1790 11:28:34.315226 write protect | undefined | high | low
1791 11:28:34.318434 lid | undefined | high | high
1792 11:28:34.325006 power | undefined | high | low
1793 11:28:34.331810 oprom | undefined | high | low
1794 11:28:34.335274 EC in RW | 0x000000cb | high | low
1795 11:28:34.338718 Board ID: 4
1796 11:28:34.341686 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1797 11:28:34.345316 CBFS @ c08000 size 3f8000
1798 11:28:34.351933 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1799 11:28:34.358677 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1800 11:28:34.358808 coreboot table: 1492 bytes.
1801 11:28:34.361651 IMD ROOT 0. 99fff000 00001000
1802 11:28:34.364712 IMD SMALL 1. 99ffe000 00001000
1803 11:28:34.368478 FSP MEMORY 2. 99c4e000 003b0000
1804 11:28:34.371757 CONSOLE 3. 99c2e000 00020000
1805 11:28:34.374964 FMAP 4. 99c2d000 0000054e
1806 11:28:34.378295 TIME STAMP 5. 99c2c000 00000910
1807 11:28:34.381456 VBOOT WORK 6. 99c18000 00014000
1808 11:28:34.385205 MRC DATA 7. 99c16000 00001958
1809 11:28:34.388498 ROMSTG STCK 8. 99c15000 00001000
1810 11:28:34.392017 AFTER CAR 9. 99c0b000 0000a000
1811 11:28:34.395115 RAMSTAGE 10. 99baf000 0005c000
1812 11:28:34.398337 REFCODE 11. 99b7a000 00035000
1813 11:28:34.401624 SMM BACKUP 12. 99b6a000 00010000
1814 11:28:34.404756 COREBOOT 13. 99b62000 00008000
1815 11:28:34.408455 ACPI 14. 99b3e000 00024000
1816 11:28:34.411643 ACPI GNVS 15. 99b3d000 00001000
1817 11:28:34.414954 RAMOOPS 16. 99a3d000 00100000
1818 11:28:34.418237 TPM2 TCGLOG17. 99a2d000 00010000
1819 11:28:34.421602 SMBIOS 18. 99a2c000 00000800
1820 11:28:34.424883 IMD small region:
1821 11:28:34.428111 IMD ROOT 0. 99ffec00 00000400
1822 11:28:34.431390 FSP RUNTIME 1. 99ffebe0 00000004
1823 11:28:34.435191 EC HOSTEVENT 2. 99ffebc0 00000008
1824 11:28:34.438356 POWER STATE 3. 99ffeb80 00000040
1825 11:28:34.441566 ROMSTAGE 4. 99ffeb60 00000004
1826 11:28:34.444655 MEM INFO 5. 99ffe9a0 000001b9
1827 11:28:34.448433 VPD 6. 99ffe920 0000006c
1828 11:28:34.451473 MTRR: Physical address space:
1829 11:28:34.457994 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1830 11:28:34.464724 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1831 11:28:34.471526 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1832 11:28:34.477687 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1833 11:28:34.484565 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1834 11:28:34.490866 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1835 11:28:34.494277 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1836 11:28:34.501343 MTRR: Fixed MSR 0x250 0x0606060606060606
1837 11:28:34.504633 MTRR: Fixed MSR 0x258 0x0606060606060606
1838 11:28:34.507912 MTRR: Fixed MSR 0x259 0x0000000000000000
1839 11:28:34.511142 MTRR: Fixed MSR 0x268 0x0606060606060606
1840 11:28:34.517457 MTRR: Fixed MSR 0x269 0x0606060606060606
1841 11:28:34.520642 MTRR: Fixed MSR 0x26a 0x0606060606060606
1842 11:28:34.523968 MTRR: Fixed MSR 0x26b 0x0606060606060606
1843 11:28:34.527228 MTRR: Fixed MSR 0x26c 0x0606060606060606
1844 11:28:34.534337 MTRR: Fixed MSR 0x26d 0x0606060606060606
1845 11:28:34.537536 MTRR: Fixed MSR 0x26e 0x0606060606060606
1846 11:28:34.540748 MTRR: Fixed MSR 0x26f 0x0606060606060606
1847 11:28:34.543999 call enable_fixed_mtrr()
1848 11:28:34.547176 CPU physical address size: 39 bits
1849 11:28:34.550897 MTRR: default type WB/UC MTRR counts: 6/8.
1850 11:28:34.557161 MTRR: WB selected as default type.
1851 11:28:34.560893 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1852 11:28:34.567107 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1853 11:28:34.573786 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1854 11:28:34.580266 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1855 11:28:34.587092 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1856 11:28:34.593438 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1857 11:28:34.596731 MTRR: Fixed MSR 0x250 0x0606060606060606
1858 11:28:34.603722 MTRR: Fixed MSR 0x258 0x0606060606060606
1859 11:28:34.606936 MTRR: Fixed MSR 0x259 0x0000000000000000
1860 11:28:34.610127 MTRR: Fixed MSR 0x268 0x0606060606060606
1861 11:28:34.613413 MTRR: Fixed MSR 0x269 0x0606060606060606
1862 11:28:34.619894 MTRR: Fixed MSR 0x26a 0x0606060606060606
1863 11:28:34.623705 MTRR: Fixed MSR 0x26b 0x0606060606060606
1864 11:28:34.626929 MTRR: Fixed MSR 0x26c 0x0606060606060606
1865 11:28:34.630269 MTRR: Fixed MSR 0x26d 0x0606060606060606
1866 11:28:34.633563 MTRR: Fixed MSR 0x26e 0x0606060606060606
1867 11:28:34.639994 MTRR: Fixed MSR 0x26f 0x0606060606060606
1868 11:28:34.640103
1869 11:28:34.640198 MTRR check
1870 11:28:34.643325 Fixed MTRRs : Enabled
1871 11:28:34.646451 Variable MTRRs: Enabled
1872 11:28:34.646537
1873 11:28:34.646602 call enable_fixed_mtrr()
1874 11:28:34.653430 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 3
1875 11:28:34.656561 CPU physical address size: 39 bits
1876 11:28:34.663442 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1877 11:28:34.666389 MTRR: Fixed MSR 0x250 0x0606060606060606
1878 11:28:34.670095 MTRR: Fixed MSR 0x258 0x0606060606060606
1879 11:28:34.673356 MTRR: Fixed MSR 0x259 0x0000000000000000
1880 11:28:34.679439 MTRR: Fixed MSR 0x268 0x0606060606060606
1881 11:28:34.683131 MTRR: Fixed MSR 0x269 0x0606060606060606
1882 11:28:34.686297 MTRR: Fixed MSR 0x26a 0x0606060606060606
1883 11:28:34.689419 MTRR: Fixed MSR 0x26b 0x0606060606060606
1884 11:28:34.696069 MTRR: Fixed MSR 0x26c 0x0606060606060606
1885 11:28:34.699605 MTRR: Fixed MSR 0x26d 0x0606060606060606
1886 11:28:34.702834 MTRR: Fixed MSR 0x26e 0x0606060606060606
1887 11:28:34.706025 MTRR: Fixed MSR 0x26f 0x0606060606060606
1888 11:28:34.712570 MTRR: Fixed MSR 0x250 0x0606060606060606
1889 11:28:34.715867 call enable_fixed_mtrr()
1890 11:28:34.719150 MTRR: Fixed MSR 0x258 0x0606060606060606
1891 11:28:34.722328 MTRR: Fixed MSR 0x259 0x0000000000000000
1892 11:28:34.726134 MTRR: Fixed MSR 0x268 0x0606060606060606
1893 11:28:34.729228 MTRR: Fixed MSR 0x269 0x0606060606060606
1894 11:28:34.735748 MTRR: Fixed MSR 0x26a 0x0606060606060606
1895 11:28:34.739056 MTRR: Fixed MSR 0x26b 0x0606060606060606
1896 11:28:34.742258 MTRR: Fixed MSR 0x26c 0x0606060606060606
1897 11:28:34.745609 MTRR: Fixed MSR 0x26d 0x0606060606060606
1898 11:28:34.752078 MTRR: Fixed MSR 0x26e 0x0606060606060606
1899 11:28:34.755407 MTRR: Fixed MSR 0x26f 0x0606060606060606
1900 11:28:34.758727 CPU physical address size: 39 bits
1901 11:28:34.762488 call enable_fixed_mtrr()
1902 11:28:34.765525 MTRR: Fixed MSR 0x250 0x0606060606060606
1903 11:28:34.768598 MTRR: Fixed MSR 0x250 0x0606060606060606
1904 11:28:34.775340 MTRR: Fixed MSR 0x258 0x0606060606060606
1905 11:28:34.779051 MTRR: Fixed MSR 0x259 0x0000000000000000
1906 11:28:34.782178 MTRR: Fixed MSR 0x268 0x0606060606060606
1907 11:28:34.785273 MTRR: Fixed MSR 0x269 0x0606060606060606
1908 11:28:34.791904 MTRR: Fixed MSR 0x26a 0x0606060606060606
1909 11:28:34.795609 MTRR: Fixed MSR 0x26b 0x0606060606060606
1910 11:28:34.798785 MTRR: Fixed MSR 0x26c 0x0606060606060606
1911 11:28:34.801699 MTRR: Fixed MSR 0x26d 0x0606060606060606
1912 11:28:34.805375 MTRR: Fixed MSR 0x26e 0x0606060606060606
1913 11:28:34.811950 MTRR: Fixed MSR 0x26f 0x0606060606060606
1914 11:28:34.815141 MTRR: Fixed MSR 0x258 0x0606060606060606
1915 11:28:34.818426 MTRR: Fixed MSR 0x259 0x0000000000000000
1916 11:28:34.824866 MTRR: Fixed MSR 0x268 0x0606060606060606
1917 11:28:34.828147 MTRR: Fixed MSR 0x269 0x0606060606060606
1918 11:28:34.831331 MTRR: Fixed MSR 0x26a 0x0606060606060606
1919 11:28:34.835227 MTRR: Fixed MSR 0x26b 0x0606060606060606
1920 11:28:34.838520 MTRR: Fixed MSR 0x26c 0x0606060606060606
1921 11:28:34.845017 MTRR: Fixed MSR 0x26d 0x0606060606060606
1922 11:28:34.848265 MTRR: Fixed MSR 0x26e 0x0606060606060606
1923 11:28:34.851534 MTRR: Fixed MSR 0x26f 0x0606060606060606
1924 11:28:34.854710 call enable_fixed_mtrr()
1925 11:28:34.857987 call enable_fixed_mtrr()
1926 11:28:34.861353 CPU physical address size: 39 bits
1927 11:28:34.864486 CPU physical address size: 39 bits
1928 11:28:34.867891 MTRR: Fixed MSR 0x250 0x0606060606060606
1929 11:28:34.874592 MTRR: Fixed MSR 0x250 0x0606060606060606
1930 11:28:34.877718 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 11:28:34.880954 MTRR: Fixed MSR 0x259 0x0000000000000000
1932 11:28:34.884610 MTRR: Fixed MSR 0x268 0x0606060606060606
1933 11:28:34.887771 MTRR: Fixed MSR 0x269 0x0606060606060606
1934 11:28:34.894501 MTRR: Fixed MSR 0x26a 0x0606060606060606
1935 11:28:34.897661 MTRR: Fixed MSR 0x26b 0x0606060606060606
1936 11:28:34.900656 MTRR: Fixed MSR 0x26c 0x0606060606060606
1937 11:28:34.904606 MTRR: Fixed MSR 0x26d 0x0606060606060606
1938 11:28:34.910891 MTRR: Fixed MSR 0x26e 0x0606060606060606
1939 11:28:34.914737 MTRR: Fixed MSR 0x26f 0x0606060606060606
1940 11:28:34.917642 MTRR: Fixed MSR 0x258 0x0606060606060606
1941 11:28:34.920621 MTRR: Fixed MSR 0x259 0x0000000000000000
1942 11:28:34.927197 MTRR: Fixed MSR 0x268 0x0606060606060606
1943 11:28:34.931177 MTRR: Fixed MSR 0x269 0x0606060606060606
1944 11:28:34.934406 MTRR: Fixed MSR 0x26a 0x0606060606060606
1945 11:28:34.937537 MTRR: Fixed MSR 0x26b 0x0606060606060606
1946 11:28:34.943916 MTRR: Fixed MSR 0x26c 0x0606060606060606
1947 11:28:34.947041 MTRR: Fixed MSR 0x26d 0x0606060606060606
1948 11:28:34.950917 MTRR: Fixed MSR 0x26e 0x0606060606060606
1949 11:28:34.954204 MTRR: Fixed MSR 0x26f 0x0606060606060606
1950 11:28:34.957403 call enable_fixed_mtrr()
1951 11:28:34.960635 CBFS @ c08000 size 3f8000
1952 11:28:34.967277 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1953 11:28:34.970521 CBFS: Locating 'fallback/payload'
1954 11:28:34.973619 CPU physical address size: 39 bits
1955 11:28:34.973724 call enable_fixed_mtrr()
1956 11:28:34.980506 CBFS: Found @ offset 1c96c0 size 3f798
1957 11:28:34.984224 CPU physical address size: 39 bits
1958 11:28:34.987414 CPU physical address size: 39 bits
1959 11:28:34.990418 Checking segment from ROM address 0xffdd16f8
1960 11:28:34.997309 Checking segment from ROM address 0xffdd1714
1961 11:28:35.000496 Loading segment from ROM address 0xffdd16f8
1962 11:28:35.003498 code (compression=0)
1963 11:28:35.009986 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1964 11:28:35.020215 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1965 11:28:35.020299 it's not compressed!
1966 11:28:35.114164 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1967 11:28:35.120355 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1968 11:28:35.123917 Loading segment from ROM address 0xffdd1714
1969 11:28:35.127405 Entry Point 0x30000000
1970 11:28:35.130549 Loaded segments
1971 11:28:35.135990 Finalizing chipset.
1972 11:28:35.139268 Finalizing SMM.
1973 11:28:35.142550 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1974 11:28:35.145801 mp_park_aps done after 0 msecs.
1975 11:28:35.152723 Jumping to boot code at 30000000(99b62000)
1976 11:28:35.159247 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1977 11:28:35.159356
1978 11:28:35.159457
1979 11:28:35.159555
1980 11:28:35.162483 Starting depthcharge on Helios...
1981 11:28:35.162587
1982 11:28:35.163007 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
1983 11:28:35.163140 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
1984 11:28:35.163259 Setting prompt string to ['hatch:']
1985 11:28:35.163380 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
1986 11:28:35.172702 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1987 11:28:35.172852
1988 11:28:35.179236 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1989 11:28:35.179333
1990 11:28:35.185767 board_setup: Info: eMMC controller not present; skipping
1991 11:28:35.185847
1992 11:28:35.188922 New NVMe Controller 0x30053ac0 @ 00:1d:00
1993 11:28:35.189024
1994 11:28:35.195599 board_setup: Info: SDHCI controller not present; skipping
1995 11:28:35.195680
1996 11:28:35.202492 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1997 11:28:35.202577
1998 11:28:35.202663 Wipe memory regions:
1999 11:28:35.202741
2000 11:28:35.205577 [0x00000000001000, 0x000000000a0000)
2001 11:28:35.205663
2002 11:28:35.208621 [0x00000000100000, 0x00000030000000)
2003 11:28:35.275386
2004 11:28:35.278590 [0x00000030657430, 0x00000099a2c000)
2005 11:28:35.415628
2006 11:28:35.419158 [0x00000100000000, 0x0000045e800000)
2007 11:28:36.802605
2008 11:28:36.802771 R8152: Initializing
2009 11:28:36.802868
2010 11:28:36.805628 Version 9 (ocp_data = 6010)
2011 11:28:36.809940
2012 11:28:36.810027 R8152: Done initializing
2013 11:28:36.810095
2014 11:28:36.813142 Adding net device
2015 11:28:37.296258
2016 11:28:37.296429 R8152: Initializing
2017 11:28:37.296511
2018 11:28:37.299195 Version 6 (ocp_data = 5c30)
2019 11:28:37.299279
2020 11:28:37.302753 R8152: Done initializing
2021 11:28:37.302869
2022 11:28:37.305958 net_add_device: Attemp to include the same device
2023 11:28:37.309100
2024 11:28:37.316813 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2025 11:28:37.316958
2026 11:28:37.317022
2027 11:28:37.317080
2028 11:28:37.317360 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2030 11:28:37.417681 hatch: tftpboot 192.168.201.1 10657533/tftp-deploy-658iipsq/kernel/bzImage 10657533/tftp-deploy-658iipsq/kernel/cmdline 10657533/tftp-deploy-658iipsq/ramdisk/ramdisk.cpio.gz
2031 11:28:37.417853 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2032 11:28:37.417938 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2033 11:28:37.422387 tftpboot 192.168.201.1 10657533/tftp-deploy-658iipsq/kernel/bzIploy-658iipsq/kernel/cmdline 10657533/tftp-deploy-658iipsq/ramdisk/ramdisk.cpio.gz
2034 11:28:37.422479
2035 11:28:37.422544 Waiting for link
2036 11:28:37.623020
2037 11:28:37.623160 done.
2038 11:28:37.623229
2039 11:28:37.623295 MAC: 00:24:32:50:19:be
2040 11:28:37.623357
2041 11:28:37.626813 Sending DHCP discover... done.
2042 11:28:37.626931
2043 11:28:37.629833 Waiting for reply... done.
2044 11:28:37.629912
2045 11:28:37.633074 Sending DHCP request... done.
2046 11:28:37.633158
2047 11:28:37.636422 Waiting for reply... done.
2048 11:28:37.636503
2049 11:28:37.639562 My ip is 192.168.201.15
2050 11:28:37.639643
2051 11:28:37.643197 The DHCP server ip is 192.168.201.1
2052 11:28:37.643281
2053 11:28:37.646388 TFTP server IP predefined by user: 192.168.201.1
2054 11:28:37.646466
2055 11:28:37.653143 Bootfile predefined by user: 10657533/tftp-deploy-658iipsq/kernel/bzImage
2056 11:28:37.653224
2057 11:28:37.656189 Sending tftp read request... done.
2058 11:28:37.656269
2059 11:28:37.663277 Waiting for the transfer...
2060 11:28:37.663364
2061 11:28:38.172233 00000000 ################################################################
2062 11:28:38.172396
2063 11:28:38.680915 00080000 ################################################################
2064 11:28:38.681060
2065 11:28:39.191107 00100000 ################################################################
2066 11:28:39.191275
2067 11:28:39.714415 00180000 ################################################################
2068 11:28:39.714579
2069 11:28:40.229725 00200000 ################################################################
2070 11:28:40.229866
2071 11:28:40.742587 00280000 ################################################################
2072 11:28:40.742775
2073 11:28:41.260104 00300000 ################################################################
2074 11:28:41.260276
2075 11:28:41.773285 00380000 ################################################################
2076 11:28:41.773455
2077 11:28:42.290899 00400000 ################################################################
2078 11:28:42.291076
2079 11:28:42.805380 00480000 ################################################################
2080 11:28:42.805520
2081 11:28:43.307731 00500000 ################################################################
2082 11:28:43.307898
2083 11:28:43.811433 00580000 ################################################################
2084 11:28:43.811589
2085 11:28:44.314626 00600000 ################################################################
2086 11:28:44.314797
2087 11:28:44.819469 00680000 ################################################################
2088 11:28:44.819648
2089 11:28:45.323658 00700000 ################################################################
2090 11:28:45.323833
2091 11:28:45.827725 00780000 ################################################################
2092 11:28:45.827911
2093 11:28:46.326002 00800000 ################################################################
2094 11:28:46.326166
2095 11:28:46.827103 00880000 ################################################################
2096 11:28:46.827276
2097 11:28:47.343669 00900000 ################################################################
2098 11:28:47.343810
2099 11:28:47.856672 00980000 ################################################################
2100 11:28:47.856848
2101 11:28:48.221500 00a00000 ############################################### done.
2102 11:28:48.221653
2103 11:28:48.225271 The bootfile was 10863104 bytes long.
2104 11:28:48.225357
2105 11:28:48.228568 Sending tftp read request... done.
2106 11:28:48.228659
2107 11:28:48.231758 Waiting for the transfer...
2108 11:28:48.231875
2109 11:28:48.750813 00000000 ################################################################
2110 11:28:48.750964
2111 11:28:49.261992 00080000 ################################################################
2112 11:28:49.262142
2113 11:28:49.769580 00100000 ################################################################
2114 11:28:49.769725
2115 11:28:50.281816 00180000 ################################################################
2116 11:28:50.281952
2117 11:28:50.804928 00200000 ################################################################
2118 11:28:50.805090
2119 11:28:51.326700 00280000 ################################################################
2120 11:28:51.326861
2121 11:28:51.842448 00300000 ################################################################
2122 11:28:51.842613
2123 11:28:52.351812 00380000 ################################################################
2124 11:28:52.351964
2125 11:28:52.868500 00400000 ################################################################
2126 11:28:52.868643
2127 11:28:53.378603 00480000 ################################################################
2128 11:28:53.378778
2129 11:28:53.905704 00500000 ################################################################
2130 11:28:53.905854
2131 11:28:54.429078 00580000 ################################################################
2132 11:28:54.429211
2133 11:28:54.948232 00600000 ################################################################
2134 11:28:54.948396
2135 11:28:55.467598 00680000 ################################################################
2136 11:28:55.467770
2137 11:28:56.015797 00700000 ################################################################
2138 11:28:56.015959
2139 11:28:56.581480 00780000 ################################################################
2140 11:28:56.581618
2141 11:28:57.142490 00800000 ################################################################
2142 11:28:57.142628
2143 11:28:57.459118 00880000 ####################################### done.
2144 11:28:57.459256
2145 11:28:57.462373 Sending tftp read request... done.
2146 11:28:57.462456
2147 11:28:57.466338 Waiting for the transfer...
2148 11:28:57.466436
2149 11:28:57.466506 00000000 # done.
2150 11:28:57.466572
2151 11:28:57.475891 Command line loaded dynamically from TFTP file: 10657533/tftp-deploy-658iipsq/kernel/cmdline
2152 11:28:57.476010
2153 11:28:57.492311 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2154 11:28:57.492477
2155 11:28:57.498995 ec_init(0): CrosEC protocol v3 supported (256, 256)
2156 11:28:57.503714
2157 11:28:57.507607 Shutting down all USB controllers.
2158 11:28:57.507721
2159 11:28:57.507819 Removing current net device
2160 11:28:57.511441
2161 11:28:57.511549 Finalizing coreboot
2162 11:28:57.511644
2163 11:28:57.518095 Exiting depthcharge with code 4 at timestamp: 29740911
2164 11:28:57.518178
2165 11:28:57.518246
2166 11:28:57.518309 Starting kernel ...
2167 11:28:57.518370
2168 11:28:57.518436
2169 11:28:57.519096 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
2170 11:28:57.519198 start: 2.2.5 auto-login-action (timeout 00:04:20) [common]
2171 11:28:57.519281 Setting prompt string to ['Linux version [0-9]']
2172 11:28:57.519395 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2173 11:28:57.519503 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2175 11:33:17.519466 end: 2.2.5 auto-login-action (duration 00:04:20) [common]
2177 11:33:17.519775 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 260 seconds'
2179 11:33:17.520037 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2182 11:33:17.520469 end: 2 depthcharge-action (duration 00:05:00) [common]
2184 11:33:17.520821 Cleaning after the job
2185 11:33:17.520917 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10657533/tftp-deploy-658iipsq/ramdisk
2186 11:33:17.522199 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10657533/tftp-deploy-658iipsq/kernel
2187 11:33:17.523454 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10657533/tftp-deploy-658iipsq/modules
2188 11:33:17.524013 start: 5.1 power-off (timeout 00:00:30) [common]
2189 11:33:17.524176 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2190 11:33:17.600610 >> Command sent successfully.
2191 11:33:17.603184 Returned 0 in 0 seconds
2192 11:33:17.703581 end: 5.1 power-off (duration 00:00:00) [common]
2194 11:33:17.704028 start: 5.2 read-feedback (timeout 00:10:00) [common]
2195 11:33:17.704325 Listened to connection for namespace 'common' for up to 1s
2197 11:33:17.704790 Listened to connection for namespace 'common' for up to 1s
2198 11:33:18.704904 Finalising connection for namespace 'common'
2199 11:33:18.705115 Disconnecting from shell: Finalise
2200 11:33:18.705253
2201 11:33:18.805615 end: 5.2 read-feedback (duration 00:00:01) [common]
2202 11:33:18.805800 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10657533
2203 11:33:18.823949 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10657533
2204 11:33:18.824164 JobError: Your job cannot terminate cleanly.