Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
1 11:28:04.532211 lava-dispatcher, installed at version: 2023.05.1
2 11:28:04.532419 start: 0 validate
3 11:28:04.532547 Start time: 2023-06-09 11:28:04.532537+00:00 (UTC)
4 11:28:04.532694 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:28:04.532821 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230527.0%2Fx86%2Frootfs.cpio.gz exists
6 11:28:04.794193 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:28:04.794962 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.283-cip98-224-g5f5303d7920a9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:28:05.063554 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:28:05.064290 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.283-cip98-224-g5f5303d7920a9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 11:28:05.340107 validate duration: 0.81
12 11:28:05.341913 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 11:28:05.342627 start: 1.1 download-retry (timeout 00:10:00) [common]
14 11:28:05.343446 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 11:28:05.344302 Not decompressing ramdisk as can be used compressed.
16 11:28:05.344900 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230527.0/x86/rootfs.cpio.gz
17 11:28:05.345388 saving as /var/lib/lava/dispatcher/tmp/10657549/tftp-deploy-d7r2sadd/ramdisk/rootfs.cpio.gz
18 11:28:05.345786 total size: 8430069 (8MB)
19 11:28:05.350818 progress 0% (0MB)
20 11:28:05.362279 progress 5% (0MB)
21 11:28:05.368972 progress 10% (0MB)
22 11:28:05.374113 progress 15% (1MB)
23 11:28:05.378726 progress 20% (1MB)
24 11:28:05.382555 progress 25% (2MB)
25 11:28:05.385950 progress 30% (2MB)
26 11:28:05.389162 progress 35% (2MB)
27 11:28:05.391890 progress 40% (3MB)
28 11:28:05.394847 progress 45% (3MB)
29 11:28:05.397347 progress 50% (4MB)
30 11:28:05.399863 progress 55% (4MB)
31 11:28:05.402090 progress 60% (4MB)
32 11:28:05.404297 progress 65% (5MB)
33 11:28:05.406701 progress 70% (5MB)
34 11:28:05.408909 progress 75% (6MB)
35 11:28:05.411608 progress 80% (6MB)
36 11:28:05.413947 progress 85% (6MB)
37 11:28:05.416151 progress 90% (7MB)
38 11:28:05.418357 progress 95% (7MB)
39 11:28:05.420529 progress 100% (8MB)
40 11:28:05.420669 8MB downloaded in 0.07s (107.36MB/s)
41 11:28:05.420821 end: 1.1.1 http-download (duration 00:00:00) [common]
43 11:28:05.421085 end: 1.1 download-retry (duration 00:00:00) [common]
44 11:28:05.421190 start: 1.2 download-retry (timeout 00:10:00) [common]
45 11:28:05.421284 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 11:28:05.421429 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.283-cip98-224-g5f5303d7920a9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 11:28:05.421565 saving as /var/lib/lava/dispatcher/tmp/10657549/tftp-deploy-d7r2sadd/kernel/bzImage
48 11:28:05.421630 total size: 10863104 (10MB)
49 11:28:05.421691 No compression specified
50 11:28:05.422893 progress 0% (0MB)
51 11:28:05.425921 progress 5% (0MB)
52 11:28:05.429099 progress 10% (1MB)
53 11:28:05.432021 progress 15% (1MB)
54 11:28:05.434913 progress 20% (2MB)
55 11:28:05.437653 progress 25% (2MB)
56 11:28:05.440866 progress 30% (3MB)
57 11:28:05.444031 progress 35% (3MB)
58 11:28:05.446876 progress 40% (4MB)
59 11:28:05.449830 progress 45% (4MB)
60 11:28:05.452530 progress 50% (5MB)
61 11:28:05.455462 progress 55% (5MB)
62 11:28:05.458336 progress 60% (6MB)
63 11:28:05.461327 progress 65% (6MB)
64 11:28:05.464237 progress 70% (7MB)
65 11:28:05.466997 progress 75% (7MB)
66 11:28:05.469873 progress 80% (8MB)
67 11:28:05.472662 progress 85% (8MB)
68 11:28:05.475710 progress 90% (9MB)
69 11:28:05.478563 progress 95% (9MB)
70 11:28:05.481485 progress 100% (10MB)
71 11:28:05.481708 10MB downloaded in 0.06s (172.45MB/s)
72 11:28:05.481854 end: 1.2.1 http-download (duration 00:00:00) [common]
74 11:28:05.482081 end: 1.2 download-retry (duration 00:00:00) [common]
75 11:28:05.482173 start: 1.3 download-retry (timeout 00:10:00) [common]
76 11:28:05.482286 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 11:28:05.482431 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.283-cip98-224-g5f5303d7920a9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 11:28:05.482503 saving as /var/lib/lava/dispatcher/tmp/10657549/tftp-deploy-d7r2sadd/modules/modules.tar
79 11:28:05.482564 total size: 484428 (0MB)
80 11:28:05.482624 Using unxz to decompress xz
81 11:28:05.486425 progress 6% (0MB)
82 11:28:05.486819 progress 13% (0MB)
83 11:28:05.487055 progress 20% (0MB)
84 11:28:05.488505 progress 27% (0MB)
85 11:28:05.490778 progress 33% (0MB)
86 11:28:05.493102 progress 40% (0MB)
87 11:28:05.495536 progress 47% (0MB)
88 11:28:05.497658 progress 54% (0MB)
89 11:28:05.499371 progress 60% (0MB)
90 11:28:05.501315 progress 67% (0MB)
91 11:28:05.503415 progress 74% (0MB)
92 11:28:05.505445 progress 81% (0MB)
93 11:28:05.507394 progress 87% (0MB)
94 11:28:05.509511 progress 94% (0MB)
95 11:28:05.511559 progress 100% (0MB)
96 11:28:05.517759 0MB downloaded in 0.04s (13.13MB/s)
97 11:28:05.518058 end: 1.3.1 http-download (duration 00:00:00) [common]
99 11:28:05.518324 end: 1.3 download-retry (duration 00:00:00) [common]
100 11:28:05.518417 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
101 11:28:05.518511 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
102 11:28:05.518592 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 11:28:05.518677 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
104 11:28:05.518889 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10657549/lava-overlay-1n00e5p_
105 11:28:05.519025 makedir: /var/lib/lava/dispatcher/tmp/10657549/lava-overlay-1n00e5p_/lava-10657549/bin
106 11:28:05.519147 makedir: /var/lib/lava/dispatcher/tmp/10657549/lava-overlay-1n00e5p_/lava-10657549/tests
107 11:28:05.519266 makedir: /var/lib/lava/dispatcher/tmp/10657549/lava-overlay-1n00e5p_/lava-10657549/results
108 11:28:05.519380 Creating /var/lib/lava/dispatcher/tmp/10657549/lava-overlay-1n00e5p_/lava-10657549/bin/lava-add-keys
109 11:28:05.519527 Creating /var/lib/lava/dispatcher/tmp/10657549/lava-overlay-1n00e5p_/lava-10657549/bin/lava-add-sources
110 11:28:05.519652 Creating /var/lib/lava/dispatcher/tmp/10657549/lava-overlay-1n00e5p_/lava-10657549/bin/lava-background-process-start
111 11:28:05.519781 Creating /var/lib/lava/dispatcher/tmp/10657549/lava-overlay-1n00e5p_/lava-10657549/bin/lava-background-process-stop
112 11:28:05.519902 Creating /var/lib/lava/dispatcher/tmp/10657549/lava-overlay-1n00e5p_/lava-10657549/bin/lava-common-functions
113 11:28:05.520022 Creating /var/lib/lava/dispatcher/tmp/10657549/lava-overlay-1n00e5p_/lava-10657549/bin/lava-echo-ipv4
114 11:28:05.520142 Creating /var/lib/lava/dispatcher/tmp/10657549/lava-overlay-1n00e5p_/lava-10657549/bin/lava-install-packages
115 11:28:05.520261 Creating /var/lib/lava/dispatcher/tmp/10657549/lava-overlay-1n00e5p_/lava-10657549/bin/lava-installed-packages
116 11:28:05.520378 Creating /var/lib/lava/dispatcher/tmp/10657549/lava-overlay-1n00e5p_/lava-10657549/bin/lava-os-build
117 11:28:05.520496 Creating /var/lib/lava/dispatcher/tmp/10657549/lava-overlay-1n00e5p_/lava-10657549/bin/lava-probe-channel
118 11:28:05.520617 Creating /var/lib/lava/dispatcher/tmp/10657549/lava-overlay-1n00e5p_/lava-10657549/bin/lava-probe-ip
119 11:28:05.520734 Creating /var/lib/lava/dispatcher/tmp/10657549/lava-overlay-1n00e5p_/lava-10657549/bin/lava-target-ip
120 11:28:05.520850 Creating /var/lib/lava/dispatcher/tmp/10657549/lava-overlay-1n00e5p_/lava-10657549/bin/lava-target-mac
121 11:28:05.520965 Creating /var/lib/lava/dispatcher/tmp/10657549/lava-overlay-1n00e5p_/lava-10657549/bin/lava-target-storage
122 11:28:05.521085 Creating /var/lib/lava/dispatcher/tmp/10657549/lava-overlay-1n00e5p_/lava-10657549/bin/lava-test-case
123 11:28:05.521203 Creating /var/lib/lava/dispatcher/tmp/10657549/lava-overlay-1n00e5p_/lava-10657549/bin/lava-test-event
124 11:28:05.521319 Creating /var/lib/lava/dispatcher/tmp/10657549/lava-overlay-1n00e5p_/lava-10657549/bin/lava-test-feedback
125 11:28:05.521435 Creating /var/lib/lava/dispatcher/tmp/10657549/lava-overlay-1n00e5p_/lava-10657549/bin/lava-test-raise
126 11:28:05.521591 Creating /var/lib/lava/dispatcher/tmp/10657549/lava-overlay-1n00e5p_/lava-10657549/bin/lava-test-reference
127 11:28:05.521720 Creating /var/lib/lava/dispatcher/tmp/10657549/lava-overlay-1n00e5p_/lava-10657549/bin/lava-test-runner
128 11:28:05.521839 Creating /var/lib/lava/dispatcher/tmp/10657549/lava-overlay-1n00e5p_/lava-10657549/bin/lava-test-set
129 11:28:05.521959 Creating /var/lib/lava/dispatcher/tmp/10657549/lava-overlay-1n00e5p_/lava-10657549/bin/lava-test-shell
130 11:28:05.522081 Updating /var/lib/lava/dispatcher/tmp/10657549/lava-overlay-1n00e5p_/lava-10657549/bin/lava-install-packages (oe)
131 11:28:05.522227 Updating /var/lib/lava/dispatcher/tmp/10657549/lava-overlay-1n00e5p_/lava-10657549/bin/lava-installed-packages (oe)
132 11:28:05.522343 Creating /var/lib/lava/dispatcher/tmp/10657549/lava-overlay-1n00e5p_/lava-10657549/environment
133 11:28:05.522443 LAVA metadata
134 11:28:05.522517 - LAVA_JOB_ID=10657549
135 11:28:05.522584 - LAVA_DISPATCHER_IP=192.168.201.1
136 11:28:05.522687 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
137 11:28:05.522757 skipped lava-vland-overlay
138 11:28:05.522833 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 11:28:05.522920 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
140 11:28:05.522983 skipped lava-multinode-overlay
141 11:28:05.523057 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 11:28:05.523137 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
143 11:28:05.523212 Loading test definitions
144 11:28:05.523303 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
145 11:28:05.523378 Using /lava-10657549 at stage 0
146 11:28:05.523672 uuid=10657549_1.4.2.3.1 testdef=None
147 11:28:05.523759 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 11:28:05.523843 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
149 11:28:05.524362 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 11:28:05.524588 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
152 11:28:05.525202 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 11:28:05.525434 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
155 11:28:05.526106 runner path: /var/lib/lava/dispatcher/tmp/10657549/lava-overlay-1n00e5p_/lava-10657549/0/tests/0_dmesg test_uuid 10657549_1.4.2.3.1
156 11:28:05.526257 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 11:28:05.526485 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
159 11:28:05.526557 Using /lava-10657549 at stage 1
160 11:28:05.526849 uuid=10657549_1.4.2.3.5 testdef=None
161 11:28:05.526937 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 11:28:05.527020 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
163 11:28:05.527472 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 11:28:05.527686 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
166 11:28:05.528306 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 11:28:05.528533 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
169 11:28:05.529132 runner path: /var/lib/lava/dispatcher/tmp/10657549/lava-overlay-1n00e5p_/lava-10657549/1/tests/1_bootrr test_uuid 10657549_1.4.2.3.5
170 11:28:05.529279 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 11:28:05.529482 Creating lava-test-runner.conf files
173 11:28:05.529620 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10657549/lava-overlay-1n00e5p_/lava-10657549/0 for stage 0
174 11:28:05.529708 - 0_dmesg
175 11:28:05.529786 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10657549/lava-overlay-1n00e5p_/lava-10657549/1 for stage 1
176 11:28:05.529873 - 1_bootrr
177 11:28:05.529965 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 11:28:05.530048 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
179 11:28:05.538367 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 11:28:05.538509 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
181 11:28:05.538604 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 11:28:05.538690 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 11:28:05.538777 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
184 11:28:05.778488 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 11:28:05.778876 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
186 11:28:05.779002 extracting modules file /var/lib/lava/dispatcher/tmp/10657549/tftp-deploy-d7r2sadd/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10657549/extract-overlay-ramdisk-7qtqwoqh/ramdisk
187 11:28:05.798796 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 11:28:05.798979 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
189 11:28:05.799074 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10657549/compress-overlay-150606xh/overlay-1.4.2.4.tar.gz to ramdisk
190 11:28:05.799149 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10657549/compress-overlay-150606xh/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10657549/extract-overlay-ramdisk-7qtqwoqh/ramdisk
191 11:28:05.807265 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 11:28:05.807385 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
193 11:28:05.807476 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 11:28:05.807565 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
195 11:28:05.807643 Building ramdisk /var/lib/lava/dispatcher/tmp/10657549/extract-overlay-ramdisk-7qtqwoqh/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10657549/extract-overlay-ramdisk-7qtqwoqh/ramdisk
196 11:28:05.933479 >> 53980 blocks
197 11:28:06.854925 rename /var/lib/lava/dispatcher/tmp/10657549/extract-overlay-ramdisk-7qtqwoqh/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10657549/tftp-deploy-d7r2sadd/ramdisk/ramdisk.cpio.gz
198 11:28:06.855359 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 11:28:06.855489 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 11:28:06.855591 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 11:28:06.855684 No mkimage arch provided, not using FIT.
202 11:28:06.855771 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 11:28:06.855855 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 11:28:06.855960 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 11:28:06.856050 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 11:28:06.856129 No LXC device requested
207 11:28:06.856209 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 11:28:06.856294 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 11:28:06.856378 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 11:28:06.856452 Checking files for TFTP limit of 4294967296 bytes.
211 11:28:06.856852 end: 1 tftp-deploy (duration 00:00:02) [common]
212 11:28:06.856962 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 11:28:06.857056 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 11:28:06.857184 substitutions:
215 11:28:06.857251 - {DTB}: None
216 11:28:06.857316 - {INITRD}: 10657549/tftp-deploy-d7r2sadd/ramdisk/ramdisk.cpio.gz
217 11:28:06.857375 - {KERNEL}: 10657549/tftp-deploy-d7r2sadd/kernel/bzImage
218 11:28:06.857433 - {LAVA_MAC}: None
219 11:28:06.857496 - {PRESEED_CONFIG}: None
220 11:28:06.857558 - {PRESEED_LOCAL}: None
221 11:28:06.857614 - {RAMDISK}: 10657549/tftp-deploy-d7r2sadd/ramdisk/ramdisk.cpio.gz
222 11:28:06.857670 - {ROOT_PART}: None
223 11:28:06.857725 - {ROOT}: None
224 11:28:06.857780 - {SERVER_IP}: 192.168.201.1
225 11:28:06.857834 - {TEE}: None
226 11:28:06.857888 Parsed boot commands:
227 11:28:06.857943 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 11:28:06.858114 Parsed boot commands: tftpboot 192.168.201.1 10657549/tftp-deploy-d7r2sadd/kernel/bzImage 10657549/tftp-deploy-d7r2sadd/kernel/cmdline 10657549/tftp-deploy-d7r2sadd/ramdisk/ramdisk.cpio.gz
229 11:28:06.858211 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 11:28:06.858301 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 11:28:06.858394 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 11:28:06.858479 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 11:28:06.858551 Not connected, no need to disconnect.
234 11:28:06.858629 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 11:28:06.858713 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 11:28:06.858780 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-12'
237 11:28:06.862174 Setting prompt string to ['lava-test: # ']
238 11:28:06.862515 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 11:28:06.862620 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 11:28:06.862724 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 11:28:06.862813 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 11:28:06.863005 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-12' '--port=1' '--command=reboot'
243 11:28:12.000887 >> Command sent successfully.
244 11:28:12.003436 Returned 0 in 5 seconds
245 11:28:12.103785 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 11:28:12.104265 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 11:28:12.104429 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 11:28:12.104558 Setting prompt string to 'Starting depthcharge on Voema...'
250 11:28:12.104656 Changing prompt to 'Starting depthcharge on Voema...'
251 11:28:12.104802 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
252 11:28:12.105246 [Enter `^Ec?' for help]
253 11:28:13.699280
254 11:28:13.699444
255 11:28:13.709199 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
256 11:28:13.715822 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
257 11:28:13.719141 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
258 11:28:13.722817 CPU: AES supported, TXT NOT supported, VT supported
259 11:28:13.729152 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
260 11:28:13.732740 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
261 11:28:13.739484 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
262 11:28:13.742622 VBOOT: Loading verstage.
263 11:28:13.746080 FMAP: Found "FLASH" version 1.1 at 0x1804000.
264 11:28:13.752620 FMAP: base = 0x0 size = 0x2000000 #areas = 32
265 11:28:13.756152 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
266 11:28:13.766161 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
267 11:28:13.772590 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
268 11:28:13.772690
269 11:28:13.772755
270 11:28:13.782913 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
271 11:28:13.799900 Probing TPM: . done!
272 11:28:13.802969 TPM ready after 0 ms
273 11:28:13.806251 Connected to device vid:did:rid of 1ae0:0028:00
274 11:28:13.817695 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
275 11:28:13.824009 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
276 11:28:13.827213 Initialized TPM device CR50 revision 0
277 11:28:13.885015 tlcl_send_startup: Startup return code is 0
278 11:28:13.885168 TPM: setup succeeded
279 11:28:13.900406 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
280 11:28:13.914531 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
281 11:28:13.927904 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
282 11:28:13.937067 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
283 11:28:13.941233 Chrome EC: UHEPI supported
284 11:28:13.944141 Phase 1
285 11:28:13.947262 FMAP: area GBB found @ 1805000 (458752 bytes)
286 11:28:13.957286 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
287 11:28:13.963941 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
288 11:28:13.970695 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
289 11:28:13.977104 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
290 11:28:13.980594 Recovery requested (1009000e)
291 11:28:13.990000 TPM: Extending digest for VBOOT: boot mode into PCR 0
292 11:28:13.996334 tlcl_extend: response is 0
293 11:28:14.002254 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
294 11:28:14.012370 tlcl_extend: response is 0
295 11:28:14.018636 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
296 11:28:14.025246 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
297 11:28:14.031954 BS: verstage times (exec / console): total (unknown) / 142 ms
298 11:28:14.032091
299 11:28:14.032187
300 11:28:14.045176 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
301 11:28:14.051688 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
302 11:28:14.055283 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
303 11:28:14.058755 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
304 11:28:14.065113 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
305 11:28:14.068682 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
306 11:28:14.071858 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
307 11:28:14.075066 TCO_STS: 0000 0000
308 11:28:14.078335 GEN_PMCON: d0015038 00002200
309 11:28:14.081423 GBLRST_CAUSE: 00000000 00000000
310 11:28:14.084781 HPR_CAUSE0: 00000000
311 11:28:14.084877 prev_sleep_state 5
312 11:28:14.087948 Boot Count incremented to 18666
313 11:28:14.095232 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
314 11:28:14.101703 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
315 11:28:14.111344 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
316 11:28:14.117780 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
317 11:28:14.121407 Chrome EC: UHEPI supported
318 11:28:14.127673 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
319 11:28:14.139212 Probing TPM: done!
320 11:28:14.145739 Connected to device vid:did:rid of 1ae0:0028:00
321 11:28:14.155841 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
322 11:28:14.159152 Initialized TPM device CR50 revision 0
323 11:28:14.173807 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
324 11:28:14.180673 MRC: Hash idx 0x100b comparison successful.
325 11:28:14.183815 MRC cache found, size faa8
326 11:28:14.183959 bootmode is set to: 2
327 11:28:14.187653 SPD index = 2
328 11:28:14.193934 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
329 11:28:14.196899 SPD: module type is LPDDR4X
330 11:28:14.200626 SPD: module part number is MT53D1G64D4NW-046
331 11:28:14.206832 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
332 11:28:14.210372 SPD: device width 16 bits, bus width 16 bits
333 11:28:14.216696 SPD: module size is 2048 MB (per channel)
334 11:28:14.647732 CBMEM:
335 11:28:14.650844 IMD: root @ 0x76fff000 254 entries.
336 11:28:14.654381 IMD: root @ 0x76ffec00 62 entries.
337 11:28:14.657389 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
338 11:28:14.664244 FMAP: area RW_VPD found @ f35000 (8192 bytes)
339 11:28:14.667079 External stage cache:
340 11:28:14.670765 IMD: root @ 0x7b3ff000 254 entries.
341 11:28:14.673886 IMD: root @ 0x7b3fec00 62 entries.
342 11:28:14.688809 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
343 11:28:14.695612 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
344 11:28:14.702055 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
345 11:28:14.715532 MRC: 'RECOVERY_MRC_CACHE' does not need update.
346 11:28:14.722028 cse_lite: Skip switching to RW in the recovery path
347 11:28:14.722141 8 DIMMs found
348 11:28:14.725651 SMM Memory Map
349 11:28:14.728879 SMRAM : 0x7b000000 0x800000
350 11:28:14.732496 Subregion 0: 0x7b000000 0x200000
351 11:28:14.735412 Subregion 1: 0x7b200000 0x200000
352 11:28:14.738862 Subregion 2: 0x7b400000 0x400000
353 11:28:14.738947 top_of_ram = 0x77000000
354 11:28:14.745294 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
355 11:28:14.752133 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
356 11:28:14.755219 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
357 11:28:14.761692 MTRR Range: Start=ff000000 End=0 (Size 1000000)
358 11:28:14.768544 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
359 11:28:14.775185 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
360 11:28:14.785110 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
361 11:28:14.791823 Processing 211 relocs. Offset value of 0x74c0b000
362 11:28:14.798463 BS: romstage times (exec / console): total (unknown) / 277 ms
363 11:28:14.804516
364 11:28:14.804658
365 11:28:14.812285 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
366 11:28:14.818649 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
367 11:28:14.824929 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
368 11:28:14.834995 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
369 11:28:14.841526 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
370 11:28:14.848676 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
371 11:28:14.891156 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
372 11:28:14.897533 Processing 5008 relocs. Offset value of 0x75d98000
373 11:28:14.900785 BS: postcar times (exec / console): total (unknown) / 59 ms
374 11:28:14.903794
375 11:28:14.903959
376 11:28:14.913812 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
377 11:28:14.913971 Normal boot
378 11:28:14.917230 FW_CONFIG value is 0x804c02
379 11:28:14.920295 PCI: 00:07.0 disabled by fw_config
380 11:28:14.923858 PCI: 00:07.1 disabled by fw_config
381 11:28:14.930625 PCI: 00:0d.2 disabled by fw_config
382 11:28:14.933905 PCI: 00:1c.7 disabled by fw_config
383 11:28:14.936877 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
384 11:28:14.943779 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
385 11:28:14.950467 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
386 11:28:14.953680 GENERIC: 0.0 disabled by fw_config
387 11:28:14.956883 GENERIC: 1.0 disabled by fw_config
388 11:28:14.960430 fw_config match found: DB_USB=USB3_ACTIVE
389 11:28:14.963541 fw_config match found: DB_USB=USB3_ACTIVE
390 11:28:14.966975 fw_config match found: DB_USB=USB3_ACTIVE
391 11:28:14.974012 fw_config match found: DB_USB=USB3_ACTIVE
392 11:28:14.976551 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
393 11:28:14.986654 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
394 11:28:14.993211 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
395 11:28:15.000274 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
396 11:28:15.006573 microcode: sig=0x806c1 pf=0x80 revision=0x86
397 11:28:15.010003 microcode: Update skipped, already up-to-date
398 11:28:15.016308 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
399 11:28:15.044845 Detected 4 core, 8 thread CPU.
400 11:28:15.048115 Setting up SMI for CPU
401 11:28:15.051328 IED base = 0x7b400000
402 11:28:15.051471 IED size = 0x00400000
403 11:28:15.054526 Will perform SMM setup.
404 11:28:15.060972 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
405 11:28:15.067809 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
406 11:28:15.073951 Processing 16 relocs. Offset value of 0x00030000
407 11:28:15.077626 Attempting to start 7 APs
408 11:28:15.080858 Waiting for 10ms after sending INIT.
409 11:28:15.096670 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
410 11:28:15.099927 AP: slot 3 apic_id 7.
411 11:28:15.103251 AP: slot 7 apic_id 6.
412 11:28:15.103412 AP: slot 2 apic_id 3.
413 11:28:15.106313 AP: slot 6 apic_id 2.
414 11:28:15.109464 AP: slot 4 apic_id 5.
415 11:28:15.109614 AP: slot 5 apic_id 4.
416 11:28:15.109747 done.
417 11:28:15.116379 Waiting for 2nd SIPI to complete...done.
418 11:28:15.122859 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
419 11:28:15.129617 Processing 13 relocs. Offset value of 0x00038000
420 11:28:15.132905 Unable to locate Global NVS
421 11:28:15.139298 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
422 11:28:15.142751 Installing permanent SMM handler to 0x7b000000
423 11:28:15.152547 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
424 11:28:15.155860 Processing 794 relocs. Offset value of 0x7b010000
425 11:28:15.165791 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
426 11:28:15.169645 Processing 13 relocs. Offset value of 0x7b008000
427 11:28:15.175807 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
428 11:28:15.182435 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
429 11:28:15.185939 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
430 11:28:15.192839 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
431 11:28:15.199068 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
432 11:28:15.205997 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
433 11:28:15.212454 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
434 11:28:15.215906 Unable to locate Global NVS
435 11:28:15.222118 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
436 11:28:15.225531 Clearing SMI status registers
437 11:28:15.225699 SMI_STS: PM1
438 11:28:15.228851 PM1_STS: PWRBTN
439 11:28:15.235739 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
440 11:28:15.238892 In relocation handler: CPU 0
441 11:28:15.241950 New SMBASE=0x7b000000 IEDBASE=0x7b400000
442 11:28:15.248711 Writing SMRR. base = 0x7b000006, mask=0xff800c00
443 11:28:15.251596 Relocation complete.
444 11:28:15.258469 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
445 11:28:15.261813 In relocation handler: CPU 1
446 11:28:15.265000 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
447 11:28:15.268280 Relocation complete.
448 11:28:15.274893 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
449 11:28:15.278777 In relocation handler: CPU 3
450 11:28:15.281673 New SMBASE=0x7afff400 IEDBASE=0x7b400000
451 11:28:15.281784 Relocation complete.
452 11:28:15.291438 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
453 11:28:15.294951 In relocation handler: CPU 5
454 11:28:15.298036 New SMBASE=0x7affec00 IEDBASE=0x7b400000
455 11:28:15.301719 Writing SMRR. base = 0x7b000006, mask=0xff800c00
456 11:28:15.304647 Relocation complete.
457 11:28:15.311603 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
458 11:28:15.314674 In relocation handler: CPU 7
459 11:28:15.318067 New SMBASE=0x7affe400 IEDBASE=0x7b400000
460 11:28:15.324774 Writing SMRR. base = 0x7b000006, mask=0xff800c00
461 11:28:15.324861 Relocation complete.
462 11:28:15.334741 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
463 11:28:15.334841 In relocation handler: CPU 2
464 11:28:15.341004 New SMBASE=0x7afff800 IEDBASE=0x7b400000
465 11:28:15.341089 Relocation complete.
466 11:28:15.350789 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
467 11:28:15.350874 In relocation handler: CPU 6
468 11:28:15.357635 New SMBASE=0x7affe800 IEDBASE=0x7b400000
469 11:28:15.361293 Writing SMRR. base = 0x7b000006, mask=0xff800c00
470 11:28:15.364429 Relocation complete.
471 11:28:15.370733 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
472 11:28:15.373947 In relocation handler: CPU 4
473 11:28:15.377235 New SMBASE=0x7afff000 IEDBASE=0x7b400000
474 11:28:15.380644 Relocation complete.
475 11:28:15.380726 Initializing CPU #0
476 11:28:15.384240 CPU: vendor Intel device 806c1
477 11:28:15.390961 CPU: family 06, model 8c, stepping 01
478 11:28:15.391046 Clearing out pending MCEs
479 11:28:15.393897 Setting up local APIC...
480 11:28:15.398338 apic_id: 0x00 done.
481 11:28:15.401097 Turbo is available but hidden
482 11:28:15.404132 Turbo is available and visible
483 11:28:15.407180 microcode: Update skipped, already up-to-date
484 11:28:15.410613 CPU #0 initialized
485 11:28:15.410697 Initializing CPU #2
486 11:28:15.413784 Initializing CPU #7
487 11:28:15.417206 Initializing CPU #3
488 11:28:15.420489 CPU: vendor Intel device 806c1
489 11:28:15.423974 CPU: family 06, model 8c, stepping 01
490 11:28:15.427298 CPU: vendor Intel device 806c1
491 11:28:15.430556 CPU: family 06, model 8c, stepping 01
492 11:28:15.433947 Clearing out pending MCEs
493 11:28:15.434030 Clearing out pending MCEs
494 11:28:15.437826 Setting up local APIC...
495 11:28:15.440359 Initializing CPU #4
496 11:28:15.440441 Initializing CPU #5
497 11:28:15.443798 CPU: vendor Intel device 806c1
498 11:28:15.450417 CPU: family 06, model 8c, stepping 01
499 11:28:15.450501 CPU: vendor Intel device 806c1
500 11:28:15.456994 CPU: family 06, model 8c, stepping 01
501 11:28:15.457078 Clearing out pending MCEs
502 11:28:15.460047 Clearing out pending MCEs
503 11:28:15.463534 Setting up local APIC...
504 11:28:15.467078 apic_id: 0x06 done.
505 11:28:15.467161 Setting up local APIC...
506 11:28:15.470628 Initializing CPU #1
507 11:28:15.474053 CPU: vendor Intel device 806c1
508 11:28:15.477885 CPU: family 06, model 8c, stepping 01
509 11:28:15.480964 CPU: vendor Intel device 806c1
510 11:28:15.484448 CPU: family 06, model 8c, stepping 01
511 11:28:15.484532 Initializing CPU #6
512 11:28:15.487687 Clearing out pending MCEs
513 11:28:15.491554 apic_id: 0x05 done.
514 11:28:15.494076 Setting up local APIC...
515 11:28:15.497474 microcode: Update skipped, already up-to-date
516 11:28:15.500895 apic_id: 0x07 done.
517 11:28:15.500978 CPU #7 initialized
518 11:28:15.503969 CPU: vendor Intel device 806c1
519 11:28:15.507451 CPU: family 06, model 8c, stepping 01
520 11:28:15.510822 Setting up local APIC...
521 11:28:15.517777 microcode: Update skipped, already up-to-date
522 11:28:15.517861 apic_id: 0x04 done.
523 11:28:15.520388 CPU #4 initialized
524 11:28:15.524029 microcode: Update skipped, already up-to-date
525 11:28:15.527087 Clearing out pending MCEs
526 11:28:15.530548 apic_id: 0x03 done.
527 11:28:15.530631 Setting up local APIC...
528 11:28:15.537439 microcode: Update skipped, already up-to-date
529 11:28:15.540394 apic_id: 0x02 done.
530 11:28:15.543753 microcode: Update skipped, already up-to-date
531 11:28:15.547404 microcode: Update skipped, already up-to-date
532 11:28:15.550619 CPU #2 initialized
533 11:28:15.550702 CPU #6 initialized
534 11:28:15.553558 CPU #3 initialized
535 11:28:15.557163 CPU #5 initialized
536 11:28:15.557246 Clearing out pending MCEs
537 11:28:15.560510 Setting up local APIC...
538 11:28:15.563538 apic_id: 0x01 done.
539 11:28:15.567017 microcode: Update skipped, already up-to-date
540 11:28:15.569981 CPU #1 initialized
541 11:28:15.573306 bsp_do_flight_plan done after 454 msecs.
542 11:28:15.576828 CPU: frequency set to 4400 MHz
543 11:28:15.579737 Enabling SMIs.
544 11:28:15.586303 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
545 11:28:15.601130 SATAXPCIE1 indicates PCIe NVMe is present
546 11:28:15.604880 Probing TPM: done!
547 11:28:15.608093 Connected to device vid:did:rid of 1ae0:0028:00
548 11:28:15.618862 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
549 11:28:15.621743 Initialized TPM device CR50 revision 0
550 11:28:15.624999 Enabling S0i3.4
551 11:28:15.632351 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
552 11:28:15.635316 Found a VBT of 8704 bytes after decompression
553 11:28:15.642038 cse_lite: CSE RO boot. HybridStorageMode disabled
554 11:28:15.648244 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
555 11:28:15.723631 FSPS returned 0
556 11:28:15.726637 Executing Phase 1 of FspMultiPhaseSiInit
557 11:28:15.736651 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
558 11:28:15.739904 port C0 DISC req: usage 1 usb3 1 usb2 5
559 11:28:15.744081 Raw Buffer output 0 00000511
560 11:28:15.746934 Raw Buffer output 1 00000000
561 11:28:15.750297 pmc_send_ipc_cmd succeeded
562 11:28:15.756861 port C1 DISC req: usage 1 usb3 2 usb2 3
563 11:28:15.756945 Raw Buffer output 0 00000321
564 11:28:15.760211 Raw Buffer output 1 00000000
565 11:28:15.765034 pmc_send_ipc_cmd succeeded
566 11:28:15.769601 Detected 4 core, 8 thread CPU.
567 11:28:15.772686 Detected 4 core, 8 thread CPU.
568 11:28:15.973910 Display FSP Version Info HOB
569 11:28:15.977094 Reference Code - CPU = a.0.4c.31
570 11:28:15.980522 uCode Version = 0.0.0.86
571 11:28:15.983607 TXT ACM version = ff.ff.ff.ffff
572 11:28:15.987209 Reference Code - ME = a.0.4c.31
573 11:28:15.990271 MEBx version = 0.0.0.0
574 11:28:15.993435 ME Firmware Version = Consumer SKU
575 11:28:15.997107 Reference Code - PCH = a.0.4c.31
576 11:28:16.000244 PCH-CRID Status = Disabled
577 11:28:16.003470 PCH-CRID Original Value = ff.ff.ff.ffff
578 11:28:16.006900 PCH-CRID New Value = ff.ff.ff.ffff
579 11:28:16.009986 OPROM - RST - RAID = ff.ff.ff.ffff
580 11:28:16.013469 PCH Hsio Version = 4.0.0.0
581 11:28:16.016714 Reference Code - SA - System Agent = a.0.4c.31
582 11:28:16.019732 Reference Code - MRC = 2.0.0.1
583 11:28:16.023174 SA - PCIe Version = a.0.4c.31
584 11:28:16.026685 SA-CRID Status = Disabled
585 11:28:16.029981 SA-CRID Original Value = 0.0.0.1
586 11:28:16.032913 SA-CRID New Value = 0.0.0.1
587 11:28:16.036242 OPROM - VBIOS = ff.ff.ff.ffff
588 11:28:16.040090 IO Manageability Engine FW Version = 11.1.4.0
589 11:28:16.043294 PHY Build Version = 0.0.0.e0
590 11:28:16.046349 Thunderbolt(TM) FW Version = 0.0.0.0
591 11:28:16.053282 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
592 11:28:16.056745 ITSS IRQ Polarities Before:
593 11:28:16.056831 IPC0: 0xffffffff
594 11:28:16.060387 IPC1: 0xffffffff
595 11:28:16.060471 IPC2: 0xffffffff
596 11:28:16.064132 IPC3: 0xffffffff
597 11:28:16.067297 ITSS IRQ Polarities After:
598 11:28:16.067381 IPC0: 0xffffffff
599 11:28:16.070382 IPC1: 0xffffffff
600 11:28:16.070465 IPC2: 0xffffffff
601 11:28:16.073535 IPC3: 0xffffffff
602 11:28:16.076768 Found PCIe Root Port #9 at PCI: 00:1d.0.
603 11:28:16.090312 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
604 11:28:16.100096 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
605 11:28:16.113848 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
606 11:28:16.120246 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
607 11:28:16.120334 Enumerating buses...
608 11:28:16.126719 Show all devs... Before device enumeration.
609 11:28:16.126818 Root Device: enabled 1
610 11:28:16.129915 DOMAIN: 0000: enabled 1
611 11:28:16.133003 CPU_CLUSTER: 0: enabled 1
612 11:28:16.136602 PCI: 00:00.0: enabled 1
613 11:28:16.136685 PCI: 00:02.0: enabled 1
614 11:28:16.140622 PCI: 00:04.0: enabled 1
615 11:28:16.143140 PCI: 00:05.0: enabled 1
616 11:28:16.146453 PCI: 00:06.0: enabled 0
617 11:28:16.146536 PCI: 00:07.0: enabled 0
618 11:28:16.149807 PCI: 00:07.1: enabled 0
619 11:28:16.152888 PCI: 00:07.2: enabled 0
620 11:28:16.156487 PCI: 00:07.3: enabled 0
621 11:28:16.156571 PCI: 00:08.0: enabled 1
622 11:28:16.160122 PCI: 00:09.0: enabled 0
623 11:28:16.163252 PCI: 00:0a.0: enabled 0
624 11:28:16.166656 PCI: 00:0d.0: enabled 1
625 11:28:16.166766 PCI: 00:0d.1: enabled 0
626 11:28:16.169665 PCI: 00:0d.2: enabled 0
627 11:28:16.173060 PCI: 00:0d.3: enabled 0
628 11:28:16.176546 PCI: 00:0e.0: enabled 0
629 11:28:16.176630 PCI: 00:10.2: enabled 1
630 11:28:16.179681 PCI: 00:10.6: enabled 0
631 11:28:16.183082 PCI: 00:10.7: enabled 0
632 11:28:16.183166 PCI: 00:12.0: enabled 0
633 11:28:16.186222 PCI: 00:12.6: enabled 0
634 11:28:16.189779 PCI: 00:13.0: enabled 0
635 11:28:16.192974 PCI: 00:14.0: enabled 1
636 11:28:16.193056 PCI: 00:14.1: enabled 0
637 11:28:16.196127 PCI: 00:14.2: enabled 1
638 11:28:16.199606 PCI: 00:14.3: enabled 1
639 11:28:16.202814 PCI: 00:15.0: enabled 1
640 11:28:16.202897 PCI: 00:15.1: enabled 1
641 11:28:16.206338 PCI: 00:15.2: enabled 1
642 11:28:16.209888 PCI: 00:15.3: enabled 1
643 11:28:16.212948 PCI: 00:16.0: enabled 1
644 11:28:16.213031 PCI: 00:16.1: enabled 0
645 11:28:16.216298 PCI: 00:16.2: enabled 0
646 11:28:16.219391 PCI: 00:16.3: enabled 0
647 11:28:16.219474 PCI: 00:16.4: enabled 0
648 11:28:16.223052 PCI: 00:16.5: enabled 0
649 11:28:16.226090 PCI: 00:17.0: enabled 1
650 11:28:16.229569 PCI: 00:19.0: enabled 0
651 11:28:16.229665 PCI: 00:19.1: enabled 1
652 11:28:16.232742 PCI: 00:19.2: enabled 0
653 11:28:16.235964 PCI: 00:1c.0: enabled 1
654 11:28:16.239282 PCI: 00:1c.1: enabled 0
655 11:28:16.239366 PCI: 00:1c.2: enabled 0
656 11:28:16.242754 PCI: 00:1c.3: enabled 0
657 11:28:16.246026 PCI: 00:1c.4: enabled 0
658 11:28:16.249623 PCI: 00:1c.5: enabled 0
659 11:28:16.249706 PCI: 00:1c.6: enabled 1
660 11:28:16.252916 PCI: 00:1c.7: enabled 0
661 11:28:16.255900 PCI: 00:1d.0: enabled 1
662 11:28:16.259789 PCI: 00:1d.1: enabled 0
663 11:28:16.259871 PCI: 00:1d.2: enabled 1
664 11:28:16.262627 PCI: 00:1d.3: enabled 0
665 11:28:16.266061 PCI: 00:1e.0: enabled 1
666 11:28:16.266144 PCI: 00:1e.1: enabled 0
667 11:28:16.269130 PCI: 00:1e.2: enabled 1
668 11:28:16.272440 PCI: 00:1e.3: enabled 1
669 11:28:16.276674 PCI: 00:1f.0: enabled 1
670 11:28:16.276784 PCI: 00:1f.1: enabled 0
671 11:28:16.279100 PCI: 00:1f.2: enabled 1
672 11:28:16.282628 PCI: 00:1f.3: enabled 1
673 11:28:16.285986 PCI: 00:1f.4: enabled 0
674 11:28:16.286070 PCI: 00:1f.5: enabled 1
675 11:28:16.289523 PCI: 00:1f.6: enabled 0
676 11:28:16.292536 PCI: 00:1f.7: enabled 0
677 11:28:16.292619 APIC: 00: enabled 1
678 11:28:16.295923 GENERIC: 0.0: enabled 1
679 11:28:16.299345 GENERIC: 0.0: enabled 1
680 11:28:16.302358 GENERIC: 1.0: enabled 1
681 11:28:16.302443 GENERIC: 0.0: enabled 1
682 11:28:16.306071 GENERIC: 1.0: enabled 1
683 11:28:16.309290 USB0 port 0: enabled 1
684 11:28:16.312508 GENERIC: 0.0: enabled 1
685 11:28:16.312591 USB0 port 0: enabled 1
686 11:28:16.315633 GENERIC: 0.0: enabled 1
687 11:28:16.319039 I2C: 00:1a: enabled 1
688 11:28:16.319129 I2C: 00:31: enabled 1
689 11:28:16.322905 I2C: 00:32: enabled 1
690 11:28:16.325481 I2C: 00:10: enabled 1
691 11:28:16.325599 I2C: 00:15: enabled 1
692 11:28:16.328733 GENERIC: 0.0: enabled 0
693 11:28:16.332116 GENERIC: 1.0: enabled 0
694 11:28:16.335634 GENERIC: 0.0: enabled 1
695 11:28:16.335717 SPI: 00: enabled 1
696 11:28:16.338881 SPI: 00: enabled 1
697 11:28:16.341767 PNP: 0c09.0: enabled 1
698 11:28:16.341850 GENERIC: 0.0: enabled 1
699 11:28:16.345351 USB3 port 0: enabled 1
700 11:28:16.348383 USB3 port 1: enabled 1
701 11:28:16.348466 USB3 port 2: enabled 0
702 11:28:16.351917 USB3 port 3: enabled 0
703 11:28:16.355079 USB2 port 0: enabled 0
704 11:28:16.358563 USB2 port 1: enabled 1
705 11:28:16.358646 USB2 port 2: enabled 1
706 11:28:16.361984 USB2 port 3: enabled 0
707 11:28:16.365465 USB2 port 4: enabled 1
708 11:28:16.365582 USB2 port 5: enabled 0
709 11:28:16.368407 USB2 port 6: enabled 0
710 11:28:16.371601 USB2 port 7: enabled 0
711 11:28:16.374991 USB2 port 8: enabled 0
712 11:28:16.375084 USB2 port 9: enabled 0
713 11:28:16.380055 USB3 port 0: enabled 0
714 11:28:16.381540 USB3 port 1: enabled 1
715 11:28:16.381624 USB3 port 2: enabled 0
716 11:28:16.384985 USB3 port 3: enabled 0
717 11:28:16.388421 GENERIC: 0.0: enabled 1
718 11:28:16.391521 GENERIC: 1.0: enabled 1
719 11:28:16.391604 APIC: 01: enabled 1
720 11:28:16.395111 APIC: 03: enabled 1
721 11:28:16.395194 APIC: 07: enabled 1
722 11:28:16.397959 APIC: 05: enabled 1
723 11:28:16.401280 APIC: 04: enabled 1
724 11:28:16.401364 APIC: 02: enabled 1
725 11:28:16.404806 APIC: 06: enabled 1
726 11:28:16.408103 Compare with tree...
727 11:28:16.408185 Root Device: enabled 1
728 11:28:16.411410 DOMAIN: 0000: enabled 1
729 11:28:16.414881 PCI: 00:00.0: enabled 1
730 11:28:16.417803 PCI: 00:02.0: enabled 1
731 11:28:16.417886 PCI: 00:04.0: enabled 1
732 11:28:16.421298 GENERIC: 0.0: enabled 1
733 11:28:16.424931 PCI: 00:05.0: enabled 1
734 11:28:16.428204 PCI: 00:06.0: enabled 0
735 11:28:16.431672 PCI: 00:07.0: enabled 0
736 11:28:16.431754 GENERIC: 0.0: enabled 1
737 11:28:16.434869 PCI: 00:07.1: enabled 0
738 11:28:16.438108 GENERIC: 1.0: enabled 1
739 11:28:16.440941 PCI: 00:07.2: enabled 0
740 11:28:16.444361 GENERIC: 0.0: enabled 1
741 11:28:16.447577 PCI: 00:07.3: enabled 0
742 11:28:16.447660 GENERIC: 1.0: enabled 1
743 11:28:16.451141 PCI: 00:08.0: enabled 1
744 11:28:16.454325 PCI: 00:09.0: enabled 0
745 11:28:16.457340 PCI: 00:0a.0: enabled 0
746 11:28:16.461233 PCI: 00:0d.0: enabled 1
747 11:28:16.461316 USB0 port 0: enabled 1
748 11:28:16.464455 USB3 port 0: enabled 1
749 11:28:16.467625 USB3 port 1: enabled 1
750 11:28:16.470881 USB3 port 2: enabled 0
751 11:28:16.474365 USB3 port 3: enabled 0
752 11:28:16.474447 PCI: 00:0d.1: enabled 0
753 11:28:16.477651 PCI: 00:0d.2: enabled 0
754 11:28:16.480805 GENERIC: 0.0: enabled 1
755 11:28:16.483882 PCI: 00:0d.3: enabled 0
756 11:28:16.487851 PCI: 00:0e.0: enabled 0
757 11:28:16.487933 PCI: 00:10.2: enabled 1
758 11:28:16.490809 PCI: 00:10.6: enabled 0
759 11:28:16.494014 PCI: 00:10.7: enabled 0
760 11:28:16.497384 PCI: 00:12.0: enabled 0
761 11:28:16.500623 PCI: 00:12.6: enabled 0
762 11:28:16.500715 PCI: 00:13.0: enabled 0
763 11:28:16.503838 PCI: 00:14.0: enabled 1
764 11:28:16.507123 USB0 port 0: enabled 1
765 11:28:16.510378 USB2 port 0: enabled 0
766 11:28:16.513884 USB2 port 1: enabled 1
767 11:28:16.516942 USB2 port 2: enabled 1
768 11:28:16.517024 USB2 port 3: enabled 0
769 11:28:16.521044 USB2 port 4: enabled 1
770 11:28:16.523906 USB2 port 5: enabled 0
771 11:28:16.527481 USB2 port 6: enabled 0
772 11:28:16.530702 USB2 port 7: enabled 0
773 11:28:16.530789 USB2 port 8: enabled 0
774 11:28:16.533694 USB2 port 9: enabled 0
775 11:28:16.537157 USB3 port 0: enabled 0
776 11:28:16.540200 USB3 port 1: enabled 1
777 11:28:16.543557 USB3 port 2: enabled 0
778 11:28:16.547221 USB3 port 3: enabled 0
779 11:28:16.547304 PCI: 00:14.1: enabled 0
780 11:28:16.551074 PCI: 00:14.2: enabled 1
781 11:28:16.554053 PCI: 00:14.3: enabled 1
782 11:28:16.556578 GENERIC: 0.0: enabled 1
783 11:28:16.560332 PCI: 00:15.0: enabled 1
784 11:28:16.560416 I2C: 00:1a: enabled 1
785 11:28:16.563302 I2C: 00:31: enabled 1
786 11:28:16.567219 I2C: 00:32: enabled 1
787 11:28:16.570116 PCI: 00:15.1: enabled 1
788 11:28:16.570199 I2C: 00:10: enabled 1
789 11:28:16.573844 PCI: 00:15.2: enabled 1
790 11:28:16.576911 PCI: 00:15.3: enabled 1
791 11:28:16.580171 PCI: 00:16.0: enabled 1
792 11:28:16.583515 PCI: 00:16.1: enabled 0
793 11:28:16.586487 PCI: 00:16.2: enabled 0
794 11:28:16.586570 PCI: 00:16.3: enabled 0
795 11:28:16.589626 PCI: 00:16.4: enabled 0
796 11:28:16.593398 PCI: 00:16.5: enabled 0
797 11:28:16.596808 PCI: 00:17.0: enabled 1
798 11:28:16.599544 PCI: 00:19.0: enabled 0
799 11:28:16.599627 PCI: 00:19.1: enabled 1
800 11:28:16.602826 I2C: 00:15: enabled 1
801 11:28:16.606103 PCI: 00:19.2: enabled 0
802 11:28:16.609769 PCI: 00:1d.0: enabled 1
803 11:28:16.609851 GENERIC: 0.0: enabled 1
804 11:28:16.612892 PCI: 00:1e.0: enabled 1
805 11:28:16.616082 PCI: 00:1e.1: enabled 0
806 11:28:16.619728 PCI: 00:1e.2: enabled 1
807 11:28:16.622629 SPI: 00: enabled 1
808 11:28:16.622711 PCI: 00:1e.3: enabled 1
809 11:28:16.626313 SPI: 00: enabled 1
810 11:28:16.629270 PCI: 00:1f.0: enabled 1
811 11:28:16.632942 PNP: 0c09.0: enabled 1
812 11:28:16.633026 PCI: 00:1f.1: enabled 0
813 11:28:16.636599 PCI: 00:1f.2: enabled 1
814 11:28:16.639519 GENERIC: 0.0: enabled 1
815 11:28:16.642987 GENERIC: 0.0: enabled 1
816 11:28:16.646226 GENERIC: 1.0: enabled 1
817 11:28:16.691830 PCI: 00:1f.3: enabled 1
818 11:28:16.691955 PCI: 00:1f.4: enabled 0
819 11:28:16.692058 PCI: 00:1f.5: enabled 1
820 11:28:16.692149 PCI: 00:1f.6: enabled 0
821 11:28:16.692238 PCI: 00:1f.7: enabled 0
822 11:28:16.692539 CPU_CLUSTER: 0: enabled 1
823 11:28:16.692629 APIC: 00: enabled 1
824 11:28:16.692716 APIC: 01: enabled 1
825 11:28:16.692802 APIC: 03: enabled 1
826 11:28:16.692887 APIC: 07: enabled 1
827 11:28:16.692972 APIC: 05: enabled 1
828 11:28:16.693068 APIC: 04: enabled 1
829 11:28:16.693154 APIC: 02: enabled 1
830 11:28:16.693295 APIC: 06: enabled 1
831 11:28:16.693425 Root Device scanning...
832 11:28:16.693547 scan_static_bus for Root Device
833 11:28:16.693645 DOMAIN: 0000 enabled
834 11:28:16.693731 CPU_CLUSTER: 0 enabled
835 11:28:16.696168 DOMAIN: 0000 scanning...
836 11:28:16.696260 PCI: pci_scan_bus for bus 00
837 11:28:16.699295 PCI: 00:00.0 [8086/0000] ops
838 11:28:16.702603 PCI: 00:00.0 [8086/9a12] enabled
839 11:28:16.705846 PCI: 00:02.0 [8086/0000] bus ops
840 11:28:16.709204 PCI: 00:02.0 [8086/9a40] enabled
841 11:28:16.712552 PCI: 00:04.0 [8086/0000] bus ops
842 11:28:16.716015 PCI: 00:04.0 [8086/9a03] enabled
843 11:28:16.719209 PCI: 00:05.0 [8086/9a19] enabled
844 11:28:16.722886 PCI: 00:07.0 [0000/0000] hidden
845 11:28:16.727597 PCI: 00:08.0 [8086/9a11] enabled
846 11:28:16.730519 PCI: 00:0a.0 [8086/9a0d] disabled
847 11:28:16.733829 PCI: 00:0d.0 [8086/0000] bus ops
848 11:28:16.737069 PCI: 00:0d.0 [8086/9a13] enabled
849 11:28:16.740362 PCI: 00:14.0 [8086/0000] bus ops
850 11:28:16.743683 PCI: 00:14.0 [8086/a0ed] enabled
851 11:28:16.747166 PCI: 00:14.2 [8086/a0ef] enabled
852 11:28:16.750908 PCI: 00:14.3 [8086/0000] bus ops
853 11:28:16.753476 PCI: 00:14.3 [8086/a0f0] enabled
854 11:28:16.756829 PCI: 00:15.0 [8086/0000] bus ops
855 11:28:16.760573 PCI: 00:15.0 [8086/a0e8] enabled
856 11:28:16.763929 PCI: 00:15.1 [8086/0000] bus ops
857 11:28:16.766643 PCI: 00:15.1 [8086/a0e9] enabled
858 11:28:16.770287 PCI: 00:15.2 [8086/0000] bus ops
859 11:28:16.773369 PCI: 00:15.2 [8086/a0ea] enabled
860 11:28:16.776785 PCI: 00:15.3 [8086/0000] bus ops
861 11:28:16.780183 PCI: 00:15.3 [8086/a0eb] enabled
862 11:28:16.783228 PCI: 00:16.0 [8086/0000] ops
863 11:28:16.786519 PCI: 00:16.0 [8086/a0e0] enabled
864 11:28:16.790079 PCI: Static device PCI: 00:17.0 not found, disabling it.
865 11:28:16.793385 PCI: 00:19.0 [8086/0000] bus ops
866 11:28:16.797053 PCI: 00:19.0 [8086/a0c5] disabled
867 11:28:16.800028 PCI: 00:19.1 [8086/0000] bus ops
868 11:28:16.803315 PCI: 00:19.1 [8086/a0c6] enabled
869 11:28:16.806825 PCI: 00:1d.0 [8086/0000] bus ops
870 11:28:16.810255 PCI: 00:1d.0 [8086/a0b0] enabled
871 11:28:16.812851 PCI: 00:1e.0 [8086/0000] ops
872 11:28:16.816577 PCI: 00:1e.0 [8086/a0a8] enabled
873 11:28:16.820011 PCI: 00:1e.2 [8086/0000] bus ops
874 11:28:16.823102 PCI: 00:1e.2 [8086/a0aa] enabled
875 11:28:16.826098 PCI: 00:1e.3 [8086/0000] bus ops
876 11:28:16.829419 PCI: 00:1e.3 [8086/a0ab] enabled
877 11:28:16.833426 PCI: 00:1f.0 [8086/0000] bus ops
878 11:28:16.836145 PCI: 00:1f.0 [8086/a087] enabled
879 11:28:16.839779 RTC Init
880 11:28:16.842725 Set power on after power failure.
881 11:28:16.842809 Disabling Deep S3
882 11:28:16.846574 Disabling Deep S3
883 11:28:16.849290 Disabling Deep S4
884 11:28:16.849373 Disabling Deep S4
885 11:28:16.852971 Disabling Deep S5
886 11:28:16.853057 Disabling Deep S5
887 11:28:16.856045 PCI: 00:1f.2 [0000/0000] hidden
888 11:28:16.859309 PCI: 00:1f.3 [8086/0000] bus ops
889 11:28:16.862625 PCI: 00:1f.3 [8086/a0c8] enabled
890 11:28:16.865829 PCI: 00:1f.5 [8086/0000] bus ops
891 11:28:16.869331 PCI: 00:1f.5 [8086/a0a4] enabled
892 11:28:16.872590 PCI: Leftover static devices:
893 11:28:16.875860 PCI: 00:10.2
894 11:28:16.875940 PCI: 00:10.6
895 11:28:16.876004 PCI: 00:10.7
896 11:28:16.879289 PCI: 00:06.0
897 11:28:16.879368 PCI: 00:07.1
898 11:28:16.882567 PCI: 00:07.2
899 11:28:16.882675 PCI: 00:07.3
900 11:28:16.885608 PCI: 00:09.0
901 11:28:16.885712 PCI: 00:0d.1
902 11:28:16.885811 PCI: 00:0d.2
903 11:28:16.889039 PCI: 00:0d.3
904 11:28:16.889161 PCI: 00:0e.0
905 11:28:16.892156 PCI: 00:12.0
906 11:28:16.892247 PCI: 00:12.6
907 11:28:16.892311 PCI: 00:13.0
908 11:28:16.896703 PCI: 00:14.1
909 11:28:16.896798 PCI: 00:16.1
910 11:28:16.898955 PCI: 00:16.2
911 11:28:16.899038 PCI: 00:16.3
912 11:28:16.902848 PCI: 00:16.4
913 11:28:16.902935 PCI: 00:16.5
914 11:28:16.903000 PCI: 00:17.0
915 11:28:16.905696 PCI: 00:19.2
916 11:28:16.905778 PCI: 00:1e.1
917 11:28:16.909013 PCI: 00:1f.1
918 11:28:16.909102 PCI: 00:1f.4
919 11:28:16.909218 PCI: 00:1f.6
920 11:28:16.912755 PCI: 00:1f.7
921 11:28:16.915892 PCI: Check your devicetree.cb.
922 11:28:16.918939 PCI: 00:02.0 scanning...
923 11:28:16.922174 scan_generic_bus for PCI: 00:02.0
924 11:28:16.925244 scan_generic_bus for PCI: 00:02.0 done
925 11:28:16.928634 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
926 11:28:16.932302 PCI: 00:04.0 scanning...
927 11:28:16.935144 scan_generic_bus for PCI: 00:04.0
928 11:28:16.938504 GENERIC: 0.0 enabled
929 11:28:16.945852 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
930 11:28:16.949034 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
931 11:28:16.951857 PCI: 00:0d.0 scanning...
932 11:28:16.955924 scan_static_bus for PCI: 00:0d.0
933 11:28:16.958605 USB0 port 0 enabled
934 11:28:16.958955 USB0 port 0 scanning...
935 11:28:16.962106 scan_static_bus for USB0 port 0
936 11:28:16.965135 USB3 port 0 enabled
937 11:28:16.968904 USB3 port 1 enabled
938 11:28:16.969256 USB3 port 2 disabled
939 11:28:16.971940 USB3 port 3 disabled
940 11:28:16.975632 USB3 port 0 scanning...
941 11:28:16.978687 scan_static_bus for USB3 port 0
942 11:28:16.981721 scan_static_bus for USB3 port 0 done
943 11:28:16.985119 scan_bus: bus USB3 port 0 finished in 6 msecs
944 11:28:16.988986 USB3 port 1 scanning...
945 11:28:16.991973 scan_static_bus for USB3 port 1
946 11:28:16.995104 scan_static_bus for USB3 port 1 done
947 11:28:16.998443 scan_bus: bus USB3 port 1 finished in 6 msecs
948 11:28:17.004897 scan_static_bus for USB0 port 0 done
949 11:28:17.008758 scan_bus: bus USB0 port 0 finished in 43 msecs
950 11:28:17.011516 scan_static_bus for PCI: 00:0d.0 done
951 11:28:17.018217 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
952 11:28:17.018713 PCI: 00:14.0 scanning...
953 11:28:17.021482 scan_static_bus for PCI: 00:14.0
954 11:28:17.024564 USB0 port 0 enabled
955 11:28:17.027965 USB0 port 0 scanning...
956 11:28:17.031282 scan_static_bus for USB0 port 0
957 11:28:17.034391 USB2 port 0 disabled
958 11:28:17.034854 USB2 port 1 enabled
959 11:28:17.038130 USB2 port 2 enabled
960 11:28:17.038518 USB2 port 3 disabled
961 11:28:17.041354 USB2 port 4 enabled
962 11:28:17.044727 USB2 port 5 disabled
963 11:28:17.045216 USB2 port 6 disabled
964 11:28:17.048144 USB2 port 7 disabled
965 11:28:17.051443 USB2 port 8 disabled
966 11:28:17.051938 USB2 port 9 disabled
967 11:28:17.054529 USB3 port 0 disabled
968 11:28:17.057709 USB3 port 1 enabled
969 11:28:17.058095 USB3 port 2 disabled
970 11:28:17.060901 USB3 port 3 disabled
971 11:28:17.064361 USB2 port 1 scanning...
972 11:28:17.067681 scan_static_bus for USB2 port 1
973 11:28:17.071010 scan_static_bus for USB2 port 1 done
974 11:28:17.073990 scan_bus: bus USB2 port 1 finished in 6 msecs
975 11:28:17.077421 USB2 port 2 scanning...
976 11:28:17.080902 scan_static_bus for USB2 port 2
977 11:28:17.084005 scan_static_bus for USB2 port 2 done
978 11:28:17.087169 scan_bus: bus USB2 port 2 finished in 6 msecs
979 11:28:17.090895 USB2 port 4 scanning...
980 11:28:17.093922 scan_static_bus for USB2 port 4
981 11:28:17.097211 scan_static_bus for USB2 port 4 done
982 11:28:17.103731 scan_bus: bus USB2 port 4 finished in 6 msecs
983 11:28:17.107102 USB3 port 1 scanning...
984 11:28:17.110345 scan_static_bus for USB3 port 1
985 11:28:17.113891 scan_static_bus for USB3 port 1 done
986 11:28:17.116860 scan_bus: bus USB3 port 1 finished in 6 msecs
987 11:28:17.120284 scan_static_bus for USB0 port 0 done
988 11:28:17.127134 scan_bus: bus USB0 port 0 finished in 93 msecs
989 11:28:17.130398 scan_static_bus for PCI: 00:14.0 done
990 11:28:17.133804 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
991 11:28:17.137110 PCI: 00:14.3 scanning...
992 11:28:17.140351 scan_static_bus for PCI: 00:14.3
993 11:28:17.143833 GENERIC: 0.0 enabled
994 11:28:17.146854 scan_static_bus for PCI: 00:14.3 done
995 11:28:17.150266 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
996 11:28:17.153743 PCI: 00:15.0 scanning...
997 11:28:17.156497 scan_static_bus for PCI: 00:15.0
998 11:28:17.159854 I2C: 00:1a enabled
999 11:28:17.160237 I2C: 00:31 enabled
1000 11:28:17.163207 I2C: 00:32 enabled
1001 11:28:17.166775 scan_static_bus for PCI: 00:15.0 done
1002 11:28:17.173174 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1003 11:28:17.173610 PCI: 00:15.1 scanning...
1004 11:28:17.176521 scan_static_bus for PCI: 00:15.1
1005 11:28:17.180121 I2C: 00:10 enabled
1006 11:28:17.183059 scan_static_bus for PCI: 00:15.1 done
1007 11:28:17.189977 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1008 11:28:17.190450 PCI: 00:15.2 scanning...
1009 11:28:17.193166 scan_static_bus for PCI: 00:15.2
1010 11:28:17.200154 scan_static_bus for PCI: 00:15.2 done
1011 11:28:17.203358 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1012 11:28:17.206547 PCI: 00:15.3 scanning...
1013 11:28:17.209776 scan_static_bus for PCI: 00:15.3
1014 11:28:17.213465 scan_static_bus for PCI: 00:15.3 done
1015 11:28:17.216339 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1016 11:28:17.220157 PCI: 00:19.1 scanning...
1017 11:28:17.223290 scan_static_bus for PCI: 00:19.1
1018 11:28:17.226072 I2C: 00:15 enabled
1019 11:28:17.229312 scan_static_bus for PCI: 00:19.1 done
1020 11:28:17.232955 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1021 11:28:17.235910 PCI: 00:1d.0 scanning...
1022 11:28:17.239462 do_pci_scan_bridge for PCI: 00:1d.0
1023 11:28:17.242655 PCI: pci_scan_bus for bus 01
1024 11:28:17.245998 PCI: 01:00.0 [15b7/5009] enabled
1025 11:28:17.249240 GENERIC: 0.0 enabled
1026 11:28:17.252452 Enabling Common Clock Configuration
1027 11:28:17.255914 L1 Sub-State supported from root port 29
1028 11:28:17.259329 L1 Sub-State Support = 0x5
1029 11:28:17.263031 CommonModeRestoreTime = 0x28
1030 11:28:17.265781 Power On Value = 0x16, Power On Scale = 0x0
1031 11:28:17.269419 ASPM: Enabled L1
1032 11:28:17.272357 PCIe: Max_Payload_Size adjusted to 128
1033 11:28:17.275547 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1034 11:28:17.279652 PCI: 00:1e.2 scanning...
1035 11:28:17.282085 scan_generic_bus for PCI: 00:1e.2
1036 11:28:17.285583 SPI: 00 enabled
1037 11:28:17.292365 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1038 11:28:17.295519 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1039 11:28:17.299084 PCI: 00:1e.3 scanning...
1040 11:28:17.302623 scan_generic_bus for PCI: 00:1e.3
1041 11:28:17.305766 SPI: 00 enabled
1042 11:28:17.309606 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1043 11:28:17.315865 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1044 11:28:17.316282 PCI: 00:1f.0 scanning...
1045 11:28:17.319184 scan_static_bus for PCI: 00:1f.0
1046 11:28:17.322590 PNP: 0c09.0 enabled
1047 11:28:17.325940 PNP: 0c09.0 scanning...
1048 11:28:17.329144 scan_static_bus for PNP: 0c09.0
1049 11:28:17.332781 scan_static_bus for PNP: 0c09.0 done
1050 11:28:17.335996 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1051 11:28:17.342630 scan_static_bus for PCI: 00:1f.0 done
1052 11:28:17.345811 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1053 11:28:17.349273 PCI: 00:1f.2 scanning...
1054 11:28:17.352408 scan_static_bus for PCI: 00:1f.2
1055 11:28:17.352786 GENERIC: 0.0 enabled
1056 11:28:17.356703 GENERIC: 0.0 scanning...
1057 11:28:17.359035 scan_static_bus for GENERIC: 0.0
1058 11:28:17.362101 GENERIC: 0.0 enabled
1059 11:28:17.365472 GENERIC: 1.0 enabled
1060 11:28:17.368888 scan_static_bus for GENERIC: 0.0 done
1061 11:28:17.372242 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1062 11:28:17.375451 scan_static_bus for PCI: 00:1f.2 done
1063 11:28:17.382374 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1064 11:28:17.385526 PCI: 00:1f.3 scanning...
1065 11:28:17.388822 scan_static_bus for PCI: 00:1f.3
1066 11:28:17.392288 scan_static_bus for PCI: 00:1f.3 done
1067 11:28:17.395228 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1068 11:28:17.398522 PCI: 00:1f.5 scanning...
1069 11:28:17.402251 scan_generic_bus for PCI: 00:1f.5
1070 11:28:17.405630 scan_generic_bus for PCI: 00:1f.5 done
1071 11:28:17.412070 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1072 11:28:17.415292 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1073 11:28:17.418480 scan_static_bus for Root Device done
1074 11:28:17.424850 scan_bus: bus Root Device finished in 735 msecs
1075 11:28:17.425361 done
1076 11:28:17.431436 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1077 11:28:17.434953 Chrome EC: UHEPI supported
1078 11:28:17.441535 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1079 11:28:17.448438 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1080 11:28:17.451910 SPI flash protection: WPSW=0 SRP0=1
1081 11:28:17.454637 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1082 11:28:17.461232 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1083 11:28:17.464708 found VGA at PCI: 00:02.0
1084 11:28:17.467876 Setting up VGA for PCI: 00:02.0
1085 11:28:17.471348 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1086 11:28:17.477988 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1087 11:28:17.478577 Allocating resources...
1088 11:28:17.481104 Reading resources...
1089 11:28:17.484519 Root Device read_resources bus 0 link: 0
1090 11:28:17.491086 DOMAIN: 0000 read_resources bus 0 link: 0
1091 11:28:17.494591 PCI: 00:04.0 read_resources bus 1 link: 0
1092 11:28:17.501173 PCI: 00:04.0 read_resources bus 1 link: 0 done
1093 11:28:17.504818 PCI: 00:0d.0 read_resources bus 0 link: 0
1094 11:28:17.511046 USB0 port 0 read_resources bus 0 link: 0
1095 11:28:17.514016 USB0 port 0 read_resources bus 0 link: 0 done
1096 11:28:17.521078 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1097 11:28:17.524408 PCI: 00:14.0 read_resources bus 0 link: 0
1098 11:28:17.527393 USB0 port 0 read_resources bus 0 link: 0
1099 11:28:17.534619 USB0 port 0 read_resources bus 0 link: 0 done
1100 11:28:17.538066 PCI: 00:14.0 read_resources bus 0 link: 0 done
1101 11:28:17.545116 PCI: 00:14.3 read_resources bus 0 link: 0
1102 11:28:17.547673 PCI: 00:14.3 read_resources bus 0 link: 0 done
1103 11:28:17.554652 PCI: 00:15.0 read_resources bus 0 link: 0
1104 11:28:17.557816 PCI: 00:15.0 read_resources bus 0 link: 0 done
1105 11:28:17.564376 PCI: 00:15.1 read_resources bus 0 link: 0
1106 11:28:17.567674 PCI: 00:15.1 read_resources bus 0 link: 0 done
1107 11:28:17.575018 PCI: 00:19.1 read_resources bus 0 link: 0
1108 11:28:17.578225 PCI: 00:19.1 read_resources bus 0 link: 0 done
1109 11:28:17.584986 PCI: 00:1d.0 read_resources bus 1 link: 0
1110 11:28:17.588146 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1111 11:28:17.595223 PCI: 00:1e.2 read_resources bus 2 link: 0
1112 11:28:17.598520 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1113 11:28:17.604785 PCI: 00:1e.3 read_resources bus 3 link: 0
1114 11:28:17.608294 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1115 11:28:17.615250 PCI: 00:1f.0 read_resources bus 0 link: 0
1116 11:28:17.618383 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1117 11:28:17.621619 PCI: 00:1f.2 read_resources bus 0 link: 0
1118 11:28:17.628390 GENERIC: 0.0 read_resources bus 0 link: 0
1119 11:28:17.632065 GENERIC: 0.0 read_resources bus 0 link: 0 done
1120 11:28:17.637937 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1121 11:28:17.644687 DOMAIN: 0000 read_resources bus 0 link: 0 done
1122 11:28:17.648055 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1123 11:28:17.654697 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1124 11:28:17.657833 Root Device read_resources bus 0 link: 0 done
1125 11:28:17.661268 Done reading resources.
1126 11:28:17.664644 Show resources in subtree (Root Device)...After reading.
1127 11:28:17.671085 Root Device child on link 0 DOMAIN: 0000
1128 11:28:17.674628 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1129 11:28:17.684681 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1130 11:28:17.694167 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1131 11:28:17.694591 PCI: 00:00.0
1132 11:28:17.704779 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1133 11:28:17.714468 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1134 11:28:17.724163 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1135 11:28:17.734003 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1136 11:28:17.743860 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1137 11:28:17.750678 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1138 11:28:17.760487 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1139 11:28:17.770914 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1140 11:28:17.780504 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1141 11:28:17.790502 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1142 11:28:17.800257 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1143 11:28:17.807289 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1144 11:28:17.817020 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1145 11:28:17.826530 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1146 11:28:17.836969 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1147 11:28:17.846816 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1148 11:28:17.856324 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1149 11:28:17.863395 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1150 11:28:17.873104 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1151 11:28:17.883052 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1152 11:28:17.886053 PCI: 00:02.0
1153 11:28:17.895891 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 11:28:17.905970 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1155 11:28:17.916394 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1156 11:28:17.919280 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1157 11:28:17.929009 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1158 11:28:17.929437 GENERIC: 0.0
1159 11:28:17.932825 PCI: 00:05.0
1160 11:28:17.942162 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1161 11:28:17.945627 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1162 11:28:17.948922 GENERIC: 0.0
1163 11:28:17.949339 PCI: 00:08.0
1164 11:28:17.962174 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 11:28:17.962699 PCI: 00:0a.0
1166 11:28:17.965601 PCI: 00:0d.0 child on link 0 USB0 port 0
1167 11:28:17.975542 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 11:28:17.981787 USB0 port 0 child on link 0 USB3 port 0
1169 11:28:17.982216 USB3 port 0
1170 11:28:17.985254 USB3 port 1
1171 11:28:17.985697 USB3 port 2
1172 11:28:17.988399 USB3 port 3
1173 11:28:17.991619 PCI: 00:14.0 child on link 0 USB0 port 0
1174 11:28:18.001425 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1175 11:28:18.008370 USB0 port 0 child on link 0 USB2 port 0
1176 11:28:18.008793 USB2 port 0
1177 11:28:18.011445 USB2 port 1
1178 11:28:18.011865 USB2 port 2
1179 11:28:18.014875 USB2 port 3
1180 11:28:18.015292 USB2 port 4
1181 11:28:18.018094 USB2 port 5
1182 11:28:18.018511 USB2 port 6
1183 11:28:18.021328 USB2 port 7
1184 11:28:18.021766 USB2 port 8
1185 11:28:18.024558 USB2 port 9
1186 11:28:18.024975 USB3 port 0
1187 11:28:18.028249 USB3 port 1
1188 11:28:18.031300 USB3 port 2
1189 11:28:18.031714 USB3 port 3
1190 11:28:18.034894 PCI: 00:14.2
1191 11:28:18.044730 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1192 11:28:18.055044 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1193 11:28:18.057692 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1194 11:28:18.067695 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1195 11:28:18.071012 GENERIC: 0.0
1196 11:28:18.074907 PCI: 00:15.0 child on link 0 I2C: 00:1a
1197 11:28:18.084406 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1198 11:28:18.084956 I2C: 00:1a
1199 11:28:18.087289 I2C: 00:31
1200 11:28:18.087709 I2C: 00:32
1201 11:28:18.094273 PCI: 00:15.1 child on link 0 I2C: 00:10
1202 11:28:18.103980 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 11:28:18.104408 I2C: 00:10
1204 11:28:18.107184 PCI: 00:15.2
1205 11:28:18.117358 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 11:28:18.118011 PCI: 00:15.3
1207 11:28:18.127249 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1208 11:28:18.130463 PCI: 00:16.0
1209 11:28:18.140754 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1210 11:28:18.141278 PCI: 00:19.0
1211 11:28:18.144035 PCI: 00:19.1 child on link 0 I2C: 00:15
1212 11:28:18.153621 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1213 11:28:18.157291 I2C: 00:15
1214 11:28:18.160327 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1215 11:28:18.170331 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1216 11:28:18.180038 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1217 11:28:18.190001 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1218 11:28:18.190688 GENERIC: 0.0
1219 11:28:18.193251 PCI: 01:00.0
1220 11:28:18.203635 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1221 11:28:18.212935 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1222 11:28:18.213367 PCI: 00:1e.0
1223 11:28:18.226210 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1224 11:28:18.229654 PCI: 00:1e.2 child on link 0 SPI: 00
1225 11:28:18.239337 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1226 11:28:18.239843 SPI: 00
1227 11:28:18.242679 PCI: 00:1e.3 child on link 0 SPI: 00
1228 11:28:18.252687 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1229 11:28:18.256063 SPI: 00
1230 11:28:18.259111 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1231 11:28:18.269070 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1232 11:28:18.269653 PNP: 0c09.0
1233 11:28:18.278981 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1234 11:28:18.282572 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1235 11:28:18.292438 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1236 11:28:18.302081 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1237 11:28:18.305222 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1238 11:28:18.308675 GENERIC: 0.0
1239 11:28:18.309097 GENERIC: 1.0
1240 11:28:18.311692 PCI: 00:1f.3
1241 11:28:18.321879 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1242 11:28:18.332242 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1243 11:28:18.332672 PCI: 00:1f.5
1244 11:28:18.341839 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1245 11:28:18.348447 CPU_CLUSTER: 0 child on link 0 APIC: 00
1246 11:28:18.348870 APIC: 00
1247 11:28:18.349208 APIC: 01
1248 11:28:18.351642 APIC: 03
1249 11:28:18.352118 APIC: 07
1250 11:28:18.355143 APIC: 05
1251 11:28:18.355563 APIC: 04
1252 11:28:18.355893 APIC: 02
1253 11:28:18.358249 APIC: 06
1254 11:28:18.364637 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1255 11:28:18.371346 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1256 11:28:18.377855 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1257 11:28:18.381438 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1258 11:28:18.387781 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1259 11:28:18.391034 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1260 11:28:18.397825 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1261 11:28:18.404754 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1262 11:28:18.413916 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1263 11:28:18.420823 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1264 11:28:18.427256 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1265 11:28:18.433835 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1266 11:28:18.440272 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1267 11:28:18.450190 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1268 11:28:18.453632 DOMAIN: 0000: Resource ranges:
1269 11:28:18.456727 * Base: 1000, Size: 800, Tag: 100
1270 11:28:18.460096 * Base: 1900, Size: e700, Tag: 100
1271 11:28:18.463545 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1272 11:28:18.470562 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1273 11:28:18.476905 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1274 11:28:18.486469 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1275 11:28:18.493306 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1276 11:28:18.499998 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1277 11:28:18.509987 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1278 11:28:18.516624 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1279 11:28:18.523346 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1280 11:28:18.533188 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1281 11:28:18.539739 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1282 11:28:18.546064 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1283 11:28:18.556310 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1284 11:28:18.563038 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1285 11:28:18.569426 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1286 11:28:18.579657 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1287 11:28:18.586028 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1288 11:28:18.592967 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1289 11:28:18.602642 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1290 11:28:18.608887 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1291 11:28:18.619085 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1292 11:28:18.625474 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1293 11:28:18.632170 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1294 11:28:18.641833 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1295 11:28:18.648762 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1296 11:28:18.652175 DOMAIN: 0000: Resource ranges:
1297 11:28:18.655346 * Base: 7fc00000, Size: 40400000, Tag: 200
1298 11:28:18.658868 * Base: d0000000, Size: 28000000, Tag: 200
1299 11:28:18.665087 * Base: fa000000, Size: 1000000, Tag: 200
1300 11:28:18.668430 * Base: fb001000, Size: 2fff000, Tag: 200
1301 11:28:18.671456 * Base: fe010000, Size: 2e000, Tag: 200
1302 11:28:18.678117 * Base: fe03f000, Size: d41000, Tag: 200
1303 11:28:18.681776 * Base: fed88000, Size: 8000, Tag: 200
1304 11:28:18.684696 * Base: fed93000, Size: d000, Tag: 200
1305 11:28:18.688439 * Base: feda2000, Size: 1e000, Tag: 200
1306 11:28:18.694604 * Base: fede0000, Size: 1220000, Tag: 200
1307 11:28:18.697916 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1308 11:28:18.704877 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1309 11:28:18.711368 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1310 11:28:18.718089 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1311 11:28:18.724490 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1312 11:28:18.731094 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1313 11:28:18.737983 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1314 11:28:18.744175 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1315 11:28:18.750828 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1316 11:28:18.757406 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1317 11:28:18.764309 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1318 11:28:18.770841 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1319 11:28:18.777367 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1320 11:28:18.783950 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1321 11:28:18.790488 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1322 11:28:18.797742 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1323 11:28:18.803709 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1324 11:28:18.810495 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1325 11:28:18.817036 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1326 11:28:18.823920 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1327 11:28:18.830392 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1328 11:28:18.836938 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1329 11:28:18.843815 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1330 11:28:18.853302 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1331 11:28:18.860236 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1332 11:28:18.863315 PCI: 00:1d.0: Resource ranges:
1333 11:28:18.866591 * Base: 7fc00000, Size: 100000, Tag: 200
1334 11:28:18.872981 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1335 11:28:18.880000 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1336 11:28:18.889571 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1337 11:28:18.896056 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1338 11:28:18.899343 Root Device assign_resources, bus 0 link: 0
1339 11:28:18.905743 DOMAIN: 0000 assign_resources, bus 0 link: 0
1340 11:28:18.912707 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1341 11:28:18.922416 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1342 11:28:18.929414 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1343 11:28:18.939375 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1344 11:28:18.942221 PCI: 00:04.0 assign_resources, bus 1 link: 0
1345 11:28:18.945810 PCI: 00:04.0 assign_resources, bus 1 link: 0
1346 11:28:18.955736 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1347 11:28:18.962384 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1348 11:28:18.972780 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1349 11:28:18.975455 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1350 11:28:18.981788 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1351 11:28:18.988613 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1352 11:28:18.995522 PCI: 00:14.0 assign_resources, bus 0 link: 0
1353 11:28:18.998458 PCI: 00:14.0 assign_resources, bus 0 link: 0
1354 11:28:19.008844 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1355 11:28:19.015377 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1356 11:28:19.021465 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1357 11:28:19.028137 PCI: 00:14.3 assign_resources, bus 0 link: 0
1358 11:28:19.031498 PCI: 00:14.3 assign_resources, bus 0 link: 0
1359 11:28:19.041339 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1360 11:28:19.044677 PCI: 00:15.0 assign_resources, bus 0 link: 0
1361 11:28:19.051038 PCI: 00:15.0 assign_resources, bus 0 link: 0
1362 11:28:19.058018 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1363 11:28:19.061012 PCI: 00:15.1 assign_resources, bus 0 link: 0
1364 11:28:19.067926 PCI: 00:15.1 assign_resources, bus 0 link: 0
1365 11:28:19.074468 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1366 11:28:19.084351 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1367 11:28:19.091467 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1368 11:28:19.100995 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1369 11:28:19.104157 PCI: 00:19.1 assign_resources, bus 0 link: 0
1370 11:28:19.110794 PCI: 00:19.1 assign_resources, bus 0 link: 0
1371 11:28:19.117398 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1372 11:28:19.127536 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1373 11:28:19.137335 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1374 11:28:19.140581 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1375 11:28:19.150606 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1376 11:28:19.157024 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1377 11:28:19.160132 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1378 11:28:19.170349 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1379 11:28:19.173736 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1380 11:28:19.180623 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1381 11:28:19.187090 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1382 11:28:19.193588 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1383 11:28:19.196760 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1384 11:28:19.203403 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1385 11:28:19.206553 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1386 11:28:19.210263 LPC: Trying to open IO window from 800 size 1ff
1387 11:28:19.220279 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1388 11:28:19.226104 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1389 11:28:19.236781 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1390 11:28:19.239761 DOMAIN: 0000 assign_resources, bus 0 link: 0
1391 11:28:19.246267 Root Device assign_resources, bus 0 link: 0
1392 11:28:19.246686 Done setting resources.
1393 11:28:19.252997 Show resources in subtree (Root Device)...After assigning values.
1394 11:28:19.259810 Root Device child on link 0 DOMAIN: 0000
1395 11:28:19.263008 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1396 11:28:19.272615 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1397 11:28:19.282484 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1398 11:28:19.282908 PCI: 00:00.0
1399 11:28:19.292937 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1400 11:28:19.302558 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1401 11:28:19.312476 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1402 11:28:19.322584 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1403 11:28:19.332252 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1404 11:28:19.338725 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1405 11:28:19.349003 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1406 11:28:19.358915 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1407 11:28:19.369091 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1408 11:28:19.379065 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1409 11:28:19.385268 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1410 11:28:19.395050 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1411 11:28:19.405450 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1412 11:28:19.415254 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1413 11:28:19.425887 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1414 11:28:19.434863 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1415 11:28:19.444791 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1416 11:28:19.451576 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1417 11:28:19.461704 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1418 11:28:19.471423 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1419 11:28:19.474568 PCI: 00:02.0
1420 11:28:19.484796 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1421 11:28:19.494218 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1422 11:28:19.504438 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1423 11:28:19.507743 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1424 11:28:19.517697 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1425 11:28:19.521139 GENERIC: 0.0
1426 11:28:19.521574 PCI: 00:05.0
1427 11:28:19.534248 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1428 11:28:19.538099 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1429 11:28:19.538506 GENERIC: 0.0
1430 11:28:19.541007 PCI: 00:08.0
1431 11:28:19.550721 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1432 11:28:19.554255 PCI: 00:0a.0
1433 11:28:19.557533 PCI: 00:0d.0 child on link 0 USB0 port 0
1434 11:28:19.567890 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1435 11:28:19.570969 USB0 port 0 child on link 0 USB3 port 0
1436 11:28:19.574222 USB3 port 0
1437 11:28:19.574636 USB3 port 1
1438 11:28:19.577589 USB3 port 2
1439 11:28:19.580838 USB3 port 3
1440 11:28:19.584095 PCI: 00:14.0 child on link 0 USB0 port 0
1441 11:28:19.593679 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1442 11:28:19.597401 USB0 port 0 child on link 0 USB2 port 0
1443 11:28:19.600561 USB2 port 0
1444 11:28:19.601014 USB2 port 1
1445 11:28:19.603837 USB2 port 2
1446 11:28:19.604297 USB2 port 3
1447 11:28:19.606757 USB2 port 4
1448 11:28:19.611531 USB2 port 5
1449 11:28:19.611947 USB2 port 6
1450 11:28:19.613767 USB2 port 7
1451 11:28:19.614182 USB2 port 8
1452 11:28:19.617187 USB2 port 9
1453 11:28:19.617759 USB3 port 0
1454 11:28:19.620423 USB3 port 1
1455 11:28:19.620845 USB3 port 2
1456 11:28:19.623649 USB3 port 3
1457 11:28:19.624072 PCI: 00:14.2
1458 11:28:19.633159 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1459 11:28:19.646650 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1460 11:28:19.649808 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1461 11:28:19.659812 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1462 11:28:19.663479 GENERIC: 0.0
1463 11:28:19.666669 PCI: 00:15.0 child on link 0 I2C: 00:1a
1464 11:28:19.676560 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1465 11:28:19.676989 I2C: 00:1a
1466 11:28:19.679707 I2C: 00:31
1467 11:28:19.680483 I2C: 00:32
1468 11:28:19.686259 PCI: 00:15.1 child on link 0 I2C: 00:10
1469 11:28:19.696318 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1470 11:28:19.696902 I2C: 00:10
1471 11:28:19.699510 PCI: 00:15.2
1472 11:28:19.709353 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1473 11:28:19.709931 PCI: 00:15.3
1474 11:28:19.722596 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1475 11:28:19.722902 PCI: 00:16.0
1476 11:28:19.732762 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1477 11:28:19.736346 PCI: 00:19.0
1478 11:28:19.739643 PCI: 00:19.1 child on link 0 I2C: 00:15
1479 11:28:19.749159 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1480 11:28:19.752302 I2C: 00:15
1481 11:28:19.755651 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1482 11:28:19.765565 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1483 11:28:19.775719 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1484 11:28:19.785780 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1485 11:28:19.789023 GENERIC: 0.0
1486 11:28:19.792004 PCI: 01:00.0
1487 11:28:19.802110 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1488 11:28:19.812038 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1489 11:28:19.812343 PCI: 00:1e.0
1490 11:28:19.824792 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1491 11:28:19.828593 PCI: 00:1e.2 child on link 0 SPI: 00
1492 11:28:19.838705 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1493 11:28:19.839087 SPI: 00
1494 11:28:19.844889 PCI: 00:1e.3 child on link 0 SPI: 00
1495 11:28:19.855401 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1496 11:28:19.855781 SPI: 00
1497 11:28:19.858137 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1498 11:28:19.868102 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1499 11:28:19.871622 PNP: 0c09.0
1500 11:28:19.877939 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1501 11:28:19.884750 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1502 11:28:19.894359 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1503 11:28:19.900837 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1504 11:28:19.907431 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1505 11:28:19.907556 GENERIC: 0.0
1506 11:28:19.910694 GENERIC: 1.0
1507 11:28:19.910777 PCI: 00:1f.3
1508 11:28:19.920686 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1509 11:28:19.934186 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1510 11:28:19.934313 PCI: 00:1f.5
1511 11:28:19.944155 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1512 11:28:19.947281 CPU_CLUSTER: 0 child on link 0 APIC: 00
1513 11:28:19.950658 APIC: 00
1514 11:28:19.950832 APIC: 01
1515 11:28:19.954187 APIC: 03
1516 11:28:19.954389 APIC: 07
1517 11:28:19.954550 APIC: 05
1518 11:28:19.957392 APIC: 04
1519 11:28:19.957669 APIC: 02
1520 11:28:19.960367 APIC: 06
1521 11:28:19.960704 Done allocating resources.
1522 11:28:19.966752 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1523 11:28:19.973818 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1524 11:28:19.977255 Configure GPIOs for I2S audio on UP4.
1525 11:28:19.984205 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1526 11:28:19.987736 Enabling resources...
1527 11:28:19.990561 PCI: 00:00.0 subsystem <- 8086/9a12
1528 11:28:19.994216 PCI: 00:00.0 cmd <- 06
1529 11:28:19.997531 PCI: 00:02.0 subsystem <- 8086/9a40
1530 11:28:20.000770 PCI: 00:02.0 cmd <- 03
1531 11:28:20.003743 PCI: 00:04.0 subsystem <- 8086/9a03
1532 11:28:20.007454 PCI: 00:04.0 cmd <- 02
1533 11:28:20.010677 PCI: 00:05.0 subsystem <- 8086/9a19
1534 11:28:20.011184 PCI: 00:05.0 cmd <- 02
1535 11:28:20.017448 PCI: 00:08.0 subsystem <- 8086/9a11
1536 11:28:20.018053 PCI: 00:08.0 cmd <- 06
1537 11:28:20.020299 PCI: 00:0d.0 subsystem <- 8086/9a13
1538 11:28:20.023911 PCI: 00:0d.0 cmd <- 02
1539 11:28:20.027185 PCI: 00:14.0 subsystem <- 8086/a0ed
1540 11:28:20.030784 PCI: 00:14.0 cmd <- 02
1541 11:28:20.033718 PCI: 00:14.2 subsystem <- 8086/a0ef
1542 11:28:20.037153 PCI: 00:14.2 cmd <- 02
1543 11:28:20.040243 PCI: 00:14.3 subsystem <- 8086/a0f0
1544 11:28:20.043546 PCI: 00:14.3 cmd <- 02
1545 11:28:20.047098 PCI: 00:15.0 subsystem <- 8086/a0e8
1546 11:28:20.050361 PCI: 00:15.0 cmd <- 02
1547 11:28:20.053283 PCI: 00:15.1 subsystem <- 8086/a0e9
1548 11:28:20.056274 PCI: 00:15.1 cmd <- 02
1549 11:28:20.059634 PCI: 00:15.2 subsystem <- 8086/a0ea
1550 11:28:20.062968 PCI: 00:15.2 cmd <- 02
1551 11:28:20.066114 PCI: 00:15.3 subsystem <- 8086/a0eb
1552 11:28:20.066336 PCI: 00:15.3 cmd <- 02
1553 11:28:20.072951 PCI: 00:16.0 subsystem <- 8086/a0e0
1554 11:28:20.073182 PCI: 00:16.0 cmd <- 02
1555 11:28:20.075908 PCI: 00:19.1 subsystem <- 8086/a0c6
1556 11:28:20.079358 PCI: 00:19.1 cmd <- 02
1557 11:28:20.082660 PCI: 00:1d.0 bridge ctrl <- 0013
1558 11:28:20.086329 PCI: 00:1d.0 subsystem <- 8086/a0b0
1559 11:28:20.089624 PCI: 00:1d.0 cmd <- 06
1560 11:28:20.092671 PCI: 00:1e.0 subsystem <- 8086/a0a8
1561 11:28:20.096107 PCI: 00:1e.0 cmd <- 06
1562 11:28:20.099732 PCI: 00:1e.2 subsystem <- 8086/a0aa
1563 11:28:20.102526 PCI: 00:1e.2 cmd <- 06
1564 11:28:20.105844 PCI: 00:1e.3 subsystem <- 8086/a0ab
1565 11:28:20.109046 PCI: 00:1e.3 cmd <- 02
1566 11:28:20.112625 PCI: 00:1f.0 subsystem <- 8086/a087
1567 11:28:20.115614 PCI: 00:1f.0 cmd <- 407
1568 11:28:20.119298 PCI: 00:1f.3 subsystem <- 8086/a0c8
1569 11:28:20.119658 PCI: 00:1f.3 cmd <- 02
1570 11:28:20.125606 PCI: 00:1f.5 subsystem <- 8086/a0a4
1571 11:28:20.125991 PCI: 00:1f.5 cmd <- 406
1572 11:28:20.131320 PCI: 01:00.0 cmd <- 02
1573 11:28:20.135887 done.
1574 11:28:20.138966 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1575 11:28:20.142518 Initializing devices...
1576 11:28:20.146208 Root Device init
1577 11:28:20.148817 Chrome EC: Set SMI mask to 0x0000000000000000
1578 11:28:20.155917 Chrome EC: clear events_b mask to 0x0000000000000000
1579 11:28:20.162179 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1580 11:28:20.165115 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1581 11:28:20.171677 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1582 11:28:20.178267 Chrome EC: Set WAKE mask to 0x0000000000000000
1583 11:28:20.181608 fw_config match found: DB_USB=USB3_ACTIVE
1584 11:28:20.188630 Configure Right Type-C port orientation for retimer
1585 11:28:20.191392 Root Device init finished in 42 msecs
1586 11:28:20.194711 PCI: 00:00.0 init
1587 11:28:20.198089 CPU TDP = 9 Watts
1588 11:28:20.198177 CPU PL1 = 9 Watts
1589 11:28:20.201710 CPU PL2 = 40 Watts
1590 11:28:20.201792 CPU PL4 = 83 Watts
1591 11:28:20.204864 PCI: 00:00.0 init finished in 8 msecs
1592 11:28:20.208548 PCI: 00:02.0 init
1593 11:28:20.211754 GMA: Found VBT in CBFS
1594 11:28:20.214835 GMA: Found valid VBT in CBFS
1595 11:28:20.218378 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1596 11:28:20.228149 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1597 11:28:20.231335 PCI: 00:02.0 init finished in 18 msecs
1598 11:28:20.234558 PCI: 00:05.0 init
1599 11:28:20.237793 PCI: 00:05.0 init finished in 0 msecs
1600 11:28:20.237865 PCI: 00:08.0 init
1601 11:28:20.245128 PCI: 00:08.0 init finished in 0 msecs
1602 11:28:20.245237 PCI: 00:14.0 init
1603 11:28:20.251306 PCI: 00:14.0 init finished in 0 msecs
1604 11:28:20.251384 PCI: 00:14.2 init
1605 11:28:20.254433 PCI: 00:14.2 init finished in 0 msecs
1606 11:28:20.258471 PCI: 00:15.0 init
1607 11:28:20.261700 I2C bus 0 version 0x3230302a
1608 11:28:20.265379 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1609 11:28:20.268434 PCI: 00:15.0 init finished in 6 msecs
1610 11:28:20.271599 PCI: 00:15.1 init
1611 11:28:20.274837 I2C bus 1 version 0x3230302a
1612 11:28:20.278033 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1613 11:28:20.281832 PCI: 00:15.1 init finished in 6 msecs
1614 11:28:20.284923 PCI: 00:15.2 init
1615 11:28:20.288250 I2C bus 2 version 0x3230302a
1616 11:28:20.291527 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1617 11:28:20.294622 PCI: 00:15.2 init finished in 6 msecs
1618 11:28:20.294697 PCI: 00:15.3 init
1619 11:28:20.298063 I2C bus 3 version 0x3230302a
1620 11:28:20.304497 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1621 11:28:20.308159 PCI: 00:15.3 init finished in 6 msecs
1622 11:28:20.308232 PCI: 00:16.0 init
1623 11:28:20.311319 PCI: 00:16.0 init finished in 0 msecs
1624 11:28:20.315166 PCI: 00:19.1 init
1625 11:28:20.318022 I2C bus 5 version 0x3230302a
1626 11:28:20.321487 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1627 11:28:20.324984 PCI: 00:19.1 init finished in 6 msecs
1628 11:28:20.328300 PCI: 00:1d.0 init
1629 11:28:20.331312 Initializing PCH PCIe bridge.
1630 11:28:20.334941 PCI: 00:1d.0 init finished in 3 msecs
1631 11:28:20.337905 PCI: 00:1f.0 init
1632 11:28:20.341514 IOAPIC: Initializing IOAPIC at 0xfec00000
1633 11:28:20.347960 IOAPIC: Bootstrap Processor Local APIC = 0x00
1634 11:28:20.348043 IOAPIC: ID = 0x02
1635 11:28:20.351210 IOAPIC: Dumping registers
1636 11:28:20.355019 reg 0x0000: 0x02000000
1637 11:28:20.355099 reg 0x0001: 0x00770020
1638 11:28:20.357604 reg 0x0002: 0x00000000
1639 11:28:20.364315 PCI: 00:1f.0 init finished in 21 msecs
1640 11:28:20.364397 PCI: 00:1f.2 init
1641 11:28:20.367735 Disabling ACPI via APMC.
1642 11:28:20.372461 APMC done.
1643 11:28:20.375572 PCI: 00:1f.2 init finished in 6 msecs
1644 11:28:20.387007 PCI: 01:00.0 init
1645 11:28:20.390617 PCI: 01:00.0 init finished in 0 msecs
1646 11:28:20.393792 PNP: 0c09.0 init
1647 11:28:20.400476 Google Chrome EC uptime: 8.273 seconds
1648 11:28:20.403991 Google Chrome AP resets since EC boot: 1
1649 11:28:20.407261 Google Chrome most recent AP reset causes:
1650 11:28:20.410594 0.483: 32775 shutdown: entering G3
1651 11:28:20.417388 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1652 11:28:20.420414 PNP: 0c09.0 init finished in 24 msecs
1653 11:28:20.427609 Devices initialized
1654 11:28:20.430652 Show all devs... After init.
1655 11:28:20.433788 Root Device: enabled 1
1656 11:28:20.433913 DOMAIN: 0000: enabled 1
1657 11:28:20.437088 CPU_CLUSTER: 0: enabled 1
1658 11:28:20.440484 PCI: 00:00.0: enabled 1
1659 11:28:20.443837 PCI: 00:02.0: enabled 1
1660 11:28:20.444007 PCI: 00:04.0: enabled 1
1661 11:28:20.447095 PCI: 00:05.0: enabled 1
1662 11:28:20.450423 PCI: 00:06.0: enabled 0
1663 11:28:20.453605 PCI: 00:07.0: enabled 0
1664 11:28:20.453875 PCI: 00:07.1: enabled 0
1665 11:28:20.456584 PCI: 00:07.2: enabled 0
1666 11:28:20.459998 PCI: 00:07.3: enabled 0
1667 11:28:20.463447 PCI: 00:08.0: enabled 1
1668 11:28:20.463650 PCI: 00:09.0: enabled 0
1669 11:28:20.466699 PCI: 00:0a.0: enabled 0
1670 11:28:20.470281 PCI: 00:0d.0: enabled 1
1671 11:28:20.473530 PCI: 00:0d.1: enabled 0
1672 11:28:20.474007 PCI: 00:0d.2: enabled 0
1673 11:28:20.477023 PCI: 00:0d.3: enabled 0
1674 11:28:20.480078 PCI: 00:0e.0: enabled 0
1675 11:28:20.483290 PCI: 00:10.2: enabled 1
1676 11:28:20.483903 PCI: 00:10.6: enabled 0
1677 11:28:20.487272 PCI: 00:10.7: enabled 0
1678 11:28:20.490138 PCI: 00:12.0: enabled 0
1679 11:28:20.490598 PCI: 00:12.6: enabled 0
1680 11:28:20.493576 PCI: 00:13.0: enabled 0
1681 11:28:20.496931 PCI: 00:14.0: enabled 1
1682 11:28:20.499912 PCI: 00:14.1: enabled 0
1683 11:28:20.500311 PCI: 00:14.2: enabled 1
1684 11:28:20.503361 PCI: 00:14.3: enabled 1
1685 11:28:20.506372 PCI: 00:15.0: enabled 1
1686 11:28:20.509700 PCI: 00:15.1: enabled 1
1687 11:28:20.509947 PCI: 00:15.2: enabled 1
1688 11:28:20.513108 PCI: 00:15.3: enabled 1
1689 11:28:20.516552 PCI: 00:16.0: enabled 1
1690 11:28:20.519766 PCI: 00:16.1: enabled 0
1691 11:28:20.519919 PCI: 00:16.2: enabled 0
1692 11:28:20.523078 PCI: 00:16.3: enabled 0
1693 11:28:20.526714 PCI: 00:16.4: enabled 0
1694 11:28:20.529521 PCI: 00:16.5: enabled 0
1695 11:28:20.529673 PCI: 00:17.0: enabled 0
1696 11:28:20.532724 PCI: 00:19.0: enabled 0
1697 11:28:20.536136 PCI: 00:19.1: enabled 1
1698 11:28:20.536288 PCI: 00:19.2: enabled 0
1699 11:28:20.539764 PCI: 00:1c.0: enabled 1
1700 11:28:20.543077 PCI: 00:1c.1: enabled 0
1701 11:28:20.546105 PCI: 00:1c.2: enabled 0
1702 11:28:20.546265 PCI: 00:1c.3: enabled 0
1703 11:28:20.549176 PCI: 00:1c.4: enabled 0
1704 11:28:20.553144 PCI: 00:1c.5: enabled 0
1705 11:28:20.556211 PCI: 00:1c.6: enabled 1
1706 11:28:20.556385 PCI: 00:1c.7: enabled 0
1707 11:28:20.559526 PCI: 00:1d.0: enabled 1
1708 11:28:20.562518 PCI: 00:1d.1: enabled 0
1709 11:28:20.566044 PCI: 00:1d.2: enabled 1
1710 11:28:20.566288 PCI: 00:1d.3: enabled 0
1711 11:28:20.569737 PCI: 00:1e.0: enabled 1
1712 11:28:20.573274 PCI: 00:1e.1: enabled 0
1713 11:28:20.576196 PCI: 00:1e.2: enabled 1
1714 11:28:20.576587 PCI: 00:1e.3: enabled 1
1715 11:28:20.579869 PCI: 00:1f.0: enabled 1
1716 11:28:20.582946 PCI: 00:1f.1: enabled 0
1717 11:28:20.586763 PCI: 00:1f.2: enabled 1
1718 11:28:20.587260 PCI: 00:1f.3: enabled 1
1719 11:28:20.589434 PCI: 00:1f.4: enabled 0
1720 11:28:20.592475 PCI: 00:1f.5: enabled 1
1721 11:28:20.592869 PCI: 00:1f.6: enabled 0
1722 11:28:20.596234 PCI: 00:1f.7: enabled 0
1723 11:28:20.599334 APIC: 00: enabled 1
1724 11:28:20.603397 GENERIC: 0.0: enabled 1
1725 11:28:20.603788 GENERIC: 0.0: enabled 1
1726 11:28:20.606089 GENERIC: 1.0: enabled 1
1727 11:28:20.608896 GENERIC: 0.0: enabled 1
1728 11:28:20.612683 GENERIC: 1.0: enabled 1
1729 11:28:20.612766 USB0 port 0: enabled 1
1730 11:28:20.615494 GENERIC: 0.0: enabled 1
1731 11:28:20.618675 USB0 port 0: enabled 1
1732 11:28:20.618758 GENERIC: 0.0: enabled 1
1733 11:28:20.622056 I2C: 00:1a: enabled 1
1734 11:28:20.625646 I2C: 00:31: enabled 1
1735 11:28:20.625729 I2C: 00:32: enabled 1
1736 11:28:20.628944 I2C: 00:10: enabled 1
1737 11:28:20.632327 I2C: 00:15: enabled 1
1738 11:28:20.635784 GENERIC: 0.0: enabled 0
1739 11:28:20.636208 GENERIC: 1.0: enabled 0
1740 11:28:20.638813 GENERIC: 0.0: enabled 1
1741 11:28:20.642390 SPI: 00: enabled 1
1742 11:28:20.642815 SPI: 00: enabled 1
1743 11:28:20.645550 PNP: 0c09.0: enabled 1
1744 11:28:20.648761 GENERIC: 0.0: enabled 1
1745 11:28:20.649194 USB3 port 0: enabled 1
1746 11:28:20.652451 USB3 port 1: enabled 1
1747 11:28:20.655203 USB3 port 2: enabled 0
1748 11:28:20.658647 USB3 port 3: enabled 0
1749 11:28:20.658943 USB2 port 0: enabled 0
1750 11:28:20.661783 USB2 port 1: enabled 1
1751 11:28:20.665009 USB2 port 2: enabled 1
1752 11:28:20.665426 USB2 port 3: enabled 0
1753 11:28:20.668832 USB2 port 4: enabled 1
1754 11:28:20.671782 USB2 port 5: enabled 0
1755 11:28:20.672081 USB2 port 6: enabled 0
1756 11:28:20.675211 USB2 port 7: enabled 0
1757 11:28:20.678532 USB2 port 8: enabled 0
1758 11:28:20.681691 USB2 port 9: enabled 0
1759 11:28:20.681985 USB3 port 0: enabled 0
1760 11:28:20.685112 USB3 port 1: enabled 1
1761 11:28:20.688300 USB3 port 2: enabled 0
1762 11:28:20.688627 USB3 port 3: enabled 0
1763 11:28:20.691754 GENERIC: 0.0: enabled 1
1764 11:28:20.695424 GENERIC: 1.0: enabled 1
1765 11:28:20.698318 APIC: 01: enabled 1
1766 11:28:20.698615 APIC: 03: enabled 1
1767 11:28:20.701756 APIC: 07: enabled 1
1768 11:28:20.702069 APIC: 05: enabled 1
1769 11:28:20.705013 APIC: 04: enabled 1
1770 11:28:20.708453 APIC: 02: enabled 1
1771 11:28:20.708749 APIC: 06: enabled 1
1772 11:28:20.711883 PCI: 01:00.0: enabled 1
1773 11:28:20.718312 BS: BS_DEV_INIT run times (exec / console): 31 / 540 ms
1774 11:28:20.721256 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1775 11:28:20.724553 ELOG: NV offset 0xf30000 size 0x1000
1776 11:28:20.732858 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1777 11:28:20.739176 ELOG: Event(17) added with size 13 at 2023-06-09 11:28:18 UTC
1778 11:28:20.745726 ELOG: Event(92) added with size 9 at 2023-06-09 11:28:18 UTC
1779 11:28:20.752371 ELOG: Event(16) added with size 11 at 2023-06-09 11:28:18 UTC
1780 11:28:20.755301 Erasing flash addr f30000 + 4 KiB
1781 11:28:20.816793 ELOG: Event(93) added with size 9 at 2023-06-09 11:28:18 UTC
1782 11:28:20.822967 ELOG: Event(9E) added with size 10 at 2023-06-09 11:28:18 UTC
1783 11:28:20.829699 ELOG: Event(9F) added with size 14 at 2023-06-09 11:28:18 UTC
1784 11:28:20.836312 BS: BS_DEV_INIT exit times (exec / console): 36 / 55 ms
1785 11:28:20.842683 ELOG: Event(A1) added with size 10 at 2023-06-09 11:28:18 UTC
1786 11:28:20.849439 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1787 11:28:20.855887 ELOG: Event(A0) added with size 9 at 2023-06-09 11:28:18 UTC
1788 11:28:20.859496 elog_add_boot_reason: Logged dev mode boot
1789 11:28:20.866088 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1790 11:28:20.869123 Finalize devices...
1791 11:28:20.869205 Devices finalized
1792 11:28:20.875735 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1793 11:28:20.878957 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1794 11:28:20.885766 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1795 11:28:20.893076 ME: HFSTS1 : 0x80030055
1796 11:28:20.896082 ME: HFSTS2 : 0x30280116
1797 11:28:20.899471 ME: HFSTS3 : 0x00000050
1798 11:28:20.905936 ME: HFSTS4 : 0x00004000
1799 11:28:20.909317 ME: HFSTS5 : 0x00000000
1800 11:28:20.912291 ME: HFSTS6 : 0x40400006
1801 11:28:20.918884 ME: Manufacturing Mode : YES
1802 11:28:20.922187 ME: SPI Protection Mode Enabled : NO
1803 11:28:20.925962 ME: FW Partition Table : OK
1804 11:28:20.929609 ME: Bringup Loader Failure : NO
1805 11:28:20.932468 ME: Firmware Init Complete : NO
1806 11:28:20.935422 ME: Boot Options Present : NO
1807 11:28:20.938675 ME: Update In Progress : NO
1808 11:28:20.942308 ME: D0i3 Support : YES
1809 11:28:20.948456 ME: Low Power State Enabled : NO
1810 11:28:20.951812 ME: CPU Replaced : YES
1811 11:28:20.955265 ME: CPU Replacement Valid : YES
1812 11:28:20.958694 ME: Current Working State : 5
1813 11:28:20.962162 ME: Current Operation State : 1
1814 11:28:20.965121 ME: Current Operation Mode : 3
1815 11:28:20.968612 ME: Error Code : 0
1816 11:28:20.971694 ME: Enhanced Debug Mode : NO
1817 11:28:20.975038 ME: CPU Debug Disabled : YES
1818 11:28:20.981638 ME: TXT Support : NO
1819 11:28:20.984952 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1820 11:28:20.995098 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1821 11:28:20.998898 CBFS: 'fallback/slic' not found.
1822 11:28:21.001704 ACPI: Writing ACPI tables at 76b01000.
1823 11:28:21.001803 ACPI: * FACS
1824 11:28:21.004733 ACPI: * DSDT
1825 11:28:21.008090 Ramoops buffer: 0x100000@0x76a00000.
1826 11:28:21.014746 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1827 11:28:21.017925 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1828 11:28:21.021558 Google Chrome EC: version:
1829 11:28:21.024505 ro: voema_v2.0.10114-a447f03e46
1830 11:28:21.028221 rw: voema_v2.0.10114-a447f03e46
1831 11:28:21.031113 running image: 2
1832 11:28:21.038103 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1833 11:28:21.041123 ACPI: * FADT
1834 11:28:21.041221 SCI is IRQ9
1835 11:28:21.044056 ACPI: added table 1/32, length now 40
1836 11:28:21.047665 ACPI: * SSDT
1837 11:28:21.050717 Found 1 CPU(s) with 8 core(s) each.
1838 11:28:21.054171 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1839 11:28:21.060746 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1840 11:28:21.064263 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1841 11:28:21.067558 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1842 11:28:21.074403 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1843 11:28:21.080732 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1844 11:28:21.084086 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1845 11:28:21.090611 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1846 11:28:21.097264 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1847 11:28:21.100452 \_SB.PCI0.RP09: Added StorageD3Enable property
1848 11:28:21.103920 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1849 11:28:21.111208 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1850 11:28:21.117273 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1851 11:28:21.120344 PS2K: Passing 80 keymaps to kernel
1852 11:28:21.127118 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1853 11:28:21.133798 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1854 11:28:21.140546 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1855 11:28:21.146855 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1856 11:28:21.153718 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1857 11:28:21.159902 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1858 11:28:21.166560 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1859 11:28:21.173387 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1860 11:28:21.176630 ACPI: added table 2/32, length now 44
1861 11:28:21.176706 ACPI: * MCFG
1862 11:28:21.183666 ACPI: added table 3/32, length now 48
1863 11:28:21.183748 ACPI: * TPM2
1864 11:28:21.186378 TPM2 log created at 0x769f0000
1865 11:28:21.189972 ACPI: added table 4/32, length now 52
1866 11:28:21.193237 ACPI: * MADT
1867 11:28:21.193327 SCI is IRQ9
1868 11:28:21.196485 ACPI: added table 5/32, length now 56
1869 11:28:21.199970 current = 76b09850
1870 11:28:21.200084 ACPI: * DMAR
1871 11:28:21.203590 ACPI: added table 6/32, length now 60
1872 11:28:21.209390 ACPI: added table 7/32, length now 64
1873 11:28:21.209569 ACPI: * HPET
1874 11:28:21.212931 ACPI: added table 8/32, length now 68
1875 11:28:21.216443 ACPI: done.
1876 11:28:21.216599 ACPI tables: 35216 bytes.
1877 11:28:21.219454 smbios_write_tables: 769ef000
1878 11:28:21.222946 EC returned error result code 3
1879 11:28:21.226154 Couldn't obtain OEM name from CBI
1880 11:28:21.231222 Create SMBIOS type 16
1881 11:28:21.234432 Create SMBIOS type 17
1882 11:28:21.238159 GENERIC: 0.0 (WIFI Device)
1883 11:28:21.241033 SMBIOS tables: 1734 bytes.
1884 11:28:21.244761 Writing table forward entry at 0x00000500
1885 11:28:21.251099 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1886 11:28:21.254580 Writing coreboot table at 0x76b25000
1887 11:28:21.260990 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1888 11:28:21.264558 1. 0000000000001000-000000000009ffff: RAM
1889 11:28:21.268074 2. 00000000000a0000-00000000000fffff: RESERVED
1890 11:28:21.274608 3. 0000000000100000-00000000769eefff: RAM
1891 11:28:21.277831 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1892 11:28:21.284028 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1893 11:28:21.290713 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1894 11:28:21.294221 7. 0000000077000000-000000007fbfffff: RESERVED
1895 11:28:21.300528 8. 00000000c0000000-00000000cfffffff: RESERVED
1896 11:28:21.303837 9. 00000000f8000000-00000000f9ffffff: RESERVED
1897 11:28:21.307134 10. 00000000fb000000-00000000fb000fff: RESERVED
1898 11:28:21.313699 11. 00000000fe000000-00000000fe00ffff: RESERVED
1899 11:28:21.316885 12. 00000000fed80000-00000000fed87fff: RESERVED
1900 11:28:21.323638 13. 00000000fed90000-00000000fed92fff: RESERVED
1901 11:28:21.326961 14. 00000000feda0000-00000000feda1fff: RESERVED
1902 11:28:21.333610 15. 00000000fedc0000-00000000feddffff: RESERVED
1903 11:28:21.336700 16. 0000000100000000-00000004803fffff: RAM
1904 11:28:21.340124 Passing 4 GPIOs to payload:
1905 11:28:21.343097 NAME | PORT | POLARITY | VALUE
1906 11:28:21.349915 lid | undefined | high | high
1907 11:28:21.356572 power | undefined | high | low
1908 11:28:21.359461 oprom | undefined | high | low
1909 11:28:21.366144 EC in RW | 0x000000e5 | high | high
1910 11:28:21.372732 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e94e
1911 11:28:21.376232 coreboot table: 1576 bytes.
1912 11:28:21.379531 IMD ROOT 0. 0x76fff000 0x00001000
1913 11:28:21.382663 IMD SMALL 1. 0x76ffe000 0x00001000
1914 11:28:21.385982 FSP MEMORY 2. 0x76c4e000 0x003b0000
1915 11:28:21.389260 VPD 3. 0x76c4d000 0x00000367
1916 11:28:21.392672 RO MCACHE 4. 0x76c4c000 0x00000fdc
1917 11:28:21.396165 CONSOLE 5. 0x76c2c000 0x00020000
1918 11:28:21.402723 FMAP 6. 0x76c2b000 0x00000578
1919 11:28:21.405516 TIME STAMP 7. 0x76c2a000 0x00000910
1920 11:28:21.409822 VBOOT WORK 8. 0x76c16000 0x00014000
1921 11:28:21.412698 ROMSTG STCK 9. 0x76c15000 0x00001000
1922 11:28:21.415539 AFTER CAR 10. 0x76c0a000 0x0000b000
1923 11:28:21.419022 RAMSTAGE 11. 0x76b97000 0x00073000
1924 11:28:21.421978 REFCODE 12. 0x76b42000 0x00055000
1925 11:28:21.429060 SMM BACKUP 13. 0x76b32000 0x00010000
1926 11:28:21.432113 4f444749 14. 0x76b30000 0x00002000
1927 11:28:21.435535 EXT VBT15. 0x76b2d000 0x0000219f
1928 11:28:21.438777 COREBOOT 16. 0x76b25000 0x00008000
1929 11:28:21.441853 ACPI 17. 0x76b01000 0x00024000
1930 11:28:21.445244 ACPI GNVS 18. 0x76b00000 0x00001000
1931 11:28:21.448528 RAMOOPS 19. 0x76a00000 0x00100000
1932 11:28:21.452218 TPM2 TCGLOG20. 0x769f0000 0x00010000
1933 11:28:21.455077 SMBIOS 21. 0x769ef000 0x00000800
1934 11:28:21.458473 IMD small region:
1935 11:28:21.461778 IMD ROOT 0. 0x76ffec00 0x00000400
1936 11:28:21.465195 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1937 11:28:21.471637 POWER STATE 2. 0x76ffeb80 0x00000044
1938 11:28:21.475249 ROMSTAGE 3. 0x76ffeb60 0x00000004
1939 11:28:21.478546 MEM INFO 4. 0x76ffe980 0x000001e0
1940 11:28:21.484831 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1941 11:28:21.488182 MTRR: Physical address space:
1942 11:28:21.494579 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1943 11:28:21.498428 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1944 11:28:21.505234 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1945 11:28:21.511082 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1946 11:28:21.517635 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1947 11:28:21.524528 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1948 11:28:21.531247 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1949 11:28:21.534518 MTRR: Fixed MSR 0x250 0x0606060606060606
1950 11:28:21.537581 MTRR: Fixed MSR 0x258 0x0606060606060606
1951 11:28:21.544104 MTRR: Fixed MSR 0x259 0x0000000000000000
1952 11:28:21.547637 MTRR: Fixed MSR 0x268 0x0606060606060606
1953 11:28:21.551261 MTRR: Fixed MSR 0x269 0x0606060606060606
1954 11:28:21.554575 MTRR: Fixed MSR 0x26a 0x0606060606060606
1955 11:28:21.561371 MTRR: Fixed MSR 0x26b 0x0606060606060606
1956 11:28:21.564455 MTRR: Fixed MSR 0x26c 0x0606060606060606
1957 11:28:21.567896 MTRR: Fixed MSR 0x26d 0x0606060606060606
1958 11:28:21.571054 MTRR: Fixed MSR 0x26e 0x0606060606060606
1959 11:28:21.577259 MTRR: Fixed MSR 0x26f 0x0606060606060606
1960 11:28:21.580619 call enable_fixed_mtrr()
1961 11:28:21.583883 CPU physical address size: 39 bits
1962 11:28:21.587338 MTRR: default type WB/UC MTRR counts: 6/7.
1963 11:28:21.590555 MTRR: WB selected as default type.
1964 11:28:21.597421 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1965 11:28:21.603658 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1966 11:28:21.610683 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1967 11:28:21.617273 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1968 11:28:21.623521 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1969 11:28:21.630145 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1970 11:28:21.630242
1971 11:28:21.633870 MTRR check
1972 11:28:21.633974 Fixed MTRRs : Enabled
1973 11:28:21.637348 Variable MTRRs: Enabled
1974 11:28:21.637816
1975 11:28:21.643704 MTRR: Fixed MSR 0x250 0x0606060606060606
1976 11:28:21.647063 MTRR: Fixed MSR 0x258 0x0606060606060606
1977 11:28:21.650371 MTRR: Fixed MSR 0x259 0x0000000000000000
1978 11:28:21.653957 MTRR: Fixed MSR 0x268 0x0606060606060606
1979 11:28:21.657271 MTRR: Fixed MSR 0x269 0x0606060606060606
1980 11:28:21.663871 MTRR: Fixed MSR 0x26a 0x0606060606060606
1981 11:28:21.666718 MTRR: Fixed MSR 0x26b 0x0606060606060606
1982 11:28:21.670296 MTRR: Fixed MSR 0x26c 0x0606060606060606
1983 11:28:21.673573 MTRR: Fixed MSR 0x26d 0x0606060606060606
1984 11:28:21.679875 MTRR: Fixed MSR 0x26e 0x0606060606060606
1985 11:28:21.683317 MTRR: Fixed MSR 0x26f 0x0606060606060606
1986 11:28:21.690080 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
1987 11:28:21.693239 call enable_fixed_mtrr()
1988 11:28:21.696937 Checking cr50 for pending updates
1989 11:28:21.700405 CPU physical address size: 39 bits
1990 11:28:21.703775 MTRR: Fixed MSR 0x250 0x0606060606060606
1991 11:28:21.706768 MTRR: Fixed MSR 0x250 0x0606060606060606
1992 11:28:21.713670 MTRR: Fixed MSR 0x258 0x0606060606060606
1993 11:28:21.717043 MTRR: Fixed MSR 0x259 0x0000000000000000
1994 11:28:21.720194 MTRR: Fixed MSR 0x268 0x0606060606060606
1995 11:28:21.723375 MTRR: Fixed MSR 0x269 0x0606060606060606
1996 11:28:21.729986 MTRR: Fixed MSR 0x26a 0x0606060606060606
1997 11:28:21.733358 MTRR: Fixed MSR 0x26b 0x0606060606060606
1998 11:28:21.736940 MTRR: Fixed MSR 0x26c 0x0606060606060606
1999 11:28:21.740127 MTRR: Fixed MSR 0x26d 0x0606060606060606
2000 11:28:21.746796 MTRR: Fixed MSR 0x26e 0x0606060606060606
2001 11:28:21.749701 MTRR: Fixed MSR 0x26f 0x0606060606060606
2002 11:28:21.756541 MTRR: Fixed MSR 0x258 0x0606060606060606
2003 11:28:21.756778 call enable_fixed_mtrr()
2004 11:28:21.763550 MTRR: Fixed MSR 0x259 0x0000000000000000
2005 11:28:21.766504 MTRR: Fixed MSR 0x268 0x0606060606060606
2006 11:28:21.769428 MTRR: Fixed MSR 0x269 0x0606060606060606
2007 11:28:21.772952 MTRR: Fixed MSR 0x26a 0x0606060606060606
2008 11:28:21.779639 MTRR: Fixed MSR 0x26b 0x0606060606060606
2009 11:28:21.782912 MTRR: Fixed MSR 0x26c 0x0606060606060606
2010 11:28:21.786442 MTRR: Fixed MSR 0x26d 0x0606060606060606
2011 11:28:21.789457 MTRR: Fixed MSR 0x26e 0x0606060606060606
2012 11:28:21.792865 MTRR: Fixed MSR 0x26f 0x0606060606060606
2013 11:28:21.799260 CPU physical address size: 39 bits
2014 11:28:21.803274 call enable_fixed_mtrr()
2015 11:28:21.806350 Reading cr50 TPM mode
2016 11:28:21.809992 MTRR: Fixed MSR 0x250 0x0606060606060606
2017 11:28:21.813635 MTRR: Fixed MSR 0x250 0x0606060606060606
2018 11:28:21.819826 MTRR: Fixed MSR 0x258 0x0606060606060606
2019 11:28:21.823898 MTRR: Fixed MSR 0x259 0x0000000000000000
2020 11:28:21.826635 MTRR: Fixed MSR 0x268 0x0606060606060606
2021 11:28:21.829735 MTRR: Fixed MSR 0x269 0x0606060606060606
2022 11:28:21.833177 MTRR: Fixed MSR 0x26a 0x0606060606060606
2023 11:28:21.839770 MTRR: Fixed MSR 0x26b 0x0606060606060606
2024 11:28:21.843151 MTRR: Fixed MSR 0x26c 0x0606060606060606
2025 11:28:21.846467 MTRR: Fixed MSR 0x26d 0x0606060606060606
2026 11:28:21.849914 MTRR: Fixed MSR 0x26e 0x0606060606060606
2027 11:28:21.856306 MTRR: Fixed MSR 0x26f 0x0606060606060606
2028 11:28:21.859580 MTRR: Fixed MSR 0x258 0x0606060606060606
2029 11:28:21.862958 call enable_fixed_mtrr()
2030 11:28:21.866769 MTRR: Fixed MSR 0x259 0x0000000000000000
2031 11:28:21.872854 MTRR: Fixed MSR 0x268 0x0606060606060606
2032 11:28:21.876048 MTRR: Fixed MSR 0x269 0x0606060606060606
2033 11:28:21.879619 MTRR: Fixed MSR 0x26a 0x0606060606060606
2034 11:28:21.882852 MTRR: Fixed MSR 0x26b 0x0606060606060606
2035 11:28:21.889883 MTRR: Fixed MSR 0x26c 0x0606060606060606
2036 11:28:21.892984 MTRR: Fixed MSR 0x26d 0x0606060606060606
2037 11:28:21.895979 MTRR: Fixed MSR 0x26e 0x0606060606060606
2038 11:28:21.899078 MTRR: Fixed MSR 0x26f 0x0606060606060606
2039 11:28:21.904075 CPU physical address size: 39 bits
2040 11:28:21.910380 call enable_fixed_mtrr()
2041 11:28:21.913977 MTRR: Fixed MSR 0x250 0x0606060606060606
2042 11:28:21.917527 MTRR: Fixed MSR 0x250 0x0606060606060606
2043 11:28:21.921083 MTRR: Fixed MSR 0x258 0x0606060606060606
2044 11:28:21.927390 MTRR: Fixed MSR 0x259 0x0000000000000000
2045 11:28:21.930854 MTRR: Fixed MSR 0x268 0x0606060606060606
2046 11:28:21.934038 MTRR: Fixed MSR 0x269 0x0606060606060606
2047 11:28:21.937464 MTRR: Fixed MSR 0x26a 0x0606060606060606
2048 11:28:21.944295 MTRR: Fixed MSR 0x26b 0x0606060606060606
2049 11:28:21.947924 MTRR: Fixed MSR 0x26c 0x0606060606060606
2050 11:28:21.950687 MTRR: Fixed MSR 0x26d 0x0606060606060606
2051 11:28:21.954210 MTRR: Fixed MSR 0x26e 0x0606060606060606
2052 11:28:21.960553 MTRR: Fixed MSR 0x26f 0x0606060606060606
2053 11:28:21.963878 MTRR: Fixed MSR 0x258 0x0606060606060606
2054 11:28:21.970547 MTRR: Fixed MSR 0x259 0x0000000000000000
2055 11:28:21.973901 MTRR: Fixed MSR 0x268 0x0606060606060606
2056 11:28:21.977209 MTRR: Fixed MSR 0x269 0x0606060606060606
2057 11:28:21.980564 MTRR: Fixed MSR 0x26a 0x0606060606060606
2058 11:28:21.986851 MTRR: Fixed MSR 0x26b 0x0606060606060606
2059 11:28:21.990332 MTRR: Fixed MSR 0x26c 0x0606060606060606
2060 11:28:21.993770 MTRR: Fixed MSR 0x26d 0x0606060606060606
2061 11:28:21.997273 MTRR: Fixed MSR 0x26e 0x0606060606060606
2062 11:28:22.003531 MTRR: Fixed MSR 0x26f 0x0606060606060606
2063 11:28:22.006753 call enable_fixed_mtrr()
2064 11:28:22.010468 call enable_fixed_mtrr()
2065 11:28:22.013518 BS: BS_PAYLOAD_LOAD entry times (exec / console): 114 / 6 ms
2066 11:28:22.020231 CPU physical address size: 39 bits
2067 11:28:22.027321 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2068 11:28:22.030161 CPU physical address size: 39 bits
2069 11:28:22.033374 CPU physical address size: 39 bits
2070 11:28:22.039695 Checking segment from ROM address 0xffc02b38
2071 11:28:22.043306 CPU physical address size: 39 bits
2072 11:28:22.046569 Checking segment from ROM address 0xffc02b54
2073 11:28:22.053207 Loading segment from ROM address 0xffc02b38
2074 11:28:22.053534 code (compression=0)
2075 11:28:22.063247 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2076 11:28:22.069351 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2077 11:28:22.072961 it's not compressed!
2078 11:28:22.213255 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2079 11:28:22.219450 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2080 11:28:22.226375 Loading segment from ROM address 0xffc02b54
2081 11:28:22.229575 Entry Point 0x30000000
2082 11:28:22.229659 Loaded segments
2083 11:28:22.236269 BS: BS_PAYLOAD_LOAD run times (exec / console): 153 / 63 ms
2084 11:28:22.281644 Finalizing chipset.
2085 11:28:22.284660 Finalizing SMM.
2086 11:28:22.284744 APMC done.
2087 11:28:22.291368 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2088 11:28:22.295078 mp_park_aps done after 0 msecs.
2089 11:28:22.297893 Jumping to boot code at 0x30000000(0x76b25000)
2090 11:28:22.307827 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2091 11:28:22.307929
2092 11:28:22.311149
2093 11:28:22.311268
2094 11:28:22.311644 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2095 11:28:22.311764 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2096 11:28:22.311886 Setting prompt string to ['volteer:']
2097 11:28:22.311997 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2098 11:28:22.314494 Starting depthcharge on Voema...
2099 11:28:22.314576
2100 11:28:22.321078 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2101 11:28:22.321161
2102 11:28:22.327535 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2103 11:28:22.327649
2104 11:28:22.334146 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2105 11:28:22.334242
2106 11:28:22.337628 Failed to find eMMC card reader
2107 11:28:22.337710
2108 11:28:22.341046 Wipe memory regions:
2109 11:28:22.341117
2110 11:28:22.344296 [0x00000000001000, 0x000000000a0000)
2111 11:28:22.344383
2112 11:28:22.347333 [0x00000000100000, 0x00000030000000)
2113 11:28:22.382652
2114 11:28:22.385326 [0x00000032662db0, 0x000000769ef000)
2115 11:28:22.433336
2116 11:28:22.436310 [0x00000100000000, 0x00000480400000)
2117 11:28:23.042869
2118 11:28:23.046296 ec_init: CrosEC protocol v3 supported (256, 256)
2119 11:28:23.478259
2120 11:28:23.478417 R8152: Initializing
2121 11:28:23.478485
2122 11:28:23.481234 Version 6 (ocp_data = 5c30)
2123 11:28:23.481328
2124 11:28:23.484784 R8152: Done initializing
2125 11:28:23.484892
2126 11:28:23.487994 Adding net device
2127 11:28:23.790588
2128 11:28:23.793909 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2129 11:28:23.793998
2130 11:28:23.794084
2131 11:28:23.794169
2132 11:28:23.796973 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2134 11:28:23.897314 volteer: tftpboot 192.168.201.1 10657549/tftp-deploy-d7r2sadd/kernel/bzImage 10657549/tftp-deploy-d7r2sadd/kernel/cmdline 10657549/tftp-deploy-d7r2sadd/ramdisk/ramdisk.cpio.gz
2135 11:28:23.897507 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2136 11:28:23.897615 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2137 11:28:23.902042 tftpboot 192.168.201.1 10657549/tftp-deploy-d7r2sadd/kernel/bzIploy-d7r2sadd/kernel/cmdline 10657549/tftp-deploy-d7r2sadd/ramdisk/ramdisk.cpio.gz
2138 11:28:23.902129
2139 11:28:23.902213 Waiting for link
2140 11:28:24.104811
2141 11:28:24.104962 done.
2142 11:28:24.105054
2143 11:28:24.105135 MAC: 00:24:32:30:78:e4
2144 11:28:24.105213
2145 11:28:24.108099 Sending DHCP discover... done.
2146 11:28:24.108185
2147 11:28:24.111497 Waiting for reply... done.
2148 11:28:24.111581
2149 11:28:24.114553 Sending DHCP request... done.
2150 11:28:24.114639
2151 11:28:24.122539 Waiting for reply... done.
2152 11:28:24.122625
2153 11:28:24.122709 My ip is 192.168.201.13
2154 11:28:24.122789
2155 11:28:24.129148 The DHCP server ip is 192.168.201.1
2156 11:28:24.129230
2157 11:28:24.131984 TFTP server IP predefined by user: 192.168.201.1
2158 11:28:24.132065
2159 11:28:24.138678 Bootfile predefined by user: 10657549/tftp-deploy-d7r2sadd/kernel/bzImage
2160 11:28:24.138760
2161 11:28:24.141755 Sending tftp read request... done.
2162 11:28:24.141835
2163 11:28:24.148839 Waiting for the transfer...
2164 11:28:24.148921
2165 11:28:24.724651 00000000 ################################################################
2166 11:28:24.724818
2167 11:28:25.291496 00080000 ################################################################
2168 11:28:25.291641
2169 11:28:25.862955 00100000 ################################################################
2170 11:28:25.863097
2171 11:28:26.456769 00180000 ################################################################
2172 11:28:26.456907
2173 11:28:26.994709 00200000 ################################################################
2174 11:28:26.994857
2175 11:28:27.532386 00280000 ################################################################
2176 11:28:27.532535
2177 11:28:28.076904 00300000 ################################################################
2178 11:28:28.077052
2179 11:28:28.629211 00380000 ################################################################
2180 11:28:28.629358
2181 11:28:29.173883 00400000 ################################################################
2182 11:28:29.174028
2183 11:28:29.718094 00480000 ################################################################
2184 11:28:29.718239
2185 11:28:30.252217 00500000 ################################################################
2186 11:28:30.252387
2187 11:28:30.790339 00580000 ################################################################
2188 11:28:30.790488
2189 11:28:31.339257 00600000 ################################################################
2190 11:28:31.339414
2191 11:28:31.895371 00680000 ################################################################
2192 11:28:31.895515
2193 11:28:32.419259 00700000 ################################################################
2194 11:28:32.419403
2195 11:28:32.965467 00780000 ################################################################
2196 11:28:32.965644
2197 11:28:33.538708 00800000 ################################################################
2198 11:28:33.538836
2199 11:28:34.091910 00880000 ################################################################
2200 11:28:34.092047
2201 11:28:34.658523 00900000 ################################################################
2202 11:28:34.658659
2203 11:28:35.237046 00980000 ################################################################
2204 11:28:35.237203
2205 11:28:35.649515 00a00000 ############################################### done.
2206 11:28:35.649661
2207 11:28:35.652673 The bootfile was 10863104 bytes long.
2208 11:28:35.652757
2209 11:28:35.656120 Sending tftp read request... done.
2210 11:28:35.656203
2211 11:28:35.659943 Waiting for the transfer...
2212 11:28:35.660042
2213 11:28:36.271019 00000000 ################################################################
2214 11:28:36.271553
2215 11:28:36.878144 00080000 ################################################################
2216 11:28:36.878396
2217 11:28:37.420172 00100000 ################################################################
2218 11:28:37.420352
2219 11:28:37.961133 00180000 ################################################################
2220 11:28:37.961271
2221 11:28:38.507726 00200000 ################################################################
2222 11:28:38.507872
2223 11:28:39.047255 00280000 ################################################################
2224 11:28:39.047396
2225 11:28:39.564887 00300000 ################################################################
2226 11:28:39.565028
2227 11:28:40.081028 00380000 ################################################################
2228 11:28:40.081172
2229 11:28:40.600008 00400000 ################################################################
2230 11:28:40.600143
2231 11:28:41.126075 00480000 ################################################################
2232 11:28:41.126218
2233 11:28:41.647495 00500000 ################################################################
2234 11:28:41.647636
2235 11:28:42.163234 00580000 ################################################################
2236 11:28:42.163379
2237 11:28:42.684340 00600000 ################################################################
2238 11:28:42.684557
2239 11:28:43.269326 00680000 ################################################################
2240 11:28:43.269530
2241 11:28:43.804840 00700000 ################################################################
2242 11:28:43.804973
2243 11:28:44.331192 00780000 ################################################################
2244 11:28:44.331326
2245 11:28:44.848385 00800000 ################################################################
2246 11:28:44.848521
2247 11:28:45.149604 00880000 ###################################### done.
2248 11:28:45.149768
2249 11:28:45.153219 Sending tftp read request... done.
2250 11:28:45.153330
2251 11:28:45.156605 Waiting for the transfer...
2252 11:28:45.156709
2253 11:28:45.156811 00000000 # done.
2254 11:28:45.156888
2255 11:28:45.165946 Command line loaded dynamically from TFTP file: 10657549/tftp-deploy-d7r2sadd/kernel/cmdline
2256 11:28:45.166037
2257 11:28:45.179228 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2258 11:28:45.185593
2259 11:28:45.188348 Shutting down all USB controllers.
2260 11:28:45.188429
2261 11:28:45.188492 Removing current net device
2262 11:28:45.188552
2263 11:28:45.192010 Finalizing coreboot
2264 11:28:45.192118
2265 11:28:45.198337 Exiting depthcharge with code 4 at timestamp: 31526302
2266 11:28:45.198444
2267 11:28:45.198537
2268 11:28:45.198658 Starting kernel ...
2269 11:28:45.198719
2270 11:28:45.198776
2271 11:28:45.199143 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
2272 11:28:45.199237 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
2273 11:28:45.199315 Setting prompt string to ['Linux version [0-9]']
2274 11:28:45.199382 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2275 11:28:45.199448 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2277 11:33:07.199489 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
2279 11:33:07.199687 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
2281 11:33:07.199844 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2284 11:33:07.200132 end: 2 depthcharge-action (duration 00:05:00) [common]
2286 11:33:07.200429 Cleaning after the job
2287 11:33:07.200517 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10657549/tftp-deploy-d7r2sadd/ramdisk
2288 11:33:07.201708 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10657549/tftp-deploy-d7r2sadd/kernel
2289 11:33:07.202996 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10657549/tftp-deploy-d7r2sadd/modules
2290 11:33:07.203559 start: 5.1 power-off (timeout 00:00:30) [common]
2291 11:33:07.203728 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-12' '--port=1' '--command=off'
2292 11:33:07.278600 >> Command sent successfully.
2293 11:33:07.281026 Returned 0 in 0 seconds
2294 11:33:07.381426 end: 5.1 power-off (duration 00:00:00) [common]
2296 11:33:07.381799 start: 5.2 read-feedback (timeout 00:10:00) [common]
2297 11:33:07.382052 Listened to connection for namespace 'common' for up to 1s
2298 11:33:08.383049 Finalising connection for namespace 'common'
2299 11:33:08.383211 Disconnecting from shell: Finalise
2300 11:33:08.383284
2301 11:33:08.483619 end: 5.2 read-feedback (duration 00:00:01) [common]
2302 11:33:08.483777 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10657549
2303 11:33:08.498401 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10657549
2304 11:33:08.498541 JobError: Your job cannot terminate cleanly.