Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
1 11:27:59.570614 lava-dispatcher, installed at version: 2023.05.1
2 11:27:59.570812 start: 0 validate
3 11:27:59.570941 Start time: 2023-06-09 11:27:59.570934+00:00 (UTC)
4 11:27:59.571056 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:27:59.571181 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230527.0%2Famd64%2Finitrd.cpio.gz exists
6 11:27:59.573722 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:27:59.573863 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.283-cip98-224-g5f5303d7920a9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:28:07.584586 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:28:07.584805 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230527.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 11:28:07.845898 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:28:07.846231 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.283-cip98-224-g5f5303d7920a9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 11:28:08.847878 validate duration: 9.28
14 11:28:08.848290 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 11:28:08.848425 start: 1.1 download-retry (timeout 00:10:00) [common]
16 11:28:08.848543 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 11:28:08.848665 Not decompressing ramdisk as can be used compressed.
18 11:28:08.848754 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230527.0/amd64/initrd.cpio.gz
19 11:28:08.848834 saving as /var/lib/lava/dispatcher/tmp/10657575/tftp-deploy-hcrrd2bo/ramdisk/initrd.cpio.gz
20 11:28:08.848896 total size: 5432865 (5MB)
21 11:28:08.850105 progress 0% (0MB)
22 11:28:08.851849 progress 5% (0MB)
23 11:28:08.853410 progress 10% (0MB)
24 11:28:08.854911 progress 15% (0MB)
25 11:28:08.856635 progress 20% (1MB)
26 11:28:08.858107 progress 25% (1MB)
27 11:28:08.859634 progress 30% (1MB)
28 11:28:08.861322 progress 35% (1MB)
29 11:28:08.862769 progress 40% (2MB)
30 11:28:08.864240 progress 45% (2MB)
31 11:28:08.865742 progress 50% (2MB)
32 11:28:08.867451 progress 55% (2MB)
33 11:28:08.869080 progress 60% (3MB)
34 11:28:08.870542 progress 65% (3MB)
35 11:28:08.872216 progress 70% (3MB)
36 11:28:08.873732 progress 75% (3MB)
37 11:28:08.875247 progress 80% (4MB)
38 11:28:08.876784 progress 85% (4MB)
39 11:28:08.878424 progress 90% (4MB)
40 11:28:08.879906 progress 95% (4MB)
41 11:28:08.881476 progress 100% (5MB)
42 11:28:08.881693 5MB downloaded in 0.03s (158.00MB/s)
43 11:28:08.881850 end: 1.1.1 http-download (duration 00:00:00) [common]
45 11:28:08.882091 end: 1.1 download-retry (duration 00:00:00) [common]
46 11:28:08.882178 start: 1.2 download-retry (timeout 00:10:00) [common]
47 11:28:08.882304 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 11:28:08.882473 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.283-cip98-224-g5f5303d7920a9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 11:28:08.882576 saving as /var/lib/lava/dispatcher/tmp/10657575/tftp-deploy-hcrrd2bo/kernel/bzImage
50 11:28:08.882669 total size: 10863104 (10MB)
51 11:28:08.882763 No compression specified
52 11:28:08.884074 progress 0% (0MB)
53 11:28:08.887092 progress 5% (0MB)
54 11:28:08.890264 progress 10% (1MB)
55 11:28:08.893232 progress 15% (1MB)
56 11:28:08.896647 progress 20% (2MB)
57 11:28:08.899770 progress 25% (2MB)
58 11:28:08.902827 progress 30% (3MB)
59 11:28:08.905876 progress 35% (3MB)
60 11:28:08.908646 progress 40% (4MB)
61 11:28:08.911704 progress 45% (4MB)
62 11:28:08.914627 progress 50% (5MB)
63 11:28:08.917919 progress 55% (5MB)
64 11:28:08.920821 progress 60% (6MB)
65 11:28:08.923670 progress 65% (6MB)
66 11:28:08.926516 progress 70% (7MB)
67 11:28:08.929229 progress 75% (7MB)
68 11:28:08.932135 progress 80% (8MB)
69 11:28:08.934919 progress 85% (8MB)
70 11:28:08.938023 progress 90% (9MB)
71 11:28:08.940810 progress 95% (9MB)
72 11:28:08.943662 progress 100% (10MB)
73 11:28:08.943872 10MB downloaded in 0.06s (169.28MB/s)
74 11:28:08.944107 end: 1.2.1 http-download (duration 00:00:00) [common]
76 11:28:08.944377 end: 1.2 download-retry (duration 00:00:00) [common]
77 11:28:08.944469 start: 1.3 download-retry (timeout 00:10:00) [common]
78 11:28:08.944559 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 11:28:08.944681 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230527.0/amd64/full.rootfs.tar.xz
80 11:28:08.944754 saving as /var/lib/lava/dispatcher/tmp/10657575/tftp-deploy-hcrrd2bo/nfsrootfs/full.rootfs.tar
81 11:28:08.944816 total size: 133381488 (127MB)
82 11:28:08.944878 Using unxz to decompress xz
83 11:28:08.948823 progress 0% (0MB)
84 11:28:09.295176 progress 5% (6MB)
85 11:28:09.650175 progress 10% (12MB)
86 11:28:09.942887 progress 15% (19MB)
87 11:28:10.133447 progress 20% (25MB)
88 11:28:10.376278 progress 25% (31MB)
89 11:28:10.719384 progress 30% (38MB)
90 11:28:11.080245 progress 35% (44MB)
91 11:28:11.506994 progress 40% (50MB)
92 11:28:11.891823 progress 45% (57MB)
93 11:28:12.253894 progress 50% (63MB)
94 11:28:12.631890 progress 55% (69MB)
95 11:28:13.016062 progress 60% (76MB)
96 11:28:13.389458 progress 65% (82MB)
97 11:28:13.760561 progress 70% (89MB)
98 11:28:14.130614 progress 75% (95MB)
99 11:28:14.589879 progress 80% (101MB)
100 11:28:15.059305 progress 85% (108MB)
101 11:28:15.332304 progress 90% (114MB)
102 11:28:15.680728 progress 95% (120MB)
103 11:28:16.083160 progress 100% (127MB)
104 11:28:16.088725 127MB downloaded in 7.14s (17.81MB/s)
105 11:28:16.089050 end: 1.3.1 http-download (duration 00:00:07) [common]
107 11:28:16.089356 end: 1.3 download-retry (duration 00:00:07) [common]
108 11:28:16.089448 start: 1.4 download-retry (timeout 00:09:53) [common]
109 11:28:16.089537 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 11:28:16.089685 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.283-cip98-224-g5f5303d7920a9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 11:28:16.089757 saving as /var/lib/lava/dispatcher/tmp/10657575/tftp-deploy-hcrrd2bo/modules/modules.tar
112 11:28:16.089820 total size: 484428 (0MB)
113 11:28:16.089883 Using unxz to decompress xz
114 11:28:16.093446 progress 6% (0MB)
115 11:28:16.093830 progress 13% (0MB)
116 11:28:16.094070 progress 20% (0MB)
117 11:28:16.095526 progress 27% (0MB)
118 11:28:16.097698 progress 33% (0MB)
119 11:28:16.099902 progress 40% (0MB)
120 11:28:16.102469 progress 47% (0MB)
121 11:28:16.104690 progress 54% (0MB)
122 11:28:16.106483 progress 60% (0MB)
123 11:28:16.108517 progress 67% (0MB)
124 11:28:16.110608 progress 74% (0MB)
125 11:28:16.113009 progress 81% (0MB)
126 11:28:16.114905 progress 87% (0MB)
127 11:28:16.116989 progress 94% (0MB)
128 11:28:16.118830 progress 100% (0MB)
129 11:28:16.125188 0MB downloaded in 0.04s (13.07MB/s)
130 11:28:16.125531 end: 1.4.1 http-download (duration 00:00:00) [common]
132 11:28:16.125806 end: 1.4 download-retry (duration 00:00:00) [common]
133 11:28:16.125905 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
134 11:28:16.126039 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
135 11:28:18.113743 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10657575/extract-nfsrootfs-d0ydoo8o
136 11:28:18.113944 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
137 11:28:18.114044 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
138 11:28:18.114203 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10657575/lava-overlay-zj9vt9tf
139 11:28:18.114326 makedir: /var/lib/lava/dispatcher/tmp/10657575/lava-overlay-zj9vt9tf/lava-10657575/bin
140 11:28:18.114425 makedir: /var/lib/lava/dispatcher/tmp/10657575/lava-overlay-zj9vt9tf/lava-10657575/tests
141 11:28:18.114519 makedir: /var/lib/lava/dispatcher/tmp/10657575/lava-overlay-zj9vt9tf/lava-10657575/results
142 11:28:18.114619 Creating /var/lib/lava/dispatcher/tmp/10657575/lava-overlay-zj9vt9tf/lava-10657575/bin/lava-add-keys
143 11:28:18.114786 Creating /var/lib/lava/dispatcher/tmp/10657575/lava-overlay-zj9vt9tf/lava-10657575/bin/lava-add-sources
144 11:28:18.114910 Creating /var/lib/lava/dispatcher/tmp/10657575/lava-overlay-zj9vt9tf/lava-10657575/bin/lava-background-process-start
145 11:28:18.115033 Creating /var/lib/lava/dispatcher/tmp/10657575/lava-overlay-zj9vt9tf/lava-10657575/bin/lava-background-process-stop
146 11:28:18.115155 Creating /var/lib/lava/dispatcher/tmp/10657575/lava-overlay-zj9vt9tf/lava-10657575/bin/lava-common-functions
147 11:28:18.115273 Creating /var/lib/lava/dispatcher/tmp/10657575/lava-overlay-zj9vt9tf/lava-10657575/bin/lava-echo-ipv4
148 11:28:18.115392 Creating /var/lib/lava/dispatcher/tmp/10657575/lava-overlay-zj9vt9tf/lava-10657575/bin/lava-install-packages
149 11:28:18.115510 Creating /var/lib/lava/dispatcher/tmp/10657575/lava-overlay-zj9vt9tf/lava-10657575/bin/lava-installed-packages
150 11:28:18.115628 Creating /var/lib/lava/dispatcher/tmp/10657575/lava-overlay-zj9vt9tf/lava-10657575/bin/lava-os-build
151 11:28:18.115748 Creating /var/lib/lava/dispatcher/tmp/10657575/lava-overlay-zj9vt9tf/lava-10657575/bin/lava-probe-channel
152 11:28:18.115866 Creating /var/lib/lava/dispatcher/tmp/10657575/lava-overlay-zj9vt9tf/lava-10657575/bin/lava-probe-ip
153 11:28:18.115985 Creating /var/lib/lava/dispatcher/tmp/10657575/lava-overlay-zj9vt9tf/lava-10657575/bin/lava-target-ip
154 11:28:18.116167 Creating /var/lib/lava/dispatcher/tmp/10657575/lava-overlay-zj9vt9tf/lava-10657575/bin/lava-target-mac
155 11:28:18.116287 Creating /var/lib/lava/dispatcher/tmp/10657575/lava-overlay-zj9vt9tf/lava-10657575/bin/lava-target-storage
156 11:28:18.116413 Creating /var/lib/lava/dispatcher/tmp/10657575/lava-overlay-zj9vt9tf/lava-10657575/bin/lava-test-case
157 11:28:18.116533 Creating /var/lib/lava/dispatcher/tmp/10657575/lava-overlay-zj9vt9tf/lava-10657575/bin/lava-test-event
158 11:28:18.116691 Creating /var/lib/lava/dispatcher/tmp/10657575/lava-overlay-zj9vt9tf/lava-10657575/bin/lava-test-feedback
159 11:28:18.116820 Creating /var/lib/lava/dispatcher/tmp/10657575/lava-overlay-zj9vt9tf/lava-10657575/bin/lava-test-raise
160 11:28:18.116940 Creating /var/lib/lava/dispatcher/tmp/10657575/lava-overlay-zj9vt9tf/lava-10657575/bin/lava-test-reference
161 11:28:18.117060 Creating /var/lib/lava/dispatcher/tmp/10657575/lava-overlay-zj9vt9tf/lava-10657575/bin/lava-test-runner
162 11:28:18.117178 Creating /var/lib/lava/dispatcher/tmp/10657575/lava-overlay-zj9vt9tf/lava-10657575/bin/lava-test-set
163 11:28:18.117295 Creating /var/lib/lava/dispatcher/tmp/10657575/lava-overlay-zj9vt9tf/lava-10657575/bin/lava-test-shell
164 11:28:18.117413 Updating /var/lib/lava/dispatcher/tmp/10657575/lava-overlay-zj9vt9tf/lava-10657575/bin/lava-install-packages (oe)
165 11:28:18.117560 Updating /var/lib/lava/dispatcher/tmp/10657575/lava-overlay-zj9vt9tf/lava-10657575/bin/lava-installed-packages (oe)
166 11:28:18.117677 Creating /var/lib/lava/dispatcher/tmp/10657575/lava-overlay-zj9vt9tf/lava-10657575/environment
167 11:28:18.117770 LAVA metadata
168 11:28:18.117840 - LAVA_JOB_ID=10657575
169 11:28:18.117904 - LAVA_DISPATCHER_IP=192.168.201.1
170 11:28:18.118003 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
171 11:28:18.118072 skipped lava-vland-overlay
172 11:28:18.118146 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 11:28:18.118226 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
174 11:28:18.118288 skipped lava-multinode-overlay
175 11:28:18.118360 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 11:28:18.118438 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
177 11:28:18.118512 Loading test definitions
178 11:28:18.118602 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
179 11:28:18.118674 Using /lava-10657575 at stage 0
180 11:28:18.119001 uuid=10657575_1.5.2.3.1 testdef=None
181 11:28:18.119091 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
182 11:28:18.119178 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
183 11:28:18.119669 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
185 11:28:18.119896 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
186 11:28:18.120548 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
188 11:28:18.120781 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
189 11:28:18.121378 runner path: /var/lib/lava/dispatcher/tmp/10657575/lava-overlay-zj9vt9tf/lava-10657575/0/tests/0_dmesg test_uuid 10657575_1.5.2.3.1
190 11:28:18.121529 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
192 11:28:18.121755 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
193 11:28:18.121828 Using /lava-10657575 at stage 1
194 11:28:18.122107 uuid=10657575_1.5.2.3.5 testdef=None
195 11:28:18.122195 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
196 11:28:18.122279 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
197 11:28:18.122729 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
199 11:28:18.122946 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
200 11:28:18.123560 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
202 11:28:18.123790 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
203 11:28:18.124429 runner path: /var/lib/lava/dispatcher/tmp/10657575/lava-overlay-zj9vt9tf/lava-10657575/1/tests/1_bootrr test_uuid 10657575_1.5.2.3.5
204 11:28:18.124580 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
206 11:28:18.124787 Creating lava-test-runner.conf files
207 11:28:18.124850 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10657575/lava-overlay-zj9vt9tf/lava-10657575/0 for stage 0
208 11:28:18.124938 - 0_dmesg
209 11:28:18.125015 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10657575/lava-overlay-zj9vt9tf/lava-10657575/1 for stage 1
210 11:28:18.125103 - 1_bootrr
211 11:28:18.125194 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
212 11:28:18.125279 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
213 11:28:18.132508 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
214 11:28:18.132655 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
215 11:28:18.132750 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
216 11:28:18.132841 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
217 11:28:18.132928 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
218 11:28:18.266120 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
219 11:28:18.266490 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
220 11:28:18.266628 extracting modules file /var/lib/lava/dispatcher/tmp/10657575/tftp-deploy-hcrrd2bo/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10657575/extract-nfsrootfs-d0ydoo8o
221 11:28:18.287249 extracting modules file /var/lib/lava/dispatcher/tmp/10657575/tftp-deploy-hcrrd2bo/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10657575/extract-overlay-ramdisk-kiu5s_pv/ramdisk
222 11:28:18.306485 end: 1.5.4 extract-modules (duration 00:00:00) [common]
223 11:28:18.306657 start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
224 11:28:18.306768 [common] Applying overlay to NFS
225 11:28:18.306851 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10657575/compress-overlay-wk597k15/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10657575/extract-nfsrootfs-d0ydoo8o
226 11:28:18.317394 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
227 11:28:18.317539 start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
228 11:28:18.317637 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
229 11:28:18.317731 start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
230 11:28:18.317817 Building ramdisk /var/lib/lava/dispatcher/tmp/10657575/extract-overlay-ramdisk-kiu5s_pv/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10657575/extract-overlay-ramdisk-kiu5s_pv/ramdisk
231 11:28:18.398712 >> 30351 blocks
232 11:28:18.984164 rename /var/lib/lava/dispatcher/tmp/10657575/extract-overlay-ramdisk-kiu5s_pv/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10657575/tftp-deploy-hcrrd2bo/ramdisk/ramdisk.cpio.gz
233 11:28:18.984570 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
234 11:28:18.984697 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
235 11:28:18.984803 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
236 11:28:18.984899 No mkimage arch provided, not using FIT.
237 11:28:18.984994 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
238 11:28:18.985079 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
239 11:28:18.985187 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
240 11:28:18.985281 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
241 11:28:18.985364 No LXC device requested
242 11:28:18.985445 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
243 11:28:18.985536 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
244 11:28:18.985622 end: 1.7 deploy-device-env (duration 00:00:00) [common]
245 11:28:18.985699 Checking files for TFTP limit of 4294967296 bytes.
246 11:28:18.986099 end: 1 tftp-deploy (duration 00:00:10) [common]
247 11:28:18.986208 start: 2 depthcharge-action (timeout 00:05:00) [common]
248 11:28:18.986297 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
249 11:28:18.986424 substitutions:
250 11:28:18.986494 - {DTB}: None
251 11:28:18.986558 - {INITRD}: 10657575/tftp-deploy-hcrrd2bo/ramdisk/ramdisk.cpio.gz
252 11:28:18.986624 - {KERNEL}: 10657575/tftp-deploy-hcrrd2bo/kernel/bzImage
253 11:28:18.986685 - {LAVA_MAC}: None
254 11:28:18.986744 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10657575/extract-nfsrootfs-d0ydoo8o
255 11:28:18.986804 - {NFS_SERVER_IP}: 192.168.201.1
256 11:28:18.986891 - {PRESEED_CONFIG}: None
257 11:28:18.986981 - {PRESEED_LOCAL}: None
258 11:28:18.987069 - {RAMDISK}: 10657575/tftp-deploy-hcrrd2bo/ramdisk/ramdisk.cpio.gz
259 11:28:18.987157 - {ROOT_PART}: None
260 11:28:18.987219 - {ROOT}: None
261 11:28:18.987278 - {SERVER_IP}: 192.168.201.1
262 11:28:18.987336 - {TEE}: None
263 11:28:18.987394 Parsed boot commands:
264 11:28:18.987452 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
265 11:28:18.987626 Parsed boot commands: tftpboot 192.168.201.1 10657575/tftp-deploy-hcrrd2bo/kernel/bzImage 10657575/tftp-deploy-hcrrd2bo/kernel/cmdline 10657575/tftp-deploy-hcrrd2bo/ramdisk/ramdisk.cpio.gz
266 11:28:18.987718 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
267 11:28:18.987805 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
268 11:28:18.987900 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
269 11:28:18.987999 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
270 11:28:18.988113 Not connected, no need to disconnect.
271 11:28:18.988192 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
272 11:28:18.988277 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
273 11:28:18.988345 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-5'
274 11:28:18.991739 Setting prompt string to ['lava-test: # ']
275 11:28:18.992195 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
276 11:28:18.992315 end: 2.2.1 reset-connection (duration 00:00:00) [common]
277 11:28:18.992410 start: 2.2.2 reset-device (timeout 00:05:00) [common]
278 11:28:18.992504 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
279 11:28:18.992898 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-5' '--port=1' '--command=reboot'
280 11:28:24.141484 >> Command sent successfully.
281 11:28:24.151654 Returned 0 in 5 seconds
282 11:28:24.252993 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
284 11:28:24.254423 end: 2.2.2 reset-device (duration 00:00:05) [common]
285 11:28:24.254926 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
286 11:28:24.255409 Setting prompt string to 'Starting depthcharge on Voema...'
287 11:28:24.255771 Changing prompt to 'Starting depthcharge on Voema...'
288 11:28:24.256165 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
289 11:28:24.257338 [Enter `^Ec?' for help]
290 11:28:25.847380
291 11:28:25.847821
292 11:28:25.857500 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
293 11:28:25.861004 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
294 11:28:25.867679 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
295 11:28:25.871542 CPU: AES supported, TXT NOT supported, VT supported
296 11:28:25.877418 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
297 11:28:25.880849 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
298 11:28:25.887596 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
299 11:28:25.890664 VBOOT: Loading verstage.
300 11:28:25.894063 FMAP: Found "FLASH" version 1.1 at 0x1804000.
301 11:28:25.900935 FMAP: base = 0x0 size = 0x2000000 #areas = 32
302 11:28:25.904304 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
303 11:28:25.914732 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
304 11:28:25.920951 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
305 11:28:25.921281
306 11:28:25.921540
307 11:28:25.934222 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
308 11:28:25.948102 Probing TPM: . done!
309 11:28:25.951097 TPM ready after 0 ms
310 11:28:25.954972 Connected to device vid:did:rid of 1ae0:0028:00
311 11:28:25.966469 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
312 11:28:25.973025 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
313 11:28:25.976544 Initialized TPM device CR50 revision 0
314 11:28:26.026685 tlcl_send_startup: Startup return code is 0
315 11:28:26.027234 TPM: setup succeeded
316 11:28:26.042523 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
317 11:28:26.056180 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
318 11:28:26.069265 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
319 11:28:26.079250 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
320 11:28:26.082643 Chrome EC: UHEPI supported
321 11:28:26.086212 Phase 1
322 11:28:26.089436 FMAP: area GBB found @ 1805000 (458752 bytes)
323 11:28:26.096101 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
324 11:28:26.106212 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
325 11:28:26.112440 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
326 11:28:26.119047 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
327 11:28:26.122517 Recovery requested (1009000e)
328 11:28:26.126236 TPM: Extending digest for VBOOT: boot mode into PCR 0
329 11:28:26.137512 tlcl_extend: response is 0
330 11:28:26.144126 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
331 11:28:26.154006 tlcl_extend: response is 0
332 11:28:26.160665 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
333 11:28:26.166993 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
334 11:28:26.173729 BS: verstage times (exec / console): total (unknown) / 142 ms
335 11:28:26.174359
336 11:28:26.174919
337 11:28:26.187055 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
338 11:28:26.193215 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
339 11:28:26.196971 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
340 11:28:26.200714 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
341 11:28:26.206805 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
342 11:28:26.210573 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
343 11:28:26.213739 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
344 11:28:26.216594 TCO_STS: 0000 0000
345 11:28:26.219972 GEN_PMCON: d0015038 00002200
346 11:28:26.223384 GBLRST_CAUSE: 00000000 00000000
347 11:28:26.223830 HPR_CAUSE0: 00000000
348 11:28:26.226690 prev_sleep_state 5
349 11:28:26.230044 Boot Count incremented to 20268
350 11:28:26.237003 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
351 11:28:26.243597 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
352 11:28:26.250461 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
353 11:28:26.257103 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
354 11:28:26.261048 Chrome EC: UHEPI supported
355 11:28:26.267737 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
356 11:28:26.280338 Probing TPM: done!
357 11:28:26.286840 Connected to device vid:did:rid of 1ae0:0028:00
358 11:28:26.298240 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
359 11:28:26.305000 Initialized TPM device CR50 revision 0
360 11:28:26.315384 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
361 11:28:26.321810 MRC: Hash idx 0x100b comparison successful.
362 11:28:26.325271 MRC cache found, size faa8
363 11:28:26.325371 bootmode is set to: 2
364 11:28:26.328626 SPD index = 0
365 11:28:26.335226 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
366 11:28:26.338664 SPD: module type is LPDDR4X
367 11:28:26.345117 SPD: module part number is MT53E512M64D4NW-046
368 11:28:26.348290 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
369 11:28:26.355060 SPD: device width 16 bits, bus width 16 bits
370 11:28:26.358478 SPD: module size is 1024 MB (per channel)
371 11:28:26.791999 CBMEM:
372 11:28:26.795383 IMD: root @ 0x76fff000 254 entries.
373 11:28:26.798387 IMD: root @ 0x76ffec00 62 entries.
374 11:28:26.802473 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
375 11:28:26.808828 FMAP: area RW_VPD found @ f35000 (8192 bytes)
376 11:28:26.811850 External stage cache:
377 11:28:26.814992 IMD: root @ 0x7b3ff000 254 entries.
378 11:28:26.818334 IMD: root @ 0x7b3fec00 62 entries.
379 11:28:26.833762 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
380 11:28:26.840394 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
381 11:28:26.846982 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
382 11:28:26.861147 MRC: 'RECOVERY_MRC_CACHE' does not need update.
383 11:28:26.867404 cse_lite: Skip switching to RW in the recovery path
384 11:28:26.867522 8 DIMMs found
385 11:28:26.867597 SMM Memory Map
386 11:28:26.871367 SMRAM : 0x7b000000 0x800000
387 11:28:26.875075 Subregion 0: 0x7b000000 0x200000
388 11:28:26.879051 Subregion 1: 0x7b200000 0x200000
389 11:28:26.882420 Subregion 2: 0x7b400000 0x400000
390 11:28:26.885846 top_of_ram = 0x77000000
391 11:28:26.892382 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
392 11:28:26.895565 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
393 11:28:26.902227 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
394 11:28:26.905434 MTRR Range: Start=ff000000 End=0 (Size 1000000)
395 11:28:26.911849 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
396 11:28:26.918906 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
397 11:28:26.930555 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
398 11:28:26.933964 Processing 211 relocs. Offset value of 0x74c0b000
399 11:28:26.943583 BS: romstage times (exec / console): total (unknown) / 277 ms
400 11:28:26.950029
401 11:28:26.950125
402 11:28:26.959740 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
403 11:28:26.963276 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
404 11:28:26.973098 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
405 11:28:26.979820 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
406 11:28:26.986683 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
407 11:28:26.993184 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
408 11:28:27.039899 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
409 11:28:27.046118 Processing 5008 relocs. Offset value of 0x75d98000
410 11:28:27.049816 BS: postcar times (exec / console): total (unknown) / 59 ms
411 11:28:27.053260
412 11:28:27.053347
413 11:28:27.063231 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
414 11:28:27.063325 Normal boot
415 11:28:27.066773 FW_CONFIG value is 0x804c02
416 11:28:27.069666 PCI: 00:07.0 disabled by fw_config
417 11:28:27.073198 PCI: 00:07.1 disabled by fw_config
418 11:28:27.076587 PCI: 00:0d.2 disabled by fw_config
419 11:28:27.082990 PCI: 00:1c.7 disabled by fw_config
420 11:28:27.086637 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
421 11:28:27.092920 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
422 11:28:27.096251 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
423 11:28:27.103126 GENERIC: 0.0 disabled by fw_config
424 11:28:27.106049 GENERIC: 1.0 disabled by fw_config
425 11:28:27.109298 fw_config match found: DB_USB=USB3_ACTIVE
426 11:28:27.112805 fw_config match found: DB_USB=USB3_ACTIVE
427 11:28:27.116224 fw_config match found: DB_USB=USB3_ACTIVE
428 11:28:27.122750 fw_config match found: DB_USB=USB3_ACTIVE
429 11:28:27.125865 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
430 11:28:27.132857 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
431 11:28:27.142637 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
432 11:28:27.149632 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
433 11:28:27.152688 microcode: sig=0x806c1 pf=0x80 revision=0x86
434 11:28:27.159445 microcode: Update skipped, already up-to-date
435 11:28:27.166169 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
436 11:28:27.193429 Detected 4 core, 8 thread CPU.
437 11:28:27.196815 Setting up SMI for CPU
438 11:28:27.200222 IED base = 0x7b400000
439 11:28:27.200300 IED size = 0x00400000
440 11:28:27.203755 Will perform SMM setup.
441 11:28:27.210250 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
442 11:28:27.216616 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
443 11:28:27.223650 Processing 16 relocs. Offset value of 0x00030000
444 11:28:27.227019 Attempting to start 7 APs
445 11:28:27.230410 Waiting for 10ms after sending INIT.
446 11:28:27.245548 Waiting for 1st SIPI to complete...done.
447 11:28:27.245640 AP: slot 1 apic_id 1.
448 11:28:27.252462 Waiting for 2nd SIPI to complete...done.
449 11:28:27.252549 AP: slot 5 apic_id 6.
450 11:28:27.255640 AP: slot 4 apic_id 7.
451 11:28:27.258667 AP: slot 7 apic_id 5.
452 11:28:27.258754 AP: slot 3 apic_id 4.
453 11:28:27.262325 AP: slot 2 apic_id 3.
454 11:28:27.265772 AP: slot 6 apic_id 2.
455 11:28:27.272016 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
456 11:28:27.279070 Processing 13 relocs. Offset value of 0x00038000
457 11:28:27.279161 Unable to locate Global NVS
458 11:28:27.288684 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
459 11:28:27.292417 Installing permanent SMM handler to 0x7b000000
460 11:28:27.302203 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
461 11:28:27.305616 Processing 794 relocs. Offset value of 0x7b010000
462 11:28:27.311886 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
463 11:28:27.318613 Processing 13 relocs. Offset value of 0x7b008000
464 11:28:27.325320 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
465 11:28:27.331908 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
466 11:28:27.335284 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
467 11:28:27.342417 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
468 11:28:27.348640 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
469 11:28:27.355355 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
470 11:28:27.358645 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
471 11:28:27.362039 Unable to locate Global NVS
472 11:28:27.368965 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
473 11:28:27.373517 Clearing SMI status registers
474 11:28:27.376623 SMI_STS: PM1
475 11:28:27.376703 PM1_STS: PWRBTN
476 11:28:27.387058 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
477 11:28:27.387172 In relocation handler: CPU 0
478 11:28:27.393367 New SMBASE=0x7b000000 IEDBASE=0x7b400000
479 11:28:27.396922 Writing SMRR. base = 0x7b000006, mask=0xff800c00
480 11:28:27.400140 Relocation complete.
481 11:28:27.407226 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
482 11:28:27.410027 In relocation handler: CPU 1
483 11:28:27.413561 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
484 11:28:27.416919 Relocation complete.
485 11:28:27.423728 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
486 11:28:27.427092 In relocation handler: CPU 4
487 11:28:27.429953 New SMBASE=0x7afff000 IEDBASE=0x7b400000
488 11:28:27.433333 Relocation complete.
489 11:28:27.440166 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
490 11:28:27.443448 In relocation handler: CPU 5
491 11:28:27.446614 New SMBASE=0x7affec00 IEDBASE=0x7b400000
492 11:28:27.449813 Writing SMRR. base = 0x7b000006, mask=0xff800c00
493 11:28:27.453629 Relocation complete.
494 11:28:27.460212 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
495 11:28:27.463593 In relocation handler: CPU 2
496 11:28:27.466910 New SMBASE=0x7afff800 IEDBASE=0x7b400000
497 11:28:27.470589 Relocation complete.
498 11:28:27.476853 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
499 11:28:27.479972 In relocation handler: CPU 6
500 11:28:27.483407 New SMBASE=0x7affe800 IEDBASE=0x7b400000
501 11:28:27.490336 Writing SMRR. base = 0x7b000006, mask=0xff800c00
502 11:28:27.490443 Relocation complete.
503 11:28:27.500135 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
504 11:28:27.503535 In relocation handler: CPU 3
505 11:28:27.506825 New SMBASE=0x7afff400 IEDBASE=0x7b400000
506 11:28:27.510245 Writing SMRR. base = 0x7b000006, mask=0xff800c00
507 11:28:27.513653 Relocation complete.
508 11:28:27.520587 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
509 11:28:27.523792 In relocation handler: CPU 7
510 11:28:27.526690 New SMBASE=0x7affe400 IEDBASE=0x7b400000
511 11:28:27.530446 Relocation complete.
512 11:28:27.530529 Initializing CPU #0
513 11:28:27.533582 CPU: vendor Intel device 806c1
514 11:28:27.537036 CPU: family 06, model 8c, stepping 01
515 11:28:27.541456 Clearing out pending MCEs
516 11:28:27.543998 Setting up local APIC...
517 11:28:27.547487 apic_id: 0x00 done.
518 11:28:27.550729 Turbo is available but hidden
519 11:28:27.550817 Turbo is available and visible
520 11:28:27.557370 microcode: Update skipped, already up-to-date
521 11:28:27.560632 CPU #0 initialized
522 11:28:27.560734 Initializing CPU #4
523 11:28:27.564392 Initializing CPU #6
524 11:28:27.564504 Initializing CPU #2
525 11:28:27.567411 CPU: vendor Intel device 806c1
526 11:28:27.570635 CPU: family 06, model 8c, stepping 01
527 11:28:27.573984 CPU: vendor Intel device 806c1
528 11:28:27.580593 CPU: family 06, model 8c, stepping 01
529 11:28:27.580679 Clearing out pending MCEs
530 11:28:27.583794 Clearing out pending MCEs
531 11:28:27.587207 Setting up local APIC...
532 11:28:27.590578 Initializing CPU #1
533 11:28:27.590656 Initializing CPU #5
534 11:28:27.594054 CPU: vendor Intel device 806c1
535 11:28:27.597437 CPU: family 06, model 8c, stepping 01
536 11:28:27.600736 CPU: vendor Intel device 806c1
537 11:28:27.604295 CPU: family 06, model 8c, stepping 01
538 11:28:27.607119 Clearing out pending MCEs
539 11:28:27.610530 Initializing CPU #3
540 11:28:27.610605 Setting up local APIC...
541 11:28:27.613936 CPU: vendor Intel device 806c1
542 11:28:27.620551 CPU: family 06, model 8c, stepping 01
543 11:28:27.620628 apic_id: 0x03 done.
544 11:28:27.624079 apic_id: 0x02 done.
545 11:28:27.627520 microcode: Update skipped, already up-to-date
546 11:28:27.630913 CPU: vendor Intel device 806c1
547 11:28:27.634203 CPU: family 06, model 8c, stepping 01
548 11:28:27.637183 Initializing CPU #7
549 11:28:27.640405 Clearing out pending MCEs
550 11:28:27.643777 CPU: vendor Intel device 806c1
551 11:28:27.647361 CPU: family 06, model 8c, stepping 01
552 11:28:27.650681 Setting up local APIC...
553 11:28:27.654032 microcode: Update skipped, already up-to-date
554 11:28:27.657196 CPU #2 initialized
555 11:28:27.657280 CPU #6 initialized
556 11:28:27.660525 Clearing out pending MCEs
557 11:28:27.663992 Clearing out pending MCEs
558 11:28:27.664076 apic_id: 0x04 done.
559 11:28:27.667174 Setting up local APIC...
560 11:28:27.670400 microcode: Update skipped, already up-to-date
561 11:28:27.673728 apic_id: 0x05 done.
562 11:28:27.677397 CPU #3 initialized
563 11:28:27.680808 microcode: Update skipped, already up-to-date
564 11:28:27.684142 Setting up local APIC...
565 11:28:27.684229 CPU #7 initialized
566 11:28:27.687258 Setting up local APIC...
567 11:28:27.690763 apic_id: 0x01 done.
568 11:28:27.690846 apic_id: 0x07 done.
569 11:28:27.693705 Clearing out pending MCEs
570 11:28:27.700463 microcode: Update skipped, already up-to-date
571 11:28:27.700543 Setting up local APIC...
572 11:28:27.707307 microcode: Update skipped, already up-to-date
573 11:28:27.707390 CPU #4 initialized
574 11:28:27.710205 apic_id: 0x06 done.
575 11:28:27.713628 CPU #1 initialized
576 11:28:27.717065 microcode: Update skipped, already up-to-date
577 11:28:27.720302 CPU #5 initialized
578 11:28:27.723692 bsp_do_flight_plan done after 468 msecs.
579 11:28:27.727189 CPU: frequency set to 4000 MHz
580 11:28:27.727272 Enabling SMIs.
581 11:28:27.733724 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
582 11:28:27.750835 SATAXPCIE1 indicates PCIe NVMe is present
583 11:28:27.753769 Probing TPM: done!
584 11:28:27.757251 Connected to device vid:did:rid of 1ae0:0028:00
585 11:28:27.767900 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
586 11:28:27.771706 Initialized TPM device CR50 revision 0
587 11:28:27.774783 Enabling S0i3.4
588 11:28:27.781206 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
589 11:28:27.784755 Found a VBT of 8704 bytes after decompression
590 11:28:27.791349 cse_lite: CSE RO boot. HybridStorageMode disabled
591 11:28:27.797762 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
592 11:28:27.872779 FSPS returned 0
593 11:28:27.876204 Executing Phase 1 of FspMultiPhaseSiInit
594 11:28:27.886028 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
595 11:28:27.889398 port C0 DISC req: usage 1 usb3 1 usb2 5
596 11:28:27.892804 Raw Buffer output 0 00000511
597 11:28:27.896224 Raw Buffer output 1 00000000
598 11:28:27.899651 pmc_send_ipc_cmd succeeded
599 11:28:27.906494 port C1 DISC req: usage 1 usb3 2 usb2 3
600 11:28:27.906581 Raw Buffer output 0 00000321
601 11:28:27.909822 Raw Buffer output 1 00000000
602 11:28:27.913735 pmc_send_ipc_cmd succeeded
603 11:28:27.918744 Detected 4 core, 8 thread CPU.
604 11:28:27.922156 Detected 4 core, 8 thread CPU.
605 11:28:28.156393 Display FSP Version Info HOB
606 11:28:28.159396 Reference Code - CPU = a.0.4c.31
607 11:28:28.162756 uCode Version = 0.0.0.86
608 11:28:28.166102 TXT ACM version = ff.ff.ff.ffff
609 11:28:28.169298 Reference Code - ME = a.0.4c.31
610 11:28:28.172539 MEBx version = 0.0.0.0
611 11:28:28.176000 ME Firmware Version = Consumer SKU
612 11:28:28.179429 Reference Code - PCH = a.0.4c.31
613 11:28:28.182892 PCH-CRID Status = Disabled
614 11:28:28.185686 PCH-CRID Original Value = ff.ff.ff.ffff
615 11:28:28.189443 PCH-CRID New Value = ff.ff.ff.ffff
616 11:28:28.192791 OPROM - RST - RAID = ff.ff.ff.ffff
617 11:28:28.195613 PCH Hsio Version = 4.0.0.0
618 11:28:28.199130 Reference Code - SA - System Agent = a.0.4c.31
619 11:28:28.202419 Reference Code - MRC = 2.0.0.1
620 11:28:28.205604 SA - PCIe Version = a.0.4c.31
621 11:28:28.209357 SA-CRID Status = Disabled
622 11:28:28.212321 SA-CRID Original Value = 0.0.0.1
623 11:28:28.215645 SA-CRID New Value = 0.0.0.1
624 11:28:28.219183 OPROM - VBIOS = ff.ff.ff.ffff
625 11:28:28.222542 IO Manageability Engine FW Version = 11.1.4.0
626 11:28:28.225872 PHY Build Version = 0.0.0.e0
627 11:28:28.229119 Thunderbolt(TM) FW Version = 0.0.0.0
628 11:28:28.236542 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
629 11:28:28.236654 ITSS IRQ Polarities Before:
630 11:28:28.239841 IPC0: 0xffffffff
631 11:28:28.243296 IPC1: 0xffffffff
632 11:28:28.243411 IPC2: 0xffffffff
633 11:28:28.246208 IPC3: 0xffffffff
634 11:28:28.246286 ITSS IRQ Polarities After:
635 11:28:28.249617 IPC0: 0xffffffff
636 11:28:28.249718 IPC1: 0xffffffff
637 11:28:28.253047 IPC2: 0xffffffff
638 11:28:28.256644 IPC3: 0xffffffff
639 11:28:28.259993 Found PCIe Root Port #9 at PCI: 00:1d.0.
640 11:28:28.269664 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
641 11:28:28.283450 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
642 11:28:28.296445 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
643 11:28:28.302597 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
644 11:28:28.302685 Enumerating buses...
645 11:28:28.310086 Show all devs... Before device enumeration.
646 11:28:28.310172 Root Device: enabled 1
647 11:28:28.313290 DOMAIN: 0000: enabled 1
648 11:28:28.315843 CPU_CLUSTER: 0: enabled 1
649 11:28:28.319291 PCI: 00:00.0: enabled 1
650 11:28:28.319369 PCI: 00:02.0: enabled 1
651 11:28:28.322572 PCI: 00:04.0: enabled 1
652 11:28:28.326069 PCI: 00:05.0: enabled 1
653 11:28:28.326176 PCI: 00:06.0: enabled 0
654 11:28:28.329302 PCI: 00:07.0: enabled 0
655 11:28:28.332589 PCI: 00:07.1: enabled 0
656 11:28:28.336212 PCI: 00:07.2: enabled 0
657 11:28:28.336319 PCI: 00:07.3: enabled 0
658 11:28:28.339197 PCI: 00:08.0: enabled 1
659 11:28:28.342727 PCI: 00:09.0: enabled 0
660 11:28:28.346644 PCI: 00:0a.0: enabled 0
661 11:28:28.346750 PCI: 00:0d.0: enabled 1
662 11:28:28.349456 PCI: 00:0d.1: enabled 0
663 11:28:28.352754 PCI: 00:0d.2: enabled 0
664 11:28:28.356306 PCI: 00:0d.3: enabled 0
665 11:28:28.356379 PCI: 00:0e.0: enabled 0
666 11:28:28.359715 PCI: 00:10.2: enabled 1
667 11:28:28.362659 PCI: 00:10.6: enabled 0
668 11:28:28.362764 PCI: 00:10.7: enabled 0
669 11:28:28.365996 PCI: 00:12.0: enabled 0
670 11:28:28.369700 PCI: 00:12.6: enabled 0
671 11:28:28.372571 PCI: 00:13.0: enabled 0
672 11:28:28.372648 PCI: 00:14.0: enabled 1
673 11:28:28.376000 PCI: 00:14.1: enabled 0
674 11:28:28.379453 PCI: 00:14.2: enabled 1
675 11:28:28.382897 PCI: 00:14.3: enabled 1
676 11:28:28.382982 PCI: 00:15.0: enabled 1
677 11:28:28.386370 PCI: 00:15.1: enabled 1
678 11:28:28.389557 PCI: 00:15.2: enabled 1
679 11:28:28.392743 PCI: 00:15.3: enabled 1
680 11:28:28.392830 PCI: 00:16.0: enabled 1
681 11:28:28.396165 PCI: 00:16.1: enabled 0
682 11:28:28.399570 PCI: 00:16.2: enabled 0
683 11:28:28.399657 PCI: 00:16.3: enabled 0
684 11:28:28.402606 PCI: 00:16.4: enabled 0
685 11:28:28.406123 PCI: 00:16.5: enabled 0
686 11:28:28.409392 PCI: 00:17.0: enabled 1
687 11:28:28.409481 PCI: 00:19.0: enabled 0
688 11:28:28.412716 PCI: 00:19.1: enabled 1
689 11:28:28.416148 PCI: 00:19.2: enabled 0
690 11:28:28.419346 PCI: 00:1c.0: enabled 1
691 11:28:28.419433 PCI: 00:1c.1: enabled 0
692 11:28:28.422877 PCI: 00:1c.2: enabled 0
693 11:28:28.426328 PCI: 00:1c.3: enabled 0
694 11:28:28.429251 PCI: 00:1c.4: enabled 0
695 11:28:28.429339 PCI: 00:1c.5: enabled 0
696 11:28:28.432635 PCI: 00:1c.6: enabled 1
697 11:28:28.436076 PCI: 00:1c.7: enabled 0
698 11:28:28.436163 PCI: 00:1d.0: enabled 1
699 11:28:28.439171 PCI: 00:1d.1: enabled 0
700 11:28:28.442764 PCI: 00:1d.2: enabled 1
701 11:28:28.446231 PCI: 00:1d.3: enabled 0
702 11:28:28.446317 PCI: 00:1e.0: enabled 1
703 11:28:28.449438 PCI: 00:1e.1: enabled 0
704 11:28:28.452828 PCI: 00:1e.2: enabled 1
705 11:28:28.455912 PCI: 00:1e.3: enabled 1
706 11:28:28.455997 PCI: 00:1f.0: enabled 1
707 11:28:28.459183 PCI: 00:1f.1: enabled 0
708 11:28:28.462583 PCI: 00:1f.2: enabled 1
709 11:28:28.465990 PCI: 00:1f.3: enabled 1
710 11:28:28.466100 PCI: 00:1f.4: enabled 0
711 11:28:28.469620 PCI: 00:1f.5: enabled 1
712 11:28:28.472422 PCI: 00:1f.6: enabled 0
713 11:28:28.476347 PCI: 00:1f.7: enabled 0
714 11:28:28.476433 APIC: 00: enabled 1
715 11:28:28.479111 GENERIC: 0.0: enabled 1
716 11:28:28.482583 GENERIC: 0.0: enabled 1
717 11:28:28.482669 GENERIC: 1.0: enabled 1
718 11:28:28.486038 GENERIC: 0.0: enabled 1
719 11:28:28.489225 GENERIC: 1.0: enabled 1
720 11:28:28.492845 USB0 port 0: enabled 1
721 11:28:28.492930 GENERIC: 0.0: enabled 1
722 11:28:28.495869 USB0 port 0: enabled 1
723 11:28:28.499195 GENERIC: 0.0: enabled 1
724 11:28:28.499281 I2C: 00:1a: enabled 1
725 11:28:28.502532 I2C: 00:31: enabled 1
726 11:28:28.505752 I2C: 00:32: enabled 1
727 11:28:28.505837 I2C: 00:10: enabled 1
728 11:28:28.509120 I2C: 00:15: enabled 1
729 11:28:28.512495 GENERIC: 0.0: enabled 0
730 11:28:28.515746 GENERIC: 1.0: enabled 0
731 11:28:28.515885 GENERIC: 0.0: enabled 1
732 11:28:28.519016 SPI: 00: enabled 1
733 11:28:28.519101 SPI: 00: enabled 1
734 11:28:28.522353 PNP: 0c09.0: enabled 1
735 11:28:28.525828 GENERIC: 0.0: enabled 1
736 11:28:28.529284 USB3 port 0: enabled 1
737 11:28:28.529370 USB3 port 1: enabled 1
738 11:28:28.532932 USB3 port 2: enabled 0
739 11:28:28.535998 USB3 port 3: enabled 0
740 11:28:28.536112 USB2 port 0: enabled 0
741 11:28:28.539277 USB2 port 1: enabled 1
742 11:28:28.542271 USB2 port 2: enabled 1
743 11:28:28.545675 USB2 port 3: enabled 0
744 11:28:28.545761 USB2 port 4: enabled 1
745 11:28:28.549176 USB2 port 5: enabled 0
746 11:28:28.552361 USB2 port 6: enabled 0
747 11:28:28.552446 USB2 port 7: enabled 0
748 11:28:28.555665 USB2 port 8: enabled 0
749 11:28:28.558909 USB2 port 9: enabled 0
750 11:28:28.558994 USB3 port 0: enabled 0
751 11:28:28.562438 USB3 port 1: enabled 1
752 11:28:28.565658 USB3 port 2: enabled 0
753 11:28:28.568917 USB3 port 3: enabled 0
754 11:28:28.569002 GENERIC: 0.0: enabled 1
755 11:28:28.572406 GENERIC: 1.0: enabled 1
756 11:28:28.575732 APIC: 01: enabled 1
757 11:28:28.575816 APIC: 03: enabled 1
758 11:28:28.579067 APIC: 04: enabled 1
759 11:28:28.582384 APIC: 07: enabled 1
760 11:28:28.582469 APIC: 06: enabled 1
761 11:28:28.585868 APIC: 02: enabled 1
762 11:28:28.585976 APIC: 05: enabled 1
763 11:28:28.588843 Compare with tree...
764 11:28:28.592407 Root Device: enabled 1
765 11:28:28.592495 DOMAIN: 0000: enabled 1
766 11:28:28.595725 PCI: 00:00.0: enabled 1
767 11:28:28.598824 PCI: 00:02.0: enabled 1
768 11:28:28.602409 PCI: 00:04.0: enabled 1
769 11:28:28.605303 GENERIC: 0.0: enabled 1
770 11:28:28.605384 PCI: 00:05.0: enabled 1
771 11:28:28.609139 PCI: 00:06.0: enabled 0
772 11:28:28.611986 PCI: 00:07.0: enabled 0
773 11:28:28.615484 GENERIC: 0.0: enabled 1
774 11:28:28.618768 PCI: 00:07.1: enabled 0
775 11:28:28.621920 GENERIC: 1.0: enabled 1
776 11:28:28.621997 PCI: 00:07.2: enabled 0
777 11:28:28.625677 GENERIC: 0.0: enabled 1
778 11:28:28.629102 PCI: 00:07.3: enabled 0
779 11:28:28.632474 GENERIC: 1.0: enabled 1
780 11:28:28.635372 PCI: 00:08.0: enabled 1
781 11:28:28.635449 PCI: 00:09.0: enabled 0
782 11:28:28.638637 PCI: 00:0a.0: enabled 0
783 11:28:28.642595 PCI: 00:0d.0: enabled 1
784 11:28:28.645951 USB0 port 0: enabled 1
785 11:28:28.649215 USB3 port 0: enabled 1
786 11:28:28.649294 USB3 port 1: enabled 1
787 11:28:28.652173 USB3 port 2: enabled 0
788 11:28:28.655543 USB3 port 3: enabled 0
789 11:28:28.659174 PCI: 00:0d.1: enabled 0
790 11:28:28.662305 PCI: 00:0d.2: enabled 0
791 11:28:28.662387 GENERIC: 0.0: enabled 1
792 11:28:28.665817 PCI: 00:0d.3: enabled 0
793 11:28:28.669163 PCI: 00:0e.0: enabled 0
794 11:28:28.671943 PCI: 00:10.2: enabled 1
795 11:28:28.675546 PCI: 00:10.6: enabled 0
796 11:28:28.675632 PCI: 00:10.7: enabled 0
797 11:28:28.678830 PCI: 00:12.0: enabled 0
798 11:28:28.682046 PCI: 00:12.6: enabled 0
799 11:28:28.685388 PCI: 00:13.0: enabled 0
800 11:28:28.688716 PCI: 00:14.0: enabled 1
801 11:28:28.688806 USB0 port 0: enabled 1
802 11:28:28.692508 USB2 port 0: enabled 0
803 11:28:28.695268 USB2 port 1: enabled 1
804 11:28:28.698559 USB2 port 2: enabled 1
805 11:28:28.701962 USB2 port 3: enabled 0
806 11:28:28.702047 USB2 port 4: enabled 1
807 11:28:28.705623 USB2 port 5: enabled 0
808 11:28:28.708708 USB2 port 6: enabled 0
809 11:28:28.712112 USB2 port 7: enabled 0
810 11:28:28.715579 USB2 port 8: enabled 0
811 11:28:28.718918 USB2 port 9: enabled 0
812 11:28:28.718997 USB3 port 0: enabled 0
813 11:28:28.721724 USB3 port 1: enabled 1
814 11:28:28.725540 USB3 port 2: enabled 0
815 11:28:28.728787 USB3 port 3: enabled 0
816 11:28:28.732270 PCI: 00:14.1: enabled 0
817 11:28:28.732353 PCI: 00:14.2: enabled 1
818 11:28:28.735079 PCI: 00:14.3: enabled 1
819 11:28:28.738584 GENERIC: 0.0: enabled 1
820 11:28:28.741920 PCI: 00:15.0: enabled 1
821 11:28:28.745235 I2C: 00:1a: enabled 1
822 11:28:28.745322 I2C: 00:31: enabled 1
823 11:28:28.748441 I2C: 00:32: enabled 1
824 11:28:28.751756 PCI: 00:15.1: enabled 1
825 11:28:28.755169 I2C: 00:10: enabled 1
826 11:28:28.755248 PCI: 00:15.2: enabled 1
827 11:28:28.758745 PCI: 00:15.3: enabled 1
828 11:28:28.762163 PCI: 00:16.0: enabled 1
829 11:28:28.765390 PCI: 00:16.1: enabled 0
830 11:28:28.768294 PCI: 00:16.2: enabled 0
831 11:28:28.768404 PCI: 00:16.3: enabled 0
832 11:28:28.771650 PCI: 00:16.4: enabled 0
833 11:28:28.775299 PCI: 00:16.5: enabled 0
834 11:28:28.778746 PCI: 00:17.0: enabled 1
835 11:28:28.781567 PCI: 00:19.0: enabled 0
836 11:28:28.781642 PCI: 00:19.1: enabled 1
837 11:28:28.785715 I2C: 00:15: enabled 1
838 11:28:28.789668 PCI: 00:19.2: enabled 0
839 11:28:28.789777 PCI: 00:1d.0: enabled 1
840 11:28:28.793179 GENERIC: 0.0: enabled 1
841 11:28:28.796995 PCI: 00:1e.0: enabled 1
842 11:28:28.799863 PCI: 00:1e.1: enabled 0
843 11:28:28.803299 PCI: 00:1e.2: enabled 1
844 11:28:28.803407 SPI: 00: enabled 1
845 11:28:28.806593 PCI: 00:1e.3: enabled 1
846 11:28:28.809934 SPI: 00: enabled 1
847 11:28:28.810024 PCI: 00:1f.0: enabled 1
848 11:28:28.813255 PNP: 0c09.0: enabled 1
849 11:28:28.816587 PCI: 00:1f.1: enabled 0
850 11:28:28.819840 PCI: 00:1f.2: enabled 1
851 11:28:28.823239 GENERIC: 0.0: enabled 1
852 11:28:28.875156 GENERIC: 0.0: enabled 1
853 11:28:28.875256 GENERIC: 1.0: enabled 1
854 11:28:28.875333 PCI: 00:1f.3: enabled 1
855 11:28:28.875621 PCI: 00:1f.4: enabled 0
856 11:28:28.875688 PCI: 00:1f.5: enabled 1
857 11:28:28.875750 PCI: 00:1f.6: enabled 0
858 11:28:28.875810 PCI: 00:1f.7: enabled 0
859 11:28:28.875868 CPU_CLUSTER: 0: enabled 1
860 11:28:28.875926 APIC: 00: enabled 1
861 11:28:28.875984 APIC: 01: enabled 1
862 11:28:28.876099 APIC: 03: enabled 1
863 11:28:28.876161 APIC: 04: enabled 1
864 11:28:28.876219 APIC: 07: enabled 1
865 11:28:28.876744 APIC: 06: enabled 1
866 11:28:28.876830 APIC: 02: enabled 1
867 11:28:28.876937 APIC: 05: enabled 1
868 11:28:28.877463 Root Device scanning...
869 11:28:28.877549 scan_static_bus for Root Device
870 11:28:28.877796 DOMAIN: 0000 enabled
871 11:28:28.877872 CPU_CLUSTER: 0 enabled
872 11:28:28.877937 DOMAIN: 0000 scanning...
873 11:28:28.909742 PCI: pci_scan_bus for bus 00
874 11:28:28.909847 PCI: 00:00.0 [8086/0000] ops
875 11:28:28.910426 PCI: 00:00.0 [8086/9a12] enabled
876 11:28:28.910512 PCI: 00:02.0 [8086/0000] bus ops
877 11:28:28.910766 PCI: 00:02.0 [8086/9a40] enabled
878 11:28:28.910836 PCI: 00:04.0 [8086/0000] bus ops
879 11:28:28.910935 PCI: 00:04.0 [8086/9a03] enabled
880 11:28:28.910997 PCI: 00:05.0 [8086/9a19] enabled
881 11:28:28.911056 PCI: 00:07.0 [0000/0000] hidden
882 11:28:28.914301 PCI: 00:08.0 [8086/9a11] enabled
883 11:28:28.914388 PCI: 00:0a.0 [8086/9a0d] disabled
884 11:28:28.917052 PCI: 00:0d.0 [8086/0000] bus ops
885 11:28:28.917139 PCI: 00:0d.0 [8086/9a13] enabled
886 11:28:28.920398 PCI: 00:14.0 [8086/0000] bus ops
887 11:28:28.923763 PCI: 00:14.0 [8086/a0ed] enabled
888 11:28:28.927227 PCI: 00:14.2 [8086/a0ef] enabled
889 11:28:28.930420 PCI: 00:14.3 [8086/0000] bus ops
890 11:28:28.933884 PCI: 00:14.3 [8086/a0f0] enabled
891 11:28:28.937511 PCI: 00:15.0 [8086/0000] bus ops
892 11:28:28.940869 PCI: 00:15.0 [8086/a0e8] enabled
893 11:28:28.943948 PCI: 00:15.1 [8086/0000] bus ops
894 11:28:28.947252 PCI: 00:15.1 [8086/a0e9] enabled
895 11:28:28.950690 PCI: 00:15.2 [8086/0000] bus ops
896 11:28:28.953887 PCI: 00:15.2 [8086/a0ea] enabled
897 11:28:28.957673 PCI: 00:15.3 [8086/0000] bus ops
898 11:28:28.960520 PCI: 00:15.3 [8086/a0eb] enabled
899 11:28:28.963768 PCI: 00:16.0 [8086/0000] ops
900 11:28:28.967210 PCI: 00:16.0 [8086/a0e0] enabled
901 11:28:28.973834 PCI: Static device PCI: 00:17.0 not found, disabling it.
902 11:28:28.977332 PCI: 00:19.0 [8086/0000] bus ops
903 11:28:28.980795 PCI: 00:19.0 [8086/a0c5] disabled
904 11:28:28.983727 PCI: 00:19.1 [8086/0000] bus ops
905 11:28:28.987297 PCI: 00:19.1 [8086/a0c6] enabled
906 11:28:28.990737 PCI: 00:1d.0 [8086/0000] bus ops
907 11:28:28.993852 PCI: 00:1d.0 [8086/a0b0] enabled
908 11:28:28.997228 PCI: 00:1e.0 [8086/0000] ops
909 11:28:29.000526 PCI: 00:1e.0 [8086/a0a8] enabled
910 11:28:29.004085 PCI: 00:1e.2 [8086/0000] bus ops
911 11:28:29.007520 PCI: 00:1e.2 [8086/a0aa] enabled
912 11:28:29.010431 PCI: 00:1e.3 [8086/0000] bus ops
913 11:28:29.013760 PCI: 00:1e.3 [8086/a0ab] enabled
914 11:28:29.017131 PCI: 00:1f.0 [8086/0000] bus ops
915 11:28:29.020403 PCI: 00:1f.0 [8086/a087] enabled
916 11:28:29.020482 RTC Init
917 11:28:29.023900 Set power on after power failure.
918 11:28:29.027281 Disabling Deep S3
919 11:28:29.030743 Disabling Deep S3
920 11:28:29.030855 Disabling Deep S4
921 11:28:29.033792 Disabling Deep S4
922 11:28:29.033874 Disabling Deep S5
923 11:28:29.036936 Disabling Deep S5
924 11:28:29.040815 PCI: 00:1f.2 [0000/0000] hidden
925 11:28:29.043584 PCI: 00:1f.3 [8086/0000] bus ops
926 11:28:29.047150 PCI: 00:1f.3 [8086/a0c8] enabled
927 11:28:29.050596 PCI: 00:1f.5 [8086/0000] bus ops
928 11:28:29.054117 PCI: 00:1f.5 [8086/a0a4] enabled
929 11:28:29.057398 PCI: Leftover static devices:
930 11:28:29.057471 PCI: 00:10.2
931 11:28:29.060770 PCI: 00:10.6
932 11:28:29.060861 PCI: 00:10.7
933 11:28:29.060925 PCI: 00:06.0
934 11:28:29.064395 PCI: 00:07.1
935 11:28:29.064482 PCI: 00:07.2
936 11:28:29.066954 PCI: 00:07.3
937 11:28:29.067025 PCI: 00:09.0
938 11:28:29.067085 PCI: 00:0d.1
939 11:28:29.070518 PCI: 00:0d.2
940 11:28:29.070589 PCI: 00:0d.3
941 11:28:29.073974 PCI: 00:0e.0
942 11:28:29.074049 PCI: 00:12.0
943 11:28:29.077423 PCI: 00:12.6
944 11:28:29.077501 PCI: 00:13.0
945 11:28:29.077564 PCI: 00:14.1
946 11:28:29.080350 PCI: 00:16.1
947 11:28:29.080430 PCI: 00:16.2
948 11:28:29.083768 PCI: 00:16.3
949 11:28:29.083867 PCI: 00:16.4
950 11:28:29.083960 PCI: 00:16.5
951 11:28:29.087181 PCI: 00:17.0
952 11:28:29.087271 PCI: 00:19.2
953 11:28:29.090164 PCI: 00:1e.1
954 11:28:29.090264 PCI: 00:1f.1
955 11:28:29.090357 PCI: 00:1f.4
956 11:28:29.093649 PCI: 00:1f.6
957 11:28:29.093728 PCI: 00:1f.7
958 11:28:29.097067 PCI: Check your devicetree.cb.
959 11:28:29.100518 PCI: 00:02.0 scanning...
960 11:28:29.103831 scan_generic_bus for PCI: 00:02.0
961 11:28:29.107111 scan_generic_bus for PCI: 00:02.0 done
962 11:28:29.113366 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
963 11:28:29.113441 PCI: 00:04.0 scanning...
964 11:28:29.120072 scan_generic_bus for PCI: 00:04.0
965 11:28:29.120165 GENERIC: 0.0 enabled
966 11:28:29.126777 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
967 11:28:29.130536 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
968 11:28:29.133441 PCI: 00:0d.0 scanning...
969 11:28:29.136807 scan_static_bus for PCI: 00:0d.0
970 11:28:29.140189 USB0 port 0 enabled
971 11:28:29.143429 USB0 port 0 scanning...
972 11:28:29.147198 scan_static_bus for USB0 port 0
973 11:28:29.147280 USB3 port 0 enabled
974 11:28:29.150732 USB3 port 1 enabled
975 11:28:29.153410 USB3 port 2 disabled
976 11:28:29.153492 USB3 port 3 disabled
977 11:28:29.156864 USB3 port 0 scanning...
978 11:28:29.160221 scan_static_bus for USB3 port 0
979 11:28:29.163403 scan_static_bus for USB3 port 0 done
980 11:28:29.167012 scan_bus: bus USB3 port 0 finished in 6 msecs
981 11:28:29.170143 USB3 port 1 scanning...
982 11:28:29.173600 scan_static_bus for USB3 port 1
983 11:28:29.176995 scan_static_bus for USB3 port 1 done
984 11:28:29.183665 scan_bus: bus USB3 port 1 finished in 6 msecs
985 11:28:29.186560 scan_static_bus for USB0 port 0 done
986 11:28:29.190194 scan_bus: bus USB0 port 0 finished in 43 msecs
987 11:28:29.193617 scan_static_bus for PCI: 00:0d.0 done
988 11:28:29.200196 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
989 11:28:29.203255 PCI: 00:14.0 scanning...
990 11:28:29.207000 scan_static_bus for PCI: 00:14.0
991 11:28:29.207085 USB0 port 0 enabled
992 11:28:29.210169 USB0 port 0 scanning...
993 11:28:29.213321 scan_static_bus for USB0 port 0
994 11:28:29.216456 USB2 port 0 disabled
995 11:28:29.216540 USB2 port 1 enabled
996 11:28:29.219844 USB2 port 2 enabled
997 11:28:29.223622 USB2 port 3 disabled
998 11:28:29.223706 USB2 port 4 enabled
999 11:28:29.226779 USB2 port 5 disabled
1000 11:28:29.230364 USB2 port 6 disabled
1001 11:28:29.230488 USB2 port 7 disabled
1002 11:28:29.233560 USB2 port 8 disabled
1003 11:28:29.233659 USB2 port 9 disabled
1004 11:28:29.236957 USB3 port 0 disabled
1005 11:28:29.239843 USB3 port 1 enabled
1006 11:28:29.239955 USB3 port 2 disabled
1007 11:28:29.243187 USB3 port 3 disabled
1008 11:28:29.246638 USB2 port 1 scanning...
1009 11:28:29.249714 scan_static_bus for USB2 port 1
1010 11:28:29.253051 scan_static_bus for USB2 port 1 done
1011 11:28:29.256561 scan_bus: bus USB2 port 1 finished in 6 msecs
1012 11:28:29.260085 USB2 port 2 scanning...
1013 11:28:29.263461 scan_static_bus for USB2 port 2
1014 11:28:29.266952 scan_static_bus for USB2 port 2 done
1015 11:28:29.273287 scan_bus: bus USB2 port 2 finished in 6 msecs
1016 11:28:29.273373 USB2 port 4 scanning...
1017 11:28:29.276819 scan_static_bus for USB2 port 4
1018 11:28:29.279734 scan_static_bus for USB2 port 4 done
1019 11:28:29.286371 scan_bus: bus USB2 port 4 finished in 6 msecs
1020 11:28:29.289888 USB3 port 1 scanning...
1021 11:28:29.293354 scan_static_bus for USB3 port 1
1022 11:28:29.296241 scan_static_bus for USB3 port 1 done
1023 11:28:29.299743 scan_bus: bus USB3 port 1 finished in 6 msecs
1024 11:28:29.303499 scan_static_bus for USB0 port 0 done
1025 11:28:29.310472 scan_bus: bus USB0 port 0 finished in 93 msecs
1026 11:28:29.313122 scan_static_bus for PCI: 00:14.0 done
1027 11:28:29.316319 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1028 11:28:29.319733 PCI: 00:14.3 scanning...
1029 11:28:29.323172 scan_static_bus for PCI: 00:14.3
1030 11:28:29.326514 GENERIC: 0.0 enabled
1031 11:28:29.329720 scan_static_bus for PCI: 00:14.3 done
1032 11:28:29.333071 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1033 11:28:29.336091 PCI: 00:15.0 scanning...
1034 11:28:29.339834 scan_static_bus for PCI: 00:15.0
1035 11:28:29.342725 I2C: 00:1a enabled
1036 11:28:29.342801 I2C: 00:31 enabled
1037 11:28:29.346419 I2C: 00:32 enabled
1038 11:28:29.349739 scan_static_bus for PCI: 00:15.0 done
1039 11:28:29.353185 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1040 11:28:29.356249 PCI: 00:15.1 scanning...
1041 11:28:29.359680 scan_static_bus for PCI: 00:15.1
1042 11:28:29.363243 I2C: 00:10 enabled
1043 11:28:29.366613 scan_static_bus for PCI: 00:15.1 done
1044 11:28:29.369819 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1045 11:28:29.373675 PCI: 00:15.2 scanning...
1046 11:28:29.376611 scan_static_bus for PCI: 00:15.2
1047 11:28:29.379922 scan_static_bus for PCI: 00:15.2 done
1048 11:28:29.386888 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1049 11:28:29.386972 PCI: 00:15.3 scanning...
1050 11:28:29.390147 scan_static_bus for PCI: 00:15.3
1051 11:28:29.396516 scan_static_bus for PCI: 00:15.3 done
1052 11:28:29.400063 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1053 11:28:29.403573 PCI: 00:19.1 scanning...
1054 11:28:29.406915 scan_static_bus for PCI: 00:19.1
1055 11:28:29.407000 I2C: 00:15 enabled
1056 11:28:29.413346 scan_static_bus for PCI: 00:19.1 done
1057 11:28:29.416729 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1058 11:28:29.420377 PCI: 00:1d.0 scanning...
1059 11:28:29.423556 do_pci_scan_bridge for PCI: 00:1d.0
1060 11:28:29.426511 PCI: pci_scan_bus for bus 01
1061 11:28:29.429959 PCI: 01:00.0 [1c5c/174a] enabled
1062 11:28:29.433209 GENERIC: 0.0 enabled
1063 11:28:29.436511 Enabling Common Clock Configuration
1064 11:28:29.439875 L1 Sub-State supported from root port 29
1065 11:28:29.443311 L1 Sub-State Support = 0xf
1066 11:28:29.446843 CommonModeRestoreTime = 0x28
1067 11:28:29.450250 Power On Value = 0x16, Power On Scale = 0x0
1068 11:28:29.453287 ASPM: Enabled L1
1069 11:28:29.456368 PCIe: Max_Payload_Size adjusted to 128
1070 11:28:29.459726 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1071 11:28:29.463165 PCI: 00:1e.2 scanning...
1072 11:28:29.466526 scan_generic_bus for PCI: 00:1e.2
1073 11:28:29.466634 SPI: 00 enabled
1074 11:28:29.473488 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1075 11:28:29.479662 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1076 11:28:29.483023 PCI: 00:1e.3 scanning...
1077 11:28:29.486426 scan_generic_bus for PCI: 00:1e.3
1078 11:28:29.486507 SPI: 00 enabled
1079 11:28:29.493189 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1080 11:28:29.496590 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1081 11:28:29.499503 PCI: 00:1f.0 scanning...
1082 11:28:29.503068 scan_static_bus for PCI: 00:1f.0
1083 11:28:29.506476 PNP: 0c09.0 enabled
1084 11:28:29.509440 PNP: 0c09.0 scanning...
1085 11:28:29.512779 scan_static_bus for PNP: 0c09.0
1086 11:28:29.516231 scan_static_bus for PNP: 0c09.0 done
1087 11:28:29.519676 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1088 11:28:29.523096 scan_static_bus for PCI: 00:1f.0 done
1089 11:28:29.529192 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1090 11:28:29.532740 PCI: 00:1f.2 scanning...
1091 11:28:29.536078 scan_static_bus for PCI: 00:1f.2
1092 11:28:29.536156 GENERIC: 0.0 enabled
1093 11:28:29.539501 GENERIC: 0.0 scanning...
1094 11:28:29.542815 scan_static_bus for GENERIC: 0.0
1095 11:28:29.546134 GENERIC: 0.0 enabled
1096 11:28:29.546210 GENERIC: 1.0 enabled
1097 11:28:29.552931 scan_static_bus for GENERIC: 0.0 done
1098 11:28:29.555839 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1099 11:28:29.559076 scan_static_bus for PCI: 00:1f.2 done
1100 11:28:29.566203 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1101 11:28:29.566285 PCI: 00:1f.3 scanning...
1102 11:28:29.569176 scan_static_bus for PCI: 00:1f.3
1103 11:28:29.576035 scan_static_bus for PCI: 00:1f.3 done
1104 11:28:29.579547 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1105 11:28:29.582622 PCI: 00:1f.5 scanning...
1106 11:28:29.586063 scan_generic_bus for PCI: 00:1f.5
1107 11:28:29.589366 scan_generic_bus for PCI: 00:1f.5 done
1108 11:28:29.592841 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1109 11:28:29.599131 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1110 11:28:29.602511 scan_static_bus for Root Device done
1111 11:28:29.606086 scan_bus: bus Root Device finished in 736 msecs
1112 11:28:29.609462 done
1113 11:28:29.615941 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1114 11:28:29.616019 Chrome EC: UHEPI supported
1115 11:28:29.622447 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1116 11:28:29.629180 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1117 11:28:29.632425 SPI flash protection: WPSW=0 SRP0=0
1118 11:28:29.639537 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1119 11:28:29.642808 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1120 11:28:29.646076 found VGA at PCI: 00:02.0
1121 11:28:29.649452 Setting up VGA for PCI: 00:02.0
1122 11:28:29.655750 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1123 11:28:29.659132 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1124 11:28:29.662373 Allocating resources...
1125 11:28:29.665999 Reading resources...
1126 11:28:29.669321 Root Device read_resources bus 0 link: 0
1127 11:28:29.672755 DOMAIN: 0000 read_resources bus 0 link: 0
1128 11:28:29.679060 PCI: 00:04.0 read_resources bus 1 link: 0
1129 11:28:29.682417 PCI: 00:04.0 read_resources bus 1 link: 0 done
1130 11:28:29.689213 PCI: 00:0d.0 read_resources bus 0 link: 0
1131 11:28:29.692522 USB0 port 0 read_resources bus 0 link: 0
1132 11:28:29.699381 USB0 port 0 read_resources bus 0 link: 0 done
1133 11:28:29.702591 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1134 11:28:29.705627 PCI: 00:14.0 read_resources bus 0 link: 0
1135 11:28:29.712368 USB0 port 0 read_resources bus 0 link: 0
1136 11:28:29.715808 USB0 port 0 read_resources bus 0 link: 0 done
1137 11:28:29.722707 PCI: 00:14.0 read_resources bus 0 link: 0 done
1138 11:28:29.725645 PCI: 00:14.3 read_resources bus 0 link: 0
1139 11:28:29.732920 PCI: 00:14.3 read_resources bus 0 link: 0 done
1140 11:28:29.735851 PCI: 00:15.0 read_resources bus 0 link: 0
1141 11:28:29.742904 PCI: 00:15.0 read_resources bus 0 link: 0 done
1142 11:28:29.746236 PCI: 00:15.1 read_resources bus 0 link: 0
1143 11:28:29.752871 PCI: 00:15.1 read_resources bus 0 link: 0 done
1144 11:28:29.756080 PCI: 00:19.1 read_resources bus 0 link: 0
1145 11:28:29.762931 PCI: 00:19.1 read_resources bus 0 link: 0 done
1146 11:28:29.766260 PCI: 00:1d.0 read_resources bus 1 link: 0
1147 11:28:29.773428 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1148 11:28:29.776571 PCI: 00:1e.2 read_resources bus 2 link: 0
1149 11:28:29.783410 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1150 11:28:29.786900 PCI: 00:1e.3 read_resources bus 3 link: 0
1151 11:28:29.793370 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1152 11:28:29.796640 PCI: 00:1f.0 read_resources bus 0 link: 0
1153 11:28:29.803340 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1154 11:28:29.806718 PCI: 00:1f.2 read_resources bus 0 link: 0
1155 11:28:29.809655 GENERIC: 0.0 read_resources bus 0 link: 0
1156 11:28:29.816698 GENERIC: 0.0 read_resources bus 0 link: 0 done
1157 11:28:29.820207 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1158 11:28:29.827432 DOMAIN: 0000 read_resources bus 0 link: 0 done
1159 11:28:29.830865 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1160 11:28:29.837530 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1161 11:28:29.840359 Root Device read_resources bus 0 link: 0 done
1162 11:28:29.843851 Done reading resources.
1163 11:28:29.850657 Show resources in subtree (Root Device)...After reading.
1164 11:28:29.853991 Root Device child on link 0 DOMAIN: 0000
1165 11:28:29.857364 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1166 11:28:29.866976 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1167 11:28:29.876951 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1168 11:28:29.880389 PCI: 00:00.0
1169 11:28:29.890560 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1170 11:28:29.897260 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1171 11:28:29.907217 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1172 11:28:29.917093 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1173 11:28:29.927103 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1174 11:28:29.937152 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1175 11:28:29.943767 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1176 11:28:29.953374 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1177 11:28:29.963204 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1178 11:28:29.973404 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1179 11:28:29.983378 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1180 11:28:29.993426 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1181 11:28:29.999956 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1182 11:28:30.009575 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1183 11:28:30.020012 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1184 11:28:30.029662 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1185 11:28:30.039489 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1186 11:28:30.049807 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1187 11:28:30.056152 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1188 11:28:30.066278 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1189 11:28:30.069517 PCI: 00:02.0
1190 11:28:30.079595 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1191 11:28:30.089290 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1192 11:28:30.099547 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1193 11:28:30.102972 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1194 11:28:30.112859 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1195 11:28:30.116331 GENERIC: 0.0
1196 11:28:30.116416 PCI: 00:05.0
1197 11:28:30.125971 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1198 11:28:30.129331 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1199 11:28:30.133167 GENERIC: 0.0
1200 11:28:30.135812 PCI: 00:08.0
1201 11:28:30.145985 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1202 11:28:30.146071 PCI: 00:0a.0
1203 11:28:30.149340 PCI: 00:0d.0 child on link 0 USB0 port 0
1204 11:28:30.159372 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1205 11:28:30.165849 USB0 port 0 child on link 0 USB3 port 0
1206 11:28:30.165933 USB3 port 0
1207 11:28:30.169204 USB3 port 1
1208 11:28:30.169288 USB3 port 2
1209 11:28:30.172498 USB3 port 3
1210 11:28:30.175950 PCI: 00:14.0 child on link 0 USB0 port 0
1211 11:28:30.185760 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1212 11:28:30.188995 USB0 port 0 child on link 0 USB2 port 0
1213 11:28:30.192345 USB2 port 0
1214 11:28:30.195835 USB2 port 1
1215 11:28:30.195938 USB2 port 2
1216 11:28:30.199280 USB2 port 3
1217 11:28:30.199367 USB2 port 4
1218 11:28:30.202695 USB2 port 5
1219 11:28:30.202800 USB2 port 6
1220 11:28:30.205620 USB2 port 7
1221 11:28:30.205721 USB2 port 8
1222 11:28:30.209007 USB2 port 9
1223 11:28:30.209091 USB3 port 0
1224 11:28:30.212568 USB3 port 1
1225 11:28:30.212651 USB3 port 2
1226 11:28:30.215915 USB3 port 3
1227 11:28:30.215997 PCI: 00:14.2
1228 11:28:30.226057 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1229 11:28:30.235895 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1230 11:28:30.242699 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1231 11:28:30.252049 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1232 11:28:30.252174 GENERIC: 0.0
1233 11:28:30.258916 PCI: 00:15.0 child on link 0 I2C: 00:1a
1234 11:28:30.269095 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1235 11:28:30.269177 I2C: 00:1a
1236 11:28:30.272459 I2C: 00:31
1237 11:28:30.272538 I2C: 00:32
1238 11:28:30.275713 PCI: 00:15.1 child on link 0 I2C: 00:10
1239 11:28:30.285311 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1240 11:28:30.288677 I2C: 00:10
1241 11:28:30.288762 PCI: 00:15.2
1242 11:28:30.298687 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 11:28:30.302077 PCI: 00:15.3
1244 11:28:30.311983 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1245 11:28:30.312093 PCI: 00:16.0
1246 11:28:30.322191 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1247 11:28:30.325080 PCI: 00:19.0
1248 11:28:30.328818 PCI: 00:19.1 child on link 0 I2C: 00:15
1249 11:28:30.338576 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1250 11:28:30.338695 I2C: 00:15
1251 11:28:30.345389 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1252 11:28:30.351756 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1253 11:28:30.362178 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1254 11:28:30.372004 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1255 11:28:30.375236 GENERIC: 0.0
1256 11:28:30.375322 PCI: 01:00.0
1257 11:28:30.385410 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1258 11:28:30.395242 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1259 11:28:30.405492 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1260 11:28:30.405580 PCI: 00:1e.0
1261 11:28:30.418528 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1262 11:28:30.421615 PCI: 00:1e.2 child on link 0 SPI: 00
1263 11:28:30.431904 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1264 11:28:30.432016 SPI: 00
1265 11:28:30.435129 PCI: 00:1e.3 child on link 0 SPI: 00
1266 11:28:30.444881 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1267 11:28:30.448428 SPI: 00
1268 11:28:30.451923 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1269 11:28:30.461803 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1270 11:28:30.461920 PNP: 0c09.0
1271 11:28:30.471801 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1272 11:28:30.475024 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1273 11:28:30.484935 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1274 11:28:30.494783 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1275 11:28:30.498245 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1276 11:28:30.501364 GENERIC: 0.0
1277 11:28:30.501449 GENERIC: 1.0
1278 11:28:30.504737 PCI: 00:1f.3
1279 11:28:30.515155 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1280 11:28:30.524623 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1281 11:28:30.524709 PCI: 00:1f.5
1282 11:28:30.534718 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1283 11:28:30.538123 CPU_CLUSTER: 0 child on link 0 APIC: 00
1284 11:28:30.541536 APIC: 00
1285 11:28:30.541621 APIC: 01
1286 11:28:30.545273 APIC: 03
1287 11:28:30.545358 APIC: 04
1288 11:28:30.545425 APIC: 07
1289 11:28:30.548432 APIC: 06
1290 11:28:30.548522 APIC: 02
1291 11:28:30.548590 APIC: 05
1292 11:28:30.558616 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1293 11:28:30.561862 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1294 11:28:30.568026 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1295 11:28:30.575267 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1296 11:28:30.578301 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1297 11:28:30.584937 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1298 11:28:30.588242 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1299 11:28:30.594727 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1300 11:28:30.601672 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1301 11:28:30.611670 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1302 11:28:30.618290 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1303 11:28:30.624546 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1304 11:28:30.631453 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1305 11:28:30.638012 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1306 11:28:30.644677 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1307 11:28:30.648209 DOMAIN: 0000: Resource ranges:
1308 11:28:30.655037 * Base: 1000, Size: 800, Tag: 100
1309 11:28:30.657812 * Base: 1900, Size: e700, Tag: 100
1310 11:28:30.661156 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1311 11:28:30.667745 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1312 11:28:30.674640 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1313 11:28:30.684292 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1314 11:28:30.691058 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1315 11:28:30.697837 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1316 11:28:30.707798 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1317 11:28:30.714667 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1318 11:28:30.721273 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1319 11:28:30.727719 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1320 11:28:30.738147 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1321 11:28:30.744413 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1322 11:28:30.751000 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1323 11:28:30.761034 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1324 11:28:30.767371 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1325 11:28:30.774258 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1326 11:28:30.784560 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1327 11:28:30.791348 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1328 11:28:30.797833 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1329 11:28:30.807530 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1330 11:28:30.814041 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1331 11:28:30.820709 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1332 11:28:30.830628 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1333 11:28:30.837291 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1334 11:28:30.843906 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1335 11:28:30.847353 DOMAIN: 0000: Resource ranges:
1336 11:28:30.853881 * Base: 7fc00000, Size: 40400000, Tag: 200
1337 11:28:30.857356 * Base: d0000000, Size: 28000000, Tag: 200
1338 11:28:30.860819 * Base: fa000000, Size: 1000000, Tag: 200
1339 11:28:30.867170 * Base: fb001000, Size: 2fff000, Tag: 200
1340 11:28:30.870711 * Base: fe010000, Size: 2e000, Tag: 200
1341 11:28:30.873920 * Base: fe03f000, Size: d41000, Tag: 200
1342 11:28:30.877254 * Base: fed88000, Size: 8000, Tag: 200
1343 11:28:30.880593 * Base: fed93000, Size: d000, Tag: 200
1344 11:28:30.887483 * Base: feda2000, Size: 1e000, Tag: 200
1345 11:28:30.890760 * Base: fede0000, Size: 1220000, Tag: 200
1346 11:28:30.894030 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1347 11:28:30.904145 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1348 11:28:30.910610 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1349 11:28:30.917389 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1350 11:28:30.923870 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1351 11:28:30.930789 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1352 11:28:30.937204 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1353 11:28:30.944002 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1354 11:28:30.950242 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1355 11:28:30.957307 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1356 11:28:30.963630 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1357 11:28:30.970598 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1358 11:28:30.976820 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1359 11:28:30.983787 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1360 11:28:30.990106 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1361 11:28:30.996790 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1362 11:28:31.003444 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1363 11:28:31.010165 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1364 11:28:31.016816 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1365 11:28:31.020177 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1366 11:28:31.026702 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1367 11:28:31.033587 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1368 11:28:31.039901 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1369 11:28:31.049943 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1370 11:28:31.056773 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1371 11:28:31.059937 PCI: 00:1d.0: Resource ranges:
1372 11:28:31.063282 * Base: 7fc00000, Size: 100000, Tag: 200
1373 11:28:31.070064 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1374 11:28:31.077257 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1375 11:28:31.084397 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1376 11:28:31.094142 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1377 11:28:31.100739 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1378 11:28:31.103926 Root Device assign_resources, bus 0 link: 0
1379 11:28:31.110441 DOMAIN: 0000 assign_resources, bus 0 link: 0
1380 11:28:31.116991 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1381 11:28:31.127074 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1382 11:28:31.134207 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1383 11:28:31.141027 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1384 11:28:31.147486 PCI: 00:04.0 assign_resources, bus 1 link: 0
1385 11:28:31.150688 PCI: 00:04.0 assign_resources, bus 1 link: 0
1386 11:28:31.160460 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1387 11:28:31.166949 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1388 11:28:31.177352 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1389 11:28:31.180717 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1390 11:28:31.184172 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1391 11:28:31.193878 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1392 11:28:31.197437 PCI: 00:14.0 assign_resources, bus 0 link: 0
1393 11:28:31.203525 PCI: 00:14.0 assign_resources, bus 0 link: 0
1394 11:28:31.210365 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1395 11:28:31.217144 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1396 11:28:31.227231 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1397 11:28:31.230514 PCI: 00:14.3 assign_resources, bus 0 link: 0
1398 11:28:31.237697 PCI: 00:14.3 assign_resources, bus 0 link: 0
1399 11:28:31.243980 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1400 11:28:31.251065 PCI: 00:15.0 assign_resources, bus 0 link: 0
1401 11:28:31.254171 PCI: 00:15.0 assign_resources, bus 0 link: 0
1402 11:28:31.260439 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1403 11:28:31.267302 PCI: 00:15.1 assign_resources, bus 0 link: 0
1404 11:28:31.270651 PCI: 00:15.1 assign_resources, bus 0 link: 0
1405 11:28:31.280522 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1406 11:28:31.287362 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1407 11:28:31.297569 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1408 11:28:31.303750 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1409 11:28:31.307193 PCI: 00:19.1 assign_resources, bus 0 link: 0
1410 11:28:31.314254 PCI: 00:19.1 assign_resources, bus 0 link: 0
1411 11:28:31.320651 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1412 11:28:31.330436 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1413 11:28:31.340284 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1414 11:28:31.343608 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1415 11:28:31.353889 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1416 11:28:31.360475 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1417 11:28:31.370092 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1418 11:28:31.373377 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1419 11:28:31.383574 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1420 11:28:31.387245 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1421 11:28:31.390165 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1422 11:28:31.399896 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1423 11:28:31.403485 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1424 11:28:31.410128 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1425 11:28:31.413473 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1426 11:28:31.420046 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1427 11:28:31.423432 LPC: Trying to open IO window from 800 size 1ff
1428 11:28:31.433380 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1429 11:28:31.440263 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1430 11:28:31.446688 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1431 11:28:31.453091 DOMAIN: 0000 assign_resources, bus 0 link: 0
1432 11:28:31.456381 Root Device assign_resources, bus 0 link: 0
1433 11:28:31.459745 Done setting resources.
1434 11:28:31.466554 Show resources in subtree (Root Device)...After assigning values.
1435 11:28:31.470001 Root Device child on link 0 DOMAIN: 0000
1436 11:28:31.473334 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1437 11:28:31.483103 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1438 11:28:31.493354 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1439 11:28:31.496234 PCI: 00:00.0
1440 11:28:31.506665 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1441 11:28:31.512946 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1442 11:28:31.522896 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1443 11:28:31.532835 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1444 11:28:31.542896 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1445 11:28:31.552766 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1446 11:28:31.563115 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1447 11:28:31.569648 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1448 11:28:31.580124 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1449 11:28:31.589566 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1450 11:28:31.599943 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1451 11:28:31.609489 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1452 11:28:31.615894 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1453 11:28:31.626464 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1454 11:28:31.636099 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1455 11:28:31.646123 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1456 11:28:31.656598 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1457 11:28:31.666475 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1458 11:28:31.673110 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1459 11:28:31.682731 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1460 11:28:31.686012 PCI: 00:02.0
1461 11:28:31.695834 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1462 11:28:31.706177 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1463 11:28:31.715659 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1464 11:28:31.719478 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1465 11:28:31.732440 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1466 11:28:31.732552 GENERIC: 0.0
1467 11:28:31.735643 PCI: 00:05.0
1468 11:28:31.745736 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1469 11:28:31.749158 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1470 11:28:31.752338 GENERIC: 0.0
1471 11:28:31.752421 PCI: 00:08.0
1472 11:28:31.762373 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1473 11:28:31.765871 PCI: 00:0a.0
1474 11:28:31.769350 PCI: 00:0d.0 child on link 0 USB0 port 0
1475 11:28:31.779244 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1476 11:28:31.785852 USB0 port 0 child on link 0 USB3 port 0
1477 11:28:31.785936 USB3 port 0
1478 11:28:31.789206 USB3 port 1
1479 11:28:31.789298 USB3 port 2
1480 11:28:31.792568 USB3 port 3
1481 11:28:31.795955 PCI: 00:14.0 child on link 0 USB0 port 0
1482 11:28:31.805703 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1483 11:28:31.809250 USB0 port 0 child on link 0 USB2 port 0
1484 11:28:31.812470 USB2 port 0
1485 11:28:31.815830 USB2 port 1
1486 11:28:31.815903 USB2 port 2
1487 11:28:31.819186 USB2 port 3
1488 11:28:31.819257 USB2 port 4
1489 11:28:31.822047 USB2 port 5
1490 11:28:31.822118 USB2 port 6
1491 11:28:31.825416 USB2 port 7
1492 11:28:31.825486 USB2 port 8
1493 11:28:31.828827 USB2 port 9
1494 11:28:31.828896 USB3 port 0
1495 11:28:31.832448 USB3 port 1
1496 11:28:31.832550 USB3 port 2
1497 11:28:31.835881 USB3 port 3
1498 11:28:31.835977 PCI: 00:14.2
1499 11:28:31.845881 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1500 11:28:31.859149 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1501 11:28:31.862379 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1502 11:28:31.872529 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1503 11:28:31.875378 GENERIC: 0.0
1504 11:28:31.878935 PCI: 00:15.0 child on link 0 I2C: 00:1a
1505 11:28:31.888783 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1506 11:28:31.888888 I2C: 00:1a
1507 11:28:31.892256 I2C: 00:31
1508 11:28:31.892334 I2C: 00:32
1509 11:28:31.898787 PCI: 00:15.1 child on link 0 I2C: 00:10
1510 11:28:31.908785 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1511 11:28:31.908887 I2C: 00:10
1512 11:28:31.912127 PCI: 00:15.2
1513 11:28:31.921996 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1514 11:28:31.922109 PCI: 00:15.3
1515 11:28:31.932045 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1516 11:28:31.935522 PCI: 00:16.0
1517 11:28:31.945381 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1518 11:28:31.948674 PCI: 00:19.0
1519 11:28:31.952423 PCI: 00:19.1 child on link 0 I2C: 00:15
1520 11:28:31.962117 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1521 11:28:31.962202 I2C: 00:15
1522 11:28:31.968584 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1523 11:28:31.978739 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1524 11:28:31.988724 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1525 11:28:31.998466 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1526 11:28:32.001985 GENERIC: 0.0
1527 11:28:32.002072 PCI: 01:00.0
1528 11:28:32.011779 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1529 11:28:32.025062 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1530 11:28:32.035192 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1531 11:28:32.035278 PCI: 00:1e.0
1532 11:28:32.048268 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1533 11:28:32.051433 PCI: 00:1e.2 child on link 0 SPI: 00
1534 11:28:32.061609 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1535 11:28:32.061694 SPI: 00
1536 11:28:32.068204 PCI: 00:1e.3 child on link 0 SPI: 00
1537 11:28:32.078452 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1538 11:28:32.078538 SPI: 00
1539 11:28:32.081433 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1540 11:28:32.091622 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1541 11:28:32.091707 PNP: 0c09.0
1542 11:28:32.101690 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1543 11:28:32.104584 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1544 11:28:32.114811 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1545 11:28:32.125165 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1546 11:28:32.128375 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1547 11:28:32.131884 GENERIC: 0.0
1548 11:28:32.134785 GENERIC: 1.0
1549 11:28:32.134869 PCI: 00:1f.3
1550 11:28:32.144860 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1551 11:28:32.154798 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1552 11:28:32.158074 PCI: 00:1f.5
1553 11:28:32.168142 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1554 11:28:32.171420 CPU_CLUSTER: 0 child on link 0 APIC: 00
1555 11:28:32.174693 APIC: 00
1556 11:28:32.174778 APIC: 01
1557 11:28:32.174845 APIC: 03
1558 11:28:32.178453 APIC: 04
1559 11:28:32.178545 APIC: 07
1560 11:28:32.178613 APIC: 06
1561 11:28:32.181670 APIC: 02
1562 11:28:32.181757 APIC: 05
1563 11:28:32.184680 Done allocating resources.
1564 11:28:32.191289 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1565 11:28:32.197889 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1566 11:28:32.201375 Configure GPIOs for I2S audio on UP4.
1567 11:28:32.208155 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1568 11:28:32.211494 Enabling resources...
1569 11:28:32.214559 PCI: 00:00.0 subsystem <- 8086/9a12
1570 11:28:32.217961 PCI: 00:00.0 cmd <- 06
1571 11:28:32.221353 PCI: 00:02.0 subsystem <- 8086/9a40
1572 11:28:32.221437 PCI: 00:02.0 cmd <- 03
1573 11:28:32.228111 PCI: 00:04.0 subsystem <- 8086/9a03
1574 11:28:32.228274 PCI: 00:04.0 cmd <- 02
1575 11:28:32.231413 PCI: 00:05.0 subsystem <- 8086/9a19
1576 11:28:32.234863 PCI: 00:05.0 cmd <- 02
1577 11:28:32.238326 PCI: 00:08.0 subsystem <- 8086/9a11
1578 11:28:32.241101 PCI: 00:08.0 cmd <- 06
1579 11:28:32.244452 PCI: 00:0d.0 subsystem <- 8086/9a13
1580 11:28:32.248369 PCI: 00:0d.0 cmd <- 02
1581 11:28:32.251091 PCI: 00:14.0 subsystem <- 8086/a0ed
1582 11:28:32.254858 PCI: 00:14.0 cmd <- 02
1583 11:28:32.258145 PCI: 00:14.2 subsystem <- 8086/a0ef
1584 11:28:32.261641 PCI: 00:14.2 cmd <- 02
1585 11:28:32.264988 PCI: 00:14.3 subsystem <- 8086/a0f0
1586 11:28:32.265072 PCI: 00:14.3 cmd <- 02
1587 11:28:32.271531 PCI: 00:15.0 subsystem <- 8086/a0e8
1588 11:28:32.271643 PCI: 00:15.0 cmd <- 02
1589 11:28:32.275245 PCI: 00:15.1 subsystem <- 8086/a0e9
1590 11:28:32.278008 PCI: 00:15.1 cmd <- 02
1591 11:28:32.281332 PCI: 00:15.2 subsystem <- 8086/a0ea
1592 11:28:32.285034 PCI: 00:15.2 cmd <- 02
1593 11:28:32.288494 PCI: 00:15.3 subsystem <- 8086/a0eb
1594 11:28:32.291411 PCI: 00:15.3 cmd <- 02
1595 11:28:32.294776 PCI: 00:16.0 subsystem <- 8086/a0e0
1596 11:28:32.298151 PCI: 00:16.0 cmd <- 02
1597 11:28:32.301504 PCI: 00:19.1 subsystem <- 8086/a0c6
1598 11:28:32.304919 PCI: 00:19.1 cmd <- 02
1599 11:28:32.308198 PCI: 00:1d.0 bridge ctrl <- 0013
1600 11:28:32.311491 PCI: 00:1d.0 subsystem <- 8086/a0b0
1601 11:28:32.311575 PCI: 00:1d.0 cmd <- 06
1602 11:28:32.318634 PCI: 00:1e.0 subsystem <- 8086/a0a8
1603 11:28:32.318718 PCI: 00:1e.0 cmd <- 06
1604 11:28:32.321933 PCI: 00:1e.2 subsystem <- 8086/a0aa
1605 11:28:32.324783 PCI: 00:1e.2 cmd <- 06
1606 11:28:32.328406 PCI: 00:1e.3 subsystem <- 8086/a0ab
1607 11:28:32.331708 PCI: 00:1e.3 cmd <- 02
1608 11:28:32.335123 PCI: 00:1f.0 subsystem <- 8086/a087
1609 11:28:32.338480 PCI: 00:1f.0 cmd <- 407
1610 11:28:32.341376 PCI: 00:1f.3 subsystem <- 8086/a0c8
1611 11:28:32.344815 PCI: 00:1f.3 cmd <- 02
1612 11:28:32.348146 PCI: 00:1f.5 subsystem <- 8086/a0a4
1613 11:28:32.351399 PCI: 00:1f.5 cmd <- 406
1614 11:28:32.354745 PCI: 01:00.0 cmd <- 02
1615 11:28:32.359140 done.
1616 11:28:32.362509 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1617 11:28:32.365791 Initializing devices...
1618 11:28:32.369454 Root Device init
1619 11:28:32.372571 Chrome EC: Set SMI mask to 0x0000000000000000
1620 11:28:32.379264 Chrome EC: clear events_b mask to 0x0000000000000000
1621 11:28:32.385685 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1622 11:28:32.389065 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1623 11:28:32.395703 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1624 11:28:32.402840 Chrome EC: Set WAKE mask to 0x0000000000000000
1625 11:28:32.405917 fw_config match found: DB_USB=USB3_ACTIVE
1626 11:28:32.412283 Configure Right Type-C port orientation for retimer
1627 11:28:32.415578 Root Device init finished in 42 msecs
1628 11:28:32.419053 PCI: 00:00.0 init
1629 11:28:32.419137 CPU TDP = 9 Watts
1630 11:28:32.422494 CPU PL1 = 9 Watts
1631 11:28:32.425563 CPU PL2 = 40 Watts
1632 11:28:32.425640 CPU PL4 = 83 Watts
1633 11:28:32.428938 PCI: 00:00.0 init finished in 8 msecs
1634 11:28:32.432359 PCI: 00:02.0 init
1635 11:28:32.435555 GMA: Found VBT in CBFS
1636 11:28:32.438845 GMA: Found valid VBT in CBFS
1637 11:28:32.442203 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1638 11:28:32.452373 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1639 11:28:32.455602 PCI: 00:02.0 init finished in 18 msecs
1640 11:28:32.459125 PCI: 00:05.0 init
1641 11:28:32.462382 PCI: 00:05.0 init finished in 0 msecs
1642 11:28:32.462480 PCI: 00:08.0 init
1643 11:28:32.468901 PCI: 00:08.0 init finished in 0 msecs
1644 11:28:32.469017 PCI: 00:14.0 init
1645 11:28:32.475696 PCI: 00:14.0 init finished in 0 msecs
1646 11:28:32.475780 PCI: 00:14.2 init
1647 11:28:32.478723 PCI: 00:14.2 init finished in 0 msecs
1648 11:28:32.482542 PCI: 00:15.0 init
1649 11:28:32.485420 I2C bus 0 version 0x3230302a
1650 11:28:32.489356 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1651 11:28:32.492398 PCI: 00:15.0 init finished in 6 msecs
1652 11:28:32.495673 PCI: 00:15.1 init
1653 11:28:32.498726 I2C bus 1 version 0x3230302a
1654 11:28:32.502210 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1655 11:28:32.505627 PCI: 00:15.1 init finished in 6 msecs
1656 11:28:32.508749 PCI: 00:15.2 init
1657 11:28:32.512146 I2C bus 2 version 0x3230302a
1658 11:28:32.515673 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1659 11:28:32.519066 PCI: 00:15.2 init finished in 6 msecs
1660 11:28:32.519189 PCI: 00:15.3 init
1661 11:28:32.522369 I2C bus 3 version 0x3230302a
1662 11:28:32.525908 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1663 11:28:32.532226 PCI: 00:15.3 init finished in 6 msecs
1664 11:28:32.532307 PCI: 00:16.0 init
1665 11:28:32.535923 PCI: 00:16.0 init finished in 0 msecs
1666 11:28:32.539186 PCI: 00:19.1 init
1667 11:28:32.542175 I2C bus 5 version 0x3230302a
1668 11:28:32.545580 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1669 11:28:32.549139 PCI: 00:19.1 init finished in 6 msecs
1670 11:28:32.552565 PCI: 00:1d.0 init
1671 11:28:32.555857 Initializing PCH PCIe bridge.
1672 11:28:32.559076 PCI: 00:1d.0 init finished in 3 msecs
1673 11:28:32.562458 PCI: 00:1f.0 init
1674 11:28:32.565479 IOAPIC: Initializing IOAPIC at 0xfec00000
1675 11:28:32.572220 IOAPIC: Bootstrap Processor Local APIC = 0x00
1676 11:28:32.572297 IOAPIC: ID = 0x02
1677 11:28:32.575677 IOAPIC: Dumping registers
1678 11:28:32.579056 reg 0x0000: 0x02000000
1679 11:28:32.579129 reg 0x0001: 0x00770020
1680 11:28:32.582225 reg 0x0002: 0x00000000
1681 11:28:32.585418 PCI: 00:1f.0 init finished in 21 msecs
1682 11:28:32.588981 PCI: 00:1f.2 init
1683 11:28:32.592728 Disabling ACPI via APMC.
1684 11:28:32.595944 APMC done.
1685 11:28:32.599201 PCI: 00:1f.2 init finished in 5 msecs
1686 11:28:32.610040 PCI: 01:00.0 init
1687 11:28:32.613231 PCI: 01:00.0 init finished in 0 msecs
1688 11:28:32.616624 PNP: 0c09.0 init
1689 11:28:32.620252 Google Chrome EC uptime: 8.392 seconds
1690 11:28:32.626774 Google Chrome AP resets since EC boot: 1
1691 11:28:32.629660 Google Chrome most recent AP reset causes:
1692 11:28:32.633050 0.350: 32775 shutdown: entering G3
1693 11:28:32.639895 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1694 11:28:32.642752 PNP: 0c09.0 init finished in 22 msecs
1695 11:28:32.648817 Devices initialized
1696 11:28:32.652237 Show all devs... After init.
1697 11:28:32.655565 Root Device: enabled 1
1698 11:28:32.655643 DOMAIN: 0000: enabled 1
1699 11:28:32.659004 CPU_CLUSTER: 0: enabled 1
1700 11:28:32.662203 PCI: 00:00.0: enabled 1
1701 11:28:32.665332 PCI: 00:02.0: enabled 1
1702 11:28:32.665415 PCI: 00:04.0: enabled 1
1703 11:28:32.668652 PCI: 00:05.0: enabled 1
1704 11:28:32.671919 PCI: 00:06.0: enabled 0
1705 11:28:32.675287 PCI: 00:07.0: enabled 0
1706 11:28:32.675372 PCI: 00:07.1: enabled 0
1707 11:28:32.678599 PCI: 00:07.2: enabled 0
1708 11:28:32.681735 PCI: 00:07.3: enabled 0
1709 11:28:32.685449 PCI: 00:08.0: enabled 1
1710 11:28:32.685534 PCI: 00:09.0: enabled 0
1711 11:28:32.688675 PCI: 00:0a.0: enabled 0
1712 11:28:32.691846 PCI: 00:0d.0: enabled 1
1713 11:28:32.695103 PCI: 00:0d.1: enabled 0
1714 11:28:32.695244 PCI: 00:0d.2: enabled 0
1715 11:28:32.698759 PCI: 00:0d.3: enabled 0
1716 11:28:32.702047 PCI: 00:0e.0: enabled 0
1717 11:28:32.704897 PCI: 00:10.2: enabled 1
1718 11:28:32.705004 PCI: 00:10.6: enabled 0
1719 11:28:32.708330 PCI: 00:10.7: enabled 0
1720 11:28:32.711975 PCI: 00:12.0: enabled 0
1721 11:28:32.712081 PCI: 00:12.6: enabled 0
1722 11:28:32.715251 PCI: 00:13.0: enabled 0
1723 11:28:32.718422 PCI: 00:14.0: enabled 1
1724 11:28:32.721820 PCI: 00:14.1: enabled 0
1725 11:28:32.721933 PCI: 00:14.2: enabled 1
1726 11:28:32.724773 PCI: 00:14.3: enabled 1
1727 11:28:32.728119 PCI: 00:15.0: enabled 1
1728 11:28:32.731426 PCI: 00:15.1: enabled 1
1729 11:28:32.731501 PCI: 00:15.2: enabled 1
1730 11:28:32.734853 PCI: 00:15.3: enabled 1
1731 11:28:32.738294 PCI: 00:16.0: enabled 1
1732 11:28:32.741741 PCI: 00:16.1: enabled 0
1733 11:28:32.741814 PCI: 00:16.2: enabled 0
1734 11:28:32.744720 PCI: 00:16.3: enabled 0
1735 11:28:32.748072 PCI: 00:16.4: enabled 0
1736 11:28:32.751459 PCI: 00:16.5: enabled 0
1737 11:28:32.751532 PCI: 00:17.0: enabled 0
1738 11:28:32.754816 PCI: 00:19.0: enabled 0
1739 11:28:32.758081 PCI: 00:19.1: enabled 1
1740 11:28:32.758153 PCI: 00:19.2: enabled 0
1741 11:28:32.761625 PCI: 00:1c.0: enabled 1
1742 11:28:32.764951 PCI: 00:1c.1: enabled 0
1743 11:28:32.767730 PCI: 00:1c.2: enabled 0
1744 11:28:32.767833 PCI: 00:1c.3: enabled 0
1745 11:28:32.771065 PCI: 00:1c.4: enabled 0
1746 11:28:32.774319 PCI: 00:1c.5: enabled 0
1747 11:28:32.777632 PCI: 00:1c.6: enabled 1
1748 11:28:32.777703 PCI: 00:1c.7: enabled 0
1749 11:28:32.781042 PCI: 00:1d.0: enabled 1
1750 11:28:32.784474 PCI: 00:1d.1: enabled 0
1751 11:28:32.788606 PCI: 00:1d.2: enabled 1
1752 11:28:32.788677 PCI: 00:1d.3: enabled 0
1753 11:28:32.791952 PCI: 00:1e.0: enabled 1
1754 11:28:32.795356 PCI: 00:1e.1: enabled 0
1755 11:28:32.795432 PCI: 00:1e.2: enabled 1
1756 11:28:32.798268 PCI: 00:1e.3: enabled 1
1757 11:28:32.801630 PCI: 00:1f.0: enabled 1
1758 11:28:32.805219 PCI: 00:1f.1: enabled 0
1759 11:28:32.805303 PCI: 00:1f.2: enabled 1
1760 11:28:32.808287 PCI: 00:1f.3: enabled 1
1761 11:28:32.811707 PCI: 00:1f.4: enabled 0
1762 11:28:32.815119 PCI: 00:1f.5: enabled 1
1763 11:28:32.815210 PCI: 00:1f.6: enabled 0
1764 11:28:32.818501 PCI: 00:1f.7: enabled 0
1765 11:28:32.821817 APIC: 00: enabled 1
1766 11:28:32.821901 GENERIC: 0.0: enabled 1
1767 11:28:32.824686 GENERIC: 0.0: enabled 1
1768 11:28:32.828096 GENERIC: 1.0: enabled 1
1769 11:28:32.831419 GENERIC: 0.0: enabled 1
1770 11:28:32.831540 GENERIC: 1.0: enabled 1
1771 11:28:32.834798 USB0 port 0: enabled 1
1772 11:28:32.838160 GENERIC: 0.0: enabled 1
1773 11:28:32.838244 USB0 port 0: enabled 1
1774 11:28:32.841245 GENERIC: 0.0: enabled 1
1775 11:28:32.845121 I2C: 00:1a: enabled 1
1776 11:28:32.848016 I2C: 00:31: enabled 1
1777 11:28:32.848140 I2C: 00:32: enabled 1
1778 11:28:32.851510 I2C: 00:10: enabled 1
1779 11:28:32.854624 I2C: 00:15: enabled 1
1780 11:28:32.854712 GENERIC: 0.0: enabled 0
1781 11:28:32.857840 GENERIC: 1.0: enabled 0
1782 11:28:32.861153 GENERIC: 0.0: enabled 1
1783 11:28:32.861237 SPI: 00: enabled 1
1784 11:28:32.864540 SPI: 00: enabled 1
1785 11:28:32.867876 PNP: 0c09.0: enabled 1
1786 11:28:32.867960 GENERIC: 0.0: enabled 1
1787 11:28:32.871159 USB3 port 0: enabled 1
1788 11:28:32.874721 USB3 port 1: enabled 1
1789 11:28:32.874805 USB3 port 2: enabled 0
1790 11:28:32.878250 USB3 port 3: enabled 0
1791 11:28:32.881716 USB2 port 0: enabled 0
1792 11:28:32.884945 USB2 port 1: enabled 1
1793 11:28:32.885029 USB2 port 2: enabled 1
1794 11:28:32.888197 USB2 port 3: enabled 0
1795 11:28:32.891183 USB2 port 4: enabled 1
1796 11:28:32.891306 USB2 port 5: enabled 0
1797 11:28:32.894433 USB2 port 6: enabled 0
1798 11:28:32.898442 USB2 port 7: enabled 0
1799 11:28:32.901186 USB2 port 8: enabled 0
1800 11:28:32.901289 USB2 port 9: enabled 0
1801 11:28:32.904672 USB3 port 0: enabled 0
1802 11:28:32.907940 USB3 port 1: enabled 1
1803 11:28:32.908063 USB3 port 2: enabled 0
1804 11:28:32.911296 USB3 port 3: enabled 0
1805 11:28:32.914535 GENERIC: 0.0: enabled 1
1806 11:28:32.917815 GENERIC: 1.0: enabled 1
1807 11:28:32.917916 APIC: 01: enabled 1
1808 11:28:32.921183 APIC: 03: enabled 1
1809 11:28:32.921283 APIC: 04: enabled 1
1810 11:28:32.924908 APIC: 07: enabled 1
1811 11:28:32.927691 APIC: 06: enabled 1
1812 11:28:32.927791 APIC: 02: enabled 1
1813 11:28:32.931174 APIC: 05: enabled 1
1814 11:28:32.934476 PCI: 01:00.0: enabled 1
1815 11:28:32.937925 BS: BS_DEV_INIT run times (exec / console): 29 / 540 ms
1816 11:28:32.944802 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1817 11:28:32.947636 ELOG: NV offset 0xf30000 size 0x1000
1818 11:28:32.954566 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1819 11:28:32.961007 ELOG: Event(17) added with size 13 at 2023-06-09 11:28:32 UTC
1820 11:28:32.967689 ELOG: Event(92) added with size 9 at 2023-06-09 11:28:32 UTC
1821 11:28:32.974555 ELOG: Event(93) added with size 9 at 2023-06-09 11:28:32 UTC
1822 11:28:32.981208 ELOG: Event(9E) added with size 10 at 2023-06-09 11:28:32 UTC
1823 11:28:32.987741 ELOG: Event(9F) added with size 14 at 2023-06-09 11:28:32 UTC
1824 11:28:32.991040 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1825 11:28:32.997818 ELOG: Event(A1) added with size 10 at 2023-06-09 11:28:32 UTC
1826 11:28:33.004482 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1827 11:28:33.011179 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1828 11:28:33.014352 Finalize devices...
1829 11:28:33.014463 Devices finalized
1830 11:28:33.020622 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1831 11:28:33.024099 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1832 11:28:33.030717 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1833 11:28:33.034229 ME: HFSTS1 : 0x80030055
1834 11:28:33.041036 ME: HFSTS2 : 0x30280116
1835 11:28:33.044381 ME: HFSTS3 : 0x00000050
1836 11:28:33.050809 ME: HFSTS4 : 0x00004000
1837 11:28:33.054273 ME: HFSTS5 : 0x00000000
1838 11:28:33.057665 ME: HFSTS6 : 0x00400006
1839 11:28:33.060407 ME: Manufacturing Mode : YES
1840 11:28:33.067641 ME: SPI Protection Mode Enabled : NO
1841 11:28:33.070862 ME: FW Partition Table : OK
1842 11:28:33.073802 ME: Bringup Loader Failure : NO
1843 11:28:33.077226 ME: Firmware Init Complete : NO
1844 11:28:33.080652 ME: Boot Options Present : NO
1845 11:28:33.083876 ME: Update In Progress : NO
1846 11:28:33.087361 ME: D0i3 Support : YES
1847 11:28:33.090693 ME: Low Power State Enabled : NO
1848 11:28:33.096988 ME: CPU Replaced : YES
1849 11:28:33.100282 ME: CPU Replacement Valid : YES
1850 11:28:33.103530 ME: Current Working State : 5
1851 11:28:33.107290 ME: Current Operation State : 1
1852 11:28:33.110331 ME: Current Operation Mode : 3
1853 11:28:33.113690 ME: Error Code : 0
1854 11:28:33.117101 ME: Enhanced Debug Mode : NO
1855 11:28:33.120594 ME: CPU Debug Disabled : YES
1856 11:28:33.123805 ME: TXT Support : NO
1857 11:28:33.130089 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1858 11:28:33.140203 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1859 11:28:33.143458 CBFS: 'fallback/slic' not found.
1860 11:28:33.146790 ACPI: Writing ACPI tables at 76b01000.
1861 11:28:33.146938 ACPI: * FACS
1862 11:28:33.150250 ACPI: * DSDT
1863 11:28:33.153655 Ramoops buffer: 0x100000@0x76a00000.
1864 11:28:33.156668 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1865 11:28:33.163614 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1866 11:28:33.166971 Google Chrome EC: version:
1867 11:28:33.170152 ro: voema_v2.0.7540-147f8d37d1
1868 11:28:33.173560 rw: voema_v2.0.7540-147f8d37d1
1869 11:28:33.176873 running image: 2
1870 11:28:33.183098 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1871 11:28:33.186436 ACPI: * FADT
1872 11:28:33.186519 SCI is IRQ9
1873 11:28:33.190402 ACPI: added table 1/32, length now 40
1874 11:28:33.193540 ACPI: * SSDT
1875 11:28:33.196955 Found 1 CPU(s) with 8 core(s) each.
1876 11:28:33.200164 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1877 11:28:33.203385 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1878 11:28:33.209856 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1879 11:28:33.213378 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1880 11:28:33.220268 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1881 11:28:33.223094 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1882 11:28:33.230369 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1883 11:28:33.233675 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1884 11:28:33.239957 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1885 11:28:33.246857 \_SB.PCI0.RP09: Added StorageD3Enable property
1886 11:28:33.250102 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1887 11:28:33.253571 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1888 11:28:33.261100 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1889 11:28:33.264663 PS2K: Passing 80 keymaps to kernel
1890 11:28:33.270750 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1891 11:28:33.277530 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1892 11:28:33.284433 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1893 11:28:33.291123 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1894 11:28:33.297654 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1895 11:28:33.304344 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1896 11:28:33.311279 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1897 11:28:33.317356 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1898 11:28:33.320925 ACPI: added table 2/32, length now 44
1899 11:28:33.321009 ACPI: * MCFG
1900 11:28:33.327545 ACPI: added table 3/32, length now 48
1901 11:28:33.327638 ACPI: * TPM2
1902 11:28:33.330584 TPM2 log created at 0x769f0000
1903 11:28:33.334191 ACPI: added table 4/32, length now 52
1904 11:28:33.337571 ACPI: * MADT
1905 11:28:33.337654 SCI is IRQ9
1906 11:28:33.340907 ACPI: added table 5/32, length now 56
1907 11:28:33.344057 current = 76b09850
1908 11:28:33.344155 ACPI: * DMAR
1909 11:28:33.347529 ACPI: added table 6/32, length now 60
1910 11:28:33.354231 ACPI: added table 7/32, length now 64
1911 11:28:33.354316 ACPI: * HPET
1912 11:28:33.357758 ACPI: added table 8/32, length now 68
1913 11:28:33.361135 ACPI: done.
1914 11:28:33.361217 ACPI tables: 35216 bytes.
1915 11:28:33.364171 smbios_write_tables: 769ef000
1916 11:28:33.367598 EC returned error result code 3
1917 11:28:33.370965 Couldn't obtain OEM name from CBI
1918 11:28:33.374737 Create SMBIOS type 16
1919 11:28:33.377781 Create SMBIOS type 17
1920 11:28:33.381069 GENERIC: 0.0 (WIFI Device)
1921 11:28:33.381152 SMBIOS tables: 1750 bytes.
1922 11:28:33.388162 Writing table forward entry at 0x00000500
1923 11:28:33.394752 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1924 11:28:33.398020 Writing coreboot table at 0x76b25000
1925 11:28:33.404454 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1926 11:28:33.407871 1. 0000000000001000-000000000009ffff: RAM
1927 11:28:33.411258 2. 00000000000a0000-00000000000fffff: RESERVED
1928 11:28:33.418094 3. 0000000000100000-00000000769eefff: RAM
1929 11:28:33.421462 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1930 11:28:33.427715 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1931 11:28:33.434393 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1932 11:28:33.437963 7. 0000000077000000-000000007fbfffff: RESERVED
1933 11:28:33.441193 8. 00000000c0000000-00000000cfffffff: RESERVED
1934 11:28:33.447761 9. 00000000f8000000-00000000f9ffffff: RESERVED
1935 11:28:33.451219 10. 00000000fb000000-00000000fb000fff: RESERVED
1936 11:28:33.457817 11. 00000000fe000000-00000000fe00ffff: RESERVED
1937 11:28:33.461303 12. 00000000fed80000-00000000fed87fff: RESERVED
1938 11:28:33.467713 13. 00000000fed90000-00000000fed92fff: RESERVED
1939 11:28:33.471102 14. 00000000feda0000-00000000feda1fff: RESERVED
1940 11:28:33.477495 15. 00000000fedc0000-00000000feddffff: RESERVED
1941 11:28:33.480943 16. 0000000100000000-00000002803fffff: RAM
1942 11:28:33.484451 Passing 4 GPIOs to payload:
1943 11:28:33.487862 NAME | PORT | POLARITY | VALUE
1944 11:28:33.494218 lid | undefined | high | high
1945 11:28:33.497435 power | undefined | high | low
1946 11:28:33.504514 oprom | undefined | high | low
1947 11:28:33.511045 EC in RW | 0x000000e5 | high | high
1948 11:28:33.517835 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 69b4
1949 11:28:33.517916 coreboot table: 1576 bytes.
1950 11:28:33.520819 IMD ROOT 0. 0x76fff000 0x00001000
1951 11:28:33.527839 IMD SMALL 1. 0x76ffe000 0x00001000
1952 11:28:33.530798 FSP MEMORY 2. 0x76c4e000 0x003b0000
1953 11:28:33.534115 VPD 3. 0x76c4d000 0x00000367
1954 11:28:33.537559 RO MCACHE 4. 0x76c4c000 0x00000fdc
1955 11:28:33.540883 CONSOLE 5. 0x76c2c000 0x00020000
1956 11:28:33.544350 FMAP 6. 0x76c2b000 0x00000578
1957 11:28:33.547650 TIME STAMP 7. 0x76c2a000 0x00000910
1958 11:28:33.551079 VBOOT WORK 8. 0x76c16000 0x00014000
1959 11:28:33.557515 ROMSTG STCK 9. 0x76c15000 0x00001000
1960 11:28:33.561297 AFTER CAR 10. 0x76c0a000 0x0000b000
1961 11:28:33.564185 RAMSTAGE 11. 0x76b97000 0x00073000
1962 11:28:33.567614 REFCODE 12. 0x76b42000 0x00055000
1963 11:28:33.571186 SMM BACKUP 13. 0x76b32000 0x00010000
1964 11:28:33.574153 4f444749 14. 0x76b30000 0x00002000
1965 11:28:33.577477 EXT VBT15. 0x76b2d000 0x0000219f
1966 11:28:33.580912 COREBOOT 16. 0x76b25000 0x00008000
1967 11:28:33.584518 ACPI 17. 0x76b01000 0x00024000
1968 11:28:33.587437 ACPI GNVS 18. 0x76b00000 0x00001000
1969 11:28:33.594309 RAMOOPS 19. 0x76a00000 0x00100000
1970 11:28:33.597709 TPM2 TCGLOG20. 0x769f0000 0x00010000
1971 11:28:33.600849 SMBIOS 21. 0x769ef000 0x00000800
1972 11:28:33.600934 IMD small region:
1973 11:28:33.607740 IMD ROOT 0. 0x76ffec00 0x00000400
1974 11:28:33.611194 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1975 11:28:33.614740 POWER STATE 2. 0x76ffeb80 0x00000044
1976 11:28:33.617371 ROMSTAGE 3. 0x76ffeb60 0x00000004
1977 11:28:33.620913 MEM INFO 4. 0x76ffe980 0x000001e0
1978 11:28:33.627655 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1979 11:28:33.630938 MTRR: Physical address space:
1980 11:28:33.637775 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1981 11:28:33.644202 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1982 11:28:33.651099 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1983 11:28:33.654385 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1984 11:28:33.661035 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1985 11:28:33.667214 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1986 11:28:33.674128 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1987 11:28:33.677709 MTRR: Fixed MSR 0x250 0x0606060606060606
1988 11:28:33.683972 MTRR: Fixed MSR 0x258 0x0606060606060606
1989 11:28:33.687345 MTRR: Fixed MSR 0x259 0x0000000000000000
1990 11:28:33.690865 MTRR: Fixed MSR 0x268 0x0606060606060606
1991 11:28:33.693768 MTRR: Fixed MSR 0x269 0x0606060606060606
1992 11:28:33.700355 MTRR: Fixed MSR 0x26a 0x0606060606060606
1993 11:28:33.703762 MTRR: Fixed MSR 0x26b 0x0606060606060606
1994 11:28:33.707209 MTRR: Fixed MSR 0x26c 0x0606060606060606
1995 11:28:33.710404 MTRR: Fixed MSR 0x26d 0x0606060606060606
1996 11:28:33.713916 MTRR: Fixed MSR 0x26e 0x0606060606060606
1997 11:28:33.720708 MTRR: Fixed MSR 0x26f 0x0606060606060606
1998 11:28:33.723936 call enable_fixed_mtrr()
1999 11:28:33.727069 CPU physical address size: 39 bits
2000 11:28:33.730575 MTRR: default type WB/UC MTRR counts: 6/6.
2001 11:28:33.733827 MTRR: UC selected as default type.
2002 11:28:33.740339 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2003 11:28:33.747452 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2004 11:28:33.753619 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2005 11:28:33.760637 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2006 11:28:33.767130 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2007 11:28:33.773948 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2008 11:28:33.774031
2009 11:28:33.774096 MTRR check
2010 11:28:33.776953 Fixed MTRRs : Enabled
2011 11:28:33.780333 Variable MTRRs: Enabled
2012 11:28:33.780416
2013 11:28:33.783774 MTRR: Fixed MSR 0x250 0x0606060606060606
2014 11:28:33.787238 MTRR: Fixed MSR 0x258 0x0606060606060606
2015 11:28:33.793565 MTRR: Fixed MSR 0x259 0x0000000000000000
2016 11:28:33.796915 MTRR: Fixed MSR 0x268 0x0606060606060606
2017 11:28:33.800238 MTRR: Fixed MSR 0x269 0x0606060606060606
2018 11:28:33.803748 MTRR: Fixed MSR 0x26a 0x0606060606060606
2019 11:28:33.810522 MTRR: Fixed MSR 0x26b 0x0606060606060606
2020 11:28:33.813381 MTRR: Fixed MSR 0x26c 0x0606060606060606
2021 11:28:33.816742 MTRR: Fixed MSR 0x26d 0x0606060606060606
2022 11:28:33.819981 MTRR: Fixed MSR 0x26e 0x0606060606060606
2023 11:28:33.823475 MTRR: Fixed MSR 0x26f 0x0606060606060606
2024 11:28:33.833709 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2025 11:28:33.833794 call enable_fixed_mtrr()
2026 11:28:33.838175 Checking cr50 for pending updates
2027 11:28:33.842052 CPU physical address size: 39 bits
2028 11:28:33.845653 MTRR: Fixed MSR 0x250 0x0606060606060606
2029 11:28:33.848913 MTRR: Fixed MSR 0x250 0x0606060606060606
2030 11:28:33.852499 MTRR: Fixed MSR 0x258 0x0606060606060606
2031 11:28:33.858701 MTRR: Fixed MSR 0x259 0x0000000000000000
2032 11:28:33.862533 MTRR: Fixed MSR 0x268 0x0606060606060606
2033 11:28:33.865868 MTRR: Fixed MSR 0x269 0x0606060606060606
2034 11:28:33.868885 MTRR: Fixed MSR 0x26a 0x0606060606060606
2035 11:28:33.875413 MTRR: Fixed MSR 0x26b 0x0606060606060606
2036 11:28:33.879031 MTRR: Fixed MSR 0x26c 0x0606060606060606
2037 11:28:33.881856 MTRR: Fixed MSR 0x26d 0x0606060606060606
2038 11:28:33.885332 MTRR: Fixed MSR 0x26e 0x0606060606060606
2039 11:28:33.891789 MTRR: Fixed MSR 0x26f 0x0606060606060606
2040 11:28:33.895081 MTRR: Fixed MSR 0x258 0x0606060606060606
2041 11:28:33.898637 call enable_fixed_mtrr()
2042 11:28:33.901916 MTRR: Fixed MSR 0x259 0x0000000000000000
2043 11:28:33.905386 MTRR: Fixed MSR 0x268 0x0606060606060606
2044 11:28:33.911675 MTRR: Fixed MSR 0x269 0x0606060606060606
2045 11:28:33.915238 MTRR: Fixed MSR 0x26a 0x0606060606060606
2046 11:28:33.918437 MTRR: Fixed MSR 0x26b 0x0606060606060606
2047 11:28:33.921690 MTRR: Fixed MSR 0x26c 0x0606060606060606
2048 11:28:33.928841 MTRR: Fixed MSR 0x26d 0x0606060606060606
2049 11:28:33.932169 MTRR: Fixed MSR 0x26e 0x0606060606060606
2050 11:28:33.935463 MTRR: Fixed MSR 0x26f 0x0606060606060606
2051 11:28:33.938806 CPU physical address size: 39 bits
2052 11:28:33.942831 call enable_fixed_mtrr()
2053 11:28:33.946025 MTRR: Fixed MSR 0x250 0x0606060606060606
2054 11:28:33.953036 MTRR: Fixed MSR 0x250 0x0606060606060606
2055 11:28:33.956223 MTRR: Fixed MSR 0x258 0x0606060606060606
2056 11:28:33.959426 MTRR: Fixed MSR 0x259 0x0000000000000000
2057 11:28:33.962896 MTRR: Fixed MSR 0x268 0x0606060606060606
2058 11:28:33.969208 MTRR: Fixed MSR 0x269 0x0606060606060606
2059 11:28:33.972728 MTRR: Fixed MSR 0x26a 0x0606060606060606
2060 11:28:33.976044 MTRR: Fixed MSR 0x26b 0x0606060606060606
2061 11:28:33.979431 MTRR: Fixed MSR 0x26c 0x0606060606060606
2062 11:28:33.985715 MTRR: Fixed MSR 0x26d 0x0606060606060606
2063 11:28:33.989218 MTRR: Fixed MSR 0x26e 0x0606060606060606
2064 11:28:33.992712 MTRR: Fixed MSR 0x26f 0x0606060606060606
2065 11:28:33.999104 MTRR: Fixed MSR 0x258 0x0606060606060606
2066 11:28:33.999211 call enable_fixed_mtrr()
2067 11:28:34.005927 MTRR: Fixed MSR 0x259 0x0000000000000000
2068 11:28:34.008781 MTRR: Fixed MSR 0x268 0x0606060606060606
2069 11:28:34.012218 MTRR: Fixed MSR 0x269 0x0606060606060606
2070 11:28:34.015628 MTRR: Fixed MSR 0x26a 0x0606060606060606
2071 11:28:34.022450 MTRR: Fixed MSR 0x26b 0x0606060606060606
2072 11:28:34.025773 MTRR: Fixed MSR 0x26c 0x0606060606060606
2073 11:28:34.029134 MTRR: Fixed MSR 0x26d 0x0606060606060606
2074 11:28:34.032179 MTRR: Fixed MSR 0x26e 0x0606060606060606
2075 11:28:34.038866 MTRR: Fixed MSR 0x26f 0x0606060606060606
2076 11:28:34.042234 CPU physical address size: 39 bits
2077 11:28:34.045465 call enable_fixed_mtrr()
2078 11:28:34.048823 CPU physical address size: 39 bits
2079 11:28:34.052021 CPU physical address size: 39 bits
2080 11:28:34.055566 MTRR: Fixed MSR 0x250 0x0606060606060606
2081 11:28:34.062098 MTRR: Fixed MSR 0x250 0x0606060606060606
2082 11:28:34.065184 MTRR: Fixed MSR 0x258 0x0606060606060606
2083 11:28:34.068459 MTRR: Fixed MSR 0x259 0x0000000000000000
2084 11:28:34.072027 MTRR: Fixed MSR 0x268 0x0606060606060606
2085 11:28:34.078317 MTRR: Fixed MSR 0x269 0x0606060606060606
2086 11:28:34.081671 MTRR: Fixed MSR 0x26a 0x0606060606060606
2087 11:28:34.085080 MTRR: Fixed MSR 0x26b 0x0606060606060606
2088 11:28:34.088625 MTRR: Fixed MSR 0x26c 0x0606060606060606
2089 11:28:34.092156 MTRR: Fixed MSR 0x26d 0x0606060606060606
2090 11:28:34.098730 MTRR: Fixed MSR 0x26e 0x0606060606060606
2091 11:28:34.102047 MTRR: Fixed MSR 0x26f 0x0606060606060606
2092 11:28:34.105578 MTRR: Fixed MSR 0x258 0x0606060606060606
2093 11:28:34.108812 call enable_fixed_mtrr()
2094 11:28:34.111599 MTRR: Fixed MSR 0x259 0x0000000000000000
2095 11:28:34.118663 MTRR: Fixed MSR 0x268 0x0606060606060606
2096 11:28:34.122094 MTRR: Fixed MSR 0x269 0x0606060606060606
2097 11:28:34.124962 MTRR: Fixed MSR 0x26a 0x0606060606060606
2098 11:28:34.128282 MTRR: Fixed MSR 0x26b 0x0606060606060606
2099 11:28:34.135162 MTRR: Fixed MSR 0x26c 0x0606060606060606
2100 11:28:34.138478 MTRR: Fixed MSR 0x26d 0x0606060606060606
2101 11:28:34.141568 MTRR: Fixed MSR 0x26e 0x0606060606060606
2102 11:28:34.144834 MTRR: Fixed MSR 0x26f 0x0606060606060606
2103 11:28:34.149293 CPU physical address size: 39 bits
2104 11:28:34.156912 call enable_fixed_mtrr()
2105 11:28:34.156996 Reading cr50 TPM mode
2106 11:28:34.160005 CPU physical address size: 39 bits
2107 11:28:34.166977 BS: BS_PAYLOAD_LOAD entry times (exec / console): 323 / 6 ms
2108 11:28:34.176720 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2109 11:28:34.180375 Checking segment from ROM address 0xffc02b38
2110 11:28:34.183573 Checking segment from ROM address 0xffc02b54
2111 11:28:34.190392 Loading segment from ROM address 0xffc02b38
2112 11:28:34.190475 code (compression=0)
2113 11:28:34.200129 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2114 11:28:34.206577 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2115 11:28:34.210212 it's not compressed!
2116 11:28:34.349522 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2117 11:28:34.355829 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2118 11:28:34.362647 Loading segment from ROM address 0xffc02b54
2119 11:28:34.362748 Entry Point 0x30000000
2120 11:28:34.365879 Loaded segments
2121 11:28:34.372588 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2122 11:28:34.415562 Finalizing chipset.
2123 11:28:34.418576 Finalizing SMM.
2124 11:28:34.418699 APMC done.
2125 11:28:34.425383 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2126 11:28:34.428737 mp_park_aps done after 0 msecs.
2127 11:28:34.432087 Jumping to boot code at 0x30000000(0x76b25000)
2128 11:28:34.442560 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2129 11:28:34.442642
2130 11:28:34.442708
2131 11:28:34.442769
2132 11:28:34.445359 Starting depthcharge on Voema...
2133 11:28:34.445455
2134 11:28:34.445833 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2135 11:28:34.445931 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2136 11:28:34.446025 Setting prompt string to ['volteer:']
2137 11:28:34.446112 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2138 11:28:34.455040 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2139 11:28:34.455122
2140 11:28:34.461957 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2141 11:28:34.462031
2142 11:28:34.468276 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2143 11:28:34.468378
2144 11:28:34.472146 Failed to find eMMC card reader
2145 11:28:34.472228
2146 11:28:34.472291 Wipe memory regions:
2147 11:28:34.472350
2148 11:28:34.478834 [0x00000000001000, 0x000000000a0000)
2149 11:28:34.478962
2150 11:28:34.482018 [0x00000000100000, 0x00000030000000)
2151 11:28:34.507112
2152 11:28:34.510164 [0x00000032662db0, 0x000000769ef000)
2153 11:28:34.545757
2154 11:28:34.548885 [0x00000100000000, 0x00000280400000)
2155 11:28:34.750388
2156 11:28:34.753273 ec_init: CrosEC protocol v3 supported (256, 256)
2157 11:28:34.753399
2158 11:28:34.760452 update_port_state: port C0 state: usb enable 1 mux conn 0
2159 11:28:34.760560
2160 11:28:34.767111 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2161 11:28:34.771689
2162 11:28:34.774424 pmc_check_ipc_sts: STS_BUSY done after 1611 us
2163 11:28:34.774501
2164 11:28:34.777743 send_conn_disc_msg: pmc_send_cmd succeeded
2165 11:28:35.210960
2166 11:28:35.211135 R8152: Initializing
2167 11:28:35.211239
2168 11:28:35.213680 Version 6 (ocp_data = 5c30)
2169 11:28:35.213781
2170 11:28:35.217317 R8152: Done initializing
2171 11:28:35.217419
2172 11:28:35.220205 Adding net device
2173 11:28:35.523496
2174 11:28:35.526820 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2175 11:28:35.526934
2176 11:28:35.527039
2177 11:28:35.527132
2178 11:28:35.530459 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2180 11:28:35.630830 volteer: tftpboot 192.168.201.1 10657575/tftp-deploy-hcrrd2bo/kernel/bzImage 10657575/tftp-deploy-hcrrd2bo/kernel/cmdline 10657575/tftp-deploy-hcrrd2bo/ramdisk/ramdisk.cpio.gz
2181 11:28:35.630975 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2182 11:28:35.631099 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2183 11:28:35.635575 tftpboot 192.168.201.1 10657575/tftp-deploy-hcrrd2bo/kernel/bzImloy-hcrrd2bo/kernel/cmdline 10657575/tftp-deploy-hcrrd2bo/ramdisk/ramdisk.cpio.gz
2184 11:28:35.635697
2185 11:28:35.635794 Waiting for link
2186 11:28:35.838843
2187 11:28:35.838992 done.
2188 11:28:35.839064
2189 11:28:35.839128 MAC: 00:24:32:30:7d:bc
2190 11:28:35.839195
2191 11:28:35.842334 Sending DHCP discover... done.
2192 11:28:35.842440
2193 11:28:35.845168 Waiting for reply... done.
2194 11:28:35.845245
2195 11:28:35.848569 Sending DHCP request... done.
2196 11:28:35.848685
2197 11:28:35.855516 Waiting for reply... done.
2198 11:28:35.855605
2199 11:28:35.855675 My ip is 192.168.201.22
2200 11:28:35.855737
2201 11:28:35.858866 The DHCP server ip is 192.168.201.1
2202 11:28:35.858951
2203 11:28:35.865332 TFTP server IP predefined by user: 192.168.201.1
2204 11:28:35.865410
2205 11:28:35.871966 Bootfile predefined by user: 10657575/tftp-deploy-hcrrd2bo/kernel/bzImage
2206 11:28:35.872128
2207 11:28:35.875613 Sending tftp read request... done.
2208 11:28:35.875688
2209 11:28:35.878303 Waiting for the transfer...
2210 11:28:35.878387
2211 11:28:36.416398 00000000 ################################################################
2212 11:28:36.416546
2213 11:28:36.993897 00080000 ################################################################
2214 11:28:36.994095
2215 11:28:37.657458 00100000 ################################################################
2216 11:28:37.657984
2217 11:28:38.310759 00180000 ################################################################
2218 11:28:38.310935
2219 11:28:38.894294 00200000 ################################################################
2220 11:28:38.894455
2221 11:28:39.465896 00280000 ################################################################
2222 11:28:39.466034
2223 11:28:40.031167 00300000 ################################################################
2224 11:28:40.031323
2225 11:28:40.590853 00380000 ################################################################
2226 11:28:40.590993
2227 11:28:41.124429 00400000 ################################################################
2228 11:28:41.124572
2229 11:28:41.663924 00480000 ################################################################
2230 11:28:41.664168
2231 11:28:42.209005 00500000 ################################################################
2232 11:28:42.209149
2233 11:28:42.790070 00580000 ################################################################
2234 11:28:42.790210
2235 11:28:43.368728 00600000 ################################################################
2236 11:28:43.368881
2237 11:28:43.973731 00680000 ################################################################
2238 11:28:43.973868
2239 11:28:44.621471 00700000 ################################################################
2240 11:28:44.622166
2241 11:28:45.204761 00780000 ################################################################
2242 11:28:45.204909
2243 11:28:45.808530 00800000 ################################################################
2244 11:28:45.808680
2245 11:28:46.406958 00880000 ################################################################
2246 11:28:46.407095
2247 11:28:46.974673 00900000 ################################################################
2248 11:28:46.974825
2249 11:28:47.544867 00980000 ################################################################
2250 11:28:47.545031
2251 11:28:47.940505 00a00000 ############################################### done.
2252 11:28:47.940640
2253 11:28:47.944349 The bootfile was 10863104 bytes long.
2254 11:28:47.944428
2255 11:28:47.947199 Sending tftp read request... done.
2256 11:28:47.947276
2257 11:28:47.951179 Waiting for the transfer...
2258 11:28:47.951258
2259 11:28:48.547723 00000000 ################################################################
2260 11:28:48.548315
2261 11:28:49.185414 00080000 ################################################################
2262 11:28:49.185971
2263 11:28:49.827386 00100000 ################################################################
2264 11:28:49.827917
2265 11:28:50.459783 00180000 ################################################################
2266 11:28:50.460341
2267 11:28:51.174809 00200000 ################################################################
2268 11:28:51.175382
2269 11:28:51.826990 00280000 ################################################################
2270 11:28:51.827125
2271 11:28:52.398186 00300000 ################################################################
2272 11:28:52.398684
2273 11:28:53.094835 00380000 ################################################################
2274 11:28:53.095338
2275 11:28:53.791621 00400000 ################################################################
2276 11:28:53.792280
2277 11:28:54.487520 00480000 ################################################################
2278 11:28:54.488091
2279 11:28:55.193775 00500000 ################################################################
2280 11:28:55.194324
2281 11:28:55.730292 00580000 ################################################ done.
2282 11:28:55.730846
2283 11:28:55.733326 Sending tftp read request... done.
2284 11:28:55.733850
2285 11:28:55.736558 Waiting for the transfer...
2286 11:28:55.736996
2287 11:28:55.737345 00000000 # done.
2288 11:28:55.737681
2289 11:28:55.746766 Command line loaded dynamically from TFTP file: 10657575/tftp-deploy-hcrrd2bo/kernel/cmdline
2290 11:28:55.747356
2291 11:28:55.769860 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10657575/extract-nfsrootfs-d0ydoo8o,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2292 11:28:55.773843
2293 11:28:55.777330 Shutting down all USB controllers.
2294 11:28:55.777904
2295 11:28:55.778283 Removing current net device
2296 11:28:55.778636
2297 11:28:55.780238 Finalizing coreboot
2298 11:28:55.780745
2299 11:28:55.786996 Exiting depthcharge with code 4 at timestamp: 29979006
2300 11:28:55.787588
2301 11:28:55.787965
2302 11:28:55.788458 Starting kernel ...
2303 11:28:55.788812
2304 11:28:55.789169
2305 11:28:55.790457 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2306 11:28:55.790977 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
2307 11:28:55.791404 Setting prompt string to ['Linux version [0-9]']
2308 11:28:55.791798 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2309 11:28:55.792236 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2311 11:33:18.791764 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
2313 11:33:18.793037 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
2315 11:33:18.793791 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2318 11:33:18.795238 end: 2 depthcharge-action (duration 00:05:00) [common]
2320 11:33:18.796601 Cleaning after the job
2321 11:33:18.797053 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10657575/tftp-deploy-hcrrd2bo/ramdisk
2322 11:33:18.800776 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10657575/tftp-deploy-hcrrd2bo/kernel
2323 11:33:18.806309 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10657575/tftp-deploy-hcrrd2bo/nfsrootfs
2324 11:33:18.887824 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10657575/tftp-deploy-hcrrd2bo/modules
2325 11:33:18.888523 start: 5.1 power-off (timeout 00:00:30) [common]
2326 11:33:18.888704 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-5' '--port=1' '--command=off'
2327 11:33:18.966079 >> Command sent successfully.
2328 11:33:18.968498 Returned 0 in 0 seconds
2329 11:33:19.069228 end: 5.1 power-off (duration 00:00:00) [common]
2331 11:33:19.070856 start: 5.2 read-feedback (timeout 00:10:00) [common]
2332 11:33:19.072242 Listened to connection for namespace 'common' for up to 1s
2333 11:33:20.072448 Finalising connection for namespace 'common'
2334 11:33:20.073147 Disconnecting from shell: Finalise
2335 11:33:20.073617
2336 11:33:20.174633 end: 5.2 read-feedback (duration 00:00:01) [common]
2337 11:33:20.175304 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10657575
2338 11:33:20.479791 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10657575
2339 11:33:20.479991 JobError: Your job cannot terminate cleanly.