Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
1 11:28:02.193758 lava-dispatcher, installed at version: 2023.05.1
2 11:28:02.194001 start: 0 validate
3 11:28:02.194153 Start time: 2023-06-09 11:28:02.194145+00:00 (UTC)
4 11:28:02.194296 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:28:02.194440 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20230527.0%2Famd64%2Finitrd.cpio.gz exists
6 11:28:02.461579 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:28:02.461791 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.283-cip98-224-g5f5303d7920a9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:28:02.711860 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:28:02.712062 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20230527.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 11:28:08.091173 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:28:08.091953 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.283-cip98-224-g5f5303d7920a9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 11:28:09.094205 validate duration: 6.90
14 11:28:09.094523 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 11:28:09.094654 start: 1.1 download-retry (timeout 00:10:00) [common]
16 11:28:09.094759 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 11:28:09.094906 Not decompressing ramdisk as can be used compressed.
18 11:28:09.095015 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20230527.0/amd64/initrd.cpio.gz
19 11:28:09.095099 saving as /var/lib/lava/dispatcher/tmp/10657508/tftp-deploy-f2dyscyx/ramdisk/initrd.cpio.gz
20 11:28:09.095171 total size: 6136227 (5MB)
21 11:28:09.096606 progress 0% (0MB)
22 11:28:09.098838 progress 5% (0MB)
23 11:28:09.100860 progress 10% (0MB)
24 11:28:09.103001 progress 15% (0MB)
25 11:28:09.104885 progress 20% (1MB)
26 11:28:09.106823 progress 25% (1MB)
27 11:28:09.108944 progress 30% (1MB)
28 11:28:09.110759 progress 35% (2MB)
29 11:28:09.112568 progress 40% (2MB)
30 11:28:09.114564 progress 45% (2MB)
31 11:28:09.116282 progress 50% (2MB)
32 11:28:09.118033 progress 55% (3MB)
33 11:28:09.119993 progress 60% (3MB)
34 11:28:09.121708 progress 65% (3MB)
35 11:28:09.123607 progress 70% (4MB)
36 11:28:09.125312 progress 75% (4MB)
37 11:28:09.127015 progress 80% (4MB)
38 11:28:09.128913 progress 85% (5MB)
39 11:28:09.130657 progress 90% (5MB)
40 11:28:09.132415 progress 95% (5MB)
41 11:28:09.134335 progress 100% (5MB)
42 11:28:09.134488 5MB downloaded in 0.04s (148.86MB/s)
43 11:28:09.134652 end: 1.1.1 http-download (duration 00:00:00) [common]
45 11:28:09.134919 end: 1.1 download-retry (duration 00:00:00) [common]
46 11:28:09.135017 start: 1.2 download-retry (timeout 00:10:00) [common]
47 11:28:09.135115 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 11:28:09.135255 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.283-cip98-224-g5f5303d7920a9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 11:28:09.135336 saving as /var/lib/lava/dispatcher/tmp/10657508/tftp-deploy-f2dyscyx/kernel/bzImage
50 11:28:09.135404 total size: 10863104 (10MB)
51 11:28:09.135486 No compression specified
52 11:28:09.136727 progress 0% (0MB)
53 11:28:09.139832 progress 5% (0MB)
54 11:28:09.143104 progress 10% (1MB)
55 11:28:09.146240 progress 15% (1MB)
56 11:28:09.149580 progress 20% (2MB)
57 11:28:09.152639 progress 25% (2MB)
58 11:28:09.155864 progress 30% (3MB)
59 11:28:09.159045 progress 35% (3MB)
60 11:28:09.162075 progress 40% (4MB)
61 11:28:09.165303 progress 45% (4MB)
62 11:28:09.168334 progress 50% (5MB)
63 11:28:09.171557 progress 55% (5MB)
64 11:28:09.174635 progress 60% (6MB)
65 11:28:09.177928 progress 65% (6MB)
66 11:28:09.181184 progress 70% (7MB)
67 11:28:09.184269 progress 75% (7MB)
68 11:28:09.187515 progress 80% (8MB)
69 11:28:09.190648 progress 85% (8MB)
70 11:28:09.193887 progress 90% (9MB)
71 11:28:09.196934 progress 95% (9MB)
72 11:28:09.200207 progress 100% (10MB)
73 11:28:09.200401 10MB downloaded in 0.06s (159.40MB/s)
74 11:28:09.200561 end: 1.2.1 http-download (duration 00:00:00) [common]
76 11:28:09.200833 end: 1.2 download-retry (duration 00:00:00) [common]
77 11:28:09.200941 start: 1.3 download-retry (timeout 00:10:00) [common]
78 11:28:09.201048 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 11:28:09.201199 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20230527.0/amd64/full.rootfs.tar.xz
80 11:28:09.201288 saving as /var/lib/lava/dispatcher/tmp/10657508/tftp-deploy-f2dyscyx/nfsrootfs/full.rootfs.tar
81 11:28:09.201359 total size: 202642916 (193MB)
82 11:28:09.201429 Using unxz to decompress xz
83 11:28:09.205361 progress 0% (0MB)
84 11:28:09.870981 progress 5% (9MB)
85 11:28:10.465186 progress 10% (19MB)
86 11:28:11.106515 progress 15% (29MB)
87 11:28:11.423561 progress 20% (38MB)
88 11:28:12.071864 progress 25% (48MB)
89 11:28:12.713690 progress 30% (58MB)
90 11:28:13.356738 progress 35% (67MB)
91 11:28:13.991552 progress 40% (77MB)
92 11:28:14.645402 progress 45% (86MB)
93 11:28:15.338815 progress 50% (96MB)
94 11:28:16.035162 progress 55% (106MB)
95 11:28:16.829907 progress 60% (115MB)
96 11:28:17.334650 progress 65% (125MB)
97 11:28:17.455323 progress 70% (135MB)
98 11:28:17.632562 progress 75% (144MB)
99 11:28:17.745780 progress 80% (154MB)
100 11:28:17.802236 progress 85% (164MB)
101 11:28:17.909966 progress 90% (173MB)
102 11:28:18.309413 progress 95% (183MB)
103 11:28:18.958661 progress 100% (193MB)
104 11:28:18.964232 193MB downloaded in 9.76s (19.79MB/s)
105 11:28:18.964617 end: 1.3.1 http-download (duration 00:00:10) [common]
107 11:28:18.965070 end: 1.3 download-retry (duration 00:00:10) [common]
108 11:28:18.965203 start: 1.4 download-retry (timeout 00:09:50) [common]
109 11:28:18.965336 start: 1.4.1 http-download (timeout 00:09:50) [common]
110 11:28:18.965514 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.283-cip98-224-g5f5303d7920a9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 11:28:18.965621 saving as /var/lib/lava/dispatcher/tmp/10657508/tftp-deploy-f2dyscyx/modules/modules.tar
112 11:28:18.965721 total size: 484428 (0MB)
113 11:28:18.965821 Using unxz to decompress xz
114 11:28:18.969859 progress 6% (0MB)
115 11:28:18.970306 progress 13% (0MB)
116 11:28:18.970572 progress 20% (0MB)
117 11:28:18.972166 progress 27% (0MB)
118 11:28:18.974604 progress 33% (0MB)
119 11:28:18.976971 progress 40% (0MB)
120 11:28:18.979620 progress 47% (0MB)
121 11:28:18.981960 progress 54% (0MB)
122 11:28:18.983889 progress 60% (0MB)
123 11:28:18.986068 progress 67% (0MB)
124 11:28:18.988369 progress 74% (0MB)
125 11:28:18.990662 progress 81% (0MB)
126 11:28:18.992773 progress 87% (0MB)
127 11:28:18.995136 progress 94% (0MB)
128 11:28:18.997267 progress 100% (0MB)
129 11:28:19.003985 0MB downloaded in 0.04s (12.08MB/s)
130 11:28:19.004450 end: 1.4.1 http-download (duration 00:00:00) [common]
132 11:28:19.005027 end: 1.4 download-retry (duration 00:00:00) [common]
133 11:28:19.005221 start: 1.5 prepare-tftp-overlay (timeout 00:09:50) [common]
134 11:28:19.005417 start: 1.5.1 extract-nfsrootfs (timeout 00:09:50) [common]
135 11:28:22.827455 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10657508/extract-nfsrootfs-9lz1vy48
136 11:28:22.827670 end: 1.5.1 extract-nfsrootfs (duration 00:00:04) [common]
137 11:28:22.827791 start: 1.5.2 lava-overlay (timeout 00:09:46) [common]
138 11:28:22.827990 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10657508/lava-overlay-lubt00k2
139 11:28:22.828133 makedir: /var/lib/lava/dispatcher/tmp/10657508/lava-overlay-lubt00k2/lava-10657508/bin
140 11:28:22.828262 makedir: /var/lib/lava/dispatcher/tmp/10657508/lava-overlay-lubt00k2/lava-10657508/tests
141 11:28:22.828373 makedir: /var/lib/lava/dispatcher/tmp/10657508/lava-overlay-lubt00k2/lava-10657508/results
142 11:28:22.828486 Creating /var/lib/lava/dispatcher/tmp/10657508/lava-overlay-lubt00k2/lava-10657508/bin/lava-add-keys
143 11:28:22.828667 Creating /var/lib/lava/dispatcher/tmp/10657508/lava-overlay-lubt00k2/lava-10657508/bin/lava-add-sources
144 11:28:22.828821 Creating /var/lib/lava/dispatcher/tmp/10657508/lava-overlay-lubt00k2/lava-10657508/bin/lava-background-process-start
145 11:28:22.828961 Creating /var/lib/lava/dispatcher/tmp/10657508/lava-overlay-lubt00k2/lava-10657508/bin/lava-background-process-stop
146 11:28:22.829096 Creating /var/lib/lava/dispatcher/tmp/10657508/lava-overlay-lubt00k2/lava-10657508/bin/lava-common-functions
147 11:28:22.829230 Creating /var/lib/lava/dispatcher/tmp/10657508/lava-overlay-lubt00k2/lava-10657508/bin/lava-echo-ipv4
148 11:28:22.829363 Creating /var/lib/lava/dispatcher/tmp/10657508/lava-overlay-lubt00k2/lava-10657508/bin/lava-install-packages
149 11:28:22.829493 Creating /var/lib/lava/dispatcher/tmp/10657508/lava-overlay-lubt00k2/lava-10657508/bin/lava-installed-packages
150 11:28:22.829627 Creating /var/lib/lava/dispatcher/tmp/10657508/lava-overlay-lubt00k2/lava-10657508/bin/lava-os-build
151 11:28:22.829760 Creating /var/lib/lava/dispatcher/tmp/10657508/lava-overlay-lubt00k2/lava-10657508/bin/lava-probe-channel
152 11:28:22.829897 Creating /var/lib/lava/dispatcher/tmp/10657508/lava-overlay-lubt00k2/lava-10657508/bin/lava-probe-ip
153 11:28:22.830039 Creating /var/lib/lava/dispatcher/tmp/10657508/lava-overlay-lubt00k2/lava-10657508/bin/lava-target-ip
154 11:28:22.830172 Creating /var/lib/lava/dispatcher/tmp/10657508/lava-overlay-lubt00k2/lava-10657508/bin/lava-target-mac
155 11:28:22.830303 Creating /var/lib/lava/dispatcher/tmp/10657508/lava-overlay-lubt00k2/lava-10657508/bin/lava-target-storage
156 11:28:22.830439 Creating /var/lib/lava/dispatcher/tmp/10657508/lava-overlay-lubt00k2/lava-10657508/bin/lava-test-case
157 11:28:22.830580 Creating /var/lib/lava/dispatcher/tmp/10657508/lava-overlay-lubt00k2/lava-10657508/bin/lava-test-event
158 11:28:22.830714 Creating /var/lib/lava/dispatcher/tmp/10657508/lava-overlay-lubt00k2/lava-10657508/bin/lava-test-feedback
159 11:28:22.830847 Creating /var/lib/lava/dispatcher/tmp/10657508/lava-overlay-lubt00k2/lava-10657508/bin/lava-test-raise
160 11:28:22.830979 Creating /var/lib/lava/dispatcher/tmp/10657508/lava-overlay-lubt00k2/lava-10657508/bin/lava-test-reference
161 11:28:22.831110 Creating /var/lib/lava/dispatcher/tmp/10657508/lava-overlay-lubt00k2/lava-10657508/bin/lava-test-runner
162 11:28:22.831243 Creating /var/lib/lava/dispatcher/tmp/10657508/lava-overlay-lubt00k2/lava-10657508/bin/lava-test-set
163 11:28:22.831378 Creating /var/lib/lava/dispatcher/tmp/10657508/lava-overlay-lubt00k2/lava-10657508/bin/lava-test-shell
164 11:28:22.831829 Updating /var/lib/lava/dispatcher/tmp/10657508/lava-overlay-lubt00k2/lava-10657508/bin/lava-add-keys (debian)
165 11:28:22.833719 Updating /var/lib/lava/dispatcher/tmp/10657508/lava-overlay-lubt00k2/lava-10657508/bin/lava-add-sources (debian)
166 11:28:22.833896 Updating /var/lib/lava/dispatcher/tmp/10657508/lava-overlay-lubt00k2/lava-10657508/bin/lava-install-packages (debian)
167 11:28:22.836201 Updating /var/lib/lava/dispatcher/tmp/10657508/lava-overlay-lubt00k2/lava-10657508/bin/lava-installed-packages (debian)
168 11:28:22.838734 Updating /var/lib/lava/dispatcher/tmp/10657508/lava-overlay-lubt00k2/lava-10657508/bin/lava-os-build (debian)
169 11:28:22.838878 Creating /var/lib/lava/dispatcher/tmp/10657508/lava-overlay-lubt00k2/lava-10657508/environment
170 11:28:22.838989 LAVA metadata
171 11:28:22.839075 - LAVA_JOB_ID=10657508
172 11:28:22.839148 - LAVA_DISPATCHER_IP=192.168.201.1
173 11:28:22.839264 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:46) [common]
174 11:28:22.839341 skipped lava-vland-overlay
175 11:28:22.839435 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
176 11:28:22.839560 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:46) [common]
177 11:28:22.839643 skipped lava-multinode-overlay
178 11:28:22.839729 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
179 11:28:22.839823 start: 1.5.2.3 test-definition (timeout 00:09:46) [common]
180 11:28:22.839907 Loading test definitions
181 11:28:22.840008 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:46) [common]
182 11:28:22.840088 Using /lava-10657508 at stage 0
183 11:28:22.840418 uuid=10657508_1.5.2.3.1 testdef=None
184 11:28:22.840529 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
185 11:28:22.840626 start: 1.5.2.3.2 test-overlay (timeout 00:09:46) [common]
186 11:28:22.841112 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
188 11:28:22.841365 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:46) [common]
189 11:28:22.841955 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
191 11:28:22.842217 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:46) [common]
192 11:28:22.843689 runner path: /var/lib/lava/dispatcher/tmp/10657508/lava-overlay-lubt00k2/lava-10657508/0/tests/0_timesync-off test_uuid 10657508_1.5.2.3.1
193 11:28:22.843859 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
195 11:28:22.844115 start: 1.5.2.3.5 git-repo-action (timeout 00:09:46) [common]
196 11:28:22.844196 Using /lava-10657508 at stage 0
197 11:28:22.844313 Fetching tests from https://github.com/kernelci/test-definitions.git
198 11:28:22.844401 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/10657508/lava-overlay-lubt00k2/lava-10657508/0/tests/1_kselftest-alsa'
199 11:28:28.127706 Running '/usr/bin/git checkout kernelci.org
200 11:28:28.229626 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/10657508/lava-overlay-lubt00k2/lava-10657508/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
201 11:28:28.230692 uuid=10657508_1.5.2.3.5 testdef=None
202 11:28:28.230925 end: 1.5.2.3.5 git-repo-action (duration 00:00:05) [common]
204 11:28:28.231347 start: 1.5.2.3.6 test-overlay (timeout 00:09:41) [common]
205 11:28:28.232609 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
207 11:28:28.233005 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:41) [common]
208 11:28:28.234651 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
210 11:28:28.235071 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:41) [common]
211 11:28:28.236676 runner path: /var/lib/lava/dispatcher/tmp/10657508/lava-overlay-lubt00k2/lava-10657508/0/tests/1_kselftest-alsa test_uuid 10657508_1.5.2.3.5
212 11:28:28.236823 BOARD='asus-C436FA-Flip-hatch'
213 11:28:28.236939 BRANCH='cip-gitlab'
214 11:28:28.237042 SKIPFILE='/dev/null'
215 11:28:28.237143 SKIP_INSTALL='True'
216 11:28:28.237241 TESTPROG_URL='None'
217 11:28:28.237335 TST_CASENAME=''
218 11:28:28.237426 TST_CMDFILES='alsa'
219 11:28:28.237642 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
221 11:28:28.238028 Creating lava-test-runner.conf files
222 11:28:28.238138 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10657508/lava-overlay-lubt00k2/lava-10657508/0 for stage 0
223 11:28:28.238282 - 0_timesync-off
224 11:28:28.238414 - 1_kselftest-alsa
225 11:28:28.238570 end: 1.5.2.3 test-definition (duration 00:00:05) [common]
226 11:28:28.238716 start: 1.5.2.4 compress-overlay (timeout 00:09:41) [common]
227 11:28:36.749373 end: 1.5.2.4 compress-overlay (duration 00:00:09) [common]
228 11:28:36.749544 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:32) [common]
229 11:28:36.749704 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
230 11:28:36.749818 end: 1.5.2 lava-overlay (duration 00:00:14) [common]
231 11:28:36.749922 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:32) [common]
232 11:28:36.919279 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
233 11:28:36.919705 start: 1.5.4 extract-modules (timeout 00:09:32) [common]
234 11:28:36.919837 extracting modules file /var/lib/lava/dispatcher/tmp/10657508/tftp-deploy-f2dyscyx/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10657508/extract-nfsrootfs-9lz1vy48
235 11:28:36.942858 extracting modules file /var/lib/lava/dispatcher/tmp/10657508/tftp-deploy-f2dyscyx/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10657508/extract-overlay-ramdisk-gnf2lf0x/ramdisk
236 11:28:36.965365 end: 1.5.4 extract-modules (duration 00:00:00) [common]
237 11:28:36.965534 start: 1.5.5 apply-overlay-tftp (timeout 00:09:32) [common]
238 11:28:36.965641 [common] Applying overlay to NFS
239 11:28:36.965720 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10657508/compress-overlay-18f783qp/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10657508/extract-nfsrootfs-9lz1vy48
240 11:28:38.106919 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
241 11:28:38.107112 start: 1.5.6 configure-preseed-file (timeout 00:09:31) [common]
242 11:28:38.107216 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
243 11:28:38.107327 start: 1.5.7 compress-ramdisk (timeout 00:09:31) [common]
244 11:28:38.107418 Building ramdisk /var/lib/lava/dispatcher/tmp/10657508/extract-overlay-ramdisk-gnf2lf0x/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10657508/extract-overlay-ramdisk-gnf2lf0x/ramdisk
245 11:28:38.199546 >> 34853 blocks
246 11:28:38.962355 rename /var/lib/lava/dispatcher/tmp/10657508/extract-overlay-ramdisk-gnf2lf0x/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10657508/tftp-deploy-f2dyscyx/ramdisk/ramdisk.cpio.gz
247 11:28:38.962883 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
248 11:28:38.963042 start: 1.5.8 prepare-kernel (timeout 00:09:30) [common]
249 11:28:38.963189 start: 1.5.8.1 prepare-fit (timeout 00:09:30) [common]
250 11:28:38.963319 No mkimage arch provided, not using FIT.
251 11:28:38.963417 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
252 11:28:38.963545 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
253 11:28:38.963663 end: 1.5 prepare-tftp-overlay (duration 00:00:20) [common]
254 11:28:38.963789 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:30) [common]
255 11:28:38.963898 No LXC device requested
256 11:28:38.964012 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 11:28:38.964120 start: 1.7 deploy-device-env (timeout 00:09:30) [common]
258 11:28:38.964223 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 11:28:38.964305 Checking files for TFTP limit of 4294967296 bytes.
260 11:28:38.964888 end: 1 tftp-deploy (duration 00:00:30) [common]
261 11:28:38.965045 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 11:28:38.965184 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 11:28:38.965368 substitutions:
264 11:28:38.965488 - {DTB}: None
265 11:28:38.965593 - {INITRD}: 10657508/tftp-deploy-f2dyscyx/ramdisk/ramdisk.cpio.gz
266 11:28:38.965696 - {KERNEL}: 10657508/tftp-deploy-f2dyscyx/kernel/bzImage
267 11:28:38.965794 - {LAVA_MAC}: None
268 11:28:38.965892 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10657508/extract-nfsrootfs-9lz1vy48
269 11:28:38.965999 - {NFS_SERVER_IP}: 192.168.201.1
270 11:28:38.966099 - {PRESEED_CONFIG}: None
271 11:28:38.966193 - {PRESEED_LOCAL}: None
272 11:28:38.966287 - {RAMDISK}: 10657508/tftp-deploy-f2dyscyx/ramdisk/ramdisk.cpio.gz
273 11:28:38.966383 - {ROOT_PART}: None
274 11:28:38.966479 - {ROOT}: None
275 11:28:38.966581 - {SERVER_IP}: 192.168.201.1
276 11:28:38.966674 - {TEE}: None
277 11:28:38.966774 Parsed boot commands:
278 11:28:38.966892 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
279 11:28:38.967163 Parsed boot commands: tftpboot 192.168.201.1 10657508/tftp-deploy-f2dyscyx/kernel/bzImage 10657508/tftp-deploy-f2dyscyx/kernel/cmdline 10657508/tftp-deploy-f2dyscyx/ramdisk/ramdisk.cpio.gz
280 11:28:38.967300 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
281 11:28:38.967431 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
282 11:28:38.967568 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
283 11:28:38.967702 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
284 11:28:38.967799 Not connected, no need to disconnect.
285 11:28:38.967884 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
286 11:28:38.967974 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
287 11:28:38.968072 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
288 11:28:38.971861 Setting prompt string to ['lava-test: # ']
289 11:28:38.972286 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
290 11:28:38.972416 end: 2.2.1 reset-connection (duration 00:00:00) [common]
291 11:28:38.972530 start: 2.2.2 reset-device (timeout 00:05:00) [common]
292 11:28:38.972630 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
293 11:28:38.972867 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
294 11:28:44.109670 >> Command sent successfully.
295 11:28:44.113038 Returned 0 in 5 seconds
296 11:28:44.213441 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
298 11:28:44.213939 end: 2.2.2 reset-device (duration 00:00:05) [common]
299 11:28:44.214096 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
300 11:28:44.214238 Setting prompt string to 'Starting depthcharge on Helios...'
301 11:28:44.214362 Changing prompt to 'Starting depthcharge on Helios...'
302 11:28:44.214489 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
303 11:28:44.214839 [Enter `^Ec?' for help]
304 11:28:44.834680
305 11:28:44.834875
306 11:28:44.844574 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
307 11:28:44.848344 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
308 11:28:44.855062 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
309 11:28:44.858162 CPU: AES supported, TXT NOT supported, VT supported
310 11:28:44.864753 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
311 11:28:44.868409 PCH: device id 0284 (rev 00) is Cometlake-U Premium
312 11:28:44.874716 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
313 11:28:44.878342 VBOOT: Loading verstage.
314 11:28:44.881670 FMAP: Found "FLASH" version 1.1 at 0xc04000.
315 11:28:44.888646 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
316 11:28:44.891731 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
317 11:28:44.894963 CBFS @ c08000 size 3f8000
318 11:28:44.901408 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
319 11:28:44.904802 CBFS: Locating 'fallback/verstage'
320 11:28:44.908636 CBFS: Found @ offset 10fb80 size 1072c
321 11:28:44.908779
322 11:28:44.911910
323 11:28:44.921298 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
324 11:28:44.935368 Probing TPM: . done!
325 11:28:44.939002 TPM ready after 0 ms
326 11:28:44.942322 Connected to device vid:did:rid of 1ae0:0028:00
327 11:28:44.952716 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
328 11:28:44.956017 Initialized TPM device CR50 revision 0
329 11:28:44.997036 tlcl_send_startup: Startup return code is 0
330 11:28:44.997186 TPM: setup succeeded
331 11:28:45.009481 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
332 11:28:45.013315 Chrome EC: UHEPI supported
333 11:28:45.016601 Phase 1
334 11:28:45.019922 FMAP: area GBB found @ c05000 (12288 bytes)
335 11:28:45.026873 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
336 11:28:45.027005 Phase 2
337 11:28:45.030068 Phase 3
338 11:28:45.033768 FMAP: area GBB found @ c05000 (12288 bytes)
339 11:28:45.039789 VB2:vb2_report_dev_firmware() This is developer signed firmware
340 11:28:45.046811 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
341 11:28:45.050140 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
342 11:28:45.056498 VB2:vb2_verify_keyblock() Checking keyblock signature...
343 11:28:45.072025 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
344 11:28:45.075237 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
345 11:28:45.082334 VB2:vb2_verify_fw_preamble() Verifying preamble.
346 11:28:45.086212 Phase 4
347 11:28:45.089826 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
348 11:28:45.096521 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
349 11:28:45.275651 VB2:vb2_rsa_verify_digest() Digest check failed!
350 11:28:45.282062 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
351 11:28:45.282196 Saving nvdata
352 11:28:45.285982 Reboot requested (10020007)
353 11:28:45.288755 board_reset() called!
354 11:28:45.288884 full_reset() called!
355 11:28:49.800566
356 11:28:49.800719
357 11:28:49.810975 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
358 11:28:49.814120 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
359 11:28:49.820560 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
360 11:28:49.823830 CPU: AES supported, TXT NOT supported, VT supported
361 11:28:49.830800 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
362 11:28:49.834031 PCH: device id 0284 (rev 00) is Cometlake-U Premium
363 11:28:49.840928 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
364 11:28:49.844520 VBOOT: Loading verstage.
365 11:28:49.847656 FMAP: Found "FLASH" version 1.1 at 0xc04000.
366 11:28:49.854340 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
367 11:28:49.857599 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
368 11:28:49.860735 CBFS @ c08000 size 3f8000
369 11:28:49.867939 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
370 11:28:49.871048 CBFS: Locating 'fallback/verstage'
371 11:28:49.874301 CBFS: Found @ offset 10fb80 size 1072c
372 11:28:49.877579
373 11:28:49.877677
374 11:28:49.887744 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
375 11:28:49.902123 Probing TPM: . done!
376 11:28:49.905165 TPM ready after 0 ms
377 11:28:49.908862 Connected to device vid:did:rid of 1ae0:0028:00
378 11:28:49.919108 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
379 11:28:49.922264 Initialized TPM device CR50 revision 0
380 11:28:49.963563 tlcl_send_startup: Startup return code is 0
381 11:28:49.963706 TPM: setup succeeded
382 11:28:49.976313 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
383 11:28:49.980198 Chrome EC: UHEPI supported
384 11:28:49.983270 Phase 1
385 11:28:49.986427 FMAP: area GBB found @ c05000 (12288 bytes)
386 11:28:49.993364 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
387 11:28:50.000164 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
388 11:28:50.003213 Recovery requested (1009000e)
389 11:28:50.008768 Saving nvdata
390 11:28:50.015104 tlcl_extend: response is 0
391 11:28:50.023626 tlcl_extend: response is 0
392 11:28:50.030613 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
393 11:28:50.034308 CBFS @ c08000 size 3f8000
394 11:28:50.040547 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
395 11:28:50.044337 CBFS: Locating 'fallback/romstage'
396 11:28:50.047568 CBFS: Found @ offset 80 size 145fc
397 11:28:50.050888 Accumulated console time in verstage 98 ms
398 11:28:50.050989
399 11:28:50.051084
400 11:28:50.064183 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
401 11:28:50.070604 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
402 11:28:50.074053 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
403 11:28:50.077338 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
404 11:28:50.084298 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
405 11:28:50.087499 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
406 11:28:50.090633 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
407 11:28:50.093934 TCO_STS: 0000 0000
408 11:28:50.097087 GEN_PMCON: e0015238 00000200
409 11:28:50.101063 GBLRST_CAUSE: 00000000 00000000
410 11:28:50.101187 prev_sleep_state 5
411 11:28:50.104244 Boot Count incremented to 58748
412 11:28:50.110558 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
413 11:28:50.113623 CBFS @ c08000 size 3f8000
414 11:28:50.120279 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
415 11:28:50.120375 CBFS: Locating 'fspm.bin'
416 11:28:50.123933 CBFS: Found @ offset 5ffc0 size 71000
417 11:28:50.128212 Chrome EC: UHEPI supported
418 11:28:50.135154 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
419 11:28:50.140806 Probing TPM: done!
420 11:28:50.147463 Connected to device vid:did:rid of 1ae0:0028:00
421 11:28:50.157223 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
422 11:28:50.162964 Initialized TPM device CR50 revision 0
423 11:28:50.172191 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
424 11:28:50.178335 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
425 11:28:50.182161 MRC cache found, size 1948
426 11:28:50.185320 bootmode is set to: 2
427 11:28:50.188618 PRMRR disabled by config.
428 11:28:50.188715 SPD INDEX = 1
429 11:28:50.195149 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
430 11:28:50.198413 CBFS @ c08000 size 3f8000
431 11:28:50.205289 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
432 11:28:50.205390 CBFS: Locating 'spd.bin'
433 11:28:50.208335 CBFS: Found @ offset 5fb80 size 400
434 11:28:50.211670 SPD: module type is LPDDR3
435 11:28:50.215109 SPD: module part is
436 11:28:50.221518 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
437 11:28:50.225009 SPD: device width 4 bits, bus width 8 bits
438 11:28:50.228142 SPD: module size is 4096 MB (per channel)
439 11:28:50.231659 memory slot: 0 configuration done.
440 11:28:50.235314 memory slot: 2 configuration done.
441 11:28:50.286201 CBMEM:
442 11:28:50.289553 IMD: root @ 99fff000 254 entries.
443 11:28:50.292705 IMD: root @ 99ffec00 62 entries.
444 11:28:50.295979 External stage cache:
445 11:28:50.299383 IMD: root @ 9abff000 254 entries.
446 11:28:50.302689 IMD: root @ 9abfec00 62 entries.
447 11:28:50.305801 Chrome EC: clear events_b mask to 0x0000000020004000
448 11:28:50.322138 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
449 11:28:50.335415 tlcl_write: response is 0
450 11:28:50.344725 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
451 11:28:50.350989 MRC: TPM MRC hash updated successfully.
452 11:28:50.351100 2 DIMMs found
453 11:28:50.354243 SMM Memory Map
454 11:28:50.357454 SMRAM : 0x9a000000 0x1000000
455 11:28:50.361090 Subregion 0: 0x9a000000 0xa00000
456 11:28:50.364417 Subregion 1: 0x9aa00000 0x200000
457 11:28:50.367679 Subregion 2: 0x9ac00000 0x400000
458 11:28:50.370932 top_of_ram = 0x9a000000
459 11:28:50.374291 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
460 11:28:50.380717 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
461 11:28:50.384385 MTRR Range: Start=ff000000 End=0 (Size 1000000)
462 11:28:50.390510 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
463 11:28:50.394262 CBFS @ c08000 size 3f8000
464 11:28:50.397326 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
465 11:28:50.400720 CBFS: Locating 'fallback/postcar'
466 11:28:50.407242 CBFS: Found @ offset 107000 size 4b44
467 11:28:50.410813 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
468 11:28:50.422934 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
469 11:28:50.426202 Processing 180 relocs. Offset value of 0x97c0c000
470 11:28:50.434946 Accumulated console time in romstage 286 ms
471 11:28:50.435088
472 11:28:50.435216
473 11:28:50.444902 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
474 11:28:50.451298 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
475 11:28:50.455065 CBFS @ c08000 size 3f8000
476 11:28:50.458234 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
477 11:28:50.461605 CBFS: Locating 'fallback/ramstage'
478 11:28:50.468555 CBFS: Found @ offset 43380 size 1b9e8
479 11:28:50.474936 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
480 11:28:50.506636 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
481 11:28:50.509757 Processing 3976 relocs. Offset value of 0x98db0000
482 11:28:50.516232 Accumulated console time in postcar 52 ms
483 11:28:50.516336
484 11:28:50.516411
485 11:28:50.526267 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
486 11:28:50.533349 FMAP: area RO_VPD found @ c00000 (16384 bytes)
487 11:28:50.536638 WARNING: RO_VPD is uninitialized or empty.
488 11:28:50.539696 FMAP: area RW_VPD found @ af8000 (8192 bytes)
489 11:28:50.546537 FMAP: area RW_VPD found @ af8000 (8192 bytes)
490 11:28:50.546676 Normal boot.
491 11:28:50.553233 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
492 11:28:50.556562 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
493 11:28:50.559652 CBFS @ c08000 size 3f8000
494 11:28:50.566602 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
495 11:28:50.569823 CBFS: Locating 'cpu_microcode_blob.bin'
496 11:28:50.572959 CBFS: Found @ offset 14700 size 2ec00
497 11:28:50.576573 microcode: sig=0x806ec pf=0x4 revision=0xc9
498 11:28:50.579905 Skip microcode update
499 11:28:50.583052 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
500 11:28:50.586201 CBFS @ c08000 size 3f8000
501 11:28:50.593294 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
502 11:28:50.596486 CBFS: Locating 'fsps.bin'
503 11:28:50.599513 CBFS: Found @ offset d1fc0 size 35000
504 11:28:50.624588 Detected 4 core, 8 thread CPU.
505 11:28:50.628099 Setting up SMI for CPU
506 11:28:50.631297 IED base = 0x9ac00000
507 11:28:50.631427 IED size = 0x00400000
508 11:28:50.634561 Will perform SMM setup.
509 11:28:50.641121 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
510 11:28:50.647821 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
511 11:28:50.650895 Processing 16 relocs. Offset value of 0x00030000
512 11:28:50.654500 Attempting to start 7 APs
513 11:28:50.658278 Waiting for 10ms after sending INIT.
514 11:28:50.674580 Waiting for 1st SIPI to complete...done.
515 11:28:50.674683 AP: slot 6 apic_id 6.
516 11:28:50.677869 AP: slot 7 apic_id 7.
517 11:28:50.681014 AP: slot 3 apic_id 3.
518 11:28:50.681131 AP: slot 1 apic_id 2.
519 11:28:50.684300 AP: slot 2 apic_id 1.
520 11:28:50.687420 Waiting for 2nd SIPI to complete...done.
521 11:28:50.691243 AP: slot 5 apic_id 4.
522 11:28:50.694461 AP: slot 4 apic_id 5.
523 11:28:50.701073 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
524 11:28:50.704077 Processing 13 relocs. Offset value of 0x00038000
525 11:28:50.710897 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
526 11:28:50.714437 Installing SMM handler to 0x9a000000
527 11:28:50.724506 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
528 11:28:50.727608 Processing 658 relocs. Offset value of 0x9a010000
529 11:28:50.737742 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
530 11:28:50.740972 Processing 13 relocs. Offset value of 0x9a008000
531 11:28:50.747414 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
532 11:28:50.753973 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
533 11:28:50.757599 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
534 11:28:50.763845 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
535 11:28:50.770632 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
536 11:28:50.777075 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
537 11:28:50.780300 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
538 11:28:50.787418 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
539 11:28:50.790369 Clearing SMI status registers
540 11:28:50.793676 SMI_STS: PM1
541 11:28:50.793762 PM1_STS: PWRBTN
542 11:28:50.796948 TCO_STS: SECOND_TO
543 11:28:50.800746 New SMBASE 0x9a000000
544 11:28:50.804108 In relocation handler: CPU 0
545 11:28:50.807184 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
546 11:28:50.810399 Writing SMRR. base = 0x9a000006, mask=0xff000800
547 11:28:50.813575 Relocation complete.
548 11:28:50.817217 New SMBASE 0x99fff800
549 11:28:50.817313 In relocation handler: CPU 2
550 11:28:50.823907 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
551 11:28:50.826895 Writing SMRR. base = 0x9a000006, mask=0xff000800
552 11:28:50.830429 Relocation complete.
553 11:28:50.833439 New SMBASE 0x99fffc00
554 11:28:50.833525 In relocation handler: CPU 1
555 11:28:50.840484 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
556 11:28:50.843732 Writing SMRR. base = 0x9a000006, mask=0xff000800
557 11:28:50.847066 Relocation complete.
558 11:28:50.847154 New SMBASE 0x99fff400
559 11:28:50.850320 In relocation handler: CPU 3
560 11:28:50.856731 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
561 11:28:50.860113 Writing SMRR. base = 0x9a000006, mask=0xff000800
562 11:28:50.863873 Relocation complete.
563 11:28:50.864053 New SMBASE 0x99fff000
564 11:28:50.866822 In relocation handler: CPU 4
565 11:28:50.870286 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
566 11:28:50.877233 Writing SMRR. base = 0x9a000006, mask=0xff000800
567 11:28:50.880543 Relocation complete.
568 11:28:50.880683 New SMBASE 0x99ffec00
569 11:28:50.883742 In relocation handler: CPU 5
570 11:28:50.887034 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
571 11:28:50.893389 Writing SMRR. base = 0x9a000006, mask=0xff000800
572 11:28:50.896629 Relocation complete.
573 11:28:50.896768 New SMBASE 0x99ffe800
574 11:28:50.900249 In relocation handler: CPU 6
575 11:28:50.903601 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
576 11:28:50.909941 Writing SMRR. base = 0x9a000006, mask=0xff000800
577 11:28:50.910067 Relocation complete.
578 11:28:50.913728 New SMBASE 0x99ffe400
579 11:28:50.916827 In relocation handler: CPU 7
580 11:28:50.919935 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
581 11:28:50.926915 Writing SMRR. base = 0x9a000006, mask=0xff000800
582 11:28:50.927047 Relocation complete.
583 11:28:50.930196 Initializing CPU #0
584 11:28:50.933277 CPU: vendor Intel device 806ec
585 11:28:50.936924 CPU: family 06, model 8e, stepping 0c
586 11:28:50.940333 Clearing out pending MCEs
587 11:28:50.943817 Setting up local APIC...
588 11:28:50.943941 apic_id: 0x00 done.
589 11:28:50.946699 Turbo is available but hidden
590 11:28:50.950418 Turbo is available and visible
591 11:28:50.953713 VMX status: enabled
592 11:28:50.956772 IA32_FEATURE_CONTROL status: locked
593 11:28:50.956889 Skip microcode update
594 11:28:50.960548 CPU #0 initialized
595 11:28:50.963706 Initializing CPU #2
596 11:28:50.963806 Initializing CPU #5
597 11:28:50.967246 Initializing CPU #4
598 11:28:50.970282 CPU: vendor Intel device 806ec
599 11:28:50.973257 CPU: family 06, model 8e, stepping 0c
600 11:28:50.976691 CPU: vendor Intel device 806ec
601 11:28:50.980331 CPU: family 06, model 8e, stepping 0c
602 11:28:50.983462 Clearing out pending MCEs
603 11:28:50.986649 Clearing out pending MCEs
604 11:28:50.986737 Setting up local APIC...
605 11:28:50.989982 Initializing CPU #3
606 11:28:50.993618 Initializing CPU #1
607 11:28:50.996747 CPU: vendor Intel device 806ec
608 11:28:51.000052 CPU: family 06, model 8e, stepping 0c
609 11:28:51.003817 CPU: vendor Intel device 806ec
610 11:28:51.006994 CPU: family 06, model 8e, stepping 0c
611 11:28:51.010157 Clearing out pending MCEs
612 11:28:51.010243 Clearing out pending MCEs
613 11:28:51.013377 Setting up local APIC...
614 11:28:51.016703 CPU: vendor Intel device 806ec
615 11:28:51.020325 CPU: family 06, model 8e, stepping 0c
616 11:28:51.023324 Clearing out pending MCEs
617 11:28:51.026437 Initializing CPU #6
618 11:28:51.026532 Initializing CPU #7
619 11:28:51.030199 CPU: vendor Intel device 806ec
620 11:28:51.033391 CPU: family 06, model 8e, stepping 0c
621 11:28:51.036623 CPU: vendor Intel device 806ec
622 11:28:51.040059 CPU: family 06, model 8e, stepping 0c
623 11:28:51.043136 Clearing out pending MCEs
624 11:28:51.046277 Clearing out pending MCEs
625 11:28:51.049992 apic_id: 0x05 done.
626 11:28:51.050076 Setting up local APIC...
627 11:28:51.052962 Setting up local APIC...
628 11:28:51.056461 apic_id: 0x04 done.
629 11:28:51.056548 VMX status: enabled
630 11:28:51.059642 VMX status: enabled
631 11:28:51.063420 IA32_FEATURE_CONTROL status: locked
632 11:28:51.066680 IA32_FEATURE_CONTROL status: locked
633 11:28:51.069969 Skip microcode update
634 11:28:51.073042 apic_id: 0x03 done.
635 11:28:51.073126 apic_id: 0x02 done.
636 11:28:51.076580 VMX status: enabled
637 11:28:51.076669 VMX status: enabled
638 11:28:51.082997 IA32_FEATURE_CONTROL status: locked
639 11:28:51.086554 IA32_FEATURE_CONTROL status: locked
640 11:28:51.086644 Skip microcode update
641 11:28:51.089485 Skip microcode update
642 11:28:51.093113 CPU #3 initialized
643 11:28:51.093200 CPU #1 initialized
644 11:28:51.096287 Setting up local APIC...
645 11:28:51.099429 Setting up local APIC...
646 11:28:51.099522 CPU #4 initialized
647 11:28:51.102742 Skip microcode update
648 11:28:51.106497 apic_id: 0x07 done.
649 11:28:51.106582 Setting up local APIC...
650 11:28:51.109620 apic_id: 0x01 done.
651 11:28:51.112818 apic_id: 0x06 done.
652 11:28:51.112901 VMX status: enabled
653 11:28:51.116052 VMX status: enabled
654 11:28:51.119281 IA32_FEATURE_CONTROL status: locked
655 11:28:51.123048 IA32_FEATURE_CONTROL status: locked
656 11:28:51.126279 Skip microcode update
657 11:28:51.126397 Skip microcode update
658 11:28:51.129297 CPU #7 initialized
659 11:28:51.132916 CPU #6 initialized
660 11:28:51.133002 VMX status: enabled
661 11:28:51.136653 CPU #5 initialized
662 11:28:51.139717 IA32_FEATURE_CONTROL status: locked
663 11:28:51.142832 Skip microcode update
664 11:28:51.142944 CPU #2 initialized
665 11:28:51.146014 bsp_do_flight_plan done after 457 msecs.
666 11:28:51.149139 CPU: frequency set to 4200 MHz
667 11:28:51.152938 Enabling SMIs.
668 11:28:51.153021 Locking SMM.
669 11:28:51.168438 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
670 11:28:51.171691 CBFS @ c08000 size 3f8000
671 11:28:51.178573 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
672 11:28:51.178664 CBFS: Locating 'vbt.bin'
673 11:28:51.181561 CBFS: Found @ offset 5f5c0 size 499
674 11:28:51.188352 Found a VBT of 4608 bytes after decompression
675 11:28:51.369545 Display FSP Version Info HOB
676 11:28:51.373222 Reference Code - CPU = 9.0.1e.30
677 11:28:51.376235 uCode Version = 0.0.0.ca
678 11:28:51.379891 TXT ACM version = ff.ff.ff.ffff
679 11:28:51.383133 Display FSP Version Info HOB
680 11:28:51.386430 Reference Code - ME = 9.0.1e.30
681 11:28:51.389548 MEBx version = 0.0.0.0
682 11:28:51.393453 ME Firmware Version = Consumer SKU
683 11:28:51.396588 Display FSP Version Info HOB
684 11:28:51.399656 Reference Code - CML PCH = 9.0.1e.30
685 11:28:51.403291 PCH-CRID Status = Disabled
686 11:28:51.406204 PCH-CRID Original Value = ff.ff.ff.ffff
687 11:28:51.409706 PCH-CRID New Value = ff.ff.ff.ffff
688 11:28:51.412971 OPROM - RST - RAID = ff.ff.ff.ffff
689 11:28:51.416821 ChipsetInit Base Version = ff.ff.ff.ffff
690 11:28:51.419944 ChipsetInit Oem Version = ff.ff.ff.ffff
691 11:28:51.423171 Display FSP Version Info HOB
692 11:28:51.429503 Reference Code - SA - System Agent = 9.0.1e.30
693 11:28:51.429606 Reference Code - MRC = 0.7.1.6c
694 11:28:51.433335 SA - PCIe Version = 9.0.1e.30
695 11:28:51.436413 SA-CRID Status = Disabled
696 11:28:51.439627 SA-CRID Original Value = 0.0.0.c
697 11:28:51.443009 SA-CRID New Value = 0.0.0.c
698 11:28:51.446181 OPROM - VBIOS = ff.ff.ff.ffff
699 11:28:51.446278 RTC Init
700 11:28:51.453000 Set power on after power failure.
701 11:28:51.453098 Disabling Deep S3
702 11:28:51.456843 Disabling Deep S3
703 11:28:51.456938 Disabling Deep S4
704 11:28:51.459899 Disabling Deep S4
705 11:28:51.459993 Disabling Deep S5
706 11:28:51.463228 Disabling Deep S5
707 11:28:51.469757 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 192 exit 1
708 11:28:51.469856 Enumerating buses...
709 11:28:51.476632 Show all devs... Before device enumeration.
710 11:28:51.476733 Root Device: enabled 1
711 11:28:51.479917 CPU_CLUSTER: 0: enabled 1
712 11:28:51.483151 DOMAIN: 0000: enabled 1
713 11:28:51.483241 APIC: 00: enabled 1
714 11:28:51.486367 PCI: 00:00.0: enabled 1
715 11:28:51.489586 PCI: 00:02.0: enabled 1
716 11:28:51.493361 PCI: 00:04.0: enabled 0
717 11:28:51.493449 PCI: 00:05.0: enabled 0
718 11:28:51.496495 PCI: 00:12.0: enabled 1
719 11:28:51.499690 PCI: 00:12.5: enabled 0
720 11:28:51.503027 PCI: 00:12.6: enabled 0
721 11:28:51.503115 PCI: 00:14.0: enabled 1
722 11:28:51.506608 PCI: 00:14.1: enabled 0
723 11:28:51.509853 PCI: 00:14.3: enabled 1
724 11:28:51.509948 PCI: 00:14.5: enabled 0
725 11:28:51.512886 PCI: 00:15.0: enabled 1
726 11:28:51.516131 PCI: 00:15.1: enabled 1
727 11:28:51.519801 PCI: 00:15.2: enabled 0
728 11:28:51.519890 PCI: 00:15.3: enabled 0
729 11:28:51.523026 PCI: 00:16.0: enabled 1
730 11:28:51.526152 PCI: 00:16.1: enabled 0
731 11:28:51.529389 PCI: 00:16.2: enabled 0
732 11:28:51.529492 PCI: 00:16.3: enabled 0
733 11:28:51.532603 PCI: 00:16.4: enabled 0
734 11:28:51.536300 PCI: 00:16.5: enabled 0
735 11:28:51.539458 PCI: 00:17.0: enabled 1
736 11:28:51.539552 PCI: 00:19.0: enabled 1
737 11:28:51.542732 PCI: 00:19.1: enabled 0
738 11:28:51.546039 PCI: 00:19.2: enabled 0
739 11:28:51.546132 PCI: 00:1a.0: enabled 0
740 11:28:51.549781 PCI: 00:1c.0: enabled 0
741 11:28:51.553005 PCI: 00:1c.1: enabled 0
742 11:28:51.556016 PCI: 00:1c.2: enabled 0
743 11:28:51.556110 PCI: 00:1c.3: enabled 0
744 11:28:51.559755 PCI: 00:1c.4: enabled 0
745 11:28:51.562781 PCI: 00:1c.5: enabled 0
746 11:28:51.566529 PCI: 00:1c.6: enabled 0
747 11:28:51.566622 PCI: 00:1c.7: enabled 0
748 11:28:51.569761 PCI: 00:1d.0: enabled 1
749 11:28:51.572982 PCI: 00:1d.1: enabled 0
750 11:28:51.576229 PCI: 00:1d.2: enabled 0
751 11:28:51.576322 PCI: 00:1d.3: enabled 0
752 11:28:51.579356 PCI: 00:1d.4: enabled 0
753 11:28:51.583184 PCI: 00:1d.5: enabled 1
754 11:28:51.583278 PCI: 00:1e.0: enabled 1
755 11:28:51.586419 PCI: 00:1e.1: enabled 0
756 11:28:51.589597 PCI: 00:1e.2: enabled 1
757 11:28:51.592695 PCI: 00:1e.3: enabled 1
758 11:28:51.592789 PCI: 00:1f.0: enabled 1
759 11:28:51.596250 PCI: 00:1f.1: enabled 1
760 11:28:51.599368 PCI: 00:1f.2: enabled 1
761 11:28:51.602734 PCI: 00:1f.3: enabled 1
762 11:28:51.602826 PCI: 00:1f.4: enabled 1
763 11:28:51.605911 PCI: 00:1f.5: enabled 1
764 11:28:51.609224 PCI: 00:1f.6: enabled 0
765 11:28:51.609317 USB0 port 0: enabled 1
766 11:28:51.612943 I2C: 00:15: enabled 1
767 11:28:51.615963 I2C: 00:5d: enabled 1
768 11:28:51.619081 GENERIC: 0.0: enabled 1
769 11:28:51.619175 I2C: 00:1a: enabled 1
770 11:28:51.622895 I2C: 00:38: enabled 1
771 11:28:51.625903 I2C: 00:39: enabled 1
772 11:28:51.626053 I2C: 00:3a: enabled 1
773 11:28:51.629673 I2C: 00:3b: enabled 1
774 11:28:51.633005 PCI: 00:00.0: enabled 1
775 11:28:51.633122 SPI: 00: enabled 1
776 11:28:51.636230 SPI: 01: enabled 1
777 11:28:51.636329 PNP: 0c09.0: enabled 1
778 11:28:51.639351 USB2 port 0: enabled 1
779 11:28:51.643012 USB2 port 1: enabled 1
780 11:28:51.646629 USB2 port 2: enabled 0
781 11:28:51.646732 USB2 port 3: enabled 0
782 11:28:51.649707 USB2 port 5: enabled 0
783 11:28:51.653009 USB2 port 6: enabled 1
784 11:28:51.653107 USB2 port 9: enabled 1
785 11:28:51.656234 USB3 port 0: enabled 1
786 11:28:51.659912 USB3 port 1: enabled 1
787 11:28:51.660006 USB3 port 2: enabled 1
788 11:28:51.663180 USB3 port 3: enabled 1
789 11:28:51.666186 USB3 port 4: enabled 0
790 11:28:51.666281 APIC: 02: enabled 1
791 11:28:51.669951 APIC: 01: enabled 1
792 11:28:51.672997 APIC: 03: enabled 1
793 11:28:51.673093 APIC: 05: enabled 1
794 11:28:51.676642 APIC: 04: enabled 1
795 11:28:51.679777 APIC: 06: enabled 1
796 11:28:51.679871 APIC: 07: enabled 1
797 11:28:51.682891 Compare with tree...
798 11:28:51.682985 Root Device: enabled 1
799 11:28:51.686088 CPU_CLUSTER: 0: enabled 1
800 11:28:51.689969 APIC: 00: enabled 1
801 11:28:51.693068 APIC: 02: enabled 1
802 11:28:51.693162 APIC: 01: enabled 1
803 11:28:51.696348 APIC: 03: enabled 1
804 11:28:51.699769 APIC: 05: enabled 1
805 11:28:51.699863 APIC: 04: enabled 1
806 11:28:51.702697 APIC: 06: enabled 1
807 11:28:51.706345 APIC: 07: enabled 1
808 11:28:51.706440 DOMAIN: 0000: enabled 1
809 11:28:51.710149 PCI: 00:00.0: enabled 1
810 11:28:51.713215 PCI: 00:02.0: enabled 1
811 11:28:51.716281 PCI: 00:04.0: enabled 0
812 11:28:51.719414 PCI: 00:05.0: enabled 0
813 11:28:51.719526 PCI: 00:12.0: enabled 1
814 11:28:51.723264 PCI: 00:12.5: enabled 0
815 11:28:51.726191 PCI: 00:12.6: enabled 0
816 11:28:51.729780 PCI: 00:14.0: enabled 1
817 11:28:51.732787 USB0 port 0: enabled 1
818 11:28:51.732905 USB2 port 0: enabled 1
819 11:28:51.736368 USB2 port 1: enabled 1
820 11:28:51.739473 USB2 port 2: enabled 0
821 11:28:51.743311 USB2 port 3: enabled 0
822 11:28:51.746556 USB2 port 5: enabled 0
823 11:28:51.746670 USB2 port 6: enabled 1
824 11:28:51.749756 USB2 port 9: enabled 1
825 11:28:51.753316 USB3 port 0: enabled 1
826 11:28:51.756757 USB3 port 1: enabled 1
827 11:28:51.759762 USB3 port 2: enabled 1
828 11:28:51.762962 USB3 port 3: enabled 1
829 11:28:51.763059 USB3 port 4: enabled 0
830 11:28:51.766656 PCI: 00:14.1: enabled 0
831 11:28:51.769770 PCI: 00:14.3: enabled 1
832 11:28:51.772977 PCI: 00:14.5: enabled 0
833 11:28:51.773094 PCI: 00:15.0: enabled 1
834 11:28:51.776825 I2C: 00:15: enabled 1
835 11:28:51.779937 PCI: 00:15.1: enabled 1
836 11:28:51.783145 I2C: 00:5d: enabled 1
837 11:28:51.786397 GENERIC: 0.0: enabled 1
838 11:28:51.786492 PCI: 00:15.2: enabled 0
839 11:28:51.789408 PCI: 00:15.3: enabled 0
840 11:28:51.793248 PCI: 00:16.0: enabled 1
841 11:28:51.796508 PCI: 00:16.1: enabled 0
842 11:28:51.799724 PCI: 00:16.2: enabled 0
843 11:28:51.799819 PCI: 00:16.3: enabled 0
844 11:28:51.802832 PCI: 00:16.4: enabled 0
845 11:28:51.806455 PCI: 00:16.5: enabled 0
846 11:28:51.809417 PCI: 00:17.0: enabled 1
847 11:28:51.812952 PCI: 00:19.0: enabled 1
848 11:28:51.813046 I2C: 00:1a: enabled 1
849 11:28:51.815891 I2C: 00:38: enabled 1
850 11:28:51.819538 I2C: 00:39: enabled 1
851 11:28:51.822647 I2C: 00:3a: enabled 1
852 11:28:51.822735 I2C: 00:3b: enabled 1
853 11:28:51.825890 PCI: 00:19.1: enabled 0
854 11:28:51.829550 PCI: 00:19.2: enabled 0
855 11:28:51.832390 PCI: 00:1a.0: enabled 0
856 11:28:51.836011 PCI: 00:1c.0: enabled 0
857 11:28:51.836099 PCI: 00:1c.1: enabled 0
858 11:28:51.839299 PCI: 00:1c.2: enabled 0
859 11:28:51.842819 PCI: 00:1c.3: enabled 0
860 11:28:51.846022 PCI: 00:1c.4: enabled 0
861 11:28:51.846112 PCI: 00:1c.5: enabled 0
862 11:28:51.849195 PCI: 00:1c.6: enabled 0
863 11:28:51.852387 PCI: 00:1c.7: enabled 0
864 11:28:51.855944 PCI: 00:1d.0: enabled 1
865 11:28:51.859180 PCI: 00:1d.1: enabled 0
866 11:28:51.859268 PCI: 00:1d.2: enabled 0
867 11:28:51.862286 PCI: 00:1d.3: enabled 0
868 11:28:51.866028 PCI: 00:1d.4: enabled 0
869 11:28:51.869006 PCI: 00:1d.5: enabled 1
870 11:28:51.872041 PCI: 00:00.0: enabled 1
871 11:28:51.872154 PCI: 00:1e.0: enabled 1
872 11:28:51.875856 PCI: 00:1e.1: enabled 0
873 11:28:51.879012 PCI: 00:1e.2: enabled 1
874 11:28:51.882344 SPI: 00: enabled 1
875 11:28:51.885541 PCI: 00:1e.3: enabled 1
876 11:28:51.885629 SPI: 01: enabled 1
877 11:28:51.889226 PCI: 00:1f.0: enabled 1
878 11:28:51.892290 PNP: 0c09.0: enabled 1
879 11:28:51.896128 PCI: 00:1f.1: enabled 1
880 11:28:51.896220 PCI: 00:1f.2: enabled 1
881 11:28:51.899274 PCI: 00:1f.3: enabled 1
882 11:28:51.902374 PCI: 00:1f.4: enabled 1
883 11:28:51.905644 PCI: 00:1f.5: enabled 1
884 11:28:51.905729 PCI: 00:1f.6: enabled 0
885 11:28:51.908751 Root Device scanning...
886 11:28:51.912550 scan_static_bus for Root Device
887 11:28:51.915548 CPU_CLUSTER: 0 enabled
888 11:28:51.918953 DOMAIN: 0000 enabled
889 11:28:51.919096 DOMAIN: 0000 scanning...
890 11:28:51.922206 PCI: pci_scan_bus for bus 00
891 11:28:51.925849 PCI: 00:00.0 [8086/0000] ops
892 11:28:51.928964 PCI: 00:00.0 [8086/9b61] enabled
893 11:28:51.932694 PCI: 00:02.0 [8086/0000] bus ops
894 11:28:51.935627 PCI: 00:02.0 [8086/9b41] enabled
895 11:28:51.939270 PCI: 00:04.0 [8086/1903] disabled
896 11:28:51.942476 PCI: 00:08.0 [8086/1911] enabled
897 11:28:51.945909 PCI: 00:12.0 [8086/02f9] enabled
898 11:28:51.948955 PCI: 00:14.0 [8086/0000] bus ops
899 11:28:51.952438 PCI: 00:14.0 [8086/02ed] enabled
900 11:28:51.955629 PCI: 00:14.2 [8086/02ef] enabled
901 11:28:51.959352 PCI: 00:14.3 [8086/02f0] enabled
902 11:28:51.962505 PCI: 00:15.0 [8086/0000] bus ops
903 11:28:51.965616 PCI: 00:15.0 [8086/02e8] enabled
904 11:28:51.968765 PCI: 00:15.1 [8086/0000] bus ops
905 11:28:51.972572 PCI: 00:15.1 [8086/02e9] enabled
906 11:28:51.975693 PCI: 00:16.0 [8086/0000] ops
907 11:28:51.978708 PCI: 00:16.0 [8086/02e0] enabled
908 11:28:51.982446 PCI: 00:17.0 [8086/0000] ops
909 11:28:51.985660 PCI: 00:17.0 [8086/02d3] enabled
910 11:28:51.989427 PCI: 00:19.0 [8086/0000] bus ops
911 11:28:51.992498 PCI: 00:19.0 [8086/02c5] enabled
912 11:28:51.995654 PCI: 00:1d.0 [8086/0000] bus ops
913 11:28:51.998686 PCI: 00:1d.0 [8086/02b0] enabled
914 11:28:52.005757 PCI: Static device PCI: 00:1d.5 not found, disabling it.
915 11:28:52.008970 PCI: 00:1e.0 [8086/0000] ops
916 11:28:52.012177 PCI: 00:1e.0 [8086/02a8] enabled
917 11:28:52.015363 PCI: 00:1e.2 [8086/0000] bus ops
918 11:28:52.018849 PCI: 00:1e.2 [8086/02aa] enabled
919 11:28:52.022202 PCI: 00:1e.3 [8086/0000] bus ops
920 11:28:52.025296 PCI: 00:1e.3 [8086/02ab] enabled
921 11:28:52.028725 PCI: 00:1f.0 [8086/0000] bus ops
922 11:28:52.031933 PCI: 00:1f.0 [8086/0284] enabled
923 11:28:52.035710 PCI: Static device PCI: 00:1f.1 not found, disabling it.
924 11:28:52.042302 PCI: Static device PCI: 00:1f.2 not found, disabling it.
925 11:28:52.045555 PCI: 00:1f.3 [8086/0000] bus ops
926 11:28:52.049036 PCI: 00:1f.3 [8086/02c8] enabled
927 11:28:52.052092 PCI: 00:1f.4 [8086/0000] bus ops
928 11:28:52.055747 PCI: 00:1f.4 [8086/02a3] enabled
929 11:28:52.058578 PCI: 00:1f.5 [8086/0000] bus ops
930 11:28:52.061827 PCI: 00:1f.5 [8086/02a4] enabled
931 11:28:52.065072 PCI: Leftover static devices:
932 11:28:52.065181 PCI: 00:05.0
933 11:28:52.068817 PCI: 00:12.5
934 11:28:52.068912 PCI: 00:12.6
935 11:28:52.071907 PCI: 00:14.1
936 11:28:52.071999 PCI: 00:14.5
937 11:28:52.072075 PCI: 00:15.2
938 11:28:52.075553 PCI: 00:15.3
939 11:28:52.075640 PCI: 00:16.1
940 11:28:52.078656 PCI: 00:16.2
941 11:28:52.078753 PCI: 00:16.3
942 11:28:52.078828 PCI: 00:16.4
943 11:28:52.082408 PCI: 00:16.5
944 11:28:52.082516 PCI: 00:19.1
945 11:28:52.085386 PCI: 00:19.2
946 11:28:52.085496 PCI: 00:1a.0
947 11:28:52.085596 PCI: 00:1c.0
948 11:28:52.088604 PCI: 00:1c.1
949 11:28:52.088721 PCI: 00:1c.2
950 11:28:52.091816 PCI: 00:1c.3
951 11:28:52.091897 PCI: 00:1c.4
952 11:28:52.095166 PCI: 00:1c.5
953 11:28:52.095277 PCI: 00:1c.6
954 11:28:52.095376 PCI: 00:1c.7
955 11:28:52.098813 PCI: 00:1d.1
956 11:28:52.098892 PCI: 00:1d.2
957 11:28:52.101886 PCI: 00:1d.3
958 11:28:52.101967 PCI: 00:1d.4
959 11:28:52.102036 PCI: 00:1d.5
960 11:28:52.105589 PCI: 00:1e.1
961 11:28:52.105668 PCI: 00:1f.1
962 11:28:52.108717 PCI: 00:1f.2
963 11:28:52.108826 PCI: 00:1f.6
964 11:28:52.111980 PCI: Check your devicetree.cb.
965 11:28:52.115225 PCI: 00:02.0 scanning...
966 11:28:52.118356 scan_generic_bus for PCI: 00:02.0
967 11:28:52.121613 scan_generic_bus for PCI: 00:02.0 done
968 11:28:52.128694 scan_bus: scanning of bus PCI: 00:02.0 took 10192 usecs
969 11:28:52.131772 PCI: 00:14.0 scanning...
970 11:28:52.135351 scan_static_bus for PCI: 00:14.0
971 11:28:52.135467 USB0 port 0 enabled
972 11:28:52.138320 USB0 port 0 scanning...
973 11:28:52.141813 scan_static_bus for USB0 port 0
974 11:28:52.144903 USB2 port 0 enabled
975 11:28:52.144986 USB2 port 1 enabled
976 11:28:52.148576 USB2 port 2 disabled
977 11:28:52.151621 USB2 port 3 disabled
978 11:28:52.151714 USB2 port 5 disabled
979 11:28:52.155124 USB2 port 6 enabled
980 11:28:52.155235 USB2 port 9 enabled
981 11:28:52.158563 USB3 port 0 enabled
982 11:28:52.162054 USB3 port 1 enabled
983 11:28:52.162166 USB3 port 2 enabled
984 11:28:52.165080 USB3 port 3 enabled
985 11:28:52.165168 USB3 port 4 disabled
986 11:28:52.168651 USB2 port 0 scanning...
987 11:28:52.171850 scan_static_bus for USB2 port 0
988 11:28:52.175097 scan_static_bus for USB2 port 0 done
989 11:28:52.181827 scan_bus: scanning of bus USB2 port 0 took 9710 usecs
990 11:28:52.185564 USB2 port 1 scanning...
991 11:28:52.188514 scan_static_bus for USB2 port 1
992 11:28:52.191635 scan_static_bus for USB2 port 1 done
993 11:28:52.198549 scan_bus: scanning of bus USB2 port 1 took 9708 usecs
994 11:28:52.198669 USB2 port 6 scanning...
995 11:28:52.201658 scan_static_bus for USB2 port 6
996 11:28:52.205213 scan_static_bus for USB2 port 6 done
997 11:28:52.211573 scan_bus: scanning of bus USB2 port 6 took 9708 usecs
998 11:28:52.215301 USB2 port 9 scanning...
999 11:28:52.218555 scan_static_bus for USB2 port 9
1000 11:28:52.221595 scan_static_bus for USB2 port 9 done
1001 11:28:52.224966 scan_bus: scanning of bus USB2 port 9 took 9706 usecs
1002 11:28:52.228846 USB3 port 0 scanning...
1003 11:28:52.231904 scan_static_bus for USB3 port 0
1004 11:28:52.235152 scan_static_bus for USB3 port 0 done
1005 11:28:52.241954 scan_bus: scanning of bus USB3 port 0 took 9701 usecs
1006 11:28:52.245103 USB3 port 1 scanning...
1007 11:28:52.248649 scan_static_bus for USB3 port 1
1008 11:28:52.252028 scan_static_bus for USB3 port 1 done
1009 11:28:52.258457 scan_bus: scanning of bus USB3 port 1 took 9708 usecs
1010 11:28:52.258573 USB3 port 2 scanning...
1011 11:28:52.261944 scan_static_bus for USB3 port 2
1012 11:28:52.265408 scan_static_bus for USB3 port 2 done
1013 11:28:52.271909 scan_bus: scanning of bus USB3 port 2 took 9692 usecs
1014 11:28:52.274950 USB3 port 3 scanning...
1015 11:28:52.278652 scan_static_bus for USB3 port 3
1016 11:28:52.281877 scan_static_bus for USB3 port 3 done
1017 11:28:52.288694 scan_bus: scanning of bus USB3 port 3 took 9708 usecs
1018 11:28:52.291544 scan_static_bus for USB0 port 0 done
1019 11:28:52.295092 scan_bus: scanning of bus USB0 port 0 took 155404 usecs
1020 11:28:52.297987 scan_static_bus for PCI: 00:14.0 done
1021 11:28:52.305060 scan_bus: scanning of bus PCI: 00:14.0 took 173094 usecs
1022 11:28:52.308300 PCI: 00:15.0 scanning...
1023 11:28:52.311710 scan_generic_bus for PCI: 00:15.0
1024 11:28:52.315007 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1025 11:28:52.318281 scan_generic_bus for PCI: 00:15.0 done
1026 11:28:52.324643 scan_bus: scanning of bus PCI: 00:15.0 took 14310 usecs
1027 11:28:52.328573 PCI: 00:15.1 scanning...
1028 11:28:52.331750 scan_generic_bus for PCI: 00:15.1
1029 11:28:52.334853 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1030 11:28:52.337976 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1031 11:28:52.344722 scan_generic_bus for PCI: 00:15.1 done
1032 11:28:52.348588 scan_bus: scanning of bus PCI: 00:15.1 took 18606 usecs
1033 11:28:52.351698 PCI: 00:19.0 scanning...
1034 11:28:52.354854 scan_generic_bus for PCI: 00:19.0
1035 11:28:52.358440 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1036 11:28:52.364724 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1037 11:28:52.368292 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1038 11:28:52.371336 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1039 11:28:52.374912 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1040 11:28:52.381543 scan_generic_bus for PCI: 00:19.0 done
1041 11:28:52.384563 scan_bus: scanning of bus PCI: 00:19.0 took 30709 usecs
1042 11:28:52.387832 PCI: 00:1d.0 scanning...
1043 11:28:52.391579 do_pci_scan_bridge for PCI: 00:1d.0
1044 11:28:52.394669 PCI: pci_scan_bus for bus 01
1045 11:28:52.397671 PCI: 01:00.0 [1c5c/1327] enabled
1046 11:28:52.401318 Enabling Common Clock Configuration
1047 11:28:52.404899 L1 Sub-State supported from root port 29
1048 11:28:52.408106 L1 Sub-State Support = 0xf
1049 11:28:52.411271 CommonModeRestoreTime = 0x28
1050 11:28:52.418055 Power On Value = 0x16, Power On Scale = 0x0
1051 11:28:52.418148 ASPM: Enabled L1
1052 11:28:52.424369 scan_bus: scanning of bus PCI: 00:1d.0 took 32795 usecs
1053 11:28:52.424461 PCI: 00:1e.2 scanning...
1054 11:28:52.431592 scan_generic_bus for PCI: 00:1e.2
1055 11:28:52.434757 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1056 11:28:52.437994 scan_generic_bus for PCI: 00:1e.2 done
1057 11:28:52.444926 scan_bus: scanning of bus PCI: 00:1e.2 took 14007 usecs
1058 11:28:52.445018 PCI: 00:1e.3 scanning...
1059 11:28:52.448075 scan_generic_bus for PCI: 00:1e.3
1060 11:28:52.454944 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1061 11:28:52.458015 scan_generic_bus for PCI: 00:1e.3 done
1062 11:28:52.461270 scan_bus: scanning of bus PCI: 00:1e.3 took 14001 usecs
1063 11:28:52.464920 PCI: 00:1f.0 scanning...
1064 11:28:52.468058 scan_static_bus for PCI: 00:1f.0
1065 11:28:52.471307 PNP: 0c09.0 enabled
1066 11:28:52.474373 scan_static_bus for PCI: 00:1f.0 done
1067 11:28:52.481134 scan_bus: scanning of bus PCI: 00:1f.0 took 12049 usecs
1068 11:28:52.481223 PCI: 00:1f.3 scanning...
1069 11:28:52.488236 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1070 11:28:52.491224 PCI: 00:1f.4 scanning...
1071 11:28:52.494322 scan_generic_bus for PCI: 00:1f.4
1072 11:28:52.497971 scan_generic_bus for PCI: 00:1f.4 done
1073 11:28:52.504444 scan_bus: scanning of bus PCI: 00:1f.4 took 10195 usecs
1074 11:28:52.508173 PCI: 00:1f.5 scanning...
1075 11:28:52.511119 scan_generic_bus for PCI: 00:1f.5
1076 11:28:52.514256 scan_generic_bus for PCI: 00:1f.5 done
1077 11:28:52.521093 scan_bus: scanning of bus PCI: 00:1f.5 took 10189 usecs
1078 11:28:52.524228 scan_bus: scanning of bus DOMAIN: 0000 took 605173 usecs
1079 11:28:52.527401 scan_static_bus for Root Device done
1080 11:28:52.533793 scan_bus: scanning of bus Root Device took 625071 usecs
1081 11:28:52.533885 done
1082 11:28:52.537634 Chrome EC: UHEPI supported
1083 11:28:52.543978 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1084 11:28:52.550972 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1085 11:28:52.557462 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1086 11:28:52.564128 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1087 11:28:52.567175 SPI flash protection: WPSW=0 SRP0=0
1088 11:28:52.570798 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1089 11:28:52.576963 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1090 11:28:52.580662 found VGA at PCI: 00:02.0
1091 11:28:52.583706 Setting up VGA for PCI: 00:02.0
1092 11:28:52.587376 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1093 11:28:52.594215 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1094 11:28:52.597299 Allocating resources...
1095 11:28:52.597390 Reading resources...
1096 11:28:52.603556 Root Device read_resources bus 0 link: 0
1097 11:28:52.606813 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1098 11:28:52.613660 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1099 11:28:52.616812 DOMAIN: 0000 read_resources bus 0 link: 0
1100 11:28:52.623344 PCI: 00:14.0 read_resources bus 0 link: 0
1101 11:28:52.627058 USB0 port 0 read_resources bus 0 link: 0
1102 11:28:52.634603 USB0 port 0 read_resources bus 0 link: 0 done
1103 11:28:52.638369 PCI: 00:14.0 read_resources bus 0 link: 0 done
1104 11:28:52.645532 PCI: 00:15.0 read_resources bus 1 link: 0
1105 11:28:52.648781 PCI: 00:15.0 read_resources bus 1 link: 0 done
1106 11:28:52.655692 PCI: 00:15.1 read_resources bus 2 link: 0
1107 11:28:52.658678 PCI: 00:15.1 read_resources bus 2 link: 0 done
1108 11:28:52.666167 PCI: 00:19.0 read_resources bus 3 link: 0
1109 11:28:52.673208 PCI: 00:19.0 read_resources bus 3 link: 0 done
1110 11:28:52.676241 PCI: 00:1d.0 read_resources bus 1 link: 0
1111 11:28:52.682959 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1112 11:28:52.685976 PCI: 00:1e.2 read_resources bus 4 link: 0
1113 11:28:52.692751 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1114 11:28:52.696286 PCI: 00:1e.3 read_resources bus 5 link: 0
1115 11:28:52.702969 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1116 11:28:52.706086 PCI: 00:1f.0 read_resources bus 0 link: 0
1117 11:28:52.712930 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1118 11:28:52.716030 DOMAIN: 0000 read_resources bus 0 link: 0 done
1119 11:28:52.723184 Root Device read_resources bus 0 link: 0 done
1120 11:28:52.726411 Done reading resources.
1121 11:28:52.729981 Show resources in subtree (Root Device)...After reading.
1122 11:28:52.736580 Root Device child on link 0 CPU_CLUSTER: 0
1123 11:28:52.739956 CPU_CLUSTER: 0 child on link 0 APIC: 00
1124 11:28:52.740047 APIC: 00
1125 11:28:52.743049 APIC: 02
1126 11:28:52.743160 APIC: 01
1127 11:28:52.743273 APIC: 03
1128 11:28:52.746198 APIC: 05
1129 11:28:52.746314 APIC: 04
1130 11:28:52.749565 APIC: 06
1131 11:28:52.749680 APIC: 07
1132 11:28:52.753333 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1133 11:28:52.762857 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1134 11:28:52.772908 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1135 11:28:52.773006 PCI: 00:00.0
1136 11:28:52.822587 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1137 11:28:52.822893 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1138 11:28:52.823013 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1139 11:28:52.823996 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1140 11:28:52.824083 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1141 11:28:52.872717 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1142 11:28:52.872824 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1143 11:28:52.873755 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1144 11:28:52.874049 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1145 11:28:52.874146 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1146 11:28:52.920498 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1147 11:28:52.921589 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1148 11:28:52.921924 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1149 11:28:52.922064 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1150 11:28:52.922171 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1151 11:28:52.928620 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1152 11:28:52.928724 PCI: 00:02.0
1153 11:28:52.935551 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 11:28:52.945307 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1155 11:28:52.955245 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1156 11:28:52.955339 PCI: 00:04.0
1157 11:28:52.958955 PCI: 00:08.0
1158 11:28:52.968547 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1159 11:28:52.968645 PCI: 00:12.0
1160 11:28:52.978450 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1161 11:28:52.985446 PCI: 00:14.0 child on link 0 USB0 port 0
1162 11:28:52.994983 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1163 11:28:52.998734 USB0 port 0 child on link 0 USB2 port 0
1164 11:28:53.001770 USB2 port 0
1165 11:28:53.001856 USB2 port 1
1166 11:28:53.005386 USB2 port 2
1167 11:28:53.005472 USB2 port 3
1168 11:28:53.008713 USB2 port 5
1169 11:28:53.008798 USB2 port 6
1170 11:28:53.011785 USB2 port 9
1171 11:28:53.011867 USB3 port 0
1172 11:28:53.015022 USB3 port 1
1173 11:28:53.015097 USB3 port 2
1174 11:28:53.018282 USB3 port 3
1175 11:28:53.018360 USB3 port 4
1176 11:28:53.022043 PCI: 00:14.2
1177 11:28:53.031772 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1178 11:28:53.041741 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1179 11:28:53.041840 PCI: 00:14.3
1180 11:28:53.051821 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1181 11:28:53.058532 PCI: 00:15.0 child on link 0 I2C: 01:15
1182 11:28:53.068536 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 11:28:53.068637 I2C: 01:15
1184 11:28:53.071665 PCI: 00:15.1 child on link 0 I2C: 02:5d
1185 11:28:53.081444 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1186 11:28:53.084691 I2C: 02:5d
1187 11:28:53.084783 GENERIC: 0.0
1188 11:28:53.088458 PCI: 00:16.0
1189 11:28:53.097977 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 11:28:53.098072 PCI: 00:17.0
1191 11:28:53.108166 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1192 11:28:53.117956 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1193 11:28:53.124510 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1194 11:28:53.134335 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1195 11:28:53.141117 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1196 11:28:53.151162 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1197 11:28:53.154353 PCI: 00:19.0 child on link 0 I2C: 03:1a
1198 11:28:53.164000 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 11:28:53.167793 I2C: 03:1a
1200 11:28:53.167881 I2C: 03:38
1201 11:28:53.171002 I2C: 03:39
1202 11:28:53.171083 I2C: 03:3a
1203 11:28:53.174218 I2C: 03:3b
1204 11:28:53.177318 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1205 11:28:53.187139 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1206 11:28:53.197222 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1207 11:28:53.204302 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1208 11:28:53.207395 PCI: 01:00.0
1209 11:28:53.217403 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1210 11:28:53.217496 PCI: 00:1e.0
1211 11:28:53.230895 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1212 11:28:53.240823 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1213 11:28:53.243778 PCI: 00:1e.2 child on link 0 SPI: 00
1214 11:28:53.253635 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1215 11:28:53.253758 SPI: 00
1216 11:28:53.260648 PCI: 00:1e.3 child on link 0 SPI: 01
1217 11:28:53.270411 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1218 11:28:53.270528 SPI: 01
1219 11:28:53.273620 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1220 11:28:53.283286 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1221 11:28:53.293623 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1222 11:28:53.293744 PNP: 0c09.0
1223 11:28:53.303130 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1224 11:28:53.303249 PCI: 00:1f.3
1225 11:28:53.313337 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1226 11:28:53.323373 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1227 11:28:53.326654 PCI: 00:1f.4
1228 11:28:53.336305 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1229 11:28:53.346511 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1230 11:28:53.346634 PCI: 00:1f.5
1231 11:28:53.356092 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1232 11:28:53.363172 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1233 11:28:53.369350 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1234 11:28:53.376130 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1235 11:28:53.379790 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1236 11:28:53.383101 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1237 11:28:53.386139 PCI: 00:17.0 18 * [0x60 - 0x67] io
1238 11:28:53.389278 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1239 11:28:53.395808 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1240 11:28:53.402737 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1241 11:28:53.409363 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1242 11:28:53.419524 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1243 11:28:53.425638 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1244 11:28:53.429362 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1245 11:28:53.439298 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1246 11:28:53.442233 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1247 11:28:53.445810 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1248 11:28:53.452524 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1249 11:28:53.455565 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1250 11:28:53.462604 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1251 11:28:53.465638 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1252 11:28:53.472088 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1253 11:28:53.475769 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1254 11:28:53.481936 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1255 11:28:53.485654 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1256 11:28:53.492031 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1257 11:28:53.495276 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1258 11:28:53.502163 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1259 11:28:53.505175 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1260 11:28:53.511726 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1261 11:28:53.515722 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1262 11:28:53.518691 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1263 11:28:53.525184 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1264 11:28:53.528883 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1265 11:28:53.535126 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1266 11:28:53.538275 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1267 11:28:53.545132 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1268 11:28:53.548224 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1269 11:28:53.558349 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1270 11:28:53.561407 avoid_fixed_resources: DOMAIN: 0000
1271 11:28:53.568050 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1272 11:28:53.574872 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1273 11:28:53.581761 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1274 11:28:53.588315 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1275 11:28:53.595261 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1276 11:28:53.605179 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1277 11:28:53.611487 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1278 11:28:53.617854 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1279 11:28:53.628095 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1280 11:28:53.635096 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1281 11:28:53.641258 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1282 11:28:53.648214 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1283 11:28:53.651417 Setting resources...
1284 11:28:53.658064 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1285 11:28:53.660916 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1286 11:28:53.664626 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1287 11:28:53.671344 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1288 11:28:53.674450 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1289 11:28:53.681361 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1290 11:28:53.684573 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1291 11:28:53.691282 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1292 11:28:53.701175 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1293 11:28:53.704864 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1294 11:28:53.711516 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1295 11:28:53.714672 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1296 11:28:53.721089 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1297 11:28:53.724175 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1298 11:28:53.731026 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1299 11:28:53.734194 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1300 11:28:53.740642 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1301 11:28:53.744561 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1302 11:28:53.747597 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1303 11:28:53.754525 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1304 11:28:53.757426 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1305 11:28:53.764117 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1306 11:28:53.767685 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1307 11:28:53.774358 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1308 11:28:53.777838 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1309 11:28:53.784303 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1310 11:28:53.787461 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1311 11:28:53.794410 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1312 11:28:53.797523 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1313 11:28:53.803861 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1314 11:28:53.807429 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1315 11:28:53.810441 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1316 11:28:53.820290 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1317 11:28:53.826840 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1318 11:28:53.833960 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1319 11:28:53.840285 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1320 11:28:53.847290 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1321 11:28:53.853497 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1322 11:28:53.857219 Root Device assign_resources, bus 0 link: 0
1323 11:28:53.863948 DOMAIN: 0000 assign_resources, bus 0 link: 0
1324 11:28:53.870577 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1325 11:28:53.880769 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1326 11:28:53.887398 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1327 11:28:53.897437 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1328 11:28:53.903626 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1329 11:28:53.913683 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1330 11:28:53.917403 PCI: 00:14.0 assign_resources, bus 0 link: 0
1331 11:28:53.924041 PCI: 00:14.0 assign_resources, bus 0 link: 0
1332 11:28:53.930405 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1333 11:28:53.937505 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1334 11:28:53.947713 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1335 11:28:53.953995 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1336 11:28:53.960958 PCI: 00:15.0 assign_resources, bus 1 link: 0
1337 11:28:53.964186 PCI: 00:15.0 assign_resources, bus 1 link: 0
1338 11:28:53.974072 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1339 11:28:53.977755 PCI: 00:15.1 assign_resources, bus 2 link: 0
1340 11:28:53.980841 PCI: 00:15.1 assign_resources, bus 2 link: 0
1341 11:28:53.991012 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1342 11:28:53.997164 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1343 11:28:54.007290 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1344 11:28:54.014107 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1345 11:28:54.020701 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1346 11:28:54.030369 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1347 11:28:54.037324 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1348 11:28:54.043618 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1349 11:28:54.050635 PCI: 00:19.0 assign_resources, bus 3 link: 0
1350 11:28:54.053727 PCI: 00:19.0 assign_resources, bus 3 link: 0
1351 11:28:54.064029 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1352 11:28:54.073834 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1353 11:28:54.080191 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1354 11:28:54.083305 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1355 11:28:54.093736 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1356 11:28:54.096929 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1357 11:28:54.107026 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1358 11:28:54.113532 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1359 11:28:54.120336 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1360 11:28:54.123244 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1361 11:28:54.133337 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1362 11:28:54.136890 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1363 11:28:54.140104 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1364 11:28:54.147064 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1365 11:28:54.150136 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1366 11:28:54.156576 LPC: Trying to open IO window from 800 size 1ff
1367 11:28:54.163505 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1368 11:28:54.172993 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1369 11:28:54.180020 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1370 11:28:54.190012 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1371 11:28:54.193096 DOMAIN: 0000 assign_resources, bus 0 link: 0
1372 11:28:54.199599 Root Device assign_resources, bus 0 link: 0
1373 11:28:54.199983 Done setting resources.
1374 11:28:54.206218 Show resources in subtree (Root Device)...After assigning values.
1375 11:28:54.212946 Root Device child on link 0 CPU_CLUSTER: 0
1376 11:28:54.216251 CPU_CLUSTER: 0 child on link 0 APIC: 00
1377 11:28:54.216633 APIC: 00
1378 11:28:54.219701 APIC: 02
1379 11:28:54.220159 APIC: 01
1380 11:28:54.220593 APIC: 03
1381 11:28:54.222917 APIC: 05
1382 11:28:54.223296 APIC: 04
1383 11:28:54.226584 APIC: 06
1384 11:28:54.226963 APIC: 07
1385 11:28:54.229581 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1386 11:28:54.239782 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1387 11:28:54.249642 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1388 11:28:54.252778 PCI: 00:00.0
1389 11:28:54.262564 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1390 11:28:54.272661 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1391 11:28:54.282606 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1392 11:28:54.288942 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1393 11:28:54.298891 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1394 11:28:54.309262 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1395 11:28:54.318860 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1396 11:28:54.328947 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1397 11:28:54.335747 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1398 11:28:54.345866 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1399 11:28:54.355309 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1400 11:28:54.365648 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1401 11:28:54.375148 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1402 11:28:54.385430 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1403 11:28:54.394976 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1404 11:28:54.401626 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1405 11:28:54.405335 PCI: 00:02.0
1406 11:28:54.414653 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1407 11:28:54.425089 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1408 11:28:54.435198 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1409 11:28:54.438356 PCI: 00:04.0
1410 11:28:54.438806 PCI: 00:08.0
1411 11:28:54.448111 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1412 11:28:54.451321 PCI: 00:12.0
1413 11:28:54.461801 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1414 11:28:54.464743 PCI: 00:14.0 child on link 0 USB0 port 0
1415 11:28:54.474250 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1416 11:28:54.481504 USB0 port 0 child on link 0 USB2 port 0
1417 11:28:54.481934 USB2 port 0
1418 11:28:54.484707 USB2 port 1
1419 11:28:54.485134 USB2 port 2
1420 11:28:54.487931 USB2 port 3
1421 11:28:54.488360 USB2 port 5
1422 11:28:54.491212 USB2 port 6
1423 11:28:54.491710 USB2 port 9
1424 11:28:54.494611 USB3 port 0
1425 11:28:54.495092 USB3 port 1
1426 11:28:54.497553 USB3 port 2
1427 11:28:54.498017 USB3 port 3
1428 11:28:54.501270 USB3 port 4
1429 11:28:54.501715 PCI: 00:14.2
1430 11:28:54.514474 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1431 11:28:54.524594 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1432 11:28:54.525029 PCI: 00:14.3
1433 11:28:54.534109 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1434 11:28:54.541187 PCI: 00:15.0 child on link 0 I2C: 01:15
1435 11:28:54.550698 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1436 11:28:54.551138 I2C: 01:15
1437 11:28:54.554110 PCI: 00:15.1 child on link 0 I2C: 02:5d
1438 11:28:54.567021 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1439 11:28:54.567522 I2C: 02:5d
1440 11:28:54.570726 GENERIC: 0.0
1441 11:28:54.571174 PCI: 00:16.0
1442 11:28:54.580853 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1443 11:28:54.584218 PCI: 00:17.0
1444 11:28:54.593789 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1445 11:28:54.603769 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1446 11:28:54.613786 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1447 11:28:54.620176 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1448 11:28:54.630146 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1449 11:28:54.639823 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1450 11:28:54.643553 PCI: 00:19.0 child on link 0 I2C: 03:1a
1451 11:28:54.657026 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1452 11:28:54.657454 I2C: 03:1a
1453 11:28:54.657858 I2C: 03:38
1454 11:28:54.660056 I2C: 03:39
1455 11:28:54.660483 I2C: 03:3a
1456 11:28:54.663023 I2C: 03:3b
1457 11:28:54.666801 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1458 11:28:54.676314 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1459 11:28:54.686527 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1460 11:28:54.696119 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1461 11:28:54.699851 PCI: 01:00.0
1462 11:28:54.709398 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1463 11:28:54.709902 PCI: 00:1e.0
1464 11:28:54.722851 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1465 11:28:54.732678 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1466 11:28:54.736341 PCI: 00:1e.2 child on link 0 SPI: 00
1467 11:28:54.746217 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1468 11:28:54.749158 SPI: 00
1469 11:28:54.752892 PCI: 00:1e.3 child on link 0 SPI: 01
1470 11:28:54.762532 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1471 11:28:54.763080 SPI: 01
1472 11:28:54.769315 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1473 11:28:54.775850 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1474 11:28:54.785739 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1475 11:28:54.786186 PNP: 0c09.0
1476 11:28:54.795497 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1477 11:28:54.799280 PCI: 00:1f.3
1478 11:28:54.808851 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1479 11:28:54.819226 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1480 11:28:54.819726 PCI: 00:1f.4
1481 11:28:54.828696 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1482 11:28:54.838982 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1483 11:28:54.841950 PCI: 00:1f.5
1484 11:28:54.852006 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1485 11:28:54.855031 Done allocating resources.
1486 11:28:54.858601 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1487 11:28:54.861736 Enabling resources...
1488 11:28:54.865405 PCI: 00:00.0 subsystem <- 8086/9b61
1489 11:28:54.868482 PCI: 00:00.0 cmd <- 06
1490 11:28:54.871902 PCI: 00:02.0 subsystem <- 8086/9b41
1491 11:28:54.875492 PCI: 00:02.0 cmd <- 03
1492 11:28:54.879085 PCI: 00:08.0 cmd <- 06
1493 11:28:54.881743 PCI: 00:12.0 subsystem <- 8086/02f9
1494 11:28:54.885649 PCI: 00:12.0 cmd <- 02
1495 11:28:54.888657 PCI: 00:14.0 subsystem <- 8086/02ed
1496 11:28:54.891804 PCI: 00:14.0 cmd <- 02
1497 11:28:54.892283 PCI: 00:14.2 cmd <- 02
1498 11:28:54.898732 PCI: 00:14.3 subsystem <- 8086/02f0
1499 11:28:54.899227 PCI: 00:14.3 cmd <- 02
1500 11:28:54.902025 PCI: 00:15.0 subsystem <- 8086/02e8
1501 11:28:54.905044 PCI: 00:15.0 cmd <- 02
1502 11:28:54.908328 PCI: 00:15.1 subsystem <- 8086/02e9
1503 11:28:54.912003 PCI: 00:15.1 cmd <- 02
1504 11:28:54.915342 PCI: 00:16.0 subsystem <- 8086/02e0
1505 11:28:54.918562 PCI: 00:16.0 cmd <- 02
1506 11:28:54.921730 PCI: 00:17.0 subsystem <- 8086/02d3
1507 11:28:54.925380 PCI: 00:17.0 cmd <- 03
1508 11:28:54.928417 PCI: 00:19.0 subsystem <- 8086/02c5
1509 11:28:54.931527 PCI: 00:19.0 cmd <- 02
1510 11:28:54.935154 PCI: 00:1d.0 bridge ctrl <- 0013
1511 11:28:54.938320 PCI: 00:1d.0 subsystem <- 8086/02b0
1512 11:28:54.942067 PCI: 00:1d.0 cmd <- 06
1513 11:28:54.945387 PCI: 00:1e.0 subsystem <- 8086/02a8
1514 11:28:54.945843 PCI: 00:1e.0 cmd <- 06
1515 11:28:54.951948 PCI: 00:1e.2 subsystem <- 8086/02aa
1516 11:28:54.952369 PCI: 00:1e.2 cmd <- 06
1517 11:28:54.955264 PCI: 00:1e.3 subsystem <- 8086/02ab
1518 11:28:54.958233 PCI: 00:1e.3 cmd <- 02
1519 11:28:54.961898 PCI: 00:1f.0 subsystem <- 8086/0284
1520 11:28:54.965046 PCI: 00:1f.0 cmd <- 407
1521 11:28:54.968666 PCI: 00:1f.3 subsystem <- 8086/02c8
1522 11:28:54.971598 PCI: 00:1f.3 cmd <- 02
1523 11:28:54.975172 PCI: 00:1f.4 subsystem <- 8086/02a3
1524 11:28:54.978031 PCI: 00:1f.4 cmd <- 03
1525 11:28:54.981675 PCI: 00:1f.5 subsystem <- 8086/02a4
1526 11:28:54.984930 PCI: 00:1f.5 cmd <- 406
1527 11:28:54.993189 PCI: 01:00.0 cmd <- 02
1528 11:28:54.998106 done.
1529 11:28:55.010110 ME: Version: 14.0.39.1367
1530 11:28:55.017218 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1531 11:28:55.020432 Initializing devices...
1532 11:28:55.020864 Root Device init ...
1533 11:28:55.026741 Chrome EC: Set SMI mask to 0x0000000000000000
1534 11:28:55.030213 Chrome EC: clear events_b mask to 0x0000000000000000
1535 11:28:55.036736 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1536 11:28:55.043578 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1537 11:28:55.050416 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1538 11:28:55.053584 Chrome EC: Set WAKE mask to 0x0000000000000000
1539 11:28:55.056825 Root Device init finished in 35238 usecs
1540 11:28:55.060516 CPU_CLUSTER: 0 init ...
1541 11:28:55.067177 CPU_CLUSTER: 0 init finished in 2447 usecs
1542 11:28:55.071302 PCI: 00:00.0 init ...
1543 11:28:55.074383 CPU TDP: 15 Watts
1544 11:28:55.077931 CPU PL2 = 64 Watts
1545 11:28:55.081163 PCI: 00:00.0 init finished in 7082 usecs
1546 11:28:55.084095 PCI: 00:02.0 init ...
1547 11:28:55.087744 PCI: 00:02.0 init finished in 2253 usecs
1548 11:28:55.091246 PCI: 00:08.0 init ...
1549 11:28:55.094153 PCI: 00:08.0 init finished in 2254 usecs
1550 11:28:55.097926 PCI: 00:12.0 init ...
1551 11:28:55.101206 PCI: 00:12.0 init finished in 2245 usecs
1552 11:28:55.104656 PCI: 00:14.0 init ...
1553 11:28:55.107893 PCI: 00:14.0 init finished in 2254 usecs
1554 11:28:55.111107 PCI: 00:14.2 init ...
1555 11:28:55.114269 PCI: 00:14.2 init finished in 2253 usecs
1556 11:28:55.117402 PCI: 00:14.3 init ...
1557 11:28:55.121187 PCI: 00:14.3 init finished in 2272 usecs
1558 11:28:55.124362 PCI: 00:15.0 init ...
1559 11:28:55.127574 DW I2C bus 0 at 0xd121f000 (400 KHz)
1560 11:28:55.130841 PCI: 00:15.0 init finished in 5977 usecs
1561 11:28:55.134461 PCI: 00:15.1 init ...
1562 11:28:55.137555 DW I2C bus 1 at 0xd1220000 (400 KHz)
1563 11:28:55.140820 PCI: 00:15.1 init finished in 5978 usecs
1564 11:28:55.144921 PCI: 00:16.0 init ...
1565 11:28:55.147731 PCI: 00:16.0 init finished in 2252 usecs
1566 11:28:55.151363 PCI: 00:19.0 init ...
1567 11:28:55.154769 DW I2C bus 4 at 0xd1222000 (400 KHz)
1568 11:28:55.161653 PCI: 00:19.0 init finished in 5979 usecs
1569 11:28:55.162084 PCI: 00:1d.0 init ...
1570 11:28:55.164641 Initializing PCH PCIe bridge.
1571 11:28:55.168020 PCI: 00:1d.0 init finished in 5284 usecs
1572 11:28:55.172971 PCI: 00:1f.0 init ...
1573 11:28:55.176446 IOAPIC: Initializing IOAPIC at 0xfec00000
1574 11:28:55.183096 IOAPIC: Bootstrap Processor Local APIC = 0x00
1575 11:28:55.183617 IOAPIC: ID = 0x02
1576 11:28:55.186214 IOAPIC: Dumping registers
1577 11:28:55.189412 reg 0x0000: 0x02000000
1578 11:28:55.193139 reg 0x0001: 0x00770020
1579 11:28:55.193759 reg 0x0002: 0x00000000
1580 11:28:55.200162 PCI: 00:1f.0 init finished in 23558 usecs
1581 11:28:55.202965 PCI: 00:1f.4 init ...
1582 11:28:55.206810 PCI: 00:1f.4 init finished in 2262 usecs
1583 11:28:55.217270 PCI: 01:00.0 init ...
1584 11:28:55.220461 PCI: 01:00.0 init finished in 2244 usecs
1585 11:28:55.224955 PNP: 0c09.0 init ...
1586 11:28:55.228347 Google Chrome EC uptime: 11.046 seconds
1587 11:28:55.234477 Google Chrome AP resets since EC boot: 0
1588 11:28:55.238219 Google Chrome most recent AP reset causes:
1589 11:28:55.244567 Google Chrome EC reset flags at last EC boot: reset-pin
1590 11:28:55.248335 PNP: 0c09.0 init finished in 20577 usecs
1591 11:28:55.251509 Devices initialized
1592 11:28:55.251966 Show all devs... After init.
1593 11:28:55.254598 Root Device: enabled 1
1594 11:28:55.258291 CPU_CLUSTER: 0: enabled 1
1595 11:28:55.261479 DOMAIN: 0000: enabled 1
1596 11:28:55.261900 APIC: 00: enabled 1
1597 11:28:55.264650 PCI: 00:00.0: enabled 1
1598 11:28:55.267931 PCI: 00:02.0: enabled 1
1599 11:28:55.271080 PCI: 00:04.0: enabled 0
1600 11:28:55.271537 PCI: 00:05.0: enabled 0
1601 11:28:55.274997 PCI: 00:12.0: enabled 1
1602 11:28:55.278112 PCI: 00:12.5: enabled 0
1603 11:28:55.278529 PCI: 00:12.6: enabled 0
1604 11:28:55.281168 PCI: 00:14.0: enabled 1
1605 11:28:55.284392 PCI: 00:14.1: enabled 0
1606 11:28:55.287871 PCI: 00:14.3: enabled 1
1607 11:28:55.288378 PCI: 00:14.5: enabled 0
1608 11:28:55.290963 PCI: 00:15.0: enabled 1
1609 11:28:55.294646 PCI: 00:15.1: enabled 1
1610 11:28:55.297642 PCI: 00:15.2: enabled 0
1611 11:28:55.298071 PCI: 00:15.3: enabled 0
1612 11:28:55.301140 PCI: 00:16.0: enabled 1
1613 11:28:55.304124 PCI: 00:16.1: enabled 0
1614 11:28:55.307377 PCI: 00:16.2: enabled 0
1615 11:28:55.307895 PCI: 00:16.3: enabled 0
1616 11:28:55.311101 PCI: 00:16.4: enabled 0
1617 11:28:55.314039 PCI: 00:16.5: enabled 0
1618 11:28:55.317655 PCI: 00:17.0: enabled 1
1619 11:28:55.318147 PCI: 00:19.0: enabled 1
1620 11:28:55.320785 PCI: 00:19.1: enabled 0
1621 11:28:55.324424 PCI: 00:19.2: enabled 0
1622 11:28:55.324879 PCI: 00:1a.0: enabled 0
1623 11:28:55.327660 PCI: 00:1c.0: enabled 0
1624 11:28:55.330856 PCI: 00:1c.1: enabled 0
1625 11:28:55.334039 PCI: 00:1c.2: enabled 0
1626 11:28:55.334445 PCI: 00:1c.3: enabled 0
1627 11:28:55.337177 PCI: 00:1c.4: enabled 0
1628 11:28:55.341058 PCI: 00:1c.5: enabled 0
1629 11:28:55.343879 PCI: 00:1c.6: enabled 0
1630 11:28:55.344278 PCI: 00:1c.7: enabled 0
1631 11:28:55.347571 PCI: 00:1d.0: enabled 1
1632 11:28:55.350698 PCI: 00:1d.1: enabled 0
1633 11:28:55.353824 PCI: 00:1d.2: enabled 0
1634 11:28:55.354249 PCI: 00:1d.3: enabled 0
1635 11:28:55.357195 PCI: 00:1d.4: enabled 0
1636 11:28:55.360727 PCI: 00:1d.5: enabled 0
1637 11:28:55.361168 PCI: 00:1e.0: enabled 1
1638 11:28:55.363714 PCI: 00:1e.1: enabled 0
1639 11:28:55.367398 PCI: 00:1e.2: enabled 1
1640 11:28:55.370536 PCI: 00:1e.3: enabled 1
1641 11:28:55.370954 PCI: 00:1f.0: enabled 1
1642 11:28:55.373824 PCI: 00:1f.1: enabled 0
1643 11:28:55.377020 PCI: 00:1f.2: enabled 0
1644 11:28:55.380147 PCI: 00:1f.3: enabled 1
1645 11:28:55.380565 PCI: 00:1f.4: enabled 1
1646 11:28:55.383544 PCI: 00:1f.5: enabled 1
1647 11:28:55.387000 PCI: 00:1f.6: enabled 0
1648 11:28:55.390061 USB0 port 0: enabled 1
1649 11:28:55.390513 I2C: 01:15: enabled 1
1650 11:28:55.393716 I2C: 02:5d: enabled 1
1651 11:28:55.397315 GENERIC: 0.0: enabled 1
1652 11:28:55.397737 I2C: 03:1a: enabled 1
1653 11:28:55.400328 I2C: 03:38: enabled 1
1654 11:28:55.403336 I2C: 03:39: enabled 1
1655 11:28:55.403822 I2C: 03:3a: enabled 1
1656 11:28:55.406849 I2C: 03:3b: enabled 1
1657 11:28:55.410294 PCI: 00:00.0: enabled 1
1658 11:28:55.410713 SPI: 00: enabled 1
1659 11:28:55.413688 SPI: 01: enabled 1
1660 11:28:55.416801 PNP: 0c09.0: enabled 1
1661 11:28:55.417221 USB2 port 0: enabled 1
1662 11:28:55.420238 USB2 port 1: enabled 1
1663 11:28:55.423318 USB2 port 2: enabled 0
1664 11:28:55.423882 USB2 port 3: enabled 0
1665 11:28:55.426849 USB2 port 5: enabled 0
1666 11:28:55.429933 USB2 port 6: enabled 1
1667 11:28:55.433083 USB2 port 9: enabled 1
1668 11:28:55.433542 USB3 port 0: enabled 1
1669 11:28:55.436346 USB3 port 1: enabled 1
1670 11:28:55.440164 USB3 port 2: enabled 1
1671 11:28:55.440594 USB3 port 3: enabled 1
1672 11:28:55.443295 USB3 port 4: enabled 0
1673 11:28:55.446568 APIC: 02: enabled 1
1674 11:28:55.446995 APIC: 01: enabled 1
1675 11:28:55.449599 APIC: 03: enabled 1
1676 11:28:55.452866 APIC: 05: enabled 1
1677 11:28:55.453294 APIC: 04: enabled 1
1678 11:28:55.456817 APIC: 06: enabled 1
1679 11:28:55.457295 APIC: 07: enabled 1
1680 11:28:55.459930 PCI: 00:08.0: enabled 1
1681 11:28:55.463181 PCI: 00:14.2: enabled 1
1682 11:28:55.466161 PCI: 01:00.0: enabled 1
1683 11:28:55.469920 Disabling ACPI via APMC:
1684 11:28:55.470481 done.
1685 11:28:55.476628 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1686 11:28:55.479746 ELOG: NV offset 0xaf0000 size 0x4000
1687 11:28:55.486655 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1688 11:28:55.493110 ELOG: Event(17) added with size 13 at 2023-06-09 11:28:53 UTC
1689 11:28:55.500048 ELOG: Event(92) added with size 9 at 2023-06-09 11:28:53 UTC
1690 11:28:55.506716 ELOG: Event(93) added with size 9 at 2023-06-09 11:28:53 UTC
1691 11:28:55.512739 ELOG: Event(9A) added with size 9 at 2023-06-09 11:28:53 UTC
1692 11:28:55.519865 ELOG: Event(9E) added with size 10 at 2023-06-09 11:28:53 UTC
1693 11:28:55.526432 ELOG: Event(9F) added with size 14 at 2023-06-09 11:28:53 UTC
1694 11:28:55.529925 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1695 11:28:55.537128 ELOG: Event(A1) added with size 10 at 2023-06-09 11:28:53 UTC
1696 11:28:55.553503 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1697 11:28:55.554522 ELOG: Event(A0) added with size 9 at 2023-06-09 11:28:53 UTC
1698 11:28:55.557017 elog_add_boot_reason: Logged dev mode boot
1699 11:28:55.557425 Finalize devices...
1700 11:28:55.560334 PCI: 00:17.0 final
1701 11:28:55.563519 Devices finalized
1702 11:28:55.566629 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1703 11:28:55.573104 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1704 11:28:55.576349 ME: HFSTS1 : 0x90000245
1705 11:28:55.580073 ME: HFSTS2 : 0x3B850126
1706 11:28:55.586277 ME: HFSTS3 : 0x00000020
1707 11:28:55.589716 ME: HFSTS4 : 0x00004800
1708 11:28:55.592942 ME: HFSTS5 : 0x00000000
1709 11:28:55.596226 ME: HFSTS6 : 0x40400006
1710 11:28:55.599850 ME: Manufacturing Mode : NO
1711 11:28:55.602845 ME: FW Partition Table : OK
1712 11:28:55.606180 ME: Bringup Loader Failure : NO
1713 11:28:55.609956 ME: Firmware Init Complete : YES
1714 11:28:55.613175 ME: Boot Options Present : NO
1715 11:28:55.616127 ME: Update In Progress : NO
1716 11:28:55.619568 ME: D0i3 Support : YES
1717 11:28:55.622989 ME: Low Power State Enabled : NO
1718 11:28:55.626142 ME: CPU Replaced : NO
1719 11:28:55.629233 ME: CPU Replacement Valid : YES
1720 11:28:55.632826 ME: Current Working State : 5
1721 11:28:55.636275 ME: Current Operation State : 1
1722 11:28:55.639214 ME: Current Operation Mode : 0
1723 11:28:55.642854 ME: Error Code : 0
1724 11:28:55.646045 ME: CPU Debug Disabled : YES
1725 11:28:55.648965 ME: TXT Support : NO
1726 11:28:55.655928 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1727 11:28:55.659066 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1728 11:28:55.662777 CBFS @ c08000 size 3f8000
1729 11:28:55.669176 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1730 11:28:55.672306 CBFS: Locating 'fallback/dsdt.aml'
1731 11:28:55.675556 CBFS: Found @ offset 10bb80 size 3fa5
1732 11:28:55.682631 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1733 11:28:55.685828 CBFS @ c08000 size 3f8000
1734 11:28:55.689053 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1735 11:28:55.692239 CBFS: Locating 'fallback/slic'
1736 11:28:55.697388 CBFS: 'fallback/slic' not found.
1737 11:28:55.704108 ACPI: Writing ACPI tables at 99b3e000.
1738 11:28:55.704443 ACPI: * FACS
1739 11:28:55.707294 ACPI: * DSDT
1740 11:28:55.710398 Ramoops buffer: 0x100000@0x99a3d000.
1741 11:28:55.713717 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1742 11:28:55.720621 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1743 11:28:55.723588 Google Chrome EC: version:
1744 11:28:55.727307 ro: helios_v2.0.2659-56403530b
1745 11:28:55.729964 rw: helios_v2.0.2849-c41de27e7d
1746 11:28:55.730299 running image: 1
1747 11:28:55.734218 ACPI: * FADT
1748 11:28:55.734566 SCI is IRQ9
1749 11:28:55.741243 ACPI: added table 1/32, length now 40
1750 11:28:55.741663 ACPI: * SSDT
1751 11:28:55.744645 Found 1 CPU(s) with 8 core(s) each.
1752 11:28:55.748077 Error: Could not locate 'wifi_sar' in VPD.
1753 11:28:55.754522 Checking CBFS for default SAR values
1754 11:28:55.757623 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1755 11:28:55.761191 CBFS @ c08000 size 3f8000
1756 11:28:55.767407 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1757 11:28:55.771269 CBFS: Locating 'wifi_sar_defaults.hex'
1758 11:28:55.774278 CBFS: Found @ offset 5fac0 size 77
1759 11:28:55.777612 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1760 11:28:55.783898 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1761 11:28:55.787748 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1762 11:28:55.793971 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1763 11:28:55.797155 failed to find key in VPD: dsm_calib_r0_0
1764 11:28:55.807317 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1765 11:28:55.810435 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1766 11:28:55.813618 failed to find key in VPD: dsm_calib_r0_1
1767 11:28:55.824050 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1768 11:28:55.830307 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1769 11:28:55.833851 failed to find key in VPD: dsm_calib_r0_2
1770 11:28:55.843650 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1771 11:28:55.847221 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1772 11:28:55.853537 failed to find key in VPD: dsm_calib_r0_3
1773 11:28:55.860377 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1774 11:28:55.867303 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1775 11:28:55.870149 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1776 11:28:55.873574 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1777 11:28:55.877406 EC returned error result code 1
1778 11:28:55.881219 EC returned error result code 1
1779 11:28:55.885065 EC returned error result code 1
1780 11:28:55.891747 PS2K: Bad resp from EC. Vivaldi disabled!
1781 11:28:55.894894 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1782 11:28:55.901660 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1783 11:28:55.908491 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1784 11:28:55.911718 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1785 11:28:55.917968 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1786 11:28:55.924865 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1787 11:28:55.931280 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1788 11:28:55.934449 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1789 11:28:55.941329 ACPI: added table 2/32, length now 44
1790 11:28:55.941802 ACPI: * MCFG
1791 11:28:55.944422 ACPI: added table 3/32, length now 48
1792 11:28:55.947935 ACPI: * TPM2
1793 11:28:55.951599 TPM2 log created at 99a2d000
1794 11:28:55.954616 ACPI: added table 4/32, length now 52
1795 11:28:55.955071 ACPI: * MADT
1796 11:28:55.958097 SCI is IRQ9
1797 11:28:55.961400 ACPI: added table 5/32, length now 56
1798 11:28:55.961824 current = 99b43ac0
1799 11:28:55.964407 ACPI: * DMAR
1800 11:28:55.967906 ACPI: added table 6/32, length now 60
1801 11:28:55.970870 ACPI: * IGD OpRegion
1802 11:28:55.971288 GMA: Found VBT in CBFS
1803 11:28:55.974520 GMA: Found valid VBT in CBFS
1804 11:28:55.977767 ACPI: added table 7/32, length now 64
1805 11:28:55.981226 ACPI: * HPET
1806 11:28:55.984695 ACPI: added table 8/32, length now 68
1807 11:28:55.985201 ACPI: done.
1808 11:28:55.987866 ACPI tables: 31744 bytes.
1809 11:28:55.991062 smbios_write_tables: 99a2c000
1810 11:28:55.994307 EC returned error result code 3
1811 11:28:55.998063 Couldn't obtain OEM name from CBI
1812 11:28:56.001340 Create SMBIOS type 17
1813 11:28:56.004475 PCI: 00:00.0 (Intel Cannonlake)
1814 11:28:56.007982 PCI: 00:14.3 (Intel WiFi)
1815 11:28:56.011169 SMBIOS tables: 939 bytes.
1816 11:28:56.014364 Writing table forward entry at 0x00000500
1817 11:28:56.020614 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1818 11:28:56.023945 Writing coreboot table at 0x99b62000
1819 11:28:56.030325 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1820 11:28:56.033678 1. 0000000000001000-000000000009ffff: RAM
1821 11:28:56.037199 2. 00000000000a0000-00000000000fffff: RESERVED
1822 11:28:56.043556 3. 0000000000100000-0000000099a2bfff: RAM
1823 11:28:56.047065 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1824 11:28:56.053654 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1825 11:28:56.060310 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1826 11:28:56.063855 7. 000000009a000000-000000009f7fffff: RESERVED
1827 11:28:56.070405 8. 00000000e0000000-00000000efffffff: RESERVED
1828 11:28:56.073368 9. 00000000fc000000-00000000fc000fff: RESERVED
1829 11:28:56.076697 10. 00000000fe000000-00000000fe00ffff: RESERVED
1830 11:28:56.083214 11. 00000000fed10000-00000000fed17fff: RESERVED
1831 11:28:56.086953 12. 00000000fed80000-00000000fed83fff: RESERVED
1832 11:28:56.093359 13. 00000000fed90000-00000000fed91fff: RESERVED
1833 11:28:56.096635 14. 00000000feda0000-00000000feda1fff: RESERVED
1834 11:28:56.103586 15. 0000000100000000-000000045e7fffff: RAM
1835 11:28:56.106829 Graphics framebuffer located at 0xc0000000
1836 11:28:56.110043 Passing 5 GPIOs to payload:
1837 11:28:56.113492 NAME | PORT | POLARITY | VALUE
1838 11:28:56.119872 write protect | undefined | high | low
1839 11:28:56.123580 lid | undefined | high | high
1840 11:28:56.130095 power | undefined | high | low
1841 11:28:56.136337 oprom | undefined | high | low
1842 11:28:56.140192 EC in RW | 0x000000cb | high | low
1843 11:28:56.143251 Board ID: 4
1844 11:28:56.146415 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1845 11:28:56.150137 CBFS @ c08000 size 3f8000
1846 11:28:56.156506 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1847 11:28:56.159525 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1848 11:28:56.163364 coreboot table: 1492 bytes.
1849 11:28:56.166413 IMD ROOT 0. 99fff000 00001000
1850 11:28:56.170035 IMD SMALL 1. 99ffe000 00001000
1851 11:28:56.173230 FSP MEMORY 2. 99c4e000 003b0000
1852 11:28:56.176640 CONSOLE 3. 99c2e000 00020000
1853 11:28:56.179935 FMAP 4. 99c2d000 0000054e
1854 11:28:56.182813 TIME STAMP 5. 99c2c000 00000910
1855 11:28:56.186503 VBOOT WORK 6. 99c18000 00014000
1856 11:28:56.189541 MRC DATA 7. 99c16000 00001958
1857 11:28:56.192703 ROMSTG STCK 8. 99c15000 00001000
1858 11:28:56.196289 AFTER CAR 9. 99c0b000 0000a000
1859 11:28:56.199958 RAMSTAGE 10. 99baf000 0005c000
1860 11:28:56.203076 REFCODE 11. 99b7a000 00035000
1861 11:28:56.206188 SMM BACKUP 12. 99b6a000 00010000
1862 11:28:56.209379 COREBOOT 13. 99b62000 00008000
1863 11:28:56.213225 ACPI 14. 99b3e000 00024000
1864 11:28:56.216362 ACPI GNVS 15. 99b3d000 00001000
1865 11:28:56.219371 RAMOOPS 16. 99a3d000 00100000
1866 11:28:56.223098 TPM2 TCGLOG17. 99a2d000 00010000
1867 11:28:56.226171 SMBIOS 18. 99a2c000 00000800
1868 11:28:56.229286 IMD small region:
1869 11:28:56.233049 IMD ROOT 0. 99ffec00 00000400
1870 11:28:56.236229 FSP RUNTIME 1. 99ffebe0 00000004
1871 11:28:56.239440 EC HOSTEVENT 2. 99ffebc0 00000008
1872 11:28:56.243148 POWER STATE 3. 99ffeb80 00000040
1873 11:28:56.246348 ROMSTAGE 4. 99ffeb60 00000004
1874 11:28:56.249584 MEM INFO 5. 99ffe9a0 000001b9
1875 11:28:56.252890 VPD 6. 99ffe920 0000006c
1876 11:28:56.255969 MTRR: Physical address space:
1877 11:28:56.262903 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1878 11:28:56.269236 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1879 11:28:56.275918 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1880 11:28:56.282515 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1881 11:28:56.289180 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1882 11:28:56.296074 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1883 11:28:56.299653 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1884 11:28:56.305859 MTRR: Fixed MSR 0x250 0x0606060606060606
1885 11:28:56.309471 MTRR: Fixed MSR 0x258 0x0606060606060606
1886 11:28:56.312689 MTRR: Fixed MSR 0x259 0x0000000000000000
1887 11:28:56.315800 MTRR: Fixed MSR 0x268 0x0606060606060606
1888 11:28:56.322333 MTRR: Fixed MSR 0x269 0x0606060606060606
1889 11:28:56.325934 MTRR: Fixed MSR 0x26a 0x0606060606060606
1890 11:28:56.328996 MTRR: Fixed MSR 0x26b 0x0606060606060606
1891 11:28:56.332697 MTRR: Fixed MSR 0x26c 0x0606060606060606
1892 11:28:56.339110 MTRR: Fixed MSR 0x26d 0x0606060606060606
1893 11:28:56.342310 MTRR: Fixed MSR 0x26e 0x0606060606060606
1894 11:28:56.345468 MTRR: Fixed MSR 0x26f 0x0606060606060606
1895 11:28:56.349064 call enable_fixed_mtrr()
1896 11:28:56.352252 CPU physical address size: 39 bits
1897 11:28:56.355335 MTRR: default type WB/UC MTRR counts: 6/8.
1898 11:28:56.358552 MTRR: WB selected as default type.
1899 11:28:56.365569 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1900 11:28:56.371807 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1901 11:28:56.378751 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1902 11:28:56.385070 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1903 11:28:56.391717 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1904 11:28:56.398722 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1905 11:28:56.401770 MTRR: Fixed MSR 0x250 0x0606060606060606
1906 11:28:56.405380 MTRR: Fixed MSR 0x258 0x0606060606060606
1907 11:28:56.411682 MTRR: Fixed MSR 0x259 0x0000000000000000
1908 11:28:56.415318 MTRR: Fixed MSR 0x268 0x0606060606060606
1909 11:28:56.418592 MTRR: Fixed MSR 0x269 0x0606060606060606
1910 11:28:56.421993 MTRR: Fixed MSR 0x26a 0x0606060606060606
1911 11:28:56.428242 MTRR: Fixed MSR 0x26b 0x0606060606060606
1912 11:28:56.431439 MTRR: Fixed MSR 0x26c 0x0606060606060606
1913 11:28:56.435131 MTRR: Fixed MSR 0x26d 0x0606060606060606
1914 11:28:56.438200 MTRR: Fixed MSR 0x26e 0x0606060606060606
1915 11:28:56.445210 MTRR: Fixed MSR 0x26f 0x0606060606060606
1916 11:28:56.445331
1917 11:28:56.445439 MTRR check
1918 11:28:56.448465 Fixed MTRRs : Enabled
1919 11:28:56.451602 Variable MTRRs: Enabled
1920 11:28:56.451723
1921 11:28:56.451826 call enable_fixed_mtrr()
1922 11:28:56.457949 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1923 11:28:56.461701 CPU physical address size: 39 bits
1924 11:28:56.467969 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1925 11:28:56.471117 MTRR: Fixed MSR 0x250 0x0606060606060606
1926 11:28:56.475119 MTRR: Fixed MSR 0x250 0x0606060606060606
1927 11:28:56.478138 MTRR: Fixed MSR 0x258 0x0606060606060606
1928 11:28:56.484616 MTRR: Fixed MSR 0x259 0x0000000000000000
1929 11:28:56.488232 MTRR: Fixed MSR 0x268 0x0606060606060606
1930 11:28:56.491381 MTRR: Fixed MSR 0x269 0x0606060606060606
1931 11:28:56.494824 MTRR: Fixed MSR 0x26a 0x0606060606060606
1932 11:28:56.500943 MTRR: Fixed MSR 0x26b 0x0606060606060606
1933 11:28:56.504453 MTRR: Fixed MSR 0x26c 0x0606060606060606
1934 11:28:56.507667 MTRR: Fixed MSR 0x26d 0x0606060606060606
1935 11:28:56.511405 MTRR: Fixed MSR 0x26e 0x0606060606060606
1936 11:28:56.517607 MTRR: Fixed MSR 0x26f 0x0606060606060606
1937 11:28:56.520775 MTRR: Fixed MSR 0x258 0x0606060606060606
1938 11:28:56.524469 call enable_fixed_mtrr()
1939 11:28:56.527586 MTRR: Fixed MSR 0x259 0x0000000000000000
1940 11:28:56.530943 MTRR: Fixed MSR 0x268 0x0606060606060606
1941 11:28:56.534059 MTRR: Fixed MSR 0x269 0x0606060606060606
1942 11:28:56.540791 MTRR: Fixed MSR 0x26a 0x0606060606060606
1943 11:28:56.544326 MTRR: Fixed MSR 0x26b 0x0606060606060606
1944 11:28:56.547885 MTRR: Fixed MSR 0x26c 0x0606060606060606
1945 11:28:56.551036 MTRR: Fixed MSR 0x26d 0x0606060606060606
1946 11:28:56.554360 MTRR: Fixed MSR 0x26e 0x0606060606060606
1947 11:28:56.560522 MTRR: Fixed MSR 0x26f 0x0606060606060606
1948 11:28:56.564406 CPU physical address size: 39 bits
1949 11:28:56.567399 call enable_fixed_mtrr()
1950 11:28:56.570638 MTRR: Fixed MSR 0x250 0x0606060606060606
1951 11:28:56.573812 MTRR: Fixed MSR 0x250 0x0606060606060606
1952 11:28:56.577111 MTRR: Fixed MSR 0x258 0x0606060606060606
1953 11:28:56.584011 MTRR: Fixed MSR 0x259 0x0000000000000000
1954 11:28:56.587197 MTRR: Fixed MSR 0x268 0x0606060606060606
1955 11:28:56.590474 MTRR: Fixed MSR 0x269 0x0606060606060606
1956 11:28:56.594095 MTRR: Fixed MSR 0x26a 0x0606060606060606
1957 11:28:56.600868 MTRR: Fixed MSR 0x26b 0x0606060606060606
1958 11:28:56.603873 MTRR: Fixed MSR 0x26c 0x0606060606060606
1959 11:28:56.607454 MTRR: Fixed MSR 0x26d 0x0606060606060606
1960 11:28:56.610375 MTRR: Fixed MSR 0x26e 0x0606060606060606
1961 11:28:56.616939 MTRR: Fixed MSR 0x26f 0x0606060606060606
1962 11:28:56.620110 MTRR: Fixed MSR 0x258 0x0606060606060606
1963 11:28:56.623735 MTRR: Fixed MSR 0x259 0x0000000000000000
1964 11:28:56.626814 MTRR: Fixed MSR 0x268 0x0606060606060606
1965 11:28:56.633362 MTRR: Fixed MSR 0x269 0x0606060606060606
1966 11:28:56.637273 MTRR: Fixed MSR 0x26a 0x0606060606060606
1967 11:28:56.640537 MTRR: Fixed MSR 0x26b 0x0606060606060606
1968 11:28:56.643503 MTRR: Fixed MSR 0x26c 0x0606060606060606
1969 11:28:56.646594 MTRR: Fixed MSR 0x26d 0x0606060606060606
1970 11:28:56.653549 MTRR: Fixed MSR 0x26e 0x0606060606060606
1971 11:28:56.656582 MTRR: Fixed MSR 0x26f 0x0606060606060606
1972 11:28:56.660417 call enable_fixed_mtrr()
1973 11:28:56.663592 CPU physical address size: 39 bits
1974 11:28:56.666690 CBFS @ c08000 size 3f8000
1975 11:28:56.669849 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1976 11:28:56.676482 MTRR: Fixed MSR 0x250 0x0606060606060606
1977 11:28:56.680262 MTRR: Fixed MSR 0x258 0x0606060606060606
1978 11:28:56.683498 MTRR: Fixed MSR 0x259 0x0000000000000000
1979 11:28:56.686730 MTRR: Fixed MSR 0x268 0x0606060606060606
1980 11:28:56.693143 MTRR: Fixed MSR 0x269 0x0606060606060606
1981 11:28:56.697026 MTRR: Fixed MSR 0x26a 0x0606060606060606
1982 11:28:56.699921 MTRR: Fixed MSR 0x26b 0x0606060606060606
1983 11:28:56.703043 MTRR: Fixed MSR 0x26c 0x0606060606060606
1984 11:28:56.706756 MTRR: Fixed MSR 0x26d 0x0606060606060606
1985 11:28:56.713533 MTRR: Fixed MSR 0x26e 0x0606060606060606
1986 11:28:56.716695 MTRR: Fixed MSR 0x26f 0x0606060606060606
1987 11:28:56.719647 MTRR: Fixed MSR 0x250 0x0606060606060606
1988 11:28:56.723250 call enable_fixed_mtrr()
1989 11:28:56.726424 MTRR: Fixed MSR 0x258 0x0606060606060606
1990 11:28:56.730441 MTRR: Fixed MSR 0x259 0x0000000000000000
1991 11:28:56.736786 MTRR: Fixed MSR 0x268 0x0606060606060606
1992 11:28:56.739951 MTRR: Fixed MSR 0x269 0x0606060606060606
1993 11:28:56.743344 MTRR: Fixed MSR 0x26a 0x0606060606060606
1994 11:28:56.746647 MTRR: Fixed MSR 0x26b 0x0606060606060606
1995 11:28:56.753127 MTRR: Fixed MSR 0x26c 0x0606060606060606
1996 11:28:56.756488 MTRR: Fixed MSR 0x26d 0x0606060606060606
1997 11:28:56.759466 MTRR: Fixed MSR 0x26e 0x0606060606060606
1998 11:28:56.763138 MTRR: Fixed MSR 0x26f 0x0606060606060606
1999 11:28:56.769461 CPU physical address size: 39 bits
2000 11:28:56.769604 call enable_fixed_mtrr()
2001 11:28:56.772731 CPU physical address size: 39 bits
2002 11:28:56.775975 call enable_fixed_mtrr()
2003 11:28:56.779320 CBFS: Locating 'fallback/payload'
2004 11:28:56.782755 CPU physical address size: 39 bits
2005 11:28:56.789449 CBFS: Found @ offset 1c96c0 size 3f798
2006 11:28:56.792702 CPU physical address size: 39 bits
2007 11:28:56.796555 Checking segment from ROM address 0xffdd16f8
2008 11:28:56.799758 Checking segment from ROM address 0xffdd1714
2009 11:28:56.806245 Loading segment from ROM address 0xffdd16f8
2010 11:28:56.806364 code (compression=0)
2011 11:28:56.816111 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2012 11:28:56.823003 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2013 11:28:56.826280 it's not compressed!
2014 11:28:56.918565 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2015 11:28:56.925458 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2016 11:28:56.928757 Loading segment from ROM address 0xffdd1714
2017 11:28:56.931727 Entry Point 0x30000000
2018 11:28:56.934915 Loaded segments
2019 11:28:56.940587 Finalizing chipset.
2020 11:28:56.944097 Finalizing SMM.
2021 11:28:56.947424 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2022 11:28:56.950560 mp_park_aps done after 0 msecs.
2023 11:28:56.956989 Jumping to boot code at 30000000(99b62000)
2024 11:28:56.964046 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2025 11:28:56.964144
2026 11:28:56.964226
2027 11:28:56.964297
2028 11:28:56.967083 Starting depthcharge on Helios...
2029 11:28:56.967180
2030 11:28:56.967572 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2031 11:28:56.967701 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2032 11:28:56.967797 Setting prompt string to ['hatch:']
2033 11:28:56.967887 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2034 11:28:56.977250 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2035 11:28:56.977365
2036 11:28:56.983258 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2037 11:28:56.983384
2038 11:28:56.990103 board_setup: Info: eMMC controller not present; skipping
2039 11:28:56.990225
2040 11:28:56.993231 New NVMe Controller 0x30053ac0 @ 00:1d:00
2041 11:28:56.993326
2042 11:28:57.000321 board_setup: Info: SDHCI controller not present; skipping
2043 11:28:57.000415
2044 11:28:57.006598 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2045 11:28:57.006695
2046 11:28:57.006769 Wipe memory regions:
2047 11:28:57.006837
2048 11:28:57.010307 [0x00000000001000, 0x000000000a0000)
2049 11:28:57.010400
2050 11:28:57.013471 [0x00000000100000, 0x00000030000000)
2051 11:28:57.079952
2052 11:28:57.083225 [0x00000030657430, 0x00000099a2c000)
2053 11:28:57.229667
2054 11:28:57.232639 [0x00000100000000, 0x0000045e800000)
2055 11:28:58.688971
2056 11:28:58.689114 R8152: Initializing
2057 11:28:58.689226
2058 11:28:58.692239 Version 9 (ocp_data = 6010)
2059 11:28:58.696859
2060 11:28:58.696983 R8152: Done initializing
2061 11:28:58.697092
2062 11:28:58.699662 Adding net device
2063 11:28:59.182767
2064 11:28:59.182995 R8152: Initializing
2065 11:28:59.183091
2066 11:28:59.185886 Version 6 (ocp_data = 5c30)
2067 11:28:59.185991
2068 11:28:59.188995 R8152: Done initializing
2069 11:28:59.189088
2070 11:28:59.192749 net_add_device: Attemp to include the same device
2071 11:28:59.195613
2072 11:28:59.202665 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2073 11:28:59.202783
2074 11:28:59.202888
2075 11:28:59.203003
2076 11:28:59.203349 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2078 11:28:59.303820 hatch: tftpboot 192.168.201.1 10657508/tftp-deploy-f2dyscyx/kernel/bzImage 10657508/tftp-deploy-f2dyscyx/kernel/cmdline 10657508/tftp-deploy-f2dyscyx/ramdisk/ramdisk.cpio.gz
2079 11:28:59.304011 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2080 11:28:59.304105 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2081 11:28:59.308441 tftpboot 192.168.201.1 10657508/tftp-deploy-f2dyscyx/kernel/bzIploy-f2dyscyx/kernel/cmdline 10657508/tftp-deploy-f2dyscyx/ramdisk/ramdisk.cpio.gz
2082 11:28:59.308547
2083 11:28:59.308629 Waiting for link
2084 11:28:59.509449
2085 11:28:59.509603 done.
2086 11:28:59.509689
2087 11:28:59.509760 MAC: 00:24:32:50:1a:59
2088 11:28:59.509829
2089 11:28:59.512578 Sending DHCP discover... done.
2090 11:28:59.512661
2091 11:28:59.516140 Waiting for reply... done.
2092 11:28:59.516220
2093 11:28:59.519143 Sending DHCP request... done.
2094 11:28:59.519226
2095 11:28:59.522422 Waiting for reply... done.
2096 11:28:59.525999
2097 11:28:59.526084 My ip is 192.168.201.14
2098 11:28:59.526152
2099 11:28:59.529224 The DHCP server ip is 192.168.201.1
2100 11:28:59.529311
2101 11:28:59.535527 TFTP server IP predefined by user: 192.168.201.1
2102 11:28:59.535611
2103 11:28:59.542026 Bootfile predefined by user: 10657508/tftp-deploy-f2dyscyx/kernel/bzImage
2104 11:28:59.542113
2105 11:28:59.545747 Sending tftp read request... done.
2106 11:28:59.545835
2107 11:28:59.548964 Waiting for the transfer...
2108 11:28:59.549050
2109 11:29:00.174023 00000000 ################################################################
2110 11:29:00.174171
2111 11:29:00.707376 00080000 ################################################################
2112 11:29:00.707547
2113 11:29:01.245752 00100000 ################################################################
2114 11:29:01.245913
2115 11:29:01.787882 00180000 ################################################################
2116 11:29:01.788080
2117 11:29:02.325969 00200000 ################################################################
2118 11:29:02.326153
2119 11:29:02.871153 00280000 ################################################################
2120 11:29:02.871313
2121 11:29:03.427774 00300000 ################################################################
2122 11:29:03.427920
2123 11:29:03.974791 00380000 ################################################################
2124 11:29:03.974952
2125 11:29:04.509662 00400000 ################################################################
2126 11:29:04.509836
2127 11:29:05.048528 00480000 ################################################################
2128 11:29:05.048704
2129 11:29:05.563438 00500000 ################################################################
2130 11:29:05.563614
2131 11:29:06.076098 00580000 ################################################################
2132 11:29:06.076303
2133 11:29:06.594247 00600000 ################################################################
2134 11:29:06.594439
2135 11:29:07.109189 00680000 ################################################################
2136 11:29:07.109376
2137 11:29:07.621968 00700000 ################################################################
2138 11:29:07.622154
2139 11:29:08.134538 00780000 ################################################################
2140 11:29:08.134697
2141 11:29:08.647987 00800000 ################################################################
2142 11:29:08.648134
2143 11:29:09.162009 00880000 ################################################################
2144 11:29:09.162189
2145 11:29:09.675192 00900000 ################################################################
2146 11:29:09.675381
2147 11:29:10.184687 00980000 ################################################################
2148 11:29:10.184866
2149 11:29:10.552948 00a00000 ############################################### done.
2150 11:29:10.553107
2151 11:29:10.556467 The bootfile was 10863104 bytes long.
2152 11:29:10.556590
2153 11:29:10.559454 Sending tftp read request... done.
2154 11:29:10.559569
2155 11:29:10.562823 Waiting for the transfer...
2156 11:29:10.562932
2157 11:29:11.078822 00000000 ################################################################
2158 11:29:11.078978
2159 11:29:11.593443 00080000 ################################################################
2160 11:29:11.593638
2161 11:29:12.106147 00100000 ################################################################
2162 11:29:12.106315
2163 11:29:12.618570 00180000 ################################################################
2164 11:29:12.618752
2165 11:29:13.129442 00200000 ################################################################
2166 11:29:13.129593
2167 11:29:13.642597 00280000 ################################################################
2168 11:29:13.642740
2169 11:29:14.175657 00300000 ################################################################
2170 11:29:14.175825
2171 11:29:14.695872 00380000 ################################################################
2172 11:29:14.696040
2173 11:29:15.211301 00400000 ################################################################
2174 11:29:15.211500
2175 11:29:15.726193 00480000 ################################################################
2176 11:29:15.726353
2177 11:29:16.239020 00500000 ################################################################
2178 11:29:16.239165
2179 11:29:16.762514 00580000 ################################################################
2180 11:29:16.762700
2181 11:29:17.288569 00600000 ################################################################
2182 11:29:17.288724
2183 11:29:17.330419 00680000 ##### done.
2184 11:29:17.330554
2185 11:29:17.333825 Sending tftp read request... done.
2186 11:29:17.333920
2187 11:29:17.337127 Waiting for the transfer...
2188 11:29:17.337231
2189 11:29:17.337310 00000000 # done.
2190 11:29:17.337383
2191 11:29:17.346444 Command line loaded dynamically from TFTP file: 10657508/tftp-deploy-f2dyscyx/kernel/cmdline
2192 11:29:17.346539
2193 11:29:17.369917 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10657508/extract-nfsrootfs-9lz1vy48,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2194 11:29:17.370060
2195 11:29:17.376461 ec_init(0): CrosEC protocol v3 supported (256, 256)
2196 11:29:17.380608
2197 11:29:17.384201 Shutting down all USB controllers.
2198 11:29:17.384283
2199 11:29:17.384353 Removing current net device
2200 11:29:17.388299
2201 11:29:17.388415 Finalizing coreboot
2202 11:29:17.388519
2203 11:29:17.394221 Exiting depthcharge with code 4 at timestamp: 27764241
2204 11:29:17.394338
2205 11:29:17.394445
2206 11:29:17.394544 Starting kernel ...
2207 11:29:17.394637
2208 11:29:17.394703
2209 11:29:17.395340 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2210 11:29:17.395486 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
2211 11:29:17.395573 Setting prompt string to ['Linux version [0-9]']
2212 11:29:17.395652 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2213 11:29:17.395731 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2215 11:33:39.395727 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
2217 11:33:39.396133 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
2219 11:33:39.396356 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2222 11:33:39.396650 end: 2 depthcharge-action (duration 00:05:00) [common]
2224 11:33:39.396898 Cleaning after the job
2225 11:33:39.396999 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10657508/tftp-deploy-f2dyscyx/ramdisk
2226 11:33:39.398037 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10657508/tftp-deploy-f2dyscyx/kernel
2227 11:33:39.399580 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10657508/tftp-deploy-f2dyscyx/nfsrootfs
2228 11:33:39.479790 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10657508/tftp-deploy-f2dyscyx/modules
2229 11:33:39.480485 start: 4.1 power-off (timeout 00:00:30) [common]
2230 11:33:39.480795 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2231 11:33:39.559535 >> Command sent successfully.
2232 11:33:39.563894 Returned 0 in 0 seconds
2233 11:33:39.664433 end: 4.1 power-off (duration 00:00:00) [common]
2235 11:33:39.664875 start: 4.2 read-feedback (timeout 00:10:00) [common]
2236 11:33:39.665196 Listened to connection for namespace 'common' for up to 1s
2238 11:33:39.665669 Listened to connection for namespace 'common' for up to 1s
2239 11:33:40.666111 Finalising connection for namespace 'common'
2240 11:33:40.666313 Disconnecting from shell: Finalise
2241 11:33:40.666429
2242 11:33:40.766765 end: 4.2 read-feedback (duration 00:00:01) [common]
2243 11:33:40.766915 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10657508
2244 11:33:41.297274 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10657508
2245 11:33:41.297485 JobError: Your job cannot terminate cleanly.