Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
1 11:27:48.401480 lava-dispatcher, installed at version: 2023.05.1
2 11:27:48.401728 start: 0 validate
3 11:27:48.401878 Start time: 2023-06-09 11:27:48.401870+00:00 (UTC)
4 11:27:48.402023 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:27:48.402174 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230527.0%2Famd64%2Finitrd.cpio.gz exists
6 11:27:48.663294 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:27:48.663556 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.283-cip98-224-g5f5303d7920a9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:27:48.923784 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:27:48.924545 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230527.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 11:27:52.125697 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:27:52.126416 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.283-cip98-224-g5f5303d7920a9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 11:27:52.394414 validate duration: 3.99
14 11:27:52.395569 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 11:27:52.396063 start: 1.1 download-retry (timeout 00:10:00) [common]
16 11:27:52.396533 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 11:27:52.397089 Not decompressing ramdisk as can be used compressed.
18 11:27:52.397515 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230527.0/amd64/initrd.cpio.gz
19 11:27:52.397862 saving as /var/lib/lava/dispatcher/tmp/10657543/tftp-deploy-er6ot6gg/ramdisk/initrd.cpio.gz
20 11:27:52.398179 total size: 5671546 (5MB)
21 11:27:53.032692 progress 0% (0MB)
22 11:27:53.037766 progress 5% (0MB)
23 11:27:53.039519 progress 10% (0MB)
24 11:27:53.041085 progress 15% (0MB)
25 11:27:53.042811 progress 20% (1MB)
26 11:27:53.044585 progress 25% (1MB)
27 11:27:53.046128 progress 30% (1MB)
28 11:27:53.047784 progress 35% (1MB)
29 11:27:53.049474 progress 40% (2MB)
30 11:27:53.050949 progress 45% (2MB)
31 11:27:53.052651 progress 50% (2MB)
32 11:27:53.054344 progress 55% (3MB)
33 11:27:53.055823 progress 60% (3MB)
34 11:27:53.057510 progress 65% (3MB)
35 11:27:53.059159 progress 70% (3MB)
36 11:27:53.060669 progress 75% (4MB)
37 11:27:53.062315 progress 80% (4MB)
38 11:27:53.063967 progress 85% (4MB)
39 11:27:53.065481 progress 90% (4MB)
40 11:27:53.067122 progress 95% (5MB)
41 11:27:53.068825 progress 100% (5MB)
42 11:27:53.068940 5MB downloaded in 0.67s (8.06MB/s)
43 11:27:53.069098 end: 1.1.1 http-download (duration 00:00:01) [common]
45 11:27:53.069386 end: 1.1 download-retry (duration 00:00:01) [common]
46 11:27:53.069481 start: 1.2 download-retry (timeout 00:09:59) [common]
47 11:27:53.069570 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 11:27:53.069706 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.283-cip98-224-g5f5303d7920a9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 11:27:53.069782 saving as /var/lib/lava/dispatcher/tmp/10657543/tftp-deploy-er6ot6gg/kernel/bzImage
50 11:27:53.069851 total size: 10863104 (10MB)
51 11:27:53.069918 No compression specified
52 11:27:53.071158 progress 0% (0MB)
53 11:27:53.074206 progress 5% (0MB)
54 11:27:53.077335 progress 10% (1MB)
55 11:27:53.080249 progress 15% (1MB)
56 11:27:53.083331 progress 20% (2MB)
57 11:27:53.086247 progress 25% (2MB)
58 11:27:53.089378 progress 30% (3MB)
59 11:27:53.092605 progress 35% (3MB)
60 11:27:53.095673 progress 40% (4MB)
61 11:27:53.099073 progress 45% (4MB)
62 11:27:53.102369 progress 50% (5MB)
63 11:27:53.105805 progress 55% (5MB)
64 11:27:53.109165 progress 60% (6MB)
65 11:27:53.112442 progress 65% (6MB)
66 11:27:53.115683 progress 70% (7MB)
67 11:27:53.118746 progress 75% (7MB)
68 11:27:53.121918 progress 80% (8MB)
69 11:27:53.124975 progress 85% (8MB)
70 11:27:53.128056 progress 90% (9MB)
71 11:27:53.131111 progress 95% (9MB)
72 11:27:53.134352 progress 100% (10MB)
73 11:27:53.134569 10MB downloaded in 0.06s (160.09MB/s)
74 11:27:53.134751 end: 1.2.1 http-download (duration 00:00:00) [common]
76 11:27:53.135042 end: 1.2 download-retry (duration 00:00:00) [common]
77 11:27:53.135166 start: 1.3 download-retry (timeout 00:09:59) [common]
78 11:27:53.135287 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 11:27:53.135461 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230527.0/amd64/full.rootfs.tar.xz
80 11:27:53.135541 saving as /var/lib/lava/dispatcher/tmp/10657543/tftp-deploy-er6ot6gg/nfsrootfs/full.rootfs.tar
81 11:27:53.135637 total size: 125914312 (120MB)
82 11:27:53.135707 Using unxz to decompress xz
83 11:27:53.140100 progress 0% (0MB)
84 11:27:53.678668 progress 5% (6MB)
85 11:27:54.226842 progress 10% (12MB)
86 11:27:54.781620 progress 15% (18MB)
87 11:27:55.331893 progress 20% (24MB)
88 11:27:55.707803 progress 25% (30MB)
89 11:27:56.078397 progress 30% (36MB)
90 11:27:56.371417 progress 35% (42MB)
91 11:27:56.588960 progress 40% (48MB)
92 11:27:56.988655 progress 45% (54MB)
93 11:27:57.394310 progress 50% (60MB)
94 11:27:57.766286 progress 55% (66MB)
95 11:27:58.162569 progress 60% (72MB)
96 11:27:58.542809 progress 65% (78MB)
97 11:27:58.980167 progress 70% (84MB)
98 11:27:59.443619 progress 75% (90MB)
99 11:27:59.904416 progress 80% (96MB)
100 11:28:00.005686 progress 85% (102MB)
101 11:28:00.180420 progress 90% (108MB)
102 11:28:00.552851 progress 95% (114MB)
103 11:28:00.974062 progress 100% (120MB)
104 11:28:00.980483 120MB downloaded in 7.84s (15.31MB/s)
105 11:28:00.980808 end: 1.3.1 http-download (duration 00:00:08) [common]
107 11:28:00.981106 end: 1.3 download-retry (duration 00:00:08) [common]
108 11:28:00.981209 start: 1.4 download-retry (timeout 00:09:51) [common]
109 11:28:00.981308 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 11:28:00.981473 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.283-cip98-224-g5f5303d7920a9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 11:28:00.981556 saving as /var/lib/lava/dispatcher/tmp/10657543/tftp-deploy-er6ot6gg/modules/modules.tar
112 11:28:00.981626 total size: 484428 (0MB)
113 11:28:00.981695 Using unxz to decompress xz
114 11:28:00.985580 progress 6% (0MB)
115 11:28:00.986013 progress 13% (0MB)
116 11:28:00.986273 progress 20% (0MB)
117 11:28:00.987850 progress 27% (0MB)
118 11:28:00.990205 progress 33% (0MB)
119 11:28:00.992648 progress 40% (0MB)
120 11:28:00.995446 progress 47% (0MB)
121 11:28:00.997919 progress 54% (0MB)
122 11:28:00.999872 progress 60% (0MB)
123 11:28:01.002129 progress 67% (0MB)
124 11:28:01.004454 progress 74% (0MB)
125 11:28:01.006922 progress 81% (0MB)
126 11:28:01.009008 progress 87% (0MB)
127 11:28:01.011189 progress 94% (0MB)
128 11:28:01.013241 progress 100% (0MB)
129 11:28:01.019974 0MB downloaded in 0.04s (12.05MB/s)
130 11:28:01.020253 end: 1.4.1 http-download (duration 00:00:00) [common]
132 11:28:01.020559 end: 1.4 download-retry (duration 00:00:00) [common]
133 11:28:01.020665 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
134 11:28:01.020773 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
135 11:28:03.989814 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10657543/extract-nfsrootfs-hqtzozas
136 11:28:03.990031 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
137 11:28:03.990147 start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
138 11:28:03.990323 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10657543/lava-overlay-_drloz3a
139 11:28:03.990463 makedir: /var/lib/lava/dispatcher/tmp/10657543/lava-overlay-_drloz3a/lava-10657543/bin
140 11:28:03.990574 makedir: /var/lib/lava/dispatcher/tmp/10657543/lava-overlay-_drloz3a/lava-10657543/tests
141 11:28:03.990681 makedir: /var/lib/lava/dispatcher/tmp/10657543/lava-overlay-_drloz3a/lava-10657543/results
142 11:28:03.990792 Creating /var/lib/lava/dispatcher/tmp/10657543/lava-overlay-_drloz3a/lava-10657543/bin/lava-add-keys
143 11:28:03.990945 Creating /var/lib/lava/dispatcher/tmp/10657543/lava-overlay-_drloz3a/lava-10657543/bin/lava-add-sources
144 11:28:03.991086 Creating /var/lib/lava/dispatcher/tmp/10657543/lava-overlay-_drloz3a/lava-10657543/bin/lava-background-process-start
145 11:28:03.991224 Creating /var/lib/lava/dispatcher/tmp/10657543/lava-overlay-_drloz3a/lava-10657543/bin/lava-background-process-stop
146 11:28:03.991362 Creating /var/lib/lava/dispatcher/tmp/10657543/lava-overlay-_drloz3a/lava-10657543/bin/lava-common-functions
147 11:28:03.991498 Creating /var/lib/lava/dispatcher/tmp/10657543/lava-overlay-_drloz3a/lava-10657543/bin/lava-echo-ipv4
148 11:28:03.991635 Creating /var/lib/lava/dispatcher/tmp/10657543/lava-overlay-_drloz3a/lava-10657543/bin/lava-install-packages
149 11:28:03.991769 Creating /var/lib/lava/dispatcher/tmp/10657543/lava-overlay-_drloz3a/lava-10657543/bin/lava-installed-packages
150 11:28:03.991911 Creating /var/lib/lava/dispatcher/tmp/10657543/lava-overlay-_drloz3a/lava-10657543/bin/lava-os-build
151 11:28:03.992045 Creating /var/lib/lava/dispatcher/tmp/10657543/lava-overlay-_drloz3a/lava-10657543/bin/lava-probe-channel
152 11:28:03.992181 Creating /var/lib/lava/dispatcher/tmp/10657543/lava-overlay-_drloz3a/lava-10657543/bin/lava-probe-ip
153 11:28:03.992325 Creating /var/lib/lava/dispatcher/tmp/10657543/lava-overlay-_drloz3a/lava-10657543/bin/lava-target-ip
154 11:28:03.992461 Creating /var/lib/lava/dispatcher/tmp/10657543/lava-overlay-_drloz3a/lava-10657543/bin/lava-target-mac
155 11:28:03.992596 Creating /var/lib/lava/dispatcher/tmp/10657543/lava-overlay-_drloz3a/lava-10657543/bin/lava-target-storage
156 11:28:03.992731 Creating /var/lib/lava/dispatcher/tmp/10657543/lava-overlay-_drloz3a/lava-10657543/bin/lava-test-case
157 11:28:03.992866 Creating /var/lib/lava/dispatcher/tmp/10657543/lava-overlay-_drloz3a/lava-10657543/bin/lava-test-event
158 11:28:03.992999 Creating /var/lib/lava/dispatcher/tmp/10657543/lava-overlay-_drloz3a/lava-10657543/bin/lava-test-feedback
159 11:28:03.993136 Creating /var/lib/lava/dispatcher/tmp/10657543/lava-overlay-_drloz3a/lava-10657543/bin/lava-test-raise
160 11:28:03.993269 Creating /var/lib/lava/dispatcher/tmp/10657543/lava-overlay-_drloz3a/lava-10657543/bin/lava-test-reference
161 11:28:03.993406 Creating /var/lib/lava/dispatcher/tmp/10657543/lava-overlay-_drloz3a/lava-10657543/bin/lava-test-runner
162 11:28:03.993538 Creating /var/lib/lava/dispatcher/tmp/10657543/lava-overlay-_drloz3a/lava-10657543/bin/lava-test-set
163 11:28:03.993673 Creating /var/lib/lava/dispatcher/tmp/10657543/lava-overlay-_drloz3a/lava-10657543/bin/lava-test-shell
164 11:28:03.993809 Updating /var/lib/lava/dispatcher/tmp/10657543/lava-overlay-_drloz3a/lava-10657543/bin/lava-install-packages (oe)
165 11:28:03.993978 Updating /var/lib/lava/dispatcher/tmp/10657543/lava-overlay-_drloz3a/lava-10657543/bin/lava-installed-packages (oe)
166 11:28:03.994111 Creating /var/lib/lava/dispatcher/tmp/10657543/lava-overlay-_drloz3a/lava-10657543/environment
167 11:28:03.994222 LAVA metadata
168 11:28:03.994299 - LAVA_JOB_ID=10657543
169 11:28:03.994368 - LAVA_DISPATCHER_IP=192.168.201.1
170 11:28:03.994478 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
171 11:28:03.994551 skipped lava-vland-overlay
172 11:28:03.994633 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 11:28:03.994720 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
174 11:28:03.994787 skipped lava-multinode-overlay
175 11:28:03.994867 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 11:28:03.994954 start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
177 11:28:03.995033 Loading test definitions
178 11:28:03.995130 start: 1.5.2.3.1 git-repo-action (timeout 00:09:48) [common]
179 11:28:03.995208 Using /lava-10657543 at stage 0
180 11:28:03.995309 Fetching tests from https://github.com/kernelci/test-definitions
181 11:28:03.995391 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/10657543/lava-overlay-_drloz3a/lava-10657543/0/tests/0_ltp-ipc'
182 11:28:08.443707 Running '/usr/bin/git checkout kernelci.org
183 11:28:08.601819 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/10657543/lava-overlay-_drloz3a/lava-10657543/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
184 11:28:08.602663 uuid=10657543_1.5.2.3.1 testdef=None
185 11:28:08.602836 end: 1.5.2.3.1 git-repo-action (duration 00:00:05) [common]
187 11:28:08.603117 start: 1.5.2.3.2 test-overlay (timeout 00:09:44) [common]
188 11:28:08.603989 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
190 11:28:08.604254 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:44) [common]
191 11:28:08.605472 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
193 11:28:08.605751 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:44) [common]
194 11:28:08.606875 runner path: /var/lib/lava/dispatcher/tmp/10657543/lava-overlay-_drloz3a/lava-10657543/0/tests/0_ltp-ipc test_uuid 10657543_1.5.2.3.1
195 11:28:08.606976 SKIPFILE='skipfile-lkft.yaml'
196 11:28:08.607049 SKIP_INSTALL='true'
197 11:28:08.607117 TST_CMDFILES='ipc'
198 11:28:08.607273 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
200 11:28:08.607503 Creating lava-test-runner.conf files
201 11:28:08.607577 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10657543/lava-overlay-_drloz3a/lava-10657543/0 for stage 0
202 11:28:08.607680 - 0_ltp-ipc
203 11:28:08.607796 end: 1.5.2.3 test-definition (duration 00:00:05) [common]
204 11:28:08.607895 start: 1.5.2.4 compress-overlay (timeout 00:09:44) [common]
205 11:28:16.875666 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
206 11:28:16.875862 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:36) [common]
207 11:28:16.876002 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
208 11:28:16.876159 end: 1.5.2 lava-overlay (duration 00:00:13) [common]
209 11:28:16.876310 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:36) [common]
210 11:28:17.027952 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
211 11:28:17.028377 start: 1.5.4 extract-modules (timeout 00:09:35) [common]
212 11:28:17.028516 extracting modules file /var/lib/lava/dispatcher/tmp/10657543/tftp-deploy-er6ot6gg/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10657543/extract-nfsrootfs-hqtzozas
213 11:28:17.050189 extracting modules file /var/lib/lava/dispatcher/tmp/10657543/tftp-deploy-er6ot6gg/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10657543/extract-overlay-ramdisk-v6ks_847/ramdisk
214 11:28:17.071873 end: 1.5.4 extract-modules (duration 00:00:00) [common]
215 11:28:17.072047 start: 1.5.5 apply-overlay-tftp (timeout 00:09:35) [common]
216 11:28:17.072198 [common] Applying overlay to NFS
217 11:28:17.072380 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10657543/compress-overlay-fq09rhyd/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10657543/extract-nfsrootfs-hqtzozas
218 11:28:18.084686 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
219 11:28:18.084880 start: 1.5.6 configure-preseed-file (timeout 00:09:34) [common]
220 11:28:18.084997 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
221 11:28:18.085105 start: 1.5.7 compress-ramdisk (timeout 00:09:34) [common]
222 11:28:18.085208 Building ramdisk /var/lib/lava/dispatcher/tmp/10657543/extract-overlay-ramdisk-v6ks_847/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10657543/extract-overlay-ramdisk-v6ks_847/ramdisk
223 11:28:18.170269 >> 31370 blocks
224 11:28:18.855572 rename /var/lib/lava/dispatcher/tmp/10657543/extract-overlay-ramdisk-v6ks_847/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10657543/tftp-deploy-er6ot6gg/ramdisk/ramdisk.cpio.gz
225 11:28:18.856027 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
226 11:28:18.856163 start: 1.5.8 prepare-kernel (timeout 00:09:34) [common]
227 11:28:18.856277 start: 1.5.8.1 prepare-fit (timeout 00:09:34) [common]
228 11:28:18.856392 No mkimage arch provided, not using FIT.
229 11:28:18.856493 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
230 11:28:18.856584 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
231 11:28:18.856704 end: 1.5 prepare-tftp-overlay (duration 00:00:18) [common]
232 11:28:18.856810 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:34) [common]
233 11:28:18.856899 No LXC device requested
234 11:28:18.856989 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
235 11:28:18.857085 start: 1.7 deploy-device-env (timeout 00:09:34) [common]
236 11:28:18.857178 end: 1.7 deploy-device-env (duration 00:00:00) [common]
237 11:28:18.857257 Checking files for TFTP limit of 4294967296 bytes.
238 11:28:18.857694 end: 1 tftp-deploy (duration 00:00:26) [common]
239 11:28:18.857811 start: 2 depthcharge-action (timeout 00:05:00) [common]
240 11:28:18.857908 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
241 11:28:18.858050 substitutions:
242 11:28:18.858127 - {DTB}: None
243 11:28:18.858195 - {INITRD}: 10657543/tftp-deploy-er6ot6gg/ramdisk/ramdisk.cpio.gz
244 11:28:18.858263 - {KERNEL}: 10657543/tftp-deploy-er6ot6gg/kernel/bzImage
245 11:28:18.858326 - {LAVA_MAC}: None
246 11:28:18.858387 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10657543/extract-nfsrootfs-hqtzozas
247 11:28:18.858451 - {NFS_SERVER_IP}: 192.168.201.1
248 11:28:18.858512 - {PRESEED_CONFIG}: None
249 11:28:18.858585 - {PRESEED_LOCAL}: None
250 11:28:18.858696 - {RAMDISK}: 10657543/tftp-deploy-er6ot6gg/ramdisk/ramdisk.cpio.gz
251 11:28:18.858770 - {ROOT_PART}: None
252 11:28:18.858832 - {ROOT}: None
253 11:28:18.858892 - {SERVER_IP}: 192.168.201.1
254 11:28:18.858953 - {TEE}: None
255 11:28:18.859013 Parsed boot commands:
256 11:28:18.859074 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
257 11:28:18.859266 Parsed boot commands: tftpboot 192.168.201.1 10657543/tftp-deploy-er6ot6gg/kernel/bzImage 10657543/tftp-deploy-er6ot6gg/kernel/cmdline 10657543/tftp-deploy-er6ot6gg/ramdisk/ramdisk.cpio.gz
258 11:28:18.859365 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
259 11:28:18.859462 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
260 11:28:18.859564 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
261 11:28:18.859659 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
262 11:28:18.859735 Not connected, no need to disconnect.
263 11:28:18.859816 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
264 11:28:18.859905 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
265 11:28:18.859980 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-4'
266 11:28:18.863809 Setting prompt string to ['lava-test: # ']
267 11:28:18.864234 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
268 11:28:18.864387 end: 2.2.1 reset-connection (duration 00:00:00) [common]
269 11:28:18.864505 start: 2.2.2 reset-device (timeout 00:05:00) [common]
270 11:28:18.864605 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
271 11:28:18.864823 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-4' '--port=1' '--command=reboot'
272 11:28:24.002396 >> Command sent successfully.
273 11:28:24.005257 Returned 0 in 5 seconds
274 11:28:24.105665 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
276 11:28:24.106025 end: 2.2.2 reset-device (duration 00:00:05) [common]
277 11:28:24.106140 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
278 11:28:24.106241 Setting prompt string to 'Starting depthcharge on Voema...'
279 11:28:24.106318 Changing prompt to 'Starting depthcharge on Voema...'
280 11:28:24.106400 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
281 11:28:24.106673 [Enter `^Ec?' for help]
282 11:28:25.708360
283 11:28:25.708884
284 11:28:25.718569 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
285 11:28:25.721969 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
286 11:28:25.728336 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
287 11:28:25.731925 CPU: AES supported, TXT NOT supported, VT supported
288 11:28:25.738177 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
289 11:28:25.745325 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
290 11:28:25.748754 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
291 11:28:25.751711 VBOOT: Loading verstage.
292 11:28:25.755033 FMAP: Found "FLASH" version 1.1 at 0x1804000.
293 11:28:25.761521 FMAP: base = 0x0 size = 0x2000000 #areas = 32
294 11:28:25.764997 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
295 11:28:25.775453 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
296 11:28:25.781930 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
297 11:28:25.782469
298 11:28:25.782939
299 11:28:25.795264 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
300 11:28:25.809076 Probing TPM: . done!
301 11:28:25.812256 TPM ready after 0 ms
302 11:28:25.815987 Connected to device vid:did:rid of 1ae0:0028:00
303 11:28:25.827129 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
304 11:28:25.833860 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
305 11:28:25.837294 Initialized TPM device CR50 revision 0
306 11:28:25.887652 tlcl_send_startup: Startup return code is 0
307 11:28:25.888063 TPM: setup succeeded
308 11:28:25.903025 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
309 11:28:25.917234 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
310 11:28:25.929835 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
311 11:28:25.939959 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
312 11:28:25.943560 Chrome EC: UHEPI supported
313 11:28:25.946858 Phase 1
314 11:28:25.950479 FMAP: area GBB found @ 1805000 (458752 bytes)
315 11:28:25.959816 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
316 11:28:25.966749 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
317 11:28:25.973271 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
318 11:28:25.980275 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
319 11:28:25.983216 Recovery requested (1009000e)
320 11:28:25.986596 TPM: Extending digest for VBOOT: boot mode into PCR 0
321 11:28:25.998342 tlcl_extend: response is 0
322 11:28:26.004745 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
323 11:28:26.014957 tlcl_extend: response is 0
324 11:28:26.021586 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
325 11:28:26.028104 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
326 11:28:26.034620 BS: verstage times (exec / console): total (unknown) / 142 ms
327 11:28:26.035027
328 11:28:26.035347
329 11:28:26.048056 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
330 11:28:26.054532 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
331 11:28:26.058176 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
332 11:28:26.061032 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
333 11:28:26.068075 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
334 11:28:26.071742 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
335 11:28:26.074413 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
336 11:28:26.077845 TCO_STS: 0000 0000
337 11:28:26.081360 GEN_PMCON: d0015038 00002200
338 11:28:26.084243 GBLRST_CAUSE: 00000000 00000000
339 11:28:26.084677 HPR_CAUSE0: 00000000
340 11:28:26.087705 prev_sleep_state 5
341 11:28:26.091238 Boot Count incremented to 26205
342 11:28:26.097913 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
343 11:28:26.104250 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
344 11:28:26.110986 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
345 11:28:26.117985 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
346 11:28:26.122279 Chrome EC: UHEPI supported
347 11:28:26.128732 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
348 11:28:26.142027 Probing TPM: done!
349 11:28:26.148690 Connected to device vid:did:rid of 1ae0:0028:00
350 11:28:26.159409 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
351 11:28:26.166347 Initialized TPM device CR50 revision 0
352 11:28:26.176558 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
353 11:28:26.183020 MRC: Hash idx 0x100b comparison successful.
354 11:28:26.186648 MRC cache found, size faa8
355 11:28:26.187216 bootmode is set to: 2
356 11:28:26.189819 SPD index = 0
357 11:28:26.196469 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
358 11:28:26.200186 SPD: module type is LPDDR4X
359 11:28:26.203159 SPD: module part number is MT53E512M64D4NW-046
360 11:28:26.209697 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
361 11:28:26.213018 SPD: device width 16 bits, bus width 16 bits
362 11:28:26.219949 SPD: module size is 1024 MB (per channel)
363 11:28:26.651684 CBMEM:
364 11:28:26.654532 IMD: root @ 0x76fff000 254 entries.
365 11:28:26.658141 IMD: root @ 0x76ffec00 62 entries.
366 11:28:26.661509 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
367 11:28:26.668386 FMAP: area RW_VPD found @ f35000 (8192 bytes)
368 11:28:26.671334 External stage cache:
369 11:28:26.674717 IMD: root @ 0x7b3ff000 254 entries.
370 11:28:26.678073 IMD: root @ 0x7b3fec00 62 entries.
371 11:28:26.693775 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
372 11:28:26.700208 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
373 11:28:26.706749 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
374 11:28:26.720261 MRC: 'RECOVERY_MRC_CACHE' does not need update.
375 11:28:26.727601 cse_lite: Skip switching to RW in the recovery path
376 11:28:26.728037 8 DIMMs found
377 11:28:26.728431 SMM Memory Map
378 11:28:26.731184 SMRAM : 0x7b000000 0x800000
379 11:28:26.734818 Subregion 0: 0x7b000000 0x200000
380 11:28:26.738332 Subregion 1: 0x7b200000 0x200000
381 11:28:26.741103 Subregion 2: 0x7b400000 0x400000
382 11:28:26.744711 top_of_ram = 0x77000000
383 11:28:26.751516 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
384 11:28:26.754503 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
385 11:28:26.761533 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
386 11:28:26.764375 MTRR Range: Start=ff000000 End=0 (Size 1000000)
387 11:28:26.774584 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
388 11:28:26.781005 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
389 11:28:26.790682 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
390 11:28:26.794402 Processing 211 relocs. Offset value of 0x74c0b000
391 11:28:26.803261 BS: romstage times (exec / console): total (unknown) / 277 ms
392 11:28:26.809651
393 11:28:26.810042
394 11:28:26.819358 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
395 11:28:26.822399 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
396 11:28:26.832498 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
397 11:28:26.839389 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
398 11:28:26.845860 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
399 11:28:26.852593 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
400 11:28:26.899227 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
401 11:28:26.905706 Processing 5008 relocs. Offset value of 0x75d98000
402 11:28:26.909493 BS: postcar times (exec / console): total (unknown) / 59 ms
403 11:28:26.912676
404 11:28:26.913074
405 11:28:26.922450 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
406 11:28:26.922898 Normal boot
407 11:28:26.925693 FW_CONFIG value is 0x804c02
408 11:28:26.929135 PCI: 00:07.0 disabled by fw_config
409 11:28:26.932207 PCI: 00:07.1 disabled by fw_config
410 11:28:26.935869 PCI: 00:0d.2 disabled by fw_config
411 11:28:26.939554 PCI: 00:1c.7 disabled by fw_config
412 11:28:26.946202 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
413 11:28:26.952550 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 11:28:26.956107 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
415 11:28:26.958868 GENERIC: 0.0 disabled by fw_config
416 11:28:26.965939 GENERIC: 1.0 disabled by fw_config
417 11:28:26.969008 fw_config match found: DB_USB=USB3_ACTIVE
418 11:28:26.972529 fw_config match found: DB_USB=USB3_ACTIVE
419 11:28:26.975542 fw_config match found: DB_USB=USB3_ACTIVE
420 11:28:26.982476 fw_config match found: DB_USB=USB3_ACTIVE
421 11:28:26.985545 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
422 11:28:26.992027 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
423 11:28:27.002435 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
424 11:28:27.008630 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
425 11:28:27.012328 microcode: sig=0x806c1 pf=0x80 revision=0x86
426 11:28:27.018936 microcode: Update skipped, already up-to-date
427 11:28:27.025491 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
428 11:28:27.052800 Detected 4 core, 8 thread CPU.
429 11:28:27.056249 Setting up SMI for CPU
430 11:28:27.059344 IED base = 0x7b400000
431 11:28:27.059747 IED size = 0x00400000
432 11:28:27.063386 Will perform SMM setup.
433 11:28:27.069662 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
434 11:28:27.076507 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
435 11:28:27.083085 Processing 16 relocs. Offset value of 0x00030000
436 11:28:27.085772 Attempting to start 7 APs
437 11:28:27.089624 Waiting for 10ms after sending INIT.
438 11:28:27.105087 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
439 11:28:27.108276 AP: slot 2 apic_id 3.
440 11:28:27.111424 AP: slot 6 apic_id 2.
441 11:28:27.111829 AP: slot 3 apic_id 6.
442 11:28:27.115112 AP: slot 7 apic_id 7.
443 11:28:27.117934 AP: slot 4 apic_id 5.
444 11:28:27.118315 AP: slot 5 apic_id 4.
445 11:28:27.118672 done.
446 11:28:27.125051 Waiting for 2nd SIPI to complete...done.
447 11:28:27.131501 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
448 11:28:27.138143 Processing 13 relocs. Offset value of 0x00038000
449 11:28:27.141750 Unable to locate Global NVS
450 11:28:27.147942 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
451 11:28:27.151527 Installing permanent SMM handler to 0x7b000000
452 11:28:27.161703 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
453 11:28:27.165167 Processing 794 relocs. Offset value of 0x7b010000
454 11:28:27.174890 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
455 11:28:27.178408 Processing 13 relocs. Offset value of 0x7b008000
456 11:28:27.184796 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
457 11:28:27.191206 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
458 11:28:27.194383 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
459 11:28:27.201266 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
460 11:28:27.207639 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
461 11:28:27.214394 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
462 11:28:27.221218 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
463 11:28:27.221615 Unable to locate Global NVS
464 11:28:27.231076 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
465 11:28:27.234376 Clearing SMI status registers
466 11:28:27.234776 SMI_STS: PM1
467 11:28:27.237614 PM1_STS: PWRBTN
468 11:28:27.244240 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
469 11:28:27.247675 In relocation handler: CPU 0
470 11:28:27.250822 New SMBASE=0x7b000000 IEDBASE=0x7b400000
471 11:28:27.257241 Writing SMRR. base = 0x7b000006, mask=0xff800c00
472 11:28:27.257635 Relocation complete.
473 11:28:27.267247 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
474 11:28:27.270719 In relocation handler: CPU 1
475 11:28:27.274388 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
476 11:28:27.274788 Relocation complete.
477 11:28:27.284238 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
478 11:28:27.284679 In relocation handler: CPU 6
479 11:28:27.290802 New SMBASE=0x7affe800 IEDBASE=0x7b400000
480 11:28:27.293903 Writing SMRR. base = 0x7b000006, mask=0xff800c00
481 11:28:27.297407 Relocation complete.
482 11:28:27.303860 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
483 11:28:27.307288 In relocation handler: CPU 2
484 11:28:27.310468 New SMBASE=0x7afff800 IEDBASE=0x7b400000
485 11:28:27.313773 Relocation complete.
486 11:28:27.320307 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
487 11:28:27.323688 In relocation handler: CPU 3
488 11:28:27.327020 New SMBASE=0x7afff400 IEDBASE=0x7b400000
489 11:28:27.334065 Writing SMRR. base = 0x7b000006, mask=0xff800c00
490 11:28:27.334470 Relocation complete.
491 11:28:27.340404 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
492 11:28:27.343623 In relocation handler: CPU 7
493 11:28:27.350110 New SMBASE=0x7affe400 IEDBASE=0x7b400000
494 11:28:27.350552 Relocation complete.
495 11:28:27.357160 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
496 11:28:27.360161 In relocation handler: CPU 5
497 11:28:27.367164 New SMBASE=0x7affec00 IEDBASE=0x7b400000
498 11:28:27.370470 Writing SMRR. base = 0x7b000006, mask=0xff800c00
499 11:28:27.373758 Relocation complete.
500 11:28:27.380263 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
501 11:28:27.383399 In relocation handler: CPU 4
502 11:28:27.387110 New SMBASE=0x7afff000 IEDBASE=0x7b400000
503 11:28:27.389850 Relocation complete.
504 11:28:27.390390 Initializing CPU #0
505 11:28:27.393605 CPU: vendor Intel device 806c1
506 11:28:27.397184 CPU: family 06, model 8c, stepping 01
507 11:28:27.401383 Clearing out pending MCEs
508 11:28:27.404898 Setting up local APIC...
509 11:28:27.405294 apic_id: 0x00 done.
510 11:28:27.407843 Turbo is available but hidden
511 11:28:27.411361 Turbo is available and visible
512 11:28:27.417749 microcode: Update skipped, already up-to-date
513 11:28:27.418261 CPU #0 initialized
514 11:28:27.421432 Initializing CPU #6
515 11:28:27.421931 Initializing CPU #2
516 11:28:27.425178 CPU: vendor Intel device 806c1
517 11:28:27.431241 CPU: family 06, model 8c, stepping 01
518 11:28:27.434371 CPU: vendor Intel device 806c1
519 11:28:27.437748 CPU: family 06, model 8c, stepping 01
520 11:28:27.438241 Clearing out pending MCEs
521 11:28:27.441033 Clearing out pending MCEs
522 11:28:27.444200 Setting up local APIC...
523 11:28:27.447454 Initializing CPU #1
524 11:28:27.447864 Initializing CPU #7
525 11:28:27.451236 Initializing CPU #3
526 11:28:27.454548 CPU: vendor Intel device 806c1
527 11:28:27.457753 CPU: family 06, model 8c, stepping 01
528 11:28:27.461350 CPU: vendor Intel device 806c1
529 11:28:27.464262 CPU: family 06, model 8c, stepping 01
530 11:28:27.467824 Clearing out pending MCEs
531 11:28:27.470976 Clearing out pending MCEs
532 11:28:27.471470 Setting up local APIC...
533 11:28:27.474867 Initializing CPU #5
534 11:28:27.477214 Initializing CPU #4
535 11:28:27.480657 CPU: vendor Intel device 806c1
536 11:28:27.484242 CPU: family 06, model 8c, stepping 01
537 11:28:27.487723 CPU: vendor Intel device 806c1
538 11:28:27.491127 CPU: family 06, model 8c, stepping 01
539 11:28:27.494199 Clearing out pending MCEs
540 11:28:27.494730 Clearing out pending MCEs
541 11:28:27.497642 Setting up local APIC...
542 11:28:27.500617 Setting up local APIC...
543 11:28:27.504770 apic_id: 0x07 done.
544 11:28:27.505184 Setting up local APIC...
545 11:28:27.507671 CPU: vendor Intel device 806c1
546 11:28:27.510526 CPU: family 06, model 8c, stepping 01
547 11:28:27.514246 Clearing out pending MCEs
548 11:28:27.517207 Setting up local APIC...
549 11:28:27.520597 apic_id: 0x02 done.
550 11:28:27.521126 apic_id: 0x03 done.
551 11:28:27.527322 microcode: Update skipped, already up-to-date
552 11:28:27.530924 microcode: Update skipped, already up-to-date
553 11:28:27.534464 CPU #6 initialized
554 11:28:27.534993 CPU #2 initialized
555 11:28:27.537178 apic_id: 0x06 done.
556 11:28:27.540401 apic_id: 0x04 done.
557 11:28:27.540832 apic_id: 0x05 done.
558 11:28:27.547338 microcode: Update skipped, already up-to-date
559 11:28:27.550439 microcode: Update skipped, already up-to-date
560 11:28:27.553789 CPU #5 initialized
561 11:28:27.554207 CPU #4 initialized
562 11:28:27.557663 Setting up local APIC...
563 11:28:27.560253 microcode: Update skipped, already up-to-date
564 11:28:27.563720 apic_id: 0x01 done.
565 11:28:27.567638 microcode: Update skipped, already up-to-date
566 11:28:27.570326 CPU #3 initialized
567 11:28:27.570744 CPU #7 initialized
568 11:28:27.576993 microcode: Update skipped, already up-to-date
569 11:28:27.580369 CPU #1 initialized
570 11:28:27.583487 bsp_do_flight_plan done after 455 msecs.
571 11:28:27.586997 CPU: frequency set to 4000 MHz
572 11:28:27.587446 Enabling SMIs.
573 11:28:27.593935 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
574 11:28:27.609941 SATAXPCIE1 indicates PCIe NVMe is present
575 11:28:27.613908 Probing TPM: done!
576 11:28:27.616792 Connected to device vid:did:rid of 1ae0:0028:00
577 11:28:27.627502 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
578 11:28:27.630799 Initialized TPM device CR50 revision 0
579 11:28:27.633747 Enabling S0i3.4
580 11:28:27.640793 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
581 11:28:27.644374 Found a VBT of 8704 bytes after decompression
582 11:28:27.650654 cse_lite: CSE RO boot. HybridStorageMode disabled
583 11:28:27.657429 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
584 11:28:27.731969 FSPS returned 0
585 11:28:27.735430 Executing Phase 1 of FspMultiPhaseSiInit
586 11:28:27.745422 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
587 11:28:27.748844 port C0 DISC req: usage 1 usb3 1 usb2 5
588 11:28:27.751791 Raw Buffer output 0 00000511
589 11:28:27.755098 Raw Buffer output 1 00000000
590 11:28:27.758994 pmc_send_ipc_cmd succeeded
591 11:28:27.765660 port C1 DISC req: usage 1 usb3 2 usb2 3
592 11:28:27.766115 Raw Buffer output 0 00000321
593 11:28:27.769352 Raw Buffer output 1 00000000
594 11:28:27.773588 pmc_send_ipc_cmd succeeded
595 11:28:27.778786 Detected 4 core, 8 thread CPU.
596 11:28:27.781619 Detected 4 core, 8 thread CPU.
597 11:28:28.016030 Display FSP Version Info HOB
598 11:28:28.019364 Reference Code - CPU = a.0.4c.31
599 11:28:28.022667 uCode Version = 0.0.0.86
600 11:28:28.025574 TXT ACM version = ff.ff.ff.ffff
601 11:28:28.029120 Reference Code - ME = a.0.4c.31
602 11:28:28.032574 MEBx version = 0.0.0.0
603 11:28:28.035544 ME Firmware Version = Consumer SKU
604 11:28:28.039031 Reference Code - PCH = a.0.4c.31
605 11:28:28.042727 PCH-CRID Status = Disabled
606 11:28:28.045440 PCH-CRID Original Value = ff.ff.ff.ffff
607 11:28:28.049145 PCH-CRID New Value = ff.ff.ff.ffff
608 11:28:28.052009 OPROM - RST - RAID = ff.ff.ff.ffff
609 11:28:28.055645 PCH Hsio Version = 4.0.0.0
610 11:28:28.059146 Reference Code - SA - System Agent = a.0.4c.31
611 11:28:28.062074 Reference Code - MRC = 2.0.0.1
612 11:28:28.065555 SA - PCIe Version = a.0.4c.31
613 11:28:28.069075 SA-CRID Status = Disabled
614 11:28:28.072580 SA-CRID Original Value = 0.0.0.1
615 11:28:28.075527 SA-CRID New Value = 0.0.0.1
616 11:28:28.079100 OPROM - VBIOS = ff.ff.ff.ffff
617 11:28:28.082332 IO Manageability Engine FW Version = 11.1.4.0
618 11:28:28.085531 PHY Build Version = 0.0.0.e0
619 11:28:28.088961 Thunderbolt(TM) FW Version = 0.0.0.0
620 11:28:28.095129 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
621 11:28:28.098883 ITSS IRQ Polarities Before:
622 11:28:28.099460 IPC0: 0xffffffff
623 11:28:28.101969 IPC1: 0xffffffff
624 11:28:28.102403 IPC2: 0xffffffff
625 11:28:28.105198 IPC3: 0xffffffff
626 11:28:28.108748 ITSS IRQ Polarities After:
627 11:28:28.109207 IPC0: 0xffffffff
628 11:28:28.111816 IPC1: 0xffffffff
629 11:28:28.112252 IPC2: 0xffffffff
630 11:28:28.115253 IPC3: 0xffffffff
631 11:28:28.118400 Found PCIe Root Port #9 at PCI: 00:1d.0.
632 11:28:28.132185 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
633 11:28:28.142212 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
634 11:28:28.155096 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
635 11:28:28.161792 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
636 11:28:28.165245 Enumerating buses...
637 11:28:28.168198 Show all devs... Before device enumeration.
638 11:28:28.171868 Root Device: enabled 1
639 11:28:28.172350 DOMAIN: 0000: enabled 1
640 11:28:28.175135 CPU_CLUSTER: 0: enabled 1
641 11:28:28.178197 PCI: 00:00.0: enabled 1
642 11:28:28.181526 PCI: 00:02.0: enabled 1
643 11:28:28.181961 PCI: 00:04.0: enabled 1
644 11:28:28.184834 PCI: 00:05.0: enabled 1
645 11:28:28.188316 PCI: 00:06.0: enabled 0
646 11:28:28.191702 PCI: 00:07.0: enabled 0
647 11:28:28.192139 PCI: 00:07.1: enabled 0
648 11:28:28.195321 PCI: 00:07.2: enabled 0
649 11:28:28.198216 PCI: 00:07.3: enabled 0
650 11:28:28.198671 PCI: 00:08.0: enabled 1
651 11:28:28.201424 PCI: 00:09.0: enabled 0
652 11:28:28.205100 PCI: 00:0a.0: enabled 0
653 11:28:28.208262 PCI: 00:0d.0: enabled 1
654 11:28:28.208754 PCI: 00:0d.1: enabled 0
655 11:28:28.211577 PCI: 00:0d.2: enabled 0
656 11:28:28.214955 PCI: 00:0d.3: enabled 0
657 11:28:28.218039 PCI: 00:0e.0: enabled 0
658 11:28:28.218477 PCI: 00:10.2: enabled 1
659 11:28:28.221467 PCI: 00:10.6: enabled 0
660 11:28:28.224870 PCI: 00:10.7: enabled 0
661 11:28:28.228003 PCI: 00:12.0: enabled 0
662 11:28:28.228508 PCI: 00:12.6: enabled 0
663 11:28:28.231331 PCI: 00:13.0: enabled 0
664 11:28:28.234709 PCI: 00:14.0: enabled 1
665 11:28:28.237940 PCI: 00:14.1: enabled 0
666 11:28:28.238389 PCI: 00:14.2: enabled 1
667 11:28:28.241792 PCI: 00:14.3: enabled 1
668 11:28:28.244935 PCI: 00:15.0: enabled 1
669 11:28:28.245374 PCI: 00:15.1: enabled 1
670 11:28:28.248475 PCI: 00:15.2: enabled 1
671 11:28:28.251223 PCI: 00:15.3: enabled 1
672 11:28:28.254681 PCI: 00:16.0: enabled 1
673 11:28:28.255120 PCI: 00:16.1: enabled 0
674 11:28:28.257670 PCI: 00:16.2: enabled 0
675 11:28:28.261107 PCI: 00:16.3: enabled 0
676 11:28:28.264624 PCI: 00:16.4: enabled 0
677 11:28:28.265059 PCI: 00:16.5: enabled 0
678 11:28:28.268192 PCI: 00:17.0: enabled 1
679 11:28:28.271190 PCI: 00:19.0: enabled 0
680 11:28:28.274869 PCI: 00:19.1: enabled 1
681 11:28:28.275305 PCI: 00:19.2: enabled 0
682 11:28:28.277651 PCI: 00:1c.0: enabled 1
683 11:28:28.280904 PCI: 00:1c.1: enabled 0
684 11:28:28.284711 PCI: 00:1c.2: enabled 0
685 11:28:28.285144 PCI: 00:1c.3: enabled 0
686 11:28:28.288068 PCI: 00:1c.4: enabled 0
687 11:28:28.290886 PCI: 00:1c.5: enabled 0
688 11:28:28.291316 PCI: 00:1c.6: enabled 1
689 11:28:28.294170 PCI: 00:1c.7: enabled 0
690 11:28:28.297667 PCI: 00:1d.0: enabled 1
691 11:28:28.300928 PCI: 00:1d.1: enabled 0
692 11:28:28.301388 PCI: 00:1d.2: enabled 1
693 11:28:28.304470 PCI: 00:1d.3: enabled 0
694 11:28:28.307470 PCI: 00:1e.0: enabled 1
695 11:28:28.311248 PCI: 00:1e.1: enabled 0
696 11:28:28.311691 PCI: 00:1e.2: enabled 1
697 11:28:28.314520 PCI: 00:1e.3: enabled 1
698 11:28:28.317499 PCI: 00:1f.0: enabled 1
699 11:28:28.320541 PCI: 00:1f.1: enabled 0
700 11:28:28.321015 PCI: 00:1f.2: enabled 1
701 11:28:28.324204 PCI: 00:1f.3: enabled 1
702 11:28:28.327477 PCI: 00:1f.4: enabled 0
703 11:28:28.330605 PCI: 00:1f.5: enabled 1
704 11:28:28.331034 PCI: 00:1f.6: enabled 0
705 11:28:28.334341 PCI: 00:1f.7: enabled 0
706 11:28:28.337604 APIC: 00: enabled 1
707 11:28:28.338060 GENERIC: 0.0: enabled 1
708 11:28:28.340923 GENERIC: 0.0: enabled 1
709 11:28:28.344352 GENERIC: 1.0: enabled 1
710 11:28:28.347608 GENERIC: 0.0: enabled 1
711 11:28:28.348040 GENERIC: 1.0: enabled 1
712 11:28:28.350589 USB0 port 0: enabled 1
713 11:28:28.354051 GENERIC: 0.0: enabled 1
714 11:28:28.354482 USB0 port 0: enabled 1
715 11:28:28.357478 GENERIC: 0.0: enabled 1
716 11:28:28.360707 I2C: 00:1a: enabled 1
717 11:28:28.364416 I2C: 00:31: enabled 1
718 11:28:28.364845 I2C: 00:32: enabled 1
719 11:28:28.367177 I2C: 00:10: enabled 1
720 11:28:28.370742 I2C: 00:15: enabled 1
721 11:28:28.371169 GENERIC: 0.0: enabled 0
722 11:28:28.374528 GENERIC: 1.0: enabled 0
723 11:28:28.377423 GENERIC: 0.0: enabled 1
724 11:28:28.377850 SPI: 00: enabled 1
725 11:28:28.380857 SPI: 00: enabled 1
726 11:28:28.384114 PNP: 0c09.0: enabled 1
727 11:28:28.384667 GENERIC: 0.0: enabled 1
728 11:28:28.387544 USB3 port 0: enabled 1
729 11:28:28.390588 USB3 port 1: enabled 1
730 11:28:28.394093 USB3 port 2: enabled 0
731 11:28:28.394671 USB3 port 3: enabled 0
732 11:28:28.397053 USB2 port 0: enabled 0
733 11:28:28.400560 USB2 port 1: enabled 1
734 11:28:28.400999 USB2 port 2: enabled 1
735 11:28:28.403848 USB2 port 3: enabled 0
736 11:28:28.407171 USB2 port 4: enabled 1
737 11:28:28.407609 USB2 port 5: enabled 0
738 11:28:28.410529 USB2 port 6: enabled 0
739 11:28:28.413619 USB2 port 7: enabled 0
740 11:28:28.417014 USB2 port 8: enabled 0
741 11:28:28.417453 USB2 port 9: enabled 0
742 11:28:28.420390 USB3 port 0: enabled 0
743 11:28:28.423646 USB3 port 1: enabled 1
744 11:28:28.424077 USB3 port 2: enabled 0
745 11:28:28.427285 USB3 port 3: enabled 0
746 11:28:28.430477 GENERIC: 0.0: enabled 1
747 11:28:28.433782 GENERIC: 1.0: enabled 1
748 11:28:28.434212 APIC: 01: enabled 1
749 11:28:28.437082 APIC: 03: enabled 1
750 11:28:28.437513 APIC: 06: enabled 1
751 11:28:28.440215 APIC: 05: enabled 1
752 11:28:28.443916 APIC: 04: enabled 1
753 11:28:28.444381 APIC: 02: enabled 1
754 11:28:28.447214 APIC: 07: enabled 1
755 11:28:28.450397 Compare with tree...
756 11:28:28.450831 Root Device: enabled 1
757 11:28:28.453876 DOMAIN: 0000: enabled 1
758 11:28:28.456738 PCI: 00:00.0: enabled 1
759 11:28:28.460641 PCI: 00:02.0: enabled 1
760 11:28:28.461071 PCI: 00:04.0: enabled 1
761 11:28:28.463720 GENERIC: 0.0: enabled 1
762 11:28:28.466716 PCI: 00:05.0: enabled 1
763 11:28:28.470116 PCI: 00:06.0: enabled 0
764 11:28:28.473379 PCI: 00:07.0: enabled 0
765 11:28:28.473473 GENERIC: 0.0: enabled 1
766 11:28:28.476211 PCI: 00:07.1: enabled 0
767 11:28:28.479795 GENERIC: 1.0: enabled 1
768 11:28:28.483213 PCI: 00:07.2: enabled 0
769 11:28:28.486483 GENERIC: 0.0: enabled 1
770 11:28:28.486607 PCI: 00:07.3: enabled 0
771 11:28:28.490036 GENERIC: 1.0: enabled 1
772 11:28:28.493004 PCI: 00:08.0: enabled 1
773 11:28:28.496571 PCI: 00:09.0: enabled 0
774 11:28:28.499458 PCI: 00:0a.0: enabled 0
775 11:28:28.502756 PCI: 00:0d.0: enabled 1
776 11:28:28.502851 USB0 port 0: enabled 1
777 11:28:28.506048 USB3 port 0: enabled 1
778 11:28:28.509619 USB3 port 1: enabled 1
779 11:28:28.513047 USB3 port 2: enabled 0
780 11:28:28.516036 USB3 port 3: enabled 0
781 11:28:28.516130 PCI: 00:0d.1: enabled 0
782 11:28:28.519636 PCI: 00:0d.2: enabled 0
783 11:28:28.522540 GENERIC: 0.0: enabled 1
784 11:28:28.525928 PCI: 00:0d.3: enabled 0
785 11:28:28.529397 PCI: 00:0e.0: enabled 0
786 11:28:28.529492 PCI: 00:10.2: enabled 1
787 11:28:28.532989 PCI: 00:10.6: enabled 0
788 11:28:28.535905 PCI: 00:10.7: enabled 0
789 11:28:28.539238 PCI: 00:12.0: enabled 0
790 11:28:28.542577 PCI: 00:12.6: enabled 0
791 11:28:28.542671 PCI: 00:13.0: enabled 0
792 11:28:28.545978 PCI: 00:14.0: enabled 1
793 11:28:28.549399 USB0 port 0: enabled 1
794 11:28:28.552735 USB2 port 0: enabled 0
795 11:28:28.556016 USB2 port 1: enabled 1
796 11:28:28.556112 USB2 port 2: enabled 1
797 11:28:28.559268 USB2 port 3: enabled 0
798 11:28:28.562609 USB2 port 4: enabled 1
799 11:28:28.565923 USB2 port 5: enabled 0
800 11:28:28.569408 USB2 port 6: enabled 0
801 11:28:28.572359 USB2 port 7: enabled 0
802 11:28:28.572443 USB2 port 8: enabled 0
803 11:28:28.575932 USB2 port 9: enabled 0
804 11:28:28.579337 USB3 port 0: enabled 0
805 11:28:28.582790 USB3 port 1: enabled 1
806 11:28:28.585932 USB3 port 2: enabled 0
807 11:28:28.586014 USB3 port 3: enabled 0
808 11:28:28.589587 PCI: 00:14.1: enabled 0
809 11:28:28.592318 PCI: 00:14.2: enabled 1
810 11:28:28.596162 PCI: 00:14.3: enabled 1
811 11:28:28.599602 GENERIC: 0.0: enabled 1
812 11:28:28.599687 PCI: 00:15.0: enabled 1
813 11:28:28.602487 I2C: 00:1a: enabled 1
814 11:28:28.606003 I2C: 00:31: enabled 1
815 11:28:28.609135 I2C: 00:32: enabled 1
816 11:28:28.612698 PCI: 00:15.1: enabled 1
817 11:28:28.612780 I2C: 00:10: enabled 1
818 11:28:28.615686 PCI: 00:15.2: enabled 1
819 11:28:28.619051 PCI: 00:15.3: enabled 1
820 11:28:28.622607 PCI: 00:16.0: enabled 1
821 11:28:28.625459 PCI: 00:16.1: enabled 0
822 11:28:28.625544 PCI: 00:16.2: enabled 0
823 11:28:28.629028 PCI: 00:16.3: enabled 0
824 11:28:28.632357 PCI: 00:16.4: enabled 0
825 11:28:28.635341 PCI: 00:16.5: enabled 0
826 11:28:28.639417 PCI: 00:17.0: enabled 1
827 11:28:28.639503 PCI: 00:19.0: enabled 0
828 11:28:28.643043 PCI: 00:19.1: enabled 1
829 11:28:28.646486 I2C: 00:15: enabled 1
830 11:28:28.646575 PCI: 00:19.2: enabled 0
831 11:28:28.650070 PCI: 00:1d.0: enabled 1
832 11:28:28.653475 GENERIC: 0.0: enabled 1
833 11:28:28.656840 PCI: 00:1e.0: enabled 1
834 11:28:28.660186 PCI: 00:1e.1: enabled 0
835 11:28:28.660307 PCI: 00:1e.2: enabled 1
836 11:28:28.663369 SPI: 00: enabled 1
837 11:28:28.667059 PCI: 00:1e.3: enabled 1
838 11:28:28.667145 SPI: 00: enabled 1
839 11:28:28.716433 PCI: 00:1f.0: enabled 1
840 11:28:28.716571 PNP: 0c09.0: enabled 1
841 11:28:28.716871 PCI: 00:1f.1: enabled 0
842 11:28:28.716950 PCI: 00:1f.2: enabled 1
843 11:28:28.717033 GENERIC: 0.0: enabled 1
844 11:28:28.717105 GENERIC: 0.0: enabled 1
845 11:28:28.717572 GENERIC: 1.0: enabled 1
846 11:28:28.717669 PCI: 00:1f.3: enabled 1
847 11:28:28.717745 PCI: 00:1f.4: enabled 0
848 11:28:28.717998 PCI: 00:1f.5: enabled 1
849 11:28:28.718073 PCI: 00:1f.6: enabled 0
850 11:28:28.718173 PCI: 00:1f.7: enabled 0
851 11:28:28.718243 CPU_CLUSTER: 0: enabled 1
852 11:28:28.718309 APIC: 00: enabled 1
853 11:28:28.718386 APIC: 01: enabled 1
854 11:28:28.718453 APIC: 03: enabled 1
855 11:28:28.718516 APIC: 06: enabled 1
856 11:28:28.718580 APIC: 05: enabled 1
857 11:28:28.718663 APIC: 04: enabled 1
858 11:28:28.768438 APIC: 02: enabled 1
859 11:28:28.768552 APIC: 07: enabled 1
860 11:28:28.768630 Root Device scanning...
861 11:28:28.769066 scan_static_bus for Root Device
862 11:28:28.769162 DOMAIN: 0000 enabled
863 11:28:28.769422 CPU_CLUSTER: 0 enabled
864 11:28:28.769501 DOMAIN: 0000 scanning...
865 11:28:28.769572 PCI: pci_scan_bus for bus 00
866 11:28:28.769640 PCI: 00:00.0 [8086/0000] ops
867 11:28:28.769707 PCI: 00:00.0 [8086/9a12] enabled
868 11:28:28.769785 PCI: 00:02.0 [8086/0000] bus ops
869 11:28:28.769862 PCI: 00:02.0 [8086/9a40] enabled
870 11:28:28.769937 PCI: 00:04.0 [8086/0000] bus ops
871 11:28:28.770015 PCI: 00:04.0 [8086/9a03] enabled
872 11:28:28.770082 PCI: 00:05.0 [8086/9a19] enabled
873 11:28:28.770162 PCI: 00:07.0 [0000/0000] hidden
874 11:28:28.770229 PCI: 00:08.0 [8086/9a11] enabled
875 11:28:28.780932 PCI: 00:0a.0 [8086/9a0d] disabled
876 11:28:28.781028 PCI: 00:0d.0 [8086/0000] bus ops
877 11:28:28.784294 PCI: 00:0d.0 [8086/9a13] enabled
878 11:28:28.784390 PCI: 00:14.0 [8086/0000] bus ops
879 11:28:28.787288 PCI: 00:14.0 [8086/a0ed] enabled
880 11:28:28.787388 PCI: 00:14.2 [8086/a0ef] enabled
881 11:28:28.790912 PCI: 00:14.3 [8086/0000] bus ops
882 11:28:28.793856 PCI: 00:14.3 [8086/a0f0] enabled
883 11:28:28.797349 PCI: 00:15.0 [8086/0000] bus ops
884 11:28:28.800809 PCI: 00:15.0 [8086/a0e8] enabled
885 11:28:28.804333 PCI: 00:15.1 [8086/0000] bus ops
886 11:28:28.807372 PCI: 00:15.1 [8086/a0e9] enabled
887 11:28:28.810897 PCI: 00:15.2 [8086/0000] bus ops
888 11:28:28.814150 PCI: 00:15.2 [8086/a0ea] enabled
889 11:28:28.817154 PCI: 00:15.3 [8086/0000] bus ops
890 11:28:28.820588 PCI: 00:15.3 [8086/a0eb] enabled
891 11:28:28.824052 PCI: 00:16.0 [8086/0000] ops
892 11:28:28.827042 PCI: 00:16.0 [8086/a0e0] enabled
893 11:28:28.834089 PCI: Static device PCI: 00:17.0 not found, disabling it.
894 11:28:28.837074 PCI: 00:19.0 [8086/0000] bus ops
895 11:28:28.840439 PCI: 00:19.0 [8086/a0c5] disabled
896 11:28:28.843818 PCI: 00:19.1 [8086/0000] bus ops
897 11:28:28.846857 PCI: 00:19.1 [8086/a0c6] enabled
898 11:28:28.850226 PCI: 00:1d.0 [8086/0000] bus ops
899 11:28:28.853843 PCI: 00:1d.0 [8086/a0b0] enabled
900 11:28:28.857258 PCI: 00:1e.0 [8086/0000] ops
901 11:28:28.860587 PCI: 00:1e.0 [8086/a0a8] enabled
902 11:28:28.863540 PCI: 00:1e.2 [8086/0000] bus ops
903 11:28:28.866869 PCI: 00:1e.2 [8086/a0aa] enabled
904 11:28:28.870106 PCI: 00:1e.3 [8086/0000] bus ops
905 11:28:28.873639 PCI: 00:1e.3 [8086/a0ab] enabled
906 11:28:28.876755 PCI: 00:1f.0 [8086/0000] bus ops
907 11:28:28.880039 PCI: 00:1f.0 [8086/a087] enabled
908 11:28:28.880119 RTC Init
909 11:28:28.883844 Set power on after power failure.
910 11:28:28.887018 Disabling Deep S3
911 11:28:28.890010 Disabling Deep S3
912 11:28:28.890095 Disabling Deep S4
913 11:28:28.893446 Disabling Deep S4
914 11:28:28.893532 Disabling Deep S5
915 11:28:28.896950 Disabling Deep S5
916 11:28:28.900693 PCI: 00:1f.2 [0000/0000] hidden
917 11:28:28.903535 PCI: 00:1f.3 [8086/0000] bus ops
918 11:28:28.906962 PCI: 00:1f.3 [8086/a0c8] enabled
919 11:28:28.910611 PCI: 00:1f.5 [8086/0000] bus ops
920 11:28:28.913435 PCI: 00:1f.5 [8086/a0a4] enabled
921 11:28:28.917266 PCI: Leftover static devices:
922 11:28:28.917632 PCI: 00:10.2
923 11:28:28.918008 PCI: 00:10.6
924 11:28:28.920565 PCI: 00:10.7
925 11:28:28.920987 PCI: 00:06.0
926 11:28:28.924280 PCI: 00:07.1
927 11:28:28.924787 PCI: 00:07.2
928 11:28:28.926803 PCI: 00:07.3
929 11:28:28.927295 PCI: 00:09.0
930 11:28:28.927715 PCI: 00:0d.1
931 11:28:28.930373 PCI: 00:0d.2
932 11:28:28.930888 PCI: 00:0d.3
933 11:28:28.933934 PCI: 00:0e.0
934 11:28:28.934405 PCI: 00:12.0
935 11:28:28.934826 PCI: 00:12.6
936 11:28:28.936997 PCI: 00:13.0
937 11:28:28.937496 PCI: 00:14.1
938 11:28:28.940453 PCI: 00:16.1
939 11:28:28.940944 PCI: 00:16.2
940 11:28:28.941321 PCI: 00:16.3
941 11:28:28.943708 PCI: 00:16.4
942 11:28:28.944128 PCI: 00:16.5
943 11:28:28.947330 PCI: 00:17.0
944 11:28:28.947746 PCI: 00:19.2
945 11:28:28.950756 PCI: 00:1e.1
946 11:28:28.951175 PCI: 00:1f.1
947 11:28:28.951510 PCI: 00:1f.4
948 11:28:28.953600 PCI: 00:1f.6
949 11:28:28.954018 PCI: 00:1f.7
950 11:28:28.957067 PCI: Check your devicetree.cb.
951 11:28:28.960139 PCI: 00:02.0 scanning...
952 11:28:28.963482 scan_generic_bus for PCI: 00:02.0
953 11:28:28.966853 scan_generic_bus for PCI: 00:02.0 done
954 11:28:28.973579 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
955 11:28:28.974000 PCI: 00:04.0 scanning...
956 11:28:28.976969 scan_generic_bus for PCI: 00:04.0
957 11:28:28.980379 GENERIC: 0.0 enabled
958 11:28:28.986563 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
959 11:28:28.990099 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
960 11:28:28.993426 PCI: 00:0d.0 scanning...
961 11:28:28.996908 scan_static_bus for PCI: 00:0d.0
962 11:28:29.000148 USB0 port 0 enabled
963 11:28:29.003322 USB0 port 0 scanning...
964 11:28:29.006997 scan_static_bus for USB0 port 0
965 11:28:29.007442 USB3 port 0 enabled
966 11:28:29.010312 USB3 port 1 enabled
967 11:28:29.013876 USB3 port 2 disabled
968 11:28:29.014479 USB3 port 3 disabled
969 11:28:29.016476 USB3 port 0 scanning...
970 11:28:29.020065 scan_static_bus for USB3 port 0
971 11:28:29.023185 scan_static_bus for USB3 port 0 done
972 11:28:29.026513 scan_bus: bus USB3 port 0 finished in 6 msecs
973 11:28:29.030121 USB3 port 1 scanning...
974 11:28:29.033453 scan_static_bus for USB3 port 1
975 11:28:29.036473 scan_static_bus for USB3 port 1 done
976 11:28:29.043471 scan_bus: bus USB3 port 1 finished in 6 msecs
977 11:28:29.046791 scan_static_bus for USB0 port 0 done
978 11:28:29.049416 scan_bus: bus USB0 port 0 finished in 43 msecs
979 11:28:29.053016 scan_static_bus for PCI: 00:0d.0 done
980 11:28:29.059507 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
981 11:28:29.062886 PCI: 00:14.0 scanning...
982 11:28:29.066389 scan_static_bus for PCI: 00:14.0
983 11:28:29.066805 USB0 port 0 enabled
984 11:28:29.069283 USB0 port 0 scanning...
985 11:28:29.072811 scan_static_bus for USB0 port 0
986 11:28:29.076226 USB2 port 0 disabled
987 11:28:29.076749 USB2 port 1 enabled
988 11:28:29.079518 USB2 port 2 enabled
989 11:28:29.082801 USB2 port 3 disabled
990 11:28:29.083255 USB2 port 4 enabled
991 11:28:29.086109 USB2 port 5 disabled
992 11:28:29.089306 USB2 port 6 disabled
993 11:28:29.089707 USB2 port 7 disabled
994 11:28:29.092627 USB2 port 8 disabled
995 11:28:29.096019 USB2 port 9 disabled
996 11:28:29.096484 USB3 port 0 disabled
997 11:28:29.099986 USB3 port 1 enabled
998 11:28:29.100617 USB3 port 2 disabled
999 11:28:29.102482 USB3 port 3 disabled
1000 11:28:29.106191 USB2 port 1 scanning...
1001 11:28:29.109748 scan_static_bus for USB2 port 1
1002 11:28:29.112573 scan_static_bus for USB2 port 1 done
1003 11:28:29.115920 scan_bus: bus USB2 port 1 finished in 6 msecs
1004 11:28:29.119108 USB2 port 2 scanning...
1005 11:28:29.122635 scan_static_bus for USB2 port 2
1006 11:28:29.125743 scan_static_bus for USB2 port 2 done
1007 11:28:29.132585 scan_bus: bus USB2 port 2 finished in 6 msecs
1008 11:28:29.133072 USB2 port 4 scanning...
1009 11:28:29.136210 scan_static_bus for USB2 port 4
1010 11:28:29.142423 scan_static_bus for USB2 port 4 done
1011 11:28:29.146051 scan_bus: bus USB2 port 4 finished in 6 msecs
1012 11:28:29.148968 USB3 port 1 scanning...
1013 11:28:29.152332 scan_static_bus for USB3 port 1
1014 11:28:29.155575 scan_static_bus for USB3 port 1 done
1015 11:28:29.159338 scan_bus: bus USB3 port 1 finished in 6 msecs
1016 11:28:29.162328 scan_static_bus for USB0 port 0 done
1017 11:28:29.168771 scan_bus: bus USB0 port 0 finished in 93 msecs
1018 11:28:29.172849 scan_static_bus for PCI: 00:14.0 done
1019 11:28:29.175803 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1020 11:28:29.179013 PCI: 00:14.3 scanning...
1021 11:28:29.182193 scan_static_bus for PCI: 00:14.3
1022 11:28:29.185544 GENERIC: 0.0 enabled
1023 11:28:29.188816 scan_static_bus for PCI: 00:14.3 done
1024 11:28:29.192589 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1025 11:28:29.195669 PCI: 00:15.0 scanning...
1026 11:28:29.199001 scan_static_bus for PCI: 00:15.0
1027 11:28:29.202324 I2C: 00:1a enabled
1028 11:28:29.205451 I2C: 00:31 enabled
1029 11:28:29.205883 I2C: 00:32 enabled
1030 11:28:29.208871 scan_static_bus for PCI: 00:15.0 done
1031 11:28:29.215263 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1032 11:28:29.215823 PCI: 00:15.1 scanning...
1033 11:28:29.219337 scan_static_bus for PCI: 00:15.1
1034 11:28:29.222495 I2C: 00:10 enabled
1035 11:28:29.226191 scan_static_bus for PCI: 00:15.1 done
1036 11:28:29.229639 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1037 11:28:29.232773 PCI: 00:15.2 scanning...
1038 11:28:29.236023 scan_static_bus for PCI: 00:15.2
1039 11:28:29.239401 scan_static_bus for PCI: 00:15.2 done
1040 11:28:29.246103 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1041 11:28:29.249246 PCI: 00:15.3 scanning...
1042 11:28:29.252697 scan_static_bus for PCI: 00:15.3
1043 11:28:29.255637 scan_static_bus for PCI: 00:15.3 done
1044 11:28:29.259031 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1045 11:28:29.262457 PCI: 00:19.1 scanning...
1046 11:28:29.265987 scan_static_bus for PCI: 00:19.1
1047 11:28:29.268924 I2C: 00:15 enabled
1048 11:28:29.272453 scan_static_bus for PCI: 00:19.1 done
1049 11:28:29.275667 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1050 11:28:29.278865 PCI: 00:1d.0 scanning...
1051 11:28:29.282010 do_pci_scan_bridge for PCI: 00:1d.0
1052 11:28:29.285360 PCI: pci_scan_bus for bus 01
1053 11:28:29.289111 PCI: 01:00.0 [1c5c/174a] enabled
1054 11:28:29.291934 GENERIC: 0.0 enabled
1055 11:28:29.295222 Enabling Common Clock Configuration
1056 11:28:29.298726 L1 Sub-State supported from root port 29
1057 11:28:29.302195 L1 Sub-State Support = 0xf
1058 11:28:29.305306 CommonModeRestoreTime = 0x28
1059 11:28:29.309020 Power On Value = 0x16, Power On Scale = 0x0
1060 11:28:29.311778 ASPM: Enabled L1
1061 11:28:29.315189 PCIe: Max_Payload_Size adjusted to 128
1062 11:28:29.318622 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1063 11:28:29.322064 PCI: 00:1e.2 scanning...
1064 11:28:29.325358 scan_generic_bus for PCI: 00:1e.2
1065 11:28:29.328591 SPI: 00 enabled
1066 11:28:29.334875 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1067 11:28:29.338555 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1068 11:28:29.341708 PCI: 00:1e.3 scanning...
1069 11:28:29.345501 scan_generic_bus for PCI: 00:1e.3
1070 11:28:29.345922 SPI: 00 enabled
1071 11:28:29.351505 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1072 11:28:29.358202 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1073 11:28:29.361431 PCI: 00:1f.0 scanning...
1074 11:28:29.364844 scan_static_bus for PCI: 00:1f.0
1075 11:28:29.365311 PNP: 0c09.0 enabled
1076 11:28:29.368432 PNP: 0c09.0 scanning...
1077 11:28:29.371402 scan_static_bus for PNP: 0c09.0
1078 11:28:29.374807 scan_static_bus for PNP: 0c09.0 done
1079 11:28:29.381734 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1080 11:28:29.384767 scan_static_bus for PCI: 00:1f.0 done
1081 11:28:29.387856 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1082 11:28:29.391722 PCI: 00:1f.2 scanning...
1083 11:28:29.394650 scan_static_bus for PCI: 00:1f.2
1084 11:28:29.398236 GENERIC: 0.0 enabled
1085 11:28:29.398681 GENERIC: 0.0 scanning...
1086 11:28:29.401340 scan_static_bus for GENERIC: 0.0
1087 11:28:29.404412 GENERIC: 0.0 enabled
1088 11:28:29.407918 GENERIC: 1.0 enabled
1089 11:28:29.411151 scan_static_bus for GENERIC: 0.0 done
1090 11:28:29.414506 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1091 11:28:29.420874 scan_static_bus for PCI: 00:1f.2 done
1092 11:28:29.424470 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1093 11:28:29.427950 PCI: 00:1f.3 scanning...
1094 11:28:29.431127 scan_static_bus for PCI: 00:1f.3
1095 11:28:29.434003 scan_static_bus for PCI: 00:1f.3 done
1096 11:28:29.437711 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1097 11:28:29.441322 PCI: 00:1f.5 scanning...
1098 11:28:29.444062 scan_generic_bus for PCI: 00:1f.5
1099 11:28:29.447355 scan_generic_bus for PCI: 00:1f.5 done
1100 11:28:29.454358 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1101 11:28:29.457264 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1102 11:28:29.460513 scan_static_bus for Root Device done
1103 11:28:29.467548 scan_bus: bus Root Device finished in 736 msecs
1104 11:28:29.467975 done
1105 11:28:29.473915 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1106 11:28:29.477446 Chrome EC: UHEPI supported
1107 11:28:29.483812 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1108 11:28:29.490233 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1109 11:28:29.493697 SPI flash protection: WPSW=0 SRP0=0
1110 11:28:29.497053 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1111 11:28:29.503871 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1112 11:28:29.507166 found VGA at PCI: 00:02.0
1113 11:28:29.510519 Setting up VGA for PCI: 00:02.0
1114 11:28:29.513919 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1115 11:28:29.520436 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1116 11:28:29.523672 Allocating resources...
1117 11:28:29.524097 Reading resources...
1118 11:28:29.526796 Root Device read_resources bus 0 link: 0
1119 11:28:29.533704 DOMAIN: 0000 read_resources bus 0 link: 0
1120 11:28:29.537055 PCI: 00:04.0 read_resources bus 1 link: 0
1121 11:28:29.543502 PCI: 00:04.0 read_resources bus 1 link: 0 done
1122 11:28:29.547152 PCI: 00:0d.0 read_resources bus 0 link: 0
1123 11:28:29.553417 USB0 port 0 read_resources bus 0 link: 0
1124 11:28:29.556955 USB0 port 0 read_resources bus 0 link: 0 done
1125 11:28:29.563356 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1126 11:28:29.566652 PCI: 00:14.0 read_resources bus 0 link: 0
1127 11:28:29.569943 USB0 port 0 read_resources bus 0 link: 0
1128 11:28:29.577693 USB0 port 0 read_resources bus 0 link: 0 done
1129 11:28:29.581102 PCI: 00:14.0 read_resources bus 0 link: 0 done
1130 11:28:29.587594 PCI: 00:14.3 read_resources bus 0 link: 0
1131 11:28:29.591147 PCI: 00:14.3 read_resources bus 0 link: 0 done
1132 11:28:29.597545 PCI: 00:15.0 read_resources bus 0 link: 0
1133 11:28:29.601157 PCI: 00:15.0 read_resources bus 0 link: 0 done
1134 11:28:29.607825 PCI: 00:15.1 read_resources bus 0 link: 0
1135 11:28:29.611008 PCI: 00:15.1 read_resources bus 0 link: 0 done
1136 11:28:29.618271 PCI: 00:19.1 read_resources bus 0 link: 0
1137 11:28:29.621485 PCI: 00:19.1 read_resources bus 0 link: 0 done
1138 11:28:29.628229 PCI: 00:1d.0 read_resources bus 1 link: 0
1139 11:28:29.631089 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1140 11:28:29.638469 PCI: 00:1e.2 read_resources bus 2 link: 0
1141 11:28:29.641574 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1142 11:28:29.648380 PCI: 00:1e.3 read_resources bus 3 link: 0
1143 11:28:29.651788 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1144 11:28:29.658476 PCI: 00:1f.0 read_resources bus 0 link: 0
1145 11:28:29.661854 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1146 11:28:29.664921 PCI: 00:1f.2 read_resources bus 0 link: 0
1147 11:28:29.672057 GENERIC: 0.0 read_resources bus 0 link: 0
1148 11:28:29.674858 GENERIC: 0.0 read_resources bus 0 link: 0 done
1149 11:28:29.681657 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1150 11:28:29.688333 DOMAIN: 0000 read_resources bus 0 link: 0 done
1151 11:28:29.691366 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1152 11:28:29.697722 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1153 11:28:29.701396 Root Device read_resources bus 0 link: 0 done
1154 11:28:29.704667 Done reading resources.
1155 11:28:29.707845 Show resources in subtree (Root Device)...After reading.
1156 11:28:29.714590 Root Device child on link 0 DOMAIN: 0000
1157 11:28:29.717974 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1158 11:28:29.727698 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1159 11:28:29.737475 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1160 11:28:29.737902 PCI: 00:00.0
1161 11:28:29.747951 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1162 11:28:29.757419 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1163 11:28:29.767602 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1164 11:28:29.777624 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1165 11:28:29.787300 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1166 11:28:29.794302 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1167 11:28:29.804213 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1168 11:28:29.814091 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1169 11:28:29.824273 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1170 11:28:29.833810 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1171 11:28:29.843861 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1172 11:28:29.850382 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1173 11:28:29.860321 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1174 11:28:29.870127 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1175 11:28:29.880027 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1176 11:28:29.890265 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1177 11:28:29.899790 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1178 11:28:29.906669 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1179 11:28:29.916737 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1180 11:28:29.926226 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1181 11:28:29.929642 PCI: 00:02.0
1182 11:28:29.939776 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1183 11:28:29.950020 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1184 11:28:29.956253 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1185 11:28:29.963033 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1186 11:28:29.972971 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1187 11:28:29.973396 GENERIC: 0.0
1188 11:28:29.976376 PCI: 00:05.0
1189 11:28:29.986115 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1190 11:28:29.989565 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1191 11:28:29.993111 GENERIC: 0.0
1192 11:28:29.993600 PCI: 00:08.0
1193 11:28:30.003032 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 11:28:30.006153 PCI: 00:0a.0
1195 11:28:30.009529 PCI: 00:0d.0 child on link 0 USB0 port 0
1196 11:28:30.019546 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1197 11:28:30.026239 USB0 port 0 child on link 0 USB3 port 0
1198 11:28:30.026670 USB3 port 0
1199 11:28:30.029646 USB3 port 1
1200 11:28:30.030076 USB3 port 2
1201 11:28:30.032689 USB3 port 3
1202 11:28:30.035935 PCI: 00:14.0 child on link 0 USB0 port 0
1203 11:28:30.046137 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1204 11:28:30.049413 USB0 port 0 child on link 0 USB2 port 0
1205 11:28:30.052626 USB2 port 0
1206 11:28:30.053053 USB2 port 1
1207 11:28:30.055877 USB2 port 2
1208 11:28:30.056343 USB2 port 3
1209 11:28:30.059219 USB2 port 4
1210 11:28:30.062473 USB2 port 5
1211 11:28:30.062901 USB2 port 6
1212 11:28:30.066153 USB2 port 7
1213 11:28:30.066689 USB2 port 8
1214 11:28:30.069109 USB2 port 9
1215 11:28:30.069536 USB3 port 0
1216 11:28:30.072480 USB3 port 1
1217 11:28:30.072910 USB3 port 2
1218 11:28:30.075908 USB3 port 3
1219 11:28:30.076499 PCI: 00:14.2
1220 11:28:30.085623 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1221 11:28:30.095457 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1222 11:28:30.102079 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1223 11:28:30.111988 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1224 11:28:30.112475 GENERIC: 0.0
1225 11:28:30.119083 PCI: 00:15.0 child on link 0 I2C: 00:1a
1226 11:28:30.129019 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1227 11:28:30.129453 I2C: 00:1a
1228 11:28:30.129794 I2C: 00:31
1229 11:28:30.131799 I2C: 00:32
1230 11:28:30.135238 PCI: 00:15.1 child on link 0 I2C: 00:10
1231 11:28:30.145719 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1232 11:28:30.148624 I2C: 00:10
1233 11:28:30.149156 PCI: 00:15.2
1234 11:28:30.158355 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1235 11:28:30.162104 PCI: 00:15.3
1236 11:28:30.171850 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1237 11:28:30.172320 PCI: 00:16.0
1238 11:28:30.181739 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1239 11:28:30.185089 PCI: 00:19.0
1240 11:28:30.188500 PCI: 00:19.1 child on link 0 I2C: 00:15
1241 11:28:30.198265 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1242 11:28:30.198870 I2C: 00:15
1243 11:28:30.205281 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1244 11:28:30.211798 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1245 11:28:30.221744 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1246 11:28:30.231553 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1247 11:28:30.235305 GENERIC: 0.0
1248 11:28:30.235775 PCI: 01:00.0
1249 11:28:30.244825 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1250 11:28:30.254542 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1251 11:28:30.264650 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1252 11:28:30.265154 PCI: 00:1e.0
1253 11:28:30.277762 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1254 11:28:30.281133 PCI: 00:1e.2 child on link 0 SPI: 00
1255 11:28:30.291137 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1256 11:28:30.291663 SPI: 00
1257 11:28:30.294297 PCI: 00:1e.3 child on link 0 SPI: 00
1258 11:28:30.304674 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1259 11:28:30.307747 SPI: 00
1260 11:28:30.311247 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1261 11:28:30.321332 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1262 11:28:30.321766 PNP: 0c09.0
1263 11:28:30.331191 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1264 11:28:30.334960 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1265 11:28:30.344057 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1266 11:28:30.354282 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1267 11:28:30.357995 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1268 11:28:30.360883 GENERIC: 0.0
1269 11:28:30.361310 GENERIC: 1.0
1270 11:28:30.364321 PCI: 00:1f.3
1271 11:28:30.374356 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1272 11:28:30.384047 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1273 11:28:30.387502 PCI: 00:1f.5
1274 11:28:30.394166 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1275 11:28:30.400438 CPU_CLUSTER: 0 child on link 0 APIC: 00
1276 11:28:30.400868 APIC: 00
1277 11:28:30.401206 APIC: 01
1278 11:28:30.404171 APIC: 03
1279 11:28:30.404656 APIC: 06
1280 11:28:30.404999 APIC: 05
1281 11:28:30.407687 APIC: 04
1282 11:28:30.408114 APIC: 02
1283 11:28:30.410904 APIC: 07
1284 11:28:30.417320 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1285 11:28:30.423711 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1286 11:28:30.430799 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1287 11:28:30.433674 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1288 11:28:30.440697 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1289 11:28:30.443630 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1290 11:28:30.447107 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1291 11:28:30.453459 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1292 11:28:30.463543 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1293 11:28:30.470621 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1294 11:28:30.477087 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1295 11:28:30.483590 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1296 11:28:30.490344 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1297 11:28:30.496958 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1298 11:28:30.506906 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1299 11:28:30.510112 DOMAIN: 0000: Resource ranges:
1300 11:28:30.513729 * Base: 1000, Size: 800, Tag: 100
1301 11:28:30.516857 * Base: 1900, Size: e700, Tag: 100
1302 11:28:30.523123 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1303 11:28:30.529932 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1304 11:28:30.536637 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1305 11:28:30.543154 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1306 11:28:30.549728 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1307 11:28:30.559652 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1308 11:28:30.566653 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1309 11:28:30.573093 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1310 11:28:30.582886 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1311 11:28:30.589772 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1312 11:28:30.596124 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1313 11:28:30.602880 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1314 11:28:30.613036 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1315 11:28:30.619343 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1316 11:28:30.626132 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1317 11:28:30.636130 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1318 11:28:30.642823 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1319 11:28:30.649582 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1320 11:28:30.659499 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1321 11:28:30.665798 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1322 11:28:30.672684 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1323 11:28:30.682487 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1324 11:28:30.689155 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1325 11:28:30.695743 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1326 11:28:30.705803 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1327 11:28:30.709462 DOMAIN: 0000: Resource ranges:
1328 11:28:30.712725 * Base: 7fc00000, Size: 40400000, Tag: 200
1329 11:28:30.715679 * Base: d0000000, Size: 28000000, Tag: 200
1330 11:28:30.722300 * Base: fa000000, Size: 1000000, Tag: 200
1331 11:28:30.725836 * Base: fb001000, Size: 2fff000, Tag: 200
1332 11:28:30.729264 * Base: fe010000, Size: 2e000, Tag: 200
1333 11:28:30.732509 * Base: fe03f000, Size: d41000, Tag: 200
1334 11:28:30.738951 * Base: fed88000, Size: 8000, Tag: 200
1335 11:28:30.742322 * Base: fed93000, Size: d000, Tag: 200
1336 11:28:30.745295 * Base: feda2000, Size: 1e000, Tag: 200
1337 11:28:30.749078 * Base: fede0000, Size: 1220000, Tag: 200
1338 11:28:30.755776 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1339 11:28:30.762365 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1340 11:28:30.769190 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1341 11:28:30.775591 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1342 11:28:30.782104 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1343 11:28:30.788630 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1344 11:28:30.795570 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1345 11:28:30.801758 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1346 11:28:30.808329 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1347 11:28:30.814920 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1348 11:28:30.821622 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1349 11:28:30.828508 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1350 11:28:30.835055 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1351 11:28:30.841599 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1352 11:28:30.848642 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1353 11:28:30.855118 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1354 11:28:30.861346 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1355 11:28:30.868335 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1356 11:28:30.874760 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1357 11:28:30.881493 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1358 11:28:30.887991 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1359 11:28:30.894665 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1360 11:28:30.901573 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1361 11:28:30.908056 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1362 11:28:30.917903 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1363 11:28:30.921623 PCI: 00:1d.0: Resource ranges:
1364 11:28:30.924371 * Base: 7fc00000, Size: 100000, Tag: 200
1365 11:28:30.931016 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1366 11:28:30.937854 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1367 11:28:30.944364 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1368 11:28:30.950972 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1369 11:28:30.960670 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1370 11:28:30.964104 Root Device assign_resources, bus 0 link: 0
1371 11:28:30.967308 DOMAIN: 0000 assign_resources, bus 0 link: 0
1372 11:28:30.977465 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1373 11:28:30.984081 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1374 11:28:30.994559 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1375 11:28:31.000478 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1376 11:28:31.007315 PCI: 00:04.0 assign_resources, bus 1 link: 0
1377 11:28:31.010811 PCI: 00:04.0 assign_resources, bus 1 link: 0
1378 11:28:31.020663 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1379 11:28:31.027189 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1380 11:28:31.036504 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1381 11:28:31.039889 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1382 11:28:31.043308 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1383 11:28:31.053419 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1384 11:28:31.056610 PCI: 00:14.0 assign_resources, bus 0 link: 0
1385 11:28:31.063232 PCI: 00:14.0 assign_resources, bus 0 link: 0
1386 11:28:31.069608 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1387 11:28:31.079331 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1388 11:28:31.086100 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1389 11:28:31.089341 PCI: 00:14.3 assign_resources, bus 0 link: 0
1390 11:28:31.096218 PCI: 00:14.3 assign_resources, bus 0 link: 0
1391 11:28:31.102771 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1392 11:28:31.109528 PCI: 00:15.0 assign_resources, bus 0 link: 0
1393 11:28:31.112502 PCI: 00:15.0 assign_resources, bus 0 link: 0
1394 11:28:31.122510 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1395 11:28:31.125667 PCI: 00:15.1 assign_resources, bus 0 link: 0
1396 11:28:31.128939 PCI: 00:15.1 assign_resources, bus 0 link: 0
1397 11:28:31.139084 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1398 11:28:31.145281 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1399 11:28:31.155902 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1400 11:28:31.162072 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1401 11:28:31.168972 PCI: 00:19.1 assign_resources, bus 0 link: 0
1402 11:28:31.172219 PCI: 00:19.1 assign_resources, bus 0 link: 0
1403 11:28:31.182623 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1404 11:28:31.191815 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1405 11:28:31.198869 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1406 11:28:31.205167 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1407 11:28:31.211866 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1408 11:28:31.222199 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1409 11:28:31.228176 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1410 11:28:31.231436 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1411 11:28:31.241690 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1412 11:28:31.245024 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1413 11:28:31.251708 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1414 11:28:31.258080 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1415 11:28:31.264794 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1416 11:28:31.268041 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1417 11:28:31.271441 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1418 11:28:31.278738 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1419 11:28:31.281904 LPC: Trying to open IO window from 800 size 1ff
1420 11:28:31.292007 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1421 11:28:31.298528 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1422 11:28:31.308538 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1423 11:28:31.311410 DOMAIN: 0000 assign_resources, bus 0 link: 0
1424 11:28:31.317998 Root Device assign_resources, bus 0 link: 0
1425 11:28:31.318301 Done setting resources.
1426 11:28:31.324714 Show resources in subtree (Root Device)...After assigning values.
1427 11:28:31.331442 Root Device child on link 0 DOMAIN: 0000
1428 11:28:31.334946 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1429 11:28:31.344783 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1430 11:28:31.354683 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1431 11:28:31.355260 PCI: 00:00.0
1432 11:28:31.364814 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1433 11:28:31.374587 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1434 11:28:31.384895 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1435 11:28:31.394896 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1436 11:28:31.401514 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1437 11:28:31.411245 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1438 11:28:31.420823 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1439 11:28:31.431344 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1440 11:28:31.441083 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1441 11:28:31.447676 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1442 11:28:31.457258 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1443 11:28:31.467463 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1444 11:28:31.477364 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1445 11:28:31.487060 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1446 11:28:31.493756 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1447 11:28:31.504055 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1448 11:28:31.514066 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1449 11:28:31.523449 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1450 11:28:31.533423 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1451 11:28:31.543732 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1452 11:28:31.543827 PCI: 00:02.0
1453 11:28:31.557139 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1454 11:28:31.567065 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1455 11:28:31.576589 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1456 11:28:31.579957 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1457 11:28:31.590205 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1458 11:28:31.593051 GENERIC: 0.0
1459 11:28:31.593142 PCI: 00:05.0
1460 11:28:31.603565 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1461 11:28:31.609586 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1462 11:28:31.609680 GENERIC: 0.0
1463 11:28:31.613420 PCI: 00:08.0
1464 11:28:31.623313 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1465 11:28:31.623401 PCI: 00:0a.0
1466 11:28:31.629673 PCI: 00:0d.0 child on link 0 USB0 port 0
1467 11:28:31.639556 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1468 11:28:31.642823 USB0 port 0 child on link 0 USB3 port 0
1469 11:28:31.646268 USB3 port 0
1470 11:28:31.646352 USB3 port 1
1471 11:28:31.649717 USB3 port 2
1472 11:28:31.649798 USB3 port 3
1473 11:28:31.656202 PCI: 00:14.0 child on link 0 USB0 port 0
1474 11:28:31.666289 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1475 11:28:31.669945 USB0 port 0 child on link 0 USB2 port 0
1476 11:28:31.672796 USB2 port 0
1477 11:28:31.672877 USB2 port 1
1478 11:28:31.676055 USB2 port 2
1479 11:28:31.676139 USB2 port 3
1480 11:28:31.679316 USB2 port 4
1481 11:28:31.679396 USB2 port 5
1482 11:28:31.682667 USB2 port 6
1483 11:28:31.682752 USB2 port 7
1484 11:28:31.685957 USB2 port 8
1485 11:28:31.686038 USB2 port 9
1486 11:28:31.689221 USB3 port 0
1487 11:28:31.689305 USB3 port 1
1488 11:28:31.693016 USB3 port 2
1489 11:28:31.696211 USB3 port 3
1490 11:28:31.696303 PCI: 00:14.2
1491 11:28:31.705923 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1492 11:28:31.716034 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1493 11:28:31.722791 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1494 11:28:31.732495 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1495 11:28:31.732585 GENERIC: 0.0
1496 11:28:31.739413 PCI: 00:15.0 child on link 0 I2C: 00:1a
1497 11:28:31.749299 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1498 11:28:31.749387 I2C: 00:1a
1499 11:28:31.752640 I2C: 00:31
1500 11:28:31.752727 I2C: 00:32
1501 11:28:31.755566 PCI: 00:15.1 child on link 0 I2C: 00:10
1502 11:28:31.769287 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1503 11:28:31.769375 I2C: 00:10
1504 11:28:31.772620 PCI: 00:15.2
1505 11:28:31.782533 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1506 11:28:31.782620 PCI: 00:15.3
1507 11:28:31.792184 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1508 11:28:31.795558 PCI: 00:16.0
1509 11:28:31.805880 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1510 11:28:31.805973 PCI: 00:19.0
1511 11:28:31.811911 PCI: 00:19.1 child on link 0 I2C: 00:15
1512 11:28:31.822161 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1513 11:28:31.822253 I2C: 00:15
1514 11:28:31.828499 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1515 11:28:31.835285 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1516 11:28:31.848729 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1517 11:28:31.858595 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1518 11:28:31.862280 GENERIC: 0.0
1519 11:28:31.862364 PCI: 01:00.0
1520 11:28:31.871990 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1521 11:28:31.881829 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1522 11:28:31.894746 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1523 11:28:31.894837 PCI: 00:1e.0
1524 11:28:31.904961 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1525 11:28:31.911650 PCI: 00:1e.2 child on link 0 SPI: 00
1526 11:28:31.921291 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1527 11:28:31.921386 SPI: 00
1528 11:28:31.925257 PCI: 00:1e.3 child on link 0 SPI: 00
1529 11:28:31.938088 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1530 11:28:31.938184 SPI: 00
1531 11:28:31.941663 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1532 11:28:31.951383 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1533 11:28:31.951477 PNP: 0c09.0
1534 11:28:31.961272 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1535 11:28:31.964667 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1536 11:28:31.974262 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1537 11:28:31.984567 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1538 11:28:31.988256 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1539 11:28:31.991178 GENERIC: 0.0
1540 11:28:31.994636 GENERIC: 1.0
1541 11:28:31.994746 PCI: 00:1f.3
1542 11:28:32.004622 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1543 11:28:32.014397 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1544 11:28:32.017406 PCI: 00:1f.5
1545 11:28:32.027611 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1546 11:28:32.030598 CPU_CLUSTER: 0 child on link 0 APIC: 00
1547 11:28:32.034075 APIC: 00
1548 11:28:32.034192 APIC: 01
1549 11:28:32.034295 APIC: 03
1550 11:28:32.038045 APIC: 06
1551 11:28:32.038153 APIC: 05
1552 11:28:32.040781 APIC: 04
1553 11:28:32.040864 APIC: 02
1554 11:28:32.040934 APIC: 07
1555 11:28:32.044071 Done allocating resources.
1556 11:28:32.050608 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1557 11:28:32.057058 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1558 11:28:32.060635 Configure GPIOs for I2S audio on UP4.
1559 11:28:32.067047 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1560 11:28:32.070232 Enabling resources...
1561 11:28:32.073691 PCI: 00:00.0 subsystem <- 8086/9a12
1562 11:28:32.077326 PCI: 00:00.0 cmd <- 06
1563 11:28:32.080317 PCI: 00:02.0 subsystem <- 8086/9a40
1564 11:28:32.083900 PCI: 00:02.0 cmd <- 03
1565 11:28:32.086953 PCI: 00:04.0 subsystem <- 8086/9a03
1566 11:28:32.087061 PCI: 00:04.0 cmd <- 02
1567 11:28:32.093707 PCI: 00:05.0 subsystem <- 8086/9a19
1568 11:28:32.093819 PCI: 00:05.0 cmd <- 02
1569 11:28:32.097371 PCI: 00:08.0 subsystem <- 8086/9a11
1570 11:28:32.100115 PCI: 00:08.0 cmd <- 06
1571 11:28:32.103675 PCI: 00:0d.0 subsystem <- 8086/9a13
1572 11:28:32.107226 PCI: 00:0d.0 cmd <- 02
1573 11:28:32.110364 PCI: 00:14.0 subsystem <- 8086/a0ed
1574 11:28:32.113312 PCI: 00:14.0 cmd <- 02
1575 11:28:32.116524 PCI: 00:14.2 subsystem <- 8086/a0ef
1576 11:28:32.120054 PCI: 00:14.2 cmd <- 02
1577 11:28:32.123342 PCI: 00:14.3 subsystem <- 8086/a0f0
1578 11:28:32.126709 PCI: 00:14.3 cmd <- 02
1579 11:28:32.130286 PCI: 00:15.0 subsystem <- 8086/a0e8
1580 11:28:32.133735 PCI: 00:15.0 cmd <- 02
1581 11:28:32.136691 PCI: 00:15.1 subsystem <- 8086/a0e9
1582 11:28:32.136773 PCI: 00:15.1 cmd <- 02
1583 11:28:32.143466 PCI: 00:15.2 subsystem <- 8086/a0ea
1584 11:28:32.143546 PCI: 00:15.2 cmd <- 02
1585 11:28:32.146695 PCI: 00:15.3 subsystem <- 8086/a0eb
1586 11:28:32.149982 PCI: 00:15.3 cmd <- 02
1587 11:28:32.153487 PCI: 00:16.0 subsystem <- 8086/a0e0
1588 11:28:32.156595 PCI: 00:16.0 cmd <- 02
1589 11:28:32.159849 PCI: 00:19.1 subsystem <- 8086/a0c6
1590 11:28:32.163153 PCI: 00:19.1 cmd <- 02
1591 11:28:32.166661 PCI: 00:1d.0 bridge ctrl <- 0013
1592 11:28:32.170117 PCI: 00:1d.0 subsystem <- 8086/a0b0
1593 11:28:32.173048 PCI: 00:1d.0 cmd <- 06
1594 11:28:32.176464 PCI: 00:1e.0 subsystem <- 8086/a0a8
1595 11:28:32.180260 PCI: 00:1e.0 cmd <- 06
1596 11:28:32.183168 PCI: 00:1e.2 subsystem <- 8086/a0aa
1597 11:28:32.186686 PCI: 00:1e.2 cmd <- 06
1598 11:28:32.189660 PCI: 00:1e.3 subsystem <- 8086/a0ab
1599 11:28:32.189736 PCI: 00:1e.3 cmd <- 02
1600 11:28:32.196298 PCI: 00:1f.0 subsystem <- 8086/a087
1601 11:28:32.196380 PCI: 00:1f.0 cmd <- 407
1602 11:28:32.202770 PCI: 00:1f.3 subsystem <- 8086/a0c8
1603 11:28:32.202878 PCI: 00:1f.3 cmd <- 02
1604 11:28:32.206508 PCI: 00:1f.5 subsystem <- 8086/a0a4
1605 11:28:32.209348 PCI: 00:1f.5 cmd <- 406
1606 11:28:32.214146 PCI: 01:00.0 cmd <- 02
1607 11:28:32.219250 done.
1608 11:28:32.222276 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1609 11:28:32.225390 Initializing devices...
1610 11:28:32.229013 Root Device init
1611 11:28:32.232223 Chrome EC: Set SMI mask to 0x0000000000000000
1612 11:28:32.238699 Chrome EC: clear events_b mask to 0x0000000000000000
1613 11:28:32.245556 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1614 11:28:32.251925 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1615 11:28:32.258739 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1616 11:28:32.261644 Chrome EC: Set WAKE mask to 0x0000000000000000
1617 11:28:32.269892 fw_config match found: DB_USB=USB3_ACTIVE
1618 11:28:32.273123 Configure Right Type-C port orientation for retimer
1619 11:28:32.276723 Root Device init finished in 46 msecs
1620 11:28:32.280275 PCI: 00:00.0 init
1621 11:28:32.283728 CPU TDP = 9 Watts
1622 11:28:32.283811 CPU PL1 = 9 Watts
1623 11:28:32.287399 CPU PL2 = 40 Watts
1624 11:28:32.290147 CPU PL4 = 83 Watts
1625 11:28:32.293706 PCI: 00:00.0 init finished in 8 msecs
1626 11:28:32.293790 PCI: 00:02.0 init
1627 11:28:32.297097 GMA: Found VBT in CBFS
1628 11:28:32.300593 GMA: Found valid VBT in CBFS
1629 11:28:32.307248 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1630 11:28:32.313572 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1631 11:28:32.316952 PCI: 00:02.0 init finished in 18 msecs
1632 11:28:32.320125 PCI: 00:05.0 init
1633 11:28:32.323495 PCI: 00:05.0 init finished in 0 msecs
1634 11:28:32.326518 PCI: 00:08.0 init
1635 11:28:32.330438 PCI: 00:08.0 init finished in 0 msecs
1636 11:28:32.333783 PCI: 00:14.0 init
1637 11:28:32.337080 PCI: 00:14.0 init finished in 0 msecs
1638 11:28:32.340336 PCI: 00:14.2 init
1639 11:28:32.343602 PCI: 00:14.2 init finished in 0 msecs
1640 11:28:32.346886 PCI: 00:15.0 init
1641 11:28:32.346997 I2C bus 0 version 0x3230302a
1642 11:28:32.353338 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1643 11:28:32.356339 PCI: 00:15.0 init finished in 6 msecs
1644 11:28:32.356450 PCI: 00:15.1 init
1645 11:28:32.360272 I2C bus 1 version 0x3230302a
1646 11:28:32.363212 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1647 11:28:32.369735 PCI: 00:15.1 init finished in 6 msecs
1648 11:28:32.369825 PCI: 00:15.2 init
1649 11:28:32.373649 I2C bus 2 version 0x3230302a
1650 11:28:32.376842 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1651 11:28:32.379967 PCI: 00:15.2 init finished in 6 msecs
1652 11:28:32.382962 PCI: 00:15.3 init
1653 11:28:32.386711 I2C bus 3 version 0x3230302a
1654 11:28:32.389904 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1655 11:28:32.392858 PCI: 00:15.3 init finished in 6 msecs
1656 11:28:32.396392 PCI: 00:16.0 init
1657 11:28:32.400078 PCI: 00:16.0 init finished in 0 msecs
1658 11:28:32.402979 PCI: 00:19.1 init
1659 11:28:32.406327 I2C bus 5 version 0x3230302a
1660 11:28:32.410026 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1661 11:28:32.412978 PCI: 00:19.1 init finished in 6 msecs
1662 11:28:32.416453 PCI: 00:1d.0 init
1663 11:28:32.416536 Initializing PCH PCIe bridge.
1664 11:28:32.422771 PCI: 00:1d.0 init finished in 3 msecs
1665 11:28:32.426111 PCI: 00:1f.0 init
1666 11:28:32.429593 IOAPIC: Initializing IOAPIC at 0xfec00000
1667 11:28:32.433111 IOAPIC: Bootstrap Processor Local APIC = 0x00
1668 11:28:32.436491 IOAPIC: ID = 0x02
1669 11:28:32.439705 IOAPIC: Dumping registers
1670 11:28:32.439821 reg 0x0000: 0x02000000
1671 11:28:32.442947 reg 0x0001: 0x00770020
1672 11:28:32.446221 reg 0x0002: 0x00000000
1673 11:28:32.449356 PCI: 00:1f.0 init finished in 21 msecs
1674 11:28:32.452922 PCI: 00:1f.2 init
1675 11:28:32.456414 Disabling ACPI via APMC.
1676 11:28:32.456499 APMC done.
1677 11:28:32.459955 PCI: 00:1f.2 init finished in 5 msecs
1678 11:28:32.472979 PCI: 01:00.0 init
1679 11:28:32.476056 PCI: 01:00.0 init finished in 0 msecs
1680 11:28:32.479298 PNP: 0c09.0 init
1681 11:28:32.482675 Google Chrome EC uptime: 8.404 seconds
1682 11:28:32.489366 Google Chrome AP resets since EC boot: 1
1683 11:28:32.493096 Google Chrome most recent AP reset causes:
1684 11:28:32.495926 0.349: 32775 shutdown: entering G3
1685 11:28:32.502951 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1686 11:28:32.506155 PNP: 0c09.0 init finished in 22 msecs
1687 11:28:32.511687 Devices initialized
1688 11:28:32.515480 Show all devs... After init.
1689 11:28:32.518364 Root Device: enabled 1
1690 11:28:32.518445 DOMAIN: 0000: enabled 1
1691 11:28:32.521632 CPU_CLUSTER: 0: enabled 1
1692 11:28:32.524710 PCI: 00:00.0: enabled 1
1693 11:28:32.528182 PCI: 00:02.0: enabled 1
1694 11:28:32.528298 PCI: 00:04.0: enabled 1
1695 11:28:32.531513 PCI: 00:05.0: enabled 1
1696 11:28:32.535194 PCI: 00:06.0: enabled 0
1697 11:28:32.538001 PCI: 00:07.0: enabled 0
1698 11:28:32.538093 PCI: 00:07.1: enabled 0
1699 11:28:32.541545 PCI: 00:07.2: enabled 0
1700 11:28:32.544750 PCI: 00:07.3: enabled 0
1701 11:28:32.548246 PCI: 00:08.0: enabled 1
1702 11:28:32.548357 PCI: 00:09.0: enabled 0
1703 11:28:32.551440 PCI: 00:0a.0: enabled 0
1704 11:28:32.554816 PCI: 00:0d.0: enabled 1
1705 11:28:32.558049 PCI: 00:0d.1: enabled 0
1706 11:28:32.558143 PCI: 00:0d.2: enabled 0
1707 11:28:32.561406 PCI: 00:0d.3: enabled 0
1708 11:28:32.564939 PCI: 00:0e.0: enabled 0
1709 11:28:32.565032 PCI: 00:10.2: enabled 1
1710 11:28:32.568203 PCI: 00:10.6: enabled 0
1711 11:28:32.571583 PCI: 00:10.7: enabled 0
1712 11:28:32.574759 PCI: 00:12.0: enabled 0
1713 11:28:32.574852 PCI: 00:12.6: enabled 0
1714 11:28:32.577970 PCI: 00:13.0: enabled 0
1715 11:28:32.581717 PCI: 00:14.0: enabled 1
1716 11:28:32.584717 PCI: 00:14.1: enabled 0
1717 11:28:32.584809 PCI: 00:14.2: enabled 1
1718 11:28:32.588172 PCI: 00:14.3: enabled 1
1719 11:28:32.591240 PCI: 00:15.0: enabled 1
1720 11:28:32.594458 PCI: 00:15.1: enabled 1
1721 11:28:32.594550 PCI: 00:15.2: enabled 1
1722 11:28:32.598050 PCI: 00:15.3: enabled 1
1723 11:28:32.601509 PCI: 00:16.0: enabled 1
1724 11:28:32.601601 PCI: 00:16.1: enabled 0
1725 11:28:32.604950 PCI: 00:16.2: enabled 0
1726 11:28:32.607829 PCI: 00:16.3: enabled 0
1727 11:28:32.611408 PCI: 00:16.4: enabled 0
1728 11:28:32.611500 PCI: 00:16.5: enabled 0
1729 11:28:32.614710 PCI: 00:17.0: enabled 0
1730 11:28:32.617685 PCI: 00:19.0: enabled 0
1731 11:28:32.621272 PCI: 00:19.1: enabled 1
1732 11:28:32.621364 PCI: 00:19.2: enabled 0
1733 11:28:32.625133 PCI: 00:1c.0: enabled 1
1734 11:28:32.627623 PCI: 00:1c.1: enabled 0
1735 11:28:32.631381 PCI: 00:1c.2: enabled 0
1736 11:28:32.631474 PCI: 00:1c.3: enabled 0
1737 11:28:32.634715 PCI: 00:1c.4: enabled 0
1738 11:28:32.637718 PCI: 00:1c.5: enabled 0
1739 11:28:32.641088 PCI: 00:1c.6: enabled 1
1740 11:28:32.641181 PCI: 00:1c.7: enabled 0
1741 11:28:32.644672 PCI: 00:1d.0: enabled 1
1742 11:28:32.647673 PCI: 00:1d.1: enabled 0
1743 11:28:32.647768 PCI: 00:1d.2: enabled 1
1744 11:28:32.650897 PCI: 00:1d.3: enabled 0
1745 11:28:32.654785 PCI: 00:1e.0: enabled 1
1746 11:28:32.657957 PCI: 00:1e.1: enabled 0
1747 11:28:32.658061 PCI: 00:1e.2: enabled 1
1748 11:28:32.661258 PCI: 00:1e.3: enabled 1
1749 11:28:32.664265 PCI: 00:1f.0: enabled 1
1750 11:28:32.668149 PCI: 00:1f.1: enabled 0
1751 11:28:32.668254 PCI: 00:1f.2: enabled 1
1752 11:28:32.671385 PCI: 00:1f.3: enabled 1
1753 11:28:32.674705 PCI: 00:1f.4: enabled 0
1754 11:28:32.677707 PCI: 00:1f.5: enabled 1
1755 11:28:32.677800 PCI: 00:1f.6: enabled 0
1756 11:28:32.681300 PCI: 00:1f.7: enabled 0
1757 11:28:32.684178 APIC: 00: enabled 1
1758 11:28:32.684272 GENERIC: 0.0: enabled 1
1759 11:28:32.687600 GENERIC: 0.0: enabled 1
1760 11:28:32.690975 GENERIC: 1.0: enabled 1
1761 11:28:32.694654 GENERIC: 0.0: enabled 1
1762 11:28:32.694747 GENERIC: 1.0: enabled 1
1763 11:28:32.698023 USB0 port 0: enabled 1
1764 11:28:32.700612 GENERIC: 0.0: enabled 1
1765 11:28:32.700705 USB0 port 0: enabled 1
1766 11:28:32.704413 GENERIC: 0.0: enabled 1
1767 11:28:32.707675 I2C: 00:1a: enabled 1
1768 11:28:32.711073 I2C: 00:31: enabled 1
1769 11:28:32.711166 I2C: 00:32: enabled 1
1770 11:28:32.713956 I2C: 00:10: enabled 1
1771 11:28:32.717374 I2C: 00:15: enabled 1
1772 11:28:32.717467 GENERIC: 0.0: enabled 0
1773 11:28:32.720916 GENERIC: 1.0: enabled 0
1774 11:28:32.724007 GENERIC: 0.0: enabled 1
1775 11:28:32.724099 SPI: 00: enabled 1
1776 11:28:32.727553 SPI: 00: enabled 1
1777 11:28:32.731062 PNP: 0c09.0: enabled 1
1778 11:28:32.731154 GENERIC: 0.0: enabled 1
1779 11:28:32.733966 USB3 port 0: enabled 1
1780 11:28:32.737464 USB3 port 1: enabled 1
1781 11:28:32.740995 USB3 port 2: enabled 0
1782 11:28:32.741089 USB3 port 3: enabled 0
1783 11:28:32.744399 USB2 port 0: enabled 0
1784 11:28:32.747531 USB2 port 1: enabled 1
1785 11:28:32.747624 USB2 port 2: enabled 1
1786 11:28:32.750781 USB2 port 3: enabled 0
1787 11:28:32.753994 USB2 port 4: enabled 1
1788 11:28:32.754088 USB2 port 5: enabled 0
1789 11:28:32.757352 USB2 port 6: enabled 0
1790 11:28:32.760676 USB2 port 7: enabled 0
1791 11:28:32.764214 USB2 port 8: enabled 0
1792 11:28:32.764315 USB2 port 9: enabled 0
1793 11:28:32.767784 USB3 port 0: enabled 0
1794 11:28:32.770521 USB3 port 1: enabled 1
1795 11:28:32.770614 USB3 port 2: enabled 0
1796 11:28:32.773843 USB3 port 3: enabled 0
1797 11:28:32.777027 GENERIC: 0.0: enabled 1
1798 11:28:32.780771 GENERIC: 1.0: enabled 1
1799 11:28:32.780863 APIC: 01: enabled 1
1800 11:28:32.784197 APIC: 03: enabled 1
1801 11:28:32.784297 APIC: 06: enabled 1
1802 11:28:32.787203 APIC: 05: enabled 1
1803 11:28:32.790487 APIC: 04: enabled 1
1804 11:28:32.790580 APIC: 02: enabled 1
1805 11:28:32.794052 APIC: 07: enabled 1
1806 11:28:32.797445 PCI: 01:00.0: enabled 1
1807 11:28:32.800533 BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms
1808 11:28:32.807161 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1809 11:28:32.810602 ELOG: NV offset 0xf30000 size 0x1000
1810 11:28:32.817196 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1811 11:28:32.823402 ELOG: Event(17) added with size 13 at 2023-06-09 11:28:32 UTC
1812 11:28:32.830401 ELOG: Event(92) added with size 9 at 2023-06-09 11:28:32 UTC
1813 11:28:32.836969 ELOG: Event(93) added with size 9 at 2023-06-09 11:28:32 UTC
1814 11:28:32.843482 ELOG: Event(9E) added with size 10 at 2023-06-09 11:28:32 UTC
1815 11:28:32.849892 ELOG: Event(9F) added with size 14 at 2023-06-09 11:28:32 UTC
1816 11:28:32.857119 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1817 11:28:32.859945 ELOG: Event(A1) added with size 10 at 2023-06-09 11:28:32 UTC
1818 11:28:32.866951 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1819 11:28:32.873294 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1820 11:28:32.876303 Finalize devices...
1821 11:28:32.876396 Devices finalized
1822 11:28:32.882923 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1823 11:28:32.889755 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1824 11:28:32.893257 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1825 11:28:32.899543 ME: HFSTS1 : 0x80030055
1826 11:28:32.902986 ME: HFSTS2 : 0x30280116
1827 11:28:32.906471 ME: HFSTS3 : 0x00000050
1828 11:28:32.913097 ME: HFSTS4 : 0x00004000
1829 11:28:32.916329 ME: HFSTS5 : 0x00000000
1830 11:28:32.919554 ME: HFSTS6 : 0x00400006
1831 11:28:32.926253 ME: Manufacturing Mode : YES
1832 11:28:32.929575 ME: SPI Protection Mode Enabled : NO
1833 11:28:32.933104 ME: FW Partition Table : OK
1834 11:28:32.935971 ME: Bringup Loader Failure : NO
1835 11:28:32.939502 ME: Firmware Init Complete : NO
1836 11:28:32.942917 ME: Boot Options Present : NO
1837 11:28:32.946286 ME: Update In Progress : NO
1838 11:28:32.949850 ME: D0i3 Support : YES
1839 11:28:32.956394 ME: Low Power State Enabled : NO
1840 11:28:32.959193 ME: CPU Replaced : YES
1841 11:28:32.962870 ME: CPU Replacement Valid : YES
1842 11:28:32.966384 ME: Current Working State : 5
1843 11:28:32.969216 ME: Current Operation State : 1
1844 11:28:32.972575 ME: Current Operation Mode : 3
1845 11:28:32.975939 ME: Error Code : 0
1846 11:28:32.979343 ME: Enhanced Debug Mode : NO
1847 11:28:32.982974 ME: CPU Debug Disabled : YES
1848 11:28:32.989362 ME: TXT Support : NO
1849 11:28:32.992649 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1850 11:28:33.002274 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1851 11:28:33.005777 CBFS: 'fallback/slic' not found.
1852 11:28:33.009336 ACPI: Writing ACPI tables at 76b01000.
1853 11:28:33.009425 ACPI: * FACS
1854 11:28:33.012223 ACPI: * DSDT
1855 11:28:33.015635 Ramoops buffer: 0x100000@0x76a00000.
1856 11:28:33.022348 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1857 11:28:33.025418 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1858 11:28:33.029285 Google Chrome EC: version:
1859 11:28:33.032295 ro: voema_v2.0.7540-147f8d37d1
1860 11:28:33.035941 rw: voema_v2.0.7540-147f8d37d1
1861 11:28:33.039514 running image: 2
1862 11:28:33.046015 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1863 11:28:33.048983 ACPI: * FADT
1864 11:28:33.049069 SCI is IRQ9
1865 11:28:33.052303 ACPI: added table 1/32, length now 40
1866 11:28:33.055906 ACPI: * SSDT
1867 11:28:33.059667 Found 1 CPU(s) with 8 core(s) each.
1868 11:28:33.062639 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1869 11:28:33.068933 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1870 11:28:33.072303 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1871 11:28:33.075951 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1872 11:28:33.082460 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1873 11:28:33.088943 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1874 11:28:33.092225 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1875 11:28:33.098860 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1876 11:28:33.105673 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1877 11:28:33.108616 \_SB.PCI0.RP09: Added StorageD3Enable property
1878 11:28:33.112077 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1879 11:28:33.119055 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1880 11:28:33.125231 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1881 11:28:33.128660 PS2K: Passing 80 keymaps to kernel
1882 11:28:33.135720 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1883 11:28:33.142175 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1884 11:28:33.148927 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1885 11:28:33.155341 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1886 11:28:33.162137 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1887 11:28:33.168896 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1888 11:28:33.171859 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1889 11:28:33.178262 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1890 11:28:33.185301 ACPI: added table 2/32, length now 44
1891 11:28:33.185393 ACPI: * MCFG
1892 11:28:33.188300 ACPI: added table 3/32, length now 48
1893 11:28:33.191753 ACPI: * TPM2
1894 11:28:33.194965 TPM2 log created at 0x769f0000
1895 11:28:33.198345 ACPI: added table 4/32, length now 52
1896 11:28:33.198447 ACPI: * MADT
1897 11:28:33.201688 SCI is IRQ9
1898 11:28:33.205161 ACPI: added table 5/32, length now 56
1899 11:28:33.205252 current = 76b09850
1900 11:28:33.208548 ACPI: * DMAR
1901 11:28:33.212027 ACPI: added table 6/32, length now 60
1902 11:28:33.214876 ACPI: added table 7/32, length now 64
1903 11:28:33.218398 ACPI: * HPET
1904 11:28:33.221398 ACPI: added table 8/32, length now 68
1905 11:28:33.221490 ACPI: done.
1906 11:28:33.224798 ACPI tables: 35216 bytes.
1907 11:28:33.228233 smbios_write_tables: 769ef000
1908 11:28:33.231379 EC returned error result code 3
1909 11:28:33.234773 Couldn't obtain OEM name from CBI
1910 11:28:33.238130 Create SMBIOS type 16
1911 11:28:33.241253 Create SMBIOS type 17
1912 11:28:33.244634 GENERIC: 0.0 (WIFI Device)
1913 11:28:33.244717 SMBIOS tables: 1750 bytes.
1914 11:28:33.251675 Writing table forward entry at 0x00000500
1915 11:28:33.254736 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1916 11:28:33.261610 Writing coreboot table at 0x76b25000
1917 11:28:33.264672 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1918 11:28:33.271586 1. 0000000000001000-000000000009ffff: RAM
1919 11:28:33.274490 2. 00000000000a0000-00000000000fffff: RESERVED
1920 11:28:33.277998 3. 0000000000100000-00000000769eefff: RAM
1921 11:28:33.284716 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1922 11:28:33.291073 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1923 11:28:33.294752 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1924 11:28:33.301336 7. 0000000077000000-000000007fbfffff: RESERVED
1925 11:28:33.304630 8. 00000000c0000000-00000000cfffffff: RESERVED
1926 11:28:33.310949 9. 00000000f8000000-00000000f9ffffff: RESERVED
1927 11:28:33.314368 10. 00000000fb000000-00000000fb000fff: RESERVED
1928 11:28:33.321178 11. 00000000fe000000-00000000fe00ffff: RESERVED
1929 11:28:33.324242 12. 00000000fed80000-00000000fed87fff: RESERVED
1930 11:28:33.331347 13. 00000000fed90000-00000000fed92fff: RESERVED
1931 11:28:33.334222 14. 00000000feda0000-00000000feda1fff: RESERVED
1932 11:28:33.337820 15. 00000000fedc0000-00000000feddffff: RESERVED
1933 11:28:33.344419 16. 0000000100000000-00000002803fffff: RAM
1934 11:28:33.347603 Passing 4 GPIOs to payload:
1935 11:28:33.351001 NAME | PORT | POLARITY | VALUE
1936 11:28:33.357425 lid | undefined | high | high
1937 11:28:33.360890 power | undefined | high | low
1938 11:28:33.367453 oprom | undefined | high | low
1939 11:28:33.374314 EC in RW | 0x000000e5 | high | high
1940 11:28:33.377139 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f5e2
1941 11:28:33.380745 coreboot table: 1576 bytes.
1942 11:28:33.383901 IMD ROOT 0. 0x76fff000 0x00001000
1943 11:28:33.390563 IMD SMALL 1. 0x76ffe000 0x00001000
1944 11:28:33.394169 FSP MEMORY 2. 0x76c4e000 0x003b0000
1945 11:28:33.397452 VPD 3. 0x76c4d000 0x00000367
1946 11:28:33.400564 RO MCACHE 4. 0x76c4c000 0x00000fdc
1947 11:28:33.403897 CONSOLE 5. 0x76c2c000 0x00020000
1948 11:28:33.407157 FMAP 6. 0x76c2b000 0x00000578
1949 11:28:33.410578 TIME STAMP 7. 0x76c2a000 0x00000910
1950 11:28:33.413960 VBOOT WORK 8. 0x76c16000 0x00014000
1951 11:28:33.420604 ROMSTG STCK 9. 0x76c15000 0x00001000
1952 11:28:33.423997 AFTER CAR 10. 0x76c0a000 0x0000b000
1953 11:28:33.426959 RAMSTAGE 11. 0x76b97000 0x00073000
1954 11:28:33.430636 REFCODE 12. 0x76b42000 0x00055000
1955 11:28:33.433496 SMM BACKUP 13. 0x76b32000 0x00010000
1956 11:28:33.437121 4f444749 14. 0x76b30000 0x00002000
1957 11:28:33.440515 EXT VBT15. 0x76b2d000 0x0000219f
1958 11:28:33.443495 COREBOOT 16. 0x76b25000 0x00008000
1959 11:28:33.446972 ACPI 17. 0x76b01000 0x00024000
1960 11:28:33.453713 ACPI GNVS 18. 0x76b00000 0x00001000
1961 11:28:33.456973 RAMOOPS 19. 0x76a00000 0x00100000
1962 11:28:33.460218 TPM2 TCGLOG20. 0x769f0000 0x00010000
1963 11:28:33.463532 SMBIOS 21. 0x769ef000 0x00000800
1964 11:28:33.463622 IMD small region:
1965 11:28:33.470419 IMD ROOT 0. 0x76ffec00 0x00000400
1966 11:28:33.473982 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1967 11:28:33.477036 POWER STATE 2. 0x76ffeb80 0x00000044
1968 11:28:33.480401 ROMSTAGE 3. 0x76ffeb60 0x00000004
1969 11:28:33.483308 MEM INFO 4. 0x76ffe980 0x000001e0
1970 11:28:33.489991 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1971 11:28:33.493574 MTRR: Physical address space:
1972 11:28:33.499826 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1973 11:28:33.506463 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1974 11:28:33.513473 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1975 11:28:33.520040 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1976 11:28:33.523359 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1977 11:28:33.530114 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1978 11:28:33.536462 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1979 11:28:33.543002 MTRR: Fixed MSR 0x250 0x0606060606060606
1980 11:28:33.546468 MTRR: Fixed MSR 0x258 0x0606060606060606
1981 11:28:33.549654 MTRR: Fixed MSR 0x259 0x0000000000000000
1982 11:28:33.553064 MTRR: Fixed MSR 0x268 0x0606060606060606
1983 11:28:33.556967 MTRR: Fixed MSR 0x269 0x0606060606060606
1984 11:28:33.563582 MTRR: Fixed MSR 0x26a 0x0606060606060606
1985 11:28:33.566757 MTRR: Fixed MSR 0x26b 0x0606060606060606
1986 11:28:33.569965 MTRR: Fixed MSR 0x26c 0x0606060606060606
1987 11:28:33.573141 MTRR: Fixed MSR 0x26d 0x0606060606060606
1988 11:28:33.579843 MTRR: Fixed MSR 0x26e 0x0606060606060606
1989 11:28:33.583074 MTRR: Fixed MSR 0x26f 0x0606060606060606
1990 11:28:33.586611 call enable_fixed_mtrr()
1991 11:28:33.589390 CPU physical address size: 39 bits
1992 11:28:33.592780 MTRR: default type WB/UC MTRR counts: 6/6.
1993 11:28:33.596254 MTRR: UC selected as default type.
1994 11:28:33.602819 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1995 11:28:33.609317 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1996 11:28:33.616292 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1997 11:28:33.623057 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1998 11:28:33.629494 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1999 11:28:33.636159 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2000 11:28:33.636408
2001 11:28:33.639735 MTRR check
2002 11:28:33.639925 Fixed MTRRs : Enabled
2003 11:28:33.642566 Variable MTRRs: Enabled
2004 11:28:33.642790
2005 11:28:33.646328 MTRR: Fixed MSR 0x250 0x0606060606060606
2006 11:28:33.652675 MTRR: Fixed MSR 0x258 0x0606060606060606
2007 11:28:33.656363 MTRR: Fixed MSR 0x259 0x0000000000000000
2008 11:28:33.659310 MTRR: Fixed MSR 0x268 0x0606060606060606
2009 11:28:33.662645 MTRR: Fixed MSR 0x269 0x0606060606060606
2010 11:28:33.669603 MTRR: Fixed MSR 0x26a 0x0606060606060606
2011 11:28:33.672625 MTRR: Fixed MSR 0x26b 0x0606060606060606
2012 11:28:33.675880 MTRR: Fixed MSR 0x26c 0x0606060606060606
2013 11:28:33.679545 MTRR: Fixed MSR 0x26d 0x0606060606060606
2014 11:28:33.682819 MTRR: Fixed MSR 0x26e 0x0606060606060606
2015 11:28:33.689471 MTRR: Fixed MSR 0x26f 0x0606060606060606
2016 11:28:33.695966 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2017 11:28:33.699279 call enable_fixed_mtrr()
2018 11:28:33.703864 Checking cr50 for pending updates
2019 11:28:33.704316 CPU physical address size: 39 bits
2020 11:28:33.707343 MTRR: Fixed MSR 0x250 0x0606060606060606
2021 11:28:33.714419 MTRR: Fixed MSR 0x250 0x0606060606060606
2022 11:28:33.717334 MTRR: Fixed MSR 0x258 0x0606060606060606
2023 11:28:33.720776 MTRR: Fixed MSR 0x259 0x0000000000000000
2024 11:28:33.724238 MTRR: Fixed MSR 0x268 0x0606060606060606
2025 11:28:33.731110 MTRR: Fixed MSR 0x269 0x0606060606060606
2026 11:28:33.734271 MTRR: Fixed MSR 0x26a 0x0606060606060606
2027 11:28:33.737582 MTRR: Fixed MSR 0x26b 0x0606060606060606
2028 11:28:33.740901 MTRR: Fixed MSR 0x26c 0x0606060606060606
2029 11:28:33.747394 MTRR: Fixed MSR 0x26d 0x0606060606060606
2030 11:28:33.750437 MTRR: Fixed MSR 0x26e 0x0606060606060606
2031 11:28:33.754003 MTRR: Fixed MSR 0x26f 0x0606060606060606
2032 11:28:33.760757 MTRR: Fixed MSR 0x258 0x0606060606060606
2033 11:28:33.761182 call enable_fixed_mtrr()
2034 11:28:33.767575 MTRR: Fixed MSR 0x259 0x0000000000000000
2035 11:28:33.770720 MTRR: Fixed MSR 0x268 0x0606060606060606
2036 11:28:33.774014 MTRR: Fixed MSR 0x269 0x0606060606060606
2037 11:28:33.776923 MTRR: Fixed MSR 0x26a 0x0606060606060606
2038 11:28:33.783655 MTRR: Fixed MSR 0x26b 0x0606060606060606
2039 11:28:33.787280 MTRR: Fixed MSR 0x26c 0x0606060606060606
2040 11:28:33.790318 MTRR: Fixed MSR 0x26d 0x0606060606060606
2041 11:28:33.793851 MTRR: Fixed MSR 0x26e 0x0606060606060606
2042 11:28:33.797430 MTRR: Fixed MSR 0x26f 0x0606060606060606
2043 11:28:33.803649 CPU physical address size: 39 bits
2044 11:28:33.807123 call enable_fixed_mtrr()
2045 11:28:33.810121 MTRR: Fixed MSR 0x250 0x0606060606060606
2046 11:28:33.813653 MTRR: Fixed MSR 0x250 0x0606060606060606
2047 11:28:33.820090 MTRR: Fixed MSR 0x258 0x0606060606060606
2048 11:28:33.823682 MTRR: Fixed MSR 0x259 0x0000000000000000
2049 11:28:33.826553 MTRR: Fixed MSR 0x268 0x0606060606060606
2050 11:28:33.829968 MTRR: Fixed MSR 0x269 0x0606060606060606
2051 11:28:33.836777 MTRR: Fixed MSR 0x26a 0x0606060606060606
2052 11:28:33.840060 MTRR: Fixed MSR 0x26b 0x0606060606060606
2053 11:28:33.843766 MTRR: Fixed MSR 0x26c 0x0606060606060606
2054 11:28:33.846616 MTRR: Fixed MSR 0x26d 0x0606060606060606
2055 11:28:33.853291 MTRR: Fixed MSR 0x26e 0x0606060606060606
2056 11:28:33.856728 MTRR: Fixed MSR 0x26f 0x0606060606060606
2057 11:28:33.860140 MTRR: Fixed MSR 0x258 0x0606060606060606
2058 11:28:33.863523 call enable_fixed_mtrr()
2059 11:28:33.867147 MTRR: Fixed MSR 0x259 0x0000000000000000
2060 11:28:33.873165 MTRR: Fixed MSR 0x268 0x0606060606060606
2061 11:28:33.876767 MTRR: Fixed MSR 0x269 0x0606060606060606
2062 11:28:33.879885 MTRR: Fixed MSR 0x26a 0x0606060606060606
2063 11:28:33.883199 MTRR: Fixed MSR 0x26b 0x0606060606060606
2064 11:28:33.889815 MTRR: Fixed MSR 0x26c 0x0606060606060606
2065 11:28:33.893393 MTRR: Fixed MSR 0x26d 0x0606060606060606
2066 11:28:33.896223 MTRR: Fixed MSR 0x26e 0x0606060606060606
2067 11:28:33.899946 MTRR: Fixed MSR 0x26f 0x0606060606060606
2068 11:28:33.903273 CPU physical address size: 39 bits
2069 11:28:33.910831 call enable_fixed_mtrr()
2070 11:28:33.911401 Reading cr50 TPM mode
2071 11:28:33.913767 CPU physical address size: 39 bits
2072 11:28:33.917291 MTRR: Fixed MSR 0x250 0x0606060606060606
2073 11:28:33.923830 MTRR: Fixed MSR 0x250 0x0606060606060606
2074 11:28:33.927465 MTRR: Fixed MSR 0x258 0x0606060606060606
2075 11:28:33.931052 MTRR: Fixed MSR 0x259 0x0000000000000000
2076 11:28:33.933767 MTRR: Fixed MSR 0x268 0x0606060606060606
2077 11:28:33.940407 MTRR: Fixed MSR 0x269 0x0606060606060606
2078 11:28:33.943722 MTRR: Fixed MSR 0x26a 0x0606060606060606
2079 11:28:33.947287 MTRR: Fixed MSR 0x26b 0x0606060606060606
2080 11:28:33.950608 MTRR: Fixed MSR 0x26c 0x0606060606060606
2081 11:28:33.953689 MTRR: Fixed MSR 0x26d 0x0606060606060606
2082 11:28:33.960554 MTRR: Fixed MSR 0x26e 0x0606060606060606
2083 11:28:33.963961 MTRR: Fixed MSR 0x26f 0x0606060606060606
2084 11:28:33.970263 MTRR: Fixed MSR 0x258 0x0606060606060606
2085 11:28:33.970683 call enable_fixed_mtrr()
2086 11:28:33.977213 MTRR: Fixed MSR 0x259 0x0000000000000000
2087 11:28:33.980532 MTRR: Fixed MSR 0x268 0x0606060606060606
2088 11:28:33.983867 MTRR: Fixed MSR 0x269 0x0606060606060606
2089 11:28:33.987197 MTRR: Fixed MSR 0x26a 0x0606060606060606
2090 11:28:33.990267 MTRR: Fixed MSR 0x26b 0x0606060606060606
2091 11:28:33.996957 MTRR: Fixed MSR 0x26c 0x0606060606060606
2092 11:28:34.000331 MTRR: Fixed MSR 0x26d 0x0606060606060606
2093 11:28:34.003583 MTRR: Fixed MSR 0x26e 0x0606060606060606
2094 11:28:34.006556 MTRR: Fixed MSR 0x26f 0x0606060606060606
2095 11:28:34.011262 CPU physical address size: 39 bits
2096 11:28:34.017817 call enable_fixed_mtrr()
2097 11:28:34.021377 CPU physical address size: 39 bits
2098 11:28:34.024229 CPU physical address size: 39 bits
2099 11:28:34.030780 BS: BS_PAYLOAD_LOAD entry times (exec / console): 214 / 6 ms
2100 11:28:34.037288 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2101 11:28:34.041073 Checking segment from ROM address 0xffc02b38
2102 11:28:34.047406 Checking segment from ROM address 0xffc02b54
2103 11:28:34.051061 Loading segment from ROM address 0xffc02b38
2104 11:28:34.053860 code (compression=0)
2105 11:28:34.060626 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2106 11:28:34.070580 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2107 11:28:34.071007 it's not compressed!
2108 11:28:34.211127 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2109 11:28:34.217564 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2110 11:28:34.224655 Loading segment from ROM address 0xffc02b54
2111 11:28:34.225080 Entry Point 0x30000000
2112 11:28:34.227553 Loaded segments
2113 11:28:34.234035 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2114 11:28:34.276889 Finalizing chipset.
2115 11:28:34.280660 Finalizing SMM.
2116 11:28:34.281089 APMC done.
2117 11:28:34.287137 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2118 11:28:34.290398 mp_park_aps done after 0 msecs.
2119 11:28:34.293938 Jumping to boot code at 0x30000000(0x76b25000)
2120 11:28:34.303408 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2121 11:28:34.303838
2122 11:28:34.304177
2123 11:28:34.306487
2124 11:28:34.307131 Starting depthcharge on Voema...
2125 11:28:34.308752 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2126 11:28:34.309451 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2127 11:28:34.310093 Setting prompt string to ['volteer:']
2128 11:28:34.310564 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2129 11:28:34.311254
2130 11:28:34.316782 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2131 11:28:34.317210
2132 11:28:34.323421 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2133 11:28:34.323852
2134 11:28:34.329765 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2135 11:28:34.330191
2136 11:28:34.333401 Failed to find eMMC card reader
2137 11:28:34.333831
2138 11:28:34.334170 Wipe memory regions:
2139 11:28:34.336447
2140 11:28:34.339883 [0x00000000001000, 0x000000000a0000)
2141 11:28:34.340451
2142 11:28:34.342952 [0x00000000100000, 0x00000030000000)
2143 11:28:34.368916
2144 11:28:34.372048 [0x00000032662db0, 0x000000769ef000)
2145 11:28:34.406949
2146 11:28:34.410234 [0x00000100000000, 0x00000280400000)
2147 11:28:34.612998
2148 11:28:34.616405 ec_init: CrosEC protocol v3 supported (256, 256)
2149 11:28:34.616838
2150 11:28:34.623113 update_port_state: port C0 state: usb enable 1 mux conn 0
2151 11:28:34.623645
2152 11:28:34.628972 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2153 11:28:34.633837
2154 11:28:34.636828 pmc_check_ipc_sts: STS_BUSY done after 1512 us
2155 11:28:34.637250
2156 11:28:34.640169 send_conn_disc_msg: pmc_send_cmd succeeded
2157 11:28:35.071901
2158 11:28:35.072455 R8152: Initializing
2159 11:28:35.072810
2160 11:28:35.075371 Version 6 (ocp_data = 5c30)
2161 11:28:35.075849
2162 11:28:35.078820 R8152: Done initializing
2163 11:28:35.079276
2164 11:28:35.081564 Adding net device
2165 11:28:35.384013
2166 11:28:35.387256 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2167 11:28:35.387708
2168 11:28:35.388048
2169 11:28:35.388480
2170 11:28:35.390826 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2172 11:28:35.492196 volteer: tftpboot 192.168.201.1 10657543/tftp-deploy-er6ot6gg/kernel/bzImage 10657543/tftp-deploy-er6ot6gg/kernel/cmdline 10657543/tftp-deploy-er6ot6gg/ramdisk/ramdisk.cpio.gz
2173 11:28:35.492861 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2174 11:28:35.493272 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2175 11:28:35.497804 tftpboot 192.168.201.1 10657543/tftp-deploy-er6ot6gg/kernel/bzImploy-er6ot6gg/kernel/cmdline 10657543/tftp-deploy-er6ot6gg/ramdisk/ramdisk.cpio.gz
2176 11:28:35.498301
2177 11:28:35.498639 Waiting for link
2178 11:28:35.702440
2179 11:28:35.702935 done.
2180 11:28:35.703366
2181 11:28:35.703692 MAC: 00:24:32:30:7b:87
2182 11:28:35.703999
2183 11:28:35.705552 Sending DHCP discover... done.
2184 11:28:35.706015
2185 11:28:35.708824 Waiting for reply... done.
2186 11:28:35.709299
2187 11:28:35.712120 Sending DHCP request... done.
2188 11:28:35.712681
2189 11:28:35.715155 Waiting for reply... done.
2190 11:28:35.715608
2191 11:28:35.718675 My ip is 192.168.201.19
2192 11:28:35.719124
2193 11:28:35.722039 The DHCP server ip is 192.168.201.1
2194 11:28:35.722504
2195 11:28:35.725343 TFTP server IP predefined by user: 192.168.201.1
2196 11:28:35.725811
2197 11:28:35.731785 Bootfile predefined by user: 10657543/tftp-deploy-er6ot6gg/kernel/bzImage
2198 11:28:35.732268
2199 11:28:35.735344 Sending tftp read request... done.
2200 11:28:35.738605
2201 11:28:35.744787 Waiting for the transfer...
2202 11:28:35.745292
2203 11:28:36.396892 00000000 ################################################################
2204 11:28:36.397451
2205 11:28:36.959830 00080000 ################################################################
2206 11:28:36.960005
2207 11:28:37.540005 00100000 ################################################################
2208 11:28:37.540194
2209 11:28:38.122496 00180000 ################################################################
2210 11:28:38.122673
2211 11:28:38.756265 00200000 ################################################################
2212 11:28:38.756942
2213 11:28:39.400995 00280000 ################################################################
2214 11:28:39.401508
2215 11:28:40.037717 00300000 ################################################################
2216 11:28:40.037878
2217 11:28:40.579544 00380000 ################################################################
2218 11:28:40.579737
2219 11:28:41.113198 00400000 ################################################################
2220 11:28:41.113398
2221 11:28:41.649611 00480000 ################################################################
2222 11:28:41.649801
2223 11:28:42.175562 00500000 ################################################################
2224 11:28:42.175730
2225 11:28:42.703018 00580000 ################################################################
2226 11:28:42.703179
2227 11:28:43.234195 00600000 ################################################################
2228 11:28:43.234383
2229 11:28:43.759862 00680000 ################################################################
2230 11:28:43.760021
2231 11:28:44.280008 00700000 ################################################################
2232 11:28:44.280200
2233 11:28:44.788809 00780000 ################################################################
2234 11:28:44.788999
2235 11:28:45.303920 00800000 ################################################################
2236 11:28:45.304098
2237 11:28:45.819612 00880000 ################################################################
2238 11:28:45.819812
2239 11:28:46.348605 00900000 ################################################################
2240 11:28:46.348764
2241 11:28:46.863385 00980000 ################################################################
2242 11:28:46.863548
2243 11:28:47.233387 00a00000 ############################################### done.
2244 11:28:47.233543
2245 11:28:47.236671 The bootfile was 10863104 bytes long.
2246 11:28:47.236767
2247 11:28:47.240484 Sending tftp read request... done.
2248 11:28:47.240579
2249 11:28:47.243763 Waiting for the transfer...
2250 11:28:47.243856
2251 11:28:47.779098 00000000 ################################################################
2252 11:28:47.779289
2253 11:28:48.299116 00080000 ################################################################
2254 11:28:48.299276
2255 11:28:48.860129 00100000 ################################################################
2256 11:28:48.860702
2257 11:28:49.442139 00180000 ################################################################
2258 11:28:49.442288
2259 11:28:49.967611 00200000 ################################################################
2260 11:28:49.967790
2261 11:28:50.512597 00280000 ################################################################
2262 11:28:50.512772
2263 11:28:51.038276 00300000 ################################################################
2264 11:28:51.038419
2265 11:28:51.585898 00380000 ################################################################
2266 11:28:51.586052
2267 11:28:52.159793 00400000 ################################################################
2268 11:28:52.159943
2269 11:28:52.811531 00480000 ################################################################
2270 11:28:52.812039
2271 11:28:53.382293 00500000 ################################################################
2272 11:28:53.382462
2273 11:28:54.010713 00580000 ################################################################
2274 11:28:54.011205
2275 11:28:54.154859 00600000 ############## done.
2276 11:28:54.155345
2277 11:28:54.158148 Sending tftp read request... done.
2278 11:28:54.158600
2279 11:28:54.161759 Waiting for the transfer...
2280 11:28:54.162340
2281 11:28:54.164640 00000000 # done.
2282 11:28:54.165074
2283 11:28:54.171333 Command line loaded dynamically from TFTP file: 10657543/tftp-deploy-er6ot6gg/kernel/cmdline
2284 11:28:54.171761
2285 11:28:54.194382 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10657543/extract-nfsrootfs-hqtzozas,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2286 11:28:54.199703
2287 11:28:54.203199 Shutting down all USB controllers.
2288 11:28:54.203628
2289 11:28:54.203984 Removing current net device
2290 11:28:54.204569
2291 11:28:54.206240 Finalizing coreboot
2292 11:28:54.206665
2293 11:28:54.212738 Exiting depthcharge with code 4 at timestamp: 28543419
2294 11:28:54.213167
2295 11:28:54.213560
2296 11:28:54.214054 Starting kernel ...
2297 11:28:54.214422
2298 11:28:54.214730
2299 11:28:54.215878 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2300 11:28:54.216407 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2301 11:28:54.216850 Setting prompt string to ['Linux version [0-9]']
2302 11:28:54.217386 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2303 11:28:54.217780 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2305 11:33:19.217329 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2307 11:33:19.218336 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2309 11:33:19.219119 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2312 11:33:19.220453 end: 2 depthcharge-action (duration 00:05:00) [common]
2314 11:33:19.221539 Cleaning after the job
2315 11:33:19.221637 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10657543/tftp-deploy-er6ot6gg/ramdisk
2316 11:33:19.222562 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10657543/tftp-deploy-er6ot6gg/kernel
2317 11:33:19.223954 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10657543/tftp-deploy-er6ot6gg/nfsrootfs
2318 11:33:19.314799 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10657543/tftp-deploy-er6ot6gg/modules
2319 11:33:19.315515 start: 4.1 power-off (timeout 00:00:30) [common]
2320 11:33:19.315701 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-4' '--port=1' '--command=off'
2321 11:33:19.398414 >> Command sent successfully.
2322 11:33:19.408461 Returned 0 in 0 seconds
2323 11:33:19.509699 end: 4.1 power-off (duration 00:00:00) [common]
2325 11:33:19.511138 start: 4.2 read-feedback (timeout 00:10:00) [common]
2326 11:33:19.512271 Listened to connection for namespace 'common' for up to 1s
2327 11:33:20.512586 Finalising connection for namespace 'common'
2328 11:33:20.513225 Disconnecting from shell: Finalise
2329 11:33:20.513609
2330 11:33:20.614547 end: 4.2 read-feedback (duration 00:00:01) [common]
2331 11:33:20.615138 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10657543
2332 11:33:21.054273 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10657543
2333 11:33:21.054461 JobError: Your job cannot terminate cleanly.