Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
1 11:43:02.404560 lava-dispatcher, installed at version: 2023.05.1
2 11:43:02.404777 start: 0 validate
3 11:43:02.404920 Start time: 2023-06-09 11:43:02.404912+00:00 (UTC)
4 11:43:02.405044 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:43:02.405186 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230527.0%2Famd64%2Finitrd.cpio.gz exists
6 11:43:02.672333 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:43:02.673209 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.283-cip98-224-g5f5303d7920a9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:43:02.945367 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:43:02.946206 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230527.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 11:43:03.207363 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:43:03.208427 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.283-cip98-224-g5f5303d7920a9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 11:43:03.484513 validate duration: 1.08
14 11:43:03.485784 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 11:43:03.486381 start: 1.1 download-retry (timeout 00:10:00) [common]
16 11:43:03.486875 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 11:43:03.487524 Not decompressing ramdisk as can be used compressed.
18 11:43:03.488168 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230527.0/amd64/initrd.cpio.gz
19 11:43:03.488555 saving as /var/lib/lava/dispatcher/tmp/10657578/tftp-deploy-nxpk8m16/ramdisk/initrd.cpio.gz
20 11:43:03.488902 total size: 5671546 (5MB)
21 11:43:03.494111 progress 0% (0MB)
22 11:43:03.502243 progress 5% (0MB)
23 11:43:03.509220 progress 10% (0MB)
24 11:43:03.513592 progress 15% (0MB)
25 11:43:03.517597 progress 20% (1MB)
26 11:43:03.521002 progress 25% (1MB)
27 11:43:03.523715 progress 30% (1MB)
28 11:43:03.526623 progress 35% (1MB)
29 11:43:03.529060 progress 40% (2MB)
30 11:43:03.531188 progress 45% (2MB)
31 11:43:03.533375 progress 50% (2MB)
32 11:43:03.535468 progress 55% (3MB)
33 11:43:03.537286 progress 60% (3MB)
34 11:43:03.539147 progress 65% (3MB)
35 11:43:03.541037 progress 70% (3MB)
36 11:43:03.542643 progress 75% (4MB)
37 11:43:03.544356 progress 80% (4MB)
38 11:43:03.546058 progress 85% (4MB)
39 11:43:03.547574 progress 90% (4MB)
40 11:43:03.549249 progress 95% (5MB)
41 11:43:03.550905 progress 100% (5MB)
42 11:43:03.551022 5MB downloaded in 0.06s (87.06MB/s)
43 11:43:03.551176 end: 1.1.1 http-download (duration 00:00:00) [common]
45 11:43:03.551436 end: 1.1 download-retry (duration 00:00:00) [common]
46 11:43:03.551567 start: 1.2 download-retry (timeout 00:10:00) [common]
47 11:43:03.551656 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 11:43:03.551794 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.283-cip98-224-g5f5303d7920a9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 11:43:03.551882 saving as /var/lib/lava/dispatcher/tmp/10657578/tftp-deploy-nxpk8m16/kernel/bzImage
50 11:43:03.551990 total size: 10863104 (10MB)
51 11:43:03.552055 No compression specified
52 11:43:03.553215 progress 0% (0MB)
53 11:43:03.556278 progress 5% (0MB)
54 11:43:03.559552 progress 10% (1MB)
55 11:43:03.562591 progress 15% (1MB)
56 11:43:03.565817 progress 20% (2MB)
57 11:43:03.568903 progress 25% (2MB)
58 11:43:03.572099 progress 30% (3MB)
59 11:43:03.575196 progress 35% (3MB)
60 11:43:03.578174 progress 40% (4MB)
61 11:43:03.581341 progress 45% (4MB)
62 11:43:03.584313 progress 50% (5MB)
63 11:43:03.587496 progress 55% (5MB)
64 11:43:03.590539 progress 60% (6MB)
65 11:43:03.593681 progress 65% (6MB)
66 11:43:03.596827 progress 70% (7MB)
67 11:43:03.599785 progress 75% (7MB)
68 11:43:03.602831 progress 80% (8MB)
69 11:43:03.605730 progress 85% (8MB)
70 11:43:03.608806 progress 90% (9MB)
71 11:43:03.611717 progress 95% (9MB)
72 11:43:03.614783 progress 100% (10MB)
73 11:43:03.614968 10MB downloaded in 0.06s (164.51MB/s)
74 11:43:03.615120 end: 1.2.1 http-download (duration 00:00:00) [common]
76 11:43:03.615365 end: 1.2 download-retry (duration 00:00:00) [common]
77 11:43:03.615464 start: 1.3 download-retry (timeout 00:10:00) [common]
78 11:43:03.615557 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 11:43:03.615713 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230527.0/amd64/full.rootfs.tar.xz
80 11:43:03.615794 saving as /var/lib/lava/dispatcher/tmp/10657578/tftp-deploy-nxpk8m16/nfsrootfs/full.rootfs.tar
81 11:43:03.615867 total size: 125914312 (120MB)
82 11:43:03.615939 Using unxz to decompress xz
83 11:43:03.619772 progress 0% (0MB)
84 11:43:04.142731 progress 5% (6MB)
85 11:43:04.671482 progress 10% (12MB)
86 11:43:05.203498 progress 15% (18MB)
87 11:43:05.745426 progress 20% (24MB)
88 11:43:06.114231 progress 25% (30MB)
89 11:43:06.485273 progress 30% (36MB)
90 11:43:06.780019 progress 35% (42MB)
91 11:43:07.006710 progress 40% (48MB)
92 11:43:07.406439 progress 45% (54MB)
93 11:43:07.807540 progress 50% (60MB)
94 11:43:08.175457 progress 55% (66MB)
95 11:43:08.564420 progress 60% (72MB)
96 11:43:08.930440 progress 65% (78MB)
97 11:43:09.351919 progress 70% (84MB)
98 11:43:09.804254 progress 75% (90MB)
99 11:43:10.260127 progress 80% (96MB)
100 11:43:10.361570 progress 85% (102MB)
101 11:43:10.536211 progress 90% (108MB)
102 11:43:10.902777 progress 95% (114MB)
103 11:43:11.306498 progress 100% (120MB)
104 11:43:11.312741 120MB downloaded in 7.70s (15.60MB/s)
105 11:43:11.313046 end: 1.3.1 http-download (duration 00:00:08) [common]
107 11:43:11.313335 end: 1.3 download-retry (duration 00:00:08) [common]
108 11:43:11.313441 start: 1.4 download-retry (timeout 00:09:52) [common]
109 11:43:11.313539 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 11:43:11.313698 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.283-cip98-224-g5f5303d7920a9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 11:43:11.313778 saving as /var/lib/lava/dispatcher/tmp/10657578/tftp-deploy-nxpk8m16/modules/modules.tar
112 11:43:11.313846 total size: 484428 (0MB)
113 11:43:11.313915 Using unxz to decompress xz
114 11:43:11.317693 progress 6% (0MB)
115 11:43:11.318119 progress 13% (0MB)
116 11:43:11.318375 progress 20% (0MB)
117 11:43:11.319965 progress 27% (0MB)
118 11:43:11.322411 progress 33% (0MB)
119 11:43:11.324773 progress 40% (0MB)
120 11:43:11.327392 progress 47% (0MB)
121 11:43:11.329734 progress 54% (0MB)
122 11:43:11.331652 progress 60% (0MB)
123 11:43:11.333807 progress 67% (0MB)
124 11:43:11.336071 progress 74% (0MB)
125 11:43:11.338355 progress 81% (0MB)
126 11:43:11.340423 progress 87% (0MB)
127 11:43:11.342734 progress 94% (0MB)
128 11:43:11.344762 progress 100% (0MB)
129 11:43:11.351362 0MB downloaded in 0.04s (12.32MB/s)
130 11:43:11.351634 end: 1.4.1 http-download (duration 00:00:00) [common]
132 11:43:11.351920 end: 1.4 download-retry (duration 00:00:00) [common]
133 11:43:11.352029 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
134 11:43:11.352155 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
135 11:43:14.320244 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10657578/extract-nfsrootfs-vgs5u023
136 11:43:14.320455 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
137 11:43:14.320565 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
138 11:43:14.320753 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10657578/lava-overlay-80v63zx6
139 11:43:14.320895 makedir: /var/lib/lava/dispatcher/tmp/10657578/lava-overlay-80v63zx6/lava-10657578/bin
140 11:43:14.321009 makedir: /var/lib/lava/dispatcher/tmp/10657578/lava-overlay-80v63zx6/lava-10657578/tests
141 11:43:14.321117 makedir: /var/lib/lava/dispatcher/tmp/10657578/lava-overlay-80v63zx6/lava-10657578/results
142 11:43:14.321229 Creating /var/lib/lava/dispatcher/tmp/10657578/lava-overlay-80v63zx6/lava-10657578/bin/lava-add-keys
143 11:43:14.321384 Creating /var/lib/lava/dispatcher/tmp/10657578/lava-overlay-80v63zx6/lava-10657578/bin/lava-add-sources
144 11:43:14.321574 Creating /var/lib/lava/dispatcher/tmp/10657578/lava-overlay-80v63zx6/lava-10657578/bin/lava-background-process-start
145 11:43:14.321719 Creating /var/lib/lava/dispatcher/tmp/10657578/lava-overlay-80v63zx6/lava-10657578/bin/lava-background-process-stop
146 11:43:14.321858 Creating /var/lib/lava/dispatcher/tmp/10657578/lava-overlay-80v63zx6/lava-10657578/bin/lava-common-functions
147 11:43:14.321995 Creating /var/lib/lava/dispatcher/tmp/10657578/lava-overlay-80v63zx6/lava-10657578/bin/lava-echo-ipv4
148 11:43:14.322132 Creating /var/lib/lava/dispatcher/tmp/10657578/lava-overlay-80v63zx6/lava-10657578/bin/lava-install-packages
149 11:43:14.322271 Creating /var/lib/lava/dispatcher/tmp/10657578/lava-overlay-80v63zx6/lava-10657578/bin/lava-installed-packages
150 11:43:14.322405 Creating /var/lib/lava/dispatcher/tmp/10657578/lava-overlay-80v63zx6/lava-10657578/bin/lava-os-build
151 11:43:14.322541 Creating /var/lib/lava/dispatcher/tmp/10657578/lava-overlay-80v63zx6/lava-10657578/bin/lava-probe-channel
152 11:43:14.322675 Creating /var/lib/lava/dispatcher/tmp/10657578/lava-overlay-80v63zx6/lava-10657578/bin/lava-probe-ip
153 11:43:14.322817 Creating /var/lib/lava/dispatcher/tmp/10657578/lava-overlay-80v63zx6/lava-10657578/bin/lava-target-ip
154 11:43:14.322952 Creating /var/lib/lava/dispatcher/tmp/10657578/lava-overlay-80v63zx6/lava-10657578/bin/lava-target-mac
155 11:43:14.323085 Creating /var/lib/lava/dispatcher/tmp/10657578/lava-overlay-80v63zx6/lava-10657578/bin/lava-target-storage
156 11:43:14.323221 Creating /var/lib/lava/dispatcher/tmp/10657578/lava-overlay-80v63zx6/lava-10657578/bin/lava-test-case
157 11:43:14.323355 Creating /var/lib/lava/dispatcher/tmp/10657578/lava-overlay-80v63zx6/lava-10657578/bin/lava-test-event
158 11:43:14.323496 Creating /var/lib/lava/dispatcher/tmp/10657578/lava-overlay-80v63zx6/lava-10657578/bin/lava-test-feedback
159 11:43:14.323636 Creating /var/lib/lava/dispatcher/tmp/10657578/lava-overlay-80v63zx6/lava-10657578/bin/lava-test-raise
160 11:43:14.323769 Creating /var/lib/lava/dispatcher/tmp/10657578/lava-overlay-80v63zx6/lava-10657578/bin/lava-test-reference
161 11:43:14.323903 Creating /var/lib/lava/dispatcher/tmp/10657578/lava-overlay-80v63zx6/lava-10657578/bin/lava-test-runner
162 11:43:14.324036 Creating /var/lib/lava/dispatcher/tmp/10657578/lava-overlay-80v63zx6/lava-10657578/bin/lava-test-set
163 11:43:14.324169 Creating /var/lib/lava/dispatcher/tmp/10657578/lava-overlay-80v63zx6/lava-10657578/bin/lava-test-shell
164 11:43:14.324304 Updating /var/lib/lava/dispatcher/tmp/10657578/lava-overlay-80v63zx6/lava-10657578/bin/lava-install-packages (oe)
165 11:43:14.324468 Updating /var/lib/lava/dispatcher/tmp/10657578/lava-overlay-80v63zx6/lava-10657578/bin/lava-installed-packages (oe)
166 11:43:14.324607 Creating /var/lib/lava/dispatcher/tmp/10657578/lava-overlay-80v63zx6/lava-10657578/environment
167 11:43:14.324714 LAVA metadata
168 11:43:14.324796 - LAVA_JOB_ID=10657578
169 11:43:14.324866 - LAVA_DISPATCHER_IP=192.168.201.1
170 11:43:14.324975 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
171 11:43:14.325050 skipped lava-vland-overlay
172 11:43:14.325132 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 11:43:14.325220 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
174 11:43:14.325287 skipped lava-multinode-overlay
175 11:43:14.325367 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 11:43:14.325455 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
177 11:43:14.325535 Loading test definitions
178 11:43:14.325633 start: 1.5.2.3.1 git-repo-action (timeout 00:09:49) [common]
179 11:43:14.325712 Using /lava-10657578 at stage 0
180 11:43:14.325818 Fetching tests from https://github.com/kernelci/test-definitions
181 11:43:14.325904 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/10657578/lava-overlay-80v63zx6/lava-10657578/0/tests/0_ltp-timers'
182 11:43:18.921098 Running '/usr/bin/git checkout kernelci.org
183 11:43:19.079180 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/10657578/lava-overlay-80v63zx6/lava-10657578/0/tests/0_ltp-timers/automated/linux/ltp-open-posix/ltp-open-posix.yaml
184 11:43:19.079972 uuid=10657578_1.5.2.3.1 testdef=None
185 11:43:19.080226 end: 1.5.2.3.1 git-repo-action (duration 00:00:05) [common]
187 11:43:19.080542 start: 1.5.2.3.2 test-overlay (timeout 00:09:44) [common]
188 11:43:19.081271 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
190 11:43:19.081532 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:44) [common]
191 11:43:19.082464 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
193 11:43:19.082726 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:44) [common]
194 11:43:19.083720 runner path: /var/lib/lava/dispatcher/tmp/10657578/lava-overlay-80v63zx6/lava-10657578/0/tests/0_ltp-timers test_uuid 10657578_1.5.2.3.1
195 11:43:19.083820 GRP_TEST='TMR'
196 11:43:19.083889 SKIPFILE='skipfile-lkft.yaml'
197 11:43:19.083954 SKIP_INSTALL='true'
198 11:43:19.084016 TST_CMDFILES=''
199 11:43:19.084168 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
201 11:43:19.084392 Creating lava-test-runner.conf files
202 11:43:19.084460 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10657578/lava-overlay-80v63zx6/lava-10657578/0 for stage 0
203 11:43:19.084557 - 0_ltp-timers
204 11:43:19.084672 end: 1.5.2.3 test-definition (duration 00:00:05) [common]
205 11:43:19.084772 start: 1.5.2.4 compress-overlay (timeout 00:09:44) [common]
206 11:43:27.494321 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
207 11:43:27.494493 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:36) [common]
208 11:43:27.494600 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 11:43:27.494709 end: 1.5.2 lava-overlay (duration 00:00:13) [common]
210 11:43:27.494808 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:36) [common]
211 11:43:27.643219 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 11:43:27.643671 start: 1.5.4 extract-modules (timeout 00:09:36) [common]
213 11:43:27.643797 extracting modules file /var/lib/lava/dispatcher/tmp/10657578/tftp-deploy-nxpk8m16/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10657578/extract-nfsrootfs-vgs5u023
214 11:43:27.665093 extracting modules file /var/lib/lava/dispatcher/tmp/10657578/tftp-deploy-nxpk8m16/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10657578/extract-overlay-ramdisk-0m00yyam/ramdisk
215 11:43:27.686248 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 11:43:27.686403 start: 1.5.5 apply-overlay-tftp (timeout 00:09:36) [common]
217 11:43:27.686501 [common] Applying overlay to NFS
218 11:43:27.686580 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10657578/compress-overlay-qo3aq8xi/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10657578/extract-nfsrootfs-vgs5u023
219 11:43:28.677978 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
220 11:43:28.678159 start: 1.5.6 configure-preseed-file (timeout 00:09:35) [common]
221 11:43:28.678265 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 11:43:28.678366 start: 1.5.7 compress-ramdisk (timeout 00:09:35) [common]
223 11:43:28.678462 Building ramdisk /var/lib/lava/dispatcher/tmp/10657578/extract-overlay-ramdisk-0m00yyam/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10657578/extract-overlay-ramdisk-0m00yyam/ramdisk
224 11:43:28.761290 >> 31370 blocks
225 11:43:29.431560 rename /var/lib/lava/dispatcher/tmp/10657578/extract-overlay-ramdisk-0m00yyam/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10657578/tftp-deploy-nxpk8m16/ramdisk/ramdisk.cpio.gz
226 11:43:29.432018 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 11:43:29.432146 start: 1.5.8 prepare-kernel (timeout 00:09:34) [common]
228 11:43:29.432259 start: 1.5.8.1 prepare-fit (timeout 00:09:34) [common]
229 11:43:29.432360 No mkimage arch provided, not using FIT.
230 11:43:29.432457 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 11:43:29.432549 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 11:43:29.432660 end: 1.5 prepare-tftp-overlay (duration 00:00:18) [common]
233 11:43:29.432759 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:34) [common]
234 11:43:29.432843 No LXC device requested
235 11:43:29.432929 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 11:43:29.433029 start: 1.7 deploy-device-env (timeout 00:09:34) [common]
237 11:43:29.433123 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 11:43:29.433201 Checking files for TFTP limit of 4294967296 bytes.
239 11:43:29.433629 end: 1 tftp-deploy (duration 00:00:26) [common]
240 11:43:29.433739 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 11:43:29.433836 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 11:43:29.433970 substitutions:
243 11:43:29.434040 - {DTB}: None
244 11:43:29.434113 - {INITRD}: 10657578/tftp-deploy-nxpk8m16/ramdisk/ramdisk.cpio.gz
245 11:43:29.434177 - {KERNEL}: 10657578/tftp-deploy-nxpk8m16/kernel/bzImage
246 11:43:29.434237 - {LAVA_MAC}: None
247 11:43:29.434297 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10657578/extract-nfsrootfs-vgs5u023
248 11:43:29.434358 - {NFS_SERVER_IP}: 192.168.201.1
249 11:43:29.434417 - {PRESEED_CONFIG}: None
250 11:43:29.434475 - {PRESEED_LOCAL}: None
251 11:43:29.434532 - {RAMDISK}: 10657578/tftp-deploy-nxpk8m16/ramdisk/ramdisk.cpio.gz
252 11:43:29.434590 - {ROOT_PART}: None
253 11:43:29.434647 - {ROOT}: None
254 11:43:29.434704 - {SERVER_IP}: 192.168.201.1
255 11:43:29.434760 - {TEE}: None
256 11:43:29.434817 Parsed boot commands:
257 11:43:29.434873 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 11:43:29.435054 Parsed boot commands: tftpboot 192.168.201.1 10657578/tftp-deploy-nxpk8m16/kernel/bzImage 10657578/tftp-deploy-nxpk8m16/kernel/cmdline 10657578/tftp-deploy-nxpk8m16/ramdisk/ramdisk.cpio.gz
259 11:43:29.435147 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 11:43:29.435236 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 11:43:29.435335 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 11:43:29.435427 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 11:43:29.435547 Not connected, no need to disconnect.
264 11:43:29.435626 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 11:43:29.435711 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 11:43:29.435782 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
267 11:43:29.439241 Setting prompt string to ['lava-test: # ']
268 11:43:29.439622 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 11:43:29.439749 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 11:43:29.439854 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 11:43:29.439951 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 11:43:29.440150 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
273 11:43:34.593630 >> Command sent successfully.
274 11:43:34.603743 Returned 0 in 5 seconds
275 11:43:34.705022 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 11:43:34.706592 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 11:43:34.707238 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 11:43:34.707854 Setting prompt string to 'Starting depthcharge on Helios...'
280 11:43:34.708274 Changing prompt to 'Starting depthcharge on Helios...'
281 11:43:34.708738 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
282 11:43:34.710051 [Enter `^Ec?' for help]
283 11:43:35.319372
284 11:43:35.319733
285 11:43:35.329785 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
286 11:43:35.333207 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
287 11:43:35.339348 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
288 11:43:35.342373 CPU: AES supported, TXT NOT supported, VT supported
289 11:43:35.349952 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
290 11:43:35.352903 PCH: device id 0284 (rev 00) is Cometlake-U Premium
291 11:43:35.359323 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
292 11:43:35.363060 VBOOT: Loading verstage.
293 11:43:35.366301 FMAP: Found "FLASH" version 1.1 at 0xc04000.
294 11:43:35.372853 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
295 11:43:35.376338 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
296 11:43:35.379766 CBFS @ c08000 size 3f8000
297 11:43:35.386139 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
298 11:43:35.389466 CBFS: Locating 'fallback/verstage'
299 11:43:35.392560 CBFS: Found @ offset 10fb80 size 1072c
300 11:43:35.396212
301 11:43:35.396633
302 11:43:35.406160 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
303 11:43:35.420475 Probing TPM: . done!
304 11:43:35.423550 TPM ready after 0 ms
305 11:43:35.427100 Connected to device vid:did:rid of 1ae0:0028:00
306 11:43:35.436905 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
307 11:43:35.440578 Initialized TPM device CR50 revision 0
308 11:43:35.481840 tlcl_send_startup: Startup return code is 0
309 11:43:35.482295 TPM: setup succeeded
310 11:43:35.494907 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
311 11:43:35.498106 Chrome EC: UHEPI supported
312 11:43:35.501708 Phase 1
313 11:43:35.505381 FMAP: area GBB found @ c05000 (12288 bytes)
314 11:43:35.512138 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
315 11:43:35.512688 Phase 2
316 11:43:35.514942 Phase 3
317 11:43:35.518848 FMAP: area GBB found @ c05000 (12288 bytes)
318 11:43:35.525497 VB2:vb2_report_dev_firmware() This is developer signed firmware
319 11:43:35.531875 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
320 11:43:35.535420 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
321 11:43:35.541757 VB2:vb2_verify_keyblock() Checking keyblock signature...
322 11:43:35.556943 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
323 11:43:35.560798 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
324 11:43:35.567412 VB2:vb2_verify_fw_preamble() Verifying preamble.
325 11:43:35.571141 Phase 4
326 11:43:35.574570 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
327 11:43:35.581308 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
328 11:43:35.760777 VB2:vb2_rsa_verify_digest() Digest check failed!
329 11:43:35.767600 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
330 11:43:35.768174 Saving nvdata
331 11:43:35.770837 Reboot requested (10020007)
332 11:43:35.774392 board_reset() called!
333 11:43:35.774967 full_reset() called!
334 11:43:40.285946
335 11:43:40.286119
336 11:43:40.296275 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
337 11:43:40.299408 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
338 11:43:40.305720 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
339 11:43:40.309079 CPU: AES supported, TXT NOT supported, VT supported
340 11:43:40.316041 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
341 11:43:40.319399 PCH: device id 0284 (rev 00) is Cometlake-U Premium
342 11:43:40.325842 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
343 11:43:40.329412 VBOOT: Loading verstage.
344 11:43:40.332333 FMAP: Found "FLASH" version 1.1 at 0xc04000.
345 11:43:40.338983 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
346 11:43:40.342580 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
347 11:43:40.345621 CBFS @ c08000 size 3f8000
348 11:43:40.352767 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
349 11:43:40.355530 CBFS: Locating 'fallback/verstage'
350 11:43:40.359249 CBFS: Found @ offset 10fb80 size 1072c
351 11:43:40.362913
352 11:43:40.363007
353 11:43:40.372381 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
354 11:43:40.387118 Probing TPM: . done!
355 11:43:40.390567 TPM ready after 0 ms
356 11:43:40.393620 Connected to device vid:did:rid of 1ae0:0028:00
357 11:43:40.403917 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
358 11:43:40.407072 Initialized TPM device CR50 revision 0
359 11:43:40.448079 tlcl_send_startup: Startup return code is 0
360 11:43:40.448187 TPM: setup succeeded
361 11:43:40.461036 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
362 11:43:40.464706 Chrome EC: UHEPI supported
363 11:43:40.468327 Phase 1
364 11:43:40.471122 FMAP: area GBB found @ c05000 (12288 bytes)
365 11:43:40.477831 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
366 11:43:40.484816 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
367 11:43:40.487779 Recovery requested (1009000e)
368 11:43:40.493393 Saving nvdata
369 11:43:40.500078 tlcl_extend: response is 0
370 11:43:40.508435 tlcl_extend: response is 0
371 11:43:40.515623 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
372 11:43:40.519425 CBFS @ c08000 size 3f8000
373 11:43:40.525663 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
374 11:43:40.528845 CBFS: Locating 'fallback/romstage'
375 11:43:40.532143 CBFS: Found @ offset 80 size 145fc
376 11:43:40.535540 Accumulated console time in verstage 98 ms
377 11:43:40.535630
378 11:43:40.535717
379 11:43:40.549037 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
380 11:43:40.555353 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
381 11:43:40.558934 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
382 11:43:40.561955 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
383 11:43:40.568500 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
384 11:43:40.572130 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
385 11:43:40.575147 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
386 11:43:40.578602 TCO_STS: 0000 0000
387 11:43:40.581906 GEN_PMCON: e0015238 00000200
388 11:43:40.585211 GBLRST_CAUSE: 00000000 00000000
389 11:43:40.585296 prev_sleep_state 5
390 11:43:40.588399 Boot Count incremented to 58751
391 11:43:40.595329 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
392 11:43:40.598719 CBFS @ c08000 size 3f8000
393 11:43:40.605767 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
394 11:43:40.605858 CBFS: Locating 'fspm.bin'
395 11:43:40.611730 CBFS: Found @ offset 5ffc0 size 71000
396 11:43:40.615257 Chrome EC: UHEPI supported
397 11:43:40.621836 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
398 11:43:40.625429 Probing TPM: done!
399 11:43:40.631667 Connected to device vid:did:rid of 1ae0:0028:00
400 11:43:40.642085 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
401 11:43:40.647884 Initialized TPM device CR50 revision 0
402 11:43:40.657038 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
403 11:43:40.663298 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
404 11:43:40.666888 MRC cache found, size 1948
405 11:43:40.669984 bootmode is set to: 2
406 11:43:40.673412 PRMRR disabled by config.
407 11:43:40.673498 SPD INDEX = 1
408 11:43:40.680007 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
409 11:43:40.683394 CBFS @ c08000 size 3f8000
410 11:43:40.686895 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
411 11:43:40.690155 CBFS: Locating 'spd.bin'
412 11:43:40.693483 CBFS: Found @ offset 5fb80 size 400
413 11:43:40.696723 SPD: module type is LPDDR3
414 11:43:40.700250 SPD: module part is
415 11:43:40.706884 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
416 11:43:40.710384 SPD: device width 4 bits, bus width 8 bits
417 11:43:40.713285 SPD: module size is 4096 MB (per channel)
418 11:43:40.716774 memory slot: 0 configuration done.
419 11:43:40.719787 memory slot: 2 configuration done.
420 11:43:40.771555 CBMEM:
421 11:43:40.774472 IMD: root @ 99fff000 254 entries.
422 11:43:40.777514 IMD: root @ 99ffec00 62 entries.
423 11:43:40.781131 External stage cache:
424 11:43:40.784296 IMD: root @ 9abff000 254 entries.
425 11:43:40.787753 IMD: root @ 9abfec00 62 entries.
426 11:43:40.791260 Chrome EC: clear events_b mask to 0x0000000020004000
427 11:43:40.807054 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
428 11:43:40.817271 tlcl_write: response is 0
429 11:43:40.829387 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
430 11:43:40.836098 MRC: TPM MRC hash updated successfully.
431 11:43:40.836186 2 DIMMs found
432 11:43:40.839459 SMM Memory Map
433 11:43:40.842969 SMRAM : 0x9a000000 0x1000000
434 11:43:40.845961 Subregion 0: 0x9a000000 0xa00000
435 11:43:40.849496 Subregion 1: 0x9aa00000 0x200000
436 11:43:40.852795 Subregion 2: 0x9ac00000 0x400000
437 11:43:40.856341 top_of_ram = 0x9a000000
438 11:43:40.859501 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
439 11:43:40.865847 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
440 11:43:40.869369 MTRR Range: Start=ff000000 End=0 (Size 1000000)
441 11:43:40.875931 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 11:43:40.878874 CBFS @ c08000 size 3f8000
443 11:43:40.882578 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 11:43:40.886698 CBFS: Locating 'fallback/postcar'
445 11:43:40.889163 CBFS: Found @ offset 107000 size 4b44
446 11:43:40.895705 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
447 11:43:40.908320 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
448 11:43:40.912003 Processing 180 relocs. Offset value of 0x97c0c000
449 11:43:40.919867 Accumulated console time in romstage 286 ms
450 11:43:40.919963
451 11:43:40.920038
452 11:43:40.929991 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
453 11:43:40.936338 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
454 11:43:40.939587 CBFS @ c08000 size 3f8000
455 11:43:40.943134 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
456 11:43:40.949995 CBFS: Locating 'fallback/ramstage'
457 11:43:40.952960 CBFS: Found @ offset 43380 size 1b9e8
458 11:43:40.960005 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
459 11:43:40.991587 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
460 11:43:40.994584 Processing 3976 relocs. Offset value of 0x98db0000
461 11:43:41.001922 Accumulated console time in postcar 52 ms
462 11:43:41.002016
463 11:43:41.002090
464 11:43:41.011344 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
465 11:43:41.018003 FMAP: area RO_VPD found @ c00000 (16384 bytes)
466 11:43:41.021208 WARNING: RO_VPD is uninitialized or empty.
467 11:43:41.024866 FMAP: area RW_VPD found @ af8000 (8192 bytes)
468 11:43:41.031507 FMAP: area RW_VPD found @ af8000 (8192 bytes)
469 11:43:41.031602 Normal boot.
470 11:43:41.037965 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
471 11:43:41.041366 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
472 11:43:41.044597 CBFS @ c08000 size 3f8000
473 11:43:41.051608 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
474 11:43:41.054651 CBFS: Locating 'cpu_microcode_blob.bin'
475 11:43:41.057886 CBFS: Found @ offset 14700 size 2ec00
476 11:43:41.061321 microcode: sig=0x806ec pf=0x4 revision=0xc9
477 11:43:41.064436 Skip microcode update
478 11:43:41.067960 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
479 11:43:41.071394 CBFS @ c08000 size 3f8000
480 11:43:41.077887 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
481 11:43:41.081548 CBFS: Locating 'fsps.bin'
482 11:43:41.084572 CBFS: Found @ offset d1fc0 size 35000
483 11:43:41.109961 Detected 4 core, 8 thread CPU.
484 11:43:41.113324 Setting up SMI for CPU
485 11:43:41.116580 IED base = 0x9ac00000
486 11:43:41.116675 IED size = 0x00400000
487 11:43:41.119856 Will perform SMM setup.
488 11:43:41.126160 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
489 11:43:41.132647 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
490 11:43:41.139616 Processing 16 relocs. Offset value of 0x00030000
491 11:43:41.139711 Attempting to start 7 APs
492 11:43:41.146113 Waiting for 10ms after sending INIT.
493 11:43:41.159696 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
494 11:43:41.159788 done.
495 11:43:41.163126 AP: slot 1 apic_id 2.
496 11:43:41.166535 AP: slot 3 apic_id 3.
497 11:43:41.166617 AP: slot 4 apic_id 7.
498 11:43:41.169303 AP: slot 7 apic_id 6.
499 11:43:41.172807 Waiting for 2nd SIPI to complete...done.
500 11:43:41.176420 AP: slot 5 apic_id 5.
501 11:43:41.179773 AP: slot 6 apic_id 4.
502 11:43:41.186165 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
503 11:43:41.189655 Processing 13 relocs. Offset value of 0x00038000
504 11:43:41.196195 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
505 11:43:41.199869 Installing SMM handler to 0x9a000000
506 11:43:41.209579 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
507 11:43:41.212986 Processing 658 relocs. Offset value of 0x9a010000
508 11:43:41.222807 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
509 11:43:41.226126 Processing 13 relocs. Offset value of 0x9a008000
510 11:43:41.232743 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
511 11:43:41.239510 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
512 11:43:41.242719 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
513 11:43:41.249700 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
514 11:43:41.255870 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
515 11:43:41.262577 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
516 11:43:41.266641 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
517 11:43:41.272597 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
518 11:43:41.275918 Clearing SMI status registers
519 11:43:41.279463 SMI_STS: PM1
520 11:43:41.279635 PM1_STS: PWRBTN
521 11:43:41.283086 TCO_STS: SECOND_TO
522 11:43:41.286438 New SMBASE 0x9a000000
523 11:43:41.286614 In relocation handler: CPU 0
524 11:43:41.293156 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
525 11:43:41.296237 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 11:43:41.299678 Relocation complete.
527 11:43:41.299996 New SMBASE 0x99fff800
528 11:43:41.302704 In relocation handler: CPU 2
529 11:43:41.309559 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
530 11:43:41.313333 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 11:43:41.316197 Relocation complete.
532 11:43:41.316824 New SMBASE 0x99fff000
533 11:43:41.319776 In relocation handler: CPU 4
534 11:43:41.326407 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
535 11:43:41.329587 Writing SMRR. base = 0x9a000006, mask=0xff000800
536 11:43:41.332921 Relocation complete.
537 11:43:41.333442 New SMBASE 0x99fff400
538 11:43:41.336275 In relocation handler: CPU 3
539 11:43:41.339419 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
540 11:43:41.346342 Writing SMRR. base = 0x9a000006, mask=0xff000800
541 11:43:41.349517 Relocation complete.
542 11:43:41.350151 New SMBASE 0x99fffc00
543 11:43:41.353062 In relocation handler: CPU 1
544 11:43:41.356425 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
545 11:43:41.363138 Writing SMRR. base = 0x9a000006, mask=0xff000800
546 11:43:41.363627 Relocation complete.
547 11:43:41.366255 New SMBASE 0x99ffe400
548 11:43:41.369831 In relocation handler: CPU 7
549 11:43:41.373037 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
550 11:43:41.379572 Writing SMRR. base = 0x9a000006, mask=0xff000800
551 11:43:41.380010 Relocation complete.
552 11:43:41.383215 New SMBASE 0x99ffe800
553 11:43:41.386222 In relocation handler: CPU 6
554 11:43:41.389743 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
555 11:43:41.396349 Writing SMRR. base = 0x9a000006, mask=0xff000800
556 11:43:41.396855 Relocation complete.
557 11:43:41.399512 New SMBASE 0x99ffec00
558 11:43:41.403250 In relocation handler: CPU 5
559 11:43:41.406244 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
560 11:43:41.412873 Writing SMRR. base = 0x9a000006, mask=0xff000800
561 11:43:41.413306 Relocation complete.
562 11:43:41.416305 Initializing CPU #0
563 11:43:41.419354 CPU: vendor Intel device 806ec
564 11:43:41.423106 CPU: family 06, model 8e, stepping 0c
565 11:43:41.426117 Clearing out pending MCEs
566 11:43:41.429584 Setting up local APIC...
567 11:43:41.430009 apic_id: 0x00 done.
568 11:43:41.433078 Turbo is available but hidden
569 11:43:41.436603 Turbo is available and visible
570 11:43:41.440053 VMX status: enabled
571 11:43:41.443171 IA32_FEATURE_CONTROL status: locked
572 11:43:41.443628 Skip microcode update
573 11:43:41.446427 CPU #0 initialized
574 11:43:41.449830 Initializing CPU #2
575 11:43:41.450261 Initializing CPU #4
576 11:43:41.452635 Initializing CPU #7
577 11:43:41.455915 CPU: vendor Intel device 806ec
578 11:43:41.459302 CPU: family 06, model 8e, stepping 0c
579 11:43:41.462717 CPU: vendor Intel device 806ec
580 11:43:41.466746 CPU: family 06, model 8e, stepping 0c
581 11:43:41.469039 Clearing out pending MCEs
582 11:43:41.472384 Clearing out pending MCEs
583 11:43:41.472506 Setting up local APIC...
584 11:43:41.475546 Initializing CPU #1
585 11:43:41.479046 Initializing CPU #3
586 11:43:41.482597 CPU: vendor Intel device 806ec
587 11:43:41.485522 CPU: family 06, model 8e, stepping 0c
588 11:43:41.488808 CPU: vendor Intel device 806ec
589 11:43:41.492087 CPU: family 06, model 8e, stepping 0c
590 11:43:41.495229 Clearing out pending MCEs
591 11:43:41.495322 Clearing out pending MCEs
592 11:43:41.498716 Setting up local APIC...
593 11:43:41.502243 Setting up local APIC...
594 11:43:41.505428 CPU: vendor Intel device 806ec
595 11:43:41.508799 CPU: family 06, model 8e, stepping 0c
596 11:43:41.512369 apic_id: 0x06 done.
597 11:43:41.512461 apic_id: 0x07 done.
598 11:43:41.515964 VMX status: enabled
599 11:43:41.518922 VMX status: enabled
600 11:43:41.521926 IA32_FEATURE_CONTROL status: locked
601 11:43:41.522019 Initializing CPU #6
602 11:43:41.525403 Initializing CPU #5
603 11:43:41.528886 CPU: vendor Intel device 806ec
604 11:43:41.532052 CPU: family 06, model 8e, stepping 0c
605 11:43:41.535754 CPU: vendor Intel device 806ec
606 11:43:41.538978 CPU: family 06, model 8e, stepping 0c
607 11:43:41.542147 apic_id: 0x03 done.
608 11:43:41.542267 Setting up local APIC...
609 11:43:41.545530 Clearing out pending MCEs
610 11:43:41.548828 apic_id: 0x02 done.
611 11:43:41.548956 VMX status: enabled
612 11:43:41.552131 VMX status: enabled
613 11:43:41.555314 IA32_FEATURE_CONTROL status: locked
614 11:43:41.558735 IA32_FEATURE_CONTROL status: locked
615 11:43:41.561881 Skip microcode update
616 11:43:41.565319 Skip microcode update
617 11:43:41.565549 CPU #3 initialized
618 11:43:41.568797 CPU #1 initialized
619 11:43:41.571737 Setting up local APIC...
620 11:43:41.572017 Clearing out pending MCEs
621 11:43:41.575146 apic_id: 0x01 done.
622 11:43:41.579071 Skip microcode update
623 11:43:41.582476 IA32_FEATURE_CONTROL status: locked
624 11:43:41.583005 CPU #7 initialized
625 11:43:41.586093 Clearing out pending MCEs
626 11:43:41.589127 Setting up local APIC...
627 11:43:41.592249 Skip microcode update
628 11:43:41.592682 apic_id: 0x04 done.
629 11:43:41.595889 Setting up local APIC...
630 11:43:41.598883 CPU #4 initialized
631 11:43:41.599314 VMX status: enabled
632 11:43:41.601952 VMX status: enabled
633 11:43:41.602388 apic_id: 0x05 done.
634 11:43:41.609059 IA32_FEATURE_CONTROL status: locked
635 11:43:41.609790 VMX status: enabled
636 11:43:41.612154 Skip microcode update
637 11:43:41.615596 IA32_FEATURE_CONTROL status: locked
638 11:43:41.616031 CPU #6 initialized
639 11:43:41.622608 IA32_FEATURE_CONTROL status: locked
640 11:43:41.623140 Skip microcode update
641 11:43:41.625598 Skip microcode update
642 11:43:41.629230 CPU #2 initialized
643 11:43:41.629762 CPU #5 initialized
644 11:43:41.632277 bsp_do_flight_plan done after 457 msecs.
645 11:43:41.635772 CPU: frequency set to 4200 MHz
646 11:43:41.638725 Enabling SMIs.
647 11:43:41.639197 Locking SMM.
648 11:43:41.653834 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
649 11:43:41.657449 CBFS @ c08000 size 3f8000
650 11:43:41.664054 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
651 11:43:41.664493 CBFS: Locating 'vbt.bin'
652 11:43:41.667274 CBFS: Found @ offset 5f5c0 size 499
653 11:43:41.673950 Found a VBT of 4608 bytes after decompression
654 11:43:41.855352 Display FSP Version Info HOB
655 11:43:41.858812 Reference Code - CPU = 9.0.1e.30
656 11:43:41.861625 uCode Version = 0.0.0.ca
657 11:43:41.865074 TXT ACM version = ff.ff.ff.ffff
658 11:43:41.868235 Display FSP Version Info HOB
659 11:43:41.871548 Reference Code - ME = 9.0.1e.30
660 11:43:41.875099 MEBx version = 0.0.0.0
661 11:43:41.878438 ME Firmware Version = Consumer SKU
662 11:43:41.881764 Display FSP Version Info HOB
663 11:43:41.884921 Reference Code - CML PCH = 9.0.1e.30
664 11:43:41.888404 PCH-CRID Status = Disabled
665 11:43:41.891696 PCH-CRID Original Value = ff.ff.ff.ffff
666 11:43:41.894987 PCH-CRID New Value = ff.ff.ff.ffff
667 11:43:41.898409 OPROM - RST - RAID = ff.ff.ff.ffff
668 11:43:41.902184 ChipsetInit Base Version = ff.ff.ff.ffff
669 11:43:41.905113 ChipsetInit Oem Version = ff.ff.ff.ffff
670 11:43:41.908536 Display FSP Version Info HOB
671 11:43:41.914902 Reference Code - SA - System Agent = 9.0.1e.30
672 11:43:41.918698 Reference Code - MRC = 0.7.1.6c
673 11:43:41.919316 SA - PCIe Version = 9.0.1e.30
674 11:43:41.921650 SA-CRID Status = Disabled
675 11:43:41.925161 SA-CRID Original Value = 0.0.0.c
676 11:43:41.928108 SA-CRID New Value = 0.0.0.c
677 11:43:41.931545 OPROM - VBIOS = ff.ff.ff.ffff
678 11:43:41.931935 RTC Init
679 11:43:41.938692 Set power on after power failure.
680 11:43:41.939211 Disabling Deep S3
681 11:43:41.942093 Disabling Deep S3
682 11:43:41.942523 Disabling Deep S4
683 11:43:41.945345 Disabling Deep S4
684 11:43:41.945779 Disabling Deep S5
685 11:43:41.948367 Disabling Deep S5
686 11:43:41.954890 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 192 exit 1
687 11:43:41.955326 Enumerating buses...
688 11:43:41.962089 Show all devs... Before device enumeration.
689 11:43:41.962525 Root Device: enabled 1
690 11:43:41.965066 CPU_CLUSTER: 0: enabled 1
691 11:43:41.968545 DOMAIN: 0000: enabled 1
692 11:43:41.968978 APIC: 00: enabled 1
693 11:43:41.971510 PCI: 00:00.0: enabled 1
694 11:43:41.975035 PCI: 00:02.0: enabled 1
695 11:43:41.978350 PCI: 00:04.0: enabled 0
696 11:43:41.978896 PCI: 00:05.0: enabled 0
697 11:43:41.981729 PCI: 00:12.0: enabled 1
698 11:43:41.984969 PCI: 00:12.5: enabled 0
699 11:43:41.988430 PCI: 00:12.6: enabled 0
700 11:43:41.988862 PCI: 00:14.0: enabled 1
701 11:43:41.991845 PCI: 00:14.1: enabled 0
702 11:43:41.995112 PCI: 00:14.3: enabled 1
703 11:43:41.995584 PCI: 00:14.5: enabled 0
704 11:43:41.998227 PCI: 00:15.0: enabled 1
705 11:43:42.001624 PCI: 00:15.1: enabled 1
706 11:43:42.005186 PCI: 00:15.2: enabled 0
707 11:43:42.005621 PCI: 00:15.3: enabled 0
708 11:43:42.008400 PCI: 00:16.0: enabled 1
709 11:43:42.011707 PCI: 00:16.1: enabled 0
710 11:43:42.015679 PCI: 00:16.2: enabled 0
711 11:43:42.016114 PCI: 00:16.3: enabled 0
712 11:43:42.018064 PCI: 00:16.4: enabled 0
713 11:43:42.021524 PCI: 00:16.5: enabled 0
714 11:43:42.024893 PCI: 00:17.0: enabled 1
715 11:43:42.025331 PCI: 00:19.0: enabled 1
716 11:43:42.028585 PCI: 00:19.1: enabled 0
717 11:43:42.031487 PCI: 00:19.2: enabled 0
718 11:43:42.031937 PCI: 00:1a.0: enabled 0
719 11:43:42.035167 PCI: 00:1c.0: enabled 0
720 11:43:42.038466 PCI: 00:1c.1: enabled 0
721 11:43:42.041911 PCI: 00:1c.2: enabled 0
722 11:43:42.042346 PCI: 00:1c.3: enabled 0
723 11:43:42.044977 PCI: 00:1c.4: enabled 0
724 11:43:42.048562 PCI: 00:1c.5: enabled 0
725 11:43:42.051401 PCI: 00:1c.6: enabled 0
726 11:43:42.051867 PCI: 00:1c.7: enabled 0
727 11:43:42.055166 PCI: 00:1d.0: enabled 1
728 11:43:42.058210 PCI: 00:1d.1: enabled 0
729 11:43:42.061658 PCI: 00:1d.2: enabled 0
730 11:43:42.062089 PCI: 00:1d.3: enabled 0
731 11:43:42.064653 PCI: 00:1d.4: enabled 0
732 11:43:42.068160 PCI: 00:1d.5: enabled 1
733 11:43:42.068645 PCI: 00:1e.0: enabled 1
734 11:43:42.071753 PCI: 00:1e.1: enabled 0
735 11:43:42.074707 PCI: 00:1e.2: enabled 1
736 11:43:42.078376 PCI: 00:1e.3: enabled 1
737 11:43:42.078979 PCI: 00:1f.0: enabled 1
738 11:43:42.081699 PCI: 00:1f.1: enabled 1
739 11:43:42.084923 PCI: 00:1f.2: enabled 1
740 11:43:42.088004 PCI: 00:1f.3: enabled 1
741 11:43:42.088470 PCI: 00:1f.4: enabled 1
742 11:43:42.091171 PCI: 00:1f.5: enabled 1
743 11:43:42.094962 PCI: 00:1f.6: enabled 0
744 11:43:42.095424 USB0 port 0: enabled 1
745 11:43:42.097957 I2C: 00:15: enabled 1
746 11:43:42.101883 I2C: 00:5d: enabled 1
747 11:43:42.105113 GENERIC: 0.0: enabled 1
748 11:43:42.105655 I2C: 00:1a: enabled 1
749 11:43:42.108196 I2C: 00:38: enabled 1
750 11:43:42.111394 I2C: 00:39: enabled 1
751 11:43:42.112013 I2C: 00:3a: enabled 1
752 11:43:42.114630 I2C: 00:3b: enabled 1
753 11:43:42.118217 PCI: 00:00.0: enabled 1
754 11:43:42.118834 SPI: 00: enabled 1
755 11:43:42.121018 SPI: 01: enabled 1
756 11:43:42.124451 PNP: 0c09.0: enabled 1
757 11:43:42.124548 USB2 port 0: enabled 1
758 11:43:42.127452 USB2 port 1: enabled 1
759 11:43:42.130921 USB2 port 2: enabled 0
760 11:43:42.131008 USB2 port 3: enabled 0
761 11:43:42.134148 USB2 port 5: enabled 0
762 11:43:42.137901 USB2 port 6: enabled 1
763 11:43:42.138029 USB2 port 9: enabled 1
764 11:43:42.140814 USB3 port 0: enabled 1
765 11:43:42.144596 USB3 port 1: enabled 1
766 11:43:42.147636 USB3 port 2: enabled 1
767 11:43:42.147759 USB3 port 3: enabled 1
768 11:43:42.151004 USB3 port 4: enabled 0
769 11:43:42.154452 APIC: 02: enabled 1
770 11:43:42.154540 APIC: 01: enabled 1
771 11:43:42.157482 APIC: 03: enabled 1
772 11:43:42.157607 APIC: 07: enabled 1
773 11:43:42.161077 APIC: 05: enabled 1
774 11:43:42.164086 APIC: 04: enabled 1
775 11:43:42.164208 APIC: 06: enabled 1
776 11:43:42.167613 Compare with tree...
777 11:43:42.171091 Root Device: enabled 1
778 11:43:42.171205 CPU_CLUSTER: 0: enabled 1
779 11:43:42.174134 APIC: 00: enabled 1
780 11:43:42.177641 APIC: 02: enabled 1
781 11:43:42.177759 APIC: 01: enabled 1
782 11:43:42.180789 APIC: 03: enabled 1
783 11:43:42.184343 APIC: 07: enabled 1
784 11:43:42.184441 APIC: 05: enabled 1
785 11:43:42.187825 APIC: 04: enabled 1
786 11:43:42.191359 APIC: 06: enabled 1
787 11:43:42.194383 DOMAIN: 0000: enabled 1
788 11:43:42.194498 PCI: 00:00.0: enabled 1
789 11:43:42.197483 PCI: 00:02.0: enabled 1
790 11:43:42.200670 PCI: 00:04.0: enabled 0
791 11:43:42.204414 PCI: 00:05.0: enabled 0
792 11:43:42.204525 PCI: 00:12.0: enabled 1
793 11:43:42.207500 PCI: 00:12.5: enabled 0
794 11:43:42.210652 PCI: 00:12.6: enabled 0
795 11:43:42.214007 PCI: 00:14.0: enabled 1
796 11:43:42.217379 USB0 port 0: enabled 1
797 11:43:42.217494 USB2 port 0: enabled 1
798 11:43:42.220697 USB2 port 1: enabled 1
799 11:43:42.224023 USB2 port 2: enabled 0
800 11:43:42.227860 USB2 port 3: enabled 0
801 11:43:42.231208 USB2 port 5: enabled 0
802 11:43:42.234288 USB2 port 6: enabled 1
803 11:43:42.234367 USB2 port 9: enabled 1
804 11:43:42.237767 USB3 port 0: enabled 1
805 11:43:42.240762 USB3 port 1: enabled 1
806 11:43:42.244052 USB3 port 2: enabled 1
807 11:43:42.247545 USB3 port 3: enabled 1
808 11:43:42.247658 USB3 port 4: enabled 0
809 11:43:42.250999 PCI: 00:14.1: enabled 0
810 11:43:42.254034 PCI: 00:14.3: enabled 1
811 11:43:42.257418 PCI: 00:14.5: enabled 0
812 11:43:42.261118 PCI: 00:15.0: enabled 1
813 11:43:42.261235 I2C: 00:15: enabled 1
814 11:43:42.263933 PCI: 00:15.1: enabled 1
815 11:43:42.267525 I2C: 00:5d: enabled 1
816 11:43:42.271133 GENERIC: 0.0: enabled 1
817 11:43:42.274201 PCI: 00:15.2: enabled 0
818 11:43:42.274315 PCI: 00:15.3: enabled 0
819 11:43:42.277277 PCI: 00:16.0: enabled 1
820 11:43:42.280749 PCI: 00:16.1: enabled 0
821 11:43:42.284379 PCI: 00:16.2: enabled 0
822 11:43:42.284491 PCI: 00:16.3: enabled 0
823 11:43:42.287393 PCI: 00:16.4: enabled 0
824 11:43:42.290442 PCI: 00:16.5: enabled 0
825 11:43:42.294123 PCI: 00:17.0: enabled 1
826 11:43:42.297227 PCI: 00:19.0: enabled 1
827 11:43:42.297344 I2C: 00:1a: enabled 1
828 11:43:42.300485 I2C: 00:38: enabled 1
829 11:43:42.303853 I2C: 00:39: enabled 1
830 11:43:42.307484 I2C: 00:3a: enabled 1
831 11:43:42.307597 I2C: 00:3b: enabled 1
832 11:43:42.311122 PCI: 00:19.1: enabled 0
833 11:43:42.314040 PCI: 00:19.2: enabled 0
834 11:43:42.317381 PCI: 00:1a.0: enabled 0
835 11:43:42.320828 PCI: 00:1c.0: enabled 0
836 11:43:42.320968 PCI: 00:1c.1: enabled 0
837 11:43:42.324057 PCI: 00:1c.2: enabled 0
838 11:43:42.327385 PCI: 00:1c.3: enabled 0
839 11:43:42.330395 PCI: 00:1c.4: enabled 0
840 11:43:42.334037 PCI: 00:1c.5: enabled 0
841 11:43:42.334154 PCI: 00:1c.6: enabled 0
842 11:43:42.337286 PCI: 00:1c.7: enabled 0
843 11:43:42.340891 PCI: 00:1d.0: enabled 1
844 11:43:42.343734 PCI: 00:1d.1: enabled 0
845 11:43:42.347251 PCI: 00:1d.2: enabled 0
846 11:43:42.347366 PCI: 00:1d.3: enabled 0
847 11:43:42.350675 PCI: 00:1d.4: enabled 0
848 11:43:42.354657 PCI: 00:1d.5: enabled 1
849 11:43:42.357468 PCI: 00:00.0: enabled 1
850 11:43:42.357562 PCI: 00:1e.0: enabled 1
851 11:43:42.360876 PCI: 00:1e.1: enabled 0
852 11:43:42.363927 PCI: 00:1e.2: enabled 1
853 11:43:42.367516 SPI: 00: enabled 1
854 11:43:42.367610 PCI: 00:1e.3: enabled 1
855 11:43:42.370537 SPI: 01: enabled 1
856 11:43:42.374080 PCI: 00:1f.0: enabled 1
857 11:43:42.377366 PNP: 0c09.0: enabled 1
858 11:43:42.380555 PCI: 00:1f.1: enabled 1
859 11:43:42.380644 PCI: 00:1f.2: enabled 1
860 11:43:42.384169 PCI: 00:1f.3: enabled 1
861 11:43:42.387188 PCI: 00:1f.4: enabled 1
862 11:43:42.390779 PCI: 00:1f.5: enabled 1
863 11:43:42.390891 PCI: 00:1f.6: enabled 0
864 11:43:42.394367 Root Device scanning...
865 11:43:42.397307 scan_static_bus for Root Device
866 11:43:42.401158 CPU_CLUSTER: 0 enabled
867 11:43:42.404112 DOMAIN: 0000 enabled
868 11:43:42.404192 DOMAIN: 0000 scanning...
869 11:43:42.407608 PCI: pci_scan_bus for bus 00
870 11:43:42.410847 PCI: 00:00.0 [8086/0000] ops
871 11:43:42.414000 PCI: 00:00.0 [8086/9b61] enabled
872 11:43:42.417178 PCI: 00:02.0 [8086/0000] bus ops
873 11:43:42.420730 PCI: 00:02.0 [8086/9b41] enabled
874 11:43:42.423915 PCI: 00:04.0 [8086/1903] disabled
875 11:43:42.427413 PCI: 00:08.0 [8086/1911] enabled
876 11:43:42.430836 PCI: 00:12.0 [8086/02f9] enabled
877 11:43:42.433944 PCI: 00:14.0 [8086/0000] bus ops
878 11:43:42.437368 PCI: 00:14.0 [8086/02ed] enabled
879 11:43:42.440625 PCI: 00:14.2 [8086/02ef] enabled
880 11:43:42.443887 PCI: 00:14.3 [8086/02f0] enabled
881 11:43:42.447243 PCI: 00:15.0 [8086/0000] bus ops
882 11:43:42.451106 PCI: 00:15.0 [8086/02e8] enabled
883 11:43:42.454109 PCI: 00:15.1 [8086/0000] bus ops
884 11:43:42.457325 PCI: 00:15.1 [8086/02e9] enabled
885 11:43:42.460368 PCI: 00:16.0 [8086/0000] ops
886 11:43:42.463845 PCI: 00:16.0 [8086/02e0] enabled
887 11:43:42.467291 PCI: 00:17.0 [8086/0000] ops
888 11:43:42.470800 PCI: 00:17.0 [8086/02d3] enabled
889 11:43:42.474443 PCI: 00:19.0 [8086/0000] bus ops
890 11:43:42.477375 PCI: 00:19.0 [8086/02c5] enabled
891 11:43:42.480957 PCI: 00:1d.0 [8086/0000] bus ops
892 11:43:42.483930 PCI: 00:1d.0 [8086/02b0] enabled
893 11:43:42.490600 PCI: Static device PCI: 00:1d.5 not found, disabling it.
894 11:43:42.494084 PCI: 00:1e.0 [8086/0000] ops
895 11:43:42.497392 PCI: 00:1e.0 [8086/02a8] enabled
896 11:43:42.500832 PCI: 00:1e.2 [8086/0000] bus ops
897 11:43:42.504223 PCI: 00:1e.2 [8086/02aa] enabled
898 11:43:42.507463 PCI: 00:1e.3 [8086/0000] bus ops
899 11:43:42.510492 PCI: 00:1e.3 [8086/02ab] enabled
900 11:43:42.513940 PCI: 00:1f.0 [8086/0000] bus ops
901 11:43:42.517678 PCI: 00:1f.0 [8086/0284] enabled
902 11:43:42.520445 PCI: Static device PCI: 00:1f.1 not found, disabling it.
903 11:43:42.527245 PCI: Static device PCI: 00:1f.2 not found, disabling it.
904 11:43:42.530796 PCI: 00:1f.3 [8086/0000] bus ops
905 11:43:42.533949 PCI: 00:1f.3 [8086/02c8] enabled
906 11:43:42.537253 PCI: 00:1f.4 [8086/0000] bus ops
907 11:43:42.540528 PCI: 00:1f.4 [8086/02a3] enabled
908 11:43:42.543880 PCI: 00:1f.5 [8086/0000] bus ops
909 11:43:42.547273 PCI: 00:1f.5 [8086/02a4] enabled
910 11:43:42.550457 PCI: Leftover static devices:
911 11:43:42.550553 PCI: 00:05.0
912 11:43:42.554316 PCI: 00:12.5
913 11:43:42.554409 PCI: 00:12.6
914 11:43:42.554487 PCI: 00:14.1
915 11:43:42.558092 PCI: 00:14.5
916 11:43:42.558185 PCI: 00:15.2
917 11:43:42.560535 PCI: 00:15.3
918 11:43:42.560628 PCI: 00:16.1
919 11:43:42.560701 PCI: 00:16.2
920 11:43:42.563795 PCI: 00:16.3
921 11:43:42.563887 PCI: 00:16.4
922 11:43:42.567566 PCI: 00:16.5
923 11:43:42.567658 PCI: 00:19.1
924 11:43:42.570415 PCI: 00:19.2
925 11:43:42.570508 PCI: 00:1a.0
926 11:43:42.570582 PCI: 00:1c.0
927 11:43:42.573946 PCI: 00:1c.1
928 11:43:42.574039 PCI: 00:1c.2
929 11:43:42.577297 PCI: 00:1c.3
930 11:43:42.577390 PCI: 00:1c.4
931 11:43:42.577464 PCI: 00:1c.5
932 11:43:42.580972 PCI: 00:1c.6
933 11:43:42.581065 PCI: 00:1c.7
934 11:43:42.584005 PCI: 00:1d.1
935 11:43:42.584099 PCI: 00:1d.2
936 11:43:42.584173 PCI: 00:1d.3
937 11:43:42.587459 PCI: 00:1d.4
938 11:43:42.587552 PCI: 00:1d.5
939 11:43:42.590532 PCI: 00:1e.1
940 11:43:42.590625 PCI: 00:1f.1
941 11:43:42.590700 PCI: 00:1f.2
942 11:43:42.594001 PCI: 00:1f.6
943 11:43:42.597025 PCI: Check your devicetree.cb.
944 11:43:42.600903 PCI: 00:02.0 scanning...
945 11:43:42.604248 scan_generic_bus for PCI: 00:02.0
946 11:43:42.607080 scan_generic_bus for PCI: 00:02.0 done
947 11:43:42.614016 scan_bus: scanning of bus PCI: 00:02.0 took 10183 usecs
948 11:43:42.614109 PCI: 00:14.0 scanning...
949 11:43:42.616984 scan_static_bus for PCI: 00:14.0
950 11:43:42.620580 USB0 port 0 enabled
951 11:43:42.623850 USB0 port 0 scanning...
952 11:43:42.627365 scan_static_bus for USB0 port 0
953 11:43:42.627490 USB2 port 0 enabled
954 11:43:42.630519 USB2 port 1 enabled
955 11:43:42.633794 USB2 port 2 disabled
956 11:43:42.633887 USB2 port 3 disabled
957 11:43:42.637109 USB2 port 5 disabled
958 11:43:42.640378 USB2 port 6 enabled
959 11:43:42.640470 USB2 port 9 enabled
960 11:43:42.643842 USB3 port 0 enabled
961 11:43:42.643935 USB3 port 1 enabled
962 11:43:42.647175 USB3 port 2 enabled
963 11:43:42.650347 USB3 port 3 enabled
964 11:43:42.650440 USB3 port 4 disabled
965 11:43:42.653586 USB2 port 0 scanning...
966 11:43:42.657206 scan_static_bus for USB2 port 0
967 11:43:42.660382 scan_static_bus for USB2 port 0 done
968 11:43:42.666945 scan_bus: scanning of bus USB2 port 0 took 9705 usecs
969 11:43:42.670324 USB2 port 1 scanning...
970 11:43:42.673905 scan_static_bus for USB2 port 1
971 11:43:42.677122 scan_static_bus for USB2 port 1 done
972 11:43:42.680558 scan_bus: scanning of bus USB2 port 1 took 9695 usecs
973 11:43:42.683464 USB2 port 6 scanning...
974 11:43:42.687033 scan_static_bus for USB2 port 6
975 11:43:42.690901 scan_static_bus for USB2 port 6 done
976 11:43:42.697113 scan_bus: scanning of bus USB2 port 6 took 9708 usecs
977 11:43:42.700177 USB2 port 9 scanning...
978 11:43:42.703787 scan_static_bus for USB2 port 9
979 11:43:42.707299 scan_static_bus for USB2 port 9 done
980 11:43:42.710113 scan_bus: scanning of bus USB2 port 9 took 9695 usecs
981 11:43:42.713473 USB3 port 0 scanning...
982 11:43:42.716817 scan_static_bus for USB3 port 0
983 11:43:42.720530 scan_static_bus for USB3 port 0 done
984 11:43:42.727098 scan_bus: scanning of bus USB3 port 0 took 9702 usecs
985 11:43:42.729955 USB3 port 1 scanning...
986 11:43:42.733462 scan_static_bus for USB3 port 1
987 11:43:42.736869 scan_static_bus for USB3 port 1 done
988 11:43:42.740060 scan_bus: scanning of bus USB3 port 1 took 9696 usecs
989 11:43:42.743458 USB3 port 2 scanning...
990 11:43:42.746631 scan_static_bus for USB3 port 2
991 11:43:42.749919 scan_static_bus for USB3 port 2 done
992 11:43:42.756694 scan_bus: scanning of bus USB3 port 2 took 9703 usecs
993 11:43:42.759898 USB3 port 3 scanning...
994 11:43:42.763799 scan_static_bus for USB3 port 3
995 11:43:42.767325 scan_static_bus for USB3 port 3 done
996 11:43:42.770315 scan_bus: scanning of bus USB3 port 3 took 9697 usecs
997 11:43:42.773416 scan_static_bus for USB0 port 0 done
998 11:43:42.780091 scan_bus: scanning of bus USB0 port 0 took 155328 usecs
999 11:43:42.783486 scan_static_bus for PCI: 00:14.0 done
1000 11:43:42.790315 scan_bus: scanning of bus PCI: 00:14.0 took 172942 usecs
1001 11:43:42.794001 PCI: 00:15.0 scanning...
1002 11:43:42.796789 scan_generic_bus for PCI: 00:15.0
1003 11:43:42.800313 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1004 11:43:42.803302 scan_generic_bus for PCI: 00:15.0 done
1005 11:43:42.810189 scan_bus: scanning of bus PCI: 00:15.0 took 14286 usecs
1006 11:43:42.813365 PCI: 00:15.1 scanning...
1007 11:43:42.816681 scan_generic_bus for PCI: 00:15.1
1008 11:43:42.820376 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1009 11:43:42.823270 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1010 11:43:42.827009 scan_generic_bus for PCI: 00:15.1 done
1011 11:43:42.833812 scan_bus: scanning of bus PCI: 00:15.1 took 18646 usecs
1012 11:43:42.836766 PCI: 00:19.0 scanning...
1013 11:43:42.840306 scan_generic_bus for PCI: 00:19.0
1014 11:43:42.843352 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1015 11:43:42.846908 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1016 11:43:42.853480 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1017 11:43:42.856984 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1018 11:43:42.860141 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1019 11:43:42.863441 scan_generic_bus for PCI: 00:19.0 done
1020 11:43:42.870193 scan_bus: scanning of bus PCI: 00:19.0 took 30723 usecs
1021 11:43:42.873384 PCI: 00:1d.0 scanning...
1022 11:43:42.877104 do_pci_scan_bridge for PCI: 00:1d.0
1023 11:43:42.880538 PCI: pci_scan_bus for bus 01
1024 11:43:42.883299 PCI: 01:00.0 [1c5c/1327] enabled
1025 11:43:42.886771 Enabling Common Clock Configuration
1026 11:43:42.889877 L1 Sub-State supported from root port 29
1027 11:43:42.893492 L1 Sub-State Support = 0xf
1028 11:43:42.896393 CommonModeRestoreTime = 0x28
1029 11:43:42.899834 Power On Value = 0x16, Power On Scale = 0x0
1030 11:43:42.903372 ASPM: Enabled L1
1031 11:43:42.906476 scan_bus: scanning of bus PCI: 00:1d.0 took 32793 usecs
1032 11:43:42.910023 PCI: 00:1e.2 scanning...
1033 11:43:42.912955 scan_generic_bus for PCI: 00:1e.2
1034 11:43:42.920107 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1035 11:43:42.922859 scan_generic_bus for PCI: 00:1e.2 done
1036 11:43:42.926605 scan_bus: scanning of bus PCI: 00:1e.2 took 14010 usecs
1037 11:43:42.929723 PCI: 00:1e.3 scanning...
1038 11:43:42.933321 scan_generic_bus for PCI: 00:1e.3
1039 11:43:42.936707 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1040 11:43:42.943382 scan_generic_bus for PCI: 00:1e.3 done
1041 11:43:42.946808 scan_bus: scanning of bus PCI: 00:1e.3 took 14008 usecs
1042 11:43:42.949676 PCI: 00:1f.0 scanning...
1043 11:43:42.953315 scan_static_bus for PCI: 00:1f.0
1044 11:43:42.956423 PNP: 0c09.0 enabled
1045 11:43:42.960036 scan_static_bus for PCI: 00:1f.0 done
1046 11:43:42.963020 scan_bus: scanning of bus PCI: 00:1f.0 took 12044 usecs
1047 11:43:42.966400 PCI: 00:1f.3 scanning...
1048 11:43:42.972905 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1049 11:43:42.976671 PCI: 00:1f.4 scanning...
1050 11:43:42.979978 scan_generic_bus for PCI: 00:1f.4
1051 11:43:42.983209 scan_generic_bus for PCI: 00:1f.4 done
1052 11:43:42.989505 scan_bus: scanning of bus PCI: 00:1f.4 took 10194 usecs
1053 11:43:42.989599 PCI: 00:1f.5 scanning...
1054 11:43:42.997061 scan_generic_bus for PCI: 00:1f.5
1055 11:43:43.000011 scan_generic_bus for PCI: 00:1f.5 done
1056 11:43:43.003252 scan_bus: scanning of bus PCI: 00:1f.5 took 10185 usecs
1057 11:43:43.009895 scan_bus: scanning of bus DOMAIN: 0000 took 604908 usecs
1058 11:43:43.013524 scan_static_bus for Root Device done
1059 11:43:43.019422 scan_bus: scanning of bus Root Device took 624775 usecs
1060 11:43:43.019548 done
1061 11:43:43.022895 Chrome EC: UHEPI supported
1062 11:43:43.029469 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1063 11:43:43.036503 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1064 11:43:43.039468 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1065 11:43:43.047649 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1066 11:43:43.050761 SPI flash protection: WPSW=0 SRP0=0
1067 11:43:43.057611 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1068 11:43:43.061159 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1069 11:43:43.064309 found VGA at PCI: 00:02.0
1070 11:43:43.067770 Setting up VGA for PCI: 00:02.0
1071 11:43:43.074484 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1072 11:43:43.077244 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1073 11:43:43.080911 Allocating resources...
1074 11:43:43.084905 Reading resources...
1075 11:43:43.087235 Root Device read_resources bus 0 link: 0
1076 11:43:43.091000 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1077 11:43:43.097609 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1078 11:43:43.100454 DOMAIN: 0000 read_resources bus 0 link: 0
1079 11:43:43.108400 PCI: 00:14.0 read_resources bus 0 link: 0
1080 11:43:43.111179 USB0 port 0 read_resources bus 0 link: 0
1081 11:43:43.119326 USB0 port 0 read_resources bus 0 link: 0 done
1082 11:43:43.122302 PCI: 00:14.0 read_resources bus 0 link: 0 done
1083 11:43:43.129959 PCI: 00:15.0 read_resources bus 1 link: 0
1084 11:43:43.133408 PCI: 00:15.0 read_resources bus 1 link: 0 done
1085 11:43:43.140026 PCI: 00:15.1 read_resources bus 2 link: 0
1086 11:43:43.143657 PCI: 00:15.1 read_resources bus 2 link: 0 done
1087 11:43:43.150760 PCI: 00:19.0 read_resources bus 3 link: 0
1088 11:43:43.157221 PCI: 00:19.0 read_resources bus 3 link: 0 done
1089 11:43:43.160628 PCI: 00:1d.0 read_resources bus 1 link: 0
1090 11:43:43.167154 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1091 11:43:43.170718 PCI: 00:1e.2 read_resources bus 4 link: 0
1092 11:43:43.177100 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1093 11:43:43.180431 PCI: 00:1e.3 read_resources bus 5 link: 0
1094 11:43:43.187677 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1095 11:43:43.190587 PCI: 00:1f.0 read_resources bus 0 link: 0
1096 11:43:43.197004 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1097 11:43:43.203398 DOMAIN: 0000 read_resources bus 0 link: 0 done
1098 11:43:43.207309 Root Device read_resources bus 0 link: 0 done
1099 11:43:43.210477 Done reading resources.
1100 11:43:43.213913 Show resources in subtree (Root Device)...After reading.
1101 11:43:43.220288 Root Device child on link 0 CPU_CLUSTER: 0
1102 11:43:43.223965 CPU_CLUSTER: 0 child on link 0 APIC: 00
1103 11:43:43.224058 APIC: 00
1104 11:43:43.226950 APIC: 02
1105 11:43:43.227042 APIC: 01
1106 11:43:43.230618 APIC: 03
1107 11:43:43.230710 APIC: 07
1108 11:43:43.230783 APIC: 05
1109 11:43:43.233542 APIC: 04
1110 11:43:43.233634 APIC: 06
1111 11:43:43.236985 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1112 11:43:43.247006 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1113 11:43:43.303223 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1114 11:43:43.303346 PCI: 00:00.0
1115 11:43:43.304242 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1116 11:43:43.304519 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1117 11:43:43.304822 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1118 11:43:43.305083 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1119 11:43:43.352983 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1120 11:43:43.353285 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1121 11:43:43.353382 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1122 11:43:43.353639 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1123 11:43:43.354340 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1124 11:43:43.354433 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1125 11:43:43.402911 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1126 11:43:43.403756 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1127 11:43:43.404547 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1128 11:43:43.404851 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1129 11:43:43.405376 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1130 11:43:43.408092 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1131 11:43:43.411376 PCI: 00:02.0
1132 11:43:43.421227 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1133 11:43:43.431291 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1134 11:43:43.437864 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1135 11:43:43.441264 PCI: 00:04.0
1136 11:43:43.441392 PCI: 00:08.0
1137 11:43:43.451262 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1138 11:43:43.454899 PCI: 00:12.0
1139 11:43:43.464988 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1140 11:43:43.468016 PCI: 00:14.0 child on link 0 USB0 port 0
1141 11:43:43.477991 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1142 11:43:43.485005 USB0 port 0 child on link 0 USB2 port 0
1143 11:43:43.485123 USB2 port 0
1144 11:43:43.488024 USB2 port 1
1145 11:43:43.488144 USB2 port 2
1146 11:43:43.491657 USB2 port 3
1147 11:43:43.491745 USB2 port 5
1148 11:43:43.494689 USB2 port 6
1149 11:43:43.494808 USB2 port 9
1150 11:43:43.498082 USB3 port 0
1151 11:43:43.498197 USB3 port 1
1152 11:43:43.501160 USB3 port 2
1153 11:43:43.501269 USB3 port 3
1154 11:43:43.504456 USB3 port 4
1155 11:43:43.504573 PCI: 00:14.2
1156 11:43:43.514599 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1157 11:43:43.524106 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1158 11:43:43.527741 PCI: 00:14.3
1159 11:43:43.537828 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1160 11:43:43.541056 PCI: 00:15.0 child on link 0 I2C: 01:15
1161 11:43:43.551221 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1162 11:43:43.555038 I2C: 01:15
1163 11:43:43.557674 PCI: 00:15.1 child on link 0 I2C: 02:5d
1164 11:43:43.567797 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 11:43:43.567928 I2C: 02:5d
1166 11:43:43.571525 GENERIC: 0.0
1167 11:43:43.571613 PCI: 00:16.0
1168 11:43:43.580808 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 11:43:43.584451 PCI: 00:17.0
1170 11:43:43.594264 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1171 11:43:43.600908 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1172 11:43:43.610968 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1173 11:43:43.617611 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1174 11:43:43.627381 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1175 11:43:43.634190 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1176 11:43:43.640753 PCI: 00:19.0 child on link 0 I2C: 03:1a
1177 11:43:43.650569 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1178 11:43:43.650662 I2C: 03:1a
1179 11:43:43.654226 I2C: 03:38
1180 11:43:43.654317 I2C: 03:39
1181 11:43:43.657458 I2C: 03:3a
1182 11:43:43.657559 I2C: 03:3b
1183 11:43:43.660534 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1184 11:43:43.670575 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1185 11:43:43.680475 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1186 11:43:43.690649 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1187 11:43:43.690743 PCI: 01:00.0
1188 11:43:43.700748 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1189 11:43:43.704119 PCI: 00:1e.0
1190 11:43:43.713874 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1191 11:43:43.723441 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1192 11:43:43.726802 PCI: 00:1e.2 child on link 0 SPI: 00
1193 11:43:43.736963 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 11:43:43.740333 SPI: 00
1195 11:43:43.743901 PCI: 00:1e.3 child on link 0 SPI: 01
1196 11:43:43.753575 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 11:43:43.753668 SPI: 01
1198 11:43:43.760125 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1199 11:43:43.766742 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1200 11:43:43.776544 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1201 11:43:43.776636 PNP: 0c09.0
1202 11:43:43.787088 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1203 11:43:43.790161 PCI: 00:1f.3
1204 11:43:43.800097 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1205 11:43:43.809706 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1206 11:43:43.809800 PCI: 00:1f.4
1207 11:43:43.819819 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1208 11:43:43.829694 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1209 11:43:43.829788 PCI: 00:1f.5
1210 11:43:43.839306 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1211 11:43:43.846384 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1212 11:43:43.852508 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1213 11:43:43.859337 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1214 11:43:43.862423 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1215 11:43:43.865872 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1216 11:43:43.869218 PCI: 00:17.0 18 * [0x60 - 0x67] io
1217 11:43:43.872637 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1218 11:43:43.879244 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1219 11:43:43.885556 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1220 11:43:43.895707 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1221 11:43:43.902138 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1222 11:43:43.908676 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1223 11:43:43.915863 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1224 11:43:43.922358 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1225 11:43:43.925274 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1226 11:43:43.931905 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1227 11:43:43.935488 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1228 11:43:43.941966 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1229 11:43:43.945350 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1230 11:43:43.951984 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1231 11:43:43.955188 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1232 11:43:43.961771 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1233 11:43:43.965328 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1234 11:43:43.971765 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1235 11:43:43.974976 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1236 11:43:43.978453 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1237 11:43:43.985130 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1238 11:43:43.988487 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1239 11:43:43.995238 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1240 11:43:43.998301 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1241 11:43:44.005242 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1242 11:43:44.008247 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1243 11:43:44.014811 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1244 11:43:44.017918 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1245 11:43:44.024997 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1246 11:43:44.027971 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1247 11:43:44.034474 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1248 11:43:44.041558 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1249 11:43:44.044830 avoid_fixed_resources: DOMAIN: 0000
1250 11:43:44.051290 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1251 11:43:44.057822 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1252 11:43:44.064716 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1253 11:43:44.071259 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1254 11:43:44.081209 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1255 11:43:44.088006 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1256 11:43:44.094136 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1257 11:43:44.104483 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1258 11:43:44.111187 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1259 11:43:44.117392 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1260 11:43:44.127610 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1261 11:43:44.133790 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1262 11:43:44.133878 Setting resources...
1263 11:43:44.140484 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1264 11:43:44.144115 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1265 11:43:44.150661 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1266 11:43:44.154039 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1267 11:43:44.157397 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1268 11:43:44.163976 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1269 11:43:44.170388 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1270 11:43:44.176808 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1271 11:43:44.183706 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1272 11:43:44.190388 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1273 11:43:44.193603 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1274 11:43:44.200088 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1275 11:43:44.203343 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1276 11:43:44.209994 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1277 11:43:44.213853 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1278 11:43:44.217011 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1279 11:43:44.223415 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1280 11:43:44.227067 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1281 11:43:44.233484 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1282 11:43:44.236472 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1283 11:43:44.243181 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1284 11:43:44.247089 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1285 11:43:44.253280 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1286 11:43:44.257133 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1287 11:43:44.263374 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1288 11:43:44.266736 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1289 11:43:44.273294 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1290 11:43:44.276459 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1291 11:43:44.283025 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1292 11:43:44.286300 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1293 11:43:44.289645 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1294 11:43:44.296771 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1295 11:43:44.302813 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1296 11:43:44.309498 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1297 11:43:44.320089 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1298 11:43:44.326398 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1299 11:43:44.329740 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1300 11:43:44.339675 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1301 11:43:44.342696 Root Device assign_resources, bus 0 link: 0
1302 11:43:44.346322 DOMAIN: 0000 assign_resources, bus 0 link: 0
1303 11:43:44.356314 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1304 11:43:44.362845 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1305 11:43:44.372790 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1306 11:43:44.379078 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1307 11:43:44.388887 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1308 11:43:44.395923 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1309 11:43:44.402316 PCI: 00:14.0 assign_resources, bus 0 link: 0
1310 11:43:44.405809 PCI: 00:14.0 assign_resources, bus 0 link: 0
1311 11:43:44.412554 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1312 11:43:44.422354 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1313 11:43:44.429065 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1314 11:43:44.439163 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1315 11:43:44.442028 PCI: 00:15.0 assign_resources, bus 1 link: 0
1316 11:43:44.448721 PCI: 00:15.0 assign_resources, bus 1 link: 0
1317 11:43:44.455392 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1318 11:43:44.462112 PCI: 00:15.1 assign_resources, bus 2 link: 0
1319 11:43:44.465444 PCI: 00:15.1 assign_resources, bus 2 link: 0
1320 11:43:44.472230 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1321 11:43:44.482811 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1322 11:43:44.489176 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1323 11:43:44.495672 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1324 11:43:44.505388 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1325 11:43:44.512619 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1326 11:43:44.518666 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1327 11:43:44.528908 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1328 11:43:44.532497 PCI: 00:19.0 assign_resources, bus 3 link: 0
1329 11:43:44.539212 PCI: 00:19.0 assign_resources, bus 3 link: 0
1330 11:43:44.546060 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1331 11:43:44.555730 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1332 11:43:44.565304 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1333 11:43:44.568742 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1334 11:43:44.575354 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1335 11:43:44.581921 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1336 11:43:44.589014 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1337 11:43:44.598616 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1338 11:43:44.602676 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1339 11:43:44.608696 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1340 11:43:44.615149 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1341 11:43:44.618411 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1342 11:43:44.625809 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1343 11:43:44.628851 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1344 11:43:44.635068 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1345 11:43:44.638736 LPC: Trying to open IO window from 800 size 1ff
1346 11:43:44.648969 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1347 11:43:44.655037 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1348 11:43:44.665339 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1349 11:43:44.671798 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1350 11:43:44.678357 DOMAIN: 0000 assign_resources, bus 0 link: 0
1351 11:43:44.681922 Root Device assign_resources, bus 0 link: 0
1352 11:43:44.685308 Done setting resources.
1353 11:43:44.691302 Show resources in subtree (Root Device)...After assigning values.
1354 11:43:44.694817 Root Device child on link 0 CPU_CLUSTER: 0
1355 11:43:44.697999 CPU_CLUSTER: 0 child on link 0 APIC: 00
1356 11:43:44.701624 APIC: 00
1357 11:43:44.701714 APIC: 02
1358 11:43:44.701784 APIC: 01
1359 11:43:44.704876 APIC: 03
1360 11:43:44.704965 APIC: 07
1361 11:43:44.708375 APIC: 05
1362 11:43:44.708465 APIC: 04
1363 11:43:44.708535 APIC: 06
1364 11:43:44.714666 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1365 11:43:44.724982 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1366 11:43:44.734960 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1367 11:43:44.735052 PCI: 00:00.0
1368 11:43:44.744441 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1369 11:43:44.754385 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1370 11:43:44.764287 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1371 11:43:44.774520 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1372 11:43:44.784614 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1373 11:43:44.790979 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1374 11:43:44.800841 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1375 11:43:44.810768 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1376 11:43:44.820966 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1377 11:43:44.830737 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1378 11:43:44.837162 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1379 11:43:44.847254 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1380 11:43:44.857303 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1381 11:43:44.867403 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1382 11:43:44.877119 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1383 11:43:44.886998 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1384 11:43:44.887096 PCI: 00:02.0
1385 11:43:44.897025 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1386 11:43:44.909952 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1387 11:43:44.916489 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1388 11:43:44.920041 PCI: 00:04.0
1389 11:43:44.920133 PCI: 00:08.0
1390 11:43:44.932914 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1391 11:43:44.933009 PCI: 00:12.0
1392 11:43:44.944000 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1393 11:43:44.946607 PCI: 00:14.0 child on link 0 USB0 port 0
1394 11:43:44.959341 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1395 11:43:44.962980 USB0 port 0 child on link 0 USB2 port 0
1396 11:43:44.963073 USB2 port 0
1397 11:43:44.966513 USB2 port 1
1398 11:43:44.969532 USB2 port 2
1399 11:43:44.969625 USB2 port 3
1400 11:43:44.972689 USB2 port 5
1401 11:43:44.972781 USB2 port 6
1402 11:43:44.976288 USB2 port 9
1403 11:43:44.976380 USB3 port 0
1404 11:43:44.979351 USB3 port 1
1405 11:43:44.979453 USB3 port 2
1406 11:43:44.982823 USB3 port 3
1407 11:43:44.982917 USB3 port 4
1408 11:43:44.986214 PCI: 00:14.2
1409 11:43:44.995843 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1410 11:43:45.006059 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1411 11:43:45.009498 PCI: 00:14.3
1412 11:43:45.019871 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1413 11:43:45.022813 PCI: 00:15.0 child on link 0 I2C: 01:15
1414 11:43:45.032860 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1415 11:43:45.036324 I2C: 01:15
1416 11:43:45.039728 PCI: 00:15.1 child on link 0 I2C: 02:5d
1417 11:43:45.049164 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1418 11:43:45.049592 I2C: 02:5d
1419 11:43:45.052833 GENERIC: 0.0
1420 11:43:45.053255 PCI: 00:16.0
1421 11:43:45.066128 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1422 11:43:45.066559 PCI: 00:17.0
1423 11:43:45.075921 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1424 11:43:45.085977 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1425 11:43:45.096156 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1426 11:43:45.105538 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1427 11:43:45.112114 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1428 11:43:45.125942 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1429 11:43:45.128740 PCI: 00:19.0 child on link 0 I2C: 03:1a
1430 11:43:45.138646 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1431 11:43:45.139158 I2C: 03:1a
1432 11:43:45.141796 I2C: 03:38
1433 11:43:45.142281 I2C: 03:39
1434 11:43:45.145247 I2C: 03:3a
1435 11:43:45.145670 I2C: 03:3b
1436 11:43:45.152303 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1437 11:43:45.158368 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1438 11:43:45.168626 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1439 11:43:45.181356 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1440 11:43:45.181451 PCI: 01:00.0
1441 11:43:45.191471 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1442 11:43:45.194839 PCI: 00:1e.0
1443 11:43:45.204576 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1444 11:43:45.214575 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1445 11:43:45.217510 PCI: 00:1e.2 child on link 0 SPI: 00
1446 11:43:45.231195 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1447 11:43:45.231291 SPI: 00
1448 11:43:45.234314 PCI: 00:1e.3 child on link 0 SPI: 01
1449 11:43:45.244299 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1450 11:43:45.247422 SPI: 01
1451 11:43:45.250854 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1452 11:43:45.260473 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1453 11:43:45.267418 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1454 11:43:45.270713 PNP: 0c09.0
1455 11:43:45.276994 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1456 11:43:45.280692 PCI: 00:1f.3
1457 11:43:45.290224 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1458 11:43:45.300613 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1459 11:43:45.303612 PCI: 00:1f.4
1460 11:43:45.313443 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1461 11:43:45.323440 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1462 11:43:45.323542 PCI: 00:1f.5
1463 11:43:45.333442 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1464 11:43:45.336963 Done allocating resources.
1465 11:43:45.343590 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1466 11:43:45.343683 Enabling resources...
1467 11:43:45.351068 PCI: 00:00.0 subsystem <- 8086/9b61
1468 11:43:45.351161 PCI: 00:00.0 cmd <- 06
1469 11:43:45.354448 PCI: 00:02.0 subsystem <- 8086/9b41
1470 11:43:45.357758 PCI: 00:02.0 cmd <- 03
1471 11:43:45.361167 PCI: 00:08.0 cmd <- 06
1472 11:43:45.364254 PCI: 00:12.0 subsystem <- 8086/02f9
1473 11:43:45.367480 PCI: 00:12.0 cmd <- 02
1474 11:43:45.371123 PCI: 00:14.0 subsystem <- 8086/02ed
1475 11:43:45.374149 PCI: 00:14.0 cmd <- 02
1476 11:43:45.377656 PCI: 00:14.2 cmd <- 02
1477 11:43:45.380882 PCI: 00:14.3 subsystem <- 8086/02f0
1478 11:43:45.380974 PCI: 00:14.3 cmd <- 02
1479 11:43:45.387449 PCI: 00:15.0 subsystem <- 8086/02e8
1480 11:43:45.387546 PCI: 00:15.0 cmd <- 02
1481 11:43:45.391717 PCI: 00:15.1 subsystem <- 8086/02e9
1482 11:43:45.394109 PCI: 00:15.1 cmd <- 02
1483 11:43:45.397417 PCI: 00:16.0 subsystem <- 8086/02e0
1484 11:43:45.401262 PCI: 00:16.0 cmd <- 02
1485 11:43:45.404457 PCI: 00:17.0 subsystem <- 8086/02d3
1486 11:43:45.407311 PCI: 00:17.0 cmd <- 03
1487 11:43:45.411016 PCI: 00:19.0 subsystem <- 8086/02c5
1488 11:43:45.414451 PCI: 00:19.0 cmd <- 02
1489 11:43:45.417937 PCI: 00:1d.0 bridge ctrl <- 0013
1490 11:43:45.420875 PCI: 00:1d.0 subsystem <- 8086/02b0
1491 11:43:45.424825 PCI: 00:1d.0 cmd <- 06
1492 11:43:45.427227 PCI: 00:1e.0 subsystem <- 8086/02a8
1493 11:43:45.430773 PCI: 00:1e.0 cmd <- 06
1494 11:43:45.434273 PCI: 00:1e.2 subsystem <- 8086/02aa
1495 11:43:45.434365 PCI: 00:1e.2 cmd <- 06
1496 11:43:45.440878 PCI: 00:1e.3 subsystem <- 8086/02ab
1497 11:43:45.440971 PCI: 00:1e.3 cmd <- 02
1498 11:43:45.444461 PCI: 00:1f.0 subsystem <- 8086/0284
1499 11:43:45.447394 PCI: 00:1f.0 cmd <- 407
1500 11:43:45.451142 PCI: 00:1f.3 subsystem <- 8086/02c8
1501 11:43:45.454174 PCI: 00:1f.3 cmd <- 02
1502 11:43:45.457746 PCI: 00:1f.4 subsystem <- 8086/02a3
1503 11:43:45.461352 PCI: 00:1f.4 cmd <- 03
1504 11:43:45.464079 PCI: 00:1f.5 subsystem <- 8086/02a4
1505 11:43:45.467324 PCI: 00:1f.5 cmd <- 406
1506 11:43:45.475959 PCI: 01:00.0 cmd <- 02
1507 11:43:45.481356 done.
1508 11:43:45.494557 ME: Version: 14.0.39.1367
1509 11:43:45.500934 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1510 11:43:45.504273 Initializing devices...
1511 11:43:45.504366 Root Device init ...
1512 11:43:45.510903 Chrome EC: Set SMI mask to 0x0000000000000000
1513 11:43:45.514197 Chrome EC: clear events_b mask to 0x0000000000000000
1514 11:43:45.520932 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1515 11:43:45.527640 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1516 11:43:45.534490 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1517 11:43:45.537463 Chrome EC: Set WAKE mask to 0x0000000000000000
1518 11:43:45.541059 Root Device init finished in 35240 usecs
1519 11:43:45.544771 CPU_CLUSTER: 0 init ...
1520 11:43:45.550667 CPU_CLUSTER: 0 init finished in 2447 usecs
1521 11:43:45.554945 PCI: 00:00.0 init ...
1522 11:43:45.558517 CPU TDP: 15 Watts
1523 11:43:45.562081 CPU PL2 = 64 Watts
1524 11:43:45.565333 PCI: 00:00.0 init finished in 7084 usecs
1525 11:43:45.568245 PCI: 00:02.0 init ...
1526 11:43:45.572220 PCI: 00:02.0 init finished in 2253 usecs
1527 11:43:45.575264 PCI: 00:08.0 init ...
1528 11:43:45.578338 PCI: 00:08.0 init finished in 2252 usecs
1529 11:43:45.581818 PCI: 00:12.0 init ...
1530 11:43:45.585227 PCI: 00:12.0 init finished in 2253 usecs
1531 11:43:45.588427 PCI: 00:14.0 init ...
1532 11:43:45.591844 PCI: 00:14.0 init finished in 2252 usecs
1533 11:43:45.594898 PCI: 00:14.2 init ...
1534 11:43:45.598127 PCI: 00:14.2 init finished in 2253 usecs
1535 11:43:45.601938 PCI: 00:14.3 init ...
1536 11:43:45.605375 PCI: 00:14.3 init finished in 2272 usecs
1537 11:43:45.608127 PCI: 00:15.0 init ...
1538 11:43:45.611382 DW I2C bus 0 at 0xd121f000 (400 KHz)
1539 11:43:45.614729 PCI: 00:15.0 init finished in 5970 usecs
1540 11:43:45.618073 PCI: 00:15.1 init ...
1541 11:43:45.621332 DW I2C bus 1 at 0xd1220000 (400 KHz)
1542 11:43:45.628137 PCI: 00:15.1 init finished in 5976 usecs
1543 11:43:45.628229 PCI: 00:16.0 init ...
1544 11:43:45.634365 PCI: 00:16.0 init finished in 2252 usecs
1545 11:43:45.637706 PCI: 00:19.0 init ...
1546 11:43:45.641300 DW I2C bus 4 at 0xd1222000 (400 KHz)
1547 11:43:45.644234 PCI: 00:19.0 init finished in 5977 usecs
1548 11:43:45.647804 PCI: 00:1d.0 init ...
1549 11:43:45.651350 Initializing PCH PCIe bridge.
1550 11:43:45.654392 PCI: 00:1d.0 init finished in 5285 usecs
1551 11:43:45.657293 PCI: 00:1f.0 init ...
1552 11:43:45.660889 IOAPIC: Initializing IOAPIC at 0xfec00000
1553 11:43:45.667607 IOAPIC: Bootstrap Processor Local APIC = 0x00
1554 11:43:45.667699 IOAPIC: ID = 0x02
1555 11:43:45.671424 IOAPIC: Dumping registers
1556 11:43:45.674058 reg 0x0000: 0x02000000
1557 11:43:45.677854 reg 0x0001: 0x00770020
1558 11:43:45.677946 reg 0x0002: 0x00000000
1559 11:43:45.684331 PCI: 00:1f.0 init finished in 23539 usecs
1560 11:43:45.687292 PCI: 00:1f.4 init ...
1561 11:43:45.690772 PCI: 00:1f.4 init finished in 2263 usecs
1562 11:43:45.701633 PCI: 01:00.0 init ...
1563 11:43:45.704425 PCI: 01:00.0 init finished in 2252 usecs
1564 11:43:45.708846 PNP: 0c09.0 init ...
1565 11:43:45.712157 Google Chrome EC uptime: 11.051 seconds
1566 11:43:45.718763 Google Chrome AP resets since EC boot: 0
1567 11:43:45.722062 Google Chrome most recent AP reset causes:
1568 11:43:45.728836 Google Chrome EC reset flags at last EC boot: reset-pin
1569 11:43:45.732231 PNP: 0c09.0 init finished in 20570 usecs
1570 11:43:45.735206 Devices initialized
1571 11:43:45.735298 Show all devs... After init.
1572 11:43:45.738502 Root Device: enabled 1
1573 11:43:45.742109 CPU_CLUSTER: 0: enabled 1
1574 11:43:45.745426 DOMAIN: 0000: enabled 1
1575 11:43:45.745518 APIC: 00: enabled 1
1576 11:43:45.748768 PCI: 00:00.0: enabled 1
1577 11:43:45.751764 PCI: 00:02.0: enabled 1
1578 11:43:45.755615 PCI: 00:04.0: enabled 0
1579 11:43:45.755708 PCI: 00:05.0: enabled 0
1580 11:43:45.758752 PCI: 00:12.0: enabled 1
1581 11:43:45.761706 PCI: 00:12.5: enabled 0
1582 11:43:45.761797 PCI: 00:12.6: enabled 0
1583 11:43:45.765237 PCI: 00:14.0: enabled 1
1584 11:43:45.768811 PCI: 00:14.1: enabled 0
1585 11:43:45.772361 PCI: 00:14.3: enabled 1
1586 11:43:45.772454 PCI: 00:14.5: enabled 0
1587 11:43:45.775002 PCI: 00:15.0: enabled 1
1588 11:43:45.778684 PCI: 00:15.1: enabled 1
1589 11:43:45.782276 PCI: 00:15.2: enabled 0
1590 11:43:45.782369 PCI: 00:15.3: enabled 0
1591 11:43:45.785239 PCI: 00:16.0: enabled 1
1592 11:43:45.788543 PCI: 00:16.1: enabled 0
1593 11:43:45.791909 PCI: 00:16.2: enabled 0
1594 11:43:45.792001 PCI: 00:16.3: enabled 0
1595 11:43:45.795240 PCI: 00:16.4: enabled 0
1596 11:43:45.798077 PCI: 00:16.5: enabled 0
1597 11:43:45.798170 PCI: 00:17.0: enabled 1
1598 11:43:45.801513 PCI: 00:19.0: enabled 1
1599 11:43:45.804804 PCI: 00:19.1: enabled 0
1600 11:43:45.808115 PCI: 00:19.2: enabled 0
1601 11:43:45.808207 PCI: 00:1a.0: enabled 0
1602 11:43:45.811449 PCI: 00:1c.0: enabled 0
1603 11:43:45.815199 PCI: 00:1c.1: enabled 0
1604 11:43:45.818361 PCI: 00:1c.2: enabled 0
1605 11:43:45.818453 PCI: 00:1c.3: enabled 0
1606 11:43:45.821866 PCI: 00:1c.4: enabled 0
1607 11:43:45.824830 PCI: 00:1c.5: enabled 0
1608 11:43:45.828279 PCI: 00:1c.6: enabled 0
1609 11:43:45.828371 PCI: 00:1c.7: enabled 0
1610 11:43:45.831459 PCI: 00:1d.0: enabled 1
1611 11:43:45.834756 PCI: 00:1d.1: enabled 0
1612 11:43:45.838112 PCI: 00:1d.2: enabled 0
1613 11:43:45.838205 PCI: 00:1d.3: enabled 0
1614 11:43:45.841474 PCI: 00:1d.4: enabled 0
1615 11:43:45.844917 PCI: 00:1d.5: enabled 0
1616 11:43:45.845009 PCI: 00:1e.0: enabled 1
1617 11:43:45.847914 PCI: 00:1e.1: enabled 0
1618 11:43:45.851454 PCI: 00:1e.2: enabled 1
1619 11:43:45.854612 PCI: 00:1e.3: enabled 1
1620 11:43:45.854704 PCI: 00:1f.0: enabled 1
1621 11:43:45.858279 PCI: 00:1f.1: enabled 0
1622 11:43:45.861368 PCI: 00:1f.2: enabled 0
1623 11:43:45.864664 PCI: 00:1f.3: enabled 1
1624 11:43:45.864792 PCI: 00:1f.4: enabled 1
1625 11:43:45.867626 PCI: 00:1f.5: enabled 1
1626 11:43:45.871282 PCI: 00:1f.6: enabled 0
1627 11:43:45.874352 USB0 port 0: enabled 1
1628 11:43:45.874479 I2C: 01:15: enabled 1
1629 11:43:45.877981 I2C: 02:5d: enabled 1
1630 11:43:45.880958 GENERIC: 0.0: enabled 1
1631 11:43:45.881044 I2C: 03:1a: enabled 1
1632 11:43:45.884618 I2C: 03:38: enabled 1
1633 11:43:45.888031 I2C: 03:39: enabled 1
1634 11:43:45.888122 I2C: 03:3a: enabled 1
1635 11:43:45.890991 I2C: 03:3b: enabled 1
1636 11:43:45.894564 PCI: 00:00.0: enabled 1
1637 11:43:45.894655 SPI: 00: enabled 1
1638 11:43:45.898210 SPI: 01: enabled 1
1639 11:43:45.901284 PNP: 0c09.0: enabled 1
1640 11:43:45.901434 USB2 port 0: enabled 1
1641 11:43:45.904582 USB2 port 1: enabled 1
1642 11:43:45.907800 USB2 port 2: enabled 0
1643 11:43:45.907987 USB2 port 3: enabled 0
1644 11:43:45.910855 USB2 port 5: enabled 0
1645 11:43:45.914281 USB2 port 6: enabled 1
1646 11:43:45.917443 USB2 port 9: enabled 1
1647 11:43:45.917588 USB3 port 0: enabled 1
1648 11:43:45.920869 USB3 port 1: enabled 1
1649 11:43:45.924161 USB3 port 2: enabled 1
1650 11:43:45.924325 USB3 port 3: enabled 1
1651 11:43:45.927678 USB3 port 4: enabled 0
1652 11:43:45.931303 APIC: 02: enabled 1
1653 11:43:45.931636 APIC: 01: enabled 1
1654 11:43:45.934390 APIC: 03: enabled 1
1655 11:43:45.937802 APIC: 07: enabled 1
1656 11:43:45.938086 APIC: 05: enabled 1
1657 11:43:45.941165 APIC: 04: enabled 1
1658 11:43:45.941691 APIC: 06: enabled 1
1659 11:43:45.944252 PCI: 00:08.0: enabled 1
1660 11:43:45.947512 PCI: 00:14.2: enabled 1
1661 11:43:45.950991 PCI: 01:00.0: enabled 1
1662 11:43:45.954736 Disabling ACPI via APMC:
1663 11:43:45.955270 done.
1664 11:43:45.961136 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1665 11:43:45.964775 ELOG: NV offset 0xaf0000 size 0x4000
1666 11:43:45.971613 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1667 11:43:45.977924 ELOG: Event(17) added with size 13 at 2023-06-09 11:43:43 UTC
1668 11:43:45.984675 ELOG: Event(92) added with size 9 at 2023-06-09 11:43:43 UTC
1669 11:43:45.991376 ELOG: Event(93) added with size 9 at 2023-06-09 11:43:43 UTC
1670 11:43:45.997913 ELOG: Event(9A) added with size 9 at 2023-06-09 11:43:43 UTC
1671 11:43:46.004293 ELOG: Event(9E) added with size 10 at 2023-06-09 11:43:43 UTC
1672 11:43:46.010917 ELOG: Event(9F) added with size 14 at 2023-06-09 11:43:43 UTC
1673 11:43:46.014102 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1674 11:43:46.021162 ELOG: Event(A1) added with size 10 at 2023-06-09 11:43:43 UTC
1675 11:43:46.030924 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1676 11:43:46.037633 ELOG: Event(A0) added with size 9 at 2023-06-09 11:43:43 UTC
1677 11:43:46.040990 elog_add_boot_reason: Logged dev mode boot
1678 11:43:46.041419 Finalize devices...
1679 11:43:46.044439 PCI: 00:17.0 final
1680 11:43:46.047535 Devices finalized
1681 11:43:46.051536 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1682 11:43:46.057986 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1683 11:43:46.061263 ME: HFSTS1 : 0x90000245
1684 11:43:46.064167 ME: HFSTS2 : 0x3B850126
1685 11:43:46.067858 ME: HFSTS3 : 0x00000020
1686 11:43:46.074550 ME: HFSTS4 : 0x00004800
1687 11:43:46.077469 ME: HFSTS5 : 0x00000000
1688 11:43:46.081072 ME: HFSTS6 : 0x40400006
1689 11:43:46.084594 ME: Manufacturing Mode : NO
1690 11:43:46.087579 ME: FW Partition Table : OK
1691 11:43:46.091106 ME: Bringup Loader Failure : NO
1692 11:43:46.094297 ME: Firmware Init Complete : YES
1693 11:43:46.097247 ME: Boot Options Present : NO
1694 11:43:46.101035 ME: Update In Progress : NO
1695 11:43:46.104477 ME: D0i3 Support : YES
1696 11:43:46.107425 ME: Low Power State Enabled : NO
1697 11:43:46.110872 ME: CPU Replaced : NO
1698 11:43:46.114190 ME: CPU Replacement Valid : YES
1699 11:43:46.117180 ME: Current Working State : 5
1700 11:43:46.120604 ME: Current Operation State : 1
1701 11:43:46.123846 ME: Current Operation Mode : 0
1702 11:43:46.127145 ME: Error Code : 0
1703 11:43:46.130286 ME: CPU Debug Disabled : YES
1704 11:43:46.133671 ME: TXT Support : NO
1705 11:43:46.140719 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1706 11:43:46.144130 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1707 11:43:46.147490 CBFS @ c08000 size 3f8000
1708 11:43:46.153600 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1709 11:43:46.156867 CBFS: Locating 'fallback/dsdt.aml'
1710 11:43:46.160212 CBFS: Found @ offset 10bb80 size 3fa5
1711 11:43:46.167225 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1712 11:43:46.170553 CBFS @ c08000 size 3f8000
1713 11:43:46.174205 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1714 11:43:46.177298 CBFS: Locating 'fallback/slic'
1715 11:43:46.181933 CBFS: 'fallback/slic' not found.
1716 11:43:46.188600 ACPI: Writing ACPI tables at 99b3e000.
1717 11:43:46.189032 ACPI: * FACS
1718 11:43:46.192166 ACPI: * DSDT
1719 11:43:46.195194 Ramoops buffer: 0x100000@0x99a3d000.
1720 11:43:46.198048 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1721 11:43:46.204746 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1722 11:43:46.208578 Google Chrome EC: version:
1723 11:43:46.211849 ro: helios_v2.0.2659-56403530b
1724 11:43:46.214665 rw: helios_v2.0.2849-c41de27e7d
1725 11:43:46.215035 running image: 1
1726 11:43:46.219329 ACPI: * FADT
1727 11:43:46.219808 SCI is IRQ9
1728 11:43:46.225000 ACPI: added table 1/32, length now 40
1729 11:43:46.225094 ACPI: * SSDT
1730 11:43:46.228452 Found 1 CPU(s) with 8 core(s) each.
1731 11:43:46.231909 Error: Could not locate 'wifi_sar' in VPD.
1732 11:43:46.238832 Checking CBFS for default SAR values
1733 11:43:46.241975 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1734 11:43:46.245191 CBFS @ c08000 size 3f8000
1735 11:43:46.251901 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1736 11:43:46.255312 CBFS: Locating 'wifi_sar_defaults.hex'
1737 11:43:46.258204 CBFS: Found @ offset 5fac0 size 77
1738 11:43:46.261650 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1739 11:43:46.268761 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1740 11:43:46.271414 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1741 11:43:46.278181 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1742 11:43:46.281738 failed to find key in VPD: dsm_calib_r0_0
1743 11:43:46.291955 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1744 11:43:46.294937 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1745 11:43:46.298461 failed to find key in VPD: dsm_calib_r0_1
1746 11:43:46.308037 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1747 11:43:46.315102 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1748 11:43:46.318269 failed to find key in VPD: dsm_calib_r0_2
1749 11:43:46.328299 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1750 11:43:46.331687 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1751 11:43:46.338040 failed to find key in VPD: dsm_calib_r0_3
1752 11:43:46.344604 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1753 11:43:46.351586 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1754 11:43:46.354886 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1755 11:43:46.357998 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1756 11:43:46.361702 EC returned error result code 1
1757 11:43:46.365824 EC returned error result code 1
1758 11:43:46.369218 EC returned error result code 1
1759 11:43:46.376269 PS2K: Bad resp from EC. Vivaldi disabled!
1760 11:43:46.379685 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1761 11:43:46.385692 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1762 11:43:46.392394 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1763 11:43:46.396055 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1764 11:43:46.402145 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1765 11:43:46.409404 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1766 11:43:46.415864 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1767 11:43:46.418843 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1768 11:43:46.425432 ACPI: added table 2/32, length now 44
1769 11:43:46.425900 ACPI: * MCFG
1770 11:43:46.428916 ACPI: added table 3/32, length now 48
1771 11:43:46.432675 ACPI: * TPM2
1772 11:43:46.435505 TPM2 log created at 99a2d000
1773 11:43:46.438913 ACPI: added table 4/32, length now 52
1774 11:43:46.439343 ACPI: * MADT
1775 11:43:46.442386 SCI is IRQ9
1776 11:43:46.445343 ACPI: added table 5/32, length now 56
1777 11:43:46.445772 current = 99b43ac0
1778 11:43:46.449040 ACPI: * DMAR
1779 11:43:46.452009 ACPI: added table 6/32, length now 60
1780 11:43:46.455622 ACPI: * IGD OpRegion
1781 11:43:46.456244 GMA: Found VBT in CBFS
1782 11:43:46.458793 GMA: Found valid VBT in CBFS
1783 11:43:46.462029 ACPI: added table 7/32, length now 64
1784 11:43:46.465118 ACPI: * HPET
1785 11:43:46.468741 ACPI: added table 8/32, length now 68
1786 11:43:46.469197 ACPI: done.
1787 11:43:46.472486 ACPI tables: 31744 bytes.
1788 11:43:46.476085 smbios_write_tables: 99a2c000
1789 11:43:46.479271 EC returned error result code 3
1790 11:43:46.482497 Couldn't obtain OEM name from CBI
1791 11:43:46.485551 Create SMBIOS type 17
1792 11:43:46.488972 PCI: 00:00.0 (Intel Cannonlake)
1793 11:43:46.492550 PCI: 00:14.3 (Intel WiFi)
1794 11:43:46.495319 SMBIOS tables: 939 bytes.
1795 11:43:46.499056 Writing table forward entry at 0x00000500
1796 11:43:46.505539 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1797 11:43:46.509104 Writing coreboot table at 0x99b62000
1798 11:43:46.515385 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1799 11:43:46.519067 1. 0000000000001000-000000000009ffff: RAM
1800 11:43:46.521900 2. 00000000000a0000-00000000000fffff: RESERVED
1801 11:43:46.528573 3. 0000000000100000-0000000099a2bfff: RAM
1802 11:43:46.531986 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1803 11:43:46.538514 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1804 11:43:46.545045 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1805 11:43:46.548531 7. 000000009a000000-000000009f7fffff: RESERVED
1806 11:43:46.555508 8. 00000000e0000000-00000000efffffff: RESERVED
1807 11:43:46.557881 9. 00000000fc000000-00000000fc000fff: RESERVED
1808 11:43:46.561593 10. 00000000fe000000-00000000fe00ffff: RESERVED
1809 11:43:46.568374 11. 00000000fed10000-00000000fed17fff: RESERVED
1810 11:43:46.571369 12. 00000000fed80000-00000000fed83fff: RESERVED
1811 11:43:46.577742 13. 00000000fed90000-00000000fed91fff: RESERVED
1812 11:43:46.581307 14. 00000000feda0000-00000000feda1fff: RESERVED
1813 11:43:46.584621 15. 0000000100000000-000000045e7fffff: RAM
1814 11:43:46.591296 Graphics framebuffer located at 0xc0000000
1815 11:43:46.594487 Passing 5 GPIOs to payload:
1816 11:43:46.598039 NAME | PORT | POLARITY | VALUE
1817 11:43:46.604219 write protect | undefined | high | low
1818 11:43:46.607798 lid | undefined | high | high
1819 11:43:46.614682 power | undefined | high | low
1820 11:43:46.621090 oprom | undefined | high | low
1821 11:43:46.624104 EC in RW | 0x000000cb | high | low
1822 11:43:46.628021 Board ID: 4
1823 11:43:46.630857 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1824 11:43:46.634341 CBFS @ c08000 size 3f8000
1825 11:43:46.640919 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1826 11:43:46.644405 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1827 11:43:46.647301 coreboot table: 1492 bytes.
1828 11:43:46.651020 IMD ROOT 0. 99fff000 00001000
1829 11:43:46.654106 IMD SMALL 1. 99ffe000 00001000
1830 11:43:46.657678 FSP MEMORY 2. 99c4e000 003b0000
1831 11:43:46.660980 CONSOLE 3. 99c2e000 00020000
1832 11:43:46.663948 FMAP 4. 99c2d000 0000054e
1833 11:43:46.667584 TIME STAMP 5. 99c2c000 00000910
1834 11:43:46.670876 VBOOT WORK 6. 99c18000 00014000
1835 11:43:46.674101 MRC DATA 7. 99c16000 00001958
1836 11:43:46.677487 ROMSTG STCK 8. 99c15000 00001000
1837 11:43:46.681384 AFTER CAR 9. 99c0b000 0000a000
1838 11:43:46.684009 RAMSTAGE 10. 99baf000 0005c000
1839 11:43:46.687426 REFCODE 11. 99b7a000 00035000
1840 11:43:46.691080 SMM BACKUP 12. 99b6a000 00010000
1841 11:43:46.694001 COREBOOT 13. 99b62000 00008000
1842 11:43:46.697467 ACPI 14. 99b3e000 00024000
1843 11:43:46.700871 ACPI GNVS 15. 99b3d000 00001000
1844 11:43:46.704688 RAMOOPS 16. 99a3d000 00100000
1845 11:43:46.707402 TPM2 TCGLOG17. 99a2d000 00010000
1846 11:43:46.710863 SMBIOS 18. 99a2c000 00000800
1847 11:43:46.714259 IMD small region:
1848 11:43:46.717147 IMD ROOT 0. 99ffec00 00000400
1849 11:43:46.720871 FSP RUNTIME 1. 99ffebe0 00000004
1850 11:43:46.723818 EC HOSTEVENT 2. 99ffebc0 00000008
1851 11:43:46.727458 POWER STATE 3. 99ffeb80 00000040
1852 11:43:46.730544 ROMSTAGE 4. 99ffeb60 00000004
1853 11:43:46.734322 MEM INFO 5. 99ffe9a0 000001b9
1854 11:43:46.737143 VPD 6. 99ffe920 0000006c
1855 11:43:46.740603 MTRR: Physical address space:
1856 11:43:46.747153 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1857 11:43:46.754103 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1858 11:43:46.760613 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1859 11:43:46.767216 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1860 11:43:46.773772 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1861 11:43:46.780141 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1862 11:43:46.783428 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1863 11:43:46.790551 MTRR: Fixed MSR 0x250 0x0606060606060606
1864 11:43:46.793769 MTRR: Fixed MSR 0x258 0x0606060606060606
1865 11:43:46.796868 MTRR: Fixed MSR 0x259 0x0000000000000000
1866 11:43:46.800255 MTRR: Fixed MSR 0x268 0x0606060606060606
1867 11:43:46.806676 MTRR: Fixed MSR 0x269 0x0606060606060606
1868 11:43:46.810094 MTRR: Fixed MSR 0x26a 0x0606060606060606
1869 11:43:46.814015 MTRR: Fixed MSR 0x26b 0x0606060606060606
1870 11:43:46.817269 MTRR: Fixed MSR 0x26c 0x0606060606060606
1871 11:43:46.823263 MTRR: Fixed MSR 0x26d 0x0606060606060606
1872 11:43:46.826702 MTRR: Fixed MSR 0x26e 0x0606060606060606
1873 11:43:46.829966 MTRR: Fixed MSR 0x26f 0x0606060606060606
1874 11:43:46.833707 call enable_fixed_mtrr()
1875 11:43:46.836500 CPU physical address size: 39 bits
1876 11:43:46.840026 MTRR: default type WB/UC MTRR counts: 6/8.
1877 11:43:46.843367 MTRR: WB selected as default type.
1878 11:43:46.849971 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1879 11:43:46.856569 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1880 11:43:46.863342 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1881 11:43:46.869735 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1882 11:43:46.876471 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1883 11:43:46.882998 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1884 11:43:46.883091
1885 11:43:46.883163 MTRR check
1886 11:43:46.886328 Fixed MTRRs : Enabled
1887 11:43:46.889563 Variable MTRRs: Enabled
1888 11:43:46.889680
1889 11:43:46.892858 MTRR: Fixed MSR 0x250 0x0606060606060606
1890 11:43:46.896096 MTRR: Fixed MSR 0x258 0x0606060606060606
1891 11:43:46.902656 MTRR: Fixed MSR 0x259 0x0000000000000000
1892 11:43:46.905879 MTRR: Fixed MSR 0x268 0x0606060606060606
1893 11:43:46.909285 MTRR: Fixed MSR 0x269 0x0606060606060606
1894 11:43:46.913009 MTRR: Fixed MSR 0x26a 0x0606060606060606
1895 11:43:46.919425 MTRR: Fixed MSR 0x26b 0x0606060606060606
1896 11:43:46.922358 MTRR: Fixed MSR 0x26c 0x0606060606060606
1897 11:43:46.926225 MTRR: Fixed MSR 0x26d 0x0606060606060606
1898 11:43:46.929559 MTRR: Fixed MSR 0x26e 0x0606060606060606
1899 11:43:46.936113 MTRR: Fixed MSR 0x26f 0x0606060606060606
1900 11:43:46.939034 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1901 11:43:46.942760 call enable_fixed_mtrr()
1902 11:43:46.949127 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1903 11:43:46.952618 CPU physical address size: 39 bits
1904 11:43:46.955615 CBFS @ c08000 size 3f8000
1905 11:43:46.959100 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1906 11:43:46.965671 MTRR: Fixed MSR 0x250 0x0606060606060606
1907 11:43:46.968714 MTRR: Fixed MSR 0x250 0x0606060606060606
1908 11:43:46.972358 MTRR: Fixed MSR 0x258 0x0606060606060606
1909 11:43:46.975348 MTRR: Fixed MSR 0x259 0x0000000000000000
1910 11:43:46.978682 MTRR: Fixed MSR 0x268 0x0606060606060606
1911 11:43:46.985352 MTRR: Fixed MSR 0x269 0x0606060606060606
1912 11:43:46.988452 MTRR: Fixed MSR 0x26a 0x0606060606060606
1913 11:43:46.992417 MTRR: Fixed MSR 0x26b 0x0606060606060606
1914 11:43:46.996281 MTRR: Fixed MSR 0x26c 0x0606060606060606
1915 11:43:47.001759 MTRR: Fixed MSR 0x26d 0x0606060606060606
1916 11:43:47.005583 MTRR: Fixed MSR 0x26e 0x0606060606060606
1917 11:43:47.008882 MTRR: Fixed MSR 0x26f 0x0606060606060606
1918 11:43:47.011753 MTRR: Fixed MSR 0x258 0x0606060606060606
1919 11:43:47.015438 call enable_fixed_mtrr()
1920 11:43:47.018303 MTRR: Fixed MSR 0x259 0x0000000000000000
1921 11:43:47.025397 MTRR: Fixed MSR 0x268 0x0606060606060606
1922 11:43:47.028211 MTRR: Fixed MSR 0x269 0x0606060606060606
1923 11:43:47.031690 MTRR: Fixed MSR 0x26a 0x0606060606060606
1924 11:43:47.035165 MTRR: Fixed MSR 0x26b 0x0606060606060606
1925 11:43:47.041693 MTRR: Fixed MSR 0x26c 0x0606060606060606
1926 11:43:47.045009 MTRR: Fixed MSR 0x26d 0x0606060606060606
1927 11:43:47.048696 MTRR: Fixed MSR 0x26e 0x0606060606060606
1928 11:43:47.051765 MTRR: Fixed MSR 0x26f 0x0606060606060606
1929 11:43:47.055161 CPU physical address size: 39 bits
1930 11:43:47.058636 call enable_fixed_mtrr()
1931 11:43:47.062044 MTRR: Fixed MSR 0x250 0x0606060606060606
1932 11:43:47.068535 MTRR: Fixed MSR 0x258 0x0606060606060606
1933 11:43:47.072095 MTRR: Fixed MSR 0x259 0x0000000000000000
1934 11:43:47.075199 MTRR: Fixed MSR 0x268 0x0606060606060606
1935 11:43:47.078761 MTRR: Fixed MSR 0x269 0x0606060606060606
1936 11:43:47.085000 MTRR: Fixed MSR 0x26a 0x0606060606060606
1937 11:43:47.088283 MTRR: Fixed MSR 0x26b 0x0606060606060606
1938 11:43:47.091553 MTRR: Fixed MSR 0x26c 0x0606060606060606
1939 11:43:47.094844 MTRR: Fixed MSR 0x26d 0x0606060606060606
1940 11:43:47.101579 MTRR: Fixed MSR 0x26e 0x0606060606060606
1941 11:43:47.104894 MTRR: Fixed MSR 0x26f 0x0606060606060606
1942 11:43:47.108266 MTRR: Fixed MSR 0x250 0x0606060606060606
1943 11:43:47.111417 call enable_fixed_mtrr()
1944 11:43:47.114748 MTRR: Fixed MSR 0x258 0x0606060606060606
1945 11:43:47.118100 MTRR: Fixed MSR 0x259 0x0000000000000000
1946 11:43:47.124626 MTRR: Fixed MSR 0x268 0x0606060606060606
1947 11:43:47.128251 MTRR: Fixed MSR 0x269 0x0606060606060606
1948 11:43:47.131554 MTRR: Fixed MSR 0x26a 0x0606060606060606
1949 11:43:47.134960 MTRR: Fixed MSR 0x26b 0x0606060606060606
1950 11:43:47.141650 MTRR: Fixed MSR 0x26c 0x0606060606060606
1951 11:43:47.144452 MTRR: Fixed MSR 0x26d 0x0606060606060606
1952 11:43:47.147794 MTRR: Fixed MSR 0x26e 0x0606060606060606
1953 11:43:47.151582 MTRR: Fixed MSR 0x26f 0x0606060606060606
1954 11:43:47.154948 CPU physical address size: 39 bits
1955 11:43:47.157937 call enable_fixed_mtrr()
1956 11:43:47.161463 CBFS: Locating 'fallback/payload'
1957 11:43:47.164650 CPU physical address size: 39 bits
1958 11:43:47.168003 CPU physical address size: 39 bits
1959 11:43:47.175023 MTRR: Fixed MSR 0x250 0x0606060606060606
1960 11:43:47.177934 MTRR: Fixed MSR 0x258 0x0606060606060606
1961 11:43:47.181455 MTRR: Fixed MSR 0x259 0x0000000000000000
1962 11:43:47.184502 MTRR: Fixed MSR 0x268 0x0606060606060606
1963 11:43:47.191345 MTRR: Fixed MSR 0x269 0x0606060606060606
1964 11:43:47.194826 MTRR: Fixed MSR 0x26a 0x0606060606060606
1965 11:43:47.198175 MTRR: Fixed MSR 0x26b 0x0606060606060606
1966 11:43:47.201349 MTRR: Fixed MSR 0x26c 0x0606060606060606
1967 11:43:47.205062 MTRR: Fixed MSR 0x26d 0x0606060606060606
1968 11:43:47.211141 MTRR: Fixed MSR 0x26e 0x0606060606060606
1969 11:43:47.214509 MTRR: Fixed MSR 0x26f 0x0606060606060606
1970 11:43:47.217893 MTRR: Fixed MSR 0x250 0x0606060606060606
1971 11:43:47.220958 MTRR: Fixed MSR 0x258 0x0606060606060606
1972 11:43:47.227564 MTRR: Fixed MSR 0x259 0x0000000000000000
1973 11:43:47.231093 MTRR: Fixed MSR 0x268 0x0606060606060606
1974 11:43:47.234662 MTRR: Fixed MSR 0x269 0x0606060606060606
1975 11:43:47.237507 MTRR: Fixed MSR 0x26a 0x0606060606060606
1976 11:43:47.244318 MTRR: Fixed MSR 0x26b 0x0606060606060606
1977 11:43:47.247283 MTRR: Fixed MSR 0x26c 0x0606060606060606
1978 11:43:47.250786 MTRR: Fixed MSR 0x26d 0x0606060606060606
1979 11:43:47.254029 MTRR: Fixed MSR 0x26e 0x0606060606060606
1980 11:43:47.260573 MTRR: Fixed MSR 0x26f 0x0606060606060606
1981 11:43:47.260665 call enable_fixed_mtrr()
1982 11:43:47.264001 call enable_fixed_mtrr()
1983 11:43:47.267745 CPU physical address size: 39 bits
1984 11:43:47.271079 CPU physical address size: 39 bits
1985 11:43:47.277616 CBFS: Found @ offset 1c96c0 size 3f798
1986 11:43:47.280675 Checking segment from ROM address 0xffdd16f8
1987 11:43:47.284192 Checking segment from ROM address 0xffdd1714
1988 11:43:47.290753 Loading segment from ROM address 0xffdd16f8
1989 11:43:47.290850 code (compression=0)
1990 11:43:47.300873 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1991 11:43:47.310481 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1992 11:43:47.310578 it's not compressed!
1993 11:43:47.403093 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1994 11:43:47.409687 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1995 11:43:47.413431 Loading segment from ROM address 0xffdd1714
1996 11:43:47.416641 Entry Point 0x30000000
1997 11:43:47.419900 Loaded segments
1998 11:43:47.425419 Finalizing chipset.
1999 11:43:47.428830 Finalizing SMM.
2000 11:43:47.432474 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2001 11:43:47.435200 mp_park_aps done after 0 msecs.
2002 11:43:47.442011 Jumping to boot code at 30000000(99b62000)
2003 11:43:47.448596 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2004 11:43:47.448692
2005 11:43:47.448787
2006 11:43:47.448878
2007 11:43:47.452103 Starting depthcharge on Helios...
2008 11:43:47.452198
2009 11:43:47.452591 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2010 11:43:47.452719 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2011 11:43:47.452828 Setting prompt string to ['hatch:']
2012 11:43:47.452935 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2013 11:43:47.461961 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2014 11:43:47.462059
2015 11:43:47.468320 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2016 11:43:47.468416
2017 11:43:47.475631 board_setup: Info: eMMC controller not present; skipping
2018 11:43:47.475730
2019 11:43:47.478453 New NVMe Controller 0x30053ac0 @ 00:1d:00
2020 11:43:47.478550
2021 11:43:47.485059 board_setup: Info: SDHCI controller not present; skipping
2022 11:43:47.485155
2023 11:43:47.488634 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2024 11:43:47.491726
2025 11:43:47.491822 Wipe memory regions:
2026 11:43:47.491927
2027 11:43:47.495279 [0x00000000001000, 0x000000000a0000)
2028 11:43:47.495404
2029 11:43:47.498331 [0x00000000100000, 0x00000030000000)
2030 11:43:47.564633
2031 11:43:47.568139 [0x00000030657430, 0x00000099a2c000)
2032 11:43:47.714554
2033 11:43:47.717525 [0x00000100000000, 0x0000045e800000)
2034 11:43:49.173748
2035 11:43:49.173904 R8152: Initializing
2036 11:43:49.174009
2037 11:43:49.177213 Version 9 (ocp_data = 6010)
2038 11:43:49.181315
2039 11:43:49.181402 R8152: Done initializing
2040 11:43:49.181490
2041 11:43:49.184264 Adding net device
2042 11:43:49.667062
2043 11:43:49.667234 R8152: Initializing
2044 11:43:49.667347
2045 11:43:49.670397 Version 6 (ocp_data = 5c30)
2046 11:43:49.670517
2047 11:43:49.673754 R8152: Done initializing
2048 11:43:49.673845
2049 11:43:49.677329 net_add_device: Attemp to include the same device
2050 11:43:49.680585
2051 11:43:49.687775 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2052 11:43:49.687867
2053 11:43:49.687938
2054 11:43:49.688005
2055 11:43:49.688296 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2057 11:43:49.788642 hatch: tftpboot 192.168.201.1 10657578/tftp-deploy-nxpk8m16/kernel/bzImage 10657578/tftp-deploy-nxpk8m16/kernel/cmdline 10657578/tftp-deploy-nxpk8m16/ramdisk/ramdisk.cpio.gz
2058 11:43:49.788820 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2059 11:43:49.788909 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2060 11:43:49.793420 tftpboot 192.168.201.1 10657578/tftp-deploy-nxpk8m16/kernel/bzIploy-nxpk8m16/kernel/cmdline 10657578/tftp-deploy-nxpk8m16/ramdisk/ramdisk.cpio.gz
2061 11:43:49.793518
2062 11:43:49.793591 Waiting for link
2063 11:43:49.994170
2064 11:43:49.994377 done.
2065 11:43:49.994494
2066 11:43:49.994607 MAC: 00:24:32:50:1a:59
2067 11:43:49.994718
2068 11:43:49.997341 Sending DHCP discover... done.
2069 11:43:49.997439
2070 11:43:50.000466 Waiting for reply... done.
2071 11:43:50.000564
2072 11:43:50.003905 Sending DHCP request... done.
2073 11:43:50.004002
2074 11:43:50.007164 Waiting for reply... done.
2075 11:43:50.007261
2076 11:43:50.010838 My ip is 192.168.201.14
2077 11:43:50.010933
2078 11:43:50.014152 The DHCP server ip is 192.168.201.1
2079 11:43:50.014248
2080 11:43:50.017281 TFTP server IP predefined by user: 192.168.201.1
2081 11:43:50.017378
2082 11:43:50.023696 Bootfile predefined by user: 10657578/tftp-deploy-nxpk8m16/kernel/bzImage
2083 11:43:50.023792
2084 11:43:50.027313 Sending tftp read request... done.
2085 11:43:50.027409
2086 11:43:50.034235 Waiting for the transfer...
2087 11:43:50.034333
2088 11:43:50.591685 00000000 ################################################################
2089 11:43:50.591848
2090 11:43:51.132614 00080000 ################################################################
2091 11:43:51.132781
2092 11:43:51.692397 00100000 ################################################################
2093 11:43:51.692563
2094 11:43:52.254288 00180000 ################################################################
2095 11:43:52.254452
2096 11:43:52.899926 00200000 ################################################################
2097 11:43:52.900090
2098 11:43:53.488996 00280000 ################################################################
2099 11:43:53.489160
2100 11:43:54.153481 00300000 ################################################################
2101 11:43:54.153988
2102 11:43:54.802401 00380000 ################################################################
2103 11:43:54.802913
2104 11:43:55.408850 00400000 ################################################################
2105 11:43:55.409011
2106 11:43:55.994030 00480000 ################################################################
2107 11:43:55.994222
2108 11:43:56.608101 00500000 ################################################################
2109 11:43:56.608730
2110 11:43:57.227081 00580000 ################################################################
2111 11:43:57.227653
2112 11:43:57.838118 00600000 ################################################################
2113 11:43:57.838636
2114 11:43:58.503397 00680000 ################################################################
2115 11:43:58.503956
2116 11:43:59.194376 00700000 ################################################################
2117 11:43:59.194518
2118 11:43:59.809239 00780000 ################################################################
2119 11:43:59.809816
2120 11:44:00.455704 00800000 ################################################################
2121 11:44:00.455855
2122 11:44:01.035125 00880000 ################################################################
2123 11:44:01.035288
2124 11:44:01.661306 00900000 ################################################################
2125 11:44:01.661979
2126 11:44:02.343928 00980000 ################################################################
2127 11:44:02.344471
2128 11:44:02.843264 00a00000 ############################################### done.
2129 11:44:02.843836
2130 11:44:02.846433 The bootfile was 10863104 bytes long.
2131 11:44:02.846869
2132 11:44:02.849716 Sending tftp read request... done.
2133 11:44:02.850144
2134 11:44:02.853088 Waiting for the transfer...
2135 11:44:02.853631
2136 11:44:03.545843 00000000 ################################################################
2137 11:44:03.546038
2138 11:44:04.262893 00080000 ################################################################
2139 11:44:04.263427
2140 11:44:04.965918 00100000 ################################################################
2141 11:44:04.966434
2142 11:44:05.674849 00180000 ################################################################
2143 11:44:05.675370
2144 11:44:06.372060 00200000 ################################################################
2145 11:44:06.372576
2146 11:44:07.075763 00280000 ################################################################
2147 11:44:07.076294
2148 11:44:07.775062 00300000 ################################################################
2149 11:44:07.775671
2150 11:44:08.484044 00380000 ################################################################
2151 11:44:08.484619
2152 11:44:09.186042 00400000 ################################################################
2153 11:44:09.186602
2154 11:44:09.865371 00480000 ################################################################
2155 11:44:09.865559
2156 11:44:10.566385 00500000 ################################################################
2157 11:44:10.566926
2158 11:44:11.278240 00580000 ################################################################
2159 11:44:11.278903
2160 11:44:11.419712 00600000 ############# done.
2161 11:44:11.420213
2162 11:44:11.423475 Sending tftp read request... done.
2163 11:44:11.423908
2164 11:44:11.426729 Waiting for the transfer...
2165 11:44:11.427154
2166 11:44:11.427528 00000000 # done.
2167 11:44:11.427864
2168 11:44:11.436900 Command line loaded dynamically from TFTP file: 10657578/tftp-deploy-nxpk8m16/kernel/cmdline
2169 11:44:11.437390
2170 11:44:11.462902 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10657578/extract-nfsrootfs-vgs5u023,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2171 11:44:11.463474
2172 11:44:11.469804 ec_init(0): CrosEC protocol v3 supported (256, 256)
2173 11:44:11.473904
2174 11:44:11.476971 Shutting down all USB controllers.
2175 11:44:11.477521
2176 11:44:11.477860 Removing current net device
2177 11:44:11.480904
2178 11:44:11.481465 Finalizing coreboot
2179 11:44:11.481818
2180 11:44:11.487609 Exiting depthcharge with code 4 at timestamp: 31392819
2181 11:44:11.488036
2182 11:44:11.488370
2183 11:44:11.488683 Starting kernel ...
2184 11:44:11.488987
2185 11:44:11.489277
2186 11:44:11.490460 end: 2.2.4 bootloader-commands (duration 00:00:24) [common]
2187 11:44:11.490944 start: 2.2.5 auto-login-action (timeout 00:04:18) [common]
2188 11:44:11.491320 Setting prompt string to ['Linux version [0-9]']
2189 11:44:11.491726 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2190 11:44:11.492097 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2192 11:48:29.491823 end: 2.2.5 auto-login-action (duration 00:04:18) [common]
2194 11:48:29.492812 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 258 seconds'
2196 11:48:29.493650 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2199 11:48:29.495160 end: 2 depthcharge-action (duration 00:05:00) [common]
2201 11:48:29.496210 Cleaning after the job
2202 11:48:29.496312 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10657578/tftp-deploy-nxpk8m16/ramdisk
2203 11:48:29.497242 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10657578/tftp-deploy-nxpk8m16/kernel
2204 11:48:29.498587 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10657578/tftp-deploy-nxpk8m16/nfsrootfs
2205 11:48:29.591381 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10657578/tftp-deploy-nxpk8m16/modules
2206 11:48:29.592109 start: 4.1 power-off (timeout 00:00:30) [common]
2207 11:48:29.592303 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2208 11:48:29.671996 >> Command sent successfully.
2209 11:48:29.678408 Returned 0 in 0 seconds
2210 11:48:29.779522 end: 4.1 power-off (duration 00:00:00) [common]
2212 11:48:29.781029 start: 4.2 read-feedback (timeout 00:10:00) [common]
2213 11:48:29.782152 Listened to connection for namespace 'common' for up to 1s
2215 11:48:29.783365 Listened to connection for namespace 'common' for up to 1s
2216 11:48:30.782870 Finalising connection for namespace 'common'
2217 11:48:30.783529 Disconnecting from shell: Finalise
2218 11:48:30.783908
2219 11:48:30.884881 end: 4.2 read-feedback (duration 00:00:01) [common]
2220 11:48:30.885428 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10657578
2221 11:48:31.359354 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10657578
2222 11:48:31.359583 JobError: Your job cannot terminate cleanly.