Boot log: acer-cb317-1h-c3z6-dedede
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
1 12:17:12.908623 lava-dispatcher, installed at version: 2023.05.1
2 12:17:12.908849 start: 0 validate
3 12:17:12.909004 Start time: 2023-06-14 12:17:12.908995+00:00 (UTC)
4 12:17:12.909158 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:17:12.909364 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230609.0%2Fx86%2Frootfs.cpio.gz exists
6 12:17:13.171618 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:17:13.171831 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.284-cip99-114-g02e97826987bf%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:17:13.440651 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:17:13.440843 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.284-cip99-114-g02e97826987bf%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:17:13.713927 validate duration: 0.80
12 12:17:13.714317 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:17:13.714466 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:17:13.714591 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:17:13.714747 Not decompressing ramdisk as can be used compressed.
16 12:17:13.714873 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230609.0/x86/rootfs.cpio.gz
17 12:17:13.714968 saving as /var/lib/lava/dispatcher/tmp/10724500/tftp-deploy-q3cl5j3p/ramdisk/rootfs.cpio.gz
18 12:17:13.715070 total size: 8435745 (8MB)
19 12:17:13.716177 progress 0% (0MB)
20 12:17:13.718555 progress 5% (0MB)
21 12:17:13.721104 progress 10% (0MB)
22 12:17:13.723746 progress 15% (1MB)
23 12:17:13.726424 progress 20% (1MB)
24 12:17:13.728972 progress 25% (2MB)
25 12:17:13.731501 progress 30% (2MB)
26 12:17:13.733845 progress 35% (2MB)
27 12:17:13.736169 progress 40% (3MB)
28 12:17:13.738683 progress 45% (3MB)
29 12:17:13.741201 progress 50% (4MB)
30 12:17:13.743704 progress 55% (4MB)
31 12:17:13.746104 progress 60% (4MB)
32 12:17:13.748554 progress 65% (5MB)
33 12:17:13.751015 progress 70% (5MB)
34 12:17:13.753428 progress 75% (6MB)
35 12:17:13.755615 progress 80% (6MB)
36 12:17:13.757960 progress 85% (6MB)
37 12:17:13.760397 progress 90% (7MB)
38 12:17:13.762706 progress 95% (7MB)
39 12:17:13.765305 progress 100% (8MB)
40 12:17:13.765513 8MB downloaded in 0.05s (159.50MB/s)
41 12:17:13.765729 end: 1.1.1 http-download (duration 00:00:00) [common]
43 12:17:13.766128 end: 1.1 download-retry (duration 00:00:00) [common]
44 12:17:13.766247 start: 1.2 download-retry (timeout 00:10:00) [common]
45 12:17:13.766387 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 12:17:13.766574 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.284-cip99-114-g02e97826987bf/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:17:13.766672 saving as /var/lib/lava/dispatcher/tmp/10724500/tftp-deploy-q3cl5j3p/kernel/bzImage
48 12:17:13.766769 total size: 10863104 (10MB)
49 12:17:13.766866 No compression specified
50 12:17:13.768672 progress 0% (0MB)
51 12:17:13.771806 progress 5% (0MB)
52 12:17:13.774884 progress 10% (1MB)
53 12:17:13.777899 progress 15% (1MB)
54 12:17:13.780990 progress 20% (2MB)
55 12:17:13.784015 progress 25% (2MB)
56 12:17:13.787218 progress 30% (3MB)
57 12:17:13.790435 progress 35% (3MB)
58 12:17:13.793572 progress 40% (4MB)
59 12:17:13.796870 progress 45% (4MB)
60 12:17:13.799899 progress 50% (5MB)
61 12:17:13.802936 progress 55% (5MB)
62 12:17:13.805828 progress 60% (6MB)
63 12:17:13.808874 progress 65% (6MB)
64 12:17:13.811928 progress 70% (7MB)
65 12:17:13.814947 progress 75% (7MB)
66 12:17:13.817938 progress 80% (8MB)
67 12:17:13.821054 progress 85% (8MB)
68 12:17:13.824228 progress 90% (9MB)
69 12:17:13.827141 progress 95% (9MB)
70 12:17:13.830151 progress 100% (10MB)
71 12:17:13.830349 10MB downloaded in 0.06s (162.94MB/s)
72 12:17:13.830514 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:17:13.830763 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:17:13.830855 start: 1.3 download-retry (timeout 00:10:00) [common]
76 12:17:13.830952 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 12:17:13.831075 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.284-cip99-114-g02e97826987bf/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:17:13.831169 saving as /var/lib/lava/dispatcher/tmp/10724500/tftp-deploy-q3cl5j3p/modules/modules.tar
79 12:17:13.831242 total size: 483752 (0MB)
80 12:17:13.831304 Using unxz to decompress xz
81 12:17:13.835381 progress 6% (0MB)
82 12:17:13.835810 progress 13% (0MB)
83 12:17:13.836093 progress 20% (0MB)
84 12:17:13.837430 progress 27% (0MB)
85 12:17:13.839454 progress 33% (0MB)
86 12:17:13.841507 progress 40% (0MB)
87 12:17:13.843519 progress 47% (0MB)
88 12:17:13.845923 progress 54% (0MB)
89 12:17:13.848203 progress 60% (0MB)
90 12:17:13.850414 progress 67% (0MB)
91 12:17:13.853033 progress 74% (0MB)
92 12:17:13.855342 progress 81% (0MB)
93 12:17:13.857272 progress 88% (0MB)
94 12:17:13.859325 progress 94% (0MB)
95 12:17:13.861384 progress 100% (0MB)
96 12:17:13.868184 0MB downloaded in 0.04s (12.49MB/s)
97 12:17:13.868509 end: 1.3.1 http-download (duration 00:00:00) [common]
99 12:17:13.868805 end: 1.3 download-retry (duration 00:00:00) [common]
100 12:17:13.868905 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
101 12:17:13.869003 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
102 12:17:13.869105 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 12:17:13.869212 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
104 12:17:13.869436 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10724500/lava-overlay-26dqeepb
105 12:17:13.869570 makedir: /var/lib/lava/dispatcher/tmp/10724500/lava-overlay-26dqeepb/lava-10724500/bin
106 12:17:13.869679 makedir: /var/lib/lava/dispatcher/tmp/10724500/lava-overlay-26dqeepb/lava-10724500/tests
107 12:17:13.869795 makedir: /var/lib/lava/dispatcher/tmp/10724500/lava-overlay-26dqeepb/lava-10724500/results
108 12:17:13.869929 Creating /var/lib/lava/dispatcher/tmp/10724500/lava-overlay-26dqeepb/lava-10724500/bin/lava-add-keys
109 12:17:13.870077 Creating /var/lib/lava/dispatcher/tmp/10724500/lava-overlay-26dqeepb/lava-10724500/bin/lava-add-sources
110 12:17:13.870225 Creating /var/lib/lava/dispatcher/tmp/10724500/lava-overlay-26dqeepb/lava-10724500/bin/lava-background-process-start
111 12:17:13.870360 Creating /var/lib/lava/dispatcher/tmp/10724500/lava-overlay-26dqeepb/lava-10724500/bin/lava-background-process-stop
112 12:17:13.870501 Creating /var/lib/lava/dispatcher/tmp/10724500/lava-overlay-26dqeepb/lava-10724500/bin/lava-common-functions
113 12:17:13.870710 Creating /var/lib/lava/dispatcher/tmp/10724500/lava-overlay-26dqeepb/lava-10724500/bin/lava-echo-ipv4
114 12:17:13.870906 Creating /var/lib/lava/dispatcher/tmp/10724500/lava-overlay-26dqeepb/lava-10724500/bin/lava-install-packages
115 12:17:13.871091 Creating /var/lib/lava/dispatcher/tmp/10724500/lava-overlay-26dqeepb/lava-10724500/bin/lava-installed-packages
116 12:17:13.871269 Creating /var/lib/lava/dispatcher/tmp/10724500/lava-overlay-26dqeepb/lava-10724500/bin/lava-os-build
117 12:17:13.871423 Creating /var/lib/lava/dispatcher/tmp/10724500/lava-overlay-26dqeepb/lava-10724500/bin/lava-probe-channel
118 12:17:13.871559 Creating /var/lib/lava/dispatcher/tmp/10724500/lava-overlay-26dqeepb/lava-10724500/bin/lava-probe-ip
119 12:17:13.871730 Creating /var/lib/lava/dispatcher/tmp/10724500/lava-overlay-26dqeepb/lava-10724500/bin/lava-target-ip
120 12:17:13.871887 Creating /var/lib/lava/dispatcher/tmp/10724500/lava-overlay-26dqeepb/lava-10724500/bin/lava-target-mac
121 12:17:13.872072 Creating /var/lib/lava/dispatcher/tmp/10724500/lava-overlay-26dqeepb/lava-10724500/bin/lava-target-storage
122 12:17:13.872235 Creating /var/lib/lava/dispatcher/tmp/10724500/lava-overlay-26dqeepb/lava-10724500/bin/lava-test-case
123 12:17:13.872415 Creating /var/lib/lava/dispatcher/tmp/10724500/lava-overlay-26dqeepb/lava-10724500/bin/lava-test-event
124 12:17:13.872591 Creating /var/lib/lava/dispatcher/tmp/10724500/lava-overlay-26dqeepb/lava-10724500/bin/lava-test-feedback
125 12:17:13.872772 Creating /var/lib/lava/dispatcher/tmp/10724500/lava-overlay-26dqeepb/lava-10724500/bin/lava-test-raise
126 12:17:13.872932 Creating /var/lib/lava/dispatcher/tmp/10724500/lava-overlay-26dqeepb/lava-10724500/bin/lava-test-reference
127 12:17:13.873110 Creating /var/lib/lava/dispatcher/tmp/10724500/lava-overlay-26dqeepb/lava-10724500/bin/lava-test-runner
128 12:17:13.873246 Creating /var/lib/lava/dispatcher/tmp/10724500/lava-overlay-26dqeepb/lava-10724500/bin/lava-test-set
129 12:17:13.873398 Creating /var/lib/lava/dispatcher/tmp/10724500/lava-overlay-26dqeepb/lava-10724500/bin/lava-test-shell
130 12:17:13.873544 Updating /var/lib/lava/dispatcher/tmp/10724500/lava-overlay-26dqeepb/lava-10724500/bin/lava-install-packages (oe)
131 12:17:13.873715 Updating /var/lib/lava/dispatcher/tmp/10724500/lava-overlay-26dqeepb/lava-10724500/bin/lava-installed-packages (oe)
132 12:17:13.873856 Creating /var/lib/lava/dispatcher/tmp/10724500/lava-overlay-26dqeepb/lava-10724500/environment
133 12:17:13.873978 LAVA metadata
134 12:17:13.874057 - LAVA_JOB_ID=10724500
135 12:17:13.874127 - LAVA_DISPATCHER_IP=192.168.201.1
136 12:17:13.874253 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
137 12:17:13.874334 skipped lava-vland-overlay
138 12:17:13.874440 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 12:17:13.874526 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
140 12:17:13.874592 skipped lava-multinode-overlay
141 12:17:13.874698 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 12:17:13.874787 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
143 12:17:13.874881 Loading test definitions
144 12:17:13.874977 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
145 12:17:13.875064 Using /lava-10724500 at stage 0
146 12:17:13.875414 uuid=10724500_1.4.2.3.1 testdef=None
147 12:17:13.875522 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 12:17:13.875619 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
149 12:17:13.876199 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 12:17:13.876451 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
152 12:17:13.877184 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 12:17:13.877449 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
155 12:17:13.878123 runner path: /var/lib/lava/dispatcher/tmp/10724500/lava-overlay-26dqeepb/lava-10724500/0/tests/0_dmesg test_uuid 10724500_1.4.2.3.1
156 12:17:13.878296 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 12:17:13.878679 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
159 12:17:13.878792 Using /lava-10724500 at stage 1
160 12:17:13.879211 uuid=10724500_1.4.2.3.5 testdef=None
161 12:17:13.879303 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 12:17:13.879422 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
163 12:17:13.879955 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 12:17:13.880186 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
166 12:17:13.880885 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 12:17:13.881137 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
169 12:17:13.881808 runner path: /var/lib/lava/dispatcher/tmp/10724500/lava-overlay-26dqeepb/lava-10724500/1/tests/1_bootrr test_uuid 10724500_1.4.2.3.5
170 12:17:13.881988 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 12:17:13.882247 Creating lava-test-runner.conf files
173 12:17:13.882363 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10724500/lava-overlay-26dqeepb/lava-10724500/0 for stage 0
174 12:17:13.882486 - 0_dmesg
175 12:17:13.882646 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10724500/lava-overlay-26dqeepb/lava-10724500/1 for stage 1
176 12:17:13.882773 - 1_bootrr
177 12:17:13.882929 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 12:17:13.883073 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
179 12:17:13.893011 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 12:17:13.893142 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
181 12:17:13.893268 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 12:17:13.893358 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 12:17:13.893455 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
184 12:17:14.139991 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 12:17:14.140376 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
186 12:17:14.140527 extracting modules file /var/lib/lava/dispatcher/tmp/10724500/tftp-deploy-q3cl5j3p/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10724500/extract-overlay-ramdisk-7vgt5kgp/ramdisk
187 12:17:14.163574 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 12:17:14.163745 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
189 12:17:14.163844 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10724500/compress-overlay-jzm786cl/overlay-1.4.2.4.tar.gz to ramdisk
190 12:17:14.163923 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10724500/compress-overlay-jzm786cl/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10724500/extract-overlay-ramdisk-7vgt5kgp/ramdisk
191 12:17:14.173082 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 12:17:14.173222 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
193 12:17:14.173318 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 12:17:14.173409 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
195 12:17:14.173494 Building ramdisk /var/lib/lava/dispatcher/tmp/10724500/extract-overlay-ramdisk-7vgt5kgp/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10724500/extract-overlay-ramdisk-7vgt5kgp/ramdisk
196 12:17:14.309382 >> 53980 blocks
197 12:17:15.241794 rename /var/lib/lava/dispatcher/tmp/10724500/extract-overlay-ramdisk-7vgt5kgp/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10724500/tftp-deploy-q3cl5j3p/ramdisk/ramdisk.cpio.gz
198 12:17:15.242229 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 12:17:15.242369 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 12:17:15.242537 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 12:17:15.242682 No mkimage arch provided, not using FIT.
202 12:17:15.242819 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 12:17:15.242948 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 12:17:15.243119 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 12:17:15.243262 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 12:17:15.243376 No LXC device requested
207 12:17:15.243486 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 12:17:15.243578 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 12:17:15.243661 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 12:17:15.243737 Checking files for TFTP limit of 4294967296 bytes.
211 12:17:15.244150 end: 1 tftp-deploy (duration 00:00:02) [common]
212 12:17:15.244276 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 12:17:15.244374 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 12:17:15.244504 substitutions:
215 12:17:15.244573 - {DTB}: None
216 12:17:15.244643 - {INITRD}: 10724500/tftp-deploy-q3cl5j3p/ramdisk/ramdisk.cpio.gz
217 12:17:15.244704 - {KERNEL}: 10724500/tftp-deploy-q3cl5j3p/kernel/bzImage
218 12:17:15.244763 - {LAVA_MAC}: None
219 12:17:15.244823 - {PRESEED_CONFIG}: None
220 12:17:15.244880 - {PRESEED_LOCAL}: None
221 12:17:15.244938 - {RAMDISK}: 10724500/tftp-deploy-q3cl5j3p/ramdisk/ramdisk.cpio.gz
222 12:17:15.244997 - {ROOT_PART}: None
223 12:17:15.245053 - {ROOT}: None
224 12:17:15.245109 - {SERVER_IP}: 192.168.201.1
225 12:17:15.245170 - {TEE}: None
226 12:17:15.245225 Parsed boot commands:
227 12:17:15.245283 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 12:17:15.245455 Parsed boot commands: tftpboot 192.168.201.1 10724500/tftp-deploy-q3cl5j3p/kernel/bzImage 10724500/tftp-deploy-q3cl5j3p/kernel/cmdline 10724500/tftp-deploy-q3cl5j3p/ramdisk/ramdisk.cpio.gz
229 12:17:15.245556 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 12:17:15.245646 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 12:17:15.245747 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 12:17:15.245834 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 12:17:15.245912 Not connected, no need to disconnect.
234 12:17:15.245989 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 12:17:15.246072 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 12:17:15.246137 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost acer-cb317-1h-c3z6-dedede-cbg-7'
237 12:17:15.249337 Setting prompt string to ['lava-test: # ']
238 12:17:15.249740 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 12:17:15.249883 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 12:17:15.250026 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 12:17:15.250153 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 12:17:15.250486 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-7' '--port=1' '--command=reboot'
243 12:17:20.387266 >> Command sent successfully.
244 12:17:20.389693 Returned 0 in 5 seconds
245 12:17:20.490071 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 12:17:20.490400 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 12:17:20.490506 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 12:17:20.490607 Setting prompt string to 'Starting depthcharge on Magolor...'
250 12:17:20.490678 Changing prompt to 'Starting depthcharge on Magolor...'
251 12:17:20.490747 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
252 12:17:20.491007 [Enter `^Ec?' for help]
253 12:17:21.633181
254 12:17:21.633320
255 12:17:21.644046 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
256 12:17:21.646954 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
257 12:17:21.650487 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
258 12:17:21.657118 CPU: AES supported, TXT NOT supported, VT supported
259 12:17:21.660106 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
260 12:17:21.667104 PCH: device id 4d87 (rev 01) is Jasperlake Super
261 12:17:21.670270 IGD: device id 4e55 (rev 01) is Jasperlake GT4
262 12:17:21.674460 VBOOT: Loading verstage.
263 12:17:21.678653 FMAP: Found "FLASH" version 1.1 at 0xc04000.
264 12:17:21.685660 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
265 12:17:21.689411 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
266 12:17:21.696191 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
267 12:17:21.696280
268 12:17:21.696348
269 12:17:21.705575 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
270 12:17:21.722123 Probing TPM: . done!
271 12:17:21.725063 TPM ready after 0 ms
272 12:17:21.728688 Connected to device vid:did:rid of 1ae0:0028:00
273 12:17:21.740075 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
274 12:17:21.746795 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
275 12:17:21.749805 Initialized TPM device CR50 revision 0
276 12:17:21.806414 tlcl_send_startup: Startup return code is 0
277 12:17:21.806564 TPM: setup succeeded
278 12:17:21.820725 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
279 12:17:21.834290 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
280 12:17:21.849830 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
281 12:17:21.858211 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
282 12:17:21.861840 Chrome EC: UHEPI supported
283 12:17:21.864706 Phase 1
284 12:17:21.868325 FMAP: area GBB found @ c05000 (12288 bytes)
285 12:17:21.874912 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
286 12:17:21.881637 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
287 12:17:21.884639 Recovery requested (1009000e)
288 12:17:21.894444 TPM: Extending digest for VBOOT: boot mode into PCR 0
289 12:17:21.901254 tlcl_extend: response is 0
290 12:17:21.915931 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
291 12:17:21.920423 tlcl_extend: response is 0
292 12:17:21.927359 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
293 12:17:21.930897 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
294 12:17:21.937556 BS: verstage times (exec / console): total (unknown) / 124 ms
295 12:17:21.937648
296 12:17:21.937737
297 12:17:21.947288 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
298 12:17:21.954879 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
299 12:17:21.961431 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
300 12:17:21.965008 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
301 12:17:21.968161 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
302 12:17:21.971868 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
303 12:17:21.978383 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
304 12:17:21.978471 TCO_STS: 0000 0001
305 12:17:21.981283 GEN_PMCON: d0015038 00002200
306 12:17:21.984880 GBLRST_CAUSE: 00000000 00000000
307 12:17:21.988039 prev_sleep_state 5
308 12:17:21.991606 Boot Count incremented to 10910
309 12:17:21.997928 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
310 12:17:22.001084 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
311 12:17:22.004853 Chrome EC: UHEPI supported
312 12:17:22.011386 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
313 12:17:22.018145 Probing TPM: done!
314 12:17:22.025010 Connected to device vid:did:rid of 1ae0:0028:00
315 12:17:22.034965 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
316 12:17:22.037969 Initialized TPM device CR50 revision 0
317 12:17:22.053184 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
318 12:17:22.057380 MRC: Hash idx 0x100b comparison successful.
319 12:17:22.060418 MRC cache found, size 5458
320 12:17:22.063815 bootmode is set to: 2
321 12:17:22.063923 SPD INDEX = 0
322 12:17:22.071048 CBFS: Found 'spd.bin' @0x40c40 size 0x600
323 12:17:22.071200 SPD: module type is LPDDR4X
324 12:17:22.078159 SPD: module part number is MT53E512M32D2NP-046 WT:E
325 12:17:22.084631 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
326 12:17:22.087930 SPD: device width 16 bits, bus width 32 bits
327 12:17:22.090903 SPD: module size is 4096 MB (per channel)
328 12:17:22.097572 meminit_channels: DRAM half-populated
329 12:17:22.178098 CBMEM:
330 12:17:22.181519 IMD: root @ 0x76fff000 254 entries.
331 12:17:22.185017 IMD: root @ 0x76ffec00 62 entries.
332 12:17:22.188315 FMAP: area RO_VPD found @ c00000 (16384 bytes)
333 12:17:22.194775 WARNING: RO_VPD is uninitialized or empty.
334 12:17:22.198355 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
335 12:17:22.202046 External stage cache:
336 12:17:22.205243 IMD: root @ 0x7b3ff000 254 entries.
337 12:17:22.208441 IMD: root @ 0x7b3fec00 62 entries.
338 12:17:22.218112 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
339 12:17:22.224894 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
340 12:17:22.231790 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
341 12:17:22.239923 MRC: 'RECOVERY_MRC_CACHE' does not need update.
342 12:17:22.243475 cse_lite: Skip switching to RW in the recovery path
343 12:17:22.246591 1 DIMMs found
344 12:17:22.246674 SMM Memory Map
345 12:17:22.250282 SMRAM : 0x7b000000 0x800000
346 12:17:22.253207 Subregion 0: 0x7b000000 0x200000
347 12:17:22.257040 Subregion 1: 0x7b200000 0x200000
348 12:17:22.259857 Subregion 2: 0x7b400000 0x400000
349 12:17:22.263386 top_of_ram = 0x77000000
350 12:17:22.269882 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
351 12:17:22.273403 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
352 12:17:22.280041 MTRR Range: Start=ff000000 End=0 (Size 1000000)
353 12:17:22.283627 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
354 12:17:22.290140 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
355 12:17:22.301981 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
356 12:17:22.305158 Processing 188 relocs. Offset value of 0x74c0e000
357 12:17:22.315037 BS: romstage times (exec / console): total (unknown) / 255 ms
358 12:17:22.319781
359 12:17:22.319895
360 12:17:22.329784 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
361 12:17:22.335984 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
362 12:17:22.339750 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
363 12:17:22.345938 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
364 12:17:22.402795 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
365 12:17:22.409179 Processing 4805 relocs. Offset value of 0x75da8000
366 12:17:22.412250 BS: postcar times (exec / console): total (unknown) / 42 ms
367 12:17:22.415857
368 12:17:22.415965
369 12:17:22.425703 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
370 12:17:22.425837 Normal boot
371 12:17:22.429404 EC returned error result code 3
372 12:17:22.433108 FW_CONFIG value is 0x204
373 12:17:22.436209 GENERIC: 0.0 disabled by fw_config
374 12:17:22.443118 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
375 12:17:22.446092 I2C: 00:10 disabled by fw_config
376 12:17:22.449266 I2C: 00:10 disabled by fw_config
377 12:17:22.453049 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
378 12:17:22.459766 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
379 12:17:22.462762 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
380 12:17:22.469600 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
381 12:17:22.472419 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
382 12:17:22.476064 I2C: 00:10 disabled by fw_config
383 12:17:22.482846 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
384 12:17:22.489061 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
385 12:17:22.492434 I2C: 00:1a disabled by fw_config
386 12:17:22.495920 I2C: 00:1a disabled by fw_config
387 12:17:22.502397 fw_config match found: AUDIO_AMP=UNPROVISIONED
388 12:17:22.505499 fw_config match found: AUDIO_AMP=UNPROVISIONED
389 12:17:22.509066 GENERIC: 0.0 disabled by fw_config
390 12:17:22.515857 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
391 12:17:22.518970 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
392 12:17:22.525708 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
393 12:17:22.528708 microcode: Update skipped, already up-to-date
394 12:17:22.535452 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
395 12:17:22.561551 Detected 2 core, 2 thread CPU.
396 12:17:22.564589 Setting up SMI for CPU
397 12:17:22.568155 IED base = 0x7b400000
398 12:17:22.568240 IED size = 0x00400000
399 12:17:22.571241 Will perform SMM setup.
400 12:17:22.574729 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
401 12:17:22.584800 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
402 12:17:22.587757 Processing 16 relocs. Offset value of 0x00030000
403 12:17:22.591371 Attempting to start 1 APs
404 12:17:22.594904 Waiting for 10ms after sending INIT.
405 12:17:22.611055 Waiting for 1st SIPI to complete...done.
406 12:17:22.614502 Waiting for 2nd SIPI to complete...done.
407 12:17:22.617561 AP: slot 1 apic_id 2.
408 12:17:22.624364 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
409 12:17:22.631006 Processing 13 relocs. Offset value of 0x00038000
410 12:17:22.631181 Unable to locate Global NVS
411 12:17:22.640994 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
412 12:17:22.644706 Installing permanent SMM handler to 0x7b000000
413 12:17:22.651037 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
414 12:17:22.657919 Processing 704 relocs. Offset value of 0x7b010000
415 12:17:22.664795 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
416 12:17:22.670921 Processing 13 relocs. Offset value of 0x7b008000
417 12:17:22.677763 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
418 12:17:22.680641 Unable to locate Global NVS
419 12:17:22.687331 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
420 12:17:22.690971 Clearing SMI status registers
421 12:17:22.691055 SMI_STS: PM1
422 12:17:22.693982 PM1_STS: PWRBTN
423 12:17:22.694065 TCO_STS: INTRD_DET
424 12:17:22.704244 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
425 12:17:22.704329 In relocation handler: CPU 0
426 12:17:22.710783 New SMBASE=0x7b000000 IEDBASE=0x7b400000
427 12:17:22.713911 Writing SMRR. base = 0x7b000006, mask=0xff800800
428 12:17:22.717468 Relocation complete.
429 12:17:22.724227 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
430 12:17:22.727347 In relocation handler: CPU 1
431 12:17:22.730392 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
432 12:17:22.734846 Writing SMRR. base = 0x7b000006, mask=0xff800800
433 12:17:22.738227 Relocation complete.
434 12:17:22.738310 Initializing CPU #0
435 12:17:22.741922 CPU: vendor Intel device 906c0
436 12:17:22.748872 CPU: family 06, model 9c, stepping 00
437 12:17:22.748993 Clearing out pending MCEs
438 12:17:22.752019 Setting up local APIC...
439 12:17:22.755829 apic_id: 0x00 done.
440 12:17:22.758913 Turbo is available but hidden
441 12:17:22.761931 Turbo is available and visible
442 12:17:22.765705 microcode: Update skipped, already up-to-date
443 12:17:22.768831 CPU #0 initialized
444 12:17:22.768914 Initializing CPU #1
445 12:17:22.771898 CPU: vendor Intel device 906c0
446 12:17:22.775058 CPU: family 06, model 9c, stepping 00
447 12:17:22.778755 Clearing out pending MCEs
448 12:17:22.781877 Setting up local APIC...
449 12:17:22.785242 apic_id: 0x02 done.
450 12:17:22.788700 microcode: Update skipped, already up-to-date
451 12:17:22.791718 CPU #1 initialized
452 12:17:22.795306 bsp_do_flight_plan done after 176 msecs.
453 12:17:22.798361 CPU: frequency set to 2800 MHz
454 12:17:22.798444 Enabling SMIs.
455 12:17:22.805509 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 85 / 287 ms
456 12:17:22.815629 Probing TPM: done!
457 12:17:22.822334 Connected to device vid:did:rid of 1ae0:0028:00
458 12:17:22.831937 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
459 12:17:22.835249 Initialized TPM device CR50 revision 0
460 12:17:22.838809 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
461 12:17:22.846012 Found a VBT of 7680 bytes after decompression
462 12:17:22.852286 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
463 12:17:22.888083 Detected 2 core, 2 thread CPU.
464 12:17:22.890990 Detected 2 core, 2 thread CPU.
465 12:17:23.252770 Display FSP Version Info HOB
466 12:17:23.255579 Reference Code - CPU = 8.7.22.30
467 12:17:23.258951 uCode Version = 24.0.0.1f
468 12:17:23.262649 TXT ACM version = ff.ff.ff.ffff
469 12:17:23.265724 Reference Code - ME = 8.7.22.30
470 12:17:23.269430 MEBx version = 0.0.0.0
471 12:17:23.272624 ME Firmware Version = Consumer SKU
472 12:17:23.276060 Reference Code - PCH = 8.7.22.30
473 12:17:23.279080 PCH-CRID Status = Disabled
474 12:17:23.282022 PCH-CRID Original Value = ff.ff.ff.ffff
475 12:17:23.285854 PCH-CRID New Value = ff.ff.ff.ffff
476 12:17:23.288798 OPROM - RST - RAID = ff.ff.ff.ffff
477 12:17:23.292466 PCH Hsio Version = 4.0.0.0
478 12:17:23.295508 Reference Code - SA - System Agent = 8.7.22.30
479 12:17:23.299138 Reference Code - MRC = 0.0.4.68
480 12:17:23.302067 SA - PCIe Version = 8.7.22.30
481 12:17:23.305474 SA-CRID Status = Disabled
482 12:17:23.308883 SA-CRID Original Value = 0.0.0.0
483 12:17:23.311792 SA-CRID New Value = 0.0.0.0
484 12:17:23.315167 OPROM - VBIOS = ff.ff.ff.ffff
485 12:17:23.319863 IO Manageability Engine FW Version = ff.ff.ff.ffff
486 12:17:23.323077 PHY Build Version = ff.ff.ff.ffff
487 12:17:23.326726 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
488 12:17:23.334452 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
489 12:17:23.337734 ITSS IRQ Polarities Before:
490 12:17:23.337817 IPC0: 0xffffffff
491 12:17:23.337884 IPC1: 0xffffffff
492 12:17:23.341288 IPC2: 0xffffffff
493 12:17:23.344414 IPC3: 0xffffffff
494 12:17:23.344496 ITSS IRQ Polarities After:
495 12:17:23.347569 IPC0: 0xffffffff
496 12:17:23.347651 IPC1: 0xffffffff
497 12:17:23.351305 IPC2: 0xffffffff
498 12:17:23.351388 IPC3: 0xffffffff
499 12:17:23.364511 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
500 12:17:23.370995 BS: BS_DEV_INIT_CHIPS run times (exec / console): 404 / 156 ms
501 12:17:23.374124 Enumerating buses...
502 12:17:23.377701 Show all devs... Before device enumeration.
503 12:17:23.380859 Root Device: enabled 1
504 12:17:23.384021 CPU_CLUSTER: 0: enabled 1
505 12:17:23.384142 DOMAIN: 0000: enabled 1
506 12:17:23.387565 PCI: 00:00.0: enabled 1
507 12:17:23.391018 PCI: 00:02.0: enabled 1
508 12:17:23.391100 PCI: 00:04.0: enabled 1
509 12:17:23.394027 PCI: 00:05.0: enabled 1
510 12:17:23.397631 PCI: 00:09.0: enabled 0
511 12:17:23.400701 PCI: 00:12.6: enabled 0
512 12:17:23.400777 PCI: 00:14.0: enabled 1
513 12:17:23.404453 PCI: 00:14.1: enabled 0
514 12:17:23.407322 PCI: 00:14.2: enabled 0
515 12:17:23.410820 PCI: 00:14.3: enabled 1
516 12:17:23.410896 PCI: 00:14.5: enabled 1
517 12:17:23.414262 PCI: 00:15.0: enabled 1
518 12:17:23.417808 PCI: 00:15.1: enabled 1
519 12:17:23.417887 PCI: 00:15.2: enabled 1
520 12:17:23.420573 PCI: 00:15.3: enabled 1
521 12:17:23.424167 PCI: 00:16.0: enabled 1
522 12:17:23.427690 PCI: 00:16.1: enabled 0
523 12:17:23.427764 PCI: 00:16.4: enabled 0
524 12:17:23.430744 PCI: 00:16.5: enabled 0
525 12:17:23.434382 PCI: 00:17.0: enabled 0
526 12:17:23.437234 PCI: 00:19.0: enabled 1
527 12:17:23.437323 PCI: 00:19.1: enabled 0
528 12:17:23.440562 PCI: 00:19.2: enabled 1
529 12:17:23.444092 PCI: 00:1a.0: enabled 1
530 12:17:23.447903 PCI: 00:1c.0: enabled 0
531 12:17:23.447989 PCI: 00:1c.1: enabled 0
532 12:17:23.450539 PCI: 00:1c.2: enabled 0
533 12:17:23.454006 PCI: 00:1c.3: enabled 0
534 12:17:23.454140 PCI: 00:1c.4: enabled 0
535 12:17:23.457446 PCI: 00:1c.5: enabled 0
536 12:17:23.460488 PCI: 00:1c.6: enabled 0
537 12:17:23.463979 PCI: 00:1c.7: enabled 1
538 12:17:23.464057 PCI: 00:1e.0: enabled 0
539 12:17:23.467433 PCI: 00:1e.1: enabled 0
540 12:17:23.470686 PCI: 00:1e.2: enabled 1
541 12:17:23.474241 PCI: 00:1e.3: enabled 0
542 12:17:23.474340 PCI: 00:1f.0: enabled 1
543 12:17:23.477355 PCI: 00:1f.1: enabled 1
544 12:17:23.480983 PCI: 00:1f.2: enabled 1
545 12:17:23.481065 PCI: 00:1f.3: enabled 1
546 12:17:23.483946 PCI: 00:1f.4: enabled 0
547 12:17:23.487036 PCI: 00:1f.5: enabled 1
548 12:17:23.490932 PCI: 00:1f.7: enabled 0
549 12:17:23.491043 GENERIC: 0.0: enabled 1
550 12:17:23.493700 GENERIC: 0.0: enabled 1
551 12:17:23.497360 USB0 port 0: enabled 1
552 12:17:23.500599 GENERIC: 0.0: enabled 1
553 12:17:23.500680 I2C: 00:2c: enabled 1
554 12:17:23.504017 I2C: 00:15: enabled 1
555 12:17:23.506899 GENERIC: 0.0: enabled 0
556 12:17:23.506997 I2C: 00:15: enabled 1
557 12:17:23.510417 I2C: 00:10: enabled 0
558 12:17:23.513869 I2C: 00:10: enabled 0
559 12:17:23.513965 I2C: 00:2c: enabled 1
560 12:17:23.517359 I2C: 00:40: enabled 1
561 12:17:23.520424 I2C: 00:10: enabled 1
562 12:17:23.520522 I2C: 00:39: enabled 1
563 12:17:23.523881 I2C: 00:36: enabled 1
564 12:17:23.527314 I2C: 00:10: enabled 0
565 12:17:23.527413 I2C: 00:0c: enabled 1
566 12:17:23.530836 I2C: 00:50: enabled 1
567 12:17:23.533576 I2C: 00:1a: enabled 1
568 12:17:23.533673 I2C: 00:1a: enabled 0
569 12:17:23.537091 I2C: 00:1a: enabled 0
570 12:17:23.540484 I2C: 00:28: enabled 1
571 12:17:23.540567 I2C: 00:29: enabled 1
572 12:17:23.543444 PCI: 00:00.0: enabled 1
573 12:17:23.546979 SPI: 00: enabled 1
574 12:17:23.547060 PNP: 0c09.0: enabled 1
575 12:17:23.550518 GENERIC: 0.0: enabled 0
576 12:17:23.553375 USB2 port 0: enabled 1
577 12:17:23.556886 USB2 port 1: enabled 1
578 12:17:23.556968 USB2 port 2: enabled 1
579 12:17:23.560509 USB2 port 3: enabled 1
580 12:17:23.563419 USB2 port 4: enabled 0
581 12:17:23.563502 USB2 port 5: enabled 1
582 12:17:23.566598 USB2 port 6: enabled 0
583 12:17:23.569870 USB2 port 7: enabled 1
584 12:17:23.573449 USB3 port 0: enabled 1
585 12:17:23.573531 USB3 port 1: enabled 1
586 12:17:23.576612 USB3 port 2: enabled 1
587 12:17:23.580279 USB3 port 3: enabled 1
588 12:17:23.580360 APIC: 00: enabled 1
589 12:17:23.583266 APIC: 02: enabled 1
590 12:17:23.587065 Compare with tree...
591 12:17:23.587170 Root Device: enabled 1
592 12:17:23.589878 CPU_CLUSTER: 0: enabled 1
593 12:17:23.593559 APIC: 00: enabled 1
594 12:17:23.593641 APIC: 02: enabled 1
595 12:17:23.596641 DOMAIN: 0000: enabled 1
596 12:17:23.600256 PCI: 00:00.0: enabled 1
597 12:17:23.603480 PCI: 00:02.0: enabled 1
598 12:17:23.603562 PCI: 00:04.0: enabled 1
599 12:17:23.607294 GENERIC: 0.0: enabled 1
600 12:17:23.610024 PCI: 00:05.0: enabled 1
601 12:17:23.613583 GENERIC: 0.0: enabled 1
602 12:17:23.616930 PCI: 00:09.0: enabled 0
603 12:17:23.617013 PCI: 00:12.6: enabled 0
604 12:17:23.620011 PCI: 00:14.0: enabled 1
605 12:17:23.623588 USB0 port 0: enabled 1
606 12:17:23.627033 USB2 port 0: enabled 1
607 12:17:23.630275 USB2 port 1: enabled 1
608 12:17:23.630355 USB2 port 2: enabled 1
609 12:17:23.633844 USB2 port 3: enabled 1
610 12:17:23.636765 USB2 port 4: enabled 0
611 12:17:23.640307 USB2 port 5: enabled 1
612 12:17:23.643565 USB2 port 6: enabled 0
613 12:17:23.646741 USB2 port 7: enabled 1
614 12:17:23.646838 USB3 port 0: enabled 1
615 12:17:23.649882 USB3 port 1: enabled 1
616 12:17:23.653342 USB3 port 2: enabled 1
617 12:17:23.656834 USB3 port 3: enabled 1
618 12:17:23.659797 PCI: 00:14.1: enabled 0
619 12:17:23.659875 PCI: 00:14.2: enabled 0
620 12:17:23.663314 PCI: 00:14.3: enabled 1
621 12:17:23.666413 GENERIC: 0.0: enabled 1
622 12:17:23.670092 PCI: 00:14.5: enabled 1
623 12:17:23.673706 PCI: 00:15.0: enabled 1
624 12:17:23.673789 I2C: 00:2c: enabled 1
625 12:17:23.676272 I2C: 00:15: enabled 1
626 12:17:23.679980 PCI: 00:15.1: enabled 1
627 12:17:23.683525 PCI: 00:15.2: enabled 1
628 12:17:23.686555 GENERIC: 0.0: enabled 0
629 12:17:23.686656 I2C: 00:15: enabled 1
630 12:17:23.690111 I2C: 00:10: enabled 0
631 12:17:23.693597 I2C: 00:10: enabled 0
632 12:17:23.696563 I2C: 00:2c: enabled 1
633 12:17:23.696635 I2C: 00:40: enabled 1
634 12:17:23.700264 I2C: 00:10: enabled 1
635 12:17:23.703249 I2C: 00:39: enabled 1
636 12:17:23.706800 PCI: 00:15.3: enabled 1
637 12:17:23.706922 I2C: 00:36: enabled 1
638 12:17:23.709986 I2C: 00:10: enabled 0
639 12:17:23.713367 I2C: 00:0c: enabled 1
640 12:17:23.716543 I2C: 00:50: enabled 1
641 12:17:23.716625 PCI: 00:16.0: enabled 1
642 12:17:23.720181 PCI: 00:16.1: enabled 0
643 12:17:23.723016 PCI: 00:16.4: enabled 0
644 12:17:23.726580 PCI: 00:16.5: enabled 0
645 12:17:23.729983 PCI: 00:17.0: enabled 0
646 12:17:23.730064 PCI: 00:19.0: enabled 1
647 12:17:23.733365 I2C: 00:1a: enabled 1
648 12:17:23.736289 I2C: 00:1a: enabled 0
649 12:17:23.739767 I2C: 00:1a: enabled 0
650 12:17:23.739849 I2C: 00:28: enabled 1
651 12:17:23.743279 I2C: 00:29: enabled 1
652 12:17:23.746229 PCI: 00:19.1: enabled 0
653 12:17:23.749711 PCI: 00:19.2: enabled 1
654 12:17:23.753314 PCI: 00:1a.0: enabled 1
655 12:17:23.753447 PCI: 00:1e.0: enabled 0
656 12:17:23.756765 PCI: 00:1e.1: enabled 0
657 12:17:23.760040 PCI: 00:1e.2: enabled 1
658 12:17:23.763004 SPI: 00: enabled 1
659 12:17:23.763114 PCI: 00:1e.3: enabled 0
660 12:17:23.766498 PCI: 00:1f.0: enabled 1
661 12:17:23.769611 PNP: 0c09.0: enabled 1
662 12:17:23.773063 PCI: 00:1f.1: enabled 1
663 12:17:23.776473 PCI: 00:1f.2: enabled 1
664 12:17:23.776557 PCI: 00:1f.3: enabled 1
665 12:17:23.779918 GENERIC: 0.0: enabled 0
666 12:17:23.782998 PCI: 00:1f.4: enabled 0
667 12:17:23.786045 PCI: 00:1f.5: enabled 1
668 12:17:23.789522 PCI: 00:1f.7: enabled 0
669 12:17:23.789634 Root Device scanning...
670 12:17:23.792709 scan_static_bus for Root Device
671 12:17:23.796243 CPU_CLUSTER: 0 enabled
672 12:17:23.799473 DOMAIN: 0000 enabled
673 12:17:23.799548 DOMAIN: 0000 scanning...
674 12:17:23.803064 PCI: pci_scan_bus for bus 00
675 12:17:23.806126 PCI: 00:00.0 [8086/0000] ops
676 12:17:23.809728 PCI: 00:00.0 [8086/4e22] enabled
677 12:17:23.813026 PCI: 00:02.0 [8086/0000] bus ops
678 12:17:23.816164 PCI: 00:02.0 [8086/4e55] enabled
679 12:17:23.819854 PCI: 00:04.0 [8086/0000] bus ops
680 12:17:23.822694 PCI: 00:04.0 [8086/4e03] enabled
681 12:17:23.826340 PCI: 00:05.0 [8086/0000] bus ops
682 12:17:23.829276 PCI: 00:05.0 [8086/4e19] enabled
683 12:17:23.832970 PCI: 00:08.0 [8086/4e11] enabled
684 12:17:23.836150 PCI: 00:14.0 [8086/0000] bus ops
685 12:17:23.839725 PCI: 00:14.0 [8086/4ded] enabled
686 12:17:23.842641 PCI: 00:14.2 [8086/4def] disabled
687 12:17:23.846033 PCI: 00:14.3 [8086/0000] bus ops
688 12:17:23.849461 PCI: 00:14.3 [8086/4df0] enabled
689 12:17:23.852451 PCI: 00:14.5 [8086/0000] ops
690 12:17:23.855999 PCI: 00:14.5 [8086/4df8] enabled
691 12:17:23.859517 PCI: 00:15.0 [8086/0000] bus ops
692 12:17:23.862420 PCI: 00:15.0 [8086/4de8] enabled
693 12:17:23.866341 PCI: 00:15.1 [8086/0000] bus ops
694 12:17:23.869771 PCI: 00:15.1 [8086/4de9] enabled
695 12:17:23.872752 PCI: 00:15.2 [8086/0000] bus ops
696 12:17:23.875754 PCI: 00:15.2 [8086/4dea] enabled
697 12:17:23.879710 PCI: 00:15.3 [8086/0000] bus ops
698 12:17:23.882444 PCI: 00:15.3 [8086/4deb] enabled
699 12:17:23.885775 PCI: 00:16.0 [8086/0000] ops
700 12:17:23.889369 PCI: 00:16.0 [8086/4de0] enabled
701 12:17:23.892488 PCI: 00:19.0 [8086/0000] bus ops
702 12:17:23.896139 PCI: 00:19.0 [8086/4dc5] enabled
703 12:17:23.899253 PCI: 00:19.2 [8086/0000] ops
704 12:17:23.903005 PCI: 00:19.2 [8086/4dc7] enabled
705 12:17:23.906128 PCI: 00:1a.0 [8086/0000] ops
706 12:17:23.909065 PCI: 00:1a.0 [8086/4dc4] enabled
707 12:17:23.912782 PCI: 00:1e.0 [8086/0000] ops
708 12:17:23.916313 PCI: 00:1e.0 [8086/4da8] disabled
709 12:17:23.919314 PCI: 00:1e.2 [8086/0000] bus ops
710 12:17:23.922501 PCI: 00:1e.2 [8086/4daa] enabled
711 12:17:23.926093 PCI: 00:1f.0 [8086/0000] bus ops
712 12:17:23.929515 PCI: 00:1f.0 [8086/4d87] enabled
713 12:17:23.932325 PCI: Static device PCI: 00:1f.1 not found, disabling it.
714 12:17:23.936012 RTC Init
715 12:17:23.939537 Set power on after power failure.
716 12:17:23.939621 Disabling Deep S3
717 12:17:23.942482 Disabling Deep S3
718 12:17:23.942577 Disabling Deep S4
719 12:17:23.946126 Disabling Deep S4
720 12:17:23.946208 Disabling Deep S5
721 12:17:23.949357 Disabling Deep S5
722 12:17:23.959746 PCI: 00:1f.2 [0000/0000] hidden
723 12:17:23.959835 PCI: 00:1f.3 [8086/0000] bus ops
724 12:17:23.959902 PCI: 00:1f.3 [8086/4dc8] enabled
725 12:17:23.962949 PCI: 00:1f.5 [8086/0000] bus ops
726 12:17:23.966278 PCI: 00:1f.5 [8086/4da4] enabled
727 12:17:23.969319 PCI: Leftover static devices:
728 12:17:23.969402 PCI: 00:12.6
729 12:17:23.972153 PCI: 00:09.0
730 12:17:23.972235 PCI: 00:14.1
731 12:17:23.975758 PCI: 00:16.1
732 12:17:23.975840 PCI: 00:16.4
733 12:17:23.975905 PCI: 00:16.5
734 12:17:23.978743 PCI: 00:17.0
735 12:17:23.978824 PCI: 00:19.1
736 12:17:23.982644 PCI: 00:1e.1
737 12:17:23.982726 PCI: 00:1e.3
738 12:17:23.985499 PCI: 00:1f.1
739 12:17:23.985581 PCI: 00:1f.4
740 12:17:23.985646 PCI: 00:1f.7
741 12:17:23.988803 PCI: Check your devicetree.cb.
742 12:17:23.992450 PCI: 00:02.0 scanning...
743 12:17:23.995455 scan_generic_bus for PCI: 00:02.0
744 12:17:23.999542 scan_generic_bus for PCI: 00:02.0 done
745 12:17:24.003231 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
746 12:17:24.006816 PCI: 00:04.0 scanning...
747 12:17:24.010506 scan_generic_bus for PCI: 00:04.0
748 12:17:24.013615 GENERIC: 0.0 enabled
749 12:17:24.020389 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
750 12:17:24.023957 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
751 12:17:24.026917 PCI: 00:05.0 scanning...
752 12:17:24.030721 scan_generic_bus for PCI: 00:05.0
753 12:17:24.030804 GENERIC: 0.0 enabled
754 12:17:24.037085 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
755 12:17:24.043656 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
756 12:17:24.043739 PCI: 00:14.0 scanning...
757 12:17:24.046975 scan_static_bus for PCI: 00:14.0
758 12:17:24.050513 USB0 port 0 enabled
759 12:17:24.053933 USB0 port 0 scanning...
760 12:17:24.056748 scan_static_bus for USB0 port 0
761 12:17:24.056833 USB2 port 0 enabled
762 12:17:24.060383 USB2 port 1 enabled
763 12:17:24.063810 USB2 port 2 enabled
764 12:17:24.063894 USB2 port 3 enabled
765 12:17:24.067434 USB2 port 4 disabled
766 12:17:24.070273 USB2 port 5 enabled
767 12:17:24.070355 USB2 port 6 disabled
768 12:17:24.073693 USB2 port 7 enabled
769 12:17:24.073789 USB3 port 0 enabled
770 12:17:24.077242 USB3 port 1 enabled
771 12:17:24.080399 USB3 port 2 enabled
772 12:17:24.080480 USB3 port 3 enabled
773 12:17:24.083788 USB2 port 0 scanning...
774 12:17:24.086713 scan_static_bus for USB2 port 0
775 12:17:24.090306 scan_static_bus for USB2 port 0 done
776 12:17:24.093922 scan_bus: bus USB2 port 0 finished in 6 msecs
777 12:17:24.096706 USB2 port 1 scanning...
778 12:17:24.100443 scan_static_bus for USB2 port 1
779 12:17:24.103407 scan_static_bus for USB2 port 1 done
780 12:17:24.110073 scan_bus: bus USB2 port 1 finished in 6 msecs
781 12:17:24.110157 USB2 port 2 scanning...
782 12:17:24.113730 scan_static_bus for USB2 port 2
783 12:17:24.120523 scan_static_bus for USB2 port 2 done
784 12:17:24.123572 scan_bus: bus USB2 port 2 finished in 6 msecs
785 12:17:24.127339 USB2 port 3 scanning...
786 12:17:24.129944 scan_static_bus for USB2 port 3
787 12:17:24.133540 scan_static_bus for USB2 port 3 done
788 12:17:24.137091 scan_bus: bus USB2 port 3 finished in 6 msecs
789 12:17:24.140377 USB2 port 5 scanning...
790 12:17:24.143157 scan_static_bus for USB2 port 5
791 12:17:24.146633 scan_static_bus for USB2 port 5 done
792 12:17:24.150233 scan_bus: bus USB2 port 5 finished in 6 msecs
793 12:17:24.153251 USB2 port 7 scanning...
794 12:17:24.156809 scan_static_bus for USB2 port 7
795 12:17:24.160216 scan_static_bus for USB2 port 7 done
796 12:17:24.167022 scan_bus: bus USB2 port 7 finished in 6 msecs
797 12:17:24.167108 USB3 port 0 scanning...
798 12:17:24.169922 scan_static_bus for USB3 port 0
799 12:17:24.176667 scan_static_bus for USB3 port 0 done
800 12:17:24.180065 scan_bus: bus USB3 port 0 finished in 6 msecs
801 12:17:24.183037 USB3 port 1 scanning...
802 12:17:24.186791 scan_static_bus for USB3 port 1
803 12:17:24.189996 scan_static_bus for USB3 port 1 done
804 12:17:24.193477 scan_bus: bus USB3 port 1 finished in 6 msecs
805 12:17:24.196369 USB3 port 2 scanning...
806 12:17:24.199719 scan_static_bus for USB3 port 2
807 12:17:24.203440 scan_static_bus for USB3 port 2 done
808 12:17:24.206440 scan_bus: bus USB3 port 2 finished in 6 msecs
809 12:17:24.210053 USB3 port 3 scanning...
810 12:17:24.213136 scan_static_bus for USB3 port 3
811 12:17:24.216940 scan_static_bus for USB3 port 3 done
812 12:17:24.222939 scan_bus: bus USB3 port 3 finished in 6 msecs
813 12:17:24.226606 scan_static_bus for USB0 port 0 done
814 12:17:24.229609 scan_bus: bus USB0 port 0 finished in 172 msecs
815 12:17:24.233246 scan_static_bus for PCI: 00:14.0 done
816 12:17:24.239906 scan_bus: bus PCI: 00:14.0 finished in 188 msecs
817 12:17:24.243271 PCI: 00:14.3 scanning...
818 12:17:24.246309 scan_static_bus for PCI: 00:14.3
819 12:17:24.246391 GENERIC: 0.0 enabled
820 12:17:24.249607 scan_static_bus for PCI: 00:14.3 done
821 12:17:24.256520 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
822 12:17:24.259732 PCI: 00:15.0 scanning...
823 12:17:24.263026 scan_static_bus for PCI: 00:15.0
824 12:17:24.263146 I2C: 00:2c enabled
825 12:17:24.265818 I2C: 00:15 enabled
826 12:17:24.269262 scan_static_bus for PCI: 00:15.0 done
827 12:17:24.272897 scan_bus: bus PCI: 00:15.0 finished in 10 msecs
828 12:17:24.276357 PCI: 00:15.1 scanning...
829 12:17:24.279932 scan_static_bus for PCI: 00:15.1
830 12:17:24.282674 scan_static_bus for PCI: 00:15.1 done
831 12:17:24.289304 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
832 12:17:24.292952 PCI: 00:15.2 scanning...
833 12:17:24.296043 scan_static_bus for PCI: 00:15.2
834 12:17:24.296184 GENERIC: 0.0 disabled
835 12:17:24.299240 I2C: 00:15 enabled
836 12:17:24.299326 I2C: 00:10 disabled
837 12:17:24.302505 I2C: 00:10 disabled
838 12:17:24.305801 I2C: 00:2c enabled
839 12:17:24.305909 I2C: 00:40 enabled
840 12:17:24.309072 I2C: 00:10 enabled
841 12:17:24.309174 I2C: 00:39 enabled
842 12:17:24.315567 scan_static_bus for PCI: 00:15.2 done
843 12:17:24.319326 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
844 12:17:24.322282 PCI: 00:15.3 scanning...
845 12:17:24.325818 scan_static_bus for PCI: 00:15.3
846 12:17:24.325935 I2C: 00:36 enabled
847 12:17:24.328855 I2C: 00:10 disabled
848 12:17:24.332604 I2C: 00:0c enabled
849 12:17:24.332686 I2C: 00:50 enabled
850 12:17:24.335901 scan_static_bus for PCI: 00:15.3 done
851 12:17:24.342727 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
852 12:17:24.345545 PCI: 00:19.0 scanning...
853 12:17:24.349008 scan_static_bus for PCI: 00:19.0
854 12:17:24.349092 I2C: 00:1a enabled
855 12:17:24.352349 I2C: 00:1a disabled
856 12:17:24.352432 I2C: 00:1a disabled
857 12:17:24.355978 I2C: 00:28 enabled
858 12:17:24.359420 I2C: 00:29 enabled
859 12:17:24.362454 scan_static_bus for PCI: 00:19.0 done
860 12:17:24.365841 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
861 12:17:24.369256 PCI: 00:1e.2 scanning...
862 12:17:24.372134 scan_generic_bus for PCI: 00:1e.2
863 12:17:24.372220 SPI: 00 enabled
864 12:17:24.378974 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
865 12:17:24.385528 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
866 12:17:24.389277 PCI: 00:1f.0 scanning...
867 12:17:24.392491 scan_static_bus for PCI: 00:1f.0
868 12:17:24.392575 PNP: 0c09.0 enabled
869 12:17:24.395634 PNP: 0c09.0 scanning...
870 12:17:24.398766 scan_static_bus for PNP: 0c09.0
871 12:17:24.402354 scan_static_bus for PNP: 0c09.0 done
872 12:17:24.405387 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
873 12:17:24.412261 scan_static_bus for PCI: 00:1f.0 done
874 12:17:24.415434 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
875 12:17:24.418510 PCI: 00:1f.3 scanning...
876 12:17:24.422195 scan_static_bus for PCI: 00:1f.3
877 12:17:24.425110 GENERIC: 0.0 disabled
878 12:17:24.428932 scan_static_bus for PCI: 00:1f.3 done
879 12:17:24.431930 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
880 12:17:24.435533 PCI: 00:1f.5 scanning...
881 12:17:24.438469 scan_generic_bus for PCI: 00:1f.5
882 12:17:24.442049 scan_generic_bus for PCI: 00:1f.5 done
883 12:17:24.448438 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
884 12:17:24.451793 scan_bus: bus DOMAIN: 0000 finished in 645 msecs
885 12:17:24.454856 scan_static_bus for Root Device done
886 12:17:24.461716 scan_bus: bus Root Device finished in 664 msecs
887 12:17:24.461810 done
888 12:17:24.468604 BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 1084 ms
889 12:17:24.471565 Chrome EC: UHEPI supported
890 12:17:24.474985 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
891 12:17:24.481832 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
892 12:17:24.484876 SPI flash protection: WPSW=0 SRP0=1
893 12:17:24.491942 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
894 12:17:24.494763 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
895 12:17:24.498515 found VGA at PCI: 00:02.0
896 12:17:24.501408 Setting up VGA for PCI: 00:02.0
897 12:17:24.508125 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
898 12:17:24.511738 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
899 12:17:24.514550 Allocating resources...
900 12:17:24.518255 Reading resources...
901 12:17:24.521180 Root Device read_resources bus 0 link: 0
902 12:17:24.524737 CPU_CLUSTER: 0 read_resources bus 0 link: 0
903 12:17:24.531475 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
904 12:17:24.534463 DOMAIN: 0000 read_resources bus 0 link: 0
905 12:17:24.541133 PCI: 00:04.0 read_resources bus 1 link: 0
906 12:17:24.544703 PCI: 00:04.0 read_resources bus 1 link: 0 done
907 12:17:24.551444 PCI: 00:05.0 read_resources bus 2 link: 0
908 12:17:24.554386 PCI: 00:05.0 read_resources bus 2 link: 0 done
909 12:17:24.557886 PCI: 00:14.0 read_resources bus 0 link: 0
910 12:17:24.564412 USB0 port 0 read_resources bus 0 link: 0
911 12:17:24.571509 USB0 port 0 read_resources bus 0 link: 0 done
912 12:17:24.574269 PCI: 00:14.0 read_resources bus 0 link: 0 done
913 12:17:24.577747 PCI: 00:14.3 read_resources bus 0 link: 0
914 12:17:24.585665 PCI: 00:14.3 read_resources bus 0 link: 0 done
915 12:17:24.641270 PCI: 00:15.0 read_resources bus 0 link: 0
916 12:17:24.641894 PCI: 00:15.0 read_resources bus 0 link: 0 done
917 12:17:24.642000 PCI: 00:15.2 read_resources bus 0 link: 0
918 12:17:24.642274 PCI: 00:15.2 read_resources bus 0 link: 0 done
919 12:17:24.642387 PCI: 00:15.3 read_resources bus 0 link: 0
920 12:17:24.642529 PCI: 00:15.3 read_resources bus 0 link: 0 done
921 12:17:24.642630 PCI: 00:19.0 read_resources bus 0 link: 0
922 12:17:24.643047 PCI: 00:19.0 read_resources bus 0 link: 0 done
923 12:17:24.643163 PCI: 00:1e.2 read_resources bus 3 link: 0
924 12:17:24.643735 PCI: 00:1e.2 read_resources bus 3 link: 0 done
925 12:17:24.644436 PCI: 00:1f.0 read_resources bus 0 link: 0
926 12:17:24.692142 PCI: 00:1f.0 read_resources bus 0 link: 0 done
927 12:17:24.692338 PCI: 00:1f.3 read_resources bus 0 link: 0
928 12:17:24.692612 PCI: 00:1f.3 read_resources bus 0 link: 0 done
929 12:17:24.692683 DOMAIN: 0000 read_resources bus 0 link: 0 done
930 12:17:24.692774 Root Device read_resources bus 0 link: 0 done
931 12:17:24.692860 Done reading resources.
932 12:17:24.692960 Show resources in subtree (Root Device)...After reading.
933 12:17:24.693066 Root Device child on link 0 CPU_CLUSTER: 0
934 12:17:24.693157 CPU_CLUSTER: 0 child on link 0 APIC: 00
935 12:17:24.693258 APIC: 00
936 12:17:24.693356 APIC: 02
937 12:17:24.693447 DOMAIN: 0000 child on link 0 PCI: 00:00.0
938 12:17:24.729698 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
939 12:17:24.730454 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
940 12:17:24.730734 PCI: 00:00.0
941 12:17:24.730887 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
942 12:17:24.731212 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
943 12:17:24.734701 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
944 12:17:24.744589 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
945 12:17:24.754086 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
946 12:17:24.764542 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
947 12:17:24.774347 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
948 12:17:24.781001 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
949 12:17:24.790685 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
950 12:17:24.800650 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
951 12:17:24.810476 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
952 12:17:24.820515 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
953 12:17:24.830187 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
954 12:17:24.836650 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
955 12:17:24.846611 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
956 12:17:24.856424 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
957 12:17:24.866529 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
958 12:17:24.876431 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
959 12:17:24.886361 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
960 12:17:24.886448 PCI: 00:02.0
961 12:17:24.896787 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
962 12:17:24.906802 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
963 12:17:24.916716 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
964 12:17:24.919648 PCI: 00:04.0 child on link 0 GENERIC: 0.0
965 12:17:24.929866 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
966 12:17:24.932925 GENERIC: 0.0
967 12:17:24.936571 PCI: 00:05.0 child on link 0 GENERIC: 0.0
968 12:17:24.946370 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
969 12:17:24.949949 GENERIC: 0.0
970 12:17:24.950059 PCI: 00:08.0
971 12:17:24.959621 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
972 12:17:24.963448 PCI: 00:14.0 child on link 0 USB0 port 0
973 12:17:24.973107 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
974 12:17:24.979567 USB0 port 0 child on link 0 USB2 port 0
975 12:17:24.979668 USB2 port 0
976 12:17:24.983022 USB2 port 1
977 12:17:24.983136 USB2 port 2
978 12:17:24.986515 USB2 port 3
979 12:17:24.986599 USB2 port 4
980 12:17:24.989918 USB2 port 5
981 12:17:24.990025 USB2 port 6
982 12:17:24.993438 USB2 port 7
983 12:17:24.993565 USB3 port 0
984 12:17:24.996214 USB3 port 1
985 12:17:24.996298 USB3 port 2
986 12:17:24.999811 USB3 port 3
987 12:17:24.999895 PCI: 00:14.2
988 12:17:25.006260 PCI: 00:14.3 child on link 0 GENERIC: 0.0
989 12:17:25.016532 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
990 12:17:25.016616 GENERIC: 0.0
991 12:17:25.019438 PCI: 00:14.5
992 12:17:25.029570 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
993 12:17:25.033068 PCI: 00:15.0 child on link 0 I2C: 00:2c
994 12:17:25.042755 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
995 12:17:25.046317 I2C: 00:2c
996 12:17:25.046399 I2C: 00:15
997 12:17:25.046464 PCI: 00:15.1
998 12:17:25.056109 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
999 12:17:25.062955 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1000 12:17:25.072628 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1001 12:17:25.072736 GENERIC: 0.0
1002 12:17:25.076224 I2C: 00:15
1003 12:17:25.076321 I2C: 00:10
1004 12:17:25.079264 I2C: 00:10
1005 12:17:25.079345 I2C: 00:2c
1006 12:17:25.082508 I2C: 00:40
1007 12:17:25.082594 I2C: 00:10
1008 12:17:25.086044 I2C: 00:39
1009 12:17:25.089655 PCI: 00:15.3 child on link 0 I2C: 00:36
1010 12:17:25.099486 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1011 12:17:25.099571 I2C: 00:36
1012 12:17:25.103046 I2C: 00:10
1013 12:17:25.103155 I2C: 00:0c
1014 12:17:25.105947 I2C: 00:50
1015 12:17:25.106073 PCI: 00:16.0
1016 12:17:25.116046 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1017 12:17:25.122243 PCI: 00:19.0 child on link 0 I2C: 00:1a
1018 12:17:25.132815 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1019 12:17:25.132901 I2C: 00:1a
1020 12:17:25.132967 I2C: 00:1a
1021 12:17:25.135879 I2C: 00:1a
1022 12:17:25.135961 I2C: 00:28
1023 12:17:25.139663 I2C: 00:29
1024 12:17:25.139745 PCI: 00:19.2
1025 12:17:25.152563 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1026 12:17:25.161823 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1027 12:17:25.161934 PCI: 00:1a.0
1028 12:17:25.171900 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1029 12:17:25.174923 PCI: 00:1e.0
1030 12:17:25.178544 PCI: 00:1e.2 child on link 0 SPI: 00
1031 12:17:25.188396 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1032 12:17:25.188514 SPI: 00
1033 12:17:25.195011 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1034 12:17:25.201842 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1035 12:17:25.204794 PNP: 0c09.0
1036 12:17:25.211434 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1037 12:17:25.214919 PCI: 00:1f.2
1038 12:17:25.224487 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1039 12:17:25.234416 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1040 12:17:25.238087 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1041 12:17:25.247541 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1042 12:17:25.257915 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1043 12:17:25.261112 GENERIC: 0.0
1044 12:17:25.261220 PCI: 00:1f.5
1045 12:17:25.269037 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1046 12:17:25.279190 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1047 12:17:25.285948 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1048 12:17:25.292417 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1049 12:17:25.298859 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1050 12:17:25.305614 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1051 12:17:25.312697 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1052 12:17:25.315528 DOMAIN: 0000: Resource ranges:
1053 12:17:25.319021 * Base: 1000, Size: 800, Tag: 100
1054 12:17:25.325744 * Base: 1900, Size: e700, Tag: 100
1055 12:17:25.329229 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1056 12:17:25.335754 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1057 12:17:25.342342 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1058 12:17:25.351976 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1059 12:17:25.358607 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1060 12:17:25.365305 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1061 12:17:25.371874 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1062 12:17:25.382093 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1063 12:17:25.388850 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1064 12:17:25.395270 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1065 12:17:25.405272 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1066 12:17:25.411893 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1067 12:17:25.418233 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1068 12:17:25.428583 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1069 12:17:25.435434 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1070 12:17:25.442054 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1071 12:17:25.451578 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1072 12:17:25.458037 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1073 12:17:25.464868 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1074 12:17:25.475130 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1075 12:17:25.481790 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1076 12:17:25.487789 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1077 12:17:25.497801 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1078 12:17:25.504223 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1079 12:17:25.507737 DOMAIN: 0000: Resource ranges:
1080 12:17:25.511292 * Base: 7fc00000, Size: 40400000, Tag: 200
1081 12:17:25.517548 * Base: d0000000, Size: 2b000000, Tag: 200
1082 12:17:25.520666 * Base: fb001000, Size: 2fff000, Tag: 200
1083 12:17:25.524002 * Base: fe010000, Size: 22000, Tag: 200
1084 12:17:25.527481 * Base: fe033000, Size: a4d000, Tag: 200
1085 12:17:25.533988 * Base: fea88000, Size: 2f8000, Tag: 200
1086 12:17:25.537645 * Base: fed88000, Size: 8000, Tag: 200
1087 12:17:25.540424 * Base: fed93000, Size: d000, Tag: 200
1088 12:17:25.544090 * Base: feda2000, Size: 125e000, Tag: 200
1089 12:17:25.550526 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1090 12:17:25.557039 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1091 12:17:25.563700 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1092 12:17:25.570372 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1093 12:17:25.577072 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1094 12:17:25.583680 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1095 12:17:25.590332 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1096 12:17:25.596514 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1097 12:17:25.603632 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1098 12:17:25.610106 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1099 12:17:25.616412 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1100 12:17:25.623254 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1101 12:17:25.629849 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1102 12:17:25.636500 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1103 12:17:25.643066 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1104 12:17:25.649522 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1105 12:17:25.656330 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1106 12:17:25.663257 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1107 12:17:25.669489 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1108 12:17:25.676158 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1109 12:17:25.682999 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1110 12:17:25.689384 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1111 12:17:25.695959 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1112 12:17:25.702873 Root Device assign_resources, bus 0 link: 0
1113 12:17:25.706247 DOMAIN: 0000 assign_resources, bus 0 link: 0
1114 12:17:25.712703 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1115 12:17:25.722469 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1116 12:17:25.729637 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1117 12:17:25.738931 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1118 12:17:25.742381 PCI: 00:04.0 assign_resources, bus 1 link: 0
1119 12:17:25.748807 PCI: 00:04.0 assign_resources, bus 1 link: 0
1120 12:17:25.755786 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1121 12:17:25.758811 PCI: 00:05.0 assign_resources, bus 2 link: 0
1122 12:17:25.765376 PCI: 00:05.0 assign_resources, bus 2 link: 0
1123 12:17:25.772006 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1124 12:17:25.782243 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1125 12:17:25.785405 PCI: 00:14.0 assign_resources, bus 0 link: 0
1126 12:17:25.788740 PCI: 00:14.0 assign_resources, bus 0 link: 0
1127 12:17:25.798434 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1128 12:17:25.802100 PCI: 00:14.3 assign_resources, bus 0 link: 0
1129 12:17:25.808839 PCI: 00:14.3 assign_resources, bus 0 link: 0
1130 12:17:25.815299 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1131 12:17:25.825381 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1132 12:17:25.828878 PCI: 00:15.0 assign_resources, bus 0 link: 0
1133 12:17:25.831901 PCI: 00:15.0 assign_resources, bus 0 link: 0
1134 12:17:25.841714 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1135 12:17:25.849465 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1136 12:17:25.852419 PCI: 00:15.2 assign_resources, bus 0 link: 0
1137 12:17:25.859265 PCI: 00:15.2 assign_resources, bus 0 link: 0
1138 12:17:25.865750 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1139 12:17:25.869075 PCI: 00:15.3 assign_resources, bus 0 link: 0
1140 12:17:25.875852 PCI: 00:15.3 assign_resources, bus 0 link: 0
1141 12:17:25.882638 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1142 12:17:25.892399 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1143 12:17:25.896049 PCI: 00:19.0 assign_resources, bus 0 link: 0
1144 12:17:25.902136 PCI: 00:19.0 assign_resources, bus 0 link: 0
1145 12:17:25.909278 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1146 12:17:25.915761 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1147 12:17:25.925408 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1148 12:17:25.928964 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1149 12:17:25.935418 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1150 12:17:25.938922 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1151 12:17:25.945879 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1152 12:17:25.949325 LPC: Trying to open IO window from 800 size 1ff
1153 12:17:25.955797 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1154 12:17:25.965820 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1155 12:17:25.969113 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1156 12:17:25.975599 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1157 12:17:25.982205 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1158 12:17:25.985334 DOMAIN: 0000 assign_resources, bus 0 link: 0
1159 12:17:25.991957 Root Device assign_resources, bus 0 link: 0
1160 12:17:25.995542 Done setting resources.
1161 12:17:25.998495 Show resources in subtree (Root Device)...After assigning values.
1162 12:17:26.005237 Root Device child on link 0 CPU_CLUSTER: 0
1163 12:17:26.008908 CPU_CLUSTER: 0 child on link 0 APIC: 00
1164 12:17:26.008988 APIC: 00
1165 12:17:26.011979 APIC: 02
1166 12:17:26.014928 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1167 12:17:26.024911 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1168 12:17:26.034913 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1169 12:17:26.035014 PCI: 00:00.0
1170 12:17:26.045099 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1171 12:17:26.054672 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1172 12:17:26.064963 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1173 12:17:26.074677 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1174 12:17:26.084496 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1175 12:17:26.091254 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1176 12:17:26.101587 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1177 12:17:26.111251 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1178 12:17:26.121393 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1179 12:17:26.131302 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1180 12:17:26.137753 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1181 12:17:26.147783 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1182 12:17:26.157830 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1183 12:17:26.167772 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1184 12:17:26.177914 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1185 12:17:26.184097 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1186 12:17:26.194340 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1187 12:17:26.204006 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1188 12:17:26.213980 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1189 12:17:26.216981 PCI: 00:02.0
1190 12:17:26.227147 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1191 12:17:26.237258 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1192 12:17:26.247389 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1193 12:17:26.250729 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1194 12:17:26.260174 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1195 12:17:26.263657 GENERIC: 0.0
1196 12:17:26.267235 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1197 12:17:26.276710 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1198 12:17:26.280280 GENERIC: 0.0
1199 12:17:26.280404 PCI: 00:08.0
1200 12:17:26.290179 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1201 12:17:26.296670 PCI: 00:14.0 child on link 0 USB0 port 0
1202 12:17:26.306477 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1203 12:17:26.309842 USB0 port 0 child on link 0 USB2 port 0
1204 12:17:26.313276 USB2 port 0
1205 12:17:26.313365 USB2 port 1
1206 12:17:26.316931 USB2 port 2
1207 12:17:26.317013 USB2 port 3
1208 12:17:26.319864 USB2 port 4
1209 12:17:26.319946 USB2 port 5
1210 12:17:26.323544 USB2 port 6
1211 12:17:26.323627 USB2 port 7
1212 12:17:26.326506 USB3 port 0
1213 12:17:26.326587 USB3 port 1
1214 12:17:26.330158 USB3 port 2
1215 12:17:26.330241 USB3 port 3
1216 12:17:26.333111 PCI: 00:14.2
1217 12:17:26.336468 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1218 12:17:26.346446 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1219 12:17:26.350050 GENERIC: 0.0
1220 12:17:26.350143 PCI: 00:14.5
1221 12:17:26.362910 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1222 12:17:26.365853 PCI: 00:15.0 child on link 0 I2C: 00:2c
1223 12:17:26.376434 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1224 12:17:26.376569 I2C: 00:2c
1225 12:17:26.379423 I2C: 00:15
1226 12:17:26.379508 PCI: 00:15.1
1227 12:17:26.392634 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1228 12:17:26.395987 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1229 12:17:26.405889 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1230 12:17:26.406030 GENERIC: 0.0
1231 12:17:26.409370 I2C: 00:15
1232 12:17:26.409483 I2C: 00:10
1233 12:17:26.412994 I2C: 00:10
1234 12:17:26.413104 I2C: 00:2c
1235 12:17:26.416013 I2C: 00:40
1236 12:17:26.416141 I2C: 00:10
1237 12:17:26.419100 I2C: 00:39
1238 12:17:26.422810 PCI: 00:15.3 child on link 0 I2C: 00:36
1239 12:17:26.432540 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1240 12:17:26.436097 I2C: 00:36
1241 12:17:26.436195 I2C: 00:10
1242 12:17:26.439486 I2C: 00:0c
1243 12:17:26.439570 I2C: 00:50
1244 12:17:26.442282 PCI: 00:16.0
1245 12:17:26.452772 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1246 12:17:26.455505 PCI: 00:19.0 child on link 0 I2C: 00:1a
1247 12:17:26.465568 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1248 12:17:26.469005 I2C: 00:1a
1249 12:17:26.469117 I2C: 00:1a
1250 12:17:26.472389 I2C: 00:1a
1251 12:17:26.472477 I2C: 00:28
1252 12:17:26.472544 I2C: 00:29
1253 12:17:26.475948 PCI: 00:19.2
1254 12:17:26.485400 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1255 12:17:26.495253 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1256 12:17:26.498919 PCI: 00:1a.0
1257 12:17:26.508482 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1258 12:17:26.512132 PCI: 00:1e.0
1259 12:17:26.515102 PCI: 00:1e.2 child on link 0 SPI: 00
1260 12:17:26.525402 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1261 12:17:26.525502 SPI: 00
1262 12:17:26.531979 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1263 12:17:26.538565 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1264 12:17:26.541709 PNP: 0c09.0
1265 12:17:26.548662 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1266 12:17:26.551445 PCI: 00:1f.2
1267 12:17:26.561925 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1268 12:17:26.568476 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1269 12:17:26.575054 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1270 12:17:26.584819 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1271 12:17:26.594789 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1272 12:17:26.597780 GENERIC: 0.0
1273 12:17:26.597877 PCI: 00:1f.5
1274 12:17:26.607735 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1275 12:17:26.611141 Done allocating resources.
1276 12:17:26.617703 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2095 ms
1277 12:17:26.621425 Enabling resources...
1278 12:17:26.624281 PCI: 00:00.0 subsystem <- 8086/4e22
1279 12:17:26.627983 PCI: 00:00.0 cmd <- 06
1280 12:17:26.631084 PCI: 00:02.0 subsystem <- 8086/4e55
1281 12:17:26.631187 PCI: 00:02.0 cmd <- 03
1282 12:17:26.637704 PCI: 00:04.0 subsystem <- 8086/4e03
1283 12:17:26.637814 PCI: 00:04.0 cmd <- 02
1284 12:17:26.641432 PCI: 00:05.0 bridge ctrl <- 0003
1285 12:17:26.644199 PCI: 00:05.0 subsystem <- 8086/4e19
1286 12:17:26.648074 PCI: 00:05.0 cmd <- 02
1287 12:17:26.651085 PCI: 00:08.0 cmd <- 06
1288 12:17:26.654486 PCI: 00:14.0 subsystem <- 8086/4ded
1289 12:17:26.657511 PCI: 00:14.0 cmd <- 02
1290 12:17:26.661075 PCI: 00:14.3 subsystem <- 8086/4df0
1291 12:17:26.664520 PCI: 00:14.3 cmd <- 02
1292 12:17:26.668015 PCI: 00:14.5 subsystem <- 8086/4df8
1293 12:17:26.668305 PCI: 00:14.5 cmd <- 06
1294 12:17:26.674070 PCI: 00:15.0 subsystem <- 8086/4de8
1295 12:17:26.674238 PCI: 00:15.0 cmd <- 02
1296 12:17:26.677771 PCI: 00:15.1 subsystem <- 8086/4de9
1297 12:17:26.680696 PCI: 00:15.1 cmd <- 02
1298 12:17:26.684101 PCI: 00:15.2 subsystem <- 8086/4dea
1299 12:17:26.687769 PCI: 00:15.2 cmd <- 02
1300 12:17:26.690767 PCI: 00:15.3 subsystem <- 8086/4deb
1301 12:17:26.694334 PCI: 00:15.3 cmd <- 02
1302 12:17:26.697692 PCI: 00:16.0 subsystem <- 8086/4de0
1303 12:17:26.700575 PCI: 00:16.0 cmd <- 02
1304 12:17:26.704097 PCI: 00:19.0 subsystem <- 8086/4dc5
1305 12:17:26.704179 PCI: 00:19.0 cmd <- 02
1306 12:17:26.710754 PCI: 00:19.2 subsystem <- 8086/4dc7
1307 12:17:26.710864 PCI: 00:19.2 cmd <- 06
1308 12:17:26.714089 PCI: 00:1a.0 subsystem <- 8086/4dc4
1309 12:17:26.717633 PCI: 00:1a.0 cmd <- 06
1310 12:17:26.720732 PCI: 00:1e.2 subsystem <- 8086/4daa
1311 12:17:26.724333 PCI: 00:1e.2 cmd <- 06
1312 12:17:26.727469 PCI: 00:1f.0 subsystem <- 8086/4d87
1313 12:17:26.730469 PCI: 00:1f.0 cmd <- 407
1314 12:17:26.734230 PCI: 00:1f.3 subsystem <- 8086/4dc8
1315 12:17:26.737428 PCI: 00:1f.3 cmd <- 02
1316 12:17:26.740961 PCI: 00:1f.5 subsystem <- 8086/4da4
1317 12:17:26.743991 PCI: 00:1f.5 cmd <- 406
1318 12:17:26.747451 done.
1319 12:17:26.750845 BS: BS_DEV_ENABLE run times (exec / console): 7 / 121 ms
1320 12:17:26.753854 Initializing devices...
1321 12:17:26.757442 Root Device init
1322 12:17:26.757533 mainboard: EC init
1323 12:17:26.760902 Chrome EC: Set SMI mask to 0x0000000000000000
1324 12:17:26.768100 Chrome EC: clear events_b mask to 0x0000000000000000
1325 12:17:26.774193 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1326 12:17:26.781126 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1327 12:17:26.784263 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1328 12:17:26.791313 Chrome EC: Set WAKE mask to 0x0000000000000000
1329 12:17:26.794182 Root Device init finished in 35 msecs
1330 12:17:26.797959 PCI: 00:00.0 init
1331 12:17:26.801514 CPU TDP = 6 Watts
1332 12:17:26.801609 CPU PL1 = 7 Watts
1333 12:17:26.805049 CPU PL2 = 12 Watts
1334 12:17:26.808497 PCI: 00:00.0 init finished in 6 msecs
1335 12:17:26.811572 PCI: 00:02.0 init
1336 12:17:26.811671 GMA: Found VBT in CBFS
1337 12:17:26.815025 GMA: Found valid VBT in CBFS
1338 12:17:26.821493 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1339 12:17:26.828251 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1340 12:17:26.834976 PCI: 00:02.0 init finished in 18 msecs
1341 12:17:26.835146 PCI: 00:08.0 init
1342 12:17:26.837854 PCI: 00:08.0 init finished in 0 msecs
1343 12:17:26.841563 PCI: 00:14.0 init
1344 12:17:26.845262 XHCI: Updated LFPS sampling OFF time to 9 ms
1345 12:17:26.852085 PCI: 00:14.0 init finished in 4 msecs
1346 12:17:26.852234 PCI: 00:15.0 init
1347 12:17:26.854658 I2C bus 0 version 0x3230302a
1348 12:17:26.858279 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1349 12:17:26.864658 PCI: 00:15.0 init finished in 6 msecs
1350 12:17:26.864829 PCI: 00:15.1 init
1351 12:17:26.867641 I2C bus 1 version 0x3230302a
1352 12:17:26.871285 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1353 12:17:26.874791 PCI: 00:15.1 init finished in 6 msecs
1354 12:17:26.877683 PCI: 00:15.2 init
1355 12:17:26.881128 I2C bus 2 version 0x3230302a
1356 12:17:26.884878 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1357 12:17:26.887807 PCI: 00:15.2 init finished in 6 msecs
1358 12:17:26.891232 PCI: 00:15.3 init
1359 12:17:26.894960 I2C bus 3 version 0x3230302a
1360 12:17:26.897817 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1361 12:17:26.901461 PCI: 00:15.3 init finished in 6 msecs
1362 12:17:26.901568 PCI: 00:16.0 init
1363 12:17:26.907686 PCI: 00:16.0 init finished in 0 msecs
1364 12:17:26.907796 PCI: 00:19.0 init
1365 12:17:26.911137 I2C bus 4 version 0x3230302a
1366 12:17:26.914794 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1367 12:17:26.917850 PCI: 00:19.0 init finished in 6 msecs
1368 12:17:26.921198 PCI: 00:1a.0 init
1369 12:17:26.924735 PCI: 00:1a.0 init finished in 0 msecs
1370 12:17:26.928309 PCI: 00:1f.0 init
1371 12:17:26.931367 IOAPIC: Initializing IOAPIC at 0xfec00000
1372 12:17:26.937902 IOAPIC: Bootstrap Processor Local APIC = 0x00
1373 12:17:26.938009 IOAPIC: ID = 0x02
1374 12:17:26.941552 IOAPIC: Dumping registers
1375 12:17:26.944597 reg 0x0000: 0x02000000
1376 12:17:26.944693 reg 0x0001: 0x00770020
1377 12:17:26.947692 reg 0x0002: 0x00000000
1378 12:17:26.951257 PCI: 00:1f.0 init finished in 21 msecs
1379 12:17:26.954846 PCI: 00:1f.2 init
1380 12:17:26.957827 Disabling ACPI via APMC.
1381 12:17:26.962480 APMC done.
1382 12:17:26.965496 PCI: 00:1f.2 init finished in 6 msecs
1383 12:17:26.976695 PNP: 0c09.0 init
1384 12:17:26.980191 Google Chrome EC uptime: 6.502 seconds
1385 12:17:26.986655 Google Chrome AP resets since EC boot: 0
1386 12:17:26.989718 Google Chrome most recent AP reset causes:
1387 12:17:26.996373 Google Chrome EC reset flags at last EC boot: reset-pin
1388 12:17:26.999958 PNP: 0c09.0 init finished in 18 msecs
1389 12:17:27.002990 Devices initialized
1390 12:17:27.003109 Show all devs... After init.
1391 12:17:27.006873 Root Device: enabled 1
1392 12:17:27.009526 CPU_CLUSTER: 0: enabled 1
1393 12:17:27.012872 DOMAIN: 0000: enabled 1
1394 12:17:27.013002 PCI: 00:00.0: enabled 1
1395 12:17:27.016529 PCI: 00:02.0: enabled 1
1396 12:17:27.019665 PCI: 00:04.0: enabled 1
1397 12:17:27.023295 PCI: 00:05.0: enabled 1
1398 12:17:27.023424 PCI: 00:09.0: enabled 0
1399 12:17:27.026568 PCI: 00:12.6: enabled 0
1400 12:17:27.029567 PCI: 00:14.0: enabled 1
1401 12:17:27.029691 PCI: 00:14.1: enabled 0
1402 12:17:27.033053 PCI: 00:14.2: enabled 0
1403 12:17:27.036140 PCI: 00:14.3: enabled 1
1404 12:17:27.039829 PCI: 00:14.5: enabled 1
1405 12:17:27.039925 PCI: 00:15.0: enabled 1
1406 12:17:27.042961 PCI: 00:15.1: enabled 1
1407 12:17:27.046494 PCI: 00:15.2: enabled 1
1408 12:17:27.049555 PCI: 00:15.3: enabled 1
1409 12:17:27.049640 PCI: 00:16.0: enabled 1
1410 12:17:27.053224 PCI: 00:16.1: enabled 0
1411 12:17:27.056044 PCI: 00:16.4: enabled 0
1412 12:17:27.059895 PCI: 00:16.5: enabled 0
1413 12:17:27.060022 PCI: 00:17.0: enabled 0
1414 12:17:27.062779 PCI: 00:19.0: enabled 1
1415 12:17:27.066256 PCI: 00:19.1: enabled 0
1416 12:17:27.066362 PCI: 00:19.2: enabled 1
1417 12:17:27.069570 PCI: 00:1a.0: enabled 1
1418 12:17:27.072517 PCI: 00:1c.0: enabled 0
1419 12:17:27.075912 PCI: 00:1c.1: enabled 0
1420 12:17:27.076053 PCI: 00:1c.2: enabled 0
1421 12:17:27.079343 PCI: 00:1c.3: enabled 0
1422 12:17:27.082473 PCI: 00:1c.4: enabled 0
1423 12:17:27.086052 PCI: 00:1c.5: enabled 0
1424 12:17:27.086186 PCI: 00:1c.6: enabled 0
1425 12:17:27.088993 PCI: 00:1c.7: enabled 1
1426 12:17:27.092494 PCI: 00:1e.0: enabled 0
1427 12:17:27.096068 PCI: 00:1e.1: enabled 0
1428 12:17:27.096172 PCI: 00:1e.2: enabled 1
1429 12:17:27.099056 PCI: 00:1e.3: enabled 0
1430 12:17:27.102448 PCI: 00:1f.0: enabled 1
1431 12:17:27.102581 PCI: 00:1f.1: enabled 0
1432 12:17:27.105827 PCI: 00:1f.2: enabled 1
1433 12:17:27.109440 PCI: 00:1f.3: enabled 1
1434 12:17:27.112552 PCI: 00:1f.4: enabled 0
1435 12:17:27.112672 PCI: 00:1f.5: enabled 1
1436 12:17:27.116121 PCI: 00:1f.7: enabled 0
1437 12:17:27.119046 GENERIC: 0.0: enabled 1
1438 12:17:27.122470 GENERIC: 0.0: enabled 1
1439 12:17:27.122594 USB0 port 0: enabled 1
1440 12:17:27.125561 GENERIC: 0.0: enabled 1
1441 12:17:27.129269 I2C: 00:2c: enabled 1
1442 12:17:27.129444 I2C: 00:15: enabled 1
1443 12:17:27.132336 GENERIC: 0.0: enabled 0
1444 12:17:27.135648 I2C: 00:15: enabled 1
1445 12:17:27.135816 I2C: 00:10: enabled 0
1446 12:17:27.139327 I2C: 00:10: enabled 0
1447 12:17:27.142381 I2C: 00:2c: enabled 1
1448 12:17:27.142531 I2C: 00:40: enabled 1
1449 12:17:27.145391 I2C: 00:10: enabled 1
1450 12:17:27.149061 I2C: 00:39: enabled 1
1451 12:17:27.152691 I2C: 00:36: enabled 1
1452 12:17:27.152821 I2C: 00:10: enabled 0
1453 12:17:27.155712 I2C: 00:0c: enabled 1
1454 12:17:27.158676 I2C: 00:50: enabled 1
1455 12:17:27.158788 I2C: 00:1a: enabled 1
1456 12:17:27.162402 I2C: 00:1a: enabled 0
1457 12:17:27.165358 I2C: 00:1a: enabled 0
1458 12:17:27.165494 I2C: 00:28: enabled 1
1459 12:17:27.168749 I2C: 00:29: enabled 1
1460 12:17:27.172466 PCI: 00:00.0: enabled 1
1461 12:17:27.172596 SPI: 00: enabled 1
1462 12:17:27.175765 PNP: 0c09.0: enabled 1
1463 12:17:27.178805 GENERIC: 0.0: enabled 0
1464 12:17:27.178923 USB2 port 0: enabled 1
1465 12:17:27.182253 USB2 port 1: enabled 1
1466 12:17:27.185738 USB2 port 2: enabled 1
1467 12:17:27.185850 USB2 port 3: enabled 1
1468 12:17:27.188700 USB2 port 4: enabled 0
1469 12:17:27.192188 USB2 port 5: enabled 1
1470 12:17:27.195195 USB2 port 6: enabled 0
1471 12:17:27.195318 USB2 port 7: enabled 1
1472 12:17:27.198938 USB3 port 0: enabled 1
1473 12:17:27.202340 USB3 port 1: enabled 1
1474 12:17:27.202458 USB3 port 2: enabled 1
1475 12:17:27.205704 USB3 port 3: enabled 1
1476 12:17:27.208693 APIC: 00: enabled 1
1477 12:17:27.208804 APIC: 02: enabled 1
1478 12:17:27.212318 PCI: 00:08.0: enabled 1
1479 12:17:27.218910 BS: BS_DEV_INIT run times (exec / console): 24 / 437 ms
1480 12:17:27.222248 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1481 12:17:27.225797 ELOG: NV offset 0xbfa000 size 0x1000
1482 12:17:27.233023 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1483 12:17:27.239395 ELOG: Event(17) added with size 13 at 2023-06-14 12:17:27 UTC
1484 12:17:27.245998 ELOG: Event(92) added with size 9 at 2023-06-14 12:17:27 UTC
1485 12:17:27.252758 ELOG: Event(93) added with size 9 at 2023-06-14 12:17:27 UTC
1486 12:17:27.259389 ELOG: Event(9E) added with size 10 at 2023-06-14 12:17:27 UTC
1487 12:17:27.265812 ELOG: Event(9F) added with size 14 at 2023-06-14 12:17:27 UTC
1488 12:17:27.272418 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1489 12:17:27.276200 ELOG: Event(A1) added with size 10 at 2023-06-14 12:17:27 UTC
1490 12:17:27.285883 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1491 12:17:27.292425 ELOG: Event(A0) added with size 9 at 2023-06-14 12:17:27 UTC
1492 12:17:27.295778 elog_add_boot_reason: Logged dev mode boot
1493 12:17:27.302517 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1494 12:17:27.302705 Finalize devices...
1495 12:17:27.305987 Devices finalized
1496 12:17:27.312360 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1497 12:17:27.316037 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1498 12:17:27.322327 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1499 12:17:27.325743 ME: HFSTS1 : 0x80030045
1500 12:17:27.329090 ME: HFSTS2 : 0x30280136
1501 12:17:27.332271 ME: HFSTS3 : 0x00000050
1502 12:17:27.338827 ME: HFSTS4 : 0x00004000
1503 12:17:27.342235 ME: HFSTS5 : 0x00000000
1504 12:17:27.345336 ME: HFSTS6 : 0x40400006
1505 12:17:27.348860 ME: Manufacturing Mode : NO
1506 12:17:27.352372 ME: FW Partition Table : OK
1507 12:17:27.355497 ME: Bringup Loader Failure : NO
1508 12:17:27.359053 ME: Firmware Init Complete : NO
1509 12:17:27.362170 ME: Boot Options Present : NO
1510 12:17:27.365837 ME: Update In Progress : NO
1511 12:17:27.368909 ME: D0i3 Support : YES
1512 12:17:27.372029 ME: Low Power State Enabled : NO
1513 12:17:27.375648 ME: CPU Replaced : YES
1514 12:17:27.378675 ME: CPU Replacement Valid : YES
1515 12:17:27.382006 ME: Current Working State : 5
1516 12:17:27.385488 ME: Current Operation State : 1
1517 12:17:27.388618 ME: Current Operation Mode : 3
1518 12:17:27.392105 ME: Error Code : 0
1519 12:17:27.395092 ME: CPU Debug Disabled : YES
1520 12:17:27.398603 ME: TXT Support : NO
1521 12:17:27.405368 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1522 12:17:27.411898 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1523 12:17:27.415336 ACPI: Writing ACPI tables at 76b27000.
1524 12:17:27.415458 ACPI: * FACS
1525 12:17:27.418379 ACPI: * DSDT
1526 12:17:27.422019 Ramoops buffer: 0x100000@0x76a26000.
1527 12:17:27.424847 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1528 12:17:27.431858 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1529 12:17:27.434817 Google Chrome EC: version:
1530 12:17:27.438597 ro: magolor_1.1.9999-103b6f9
1531 12:17:27.441361 rw: magolor_1.1.9999-103b6f9
1532 12:17:27.441474 running image: 1
1533 12:17:27.447950 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1534 12:17:27.452501 ACPI: * FADT
1535 12:17:27.452612 SCI is IRQ9
1536 12:17:27.458854 ACPI: added table 1/32, length now 40
1537 12:17:27.458965 ACPI: * SSDT
1538 12:17:27.462414 Found 1 CPU(s) with 2 core(s) each.
1539 12:17:27.465442 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1540 12:17:27.472137 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1541 12:17:27.475279 Could not locate 'wifi_sar' in VPD.
1542 12:17:27.479079 Checking CBFS for default SAR values
1543 12:17:27.485336 wifi_sar_defaults.hex has bad len in CBFS
1544 12:17:27.488879 failed from getting SAR limits!
1545 12:17:27.492171 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1546 12:17:27.495694 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1547 12:17:27.502487 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1548 12:17:27.505405 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1549 12:17:27.511910 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1550 12:17:27.518710 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1551 12:17:27.522489 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1552 12:17:27.529116 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1553 12:17:27.535544 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1554 12:17:27.538988 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1555 12:17:27.545420 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1556 12:17:27.552056 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1557 12:17:27.555572 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1558 12:17:27.562170 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1559 12:17:27.565260 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1560 12:17:27.572674 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1561 12:17:27.575646 PS2K: Passing 101 keymaps to kernel
1562 12:17:27.582260 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1563 12:17:27.588725 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1564 12:17:27.592264 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1565 12:17:27.598601 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1566 12:17:27.605092 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1567 12:17:27.608523 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1568 12:17:27.615035 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1569 12:17:27.622317 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1570 12:17:27.625270 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1571 12:17:27.632087 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1572 12:17:27.635116 ACPI: added table 2/32, length now 44
1573 12:17:27.638241 ACPI: * MCFG
1574 12:17:27.641761 ACPI: added table 3/32, length now 48
1575 12:17:27.641873 ACPI: * TPM2
1576 12:17:27.645479 TPM2 log created at 0x76a16000
1577 12:17:27.648434 ACPI: added table 4/32, length now 52
1578 12:17:27.651939 ACPI: * MADT
1579 12:17:27.652033 SCI is IRQ9
1580 12:17:27.654982 ACPI: added table 5/32, length now 56
1581 12:17:27.658434 current = 76b2d580
1582 12:17:27.661641 ACPI: * DMAR
1583 12:17:27.665239 ACPI: added table 6/32, length now 60
1584 12:17:27.668413 ACPI: added table 7/32, length now 64
1585 12:17:27.668510 ACPI: * HPET
1586 12:17:27.671948 ACPI: added table 8/32, length now 68
1587 12:17:27.674880 ACPI: done.
1588 12:17:27.678558 ACPI tables: 26304 bytes.
1589 12:17:27.681471 smbios_write_tables: 76a15000
1590 12:17:27.685171 EC returned error result code 3
1591 12:17:27.688158 Couldn't obtain OEM name from CBI
1592 12:17:27.691840 Create SMBIOS type 16
1593 12:17:27.691954 Create SMBIOS type 17
1594 12:17:27.695110 GENERIC: 0.0 (WIFI Device)
1595 12:17:27.698114 SMBIOS tables: 913 bytes.
1596 12:17:27.701739 Writing table forward entry at 0x00000500
1597 12:17:27.708512 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1598 12:17:27.711415 Writing coreboot table at 0x76b4b000
1599 12:17:27.718473 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1600 12:17:27.721339 1. 0000000000001000-000000000009ffff: RAM
1601 12:17:27.728453 2. 00000000000a0000-00000000000fffff: RESERVED
1602 12:17:27.731283 3. 0000000000100000-0000000076a14fff: RAM
1603 12:17:27.737851 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1604 12:17:27.741335 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1605 12:17:27.747870 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1606 12:17:27.754364 7. 0000000077000000-000000007fbfffff: RESERVED
1607 12:17:27.757903 8. 00000000c0000000-00000000cfffffff: RESERVED
1608 12:17:27.760844 9. 00000000fb000000-00000000fb000fff: RESERVED
1609 12:17:27.767713 10. 00000000fe000000-00000000fe00ffff: RESERVED
1610 12:17:27.771444 11. 00000000fea80000-00000000fea87fff: RESERVED
1611 12:17:27.777557 12. 00000000fed80000-00000000fed87fff: RESERVED
1612 12:17:27.781101 13. 00000000fed90000-00000000fed92fff: RESERVED
1613 12:17:27.787753 14. 00000000feda0000-00000000feda1fff: RESERVED
1614 12:17:27.791174 15. 0000000100000000-00000001803fffff: RAM
1615 12:17:27.794357 Passing 4 GPIOs to payload:
1616 12:17:27.797732 NAME | PORT | POLARITY | VALUE
1617 12:17:27.804336 lid | undefined | high | high
1618 12:17:27.807962 power | undefined | high | low
1619 12:17:27.814148 oprom | undefined | high | low
1620 12:17:27.820875 EC in RW | 0x000000b9 | high | low
1621 12:17:27.827439 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum 7d7b
1622 12:17:27.827528 coreboot table: 1504 bytes.
1623 12:17:27.833872 IMD ROOT 0. 0x76fff000 0x00001000
1624 12:17:27.837484 IMD SMALL 1. 0x76ffe000 0x00001000
1625 12:17:27.840493 FSP MEMORY 2. 0x76c4e000 0x003b0000
1626 12:17:27.843883 CONSOLE 3. 0x76c2e000 0x00020000
1627 12:17:27.847582 FMAP 4. 0x76c2d000 0x00000578
1628 12:17:27.851089 TIME STAMP 5. 0x76c2c000 0x00000910
1629 12:17:27.854032 VBOOT WORK 6. 0x76c18000 0x00014000
1630 12:17:27.857567 ROMSTG STCK 7. 0x76c17000 0x00001000
1631 12:17:27.860618 AFTER CAR 8. 0x76c0d000 0x0000a000
1632 12:17:27.867356 RAMSTAGE 9. 0x76ba7000 0x00066000
1633 12:17:27.870534 REFCODE 10. 0x76b67000 0x00040000
1634 12:17:27.874257 SMM BACKUP 11. 0x76b57000 0x00010000
1635 12:17:27.877316 4f444749 12. 0x76b55000 0x00002000
1636 12:17:27.880435 EXT VBT13. 0x76b53000 0x00001c43
1637 12:17:27.884214 COREBOOT 14. 0x76b4b000 0x00008000
1638 12:17:27.887552 ACPI 15. 0x76b27000 0x00024000
1639 12:17:27.890591 ACPI GNVS 16. 0x76b26000 0x00001000
1640 12:17:27.894230 RAMOOPS 17. 0x76a26000 0x00100000
1641 12:17:27.897133 TPM2 TCGLOG18. 0x76a16000 0x00010000
1642 12:17:27.903607 SMBIOS 19. 0x76a15000 0x00000800
1643 12:17:27.903717 IMD small region:
1644 12:17:27.907318 IMD ROOT 0. 0x76ffec00 0x00000400
1645 12:17:27.913946 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1646 12:17:27.916822 VPD 2. 0x76ffeb60 0x0000006c
1647 12:17:27.920692 POWER STATE 3. 0x76ffeb20 0x00000040
1648 12:17:27.923556 ROMSTAGE 4. 0x76ffeb00 0x00000004
1649 12:17:27.927324 MEM INFO 5. 0x76ffe920 0x000001e0
1650 12:17:27.933529 BS: BS_WRITE_TABLES run times (exec / console): 7 / 516 ms
1651 12:17:27.937098 MTRR: Physical address space:
1652 12:17:27.943886 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1653 12:17:27.950067 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1654 12:17:27.957090 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1655 12:17:27.960017 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1656 12:17:27.966452 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1657 12:17:27.973574 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1658 12:17:27.979814 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1659 12:17:27.983423 MTRR: Fixed MSR 0x250 0x0606060606060606
1660 12:17:27.986551 MTRR: Fixed MSR 0x258 0x0606060606060606
1661 12:17:27.993621 MTRR: Fixed MSR 0x259 0x0000000000000000
1662 12:17:27.996593 MTRR: Fixed MSR 0x268 0x0606060606060606
1663 12:17:27.999709 MTRR: Fixed MSR 0x269 0x0606060606060606
1664 12:17:28.003308 MTRR: Fixed MSR 0x26a 0x0606060606060606
1665 12:17:28.009901 MTRR: Fixed MSR 0x26b 0x0606060606060606
1666 12:17:28.013765 MTRR: Fixed MSR 0x26c 0x0606060606060606
1667 12:17:28.016377 MTRR: Fixed MSR 0x26d 0x0606060606060606
1668 12:17:28.020002 MTRR: Fixed MSR 0x26e 0x0606060606060606
1669 12:17:28.026181 MTRR: Fixed MSR 0x26f 0x0606060606060606
1670 12:17:28.029653 call enable_fixed_mtrr()
1671 12:17:28.033276 CPU physical address size: 39 bits
1672 12:17:28.036342 MTRR: default type WB/UC MTRR counts: 6/5.
1673 12:17:28.039689 MTRR: UC selected as default type.
1674 12:17:28.046494 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1675 12:17:28.052895 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1676 12:17:28.059896 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1677 12:17:28.062836 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1678 12:17:28.069303 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1679 12:17:28.069393
1680 12:17:28.072784 MTRR check
1681 12:17:28.076380 Fixed MTRRs : Enabled
1682 12:17:28.076465 Variable MTRRs: Enabled
1683 12:17:28.076532
1684 12:17:28.082531 MTRR: Fixed MSR 0x250 0x0606060606060606
1685 12:17:28.086179 MTRR: Fixed MSR 0x258 0x0606060606060606
1686 12:17:28.089356 MTRR: Fixed MSR 0x259 0x0000000000000000
1687 12:17:28.092734 MTRR: Fixed MSR 0x268 0x0606060606060606
1688 12:17:28.099303 MTRR: Fixed MSR 0x269 0x0606060606060606
1689 12:17:28.102427 MTRR: Fixed MSR 0x26a 0x0606060606060606
1690 12:17:28.105576 MTRR: Fixed MSR 0x26b 0x0606060606060606
1691 12:17:28.109027 MTRR: Fixed MSR 0x26c 0x0606060606060606
1692 12:17:28.112583 MTRR: Fixed MSR 0x26d 0x0606060606060606
1693 12:17:28.119142 MTRR: Fixed MSR 0x26e 0x0606060606060606
1694 12:17:28.122105 MTRR: Fixed MSR 0x26f 0x0606060606060606
1695 12:17:28.129158 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1696 12:17:28.129277 call enable_fixed_mtrr()
1697 12:17:28.135694 Checking cr50 for pending updates
1698 12:17:28.135822 CPU physical address size: 39 bits
1699 12:17:28.141435 Reading cr50 TPM mode
1700 12:17:28.151091 BS: BS_PAYLOAD_LOAD entry times (exec / console): 12 / 6 ms
1701 12:17:28.158846 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1702 12:17:28.161885 Checking segment from ROM address 0xfff9d5b8
1703 12:17:28.168455 Checking segment from ROM address 0xfff9d5d4
1704 12:17:28.171785 Loading segment from ROM address 0xfff9d5b8
1705 12:17:28.174960 code (compression=0)
1706 12:17:28.181997 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1707 12:17:28.191677 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1708 12:17:28.194884 it's not compressed!
1709 12:17:28.320909 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1710 12:17:28.327053 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1711 12:17:28.334749 Loading segment from ROM address 0xfff9d5d4
1712 12:17:28.337831 Entry Point 0x30000000
1713 12:17:28.337942 Loaded segments
1714 12:17:28.344635 BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms
1715 12:17:28.360593 Finalizing chipset.
1716 12:17:28.364279 Finalizing SMM.
1717 12:17:28.364390 APMC done.
1718 12:17:28.370482 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1719 12:17:28.374354 mp_park_aps done after 0 msecs.
1720 12:17:28.377373 Jumping to boot code at 0x30000000(0x76b4b000)
1721 12:17:28.387070 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1722 12:17:28.387177
1723 12:17:28.387245
1724 12:17:28.387306
1725 12:17:28.390647 Starting depthcharge on Magolor...
1726 12:17:28.390727
1727 12:17:28.391150 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1728 12:17:28.391251 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1729 12:17:28.391359 Setting prompt string to ['dedede:']
1730 12:17:28.391444 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1731 12:17:28.400327 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1732 12:17:28.400454
1733 12:17:28.407093 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1734 12:17:28.407213
1735 12:17:28.410737 fw_config match found: AUDIO_AMP=UNPROVISIONED
1736 12:17:28.410842
1737 12:17:28.413834 Wipe memory regions:
1738 12:17:28.413955
1739 12:17:28.416879 [0x00000000001000, 0x000000000a0000)
1740 12:17:28.416997
1741 12:17:28.420495 [0x00000000100000, 0x00000030000000)
1742 12:17:28.549589
1743 12:17:28.553252 [0x00000031062170, 0x00000076a15000)
1744 12:17:28.722221
1745 12:17:28.724965 [0x00000100000000, 0x00000180400000)
1746 12:17:29.787352
1747 12:17:29.787521 R8152: Initializing
1748 12:17:29.787599
1749 12:17:29.790657 Version 6 (ocp_data = 5c30)
1750 12:17:29.793731
1751 12:17:29.793814 R8152: Done initializing
1752 12:17:29.793881
1753 12:17:29.796975 Adding net device
1754 12:17:29.797058
1755 12:17:29.800538 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1756 12:17:29.803894
1757 12:17:29.803997
1758 12:17:29.804090
1759 12:17:29.804400 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1761 12:17:29.904811 dedede: tftpboot 192.168.201.1 10724500/tftp-deploy-q3cl5j3p/kernel/bzImage 10724500/tftp-deploy-q3cl5j3p/kernel/cmdline 10724500/tftp-deploy-q3cl5j3p/ramdisk/ramdisk.cpio.gz
1762 12:17:29.905026 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1763 12:17:29.905154 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1764 12:17:29.909632 tftpboot 192.168.201.1 10724500/tftp-deploy-q3cl5j3p/kernel/bzImploy-q3cl5j3p/kernel/cmdline 10724500/tftp-deploy-q3cl5j3p/ramdisk/ramdisk.cpio.gz
1765 12:17:29.909770
1766 12:17:29.909886 Waiting for link
1767 12:17:30.111569
1768 12:17:30.111724 done.
1769 12:17:30.111795
1770 12:17:30.111856 MAC: 00:24:32:30:79:17
1771 12:17:30.111923
1772 12:17:30.114609 Sending DHCP discover... done.
1773 12:17:30.114692
1774 12:17:30.117837 Waiting for reply... done.
1775 12:17:30.117949
1776 12:17:30.121325 Sending DHCP request... done.
1777 12:17:30.121434
1778 12:17:30.129601 Waiting for reply... done.
1779 12:17:30.129717
1780 12:17:30.129816 My ip is 192.168.201.10
1781 12:17:30.129910
1782 12:17:30.132667 The DHCP server ip is 192.168.201.1
1783 12:17:30.135693
1784 12:17:30.139445 TFTP server IP predefined by user: 192.168.201.1
1785 12:17:30.139528
1786 12:17:30.145745 Bootfile predefined by user: 10724500/tftp-deploy-q3cl5j3p/kernel/bzImage
1787 12:17:30.145829
1788 12:17:30.149564 Sending tftp read request... done.
1789 12:17:30.149647
1790 12:17:30.152689 Waiting for the transfer...
1791 12:17:30.152803
1792 12:17:30.742355 00000000 ################################################################
1793 12:17:30.742688
1794 12:17:31.300396 00080000 ################################################################
1795 12:17:31.300570
1796 12:17:31.859699 00100000 ################################################################
1797 12:17:31.859877
1798 12:17:32.419695 00180000 ################################################################
1799 12:17:32.419845
1800 12:17:32.952871 00200000 ################################################################
1801 12:17:32.953039
1802 12:17:33.499921 00280000 ################################################################
1803 12:17:33.500069
1804 12:17:34.052143 00300000 ################################################################
1805 12:17:34.052310
1806 12:17:34.606312 00380000 ################################################################
1807 12:17:34.606455
1808 12:17:35.152930 00400000 ################################################################
1809 12:17:35.153093
1810 12:17:35.703852 00480000 ################################################################
1811 12:17:35.704001
1812 12:17:36.253876 00500000 ################################################################
1813 12:17:36.254023
1814 12:17:36.801026 00580000 ################################################################
1815 12:17:36.801173
1816 12:17:37.340068 00600000 ################################################################
1817 12:17:37.340250
1818 12:17:37.888412 00680000 ################################################################
1819 12:17:37.888592
1820 12:17:38.436859 00700000 ################################################################
1821 12:17:38.437011
1822 12:17:38.986649 00780000 ################################################################
1823 12:17:38.986798
1824 12:17:39.532928 00800000 ################################################################
1825 12:17:39.533078
1826 12:17:40.092601 00880000 ################################################################
1827 12:17:40.092764
1828 12:17:40.651145 00900000 ################################################################
1829 12:17:40.651299
1830 12:17:41.207238 00980000 ################################################################
1831 12:17:41.207393
1832 12:17:41.619794 00a00000 ############################################### done.
1833 12:17:41.620292
1834 12:17:41.622751 The bootfile was 10863104 bytes long.
1835 12:17:41.623266
1836 12:17:41.626288 Sending tftp read request... done.
1837 12:17:41.626698
1838 12:17:41.629574 Waiting for the transfer...
1839 12:17:41.630168
1840 12:17:42.187980 00000000 ################################################################
1841 12:17:42.188467
1842 12:17:42.798289 00080000 ################################################################
1843 12:17:42.798463
1844 12:17:43.353905 00100000 ################################################################
1845 12:17:43.354092
1846 12:17:43.906705 00180000 ################################################################
1847 12:17:43.906884
1848 12:17:44.527444 00200000 ################################################################
1849 12:17:44.527594
1850 12:17:45.200130 00280000 ################################################################
1851 12:17:45.200287
1852 12:17:45.827951 00300000 ################################################################
1853 12:17:45.828102
1854 12:17:46.417666 00380000 ################################################################
1855 12:17:46.417838
1856 12:17:46.951133 00400000 ################################################################
1857 12:17:46.951309
1858 12:17:47.495586 00480000 ################################################################
1859 12:17:47.495727
1860 12:17:48.032818 00500000 ################################################################
1861 12:17:48.032972
1862 12:17:48.574794 00580000 ################################################################
1863 12:17:48.574977
1864 12:17:49.133454 00600000 ################################################################
1865 12:17:49.133605
1866 12:17:49.674641 00680000 ################################################################
1867 12:17:49.674806
1868 12:17:50.222507 00700000 ################################################################
1869 12:17:50.222671
1870 12:17:50.757453 00780000 ################################################################
1871 12:17:50.757622
1872 12:17:51.306003 00800000 ################################################################
1873 12:17:51.306145
1874 12:17:51.620778 00880000 ##################################### done.
1875 12:17:51.620927
1876 12:17:51.624540 Sending tftp read request... done.
1877 12:17:51.624625
1878 12:17:51.627504 Waiting for the transfer...
1879 12:17:51.627588
1880 12:17:51.627671 00000000 # done.
1881 12:17:51.627751
1882 12:17:51.637933 Command line loaded dynamically from TFTP file: 10724500/tftp-deploy-q3cl5j3p/kernel/cmdline
1883 12:17:51.638023
1884 12:17:51.651084 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1885 12:17:51.651564
1886 12:17:51.654158 ec_init: CrosEC protocol v3 supported (256, 256)
1887 12:17:51.662739
1888 12:17:51.665839 Shutting down all USB controllers.
1889 12:17:51.666259
1890 12:17:51.666585 Removing current net device
1891 12:17:51.666893
1892 12:17:51.669421 Finalizing coreboot
1893 12:17:51.669835
1894 12:17:51.675901 Exiting depthcharge with code 4 at timestamp: 30085875
1895 12:17:51.676333
1896 12:17:51.676669
1897 12:17:51.676982 Starting kernel ...
1898 12:17:51.677286
1899 12:17:51.677584
1900 12:17:51.678792 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
1901 12:17:51.679315 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
1902 12:17:51.679728 Setting prompt string to ['Linux version [0-9]']
1903 12:17:51.680080 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1904 12:17:51.680466 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1906 12:22:15.680996 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
1908 12:22:15.682151 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
1910 12:22:15.683212 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1913 12:22:15.684730 end: 2 depthcharge-action (duration 00:05:00) [common]
1915 12:22:15.686113 Cleaning after the job
1916 12:22:15.686649 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10724500/tftp-deploy-q3cl5j3p/ramdisk
1917 12:22:15.691333 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10724500/tftp-deploy-q3cl5j3p/kernel
1918 12:22:15.695226 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10724500/tftp-deploy-q3cl5j3p/modules
1919 12:22:15.696688 start: 5.1 power-off (timeout 00:00:30) [common]
1920 12:22:15.697194 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-7' '--port=1' '--command=off'
1921 12:22:15.781324 >> Command sent successfully.
1922 12:22:15.783838 Returned 0 in 0 seconds
1923 12:22:15.884345 end: 5.1 power-off (duration 00:00:00) [common]
1925 12:22:15.885095 start: 5.2 read-feedback (timeout 00:10:00) [common]
1926 12:22:15.885673 Listened to connection for namespace 'common' for up to 1s
1928 12:22:15.886363 Listened to connection for namespace 'common' for up to 1s
1929 12:22:16.886609 Finalising connection for namespace 'common'
1930 12:22:16.887307 Disconnecting from shell: Finalise
1931 12:22:16.887755
1932 12:22:16.988802 end: 5.2 read-feedback (duration 00:00:01) [common]
1933 12:22:16.989344 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10724500
1934 12:22:17.032335 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10724500
1935 12:22:17.032505 JobError: Your job cannot terminate cleanly.