Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
1 12:15:38.436943 lava-dispatcher, installed at version: 2023.05.1
2 12:15:38.437204 start: 0 validate
3 12:15:38.437384 Start time: 2023-06-14 12:15:38.437376+00:00 (UTC)
4 12:15:38.437541 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:15:38.437746 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230609.0%2Fx86%2Frootfs.cpio.gz exists
6 12:15:38.705680 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:15:38.705877 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.284-cip99-114-g02e97826987bf%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:15:38.964932 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:15:38.965134 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.284-cip99-114-g02e97826987bf%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:15:42.571291 validate duration: 4.13
12 12:15:42.572542 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:15:42.573035 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:15:42.573490 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:15:42.574055 Not decompressing ramdisk as can be used compressed.
16 12:15:42.574518 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230609.0/x86/rootfs.cpio.gz
17 12:15:42.574853 saving as /var/lib/lava/dispatcher/tmp/10724478/tftp-deploy-aphn9vco/ramdisk/rootfs.cpio.gz
18 12:15:42.575161 total size: 8435745 (8MB)
19 12:15:43.233517 progress 0% (0MB)
20 12:15:43.244180 progress 5% (0MB)
21 12:15:43.250194 progress 10% (0MB)
22 12:15:43.255036 progress 15% (1MB)
23 12:15:43.259113 progress 20% (1MB)
24 12:15:43.262685 progress 25% (2MB)
25 12:15:43.265957 progress 30% (2MB)
26 12:15:43.269062 progress 35% (2MB)
27 12:15:43.271660 progress 40% (3MB)
28 12:15:43.274411 progress 45% (3MB)
29 12:15:43.276861 progress 50% (4MB)
30 12:15:43.279311 progress 55% (4MB)
31 12:15:43.281783 progress 60% (4MB)
32 12:15:43.284221 progress 65% (5MB)
33 12:15:43.286752 progress 70% (5MB)
34 12:15:43.289325 progress 75% (6MB)
35 12:15:43.291583 progress 80% (6MB)
36 12:15:43.294032 progress 85% (6MB)
37 12:15:43.296464 progress 90% (7MB)
38 12:15:43.298913 progress 95% (7MB)
39 12:15:43.301383 progress 100% (8MB)
40 12:15:43.301565 8MB downloaded in 0.73s (11.07MB/s)
41 12:15:43.301730 end: 1.1.1 http-download (duration 00:00:01) [common]
43 12:15:43.302012 end: 1.1 download-retry (duration 00:00:01) [common]
44 12:15:43.302108 start: 1.2 download-retry (timeout 00:09:59) [common]
45 12:15:43.302205 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 12:15:43.302345 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.284-cip99-114-g02e97826987bf/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:15:43.302422 saving as /var/lib/lava/dispatcher/tmp/10724478/tftp-deploy-aphn9vco/kernel/bzImage
48 12:15:43.302490 total size: 10863104 (10MB)
49 12:15:43.302558 No compression specified
50 12:15:43.303967 progress 0% (0MB)
51 12:15:43.307252 progress 5% (0MB)
52 12:15:43.310433 progress 10% (1MB)
53 12:15:43.313458 progress 15% (1MB)
54 12:15:43.316690 progress 20% (2MB)
55 12:15:43.319682 progress 25% (2MB)
56 12:15:43.322924 progress 30% (3MB)
57 12:15:43.326153 progress 35% (3MB)
58 12:15:43.329337 progress 40% (4MB)
59 12:15:43.332511 progress 45% (4MB)
60 12:15:43.335488 progress 50% (5MB)
61 12:15:43.338662 progress 55% (5MB)
62 12:15:43.341651 progress 60% (6MB)
63 12:15:43.344789 progress 65% (6MB)
64 12:15:43.347925 progress 70% (7MB)
65 12:15:43.350853 progress 75% (7MB)
66 12:15:43.353986 progress 80% (8MB)
67 12:15:43.356957 progress 85% (8MB)
68 12:15:43.360057 progress 90% (9MB)
69 12:15:43.363006 progress 95% (9MB)
70 12:15:43.366165 progress 100% (10MB)
71 12:15:43.366357 10MB downloaded in 0.06s (162.22MB/s)
72 12:15:43.366513 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:15:43.366766 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:15:43.366865 start: 1.3 download-retry (timeout 00:09:59) [common]
76 12:15:43.366962 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 12:15:43.367102 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.284-cip99-114-g02e97826987bf/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:15:43.367180 saving as /var/lib/lava/dispatcher/tmp/10724478/tftp-deploy-aphn9vco/modules/modules.tar
79 12:15:43.367249 total size: 483752 (0MB)
80 12:15:43.367316 Using unxz to decompress xz
81 12:15:43.495305 progress 6% (0MB)
82 12:15:43.497368 progress 13% (0MB)
83 12:15:43.498677 progress 20% (0MB)
84 12:15:43.505724 progress 27% (0MB)
85 12:15:43.516138 progress 33% (0MB)
86 12:15:43.524583 progress 40% (0MB)
87 12:15:43.529726 progress 47% (0MB)
88 12:15:43.534945 progress 54% (0MB)
89 12:15:43.538955 progress 60% (0MB)
90 12:15:43.542547 progress 67% (0MB)
91 12:15:43.545881 progress 74% (0MB)
92 12:15:43.548970 progress 81% (0MB)
93 12:15:43.551403 progress 88% (0MB)
94 12:15:43.553948 progress 94% (0MB)
95 12:15:43.556076 progress 100% (0MB)
96 12:15:43.562905 0MB downloaded in 0.20s (2.36MB/s)
97 12:15:43.563287 end: 1.3.1 http-download (duration 00:00:00) [common]
99 12:15:43.563581 end: 1.3 download-retry (duration 00:00:00) [common]
100 12:15:43.563682 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
101 12:15:43.563784 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
102 12:15:43.563874 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 12:15:43.563965 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
104 12:15:43.564197 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10724478/lava-overlay-pvprdrfh
105 12:15:43.564351 makedir: /var/lib/lava/dispatcher/tmp/10724478/lava-overlay-pvprdrfh/lava-10724478/bin
106 12:15:43.564469 makedir: /var/lib/lava/dispatcher/tmp/10724478/lava-overlay-pvprdrfh/lava-10724478/tests
107 12:15:43.564574 makedir: /var/lib/lava/dispatcher/tmp/10724478/lava-overlay-pvprdrfh/lava-10724478/results
108 12:15:43.564696 Creating /var/lib/lava/dispatcher/tmp/10724478/lava-overlay-pvprdrfh/lava-10724478/bin/lava-add-keys
109 12:15:43.564857 Creating /var/lib/lava/dispatcher/tmp/10724478/lava-overlay-pvprdrfh/lava-10724478/bin/lava-add-sources
110 12:15:43.564996 Creating /var/lib/lava/dispatcher/tmp/10724478/lava-overlay-pvprdrfh/lava-10724478/bin/lava-background-process-start
111 12:15:43.565132 Creating /var/lib/lava/dispatcher/tmp/10724478/lava-overlay-pvprdrfh/lava-10724478/bin/lava-background-process-stop
112 12:15:43.565263 Creating /var/lib/lava/dispatcher/tmp/10724478/lava-overlay-pvprdrfh/lava-10724478/bin/lava-common-functions
113 12:15:43.565394 Creating /var/lib/lava/dispatcher/tmp/10724478/lava-overlay-pvprdrfh/lava-10724478/bin/lava-echo-ipv4
114 12:15:43.565542 Creating /var/lib/lava/dispatcher/tmp/10724478/lava-overlay-pvprdrfh/lava-10724478/bin/lava-install-packages
115 12:15:43.565683 Creating /var/lib/lava/dispatcher/tmp/10724478/lava-overlay-pvprdrfh/lava-10724478/bin/lava-installed-packages
116 12:15:43.565864 Creating /var/lib/lava/dispatcher/tmp/10724478/lava-overlay-pvprdrfh/lava-10724478/bin/lava-os-build
117 12:15:43.566039 Creating /var/lib/lava/dispatcher/tmp/10724478/lava-overlay-pvprdrfh/lava-10724478/bin/lava-probe-channel
118 12:15:43.566218 Creating /var/lib/lava/dispatcher/tmp/10724478/lava-overlay-pvprdrfh/lava-10724478/bin/lava-probe-ip
119 12:15:43.566394 Creating /var/lib/lava/dispatcher/tmp/10724478/lava-overlay-pvprdrfh/lava-10724478/bin/lava-target-ip
120 12:15:43.566563 Creating /var/lib/lava/dispatcher/tmp/10724478/lava-overlay-pvprdrfh/lava-10724478/bin/lava-target-mac
121 12:15:43.566732 Creating /var/lib/lava/dispatcher/tmp/10724478/lava-overlay-pvprdrfh/lava-10724478/bin/lava-target-storage
122 12:15:43.566905 Creating /var/lib/lava/dispatcher/tmp/10724478/lava-overlay-pvprdrfh/lava-10724478/bin/lava-test-case
123 12:15:43.567074 Creating /var/lib/lava/dispatcher/tmp/10724478/lava-overlay-pvprdrfh/lava-10724478/bin/lava-test-event
124 12:15:43.567243 Creating /var/lib/lava/dispatcher/tmp/10724478/lava-overlay-pvprdrfh/lava-10724478/bin/lava-test-feedback
125 12:15:43.567435 Creating /var/lib/lava/dispatcher/tmp/10724478/lava-overlay-pvprdrfh/lava-10724478/bin/lava-test-raise
126 12:15:43.567571 Creating /var/lib/lava/dispatcher/tmp/10724478/lava-overlay-pvprdrfh/lava-10724478/bin/lava-test-reference
127 12:15:43.567722 Creating /var/lib/lava/dispatcher/tmp/10724478/lava-overlay-pvprdrfh/lava-10724478/bin/lava-test-runner
128 12:15:43.567894 Creating /var/lib/lava/dispatcher/tmp/10724478/lava-overlay-pvprdrfh/lava-10724478/bin/lava-test-set
129 12:15:43.568066 Creating /var/lib/lava/dispatcher/tmp/10724478/lava-overlay-pvprdrfh/lava-10724478/bin/lava-test-shell
130 12:15:43.568239 Updating /var/lib/lava/dispatcher/tmp/10724478/lava-overlay-pvprdrfh/lava-10724478/bin/lava-install-packages (oe)
131 12:15:43.569773 Updating /var/lib/lava/dispatcher/tmp/10724478/lava-overlay-pvprdrfh/lava-10724478/bin/lava-installed-packages (oe)
132 12:15:43.570013 Creating /var/lib/lava/dispatcher/tmp/10724478/lava-overlay-pvprdrfh/lava-10724478/environment
133 12:15:43.570218 LAVA metadata
134 12:15:43.570351 - LAVA_JOB_ID=10724478
135 12:15:43.570464 - LAVA_DISPATCHER_IP=192.168.201.1
136 12:15:43.570617 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
137 12:15:43.570727 skipped lava-vland-overlay
138 12:15:43.570846 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 12:15:43.570979 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
140 12:15:43.571083 skipped lava-multinode-overlay
141 12:15:43.571200 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 12:15:43.571324 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
143 12:15:43.571441 Loading test definitions
144 12:15:43.571581 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
145 12:15:43.571741 Using /lava-10724478 at stage 0
146 12:15:43.572354 uuid=10724478_1.4.2.3.1 testdef=None
147 12:15:43.572455 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 12:15:43.572550 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
149 12:15:43.573138 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 12:15:43.573391 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
152 12:15:43.576061 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 12:15:43.576407 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
155 12:15:43.582594 runner path: /var/lib/lava/dispatcher/tmp/10724478/lava-overlay-pvprdrfh/lava-10724478/0/tests/0_dmesg test_uuid 10724478_1.4.2.3.1
156 12:15:43.582857 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 12:15:43.583116 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
159 12:15:43.583195 Using /lava-10724478 at stage 1
160 12:15:43.583513 uuid=10724478_1.4.2.3.5 testdef=None
161 12:15:43.583610 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 12:15:43.583701 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
163 12:15:43.584233 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 12:15:43.584498 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
166 12:15:43.587523 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 12:15:43.588119 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
169 12:15:43.600906 runner path: /var/lib/lava/dispatcher/tmp/10724478/lava-overlay-pvprdrfh/lava-10724478/1/tests/1_bootrr test_uuid 10724478_1.4.2.3.5
170 12:15:43.601196 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 12:15:43.601739 Creating lava-test-runner.conf files
173 12:15:43.601879 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10724478/lava-overlay-pvprdrfh/lava-10724478/0 for stage 0
174 12:15:43.602016 - 0_dmesg
175 12:15:43.602149 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10724478/lava-overlay-pvprdrfh/lava-10724478/1 for stage 1
176 12:15:43.602290 - 1_bootrr
177 12:15:43.602432 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 12:15:43.602565 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
179 12:15:43.614002 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 12:15:43.614171 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
181 12:15:43.614300 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 12:15:43.614428 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 12:15:43.614555 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
184 12:15:43.893807 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 12:15:43.894202 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
186 12:15:43.894334 extracting modules file /var/lib/lava/dispatcher/tmp/10724478/tftp-deploy-aphn9vco/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10724478/extract-overlay-ramdisk-rv4c6jsr/ramdisk
187 12:15:43.917234 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 12:15:43.917391 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
189 12:15:43.917513 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10724478/compress-overlay-q4ry0f77/overlay-1.4.2.4.tar.gz to ramdisk
190 12:15:43.917596 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10724478/compress-overlay-q4ry0f77/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10724478/extract-overlay-ramdisk-rv4c6jsr/ramdisk
191 12:15:43.928571 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 12:15:43.928704 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
193 12:15:43.928803 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 12:15:43.928901 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
195 12:15:43.928989 Building ramdisk /var/lib/lava/dispatcher/tmp/10724478/extract-overlay-ramdisk-rv4c6jsr/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10724478/extract-overlay-ramdisk-rv4c6jsr/ramdisk
196 12:15:44.170798 >> 53980 blocks
197 12:15:45.186117 rename /var/lib/lava/dispatcher/tmp/10724478/extract-overlay-ramdisk-rv4c6jsr/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10724478/tftp-deploy-aphn9vco/ramdisk/ramdisk.cpio.gz
198 12:15:45.186558 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 12:15:45.186694 start: 1.4.8 prepare-kernel (timeout 00:09:57) [common]
200 12:15:45.186808 start: 1.4.8.1 prepare-fit (timeout 00:09:57) [common]
201 12:15:45.186919 No mkimage arch provided, not using FIT.
202 12:15:45.187019 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 12:15:45.187111 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 12:15:45.187227 end: 1.4 prepare-tftp-overlay (duration 00:00:02) [common]
205 12:15:45.187333 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:57) [common]
206 12:15:45.187423 No LXC device requested
207 12:15:45.187510 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 12:15:45.187618 start: 1.6 deploy-device-env (timeout 00:09:57) [common]
209 12:15:45.187712 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 12:15:45.187798 Checking files for TFTP limit of 4294967296 bytes.
211 12:15:45.188247 end: 1 tftp-deploy (duration 00:00:03) [common]
212 12:15:45.188369 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 12:15:45.188467 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 12:15:45.188596 substitutions:
215 12:15:45.188671 - {DTB}: None
216 12:15:45.188741 - {INITRD}: 10724478/tftp-deploy-aphn9vco/ramdisk/ramdisk.cpio.gz
217 12:15:45.188807 - {KERNEL}: 10724478/tftp-deploy-aphn9vco/kernel/bzImage
218 12:15:45.188871 - {LAVA_MAC}: None
219 12:15:45.188934 - {PRESEED_CONFIG}: None
220 12:15:45.188996 - {PRESEED_LOCAL}: None
221 12:15:45.189057 - {RAMDISK}: 10724478/tftp-deploy-aphn9vco/ramdisk/ramdisk.cpio.gz
222 12:15:45.189118 - {ROOT_PART}: None
223 12:15:45.189179 - {ROOT}: None
224 12:15:45.189240 - {SERVER_IP}: 192.168.201.1
225 12:15:45.189301 - {TEE}: None
226 12:15:45.189362 Parsed boot commands:
227 12:15:45.189421 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 12:15:45.189602 Parsed boot commands: tftpboot 192.168.201.1 10724478/tftp-deploy-aphn9vco/kernel/bzImage 10724478/tftp-deploy-aphn9vco/kernel/cmdline 10724478/tftp-deploy-aphn9vco/ramdisk/ramdisk.cpio.gz
229 12:15:45.189700 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 12:15:45.189795 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 12:15:45.189894 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 12:15:45.189984 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 12:15:45.190059 Not connected, no need to disconnect.
234 12:15:45.190141 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 12:15:45.190230 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 12:15:45.190301 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-4'
237 12:15:45.193934 Setting prompt string to ['lava-test: # ']
238 12:15:45.194326 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 12:15:45.194450 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 12:15:45.194561 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 12:15:45.194658 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 12:15:45.194878 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-4' '--port=1' '--command=reboot'
243 12:15:50.345534 >> Command sent successfully.
244 12:15:50.355033 Returned 0 in 5 seconds
245 12:15:50.456162 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 12:15:50.457500 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 12:15:50.457988 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 12:15:50.458415 Setting prompt string to 'Starting depthcharge on Voema...'
250 12:15:50.458761 Changing prompt to 'Starting depthcharge on Voema...'
251 12:15:50.459082 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
252 12:15:50.460134 [Enter `^Ec?' for help]
253 12:15:52.051391
254 12:15:52.052185
255 12:15:52.060733 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
256 12:15:52.067142 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
257 12:15:52.071029 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
258 12:15:52.074205 CPU: AES supported, TXT NOT supported, VT supported
259 12:15:52.080402 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
260 12:15:52.086982 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
261 12:15:52.090366 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
262 12:15:52.094025 VBOOT: Loading verstage.
263 12:15:52.100609 FMAP: Found "FLASH" version 1.1 at 0x1804000.
264 12:15:52.103694 FMAP: base = 0x0 size = 0x2000000 #areas = 32
265 12:15:52.110262 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
266 12:15:52.117305 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
267 12:15:52.123841 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
268 12:15:52.127493
269 12:15:52.128026
270 12:15:52.136761 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
271 12:15:52.151415 Probing TPM: . done!
272 12:15:52.155112 TPM ready after 0 ms
273 12:15:52.158482 Connected to device vid:did:rid of 1ae0:0028:00
274 12:15:52.169558 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
275 12:15:52.176541 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
276 12:15:52.179854 Initialized TPM device CR50 revision 0
277 12:15:52.230425 tlcl_send_startup: Startup return code is 0
278 12:15:52.230971 TPM: setup succeeded
279 12:15:52.245452 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
280 12:15:52.259912 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
281 12:15:52.272583 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
282 12:15:52.282089 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
283 12:15:52.286608 Chrome EC: UHEPI supported
284 12:15:52.289603 Phase 1
285 12:15:52.293284 FMAP: area GBB found @ 1805000 (458752 bytes)
286 12:15:52.302781 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
287 12:15:52.309949 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
288 12:15:52.316163 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
289 12:15:52.322743 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
290 12:15:52.325930 Recovery requested (1009000e)
291 12:15:52.329280 TPM: Extending digest for VBOOT: boot mode into PCR 0
292 12:15:52.340827 tlcl_extend: response is 0
293 12:15:52.347786 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
294 12:15:52.357491 tlcl_extend: response is 0
295 12:15:52.364233 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
296 12:15:52.371066 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
297 12:15:52.377435 BS: verstage times (exec / console): total (unknown) / 142 ms
298 12:15:52.377575
299 12:15:52.377668
300 12:15:52.390740 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
301 12:15:52.397694 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
302 12:15:52.400755 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
303 12:15:52.403995 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
304 12:15:52.410778 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
305 12:15:52.414110 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
306 12:15:52.417262 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
307 12:15:52.420242 TCO_STS: 0000 0000
308 12:15:52.424137 GEN_PMCON: d0015038 00002200
309 12:15:52.427127 GBLRST_CAUSE: 00000000 00000000
310 12:15:52.427518 HPR_CAUSE0: 00000000
311 12:15:52.430540 prev_sleep_state 5
312 12:15:52.433634 Boot Count incremented to 26372
313 12:15:52.440440 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
314 12:15:52.447055 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
315 12:15:52.454401 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
316 12:15:52.460831 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
317 12:15:52.464896 Chrome EC: UHEPI supported
318 12:15:52.472118 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
319 12:15:52.484552 Probing TPM: done!
320 12:15:52.492624 Connected to device vid:did:rid of 1ae0:0028:00
321 12:15:52.503093 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
322 12:15:52.509513 Initialized TPM device CR50 revision 0
323 12:15:52.522674 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
324 12:15:52.526401 MRC: Hash idx 0x100b comparison successful.
325 12:15:52.529495 MRC cache found, size faa8
326 12:15:52.529890 bootmode is set to: 2
327 12:15:52.532736 SPD index = 0
328 12:15:52.539287 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
329 12:15:52.542432 SPD: module type is LPDDR4X
330 12:15:52.545919 SPD: module part number is MT53E512M64D4NW-046
331 12:15:52.552861 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
332 12:15:52.556118 SPD: device width 16 bits, bus width 16 bits
333 12:15:52.562641 SPD: module size is 1024 MB (per channel)
334 12:15:52.994920 CBMEM:
335 12:15:52.998406 IMD: root @ 0x76fff000 254 entries.
336 12:15:53.001512 IMD: root @ 0x76ffec00 62 entries.
337 12:15:53.004734 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
338 12:15:53.011721 FMAP: area RW_VPD found @ f35000 (8192 bytes)
339 12:15:53.015142 External stage cache:
340 12:15:53.017980 IMD: root @ 0x7b3ff000 254 entries.
341 12:15:53.021555 IMD: root @ 0x7b3fec00 62 entries.
342 12:15:53.036589 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
343 12:15:53.043008 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
344 12:15:53.049904 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
345 12:15:53.063929 MRC: 'RECOVERY_MRC_CACHE' does not need update.
346 12:15:53.071335 cse_lite: Skip switching to RW in the recovery path
347 12:15:53.071865 8 DIMMs found
348 12:15:53.072362 SMM Memory Map
349 12:15:53.074969 SMRAM : 0x7b000000 0x800000
350 12:15:53.078149 Subregion 0: 0x7b000000 0x200000
351 12:15:53.081362 Subregion 1: 0x7b200000 0x200000
352 12:15:53.084592 Subregion 2: 0x7b400000 0x400000
353 12:15:53.087765 top_of_ram = 0x77000000
354 12:15:53.094467 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
355 12:15:53.098244 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
356 12:15:53.104679 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
357 12:15:53.107756 MTRR Range: Start=ff000000 End=0 (Size 1000000)
358 12:15:53.117899 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
359 12:15:53.124117 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
360 12:15:53.134133 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
361 12:15:53.137308 Processing 211 relocs. Offset value of 0x74c0b000
362 12:15:53.146409 BS: romstage times (exec / console): total (unknown) / 277 ms
363 12:15:53.152205
364 12:15:53.152404
365 12:15:53.162342 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
366 12:15:53.165623 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
367 12:15:53.175343 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
368 12:15:53.182548 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
369 12:15:53.189342 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
370 12:15:53.195805 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
371 12:15:53.242769 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
372 12:15:53.249496 Processing 5008 relocs. Offset value of 0x75d98000
373 12:15:53.252547 BS: postcar times (exec / console): total (unknown) / 59 ms
374 12:15:53.255634
375 12:15:53.255729
376 12:15:53.265968 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
377 12:15:53.266073 Normal boot
378 12:15:53.269459 FW_CONFIG value is 0x804c02
379 12:15:53.272791 PCI: 00:07.0 disabled by fw_config
380 12:15:53.276034 PCI: 00:07.1 disabled by fw_config
381 12:15:53.279454 PCI: 00:0d.2 disabled by fw_config
382 12:15:53.282841 PCI: 00:1c.7 disabled by fw_config
383 12:15:53.289259 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
384 12:15:53.295637 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
385 12:15:53.298967 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
386 12:15:53.302728 GENERIC: 0.0 disabled by fw_config
387 12:15:53.309047 GENERIC: 1.0 disabled by fw_config
388 12:15:53.312361 fw_config match found: DB_USB=USB3_ACTIVE
389 12:15:53.315776 fw_config match found: DB_USB=USB3_ACTIVE
390 12:15:53.319387 fw_config match found: DB_USB=USB3_ACTIVE
391 12:15:53.325668 fw_config match found: DB_USB=USB3_ACTIVE
392 12:15:53.328939 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
393 12:15:53.335843 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
394 12:15:53.345793 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
395 12:15:53.352113 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
396 12:15:53.355616 microcode: sig=0x806c1 pf=0x80 revision=0x86
397 12:15:53.361961 microcode: Update skipped, already up-to-date
398 12:15:53.369035 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
399 12:15:53.396710 Detected 4 core, 8 thread CPU.
400 12:15:53.399906 Setting up SMI for CPU
401 12:15:53.403296 IED base = 0x7b400000
402 12:15:53.403665 IED size = 0x00400000
403 12:15:53.406615 Will perform SMM setup.
404 12:15:53.412852 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
405 12:15:53.419855 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
406 12:15:53.426171 Processing 16 relocs. Offset value of 0x00030000
407 12:15:53.429422 Attempting to start 7 APs
408 12:15:53.432641 Waiting for 10ms after sending INIT.
409 12:15:53.448539 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
410 12:15:53.448940 done.
411 12:15:53.451665 AP: slot 5 apic_id 4.
412 12:15:53.455021 AP: slot 4 apic_id 5.
413 12:15:53.455508 AP: slot 7 apic_id 6.
414 12:15:53.458144 AP: slot 3 apic_id 7.
415 12:15:53.461993 AP: slot 6 apic_id 2.
416 12:15:53.462507 AP: slot 2 apic_id 3.
417 12:15:53.468119 Waiting for 2nd SIPI to complete...done.
418 12:15:53.475155 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
419 12:15:53.481477 Processing 13 relocs. Offset value of 0x00038000
420 12:15:53.481959 Unable to locate Global NVS
421 12:15:53.491856 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
422 12:15:53.495110 Installing permanent SMM handler to 0x7b000000
423 12:15:53.504799 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
424 12:15:53.508244 Processing 794 relocs. Offset value of 0x7b010000
425 12:15:53.518350 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
426 12:15:53.521716 Processing 13 relocs. Offset value of 0x7b008000
427 12:15:53.527961 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
428 12:15:53.535182 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
429 12:15:53.538379 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
430 12:15:53.544730 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
431 12:15:53.551738 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
432 12:15:53.558142 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
433 12:15:53.564791 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
434 12:15:53.565193 Unable to locate Global NVS
435 12:15:53.574909 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
436 12:15:53.577971 Clearing SMI status registers
437 12:15:53.578364 SMI_STS: PM1
438 12:15:53.581602 PM1_STS: PWRBTN
439 12:15:53.587901 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
440 12:15:53.591074 In relocation handler: CPU 0
441 12:15:53.594295 New SMBASE=0x7b000000 IEDBASE=0x7b400000
442 12:15:53.600824 Writing SMRR. base = 0x7b000006, mask=0xff800c00
443 12:15:53.601254 Relocation complete.
444 12:15:53.611103 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
445 12:15:53.611511 In relocation handler: CPU 1
446 12:15:53.617690 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
447 12:15:53.618085 Relocation complete.
448 12:15:53.628022 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
449 12:15:53.628441 In relocation handler: CPU 3
450 12:15:53.634461 New SMBASE=0x7afff400 IEDBASE=0x7b400000
451 12:15:53.634850 Relocation complete.
452 12:15:53.644360 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
453 12:15:53.644762 In relocation handler: CPU 7
454 12:15:53.650953 New SMBASE=0x7affe400 IEDBASE=0x7b400000
455 12:15:53.654196 Writing SMRR. base = 0x7b000006, mask=0xff800c00
456 12:15:53.657443 Relocation complete.
457 12:15:53.663932 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
458 12:15:53.667196 In relocation handler: CPU 5
459 12:15:53.670794 New SMBASE=0x7affec00 IEDBASE=0x7b400000
460 12:15:53.677424 Writing SMRR. base = 0x7b000006, mask=0xff800c00
461 12:15:53.677868 Relocation complete.
462 12:15:53.684223 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
463 12:15:53.687343 In relocation handler: CPU 4
464 12:15:53.694215 New SMBASE=0x7afff000 IEDBASE=0x7b400000
465 12:15:53.694738 Relocation complete.
466 12:15:53.700831 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
467 12:15:53.704158 In relocation handler: CPU 6
468 12:15:53.707598 New SMBASE=0x7affe800 IEDBASE=0x7b400000
469 12:15:53.714077 Writing SMRR. base = 0x7b000006, mask=0xff800c00
470 12:15:53.717224 Relocation complete.
471 12:15:53.723956 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
472 12:15:53.726957 In relocation handler: CPU 2
473 12:15:53.730474 New SMBASE=0x7afff800 IEDBASE=0x7b400000
474 12:15:53.733648 Relocation complete.
475 12:15:53.733931 Initializing CPU #0
476 12:15:53.737575 CPU: vendor Intel device 806c1
477 12:15:53.740703 CPU: family 06, model 8c, stepping 01
478 12:15:53.743976 Clearing out pending MCEs
479 12:15:53.747893 Setting up local APIC...
480 12:15:53.748139 apic_id: 0x00 done.
481 12:15:53.751138 Turbo is available but hidden
482 12:15:53.754199 Turbo is available and visible
483 12:15:53.760459 microcode: Update skipped, already up-to-date
484 12:15:53.760552 CPU #0 initialized
485 12:15:53.764261 Initializing CPU #2
486 12:15:53.767543 Initializing CPU #1
487 12:15:53.767636 Initializing CPU #4
488 12:15:53.770800 Initializing CPU #5
489 12:15:53.774085 CPU: vendor Intel device 806c1
490 12:15:53.777232 CPU: family 06, model 8c, stepping 01
491 12:15:53.780849 CPU: vendor Intel device 806c1
492 12:15:53.783953 CPU: family 06, model 8c, stepping 01
493 12:15:53.787131 Clearing out pending MCEs
494 12:15:53.790941 Clearing out pending MCEs
495 12:15:53.791035 Setting up local APIC...
496 12:15:53.794128 Initializing CPU #3
497 12:15:53.797254 CPU: vendor Intel device 806c1
498 12:15:53.800432 CPU: family 06, model 8c, stepping 01
499 12:15:53.803681 Initializing CPU #6
500 12:15:53.803778 Clearing out pending MCEs
501 12:15:53.807012 CPU: vendor Intel device 806c1
502 12:15:53.814213 CPU: family 06, model 8c, stepping 01
503 12:15:53.814318 Setting up local APIC...
504 12:15:53.817535 Initializing CPU #7
505 12:15:53.820709 CPU: vendor Intel device 806c1
506 12:15:53.823946 CPU: family 06, model 8c, stepping 01
507 12:15:53.827187 CPU: vendor Intel device 806c1
508 12:15:53.830195 CPU: family 06, model 8c, stepping 01
509 12:15:53.833581 Clearing out pending MCEs
510 12:15:53.836834 Clearing out pending MCEs
511 12:15:53.836983 Setting up local APIC...
512 12:15:53.840884 apic_id: 0x03 done.
513 12:15:53.843989 Clearing out pending MCEs
514 12:15:53.847112 microcode: Update skipped, already up-to-date
515 12:15:53.850604 Setting up local APIC...
516 12:15:53.854210 CPU: vendor Intel device 806c1
517 12:15:53.857190 CPU: family 06, model 8c, stepping 01
518 12:15:53.860427 apic_id: 0x07 done.
519 12:15:53.864447 Setting up local APIC...
520 12:15:53.864942 CPU #2 initialized
521 12:15:53.867837 apic_id: 0x02 done.
522 12:15:53.868431 apic_id: 0x06 done.
523 12:15:53.874282 microcode: Update skipped, already up-to-date
524 12:15:53.877352 microcode: Update skipped, already up-to-date
525 12:15:53.880861 CPU #3 initialized
526 12:15:53.881388 CPU #7 initialized
527 12:15:53.884208 Clearing out pending MCEs
528 12:15:53.887221 Setting up local APIC...
529 12:15:53.890567 microcode: Update skipped, already up-to-date
530 12:15:53.894128 Setting up local APIC...
531 12:15:53.897244 CPU #6 initialized
532 12:15:53.897673 apic_id: 0x05 done.
533 12:15:53.900379 apic_id: 0x04 done.
534 12:15:53.904261 microcode: Update skipped, already up-to-date
535 12:15:53.910386 microcode: Update skipped, already up-to-date
536 12:15:53.910822 apic_id: 0x01 done.
537 12:15:53.913667 CPU #4 initialized
538 12:15:53.916944 CPU #5 initialized
539 12:15:53.920468 microcode: Update skipped, already up-to-date
540 12:15:53.923288 CPU #1 initialized
541 12:15:53.926630 bsp_do_flight_plan done after 455 msecs.
542 12:15:53.930418 CPU: frequency set to 4000 MHz
543 12:15:53.930994 Enabling SMIs.
544 12:15:53.936509 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
545 12:15:53.953208 SATAXPCIE1 indicates PCIe NVMe is present
546 12:15:53.956637 Probing TPM: done!
547 12:15:53.959832 Connected to device vid:did:rid of 1ae0:0028:00
548 12:15:53.971149 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
549 12:15:53.974821 Initialized TPM device CR50 revision 0
550 12:15:53.978067 Enabling S0i3.4
551 12:15:53.984413 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
552 12:15:53.987715 Found a VBT of 8704 bytes after decompression
553 12:15:53.994694 cse_lite: CSE RO boot. HybridStorageMode disabled
554 12:15:54.000590 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
555 12:15:54.076721 FSPS returned 0
556 12:15:54.079909 Executing Phase 1 of FspMultiPhaseSiInit
557 12:15:54.090264 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
558 12:15:54.093574 port C0 DISC req: usage 1 usb3 1 usb2 5
559 12:15:54.096716 Raw Buffer output 0 00000511
560 12:15:54.099844 Raw Buffer output 1 00000000
561 12:15:54.103485 pmc_send_ipc_cmd succeeded
562 12:15:54.110736 port C1 DISC req: usage 1 usb3 2 usb2 3
563 12:15:54.111340 Raw Buffer output 0 00000321
564 12:15:54.113760 Raw Buffer output 1 00000000
565 12:15:54.117959 pmc_send_ipc_cmd succeeded
566 12:15:54.122879 Detected 4 core, 8 thread CPU.
567 12:15:54.126516 Detected 4 core, 8 thread CPU.
568 12:15:54.360108 Display FSP Version Info HOB
569 12:15:54.363314 Reference Code - CPU = a.0.4c.31
570 12:15:54.366460 uCode Version = 0.0.0.86
571 12:15:54.370299 TXT ACM version = ff.ff.ff.ffff
572 12:15:54.373560 Reference Code - ME = a.0.4c.31
573 12:15:54.376827 MEBx version = 0.0.0.0
574 12:15:54.380067 ME Firmware Version = Consumer SKU
575 12:15:54.383264 Reference Code - PCH = a.0.4c.31
576 12:15:54.386304 PCH-CRID Status = Disabled
577 12:15:54.390301 PCH-CRID Original Value = ff.ff.ff.ffff
578 12:15:54.393434 PCH-CRID New Value = ff.ff.ff.ffff
579 12:15:54.396680 OPROM - RST - RAID = ff.ff.ff.ffff
580 12:15:54.399983 PCH Hsio Version = 4.0.0.0
581 12:15:54.403264 Reference Code - SA - System Agent = a.0.4c.31
582 12:15:54.406411 Reference Code - MRC = 2.0.0.1
583 12:15:54.409766 SA - PCIe Version = a.0.4c.31
584 12:15:54.413141 SA-CRID Status = Disabled
585 12:15:54.416240 SA-CRID Original Value = 0.0.0.1
586 12:15:54.420172 SA-CRID New Value = 0.0.0.1
587 12:15:54.423383 OPROM - VBIOS = ff.ff.ff.ffff
588 12:15:54.426636 IO Manageability Engine FW Version = 11.1.4.0
589 12:15:54.429740 PHY Build Version = 0.0.0.e0
590 12:15:54.433421 Thunderbolt(TM) FW Version = 0.0.0.0
591 12:15:54.439961 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
592 12:15:54.443174 ITSS IRQ Polarities Before:
593 12:15:54.443272 IPC0: 0xffffffff
594 12:15:54.446363 IPC1: 0xffffffff
595 12:15:54.446457 IPC2: 0xffffffff
596 12:15:54.449859 IPC3: 0xffffffff
597 12:15:54.453026 ITSS IRQ Polarities After:
598 12:15:54.453119 IPC0: 0xffffffff
599 12:15:54.456185 IPC1: 0xffffffff
600 12:15:54.456325 IPC2: 0xffffffff
601 12:15:54.459544 IPC3: 0xffffffff
602 12:15:54.462781 Found PCIe Root Port #9 at PCI: 00:1d.0.
603 12:15:54.476021 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
604 12:15:54.485957 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
605 12:15:54.499537 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
606 12:15:54.506018 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
607 12:15:54.509300 Enumerating buses...
608 12:15:54.512397 Show all devs... Before device enumeration.
609 12:15:54.516258 Root Device: enabled 1
610 12:15:54.516366 DOMAIN: 0000: enabled 1
611 12:15:54.519533 CPU_CLUSTER: 0: enabled 1
612 12:15:54.522798 PCI: 00:00.0: enabled 1
613 12:15:54.525987 PCI: 00:02.0: enabled 1
614 12:15:54.526082 PCI: 00:04.0: enabled 1
615 12:15:54.529197 PCI: 00:05.0: enabled 1
616 12:15:54.532370 PCI: 00:06.0: enabled 0
617 12:15:54.532464 PCI: 00:07.0: enabled 0
618 12:15:54.536186 PCI: 00:07.1: enabled 0
619 12:15:54.539214 PCI: 00:07.2: enabled 0
620 12:15:54.542373 PCI: 00:07.3: enabled 0
621 12:15:54.542457 PCI: 00:08.0: enabled 1
622 12:15:54.545916 PCI: 00:09.0: enabled 0
623 12:15:54.549606 PCI: 00:0a.0: enabled 0
624 12:15:54.552544 PCI: 00:0d.0: enabled 1
625 12:15:54.552626 PCI: 00:0d.1: enabled 0
626 12:15:54.555565 PCI: 00:0d.2: enabled 0
627 12:15:54.559272 PCI: 00:0d.3: enabled 0
628 12:15:54.562366 PCI: 00:0e.0: enabled 0
629 12:15:54.562451 PCI: 00:10.2: enabled 1
630 12:15:54.565596 PCI: 00:10.6: enabled 0
631 12:15:54.568993 PCI: 00:10.7: enabled 0
632 12:15:54.572218 PCI: 00:12.0: enabled 0
633 12:15:54.572333 PCI: 00:12.6: enabled 0
634 12:15:54.575373 PCI: 00:13.0: enabled 0
635 12:15:54.579205 PCI: 00:14.0: enabled 1
636 12:15:54.579286 PCI: 00:14.1: enabled 0
637 12:15:54.582226 PCI: 00:14.2: enabled 1
638 12:15:54.585443 PCI: 00:14.3: enabled 1
639 12:15:54.588759 PCI: 00:15.0: enabled 1
640 12:15:54.588851 PCI: 00:15.1: enabled 1
641 12:15:54.592632 PCI: 00:15.2: enabled 1
642 12:15:54.595710 PCI: 00:15.3: enabled 1
643 12:15:54.598933 PCI: 00:16.0: enabled 1
644 12:15:54.599016 PCI: 00:16.1: enabled 0
645 12:15:54.602298 PCI: 00:16.2: enabled 0
646 12:15:54.605582 PCI: 00:16.3: enabled 0
647 12:15:54.608813 PCI: 00:16.4: enabled 0
648 12:15:54.608904 PCI: 00:16.5: enabled 0
649 12:15:54.611867 PCI: 00:17.0: enabled 1
650 12:15:54.615355 PCI: 00:19.0: enabled 0
651 12:15:54.618659 PCI: 00:19.1: enabled 1
652 12:15:54.618751 PCI: 00:19.2: enabled 0
653 12:15:54.622404 PCI: 00:1c.0: enabled 1
654 12:15:54.625472 PCI: 00:1c.1: enabled 0
655 12:15:54.625557 PCI: 00:1c.2: enabled 0
656 12:15:54.628741 PCI: 00:1c.3: enabled 0
657 12:15:54.632034 PCI: 00:1c.4: enabled 0
658 12:15:54.635331 PCI: 00:1c.5: enabled 0
659 12:15:54.635410 PCI: 00:1c.6: enabled 1
660 12:15:54.638667 PCI: 00:1c.7: enabled 0
661 12:15:54.641702 PCI: 00:1d.0: enabled 1
662 12:15:54.645531 PCI: 00:1d.1: enabled 0
663 12:15:54.645613 PCI: 00:1d.2: enabled 1
664 12:15:54.648896 PCI: 00:1d.3: enabled 0
665 12:15:54.652035 PCI: 00:1e.0: enabled 1
666 12:15:54.655714 PCI: 00:1e.1: enabled 0
667 12:15:54.655807 PCI: 00:1e.2: enabled 1
668 12:15:54.658568 PCI: 00:1e.3: enabled 1
669 12:15:54.662265 PCI: 00:1f.0: enabled 1
670 12:15:54.662359 PCI: 00:1f.1: enabled 0
671 12:15:54.665362 PCI: 00:1f.2: enabled 1
672 12:15:54.668530 PCI: 00:1f.3: enabled 1
673 12:15:54.672133 PCI: 00:1f.4: enabled 0
674 12:15:54.672225 PCI: 00:1f.5: enabled 1
675 12:15:54.675437 PCI: 00:1f.6: enabled 0
676 12:15:54.678612 PCI: 00:1f.7: enabled 0
677 12:15:54.682298 APIC: 00: enabled 1
678 12:15:54.682390 GENERIC: 0.0: enabled 1
679 12:15:54.685330 GENERIC: 0.0: enabled 1
680 12:15:54.688775 GENERIC: 1.0: enabled 1
681 12:15:54.688875 GENERIC: 0.0: enabled 1
682 12:15:54.691958 GENERIC: 1.0: enabled 1
683 12:15:54.695143 USB0 port 0: enabled 1
684 12:15:54.698345 GENERIC: 0.0: enabled 1
685 12:15:54.698445 USB0 port 0: enabled 1
686 12:15:54.701909 GENERIC: 0.0: enabled 1
687 12:15:54.705131 I2C: 00:1a: enabled 1
688 12:15:54.705223 I2C: 00:31: enabled 1
689 12:15:54.708545 I2C: 00:32: enabled 1
690 12:15:54.712243 I2C: 00:10: enabled 1
691 12:15:54.712343 I2C: 00:15: enabled 1
692 12:15:54.715602 GENERIC: 0.0: enabled 0
693 12:15:54.718830 GENERIC: 1.0: enabled 0
694 12:15:54.722153 GENERIC: 0.0: enabled 1
695 12:15:54.722246 SPI: 00: enabled 1
696 12:15:54.725297 SPI: 00: enabled 1
697 12:15:54.728373 PNP: 0c09.0: enabled 1
698 12:15:54.728459 GENERIC: 0.0: enabled 1
699 12:15:54.731578 USB3 port 0: enabled 1
700 12:15:54.735416 USB3 port 1: enabled 1
701 12:15:54.735509 USB3 port 2: enabled 0
702 12:15:54.738787 USB3 port 3: enabled 0
703 12:15:54.742026 USB2 port 0: enabled 0
704 12:15:54.745245 USB2 port 1: enabled 1
705 12:15:54.745338 USB2 port 2: enabled 1
706 12:15:54.748530 USB2 port 3: enabled 0
707 12:15:54.751674 USB2 port 4: enabled 1
708 12:15:54.751756 USB2 port 5: enabled 0
709 12:15:54.755083 USB2 port 6: enabled 0
710 12:15:54.758254 USB2 port 7: enabled 0
711 12:15:54.758338 USB2 port 8: enabled 0
712 12:15:54.761952 USB2 port 9: enabled 0
713 12:15:54.764985 USB3 port 0: enabled 0
714 12:15:54.768128 USB3 port 1: enabled 1
715 12:15:54.768222 USB3 port 2: enabled 0
716 12:15:54.771831 USB3 port 3: enabled 0
717 12:15:54.774885 GENERIC: 0.0: enabled 1
718 12:15:54.774978 GENERIC: 1.0: enabled 1
719 12:15:54.778436 APIC: 01: enabled 1
720 12:15:54.781606 APIC: 03: enabled 1
721 12:15:54.781700 APIC: 07: enabled 1
722 12:15:54.785085 APIC: 05: enabled 1
723 12:15:54.788177 APIC: 04: enabled 1
724 12:15:54.788271 APIC: 02: enabled 1
725 12:15:54.791717 APIC: 06: enabled 1
726 12:15:54.791809 Compare with tree...
727 12:15:54.794785 Root Device: enabled 1
728 12:15:54.798046 DOMAIN: 0000: enabled 1
729 12:15:54.801839 PCI: 00:00.0: enabled 1
730 12:15:54.801931 PCI: 00:02.0: enabled 1
731 12:15:54.804973 PCI: 00:04.0: enabled 1
732 12:15:54.808035 GENERIC: 0.0: enabled 1
733 12:15:54.811896 PCI: 00:05.0: enabled 1
734 12:15:54.815155 PCI: 00:06.0: enabled 0
735 12:15:54.815248 PCI: 00:07.0: enabled 0
736 12:15:54.818373 GENERIC: 0.0: enabled 1
737 12:15:54.821604 PCI: 00:07.1: enabled 0
738 12:15:54.824812 GENERIC: 1.0: enabled 1
739 12:15:54.828132 PCI: 00:07.2: enabled 0
740 12:15:54.831314 GENERIC: 0.0: enabled 1
741 12:15:54.831406 PCI: 00:07.3: enabled 0
742 12:15:54.835139 GENERIC: 1.0: enabled 1
743 12:15:54.838381 PCI: 00:08.0: enabled 1
744 12:15:54.841624 PCI: 00:09.0: enabled 0
745 12:15:54.844990 PCI: 00:0a.0: enabled 0
746 12:15:54.845082 PCI: 00:0d.0: enabled 1
747 12:15:54.848202 USB0 port 0: enabled 1
748 12:15:54.851308 USB3 port 0: enabled 1
749 12:15:54.854569 USB3 port 1: enabled 1
750 12:15:54.857845 USB3 port 2: enabled 0
751 12:15:54.857937 USB3 port 3: enabled 0
752 12:15:54.861108 PCI: 00:0d.1: enabled 0
753 12:15:54.865096 PCI: 00:0d.2: enabled 0
754 12:15:54.868248 GENERIC: 0.0: enabled 1
755 12:15:54.871418 PCI: 00:0d.3: enabled 0
756 12:15:54.871510 PCI: 00:0e.0: enabled 0
757 12:15:54.874558 PCI: 00:10.2: enabled 1
758 12:15:54.878337 PCI: 00:10.6: enabled 0
759 12:15:54.881525 PCI: 00:10.7: enabled 0
760 12:15:54.884572 PCI: 00:12.0: enabled 0
761 12:15:54.884665 PCI: 00:12.6: enabled 0
762 12:15:54.887619 PCI: 00:13.0: enabled 0
763 12:15:54.891314 PCI: 00:14.0: enabled 1
764 12:15:54.894460 USB0 port 0: enabled 1
765 12:15:54.898155 USB2 port 0: enabled 0
766 12:15:54.898247 USB2 port 1: enabled 1
767 12:15:54.901303 USB2 port 2: enabled 1
768 12:15:54.904535 USB2 port 3: enabled 0
769 12:15:54.907840 USB2 port 4: enabled 1
770 12:15:54.910908 USB2 port 5: enabled 0
771 12:15:54.914851 USB2 port 6: enabled 0
772 12:15:54.914943 USB2 port 7: enabled 0
773 12:15:54.917973 USB2 port 8: enabled 0
774 12:15:54.921283 USB2 port 9: enabled 0
775 12:15:54.924517 USB3 port 0: enabled 0
776 12:15:54.927761 USB3 port 1: enabled 1
777 12:15:54.927853 USB3 port 2: enabled 0
778 12:15:54.931007 USB3 port 3: enabled 0
779 12:15:54.934191 PCI: 00:14.1: enabled 0
780 12:15:54.938040 PCI: 00:14.2: enabled 1
781 12:15:54.941167 PCI: 00:14.3: enabled 1
782 12:15:54.944488 GENERIC: 0.0: enabled 1
783 12:15:54.944580 PCI: 00:15.0: enabled 1
784 12:15:54.947804 I2C: 00:1a: enabled 1
785 12:15:54.951134 I2C: 00:31: enabled 1
786 12:15:54.954203 I2C: 00:32: enabled 1
787 12:15:54.954294 PCI: 00:15.1: enabled 1
788 12:15:54.957389 I2C: 00:10: enabled 1
789 12:15:54.961398 PCI: 00:15.2: enabled 1
790 12:15:54.964509 PCI: 00:15.3: enabled 1
791 12:15:54.967599 PCI: 00:16.0: enabled 1
792 12:15:54.967685 PCI: 00:16.1: enabled 0
793 12:15:54.970741 PCI: 00:16.2: enabled 0
794 12:15:54.974099 PCI: 00:16.3: enabled 0
795 12:15:54.977977 PCI: 00:16.4: enabled 0
796 12:15:54.978068 PCI: 00:16.5: enabled 0
797 12:15:54.981061 PCI: 00:17.0: enabled 1
798 12:15:54.984754 PCI: 00:19.0: enabled 0
799 12:15:54.988498 PCI: 00:19.1: enabled 1
800 12:15:54.988617 I2C: 00:15: enabled 1
801 12:15:54.991842 PCI: 00:19.2: enabled 0
802 12:15:54.995364 PCI: 00:1d.0: enabled 1
803 12:15:54.998435 GENERIC: 0.0: enabled 1
804 12:15:55.002159 PCI: 00:1e.0: enabled 1
805 12:15:55.002251 PCI: 00:1e.1: enabled 0
806 12:15:55.005284 PCI: 00:1e.2: enabled 1
807 12:15:55.008695 SPI: 00: enabled 1
808 12:15:55.058187 PCI: 00:1e.3: enabled 1
809 12:15:55.058323 SPI: 00: enabled 1
810 12:15:55.058441 PCI: 00:1f.0: enabled 1
811 12:15:55.058554 PNP: 0c09.0: enabled 1
812 12:15:55.058657 PCI: 00:1f.1: enabled 0
813 12:15:55.058954 PCI: 00:1f.2: enabled 1
814 12:15:55.059075 GENERIC: 0.0: enabled 1
815 12:15:55.059176 GENERIC: 0.0: enabled 1
816 12:15:55.059274 GENERIC: 1.0: enabled 1
817 12:15:55.059370 PCI: 00:1f.3: enabled 1
818 12:15:55.059465 PCI: 00:1f.4: enabled 0
819 12:15:55.059560 PCI: 00:1f.5: enabled 1
820 12:15:55.059654 PCI: 00:1f.6: enabled 0
821 12:15:55.059748 PCI: 00:1f.7: enabled 0
822 12:15:55.059857 CPU_CLUSTER: 0: enabled 1
823 12:15:55.059954 APIC: 00: enabled 1
824 12:15:55.060048 APIC: 01: enabled 1
825 12:15:55.060141 APIC: 03: enabled 1
826 12:15:55.060235 APIC: 07: enabled 1
827 12:15:55.060340 APIC: 05: enabled 1
828 12:15:55.130288 APIC: 04: enabled 1
829 12:15:55.130830 APIC: 02: enabled 1
830 12:15:55.131148 APIC: 06: enabled 1
831 12:15:55.131730 Root Device scanning...
832 12:15:55.132036 scan_static_bus for Root Device
833 12:15:55.132410 DOMAIN: 0000 enabled
834 12:15:55.132731 CPU_CLUSTER: 0 enabled
835 12:15:55.133007 DOMAIN: 0000 scanning...
836 12:15:55.133292 PCI: pci_scan_bus for bus 00
837 12:15:55.133559 PCI: 00:00.0 [8086/0000] ops
838 12:15:55.133825 PCI: 00:00.0 [8086/9a12] enabled
839 12:15:55.134089 PCI: 00:02.0 [8086/0000] bus ops
840 12:15:55.134354 PCI: 00:02.0 [8086/9a40] enabled
841 12:15:55.134615 PCI: 00:04.0 [8086/0000] bus ops
842 12:15:55.134877 PCI: 00:04.0 [8086/9a03] enabled
843 12:15:55.135184 PCI: 00:05.0 [8086/9a19] enabled
844 12:15:55.135449 PCI: 00:07.0 [0000/0000] hidden
845 12:15:55.144183 PCI: 00:08.0 [8086/9a11] enabled
846 12:15:55.144656 PCI: 00:0a.0 [8086/9a0d] disabled
847 12:15:55.144971 PCI: 00:0d.0 [8086/0000] bus ops
848 12:15:55.145266 PCI: 00:0d.0 [8086/9a13] enabled
849 12:15:55.145548 PCI: 00:14.0 [8086/0000] bus ops
850 12:15:55.145825 PCI: 00:14.0 [8086/a0ed] enabled
851 12:15:55.146406 PCI: 00:14.2 [8086/a0ef] enabled
852 12:15:55.146709 PCI: 00:14.3 [8086/0000] bus ops
853 12:15:55.146985 PCI: 00:14.3 [8086/a0f0] enabled
854 12:15:55.147253 PCI: 00:15.0 [8086/0000] bus ops
855 12:15:55.147807 PCI: 00:15.0 [8086/a0e8] enabled
856 12:15:55.151312 PCI: 00:15.1 [8086/0000] bus ops
857 12:15:55.154570 PCI: 00:15.1 [8086/a0e9] enabled
858 12:15:55.157878 PCI: 00:15.2 [8086/0000] bus ops
859 12:15:55.161665 PCI: 00:15.2 [8086/a0ea] enabled
860 12:15:55.164621 PCI: 00:15.3 [8086/0000] bus ops
861 12:15:55.167796 PCI: 00:15.3 [8086/a0eb] enabled
862 12:15:55.168078 PCI: 00:16.0 [8086/0000] ops
863 12:15:55.171058 PCI: 00:16.0 [8086/a0e0] enabled
864 12:15:55.177421 PCI: Static device PCI: 00:17.0 not found, disabling it.
865 12:15:55.181223 PCI: 00:19.0 [8086/0000] bus ops
866 12:15:55.184520 PCI: 00:19.0 [8086/a0c5] disabled
867 12:15:55.187846 PCI: 00:19.1 [8086/0000] bus ops
868 12:15:55.191160 PCI: 00:19.1 [8086/a0c6] enabled
869 12:15:55.194378 PCI: 00:1d.0 [8086/0000] bus ops
870 12:15:55.197556 PCI: 00:1d.0 [8086/a0b0] enabled
871 12:15:55.201161 PCI: 00:1e.0 [8086/0000] ops
872 12:15:55.203982 PCI: 00:1e.0 [8086/a0a8] enabled
873 12:15:55.207505 PCI: 00:1e.2 [8086/0000] bus ops
874 12:15:55.210723 PCI: 00:1e.2 [8086/a0aa] enabled
875 12:15:55.214309 PCI: 00:1e.3 [8086/0000] bus ops
876 12:15:55.217654 PCI: 00:1e.3 [8086/a0ab] enabled
877 12:15:55.221385 PCI: 00:1f.0 [8086/0000] bus ops
878 12:15:55.224462 PCI: 00:1f.0 [8086/a087] enabled
879 12:15:55.227499 RTC Init
880 12:15:55.230855 Set power on after power failure.
881 12:15:55.231026 Disabling Deep S3
882 12:15:55.234143 Disabling Deep S3
883 12:15:55.234320 Disabling Deep S4
884 12:15:55.237245 Disabling Deep S4
885 12:15:55.237356 Disabling Deep S5
886 12:15:55.240448 Disabling Deep S5
887 12:15:55.243686 PCI: 00:1f.2 [0000/0000] hidden
888 12:15:55.247560 PCI: 00:1f.3 [8086/0000] bus ops
889 12:15:55.250746 PCI: 00:1f.3 [8086/a0c8] enabled
890 12:15:55.253973 PCI: 00:1f.5 [8086/0000] bus ops
891 12:15:55.257284 PCI: 00:1f.5 [8086/a0a4] enabled
892 12:15:55.260616 PCI: Leftover static devices:
893 12:15:55.260761 PCI: 00:10.2
894 12:15:55.263891 PCI: 00:10.6
895 12:15:55.264094 PCI: 00:10.7
896 12:15:55.267003 PCI: 00:06.0
897 12:15:55.267167 PCI: 00:07.1
898 12:15:55.267295 PCI: 00:07.2
899 12:15:55.270941 PCI: 00:07.3
900 12:15:55.271219 PCI: 00:09.0
901 12:15:55.273685 PCI: 00:0d.1
902 12:15:55.273878 PCI: 00:0d.2
903 12:15:55.274040 PCI: 00:0d.3
904 12:15:55.277537 PCI: 00:0e.0
905 12:15:55.277764 PCI: 00:12.0
906 12:15:55.280726 PCI: 00:12.6
907 12:15:55.281000 PCI: 00:13.0
908 12:15:55.283831 PCI: 00:14.1
909 12:15:55.284106 PCI: 00:16.1
910 12:15:55.284367 PCI: 00:16.2
911 12:15:55.287453 PCI: 00:16.3
912 12:15:55.287850 PCI: 00:16.4
913 12:15:55.291022 PCI: 00:16.5
914 12:15:55.291506 PCI: 00:17.0
915 12:15:55.291811 PCI: 00:19.2
916 12:15:55.293907 PCI: 00:1e.1
917 12:15:55.294291 PCI: 00:1f.1
918 12:15:55.297784 PCI: 00:1f.4
919 12:15:55.298170 PCI: 00:1f.6
920 12:15:55.298479 PCI: 00:1f.7
921 12:15:55.301100 PCI: Check your devicetree.cb.
922 12:15:55.304108 PCI: 00:02.0 scanning...
923 12:15:55.307284 scan_generic_bus for PCI: 00:02.0
924 12:15:55.310771 scan_generic_bus for PCI: 00:02.0 done
925 12:15:55.317712 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
926 12:15:55.320740 PCI: 00:04.0 scanning...
927 12:15:55.323816 scan_generic_bus for PCI: 00:04.0
928 12:15:55.324201 GENERIC: 0.0 enabled
929 12:15:55.330763 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
930 12:15:55.337588 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
931 12:15:55.338063 PCI: 00:0d.0 scanning...
932 12:15:55.340742 scan_static_bus for PCI: 00:0d.0
933 12:15:55.344127 USB0 port 0 enabled
934 12:15:55.347100 USB0 port 0 scanning...
935 12:15:55.350625 scan_static_bus for USB0 port 0
936 12:15:55.353847 USB3 port 0 enabled
937 12:15:55.354235 USB3 port 1 enabled
938 12:15:55.357016 USB3 port 2 disabled
939 12:15:55.357403 USB3 port 3 disabled
940 12:15:55.360391 USB3 port 0 scanning...
941 12:15:55.363654 scan_static_bus for USB3 port 0
942 12:15:55.367531 scan_static_bus for USB3 port 0 done
943 12:15:55.373781 scan_bus: bus USB3 port 0 finished in 6 msecs
944 12:15:55.374173 USB3 port 1 scanning...
945 12:15:55.377216 scan_static_bus for USB3 port 1
946 12:15:55.383573 scan_static_bus for USB3 port 1 done
947 12:15:55.387367 scan_bus: bus USB3 port 1 finished in 6 msecs
948 12:15:55.390479 scan_static_bus for USB0 port 0 done
949 12:15:55.397167 scan_bus: bus USB0 port 0 finished in 43 msecs
950 12:15:55.400577 scan_static_bus for PCI: 00:0d.0 done
951 12:15:55.403636 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
952 12:15:55.406840 PCI: 00:14.0 scanning...
953 12:15:55.410155 scan_static_bus for PCI: 00:14.0
954 12:15:55.413713 USB0 port 0 enabled
955 12:15:55.414224 USB0 port 0 scanning...
956 12:15:55.417242 scan_static_bus for USB0 port 0
957 12:15:55.420222 USB2 port 0 disabled
958 12:15:55.423792 USB2 port 1 enabled
959 12:15:55.424275 USB2 port 2 enabled
960 12:15:55.426719 USB2 port 3 disabled
961 12:15:55.427060 USB2 port 4 enabled
962 12:15:55.430310 USB2 port 5 disabled
963 12:15:55.433474 USB2 port 6 disabled
964 12:15:55.433878 USB2 port 7 disabled
965 12:15:55.436914 USB2 port 8 disabled
966 12:15:55.440367 USB2 port 9 disabled
967 12:15:55.440736 USB3 port 0 disabled
968 12:15:55.443197 USB3 port 1 enabled
969 12:15:55.446648 USB3 port 2 disabled
970 12:15:55.447022 USB3 port 3 disabled
971 12:15:55.450330 USB2 port 1 scanning...
972 12:15:55.453050 scan_static_bus for USB2 port 1
973 12:15:55.456310 scan_static_bus for USB2 port 1 done
974 12:15:55.463274 scan_bus: bus USB2 port 1 finished in 6 msecs
975 12:15:55.463555 USB2 port 2 scanning...
976 12:15:55.466472 scan_static_bus for USB2 port 2
977 12:15:55.472931 scan_static_bus for USB2 port 2 done
978 12:15:55.476059 scan_bus: bus USB2 port 2 finished in 6 msecs
979 12:15:55.479336 USB2 port 4 scanning...
980 12:15:55.483250 scan_static_bus for USB2 port 4
981 12:15:55.486347 scan_static_bus for USB2 port 4 done
982 12:15:55.489543 scan_bus: bus USB2 port 4 finished in 6 msecs
983 12:15:55.492952 USB3 port 1 scanning...
984 12:15:55.496301 scan_static_bus for USB3 port 1
985 12:15:55.499490 scan_static_bus for USB3 port 1 done
986 12:15:55.502625 scan_bus: bus USB3 port 1 finished in 6 msecs
987 12:15:55.509143 scan_static_bus for USB0 port 0 done
988 12:15:55.512764 scan_bus: bus USB0 port 0 finished in 93 msecs
989 12:15:55.516000 scan_static_bus for PCI: 00:14.0 done
990 12:15:55.523169 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
991 12:15:55.523533 PCI: 00:14.3 scanning...
992 12:15:55.526300 scan_static_bus for PCI: 00:14.3
993 12:15:55.529385 GENERIC: 0.0 enabled
994 12:15:55.532631 scan_static_bus for PCI: 00:14.3 done
995 12:15:55.539506 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
996 12:15:55.539940 PCI: 00:15.0 scanning...
997 12:15:55.546774 scan_static_bus for PCI: 00:15.0
998 12:15:55.547285 I2C: 00:1a enabled
999 12:15:55.549570 I2C: 00:31 enabled
1000 12:15:55.549985 I2C: 00:32 enabled
1001 12:15:55.553034 scan_static_bus for PCI: 00:15.0 done
1002 12:15:55.559557 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1003 12:15:55.559952 PCI: 00:15.1 scanning...
1004 12:15:55.563371 scan_static_bus for PCI: 00:15.1
1005 12:15:55.566636 I2C: 00:10 enabled
1006 12:15:55.570516 scan_static_bus for PCI: 00:15.1 done
1007 12:15:55.576554 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1008 12:15:55.577069 PCI: 00:15.2 scanning...
1009 12:15:55.580267 scan_static_bus for PCI: 00:15.2
1010 12:15:55.586661 scan_static_bus for PCI: 00:15.2 done
1011 12:15:55.590021 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1012 12:15:55.593258 PCI: 00:15.3 scanning...
1013 12:15:55.596368 scan_static_bus for PCI: 00:15.3
1014 12:15:55.599710 scan_static_bus for PCI: 00:15.3 done
1015 12:15:55.603594 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1016 12:15:55.606919 PCI: 00:19.1 scanning...
1017 12:15:55.609591 scan_static_bus for PCI: 00:19.1
1018 12:15:55.612843 I2C: 00:15 enabled
1019 12:15:55.616678 scan_static_bus for PCI: 00:19.1 done
1020 12:15:55.623144 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1021 12:15:55.623537 PCI: 00:1d.0 scanning...
1022 12:15:55.626480 do_pci_scan_bridge for PCI: 00:1d.0
1023 12:15:55.629719 PCI: pci_scan_bus for bus 01
1024 12:15:55.633038 PCI: 01:00.0 [1c5c/174a] enabled
1025 12:15:55.636404 GENERIC: 0.0 enabled
1026 12:15:55.639358 Enabling Common Clock Configuration
1027 12:15:55.642516 L1 Sub-State supported from root port 29
1028 12:15:55.646194 L1 Sub-State Support = 0xf
1029 12:15:55.649264 CommonModeRestoreTime = 0x28
1030 12:15:55.652636 Power On Value = 0x16, Power On Scale = 0x0
1031 12:15:55.656026 ASPM: Enabled L1
1032 12:15:55.659609 PCIe: Max_Payload_Size adjusted to 128
1033 12:15:55.666066 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1034 12:15:55.666541 PCI: 00:1e.2 scanning...
1035 12:15:55.672726 scan_generic_bus for PCI: 00:1e.2
1036 12:15:55.673107 SPI: 00 enabled
1037 12:15:55.679399 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1038 12:15:55.682649 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1039 12:15:55.685783 PCI: 00:1e.3 scanning...
1040 12:15:55.688975 scan_generic_bus for PCI: 00:1e.3
1041 12:15:55.692489 SPI: 00 enabled
1042 12:15:55.699490 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1043 12:15:55.702578 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1044 12:15:55.705810 PCI: 00:1f.0 scanning...
1045 12:15:55.709096 scan_static_bus for PCI: 00:1f.0
1046 12:15:55.709511 PNP: 0c09.0 enabled
1047 12:15:55.711748 PNP: 0c09.0 scanning...
1048 12:15:55.715764 scan_static_bus for PNP: 0c09.0
1049 12:15:55.719025 scan_static_bus for PNP: 0c09.0 done
1050 12:15:55.725787 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1051 12:15:55.728982 scan_static_bus for PCI: 00:1f.0 done
1052 12:15:55.731976 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1053 12:15:55.735273 PCI: 00:1f.2 scanning...
1054 12:15:55.738906 scan_static_bus for PCI: 00:1f.2
1055 12:15:55.742311 GENERIC: 0.0 enabled
1056 12:15:55.745102 GENERIC: 0.0 scanning...
1057 12:15:55.748735 scan_static_bus for GENERIC: 0.0
1058 12:15:55.749261 GENERIC: 0.0 enabled
1059 12:15:55.751668 GENERIC: 1.0 enabled
1060 12:15:55.754803 scan_static_bus for GENERIC: 0.0 done
1061 12:15:55.761670 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1062 12:15:55.765097 scan_static_bus for PCI: 00:1f.2 done
1063 12:15:55.768384 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1064 12:15:55.771826 PCI: 00:1f.3 scanning...
1065 12:15:55.775238 scan_static_bus for PCI: 00:1f.3
1066 12:15:55.778664 scan_static_bus for PCI: 00:1f.3 done
1067 12:15:55.784815 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1068 12:15:55.785259 PCI: 00:1f.5 scanning...
1069 12:15:55.788066 scan_generic_bus for PCI: 00:1f.5
1070 12:15:55.794971 scan_generic_bus for PCI: 00:1f.5 done
1071 12:15:55.798179 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1072 12:15:55.804734 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1073 12:15:55.808351 scan_static_bus for Root Device done
1074 12:15:55.811668 scan_bus: bus Root Device finished in 737 msecs
1075 12:15:55.812086 done
1076 12:15:55.818128 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1077 12:15:55.821318 Chrome EC: UHEPI supported
1078 12:15:55.828087 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1079 12:15:55.834277 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1080 12:15:55.838141 SPI flash protection: WPSW=0 SRP0=0
1081 12:15:55.841781 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1082 12:15:55.848268 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1083 12:15:55.851091 found VGA at PCI: 00:02.0
1084 12:15:55.854773 Setting up VGA for PCI: 00:02.0
1085 12:15:55.861361 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1086 12:15:55.864593 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1087 12:15:55.867662 Allocating resources...
1088 12:15:55.868084 Reading resources...
1089 12:15:55.873996 Root Device read_resources bus 0 link: 0
1090 12:15:55.877889 DOMAIN: 0000 read_resources bus 0 link: 0
1091 12:15:55.883815 PCI: 00:04.0 read_resources bus 1 link: 0
1092 12:15:55.887534 PCI: 00:04.0 read_resources bus 1 link: 0 done
1093 12:15:55.893811 PCI: 00:0d.0 read_resources bus 0 link: 0
1094 12:15:55.897468 USB0 port 0 read_resources bus 0 link: 0
1095 12:15:55.903939 USB0 port 0 read_resources bus 0 link: 0 done
1096 12:15:55.907214 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1097 12:15:55.910302 PCI: 00:14.0 read_resources bus 0 link: 0
1098 12:15:55.917117 USB0 port 0 read_resources bus 0 link: 0
1099 12:15:55.920369 USB0 port 0 read_resources bus 0 link: 0 done
1100 12:15:55.928008 PCI: 00:14.0 read_resources bus 0 link: 0 done
1101 12:15:55.930578 PCI: 00:14.3 read_resources bus 0 link: 0
1102 12:15:55.937786 PCI: 00:14.3 read_resources bus 0 link: 0 done
1103 12:15:55.941005 PCI: 00:15.0 read_resources bus 0 link: 0
1104 12:15:55.948064 PCI: 00:15.0 read_resources bus 0 link: 0 done
1105 12:15:55.950942 PCI: 00:15.1 read_resources bus 0 link: 0
1106 12:15:55.957818 PCI: 00:15.1 read_resources bus 0 link: 0 done
1107 12:15:55.960769 PCI: 00:19.1 read_resources bus 0 link: 0
1108 12:15:55.968183 PCI: 00:19.1 read_resources bus 0 link: 0 done
1109 12:15:55.971563 PCI: 00:1d.0 read_resources bus 1 link: 0
1110 12:15:55.978098 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1111 12:15:55.981370 PCI: 00:1e.2 read_resources bus 2 link: 0
1112 12:15:55.987988 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1113 12:15:55.991143 PCI: 00:1e.3 read_resources bus 3 link: 0
1114 12:15:55.997941 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1115 12:15:56.000936 PCI: 00:1f.0 read_resources bus 0 link: 0
1116 12:15:56.007839 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1117 12:15:56.011135 PCI: 00:1f.2 read_resources bus 0 link: 0
1118 12:15:56.014846 GENERIC: 0.0 read_resources bus 0 link: 0
1119 12:15:56.021501 GENERIC: 0.0 read_resources bus 0 link: 0 done
1120 12:15:56.024829 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1121 12:15:56.032118 DOMAIN: 0000 read_resources bus 0 link: 0 done
1122 12:15:56.035134 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1123 12:15:56.042248 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1124 12:15:56.045625 Root Device read_resources bus 0 link: 0 done
1125 12:15:56.048762 Done reading resources.
1126 12:15:56.055383 Show resources in subtree (Root Device)...After reading.
1127 12:15:56.058841 Root Device child on link 0 DOMAIN: 0000
1128 12:15:56.061997 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1129 12:15:56.071698 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1130 12:15:56.081929 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1131 12:15:56.085091 PCI: 00:00.0
1132 12:15:56.095220 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1133 12:15:56.101656 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1134 12:15:56.111595 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1135 12:15:56.121572 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1136 12:15:56.132070 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1137 12:15:56.141898 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1138 12:15:56.151732 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1139 12:15:56.158352 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1140 12:15:56.168328 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1141 12:15:56.177830 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1142 12:15:56.187738 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1143 12:15:56.197677 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1144 12:15:56.204625 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1145 12:15:56.214568 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1146 12:15:56.224000 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1147 12:15:56.234659 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1148 12:15:56.244153 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1149 12:15:56.254074 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1150 12:15:56.260552 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1151 12:15:56.271109 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1152 12:15:56.274377 PCI: 00:02.0
1153 12:15:56.283997 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 12:15:56.294020 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1155 12:15:56.303673 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1156 12:15:56.307164 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1157 12:15:56.317488 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1158 12:15:56.320442 GENERIC: 0.0
1159 12:15:56.320865 PCI: 00:05.0
1160 12:15:56.330392 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1161 12:15:56.337159 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1162 12:15:56.337584 GENERIC: 0.0
1163 12:15:56.340329 PCI: 00:08.0
1164 12:15:56.350695 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 12:15:56.351208 PCI: 00:0a.0
1166 12:15:56.353922 PCI: 00:0d.0 child on link 0 USB0 port 0
1167 12:15:56.363593 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 12:15:56.370347 USB0 port 0 child on link 0 USB3 port 0
1169 12:15:56.370881 USB3 port 0
1170 12:15:56.373637 USB3 port 1
1171 12:15:56.374019 USB3 port 2
1172 12:15:56.376850 USB3 port 3
1173 12:15:56.380390 PCI: 00:14.0 child on link 0 USB0 port 0
1174 12:15:56.390162 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1175 12:15:56.397149 USB0 port 0 child on link 0 USB2 port 0
1176 12:15:56.397685 USB2 port 0
1177 12:15:56.399805 USB2 port 1
1178 12:15:56.400174 USB2 port 2
1179 12:15:56.403613 USB2 port 3
1180 12:15:56.403989 USB2 port 4
1181 12:15:56.406639 USB2 port 5
1182 12:15:56.407052 USB2 port 6
1183 12:15:56.410394 USB2 port 7
1184 12:15:56.410820 USB2 port 8
1185 12:15:56.413218 USB2 port 9
1186 12:15:56.413643 USB3 port 0
1187 12:15:56.416816 USB3 port 1
1188 12:15:56.419828 USB3 port 2
1189 12:15:56.420252 USB3 port 3
1190 12:15:56.423507 PCI: 00:14.2
1191 12:15:56.433301 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1192 12:15:56.443679 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1193 12:15:56.447034 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1194 12:15:56.456682 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1195 12:15:56.457213 GENERIC: 0.0
1196 12:15:56.463338 PCI: 00:15.0 child on link 0 I2C: 00:1a
1197 12:15:56.473305 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1198 12:15:56.473844 I2C: 00:1a
1199 12:15:56.476440 I2C: 00:31
1200 12:15:56.476865 I2C: 00:32
1201 12:15:56.479933 PCI: 00:15.1 child on link 0 I2C: 00:10
1202 12:15:56.489670 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 12:15:56.493231 I2C: 00:10
1204 12:15:56.493765 PCI: 00:15.2
1205 12:15:56.502786 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 12:15:56.505811 PCI: 00:15.3
1207 12:15:56.515607 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1208 12:15:56.519826 PCI: 00:16.0
1209 12:15:56.529126 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1210 12:15:56.529642 PCI: 00:19.0
1211 12:15:56.532848 PCI: 00:19.1 child on link 0 I2C: 00:15
1212 12:15:56.542493 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1213 12:15:56.546039 I2C: 00:15
1214 12:15:56.549139 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1215 12:15:56.559191 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1216 12:15:56.568776 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1217 12:15:56.575336 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1218 12:15:56.578908 GENERIC: 0.0
1219 12:15:56.582612 PCI: 01:00.0
1220 12:15:56.592365 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1221 12:15:56.599070 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1222 12:15:56.608607 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1223 12:15:56.611835 PCI: 00:1e.0
1224 12:15:56.621720 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1225 12:15:56.625850 PCI: 00:1e.2 child on link 0 SPI: 00
1226 12:15:56.635284 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1227 12:15:56.638252 SPI: 00
1228 12:15:56.641877 PCI: 00:1e.3 child on link 0 SPI: 00
1229 12:15:56.651415 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1230 12:15:56.651895 SPI: 00
1231 12:15:56.657968 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1232 12:15:56.664715 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1233 12:15:56.667926 PNP: 0c09.0
1234 12:15:56.674411 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1235 12:15:56.680988 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1236 12:15:56.691446 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1237 12:15:56.698052 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1238 12:15:56.704658 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1239 12:15:56.704748 GENERIC: 0.0
1240 12:15:56.707924 GENERIC: 1.0
1241 12:15:56.708006 PCI: 00:1f.3
1242 12:15:56.717697 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1243 12:15:56.727750 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1244 12:15:56.730659 PCI: 00:1f.5
1245 12:15:56.740687 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1246 12:15:56.743749 CPU_CLUSTER: 0 child on link 0 APIC: 00
1247 12:15:56.743840 APIC: 00
1248 12:15:56.747278 APIC: 01
1249 12:15:56.747408 APIC: 03
1250 12:15:56.750420 APIC: 07
1251 12:15:56.750547 APIC: 05
1252 12:15:56.750654 APIC: 04
1253 12:15:56.753988 APIC: 02
1254 12:15:56.754098 APIC: 06
1255 12:15:56.760831 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1256 12:15:56.767397 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1257 12:15:56.773876 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1258 12:15:56.780368 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1259 12:15:56.783512 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1260 12:15:56.787554 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1261 12:15:56.793852 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1262 12:15:56.800303 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1263 12:15:56.807041 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1264 12:15:56.813797 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1265 12:15:56.820206 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1266 12:15:56.827623 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1267 12:15:56.837520 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1268 12:15:56.843765 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1269 12:15:56.850546 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1270 12:15:56.853792 DOMAIN: 0000: Resource ranges:
1271 12:15:56.857311 * Base: 1000, Size: 800, Tag: 100
1272 12:15:56.860506 * Base: 1900, Size: e700, Tag: 100
1273 12:15:56.867214 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1274 12:15:56.874079 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1275 12:15:56.880747 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1276 12:15:56.887159 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1277 12:15:56.897033 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1278 12:15:56.903768 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1279 12:15:56.910228 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1280 12:15:56.920260 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1281 12:15:56.926914 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1282 12:15:56.933793 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1283 12:15:56.943910 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1284 12:15:56.949725 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1285 12:15:56.956960 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1286 12:15:56.966690 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1287 12:15:56.973726 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1288 12:15:56.980035 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1289 12:15:56.989551 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1290 12:15:56.996621 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1291 12:15:57.003533 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1292 12:15:57.013143 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1293 12:15:57.019664 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1294 12:15:57.026198 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1295 12:15:57.036574 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1296 12:15:57.043045 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1297 12:15:57.049440 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1298 12:15:57.052534 DOMAIN: 0000: Resource ranges:
1299 12:15:57.056102 * Base: 7fc00000, Size: 40400000, Tag: 200
1300 12:15:57.062783 * Base: d0000000, Size: 28000000, Tag: 200
1301 12:15:57.066001 * Base: fa000000, Size: 1000000, Tag: 200
1302 12:15:57.069481 * Base: fb001000, Size: 2fff000, Tag: 200
1303 12:15:57.075872 * Base: fe010000, Size: 2e000, Tag: 200
1304 12:15:57.079682 * Base: fe03f000, Size: d41000, Tag: 200
1305 12:15:57.082512 * Base: fed88000, Size: 8000, Tag: 200
1306 12:15:57.085630 * Base: fed93000, Size: d000, Tag: 200
1307 12:15:57.092359 * Base: feda2000, Size: 1e000, Tag: 200
1308 12:15:57.095630 * Base: fede0000, Size: 1220000, Tag: 200
1309 12:15:57.098813 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1310 12:15:57.105768 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1311 12:15:57.112204 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1312 12:15:57.118867 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1313 12:15:57.125407 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1314 12:15:57.131902 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1315 12:15:57.138323 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1316 12:15:57.145538 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1317 12:15:57.151974 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1318 12:15:57.158548 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1319 12:15:57.165655 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1320 12:15:57.172050 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1321 12:15:57.178755 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1322 12:15:57.185289 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1323 12:15:57.192110 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1324 12:15:57.199100 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1325 12:15:57.205421 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1326 12:15:57.212214 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1327 12:15:57.218652 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1328 12:15:57.225084 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1329 12:15:57.231891 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1330 12:15:57.238314 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1331 12:15:57.244662 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1332 12:15:57.255154 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1333 12:15:57.261949 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1334 12:15:57.264935 PCI: 00:1d.0: Resource ranges:
1335 12:15:57.268093 * Base: 7fc00000, Size: 100000, Tag: 200
1336 12:15:57.275082 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1337 12:15:57.281802 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1338 12:15:57.287822 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1339 12:15:57.297807 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1340 12:15:57.304838 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1341 12:15:57.307901 Root Device assign_resources, bus 0 link: 0
1342 12:15:57.314544 DOMAIN: 0000 assign_resources, bus 0 link: 0
1343 12:15:57.321261 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1344 12:15:57.331703 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1345 12:15:57.338002 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1346 12:15:57.347598 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1347 12:15:57.350752 PCI: 00:04.0 assign_resources, bus 1 link: 0
1348 12:15:57.357670 PCI: 00:04.0 assign_resources, bus 1 link: 0
1349 12:15:57.364255 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1350 12:15:57.373959 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1351 12:15:57.380826 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1352 12:15:57.384218 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1353 12:15:57.390314 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1354 12:15:57.397293 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1355 12:15:57.404181 PCI: 00:14.0 assign_resources, bus 0 link: 0
1356 12:15:57.407050 PCI: 00:14.0 assign_resources, bus 0 link: 0
1357 12:15:57.416867 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1358 12:15:57.423846 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1359 12:15:57.434032 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1360 12:15:57.436998 PCI: 00:14.3 assign_resources, bus 0 link: 0
1361 12:15:57.440188 PCI: 00:14.3 assign_resources, bus 0 link: 0
1362 12:15:57.450030 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1363 12:15:57.453258 PCI: 00:15.0 assign_resources, bus 0 link: 0
1364 12:15:57.460142 PCI: 00:15.0 assign_resources, bus 0 link: 0
1365 12:15:57.466738 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1366 12:15:57.469772 PCI: 00:15.1 assign_resources, bus 0 link: 0
1367 12:15:57.476972 PCI: 00:15.1 assign_resources, bus 0 link: 0
1368 12:15:57.483625 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1369 12:15:57.493429 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1370 12:15:57.499690 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1371 12:15:57.509927 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1372 12:15:57.512882 PCI: 00:19.1 assign_resources, bus 0 link: 0
1373 12:15:57.519843 PCI: 00:19.1 assign_resources, bus 0 link: 0
1374 12:15:57.525792 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1375 12:15:57.536165 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1376 12:15:57.546025 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1377 12:15:57.549190 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1378 12:15:57.559394 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1379 12:15:57.565464 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1380 12:15:57.571999 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1381 12:15:57.578584 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1382 12:15:57.585086 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1383 12:15:57.592294 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1384 12:15:57.595512 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1385 12:15:57.604987 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1386 12:15:57.608540 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1387 12:15:57.611528 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1388 12:15:57.618719 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1389 12:15:57.622172 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1390 12:15:57.628844 LPC: Trying to open IO window from 800 size 1ff
1391 12:15:57.634863 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1392 12:15:57.645257 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1393 12:15:57.651755 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1394 12:15:57.658222 DOMAIN: 0000 assign_resources, bus 0 link: 0
1395 12:15:57.661495 Root Device assign_resources, bus 0 link: 0
1396 12:15:57.664775 Done setting resources.
1397 12:15:57.671359 Show resources in subtree (Root Device)...After assigning values.
1398 12:15:57.674796 Root Device child on link 0 DOMAIN: 0000
1399 12:15:57.677960 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1400 12:15:57.688290 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1401 12:15:57.697934 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1402 12:15:57.701149 PCI: 00:00.0
1403 12:15:57.711465 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1404 12:15:57.717768 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1405 12:15:57.727940 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1406 12:15:57.737914 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1407 12:15:57.747640 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1408 12:15:57.758156 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1409 12:15:57.767890 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1410 12:15:57.774342 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1411 12:15:57.784456 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1412 12:15:57.794094 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1413 12:15:57.804338 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1414 12:15:57.814032 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1415 12:15:57.823969 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1416 12:15:57.830660 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1417 12:15:57.840617 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1418 12:15:57.850474 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1419 12:15:57.860735 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1420 12:15:57.870983 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1421 12:15:57.880369 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1422 12:15:57.887544 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1423 12:15:57.890746 PCI: 00:02.0
1424 12:15:57.900257 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1425 12:15:57.910617 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1426 12:15:57.920259 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1427 12:15:57.926671 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1428 12:15:57.936720 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1429 12:15:57.937118 GENERIC: 0.0
1430 12:15:57.940217 PCI: 00:05.0
1431 12:15:57.950007 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1432 12:15:57.953368 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1433 12:15:57.957034 GENERIC: 0.0
1434 12:15:57.957462 PCI: 00:08.0
1435 12:15:57.966933 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1436 12:15:57.970024 PCI: 00:0a.0
1437 12:15:57.973426 PCI: 00:0d.0 child on link 0 USB0 port 0
1438 12:15:57.983557 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1439 12:15:57.990165 USB0 port 0 child on link 0 USB3 port 0
1440 12:15:57.990748 USB3 port 0
1441 12:15:57.993238 USB3 port 1
1442 12:15:57.993749 USB3 port 2
1443 12:15:57.996519 USB3 port 3
1444 12:15:58.000252 PCI: 00:14.0 child on link 0 USB0 port 0
1445 12:15:58.009734 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1446 12:15:58.016790 USB0 port 0 child on link 0 USB2 port 0
1447 12:15:58.017205 USB2 port 0
1448 12:15:58.020023 USB2 port 1
1449 12:15:58.020483 USB2 port 2
1450 12:15:58.023289 USB2 port 3
1451 12:15:58.023600 USB2 port 4
1452 12:15:58.026454 USB2 port 5
1453 12:15:58.026763 USB2 port 6
1454 12:15:58.029604 USB2 port 7
1455 12:15:58.029909 USB2 port 8
1456 12:15:58.032914 USB2 port 9
1457 12:15:58.035979 USB3 port 0
1458 12:15:58.036398 USB3 port 1
1459 12:15:58.039914 USB3 port 2
1460 12:15:58.040213 USB3 port 3
1461 12:15:58.042980 PCI: 00:14.2
1462 12:15:58.053157 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1463 12:15:58.062937 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1464 12:15:58.066013 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1465 12:15:58.075901 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1466 12:15:58.079129 GENERIC: 0.0
1467 12:15:58.082944 PCI: 00:15.0 child on link 0 I2C: 00:1a
1468 12:15:58.092347 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1469 12:15:58.096210 I2C: 00:1a
1470 12:15:58.096658 I2C: 00:31
1471 12:15:58.099374 I2C: 00:32
1472 12:15:58.102647 PCI: 00:15.1 child on link 0 I2C: 00:10
1473 12:15:58.112873 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1474 12:15:58.115363 I2C: 00:10
1475 12:15:58.115661 PCI: 00:15.2
1476 12:15:58.125837 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1477 12:15:58.129215 PCI: 00:15.3
1478 12:15:58.138801 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1479 12:15:58.138986 PCI: 00:16.0
1480 12:15:58.148552 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1481 12:15:58.152427 PCI: 00:19.0
1482 12:15:58.155420 PCI: 00:19.1 child on link 0 I2C: 00:15
1483 12:15:58.165359 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1484 12:15:58.168486 I2C: 00:15
1485 12:15:58.172227 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1486 12:15:58.181775 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1487 12:15:58.194769 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1488 12:15:58.205039 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1489 12:15:58.205141 GENERIC: 0.0
1490 12:15:58.208294 PCI: 01:00.0
1491 12:15:58.218029 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1492 12:15:58.228256 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1493 12:15:58.238512 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1494 12:15:58.241740 PCI: 00:1e.0
1495 12:15:58.251614 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1496 12:15:58.254878 PCI: 00:1e.2 child on link 0 SPI: 00
1497 12:15:58.264625 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1498 12:15:58.268105 SPI: 00
1499 12:15:58.271618 PCI: 00:1e.3 child on link 0 SPI: 00
1500 12:15:58.281082 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1501 12:15:58.281176 SPI: 00
1502 12:15:58.287782 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1503 12:15:58.294822 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1504 12:15:58.297920 PNP: 0c09.0
1505 12:15:58.308267 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1506 12:15:58.311413 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1507 12:15:58.320959 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1508 12:15:58.331302 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1509 12:15:58.334527 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1510 12:15:58.334611 GENERIC: 0.0
1511 12:15:58.337751 GENERIC: 1.0
1512 12:15:58.340963 PCI: 00:1f.3
1513 12:15:58.351259 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1514 12:15:58.361220 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1515 12:15:58.361311 PCI: 00:1f.5
1516 12:15:58.370633 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1517 12:15:58.377219 CPU_CLUSTER: 0 child on link 0 APIC: 00
1518 12:15:58.377388 APIC: 00
1519 12:15:58.381250 APIC: 01
1520 12:15:58.381376 APIC: 03
1521 12:15:58.381490 APIC: 07
1522 12:15:58.383993 APIC: 05
1523 12:15:58.384089 APIC: 04
1524 12:15:58.384163 APIC: 02
1525 12:15:58.387680 APIC: 06
1526 12:15:58.390683 Done allocating resources.
1527 12:15:58.397520 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1528 12:15:58.400520 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1529 12:15:58.403997 Configure GPIOs for I2S audio on UP4.
1530 12:15:58.412096 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1531 12:15:58.415395 Enabling resources...
1532 12:15:58.418723 PCI: 00:00.0 subsystem <- 8086/9a12
1533 12:15:58.421784 PCI: 00:00.0 cmd <- 06
1534 12:15:58.425468 PCI: 00:02.0 subsystem <- 8086/9a40
1535 12:15:58.428754 PCI: 00:02.0 cmd <- 03
1536 12:15:58.431779 PCI: 00:04.0 subsystem <- 8086/9a03
1537 12:15:58.435252 PCI: 00:04.0 cmd <- 02
1538 12:15:58.438462 PCI: 00:05.0 subsystem <- 8086/9a19
1539 12:15:58.438584 PCI: 00:05.0 cmd <- 02
1540 12:15:58.445056 PCI: 00:08.0 subsystem <- 8086/9a11
1541 12:15:58.445149 PCI: 00:08.0 cmd <- 06
1542 12:15:58.448297 PCI: 00:0d.0 subsystem <- 8086/9a13
1543 12:15:58.451640 PCI: 00:0d.0 cmd <- 02
1544 12:15:58.454869 PCI: 00:14.0 subsystem <- 8086/a0ed
1545 12:15:58.458229 PCI: 00:14.0 cmd <- 02
1546 12:15:58.461430 PCI: 00:14.2 subsystem <- 8086/a0ef
1547 12:15:58.464672 PCI: 00:14.2 cmd <- 02
1548 12:15:58.468521 PCI: 00:14.3 subsystem <- 8086/a0f0
1549 12:15:58.471566 PCI: 00:14.3 cmd <- 02
1550 12:15:58.474842 PCI: 00:15.0 subsystem <- 8086/a0e8
1551 12:15:58.478101 PCI: 00:15.0 cmd <- 02
1552 12:15:58.481078 PCI: 00:15.1 subsystem <- 8086/a0e9
1553 12:15:58.484877 PCI: 00:15.1 cmd <- 02
1554 12:15:58.487830 PCI: 00:15.2 subsystem <- 8086/a0ea
1555 12:15:58.487939 PCI: 00:15.2 cmd <- 02
1556 12:15:58.495150 PCI: 00:15.3 subsystem <- 8086/a0eb
1557 12:15:58.495242 PCI: 00:15.3 cmd <- 02
1558 12:15:58.498283 PCI: 00:16.0 subsystem <- 8086/a0e0
1559 12:15:58.501415 PCI: 00:16.0 cmd <- 02
1560 12:15:58.504409 PCI: 00:19.1 subsystem <- 8086/a0c6
1561 12:15:58.508031 PCI: 00:19.1 cmd <- 02
1562 12:15:58.511103 PCI: 00:1d.0 bridge ctrl <- 0013
1563 12:15:58.514678 PCI: 00:1d.0 subsystem <- 8086/a0b0
1564 12:15:58.517830 PCI: 00:1d.0 cmd <- 06
1565 12:15:58.520974 PCI: 00:1e.0 subsystem <- 8086/a0a8
1566 12:15:58.524802 PCI: 00:1e.0 cmd <- 06
1567 12:15:58.528019 PCI: 00:1e.2 subsystem <- 8086/a0aa
1568 12:15:58.531307 PCI: 00:1e.2 cmd <- 06
1569 12:15:58.534554 PCI: 00:1e.3 subsystem <- 8086/a0ab
1570 12:15:58.537735 PCI: 00:1e.3 cmd <- 02
1571 12:15:58.540982 PCI: 00:1f.0 subsystem <- 8086/a087
1572 12:15:58.541075 PCI: 00:1f.0 cmd <- 407
1573 12:15:58.547972 PCI: 00:1f.3 subsystem <- 8086/a0c8
1574 12:15:58.548107 PCI: 00:1f.3 cmd <- 02
1575 12:15:58.551278 PCI: 00:1f.5 subsystem <- 8086/a0a4
1576 12:15:58.554557 PCI: 00:1f.5 cmd <- 406
1577 12:15:58.559320 PCI: 01:00.0 cmd <- 02
1578 12:15:58.563796 done.
1579 12:15:58.567164 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1580 12:15:58.570328 Initializing devices...
1581 12:15:58.574191 Root Device init
1582 12:15:58.577395 Chrome EC: Set SMI mask to 0x0000000000000000
1583 12:15:58.584025 Chrome EC: clear events_b mask to 0x0000000000000000
1584 12:15:58.590306 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1585 12:15:58.593436 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1586 12:15:58.600096 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1587 12:15:58.607062 Chrome EC: Set WAKE mask to 0x0000000000000000
1588 12:15:58.610144 fw_config match found: DB_USB=USB3_ACTIVE
1589 12:15:58.616788 Configure Right Type-C port orientation for retimer
1590 12:15:58.619902 Root Device init finished in 42 msecs
1591 12:15:58.623665 PCI: 00:00.0 init
1592 12:15:58.623778 CPU TDP = 9 Watts
1593 12:15:58.626906 CPU PL1 = 9 Watts
1594 12:15:58.630096 CPU PL2 = 40 Watts
1595 12:15:58.630178 CPU PL4 = 83 Watts
1596 12:15:58.633353 PCI: 00:00.0 init finished in 8 msecs
1597 12:15:58.636566 PCI: 00:02.0 init
1598 12:15:58.640399 GMA: Found VBT in CBFS
1599 12:15:58.643628 GMA: Found valid VBT in CBFS
1600 12:15:58.646936 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1601 12:15:58.656547 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1602 12:15:58.659869 PCI: 00:02.0 init finished in 18 msecs
1603 12:15:58.663249 PCI: 00:05.0 init
1604 12:15:58.666493 PCI: 00:05.0 init finished in 0 msecs
1605 12:15:58.666587 PCI: 00:08.0 init
1606 12:15:58.673419 PCI: 00:08.0 init finished in 0 msecs
1607 12:15:58.673551 PCI: 00:14.0 init
1608 12:15:58.679856 PCI: 00:14.0 init finished in 0 msecs
1609 12:15:58.679950 PCI: 00:14.2 init
1610 12:15:58.683129 PCI: 00:14.2 init finished in 0 msecs
1611 12:15:58.687152 PCI: 00:15.0 init
1612 12:15:58.690231 I2C bus 0 version 0x3230302a
1613 12:15:58.693332 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1614 12:15:58.697175 PCI: 00:15.0 init finished in 6 msecs
1615 12:15:58.700214 PCI: 00:15.1 init
1616 12:15:58.703342 I2C bus 1 version 0x3230302a
1617 12:15:58.707069 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1618 12:15:58.710218 PCI: 00:15.1 init finished in 6 msecs
1619 12:15:58.713578 PCI: 00:15.2 init
1620 12:15:58.717129 I2C bus 2 version 0x3230302a
1621 12:15:58.720100 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1622 12:15:58.723214 PCI: 00:15.2 init finished in 6 msecs
1623 12:15:58.723332 PCI: 00:15.3 init
1624 12:15:58.726919 I2C bus 3 version 0x3230302a
1625 12:15:58.730016 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1626 12:15:58.736777 PCI: 00:15.3 init finished in 6 msecs
1627 12:15:58.736902 PCI: 00:16.0 init
1628 12:15:58.739868 PCI: 00:16.0 init finished in 0 msecs
1629 12:15:58.743882 PCI: 00:19.1 init
1630 12:15:58.747046 I2C bus 5 version 0x3230302a
1631 12:15:58.750406 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1632 12:15:58.753581 PCI: 00:19.1 init finished in 6 msecs
1633 12:15:58.756651 PCI: 00:1d.0 init
1634 12:15:58.760476 Initializing PCH PCIe bridge.
1635 12:15:58.763638 PCI: 00:1d.0 init finished in 3 msecs
1636 12:15:58.766953 PCI: 00:1f.0 init
1637 12:15:58.770182 IOAPIC: Initializing IOAPIC at 0xfec00000
1638 12:15:58.776681 IOAPIC: Bootstrap Processor Local APIC = 0x00
1639 12:15:58.776797 IOAPIC: ID = 0x02
1640 12:15:58.779978 IOAPIC: Dumping registers
1641 12:15:58.783208 reg 0x0000: 0x02000000
1642 12:15:58.783320 reg 0x0001: 0x00770020
1643 12:15:58.786942 reg 0x0002: 0x00000000
1644 12:15:58.790249 PCI: 00:1f.0 init finished in 21 msecs
1645 12:15:58.793554 PCI: 00:1f.2 init
1646 12:15:58.796866 Disabling ACPI via APMC.
1647 12:15:58.800718 APMC done.
1648 12:15:58.803900 PCI: 00:1f.2 init finished in 6 msecs
1649 12:15:58.816265 PCI: 01:00.0 init
1650 12:15:58.819481 PCI: 01:00.0 init finished in 0 msecs
1651 12:15:58.822708 PNP: 0c09.0 init
1652 12:15:58.829584 Google Chrome EC uptime: 8.407 seconds
1653 12:15:58.832663 Google Chrome AP resets since EC boot: 1
1654 12:15:58.835795 Google Chrome most recent AP reset causes:
1655 12:15:58.839470 0.349: 32775 shutdown: entering G3
1656 12:15:58.845834 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1657 12:15:58.849162 PNP: 0c09.0 init finished in 23 msecs
1658 12:15:58.855991 Devices initialized
1659 12:15:58.859108 Show all devs... After init.
1660 12:15:58.862363 Root Device: enabled 1
1661 12:15:58.862482 DOMAIN: 0000: enabled 1
1662 12:15:58.865693 CPU_CLUSTER: 0: enabled 1
1663 12:15:58.869028 PCI: 00:00.0: enabled 1
1664 12:15:58.872886 PCI: 00:02.0: enabled 1
1665 12:15:58.872999 PCI: 00:04.0: enabled 1
1666 12:15:58.876197 PCI: 00:05.0: enabled 1
1667 12:15:58.879323 PCI: 00:06.0: enabled 0
1668 12:15:58.882420 PCI: 00:07.0: enabled 0
1669 12:15:58.882532 PCI: 00:07.1: enabled 0
1670 12:15:58.885711 PCI: 00:07.2: enabled 0
1671 12:15:58.888840 PCI: 00:07.3: enabled 0
1672 12:15:58.892681 PCI: 00:08.0: enabled 1
1673 12:15:58.892799 PCI: 00:09.0: enabled 0
1674 12:15:58.896037 PCI: 00:0a.0: enabled 0
1675 12:15:58.899288 PCI: 00:0d.0: enabled 1
1676 12:15:58.902451 PCI: 00:0d.1: enabled 0
1677 12:15:58.902575 PCI: 00:0d.2: enabled 0
1678 12:15:58.905630 PCI: 00:0d.3: enabled 0
1679 12:15:58.909290 PCI: 00:0e.0: enabled 0
1680 12:15:58.909403 PCI: 00:10.2: enabled 1
1681 12:15:58.912491 PCI: 00:10.6: enabled 0
1682 12:15:58.915539 PCI: 00:10.7: enabled 0
1683 12:15:58.918907 PCI: 00:12.0: enabled 0
1684 12:15:58.919020 PCI: 00:12.6: enabled 0
1685 12:15:58.922330 PCI: 00:13.0: enabled 0
1686 12:15:58.925855 PCI: 00:14.0: enabled 1
1687 12:15:58.928934 PCI: 00:14.1: enabled 0
1688 12:15:58.929055 PCI: 00:14.2: enabled 1
1689 12:15:58.932565 PCI: 00:14.3: enabled 1
1690 12:15:58.935729 PCI: 00:15.0: enabled 1
1691 12:15:58.938933 PCI: 00:15.1: enabled 1
1692 12:15:58.939055 PCI: 00:15.2: enabled 1
1693 12:15:58.942098 PCI: 00:15.3: enabled 1
1694 12:15:58.945797 PCI: 00:16.0: enabled 1
1695 12:15:58.945913 PCI: 00:16.1: enabled 0
1696 12:15:58.948920 PCI: 00:16.2: enabled 0
1697 12:15:58.952112 PCI: 00:16.3: enabled 0
1698 12:15:58.955366 PCI: 00:16.4: enabled 0
1699 12:15:58.955475 PCI: 00:16.5: enabled 0
1700 12:15:58.958686 PCI: 00:17.0: enabled 0
1701 12:15:58.961969 PCI: 00:19.0: enabled 0
1702 12:15:58.965170 PCI: 00:19.1: enabled 1
1703 12:15:58.965278 PCI: 00:19.2: enabled 0
1704 12:15:58.969074 PCI: 00:1c.0: enabled 1
1705 12:15:58.972297 PCI: 00:1c.1: enabled 0
1706 12:15:58.975603 PCI: 00:1c.2: enabled 0
1707 12:15:58.975715 PCI: 00:1c.3: enabled 0
1708 12:15:58.978827 PCI: 00:1c.4: enabled 0
1709 12:15:58.982102 PCI: 00:1c.5: enabled 0
1710 12:15:58.985456 PCI: 00:1c.6: enabled 1
1711 12:15:58.985566 PCI: 00:1c.7: enabled 0
1712 12:15:58.988664 PCI: 00:1d.0: enabled 1
1713 12:15:58.991820 PCI: 00:1d.1: enabled 0
1714 12:15:58.991931 PCI: 00:1d.2: enabled 1
1715 12:15:58.995033 PCI: 00:1d.3: enabled 0
1716 12:15:58.998458 PCI: 00:1e.0: enabled 1
1717 12:15:59.002257 PCI: 00:1e.1: enabled 0
1718 12:15:59.002384 PCI: 00:1e.2: enabled 1
1719 12:15:59.005445 PCI: 00:1e.3: enabled 1
1720 12:15:59.008762 PCI: 00:1f.0: enabled 1
1721 12:15:59.011984 PCI: 00:1f.1: enabled 0
1722 12:15:59.012099 PCI: 00:1f.2: enabled 1
1723 12:15:59.015223 PCI: 00:1f.3: enabled 1
1724 12:15:59.018500 PCI: 00:1f.4: enabled 0
1725 12:15:59.021921 PCI: 00:1f.5: enabled 1
1726 12:15:59.022033 PCI: 00:1f.6: enabled 0
1727 12:15:59.025104 PCI: 00:1f.7: enabled 0
1728 12:15:59.028977 APIC: 00: enabled 1
1729 12:15:59.029085 GENERIC: 0.0: enabled 1
1730 12:15:59.031946 GENERIC: 0.0: enabled 1
1731 12:15:59.035057 GENERIC: 1.0: enabled 1
1732 12:15:59.038183 GENERIC: 0.0: enabled 1
1733 12:15:59.038305 GENERIC: 1.0: enabled 1
1734 12:15:59.041712 USB0 port 0: enabled 1
1735 12:15:59.045356 GENERIC: 0.0: enabled 1
1736 12:15:59.045745 USB0 port 0: enabled 1
1737 12:15:59.049152 GENERIC: 0.0: enabled 1
1738 12:15:59.052172 I2C: 00:1a: enabled 1
1739 12:15:59.055221 I2C: 00:31: enabled 1
1740 12:15:59.055728 I2C: 00:32: enabled 1
1741 12:15:59.058938 I2C: 00:10: enabled 1
1742 12:15:59.062488 I2C: 00:15: enabled 1
1743 12:15:59.062975 GENERIC: 0.0: enabled 0
1744 12:15:59.065659 GENERIC: 1.0: enabled 0
1745 12:15:59.068771 GENERIC: 0.0: enabled 1
1746 12:15:59.069195 SPI: 00: enabled 1
1747 12:15:59.071957 SPI: 00: enabled 1
1748 12:15:59.075219 PNP: 0c09.0: enabled 1
1749 12:15:59.075644 GENERIC: 0.0: enabled 1
1750 12:15:59.078845 USB3 port 0: enabled 1
1751 12:15:59.081732 USB3 port 1: enabled 1
1752 12:15:59.085871 USB3 port 2: enabled 0
1753 12:15:59.086390 USB3 port 3: enabled 0
1754 12:15:59.088860 USB2 port 0: enabled 0
1755 12:15:59.092091 USB2 port 1: enabled 1
1756 12:15:59.092688 USB2 port 2: enabled 1
1757 12:15:59.095300 USB2 port 3: enabled 0
1758 12:15:59.098441 USB2 port 4: enabled 1
1759 12:15:59.098864 USB2 port 5: enabled 0
1760 12:15:59.101835 USB2 port 6: enabled 0
1761 12:15:59.105550 USB2 port 7: enabled 0
1762 12:15:59.108924 USB2 port 8: enabled 0
1763 12:15:59.109444 USB2 port 9: enabled 0
1764 12:15:59.111927 USB3 port 0: enabled 0
1765 12:15:59.115318 USB3 port 1: enabled 1
1766 12:15:59.115965 USB3 port 2: enabled 0
1767 12:15:59.118586 USB3 port 3: enabled 0
1768 12:15:59.121741 GENERIC: 0.0: enabled 1
1769 12:15:59.124950 GENERIC: 1.0: enabled 1
1770 12:15:59.125368 APIC: 01: enabled 1
1771 12:15:59.128825 APIC: 03: enabled 1
1772 12:15:59.129345 APIC: 07: enabled 1
1773 12:15:59.132269 APIC: 05: enabled 1
1774 12:15:59.135050 APIC: 04: enabled 1
1775 12:15:59.135469 APIC: 02: enabled 1
1776 12:15:59.138211 APIC: 06: enabled 1
1777 12:15:59.141596 PCI: 01:00.0: enabled 1
1778 12:15:59.144776 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1779 12:15:59.151642 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1780 12:15:59.154925 ELOG: NV offset 0xf30000 size 0x1000
1781 12:15:59.161236 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1782 12:15:59.168080 ELOG: Event(17) added with size 13 at 2023-06-14 12:15:58 UTC
1783 12:15:59.175121 ELOG: Event(92) added with size 9 at 2023-06-14 12:15:58 UTC
1784 12:15:59.181826 ELOG: Event(93) added with size 9 at 2023-06-14 12:15:58 UTC
1785 12:15:59.188171 ELOG: Event(9E) added with size 10 at 2023-06-14 12:15:58 UTC
1786 12:15:59.194862 ELOG: Event(9F) added with size 14 at 2023-06-14 12:15:58 UTC
1787 12:15:59.201499 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1788 12:15:59.204804 ELOG: Event(A1) added with size 10 at 2023-06-14 12:15:58 UTC
1789 12:15:59.211201 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1790 12:15:59.217838 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1791 12:15:59.220906 Finalize devices...
1792 12:15:59.221329 Devices finalized
1793 12:15:59.227718 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1794 12:15:59.234494 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1795 12:15:59.237813 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1796 12:15:59.243993 ME: HFSTS1 : 0x80030055
1797 12:15:59.248184 ME: HFSTS2 : 0x30280116
1798 12:15:59.251244 ME: HFSTS3 : 0x00000050
1799 12:15:59.257270 ME: HFSTS4 : 0x00004000
1800 12:15:59.260949 ME: HFSTS5 : 0x00000000
1801 12:15:59.264166 ME: HFSTS6 : 0x00400006
1802 12:15:59.270904 ME: Manufacturing Mode : YES
1803 12:15:59.274007 ME: SPI Protection Mode Enabled : NO
1804 12:15:59.277602 ME: FW Partition Table : OK
1805 12:15:59.280767 ME: Bringup Loader Failure : NO
1806 12:15:59.284074 ME: Firmware Init Complete : NO
1807 12:15:59.287368 ME: Boot Options Present : NO
1808 12:15:59.291040 ME: Update In Progress : NO
1809 12:15:59.294327 ME: D0i3 Support : YES
1810 12:15:59.300996 ME: Low Power State Enabled : NO
1811 12:15:59.304237 ME: CPU Replaced : YES
1812 12:15:59.307409 ME: CPU Replacement Valid : YES
1813 12:15:59.310969 ME: Current Working State : 5
1814 12:15:59.314143 ME: Current Operation State : 1
1815 12:15:59.317420 ME: Current Operation Mode : 3
1816 12:15:59.320960 ME: Error Code : 0
1817 12:15:59.324128 ME: Enhanced Debug Mode : NO
1818 12:15:59.327273 ME: CPU Debug Disabled : YES
1819 12:15:59.333675 ME: TXT Support : NO
1820 12:15:59.336969 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1821 12:15:59.347037 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1822 12:15:59.350225 CBFS: 'fallback/slic' not found.
1823 12:15:59.354050 ACPI: Writing ACPI tables at 76b01000.
1824 12:15:59.354475 ACPI: * FACS
1825 12:15:59.357295 ACPI: * DSDT
1826 12:15:59.360450 Ramoops buffer: 0x100000@0x76a00000.
1827 12:15:59.366894 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1828 12:15:59.370100 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1829 12:15:59.373906 Google Chrome EC: version:
1830 12:15:59.376837 ro: voema_v2.0.7540-147f8d37d1
1831 12:15:59.380461 rw: voema_v2.0.7540-147f8d37d1
1832 12:15:59.383444 running image: 2
1833 12:15:59.387122 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1834 12:15:59.391924 ACPI: * FADT
1835 12:15:59.392543 SCI is IRQ9
1836 12:15:59.399253 ACPI: added table 1/32, length now 40
1837 12:15:59.399771 ACPI: * SSDT
1838 12:15:59.402193 Found 1 CPU(s) with 8 core(s) each.
1839 12:15:59.408771 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1840 12:15:59.411673 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1841 12:15:59.415588 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1842 12:15:59.418670 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1843 12:15:59.425182 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1844 12:15:59.431617 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1845 12:15:59.435031 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1846 12:15:59.441994 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1847 12:15:59.448317 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1848 12:15:59.451428 \_SB.PCI0.RP09: Added StorageD3Enable property
1849 12:15:59.458588 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1850 12:15:59.461848 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1851 12:15:59.468647 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1852 12:15:59.471951 PS2K: Passing 80 keymaps to kernel
1853 12:15:59.478369 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1854 12:15:59.485455 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1855 12:15:59.491800 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1856 12:15:59.498005 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1857 12:15:59.504865 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1858 12:15:59.511317 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1859 12:15:59.517885 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1860 12:15:59.524945 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1861 12:15:59.528132 ACPI: added table 2/32, length now 44
1862 12:15:59.528584 ACPI: * MCFG
1863 12:15:59.531440 ACPI: added table 3/32, length now 48
1864 12:15:59.534875 ACPI: * TPM2
1865 12:15:59.537988 TPM2 log created at 0x769f0000
1866 12:15:59.541159 ACPI: added table 4/32, length now 52
1867 12:15:59.541636 ACPI: * MADT
1868 12:15:59.544522 SCI is IRQ9
1869 12:15:59.547518 ACPI: added table 5/32, length now 56
1870 12:15:59.550934 current = 76b09850
1871 12:15:59.551878 ACPI: * DMAR
1872 12:15:59.554624 ACPI: added table 6/32, length now 60
1873 12:15:59.557708 ACPI: added table 7/32, length now 64
1874 12:15:59.560925 ACPI: * HPET
1875 12:15:59.564350 ACPI: added table 8/32, length now 68
1876 12:15:59.564790 ACPI: done.
1877 12:15:59.567529 ACPI tables: 35216 bytes.
1878 12:15:59.571191 smbios_write_tables: 769ef000
1879 12:15:59.574494 EC returned error result code 3
1880 12:15:59.577700 Couldn't obtain OEM name from CBI
1881 12:15:59.581535 Create SMBIOS type 16
1882 12:15:59.584767 Create SMBIOS type 17
1883 12:15:59.588566 GENERIC: 0.0 (WIFI Device)
1884 12:15:59.588871 SMBIOS tables: 1750 bytes.
1885 12:15:59.594919 Writing table forward entry at 0x00000500
1886 12:15:59.601597 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1887 12:15:59.604985 Writing coreboot table at 0x76b25000
1888 12:15:59.611161 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1889 12:15:59.614969 1. 0000000000001000-000000000009ffff: RAM
1890 12:15:59.618247 2. 00000000000a0000-00000000000fffff: RESERVED
1891 12:15:59.624580 3. 0000000000100000-00000000769eefff: RAM
1892 12:15:59.627998 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1893 12:15:59.634435 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1894 12:15:59.641007 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1895 12:15:59.644741 7. 0000000077000000-000000007fbfffff: RESERVED
1896 12:15:59.648030 8. 00000000c0000000-00000000cfffffff: RESERVED
1897 12:15:59.654639 9. 00000000f8000000-00000000f9ffffff: RESERVED
1898 12:15:59.657896 10. 00000000fb000000-00000000fb000fff: RESERVED
1899 12:15:59.664841 11. 00000000fe000000-00000000fe00ffff: RESERVED
1900 12:15:59.668069 12. 00000000fed80000-00000000fed87fff: RESERVED
1901 12:15:59.674587 13. 00000000fed90000-00000000fed92fff: RESERVED
1902 12:15:59.677643 14. 00000000feda0000-00000000feda1fff: RESERVED
1903 12:15:59.684185 15. 00000000fedc0000-00000000feddffff: RESERVED
1904 12:15:59.687327 16. 0000000100000000-00000002803fffff: RAM
1905 12:15:59.690675 Passing 4 GPIOs to payload:
1906 12:15:59.693873 NAME | PORT | POLARITY | VALUE
1907 12:15:59.701047 lid | undefined | high | high
1908 12:15:59.707591 power | undefined | high | low
1909 12:15:59.710822 oprom | undefined | high | low
1910 12:15:59.717316 EC in RW | 0x000000e5 | high | high
1911 12:15:59.724177 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 8634
1912 12:15:59.724324 coreboot table: 1576 bytes.
1913 12:15:59.730642 IMD ROOT 0. 0x76fff000 0x00001000
1914 12:15:59.733849 IMD SMALL 1. 0x76ffe000 0x00001000
1915 12:15:59.737169 FSP MEMORY 2. 0x76c4e000 0x003b0000
1916 12:15:59.740949 VPD 3. 0x76c4d000 0x00000367
1917 12:15:59.744040 RO MCACHE 4. 0x76c4c000 0x00000fdc
1918 12:15:59.747166 CONSOLE 5. 0x76c2c000 0x00020000
1919 12:15:59.750436 FMAP 6. 0x76c2b000 0x00000578
1920 12:15:59.753676 TIME STAMP 7. 0x76c2a000 0x00000910
1921 12:15:59.760795 VBOOT WORK 8. 0x76c16000 0x00014000
1922 12:15:59.763888 ROMSTG STCK 9. 0x76c15000 0x00001000
1923 12:15:59.767177 AFTER CAR 10. 0x76c0a000 0x0000b000
1924 12:15:59.770868 RAMSTAGE 11. 0x76b97000 0x00073000
1925 12:15:59.774231 REFCODE 12. 0x76b42000 0x00055000
1926 12:15:59.777440 SMM BACKUP 13. 0x76b32000 0x00010000
1927 12:15:59.780571 4f444749 14. 0x76b30000 0x00002000
1928 12:15:59.783731 EXT VBT15. 0x76b2d000 0x0000219f
1929 12:15:59.787015 COREBOOT 16. 0x76b25000 0x00008000
1930 12:15:59.794072 ACPI 17. 0x76b01000 0x00024000
1931 12:15:59.797417 ACPI GNVS 18. 0x76b00000 0x00001000
1932 12:15:59.800729 RAMOOPS 19. 0x76a00000 0x00100000
1933 12:15:59.804000 TPM2 TCGLOG20. 0x769f0000 0x00010000
1934 12:15:59.807194 SMBIOS 21. 0x769ef000 0x00000800
1935 12:15:59.810405 IMD small region:
1936 12:15:59.813502 IMD ROOT 0. 0x76ffec00 0x00000400
1937 12:15:59.817096 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1938 12:15:59.820128 POWER STATE 2. 0x76ffeb80 0x00000044
1939 12:15:59.823918 ROMSTAGE 3. 0x76ffeb60 0x00000004
1940 12:15:59.827059 MEM INFO 4. 0x76ffe980 0x000001e0
1941 12:15:59.833721 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1942 12:15:59.836832 MTRR: Physical address space:
1943 12:15:59.843893 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1944 12:15:59.850228 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1945 12:15:59.856523 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1946 12:15:59.863184 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1947 12:15:59.870289 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1948 12:15:59.873367 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1949 12:15:59.880000 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1950 12:15:59.886927 MTRR: Fixed MSR 0x250 0x0606060606060606
1951 12:15:59.890305 MTRR: Fixed MSR 0x258 0x0606060606060606
1952 12:15:59.893604 MTRR: Fixed MSR 0x259 0x0000000000000000
1953 12:15:59.896815 MTRR: Fixed MSR 0x268 0x0606060606060606
1954 12:15:59.903555 MTRR: Fixed MSR 0x269 0x0606060606060606
1955 12:15:59.907015 MTRR: Fixed MSR 0x26a 0x0606060606060606
1956 12:15:59.910328 MTRR: Fixed MSR 0x26b 0x0606060606060606
1957 12:15:59.913576 MTRR: Fixed MSR 0x26c 0x0606060606060606
1958 12:15:59.920060 MTRR: Fixed MSR 0x26d 0x0606060606060606
1959 12:15:59.923061 MTRR: Fixed MSR 0x26e 0x0606060606060606
1960 12:15:59.926722 MTRR: Fixed MSR 0x26f 0x0606060606060606
1961 12:15:59.930480 call enable_fixed_mtrr()
1962 12:15:59.933414 CPU physical address size: 39 bits
1963 12:15:59.939928 MTRR: default type WB/UC MTRR counts: 6/6.
1964 12:15:59.943583 MTRR: UC selected as default type.
1965 12:15:59.946601 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1966 12:15:59.952972 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1967 12:15:59.959741 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1968 12:15:59.966260 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1969 12:15:59.973496 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1970 12:15:59.979544 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1971 12:15:59.979670
1972 12:15:59.982985 MTRR check
1973 12:15:59.983111 Fixed MTRRs : Enabled
1974 12:15:59.986244 Variable MTRRs: Enabled
1975 12:15:59.986369
1976 12:15:59.989865 MTRR: Fixed MSR 0x250 0x0606060606060606
1977 12:15:59.996586 MTRR: Fixed MSR 0x258 0x0606060606060606
1978 12:15:59.999848 MTRR: Fixed MSR 0x259 0x0000000000000000
1979 12:16:00.003206 MTRR: Fixed MSR 0x268 0x0606060606060606
1980 12:16:00.006609 MTRR: Fixed MSR 0x269 0x0606060606060606
1981 12:16:00.013199 MTRR: Fixed MSR 0x26a 0x0606060606060606
1982 12:16:00.016602 MTRR: Fixed MSR 0x26b 0x0606060606060606
1983 12:16:00.019720 MTRR: Fixed MSR 0x26c 0x0606060606060606
1984 12:16:00.022730 MTRR: Fixed MSR 0x26d 0x0606060606060606
1985 12:16:00.030122 MTRR: Fixed MSR 0x26e 0x0606060606060606
1986 12:16:00.033112 MTRR: Fixed MSR 0x26f 0x0606060606060606
1987 12:16:00.039446 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1988 12:16:00.042985 call enable_fixed_mtrr()
1989 12:16:00.046521 Checking cr50 for pending updates
1990 12:16:00.050117 CPU physical address size: 39 bits
1991 12:16:00.053710 MTRR: Fixed MSR 0x250 0x0606060606060606
1992 12:16:00.056591 MTRR: Fixed MSR 0x250 0x0606060606060606
1993 12:16:00.060105 MTRR: Fixed MSR 0x258 0x0606060606060606
1994 12:16:00.063354 MTRR: Fixed MSR 0x259 0x0000000000000000
1995 12:16:00.069996 MTRR: Fixed MSR 0x268 0x0606060606060606
1996 12:16:00.073255 MTRR: Fixed MSR 0x269 0x0606060606060606
1997 12:16:00.077044 MTRR: Fixed MSR 0x26a 0x0606060606060606
1998 12:16:00.080101 MTRR: Fixed MSR 0x26b 0x0606060606060606
1999 12:16:00.086755 MTRR: Fixed MSR 0x26c 0x0606060606060606
2000 12:16:00.089993 MTRR: Fixed MSR 0x26d 0x0606060606060606
2001 12:16:00.093128 MTRR: Fixed MSR 0x26e 0x0606060606060606
2002 12:16:00.096863 MTRR: Fixed MSR 0x26f 0x0606060606060606
2003 12:16:00.104095 MTRR: Fixed MSR 0x258 0x0606060606060606
2004 12:16:00.104655 call enable_fixed_mtrr()
2005 12:16:00.110437 MTRR: Fixed MSR 0x259 0x0000000000000000
2006 12:16:00.114001 MTRR: Fixed MSR 0x268 0x0606060606060606
2007 12:16:00.117223 MTRR: Fixed MSR 0x269 0x0606060606060606
2008 12:16:00.121076 MTRR: Fixed MSR 0x26a 0x0606060606060606
2009 12:16:00.127383 MTRR: Fixed MSR 0x26b 0x0606060606060606
2010 12:16:00.130662 MTRR: Fixed MSR 0x26c 0x0606060606060606
2011 12:16:00.133960 MTRR: Fixed MSR 0x26d 0x0606060606060606
2012 12:16:00.137236 MTRR: Fixed MSR 0x26e 0x0606060606060606
2013 12:16:00.144182 MTRR: Fixed MSR 0x26f 0x0606060606060606
2014 12:16:00.147587 CPU physical address size: 39 bits
2015 12:16:00.150634 call enable_fixed_mtrr()
2016 12:16:00.154128 Reading cr50 TPM mode
2017 12:16:00.157808 CPU physical address size: 39 bits
2018 12:16:00.160929 MTRR: Fixed MSR 0x250 0x0606060606060606
2019 12:16:00.164813 MTRR: Fixed MSR 0x250 0x0606060606060606
2020 12:16:00.167603 MTRR: Fixed MSR 0x258 0x0606060606060606
2021 12:16:00.174105 MTRR: Fixed MSR 0x259 0x0000000000000000
2022 12:16:00.177691 MTRR: Fixed MSR 0x268 0x0606060606060606
2023 12:16:00.180818 MTRR: Fixed MSR 0x269 0x0606060606060606
2024 12:16:00.183986 MTRR: Fixed MSR 0x26a 0x0606060606060606
2025 12:16:00.187819 MTRR: Fixed MSR 0x26b 0x0606060606060606
2026 12:16:00.194528 MTRR: Fixed MSR 0x26c 0x0606060606060606
2027 12:16:00.197569 MTRR: Fixed MSR 0x26d 0x0606060606060606
2028 12:16:00.200665 MTRR: Fixed MSR 0x26e 0x0606060606060606
2029 12:16:00.204017 MTRR: Fixed MSR 0x26f 0x0606060606060606
2030 12:16:00.211746 MTRR: Fixed MSR 0x258 0x0606060606060606
2031 12:16:00.212137 call enable_fixed_mtrr()
2032 12:16:00.218374 MTRR: Fixed MSR 0x259 0x0000000000000000
2033 12:16:00.221625 MTRR: Fixed MSR 0x268 0x0606060606060606
2034 12:16:00.224947 MTRR: Fixed MSR 0x269 0x0606060606060606
2035 12:16:00.228135 MTRR: Fixed MSR 0x26a 0x0606060606060606
2036 12:16:00.235406 MTRR: Fixed MSR 0x26b 0x0606060606060606
2037 12:16:00.238754 MTRR: Fixed MSR 0x26c 0x0606060606060606
2038 12:16:00.241910 MTRR: Fixed MSR 0x26d 0x0606060606060606
2039 12:16:00.245092 MTRR: Fixed MSR 0x26e 0x0606060606060606
2040 12:16:00.251473 MTRR: Fixed MSR 0x26f 0x0606060606060606
2041 12:16:00.254791 CPU physical address size: 39 bits
2042 12:16:00.258533 call enable_fixed_mtrr()
2043 12:16:00.265092 BS: BS_PAYLOAD_LOAD entry times (exec / console): 112 / 6 ms
2044 12:16:00.268125 MTRR: Fixed MSR 0x250 0x0606060606060606
2045 12:16:00.271841 MTRR: Fixed MSR 0x250 0x0606060606060606
2046 12:16:00.278430 MTRR: Fixed MSR 0x258 0x0606060606060606
2047 12:16:00.281199 MTRR: Fixed MSR 0x259 0x0000000000000000
2048 12:16:00.284854 MTRR: Fixed MSR 0x268 0x0606060606060606
2049 12:16:00.288402 MTRR: Fixed MSR 0x269 0x0606060606060606
2050 12:16:00.291521 MTRR: Fixed MSR 0x26a 0x0606060606060606
2051 12:16:00.298392 MTRR: Fixed MSR 0x26b 0x0606060606060606
2052 12:16:00.301728 MTRR: Fixed MSR 0x26c 0x0606060606060606
2053 12:16:00.304955 MTRR: Fixed MSR 0x26d 0x0606060606060606
2054 12:16:00.307712 MTRR: Fixed MSR 0x26e 0x0606060606060606
2055 12:16:00.314855 MTRR: Fixed MSR 0x26f 0x0606060606060606
2056 12:16:00.318137 MTRR: Fixed MSR 0x258 0x0606060606060606
2057 12:16:00.321337 call enable_fixed_mtrr()
2058 12:16:00.324684 MTRR: Fixed MSR 0x259 0x0000000000000000
2059 12:16:00.327994 MTRR: Fixed MSR 0x268 0x0606060606060606
2060 12:16:00.334324 MTRR: Fixed MSR 0x269 0x0606060606060606
2061 12:16:00.337756 MTRR: Fixed MSR 0x26a 0x0606060606060606
2062 12:16:00.340866 MTRR: Fixed MSR 0x26b 0x0606060606060606
2063 12:16:00.344030 MTRR: Fixed MSR 0x26c 0x0606060606060606
2064 12:16:00.351100 MTRR: Fixed MSR 0x26d 0x0606060606060606
2065 12:16:00.354455 MTRR: Fixed MSR 0x26e 0x0606060606060606
2066 12:16:00.357771 MTRR: Fixed MSR 0x26f 0x0606060606060606
2067 12:16:00.361082 CPU physical address size: 39 bits
2068 12:16:00.367472 call enable_fixed_mtrr()
2069 12:16:00.371093 CPU physical address size: 39 bits
2070 12:16:00.377597 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2071 12:16:00.380721 CPU physical address size: 39 bits
2072 12:16:00.384357 Checking segment from ROM address 0xffc02b38
2073 12:16:00.390620 Checking segment from ROM address 0xffc02b54
2074 12:16:00.394153 Loading segment from ROM address 0xffc02b38
2075 12:16:00.397137 code (compression=0)
2076 12:16:00.404120 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2077 12:16:00.413778 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2078 12:16:00.417107 it's not compressed!
2079 12:16:00.554779 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2080 12:16:00.561143 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2081 12:16:00.568385 Loading segment from ROM address 0xffc02b54
2082 12:16:00.568785 Entry Point 0x30000000
2083 12:16:00.571769 Loaded segments
2084 12:16:00.578281 BS: BS_PAYLOAD_LOAD run times (exec / console): 244 / 63 ms
2085 12:16:00.620637 Finalizing chipset.
2086 12:16:00.624388 Finalizing SMM.
2087 12:16:00.624827 APMC done.
2088 12:16:00.630952 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2089 12:16:00.634235 mp_park_aps done after 0 msecs.
2090 12:16:00.637572 Jumping to boot code at 0x30000000(0x76b25000)
2091 12:16:00.647259 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2092 12:16:00.647828
2093 12:16:00.648338
2094 12:16:00.648773
2095 12:16:00.650385 Starting depthcharge on Voema...
2096 12:16:00.650838
2097 12:16:00.652182 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2098 12:16:00.652725 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2099 12:16:00.653115 Setting prompt string to ['volteer:']
2100 12:16:00.653505 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2101 12:16:00.660617 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2102 12:16:00.661049
2103 12:16:00.667159 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2104 12:16:00.667587
2105 12:16:00.673747 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2106 12:16:00.674224
2107 12:16:00.676996 Failed to find eMMC card reader
2108 12:16:00.677388
2109 12:16:00.677699 Wipe memory regions:
2110 12:16:00.677989
2111 12:16:00.683713 [0x00000000001000, 0x000000000a0000)
2112 12:16:00.684137
2113 12:16:00.686818 [0x00000000100000, 0x00000030000000)
2114 12:16:00.711893
2115 12:16:00.715481 [0x00000032662db0, 0x000000769ef000)
2116 12:16:00.750755
2117 12:16:00.753900 [0x00000100000000, 0x00000280400000)
2118 12:16:00.953339
2119 12:16:00.956536 ec_init: CrosEC protocol v3 supported (256, 256)
2120 12:16:00.956984
2121 12:16:00.963594 update_port_state: port C0 state: usb enable 1 mux conn 0
2122 12:16:00.964036
2123 12:16:00.973133 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2124 12:16:00.973578
2125 12:16:00.980363 pmc_check_ipc_sts: STS_BUSY done after 1517 us
2126 12:16:00.980925
2127 12:16:00.982761 send_conn_disc_msg: pmc_send_cmd succeeded
2128 12:16:01.414595
2129 12:16:01.415115 R8152: Initializing
2130 12:16:01.415460
2131 12:16:01.417681 Version 6 (ocp_data = 5c30)
2132 12:16:01.418110
2133 12:16:01.420725 R8152: Done initializing
2134 12:16:01.421152
2135 12:16:01.423805 Adding net device
2136 12:16:01.726393
2137 12:16:01.729503 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2138 12:16:01.729934
2139 12:16:01.730275
2140 12:16:01.730593
2141 12:16:01.733148 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2143 12:16:01.834445 volteer: tftpboot 192.168.201.1 10724478/tftp-deploy-aphn9vco/kernel/bzImage 10724478/tftp-deploy-aphn9vco/kernel/cmdline 10724478/tftp-deploy-aphn9vco/ramdisk/ramdisk.cpio.gz
2144 12:16:01.835119 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2145 12:16:01.835629 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2146 12:16:01.839902 tftpboot 192.168.201.1 10724478/tftp-deploy-aphn9vco/kernel/bzIploy-aphn9vco/kernel/cmdline 10724478/tftp-deploy-aphn9vco/ramdisk/ramdisk.cpio.gz
2147 12:16:01.840387
2148 12:16:01.840790 Waiting for link
2149 12:16:02.043015
2150 12:16:02.043568 done.
2151 12:16:02.043949
2152 12:16:02.044359 MAC: 00:24:32:30:7b:87
2153 12:16:02.045049
2154 12:16:02.046133 Sending DHCP discover... done.
2155 12:16:02.046634
2156 12:16:02.049456 Waiting for reply... done.
2157 12:16:02.050018
2158 12:16:02.052526 Sending DHCP request... done.
2159 12:16:02.052997
2160 12:16:02.111523 Waiting for reply... done.
2161 12:16:02.112070
2162 12:16:02.112473 My ip is 192.168.201.19
2163 12:16:02.112847
2164 12:16:02.114711 The DHCP server ip is 192.168.201.1
2165 12:16:02.117618
2166 12:16:02.121174 TFTP server IP predefined by user: 192.168.201.1
2167 12:16:02.121749
2168 12:16:02.127831 Bootfile predefined by user: 10724478/tftp-deploy-aphn9vco/kernel/bzImage
2169 12:16:02.128254
2170 12:16:02.131088 Sending tftp read request... done.
2171 12:16:02.131506
2172 12:16:02.139664 Waiting for the transfer...
2173 12:16:02.140139
2174 12:16:02.804239 00000000 ################################################################
2175 12:16:02.804804
2176 12:16:03.489195 00080000 ################################################################
2177 12:16:03.489715
2178 12:16:04.206908 00100000 ################################################################
2179 12:16:04.207486
2180 12:16:04.896400 00180000 ################################################################
2181 12:16:04.896909
2182 12:16:05.597866 00200000 ################################################################
2183 12:16:05.598360
2184 12:16:06.324369 00280000 ################################################################
2185 12:16:06.324865
2186 12:16:06.971679 00300000 ################################################################
2187 12:16:06.972214
2188 12:16:07.588922 00380000 ################################################################
2189 12:16:07.589143
2190 12:16:08.143624 00400000 ################################################################
2191 12:16:08.143847
2192 12:16:08.749860 00480000 ################################################################
2193 12:16:08.750398
2194 12:16:09.420025 00500000 ################################################################
2195 12:16:09.420183
2196 12:16:10.030950 00580000 ################################################################
2197 12:16:10.031115
2198 12:16:10.643248 00600000 ################################################################
2199 12:16:10.643450
2200 12:16:11.376930 00680000 ################################################################
2201 12:16:11.377470
2202 12:16:12.096665 00700000 ################################################################
2203 12:16:12.097207
2204 12:16:12.787802 00780000 ################################################################
2205 12:16:12.788261
2206 12:16:13.420813 00800000 ################################################################
2207 12:16:13.421335
2208 12:16:14.070102 00880000 ################################################################
2209 12:16:14.070805
2210 12:16:14.728819 00900000 ################################################################
2211 12:16:14.729407
2212 12:16:15.366572 00980000 ################################################################
2213 12:16:15.366759
2214 12:16:15.804531 00a00000 ############################################### done.
2215 12:16:15.805036
2216 12:16:15.807511 The bootfile was 10863104 bytes long.
2217 12:16:15.807935
2218 12:16:15.811344 Sending tftp read request... done.
2219 12:16:15.812022
2220 12:16:15.814419 Waiting for the transfer...
2221 12:16:15.814991
2222 12:16:16.514921 00000000 ################################################################
2223 12:16:16.515489
2224 12:16:17.243000 00080000 ################################################################
2225 12:16:17.243523
2226 12:16:17.965021 00100000 ################################################################
2227 12:16:17.965547
2228 12:16:18.675230 00180000 ################################################################
2229 12:16:18.675721
2230 12:16:19.360039 00200000 ################################################################
2231 12:16:19.360613
2232 12:16:20.065866 00280000 ################################################################
2233 12:16:20.066045
2234 12:16:20.715056 00300000 ################################################################
2235 12:16:20.715237
2236 12:16:21.382318 00380000 ################################################################
2237 12:16:21.382512
2238 12:16:22.060872 00400000 ################################################################
2239 12:16:22.061398
2240 12:16:22.769380 00480000 ################################################################
2241 12:16:22.770083
2242 12:16:23.454654 00500000 ################################################################
2243 12:16:23.455363
2244 12:16:24.114437 00580000 ################################################################
2245 12:16:24.115100
2246 12:16:24.808106 00600000 ################################################################
2247 12:16:24.808406
2248 12:16:25.515151 00680000 ################################################################
2249 12:16:25.515318
2250 12:16:26.163625 00700000 ################################################################
2251 12:16:26.163792
2252 12:16:26.833054 00780000 ################################################################
2253 12:16:26.833214
2254 12:16:27.480104 00800000 ################################################################
2255 12:16:27.480258
2256 12:16:27.886783 00880000 ###################################### done.
2257 12:16:27.886937
2258 12:16:27.890638 Sending tftp read request... done.
2259 12:16:27.890734
2260 12:16:27.893822 Waiting for the transfer...
2261 12:16:27.893917
2262 12:16:27.893990 00000000 # done.
2263 12:16:27.894061
2264 12:16:27.903666 Command line loaded dynamically from TFTP file: 10724478/tftp-deploy-aphn9vco/kernel/cmdline
2265 12:16:27.903764
2266 12:16:27.917054 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2267 12:16:27.921796
2268 12:16:27.924684 Shutting down all USB controllers.
2269 12:16:27.924777
2270 12:16:27.924851 Removing current net device
2271 12:16:27.924920
2272 12:16:27.928167 Finalizing coreboot
2273 12:16:27.928259
2274 12:16:27.934751 Exiting depthcharge with code 4 at timestamp: 35926281
2275 12:16:27.934845
2276 12:16:27.934924
2277 12:16:27.934994 Starting kernel ...
2278 12:16:27.935061
2279 12:16:27.935127
2280 12:16:27.935529 end: 2.2.4 bootloader-commands (duration 00:00:27) [common]
2281 12:16:27.935637 start: 2.2.5 auto-login-action (timeout 00:04:17) [common]
2282 12:16:27.935718 Setting prompt string to ['Linux version [0-9]']
2283 12:16:27.935793 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2284 12:16:27.935868 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2286 12:20:44.935956 end: 2.2.5 auto-login-action (duration 00:04:17) [common]
2288 12:20:44.936322 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 257 seconds'
2290 12:20:44.936576 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2293 12:20:44.936891 end: 2 depthcharge-action (duration 00:05:00) [common]
2295 12:20:44.937291 Cleaning after the job
2296 12:20:44.937419 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10724478/tftp-deploy-aphn9vco/ramdisk
2297 12:20:44.938716 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10724478/tftp-deploy-aphn9vco/kernel
2298 12:20:44.940196 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10724478/tftp-deploy-aphn9vco/modules
2299 12:20:44.940846 start: 5.1 power-off (timeout 00:00:30) [common]
2300 12:20:44.941053 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-4' '--port=1' '--command=off'
2301 12:20:45.018318 >> Command sent successfully.
2302 12:20:45.020942 Returned 0 in 0 seconds
2303 12:20:45.121359 end: 5.1 power-off (duration 00:00:00) [common]
2305 12:20:45.121700 start: 5.2 read-feedback (timeout 00:10:00) [common]
2306 12:20:45.121981 Listened to connection for namespace 'common' for up to 1s
2307 12:20:46.123028 Finalising connection for namespace 'common'
2308 12:20:46.123218 Disconnecting from shell: Finalise
2309 12:20:46.123305
2310 12:20:46.223671 end: 5.2 read-feedback (duration 00:00:01) [common]
2311 12:20:46.223814 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10724478
2312 12:20:46.239445 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10724478
2313 12:20:46.239607 JobError: Your job cannot terminate cleanly.