Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
1 12:17:25.029026 lava-dispatcher, installed at version: 2023.05.1
2 12:17:25.029303 start: 0 validate
3 12:17:25.029524 Start time: 2023-06-14 12:17:25.029516+00:00 (UTC)
4 12:17:25.029692 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:17:25.029901 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230609.0%2Famd64%2Finitrd.cpio.gz exists
6 12:17:25.289602 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:17:25.289801 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.284-cip99-114-g02e97826987bf%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:17:25.290821 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:17:25.290946 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230609.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:17:25.557275 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:17:25.557507 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.284-cip99-114-g02e97826987bf%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:17:25.560696 validate duration: 0.53
14 12:17:25.561064 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:17:25.561249 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:17:25.561378 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:17:25.561548 Not decompressing ramdisk as can be used compressed.
18 12:17:25.561672 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230609.0/amd64/initrd.cpio.gz
19 12:17:25.561769 saving as /var/lib/lava/dispatcher/tmp/10724470/tftp-deploy-0_18fyus/ramdisk/initrd.cpio.gz
20 12:17:25.561898 total size: 5432875 (5MB)
21 12:17:25.563415 progress 0% (0MB)
22 12:17:25.565320 progress 5% (0MB)
23 12:17:25.566856 progress 10% (0MB)
24 12:17:25.568419 progress 15% (0MB)
25 12:17:25.570127 progress 20% (1MB)
26 12:17:25.571638 progress 25% (1MB)
27 12:17:25.573238 progress 30% (1MB)
28 12:17:25.574891 progress 35% (1MB)
29 12:17:25.576410 progress 40% (2MB)
30 12:17:25.577900 progress 45% (2MB)
31 12:17:25.579459 progress 50% (2MB)
32 12:17:25.581108 progress 55% (2MB)
33 12:17:25.582553 progress 60% (3MB)
34 12:17:25.584071 progress 65% (3MB)
35 12:17:25.585776 progress 70% (3MB)
36 12:17:25.587238 progress 75% (3MB)
37 12:17:25.588681 progress 80% (4MB)
38 12:17:25.590232 progress 85% (4MB)
39 12:17:25.591856 progress 90% (4MB)
40 12:17:25.593317 progress 95% (4MB)
41 12:17:25.594793 progress 100% (5MB)
42 12:17:25.595069 5MB downloaded in 0.03s (156.15MB/s)
43 12:17:25.595273 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:17:25.595657 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:17:25.595776 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:17:25.595888 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:17:25.596018 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.284-cip99-114-g02e97826987bf/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:17:25.596097 saving as /var/lib/lava/dispatcher/tmp/10724470/tftp-deploy-0_18fyus/kernel/bzImage
50 12:17:25.596179 total size: 10863104 (10MB)
51 12:17:25.596239 No compression specified
52 12:17:25.597765 progress 0% (0MB)
53 12:17:25.600950 progress 5% (0MB)
54 12:17:25.604050 progress 10% (1MB)
55 12:17:25.607047 progress 15% (1MB)
56 12:17:25.610203 progress 20% (2MB)
57 12:17:25.613118 progress 25% (2MB)
58 12:17:25.616031 progress 30% (3MB)
59 12:17:25.619114 progress 35% (3MB)
60 12:17:25.621974 progress 40% (4MB)
61 12:17:25.625077 progress 45% (4MB)
62 12:17:25.627916 progress 50% (5MB)
63 12:17:25.631117 progress 55% (5MB)
64 12:17:25.634019 progress 60% (6MB)
65 12:17:25.637150 progress 65% (6MB)
66 12:17:25.640226 progress 70% (7MB)
67 12:17:25.643410 progress 75% (7MB)
68 12:17:25.646715 progress 80% (8MB)
69 12:17:25.649688 progress 85% (8MB)
70 12:17:25.653095 progress 90% (9MB)
71 12:17:25.656164 progress 95% (9MB)
72 12:17:25.659394 progress 100% (10MB)
73 12:17:25.659609 10MB downloaded in 0.06s (163.34MB/s)
74 12:17:25.659785 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:17:25.660073 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:17:25.660233 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:17:25.660351 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:17:25.660547 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230609.0/amd64/full.rootfs.tar.xz
80 12:17:25.660658 saving as /var/lib/lava/dispatcher/tmp/10724470/tftp-deploy-0_18fyus/nfsrootfs/full.rootfs.tar
81 12:17:25.660757 total size: 133414664 (127MB)
82 12:17:25.660872 Using unxz to decompress xz
83 12:17:25.664936 progress 0% (0MB)
84 12:17:26.048468 progress 5% (6MB)
85 12:17:26.411829 progress 10% (12MB)
86 12:17:26.713459 progress 15% (19MB)
87 12:17:26.908332 progress 20% (25MB)
88 12:17:27.166492 progress 25% (31MB)
89 12:17:27.553186 progress 30% (38MB)
90 12:17:27.917419 progress 35% (44MB)
91 12:17:28.343993 progress 40% (50MB)
92 12:17:28.749735 progress 45% (57MB)
93 12:17:29.121216 progress 50% (63MB)
94 12:17:29.525256 progress 55% (70MB)
95 12:17:29.912130 progress 60% (76MB)
96 12:17:30.300648 progress 65% (82MB)
97 12:17:30.694860 progress 70% (89MB)
98 12:17:31.088333 progress 75% (95MB)
99 12:17:31.557630 progress 80% (101MB)
100 12:17:32.015723 progress 85% (108MB)
101 12:17:32.308145 progress 90% (114MB)
102 12:17:32.671428 progress 95% (120MB)
103 12:17:33.070206 progress 100% (127MB)
104 12:17:33.075788 127MB downloaded in 7.42s (17.16MB/s)
105 12:17:33.076131 end: 1.3.1 http-download (duration 00:00:07) [common]
107 12:17:33.076427 end: 1.3 download-retry (duration 00:00:07) [common]
108 12:17:33.076570 start: 1.4 download-retry (timeout 00:09:52) [common]
109 12:17:33.076711 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 12:17:33.076943 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.284-cip99-114-g02e97826987bf/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:17:33.077020 saving as /var/lib/lava/dispatcher/tmp/10724470/tftp-deploy-0_18fyus/modules/modules.tar
112 12:17:33.077094 total size: 483752 (0MB)
113 12:17:33.077160 Using unxz to decompress xz
114 12:17:33.080990 progress 6% (0MB)
115 12:17:33.081404 progress 13% (0MB)
116 12:17:33.081647 progress 20% (0MB)
117 12:17:33.082973 progress 27% (0MB)
118 12:17:33.085040 progress 33% (0MB)
119 12:17:33.086927 progress 40% (0MB)
120 12:17:33.088860 progress 47% (0MB)
121 12:17:33.091186 progress 54% (0MB)
122 12:17:33.093506 progress 60% (0MB)
123 12:17:33.095607 progress 67% (0MB)
124 12:17:33.098125 progress 74% (0MB)
125 12:17:33.100277 progress 81% (0MB)
126 12:17:33.102197 progress 88% (0MB)
127 12:17:33.104188 progress 94% (0MB)
128 12:17:33.106103 progress 100% (0MB)
129 12:17:33.112159 0MB downloaded in 0.04s (13.16MB/s)
130 12:17:33.112438 end: 1.4.1 http-download (duration 00:00:00) [common]
132 12:17:33.112732 end: 1.4 download-retry (duration 00:00:00) [common]
133 12:17:33.112871 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
134 12:17:33.112979 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
135 12:17:35.596251 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10724470/extract-nfsrootfs-2q38yrh2
136 12:17:35.596451 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
137 12:17:35.596598 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
138 12:17:35.596816 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10724470/lava-overlay-f7_nefps
139 12:17:35.597026 makedir: /var/lib/lava/dispatcher/tmp/10724470/lava-overlay-f7_nefps/lava-10724470/bin
140 12:17:35.597166 makedir: /var/lib/lava/dispatcher/tmp/10724470/lava-overlay-f7_nefps/lava-10724470/tests
141 12:17:35.597312 makedir: /var/lib/lava/dispatcher/tmp/10724470/lava-overlay-f7_nefps/lava-10724470/results
142 12:17:35.597460 Creating /var/lib/lava/dispatcher/tmp/10724470/lava-overlay-f7_nefps/lava-10724470/bin/lava-add-keys
143 12:17:35.597670 Creating /var/lib/lava/dispatcher/tmp/10724470/lava-overlay-f7_nefps/lava-10724470/bin/lava-add-sources
144 12:17:35.597853 Creating /var/lib/lava/dispatcher/tmp/10724470/lava-overlay-f7_nefps/lava-10724470/bin/lava-background-process-start
145 12:17:35.598002 Creating /var/lib/lava/dispatcher/tmp/10724470/lava-overlay-f7_nefps/lava-10724470/bin/lava-background-process-stop
146 12:17:35.598135 Creating /var/lib/lava/dispatcher/tmp/10724470/lava-overlay-f7_nefps/lava-10724470/bin/lava-common-functions
147 12:17:35.598256 Creating /var/lib/lava/dispatcher/tmp/10724470/lava-overlay-f7_nefps/lava-10724470/bin/lava-echo-ipv4
148 12:17:35.598376 Creating /var/lib/lava/dispatcher/tmp/10724470/lava-overlay-f7_nefps/lava-10724470/bin/lava-install-packages
149 12:17:35.598498 Creating /var/lib/lava/dispatcher/tmp/10724470/lava-overlay-f7_nefps/lava-10724470/bin/lava-installed-packages
150 12:17:35.598615 Creating /var/lib/lava/dispatcher/tmp/10724470/lava-overlay-f7_nefps/lava-10724470/bin/lava-os-build
151 12:17:35.598732 Creating /var/lib/lava/dispatcher/tmp/10724470/lava-overlay-f7_nefps/lava-10724470/bin/lava-probe-channel
152 12:17:35.598849 Creating /var/lib/lava/dispatcher/tmp/10724470/lava-overlay-f7_nefps/lava-10724470/bin/lava-probe-ip
153 12:17:35.598966 Creating /var/lib/lava/dispatcher/tmp/10724470/lava-overlay-f7_nefps/lava-10724470/bin/lava-target-ip
154 12:17:35.599083 Creating /var/lib/lava/dispatcher/tmp/10724470/lava-overlay-f7_nefps/lava-10724470/bin/lava-target-mac
155 12:17:35.599200 Creating /var/lib/lava/dispatcher/tmp/10724470/lava-overlay-f7_nefps/lava-10724470/bin/lava-target-storage
156 12:17:35.599321 Creating /var/lib/lava/dispatcher/tmp/10724470/lava-overlay-f7_nefps/lava-10724470/bin/lava-test-case
157 12:17:35.599437 Creating /var/lib/lava/dispatcher/tmp/10724470/lava-overlay-f7_nefps/lava-10724470/bin/lava-test-event
158 12:17:35.599553 Creating /var/lib/lava/dispatcher/tmp/10724470/lava-overlay-f7_nefps/lava-10724470/bin/lava-test-feedback
159 12:17:35.599668 Creating /var/lib/lava/dispatcher/tmp/10724470/lava-overlay-f7_nefps/lava-10724470/bin/lava-test-raise
160 12:17:35.599784 Creating /var/lib/lava/dispatcher/tmp/10724470/lava-overlay-f7_nefps/lava-10724470/bin/lava-test-reference
161 12:17:35.599903 Creating /var/lib/lava/dispatcher/tmp/10724470/lava-overlay-f7_nefps/lava-10724470/bin/lava-test-runner
162 12:17:35.600021 Creating /var/lib/lava/dispatcher/tmp/10724470/lava-overlay-f7_nefps/lava-10724470/bin/lava-test-set
163 12:17:35.600137 Creating /var/lib/lava/dispatcher/tmp/10724470/lava-overlay-f7_nefps/lava-10724470/bin/lava-test-shell
164 12:17:35.600259 Updating /var/lib/lava/dispatcher/tmp/10724470/lava-overlay-f7_nefps/lava-10724470/bin/lava-install-packages (oe)
165 12:17:35.600408 Updating /var/lib/lava/dispatcher/tmp/10724470/lava-overlay-f7_nefps/lava-10724470/bin/lava-installed-packages (oe)
166 12:17:35.600532 Creating /var/lib/lava/dispatcher/tmp/10724470/lava-overlay-f7_nefps/lava-10724470/environment
167 12:17:35.600654 LAVA metadata
168 12:17:35.600745 - LAVA_JOB_ID=10724470
169 12:17:35.600859 - LAVA_DISPATCHER_IP=192.168.201.1
170 12:17:35.600963 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
171 12:17:35.601029 skipped lava-vland-overlay
172 12:17:35.601103 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 12:17:35.601181 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
174 12:17:35.601241 skipped lava-multinode-overlay
175 12:17:35.601313 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 12:17:35.601390 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
177 12:17:35.601461 Loading test definitions
178 12:17:35.601550 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
179 12:17:35.601619 Using /lava-10724470 at stage 0
180 12:17:35.601919 uuid=10724470_1.5.2.3.1 testdef=None
181 12:17:35.602006 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
182 12:17:35.602089 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
183 12:17:35.602577 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
185 12:17:35.602813 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
186 12:17:35.603745 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
188 12:17:35.604108 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
189 12:17:35.604973 runner path: /var/lib/lava/dispatcher/tmp/10724470/lava-overlay-f7_nefps/lava-10724470/0/tests/0_dmesg test_uuid 10724470_1.5.2.3.1
190 12:17:35.605126 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
192 12:17:35.605349 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
193 12:17:35.605420 Using /lava-10724470 at stage 1
194 12:17:35.605705 uuid=10724470_1.5.2.3.5 testdef=None
195 12:17:35.605792 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
196 12:17:35.605875 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
197 12:17:35.606335 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
199 12:17:35.606548 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
200 12:17:35.607174 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
202 12:17:35.607417 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
203 12:17:35.608072 runner path: /var/lib/lava/dispatcher/tmp/10724470/lava-overlay-f7_nefps/lava-10724470/1/tests/1_bootrr test_uuid 10724470_1.5.2.3.5
204 12:17:35.608218 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
206 12:17:35.608422 Creating lava-test-runner.conf files
207 12:17:35.608485 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10724470/lava-overlay-f7_nefps/lava-10724470/0 for stage 0
208 12:17:35.608571 - 0_dmesg
209 12:17:35.608650 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10724470/lava-overlay-f7_nefps/lava-10724470/1 for stage 1
210 12:17:35.608737 - 1_bootrr
211 12:17:35.608864 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
212 12:17:35.608949 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
213 12:17:35.616467 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
214 12:17:35.616583 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
215 12:17:35.616669 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
216 12:17:35.616753 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
217 12:17:35.616882 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
218 12:17:35.754202 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
219 12:17:35.754686 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
220 12:17:35.754878 extracting modules file /var/lib/lava/dispatcher/tmp/10724470/tftp-deploy-0_18fyus/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10724470/extract-nfsrootfs-2q38yrh2
221 12:17:35.778391 extracting modules file /var/lib/lava/dispatcher/tmp/10724470/tftp-deploy-0_18fyus/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10724470/extract-overlay-ramdisk-zqa13m3c/ramdisk
222 12:17:35.798413 end: 1.5.4 extract-modules (duration 00:00:00) [common]
223 12:17:35.798574 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
224 12:17:35.798671 [common] Applying overlay to NFS
225 12:17:35.798743 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10724470/compress-overlay-c1o69vy8/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10724470/extract-nfsrootfs-2q38yrh2
226 12:17:35.806681 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
227 12:17:35.806804 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
228 12:17:35.806899 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
229 12:17:35.806994 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
230 12:17:35.807077 Building ramdisk /var/lib/lava/dispatcher/tmp/10724470/extract-overlay-ramdisk-zqa13m3c/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10724470/extract-overlay-ramdisk-zqa13m3c/ramdisk
231 12:17:35.882847 >> 30351 blocks
232 12:17:38.476437 rename /var/lib/lava/dispatcher/tmp/10724470/extract-overlay-ramdisk-zqa13m3c/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10724470/tftp-deploy-0_18fyus/ramdisk/ramdisk.cpio.gz
233 12:17:38.477045 end: 1.5.7 compress-ramdisk (duration 00:00:03) [common]
234 12:17:38.477250 start: 1.5.8 prepare-kernel (timeout 00:09:47) [common]
235 12:17:38.477429 start: 1.5.8.1 prepare-fit (timeout 00:09:47) [common]
236 12:17:38.477604 No mkimage arch provided, not using FIT.
237 12:17:38.477764 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
238 12:17:38.477914 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
239 12:17:38.478103 end: 1.5 prepare-tftp-overlay (duration 00:00:05) [common]
240 12:17:38.478311 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:47) [common]
241 12:17:38.478480 No LXC device requested
242 12:17:38.478667 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
243 12:17:38.478865 start: 1.7 deploy-device-env (timeout 00:09:47) [common]
244 12:17:38.479064 end: 1.7 deploy-device-env (duration 00:00:00) [common]
245 12:17:38.479223 Checking files for TFTP limit of 4294967296 bytes.
246 12:17:38.480031 end: 1 tftp-deploy (duration 00:00:13) [common]
247 12:17:38.480251 start: 2 depthcharge-action (timeout 00:05:00) [common]
248 12:17:38.480453 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
249 12:17:38.480732 substitutions:
250 12:17:38.480901 - {DTB}: None
251 12:17:38.481060 - {INITRD}: 10724470/tftp-deploy-0_18fyus/ramdisk/ramdisk.cpio.gz
252 12:17:38.481220 - {KERNEL}: 10724470/tftp-deploy-0_18fyus/kernel/bzImage
253 12:17:38.481371 - {LAVA_MAC}: None
254 12:17:38.481537 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10724470/extract-nfsrootfs-2q38yrh2
255 12:17:38.481693 - {NFS_SERVER_IP}: 192.168.201.1
256 12:17:38.481842 - {PRESEED_CONFIG}: None
257 12:17:38.482018 - {PRESEED_LOCAL}: None
258 12:17:38.482180 - {RAMDISK}: 10724470/tftp-deploy-0_18fyus/ramdisk/ramdisk.cpio.gz
259 12:17:38.482346 - {ROOT_PART}: None
260 12:17:38.482522 - {ROOT}: None
261 12:17:38.482697 - {SERVER_IP}: 192.168.201.1
262 12:17:38.482850 - {TEE}: None
263 12:17:38.482997 Parsed boot commands:
264 12:17:38.483139 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
265 12:17:38.483503 Parsed boot commands: tftpboot 192.168.201.1 10724470/tftp-deploy-0_18fyus/kernel/bzImage 10724470/tftp-deploy-0_18fyus/kernel/cmdline 10724470/tftp-deploy-0_18fyus/ramdisk/ramdisk.cpio.gz
266 12:17:38.483717 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
267 12:17:38.483910 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
268 12:17:38.484071 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
269 12:17:38.484222 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
270 12:17:38.484344 Not connected, no need to disconnect.
271 12:17:38.484470 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
272 12:17:38.484610 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
273 12:17:38.484728 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-14'
274 12:17:38.490007 Setting prompt string to ['lava-test: # ']
275 12:17:38.490588 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
276 12:17:38.490774 end: 2.2.1 reset-connection (duration 00:00:00) [common]
277 12:17:38.490932 start: 2.2.2 reset-device (timeout 00:05:00) [common]
278 12:17:38.491109 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
279 12:17:38.491748 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-14' '--port=1' '--command=reboot'
280 12:17:43.666695 >> Command sent successfully.
281 12:17:43.669258 Returned 0 in 5 seconds
282 12:17:43.769691 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
284 12:17:43.770039 end: 2.2.2 reset-device (duration 00:00:05) [common]
285 12:17:43.770154 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
286 12:17:43.770248 Setting prompt string to 'Starting depthcharge on Voema...'
287 12:17:43.770317 Changing prompt to 'Starting depthcharge on Voema...'
288 12:17:43.770391 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
289 12:17:43.770699 [Enter `^Ec?' for help]
290 12:17:45.333074
291 12:17:45.333262
292 12:17:45.342662 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
293 12:17:45.349842 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
294 12:17:45.352959 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
295 12:17:45.356947 CPU: AES supported, TXT NOT supported, VT supported
296 12:17:45.363759 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
297 12:17:45.366652 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
298 12:17:45.373736 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
299 12:17:45.377096 VBOOT: Loading verstage.
300 12:17:45.380406 FMAP: Found "FLASH" version 1.1 at 0x1804000.
301 12:17:45.386469 FMAP: base = 0x0 size = 0x2000000 #areas = 32
302 12:17:45.389843 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
303 12:17:45.399719 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
304 12:17:45.406766 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
305 12:17:45.406908
306 12:17:45.407037
307 12:17:45.417436 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
308 12:17:45.434060 Probing TPM: . done!
309 12:17:45.437388 TPM ready after 0 ms
310 12:17:45.440359 Connected to device vid:did:rid of 1ae0:0028:00
311 12:17:45.451337 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
312 12:17:45.458395 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
313 12:17:45.461768 Initialized TPM device CR50 revision 0
314 12:17:45.516749 tlcl_send_startup: Startup return code is 0
315 12:17:45.516922 TPM: setup succeeded
316 12:17:45.531531 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
317 12:17:45.545418 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
318 12:17:45.557918 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
319 12:17:45.568406 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
320 12:17:45.571674 Chrome EC: UHEPI supported
321 12:17:45.575238 Phase 1
322 12:17:45.578261 FMAP: area GBB found @ 1805000 (458752 bytes)
323 12:17:45.588239 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
324 12:17:45.594831 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
325 12:17:45.601410 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
326 12:17:45.607761 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
327 12:17:45.611295 Recovery requested (1009000e)
328 12:17:45.615133 TPM: Extending digest for VBOOT: boot mode into PCR 0
329 12:17:45.626642 tlcl_extend: response is 0
330 12:17:45.633103 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
331 12:17:45.643067 tlcl_extend: response is 0
332 12:17:45.649678 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
333 12:17:45.656434 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
334 12:17:45.663100 BS: verstage times (exec / console): total (unknown) / 142 ms
335 12:17:45.663189
336 12:17:45.663257
337 12:17:45.676045 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
338 12:17:45.682800 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
339 12:17:45.686151 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
340 12:17:45.689708 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
341 12:17:45.696284 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
342 12:17:45.699480 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
343 12:17:45.702698 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
344 12:17:45.705833 TCO_STS: 0000 0000
345 12:17:45.709020 GEN_PMCON: d0015038 00002200
346 12:17:45.712372 GBLRST_CAUSE: 00000000 00000000
347 12:17:45.715754 HPR_CAUSE0: 00000000
348 12:17:45.715843 prev_sleep_state 5
349 12:17:45.719072 Boot Count incremented to 8882
350 12:17:45.725720 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
351 12:17:45.732303 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
352 12:17:45.742526 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
353 12:17:45.748460 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
354 12:17:45.752391 Chrome EC: UHEPI supported
355 12:17:45.758237 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
356 12:17:45.769482 Probing TPM: done!
357 12:17:45.776579 Connected to device vid:did:rid of 1ae0:0028:00
358 12:17:45.785886 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
359 12:17:45.789630 Initialized TPM device CR50 revision 0
360 12:17:45.804635 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
361 12:17:45.811549 MRC: Hash idx 0x100b comparison successful.
362 12:17:45.814195 MRC cache found, size faa8
363 12:17:45.814279 bootmode is set to: 2
364 12:17:45.818244 SPD index = 2
365 12:17:45.824884 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
366 12:17:45.828099 SPD: module type is LPDDR4X
367 12:17:45.831352 SPD: module part number is MT53D1G64D4NW-046
368 12:17:45.837753 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
369 12:17:45.841030 SPD: device width 16 bits, bus width 16 bits
370 12:17:45.848511 SPD: module size is 2048 MB (per channel)
371 12:17:46.277399 CBMEM:
372 12:17:46.280511 IMD: root @ 0x76fff000 254 entries.
373 12:17:46.283774 IMD: root @ 0x76ffec00 62 entries.
374 12:17:46.287033 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
375 12:17:46.294051 FMAP: area RW_VPD found @ f35000 (8192 bytes)
376 12:17:46.297379 External stage cache:
377 12:17:46.300746 IMD: root @ 0x7b3ff000 254 entries.
378 12:17:46.303666 IMD: root @ 0x7b3fec00 62 entries.
379 12:17:46.318788 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
380 12:17:46.325433 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
381 12:17:46.331688 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
382 12:17:46.345382 MRC: 'RECOVERY_MRC_CACHE' does not need update.
383 12:17:46.351955 cse_lite: Skip switching to RW in the recovery path
384 12:17:46.352069 8 DIMMs found
385 12:17:46.355280 SMM Memory Map
386 12:17:46.358628 SMRAM : 0x7b000000 0x800000
387 12:17:46.362060 Subregion 0: 0x7b000000 0x200000
388 12:17:46.365208 Subregion 1: 0x7b200000 0x200000
389 12:17:46.368545 Subregion 2: 0x7b400000 0x400000
390 12:17:46.368657 top_of_ram = 0x77000000
391 12:17:46.375191 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
392 12:17:46.382221 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
393 12:17:46.385416 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
394 12:17:46.391995 MTRR Range: Start=ff000000 End=0 (Size 1000000)
395 12:17:46.398562 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
396 12:17:46.405094 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
397 12:17:46.415117 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
398 12:17:46.422021 Processing 211 relocs. Offset value of 0x74c0b000
399 12:17:46.429748 BS: romstage times (exec / console): total (unknown) / 277 ms
400 12:17:46.434305
401 12:17:46.434405
402 12:17:46.443720 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
403 12:17:46.447420 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
404 12:17:46.457402 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
405 12:17:46.464010 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
406 12:17:46.470624 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
407 12:17:46.476616 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
408 12:17:46.520909 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
409 12:17:46.527876 Processing 5008 relocs. Offset value of 0x75d98000
410 12:17:46.530984 BS: postcar times (exec / console): total (unknown) / 59 ms
411 12:17:46.534088
412 12:17:46.534173
413 12:17:46.544242 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
414 12:17:46.544335 Normal boot
415 12:17:46.547616 FW_CONFIG value is 0x804c02
416 12:17:46.550771 PCI: 00:07.0 disabled by fw_config
417 12:17:46.554006 PCI: 00:07.1 disabled by fw_config
418 12:17:46.557455 PCI: 00:0d.2 disabled by fw_config
419 12:17:46.564175 PCI: 00:1c.7 disabled by fw_config
420 12:17:46.567520 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
421 12:17:46.574127 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
422 12:17:46.577511 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
423 12:17:46.584255 GENERIC: 0.0 disabled by fw_config
424 12:17:46.587043 GENERIC: 1.0 disabled by fw_config
425 12:17:46.590277 fw_config match found: DB_USB=USB3_ACTIVE
426 12:17:46.593701 fw_config match found: DB_USB=USB3_ACTIVE
427 12:17:46.597298 fw_config match found: DB_USB=USB3_ACTIVE
428 12:17:46.603783 fw_config match found: DB_USB=USB3_ACTIVE
429 12:17:46.606822 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
430 12:17:46.617257 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
431 12:17:46.623505 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
432 12:17:46.630678 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
433 12:17:46.633861 microcode: sig=0x806c1 pf=0x80 revision=0x86
434 12:17:46.640109 microcode: Update skipped, already up-to-date
435 12:17:46.647321 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
436 12:17:46.674552 Detected 4 core, 8 thread CPU.
437 12:17:46.678225 Setting up SMI for CPU
438 12:17:46.681694 IED base = 0x7b400000
439 12:17:46.681772 IED size = 0x00400000
440 12:17:46.685108 Will perform SMM setup.
441 12:17:46.690961 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
442 12:17:46.697753 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
443 12:17:46.704663 Processing 16 relocs. Offset value of 0x00030000
444 12:17:46.707946 Attempting to start 7 APs
445 12:17:46.711046 Waiting for 10ms after sending INIT.
446 12:17:46.726463 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
447 12:17:46.729750 AP: slot 4 apic_id 2.
448 12:17:46.733061 AP: slot 7 apic_id 3.
449 12:17:46.733137 AP: slot 2 apic_id 5.
450 12:17:46.736318 AP: slot 5 apic_id 4.
451 12:17:46.736389 done.
452 12:17:46.739742 AP: slot 3 apic_id 7.
453 12:17:46.739813 AP: slot 6 apic_id 6.
454 12:17:46.746737 Waiting for 2nd SIPI to complete...done.
455 12:17:46.753421 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
456 12:17:46.759685 Processing 13 relocs. Offset value of 0x00038000
457 12:17:46.759764 Unable to locate Global NVS
458 12:17:46.769703 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
459 12:17:46.772933 Installing permanent SMM handler to 0x7b000000
460 12:17:46.782774 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
461 12:17:46.786167 Processing 794 relocs. Offset value of 0x7b010000
462 12:17:46.796190 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
463 12:17:46.799470 Processing 13 relocs. Offset value of 0x7b008000
464 12:17:46.806267 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
465 12:17:46.812511 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
466 12:17:46.816303 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
467 12:17:46.822996 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
468 12:17:46.829287 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
469 12:17:46.835908 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
470 12:17:46.842756 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
471 12:17:46.842863 Unable to locate Global NVS
472 12:17:46.852314 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
473 12:17:46.855992 Clearing SMI status registers
474 12:17:46.856103 SMI_STS: PM1
475 12:17:46.859140 PM1_STS: PWRBTN
476 12:17:46.865524 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
477 12:17:46.868837 In relocation handler: CPU 0
478 12:17:46.872218 New SMBASE=0x7b000000 IEDBASE=0x7b400000
479 12:17:46.878793 Writing SMRR. base = 0x7b000006, mask=0xff800c00
480 12:17:46.878909 Relocation complete.
481 12:17:46.889139 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
482 12:17:46.889227 In relocation handler: CPU 1
483 12:17:46.895824 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
484 12:17:46.895912 Relocation complete.
485 12:17:46.905813 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
486 12:17:46.905915 In relocation handler: CPU 7
487 12:17:46.911772 New SMBASE=0x7affe400 IEDBASE=0x7b400000
488 12:17:46.911877 Relocation complete.
489 12:17:46.921881 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
490 12:17:46.921967 In relocation handler: CPU 4
491 12:17:46.928314 New SMBASE=0x7afff000 IEDBASE=0x7b400000
492 12:17:46.932139 Writing SMRR. base = 0x7b000006, mask=0xff800c00
493 12:17:46.935064 Relocation complete.
494 12:17:46.941575 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
495 12:17:46.944969 In relocation handler: CPU 5
496 12:17:46.948356 New SMBASE=0x7affec00 IEDBASE=0x7b400000
497 12:17:46.955030 Writing SMRR. base = 0x7b000006, mask=0xff800c00
498 12:17:46.955140 Relocation complete.
499 12:17:46.964738 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
500 12:17:46.964868 In relocation handler: CPU 3
501 12:17:46.971163 New SMBASE=0x7afff400 IEDBASE=0x7b400000
502 12:17:46.971275 Relocation complete.
503 12:17:46.981542 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
504 12:17:46.981632 In relocation handler: CPU 6
505 12:17:46.987937 New SMBASE=0x7affe800 IEDBASE=0x7b400000
506 12:17:46.991081 Writing SMRR. base = 0x7b000006, mask=0xff800c00
507 12:17:46.994532 Relocation complete.
508 12:17:47.001193 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
509 12:17:47.004444 In relocation handler: CPU 2
510 12:17:47.007731 New SMBASE=0x7afff800 IEDBASE=0x7b400000
511 12:17:47.011024 Relocation complete.
512 12:17:47.011128 Initializing CPU #0
513 12:17:47.014650 CPU: vendor Intel device 806c1
514 12:17:47.021323 CPU: family 06, model 8c, stepping 01
515 12:17:47.021408 Clearing out pending MCEs
516 12:17:47.024526 Setting up local APIC...
517 12:17:47.027829 apic_id: 0x00 done.
518 12:17:47.031045 Turbo is available but hidden
519 12:17:47.034196 Turbo is available and visible
520 12:17:47.037267 microcode: Update skipped, already up-to-date
521 12:17:47.040637 CPU #0 initialized
522 12:17:47.040721 Initializing CPU #5
523 12:17:47.044072 Initializing CPU #2
524 12:17:47.047178 CPU: vendor Intel device 806c1
525 12:17:47.050612 CPU: family 06, model 8c, stepping 01
526 12:17:47.053890 CPU: vendor Intel device 806c1
527 12:17:47.057191 CPU: family 06, model 8c, stepping 01
528 12:17:47.060445 Clearing out pending MCEs
529 12:17:47.063710 Clearing out pending MCEs
530 12:17:47.067190 Setting up local APIC...
531 12:17:47.067292 Initializing CPU #6
532 12:17:47.070478 Initializing CPU #3
533 12:17:47.070595 Initializing CPU #4
534 12:17:47.073835 Initializing CPU #7
535 12:17:47.077790 CPU: vendor Intel device 806c1
536 12:17:47.080645 CPU: family 06, model 8c, stepping 01
537 12:17:47.083908 CPU: vendor Intel device 806c1
538 12:17:47.087689 CPU: family 06, model 8c, stepping 01
539 12:17:47.091489 Clearing out pending MCEs
540 12:17:47.091602 Clearing out pending MCEs
541 12:17:47.095090 CPU: vendor Intel device 806c1
542 12:17:47.098162 CPU: family 06, model 8c, stepping 01
543 12:17:47.101632 CPU: vendor Intel device 806c1
544 12:17:47.108282 CPU: family 06, model 8c, stepping 01
545 12:17:47.108396 Clearing out pending MCEs
546 12:17:47.111638 Clearing out pending MCEs
547 12:17:47.114945 Setting up local APIC...
548 12:17:47.118338 Setting up local APIC...
549 12:17:47.118442 apic_id: 0x06 done.
550 12:17:47.121628 Setting up local APIC...
551 12:17:47.125086 apic_id: 0x03 done.
552 12:17:47.125186 Setting up local APIC...
553 12:17:47.128499 Initializing CPU #1
554 12:17:47.131640 microcode: Update skipped, already up-to-date
555 12:17:47.134927 apic_id: 0x07 done.
556 12:17:47.141425 microcode: Update skipped, already up-to-date
557 12:17:47.141537 Setting up local APIC...
558 12:17:47.144862 apic_id: 0x02 done.
559 12:17:47.147917 CPU #6 initialized
560 12:17:47.151533 microcode: Update skipped, already up-to-date
561 12:17:47.154847 microcode: Update skipped, already up-to-date
562 12:17:47.157556 CPU #7 initialized
563 12:17:47.161016 CPU #4 initialized
564 12:17:47.161132 apic_id: 0x04 done.
565 12:17:47.164335 apic_id: 0x05 done.
566 12:17:47.167519 microcode: Update skipped, already up-to-date
567 12:17:47.174211 microcode: Update skipped, already up-to-date
568 12:17:47.174330 CPU #5 initialized
569 12:17:47.177710 CPU #2 initialized
570 12:17:47.177797 CPU #3 initialized
571 12:17:47.180799 CPU: vendor Intel device 806c1
572 12:17:47.184236 CPU: family 06, model 8c, stepping 01
573 12:17:47.187825 Clearing out pending MCEs
574 12:17:47.191128 Setting up local APIC...
575 12:17:47.194197 apic_id: 0x01 done.
576 12:17:47.197503 microcode: Update skipped, already up-to-date
577 12:17:47.200787 CPU #1 initialized
578 12:17:47.204316 bsp_do_flight_plan done after 454 msecs.
579 12:17:47.207412 CPU: frequency set to 4400 MHz
580 12:17:47.207502 Enabling SMIs.
581 12:17:47.213866 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
582 12:17:47.231236 SATAXPCIE1 indicates PCIe NVMe is present
583 12:17:47.234520 Probing TPM: done!
584 12:17:47.238736 Connected to device vid:did:rid of 1ae0:0028:00
585 12:17:47.248994 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
586 12:17:47.252117 Initialized TPM device CR50 revision 0
587 12:17:47.255374 Enabling S0i3.4
588 12:17:47.261814 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
589 12:17:47.265037 Found a VBT of 8704 bytes after decompression
590 12:17:47.271665 cse_lite: CSE RO boot. HybridStorageMode disabled
591 12:17:47.278490 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
592 12:17:47.353783 FSPS returned 0
593 12:17:47.357161 Executing Phase 1 of FspMultiPhaseSiInit
594 12:17:47.367300 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
595 12:17:47.370388 port C0 DISC req: usage 1 usb3 1 usb2 5
596 12:17:47.373773 Raw Buffer output 0 00000511
597 12:17:47.376966 Raw Buffer output 1 00000000
598 12:17:47.380932 pmc_send_ipc_cmd succeeded
599 12:17:47.387714 port C1 DISC req: usage 1 usb3 2 usb2 3
600 12:17:47.387795 Raw Buffer output 0 00000321
601 12:17:47.390941 Raw Buffer output 1 00000000
602 12:17:47.394930 pmc_send_ipc_cmd succeeded
603 12:17:47.400358 Detected 4 core, 8 thread CPU.
604 12:17:47.403390 Detected 4 core, 8 thread CPU.
605 12:17:47.603802 Display FSP Version Info HOB
606 12:17:47.607071 Reference Code - CPU = a.0.4c.31
607 12:17:47.610496 uCode Version = 0.0.0.86
608 12:17:47.613775 TXT ACM version = ff.ff.ff.ffff
609 12:17:47.617055 Reference Code - ME = a.0.4c.31
610 12:17:47.620420 MEBx version = 0.0.0.0
611 12:17:47.624082 ME Firmware Version = Consumer SKU
612 12:17:47.627158 Reference Code - PCH = a.0.4c.31
613 12:17:47.630396 PCH-CRID Status = Disabled
614 12:17:47.633400 PCH-CRID Original Value = ff.ff.ff.ffff
615 12:17:47.637144 PCH-CRID New Value = ff.ff.ff.ffff
616 12:17:47.640379 OPROM - RST - RAID = ff.ff.ff.ffff
617 12:17:47.643664 PCH Hsio Version = 4.0.0.0
618 12:17:47.646902 Reference Code - SA - System Agent = a.0.4c.31
619 12:17:47.650597 Reference Code - MRC = 2.0.0.1
620 12:17:47.653737 SA - PCIe Version = a.0.4c.31
621 12:17:47.656928 SA-CRID Status = Disabled
622 12:17:47.660237 SA-CRID Original Value = 0.0.0.1
623 12:17:47.663734 SA-CRID New Value = 0.0.0.1
624 12:17:47.667007 OPROM - VBIOS = ff.ff.ff.ffff
625 12:17:47.670966 IO Manageability Engine FW Version = 11.1.4.0
626 12:17:47.674941 PHY Build Version = 0.0.0.e0
627 12:17:47.678600 Thunderbolt(TM) FW Version = 0.0.0.0
628 12:17:47.684843 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
629 12:17:47.684938 ITSS IRQ Polarities Before:
630 12:17:47.688047 IPC0: 0xffffffff
631 12:17:47.688133 IPC1: 0xffffffff
632 12:17:47.691103 IPC2: 0xffffffff
633 12:17:47.694822 IPC3: 0xffffffff
634 12:17:47.694902 ITSS IRQ Polarities After:
635 12:17:47.698116 IPC0: 0xffffffff
636 12:17:47.698197 IPC1: 0xffffffff
637 12:17:47.700750 IPC2: 0xffffffff
638 12:17:47.704646 IPC3: 0xffffffff
639 12:17:47.707999 Found PCIe Root Port #9 at PCI: 00:1d.0.
640 12:17:47.717411 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
641 12:17:47.731091 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
642 12:17:47.744051 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
643 12:17:47.750441 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
644 12:17:47.750523 Enumerating buses...
645 12:17:47.756964 Show all devs... Before device enumeration.
646 12:17:47.757053 Root Device: enabled 1
647 12:17:47.760296 DOMAIN: 0000: enabled 1
648 12:17:47.764066 CPU_CLUSTER: 0: enabled 1
649 12:17:47.766880 PCI: 00:00.0: enabled 1
650 12:17:47.766952 PCI: 00:02.0: enabled 1
651 12:17:47.770136 PCI: 00:04.0: enabled 1
652 12:17:47.773413 PCI: 00:05.0: enabled 1
653 12:17:47.776701 PCI: 00:06.0: enabled 0
654 12:17:47.776800 PCI: 00:07.0: enabled 0
655 12:17:47.780088 PCI: 00:07.1: enabled 0
656 12:17:47.783428 PCI: 00:07.2: enabled 0
657 12:17:47.786591 PCI: 00:07.3: enabled 0
658 12:17:47.786664 PCI: 00:08.0: enabled 1
659 12:17:47.790433 PCI: 00:09.0: enabled 0
660 12:17:47.793725 PCI: 00:0a.0: enabled 0
661 12:17:47.796871 PCI: 00:0d.0: enabled 1
662 12:17:47.796947 PCI: 00:0d.1: enabled 0
663 12:17:47.799942 PCI: 00:0d.2: enabled 0
664 12:17:47.803171 PCI: 00:0d.3: enabled 0
665 12:17:47.803248 PCI: 00:0e.0: enabled 0
666 12:17:47.807065 PCI: 00:10.2: enabled 1
667 12:17:47.809789 PCI: 00:10.6: enabled 0
668 12:17:47.813727 PCI: 00:10.7: enabled 0
669 12:17:47.813797 PCI: 00:12.0: enabled 0
670 12:17:47.817006 PCI: 00:12.6: enabled 0
671 12:17:47.820357 PCI: 00:13.0: enabled 0
672 12:17:47.823090 PCI: 00:14.0: enabled 1
673 12:17:47.823179 PCI: 00:14.1: enabled 0
674 12:17:47.826422 PCI: 00:14.2: enabled 1
675 12:17:47.829991 PCI: 00:14.3: enabled 1
676 12:17:47.833649 PCI: 00:15.0: enabled 1
677 12:17:47.833739 PCI: 00:15.1: enabled 1
678 12:17:47.836981 PCI: 00:15.2: enabled 1
679 12:17:47.840149 PCI: 00:15.3: enabled 1
680 12:17:47.840235 PCI: 00:16.0: enabled 1
681 12:17:47.843514 PCI: 00:16.1: enabled 0
682 12:17:47.846741 PCI: 00:16.2: enabled 0
683 12:17:47.849749 PCI: 00:16.3: enabled 0
684 12:17:47.849834 PCI: 00:16.4: enabled 0
685 12:17:47.852943 PCI: 00:16.5: enabled 0
686 12:17:47.856142 PCI: 00:17.0: enabled 1
687 12:17:47.859869 PCI: 00:19.0: enabled 0
688 12:17:47.859954 PCI: 00:19.1: enabled 1
689 12:17:47.863035 PCI: 00:19.2: enabled 0
690 12:17:47.866239 PCI: 00:1c.0: enabled 1
691 12:17:47.869390 PCI: 00:1c.1: enabled 0
692 12:17:47.869477 PCI: 00:1c.2: enabled 0
693 12:17:47.872752 PCI: 00:1c.3: enabled 0
694 12:17:47.876035 PCI: 00:1c.4: enabled 0
695 12:17:47.879492 PCI: 00:1c.5: enabled 0
696 12:17:47.879579 PCI: 00:1c.6: enabled 1
697 12:17:47.883243 PCI: 00:1c.7: enabled 0
698 12:17:47.886045 PCI: 00:1d.0: enabled 1
699 12:17:47.889264 PCI: 00:1d.1: enabled 0
700 12:17:47.889377 PCI: 00:1d.2: enabled 1
701 12:17:47.893242 PCI: 00:1d.3: enabled 0
702 12:17:47.896376 PCI: 00:1e.0: enabled 1
703 12:17:47.896488 PCI: 00:1e.1: enabled 0
704 12:17:47.899264 PCI: 00:1e.2: enabled 1
705 12:17:47.903102 PCI: 00:1e.3: enabled 1
706 12:17:47.906194 PCI: 00:1f.0: enabled 1
707 12:17:47.906307 PCI: 00:1f.1: enabled 0
708 12:17:47.909433 PCI: 00:1f.2: enabled 1
709 12:17:47.912754 PCI: 00:1f.3: enabled 1
710 12:17:47.916178 PCI: 00:1f.4: enabled 0
711 12:17:47.916265 PCI: 00:1f.5: enabled 1
712 12:17:47.919511 PCI: 00:1f.6: enabled 0
713 12:17:47.923056 PCI: 00:1f.7: enabled 0
714 12:17:47.923158 APIC: 00: enabled 1
715 12:17:47.926207 GENERIC: 0.0: enabled 1
716 12:17:47.929607 GENERIC: 0.0: enabled 1
717 12:17:47.932420 GENERIC: 1.0: enabled 1
718 12:17:47.932507 GENERIC: 0.0: enabled 1
719 12:17:47.936455 GENERIC: 1.0: enabled 1
720 12:17:47.939397 USB0 port 0: enabled 1
721 12:17:47.942594 GENERIC: 0.0: enabled 1
722 12:17:47.942678 USB0 port 0: enabled 1
723 12:17:47.945994 GENERIC: 0.0: enabled 1
724 12:17:47.949431 I2C: 00:1a: enabled 1
725 12:17:47.949533 I2C: 00:31: enabled 1
726 12:17:47.952664 I2C: 00:32: enabled 1
727 12:17:47.955661 I2C: 00:10: enabled 1
728 12:17:47.955760 I2C: 00:15: enabled 1
729 12:17:47.959482 GENERIC: 0.0: enabled 0
730 12:17:47.962494 GENERIC: 1.0: enabled 0
731 12:17:47.965644 GENERIC: 0.0: enabled 1
732 12:17:47.965755 SPI: 00: enabled 1
733 12:17:47.969422 SPI: 00: enabled 1
734 12:17:47.969501 PNP: 0c09.0: enabled 1
735 12:17:47.972573 GENERIC: 0.0: enabled 1
736 12:17:47.975785 USB3 port 0: enabled 1
737 12:17:47.979026 USB3 port 1: enabled 1
738 12:17:47.979144 USB3 port 2: enabled 0
739 12:17:47.982428 USB3 port 3: enabled 0
740 12:17:47.985728 USB2 port 0: enabled 0
741 12:17:47.985814 USB2 port 1: enabled 1
742 12:17:47.989123 USB2 port 2: enabled 1
743 12:17:47.992457 USB2 port 3: enabled 0
744 12:17:47.995686 USB2 port 4: enabled 1
745 12:17:47.995792 USB2 port 5: enabled 0
746 12:17:47.998864 USB2 port 6: enabled 0
747 12:17:48.002186 USB2 port 7: enabled 0
748 12:17:48.002295 USB2 port 8: enabled 0
749 12:17:48.005775 USB2 port 9: enabled 0
750 12:17:48.008986 USB3 port 0: enabled 0
751 12:17:48.009061 USB3 port 1: enabled 1
752 12:17:48.012681 USB3 port 2: enabled 0
753 12:17:48.016064 USB3 port 3: enabled 0
754 12:17:48.019404 GENERIC: 0.0: enabled 1
755 12:17:48.019553 GENERIC: 1.0: enabled 1
756 12:17:48.022751 APIC: 01: enabled 1
757 12:17:48.025993 APIC: 05: enabled 1
758 12:17:48.026118 APIC: 07: enabled 1
759 12:17:48.028748 APIC: 02: enabled 1
760 12:17:48.028867 APIC: 04: enabled 1
761 12:17:48.032619 APIC: 06: enabled 1
762 12:17:48.035897 APIC: 03: enabled 1
763 12:17:48.036015 Compare with tree...
764 12:17:48.039186 Root Device: enabled 1
765 12:17:48.042737 DOMAIN: 0000: enabled 1
766 12:17:48.045606 PCI: 00:00.0: enabled 1
767 12:17:48.045728 PCI: 00:02.0: enabled 1
768 12:17:48.048945 PCI: 00:04.0: enabled 1
769 12:17:48.052273 GENERIC: 0.0: enabled 1
770 12:17:48.055529 PCI: 00:05.0: enabled 1
771 12:17:48.058840 PCI: 00:06.0: enabled 0
772 12:17:48.058945 PCI: 00:07.0: enabled 0
773 12:17:48.061924 GENERIC: 0.0: enabled 1
774 12:17:48.065252 PCI: 00:07.1: enabled 0
775 12:17:48.068867 GENERIC: 1.0: enabled 1
776 12:17:48.071947 PCI: 00:07.2: enabled 0
777 12:17:48.072051 GENERIC: 0.0: enabled 1
778 12:17:48.075202 PCI: 00:07.3: enabled 0
779 12:17:48.078387 GENERIC: 1.0: enabled 1
780 12:17:48.082056 PCI: 00:08.0: enabled 1
781 12:17:48.085133 PCI: 00:09.0: enabled 0
782 12:17:48.088513 PCI: 00:0a.0: enabled 0
783 12:17:48.088593 PCI: 00:0d.0: enabled 1
784 12:17:48.091706 USB0 port 0: enabled 1
785 12:17:48.095161 USB3 port 0: enabled 1
786 12:17:48.098447 USB3 port 1: enabled 1
787 12:17:48.101849 USB3 port 2: enabled 0
788 12:17:48.101940 USB3 port 3: enabled 0
789 12:17:48.105154 PCI: 00:0d.1: enabled 0
790 12:17:48.108747 PCI: 00:0d.2: enabled 0
791 12:17:48.111709 GENERIC: 0.0: enabled 1
792 12:17:48.115010 PCI: 00:0d.3: enabled 0
793 12:17:48.115092 PCI: 00:0e.0: enabled 0
794 12:17:48.118316 PCI: 00:10.2: enabled 1
795 12:17:48.121510 PCI: 00:10.6: enabled 0
796 12:17:48.124997 PCI: 00:10.7: enabled 0
797 12:17:48.128265 PCI: 00:12.0: enabled 0
798 12:17:48.128347 PCI: 00:12.6: enabled 0
799 12:17:48.131836 PCI: 00:13.0: enabled 0
800 12:17:48.135174 PCI: 00:14.0: enabled 1
801 12:17:48.138743 USB0 port 0: enabled 1
802 12:17:48.141880 USB2 port 0: enabled 0
803 12:17:48.141964 USB2 port 1: enabled 1
804 12:17:48.145278 USB2 port 2: enabled 1
805 12:17:48.148598 USB2 port 3: enabled 0
806 12:17:48.151997 USB2 port 4: enabled 1
807 12:17:48.155181 USB2 port 5: enabled 0
808 12:17:48.157991 USB2 port 6: enabled 0
809 12:17:48.158074 USB2 port 7: enabled 0
810 12:17:48.161292 USB2 port 8: enabled 0
811 12:17:48.164703 USB2 port 9: enabled 0
812 12:17:48.167966 USB3 port 0: enabled 0
813 12:17:48.171778 USB3 port 1: enabled 1
814 12:17:48.171863 USB3 port 2: enabled 0
815 12:17:48.175030 USB3 port 3: enabled 0
816 12:17:48.178303 PCI: 00:14.1: enabled 0
817 12:17:48.181623 PCI: 00:14.2: enabled 1
818 12:17:48.184955 PCI: 00:14.3: enabled 1
819 12:17:48.187926 GENERIC: 0.0: enabled 1
820 12:17:48.188001 PCI: 00:15.0: enabled 1
821 12:17:48.191184 I2C: 00:1a: enabled 1
822 12:17:48.195034 I2C: 00:31: enabled 1
823 12:17:48.198054 I2C: 00:32: enabled 1
824 12:17:48.198156 PCI: 00:15.1: enabled 1
825 12:17:48.201627 I2C: 00:10: enabled 1
826 12:17:48.204973 PCI: 00:15.2: enabled 1
827 12:17:48.208024 PCI: 00:15.3: enabled 1
828 12:17:48.211396 PCI: 00:16.0: enabled 1
829 12:17:48.211469 PCI: 00:16.1: enabled 0
830 12:17:48.214512 PCI: 00:16.2: enabled 0
831 12:17:48.217788 PCI: 00:16.3: enabled 0
832 12:17:48.221711 PCI: 00:16.4: enabled 0
833 12:17:48.224678 PCI: 00:16.5: enabled 0
834 12:17:48.224752 PCI: 00:17.0: enabled 1
835 12:17:48.227658 PCI: 00:19.0: enabled 0
836 12:17:48.231082 PCI: 00:19.1: enabled 1
837 12:17:48.234453 I2C: 00:15: enabled 1
838 12:17:48.234529 PCI: 00:19.2: enabled 0
839 12:17:48.237924 PCI: 00:1d.0: enabled 1
840 12:17:48.241142 GENERIC: 0.0: enabled 1
841 12:17:48.244555 PCI: 00:1e.0: enabled 1
842 12:17:48.248028 PCI: 00:1e.1: enabled 0
843 12:17:48.248115 PCI: 00:1e.2: enabled 1
844 12:17:48.251250 SPI: 00: enabled 1
845 12:17:48.254262 PCI: 00:1e.3: enabled 1
846 12:17:48.257766 SPI: 00: enabled 1
847 12:17:48.257837 PCI: 00:1f.0: enabled 1
848 12:17:48.261175 PNP: 0c09.0: enabled 1
849 12:17:48.264464 PCI: 00:1f.1: enabled 0
850 12:17:48.267806 PCI: 00:1f.2: enabled 1
851 12:17:48.271195 GENERIC: 0.0: enabled 1
852 12:17:48.271270 GENERIC: 0.0: enabled 1
853 12:17:48.322945 GENERIC: 1.0: enabled 1
854 12:17:48.323129 PCI: 00:1f.3: enabled 1
855 12:17:48.323414 PCI: 00:1f.4: enabled 0
856 12:17:48.323514 PCI: 00:1f.5: enabled 1
857 12:17:48.323609 PCI: 00:1f.6: enabled 0
858 12:17:48.323700 PCI: 00:1f.7: enabled 0
859 12:17:48.323790 CPU_CLUSTER: 0: enabled 1
860 12:17:48.323879 APIC: 00: enabled 1
861 12:17:48.323967 APIC: 01: enabled 1
862 12:17:48.324286 APIC: 05: enabled 1
863 12:17:48.324428 APIC: 07: enabled 1
864 12:17:48.324586 APIC: 02: enabled 1
865 12:17:48.324882 APIC: 04: enabled 1
866 12:17:48.324976 APIC: 06: enabled 1
867 12:17:48.325065 APIC: 03: enabled 1
868 12:17:48.325152 Root Device scanning...
869 12:17:48.325240 scan_static_bus for Root Device
870 12:17:48.325327 DOMAIN: 0000 enabled
871 12:17:48.325413 CPU_CLUSTER: 0 enabled
872 12:17:48.325500 DOMAIN: 0000 scanning...
873 12:17:48.331634 PCI: pci_scan_bus for bus 00
874 12:17:48.331722 PCI: 00:00.0 [8086/0000] ops
875 12:17:48.335192 PCI: 00:00.0 [8086/9a12] enabled
876 12:17:48.335305 PCI: 00:02.0 [8086/0000] bus ops
877 12:17:48.338610 PCI: 00:02.0 [8086/9a40] enabled
878 12:17:48.341834 PCI: 00:04.0 [8086/0000] bus ops
879 12:17:48.345228 PCI: 00:04.0 [8086/9a03] enabled
880 12:17:48.348578 PCI: 00:05.0 [8086/9a19] enabled
881 12:17:48.352417 PCI: 00:07.0 [0000/0000] hidden
882 12:17:48.354935 PCI: 00:08.0 [8086/9a11] enabled
883 12:17:48.358924 PCI: 00:0a.0 [8086/9a0d] disabled
884 12:17:48.361666 PCI: 00:0d.0 [8086/0000] bus ops
885 12:17:48.365176 PCI: 00:0d.0 [8086/9a13] enabled
886 12:17:48.368404 PCI: 00:14.0 [8086/0000] bus ops
887 12:17:48.371827 PCI: 00:14.0 [8086/a0ed] enabled
888 12:17:48.378169 PCI: 00:14.2 [8086/a0ef] enabled
889 12:17:48.378487 PCI: 00:14.3 [8086/0000] bus ops
890 12:17:48.381711 PCI: 00:14.3 [8086/a0f0] enabled
891 12:17:48.384932 PCI: 00:15.0 [8086/0000] bus ops
892 12:17:48.388110 PCI: 00:15.0 [8086/a0e8] enabled
893 12:17:48.391442 PCI: 00:15.1 [8086/0000] bus ops
894 12:17:48.395238 PCI: 00:15.1 [8086/a0e9] enabled
895 12:17:48.398394 PCI: 00:15.2 [8086/0000] bus ops
896 12:17:48.401949 PCI: 00:15.2 [8086/a0ea] enabled
897 12:17:48.405206 PCI: 00:15.3 [8086/0000] bus ops
898 12:17:48.408272 PCI: 00:15.3 [8086/a0eb] enabled
899 12:17:48.411505 PCI: 00:16.0 [8086/0000] ops
900 12:17:48.414905 PCI: 00:16.0 [8086/a0e0] enabled
901 12:17:48.421506 PCI: Static device PCI: 00:17.0 not found, disabling it.
902 12:17:48.424752 PCI: 00:19.0 [8086/0000] bus ops
903 12:17:48.427971 PCI: 00:19.0 [8086/a0c5] disabled
904 12:17:48.431152 PCI: 00:19.1 [8086/0000] bus ops
905 12:17:48.435234 PCI: 00:19.1 [8086/a0c6] enabled
906 12:17:48.438276 PCI: 00:1d.0 [8086/0000] bus ops
907 12:17:48.441425 PCI: 00:1d.0 [8086/a0b0] enabled
908 12:17:48.444511 PCI: 00:1e.0 [8086/0000] ops
909 12:17:48.447766 PCI: 00:1e.0 [8086/a0a8] enabled
910 12:17:48.451057 PCI: 00:1e.2 [8086/0000] bus ops
911 12:17:48.454413 PCI: 00:1e.2 [8086/a0aa] enabled
912 12:17:48.457728 PCI: 00:1e.3 [8086/0000] bus ops
913 12:17:48.460995 PCI: 00:1e.3 [8086/a0ab] enabled
914 12:17:48.464436 PCI: 00:1f.0 [8086/0000] bus ops
915 12:17:48.467795 PCI: 00:1f.0 [8086/a087] enabled
916 12:17:48.467901 RTC Init
917 12:17:48.474541 Set power on after power failure.
918 12:17:48.474688 Disabling Deep S3
919 12:17:48.477801 Disabling Deep S3
920 12:17:48.477943 Disabling Deep S4
921 12:17:48.481284 Disabling Deep S4
922 12:17:48.481430 Disabling Deep S5
923 12:17:48.484423 Disabling Deep S5
924 12:17:48.487507 PCI: 00:1f.2 [0000/0000] hidden
925 12:17:48.490830 PCI: 00:1f.3 [8086/0000] bus ops
926 12:17:48.494151 PCI: 00:1f.3 [8086/a0c8] enabled
927 12:17:48.497461 PCI: 00:1f.5 [8086/0000] bus ops
928 12:17:48.500773 PCI: 00:1f.5 [8086/a0a4] enabled
929 12:17:48.504065 PCI: Leftover static devices:
930 12:17:48.504200 PCI: 00:10.2
931 12:17:48.507177 PCI: 00:10.6
932 12:17:48.507288 PCI: 00:10.7
933 12:17:48.510477 PCI: 00:06.0
934 12:17:48.510589 PCI: 00:07.1
935 12:17:48.510686 PCI: 00:07.2
936 12:17:48.513550 PCI: 00:07.3
937 12:17:48.513689 PCI: 00:09.0
938 12:17:48.517469 PCI: 00:0d.1
939 12:17:48.517625 PCI: 00:0d.2
940 12:17:48.517747 PCI: 00:0d.3
941 12:17:48.520721 PCI: 00:0e.0
942 12:17:48.520833 PCI: 00:12.0
943 12:17:48.524278 PCI: 00:12.6
944 12:17:48.524390 PCI: 00:13.0
945 12:17:48.524496 PCI: 00:14.1
946 12:17:48.527486 PCI: 00:16.1
947 12:17:48.527565 PCI: 00:16.2
948 12:17:48.530740 PCI: 00:16.3
949 12:17:48.530835 PCI: 00:16.4
950 12:17:48.534047 PCI: 00:16.5
951 12:17:48.534132 PCI: 00:17.0
952 12:17:48.534207 PCI: 00:19.2
953 12:17:48.537555 PCI: 00:1e.1
954 12:17:48.537659 PCI: 00:1f.1
955 12:17:48.540455 PCI: 00:1f.4
956 12:17:48.540565 PCI: 00:1f.6
957 12:17:48.540660 PCI: 00:1f.7
958 12:17:48.543615 PCI: Check your devicetree.cb.
959 12:17:48.546851 PCI: 00:02.0 scanning...
960 12:17:48.550444 scan_generic_bus for PCI: 00:02.0
961 12:17:48.553553 scan_generic_bus for PCI: 00:02.0 done
962 12:17:48.559945 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
963 12:17:48.563785 PCI: 00:04.0 scanning...
964 12:17:48.567063 scan_generic_bus for PCI: 00:04.0
965 12:17:48.567142 GENERIC: 0.0 enabled
966 12:17:48.573685 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
967 12:17:48.580162 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
968 12:17:48.580244 PCI: 00:0d.0 scanning...
969 12:17:48.583459 scan_static_bus for PCI: 00:0d.0
970 12:17:48.586697 USB0 port 0 enabled
971 12:17:48.589975 USB0 port 0 scanning...
972 12:17:48.593814 scan_static_bus for USB0 port 0
973 12:17:48.593936 USB3 port 0 enabled
974 12:17:48.596470 USB3 port 1 enabled
975 12:17:48.599864 USB3 port 2 disabled
976 12:17:48.599948 USB3 port 3 disabled
977 12:17:48.603217 USB3 port 0 scanning...
978 12:17:48.606478 scan_static_bus for USB3 port 0
979 12:17:48.609884 scan_static_bus for USB3 port 0 done
980 12:17:48.616478 scan_bus: bus USB3 port 0 finished in 6 msecs
981 12:17:48.616595 USB3 port 1 scanning...
982 12:17:48.620129 scan_static_bus for USB3 port 1
983 12:17:48.626484 scan_static_bus for USB3 port 1 done
984 12:17:48.629726 scan_bus: bus USB3 port 1 finished in 6 msecs
985 12:17:48.633021 scan_static_bus for USB0 port 0 done
986 12:17:48.639689 scan_bus: bus USB0 port 0 finished in 43 msecs
987 12:17:48.643137 scan_static_bus for PCI: 00:0d.0 done
988 12:17:48.646292 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
989 12:17:48.649941 PCI: 00:14.0 scanning...
990 12:17:48.653295 scan_static_bus for PCI: 00:14.0
991 12:17:48.656230 USB0 port 0 enabled
992 12:17:48.656319 USB0 port 0 scanning...
993 12:17:48.659534 scan_static_bus for USB0 port 0
994 12:17:48.662862 USB2 port 0 disabled
995 12:17:48.666093 USB2 port 1 enabled
996 12:17:48.666182 USB2 port 2 enabled
997 12:17:48.669303 USB2 port 3 disabled
998 12:17:48.672822 USB2 port 4 enabled
999 12:17:48.672913 USB2 port 5 disabled
1000 12:17:48.681557 USB2 port 6 disabled
1001 12:17:48.681676 USB2 port 7 disabled
1002 12:17:48.681957 USB2 port 8 disabled
1003 12:17:48.683001 USB2 port 9 disabled
1004 12:17:48.683092 USB3 port 0 disabled
1005 12:17:48.686090 USB3 port 1 enabled
1006 12:17:48.689374 USB3 port 2 disabled
1007 12:17:48.689524 USB3 port 3 disabled
1008 12:17:48.692824 USB2 port 1 scanning...
1009 12:17:48.695912 scan_static_bus for USB2 port 1
1010 12:17:48.699158 scan_static_bus for USB2 port 1 done
1011 12:17:48.706057 scan_bus: bus USB2 port 1 finished in 6 msecs
1012 12:17:48.706205 USB2 port 2 scanning...
1013 12:17:48.709156 scan_static_bus for USB2 port 2
1014 12:17:48.716380 scan_static_bus for USB2 port 2 done
1015 12:17:48.719638 scan_bus: bus USB2 port 2 finished in 6 msecs
1016 12:17:48.722739 USB2 port 4 scanning...
1017 12:17:48.726194 scan_static_bus for USB2 port 4
1018 12:17:48.729276 scan_static_bus for USB2 port 4 done
1019 12:17:48.732398 scan_bus: bus USB2 port 4 finished in 6 msecs
1020 12:17:48.735800 USB3 port 1 scanning...
1021 12:17:48.739189 scan_static_bus for USB3 port 1
1022 12:17:48.742533 scan_static_bus for USB3 port 1 done
1023 12:17:48.746119 scan_bus: bus USB3 port 1 finished in 6 msecs
1024 12:17:48.752672 scan_static_bus for USB0 port 0 done
1025 12:17:48.755719 scan_bus: bus USB0 port 0 finished in 93 msecs
1026 12:17:48.758889 scan_static_bus for PCI: 00:14.0 done
1027 12:17:48.765806 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1028 12:17:48.765904 PCI: 00:14.3 scanning...
1029 12:17:48.768907 scan_static_bus for PCI: 00:14.3
1030 12:17:48.772003 GENERIC: 0.0 enabled
1031 12:17:48.775579 scan_static_bus for PCI: 00:14.3 done
1032 12:17:48.782350 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1033 12:17:48.782460 PCI: 00:15.0 scanning...
1034 12:17:48.785550 scan_static_bus for PCI: 00:15.0
1035 12:17:48.788713 I2C: 00:1a enabled
1036 12:17:48.792163 I2C: 00:31 enabled
1037 12:17:48.792277 I2C: 00:32 enabled
1038 12:17:48.795463 scan_static_bus for PCI: 00:15.0 done
1039 12:17:48.801886 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1040 12:17:48.805835 PCI: 00:15.1 scanning...
1041 12:17:48.808467 scan_static_bus for PCI: 00:15.1
1042 12:17:48.808545 I2C: 00:10 enabled
1043 12:17:48.811837 scan_static_bus for PCI: 00:15.1 done
1044 12:17:48.818521 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1045 12:17:48.822052 PCI: 00:15.2 scanning...
1046 12:17:48.825058 scan_static_bus for PCI: 00:15.2
1047 12:17:48.838199 scan_static_bus for PCI: 00:15.2 done
1048 12:17:48.838400 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1049 12:17:48.838569 PCI: 00:15.3 scanning...
1050 12:17:48.838869 scan_static_bus for PCI: 00:15.3
1051 12:17:48.842032 scan_static_bus for PCI: 00:15.3 done
1052 12:17:48.848164 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1053 12:17:48.848332 PCI: 00:19.1 scanning...
1054 12:17:48.852182 scan_static_bus for PCI: 00:19.1
1055 12:17:48.855768 I2C: 00:15 enabled
1056 12:17:48.858836 scan_static_bus for PCI: 00:19.1 done
1057 12:17:48.865327 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1058 12:17:48.865431 PCI: 00:1d.0 scanning...
1059 12:17:48.871709 do_pci_scan_bridge for PCI: 00:1d.0
1060 12:17:48.871808 PCI: pci_scan_bus for bus 01
1061 12:17:48.874828 PCI: 01:00.0 [15b7/5009] enabled
1062 12:17:48.878656 GENERIC: 0.0 enabled
1063 12:17:48.881545 Enabling Common Clock Configuration
1064 12:17:48.888428 L1 Sub-State supported from root port 29
1065 12:17:48.888574 L1 Sub-State Support = 0x5
1066 12:17:48.891647 CommonModeRestoreTime = 0x28
1067 12:17:48.898062 Power On Value = 0x16, Power On Scale = 0x0
1068 12:17:48.898184 ASPM: Enabled L1
1069 12:17:48.901486 PCIe: Max_Payload_Size adjusted to 128
1070 12:17:48.908002 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1071 12:17:48.908098 PCI: 00:1e.2 scanning...
1072 12:17:48.911956 scan_generic_bus for PCI: 00:1e.2
1073 12:17:48.915471 SPI: 00 enabled
1074 12:17:48.922050 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1075 12:17:48.925438 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1076 12:17:48.928763 PCI: 00:1e.3 scanning...
1077 12:17:48.931975 scan_generic_bus for PCI: 00:1e.3
1078 12:17:48.935156 SPI: 00 enabled
1079 12:17:48.938458 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1080 12:17:48.944824 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1081 12:17:48.948136 PCI: 00:1f.0 scanning...
1082 12:17:48.951682 scan_static_bus for PCI: 00:1f.0
1083 12:17:48.951773 PNP: 0c09.0 enabled
1084 12:17:48.954758 PNP: 0c09.0 scanning...
1085 12:17:48.958201 scan_static_bus for PNP: 0c09.0
1086 12:17:48.961594 scan_static_bus for PNP: 0c09.0 done
1087 12:17:48.968139 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1088 12:17:48.971985 scan_static_bus for PCI: 00:1f.0 done
1089 12:17:48.975134 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1090 12:17:48.978415 PCI: 00:1f.2 scanning...
1091 12:17:48.981719 scan_static_bus for PCI: 00:1f.2
1092 12:17:48.984681 GENERIC: 0.0 enabled
1093 12:17:48.984794 GENERIC: 0.0 scanning...
1094 12:17:48.988054 scan_static_bus for GENERIC: 0.0
1095 12:17:48.991853 GENERIC: 0.0 enabled
1096 12:17:48.995001 GENERIC: 1.0 enabled
1097 12:17:48.998337 scan_static_bus for GENERIC: 0.0 done
1098 12:17:49.001780 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1099 12:17:49.008339 scan_static_bus for PCI: 00:1f.2 done
1100 12:17:49.011456 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1101 12:17:49.014895 PCI: 00:1f.3 scanning...
1102 12:17:49.018108 scan_static_bus for PCI: 00:1f.3
1103 12:17:49.021567 scan_static_bus for PCI: 00:1f.3 done
1104 12:17:49.024877 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1105 12:17:49.028203 PCI: 00:1f.5 scanning...
1106 12:17:49.031585 scan_generic_bus for PCI: 00:1f.5
1107 12:17:49.034855 scan_generic_bus for PCI: 00:1f.5 done
1108 12:17:49.041531 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1109 12:17:49.044991 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1110 12:17:49.068555 scan_static_bus for Root Device done
1111 12:17:49.069436 scan_bus: bus Root Device finished in 735 msecs
1112 12:17:49.069959 done
1113 12:17:49.070398 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1114 12:17:49.070830 Chrome EC: UHEPI supported
1115 12:17:49.071549 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1116 12:17:49.077856 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1117 12:17:49.081217 SPI flash protection: WPSW=0 SRP0=1
1118 12:17:49.084284 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1119 12:17:49.091281 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1120 12:17:49.094506 found VGA at PCI: 00:02.0
1121 12:17:49.097497 Setting up VGA for PCI: 00:02.0
1122 12:17:49.101309 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1123 12:17:49.107581 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1124 12:17:49.107812 Allocating resources...
1125 12:17:49.110729 Reading resources...
1126 12:17:49.114089 Root Device read_resources bus 0 link: 0
1127 12:17:49.120680 DOMAIN: 0000 read_resources bus 0 link: 0
1128 12:17:49.124106 PCI: 00:04.0 read_resources bus 1 link: 0
1129 12:17:49.130909 PCI: 00:04.0 read_resources bus 1 link: 0 done
1130 12:17:49.134037 PCI: 00:0d.0 read_resources bus 0 link: 0
1131 12:17:49.140109 USB0 port 0 read_resources bus 0 link: 0
1132 12:17:49.143337 USB0 port 0 read_resources bus 0 link: 0 done
1133 12:17:49.149900 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1134 12:17:49.153715 PCI: 00:14.0 read_resources bus 0 link: 0
1135 12:17:49.156963 USB0 port 0 read_resources bus 0 link: 0
1136 12:17:49.164190 USB0 port 0 read_resources bus 0 link: 0 done
1137 12:17:49.167465 PCI: 00:14.0 read_resources bus 0 link: 0 done
1138 12:17:49.174872 PCI: 00:14.3 read_resources bus 0 link: 0
1139 12:17:49.177942 PCI: 00:14.3 read_resources bus 0 link: 0 done
1140 12:17:49.184408 PCI: 00:15.0 read_resources bus 0 link: 0
1141 12:17:49.187711 PCI: 00:15.0 read_resources bus 0 link: 0 done
1142 12:17:49.194338 PCI: 00:15.1 read_resources bus 0 link: 0
1143 12:17:49.197706 PCI: 00:15.1 read_resources bus 0 link: 0 done
1144 12:17:49.204648 PCI: 00:19.1 read_resources bus 0 link: 0
1145 12:17:49.208405 PCI: 00:19.1 read_resources bus 0 link: 0 done
1146 12:17:49.215286 PCI: 00:1d.0 read_resources bus 1 link: 0
1147 12:17:49.218324 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1148 12:17:49.224817 PCI: 00:1e.2 read_resources bus 2 link: 0
1149 12:17:49.228272 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1150 12:17:49.234830 PCI: 00:1e.3 read_resources bus 3 link: 0
1151 12:17:49.238040 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1152 12:17:49.244685 PCI: 00:1f.0 read_resources bus 0 link: 0
1153 12:17:49.248262 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1154 12:17:49.251431 PCI: 00:1f.2 read_resources bus 0 link: 0
1155 12:17:49.258682 GENERIC: 0.0 read_resources bus 0 link: 0
1156 12:17:49.261272 GENERIC: 0.0 read_resources bus 0 link: 0 done
1157 12:17:49.268375 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1158 12:17:49.274490 DOMAIN: 0000 read_resources bus 0 link: 0 done
1159 12:17:49.277756 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1160 12:17:49.284238 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1161 12:17:49.287592 Root Device read_resources bus 0 link: 0 done
1162 12:17:49.291026 Done reading resources.
1163 12:17:49.294224 Show resources in subtree (Root Device)...After reading.
1164 12:17:49.300770 Root Device child on link 0 DOMAIN: 0000
1165 12:17:49.304440 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1166 12:17:49.314120 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1167 12:17:49.324551 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1168 12:17:49.324650 PCI: 00:00.0
1169 12:17:49.334121 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1170 12:17:49.344572 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1171 12:17:49.354015 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1172 12:17:49.363812 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1173 12:17:49.374336 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1174 12:17:49.380927 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1175 12:17:49.390792 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1176 12:17:49.407356 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1177 12:17:49.410698 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1178 12:17:49.420221 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1179 12:17:49.430364 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1180 12:17:49.436556 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1181 12:17:49.446809 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1182 12:17:49.456873 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1183 12:17:49.466924 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1184 12:17:49.476939 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1185 12:17:49.486875 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1186 12:17:49.493526 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1187 12:17:49.502873 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1188 12:17:49.513129 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1189 12:17:49.516367 PCI: 00:02.0
1190 12:17:49.526238 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1191 12:17:49.536286 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1192 12:17:49.543323 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1193 12:17:49.549861 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1194 12:17:49.724076 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1195 12:17:49.724319 GENERIC: 0.0
1196 12:17:49.724667 PCI: 00:05.0
1197 12:17:49.724788 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1198 12:17:49.724943 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1199 12:17:49.725048 GENERIC: 0.0
1200 12:17:49.725150 PCI: 00:08.0
1201 12:17:49.725249 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1202 12:17:49.725349 PCI: 00:0a.0
1203 12:17:49.725447 PCI: 00:0d.0 child on link 0 USB0 port 0
1204 12:17:49.725547 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1205 12:17:49.725676 USB0 port 0 child on link 0 USB3 port 0
1206 12:17:49.725787 USB3 port 0
1207 12:17:49.725897 USB3 port 1
1208 12:17:49.725993 USB3 port 2
1209 12:17:49.726088 USB3 port 3
1210 12:17:49.726184 PCI: 00:14.0 child on link 0 USB0 port 0
1211 12:17:49.726280 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1212 12:17:49.726377 USB0 port 0 child on link 0 USB2 port 0
1213 12:17:49.726474 USB2 port 0
1214 12:17:49.726569 USB2 port 1
1215 12:17:49.726664 USB2 port 2
1216 12:17:49.726759 USB2 port 3
1217 12:17:49.726854 USB2 port 4
1218 12:17:49.726948 USB2 port 5
1219 12:17:49.727054 USB2 port 6
1220 12:17:49.727162 USB2 port 7
1221 12:17:49.727270 USB2 port 8
1222 12:17:49.727362 USB2 port 9
1223 12:17:49.727470 USB3 port 0
1224 12:17:49.727592 USB3 port 1
1225 12:17:49.727687 USB3 port 2
1226 12:17:49.727780 USB3 port 3
1227 12:17:49.727873 PCI: 00:14.2
1228 12:17:49.727980 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1229 12:17:49.728074 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1230 12:17:49.728183 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1231 12:17:49.728289 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1232 12:17:49.728398 GENERIC: 0.0
1233 12:17:49.728492 PCI: 00:15.0 child on link 0 I2C: 00:1a
1234 12:17:49.728587 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1235 12:17:49.728683 I2C: 00:1a
1236 12:17:49.728778 I2C: 00:31
1237 12:17:49.728940 I2C: 00:32
1238 12:17:49.729064 PCI: 00:15.1 child on link 0 I2C: 00:10
1239 12:17:49.764967 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1240 12:17:49.765117 I2C: 00:10
1241 12:17:49.765213 PCI: 00:15.2
1242 12:17:49.765291 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 12:17:49.765353 PCI: 00:15.3
1244 12:17:49.765413 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1245 12:17:49.765472 PCI: 00:16.0
1246 12:17:49.768520 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1247 12:17:49.771939 PCI: 00:19.0
1248 12:17:49.775113 PCI: 00:19.1 child on link 0 I2C: 00:15
1249 12:17:49.785065 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1250 12:17:49.785162 I2C: 00:15
1251 12:17:49.791527 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1252 12:17:49.798547 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1253 12:17:49.808386 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1254 12:17:49.818385 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1255 12:17:49.821924 GENERIC: 0.0
1256 12:17:49.822031 PCI: 01:00.0
1257 12:17:49.831440 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1258 12:17:49.841425 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1259 12:17:49.844733 PCI: 00:1e.0
1260 12:17:49.855107 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1261 12:17:49.858404 PCI: 00:1e.2 child on link 0 SPI: 00
1262 12:17:49.868014 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1263 12:17:49.871112 SPI: 00
1264 12:17:49.874967 PCI: 00:1e.3 child on link 0 SPI: 00
1265 12:17:49.884789 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1266 12:17:49.884966 SPI: 00
1267 12:17:49.888126 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1268 12:17:49.897866 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1269 12:17:49.901085 PNP: 0c09.0
1270 12:17:49.908149 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1271 12:17:49.914396 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1272 12:17:49.920998 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1273 12:17:49.930863 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1274 12:17:49.938016 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1275 12:17:49.938113 GENERIC: 0.0
1276 12:17:49.940812 GENERIC: 1.0
1277 12:17:49.940900 PCI: 00:1f.3
1278 12:17:49.950813 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1279 12:17:49.961166 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1280 12:17:49.964505 PCI: 00:1f.5
1281 12:17:49.974350 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1282 12:17:49.977473 CPU_CLUSTER: 0 child on link 0 APIC: 00
1283 12:17:49.977567 APIC: 00
1284 12:17:49.980630 APIC: 01
1285 12:17:49.980745 APIC: 05
1286 12:17:49.980854 APIC: 07
1287 12:17:49.984367 APIC: 02
1288 12:17:49.984487 APIC: 04
1289 12:17:49.984585 APIC: 06
1290 12:17:49.987798 APIC: 03
1291 12:17:49.993773 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1292 12:17:50.000450 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1293 12:17:50.007537 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1294 12:17:50.013861 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1295 12:17:50.017067 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1296 12:17:50.020723 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1297 12:17:50.027629 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1298 12:17:50.034075 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1299 12:17:50.044192 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1300 12:17:50.050814 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1301 12:17:50.057276 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1302 12:17:50.063568 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1303 12:17:50.070305 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1304 12:17:50.079782 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1305 12:17:50.083517 DOMAIN: 0000: Resource ranges:
1306 12:17:50.086704 * Base: 1000, Size: 800, Tag: 100
1307 12:17:50.089993 * Base: 1900, Size: e700, Tag: 100
1308 12:17:50.096660 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1309 12:17:50.103339 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1310 12:17:50.109888 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1311 12:17:50.116474 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1312 12:17:50.122796 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1313 12:17:50.132981 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1314 12:17:50.139452 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1315 12:17:50.145999 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1316 12:17:50.156009 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1317 12:17:50.162994 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1318 12:17:50.169565 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1319 12:17:50.179561 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1320 12:17:50.185834 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1321 12:17:50.304496 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1322 12:17:50.305375 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1323 12:17:50.306064 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1324 12:17:50.306649 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1325 12:17:50.307295 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1326 12:17:50.307893 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1327 12:17:50.308512 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1328 12:17:50.309157 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1329 12:17:50.309718 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1330 12:17:50.310298 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1331 12:17:50.310872 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1332 12:17:50.311409 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1333 12:17:50.311978 DOMAIN: 0000: Resource ranges:
1334 12:17:50.312537 * Base: 7fc00000, Size: 40400000, Tag: 200
1335 12:17:50.313151 * Base: d0000000, Size: 28000000, Tag: 200
1336 12:17:50.313751 * Base: fa000000, Size: 1000000, Tag: 200
1337 12:17:50.314348 * Base: fb001000, Size: 2fff000, Tag: 200
1338 12:17:50.314950 * Base: fe010000, Size: 2e000, Tag: 200
1339 12:17:50.315644 * Base: fe03f000, Size: d41000, Tag: 200
1340 12:17:50.316225 * Base: fed88000, Size: 8000, Tag: 200
1341 12:17:50.316786 * Base: fed93000, Size: d000, Tag: 200
1342 12:17:50.318783 * Base: feda2000, Size: 1e000, Tag: 200
1343 12:17:50.322257 * Base: fede0000, Size: 1220000, Tag: 200
1344 12:17:50.328694 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1345 12:17:50.335342 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1346 12:17:50.341718 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1347 12:17:50.348389 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1348 12:17:50.355053 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1349 12:17:50.361617 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1350 12:17:50.368108 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1351 12:17:50.374571 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1352 12:17:50.381821 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1353 12:17:50.387876 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1354 12:17:50.394950 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1355 12:17:50.401605 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1356 12:17:50.408230 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1357 12:17:50.414817 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1358 12:17:50.421604 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1359 12:17:50.427670 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1360 12:17:50.434719 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1361 12:17:50.441494 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1362 12:17:50.448203 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1363 12:17:50.454580 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1364 12:17:50.460893 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1365 12:17:50.467765 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1366 12:17:50.474458 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1367 12:17:50.481155 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1368 12:17:50.491296 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1369 12:17:50.494557 PCI: 00:1d.0: Resource ranges:
1370 12:17:50.497716 * Base: 7fc00000, Size: 100000, Tag: 200
1371 12:17:50.504221 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1372 12:17:50.511002 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1373 12:17:50.517167 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1374 12:17:50.527778 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1375 12:17:50.530496 Root Device assign_resources, bus 0 link: 0
1376 12:17:50.533804 DOMAIN: 0000 assign_resources, bus 0 link: 0
1377 12:17:50.544293 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1378 12:17:50.550941 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1379 12:17:50.560696 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1380 12:17:50.567192 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1381 12:17:50.574081 PCI: 00:04.0 assign_resources, bus 1 link: 0
1382 12:17:50.577277 PCI: 00:04.0 assign_resources, bus 1 link: 0
1383 12:17:50.587265 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1384 12:17:50.593386 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1385 12:17:50.600190 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1386 12:17:50.606774 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1387 12:17:50.609954 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1388 12:17:50.620155 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1389 12:17:50.624039 PCI: 00:14.0 assign_resources, bus 0 link: 0
1390 12:17:50.627131 PCI: 00:14.0 assign_resources, bus 0 link: 0
1391 12:17:50.637222 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1392 12:17:50.643919 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1393 12:17:50.653933 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1394 12:17:50.657236 PCI: 00:14.3 assign_resources, bus 0 link: 0
1395 12:17:50.663666 PCI: 00:14.3 assign_resources, bus 0 link: 0
1396 12:17:50.670354 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1397 12:17:50.673634 PCI: 00:15.0 assign_resources, bus 0 link: 0
1398 12:17:50.680313 PCI: 00:15.0 assign_resources, bus 0 link: 0
1399 12:17:50.686596 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1400 12:17:50.693962 PCI: 00:15.1 assign_resources, bus 0 link: 0
1401 12:17:50.697174 PCI: 00:15.1 assign_resources, bus 0 link: 0
1402 12:17:50.817947 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1403 12:17:50.818113 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1404 12:17:50.818189 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1405 12:17:50.818254 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1406 12:17:50.818317 PCI: 00:19.1 assign_resources, bus 0 link: 0
1407 12:17:50.818377 PCI: 00:19.1 assign_resources, bus 0 link: 0
1408 12:17:50.818437 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1409 12:17:50.818497 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1410 12:17:50.818556 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1411 12:17:50.818614 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1412 12:17:50.818686 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1413 12:17:50.818757 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1414 12:17:50.818827 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1415 12:17:50.818918 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1416 12:17:50.819007 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1417 12:17:50.819098 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1418 12:17:50.819391 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1419 12:17:50.822510 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1420 12:17:50.825726 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1421 12:17:50.832149 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1422 12:17:50.835447 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1423 12:17:50.842424 LPC: Trying to open IO window from 800 size 1ff
1424 12:17:50.849015 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1425 12:17:50.858969 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1426 12:17:50.865582 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1427 12:17:50.872068 DOMAIN: 0000 assign_resources, bus 0 link: 0
1428 12:17:50.875420 Root Device assign_resources, bus 0 link: 0
1429 12:17:50.878752 Done setting resources.
1430 12:17:50.884947 Show resources in subtree (Root Device)...After assigning values.
1431 12:17:50.888128 Root Device child on link 0 DOMAIN: 0000
1432 12:17:50.892130 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1433 12:17:50.901894 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1434 12:17:50.911465 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1435 12:17:50.914806 PCI: 00:00.0
1436 12:17:50.924740 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1437 12:17:50.931547 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1438 12:17:50.941478 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1439 12:17:50.951250 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1440 12:17:50.961114 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1441 12:17:50.971527 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1442 12:17:50.978114 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1443 12:17:51.522779 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1444 12:17:51.522979 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1445 12:17:51.523135 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1446 12:17:51.523244 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1447 12:17:51.523351 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1448 12:17:51.523452 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1449 12:17:51.523582 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1450 12:17:51.523680 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1451 12:17:51.523793 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1452 12:17:51.523899 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1453 12:17:51.523987 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1454 12:17:51.524104 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1455 12:17:51.524192 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1456 12:17:51.524293 PCI: 00:02.0
1457 12:17:51.524393 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1458 12:17:51.524480 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1459 12:17:51.524580 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1460 12:17:51.524672 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1461 12:17:51.524760 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1462 12:17:51.524875 GENERIC: 0.0
1463 12:17:51.524947 PCI: 00:05.0
1464 12:17:51.525002 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1465 12:17:51.525059 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1466 12:17:51.525114 GENERIC: 0.0
1467 12:17:51.525199 PCI: 00:08.0
1468 12:17:51.525255 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1469 12:17:51.525310 PCI: 00:0a.0
1470 12:17:51.525365 PCI: 00:0d.0 child on link 0 USB0 port 0
1471 12:17:51.525420 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1472 12:17:51.525490 USB0 port 0 child on link 0 USB3 port 0
1473 12:17:51.525546 USB3 port 0
1474 12:17:51.525602 USB3 port 1
1475 12:17:51.525657 USB3 port 2
1476 12:17:51.525713 USB3 port 3
1477 12:17:51.525768 PCI: 00:14.0 child on link 0 USB0 port 0
1478 12:17:51.525825 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1479 12:17:51.525881 USB0 port 0 child on link 0 USB2 port 0
1480 12:17:51.525937 USB2 port 0
1481 12:17:51.525992 USB2 port 1
1482 12:17:51.526047 USB2 port 2
1483 12:17:51.526102 USB2 port 3
1484 12:17:51.526157 USB2 port 4
1485 12:17:51.526212 USB2 port 5
1486 12:17:51.526268 USB2 port 6
1487 12:17:51.526323 USB2 port 7
1488 12:17:51.526378 USB2 port 8
1489 12:17:51.526433 USB2 port 9
1490 12:17:51.526488 USB3 port 0
1491 12:17:51.526547 USB3 port 1
1492 12:17:51.526603 USB3 port 2
1493 12:17:51.526658 USB3 port 3
1494 12:17:51.526713 PCI: 00:14.2
1495 12:17:51.526768 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1496 12:17:51.526825 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1497 12:17:51.526881 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1498 12:17:51.526937 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1499 12:17:51.526993 GENERIC: 0.0
1500 12:17:51.527049 PCI: 00:15.0 child on link 0 I2C: 00:1a
1501 12:17:51.527104 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1502 12:17:51.527161 I2C: 00:1a
1503 12:17:51.527215 I2C: 00:31
1504 12:17:51.527271 I2C: 00:32
1505 12:17:51.527335 PCI: 00:15.1 child on link 0 I2C: 00:10
1506 12:17:51.527393 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1507 12:17:51.527449 I2C: 00:10
1508 12:17:51.527505 PCI: 00:15.2
1509 12:17:51.527560 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1510 12:17:51.527616 PCI: 00:15.3
1511 12:17:51.527671 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1512 12:17:51.527727 PCI: 00:16.0
1513 12:17:51.527782 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1514 12:17:51.527843 PCI: 00:19.0
1515 12:17:51.527903 PCI: 00:19.1 child on link 0 I2C: 00:15
1516 12:17:51.527959 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1517 12:17:51.528015 I2C: 00:15
1518 12:17:51.528251 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1519 12:17:51.528314 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1520 12:17:51.528373 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1521 12:17:51.528430 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1522 12:17:51.528487 GENERIC: 0.0
1523 12:17:51.528542 PCI: 01:00.0
1524 12:17:51.528598 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1525 12:17:51.528655 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1526 12:17:51.528711 PCI: 00:1e.0
1527 12:17:51.528767 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1528 12:17:51.528833 PCI: 00:1e.2 child on link 0 SPI: 00
1529 12:17:51.528896 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1530 12:17:51.528958 SPI: 00
1531 12:17:51.529014 PCI: 00:1e.3 child on link 0 SPI: 00
1532 12:17:51.529071 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1533 12:17:51.529127 SPI: 00
1534 12:17:51.529182 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1535 12:17:51.529238 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1536 12:17:51.529294 PNP: 0c09.0
1537 12:17:51.529350 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1538 12:17:51.529406 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1539 12:17:51.529463 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1540 12:17:51.531095 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1541 12:17:51.537673 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1542 12:17:51.537782 GENERIC: 0.0
1543 12:17:51.541070 GENERIC: 1.0
1544 12:17:51.541153 PCI: 00:1f.3
1545 12:17:51.554017 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1546 12:17:51.563751 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1547 12:17:51.563885 PCI: 00:1f.5
1548 12:17:51.573964 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1549 12:17:51.580500 CPU_CLUSTER: 0 child on link 0 APIC: 00
1550 12:17:51.580652 APIC: 00
1551 12:17:51.580753 APIC: 01
1552 12:17:51.583650 APIC: 05
1553 12:17:51.583761 APIC: 07
1554 12:17:51.586918 APIC: 02
1555 12:17:51.587045 APIC: 04
1556 12:17:51.587129 APIC: 06
1557 12:17:51.590357 APIC: 03
1558 12:17:51.593736 Done allocating resources.
1559 12:17:51.596961 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1560 12:17:51.603824 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1561 12:17:51.607195 Configure GPIOs for I2S audio on UP4.
1562 12:17:51.614447 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1563 12:17:51.617480 Enabling resources...
1564 12:17:51.620823 PCI: 00:00.0 subsystem <- 8086/9a12
1565 12:17:51.624000 PCI: 00:00.0 cmd <- 06
1566 12:17:51.627263 PCI: 00:02.0 subsystem <- 8086/9a40
1567 12:17:51.630941 PCI: 00:02.0 cmd <- 03
1568 12:17:51.634068 PCI: 00:04.0 subsystem <- 8086/9a03
1569 12:17:51.637301 PCI: 00:04.0 cmd <- 02
1570 12:17:51.640652 PCI: 00:05.0 subsystem <- 8086/9a19
1571 12:17:51.640761 PCI: 00:05.0 cmd <- 02
1572 12:17:51.647091 PCI: 00:08.0 subsystem <- 8086/9a11
1573 12:17:51.647203 PCI: 00:08.0 cmd <- 06
1574 12:17:51.650399 PCI: 00:0d.0 subsystem <- 8086/9a13
1575 12:17:51.653794 PCI: 00:0d.0 cmd <- 02
1576 12:17:51.657565 PCI: 00:14.0 subsystem <- 8086/a0ed
1577 12:17:51.660603 PCI: 00:14.0 cmd <- 02
1578 12:17:51.663715 PCI: 00:14.2 subsystem <- 8086/a0ef
1579 12:17:51.666874 PCI: 00:14.2 cmd <- 02
1580 12:17:51.670387 PCI: 00:14.3 subsystem <- 8086/a0f0
1581 12:17:51.673687 PCI: 00:14.3 cmd <- 02
1582 12:17:51.677032 PCI: 00:15.0 subsystem <- 8086/a0e8
1583 12:17:51.680459 PCI: 00:15.0 cmd <- 02
1584 12:17:51.683737 PCI: 00:15.1 subsystem <- 8086/a0e9
1585 12:17:51.687136 PCI: 00:15.1 cmd <- 02
1586 12:17:51.690130 PCI: 00:15.2 subsystem <- 8086/a0ea
1587 12:17:51.690217 PCI: 00:15.2 cmd <- 02
1588 12:17:51.697479 PCI: 00:15.3 subsystem <- 8086/a0eb
1589 12:17:51.697564 PCI: 00:15.3 cmd <- 02
1590 12:17:51.700002 PCI: 00:16.0 subsystem <- 8086/a0e0
1591 12:17:51.703484 PCI: 00:16.0 cmd <- 02
1592 12:17:51.706815 PCI: 00:19.1 subsystem <- 8086/a0c6
1593 12:17:51.710130 PCI: 00:19.1 cmd <- 02
1594 12:17:51.713514 PCI: 00:1d.0 bridge ctrl <- 0013
1595 12:17:51.716877 PCI: 00:1d.0 subsystem <- 8086/a0b0
1596 12:17:51.720156 PCI: 00:1d.0 cmd <- 06
1597 12:17:51.723431 PCI: 00:1e.0 subsystem <- 8086/a0a8
1598 12:17:51.726569 PCI: 00:1e.0 cmd <- 06
1599 12:17:51.729780 PCI: 00:1e.2 subsystem <- 8086/a0aa
1600 12:17:51.733036 PCI: 00:1e.2 cmd <- 06
1601 12:17:51.736816 PCI: 00:1e.3 subsystem <- 8086/a0ab
1602 12:17:51.740014 PCI: 00:1e.3 cmd <- 02
1603 12:17:51.743125 PCI: 00:1f.0 subsystem <- 8086/a087
1604 12:17:51.743211 PCI: 00:1f.0 cmd <- 407
1605 12:17:51.750210 PCI: 00:1f.3 subsystem <- 8086/a0c8
1606 12:17:51.750302 PCI: 00:1f.3 cmd <- 02
1607 12:17:51.753671 PCI: 00:1f.5 subsystem <- 8086/a0a4
1608 12:17:51.756458 PCI: 00:1f.5 cmd <- 406
1609 12:17:51.761715 PCI: 01:00.0 cmd <- 02
1610 12:17:52.392902 done.
1611 12:17:52.393305 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1612 12:17:52.393461 Initializing devices...
1613 12:17:52.393587 Root Device init
1614 12:17:52.393715 Chrome EC: Set SMI mask to 0x0000000000000000
1615 12:17:52.393813 Chrome EC: clear events_b mask to 0x0000000000000000
1616 12:17:52.393911 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1617 12:17:52.394008 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1618 12:17:52.394109 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1619 12:17:52.394205 Chrome EC: Set WAKE mask to 0x0000000000000000
1620 12:17:52.394297 fw_config match found: DB_USB=USB3_ACTIVE
1621 12:17:52.394363 Configure Right Type-C port orientation for retimer
1622 12:17:52.394423 Root Device init finished in 45 msecs
1623 12:17:52.394481 PCI: 00:00.0 init
1624 12:17:52.394542 CPU TDP = 9 Watts
1625 12:17:52.394600 CPU PL1 = 9 Watts
1626 12:17:52.394656 CPU PL2 = 40 Watts
1627 12:17:52.394712 CPU PL4 = 83 Watts
1628 12:17:52.394770 PCI: 00:00.0 init finished in 8 msecs
1629 12:17:52.394831 PCI: 00:02.0 init
1630 12:17:52.394886 GMA: Found VBT in CBFS
1631 12:17:52.394942 GMA: Found valid VBT in CBFS
1632 12:17:52.394999 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1633 12:17:52.395068 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1634 12:17:52.395127 PCI: 00:02.0 init finished in 18 msecs
1635 12:17:52.395184 PCI: 00:05.0 init
1636 12:17:52.395239 PCI: 00:05.0 init finished in 0 msecs
1637 12:17:52.395294 PCI: 00:08.0 init
1638 12:17:52.395362 PCI: 00:08.0 init finished in 0 msecs
1639 12:17:52.395450 PCI: 00:14.0 init
1640 12:17:52.395542 PCI: 00:14.0 init finished in 0 msecs
1641 12:17:52.395630 PCI: 00:14.2 init
1642 12:17:52.395692 PCI: 00:14.2 init finished in 0 msecs
1643 12:17:52.395750 PCI: 00:15.0 init
1644 12:17:52.395806 I2C bus 0 version 0x3230302a
1645 12:17:52.395862 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1646 12:17:52.395918 PCI: 00:15.0 init finished in 6 msecs
1647 12:17:52.395975 PCI: 00:15.1 init
1648 12:17:52.396032 I2C bus 1 version 0x3230302a
1649 12:17:52.396088 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1650 12:17:52.396159 PCI: 00:15.1 init finished in 6 msecs
1651 12:17:52.396230 PCI: 00:15.2 init
1652 12:17:52.396299 I2C bus 2 version 0x3230302a
1653 12:17:52.396353 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1654 12:17:52.396408 PCI: 00:15.2 init finished in 6 msecs
1655 12:17:52.396462 PCI: 00:15.3 init
1656 12:17:52.396546 I2C bus 3 version 0x3230302a
1657 12:17:52.396601 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1658 12:17:52.396655 PCI: 00:15.3 init finished in 6 msecs
1659 12:17:52.396710 PCI: 00:16.0 init
1660 12:17:52.396779 PCI: 00:16.0 init finished in 0 msecs
1661 12:17:52.396845 PCI: 00:19.1 init
1662 12:17:52.396902 I2C bus 5 version 0x3230302a
1663 12:17:52.396958 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1664 12:17:52.397014 PCI: 00:19.1 init finished in 6 msecs
1665 12:17:52.397070 PCI: 00:1d.0 init
1666 12:17:52.397126 Initializing PCH PCIe bridge.
1667 12:17:52.397181 PCI: 00:1d.0 init finished in 3 msecs
1668 12:17:52.397238 PCI: 00:1f.0 init
1669 12:17:52.397293 IOAPIC: Initializing IOAPIC at 0xfec00000
1670 12:17:52.397350 IOAPIC: Bootstrap Processor Local APIC = 0x00
1671 12:17:52.397406 IOAPIC: ID = 0x02
1672 12:17:52.397461 IOAPIC: Dumping registers
1673 12:17:52.397517 reg 0x0000: 0x02000000
1674 12:17:52.397573 reg 0x0001: 0x00770020
1675 12:17:52.397628 reg 0x0002: 0x00000000
1676 12:17:52.397684 PCI: 00:1f.0 init finished in 21 msecs
1677 12:17:52.397739 PCI: 00:1f.2 init
1678 12:17:52.397795 Disabling ACPI via APMC.
1679 12:17:52.397851 APMC done.
1680 12:17:52.397906 PCI: 00:1f.2 init finished in 6 msecs
1681 12:17:52.397962 PCI: 01:00.0 init
1682 12:17:52.398017 PCI: 01:00.0 init finished in 0 msecs
1683 12:17:52.398074 PNP: 0c09.0 init
1684 12:17:52.398129 Google Chrome EC uptime: 8.292 seconds
1685 12:17:52.398185 Google Chrome AP resets since EC boot: 1
1686 12:17:52.398241 Google Chrome most recent AP reset causes:
1687 12:17:52.398297 0.453: 32775 shutdown: entering G3
1688 12:17:52.398353 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1689 12:17:52.398410 PNP: 0c09.0 init finished in 22 msecs
1690 12:17:52.398465 Devices initialized
1691 12:17:52.398520 Show all devs... After init.
1692 12:17:52.398576 Root Device: enabled 1
1693 12:17:52.398631 DOMAIN: 0000: enabled 1
1694 12:17:52.398687 CPU_CLUSTER: 0: enabled 1
1695 12:17:52.398742 PCI: 00:00.0: enabled 1
1696 12:17:52.398798 PCI: 00:02.0: enabled 1
1697 12:17:52.398853 PCI: 00:04.0: enabled 1
1698 12:17:52.398909 PCI: 00:05.0: enabled 1
1699 12:17:52.398965 PCI: 00:06.0: enabled 0
1700 12:17:52.399021 PCI: 00:07.0: enabled 0
1701 12:17:52.399077 PCI: 00:07.1: enabled 0
1702 12:17:52.399131 PCI: 00:07.2: enabled 0
1703 12:17:52.399187 PCI: 00:07.3: enabled 0
1704 12:17:52.399242 PCI: 00:08.0: enabled 1
1705 12:17:52.399298 PCI: 00:09.0: enabled 0
1706 12:17:52.399352 PCI: 00:0a.0: enabled 0
1707 12:17:52.399407 PCI: 00:0d.0: enabled 1
1708 12:17:52.399464 PCI: 00:0d.1: enabled 0
1709 12:17:52.399519 PCI: 00:0d.2: enabled 0
1710 12:17:52.399574 PCI: 00:0d.3: enabled 0
1711 12:17:52.399630 PCI: 00:0e.0: enabled 0
1712 12:17:52.399685 PCI: 00:10.2: enabled 1
1713 12:17:52.399740 PCI: 00:10.6: enabled 0
1714 12:17:52.399795 PCI: 00:10.7: enabled 0
1715 12:17:52.399850 PCI: 00:12.0: enabled 0
1716 12:17:52.399906 PCI: 00:12.6: enabled 0
1717 12:17:52.399961 PCI: 00:13.0: enabled 0
1718 12:17:52.400016 PCI: 00:14.0: enabled 1
1719 12:17:52.400071 PCI: 00:14.1: enabled 0
1720 12:17:52.400137 PCI: 00:14.2: enabled 1
1721 12:17:52.400247 PCI: 00:14.3: enabled 1
1722 12:17:52.400351 PCI: 00:15.0: enabled 1
1723 12:17:52.400439 PCI: 00:15.1: enabled 1
1724 12:17:52.400526 PCI: 00:15.2: enabled 1
1725 12:17:52.400621 PCI: 00:15.3: enabled 1
1726 12:17:52.400710 PCI: 00:16.0: enabled 1
1727 12:17:52.400797 PCI: 00:16.1: enabled 0
1728 12:17:52.400906 PCI: 00:16.2: enabled 0
1729 12:17:52.401007 PCI: 00:16.3: enabled 0
1730 12:17:52.401103 PCI: 00:16.4: enabled 0
1731 12:17:52.401190 PCI: 00:16.5: enabled 0
1732 12:17:52.401277 PCI: 00:17.0: enabled 0
1733 12:17:52.401363 PCI: 00:19.0: enabled 0
1734 12:17:52.401449 PCI: 00:19.1: enabled 1
1735 12:17:52.401534 PCI: 00:19.2: enabled 0
1736 12:17:52.401620 PCI: 00:1c.0: enabled 1
1737 12:17:52.401706 PCI: 00:1c.1: enabled 0
1738 12:17:52.401792 PCI: 00:1c.2: enabled 0
1739 12:17:52.401878 PCI: 00:1c.3: enabled 0
1740 12:17:52.401968 PCI: 00:1c.4: enabled 0
1741 12:17:52.402057 PCI: 00:1c.5: enabled 0
1742 12:17:52.402147 PCI: 00:1c.6: enabled 1
1743 12:17:52.402234 PCI: 00:1c.7: enabled 0
1744 12:17:52.402329 PCI: 00:1d.0: enabled 1
1745 12:17:52.402416 PCI: 00:1d.1: enabled 0
1746 12:17:52.402502 PCI: 00:1d.2: enabled 1
1747 12:17:52.402589 PCI: 00:1d.3: enabled 0
1748 12:17:52.402871 PCI: 00:1e.0: enabled 1
1749 12:17:52.402964 PCI: 00:1e.1: enabled 0
1750 12:17:52.403051 PCI: 00:1e.2: enabled 1
1751 12:17:52.403137 PCI: 00:1e.3: enabled 1
1752 12:17:52.403224 PCI: 00:1f.0: enabled 1
1753 12:17:52.403312 PCI: 00:1f.1: enabled 0
1754 12:17:52.403398 PCI: 00:1f.2: enabled 1
1755 12:17:52.403484 PCI: 00:1f.3: enabled 1
1756 12:17:52.403568 PCI: 00:1f.4: enabled 0
1757 12:17:52.403653 PCI: 00:1f.5: enabled 1
1758 12:17:52.403739 PCI: 00:1f.6: enabled 0
1759 12:17:52.403828 PCI: 00:1f.7: enabled 0
1760 12:17:52.403913 APIC: 00: enabled 1
1761 12:17:52.403999 GENERIC: 0.0: enabled 1
1762 12:17:52.404084 GENERIC: 0.0: enabled 1
1763 12:17:52.404169 GENERIC: 1.0: enabled 1
1764 12:17:52.404254 GENERIC: 0.0: enabled 1
1765 12:17:52.404339 GENERIC: 1.0: enabled 1
1766 12:17:52.404423 USB0 port 0: enabled 1
1767 12:17:52.404508 GENERIC: 0.0: enabled 1
1768 12:17:52.404593 USB0 port 0: enabled 1
1769 12:17:52.404678 GENERIC: 0.0: enabled 1
1770 12:17:52.404763 I2C: 00:1a: enabled 1
1771 12:17:52.404866 I2C: 00:31: enabled 1
1772 12:17:52.404953 I2C: 00:32: enabled 1
1773 12:17:52.405037 I2C: 00:10: enabled 1
1774 12:17:52.405127 I2C: 00:15: enabled 1
1775 12:17:52.405213 GENERIC: 0.0: enabled 0
1776 12:17:52.405298 GENERIC: 1.0: enabled 0
1777 12:17:52.405384 GENERIC: 0.0: enabled 1
1778 12:17:52.405469 SPI: 00: enabled 1
1779 12:17:52.405554 SPI: 00: enabled 1
1780 12:17:52.405639 PNP: 0c09.0: enabled 1
1781 12:17:52.405723 GENERIC: 0.0: enabled 1
1782 12:17:52.405823 USB3 port 0: enabled 1
1783 12:17:52.405906 USB3 port 1: enabled 1
1784 12:17:52.406020 USB3 port 2: enabled 0
1785 12:17:52.406137 USB3 port 3: enabled 0
1786 12:17:52.406221 USB2 port 0: enabled 0
1787 12:17:52.406319 USB2 port 1: enabled 1
1788 12:17:52.406405 USB2 port 2: enabled 1
1789 12:17:52.406490 USB2 port 3: enabled 0
1790 12:17:52.406575 USB2 port 4: enabled 1
1791 12:17:52.406672 USB2 port 5: enabled 0
1792 12:17:52.406809 USB2 port 6: enabled 0
1793 12:17:52.406910 USB2 port 7: enabled 0
1794 12:17:52.407036 USB2 port 8: enabled 0
1795 12:17:52.407120 USB2 port 9: enabled 0
1796 12:17:52.407218 USB3 port 0: enabled 0
1797 12:17:52.407303 USB3 port 1: enabled 1
1798 12:17:52.407389 USB3 port 2: enabled 0
1799 12:17:52.407474 USB3 port 3: enabled 0
1800 12:17:52.407558 GENERIC: 0.0: enabled 1
1801 12:17:52.407643 GENERIC: 1.0: enabled 1
1802 12:17:52.407729 APIC: 01: enabled 1
1803 12:17:52.407814 APIC: 05: enabled 1
1804 12:17:52.407898 APIC: 07: enabled 1
1805 12:17:52.408016 APIC: 02: enabled 1
1806 12:17:52.408132 APIC: 04: enabled 1
1807 12:17:52.408232 APIC: 06: enabled 1
1808 12:17:52.408318 APIC: 03: enabled 1
1809 12:17:52.408432 PCI: 01:00.0: enabled 1
1810 12:17:52.408517 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1811 12:17:52.408618 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1812 12:17:52.408705 ELOG: NV offset 0xf30000 size 0x1000
1813 12:17:52.408792 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1814 12:17:52.408918 ELOG: Event(17) added with size 13 at 2023-06-14 12:17:37 UTC
1815 12:17:52.409032 ELOG: Event(92) added with size 9 at 2023-06-14 12:17:37 UTC
1816 12:17:52.409137 ELOG: Event(93) added with size 9 at 2023-06-14 12:17:37 UTC
1817 12:17:52.409263 ELOG: Event(9E) added with size 10 at 2023-06-14 12:17:37 UTC
1818 12:17:52.409348 ELOG: Event(9F) added with size 14 at 2023-06-14 12:17:37 UTC
1819 12:17:52.409484 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1820 12:17:52.410285 ELOG: Event(A1) added with size 10 at 2023-06-14 12:17:37 UTC
1821 12:17:52.417196 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1822 12:17:52.423776 ELOG: Event(A0) added with size 9 at 2023-06-14 12:17:37 UTC
1823 12:17:52.427030 elog_add_boot_reason: Logged dev mode boot
1824 12:17:52.433700 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1825 12:17:52.433809 Finalize devices...
1826 12:17:52.436967 Devices finalized
1827 12:17:52.443616 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1828 12:17:52.446900 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1829 12:17:52.453602 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1830 12:17:52.456729 ME: HFSTS1 : 0x80030055
1831 12:17:52.463540 ME: HFSTS2 : 0x30280116
1832 12:17:52.466868 ME: HFSTS3 : 0x00000050
1833 12:17:52.470067 ME: HFSTS4 : 0x00004000
1834 12:17:52.476707 ME: HFSTS5 : 0x00000000
1835 12:17:52.479820 ME: HFSTS6 : 0x40400006
1836 12:17:52.483051 ME: Manufacturing Mode : YES
1837 12:17:52.486963 ME: SPI Protection Mode Enabled : NO
1838 12:17:52.490101 ME: FW Partition Table : OK
1839 12:17:52.496528 ME: Bringup Loader Failure : NO
1840 12:17:52.499792 ME: Firmware Init Complete : NO
1841 12:17:52.503044 ME: Boot Options Present : NO
1842 12:17:52.723677 ME: Update In Progress : NO
1843 12:17:52.724088 ME: D0i3 Support : YES
1844 12:17:52.724175 ME: Low Power State Enabled : NO
1845 12:17:52.724242 ME: CPU Replaced : YES
1846 12:17:52.724304 ME: CPU Replacement Valid : YES
1847 12:17:52.724365 ME: Current Working State : 5
1848 12:17:52.724425 ME: Current Operation State : 1
1849 12:17:52.724484 ME: Current Operation Mode : 3
1850 12:17:52.724541 ME: Error Code : 0
1851 12:17:52.724598 ME: Enhanced Debug Mode : NO
1852 12:17:52.724669 ME: CPU Debug Disabled : YES
1853 12:17:52.724725 ME: TXT Support : NO
1854 12:17:52.724797 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1855 12:17:52.724880 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1856 12:17:52.724937 CBFS: 'fallback/slic' not found.
1857 12:17:52.725017 ACPI: Writing ACPI tables at 76b01000.
1858 12:17:52.725086 ACPI: * FACS
1859 12:17:52.725141 ACPI: * DSDT
1860 12:17:52.725196 Ramoops buffer: 0x100000@0x76a00000.
1861 12:17:52.725251 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1862 12:17:52.725306 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1863 12:17:52.725361 Google Chrome EC: version:
1864 12:17:52.725416 ro: voema_v2.0.10114-a447f03e46
1865 12:17:52.725470 rw: voema_v2.0.10132-7b2059e3bc
1866 12:17:52.725525 running image: 2
1867 12:17:52.725579 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1868 12:17:52.725634 ACPI: * FADT
1869 12:17:52.725689 SCI is IRQ9
1870 12:17:52.725743 ACPI: added table 1/32, length now 40
1871 12:17:52.725798 ACPI: * SSDT
1872 12:17:52.725853 Found 1 CPU(s) with 8 core(s) each.
1873 12:17:52.725907 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1874 12:17:52.725962 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1875 12:17:52.726017 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1876 12:17:52.726071 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1877 12:17:52.726126 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1878 12:17:52.726181 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1879 12:17:52.726235 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1880 12:17:52.726289 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1881 12:17:52.726344 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1882 12:17:52.726428 \_SB.PCI0.RP09: Added StorageD3Enable property
1883 12:17:52.726482 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1884 12:17:52.726538 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1885 12:17:52.726607 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1886 12:17:52.726678 PS2K: Passing 80 keymaps to kernel
1887 12:17:52.726748 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1888 12:17:52.726804 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1889 12:17:52.726861 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1890 12:17:52.726916 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1891 12:17:52.726972 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1892 12:17:52.727054 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1893 12:17:52.732760 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1894 12:17:52.739350 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1895 12:17:52.742663 ACPI: added table 2/32, length now 44
1896 12:17:52.742799 ACPI: * MCFG
1897 12:17:52.745965 ACPI: added table 3/32, length now 48
1898 12:17:52.749150 ACPI: * TPM2
1899 12:17:52.752499 TPM2 log created at 0x769f0000
1900 12:17:52.755886 ACPI: added table 4/32, length now 52
1901 12:17:52.759034 ACPI: * MADT
1902 12:17:52.759145 SCI is IRQ9
1903 12:17:52.762446 ACPI: added table 5/32, length now 56
1904 12:17:52.765728 current = 76b09850
1905 12:17:52.765830 ACPI: * DMAR
1906 12:17:52.769095 ACPI: added table 6/32, length now 60
1907 12:17:52.775762 ACPI: added table 7/32, length now 64
1908 12:17:52.775871 ACPI: * HPET
1909 12:17:52.778992 ACPI: added table 8/32, length now 68
1910 12:17:52.782217 ACPI: done.
1911 12:17:52.782339 ACPI tables: 35216 bytes.
1912 12:17:52.785662 smbios_write_tables: 769ef000
1913 12:17:52.788954 EC returned error result code 3
1914 12:17:52.791742 Couldn't obtain OEM name from CBI
1915 12:17:52.795619 Create SMBIOS type 16
1916 12:17:52.798997 Create SMBIOS type 17
1917 12:17:52.802248 GENERIC: 0.0 (WIFI Device)
1918 12:17:52.805433 SMBIOS tables: 1734 bytes.
1919 12:17:52.809135 Writing table forward entry at 0x00000500
1920 12:17:52.992125 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1921 12:17:52.992708 Writing coreboot table at 0x76b25000
1922 12:17:52.992871 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1923 12:17:52.992989 1. 0000000000001000-000000000009ffff: RAM
1924 12:17:52.993090 2. 00000000000a0000-00000000000fffff: RESERVED
1925 12:17:52.993195 3. 0000000000100000-00000000769eefff: RAM
1926 12:17:52.993292 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1927 12:17:52.993372 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1928 12:17:52.993434 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1929 12:17:52.993516 7. 0000000077000000-000000007fbfffff: RESERVED
1930 12:17:52.993618 8. 00000000c0000000-00000000cfffffff: RESERVED
1931 12:17:52.993731 9. 00000000f8000000-00000000f9ffffff: RESERVED
1932 12:17:52.993822 10. 00000000fb000000-00000000fb000fff: RESERVED
1933 12:17:52.993931 11. 00000000fe000000-00000000fe00ffff: RESERVED
1934 12:17:52.994022 12. 00000000fed80000-00000000fed87fff: RESERVED
1935 12:17:52.994134 13. 00000000fed90000-00000000fed92fff: RESERVED
1936 12:17:52.994232 14. 00000000feda0000-00000000feda1fff: RESERVED
1937 12:17:52.994314 15. 00000000fedc0000-00000000feddffff: RESERVED
1938 12:17:52.994424 16. 0000000100000000-00000004803fffff: RAM
1939 12:17:52.994528 Passing 4 GPIOs to payload:
1940 12:17:52.994637 NAME | PORT | POLARITY | VALUE
1941 12:17:52.994740 lid | undefined | high | high
1942 12:17:52.994848 power | undefined | high | low
1943 12:17:52.994951 oprom | undefined | high | low
1944 12:17:52.995060 EC in RW | 0x000000e5 | high | high
1945 12:17:52.995180 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 7e26
1946 12:17:52.995300 coreboot table: 1576 bytes.
1947 12:17:52.995414 IMD ROOT 0. 0x76fff000 0x00001000
1948 12:17:52.995512 IMD SMALL 1. 0x76ffe000 0x00001000
1949 12:17:52.995601 FSP MEMORY 2. 0x76c4e000 0x003b0000
1950 12:17:52.995690 VPD 3. 0x76c4d000 0x00000367
1951 12:17:52.995776 RO MCACHE 4. 0x76c4c000 0x00000fdc
1952 12:17:52.995861 CONSOLE 5. 0x76c2c000 0x00020000
1953 12:17:52.995947 FMAP 6. 0x76c2b000 0x00000578
1954 12:17:52.996033 TIME STAMP 7. 0x76c2a000 0x00000910
1955 12:17:52.996117 VBOOT WORK 8. 0x76c16000 0x00014000
1956 12:17:52.996175 ROMSTG STCK 9. 0x76c15000 0x00001000
1957 12:17:52.996232 AFTER CAR 10. 0x76c0a000 0x0000b000
1958 12:17:52.996288 RAMSTAGE 11. 0x76b97000 0x00073000
1959 12:17:52.996343 REFCODE 12. 0x76b42000 0x00055000
1960 12:17:52.996399 SMM BACKUP 13. 0x76b32000 0x00010000
1961 12:17:52.996477 4f444749 14. 0x76b30000 0x00002000
1962 12:17:52.997813 EXT VBT15. 0x76b2d000 0x0000219f
1963 12:17:53.004448 COREBOOT 16. 0x76b25000 0x00008000
1964 12:17:53.007737 ACPI 17. 0x76b01000 0x00024000
1965 12:17:53.011067 ACPI GNVS 18. 0x76b00000 0x00001000
1966 12:17:53.014262 RAMOOPS 19. 0x76a00000 0x00100000
1967 12:17:53.017034 TPM2 TCGLOG20. 0x769f0000 0x00010000
1968 12:17:53.020925 SMBIOS 21. 0x769ef000 0x00000800
1969 12:17:53.024020 IMD small region:
1970 12:17:53.027251 IMD ROOT 0. 0x76ffec00 0x00000400
1971 12:17:53.030533 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1972 12:17:53.034167 POWER STATE 2. 0x76ffeb80 0x00000044
1973 12:17:53.040450 ROMSTAGE 3. 0x76ffeb60 0x00000004
1974 12:17:53.043535 MEM INFO 4. 0x76ffe980 0x000001e0
1975 12:17:53.050183 BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms
1976 12:17:53.050318 MTRR: Physical address space:
1977 12:17:53.056885 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1978 12:17:53.063407 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1979 12:17:53.069886 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1980 12:17:53.076404 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1981 12:17:53.082991 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1982 12:17:53.090073 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1983 12:17:53.096160 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1984 12:17:53.099456 MTRR: Fixed MSR 0x250 0x0606060606060606
1985 12:17:53.102835 MTRR: Fixed MSR 0x258 0x0606060606060606
1986 12:17:53.106095 MTRR: Fixed MSR 0x259 0x0000000000000000
1987 12:17:53.112764 MTRR: Fixed MSR 0x268 0x0606060606060606
1988 12:17:53.116118 MTRR: Fixed MSR 0x269 0x0606060606060606
1989 12:17:53.119365 MTRR: Fixed MSR 0x26a 0x0606060606060606
1990 12:17:53.122633 MTRR: Fixed MSR 0x26b 0x0606060606060606
1991 12:17:53.129374 MTRR: Fixed MSR 0x26c 0x0606060606060606
1992 12:17:53.132954 MTRR: Fixed MSR 0x26d 0x0606060606060606
1993 12:17:53.136703 MTRR: Fixed MSR 0x26e 0x0606060606060606
1994 12:17:53.139970 MTRR: Fixed MSR 0x26f 0x0606060606060606
1995 12:17:53.144340 call enable_fixed_mtrr()
1996 12:17:53.147529 CPU physical address size: 39 bits
1997 12:17:53.154712 MTRR: default type WB/UC MTRR counts: 6/7.
1998 12:17:53.157476 MTRR: WB selected as default type.
1999 12:17:53.164208 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2000 12:17:53.167527 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2001 12:17:53.174819 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2002 12:17:53.180737 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
2003 12:17:53.187918 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
2004 12:17:53.194125 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
2005 12:17:53.197806
2006 12:17:53.197887 MTRR check
2007 12:17:53.201033 Fixed MTRRs : Enabled
2008 12:17:53.201133 Variable MTRRs: Enabled
2009 12:17:53.201228
2010 12:17:53.207767 MTRR: Fixed MSR 0x250 0x0606060606060606
2011 12:17:53.211053 MTRR: Fixed MSR 0x258 0x0606060606060606
2012 12:17:53.213916 MTRR: Fixed MSR 0x259 0x0000000000000000
2013 12:17:53.217819 MTRR: Fixed MSR 0x268 0x0606060606060606
2014 12:17:53.224390 MTRR: Fixed MSR 0x269 0x0606060606060606
2015 12:17:53.227615 MTRR: Fixed MSR 0x26a 0x0606060606060606
2016 12:17:53.230961 MTRR: Fixed MSR 0x26b 0x0606060606060606
2017 12:17:53.234212 MTRR: Fixed MSR 0x26c 0x0606060606060606
2018 12:17:53.240680 MTRR: Fixed MSR 0x26d 0x0606060606060606
2019 12:17:53.243913 MTRR: Fixed MSR 0x26e 0x0606060606060606
2020 12:17:53.247078 MTRR: Fixed MSR 0x26f 0x0606060606060606
2021 12:17:53.254247 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
2022 12:17:53.257879 call enable_fixed_mtrr()
2023 12:17:53.261354 Checking cr50 for pending updates
2024 12:17:53.264758 CPU physical address size: 39 bits
2025 12:17:53.268694 MTRR: Fixed MSR 0x250 0x0606060606060606
2026 12:17:53.272122 MTRR: Fixed MSR 0x250 0x0606060606060606
2027 12:17:53.278704 MTRR: Fixed MSR 0x258 0x0606060606060606
2028 12:17:53.282004 MTRR: Fixed MSR 0x259 0x0000000000000000
2029 12:17:53.285268 MTRR: Fixed MSR 0x268 0x0606060606060606
2030 12:17:53.288687 MTRR: Fixed MSR 0x269 0x0606060606060606
2031 12:17:53.292215 MTRR: Fixed MSR 0x26a 0x0606060606060606
2032 12:17:53.298700 MTRR: Fixed MSR 0x26b 0x0606060606060606
2033 12:17:53.301789 MTRR: Fixed MSR 0x26c 0x0606060606060606
2034 12:17:53.305494 MTRR: Fixed MSR 0x26d 0x0606060606060606
2035 12:17:53.308680 MTRR: Fixed MSR 0x26e 0x0606060606060606
2036 12:17:53.315246 MTRR: Fixed MSR 0x26f 0x0606060606060606
2037 12:17:53.318737 MTRR: Fixed MSR 0x258 0x0606060606060606
2038 12:17:53.324868 MTRR: Fixed MSR 0x259 0x0000000000000000
2039 12:17:53.328150 MTRR: Fixed MSR 0x268 0x0606060606060606
2040 12:17:53.331477 MTRR: Fixed MSR 0x269 0x0606060606060606
2041 12:17:53.335294 MTRR: Fixed MSR 0x26a 0x0606060606060606
2042 12:17:53.341727 MTRR: Fixed MSR 0x26b 0x0606060606060606
2043 12:17:53.344994 MTRR: Fixed MSR 0x26c 0x0606060606060606
2044 12:17:53.348103 MTRR: Fixed MSR 0x26d 0x0606060606060606
2045 12:17:53.351347 MTRR: Fixed MSR 0x26e 0x0606060606060606
2046 12:17:53.358474 MTRR: Fixed MSR 0x26f 0x0606060606060606
2047 12:17:53.361564 call enable_fixed_mtrr()
2048 12:17:53.364786 call enable_fixed_mtrr()
2049 12:17:53.368163 MTRR: Fixed MSR 0x250 0x0606060606060606
2050 12:17:53.371640 MTRR: Fixed MSR 0x250 0x0606060606060606
2051 12:17:53.374854 MTRR: Fixed MSR 0x258 0x0606060606060606
2052 12:17:53.381307 MTRR: Fixed MSR 0x259 0x0000000000000000
2053 12:17:53.384677 MTRR: Fixed MSR 0x268 0x0606060606060606
2054 12:17:53.387884 MTRR: Fixed MSR 0x269 0x0606060606060606
2055 12:17:53.391316 MTRR: Fixed MSR 0x26a 0x0606060606060606
2056 12:17:53.394733 MTRR: Fixed MSR 0x26b 0x0606060606060606
2057 12:17:53.401370 MTRR: Fixed MSR 0x26c 0x0606060606060606
2058 12:17:53.404451 MTRR: Fixed MSR 0x26d 0x0606060606060606
2059 12:17:53.408090 MTRR: Fixed MSR 0x26e 0x0606060606060606
2060 12:17:53.410930 MTRR: Fixed MSR 0x26f 0x0606060606060606
2061 12:17:53.419672 MTRR: Fixed MSR 0x258 0x0606060606060606
2062 12:17:53.423168 MTRR: Fixed MSR 0x259 0x0000000000000000
2063 12:17:53.426560 MTRR: Fixed MSR 0x268 0x0606060606060606
2064 12:17:53.429852 MTRR: Fixed MSR 0x269 0x0606060606060606
2065 12:17:53.436601 MTRR: Fixed MSR 0x26a 0x0606060606060606
2066 12:17:53.439844 MTRR: Fixed MSR 0x26b 0x0606060606060606
2067 12:17:53.443036 MTRR: Fixed MSR 0x26c 0x0606060606060606
2068 12:17:53.446096 MTRR: Fixed MSR 0x26d 0x0606060606060606
2069 12:17:53.452703 MTRR: Fixed MSR 0x26e 0x0606060606060606
2070 12:17:53.455822 MTRR: Fixed MSR 0x26f 0x0606060606060606
2071 12:17:53.459234 call enable_fixed_mtrr()
2072 12:17:53.462912 call enable_fixed_mtrr()
2073 12:17:53.466061 MTRR: Fixed MSR 0x250 0x0606060606060606
2074 12:17:53.469448 MTRR: Fixed MSR 0x250 0x0606060606060606
2075 12:17:53.472612 CPU physical address size: 39 bits
2076 12:17:53.479172 CPU physical address size: 39 bits
2077 12:17:53.482538 Reading cr50 TPM mode
2078 12:17:53.486236 MTRR: Fixed MSR 0x258 0x0606060606060606
2079 12:17:53.489485 MTRR: Fixed MSR 0x258 0x0606060606060606
2080 12:17:53.492794 MTRR: Fixed MSR 0x259 0x0000000000000000
2081 12:17:53.499430 MTRR: Fixed MSR 0x268 0x0606060606060606
2082 12:17:53.502831 MTRR: Fixed MSR 0x269 0x0606060606060606
2083 12:17:53.505982 MTRR: Fixed MSR 0x26a 0x0606060606060606
2084 12:17:53.509442 MTRR: Fixed MSR 0x26b 0x0606060606060606
2085 12:17:53.516027 MTRR: Fixed MSR 0x26c 0x0606060606060606
2086 12:17:53.518924 MTRR: Fixed MSR 0x26d 0x0606060606060606
2087 12:17:53.522718 MTRR: Fixed MSR 0x26e 0x0606060606060606
2088 12:17:53.525920 MTRR: Fixed MSR 0x26f 0x0606060606060606
2089 12:17:53.534046 MTRR: Fixed MSR 0x259 0x0000000000000000
2090 12:17:53.534166 call enable_fixed_mtrr()
2091 12:17:53.540189 MTRR: Fixed MSR 0x268 0x0606060606060606
2092 12:17:53.543435 MTRR: Fixed MSR 0x269 0x0606060606060606
2093 12:17:53.547286 MTRR: Fixed MSR 0x26a 0x0606060606060606
2094 12:17:53.550404 MTRR: Fixed MSR 0x26b 0x0606060606060606
2095 12:17:53.556908 MTRR: Fixed MSR 0x26c 0x0606060606060606
2096 12:17:53.560343 MTRR: Fixed MSR 0x26d 0x0606060606060606
2097 12:17:53.563609 MTRR: Fixed MSR 0x26e 0x0606060606060606
2098 12:17:53.566953 MTRR: Fixed MSR 0x26f 0x0606060606060606
2099 12:17:53.571735 CPU physical address size: 39 bits
2100 12:17:53.578222 call enable_fixed_mtrr()
2101 12:17:53.584986 BS: BS_PAYLOAD_LOAD entry times (exec / console): 225 / 6 ms
2102 12:17:53.588222 CPU physical address size: 39 bits
2103 12:17:53.594844 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2104 12:17:53.598469 CPU physical address size: 39 bits
2105 12:17:53.601920 CPU physical address size: 39 bits
2106 12:17:53.608516 Checking segment from ROM address 0xffc02b38
2107 12:17:53.611954 Checking segment from ROM address 0xffc02b54
2108 12:17:53.618511 Loading segment from ROM address 0xffc02b38
2109 12:17:53.618620 code (compression=0)
2110 12:17:53.628834 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2111 12:17:53.634941 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2112 12:17:53.638491 it's not compressed!
2113 12:17:53.778802 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2114 12:17:53.785476 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2115 12:17:53.792569 Loading segment from ROM address 0xffc02b54
2116 12:17:53.795451 Entry Point 0x30000000
2117 12:17:53.795566 Loaded segments
2118 12:17:53.802148 BS: BS_PAYLOAD_LOAD run times (exec / console): 149 / 63 ms
2119 12:17:53.847169 Finalizing chipset.
2120 12:17:53.850400 Finalizing SMM.
2121 12:17:53.850535 APMC done.
2122 12:17:53.856896 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2123 12:17:53.860113 mp_park_aps done after 0 msecs.
2124 12:17:53.863612 Jumping to boot code at 0x30000000(0x76b25000)
2125 12:17:53.873592 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2126 12:17:53.873715
2127 12:17:53.873830
2128 12:17:53.876788
2129 12:17:53.876905 Starting depthcharge on Voema...
2130 12:17:53.877287 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2131 12:17:53.877392 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2132 12:17:53.877510 Setting prompt string to ['volteer:']
2133 12:17:53.877626 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2134 12:17:53.880028
2135 12:17:53.887028 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2136 12:17:53.887151
2137 12:17:53.893429 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2138 12:17:53.893546
2139 12:17:53.899781 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2140 12:17:53.899895
2141 12:17:53.902980 Failed to find eMMC card reader
2142 12:17:53.903087
2143 12:17:53.903194 Wipe memory regions:
2144 12:17:53.906268
2145 12:17:53.909802 [0x00000000001000, 0x000000000a0000)
2146 12:17:53.909894
2147 12:17:53.913098 [0x00000000100000, 0x00000030000000)
2148 12:17:53.947025
2149 12:17:53.950314 [0x00000032662db0, 0x000000769ef000)
2150 12:17:53.998297
2151 12:17:54.001431 [0x00000100000000, 0x00000480400000)
2152 12:17:54.611869
2153 12:17:54.615124 ec_init: CrosEC protocol v3 supported (256, 256)
2154 12:17:55.046286
2155 12:17:55.046463 R8152: Initializing
2156 12:17:55.046575
2157 12:17:55.049600 Version 6 (ocp_data = 5c30)
2158 12:17:55.049711
2159 12:17:55.052906 R8152: Done initializing
2160 12:17:55.052992
2161 12:17:55.055737 Adding net device
2162 12:17:55.357492
2163 12:17:55.360655 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2164 12:17:55.360751
2165 12:17:55.360882
2166 12:17:55.360965
2167 12:17:55.364171 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2169 12:17:55.464589 volteer: tftpboot 192.168.201.1 10724470/tftp-deploy-0_18fyus/kernel/bzImage 10724470/tftp-deploy-0_18fyus/kernel/cmdline 10724470/tftp-deploy-0_18fyus/ramdisk/ramdisk.cpio.gz
2170 12:17:55.464782 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2171 12:17:55.464914 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2172 12:17:55.469054 tftpboot 192.168.201.1 10724470/tftp-deploy-0_18fyus/kernel/bzIploy-0_18fyus/kernel/cmdline 10724470/tftp-deploy-0_18fyus/ramdisk/ramdisk.cpio.gz
2173 12:17:55.469185
2174 12:17:55.469299 Waiting for link
2175 12:17:55.672110
2176 12:17:55.672278 done.
2177 12:17:55.672382
2178 12:17:55.672484 MAC: 00:24:32:30:7e:22
2179 12:17:55.672585
2180 12:17:55.675469 Sending DHCP discover... done.
2181 12:17:55.675571
2182 12:17:55.678718 Waiting for reply... done.
2183 12:17:55.678807
2184 12:17:55.682456 Sending DHCP request... done.
2185 12:17:55.682550
2186 12:17:55.689094 Waiting for reply... done.
2187 12:17:55.689196
2188 12:17:55.689285 My ip is 192.168.201.21
2189 12:17:55.689368
2190 12:17:55.692907 The DHCP server ip is 192.168.201.1
2191 12:17:55.692997
2192 12:17:55.698905 TFTP server IP predefined by user: 192.168.201.1
2193 12:17:55.699005
2194 12:17:55.705464 Bootfile predefined by user: 10724470/tftp-deploy-0_18fyus/kernel/bzImage
2195 12:17:55.705559
2196 12:17:55.708475 Sending tftp read request... done.
2197 12:17:55.708568
2198 12:17:55.712287 Waiting for the transfer...
2199 12:17:55.712430
2200 12:17:56.256479 00000000 ################################################################
2201 12:17:56.256619
2202 12:17:56.806286 00080000 ################################################################
2203 12:17:56.806471
2204 12:17:57.347400 00100000 ################################################################
2205 12:17:57.347567
2206 12:17:57.885845 00180000 ################################################################
2207 12:17:57.885989
2208 12:17:58.417411 00200000 ################################################################
2209 12:17:58.417584
2210 12:17:58.946433 00280000 ################################################################
2211 12:17:58.946602
2212 12:17:59.473048 00300000 ################################################################
2213 12:17:59.473195
2214 12:18:00.005852 00380000 ################################################################
2215 12:18:00.005987
2216 12:18:00.526345 00400000 ################################################################
2217 12:18:00.526520
2218 12:18:01.042698 00480000 ################################################################
2219 12:18:01.042867
2220 12:18:01.562417 00500000 ################################################################
2221 12:18:01.562593
2222 12:18:02.079702 00580000 ################################################################
2223 12:18:02.079845
2224 12:18:02.596744 00600000 ################################################################
2225 12:18:02.596901
2226 12:18:03.114431 00680000 ################################################################
2227 12:18:03.114566
2228 12:18:03.634945 00700000 ################################################################
2229 12:18:03.635141
2230 12:18:04.163329 00780000 ################################################################
2231 12:18:04.163469
2232 12:18:04.690386 00800000 ################################################################
2233 12:18:04.690527
2234 12:18:05.215171 00880000 ################################################################
2235 12:18:05.215315
2236 12:18:05.745412 00900000 ################################################################
2237 12:18:05.745567
2238 12:18:06.276671 00980000 ################################################################
2239 12:18:06.276816
2240 12:18:06.667330 00a00000 ############################################### done.
2241 12:18:06.667467
2242 12:18:06.670488 The bootfile was 10863104 bytes long.
2243 12:18:06.670596
2244 12:18:06.674352 Sending tftp read request... done.
2245 12:18:06.674445
2246 12:18:06.677616 Waiting for the transfer...
2247 12:18:06.677706
2248 12:18:07.209578 00000000 ################################################################
2249 12:18:07.209728
2250 12:18:07.744774 00080000 ################################################################
2251 12:18:07.744942
2252 12:18:08.280141 00100000 ################################################################
2253 12:18:08.280310
2254 12:18:08.821131 00180000 ################################################################
2255 12:18:08.821310
2256 12:18:09.383264 00200000 ################################################################
2257 12:18:09.383438
2258 12:18:09.930948 00280000 ################################################################
2259 12:18:09.931089
2260 12:18:10.459046 00300000 ################################################################
2261 12:18:10.459194
2262 12:18:10.988635 00380000 ################################################################
2263 12:18:10.988814
2264 12:18:11.516450 00400000 ################################################################
2265 12:18:11.516631
2266 12:18:12.034806 00480000 ################################################################
2267 12:18:12.034961
2268 12:18:12.556825 00500000 ################################################################
2269 12:18:12.557008
2270 12:18:12.940619 00580000 ################################################ done.
2271 12:18:12.940851
2272 12:18:12.943683 Sending tftp read request... done.
2273 12:18:12.943801
2274 12:18:12.947305 Waiting for the transfer...
2275 12:18:12.947418
2276 12:18:12.947490 00000000 # done.
2277 12:18:12.947573
2278 12:18:12.956790 Command line loaded dynamically from TFTP file: 10724470/tftp-deploy-0_18fyus/kernel/cmdline
2279 12:18:12.956904
2280 12:18:12.980233 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10724470/extract-nfsrootfs-2q38yrh2,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2281 12:18:12.984650
2282 12:18:12.988047 Shutting down all USB controllers.
2283 12:18:12.988165
2284 12:18:12.988273 Removing current net device
2285 12:18:12.988375
2286 12:18:12.991329 Finalizing coreboot
2287 12:18:12.991444
2288 12:18:12.997887 Exiting depthcharge with code 4 at timestamp: 27691332
2289 12:18:12.998004
2290 12:18:12.998113
2291 12:18:12.998220 Starting kernel ...
2292 12:18:12.998323
2293 12:18:12.998423
2294 12:18:12.999054 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
2295 12:18:12.999192 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2296 12:18:12.999325 Setting prompt string to ['Linux version [0-9]']
2297 12:18:12.999435 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2298 12:18:12.999546 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2300 12:22:37.999985 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2302 12:22:38.001685 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2304 12:22:38.003054 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2307 12:22:38.005116 end: 2 depthcharge-action (duration 00:05:00) [common]
2309 12:22:38.006250 Cleaning after the job
2310 12:22:38.006676 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10724470/tftp-deploy-0_18fyus/ramdisk
2311 12:22:38.010564 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10724470/tftp-deploy-0_18fyus/kernel
2312 12:22:38.016389 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10724470/tftp-deploy-0_18fyus/nfsrootfs
2313 12:22:38.099000 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10724470/tftp-deploy-0_18fyus/modules
2314 12:22:38.099680 start: 5.1 power-off (timeout 00:00:30) [common]
2315 12:22:38.099865 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-14' '--port=1' '--command=off'
2316 12:22:38.169836 >> Command sent successfully.
2317 12:22:38.173996 Returned 0 in 0 seconds
2318 12:22:38.274859 end: 5.1 power-off (duration 00:00:00) [common]
2320 12:22:38.276432 start: 5.2 read-feedback (timeout 00:10:00) [common]
2321 12:22:38.277737 Listened to connection for namespace 'common' for up to 1s
2322 12:22:39.278231 Finalising connection for namespace 'common'
2323 12:22:39.278398 Disconnecting from shell: Finalise
2324 12:22:39.278484
2325 12:22:39.378832 end: 5.2 read-feedback (duration 00:00:01) [common]
2326 12:22:39.378999 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10724470
2327 12:22:39.655660 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10724470
2328 12:22:39.655858 JobError: Your job cannot terminate cleanly.