Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
1 12:19:24.467924 lava-dispatcher, installed at version: 2023.05.1
2 12:19:24.468165 start: 0 validate
3 12:19:24.468303 Start time: 2023-06-14 12:19:24.468295+00:00 (UTC)
4 12:19:24.468439 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:19:24.468570 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230609.0%2Famd64%2Frootfs.cpio.gz exists
6 12:19:24.731269 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:19:24.732076 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.284-cip99-114-g02e97826987bf%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:19:24.986478 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:19:24.987250 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.284-cip99-114-g02e97826987bf%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:19:28.085793 validate duration: 3.62
12 12:19:28.087214 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:19:28.087875 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:19:28.088369 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:19:28.088975 Not decompressing ramdisk as can be used compressed.
16 12:19:28.089403 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230609.0/amd64/rootfs.cpio.gz
17 12:19:28.089727 saving as /var/lib/lava/dispatcher/tmp/10724541/tftp-deploy-uvh5z7d9/ramdisk/rootfs.cpio.gz
18 12:19:28.090035 total size: 35737061 (34MB)
19 12:19:28.824652 progress 0% (0MB)
20 12:19:28.842929 progress 5% (1MB)
21 12:19:28.852018 progress 10% (3MB)
22 12:19:28.860948 progress 15% (5MB)
23 12:19:28.869953 progress 20% (6MB)
24 12:19:28.878874 progress 25% (8MB)
25 12:19:28.888032 progress 30% (10MB)
26 12:19:28.897027 progress 35% (11MB)
27 12:19:28.906015 progress 40% (13MB)
28 12:19:28.914933 progress 45% (15MB)
29 12:19:28.924012 progress 50% (17MB)
30 12:19:28.932891 progress 55% (18MB)
31 12:19:28.941936 progress 60% (20MB)
32 12:19:28.950788 progress 65% (22MB)
33 12:19:28.959849 progress 70% (23MB)
34 12:19:28.968703 progress 75% (25MB)
35 12:19:28.977709 progress 80% (27MB)
36 12:19:28.986794 progress 85% (29MB)
37 12:19:28.995584 progress 90% (30MB)
38 12:19:29.004579 progress 95% (32MB)
39 12:19:29.013338 progress 100% (34MB)
40 12:19:29.013535 34MB downloaded in 0.92s (36.90MB/s)
41 12:19:29.013697 end: 1.1.1 http-download (duration 00:00:01) [common]
43 12:19:29.013934 end: 1.1 download-retry (duration 00:00:01) [common]
44 12:19:29.014022 start: 1.2 download-retry (timeout 00:09:59) [common]
45 12:19:29.014105 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 12:19:29.014231 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.284-cip99-114-g02e97826987bf/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:19:29.014299 saving as /var/lib/lava/dispatcher/tmp/10724541/tftp-deploy-uvh5z7d9/kernel/bzImage
48 12:19:29.014359 total size: 10863104 (10MB)
49 12:19:29.014419 No compression specified
50 12:19:29.015513 progress 0% (0MB)
51 12:19:29.018228 progress 5% (0MB)
52 12:19:29.021088 progress 10% (1MB)
53 12:19:29.023782 progress 15% (1MB)
54 12:19:29.026598 progress 20% (2MB)
55 12:19:29.029292 progress 25% (2MB)
56 12:19:29.032146 progress 30% (3MB)
57 12:19:29.034951 progress 35% (3MB)
58 12:19:29.037603 progress 40% (4MB)
59 12:19:29.040426 progress 45% (4MB)
60 12:19:29.043024 progress 50% (5MB)
61 12:19:29.045830 progress 55% (5MB)
62 12:19:29.048477 progress 60% (6MB)
63 12:19:29.051199 progress 65% (6MB)
64 12:19:29.053954 progress 70% (7MB)
65 12:19:29.056573 progress 75% (7MB)
66 12:19:29.059363 progress 80% (8MB)
67 12:19:29.061999 progress 85% (8MB)
68 12:19:29.064763 progress 90% (9MB)
69 12:19:29.067461 progress 95% (9MB)
70 12:19:29.070198 progress 100% (10MB)
71 12:19:29.070364 10MB downloaded in 0.06s (184.99MB/s)
72 12:19:29.070504 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:19:29.070722 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:19:29.070808 start: 1.3 download-retry (timeout 00:09:59) [common]
76 12:19:29.070895 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 12:19:29.071023 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.284-cip99-114-g02e97826987bf/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:19:29.071090 saving as /var/lib/lava/dispatcher/tmp/10724541/tftp-deploy-uvh5z7d9/modules/modules.tar
79 12:19:29.071150 total size: 483752 (0MB)
80 12:19:29.071207 Using unxz to decompress xz
81 12:19:29.074861 progress 6% (0MB)
82 12:19:29.075281 progress 13% (0MB)
83 12:19:29.075566 progress 20% (0MB)
84 12:19:29.076861 progress 27% (0MB)
85 12:19:29.078778 progress 33% (0MB)
86 12:19:29.080765 progress 40% (0MB)
87 12:19:29.082642 progress 47% (0MB)
88 12:19:29.085032 progress 54% (0MB)
89 12:19:29.087229 progress 60% (0MB)
90 12:19:29.089331 progress 67% (0MB)
91 12:19:29.091675 progress 74% (0MB)
92 12:19:29.093790 progress 81% (0MB)
93 12:19:29.095660 progress 88% (0MB)
94 12:19:29.097617 progress 94% (0MB)
95 12:19:29.099552 progress 100% (0MB)
96 12:19:29.105503 0MB downloaded in 0.03s (13.43MB/s)
97 12:19:29.105774 end: 1.3.1 http-download (duration 00:00:00) [common]
99 12:19:29.106034 end: 1.3 download-retry (duration 00:00:00) [common]
100 12:19:29.106124 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
101 12:19:29.106216 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
102 12:19:29.106298 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 12:19:29.106383 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
104 12:19:29.106586 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10724541/lava-overlay-kdbsmeq_
105 12:19:29.106711 makedir: /var/lib/lava/dispatcher/tmp/10724541/lava-overlay-kdbsmeq_/lava-10724541/bin
106 12:19:29.106810 makedir: /var/lib/lava/dispatcher/tmp/10724541/lava-overlay-kdbsmeq_/lava-10724541/tests
107 12:19:29.106904 makedir: /var/lib/lava/dispatcher/tmp/10724541/lava-overlay-kdbsmeq_/lava-10724541/results
108 12:19:29.107012 Creating /var/lib/lava/dispatcher/tmp/10724541/lava-overlay-kdbsmeq_/lava-10724541/bin/lava-add-keys
109 12:19:29.107202 Creating /var/lib/lava/dispatcher/tmp/10724541/lava-overlay-kdbsmeq_/lava-10724541/bin/lava-add-sources
110 12:19:29.107331 Creating /var/lib/lava/dispatcher/tmp/10724541/lava-overlay-kdbsmeq_/lava-10724541/bin/lava-background-process-start
111 12:19:29.107520 Creating /var/lib/lava/dispatcher/tmp/10724541/lava-overlay-kdbsmeq_/lava-10724541/bin/lava-background-process-stop
112 12:19:29.107639 Creating /var/lib/lava/dispatcher/tmp/10724541/lava-overlay-kdbsmeq_/lava-10724541/bin/lava-common-functions
113 12:19:29.107757 Creating /var/lib/lava/dispatcher/tmp/10724541/lava-overlay-kdbsmeq_/lava-10724541/bin/lava-echo-ipv4
114 12:19:29.107875 Creating /var/lib/lava/dispatcher/tmp/10724541/lava-overlay-kdbsmeq_/lava-10724541/bin/lava-install-packages
115 12:19:29.107992 Creating /var/lib/lava/dispatcher/tmp/10724541/lava-overlay-kdbsmeq_/lava-10724541/bin/lava-installed-packages
116 12:19:29.108107 Creating /var/lib/lava/dispatcher/tmp/10724541/lava-overlay-kdbsmeq_/lava-10724541/bin/lava-os-build
117 12:19:29.108223 Creating /var/lib/lava/dispatcher/tmp/10724541/lava-overlay-kdbsmeq_/lava-10724541/bin/lava-probe-channel
118 12:19:29.108340 Creating /var/lib/lava/dispatcher/tmp/10724541/lava-overlay-kdbsmeq_/lava-10724541/bin/lava-probe-ip
119 12:19:29.108456 Creating /var/lib/lava/dispatcher/tmp/10724541/lava-overlay-kdbsmeq_/lava-10724541/bin/lava-target-ip
120 12:19:29.108650 Creating /var/lib/lava/dispatcher/tmp/10724541/lava-overlay-kdbsmeq_/lava-10724541/bin/lava-target-mac
121 12:19:29.108768 Creating /var/lib/lava/dispatcher/tmp/10724541/lava-overlay-kdbsmeq_/lava-10724541/bin/lava-target-storage
122 12:19:29.108888 Creating /var/lib/lava/dispatcher/tmp/10724541/lava-overlay-kdbsmeq_/lava-10724541/bin/lava-test-case
123 12:19:29.109005 Creating /var/lib/lava/dispatcher/tmp/10724541/lava-overlay-kdbsmeq_/lava-10724541/bin/lava-test-event
124 12:19:29.109163 Creating /var/lib/lava/dispatcher/tmp/10724541/lava-overlay-kdbsmeq_/lava-10724541/bin/lava-test-feedback
125 12:19:29.109280 Creating /var/lib/lava/dispatcher/tmp/10724541/lava-overlay-kdbsmeq_/lava-10724541/bin/lava-test-raise
126 12:19:29.109402 Creating /var/lib/lava/dispatcher/tmp/10724541/lava-overlay-kdbsmeq_/lava-10724541/bin/lava-test-reference
127 12:19:29.109524 Creating /var/lib/lava/dispatcher/tmp/10724541/lava-overlay-kdbsmeq_/lava-10724541/bin/lava-test-runner
128 12:19:29.109641 Creating /var/lib/lava/dispatcher/tmp/10724541/lava-overlay-kdbsmeq_/lava-10724541/bin/lava-test-set
129 12:19:29.109758 Creating /var/lib/lava/dispatcher/tmp/10724541/lava-overlay-kdbsmeq_/lava-10724541/bin/lava-test-shell
130 12:19:29.109877 Updating /var/lib/lava/dispatcher/tmp/10724541/lava-overlay-kdbsmeq_/lava-10724541/bin/lava-install-packages (oe)
131 12:19:29.207771 Updating /var/lib/lava/dispatcher/tmp/10724541/lava-overlay-kdbsmeq_/lava-10724541/bin/lava-installed-packages (oe)
132 12:19:29.208678 Creating /var/lib/lava/dispatcher/tmp/10724541/lava-overlay-kdbsmeq_/lava-10724541/environment
133 12:19:29.209305 LAVA metadata
134 12:19:29.209694 - LAVA_JOB_ID=10724541
135 12:19:29.210040 - LAVA_DISPATCHER_IP=192.168.201.1
136 12:19:29.210586 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
137 12:19:29.210974 skipped lava-vland-overlay
138 12:19:29.211437 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 12:19:29.211902 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
140 12:19:29.212243 skipped lava-multinode-overlay
141 12:19:29.212626 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 12:19:29.213060 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
143 12:19:29.213447 Loading test definitions
144 12:19:29.213995 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
145 12:19:29.214555 Using /lava-10724541 at stage 0
146 12:19:29.216204 uuid=10724541_1.4.2.3.1 testdef=None
147 12:19:29.216681 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 12:19:29.217114 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
149 12:19:29.219723 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 12:19:29.221044 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
152 12:19:29.224061 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 12:19:29.225223 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
155 12:19:33.212537 runner path: /var/lib/lava/dispatcher/tmp/10724541/lava-overlay-kdbsmeq_/lava-10724541/0/tests/0_cros-ec test_uuid 10724541_1.4.2.3.1
156 12:19:33.213508 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:04) [common]
158 12:19:33.214602 Creating lava-test-runner.conf files
159 12:19:33.214922 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10724541/lava-overlay-kdbsmeq_/lava-10724541/0 for stage 0
160 12:19:33.215408 - 0_cros-ec
161 12:19:33.215919 end: 1.4.2.3 test-definition (duration 00:00:04) [common]
162 12:19:33.216365 start: 1.4.2.4 compress-overlay (timeout 00:09:55) [common]
163 12:19:33.247214 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
164 12:19:33.247571 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:55) [common]
165 12:19:33.247808 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
166 12:19:33.248036 end: 1.4.2 lava-overlay (duration 00:00:04) [common]
167 12:19:33.248262 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:55) [common]
168 12:19:35.843959 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:03) [common]
169 12:19:35.844335 start: 1.4.4 extract-modules (timeout 00:09:52) [common]
170 12:19:35.844457 extracting modules file /var/lib/lava/dispatcher/tmp/10724541/tftp-deploy-uvh5z7d9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10724541/extract-overlay-ramdisk-os1ow9x8/ramdisk
171 12:19:35.864991 end: 1.4.4 extract-modules (duration 00:00:00) [common]
172 12:19:35.865132 start: 1.4.5 apply-overlay-tftp (timeout 00:09:52) [common]
173 12:19:35.865220 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10724541/compress-overlay-rkl_70ds/overlay-1.4.2.4.tar.gz to ramdisk
174 12:19:35.865292 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10724541/compress-overlay-rkl_70ds/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10724541/extract-overlay-ramdisk-os1ow9x8/ramdisk
175 12:19:35.871660 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
176 12:19:35.871773 start: 1.4.6 configure-preseed-file (timeout 00:09:52) [common]
177 12:19:35.871863 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
178 12:19:35.871949 start: 1.4.7 compress-ramdisk (timeout 00:09:52) [common]
179 12:19:35.872026 Building ramdisk /var/lib/lava/dispatcher/tmp/10724541/extract-overlay-ramdisk-os1ow9x8/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10724541/extract-overlay-ramdisk-os1ow9x8/ramdisk
180 12:19:39.362866 >> 188274 blocks
181 12:19:42.832219 rename /var/lib/lava/dispatcher/tmp/10724541/extract-overlay-ramdisk-os1ow9x8/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10724541/tftp-deploy-uvh5z7d9/ramdisk/ramdisk.cpio.gz
182 12:19:42.832652 end: 1.4.7 compress-ramdisk (duration 00:00:07) [common]
183 12:19:42.832777 start: 1.4.8 prepare-kernel (timeout 00:09:45) [common]
184 12:19:42.832874 start: 1.4.8.1 prepare-fit (timeout 00:09:45) [common]
185 12:19:42.833126 No mkimage arch provided, not using FIT.
186 12:19:42.833212 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
187 12:19:42.833293 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
188 12:19:42.833409 end: 1.4 prepare-tftp-overlay (duration 00:00:14) [common]
189 12:19:42.833499 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:45) [common]
190 12:19:42.833574 No LXC device requested
191 12:19:42.833650 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
192 12:19:42.833735 start: 1.6 deploy-device-env (timeout 00:09:45) [common]
193 12:19:42.833812 end: 1.6 deploy-device-env (duration 00:00:00) [common]
194 12:19:42.833880 Checking files for TFTP limit of 4294967296 bytes.
195 12:19:42.834262 end: 1 tftp-deploy (duration 00:00:15) [common]
196 12:19:42.834358 start: 2 depthcharge-action (timeout 00:05:00) [common]
197 12:19:42.834440 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
198 12:19:42.834552 substitutions:
199 12:19:42.834620 - {DTB}: None
200 12:19:42.834680 - {INITRD}: 10724541/tftp-deploy-uvh5z7d9/ramdisk/ramdisk.cpio.gz
201 12:19:42.834738 - {KERNEL}: 10724541/tftp-deploy-uvh5z7d9/kernel/bzImage
202 12:19:42.834793 - {LAVA_MAC}: None
203 12:19:42.834848 - {PRESEED_CONFIG}: None
204 12:19:42.834902 - {PRESEED_LOCAL}: None
205 12:19:42.834955 - {RAMDISK}: 10724541/tftp-deploy-uvh5z7d9/ramdisk/ramdisk.cpio.gz
206 12:19:42.835008 - {ROOT_PART}: None
207 12:19:42.835060 - {ROOT}: None
208 12:19:42.835112 - {SERVER_IP}: 192.168.201.1
209 12:19:42.835164 - {TEE}: None
210 12:19:42.835216 Parsed boot commands:
211 12:19:42.835268 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
212 12:19:42.835498 Parsed boot commands: tftpboot 192.168.201.1 10724541/tftp-deploy-uvh5z7d9/kernel/bzImage 10724541/tftp-deploy-uvh5z7d9/kernel/cmdline 10724541/tftp-deploy-uvh5z7d9/ramdisk/ramdisk.cpio.gz
213 12:19:42.835587 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
214 12:19:42.835669 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
215 12:19:42.835762 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
216 12:19:42.835849 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
217 12:19:42.835918 Not connected, no need to disconnect.
218 12:19:42.835990 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
219 12:19:42.836070 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
220 12:19:42.836133 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-0'
221 12:19:42.839500 Setting prompt string to ['lava-test: # ']
222 12:19:42.839816 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
223 12:19:42.839924 end: 2.2.1 reset-connection (duration 00:00:00) [common]
224 12:19:42.840018 start: 2.2.2 reset-device (timeout 00:05:00) [common]
225 12:19:42.840107 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
226 12:19:42.840286 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-0' '--port=1' '--command=reboot'
227 12:19:47.987540 >> Command sent successfully.
228 12:19:47.993883 Returned 0 in 5 seconds
229 12:19:48.094899 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
231 12:19:48.096298 end: 2.2.2 reset-device (duration 00:00:05) [common]
232 12:19:48.096805 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
233 12:19:48.097243 Setting prompt string to 'Starting depthcharge on Voema...'
234 12:19:48.097577 Changing prompt to 'Starting depthcharge on Voema...'
235 12:19:48.097925 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
236 12:19:48.099140 [Enter `^Ec?' for help]
237 12:19:49.693543
238 12:19:49.693726
239 12:19:49.703341 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
240 12:19:49.710120 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
241 12:19:49.713061 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
242 12:19:49.716750 CPU: AES supported, TXT NOT supported, VT supported
243 12:19:49.723345 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
244 12:19:49.729600 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
245 12:19:49.733275 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
246 12:19:49.736236 VBOOT: Loading verstage.
247 12:19:49.742664 FMAP: Found "FLASH" version 1.1 at 0x1804000.
248 12:19:49.746414 FMAP: base = 0x0 size = 0x2000000 #areas = 32
249 12:19:49.752782 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
250 12:19:49.759374 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
251 12:19:49.765712 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
252 12:19:49.769839
253 12:19:49.770200
254 12:19:49.779622 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
255 12:19:49.794364 Probing TPM: . done!
256 12:19:49.798279 TPM ready after 0 ms
257 12:19:49.800955 Connected to device vid:did:rid of 1ae0:0028:00
258 12:19:49.812605 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
259 12:19:49.819066 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
260 12:19:49.822573 Initialized TPM device CR50 revision 0
261 12:19:49.872665 tlcl_send_startup: Startup return code is 0
262 12:19:49.873221 TPM: setup succeeded
263 12:19:49.886738 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
264 12:19:49.901225 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
265 12:19:49.914156 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
266 12:19:49.923808 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
267 12:19:49.927872 Chrome EC: UHEPI supported
268 12:19:49.930620 Phase 1
269 12:19:49.933828 FMAP: area GBB found @ 1805000 (458752 bytes)
270 12:19:49.943894 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
271 12:19:49.950780 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
272 12:19:49.956902 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
273 12:19:49.964172 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
274 12:19:49.966779 Recovery requested (1009000e)
275 12:19:49.976092 TPM: Extending digest for VBOOT: boot mode into PCR 0
276 12:19:49.982113 tlcl_extend: response is 0
277 12:19:49.988977 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
278 12:19:49.998613 tlcl_extend: response is 0
279 12:19:50.005270 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
280 12:19:50.012741 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
281 12:19:50.019010 BS: verstage times (exec / console): total (unknown) / 142 ms
282 12:19:50.019581
283 12:19:50.020023
284 12:19:50.031962 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
285 12:19:50.038903 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
286 12:19:50.041958 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
287 12:19:50.044805 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
288 12:19:50.052191 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
289 12:19:50.054959 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
290 12:19:50.058915 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
291 12:19:50.062047 TCO_STS: 0000 0000
292 12:19:50.064814 GEN_PMCON: d0015038 00002200
293 12:19:50.068471 GBLRST_CAUSE: 00000000 00000000
294 12:19:50.071618 HPR_CAUSE0: 00000000
295 12:19:50.072194 prev_sleep_state 5
296 12:19:50.075002 Boot Count incremented to 21052
297 12:19:50.081500 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
298 12:19:50.087671 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
299 12:19:50.097665 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
300 12:19:50.104215 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
301 12:19:50.107959 Chrome EC: UHEPI supported
302 12:19:50.114498 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
303 12:19:50.126292 Probing TPM: done!
304 12:19:50.132166 Connected to device vid:did:rid of 1ae0:0028:00
305 12:19:50.143543 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
306 12:19:50.150031 Initialized TPM device CR50 revision 0
307 12:19:50.159405 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
308 12:19:50.166350 MRC: Hash idx 0x100b comparison successful.
309 12:19:50.169868 MRC cache found, size faa8
310 12:19:50.170452 bootmode is set to: 2
311 12:19:50.172941 SPD index = 0
312 12:19:50.179493 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
313 12:19:50.182680 SPD: module type is LPDDR4X
314 12:19:50.185650 SPD: module part number is MT53E512M64D4NW-046
315 12:19:50.192788 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
316 12:19:50.199333 SPD: device width 16 bits, bus width 16 bits
317 12:19:50.202501 SPD: module size is 1024 MB (per channel)
318 12:19:50.634492 CBMEM:
319 12:19:50.637872 IMD: root @ 0x76fff000 254 entries.
320 12:19:50.641467 IMD: root @ 0x76ffec00 62 entries.
321 12:19:50.644710 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
322 12:19:50.651455 FMAP: area RW_VPD found @ f35000 (8192 bytes)
323 12:19:50.654745 External stage cache:
324 12:19:50.657602 IMD: root @ 0x7b3ff000 254 entries.
325 12:19:50.661355 IMD: root @ 0x7b3fec00 62 entries.
326 12:19:50.676311 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
327 12:19:50.682901 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
328 12:19:50.689381 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
329 12:19:50.703427 MRC: 'RECOVERY_MRC_CACHE' does not need update.
330 12:19:50.709990 cse_lite: Skip switching to RW in the recovery path
331 12:19:50.710421 8 DIMMs found
332 12:19:50.714340 SMM Memory Map
333 12:19:50.714764 SMRAM : 0x7b000000 0x800000
334 12:19:50.717992 Subregion 0: 0x7b000000 0x200000
335 12:19:50.721495 Subregion 1: 0x7b200000 0x200000
336 12:19:50.724877 Subregion 2: 0x7b400000 0x400000
337 12:19:50.727581 top_of_ram = 0x77000000
338 12:19:50.734257 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
339 12:19:50.737427 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
340 12:19:50.744131 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
341 12:19:50.747378 MTRR Range: Start=ff000000 End=0 (Size 1000000)
342 12:19:50.757354 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
343 12:19:50.764140 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
344 12:19:50.773977 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
345 12:19:50.777548 Processing 211 relocs. Offset value of 0x74c0b000
346 12:19:50.786093 BS: romstage times (exec / console): total (unknown) / 277 ms
347 12:19:50.792505
348 12:19:50.792716
349 12:19:50.802606 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
350 12:19:50.805415 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
351 12:19:50.815433 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
352 12:19:50.822345 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
353 12:19:50.829116 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
354 12:19:50.835486 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
355 12:19:50.882494 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
356 12:19:50.889412 Processing 5008 relocs. Offset value of 0x75d98000
357 12:19:50.892285 BS: postcar times (exec / console): total (unknown) / 59 ms
358 12:19:50.895789
359 12:19:50.896208
360 12:19:50.905352 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
361 12:19:50.905899 Normal boot
362 12:19:50.909044 FW_CONFIG value is 0x804c02
363 12:19:50.912612 PCI: 00:07.0 disabled by fw_config
364 12:19:50.915756 PCI: 00:07.1 disabled by fw_config
365 12:19:50.919567 PCI: 00:0d.2 disabled by fw_config
366 12:19:50.922701 PCI: 00:1c.7 disabled by fw_config
367 12:19:50.929353 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
368 12:19:50.935917 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
369 12:19:50.938889 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
370 12:19:50.942765 GENERIC: 0.0 disabled by fw_config
371 12:19:50.945862 GENERIC: 1.0 disabled by fw_config
372 12:19:50.952496 fw_config match found: DB_USB=USB3_ACTIVE
373 12:19:50.955952 fw_config match found: DB_USB=USB3_ACTIVE
374 12:19:50.958930 fw_config match found: DB_USB=USB3_ACTIVE
375 12:19:50.965970 fw_config match found: DB_USB=USB3_ACTIVE
376 12:19:50.968867 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
377 12:19:50.975757 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
378 12:19:50.985796 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
379 12:19:50.992351 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
380 12:19:50.995575 microcode: sig=0x806c1 pf=0x80 revision=0x86
381 12:19:51.002306 microcode: Update skipped, already up-to-date
382 12:19:51.008469 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
383 12:19:51.036497 Detected 4 core, 8 thread CPU.
384 12:19:51.039497 Setting up SMI for CPU
385 12:19:51.042822 IED base = 0x7b400000
386 12:19:51.043300 IED size = 0x00400000
387 12:19:51.045731 Will perform SMM setup.
388 12:19:51.052250 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
389 12:19:51.059141 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
390 12:19:51.065935 Processing 16 relocs. Offset value of 0x00030000
391 12:19:51.069050 Attempting to start 7 APs
392 12:19:51.071821 Waiting for 10ms after sending INIT.
393 12:19:51.088452 Waiting for 1st SIPI to complete...done.
394 12:19:51.088989 AP: slot 1 apic_id 1.
395 12:19:51.091282 AP: slot 6 apic_id 2.
396 12:19:51.095052 AP: slot 2 apic_id 3.
397 12:19:51.095636 AP: slot 4 apic_id 5.
398 12:19:51.098114 AP: slot 5 apic_id 4.
399 12:19:51.101400 AP: slot 3 apic_id 6.
400 12:19:51.101962 AP: slot 7 apic_id 7.
401 12:19:51.107731 Waiting for 2nd SIPI to complete...done.
402 12:19:51.114405 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
403 12:19:51.121385 Processing 13 relocs. Offset value of 0x00038000
404 12:19:51.124944 Unable to locate Global NVS
405 12:19:51.130818 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
406 12:19:51.134805 Installing permanent SMM handler to 0x7b000000
407 12:19:51.144541 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
408 12:19:51.147684 Processing 794 relocs. Offset value of 0x7b010000
409 12:19:51.157159 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
410 12:19:51.160788 Processing 13 relocs. Offset value of 0x7b008000
411 12:19:51.167891 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
412 12:19:51.174125 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
413 12:19:51.180660 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
414 12:19:51.183456 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
415 12:19:51.190755 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
416 12:19:51.197161 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
417 12:19:51.203390 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
418 12:19:51.207207 Unable to locate Global NVS
419 12:19:51.213388 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
420 12:19:51.216517 Clearing SMI status registers
421 12:19:51.220296 SMI_STS: PM1
422 12:19:51.220829 PM1_STS: PWRBTN
423 12:19:51.227312 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
424 12:19:51.230317 In relocation handler: CPU 0
425 12:19:51.233399 New SMBASE=0x7b000000 IEDBASE=0x7b400000
426 12:19:51.240026 Writing SMRR. base = 0x7b000006, mask=0xff800c00
427 12:19:51.243025 Relocation complete.
428 12:19:51.249872 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
429 12:19:51.252602 In relocation handler: CPU 1
430 12:19:51.256297 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
431 12:19:51.259301 Relocation complete.
432 12:19:51.266259 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
433 12:19:51.269636 In relocation handler: CPU 4
434 12:19:51.273112 New SMBASE=0x7afff000 IEDBASE=0x7b400000
435 12:19:51.275903 Relocation complete.
436 12:19:51.282822 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
437 12:19:51.286308 In relocation handler: CPU 5
438 12:19:51.289137 New SMBASE=0x7affec00 IEDBASE=0x7b400000
439 12:19:51.292399 Writing SMRR. base = 0x7b000006, mask=0xff800c00
440 12:19:51.295880 Relocation complete.
441 12:19:51.302804 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
442 12:19:51.305487 In relocation handler: CPU 3
443 12:19:51.309166 New SMBASE=0x7afff400 IEDBASE=0x7b400000
444 12:19:51.315964 Writing SMRR. base = 0x7b000006, mask=0xff800c00
445 12:19:51.318739 Relocation complete.
446 12:19:51.325754 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
447 12:19:51.329253 In relocation handler: CPU 7
448 12:19:51.332128 New SMBASE=0x7affe400 IEDBASE=0x7b400000
449 12:19:51.335463 Relocation complete.
450 12:19:51.342030 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
451 12:19:51.345681 In relocation handler: CPU 6
452 12:19:51.348717 New SMBASE=0x7affe800 IEDBASE=0x7b400000
453 12:19:51.352446 Writing SMRR. base = 0x7b000006, mask=0xff800c00
454 12:19:51.355419 Relocation complete.
455 12:19:51.362063 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
456 12:19:51.365782 In relocation handler: CPU 2
457 12:19:51.368418 New SMBASE=0x7afff800 IEDBASE=0x7b400000
458 12:19:51.372171 Relocation complete.
459 12:19:51.375003 Initializing CPU #0
460 12:19:51.378500 CPU: vendor Intel device 806c1
461 12:19:51.382368 CPU: family 06, model 8c, stepping 01
462 12:19:51.382797 Clearing out pending MCEs
463 12:19:51.385576 Setting up local APIC...
464 12:19:51.389266 apic_id: 0x00 done.
465 12:19:51.392511 Turbo is available but hidden
466 12:19:51.395559 Turbo is available and visible
467 12:19:51.398868 microcode: Update skipped, already up-to-date
468 12:19:51.402346 CPU #0 initialized
469 12:19:51.402773 Initializing CPU #5
470 12:19:51.405833 Initializing CPU #4
471 12:19:51.408793 CPU: vendor Intel device 806c1
472 12:19:51.412322 CPU: family 06, model 8c, stepping 01
473 12:19:51.415450 CPU: vendor Intel device 806c1
474 12:19:51.419086 CPU: family 06, model 8c, stepping 01
475 12:19:51.422051 Clearing out pending MCEs
476 12:19:51.425502 Clearing out pending MCEs
477 12:19:51.429144 Setting up local APIC...
478 12:19:51.429571 Initializing CPU #6
479 12:19:51.432303 Initializing CPU #2
480 12:19:51.435464 CPU: vendor Intel device 806c1
481 12:19:51.439147 CPU: family 06, model 8c, stepping 01
482 12:19:51.442227 CPU: vendor Intel device 806c1
483 12:19:51.445318 CPU: family 06, model 8c, stepping 01
484 12:19:51.448524 Clearing out pending MCEs
485 12:19:51.452262 Clearing out pending MCEs
486 12:19:51.452865 Setting up local APIC...
487 12:19:51.455305 Initializing CPU #7
488 12:19:51.458854 Initializing CPU #3
489 12:19:51.461905 CPU: vendor Intel device 806c1
490 12:19:51.465677 CPU: family 06, model 8c, stepping 01
491 12:19:51.468426 CPU: vendor Intel device 806c1
492 12:19:51.472329 CPU: family 06, model 8c, stepping 01
493 12:19:51.475458 Clearing out pending MCEs
494 12:19:51.475991 Clearing out pending MCEs
495 12:19:51.478565 Setting up local APIC...
496 12:19:51.482145 Setting up local APIC...
497 12:19:51.485275 Setting up local APIC...
498 12:19:51.485804 apic_id: 0x02 done.
499 12:19:51.488481 apic_id: 0x03 done.
500 12:19:51.491845 microcode: Update skipped, already up-to-date
501 12:19:51.498618 microcode: Update skipped, already up-to-date
502 12:19:51.499049 CPU #6 initialized
503 12:19:51.501758 CPU #2 initialized
504 12:19:51.505133 Initializing CPU #1
505 12:19:51.505574 apic_id: 0x04 done.
506 12:19:51.508430 Setting up local APIC...
507 12:19:51.511603 CPU: vendor Intel device 806c1
508 12:19:51.515015 CPU: family 06, model 8c, stepping 01
509 12:19:51.518790 microcode: Update skipped, already up-to-date
510 12:19:51.521726 apic_id: 0x05 done.
511 12:19:51.524754 CPU #5 initialized
512 12:19:51.528065 microcode: Update skipped, already up-to-date
513 12:19:51.531690 apic_id: 0x07 done.
514 12:19:51.532133 apic_id: 0x06 done.
515 12:19:51.538231 microcode: Update skipped, already up-to-date
516 12:19:51.541934 microcode: Update skipped, already up-to-date
517 12:19:51.544753 CPU #7 initialized
518 12:19:51.545202 CPU #3 initialized
519 12:19:51.547792 CPU #4 initialized
520 12:19:51.551860 Clearing out pending MCEs
521 12:19:51.554553 Setting up local APIC...
522 12:19:51.554985 apic_id: 0x01 done.
523 12:19:51.561462 microcode: Update skipped, already up-to-date
524 12:19:51.562015 CPU #1 initialized
525 12:19:51.568085 bsp_do_flight_plan done after 455 msecs.
526 12:19:51.568627 CPU: frequency set to 4000 MHz
527 12:19:51.571062 Enabling SMIs.
528 12:19:51.577609 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
529 12:19:51.593407 SATAXPCIE1 indicates PCIe NVMe is present
530 12:19:51.596764 Probing TPM: done!
531 12:19:51.600165 Connected to device vid:did:rid of 1ae0:0028:00
532 12:19:51.610474 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
533 12:19:51.613844 Initialized TPM device CR50 revision 0
534 12:19:51.617118 Enabling S0i3.4
535 12:19:51.623679 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
536 12:19:51.627134 Found a VBT of 8704 bytes after decompression
537 12:19:51.633315 cse_lite: CSE RO boot. HybridStorageMode disabled
538 12:19:51.639979 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
539 12:19:51.716043 FSPS returned 0
540 12:19:51.719298 Executing Phase 1 of FspMultiPhaseSiInit
541 12:19:51.729100 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
542 12:19:51.732257 port C0 DISC req: usage 1 usb3 1 usb2 5
543 12:19:51.735835 Raw Buffer output 0 00000511
544 12:19:51.739123 Raw Buffer output 1 00000000
545 12:19:51.743048 pmc_send_ipc_cmd succeeded
546 12:19:51.749939 port C1 DISC req: usage 1 usb3 2 usb2 3
547 12:19:51.750466 Raw Buffer output 0 00000321
548 12:19:51.753126 Raw Buffer output 1 00000000
549 12:19:51.757182 pmc_send_ipc_cmd succeeded
550 12:19:51.762202 Detected 4 core, 8 thread CPU.
551 12:19:51.765918 Detected 4 core, 8 thread CPU.
552 12:19:52.000280 Display FSP Version Info HOB
553 12:19:52.003424 Reference Code - CPU = a.0.4c.31
554 12:19:52.006572 uCode Version = 0.0.0.86
555 12:19:52.009991 TXT ACM version = ff.ff.ff.ffff
556 12:19:52.013056 Reference Code - ME = a.0.4c.31
557 12:19:52.016023 MEBx version = 0.0.0.0
558 12:19:52.019635 ME Firmware Version = Consumer SKU
559 12:19:52.023493 Reference Code - PCH = a.0.4c.31
560 12:19:52.026619 PCH-CRID Status = Disabled
561 12:19:52.029653 PCH-CRID Original Value = ff.ff.ff.ffff
562 12:19:52.032850 PCH-CRID New Value = ff.ff.ff.ffff
563 12:19:52.036263 OPROM - RST - RAID = ff.ff.ff.ffff
564 12:19:52.039613 PCH Hsio Version = 4.0.0.0
565 12:19:52.042711 Reference Code - SA - System Agent = a.0.4c.31
566 12:19:52.046048 Reference Code - MRC = 2.0.0.1
567 12:19:52.049590 SA - PCIe Version = a.0.4c.31
568 12:19:52.052838 SA-CRID Status = Disabled
569 12:19:52.056348 SA-CRID Original Value = 0.0.0.1
570 12:19:52.059169 SA-CRID New Value = 0.0.0.1
571 12:19:52.062641 OPROM - VBIOS = ff.ff.ff.ffff
572 12:19:52.065841 IO Manageability Engine FW Version = 11.1.4.0
573 12:19:52.069610 PHY Build Version = 0.0.0.e0
574 12:19:52.072603 Thunderbolt(TM) FW Version = 0.0.0.0
575 12:19:52.079383 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
576 12:19:52.083146 ITSS IRQ Polarities Before:
577 12:19:52.083809 IPC0: 0xffffffff
578 12:19:52.086099 IPC1: 0xffffffff
579 12:19:52.086656 IPC2: 0xffffffff
580 12:19:52.088962 IPC3: 0xffffffff
581 12:19:52.092733 ITSS IRQ Polarities After:
582 12:19:52.093323 IPC0: 0xffffffff
583 12:19:52.095846 IPC1: 0xffffffff
584 12:19:52.096448 IPC2: 0xffffffff
585 12:19:52.099312 IPC3: 0xffffffff
586 12:19:52.102296 Found PCIe Root Port #9 at PCI: 00:1d.0.
587 12:19:52.115790 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
588 12:19:52.125465 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
589 12:19:52.139014 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
590 12:19:52.145394 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
591 12:19:52.148878 Enumerating buses...
592 12:19:52.152192 Show all devs... Before device enumeration.
593 12:19:52.155451 Root Device: enabled 1
594 12:19:52.155978 DOMAIN: 0000: enabled 1
595 12:19:52.158579 CPU_CLUSTER: 0: enabled 1
596 12:19:52.161907 PCI: 00:00.0: enabled 1
597 12:19:52.165810 PCI: 00:02.0: enabled 1
598 12:19:52.166343 PCI: 00:04.0: enabled 1
599 12:19:52.168536 PCI: 00:05.0: enabled 1
600 12:19:52.171961 PCI: 00:06.0: enabled 0
601 12:19:52.175463 PCI: 00:07.0: enabled 0
602 12:19:52.176038 PCI: 00:07.1: enabled 0
603 12:19:52.178783 PCI: 00:07.2: enabled 0
604 12:19:52.181593 PCI: 00:07.3: enabled 0
605 12:19:52.185338 PCI: 00:08.0: enabled 1
606 12:19:52.185761 PCI: 00:09.0: enabled 0
607 12:19:52.188570 PCI: 00:0a.0: enabled 0
608 12:19:52.192181 PCI: 00:0d.0: enabled 1
609 12:19:52.195307 PCI: 00:0d.1: enabled 0
610 12:19:52.195872 PCI: 00:0d.2: enabled 0
611 12:19:52.198291 PCI: 00:0d.3: enabled 0
612 12:19:52.201926 PCI: 00:0e.0: enabled 0
613 12:19:52.202451 PCI: 00:10.2: enabled 1
614 12:19:52.205130 PCI: 00:10.6: enabled 0
615 12:19:52.208557 PCI: 00:10.7: enabled 0
616 12:19:52.211959 PCI: 00:12.0: enabled 0
617 12:19:52.212483 PCI: 00:12.6: enabled 0
618 12:19:52.215311 PCI: 00:13.0: enabled 0
619 12:19:52.218703 PCI: 00:14.0: enabled 1
620 12:19:52.221563 PCI: 00:14.1: enabled 0
621 12:19:52.222086 PCI: 00:14.2: enabled 1
622 12:19:52.225418 PCI: 00:14.3: enabled 1
623 12:19:52.228175 PCI: 00:15.0: enabled 1
624 12:19:52.232106 PCI: 00:15.1: enabled 1
625 12:19:52.232633 PCI: 00:15.2: enabled 1
626 12:19:52.235213 PCI: 00:15.3: enabled 1
627 12:19:52.238291 PCI: 00:16.0: enabled 1
628 12:19:52.238820 PCI: 00:16.1: enabled 0
629 12:19:52.241902 PCI: 00:16.2: enabled 0
630 12:19:52.245498 PCI: 00:16.3: enabled 0
631 12:19:52.248206 PCI: 00:16.4: enabled 0
632 12:19:52.248628 PCI: 00:16.5: enabled 0
633 12:19:52.252020 PCI: 00:17.0: enabled 1
634 12:19:52.254874 PCI: 00:19.0: enabled 0
635 12:19:52.258268 PCI: 00:19.1: enabled 1
636 12:19:52.258694 PCI: 00:19.2: enabled 0
637 12:19:52.261676 PCI: 00:1c.0: enabled 1
638 12:19:52.265328 PCI: 00:1c.1: enabled 0
639 12:19:52.268537 PCI: 00:1c.2: enabled 0
640 12:19:52.269071 PCI: 00:1c.3: enabled 0
641 12:19:52.271468 PCI: 00:1c.4: enabled 0
642 12:19:52.275136 PCI: 00:1c.5: enabled 0
643 12:19:52.278098 PCI: 00:1c.6: enabled 1
644 12:19:52.278526 PCI: 00:1c.7: enabled 0
645 12:19:52.281316 PCI: 00:1d.0: enabled 1
646 12:19:52.284904 PCI: 00:1d.1: enabled 0
647 12:19:52.288088 PCI: 00:1d.2: enabled 1
648 12:19:52.288618 PCI: 00:1d.3: enabled 0
649 12:19:52.291693 PCI: 00:1e.0: enabled 1
650 12:19:52.294802 PCI: 00:1e.1: enabled 0
651 12:19:52.295341 PCI: 00:1e.2: enabled 1
652 12:19:52.298421 PCI: 00:1e.3: enabled 1
653 12:19:52.301799 PCI: 00:1f.0: enabled 1
654 12:19:52.304604 PCI: 00:1f.1: enabled 0
655 12:19:52.305185 PCI: 00:1f.2: enabled 1
656 12:19:52.308173 PCI: 00:1f.3: enabled 1
657 12:19:52.311510 PCI: 00:1f.4: enabled 0
658 12:19:52.314349 PCI: 00:1f.5: enabled 1
659 12:19:52.314774 PCI: 00:1f.6: enabled 0
660 12:19:52.318339 PCI: 00:1f.7: enabled 0
661 12:19:52.321448 APIC: 00: enabled 1
662 12:19:52.321978 GENERIC: 0.0: enabled 1
663 12:19:52.324303 GENERIC: 0.0: enabled 1
664 12:19:52.328088 GENERIC: 1.0: enabled 1
665 12:19:52.331014 GENERIC: 0.0: enabled 1
666 12:19:52.331586 GENERIC: 1.0: enabled 1
667 12:19:52.334518 USB0 port 0: enabled 1
668 12:19:52.337814 GENERIC: 0.0: enabled 1
669 12:19:52.341522 USB0 port 0: enabled 1
670 12:19:52.342064 GENERIC: 0.0: enabled 1
671 12:19:52.344621 I2C: 00:1a: enabled 1
672 12:19:52.347979 I2C: 00:31: enabled 1
673 12:19:52.348427 I2C: 00:32: enabled 1
674 12:19:52.350676 I2C: 00:10: enabled 1
675 12:19:52.354571 I2C: 00:15: enabled 1
676 12:19:52.355092 GENERIC: 0.0: enabled 0
677 12:19:52.357538 GENERIC: 1.0: enabled 0
678 12:19:52.361071 GENERIC: 0.0: enabled 1
679 12:19:52.361495 SPI: 00: enabled 1
680 12:19:52.364209 SPI: 00: enabled 1
681 12:19:52.367492 PNP: 0c09.0: enabled 1
682 12:19:52.370737 GENERIC: 0.0: enabled 1
683 12:19:52.371259 USB3 port 0: enabled 1
684 12:19:52.374147 USB3 port 1: enabled 1
685 12:19:52.377341 USB3 port 2: enabled 0
686 12:19:52.377778 USB3 port 3: enabled 0
687 12:19:52.380991 USB2 port 0: enabled 0
688 12:19:52.384204 USB2 port 1: enabled 1
689 12:19:52.387547 USB2 port 2: enabled 1
690 12:19:52.388090 USB2 port 3: enabled 0
691 12:19:52.390885 USB2 port 4: enabled 1
692 12:19:52.393812 USB2 port 5: enabled 0
693 12:19:52.394288 USB2 port 6: enabled 0
694 12:19:52.397526 USB2 port 7: enabled 0
695 12:19:52.400538 USB2 port 8: enabled 0
696 12:19:52.403804 USB2 port 9: enabled 0
697 12:19:52.404338 USB3 port 0: enabled 0
698 12:19:52.407449 USB3 port 1: enabled 1
699 12:19:52.410258 USB3 port 2: enabled 0
700 12:19:52.410830 USB3 port 3: enabled 0
701 12:19:52.413876 GENERIC: 0.0: enabled 1
702 12:19:52.416943 GENERIC: 1.0: enabled 1
703 12:19:52.417410 APIC: 01: enabled 1
704 12:19:52.420674 APIC: 03: enabled 1
705 12:19:52.423502 APIC: 06: enabled 1
706 12:19:52.423929 APIC: 05: enabled 1
707 12:19:52.427106 APIC: 04: enabled 1
708 12:19:52.430396 APIC: 02: enabled 1
709 12:19:52.430923 APIC: 07: enabled 1
710 12:19:52.433912 Compare with tree...
711 12:19:52.437200 Root Device: enabled 1
712 12:19:52.437817 DOMAIN: 0000: enabled 1
713 12:19:52.439934 PCI: 00:00.0: enabled 1
714 12:19:52.443806 PCI: 00:02.0: enabled 1
715 12:19:52.446818 PCI: 00:04.0: enabled 1
716 12:19:52.447475 GENERIC: 0.0: enabled 1
717 12:19:52.450568 PCI: 00:05.0: enabled 1
718 12:19:52.453499 PCI: 00:06.0: enabled 0
719 12:19:52.457100 PCI: 00:07.0: enabled 0
720 12:19:52.460038 GENERIC: 0.0: enabled 1
721 12:19:52.460519 PCI: 00:07.1: enabled 0
722 12:19:52.463696 GENERIC: 1.0: enabled 1
723 12:19:52.466584 PCI: 00:07.2: enabled 0
724 12:19:52.469847 GENERIC: 0.0: enabled 1
725 12:19:52.473161 PCI: 00:07.3: enabled 0
726 12:19:52.476841 GENERIC: 1.0: enabled 1
727 12:19:52.477371 PCI: 00:08.0: enabled 1
728 12:19:52.480035 PCI: 00:09.0: enabled 0
729 12:19:52.482947 PCI: 00:0a.0: enabled 0
730 12:19:52.486276 PCI: 00:0d.0: enabled 1
731 12:19:52.490013 USB0 port 0: enabled 1
732 12:19:52.490502 USB3 port 0: enabled 1
733 12:19:52.493208 USB3 port 1: enabled 1
734 12:19:52.496716 USB3 port 2: enabled 0
735 12:19:52.499390 USB3 port 3: enabled 0
736 12:19:52.502883 PCI: 00:0d.1: enabled 0
737 12:19:52.503309 PCI: 00:0d.2: enabled 0
738 12:19:52.506441 GENERIC: 0.0: enabled 1
739 12:19:52.509609 PCI: 00:0d.3: enabled 0
740 12:19:52.512754 PCI: 00:0e.0: enabled 0
741 12:19:52.516198 PCI: 00:10.2: enabled 1
742 12:19:52.519327 PCI: 00:10.6: enabled 0
743 12:19:52.519795 PCI: 00:10.7: enabled 0
744 12:19:52.523124 PCI: 00:12.0: enabled 0
745 12:19:52.526260 PCI: 00:12.6: enabled 0
746 12:19:52.529811 PCI: 00:13.0: enabled 0
747 12:19:52.530350 PCI: 00:14.0: enabled 1
748 12:19:52.532936 USB0 port 0: enabled 1
749 12:19:52.536069 USB2 port 0: enabled 0
750 12:19:52.539121 USB2 port 1: enabled 1
751 12:19:52.542817 USB2 port 2: enabled 1
752 12:19:52.545875 USB2 port 3: enabled 0
753 12:19:52.546303 USB2 port 4: enabled 1
754 12:19:52.549765 USB2 port 5: enabled 0
755 12:19:52.552813 USB2 port 6: enabled 0
756 12:19:52.556081 USB2 port 7: enabled 0
757 12:19:52.559069 USB2 port 8: enabled 0
758 12:19:52.562517 USB2 port 9: enabled 0
759 12:19:52.562942 USB3 port 0: enabled 0
760 12:19:52.565933 USB3 port 1: enabled 1
761 12:19:52.569696 USB3 port 2: enabled 0
762 12:19:52.572706 USB3 port 3: enabled 0
763 12:19:52.575819 PCI: 00:14.1: enabled 0
764 12:19:52.576355 PCI: 00:14.2: enabled 1
765 12:19:52.579255 PCI: 00:14.3: enabled 1
766 12:19:52.582575 GENERIC: 0.0: enabled 1
767 12:19:52.585402 PCI: 00:15.0: enabled 1
768 12:19:52.589025 I2C: 00:1a: enabled 1
769 12:19:52.589680 I2C: 00:31: enabled 1
770 12:19:52.592240 I2C: 00:32: enabled 1
771 12:19:52.596030 PCI: 00:15.1: enabled 1
772 12:19:52.598773 I2C: 00:10: enabled 1
773 12:19:52.602229 PCI: 00:15.2: enabled 1
774 12:19:52.602659 PCI: 00:15.3: enabled 1
775 12:19:52.605601 PCI: 00:16.0: enabled 1
776 12:19:52.608921 PCI: 00:16.1: enabled 0
777 12:19:52.612568 PCI: 00:16.2: enabled 0
778 12:19:52.615467 PCI: 00:16.3: enabled 0
779 12:19:52.616032 PCI: 00:16.4: enabled 0
780 12:19:52.618416 PCI: 00:16.5: enabled 0
781 12:19:52.622207 PCI: 00:17.0: enabled 1
782 12:19:52.626158 PCI: 00:19.0: enabled 0
783 12:19:52.626690 PCI: 00:19.1: enabled 1
784 12:19:52.629744 I2C: 00:15: enabled 1
785 12:19:52.633283 PCI: 00:19.2: enabled 0
786 12:19:52.636359 PCI: 00:1d.0: enabled 1
787 12:19:52.636783 GENERIC: 0.0: enabled 1
788 12:19:52.639451 PCI: 00:1e.0: enabled 1
789 12:19:52.643047 PCI: 00:1e.1: enabled 0
790 12:19:52.692912 PCI: 00:1e.2: enabled 1
791 12:19:52.693574 SPI: 00: enabled 1
792 12:19:52.694124 PCI: 00:1e.3: enabled 1
793 12:19:52.694641 SPI: 00: enabled 1
794 12:19:52.695144 PCI: 00:1f.0: enabled 1
795 12:19:52.696026 PNP: 0c09.0: enabled 1
796 12:19:52.696548 PCI: 00:1f.1: enabled 0
797 12:19:52.697047 PCI: 00:1f.2: enabled 1
798 12:19:52.697536 GENERIC: 0.0: enabled 1
799 12:19:52.698022 GENERIC: 0.0: enabled 1
800 12:19:52.698502 GENERIC: 1.0: enabled 1
801 12:19:52.698990 PCI: 00:1f.3: enabled 1
802 12:19:52.699317 PCI: 00:1f.4: enabled 0
803 12:19:52.699664 PCI: 00:1f.5: enabled 1
804 12:19:52.700008 PCI: 00:1f.6: enabled 0
805 12:19:52.700293 PCI: 00:1f.7: enabled 0
806 12:19:52.700574 CPU_CLUSTER: 0: enabled 1
807 12:19:52.700855 APIC: 00: enabled 1
808 12:19:52.701136 APIC: 01: enabled 1
809 12:19:52.701413 APIC: 03: enabled 1
810 12:19:52.745084 APIC: 06: enabled 1
811 12:19:52.745711 APIC: 05: enabled 1
812 12:19:52.746098 APIC: 04: enabled 1
813 12:19:52.746450 APIC: 02: enabled 1
814 12:19:52.746785 APIC: 07: enabled 1
815 12:19:52.747472 Root Device scanning...
816 12:19:52.747836 scan_static_bus for Root Device
817 12:19:52.748169 DOMAIN: 0000 enabled
818 12:19:52.748489 CPU_CLUSTER: 0 enabled
819 12:19:52.748806 DOMAIN: 0000 scanning...
820 12:19:52.749118 PCI: pci_scan_bus for bus 00
821 12:19:52.749429 PCI: 00:00.0 [8086/0000] ops
822 12:19:52.749736 PCI: 00:00.0 [8086/9a12] enabled
823 12:19:52.750044 PCI: 00:02.0 [8086/0000] bus ops
824 12:19:52.750351 PCI: 00:02.0 [8086/9a40] enabled
825 12:19:52.750655 PCI: 00:04.0 [8086/0000] bus ops
826 12:19:52.750964 PCI: 00:04.0 [8086/9a03] enabled
827 12:19:52.751270 PCI: 00:05.0 [8086/9a19] enabled
828 12:19:52.789838 PCI: 00:07.0 [0000/0000] hidden
829 12:19:52.790459 PCI: 00:08.0 [8086/9a11] enabled
830 12:19:52.790925 PCI: 00:0a.0 [8086/9a0d] disabled
831 12:19:52.791625 PCI: 00:0d.0 [8086/0000] bus ops
832 12:19:52.792006 PCI: 00:0d.0 [8086/9a13] enabled
833 12:19:52.792343 PCI: 00:14.0 [8086/0000] bus ops
834 12:19:52.792673 PCI: 00:14.0 [8086/a0ed] enabled
835 12:19:52.793033 PCI: 00:14.2 [8086/a0ef] enabled
836 12:19:52.793351 PCI: 00:14.3 [8086/0000] bus ops
837 12:19:52.793667 PCI: 00:14.3 [8086/a0f0] enabled
838 12:19:52.793978 PCI: 00:15.0 [8086/0000] bus ops
839 12:19:52.794283 PCI: 00:15.0 [8086/a0e8] enabled
840 12:19:52.794589 PCI: 00:15.1 [8086/0000] bus ops
841 12:19:52.794988 PCI: 00:15.1 [8086/a0e9] enabled
842 12:19:52.797375 PCI: 00:15.2 [8086/0000] bus ops
843 12:19:52.800789 PCI: 00:15.2 [8086/a0ea] enabled
844 12:19:52.803563 PCI: 00:15.3 [8086/0000] bus ops
845 12:19:52.806976 PCI: 00:15.3 [8086/a0eb] enabled
846 12:19:52.810599 PCI: 00:16.0 [8086/0000] ops
847 12:19:52.814495 PCI: 00:16.0 [8086/a0e0] enabled
848 12:19:52.817216 PCI: Static device PCI: 00:17.0 not found, disabling it.
849 12:19:52.820269 PCI: 00:19.0 [8086/0000] bus ops
850 12:19:52.823696 PCI: 00:19.0 [8086/a0c5] disabled
851 12:19:52.826923 PCI: 00:19.1 [8086/0000] bus ops
852 12:19:52.830462 PCI: 00:19.1 [8086/a0c6] enabled
853 12:19:52.833736 PCI: 00:1d.0 [8086/0000] bus ops
854 12:19:52.837139 PCI: 00:1d.0 [8086/a0b0] enabled
855 12:19:52.840214 PCI: 00:1e.0 [8086/0000] ops
856 12:19:52.844197 PCI: 00:1e.0 [8086/a0a8] enabled
857 12:19:52.846913 PCI: 00:1e.2 [8086/0000] bus ops
858 12:19:52.849963 PCI: 00:1e.2 [8086/a0aa] enabled
859 12:19:52.852851 PCI: 00:1e.3 [8086/0000] bus ops
860 12:19:52.856650 PCI: 00:1e.3 [8086/a0ab] enabled
861 12:19:52.859699 PCI: 00:1f.0 [8086/0000] bus ops
862 12:19:52.863049 PCI: 00:1f.0 [8086/a087] enabled
863 12:19:52.866651 RTC Init
864 12:19:52.869739 Set power on after power failure.
865 12:19:52.869931 Disabling Deep S3
866 12:19:52.872775 Disabling Deep S3
867 12:19:52.876257 Disabling Deep S4
868 12:19:52.876460 Disabling Deep S4
869 12:19:52.879691 Disabling Deep S5
870 12:19:52.879893 Disabling Deep S5
871 12:19:52.882844 PCI: 00:1f.2 [0000/0000] hidden
872 12:19:52.886587 PCI: 00:1f.3 [8086/0000] bus ops
873 12:19:52.889354 PCI: 00:1f.3 [8086/a0c8] enabled
874 12:19:52.892793 PCI: 00:1f.5 [8086/0000] bus ops
875 12:19:52.896401 PCI: 00:1f.5 [8086/a0a4] enabled
876 12:19:52.899371 PCI: Leftover static devices:
877 12:19:52.902922 PCI: 00:10.2
878 12:19:52.903191 PCI: 00:10.6
879 12:19:52.903412 PCI: 00:10.7
880 12:19:52.906363 PCI: 00:06.0
881 12:19:52.906765 PCI: 00:07.1
882 12:19:52.909609 PCI: 00:07.2
883 12:19:52.909912 PCI: 00:07.3
884 12:19:52.910152 PCI: 00:09.0
885 12:19:52.913010 PCI: 00:0d.1
886 12:19:52.913397 PCI: 00:0d.2
887 12:19:52.916383 PCI: 00:0d.3
888 12:19:52.916831 PCI: 00:0e.0
889 12:19:52.919142 PCI: 00:12.0
890 12:19:52.919571 PCI: 00:12.6
891 12:19:52.919901 PCI: 00:13.0
892 12:19:52.922970 PCI: 00:14.1
893 12:19:52.923565 PCI: 00:16.1
894 12:19:52.926338 PCI: 00:16.2
895 12:19:52.926863 PCI: 00:16.3
896 12:19:52.927193 PCI: 00:16.4
897 12:19:52.928934 PCI: 00:16.5
898 12:19:52.929312 PCI: 00:17.0
899 12:19:52.932514 PCI: 00:19.2
900 12:19:52.932934 PCI: 00:1e.1
901 12:19:52.936110 PCI: 00:1f.1
902 12:19:52.936528 PCI: 00:1f.4
903 12:19:52.936866 PCI: 00:1f.6
904 12:19:52.939176 PCI: 00:1f.7
905 12:19:52.942851 PCI: Check your devicetree.cb.
906 12:19:52.945928 PCI: 00:02.0 scanning...
907 12:19:52.948818 scan_generic_bus for PCI: 00:02.0
908 12:19:52.952876 scan_generic_bus for PCI: 00:02.0 done
909 12:19:52.955709 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
910 12:19:52.958760 PCI: 00:04.0 scanning...
911 12:19:52.962270 scan_generic_bus for PCI: 00:04.0
912 12:19:52.966215 GENERIC: 0.0 enabled
913 12:19:52.972046 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
914 12:19:52.976010 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
915 12:19:52.978664 PCI: 00:0d.0 scanning...
916 12:19:52.982228 scan_static_bus for PCI: 00:0d.0
917 12:19:52.982658 USB0 port 0 enabled
918 12:19:52.985959 USB0 port 0 scanning...
919 12:19:52.989065 scan_static_bus for USB0 port 0
920 12:19:52.992172 USB3 port 0 enabled
921 12:19:52.995794 USB3 port 1 enabled
922 12:19:52.996387 USB3 port 2 disabled
923 12:19:52.998785 USB3 port 3 disabled
924 12:19:53.001845 USB3 port 0 scanning...
925 12:19:53.005536 scan_static_bus for USB3 port 0
926 12:19:53.008277 scan_static_bus for USB3 port 0 done
927 12:19:53.011693 scan_bus: bus USB3 port 0 finished in 6 msecs
928 12:19:53.015107 USB3 port 1 scanning...
929 12:19:53.018448 scan_static_bus for USB3 port 1
930 12:19:53.021889 scan_static_bus for USB3 port 1 done
931 12:19:53.025281 scan_bus: bus USB3 port 1 finished in 6 msecs
932 12:19:53.031782 scan_static_bus for USB0 port 0 done
933 12:19:53.035194 scan_bus: bus USB0 port 0 finished in 43 msecs
934 12:19:53.038322 scan_static_bus for PCI: 00:0d.0 done
935 12:19:53.045436 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
936 12:19:53.045973 PCI: 00:14.0 scanning...
937 12:19:53.048248 scan_static_bus for PCI: 00:14.0
938 12:19:53.051278 USB0 port 0 enabled
939 12:19:53.055082 USB0 port 0 scanning...
940 12:19:53.058023 scan_static_bus for USB0 port 0
941 12:19:53.058464 USB2 port 0 disabled
942 12:19:53.061659 USB2 port 1 enabled
943 12:19:53.064858 USB2 port 2 enabled
944 12:19:53.065390 USB2 port 3 disabled
945 12:19:53.068204 USB2 port 4 enabled
946 12:19:53.071215 USB2 port 5 disabled
947 12:19:53.071692 USB2 port 6 disabled
948 12:19:53.075136 USB2 port 7 disabled
949 12:19:53.078208 USB2 port 8 disabled
950 12:19:53.078740 USB2 port 9 disabled
951 12:19:53.081107 USB3 port 0 disabled
952 12:19:53.084826 USB3 port 1 enabled
953 12:19:53.085309 USB3 port 2 disabled
954 12:19:53.087647 USB3 port 3 disabled
955 12:19:53.091610 USB2 port 1 scanning...
956 12:19:53.094729 scan_static_bus for USB2 port 1
957 12:19:53.097795 scan_static_bus for USB2 port 1 done
958 12:19:53.101187 scan_bus: bus USB2 port 1 finished in 6 msecs
959 12:19:53.104207 USB2 port 2 scanning...
960 12:19:53.108308 scan_static_bus for USB2 port 2
961 12:19:53.111101 scan_static_bus for USB2 port 2 done
962 12:19:53.114240 scan_bus: bus USB2 port 2 finished in 6 msecs
963 12:19:53.117609 USB2 port 4 scanning...
964 12:19:53.121183 scan_static_bus for USB2 port 4
965 12:19:53.124440 scan_static_bus for USB2 port 4 done
966 12:19:53.130691 scan_bus: bus USB2 port 4 finished in 6 msecs
967 12:19:53.131125 USB3 port 1 scanning...
968 12:19:53.134243 scan_static_bus for USB3 port 1
969 12:19:53.140999 scan_static_bus for USB3 port 1 done
970 12:19:53.144341 scan_bus: bus USB3 port 1 finished in 6 msecs
971 12:19:53.147881 scan_static_bus for USB0 port 0 done
972 12:19:53.150863 scan_bus: bus USB0 port 0 finished in 93 msecs
973 12:19:53.157497 scan_static_bus for PCI: 00:14.0 done
974 12:19:53.160538 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
975 12:19:53.164156 PCI: 00:14.3 scanning...
976 12:19:53.167220 scan_static_bus for PCI: 00:14.3
977 12:19:53.171219 GENERIC: 0.0 enabled
978 12:19:53.174149 scan_static_bus for PCI: 00:14.3 done
979 12:19:53.177781 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
980 12:19:53.180808 PCI: 00:15.0 scanning...
981 12:19:53.184430 scan_static_bus for PCI: 00:15.0
982 12:19:53.187474 I2C: 00:1a enabled
983 12:19:53.188042 I2C: 00:31 enabled
984 12:19:53.190474 I2C: 00:32 enabled
985 12:19:53.194075 scan_static_bus for PCI: 00:15.0 done
986 12:19:53.196918 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
987 12:19:53.200387 PCI: 00:15.1 scanning...
988 12:19:53.204758 scan_static_bus for PCI: 00:15.1
989 12:19:53.208218 I2C: 00:10 enabled
990 12:19:53.211192 scan_static_bus for PCI: 00:15.1 done
991 12:19:53.215192 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
992 12:19:53.218207 PCI: 00:15.2 scanning...
993 12:19:53.221220 scan_static_bus for PCI: 00:15.2
994 12:19:53.224785 scan_static_bus for PCI: 00:15.2 done
995 12:19:53.231151 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
996 12:19:53.231737 PCI: 00:15.3 scanning...
997 12:19:53.234736 scan_static_bus for PCI: 00:15.3
998 12:19:53.240880 scan_static_bus for PCI: 00:15.3 done
999 12:19:53.244429 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1000 12:19:53.247980 PCI: 00:19.1 scanning...
1001 12:19:53.251161 scan_static_bus for PCI: 00:19.1
1002 12:19:53.251633 I2C: 00:15 enabled
1003 12:19:53.258101 scan_static_bus for PCI: 00:19.1 done
1004 12:19:53.261420 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1005 12:19:53.264095 PCI: 00:1d.0 scanning...
1006 12:19:53.267970 do_pci_scan_bridge for PCI: 00:1d.0
1007 12:19:53.271094 PCI: pci_scan_bus for bus 01
1008 12:19:53.274357 PCI: 01:00.0 [1c5c/174a] enabled
1009 12:19:53.274885 GENERIC: 0.0 enabled
1010 12:19:53.281244 Enabling Common Clock Configuration
1011 12:19:53.284332 L1 Sub-State supported from root port 29
1012 12:19:53.288110 L1 Sub-State Support = 0xf
1013 12:19:53.291411 CommonModeRestoreTime = 0x28
1014 12:19:53.294446 Power On Value = 0x16, Power On Scale = 0x0
1015 12:19:53.294973 ASPM: Enabled L1
1016 12:19:53.300863 PCIe: Max_Payload_Size adjusted to 128
1017 12:19:53.304001 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1018 12:19:53.307586 PCI: 00:1e.2 scanning...
1019 12:19:53.310755 scan_generic_bus for PCI: 00:1e.2
1020 12:19:53.311180 SPI: 00 enabled
1021 12:19:53.317461 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1022 12:19:53.323934 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1023 12:19:53.327027 PCI: 00:1e.3 scanning...
1024 12:19:53.330724 scan_generic_bus for PCI: 00:1e.3
1025 12:19:53.331269 SPI: 00 enabled
1026 12:19:53.337094 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1027 12:19:53.340637 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1028 12:19:53.343550 PCI: 00:1f.0 scanning...
1029 12:19:53.347169 scan_static_bus for PCI: 00:1f.0
1030 12:19:53.350570 PNP: 0c09.0 enabled
1031 12:19:53.354065 PNP: 0c09.0 scanning...
1032 12:19:53.356754 scan_static_bus for PNP: 0c09.0
1033 12:19:53.360095 scan_static_bus for PNP: 0c09.0 done
1034 12:19:53.363499 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1035 12:19:53.366925 scan_static_bus for PCI: 00:1f.0 done
1036 12:19:53.373730 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1037 12:19:53.377255 PCI: 00:1f.2 scanning...
1038 12:19:53.380015 scan_static_bus for PCI: 00:1f.2
1039 12:19:53.380436 GENERIC: 0.0 enabled
1040 12:19:53.383692 GENERIC: 0.0 scanning...
1041 12:19:53.386682 scan_static_bus for GENERIC: 0.0
1042 12:19:53.390386 GENERIC: 0.0 enabled
1043 12:19:53.390839 GENERIC: 1.0 enabled
1044 12:19:53.396754 scan_static_bus for GENERIC: 0.0 done
1045 12:19:53.400266 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1046 12:19:53.403174 scan_static_bus for PCI: 00:1f.2 done
1047 12:19:53.409859 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1048 12:19:53.410339 PCI: 00:1f.3 scanning...
1049 12:19:53.413643 scan_static_bus for PCI: 00:1f.3
1050 12:19:53.419577 scan_static_bus for PCI: 00:1f.3 done
1051 12:19:53.423218 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1052 12:19:53.426386 PCI: 00:1f.5 scanning...
1053 12:19:53.429423 scan_generic_bus for PCI: 00:1f.5
1054 12:19:53.433188 scan_generic_bus for PCI: 00:1f.5 done
1055 12:19:53.439858 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1056 12:19:53.442778 scan_bus: bus DOMAIN: 0000 finished in 718 msecs
1057 12:19:53.446271 scan_static_bus for Root Device done
1058 12:19:53.453150 scan_bus: bus Root Device finished in 737 msecs
1059 12:19:53.453675 done
1060 12:19:53.459275 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1061 12:19:53.462709 Chrome EC: UHEPI supported
1062 12:19:53.469578 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1063 12:19:53.472632 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1064 12:19:53.479528 SPI flash protection: WPSW=0 SRP0=0
1065 12:19:53.482383 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1066 12:19:53.488931 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1067 12:19:53.492581 found VGA at PCI: 00:02.0
1068 12:19:53.495951 Setting up VGA for PCI: 00:02.0
1069 12:19:53.499457 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1070 12:19:53.505821 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1071 12:19:53.506242 Allocating resources...
1072 12:19:53.509282 Reading resources...
1073 12:19:53.512315 Root Device read_resources bus 0 link: 0
1074 12:19:53.519017 DOMAIN: 0000 read_resources bus 0 link: 0
1075 12:19:53.522448 PCI: 00:04.0 read_resources bus 1 link: 0
1076 12:19:53.528896 PCI: 00:04.0 read_resources bus 1 link: 0 done
1077 12:19:53.532243 PCI: 00:0d.0 read_resources bus 0 link: 0
1078 12:19:53.535316 USB0 port 0 read_resources bus 0 link: 0
1079 12:19:53.542913 USB0 port 0 read_resources bus 0 link: 0 done
1080 12:19:53.546019 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1081 12:19:53.552706 PCI: 00:14.0 read_resources bus 0 link: 0
1082 12:19:53.556021 USB0 port 0 read_resources bus 0 link: 0
1083 12:19:53.562213 USB0 port 0 read_resources bus 0 link: 0 done
1084 12:19:53.565884 PCI: 00:14.0 read_resources bus 0 link: 0 done
1085 12:19:53.572401 PCI: 00:14.3 read_resources bus 0 link: 0
1086 12:19:53.576059 PCI: 00:14.3 read_resources bus 0 link: 0 done
1087 12:19:53.582376 PCI: 00:15.0 read_resources bus 0 link: 0
1088 12:19:53.585558 PCI: 00:15.0 read_resources bus 0 link: 0 done
1089 12:19:53.592112 PCI: 00:15.1 read_resources bus 0 link: 0
1090 12:19:53.595746 PCI: 00:15.1 read_resources bus 0 link: 0 done
1091 12:19:53.603230 PCI: 00:19.1 read_resources bus 0 link: 0
1092 12:19:53.606000 PCI: 00:19.1 read_resources bus 0 link: 0 done
1093 12:19:53.613008 PCI: 00:1d.0 read_resources bus 1 link: 0
1094 12:19:53.615913 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1095 12:19:53.622576 PCI: 00:1e.2 read_resources bus 2 link: 0
1096 12:19:53.626400 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1097 12:19:53.632710 PCI: 00:1e.3 read_resources bus 3 link: 0
1098 12:19:53.636127 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1099 12:19:53.642560 PCI: 00:1f.0 read_resources bus 0 link: 0
1100 12:19:53.646285 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1101 12:19:53.652465 PCI: 00:1f.2 read_resources bus 0 link: 0
1102 12:19:53.656182 GENERIC: 0.0 read_resources bus 0 link: 0
1103 12:19:53.662597 GENERIC: 0.0 read_resources bus 0 link: 0 done
1104 12:19:53.665888 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1105 12:19:53.672163 DOMAIN: 0000 read_resources bus 0 link: 0 done
1106 12:19:53.675454 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1107 12:19:53.682122 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1108 12:19:53.685489 Root Device read_resources bus 0 link: 0 done
1109 12:19:53.688802 Done reading resources.
1110 12:19:53.695215 Show resources in subtree (Root Device)...After reading.
1111 12:19:53.698946 Root Device child on link 0 DOMAIN: 0000
1112 12:19:53.701999 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1113 12:19:53.712086 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1114 12:19:53.722029 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1115 12:19:53.725235 PCI: 00:00.0
1116 12:19:53.731844 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1117 12:19:53.741797 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1118 12:19:53.751872 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1119 12:19:53.761896 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1120 12:19:53.771505 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1121 12:19:53.781203 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1122 12:19:53.788073 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1123 12:19:53.798173 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1124 12:19:53.808111 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1125 12:19:53.818093 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1126 12:19:53.828015 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1127 12:19:53.837930 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1128 12:19:53.844924 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1129 12:19:53.854488 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1130 12:19:53.864226 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1131 12:19:53.874617 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1132 12:19:53.884153 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1133 12:19:53.894453 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1134 12:19:53.900673 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1135 12:19:53.910623 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1136 12:19:53.914001 PCI: 00:02.0
1137 12:19:53.924181 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1138 12:19:53.933940 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1139 12:19:53.944274 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1140 12:19:53.947239 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1141 12:19:53.957582 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1142 12:19:53.960320 GENERIC: 0.0
1143 12:19:53.960787 PCI: 00:05.0
1144 12:19:53.971038 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1145 12:19:53.973698 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1146 12:19:53.977263 GENERIC: 0.0
1147 12:19:53.977731 PCI: 00:08.0
1148 12:19:53.987445 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1149 12:19:53.990379 PCI: 00:0a.0
1150 12:19:53.993617 PCI: 00:0d.0 child on link 0 USB0 port 0
1151 12:19:54.003446 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1152 12:19:54.010243 USB0 port 0 child on link 0 USB3 port 0
1153 12:19:54.010671 USB3 port 0
1154 12:19:54.013618 USB3 port 1
1155 12:19:54.014044 USB3 port 2
1156 12:19:54.016545 USB3 port 3
1157 12:19:54.020034 PCI: 00:14.0 child on link 0 USB0 port 0
1158 12:19:54.030026 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1159 12:19:54.033812 USB0 port 0 child on link 0 USB2 port 0
1160 12:19:54.036526 USB2 port 0
1161 12:19:54.040205 USB2 port 1
1162 12:19:54.040648 USB2 port 2
1163 12:19:54.043171 USB2 port 3
1164 12:19:54.043648 USB2 port 4
1165 12:19:54.046763 USB2 port 5
1166 12:19:54.047186 USB2 port 6
1167 12:19:54.049748 USB2 port 7
1168 12:19:54.050171 USB2 port 8
1169 12:19:54.053687 USB2 port 9
1170 12:19:54.054204 USB3 port 0
1171 12:19:54.056701 USB3 port 1
1172 12:19:54.057222 USB3 port 2
1173 12:19:54.059734 USB3 port 3
1174 12:19:54.060255 PCI: 00:14.2
1175 12:19:54.070312 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1176 12:19:54.079705 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1177 12:19:54.086575 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1178 12:19:54.096342 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1179 12:19:54.096863 GENERIC: 0.0
1180 12:19:54.103006 PCI: 00:15.0 child on link 0 I2C: 00:1a
1181 12:19:54.113113 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1182 12:19:54.113624 I2C: 00:1a
1183 12:19:54.116062 I2C: 00:31
1184 12:19:54.116486 I2C: 00:32
1185 12:19:54.119411 PCI: 00:15.1 child on link 0 I2C: 00:10
1186 12:19:54.129385 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 12:19:54.132900 I2C: 00:10
1188 12:19:54.133529 PCI: 00:15.2
1189 12:19:54.142686 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 12:19:54.145707 PCI: 00:15.3
1191 12:19:54.156029 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1192 12:19:54.156543 PCI: 00:16.0
1193 12:19:54.165901 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 12:19:54.169029 PCI: 00:19.0
1195 12:19:54.173025 PCI: 00:19.1 child on link 0 I2C: 00:15
1196 12:19:54.182565 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 12:19:54.185307 I2C: 00:15
1198 12:19:54.189040 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1199 12:19:54.198718 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1200 12:19:54.208827 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1201 12:19:54.215528 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1202 12:19:54.218926 GENERIC: 0.0
1203 12:19:54.219508 PCI: 01:00.0
1204 12:19:54.231894 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1205 12:19:54.238312 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1206 12:19:54.248156 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1207 12:19:54.251786 PCI: 00:1e.0
1208 12:19:54.261562 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1209 12:19:54.265115 PCI: 00:1e.2 child on link 0 SPI: 00
1210 12:19:54.274648 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1211 12:19:54.277704 SPI: 00
1212 12:19:54.280820 PCI: 00:1e.3 child on link 0 SPI: 00
1213 12:19:54.291085 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 12:19:54.291250 SPI: 00
1215 12:19:54.297911 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1216 12:19:54.304637 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1217 12:19:54.307559 PNP: 0c09.0
1218 12:19:54.314205 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1219 12:19:54.321186 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1220 12:19:54.330940 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1221 12:19:54.337620 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1222 12:19:54.344046 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1223 12:19:54.344475 GENERIC: 0.0
1224 12:19:54.347413 GENERIC: 1.0
1225 12:19:54.347835 PCI: 00:1f.3
1226 12:19:54.357519 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1227 12:19:54.367512 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1228 12:19:54.371169 PCI: 00:1f.5
1229 12:19:54.381105 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1230 12:19:54.384060 CPU_CLUSTER: 0 child on link 0 APIC: 00
1231 12:19:54.384624 APIC: 00
1232 12:19:54.387188 APIC: 01
1233 12:19:54.387797 APIC: 03
1234 12:19:54.390834 APIC: 06
1235 12:19:54.391431 APIC: 05
1236 12:19:54.391806 APIC: 04
1237 12:19:54.393769 APIC: 02
1238 12:19:54.394338 APIC: 07
1239 12:19:54.400495 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1240 12:19:54.407115 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1241 12:19:54.413559 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1242 12:19:54.420459 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1243 12:19:54.423463 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1244 12:19:54.426900 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1245 12:19:54.433550 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1246 12:19:54.439705 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1247 12:19:54.446464 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1248 12:19:54.453377 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1249 12:19:54.463175 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1250 12:19:54.466097 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1251 12:19:54.476684 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1252 12:19:54.483465 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1253 12:19:54.490140 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1254 12:19:54.493241 DOMAIN: 0000: Resource ranges:
1255 12:19:54.496233 * Base: 1000, Size: 800, Tag: 100
1256 12:19:54.499585 * Base: 1900, Size: e700, Tag: 100
1257 12:19:54.506480 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1258 12:19:54.512882 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1259 12:19:54.519512 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1260 12:19:54.526056 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1261 12:19:54.535923 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1262 12:19:54.542447 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1263 12:19:54.549329 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1264 12:19:54.559098 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1265 12:19:54.565561 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1266 12:19:54.572449 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1267 12:19:54.582344 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1268 12:19:54.589205 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1269 12:19:54.595782 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1270 12:19:54.605250 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1271 12:19:54.611863 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1272 12:19:54.618685 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1273 12:19:54.628558 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1274 12:19:54.635547 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1275 12:19:54.641696 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1276 12:19:54.651592 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1277 12:19:54.658498 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1278 12:19:54.664653 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1279 12:19:54.674827 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1280 12:19:54.681353 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1281 12:19:54.688492 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1282 12:19:54.691554 DOMAIN: 0000: Resource ranges:
1283 12:19:54.698185 * Base: 7fc00000, Size: 40400000, Tag: 200
1284 12:19:54.701344 * Base: d0000000, Size: 28000000, Tag: 200
1285 12:19:54.705019 * Base: fa000000, Size: 1000000, Tag: 200
1286 12:19:54.711432 * Base: fb001000, Size: 2fff000, Tag: 200
1287 12:19:54.714651 * Base: fe010000, Size: 2e000, Tag: 200
1288 12:19:54.717734 * Base: fe03f000, Size: d41000, Tag: 200
1289 12:19:54.721410 * Base: fed88000, Size: 8000, Tag: 200
1290 12:19:54.727838 * Base: fed93000, Size: d000, Tag: 200
1291 12:19:54.730629 * Base: feda2000, Size: 1e000, Tag: 200
1292 12:19:54.734498 * Base: fede0000, Size: 1220000, Tag: 200
1293 12:19:54.741341 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1294 12:19:54.747429 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1295 12:19:54.754053 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1296 12:19:54.760780 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1297 12:19:54.767099 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1298 12:19:54.773703 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1299 12:19:54.780697 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1300 12:19:54.787457 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1301 12:19:54.794234 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1302 12:19:54.800357 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1303 12:19:54.807222 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1304 12:19:54.814008 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1305 12:19:54.820173 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1306 12:19:54.826818 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1307 12:19:54.833620 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1308 12:19:54.840235 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1309 12:19:54.846628 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1310 12:19:54.853245 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1311 12:19:54.860055 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1312 12:19:54.866757 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1313 12:19:54.872884 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1314 12:19:54.879939 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1315 12:19:54.886445 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1316 12:19:54.892608 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1317 12:19:54.902961 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1318 12:19:54.906114 PCI: 00:1d.0: Resource ranges:
1319 12:19:54.909552 * Base: 7fc00000, Size: 100000, Tag: 200
1320 12:19:54.916295 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1321 12:19:54.922961 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1322 12:19:54.929485 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1323 12:19:54.935665 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1324 12:19:54.946242 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1325 12:19:54.949007 Root Device assign_resources, bus 0 link: 0
1326 12:19:54.952097 DOMAIN: 0000 assign_resources, bus 0 link: 0
1327 12:19:54.962656 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1328 12:19:54.969103 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1329 12:19:54.978942 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1330 12:19:54.985440 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1331 12:19:54.992062 PCI: 00:04.0 assign_resources, bus 1 link: 0
1332 12:19:54.995345 PCI: 00:04.0 assign_resources, bus 1 link: 0
1333 12:19:55.005135 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1334 12:19:55.011863 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1335 12:19:55.021389 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1336 12:19:55.024872 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1337 12:19:55.028449 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1338 12:19:55.038373 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1339 12:19:55.041580 PCI: 00:14.0 assign_resources, bus 0 link: 0
1340 12:19:55.047899 PCI: 00:14.0 assign_resources, bus 0 link: 0
1341 12:19:55.054926 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1342 12:19:55.064474 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1343 12:19:55.071565 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1344 12:19:55.074581 PCI: 00:14.3 assign_resources, bus 0 link: 0
1345 12:19:55.081287 PCI: 00:14.3 assign_resources, bus 0 link: 0
1346 12:19:55.087698 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1347 12:19:55.094338 PCI: 00:15.0 assign_resources, bus 0 link: 0
1348 12:19:55.097300 PCI: 00:15.0 assign_resources, bus 0 link: 0
1349 12:19:55.107478 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1350 12:19:55.110971 PCI: 00:15.1 assign_resources, bus 0 link: 0
1351 12:19:55.113910 PCI: 00:15.1 assign_resources, bus 0 link: 0
1352 12:19:55.124419 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1353 12:19:55.130750 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1354 12:19:55.140618 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1355 12:19:55.147478 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1356 12:19:55.154128 PCI: 00:19.1 assign_resources, bus 0 link: 0
1357 12:19:55.157051 PCI: 00:19.1 assign_resources, bus 0 link: 0
1358 12:19:55.166895 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1359 12:19:55.177383 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1360 12:19:55.183958 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1361 12:19:55.190282 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1362 12:19:55.196737 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1363 12:19:55.207208 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1364 12:19:55.213344 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1365 12:19:55.216421 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1366 12:19:55.226686 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1367 12:19:55.230343 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1368 12:19:55.236848 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1369 12:19:55.243595 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1370 12:19:55.249918 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1371 12:19:55.253396 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1372 12:19:55.256507 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1373 12:19:55.263649 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1374 12:19:55.266732 LPC: Trying to open IO window from 800 size 1ff
1375 12:19:55.277050 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1376 12:19:55.283284 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1377 12:19:55.293419 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1378 12:19:55.296369 DOMAIN: 0000 assign_resources, bus 0 link: 0
1379 12:19:55.302927 Root Device assign_resources, bus 0 link: 0
1380 12:19:55.303505 Done setting resources.
1381 12:19:55.309596 Show resources in subtree (Root Device)...After assigning values.
1382 12:19:55.316106 Root Device child on link 0 DOMAIN: 0000
1383 12:19:55.319543 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1384 12:19:55.329364 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1385 12:19:55.339800 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1386 12:19:55.340381 PCI: 00:00.0
1387 12:19:55.349195 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1388 12:19:55.359690 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1389 12:19:55.369135 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1390 12:19:55.379218 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1391 12:19:55.385807 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1392 12:19:55.395847 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1393 12:19:55.405481 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1394 12:19:55.415721 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1395 12:19:55.425625 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1396 12:19:55.435285 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1397 12:19:55.442094 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1398 12:19:55.451880 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1399 12:19:55.462044 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1400 12:19:55.471884 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1401 12:19:55.481982 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1402 12:19:55.488509 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1403 12:19:55.498812 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1404 12:19:55.508350 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1405 12:19:55.518189 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1406 12:19:55.528388 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1407 12:19:55.531223 PCI: 00:02.0
1408 12:19:55.541622 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1409 12:19:55.551688 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1410 12:19:55.561463 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1411 12:19:55.564244 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1412 12:19:55.574975 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1413 12:19:55.578175 GENERIC: 0.0
1414 12:19:55.578693 PCI: 00:05.0
1415 12:19:55.587928 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1416 12:19:55.594689 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1417 12:19:55.595256 GENERIC: 0.0
1418 12:19:55.598069 PCI: 00:08.0
1419 12:19:55.607901 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1420 12:19:55.608473 PCI: 00:0a.0
1421 12:19:55.614692 PCI: 00:0d.0 child on link 0 USB0 port 0
1422 12:19:55.624189 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1423 12:19:55.627561 USB0 port 0 child on link 0 USB3 port 0
1424 12:19:55.631076 USB3 port 0
1425 12:19:55.631697 USB3 port 1
1426 12:19:55.634004 USB3 port 2
1427 12:19:55.634569 USB3 port 3
1428 12:19:55.640696 PCI: 00:14.0 child on link 0 USB0 port 0
1429 12:19:55.650878 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1430 12:19:55.654407 USB0 port 0 child on link 0 USB2 port 0
1431 12:19:55.657105 USB2 port 0
1432 12:19:55.657570 USB2 port 1
1433 12:19:55.660835 USB2 port 2
1434 12:19:55.661399 USB2 port 3
1435 12:19:55.664043 USB2 port 4
1436 12:19:55.664463 USB2 port 5
1437 12:19:55.666941 USB2 port 6
1438 12:19:55.670417 USB2 port 7
1439 12:19:55.670951 USB2 port 8
1440 12:19:55.674238 USB2 port 9
1441 12:19:55.674764 USB3 port 0
1442 12:19:55.677371 USB3 port 1
1443 12:19:55.677795 USB3 port 2
1444 12:19:55.680661 USB3 port 3
1445 12:19:55.681181 PCI: 00:14.2
1446 12:19:55.690459 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1447 12:19:55.700049 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1448 12:19:55.707476 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1449 12:19:55.717037 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1450 12:19:55.717594 GENERIC: 0.0
1451 12:19:55.723955 PCI: 00:15.0 child on link 0 I2C: 00:1a
1452 12:19:55.733329 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1453 12:19:55.733889 I2C: 00:1a
1454 12:19:55.737142 I2C: 00:31
1455 12:19:55.737704 I2C: 00:32
1456 12:19:55.743653 PCI: 00:15.1 child on link 0 I2C: 00:10
1457 12:19:55.753473 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1458 12:19:55.754049 I2C: 00:10
1459 12:19:55.756972 PCI: 00:15.2
1460 12:19:55.766863 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1461 12:19:55.767287 PCI: 00:15.3
1462 12:19:55.776712 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1463 12:19:55.779965 PCI: 00:16.0
1464 12:19:55.789508 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1465 12:19:55.793440 PCI: 00:19.0
1466 12:19:55.796315 PCI: 00:19.1 child on link 0 I2C: 00:15
1467 12:19:55.806358 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1468 12:19:55.806872 I2C: 00:15
1469 12:19:55.812934 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1470 12:19:55.823069 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1471 12:19:55.832598 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1472 12:19:55.842960 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1473 12:19:55.845914 GENERIC: 0.0
1474 12:19:55.846373 PCI: 01:00.0
1475 12:19:55.858935 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1476 12:19:55.869128 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1477 12:19:55.879203 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1478 12:19:55.879817 PCI: 00:1e.0
1479 12:19:55.892353 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1480 12:19:55.895411 PCI: 00:1e.2 child on link 0 SPI: 00
1481 12:19:55.905425 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1482 12:19:55.905957 SPI: 00
1483 12:19:55.912076 PCI: 00:1e.3 child on link 0 SPI: 00
1484 12:19:55.921911 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1485 12:19:55.922425 SPI: 00
1486 12:19:55.928982 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1487 12:19:55.935280 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1488 12:19:55.938873 PNP: 0c09.0
1489 12:19:55.945198 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1490 12:19:55.952274 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1491 12:19:55.961914 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1492 12:19:55.968447 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1493 12:19:55.975447 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1494 12:19:55.975964 GENERIC: 0.0
1495 12:19:55.978425 GENERIC: 1.0
1496 12:19:55.978945 PCI: 00:1f.3
1497 12:19:55.988292 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1498 12:19:56.001355 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1499 12:19:56.001881 PCI: 00:1f.5
1500 12:19:56.011406 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1501 12:19:56.018074 CPU_CLUSTER: 0 child on link 0 APIC: 00
1502 12:19:56.018579 APIC: 00
1503 12:19:56.018913 APIC: 01
1504 12:19:56.021167 APIC: 03
1505 12:19:56.021584 APIC: 06
1506 12:19:56.021916 APIC: 05
1507 12:19:56.024539 APIC: 04
1508 12:19:56.025055 APIC: 02
1509 12:19:56.028011 APIC: 07
1510 12:19:56.028428 Done allocating resources.
1511 12:19:56.034543 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1512 12:19:56.041137 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1513 12:19:56.044465 Configure GPIOs for I2S audio on UP4.
1514 12:19:56.051755 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1515 12:19:56.054972 Enabling resources...
1516 12:19:56.058343 PCI: 00:00.0 subsystem <- 8086/9a12
1517 12:19:56.061911 PCI: 00:00.0 cmd <- 06
1518 12:19:56.065071 PCI: 00:02.0 subsystem <- 8086/9a40
1519 12:19:56.068392 PCI: 00:02.0 cmd <- 03
1520 12:19:56.071438 PCI: 00:04.0 subsystem <- 8086/9a03
1521 12:19:56.074842 PCI: 00:04.0 cmd <- 02
1522 12:19:56.078544 PCI: 00:05.0 subsystem <- 8086/9a19
1523 12:19:56.079067 PCI: 00:05.0 cmd <- 02
1524 12:19:56.085382 PCI: 00:08.0 subsystem <- 8086/9a11
1525 12:19:56.085903 PCI: 00:08.0 cmd <- 06
1526 12:19:56.088157 PCI: 00:0d.0 subsystem <- 8086/9a13
1527 12:19:56.091586 PCI: 00:0d.0 cmd <- 02
1528 12:19:56.094545 PCI: 00:14.0 subsystem <- 8086/a0ed
1529 12:19:56.097993 PCI: 00:14.0 cmd <- 02
1530 12:19:56.101152 PCI: 00:14.2 subsystem <- 8086/a0ef
1531 12:19:56.104571 PCI: 00:14.2 cmd <- 02
1532 12:19:56.108076 PCI: 00:14.3 subsystem <- 8086/a0f0
1533 12:19:56.111382 PCI: 00:14.3 cmd <- 02
1534 12:19:56.114626 PCI: 00:15.0 subsystem <- 8086/a0e8
1535 12:19:56.117665 PCI: 00:15.0 cmd <- 02
1536 12:19:56.120788 PCI: 00:15.1 subsystem <- 8086/a0e9
1537 12:19:56.124559 PCI: 00:15.1 cmd <- 02
1538 12:19:56.127625 PCI: 00:15.2 subsystem <- 8086/a0ea
1539 12:19:56.128143 PCI: 00:15.2 cmd <- 02
1540 12:19:56.134226 PCI: 00:15.3 subsystem <- 8086/a0eb
1541 12:19:56.134649 PCI: 00:15.3 cmd <- 02
1542 12:19:56.138240 PCI: 00:16.0 subsystem <- 8086/a0e0
1543 12:19:56.140960 PCI: 00:16.0 cmd <- 02
1544 12:19:56.144826 PCI: 00:19.1 subsystem <- 8086/a0c6
1545 12:19:56.147641 PCI: 00:19.1 cmd <- 02
1546 12:19:56.151386 PCI: 00:1d.0 bridge ctrl <- 0013
1547 12:19:56.154703 PCI: 00:1d.0 subsystem <- 8086/a0b0
1548 12:19:56.157529 PCI: 00:1d.0 cmd <- 06
1549 12:19:56.161294 PCI: 00:1e.0 subsystem <- 8086/a0a8
1550 12:19:56.164204 PCI: 00:1e.0 cmd <- 06
1551 12:19:56.167784 PCI: 00:1e.2 subsystem <- 8086/a0aa
1552 12:19:56.170784 PCI: 00:1e.2 cmd <- 06
1553 12:19:56.174153 PCI: 00:1e.3 subsystem <- 8086/a0ab
1554 12:19:56.177748 PCI: 00:1e.3 cmd <- 02
1555 12:19:56.180827 PCI: 00:1f.0 subsystem <- 8086/a087
1556 12:19:56.181351 PCI: 00:1f.0 cmd <- 407
1557 12:19:56.187595 PCI: 00:1f.3 subsystem <- 8086/a0c8
1558 12:19:56.188111 PCI: 00:1f.3 cmd <- 02
1559 12:19:56.191280 PCI: 00:1f.5 subsystem <- 8086/a0a4
1560 12:19:56.194240 PCI: 00:1f.5 cmd <- 406
1561 12:19:56.199285 PCI: 01:00.0 cmd <- 02
1562 12:19:56.203423 done.
1563 12:19:56.206940 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1564 12:19:56.210379 Initializing devices...
1565 12:19:56.213727 Root Device init
1566 12:19:56.216686 Chrome EC: Set SMI mask to 0x0000000000000000
1567 12:19:56.223478 Chrome EC: clear events_b mask to 0x0000000000000000
1568 12:19:56.230041 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1569 12:19:56.233543 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1570 12:19:56.240429 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1571 12:19:56.246736 Chrome EC: Set WAKE mask to 0x0000000000000000
1572 12:19:56.250350 fw_config match found: DB_USB=USB3_ACTIVE
1573 12:19:56.256708 Configure Right Type-C port orientation for retimer
1574 12:19:56.259922 Root Device init finished in 44 msecs
1575 12:19:56.263220 PCI: 00:00.0 init
1576 12:19:56.266819 CPU TDP = 9 Watts
1577 12:19:56.267232 CPU PL1 = 9 Watts
1578 12:19:56.269943 CPU PL2 = 40 Watts
1579 12:19:56.273311 CPU PL4 = 83 Watts
1580 12:19:56.276620 PCI: 00:00.0 init finished in 8 msecs
1581 12:19:56.277146 PCI: 00:02.0 init
1582 12:19:56.279781 GMA: Found VBT in CBFS
1583 12:19:56.283426 GMA: Found valid VBT in CBFS
1584 12:19:56.290043 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1585 12:19:56.296520 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1586 12:19:56.299510 PCI: 00:02.0 init finished in 18 msecs
1587 12:19:56.302942 PCI: 00:05.0 init
1588 12:19:56.306118 PCI: 00:05.0 init finished in 0 msecs
1589 12:19:56.309742 PCI: 00:08.0 init
1590 12:19:56.312751 PCI: 00:08.0 init finished in 0 msecs
1591 12:19:56.316145 PCI: 00:14.0 init
1592 12:19:56.319607 PCI: 00:14.0 init finished in 0 msecs
1593 12:19:56.322458 PCI: 00:14.2 init
1594 12:19:56.325742 PCI: 00:14.2 init finished in 0 msecs
1595 12:19:56.329252 PCI: 00:15.0 init
1596 12:19:56.332510 I2C bus 0 version 0x3230302a
1597 12:19:56.335795 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1598 12:19:56.339327 PCI: 00:15.0 init finished in 6 msecs
1599 12:19:56.339799 PCI: 00:15.1 init
1600 12:19:56.342660 I2C bus 1 version 0x3230302a
1601 12:19:56.346353 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1602 12:19:56.352320 PCI: 00:15.1 init finished in 6 msecs
1603 12:19:56.352843 PCI: 00:15.2 init
1604 12:19:56.355874 I2C bus 2 version 0x3230302a
1605 12:19:56.359316 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1606 12:19:56.362359 PCI: 00:15.2 init finished in 6 msecs
1607 12:19:56.365975 PCI: 00:15.3 init
1608 12:19:56.368943 I2C bus 3 version 0x3230302a
1609 12:19:56.372728 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1610 12:19:56.375679 PCI: 00:15.3 init finished in 6 msecs
1611 12:19:56.379317 PCI: 00:16.0 init
1612 12:19:56.382344 PCI: 00:16.0 init finished in 0 msecs
1613 12:19:56.386287 PCI: 00:19.1 init
1614 12:19:56.389191 I2C bus 5 version 0x3230302a
1615 12:19:56.392627 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1616 12:19:56.395563 PCI: 00:19.1 init finished in 6 msecs
1617 12:19:56.399143 PCI: 00:1d.0 init
1618 12:19:56.402132 Initializing PCH PCIe bridge.
1619 12:19:56.405703 PCI: 00:1d.0 init finished in 3 msecs
1620 12:19:56.408874 PCI: 00:1f.0 init
1621 12:19:56.412414 IOAPIC: Initializing IOAPIC at 0xfec00000
1622 12:19:56.415391 IOAPIC: Bootstrap Processor Local APIC = 0x00
1623 12:19:56.418840 IOAPIC: ID = 0x02
1624 12:19:56.422630 IOAPIC: Dumping registers
1625 12:19:56.423155 reg 0x0000: 0x02000000
1626 12:19:56.425510 reg 0x0001: 0x00770020
1627 12:19:56.428870 reg 0x0002: 0x00000000
1628 12:19:56.431934 PCI: 00:1f.0 init finished in 21 msecs
1629 12:19:56.435251 PCI: 00:1f.2 init
1630 12:19:56.438809 Disabling ACPI via APMC.
1631 12:19:56.439235 APMC done.
1632 12:19:56.445060 PCI: 00:1f.2 init finished in 5 msecs
1633 12:19:56.455790 PCI: 01:00.0 init
1634 12:19:56.458866 PCI: 01:00.0 init finished in 0 msecs
1635 12:19:56.462460 PNP: 0c09.0 init
1636 12:19:56.465923 Google Chrome EC uptime: 8.394 seconds
1637 12:19:56.472145 Google Chrome AP resets since EC boot: 1
1638 12:19:56.475646 Google Chrome most recent AP reset causes:
1639 12:19:56.479538 0.347: 32775 shutdown: entering G3
1640 12:19:56.485616 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1641 12:19:56.489169 PNP: 0c09.0 init finished in 22 msecs
1642 12:19:56.494664 Devices initialized
1643 12:19:56.498263 Show all devs... After init.
1644 12:19:56.501304 Root Device: enabled 1
1645 12:19:56.501727 DOMAIN: 0000: enabled 1
1646 12:19:56.504670 CPU_CLUSTER: 0: enabled 1
1647 12:19:56.507808 PCI: 00:00.0: enabled 1
1648 12:19:56.511441 PCI: 00:02.0: enabled 1
1649 12:19:56.511961 PCI: 00:04.0: enabled 1
1650 12:19:56.514422 PCI: 00:05.0: enabled 1
1651 12:19:56.518124 PCI: 00:06.0: enabled 0
1652 12:19:56.521086 PCI: 00:07.0: enabled 0
1653 12:19:56.521528 PCI: 00:07.1: enabled 0
1654 12:19:56.524597 PCI: 00:07.2: enabled 0
1655 12:19:56.528070 PCI: 00:07.3: enabled 0
1656 12:19:56.531103 PCI: 00:08.0: enabled 1
1657 12:19:56.531566 PCI: 00:09.0: enabled 0
1658 12:19:56.534703 PCI: 00:0a.0: enabled 0
1659 12:19:56.537604 PCI: 00:0d.0: enabled 1
1660 12:19:56.541217 PCI: 00:0d.1: enabled 0
1661 12:19:56.541640 PCI: 00:0d.2: enabled 0
1662 12:19:56.544329 PCI: 00:0d.3: enabled 0
1663 12:19:56.547811 PCI: 00:0e.0: enabled 0
1664 12:19:56.548234 PCI: 00:10.2: enabled 1
1665 12:19:56.551150 PCI: 00:10.6: enabled 0
1666 12:19:56.554060 PCI: 00:10.7: enabled 0
1667 12:19:56.557500 PCI: 00:12.0: enabled 0
1668 12:19:56.557954 PCI: 00:12.6: enabled 0
1669 12:19:56.561112 PCI: 00:13.0: enabled 0
1670 12:19:56.564191 PCI: 00:14.0: enabled 1
1671 12:19:56.567649 PCI: 00:14.1: enabled 0
1672 12:19:56.568231 PCI: 00:14.2: enabled 1
1673 12:19:56.570758 PCI: 00:14.3: enabled 1
1674 12:19:56.574684 PCI: 00:15.0: enabled 1
1675 12:19:56.577573 PCI: 00:15.1: enabled 1
1676 12:19:56.578113 PCI: 00:15.2: enabled 1
1677 12:19:56.580901 PCI: 00:15.3: enabled 1
1678 12:19:56.583983 PCI: 00:16.0: enabled 1
1679 12:19:56.587865 PCI: 00:16.1: enabled 0
1680 12:19:56.588385 PCI: 00:16.2: enabled 0
1681 12:19:56.590826 PCI: 00:16.3: enabled 0
1682 12:19:56.594470 PCI: 00:16.4: enabled 0
1683 12:19:56.594992 PCI: 00:16.5: enabled 0
1684 12:19:56.597526 PCI: 00:17.0: enabled 0
1685 12:19:56.601238 PCI: 00:19.0: enabled 0
1686 12:19:56.603987 PCI: 00:19.1: enabled 1
1687 12:19:56.604410 PCI: 00:19.2: enabled 0
1688 12:19:56.607976 PCI: 00:1c.0: enabled 1
1689 12:19:56.610837 PCI: 00:1c.1: enabled 0
1690 12:19:56.613858 PCI: 00:1c.2: enabled 0
1691 12:19:56.614377 PCI: 00:1c.3: enabled 0
1692 12:19:56.617520 PCI: 00:1c.4: enabled 0
1693 12:19:56.620644 PCI: 00:1c.5: enabled 0
1694 12:19:56.624062 PCI: 00:1c.6: enabled 1
1695 12:19:56.624487 PCI: 00:1c.7: enabled 0
1696 12:19:56.627285 PCI: 00:1d.0: enabled 1
1697 12:19:56.630912 PCI: 00:1d.1: enabled 0
1698 12:19:56.633742 PCI: 00:1d.2: enabled 1
1699 12:19:56.634166 PCI: 00:1d.3: enabled 0
1700 12:19:56.637193 PCI: 00:1e.0: enabled 1
1701 12:19:56.640246 PCI: 00:1e.1: enabled 0
1702 12:19:56.640666 PCI: 00:1e.2: enabled 1
1703 12:19:56.644054 PCI: 00:1e.3: enabled 1
1704 12:19:56.647236 PCI: 00:1f.0: enabled 1
1705 12:19:56.650041 PCI: 00:1f.1: enabled 0
1706 12:19:56.650465 PCI: 00:1f.2: enabled 1
1707 12:19:56.653875 PCI: 00:1f.3: enabled 1
1708 12:19:56.657015 PCI: 00:1f.4: enabled 0
1709 12:19:56.660369 PCI: 00:1f.5: enabled 1
1710 12:19:56.660852 PCI: 00:1f.6: enabled 0
1711 12:19:56.663909 PCI: 00:1f.7: enabled 0
1712 12:19:56.666659 APIC: 00: enabled 1
1713 12:19:56.667081 GENERIC: 0.0: enabled 1
1714 12:19:56.670092 GENERIC: 0.0: enabled 1
1715 12:19:56.673609 GENERIC: 1.0: enabled 1
1716 12:19:56.677243 GENERIC: 0.0: enabled 1
1717 12:19:56.677667 GENERIC: 1.0: enabled 1
1718 12:19:56.680349 USB0 port 0: enabled 1
1719 12:19:56.683277 GENERIC: 0.0: enabled 1
1720 12:19:56.686774 USB0 port 0: enabled 1
1721 12:19:56.687199 GENERIC: 0.0: enabled 1
1722 12:19:56.689953 I2C: 00:1a: enabled 1
1723 12:19:56.693529 I2C: 00:31: enabled 1
1724 12:19:56.693955 I2C: 00:32: enabled 1
1725 12:19:56.696446 I2C: 00:10: enabled 1
1726 12:19:56.700250 I2C: 00:15: enabled 1
1727 12:19:56.700674 GENERIC: 0.0: enabled 0
1728 12:19:56.703395 GENERIC: 1.0: enabled 0
1729 12:19:56.706392 GENERIC: 0.0: enabled 1
1730 12:19:56.710187 SPI: 00: enabled 1
1731 12:19:56.710722 SPI: 00: enabled 1
1732 12:19:56.713836 PNP: 0c09.0: enabled 1
1733 12:19:56.716498 GENERIC: 0.0: enabled 1
1734 12:19:56.716885 USB3 port 0: enabled 1
1735 12:19:56.720167 USB3 port 1: enabled 1
1736 12:19:56.723367 USB3 port 2: enabled 0
1737 12:19:56.723801 USB3 port 3: enabled 0
1738 12:19:56.726338 USB2 port 0: enabled 0
1739 12:19:56.730298 USB2 port 1: enabled 1
1740 12:19:56.733379 USB2 port 2: enabled 1
1741 12:19:56.733903 USB2 port 3: enabled 0
1742 12:19:56.736590 USB2 port 4: enabled 1
1743 12:19:56.740016 USB2 port 5: enabled 0
1744 12:19:56.740447 USB2 port 6: enabled 0
1745 12:19:56.743107 USB2 port 7: enabled 0
1746 12:19:56.746242 USB2 port 8: enabled 0
1747 12:19:56.746675 USB2 port 9: enabled 0
1748 12:19:56.750193 USB3 port 0: enabled 0
1749 12:19:56.752982 USB3 port 1: enabled 1
1750 12:19:56.756015 USB3 port 2: enabled 0
1751 12:19:56.756447 USB3 port 3: enabled 0
1752 12:19:56.759612 GENERIC: 0.0: enabled 1
1753 12:19:56.763014 GENERIC: 1.0: enabled 1
1754 12:19:56.763478 APIC: 01: enabled 1
1755 12:19:56.765965 APIC: 03: enabled 1
1756 12:19:56.769398 APIC: 06: enabled 1
1757 12:19:56.769832 APIC: 05: enabled 1
1758 12:19:56.772861 APIC: 04: enabled 1
1759 12:19:56.773298 APIC: 02: enabled 1
1760 12:19:56.776317 APIC: 07: enabled 1
1761 12:19:56.779746 PCI: 01:00.0: enabled 1
1762 12:19:56.785604 BS: BS_DEV_INIT run times (exec / console): 31 / 540 ms
1763 12:19:56.789007 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1764 12:19:56.792468 ELOG: NV offset 0xf30000 size 0x1000
1765 12:19:56.799666 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1766 12:19:56.806317 ELOG: Event(17) added with size 13 at 2023-06-14 12:19:56 UTC
1767 12:19:56.812810 ELOG: Event(92) added with size 9 at 2023-06-14 12:19:56 UTC
1768 12:19:56.818979 ELOG: Event(93) added with size 9 at 2023-06-14 12:19:56 UTC
1769 12:19:56.825885 ELOG: Event(9E) added with size 10 at 2023-06-14 12:19:56 UTC
1770 12:19:56.832800 ELOG: Event(9F) added with size 14 at 2023-06-14 12:19:56 UTC
1771 12:19:56.839270 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1772 12:19:56.845629 ELOG: Event(A1) added with size 10 at 2023-06-14 12:19:56 UTC
1773 12:19:56.848815 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1774 12:19:56.855433 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1775 12:19:56.859194 Finalize devices...
1776 12:19:56.859547 Devices finalized
1777 12:19:56.865595 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1778 12:19:56.872035 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1779 12:19:56.875902 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1780 12:19:56.882217 ME: HFSTS1 : 0x80030055
1781 12:19:56.885513 ME: HFSTS2 : 0x30280116
1782 12:19:56.891985 ME: HFSTS3 : 0x00000050
1783 12:19:56.895440 ME: HFSTS4 : 0x00004000
1784 12:19:56.899028 ME: HFSTS5 : 0x00000000
1785 12:19:56.905764 ME: HFSTS6 : 0x00400006
1786 12:19:56.908579 ME: Manufacturing Mode : YES
1787 12:19:56.912105 ME: SPI Protection Mode Enabled : NO
1788 12:19:56.915466 ME: FW Partition Table : OK
1789 12:19:56.918825 ME: Bringup Loader Failure : NO
1790 12:19:56.921789 ME: Firmware Init Complete : NO
1791 12:19:56.925052 ME: Boot Options Present : NO
1792 12:19:56.928621 ME: Update In Progress : NO
1793 12:19:57.028213 ME: D0i3 Support : YES
1794 12:19:57.028777 ME: Low Power State Enabled : NO
1795 12:19:57.029148 ME: CPU Replaced : YES
1796 12:19:57.029494 ME: CPU Replacement Valid : YES
1797 12:19:57.029820 ME: Current Working State : 5
1798 12:19:57.030141 ME: Current Operation State : 1
1799 12:19:57.030464 ME: Current Operation Mode : 3
1800 12:19:57.030814 ME: Error Code : 0
1801 12:19:57.031130 ME: Enhanced Debug Mode : NO
1802 12:19:57.031491 ME: CPU Debug Disabled : YES
1803 12:19:57.031811 ME: TXT Support : NO
1804 12:19:57.032119 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1805 12:19:57.032430 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1806 12:19:57.032746 CBFS: 'fallback/slic' not found.
1807 12:19:57.033052 ACPI: Writing ACPI tables at 76b01000.
1808 12:19:57.033355 ACPI: * FACS
1809 12:19:57.033654 ACPI: * DSDT
1810 12:19:57.033955 Ramoops buffer: 0x100000@0x76a00000.
1811 12:19:57.034289 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1812 12:19:57.034615 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1813 12:19:57.034925 Google Chrome EC: version:
1814 12:19:57.035200 ro: voema_v2.0.7540-147f8d37d1
1815 12:19:57.035529 rw: voema_v2.0.7540-147f8d37d1
1816 12:19:57.035810 running image: 2
1817 12:19:57.036086 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1818 12:19:57.036690 ACPI: * FADT
1819 12:19:57.037009 SCI is IRQ9
1820 12:19:57.037328 ACPI: added table 1/32, length now 40
1821 12:19:57.037671 ACPI: * SSDT
1822 12:19:57.041253 Found 1 CPU(s) with 8 core(s) each.
1823 12:19:57.047387 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1824 12:19:57.051060 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1825 12:19:57.054608 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1826 12:19:57.057786 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1827 12:19:57.064344 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1828 12:19:57.071377 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1829 12:19:57.074303 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1830 12:19:57.080849 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1831 12:19:57.087651 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1832 12:19:57.091168 \_SB.PCI0.RP09: Added StorageD3Enable property
1833 12:19:57.093745 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1834 12:19:57.100577 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1835 12:19:57.107532 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1836 12:19:57.110857 PS2K: Passing 80 keymaps to kernel
1837 12:19:57.117335 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1838 12:19:57.124034 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1839 12:19:57.130206 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1840 12:19:57.136798 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1841 12:19:57.143924 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1842 12:19:57.150147 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1843 12:19:57.156761 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1844 12:19:57.163468 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1845 12:19:57.166380 ACPI: added table 2/32, length now 44
1846 12:19:57.166941 ACPI: * MCFG
1847 12:19:57.170181 ACPI: added table 3/32, length now 48
1848 12:19:57.173173 ACPI: * TPM2
1849 12:19:57.176855 TPM2 log created at 0x769f0000
1850 12:19:57.179953 ACPI: added table 4/32, length now 52
1851 12:19:57.183491 ACPI: * MADT
1852 12:19:57.183912 SCI is IRQ9
1853 12:19:57.186670 ACPI: added table 5/32, length now 56
1854 12:19:57.190044 current = 76b09850
1855 12:19:57.190565 ACPI: * DMAR
1856 12:19:57.193519 ACPI: added table 6/32, length now 60
1857 12:19:57.196234 ACPI: added table 7/32, length now 64
1858 12:19:57.199772 ACPI: * HPET
1859 12:19:57.203133 ACPI: added table 8/32, length now 68
1860 12:19:57.203603 ACPI: done.
1861 12:19:57.206478 ACPI tables: 35216 bytes.
1862 12:19:57.209807 smbios_write_tables: 769ef000
1863 12:19:57.212856 EC returned error result code 3
1864 12:19:57.216242 Couldn't obtain OEM name from CBI
1865 12:19:57.219547 Create SMBIOS type 16
1866 12:19:57.222821 Create SMBIOS type 17
1867 12:19:57.226362 GENERIC: 0.0 (WIFI Device)
1868 12:19:57.229259 SMBIOS tables: 1750 bytes.
1869 12:19:57.233183 Writing table forward entry at 0x00000500
1870 12:19:57.239031 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1871 12:19:57.242737 Writing coreboot table at 0x76b25000
1872 12:19:57.249313 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1873 12:19:57.252429 1. 0000000000001000-000000000009ffff: RAM
1874 12:19:57.255604 2. 00000000000a0000-00000000000fffff: RESERVED
1875 12:19:57.263074 3. 0000000000100000-00000000769eefff: RAM
1876 12:19:57.266016 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1877 12:19:57.272656 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1878 12:19:57.279507 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1879 12:19:57.282496 7. 0000000077000000-000000007fbfffff: RESERVED
1880 12:19:57.289066 8. 00000000c0000000-00000000cfffffff: RESERVED
1881 12:19:57.292751 9. 00000000f8000000-00000000f9ffffff: RESERVED
1882 12:19:57.296106 10. 00000000fb000000-00000000fb000fff: RESERVED
1883 12:19:57.302617 11. 00000000fe000000-00000000fe00ffff: RESERVED
1884 12:19:57.305629 12. 00000000fed80000-00000000fed87fff: RESERVED
1885 12:19:57.312545 13. 00000000fed90000-00000000fed92fff: RESERVED
1886 12:19:57.315887 14. 00000000feda0000-00000000feda1fff: RESERVED
1887 12:19:57.322173 15. 00000000fedc0000-00000000feddffff: RESERVED
1888 12:19:57.325577 16. 0000000100000000-00000002803fffff: RAM
1889 12:19:57.328965 Passing 4 GPIOs to payload:
1890 12:19:57.332492 NAME | PORT | POLARITY | VALUE
1891 12:19:57.338706 lid | undefined | high | high
1892 12:19:57.345350 power | undefined | high | low
1893 12:19:57.349174 oprom | undefined | high | low
1894 12:19:57.355877 EC in RW | 0x000000e5 | high | high
1895 12:19:57.362376 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 77cf
1896 12:19:57.365404 coreboot table: 1576 bytes.
1897 12:19:57.368885 IMD ROOT 0. 0x76fff000 0x00001000
1898 12:19:57.371850 IMD SMALL 1. 0x76ffe000 0x00001000
1899 12:19:57.375494 FSP MEMORY 2. 0x76c4e000 0x003b0000
1900 12:19:57.378931 VPD 3. 0x76c4d000 0x00000367
1901 12:19:57.382243 RO MCACHE 4. 0x76c4c000 0x00000fdc
1902 12:19:57.385542 CONSOLE 5. 0x76c2c000 0x00020000
1903 12:19:57.388594 FMAP 6. 0x76c2b000 0x00000578
1904 12:19:57.395222 TIME STAMP 7. 0x76c2a000 0x00000910
1905 12:19:57.398234 VBOOT WORK 8. 0x76c16000 0x00014000
1906 12:19:57.401966 ROMSTG STCK 9. 0x76c15000 0x00001000
1907 12:19:57.404924 AFTER CAR 10. 0x76c0a000 0x0000b000
1908 12:19:57.408466 RAMSTAGE 11. 0x76b97000 0x00073000
1909 12:19:57.411761 REFCODE 12. 0x76b42000 0x00055000
1910 12:19:57.414720 SMM BACKUP 13. 0x76b32000 0x00010000
1911 12:19:57.418097 4f444749 14. 0x76b30000 0x00002000
1912 12:19:57.421860 EXT VBT15. 0x76b2d000 0x0000219f
1913 12:19:57.428130 COREBOOT 16. 0x76b25000 0x00008000
1914 12:19:57.431803 ACPI 17. 0x76b01000 0x00024000
1915 12:19:57.434444 ACPI GNVS 18. 0x76b00000 0x00001000
1916 12:19:57.437745 RAMOOPS 19. 0x76a00000 0x00100000
1917 12:19:57.440963 TPM2 TCGLOG20. 0x769f0000 0x00010000
1918 12:19:57.444428 SMBIOS 21. 0x769ef000 0x00000800
1919 12:19:57.448110 IMD small region:
1920 12:19:57.451207 IMD ROOT 0. 0x76ffec00 0x00000400
1921 12:19:57.454874 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1922 12:19:57.457955 POWER STATE 2. 0x76ffeb80 0x00000044
1923 12:19:57.464754 ROMSTAGE 3. 0x76ffeb60 0x00000004
1924 12:19:57.467515 MEM INFO 4. 0x76ffe980 0x000001e0
1925 12:19:57.474400 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1926 12:19:57.474933 MTRR: Physical address space:
1927 12:19:57.481046 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1928 12:19:57.487902 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1929 12:19:57.494577 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1930 12:19:57.501084 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1931 12:19:57.507706 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1932 12:19:57.514637 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1933 12:19:57.521237 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1934 12:19:57.524162 MTRR: Fixed MSR 0x250 0x0606060606060606
1935 12:19:57.527720 MTRR: Fixed MSR 0x258 0x0606060606060606
1936 12:19:57.530715 MTRR: Fixed MSR 0x259 0x0000000000000000
1937 12:19:57.537682 MTRR: Fixed MSR 0x268 0x0606060606060606
1938 12:19:57.540482 MTRR: Fixed MSR 0x269 0x0606060606060606
1939 12:19:57.543774 MTRR: Fixed MSR 0x26a 0x0606060606060606
1940 12:19:57.547086 MTRR: Fixed MSR 0x26b 0x0606060606060606
1941 12:19:57.553547 MTRR: Fixed MSR 0x26c 0x0606060606060606
1942 12:19:57.557094 MTRR: Fixed MSR 0x26d 0x0606060606060606
1943 12:19:57.560459 MTRR: Fixed MSR 0x26e 0x0606060606060606
1944 12:19:57.563520 MTRR: Fixed MSR 0x26f 0x0606060606060606
1945 12:19:57.567946 call enable_fixed_mtrr()
1946 12:19:57.571260 CPU physical address size: 39 bits
1947 12:19:57.578160 MTRR: default type WB/UC MTRR counts: 6/6.
1948 12:19:57.581021 MTRR: UC selected as default type.
1949 12:19:57.587593 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1950 12:19:57.591339 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1951 12:19:57.598011 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1952 12:19:57.604578 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1953 12:19:57.611267 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1954 12:19:57.617396 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1955 12:19:57.617981
1956 12:19:57.620846 MTRR check
1957 12:19:57.624250 Fixed MTRRs : Enabled
1958 12:19:57.624821 Variable MTRRs: Enabled
1959 12:19:57.625193
1960 12:19:57.630761 MTRR: Fixed MSR 0x250 0x0606060606060606
1961 12:19:57.634504 MTRR: Fixed MSR 0x258 0x0606060606060606
1962 12:19:57.637300 MTRR: Fixed MSR 0x259 0x0000000000000000
1963 12:19:57.640651 MTRR: Fixed MSR 0x268 0x0606060606060606
1964 12:19:57.647672 MTRR: Fixed MSR 0x269 0x0606060606060606
1965 12:19:57.650640 MTRR: Fixed MSR 0x26a 0x0606060606060606
1966 12:19:57.653921 MTRR: Fixed MSR 0x26b 0x0606060606060606
1967 12:19:57.657497 MTRR: Fixed MSR 0x26c 0x0606060606060606
1968 12:19:57.660448 MTRR: Fixed MSR 0x26d 0x0606060606060606
1969 12:19:57.667457 MTRR: Fixed MSR 0x26e 0x0606060606060606
1970 12:19:57.670207 MTRR: Fixed MSR 0x26f 0x0606060606060606
1971 12:19:57.677313 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1972 12:19:57.680332 call enable_fixed_mtrr()
1973 12:19:57.684115 Checking cr50 for pending updates
1974 12:19:57.687974 CPU physical address size: 39 bits
1975 12:19:57.691600 MTRR: Fixed MSR 0x250 0x0606060606060606
1976 12:19:57.694652 MTRR: Fixed MSR 0x250 0x0606060606060606
1977 12:19:57.698389 MTRR: Fixed MSR 0x258 0x0606060606060606
1978 12:19:57.701968 MTRR: Fixed MSR 0x259 0x0000000000000000
1979 12:19:57.709166 MTRR: Fixed MSR 0x268 0x0606060606060606
1980 12:19:57.712767 MTRR: Fixed MSR 0x269 0x0606060606060606
1981 12:19:57.716355 MTRR: Fixed MSR 0x26a 0x0606060606060606
1982 12:19:57.719534 MTRR: Fixed MSR 0x26b 0x0606060606060606
1983 12:19:57.723301 MTRR: Fixed MSR 0x26c 0x0606060606060606
1984 12:19:57.727213 MTRR: Fixed MSR 0x26d 0x0606060606060606
1985 12:19:57.733717 MTRR: Fixed MSR 0x26e 0x0606060606060606
1986 12:19:57.737509 MTRR: Fixed MSR 0x26f 0x0606060606060606
1987 12:19:57.740527 MTRR: Fixed MSR 0x258 0x0606060606060606
1988 12:19:57.744009 call enable_fixed_mtrr()
1989 12:19:57.747473 MTRR: Fixed MSR 0x259 0x0000000000000000
1990 12:19:57.751512 MTRR: Fixed MSR 0x268 0x0606060606060606
1991 12:19:57.755073 MTRR: Fixed MSR 0x269 0x0606060606060606
1992 12:19:57.761931 MTRR: Fixed MSR 0x26a 0x0606060606060606
1993 12:19:57.765263 MTRR: Fixed MSR 0x26b 0x0606060606060606
1994 12:19:57.768595 MTRR: Fixed MSR 0x26c 0x0606060606060606
1995 12:19:57.772045 MTRR: Fixed MSR 0x26d 0x0606060606060606
1996 12:19:57.775826 MTRR: Fixed MSR 0x26e 0x0606060606060606
1997 12:19:57.779092 MTRR: Fixed MSR 0x26f 0x0606060606060606
1998 12:19:57.783719 CPU physical address size: 39 bits
1999 12:19:57.788343 call enable_fixed_mtrr()
2000 12:19:57.791933 MTRR: Fixed MSR 0x250 0x0606060606060606
2001 12:19:57.795566 MTRR: Fixed MSR 0x250 0x0606060606060606
2002 12:19:57.802489 MTRR: Fixed MSR 0x258 0x0606060606060606
2003 12:19:57.805227 MTRR: Fixed MSR 0x259 0x0000000000000000
2004 12:19:57.808542 MTRR: Fixed MSR 0x268 0x0606060606060606
2005 12:19:57.811975 MTRR: Fixed MSR 0x269 0x0606060606060606
2006 12:19:57.818593 MTRR: Fixed MSR 0x26a 0x0606060606060606
2007 12:19:57.822398 MTRR: Fixed MSR 0x26b 0x0606060606060606
2008 12:19:57.825405 MTRR: Fixed MSR 0x26c 0x0606060606060606
2009 12:19:57.828479 MTRR: Fixed MSR 0x26d 0x0606060606060606
2010 12:19:57.835223 MTRR: Fixed MSR 0x26e 0x0606060606060606
2011 12:19:57.838822 MTRR: Fixed MSR 0x26f 0x0606060606060606
2012 12:19:57.841605 MTRR: Fixed MSR 0x258 0x0606060606060606
2013 12:19:57.845394 call enable_fixed_mtrr()
2014 12:19:57.848369 MTRR: Fixed MSR 0x259 0x0000000000000000
2015 12:19:57.855109 MTRR: Fixed MSR 0x268 0x0606060606060606
2016 12:19:57.858259 MTRR: Fixed MSR 0x269 0x0606060606060606
2017 12:19:57.861585 MTRR: Fixed MSR 0x26a 0x0606060606060606
2018 12:19:57.864721 MTRR: Fixed MSR 0x26b 0x0606060606060606
2019 12:19:57.871464 MTRR: Fixed MSR 0x26c 0x0606060606060606
2020 12:19:57.874523 MTRR: Fixed MSR 0x26d 0x0606060606060606
2021 12:19:57.877943 MTRR: Fixed MSR 0x26e 0x0606060606060606
2022 12:19:57.881321 MTRR: Fixed MSR 0x26f 0x0606060606060606
2023 12:19:57.885257 CPU physical address size: 39 bits
2024 12:19:57.892148 call enable_fixed_mtrr()
2025 12:19:57.895100 MTRR: Fixed MSR 0x250 0x0606060606060606
2026 12:19:57.898487 MTRR: Fixed MSR 0x250 0x0606060606060606
2027 12:19:57.902152 MTRR: Fixed MSR 0x258 0x0606060606060606
2028 12:19:57.908280 MTRR: Fixed MSR 0x259 0x0000000000000000
2029 12:19:57.911672 MTRR: Fixed MSR 0x268 0x0606060606060606
2030 12:19:57.914816 MTRR: Fixed MSR 0x269 0x0606060606060606
2031 12:19:57.918302 MTRR: Fixed MSR 0x26a 0x0606060606060606
2032 12:19:57.921255 MTRR: Fixed MSR 0x26b 0x0606060606060606
2033 12:19:57.927793 MTRR: Fixed MSR 0x26c 0x0606060606060606
2034 12:19:57.931851 MTRR: Fixed MSR 0x26d 0x0606060606060606
2035 12:19:57.934624 MTRR: Fixed MSR 0x26e 0x0606060606060606
2036 12:19:57.937976 MTRR: Fixed MSR 0x26f 0x0606060606060606
2037 12:19:57.945371 MTRR: Fixed MSR 0x258 0x0606060606060606
2038 12:19:57.948982 MTRR: Fixed MSR 0x259 0x0000000000000000
2039 12:19:57.952199 MTRR: Fixed MSR 0x268 0x0606060606060606
2040 12:19:57.955736 MTRR: Fixed MSR 0x269 0x0606060606060606
2041 12:19:57.962549 MTRR: Fixed MSR 0x26a 0x0606060606060606
2042 12:19:57.965506 MTRR: Fixed MSR 0x26b 0x0606060606060606
2043 12:19:57.969170 MTRR: Fixed MSR 0x26c 0x0606060606060606
2044 12:19:57.972129 MTRR: Fixed MSR 0x26d 0x0606060606060606
2045 12:19:57.978884 MTRR: Fixed MSR 0x26e 0x0606060606060606
2046 12:19:57.982498 MTRR: Fixed MSR 0x26f 0x0606060606060606
2047 12:19:57.985427 call enable_fixed_mtrr()
2048 12:19:57.988836 call enable_fixed_mtrr()
2049 12:19:57.992810 CPU physical address size: 39 bits
2050 12:19:57.993232 TPM flow control failure
2051 12:19:57.996229 CPU physical address size: 39 bits
2052 12:19:57.999238 CPU physical address size: 39 bits
2053 12:19:58.006070 CPU physical address size: 39 bits
2054 12:19:58.009506 unexpected final status 0x40001d0
2055 12:19:58.012690 tpm transaction failed
2056 12:19:58.016442 ERROR: Attempt to enable CR50 update failed: 1f
2057 12:19:58.022393 BS: BS_PAYLOAD_LOAD entry times (exec / console): 316 / 16 ms
2058 12:19:58.028946 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2059 12:19:58.036184 Checking segment from ROM address 0xffc02b38
2060 12:19:58.038980 Checking segment from ROM address 0xffc02b54
2061 12:19:58.042671 Loading segment from ROM address 0xffc02b38
2062 12:19:58.045634 code (compression=0)
2063 12:19:58.055822 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2064 12:19:58.062448 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2065 12:19:58.065516 it's not compressed!
2066 12:19:58.203668 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2067 12:19:58.210314 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2068 12:19:58.217139 Loading segment from ROM address 0xffc02b54
2069 12:19:58.220064 Entry Point 0x30000000
2070 12:19:58.220488 Loaded segments
2071 12:19:58.227001 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2072 12:19:58.270002 Finalizing chipset.
2073 12:19:58.273023 Finalizing SMM.
2074 12:19:58.273493 APMC done.
2075 12:19:58.280023 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2076 12:19:58.282942 mp_park_aps done after 0 msecs.
2077 12:19:58.286724 Jumping to boot code at 0x30000000(0x76b25000)
2078 12:19:58.296743 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2079 12:19:58.297307
2080 12:19:58.297677
2081 12:19:58.298023
2082 12:19:58.299662 Starting depthcharge on Voema...
2083 12:19:58.300132
2084 12:19:58.301258 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2085 12:19:58.301825 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2086 12:19:58.302276 Setting prompt string to ['volteer:']
2087 12:19:58.302702 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2088 12:19:58.309393 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2089 12:19:58.309956
2090 12:19:58.316434 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2091 12:19:58.317011
2092 12:19:58.322579 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2093 12:19:58.323046
2094 12:19:58.326017 Failed to find eMMC card reader
2095 12:19:58.326441
2096 12:19:58.326772 Wipe memory regions:
2097 12:19:58.327083
2098 12:19:58.333164 [0x00000000001000, 0x000000000a0000)
2099 12:19:58.333687
2100 12:19:58.335592 [0x00000000100000, 0x00000030000000)
2101 12:19:58.361924
2102 12:19:58.364696 [0x00000032662db0, 0x000000769ef000)
2103 12:19:58.400972
2104 12:19:58.403837 [0x00000100000000, 0x00000280400000)
2105 12:19:58.606246
2106 12:19:58.609790 ec_init: CrosEC protocol v3 supported (256, 256)
2107 12:19:58.610348
2108 12:19:58.615863 update_port_state: port C0 state: usb enable 1 mux conn 0
2109 12:19:58.616418
2110 12:19:58.622784 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2111 12:19:58.625446
2112 12:19:58.629276 pmc_check_ipc_sts: STS_BUSY done after 1612 us
2113 12:19:58.629844
2114 12:19:58.635547 send_conn_disc_msg: pmc_send_cmd succeeded
2115 12:19:59.065702
2116 12:19:59.066266 R8152: Initializing
2117 12:19:59.066642
2118 12:19:59.068780 Version 6 (ocp_data = 5c30)
2119 12:19:59.069345
2120 12:19:59.072172 R8152: Done initializing
2121 12:19:59.072643
2122 12:19:59.075308 Adding net device
2123 12:19:59.376970
2124 12:19:59.380525 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2125 12:19:59.381092
2126 12:19:59.381458
2127 12:19:59.381796
2128 12:19:59.383867 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2130 12:19:59.485404 volteer: tftpboot 192.168.201.1 10724541/tftp-deploy-uvh5z7d9/kernel/bzImage 10724541/tftp-deploy-uvh5z7d9/kernel/cmdline 10724541/tftp-deploy-uvh5z7d9/ramdisk/ramdisk.cpio.gz
2131 12:19:59.486095 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2132 12:19:59.486676 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2133 12:19:59.491476 tftpboot 192.168.201.1 10724541/tftp-deploy-uvh5z7d9/kernel/bzIploy-uvh5z7d9/kernel/cmdline 10724541/tftp-deploy-uvh5z7d9/ramdisk/ramdisk.cpio.gz
2134 12:19:59.492070
2135 12:19:59.492443 Waiting for link
2136 12:19:59.696066
2137 12:19:59.696630 done.
2138 12:19:59.696996
2139 12:19:59.697337 MAC: 00:24:32:30:7b:ec
2140 12:19:59.697663
2141 12:19:59.698747 Sending DHCP discover... done.
2142 12:19:59.699206
2143 12:19:59.702581 Waiting for reply... done.
2144 12:19:59.703235
2145 12:19:59.705507 Sending DHCP request... done.
2146 12:19:59.706069
2147 12:19:59.924171 Waiting for reply... done.
2148 12:19:59.924733
2149 12:19:59.925097 My ip is 192.168.201.11
2150 12:19:59.925462
2151 12:19:59.927587 The DHCP server ip is 192.168.201.1
2152 12:19:59.930814
2153 12:19:59.934504 TFTP server IP predefined by user: 192.168.201.1
2154 12:19:59.935074
2155 12:19:59.940845 Bootfile predefined by user: 10724541/tftp-deploy-uvh5z7d9/kernel/bzImage
2156 12:19:59.941397
2157 12:19:59.943829 Sending tftp read request... done.
2158 12:19:59.944290
2159 12:19:59.953309 Waiting for the transfer...
2160 12:19:59.953922
2161 12:20:00.631896 00000000 ################################################################
2162 12:20:00.632463
2163 12:20:01.345640 00080000 ################################################################
2164 12:20:01.346178
2165 12:20:02.022047 00100000 ################################################################
2166 12:20:02.022779
2167 12:20:02.725329 00180000 ################################################################
2168 12:20:02.725784
2169 12:20:03.441408 00200000 ################################################################
2170 12:20:03.441935
2171 12:20:04.228713 00280000 ################################################################
2172 12:20:04.229263
2173 12:20:05.322998 00300000 ################################################################
2174 12:20:05.323644
2175 12:20:05.461692 00380000 ################################################################
2176 12:20:05.461900
2177 12:20:06.147922 00400000 ################################################################
2178 12:20:06.148488
2179 12:20:06.860971 00480000 ################################################################
2180 12:20:06.861504
2181 12:20:07.558382 00500000 ################################################################
2182 12:20:07.558927
2183 12:20:08.257036 00580000 ################################################################
2184 12:20:08.257585
2185 12:20:08.934453 00600000 ################################################################
2186 12:20:08.934622
2187 12:20:09.622757 00680000 ################################################################
2188 12:20:09.623279
2189 12:20:10.332129 00700000 ################################################################
2190 12:20:10.332675
2191 12:20:15.035126 00780000 ################################################################
2192 12:20:15.035747
2193 12:20:15.036184 00800000 ################################################################
2194 12:20:15.036567
2195 12:20:15.036896 00880000 ################################################################
2196 12:20:15.037262
2197 12:20:15.037568 00900000 ################################################################
2198 12:20:15.037951
2199 12:20:15.038247 00980000 ################################################################
2200 12:20:15.038610
2201 12:20:15.038949 00a00000 ############################################### done.
2202 12:20:15.039278
2203 12:20:15.039682 The bootfile was 10863104 bytes long.
2204 12:20:15.039975
2205 12:20:15.040341 Sending tftp read request... done.
2206 12:20:15.040394
2207 12:20:15.040459 Waiting for the transfer...
2208 12:20:15.040514
2209 12:20:15.704415 00000000 ################################################################
2210 12:20:15.704948
2211 12:20:16.382876 00080000 ################################################################
2212 12:20:16.383482
2213 12:20:17.070864 00100000 ################################################################
2214 12:20:17.071418
2215 12:20:17.743810 00180000 ################################################################
2216 12:20:17.744333
2217 12:20:18.429216 00200000 ################################################################
2218 12:20:18.429766
2219 12:20:19.107520 00280000 ################################################################
2220 12:20:19.108049
2221 12:20:19.764603 00300000 ################################################################
2222 12:20:19.764754
2223 12:20:23.502253 00380000 ################################################################
2224 12:20:23.502883
2225 12:20:23.503333 00400000 ################################################################
2226 12:20:23.503708
2227 12:20:23.504007 00480000 ################################################################
2228 12:20:23.504323
2229 12:20:23.504611 00500000 ################################################################
2230 12:20:23.504901
2231 12:20:23.505178 00580000 ################################################################
2232 12:20:23.505459
2233 12:20:23.505734 00600000 ################################################################
2234 12:20:23.506013
2235 12:20:24.018302 00680000 ################################################################
2236 12:20:24.018820
2237 12:20:24.648374 00700000 ################################################################
2238 12:20:24.648905
2239 12:20:25.490359 00780000 ################################################################
2240 12:20:25.490900
2241 12:20:25.866901 00800000 ################################################################
2242 12:20:25.867458
2243 12:20:26.489307 00880000 ################################################################
2244 12:20:26.489696
2245 12:20:27.116317 00900000 ################################################################
2246 12:20:27.116875
2247 12:20:27.729262 00980000 ################################################################
2248 12:20:27.729420
2249 12:20:28.290494 00a00000 ################################################################
2250 12:20:28.291023
2251 12:20:28.963918 00a80000 ################################################################
2252 12:20:28.964242
2253 12:20:29.636200 00b00000 ################################################################
2254 12:20:29.636719
2255 12:20:30.309625 00b80000 ################################################################
2256 12:20:30.310146
2257 12:20:30.993203 00c00000 ################################################################
2258 12:20:30.993723
2259 12:20:31.634467 00c80000 ################################################################
2260 12:20:31.634986
2261 12:20:32.289278 00d00000 ################################################################
2262 12:20:32.289841
2263 12:20:32.942798 00d80000 ################################################################
2264 12:20:32.943317
2265 12:20:33.592352 00e00000 ################################################################
2266 12:20:33.592854
2267 12:20:34.182042 00e80000 ################################################################
2268 12:20:34.182196
2269 12:20:34.760576 00f00000 ################################################################
2270 12:20:34.760720
2271 12:20:35.398751 00f80000 ################################################################
2272 12:20:35.398902
2273 12:20:36.021959 01000000 ################################################################
2274 12:20:36.022113
2275 12:20:36.605508 01080000 ################################################################
2276 12:20:36.605672
2277 12:20:37.208291 01100000 ################################################################
2278 12:20:37.208440
2279 12:20:37.853976 01180000 ################################################################
2280 12:20:37.854142
2281 12:20:38.501137 01200000 ################################################################
2282 12:20:38.501290
2283 12:20:39.120322 01280000 ################################################################
2284 12:20:39.120473
2285 12:20:39.742344 01300000 ################################################################
2286 12:20:39.742975
2287 12:20:40.383132 01380000 ################################################################
2288 12:20:40.383282
2289 12:20:41.011790 01400000 ################################################################
2290 12:20:41.011943
2291 12:20:41.638534 01480000 ################################################################
2292 12:20:41.638715
2293 12:20:42.270201 01500000 ################################################################
2294 12:20:42.270349
2295 12:20:42.926821 01580000 ################################################################
2296 12:20:42.926974
2297 12:20:43.589819 01600000 ################################################################
2298 12:20:43.590003
2299 12:20:44.264126 01680000 ################################################################
2300 12:20:44.264308
2301 12:20:44.913118 01700000 ################################################################
2302 12:20:44.913315
2303 12:20:45.575109 01780000 ################################################################
2304 12:20:45.575290
2305 12:20:46.242077 01800000 ################################################################
2306 12:20:46.242229
2307 12:20:46.900697 01880000 ################################################################
2308 12:20:46.900852
2309 12:20:47.557745 01900000 ################################################################
2310 12:20:47.557903
2311 12:20:48.203719 01980000 ################################################################
2312 12:20:48.203893
2313 12:20:48.866170 01a00000 ################################################################
2314 12:20:48.866373
2315 12:20:49.499799 01a80000 ################################################################
2316 12:20:49.499970
2317 12:20:50.156990 01b00000 ################################################################
2318 12:20:50.157149
2319 12:20:50.808781 01b80000 ################################################################
2320 12:20:50.808927
2321 12:20:51.454915 01c00000 ################################################################
2322 12:20:51.455075
2323 12:20:52.111481 01c80000 ################################################################
2324 12:20:52.111632
2325 12:20:52.759749 01d00000 ################################################################
2326 12:20:52.759942
2327 12:20:53.432367 01d80000 ################################################################
2328 12:20:53.432518
2329 12:20:53.993396 01e00000 ################################################################
2330 12:20:53.993549
2331 12:20:54.564949 01e80000 ################################################################
2332 12:20:54.565096
2333 12:20:55.133712 01f00000 ################################################################
2334 12:20:55.133862
2335 12:20:55.718558 01f80000 ################################################################
2336 12:20:55.718709
2337 12:20:56.289417 02000000 ################################################################
2338 12:20:56.289577
2339 12:20:56.919254 02080000 ################################################################
2340 12:20:56.919443
2341 12:20:57.576441 02100000 ################################################################
2342 12:20:57.576593
2343 12:20:58.221713 02180000 ################################################################
2344 12:20:58.221860
2345 12:20:58.874112 02200000 ################################################################
2346 12:20:58.874290
2347 12:20:59.255757 02280000 ##################################### done.
2348 12:20:59.255909
2349 12:20:59.259228 Sending tftp read request... done.
2350 12:20:59.259360
2351 12:20:59.262474 Waiting for the transfer...
2352 12:20:59.262601
2353 12:20:59.262704 00000000 # done.
2354 12:20:59.262815
2355 12:20:59.272407 Command line loaded dynamically from TFTP file: 10724541/tftp-deploy-uvh5z7d9/kernel/cmdline
2356 12:20:59.272523
2357 12:20:59.285276 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2358 12:20:59.292011
2359 12:20:59.295084 Shutting down all USB controllers.
2360 12:20:59.295167
2361 12:20:59.295233 Removing current net device
2362 12:20:59.295293
2363 12:20:59.298643 Finalizing coreboot
2364 12:20:59.298726
2365 12:20:59.305394 Exiting depthcharge with code 4 at timestamp: 69669597
2366 12:20:59.305477
2367 12:20:59.305541
2368 12:20:59.305600 Starting kernel ...
2369 12:20:59.305657
2370 12:20:59.305712
2371 12:20:59.306103 end: 2.2.4 bootloader-commands (duration 00:01:01) [common]
2372 12:20:59.306198 start: 2.2.5 auto-login-action (timeout 00:03:44) [common]
2373 12:20:59.306275 Setting prompt string to ['Linux version [0-9]']
2374 12:20:59.306342 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2375 12:20:59.306409 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2377 12:24:43.306488 end: 2.2.5 auto-login-action (duration 00:03:44) [common]
2379 12:24:43.306710 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 224 seconds'
2381 12:24:43.306869 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2384 12:24:43.307124 end: 2 depthcharge-action (duration 00:05:00) [common]
2386 12:24:43.307460 Cleaning after the job
2387 12:24:43.307552 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10724541/tftp-deploy-uvh5z7d9/ramdisk
2388 12:24:43.311483 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10724541/tftp-deploy-uvh5z7d9/kernel
2389 12:24:43.312769 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10724541/tftp-deploy-uvh5z7d9/modules
2390 12:24:43.313376 start: 4.1 power-off (timeout 00:00:30) [common]
2391 12:24:43.313657 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-0' '--port=1' '--command=off'
2392 12:24:43.391642 >> Command sent successfully.
2393 12:24:43.393910 Returned 0 in 0 seconds
2394 12:24:43.494281 end: 4.1 power-off (duration 00:00:00) [common]
2396 12:24:43.494624 start: 4.2 read-feedback (timeout 00:10:00) [common]
2397 12:24:43.494886 Listened to connection for namespace 'common' for up to 1s
2398 12:24:44.495451 Finalising connection for namespace 'common'
2399 12:24:44.495648 Disconnecting from shell: Finalise
2400 12:24:44.495814
2401 12:24:44.596206 end: 4.2 read-feedback (duration 00:00:01) [common]
2402 12:24:44.596382 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10724541
2403 12:24:44.678631 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10724541
2404 12:24:44.678843 JobError: Your job cannot terminate cleanly.