Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
1 12:23:24.805763 lava-dispatcher, installed at version: 2023.05.1
2 12:23:24.805990 start: 0 validate
3 12:23:24.806121 Start time: 2023-06-14 12:23:24.806113+00:00 (UTC)
4 12:23:24.806250 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:23:24.806379 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230609.0%2Famd64%2Finitrd.cpio.gz exists
6 12:23:25.057499 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:23:25.057756 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.284-cip99-114-g02e97826987bf%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:23:25.322483 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:23:25.322660 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230609.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:23:25.587221 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:23:25.587394 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.284-cip99-114-g02e97826987bf%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:23:25.853858 validate duration: 1.05
14 12:23:25.854120 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:23:25.854217 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:23:25.854306 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:23:25.854430 Not decompressing ramdisk as can be used compressed.
18 12:23:25.854560 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230609.0/amd64/initrd.cpio.gz
19 12:23:25.854657 saving as /var/lib/lava/dispatcher/tmp/10724496/tftp-deploy-bh6uywto/ramdisk/initrd.cpio.gz
20 12:23:25.854720 total size: 5432707 (5MB)
21 12:23:25.855854 progress 0% (0MB)
22 12:23:25.857548 progress 5% (0MB)
23 12:23:25.858948 progress 10% (0MB)
24 12:23:25.860446 progress 15% (0MB)
25 12:23:25.862104 progress 20% (1MB)
26 12:23:25.863604 progress 25% (1MB)
27 12:23:25.865206 progress 30% (1MB)
28 12:23:25.866881 progress 35% (1MB)
29 12:23:25.868290 progress 40% (2MB)
30 12:23:25.869730 progress 45% (2MB)
31 12:23:25.871095 progress 50% (2MB)
32 12:23:25.872687 progress 55% (2MB)
33 12:23:25.874090 progress 60% (3MB)
34 12:23:25.875485 progress 65% (3MB)
35 12:23:25.877062 progress 70% (3MB)
36 12:23:25.878429 progress 75% (3MB)
37 12:23:25.879792 progress 80% (4MB)
38 12:23:25.881206 progress 85% (4MB)
39 12:23:25.882788 progress 90% (4MB)
40 12:23:25.884348 progress 95% (4MB)
41 12:23:25.885838 progress 100% (5MB)
42 12:23:25.886097 5MB downloaded in 0.03s (165.14MB/s)
43 12:23:25.886264 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:23:25.886547 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:23:25.886664 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:23:25.886767 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:23:25.886899 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.284-cip99-114-g02e97826987bf/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:23:25.886978 saving as /var/lib/lava/dispatcher/tmp/10724496/tftp-deploy-bh6uywto/kernel/bzImage
50 12:23:25.887078 total size: 10863104 (10MB)
51 12:23:25.887177 No compression specified
52 12:23:25.888850 progress 0% (0MB)
53 12:23:25.891727 progress 5% (0MB)
54 12:23:25.894627 progress 10% (1MB)
55 12:23:25.897422 progress 15% (1MB)
56 12:23:25.900278 progress 20% (2MB)
57 12:23:25.903119 progress 25% (2MB)
58 12:23:25.906055 progress 30% (3MB)
59 12:23:25.909107 progress 35% (3MB)
60 12:23:25.911845 progress 40% (4MB)
61 12:23:25.914757 progress 45% (4MB)
62 12:23:25.917595 progress 50% (5MB)
63 12:23:25.920595 progress 55% (5MB)
64 12:23:25.923347 progress 60% (6MB)
65 12:23:25.926254 progress 65% (6MB)
66 12:23:25.929187 progress 70% (7MB)
67 12:23:25.931882 progress 75% (7MB)
68 12:23:25.934758 progress 80% (8MB)
69 12:23:25.937507 progress 85% (8MB)
70 12:23:25.940372 progress 90% (9MB)
71 12:23:25.943080 progress 95% (9MB)
72 12:23:25.945969 progress 100% (10MB)
73 12:23:25.946156 10MB downloaded in 0.06s (175.37MB/s)
74 12:23:25.946318 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:23:25.946573 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:23:25.946676 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:23:25.946778 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:23:25.946960 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230609.0/amd64/full.rootfs.tar.xz
80 12:23:25.947061 saving as /var/lib/lava/dispatcher/tmp/10724496/tftp-deploy-bh6uywto/nfsrootfs/full.rootfs.tar
81 12:23:25.947163 total size: 207209004 (197MB)
82 12:23:25.947262 Using unxz to decompress xz
83 12:23:25.951132 progress 0% (0MB)
84 12:23:26.506687 progress 5% (9MB)
85 12:23:27.054212 progress 10% (19MB)
86 12:23:27.669148 progress 15% (29MB)
87 12:23:28.030980 progress 20% (39MB)
88 12:23:28.400055 progress 25% (49MB)
89 12:23:29.009593 progress 30% (59MB)
90 12:23:29.564553 progress 35% (69MB)
91 12:23:30.177455 progress 40% (79MB)
92 12:23:30.746371 progress 45% (88MB)
93 12:23:31.351836 progress 50% (98MB)
94 12:23:31.993785 progress 55% (108MB)
95 12:23:32.700765 progress 60% (118MB)
96 12:23:32.861583 progress 65% (128MB)
97 12:23:33.005161 progress 70% (138MB)
98 12:23:33.120415 progress 75% (148MB)
99 12:23:33.194132 progress 80% (158MB)
100 12:23:33.264586 progress 85% (167MB)
101 12:23:33.364861 progress 90% (177MB)
102 12:23:33.656489 progress 95% (187MB)
103 12:23:34.268198 progress 100% (197MB)
104 12:23:34.273878 197MB downloaded in 8.33s (23.73MB/s)
105 12:23:34.274212 end: 1.3.1 http-download (duration 00:00:08) [common]
107 12:23:34.274503 end: 1.3 download-retry (duration 00:00:08) [common]
108 12:23:34.274598 start: 1.4 download-retry (timeout 00:09:52) [common]
109 12:23:34.274690 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 12:23:34.274851 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.284-cip99-114-g02e97826987bf/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:23:34.274955 saving as /var/lib/lava/dispatcher/tmp/10724496/tftp-deploy-bh6uywto/modules/modules.tar
112 12:23:34.275073 total size: 483752 (0MB)
113 12:23:34.275180 Using unxz to decompress xz
114 12:23:34.279088 progress 6% (0MB)
115 12:23:34.279511 progress 13% (0MB)
116 12:23:34.279753 progress 20% (0MB)
117 12:23:34.281156 progress 27% (0MB)
118 12:23:34.283162 progress 33% (0MB)
119 12:23:34.285136 progress 40% (0MB)
120 12:23:34.287053 progress 47% (0MB)
121 12:23:34.289467 progress 54% (0MB)
122 12:23:34.291693 progress 60% (0MB)
123 12:23:34.293940 progress 67% (0MB)
124 12:23:34.296207 progress 74% (0MB)
125 12:23:34.298467 progress 81% (0MB)
126 12:23:34.300383 progress 88% (0MB)
127 12:23:34.302437 progress 94% (0MB)
128 12:23:34.304344 progress 100% (0MB)
129 12:23:34.310788 0MB downloaded in 0.04s (12.92MB/s)
130 12:23:34.311112 end: 1.4.1 http-download (duration 00:00:00) [common]
132 12:23:34.311394 end: 1.4 download-retry (duration 00:00:00) [common]
133 12:23:34.311495 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
134 12:23:34.311591 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
135 12:23:37.758490 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10724496/extract-nfsrootfs-ra2uvnsy
136 12:23:37.758714 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
137 12:23:37.758853 start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
138 12:23:37.759092 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10724496/lava-overlay-k8wdsdws
139 12:23:37.759288 makedir: /var/lib/lava/dispatcher/tmp/10724496/lava-overlay-k8wdsdws/lava-10724496/bin
140 12:23:37.759436 makedir: /var/lib/lava/dispatcher/tmp/10724496/lava-overlay-k8wdsdws/lava-10724496/tests
141 12:23:37.759586 makedir: /var/lib/lava/dispatcher/tmp/10724496/lava-overlay-k8wdsdws/lava-10724496/results
142 12:23:37.759742 Creating /var/lib/lava/dispatcher/tmp/10724496/lava-overlay-k8wdsdws/lava-10724496/bin/lava-add-keys
143 12:23:37.759957 Creating /var/lib/lava/dispatcher/tmp/10724496/lava-overlay-k8wdsdws/lava-10724496/bin/lava-add-sources
144 12:23:37.760150 Creating /var/lib/lava/dispatcher/tmp/10724496/lava-overlay-k8wdsdws/lava-10724496/bin/lava-background-process-start
145 12:23:37.760295 Creating /var/lib/lava/dispatcher/tmp/10724496/lava-overlay-k8wdsdws/lava-10724496/bin/lava-background-process-stop
146 12:23:37.760423 Creating /var/lib/lava/dispatcher/tmp/10724496/lava-overlay-k8wdsdws/lava-10724496/bin/lava-common-functions
147 12:23:37.760548 Creating /var/lib/lava/dispatcher/tmp/10724496/lava-overlay-k8wdsdws/lava-10724496/bin/lava-echo-ipv4
148 12:23:37.760675 Creating /var/lib/lava/dispatcher/tmp/10724496/lava-overlay-k8wdsdws/lava-10724496/bin/lava-install-packages
149 12:23:37.760798 Creating /var/lib/lava/dispatcher/tmp/10724496/lava-overlay-k8wdsdws/lava-10724496/bin/lava-installed-packages
150 12:23:37.760930 Creating /var/lib/lava/dispatcher/tmp/10724496/lava-overlay-k8wdsdws/lava-10724496/bin/lava-os-build
151 12:23:37.761052 Creating /var/lib/lava/dispatcher/tmp/10724496/lava-overlay-k8wdsdws/lava-10724496/bin/lava-probe-channel
152 12:23:37.761176 Creating /var/lib/lava/dispatcher/tmp/10724496/lava-overlay-k8wdsdws/lava-10724496/bin/lava-probe-ip
153 12:23:37.761298 Creating /var/lib/lava/dispatcher/tmp/10724496/lava-overlay-k8wdsdws/lava-10724496/bin/lava-target-ip
154 12:23:37.761419 Creating /var/lib/lava/dispatcher/tmp/10724496/lava-overlay-k8wdsdws/lava-10724496/bin/lava-target-mac
155 12:23:37.761540 Creating /var/lib/lava/dispatcher/tmp/10724496/lava-overlay-k8wdsdws/lava-10724496/bin/lava-target-storage
156 12:23:37.761664 Creating /var/lib/lava/dispatcher/tmp/10724496/lava-overlay-k8wdsdws/lava-10724496/bin/lava-test-case
157 12:23:37.761790 Creating /var/lib/lava/dispatcher/tmp/10724496/lava-overlay-k8wdsdws/lava-10724496/bin/lava-test-event
158 12:23:37.761910 Creating /var/lib/lava/dispatcher/tmp/10724496/lava-overlay-k8wdsdws/lava-10724496/bin/lava-test-feedback
159 12:23:37.762031 Creating /var/lib/lava/dispatcher/tmp/10724496/lava-overlay-k8wdsdws/lava-10724496/bin/lava-test-raise
160 12:23:37.762151 Creating /var/lib/lava/dispatcher/tmp/10724496/lava-overlay-k8wdsdws/lava-10724496/bin/lava-test-reference
161 12:23:37.762272 Creating /var/lib/lava/dispatcher/tmp/10724496/lava-overlay-k8wdsdws/lava-10724496/bin/lava-test-runner
162 12:23:37.762394 Creating /var/lib/lava/dispatcher/tmp/10724496/lava-overlay-k8wdsdws/lava-10724496/bin/lava-test-set
163 12:23:37.762515 Creating /var/lib/lava/dispatcher/tmp/10724496/lava-overlay-k8wdsdws/lava-10724496/bin/lava-test-shell
164 12:23:37.762639 Updating /var/lib/lava/dispatcher/tmp/10724496/lava-overlay-k8wdsdws/lava-10724496/bin/lava-add-keys (debian)
165 12:23:37.762789 Updating /var/lib/lava/dispatcher/tmp/10724496/lava-overlay-k8wdsdws/lava-10724496/bin/lava-add-sources (debian)
166 12:23:37.762936 Updating /var/lib/lava/dispatcher/tmp/10724496/lava-overlay-k8wdsdws/lava-10724496/bin/lava-install-packages (debian)
167 12:23:37.763077 Updating /var/lib/lava/dispatcher/tmp/10724496/lava-overlay-k8wdsdws/lava-10724496/bin/lava-installed-packages (debian)
168 12:23:37.763217 Updating /var/lib/lava/dispatcher/tmp/10724496/lava-overlay-k8wdsdws/lava-10724496/bin/lava-os-build (debian)
169 12:23:37.763341 Creating /var/lib/lava/dispatcher/tmp/10724496/lava-overlay-k8wdsdws/lava-10724496/environment
170 12:23:37.763441 LAVA metadata
171 12:23:37.763512 - LAVA_JOB_ID=10724496
172 12:23:37.763576 - LAVA_DISPATCHER_IP=192.168.201.1
173 12:23:37.763682 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
174 12:23:37.763749 skipped lava-vland-overlay
175 12:23:37.763824 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
176 12:23:37.763904 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
177 12:23:37.763966 skipped lava-multinode-overlay
178 12:23:37.764038 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
179 12:23:37.764116 start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
180 12:23:37.764190 Loading test definitions
181 12:23:37.764280 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:48) [common]
182 12:23:37.764351 Using /lava-10724496 at stage 0
183 12:23:37.764630 uuid=10724496_1.5.2.3.1 testdef=None
184 12:23:37.764719 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
185 12:23:37.764812 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
186 12:23:37.765262 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
188 12:23:37.765489 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
189 12:23:37.766039 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
191 12:23:37.766279 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
192 12:23:37.766818 runner path: /var/lib/lava/dispatcher/tmp/10724496/lava-overlay-k8wdsdws/lava-10724496/0/tests/0_timesync-off test_uuid 10724496_1.5.2.3.1
193 12:23:37.766973 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
195 12:23:37.767201 start: 1.5.2.3.5 git-repo-action (timeout 00:09:48) [common]
196 12:23:37.767273 Using /lava-10724496 at stage 0
197 12:23:37.767374 Fetching tests from https://github.com/kernelci/test-definitions.git
198 12:23:37.767453 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/10724496/lava-overlay-k8wdsdws/lava-10724496/0/tests/1_kselftest-futex'
199 12:23:49.816889 Running '/usr/bin/git checkout kernelci.org
200 12:23:49.979207 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/10724496/lava-overlay-k8wdsdws/lava-10724496/0/tests/1_kselftest-futex/automated/linux/kselftest/kselftest.yaml
201 12:23:49.979941 uuid=10724496_1.5.2.3.5 testdef=None
202 12:23:49.980121 end: 1.5.2.3.5 git-repo-action (duration 00:00:12) [common]
204 12:23:49.980404 start: 1.5.2.3.6 test-overlay (timeout 00:09:36) [common]
205 12:23:49.981238 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
207 12:23:49.981615 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:36) [common]
208 12:23:49.982594 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
210 12:23:49.982834 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:36) [common]
211 12:23:49.983761 runner path: /var/lib/lava/dispatcher/tmp/10724496/lava-overlay-k8wdsdws/lava-10724496/0/tests/1_kselftest-futex test_uuid 10724496_1.5.2.3.5
212 12:23:49.983857 BOARD='asus-C436FA-Flip-hatch'
213 12:23:49.983924 BRANCH='cip-gitlab'
214 12:23:49.983984 SKIPFILE='/dev/null'
215 12:23:49.984043 SKIP_INSTALL='True'
216 12:23:49.984099 TESTPROG_URL='None'
217 12:23:49.984156 TST_CASENAME=''
218 12:23:49.984212 TST_CMDFILES='futex'
219 12:23:49.984353 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
221 12:23:49.984574 Creating lava-test-runner.conf files
222 12:23:49.984640 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10724496/lava-overlay-k8wdsdws/lava-10724496/0 for stage 0
223 12:23:49.984735 - 0_timesync-off
224 12:23:49.984813 - 1_kselftest-futex
225 12:23:49.984917 end: 1.5.2.3 test-definition (duration 00:00:12) [common]
226 12:23:49.985010 start: 1.5.2.4 compress-overlay (timeout 00:09:36) [common]
227 12:23:57.603867 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
228 12:23:57.604020 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:28) [common]
229 12:23:57.604118 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
230 12:23:57.604225 end: 1.5.2 lava-overlay (duration 00:00:20) [common]
231 12:23:57.604320 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:28) [common]
232 12:23:57.740173 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
233 12:23:57.740543 start: 1.5.4 extract-modules (timeout 00:09:28) [common]
234 12:23:57.740691 extracting modules file /var/lib/lava/dispatcher/tmp/10724496/tftp-deploy-bh6uywto/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10724496/extract-nfsrootfs-ra2uvnsy
235 12:23:57.760692 extracting modules file /var/lib/lava/dispatcher/tmp/10724496/tftp-deploy-bh6uywto/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10724496/extract-overlay-ramdisk-adrd6a31/ramdisk
236 12:23:57.780659 end: 1.5.4 extract-modules (duration 00:00:00) [common]
237 12:23:57.780827 start: 1.5.5 apply-overlay-tftp (timeout 00:09:28) [common]
238 12:23:57.780937 [common] Applying overlay to NFS
239 12:23:57.781013 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10724496/compress-overlay-j4bcunf7/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10724496/extract-nfsrootfs-ra2uvnsy
240 12:23:58.694119 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
241 12:23:58.694322 start: 1.5.6 configure-preseed-file (timeout 00:09:27) [common]
242 12:23:58.694421 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
243 12:23:58.694511 start: 1.5.7 compress-ramdisk (timeout 00:09:27) [common]
244 12:23:58.694597 Building ramdisk /var/lib/lava/dispatcher/tmp/10724496/extract-overlay-ramdisk-adrd6a31/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10724496/extract-overlay-ramdisk-adrd6a31/ramdisk
245 12:23:59.731681 >> 30351 blocks
246 12:24:00.348498 rename /var/lib/lava/dispatcher/tmp/10724496/extract-overlay-ramdisk-adrd6a31/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10724496/tftp-deploy-bh6uywto/ramdisk/ramdisk.cpio.gz
247 12:24:00.349024 end: 1.5.7 compress-ramdisk (duration 00:00:02) [common]
248 12:24:00.349222 start: 1.5.8 prepare-kernel (timeout 00:09:26) [common]
249 12:24:00.349381 start: 1.5.8.1 prepare-fit (timeout 00:09:26) [common]
250 12:24:00.349518 No mkimage arch provided, not using FIT.
251 12:24:00.349663 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
252 12:24:00.349795 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
253 12:24:00.349972 end: 1.5 prepare-tftp-overlay (duration 00:00:26) [common]
254 12:24:00.350113 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:26) [common]
255 12:24:00.350246 No LXC device requested
256 12:24:00.350363 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 12:24:00.350489 start: 1.7 deploy-device-env (timeout 00:09:26) [common]
258 12:24:00.350621 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 12:24:00.350730 Checking files for TFTP limit of 4294967296 bytes.
260 12:24:00.351258 end: 1 tftp-deploy (duration 00:00:34) [common]
261 12:24:00.351385 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 12:24:00.351473 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 12:24:00.351602 substitutions:
264 12:24:00.351672 - {DTB}: None
265 12:24:00.351735 - {INITRD}: 10724496/tftp-deploy-bh6uywto/ramdisk/ramdisk.cpio.gz
266 12:24:00.351802 - {KERNEL}: 10724496/tftp-deploy-bh6uywto/kernel/bzImage
267 12:24:00.351866 - {LAVA_MAC}: None
268 12:24:00.351923 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10724496/extract-nfsrootfs-ra2uvnsy
269 12:24:00.351978 - {NFS_SERVER_IP}: 192.168.201.1
270 12:24:00.352041 - {PRESEED_CONFIG}: None
271 12:24:00.352095 - {PRESEED_LOCAL}: None
272 12:24:00.352155 - {RAMDISK}: 10724496/tftp-deploy-bh6uywto/ramdisk/ramdisk.cpio.gz
273 12:24:00.352209 - {ROOT_PART}: None
274 12:24:00.352269 - {ROOT}: None
275 12:24:00.352323 - {SERVER_IP}: 192.168.201.1
276 12:24:00.352376 - {TEE}: None
277 12:24:00.352428 Parsed boot commands:
278 12:24:00.352505 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
279 12:24:00.352746 Parsed boot commands: tftpboot 192.168.201.1 10724496/tftp-deploy-bh6uywto/kernel/bzImage 10724496/tftp-deploy-bh6uywto/kernel/cmdline 10724496/tftp-deploy-bh6uywto/ramdisk/ramdisk.cpio.gz
280 12:24:00.352868 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
281 12:24:00.352962 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
282 12:24:00.353060 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
283 12:24:00.353150 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
284 12:24:00.353220 Not connected, no need to disconnect.
285 12:24:00.353293 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
286 12:24:00.353377 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
287 12:24:00.353444 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-3'
288 12:24:00.357207 Setting prompt string to ['lava-test: # ']
289 12:24:00.357561 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
290 12:24:00.357677 end: 2.2.1 reset-connection (duration 00:00:00) [common]
291 12:24:00.357778 start: 2.2.2 reset-device (timeout 00:05:00) [common]
292 12:24:00.357875 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
293 12:24:00.358073 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
294 12:24:05.491955 >> Command sent successfully.
295 12:24:05.494458 Returned 0 in 5 seconds
296 12:24:05.594888 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
298 12:24:05.595314 end: 2.2.2 reset-device (duration 00:00:05) [common]
299 12:24:05.595462 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
300 12:24:05.595557 Setting prompt string to 'Starting depthcharge on Helios...'
301 12:24:05.595628 Changing prompt to 'Starting depthcharge on Helios...'
302 12:24:05.595708 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
303 12:24:05.595982 [Enter `^Ec?' for help]
304 12:24:06.217581
305 12:24:06.217733
306 12:24:06.228008 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
307 12:24:06.231548 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
308 12:24:06.238067 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
309 12:24:06.241135 CPU: AES supported, TXT NOT supported, VT supported
310 12:24:06.248192 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
311 12:24:06.251200 PCH: device id 0284 (rev 00) is Cometlake-U Premium
312 12:24:06.258178 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
313 12:24:06.261301 VBOOT: Loading verstage.
314 12:24:06.264443 FMAP: Found "FLASH" version 1.1 at 0xc04000.
315 12:24:06.271065 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
316 12:24:06.274284 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
317 12:24:06.278083 CBFS @ c08000 size 3f8000
318 12:24:06.284775 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
319 12:24:06.287758 CBFS: Locating 'fallback/verstage'
320 12:24:06.291420 CBFS: Found @ offset 10fb80 size 1072c
321 12:24:06.291526
322 12:24:06.291609
323 12:24:06.304780 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
324 12:24:06.318578 Probing TPM: . done!
325 12:24:06.321813 TPM ready after 0 ms
326 12:24:06.324931 Connected to device vid:did:rid of 1ae0:0028:00
327 12:24:06.335275 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
328 12:24:06.338371 Initialized TPM device CR50 revision 0
329 12:24:06.382904 tlcl_send_startup: Startup return code is 0
330 12:24:06.383052 TPM: setup succeeded
331 12:24:06.395514 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
332 12:24:06.399797 Chrome EC: UHEPI supported
333 12:24:06.402749 Phase 1
334 12:24:06.406348 FMAP: area GBB found @ c05000 (12288 bytes)
335 12:24:06.412501 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
336 12:24:06.416211 Phase 2
337 12:24:06.416308 Phase 3
338 12:24:06.419453 FMAP: area GBB found @ c05000 (12288 bytes)
339 12:24:06.426106 VB2:vb2_report_dev_firmware() This is developer signed firmware
340 12:24:06.432511 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
341 12:24:06.435810 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
342 12:24:06.442468 VB2:vb2_verify_keyblock() Checking keyblock signature...
343 12:24:06.458222 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
344 12:24:06.461877 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
345 12:24:06.468254 VB2:vb2_verify_fw_preamble() Verifying preamble.
346 12:24:06.472321 Phase 4
347 12:24:06.475647 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
348 12:24:06.482582 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
349 12:24:06.662081 VB2:vb2_rsa_verify_digest() Digest check failed!
350 12:24:06.668360 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
351 12:24:06.668465 Saving nvdata
352 12:24:06.672099 Reboot requested (10020007)
353 12:24:06.675334 board_reset() called!
354 12:24:06.675440 full_reset() called!
355 12:24:11.184961
356 12:24:11.185102
357 12:24:11.195405 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
358 12:24:11.198594 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
359 12:24:11.205259 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
360 12:24:11.208391 CPU: AES supported, TXT NOT supported, VT supported
361 12:24:11.215260 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
362 12:24:11.218365 PCH: device id 0284 (rev 00) is Cometlake-U Premium
363 12:24:11.225140 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
364 12:24:11.228794 VBOOT: Loading verstage.
365 12:24:11.231750 FMAP: Found "FLASH" version 1.1 at 0xc04000.
366 12:24:11.238502 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
367 12:24:11.241623 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
368 12:24:11.244946 CBFS @ c08000 size 3f8000
369 12:24:11.251445 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
370 12:24:11.254567 CBFS: Locating 'fallback/verstage'
371 12:24:11.258318 CBFS: Found @ offset 10fb80 size 1072c
372 12:24:11.261957
373 12:24:11.262047
374 12:24:11.271711 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
375 12:24:11.286225 Probing TPM: . done!
376 12:24:11.289346 TPM ready after 0 ms
377 12:24:11.292520 Connected to device vid:did:rid of 1ae0:0028:00
378 12:24:11.302967 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
379 12:24:11.306783 Initialized TPM device CR50 revision 0
380 12:24:11.350764 tlcl_send_startup: Startup return code is 0
381 12:24:11.350904 TPM: setup succeeded
382 12:24:11.363380 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
383 12:24:11.367578 Chrome EC: UHEPI supported
384 12:24:11.370867 Phase 1
385 12:24:11.374197 FMAP: area GBB found @ c05000 (12288 bytes)
386 12:24:11.380436 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
387 12:24:11.387451 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
388 12:24:11.390767 Recovery requested (1009000e)
389 12:24:11.396556 Saving nvdata
390 12:24:11.402487 tlcl_extend: response is 0
391 12:24:11.411623 tlcl_extend: response is 0
392 12:24:11.418451 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
393 12:24:11.421409 CBFS @ c08000 size 3f8000
394 12:24:11.428585 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
395 12:24:11.431808 CBFS: Locating 'fallback/romstage'
396 12:24:11.434752 CBFS: Found @ offset 80 size 145fc
397 12:24:11.438454 Accumulated console time in verstage 98 ms
398 12:24:11.438544
399 12:24:11.438613
400 12:24:11.451652 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
401 12:24:11.457789 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
402 12:24:11.461377 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
403 12:24:11.464418 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
404 12:24:11.471435 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
405 12:24:11.474603 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
406 12:24:11.477478 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
407 12:24:11.481173 TCO_STS: 0000 0000
408 12:24:11.484626 GEN_PMCON: e0015238 00000200
409 12:24:11.487528 GBLRST_CAUSE: 00000000 00000000
410 12:24:11.487620 prev_sleep_state 5
411 12:24:11.491435 Boot Count incremented to 58799
412 12:24:11.497824 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
413 12:24:11.501237 CBFS @ c08000 size 3f8000
414 12:24:11.508245 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
415 12:24:11.508404 CBFS: Locating 'fspm.bin'
416 12:24:11.514489 CBFS: Found @ offset 5ffc0 size 71000
417 12:24:11.517825 Chrome EC: UHEPI supported
418 12:24:11.524222 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
419 12:24:11.528228 Probing TPM: done!
420 12:24:11.534811 Connected to device vid:did:rid of 1ae0:0028:00
421 12:24:11.544833 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
422 12:24:11.550726 Initialized TPM device CR50 revision 0
423 12:24:11.559665 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
424 12:24:11.566000 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
425 12:24:11.569209 MRC cache found, size 1948
426 12:24:11.572793 bootmode is set to: 2
427 12:24:11.576071 PRMRR disabled by config.
428 12:24:11.579260 SPD INDEX = 1
429 12:24:11.582509 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
430 12:24:11.585986 CBFS @ c08000 size 3f8000
431 12:24:11.592341 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
432 12:24:11.592483 CBFS: Locating 'spd.bin'
433 12:24:11.596087 CBFS: Found @ offset 5fb80 size 400
434 12:24:11.599129 SPD: module type is LPDDR3
435 12:24:11.602366 SPD: module part is
436 12:24:11.609176 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
437 12:24:11.612589 SPD: device width 4 bits, bus width 8 bits
438 12:24:11.615793 SPD: module size is 4096 MB (per channel)
439 12:24:11.619225 memory slot: 0 configuration done.
440 12:24:11.622503 memory slot: 2 configuration done.
441 12:24:11.673251 CBMEM:
442 12:24:11.677206 IMD: root @ 99fff000 254 entries.
443 12:24:11.679907 IMD: root @ 99ffec00 62 entries.
444 12:24:11.683527 External stage cache:
445 12:24:11.686805 IMD: root @ 9abff000 254 entries.
446 12:24:11.689920 IMD: root @ 9abfec00 62 entries.
447 12:24:11.692958 Chrome EC: clear events_b mask to 0x0000000020004000
448 12:24:11.709282 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
449 12:24:11.722113 tlcl_write: response is 0
450 12:24:11.731361 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
451 12:24:11.738417 MRC: TPM MRC hash updated successfully.
452 12:24:11.738538 2 DIMMs found
453 12:24:11.741229 SMM Memory Map
454 12:24:11.744418 SMRAM : 0x9a000000 0x1000000
455 12:24:11.748257 Subregion 0: 0x9a000000 0xa00000
456 12:24:11.751696 Subregion 1: 0x9aa00000 0x200000
457 12:24:11.754897 Subregion 2: 0x9ac00000 0x400000
458 12:24:11.758330 top_of_ram = 0x9a000000
459 12:24:11.761754 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
460 12:24:11.768150 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
461 12:24:11.771409 MTRR Range: Start=ff000000 End=0 (Size 1000000)
462 12:24:11.777622 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
463 12:24:11.781307 CBFS @ c08000 size 3f8000
464 12:24:11.784511 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
465 12:24:11.787425 CBFS: Locating 'fallback/postcar'
466 12:24:11.794064 CBFS: Found @ offset 107000 size 4b44
467 12:24:11.800789 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
468 12:24:11.810741 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
469 12:24:11.813758 Processing 180 relocs. Offset value of 0x97c0c000
470 12:24:11.822620 Accumulated console time in romstage 286 ms
471 12:24:11.822712
472 12:24:11.822801
473 12:24:11.832492 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
474 12:24:11.839269 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
475 12:24:11.842536 CBFS @ c08000 size 3f8000
476 12:24:11.845750 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
477 12:24:11.852211 CBFS: Locating 'fallback/ramstage'
478 12:24:11.855515 CBFS: Found @ offset 43380 size 1b9e8
479 12:24:11.862064 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
480 12:24:11.894037 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
481 12:24:11.897093 Processing 3976 relocs. Offset value of 0x98db0000
482 12:24:11.903729 Accumulated console time in postcar 52 ms
483 12:24:11.903833
484 12:24:11.903906
485 12:24:11.913835 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
486 12:24:11.920509 FMAP: area RO_VPD found @ c00000 (16384 bytes)
487 12:24:11.924132 WARNING: RO_VPD is uninitialized or empty.
488 12:24:11.927327 FMAP: area RW_VPD found @ af8000 (8192 bytes)
489 12:24:11.933825 FMAP: area RW_VPD found @ af8000 (8192 bytes)
490 12:24:11.933906 Normal boot.
491 12:24:11.940668 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
492 12:24:11.943505 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
493 12:24:11.946843 CBFS @ c08000 size 3f8000
494 12:24:11.953914 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
495 12:24:11.956944 CBFS: Locating 'cpu_microcode_blob.bin'
496 12:24:11.960212 CBFS: Found @ offset 14700 size 2ec00
497 12:24:11.963483 microcode: sig=0x806ec pf=0x4 revision=0xc9
498 12:24:11.966720 Skip microcode update
499 12:24:11.973709 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
500 12:24:11.973820 CBFS @ c08000 size 3f8000
501 12:24:11.980204 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
502 12:24:11.983354 CBFS: Locating 'fsps.bin'
503 12:24:11.986702 CBFS: Found @ offset d1fc0 size 35000
504 12:24:12.012347 Detected 4 core, 8 thread CPU.
505 12:24:12.015513 Setting up SMI for CPU
506 12:24:12.018672 IED base = 0x9ac00000
507 12:24:12.018785 IED size = 0x00400000
508 12:24:12.022425 Will perform SMM setup.
509 12:24:12.029075 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
510 12:24:12.035234 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
511 12:24:12.039171 Processing 16 relocs. Offset value of 0x00030000
512 12:24:12.042219 Attempting to start 7 APs
513 12:24:12.046018 Waiting for 10ms after sending INIT.
514 12:24:12.061836 Waiting for 1st SIPI to complete...done.
515 12:24:12.061925 AP: slot 2 apic_id 5.
516 12:24:12.065252 AP: slot 5 apic_id 4.
517 12:24:12.068994 AP: slot 3 apic_id 1.
518 12:24:12.072268 Waiting for 2nd SIPI to complete...done.
519 12:24:12.075423 AP: slot 6 apic_id 6.
520 12:24:12.075510 AP: slot 7 apic_id 7.
521 12:24:12.078633 AP: slot 4 apic_id 3.
522 12:24:12.081945 AP: slot 1 apic_id 2.
523 12:24:12.088457 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
524 12:24:12.094828 Processing 13 relocs. Offset value of 0x00038000
525 12:24:12.101819 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
526 12:24:12.104895 Installing SMM handler to 0x9a000000
527 12:24:12.111780 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
528 12:24:12.118561 Processing 658 relocs. Offset value of 0x9a010000
529 12:24:12.124820 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
530 12:24:12.128023 Processing 13 relocs. Offset value of 0x9a008000
531 12:24:12.134801 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
532 12:24:12.141382 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
533 12:24:12.147825 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
534 12:24:12.151568 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
535 12:24:12.158176 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
536 12:24:12.164453 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
537 12:24:12.167714 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
538 12:24:12.174776 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
539 12:24:12.178068 Clearing SMI status registers
540 12:24:12.181338 SMI_STS: PM1
541 12:24:12.181472 PM1_STS: PWRBTN
542 12:24:12.185219 TCO_STS: SECOND_TO
543 12:24:12.188385 New SMBASE 0x9a000000
544 12:24:12.191649 In relocation handler: CPU 0
545 12:24:12.194854 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
546 12:24:12.198105 Writing SMRR. base = 0x9a000006, mask=0xff000800
547 12:24:12.201145 Relocation complete.
548 12:24:12.204753 New SMBASE 0x99fff400
549 12:24:12.204877 In relocation handler: CPU 3
550 12:24:12.211680 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
551 12:24:12.214782 Writing SMRR. base = 0x9a000006, mask=0xff000800
552 12:24:12.218397 Relocation complete.
553 12:24:12.221588 New SMBASE 0x99fffc00
554 12:24:12.221697 In relocation handler: CPU 1
555 12:24:12.228205 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
556 12:24:12.231375 Writing SMRR. base = 0x9a000006, mask=0xff000800
557 12:24:12.234520 Relocation complete.
558 12:24:12.234631 New SMBASE 0x99fff000
559 12:24:12.238332 In relocation handler: CPU 4
560 12:24:12.244534 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
561 12:24:12.248376 Writing SMRR. base = 0x9a000006, mask=0xff000800
562 12:24:12.251387 Relocation complete.
563 12:24:12.251496 New SMBASE 0x99ffec00
564 12:24:12.254634 In relocation handler: CPU 5
565 12:24:12.257802 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
566 12:24:12.265048 Writing SMRR. base = 0x9a000006, mask=0xff000800
567 12:24:12.268197 Relocation complete.
568 12:24:12.268314 New SMBASE 0x99fff800
569 12:24:12.271439 In relocation handler: CPU 2
570 12:24:12.274571 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
571 12:24:12.280955 Writing SMRR. base = 0x9a000006, mask=0xff000800
572 12:24:12.284813 Relocation complete.
573 12:24:12.284917 New SMBASE 0x99ffe800
574 12:24:12.287905 In relocation handler: CPU 6
575 12:24:12.291272 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
576 12:24:12.297805 Writing SMRR. base = 0x9a000006, mask=0xff000800
577 12:24:12.297952 Relocation complete.
578 12:24:12.301187 New SMBASE 0x99ffe400
579 12:24:12.304355 In relocation handler: CPU 7
580 12:24:12.307592 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
581 12:24:12.314561 Writing SMRR. base = 0x9a000006, mask=0xff000800
582 12:24:12.314683 Relocation complete.
583 12:24:12.317567 Initializing CPU #0
584 12:24:12.321419 CPU: vendor Intel device 806ec
585 12:24:12.324593 CPU: family 06, model 8e, stepping 0c
586 12:24:12.327695 Clearing out pending MCEs
587 12:24:12.331359 Setting up local APIC...
588 12:24:12.331465 apic_id: 0x00 done.
589 12:24:12.334386 Turbo is available but hidden
590 12:24:12.338169 Turbo is available and visible
591 12:24:12.341467 VMX status: enabled
592 12:24:12.344611 IA32_FEATURE_CONTROL status: locked
593 12:24:12.347797 Skip microcode update
594 12:24:12.347886 CPU #0 initialized
595 12:24:12.350839 Initializing CPU #3
596 12:24:12.350921 Initializing CPU #2
597 12:24:12.354217 Initializing CPU #5
598 12:24:12.357802 CPU: vendor Intel device 806ec
599 12:24:12.360967 CPU: family 06, model 8e, stepping 0c
600 12:24:12.364298 CPU: vendor Intel device 806ec
601 12:24:12.367625 CPU: family 06, model 8e, stepping 0c
602 12:24:12.370839 Clearing out pending MCEs
603 12:24:12.373879 Initializing CPU #4
604 12:24:12.374103 Initializing CPU #1
605 12:24:12.377321 Initializing CPU #7
606 12:24:12.380579 Initializing CPU #6
607 12:24:12.383901 CPU: vendor Intel device 806ec
608 12:24:12.387469 CPU: family 06, model 8e, stepping 0c
609 12:24:12.391178 CPU: vendor Intel device 806ec
610 12:24:12.394350 CPU: family 06, model 8e, stepping 0c
611 12:24:12.397051 Clearing out pending MCEs
612 12:24:12.397136 Clearing out pending MCEs
613 12:24:12.400381 Setting up local APIC...
614 12:24:12.403715 Setting up local APIC...
615 12:24:12.407049 CPU: vendor Intel device 806ec
616 12:24:12.410354 CPU: family 06, model 8e, stepping 0c
617 12:24:12.413630 CPU: vendor Intel device 806ec
618 12:24:12.417293 CPU: family 06, model 8e, stepping 0c
619 12:24:12.420495 Clearing out pending MCEs
620 12:24:12.423437 Clearing out pending MCEs
621 12:24:12.423559 Setting up local APIC...
622 12:24:12.427358 apic_id: 0x07 done.
623 12:24:12.430367 Setting up local APIC...
624 12:24:12.433251 apic_id: 0x03 done.
625 12:24:12.433363 Setting up local APIC...
626 12:24:12.436998 apic_id: 0x01 done.
627 12:24:12.439925 apic_id: 0x02 done.
628 12:24:12.440057 VMX status: enabled
629 12:24:12.443551 VMX status: enabled
630 12:24:12.446761 IA32_FEATURE_CONTROL status: locked
631 12:24:12.449996 IA32_FEATURE_CONTROL status: locked
632 12:24:12.453793 Skip microcode update
633 12:24:12.453928 Skip microcode update
634 12:24:12.456862 CPU #4 initialized
635 12:24:12.460116 CPU #1 initialized
636 12:24:12.460200 CPU: vendor Intel device 806ec
637 12:24:12.466302 CPU: family 06, model 8e, stepping 0c
638 12:24:12.466391 Clearing out pending MCEs
639 12:24:12.470052 Clearing out pending MCEs
640 12:24:12.473337 Setting up local APIC...
641 12:24:12.476412 apic_id: 0x06 done.
642 12:24:12.476505 VMX status: enabled
643 12:24:12.479591 VMX status: enabled
644 12:24:12.483483 IA32_FEATURE_CONTROL status: locked
645 12:24:12.486171 IA32_FEATURE_CONTROL status: locked
646 12:24:12.489483 Skip microcode update
647 12:24:12.489598 Skip microcode update
648 12:24:12.492757 CPU #7 initialized
649 12:24:12.496688 CPU #6 initialized
650 12:24:12.496807 apic_id: 0x05 done.
651 12:24:12.500047 Setting up local APIC...
652 12:24:12.503124 VMX status: enabled
653 12:24:12.503232 VMX status: enabled
654 12:24:12.506468 apic_id: 0x04 done.
655 12:24:12.509650 IA32_FEATURE_CONTROL status: locked
656 12:24:12.513127 VMX status: enabled
657 12:24:12.516375 IA32_FEATURE_CONTROL status: locked
658 12:24:12.519501 IA32_FEATURE_CONTROL status: locked
659 12:24:12.519616 Skip microcode update
660 12:24:12.522731 Skip microcode update
661 12:24:12.525900 CPU #2 initialized
662 12:24:12.526008 CPU #5 initialized
663 12:24:12.529355 Skip microcode update
664 12:24:12.532744 CPU #3 initialized
665 12:24:12.535924 bsp_do_flight_plan done after 462 msecs.
666 12:24:12.538950 CPU: frequency set to 4200 MHz
667 12:24:12.539079 Enabling SMIs.
668 12:24:12.542651 Locking SMM.
669 12:24:12.556658 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
670 12:24:12.560284 CBFS @ c08000 size 3f8000
671 12:24:12.566410 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
672 12:24:12.566499 CBFS: Locating 'vbt.bin'
673 12:24:12.569729 CBFS: Found @ offset 5f5c0 size 499
674 12:24:12.577031 Found a VBT of 4608 bytes after decompression
675 12:24:12.761287 Display FSP Version Info HOB
676 12:24:12.764349 Reference Code - CPU = 9.0.1e.30
677 12:24:12.768030 uCode Version = 0.0.0.ca
678 12:24:12.771229 TXT ACM version = ff.ff.ff.ffff
679 12:24:12.774421 Display FSP Version Info HOB
680 12:24:12.777585 Reference Code - ME = 9.0.1e.30
681 12:24:12.781412 MEBx version = 0.0.0.0
682 12:24:12.784590 ME Firmware Version = Consumer SKU
683 12:24:12.787820 Display FSP Version Info HOB
684 12:24:12.790977 Reference Code - CML PCH = 9.0.1e.30
685 12:24:12.794499 PCH-CRID Status = Disabled
686 12:24:12.797861 PCH-CRID Original Value = ff.ff.ff.ffff
687 12:24:12.801087 PCH-CRID New Value = ff.ff.ff.ffff
688 12:24:12.804431 OPROM - RST - RAID = ff.ff.ff.ffff
689 12:24:12.808043 ChipsetInit Base Version = ff.ff.ff.ffff
690 12:24:12.810847 ChipsetInit Oem Version = ff.ff.ff.ffff
691 12:24:12.814328 Display FSP Version Info HOB
692 12:24:12.820798 Reference Code - SA - System Agent = 9.0.1e.30
693 12:24:12.824154 Reference Code - MRC = 0.7.1.6c
694 12:24:12.824244 SA - PCIe Version = 9.0.1e.30
695 12:24:12.827544 SA-CRID Status = Disabled
696 12:24:12.830843 SA-CRID Original Value = 0.0.0.c
697 12:24:12.834347 SA-CRID New Value = 0.0.0.c
698 12:24:12.837547 OPROM - VBIOS = ff.ff.ff.ffff
699 12:24:12.840837 RTC Init
700 12:24:12.844301 Set power on after power failure.
701 12:24:12.844417 Disabling Deep S3
702 12:24:12.847294 Disabling Deep S3
703 12:24:12.847405 Disabling Deep S4
704 12:24:12.850510 Disabling Deep S4
705 12:24:12.850626 Disabling Deep S5
706 12:24:12.853672 Disabling Deep S5
707 12:24:12.860748 BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 195 exit 1
708 12:24:12.860848 Enumerating buses...
709 12:24:12.867132 Show all devs... Before device enumeration.
710 12:24:12.867256 Root Device: enabled 1
711 12:24:12.870719 CPU_CLUSTER: 0: enabled 1
712 12:24:12.873857 DOMAIN: 0000: enabled 1
713 12:24:12.877135 APIC: 00: enabled 1
714 12:24:12.877249 PCI: 00:00.0: enabled 1
715 12:24:12.880281 PCI: 00:02.0: enabled 1
716 12:24:12.884056 PCI: 00:04.0: enabled 0
717 12:24:12.887255 PCI: 00:05.0: enabled 0
718 12:24:12.887363 PCI: 00:12.0: enabled 1
719 12:24:12.890469 PCI: 00:12.5: enabled 0
720 12:24:12.893819 PCI: 00:12.6: enabled 0
721 12:24:12.897085 PCI: 00:14.0: enabled 1
722 12:24:12.897199 PCI: 00:14.1: enabled 0
723 12:24:12.900170 PCI: 00:14.3: enabled 1
724 12:24:12.903782 PCI: 00:14.5: enabled 0
725 12:24:12.903866 PCI: 00:15.0: enabled 1
726 12:24:12.906868 PCI: 00:15.1: enabled 1
727 12:24:12.910393 PCI: 00:15.2: enabled 0
728 12:24:12.913420 PCI: 00:15.3: enabled 0
729 12:24:12.913527 PCI: 00:16.0: enabled 1
730 12:24:12.916906 PCI: 00:16.1: enabled 0
731 12:24:12.920188 PCI: 00:16.2: enabled 0
732 12:24:12.923450 PCI: 00:16.3: enabled 0
733 12:24:12.923530 PCI: 00:16.4: enabled 0
734 12:24:12.926804 PCI: 00:16.5: enabled 0
735 12:24:12.930271 PCI: 00:17.0: enabled 1
736 12:24:12.933449 PCI: 00:19.0: enabled 1
737 12:24:12.933529 PCI: 00:19.1: enabled 0
738 12:24:12.936610 PCI: 00:19.2: enabled 0
739 12:24:12.939727 PCI: 00:1a.0: enabled 0
740 12:24:12.939814 PCI: 00:1c.0: enabled 0
741 12:24:12.943073 PCI: 00:1c.1: enabled 0
742 12:24:12.946546 PCI: 00:1c.2: enabled 0
743 12:24:12.949835 PCI: 00:1c.3: enabled 0
744 12:24:12.949948 PCI: 00:1c.4: enabled 0
745 12:24:12.953144 PCI: 00:1c.5: enabled 0
746 12:24:12.956493 PCI: 00:1c.6: enabled 0
747 12:24:12.959966 PCI: 00:1c.7: enabled 0
748 12:24:12.960048 PCI: 00:1d.0: enabled 1
749 12:24:12.963145 PCI: 00:1d.1: enabled 0
750 12:24:12.966174 PCI: 00:1d.2: enabled 0
751 12:24:12.969604 PCI: 00:1d.3: enabled 0
752 12:24:12.969688 PCI: 00:1d.4: enabled 0
753 12:24:12.972608 PCI: 00:1d.5: enabled 1
754 12:24:12.976587 PCI: 00:1e.0: enabled 1
755 12:24:12.979851 PCI: 00:1e.1: enabled 0
756 12:24:12.979935 PCI: 00:1e.2: enabled 1
757 12:24:12.983298 PCI: 00:1e.3: enabled 1
758 12:24:12.986384 PCI: 00:1f.0: enabled 1
759 12:24:12.986498 PCI: 00:1f.1: enabled 1
760 12:24:12.989648 PCI: 00:1f.2: enabled 1
761 12:24:12.992771 PCI: 00:1f.3: enabled 1
762 12:24:12.995899 PCI: 00:1f.4: enabled 1
763 12:24:12.996009 PCI: 00:1f.5: enabled 1
764 12:24:12.999268 PCI: 00:1f.6: enabled 0
765 12:24:13.002723 USB0 port 0: enabled 1
766 12:24:13.002818 I2C: 00:15: enabled 1
767 12:24:13.005790 I2C: 00:5d: enabled 1
768 12:24:13.009741 GENERIC: 0.0: enabled 1
769 12:24:13.012491 I2C: 00:1a: enabled 1
770 12:24:13.012580 I2C: 00:38: enabled 1
771 12:24:13.016349 I2C: 00:39: enabled 1
772 12:24:13.019419 I2C: 00:3a: enabled 1
773 12:24:13.019523 I2C: 00:3b: enabled 1
774 12:24:13.022646 PCI: 00:00.0: enabled 1
775 12:24:13.025897 SPI: 00: enabled 1
776 12:24:13.025980 SPI: 01: enabled 1
777 12:24:13.029143 PNP: 0c09.0: enabled 1
778 12:24:13.032346 USB2 port 0: enabled 1
779 12:24:13.032427 USB2 port 1: enabled 1
780 12:24:13.035671 USB2 port 2: enabled 0
781 12:24:13.039459 USB2 port 3: enabled 0
782 12:24:13.039569 USB2 port 5: enabled 0
783 12:24:13.042664 USB2 port 6: enabled 1
784 12:24:13.045953 USB2 port 9: enabled 1
785 12:24:13.049214 USB3 port 0: enabled 1
786 12:24:13.049297 USB3 port 1: enabled 1
787 12:24:13.052446 USB3 port 2: enabled 1
788 12:24:13.055778 USB3 port 3: enabled 1
789 12:24:13.055882 USB3 port 4: enabled 0
790 12:24:13.058920 APIC: 02: enabled 1
791 12:24:13.062203 APIC: 05: enabled 1
792 12:24:13.062291 APIC: 01: enabled 1
793 12:24:13.066077 APIC: 03: enabled 1
794 12:24:13.066157 APIC: 04: enabled 1
795 12:24:13.068919 APIC: 06: enabled 1
796 12:24:13.072265 APIC: 07: enabled 1
797 12:24:13.072374 Compare with tree...
798 12:24:13.075802 Root Device: enabled 1
799 12:24:13.078826 CPU_CLUSTER: 0: enabled 1
800 12:24:13.081890 APIC: 00: enabled 1
801 12:24:13.081972 APIC: 02: enabled 1
802 12:24:13.085175 APIC: 05: enabled 1
803 12:24:13.088567 APIC: 01: enabled 1
804 12:24:13.088651 APIC: 03: enabled 1
805 12:24:13.091883 APIC: 04: enabled 1
806 12:24:13.095645 APIC: 06: enabled 1
807 12:24:13.095732 APIC: 07: enabled 1
808 12:24:13.098878 DOMAIN: 0000: enabled 1
809 12:24:13.102086 PCI: 00:00.0: enabled 1
810 12:24:13.105344 PCI: 00:02.0: enabled 1
811 12:24:13.105429 PCI: 00:04.0: enabled 0
812 12:24:13.108624 PCI: 00:05.0: enabled 0
813 12:24:13.111803 PCI: 00:12.0: enabled 1
814 12:24:13.115427 PCI: 00:12.5: enabled 0
815 12:24:13.118623 PCI: 00:12.6: enabled 0
816 12:24:13.118700 PCI: 00:14.0: enabled 1
817 12:24:13.122185 USB0 port 0: enabled 1
818 12:24:13.125437 USB2 port 0: enabled 1
819 12:24:13.128598 USB2 port 1: enabled 1
820 12:24:13.131794 USB2 port 2: enabled 0
821 12:24:13.131907 USB2 port 3: enabled 0
822 12:24:13.135129 USB2 port 5: enabled 0
823 12:24:13.138439 USB2 port 6: enabled 1
824 12:24:13.141694 USB2 port 9: enabled 1
825 12:24:13.144972 USB3 port 0: enabled 1
826 12:24:13.148256 USB3 port 1: enabled 1
827 12:24:13.148334 USB3 port 2: enabled 1
828 12:24:13.151551 USB3 port 3: enabled 1
829 12:24:13.155470 USB3 port 4: enabled 0
830 12:24:13.158813 PCI: 00:14.1: enabled 0
831 12:24:13.162142 PCI: 00:14.3: enabled 1
832 12:24:13.162223 PCI: 00:14.5: enabled 0
833 12:24:13.164840 PCI: 00:15.0: enabled 1
834 12:24:13.168143 I2C: 00:15: enabled 1
835 12:24:13.171973 PCI: 00:15.1: enabled 1
836 12:24:13.172079 I2C: 00:5d: enabled 1
837 12:24:13.175237 GENERIC: 0.0: enabled 1
838 12:24:13.178033 PCI: 00:15.2: enabled 0
839 12:24:13.181673 PCI: 00:15.3: enabled 0
840 12:24:13.184783 PCI: 00:16.0: enabled 1
841 12:24:13.184897 PCI: 00:16.1: enabled 0
842 12:24:13.188393 PCI: 00:16.2: enabled 0
843 12:24:13.191343 PCI: 00:16.3: enabled 0
844 12:24:13.195204 PCI: 00:16.4: enabled 0
845 12:24:13.198378 PCI: 00:16.5: enabled 0
846 12:24:13.198457 PCI: 00:17.0: enabled 1
847 12:24:13.201673 PCI: 00:19.0: enabled 1
848 12:24:13.204679 I2C: 00:1a: enabled 1
849 12:24:13.208101 I2C: 00:38: enabled 1
850 12:24:13.211247 I2C: 00:39: enabled 1
851 12:24:13.211352 I2C: 00:3a: enabled 1
852 12:24:13.214503 I2C: 00:3b: enabled 1
853 12:24:13.218382 PCI: 00:19.1: enabled 0
854 12:24:13.221687 PCI: 00:19.2: enabled 0
855 12:24:13.221765 PCI: 00:1a.0: enabled 0
856 12:24:13.224678 PCI: 00:1c.0: enabled 0
857 12:24:13.227872 PCI: 00:1c.1: enabled 0
858 12:24:13.231711 PCI: 00:1c.2: enabled 0
859 12:24:13.234456 PCI: 00:1c.3: enabled 0
860 12:24:13.234537 PCI: 00:1c.4: enabled 0
861 12:24:13.237777 PCI: 00:1c.5: enabled 0
862 12:24:13.241168 PCI: 00:1c.6: enabled 0
863 12:24:13.244364 PCI: 00:1c.7: enabled 0
864 12:24:13.247475 PCI: 00:1d.0: enabled 1
865 12:24:13.247556 PCI: 00:1d.1: enabled 0
866 12:24:13.250822 PCI: 00:1d.2: enabled 0
867 12:24:13.254130 PCI: 00:1d.3: enabled 0
868 12:24:13.257336 PCI: 00:1d.4: enabled 0
869 12:24:13.261260 PCI: 00:1d.5: enabled 1
870 12:24:13.261340 PCI: 00:00.0: enabled 1
871 12:24:13.264450 PCI: 00:1e.0: enabled 1
872 12:24:13.267658 PCI: 00:1e.1: enabled 0
873 12:24:13.270917 PCI: 00:1e.2: enabled 1
874 12:24:13.270990 SPI: 00: enabled 1
875 12:24:13.274146 PCI: 00:1e.3: enabled 1
876 12:24:13.277397 SPI: 01: enabled 1
877 12:24:13.280667 PCI: 00:1f.0: enabled 1
878 12:24:13.284187 PNP: 0c09.0: enabled 1
879 12:24:13.284259 PCI: 00:1f.1: enabled 1
880 12:24:13.287208 PCI: 00:1f.2: enabled 1
881 12:24:13.290473 PCI: 00:1f.3: enabled 1
882 12:24:13.294028 PCI: 00:1f.4: enabled 1
883 12:24:13.296977 PCI: 00:1f.5: enabled 1
884 12:24:13.297065 PCI: 00:1f.6: enabled 0
885 12:24:13.300458 Root Device scanning...
886 12:24:13.304134 scan_static_bus for Root Device
887 12:24:13.307359 CPU_CLUSTER: 0 enabled
888 12:24:13.307442 DOMAIN: 0000 enabled
889 12:24:13.310558 DOMAIN: 0000 scanning...
890 12:24:13.313531 PCI: pci_scan_bus for bus 00
891 12:24:13.316746 PCI: 00:00.0 [8086/0000] ops
892 12:24:13.320042 PCI: 00:00.0 [8086/9b61] enabled
893 12:24:13.323895 PCI: 00:02.0 [8086/0000] bus ops
894 12:24:13.327177 PCI: 00:02.0 [8086/9b41] enabled
895 12:24:13.330555 PCI: 00:04.0 [8086/1903] disabled
896 12:24:13.333686 PCI: 00:08.0 [8086/1911] enabled
897 12:24:13.336799 PCI: 00:12.0 [8086/02f9] enabled
898 12:24:13.340454 PCI: 00:14.0 [8086/0000] bus ops
899 12:24:13.343686 PCI: 00:14.0 [8086/02ed] enabled
900 12:24:13.347042 PCI: 00:14.2 [8086/02ef] enabled
901 12:24:13.350278 PCI: 00:14.3 [8086/02f0] enabled
902 12:24:13.353523 PCI: 00:15.0 [8086/0000] bus ops
903 12:24:13.356946 PCI: 00:15.0 [8086/02e8] enabled
904 12:24:13.360175 PCI: 00:15.1 [8086/0000] bus ops
905 12:24:13.363540 PCI: 00:15.1 [8086/02e9] enabled
906 12:24:13.366812 PCI: 00:16.0 [8086/0000] ops
907 12:24:13.370164 PCI: 00:16.0 [8086/02e0] enabled
908 12:24:13.373471 PCI: 00:17.0 [8086/0000] ops
909 12:24:13.376771 PCI: 00:17.0 [8086/02d3] enabled
910 12:24:13.380304 PCI: 00:19.0 [8086/0000] bus ops
911 12:24:13.383471 PCI: 00:19.0 [8086/02c5] enabled
912 12:24:13.386850 PCI: 00:1d.0 [8086/0000] bus ops
913 12:24:13.390168 PCI: 00:1d.0 [8086/02b0] enabled
914 12:24:13.396701 PCI: Static device PCI: 00:1d.5 not found, disabling it.
915 12:24:13.399800 PCI: 00:1e.0 [8086/0000] ops
916 12:24:13.403099 PCI: 00:1e.0 [8086/02a8] enabled
917 12:24:13.406685 PCI: 00:1e.2 [8086/0000] bus ops
918 12:24:13.409823 PCI: 00:1e.2 [8086/02aa] enabled
919 12:24:13.412902 PCI: 00:1e.3 [8086/0000] bus ops
920 12:24:13.416540 PCI: 00:1e.3 [8086/02ab] enabled
921 12:24:13.419822 PCI: 00:1f.0 [8086/0000] bus ops
922 12:24:13.422831 PCI: 00:1f.0 [8086/0284] enabled
923 12:24:13.426595 PCI: Static device PCI: 00:1f.1 not found, disabling it.
924 12:24:13.433237 PCI: Static device PCI: 00:1f.2 not found, disabling it.
925 12:24:13.436474 PCI: 00:1f.3 [8086/0000] bus ops
926 12:24:13.439772 PCI: 00:1f.3 [8086/02c8] enabled
927 12:24:13.442855 PCI: 00:1f.4 [8086/0000] bus ops
928 12:24:13.445990 PCI: 00:1f.4 [8086/02a3] enabled
929 12:24:13.449288 PCI: 00:1f.5 [8086/0000] bus ops
930 12:24:13.452464 PCI: 00:1f.5 [8086/02a4] enabled
931 12:24:13.456276 PCI: Leftover static devices:
932 12:24:13.456391 PCI: 00:05.0
933 12:24:13.459571 PCI: 00:12.5
934 12:24:13.459682 PCI: 00:12.6
935 12:24:13.462862 PCI: 00:14.1
936 12:24:13.462978 PCI: 00:14.5
937 12:24:13.463074 PCI: 00:15.2
938 12:24:13.466245 PCI: 00:15.3
939 12:24:13.466354 PCI: 00:16.1
940 12:24:13.469486 PCI: 00:16.2
941 12:24:13.469564 PCI: 00:16.3
942 12:24:13.472979 PCI: 00:16.4
943 12:24:13.473093 PCI: 00:16.5
944 12:24:13.473188 PCI: 00:19.1
945 12:24:13.475636 PCI: 00:19.2
946 12:24:13.475735 PCI: 00:1a.0
947 12:24:13.479533 PCI: 00:1c.0
948 12:24:13.479618 PCI: 00:1c.1
949 12:24:13.479694 PCI: 00:1c.2
950 12:24:13.482832 PCI: 00:1c.3
951 12:24:13.482908 PCI: 00:1c.4
952 12:24:13.486046 PCI: 00:1c.5
953 12:24:13.486162 PCI: 00:1c.6
954 12:24:13.486260 PCI: 00:1c.7
955 12:24:13.489463 PCI: 00:1d.1
956 12:24:13.489540 PCI: 00:1d.2
957 12:24:13.492601 PCI: 00:1d.3
958 12:24:13.492701 PCI: 00:1d.4
959 12:24:13.495952 PCI: 00:1d.5
960 12:24:13.496026 PCI: 00:1e.1
961 12:24:13.496090 PCI: 00:1f.1
962 12:24:13.499206 PCI: 00:1f.2
963 12:24:13.499285 PCI: 00:1f.6
964 12:24:13.502232 PCI: Check your devicetree.cb.
965 12:24:13.505935 PCI: 00:02.0 scanning...
966 12:24:13.509057 scan_generic_bus for PCI: 00:02.0
967 12:24:13.512186 scan_generic_bus for PCI: 00:02.0 done
968 12:24:13.519191 scan_bus: scanning of bus PCI: 00:02.0 took 10184 usecs
969 12:24:13.522271 PCI: 00:14.0 scanning...
970 12:24:13.525743 scan_static_bus for PCI: 00:14.0
971 12:24:13.525833 USB0 port 0 enabled
972 12:24:13.528871 USB0 port 0 scanning...
973 12:24:13.532586 scan_static_bus for USB0 port 0
974 12:24:13.535630 USB2 port 0 enabled
975 12:24:13.535716 USB2 port 1 enabled
976 12:24:13.538804 USB2 port 2 disabled
977 12:24:13.542118 USB2 port 3 disabled
978 12:24:13.542206 USB2 port 5 disabled
979 12:24:13.545343 USB2 port 6 enabled
980 12:24:13.549122 USB2 port 9 enabled
981 12:24:13.549236 USB3 port 0 enabled
982 12:24:13.552348 USB3 port 1 enabled
983 12:24:13.552460 USB3 port 2 enabled
984 12:24:13.555468 USB3 port 3 enabled
985 12:24:13.558445 USB3 port 4 disabled
986 12:24:13.558531 USB2 port 0 scanning...
987 12:24:13.561711 scan_static_bus for USB2 port 0
988 12:24:13.568777 scan_static_bus for USB2 port 0 done
989 12:24:13.572169 scan_bus: scanning of bus USB2 port 0 took 9685 usecs
990 12:24:13.575744 USB2 port 1 scanning...
991 12:24:13.578901 scan_static_bus for USB2 port 1
992 12:24:13.582268 scan_static_bus for USB2 port 1 done
993 12:24:13.588904 scan_bus: scanning of bus USB2 port 1 took 9699 usecs
994 12:24:13.588991 USB2 port 6 scanning...
995 12:24:13.592176 scan_static_bus for USB2 port 6
996 12:24:13.598221 scan_static_bus for USB2 port 6 done
997 12:24:13.602083 scan_bus: scanning of bus USB2 port 6 took 9694 usecs
998 12:24:13.605474 USB2 port 9 scanning...
999 12:24:13.608681 scan_static_bus for USB2 port 9
1000 12:24:13.611706 scan_static_bus for USB2 port 9 done
1001 12:24:13.618615 scan_bus: scanning of bus USB2 port 9 took 9703 usecs
1002 12:24:13.618703 USB3 port 0 scanning...
1003 12:24:13.621721 scan_static_bus for USB3 port 0
1004 12:24:13.628400 scan_static_bus for USB3 port 0 done
1005 12:24:13.632182 scan_bus: scanning of bus USB3 port 0 took 9694 usecs
1006 12:24:13.635329 USB3 port 1 scanning...
1007 12:24:13.638444 scan_static_bus for USB3 port 1
1008 12:24:13.641514 scan_static_bus for USB3 port 1 done
1009 12:24:13.648181 scan_bus: scanning of bus USB3 port 1 took 9702 usecs
1010 12:24:13.648295 USB3 port 2 scanning...
1011 12:24:13.651686 scan_static_bus for USB3 port 2
1012 12:24:13.658861 scan_static_bus for USB3 port 2 done
1013 12:24:13.661531 scan_bus: scanning of bus USB3 port 2 took 9702 usecs
1014 12:24:13.665343 USB3 port 3 scanning...
1015 12:24:13.668584 scan_static_bus for USB3 port 3
1016 12:24:13.671844 scan_static_bus for USB3 port 3 done
1017 12:24:13.678310 scan_bus: scanning of bus USB3 port 3 took 9705 usecs
1018 12:24:13.681711 scan_static_bus for USB0 port 0 done
1019 12:24:13.685112 scan_bus: scanning of bus USB0 port 0 took 155307 usecs
1020 12:24:13.691665 scan_static_bus for PCI: 00:14.0 done
1021 12:24:13.694969 scan_bus: scanning of bus PCI: 00:14.0 took 172923 usecs
1022 12:24:13.698407 PCI: 00:15.0 scanning...
1023 12:24:13.701746 scan_generic_bus for PCI: 00:15.0
1024 12:24:13.705274 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1025 12:24:13.711508 scan_generic_bus for PCI: 00:15.0 done
1026 12:24:13.715050 scan_bus: scanning of bus PCI: 00:15.0 took 14306 usecs
1027 12:24:13.718085 PCI: 00:15.1 scanning...
1028 12:24:13.721615 scan_generic_bus for PCI: 00:15.1
1029 12:24:13.724601 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1030 12:24:13.731578 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1031 12:24:13.735098 scan_generic_bus for PCI: 00:15.1 done
1032 12:24:13.741440 scan_bus: scanning of bus PCI: 00:15.1 took 18610 usecs
1033 12:24:13.741571 PCI: 00:19.0 scanning...
1034 12:24:13.744676 scan_generic_bus for PCI: 00:19.0
1035 12:24:13.751515 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1036 12:24:13.754765 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1037 12:24:13.758047 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1038 12:24:13.761448 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1039 12:24:13.768026 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1040 12:24:13.771180 scan_generic_bus for PCI: 00:19.0 done
1041 12:24:13.774387 scan_bus: scanning of bus PCI: 00:19.0 took 30735 usecs
1042 12:24:13.777648 PCI: 00:1d.0 scanning...
1043 12:24:13.780913 do_pci_scan_bridge for PCI: 00:1d.0
1044 12:24:13.784258 PCI: pci_scan_bus for bus 01
1045 12:24:13.787555 PCI: 01:00.0 [1c5c/1327] enabled
1046 12:24:13.790717 Enabling Common Clock Configuration
1047 12:24:13.797484 L1 Sub-State supported from root port 29
1048 12:24:13.800696 L1 Sub-State Support = 0xf
1049 12:24:13.800799 CommonModeRestoreTime = 0x28
1050 12:24:13.807445 Power On Value = 0x16, Power On Scale = 0x0
1051 12:24:13.807533 ASPM: Enabled L1
1052 12:24:13.814474 scan_bus: scanning of bus PCI: 00:1d.0 took 32767 usecs
1053 12:24:13.817819 PCI: 00:1e.2 scanning...
1054 12:24:13.821046 scan_generic_bus for PCI: 00:1e.2
1055 12:24:13.824657 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1056 12:24:13.827670 scan_generic_bus for PCI: 00:1e.2 done
1057 12:24:13.834260 scan_bus: scanning of bus PCI: 00:1e.2 took 13987 usecs
1058 12:24:13.837277 PCI: 00:1e.3 scanning...
1059 12:24:13.841040 scan_generic_bus for PCI: 00:1e.3
1060 12:24:13.844350 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1061 12:24:13.847299 scan_generic_bus for PCI: 00:1e.3 done
1062 12:24:13.854246 scan_bus: scanning of bus PCI: 00:1e.3 took 13985 usecs
1063 12:24:13.854364 PCI: 00:1f.0 scanning...
1064 12:24:13.857829 scan_static_bus for PCI: 00:1f.0
1065 12:24:13.860794 PNP: 0c09.0 enabled
1066 12:24:13.864398 scan_static_bus for PCI: 00:1f.0 done
1067 12:24:13.870795 scan_bus: scanning of bus PCI: 00:1f.0 took 12040 usecs
1068 12:24:13.873950 PCI: 00:1f.3 scanning...
1069 12:24:13.877488 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1070 12:24:13.880648 PCI: 00:1f.4 scanning...
1071 12:24:13.884881 scan_generic_bus for PCI: 00:1f.4
1072 12:24:13.887263 scan_generic_bus for PCI: 00:1f.4 done
1073 12:24:13.893851 scan_bus: scanning of bus PCI: 00:1f.4 took 10188 usecs
1074 12:24:13.897144 PCI: 00:1f.5 scanning...
1075 12:24:13.903789 scan_generic_bus for PCI: 00:1f.5
1076 12:24:13.904068 scan_generic_bus for PCI: 00:1f.5 done
1077 12:24:13.910939 scan_bus: scanning of bus PCI: 00:1f.5 took 10194 usecs
1078 12:24:13.917289 scan_bus: scanning of bus DOMAIN: 0000 took 604768 usecs
1079 12:24:13.920642 scan_static_bus for Root Device done
1080 12:24:13.923509 scan_bus: scanning of bus Root Device took 624641 usecs
1081 12:24:13.927397 done
1082 12:24:13.930645 Chrome EC: UHEPI supported
1083 12:24:13.933967 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1084 12:24:13.940612 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1085 12:24:13.946733 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1086 12:24:13.953349 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1087 12:24:13.956614 SPI flash protection: WPSW=0 SRP0=1
1088 12:24:13.963287 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1089 12:24:13.967115 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1090 12:24:13.970055 found VGA at PCI: 00:02.0
1091 12:24:13.973204 Setting up VGA for PCI: 00:02.0
1092 12:24:13.979898 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1093 12:24:13.983369 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1094 12:24:13.986307 Allocating resources...
1095 12:24:13.990129 Reading resources...
1096 12:24:13.993441 Root Device read_resources bus 0 link: 0
1097 12:24:13.996709 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1098 12:24:14.003239 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1099 12:24:14.006342 DOMAIN: 0000 read_resources bus 0 link: 0
1100 12:24:14.013557 PCI: 00:14.0 read_resources bus 0 link: 0
1101 12:24:14.016848 USB0 port 0 read_resources bus 0 link: 0
1102 12:24:14.024859 USB0 port 0 read_resources bus 0 link: 0 done
1103 12:24:14.028084 PCI: 00:14.0 read_resources bus 0 link: 0 done
1104 12:24:14.035680 PCI: 00:15.0 read_resources bus 1 link: 0
1105 12:24:14.038781 PCI: 00:15.0 read_resources bus 1 link: 0 done
1106 12:24:14.045427 PCI: 00:15.1 read_resources bus 2 link: 0
1107 12:24:14.049222 PCI: 00:15.1 read_resources bus 2 link: 0 done
1108 12:24:14.056365 PCI: 00:19.0 read_resources bus 3 link: 0
1109 12:24:14.063028 PCI: 00:19.0 read_resources bus 3 link: 0 done
1110 12:24:14.066076 PCI: 00:1d.0 read_resources bus 1 link: 0
1111 12:24:14.072984 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1112 12:24:14.076365 PCI: 00:1e.2 read_resources bus 4 link: 0
1113 12:24:14.082895 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1114 12:24:14.086615 PCI: 00:1e.3 read_resources bus 5 link: 0
1115 12:24:14.093241 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1116 12:24:14.096098 PCI: 00:1f.0 read_resources bus 0 link: 0
1117 12:24:14.102482 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1118 12:24:14.109639 DOMAIN: 0000 read_resources bus 0 link: 0 done
1119 12:24:14.112943 Root Device read_resources bus 0 link: 0 done
1120 12:24:14.116147 Done reading resources.
1121 12:24:14.119400 Show resources in subtree (Root Device)...After reading.
1122 12:24:14.125830 Root Device child on link 0 CPU_CLUSTER: 0
1123 12:24:14.129376 CPU_CLUSTER: 0 child on link 0 APIC: 00
1124 12:24:14.129461 APIC: 00
1125 12:24:14.132599 APIC: 02
1126 12:24:14.132684 APIC: 05
1127 12:24:14.135789 APIC: 01
1128 12:24:14.135873 APIC: 03
1129 12:24:14.135939 APIC: 04
1130 12:24:14.139020 APIC: 06
1131 12:24:14.139138 APIC: 07
1132 12:24:14.142808 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1133 12:24:14.195398 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1134 12:24:14.196219 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1135 12:24:14.196301 PCI: 00:00.0
1136 12:24:14.196572 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1137 12:24:14.196679 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1138 12:24:14.197455 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1139 12:24:14.240448 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1140 12:24:14.240904 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1141 12:24:14.241033 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1142 12:24:14.241916 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1143 12:24:14.242181 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1144 12:24:14.248745 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1145 12:24:14.258248 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1146 12:24:14.268247 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1147 12:24:14.274881 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1148 12:24:14.285069 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1149 12:24:14.295098 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1150 12:24:14.305061 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1151 12:24:14.314965 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1152 12:24:14.315049 PCI: 00:02.0
1153 12:24:14.328150 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 12:24:14.337624 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1155 12:24:14.344653 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1156 12:24:14.348060 PCI: 00:04.0
1157 12:24:14.348140 PCI: 00:08.0
1158 12:24:14.357359 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1159 12:24:14.361168 PCI: 00:12.0
1160 12:24:14.370604 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1161 12:24:14.374472 PCI: 00:14.0 child on link 0 USB0 port 0
1162 12:24:14.383853 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1163 12:24:14.387160 USB0 port 0 child on link 0 USB2 port 0
1164 12:24:14.390794 USB2 port 0
1165 12:24:14.390872 USB2 port 1
1166 12:24:14.394201 USB2 port 2
1167 12:24:14.394276 USB2 port 3
1168 12:24:14.397194 USB2 port 5
1169 12:24:14.400736 USB2 port 6
1170 12:24:14.400858 USB2 port 9
1171 12:24:14.404241 USB3 port 0
1172 12:24:14.404319 USB3 port 1
1173 12:24:14.407234 USB3 port 2
1174 12:24:14.407311 USB3 port 3
1175 12:24:14.410451 USB3 port 4
1176 12:24:14.410525 PCI: 00:14.2
1177 12:24:14.420217 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1178 12:24:14.430361 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1179 12:24:14.434018 PCI: 00:14.3
1180 12:24:14.443636 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1181 12:24:14.446808 PCI: 00:15.0 child on link 0 I2C: 01:15
1182 12:24:14.456960 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 12:24:14.457040 I2C: 01:15
1184 12:24:14.463334 PCI: 00:15.1 child on link 0 I2C: 02:5d
1185 12:24:14.473481 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1186 12:24:14.473563 I2C: 02:5d
1187 12:24:14.476674 GENERIC: 0.0
1188 12:24:14.476748 PCI: 00:16.0
1189 12:24:14.487043 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 12:24:14.490232 PCI: 00:17.0
1191 12:24:14.499725 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1192 12:24:14.506824 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1193 12:24:14.516228 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1194 12:24:14.523145 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1195 12:24:14.532945 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1196 12:24:14.539417 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1197 12:24:14.546547 PCI: 00:19.0 child on link 0 I2C: 03:1a
1198 12:24:14.556073 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 12:24:14.556194 I2C: 03:1a
1200 12:24:14.559204 I2C: 03:38
1201 12:24:14.559278 I2C: 03:39
1202 12:24:14.562927 I2C: 03:3a
1203 12:24:14.563002 I2C: 03:3b
1204 12:24:14.566143 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1205 12:24:14.576280 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1206 12:24:14.585908 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1207 12:24:14.596345 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1208 12:24:14.596427 PCI: 01:00.0
1209 12:24:14.605625 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1210 12:24:14.609278 PCI: 00:1e.0
1211 12:24:14.618943 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1212 12:24:14.629317 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1213 12:24:14.632458 PCI: 00:1e.2 child on link 0 SPI: 00
1214 12:24:14.642522 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1215 12:24:14.645827 SPI: 00
1216 12:24:14.648982 PCI: 00:1e.3 child on link 0 SPI: 01
1217 12:24:14.658989 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1218 12:24:14.659070 SPI: 01
1219 12:24:14.665254 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1220 12:24:14.672110 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1221 12:24:14.682261 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1222 12:24:14.682345 PNP: 0c09.0
1223 12:24:14.691849 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1224 12:24:14.695228 PCI: 00:1f.3
1225 12:24:14.704871 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1226 12:24:14.715091 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1227 12:24:14.715178 PCI: 00:1f.4
1228 12:24:14.724673 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1229 12:24:14.734799 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1230 12:24:14.734879 PCI: 00:1f.5
1231 12:24:14.744875 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1232 12:24:14.751337 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1233 12:24:14.758003 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1234 12:24:14.764395 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1235 12:24:14.767597 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1236 12:24:14.770599 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1237 12:24:14.774343 PCI: 00:17.0 18 * [0x60 - 0x67] io
1238 12:24:14.777548 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1239 12:24:14.787567 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1240 12:24:14.794033 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1241 12:24:14.800291 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1242 12:24:14.810426 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1243 12:24:14.817312 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1244 12:24:14.820451 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1245 12:24:14.826747 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1246 12:24:14.833716 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1247 12:24:14.836871 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1248 12:24:14.839782 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1249 12:24:14.846940 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1250 12:24:14.850041 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1251 12:24:14.856736 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1252 12:24:14.859864 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1253 12:24:14.866753 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1254 12:24:14.869969 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1255 12:24:14.876188 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1256 12:24:14.879962 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1257 12:24:14.886482 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1258 12:24:14.889546 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1259 12:24:14.896687 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1260 12:24:14.899825 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1261 12:24:14.906153 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1262 12:24:14.909619 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1263 12:24:14.916128 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1264 12:24:14.919188 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1265 12:24:14.926340 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1266 12:24:14.929542 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1267 12:24:14.932609 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1268 12:24:14.939235 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1269 12:24:14.949501 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1270 12:24:14.952385 avoid_fixed_resources: DOMAIN: 0000
1271 12:24:14.955917 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1272 12:24:14.962133 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1273 12:24:14.972047 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1274 12:24:14.978722 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1275 12:24:14.985132 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1276 12:24:14.995163 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1277 12:24:15.001542 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1278 12:24:15.008596 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1279 12:24:15.014752 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1280 12:24:15.024908 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1281 12:24:15.031324 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1282 12:24:15.037807 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1283 12:24:15.041510 Setting resources...
1284 12:24:15.048096 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1285 12:24:15.051171 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1286 12:24:15.054731 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1287 12:24:15.057706 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1288 12:24:15.064512 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1289 12:24:15.070956 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1290 12:24:15.074645 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1291 12:24:15.081045 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1292 12:24:15.090919 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1293 12:24:15.094061 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1294 12:24:15.100905 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1295 12:24:15.104040 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1296 12:24:15.110492 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1297 12:24:15.114281 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1298 12:24:15.120963 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1299 12:24:15.124099 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1300 12:24:15.127442 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1301 12:24:15.133832 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1302 12:24:15.137067 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1303 12:24:15.143546 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1304 12:24:15.147243 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1305 12:24:15.153453 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1306 12:24:15.157110 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1307 12:24:15.163758 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1308 12:24:15.166784 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1309 12:24:15.173471 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1310 12:24:15.176924 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1311 12:24:15.183426 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1312 12:24:15.186583 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1313 12:24:15.193424 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1314 12:24:15.196760 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1315 12:24:15.202875 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1316 12:24:15.209687 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1317 12:24:15.216135 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1318 12:24:15.223218 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1319 12:24:15.232603 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1320 12:24:15.235956 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1321 12:24:15.242491 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1322 12:24:15.249390 Root Device assign_resources, bus 0 link: 0
1323 12:24:15.252661 DOMAIN: 0000 assign_resources, bus 0 link: 0
1324 12:24:15.262575 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1325 12:24:15.269163 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1326 12:24:15.278951 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1327 12:24:15.285879 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1328 12:24:15.295461 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1329 12:24:15.302403 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1330 12:24:15.305359 PCI: 00:14.0 assign_resources, bus 0 link: 0
1331 12:24:15.312290 PCI: 00:14.0 assign_resources, bus 0 link: 0
1332 12:24:15.318759 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1333 12:24:15.328694 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1334 12:24:15.335226 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1335 12:24:15.345009 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1336 12:24:15.348022 PCI: 00:15.0 assign_resources, bus 1 link: 0
1337 12:24:15.354963 PCI: 00:15.0 assign_resources, bus 1 link: 0
1338 12:24:15.361873 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1339 12:24:15.365044 PCI: 00:15.1 assign_resources, bus 2 link: 0
1340 12:24:15.371642 PCI: 00:15.1 assign_resources, bus 2 link: 0
1341 12:24:15.378686 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1342 12:24:15.388834 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1343 12:24:15.394951 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1344 12:24:15.401437 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1345 12:24:15.411375 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1346 12:24:15.418095 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1347 12:24:15.424666 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1348 12:24:15.434670 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1349 12:24:15.437977 PCI: 00:19.0 assign_resources, bus 3 link: 0
1350 12:24:15.444833 PCI: 00:19.0 assign_resources, bus 3 link: 0
1351 12:24:15.451349 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1352 12:24:15.461427 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1353 12:24:15.471432 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1354 12:24:15.474426 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1355 12:24:15.480707 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1356 12:24:15.487970 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1357 12:24:15.494402 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1358 12:24:15.504647 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1359 12:24:15.507358 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1360 12:24:15.514350 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1361 12:24:15.520576 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1362 12:24:15.523941 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1363 12:24:15.530943 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1364 12:24:15.534805 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1365 12:24:15.540961 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1366 12:24:15.544315 LPC: Trying to open IO window from 800 size 1ff
1367 12:24:15.554125 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1368 12:24:15.560571 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1369 12:24:15.570756 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1370 12:24:15.577662 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1371 12:24:15.584314 DOMAIN: 0000 assign_resources, bus 0 link: 0
1372 12:24:15.587370 Root Device assign_resources, bus 0 link: 0
1373 12:24:15.590425 Done setting resources.
1374 12:24:15.597201 Show resources in subtree (Root Device)...After assigning values.
1375 12:24:15.600771 Root Device child on link 0 CPU_CLUSTER: 0
1376 12:24:15.604050 CPU_CLUSTER: 0 child on link 0 APIC: 00
1377 12:24:15.607135 APIC: 00
1378 12:24:15.607218 APIC: 02
1379 12:24:15.607284 APIC: 05
1380 12:24:15.610482 APIC: 01
1381 12:24:15.610565 APIC: 03
1382 12:24:15.613554 APIC: 04
1383 12:24:15.613637 APIC: 06
1384 12:24:15.613702 APIC: 07
1385 12:24:15.620396 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1386 12:24:15.630571 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1387 12:24:15.640265 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1388 12:24:15.640352 PCI: 00:00.0
1389 12:24:15.650332 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1390 12:24:15.659952 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1391 12:24:15.670308 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1392 12:24:15.679689 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1393 12:24:15.690053 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1394 12:24:15.699803 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1395 12:24:15.706557 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1396 12:24:15.716085 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1397 12:24:15.726279 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1398 12:24:15.736084 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1399 12:24:15.745896 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1400 12:24:15.752700 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1401 12:24:15.762558 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1402 12:24:15.772087 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1403 12:24:15.782118 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1404 12:24:15.792250 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1405 12:24:15.792337 PCI: 00:02.0
1406 12:24:15.805451 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1407 12:24:15.815267 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1408 12:24:15.825437 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1409 12:24:15.825525 PCI: 00:04.0
1410 12:24:15.828579 PCI: 00:08.0
1411 12:24:15.838624 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1412 12:24:15.838711 PCI: 00:12.0
1413 12:24:15.848235 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1414 12:24:15.855228 PCI: 00:14.0 child on link 0 USB0 port 0
1415 12:24:15.865264 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1416 12:24:15.868502 USB0 port 0 child on link 0 USB2 port 0
1417 12:24:15.871696 USB2 port 0
1418 12:24:15.871802 USB2 port 1
1419 12:24:15.874919 USB2 port 2
1420 12:24:15.875024 USB2 port 3
1421 12:24:15.878237 USB2 port 5
1422 12:24:15.878342 USB2 port 6
1423 12:24:15.881487 USB2 port 9
1424 12:24:15.881569 USB3 port 0
1425 12:24:15.884669 USB3 port 1
1426 12:24:15.884774 USB3 port 2
1427 12:24:15.888275 USB3 port 3
1428 12:24:15.891388 USB3 port 4
1429 12:24:15.891503 PCI: 00:14.2
1430 12:24:15.901439 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1431 12:24:15.910984 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1432 12:24:15.914703 PCI: 00:14.3
1433 12:24:15.924239 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1434 12:24:15.927926 PCI: 00:15.0 child on link 0 I2C: 01:15
1435 12:24:15.937757 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1436 12:24:15.940883 I2C: 01:15
1437 12:24:15.944199 PCI: 00:15.1 child on link 0 I2C: 02:5d
1438 12:24:15.954166 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1439 12:24:15.957686 I2C: 02:5d
1440 12:24:15.957794 GENERIC: 0.0
1441 12:24:15.961074 PCI: 00:16.0
1442 12:24:15.970855 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1443 12:24:15.970966 PCI: 00:17.0
1444 12:24:15.980569 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1445 12:24:15.990353 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1446 12:24:16.000176 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1447 12:24:16.010791 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1448 12:24:16.020270 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1449 12:24:16.030113 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1450 12:24:16.033955 PCI: 00:19.0 child on link 0 I2C: 03:1a
1451 12:24:16.043469 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1452 12:24:16.046547 I2C: 03:1a
1453 12:24:16.046657 I2C: 03:38
1454 12:24:16.049829 I2C: 03:39
1455 12:24:16.049934 I2C: 03:3a
1456 12:24:16.053060 I2C: 03:3b
1457 12:24:16.056302 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1458 12:24:16.066628 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1459 12:24:16.076198 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1460 12:24:16.086447 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1461 12:24:16.086535 PCI: 01:00.0
1462 12:24:16.099466 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1463 12:24:16.099554 PCI: 00:1e.0
1464 12:24:16.109423 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1465 12:24:16.122318 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1466 12:24:16.125891 PCI: 00:1e.2 child on link 0 SPI: 00
1467 12:24:16.135814 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1468 12:24:16.135902 SPI: 00
1469 12:24:16.142614 PCI: 00:1e.3 child on link 0 SPI: 01
1470 12:24:16.152044 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1471 12:24:16.152164 SPI: 01
1472 12:24:16.155377 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1473 12:24:16.165415 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1474 12:24:16.175441 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1475 12:24:16.175639 PNP: 0c09.0
1476 12:24:16.185040 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1477 12:24:16.185126 PCI: 00:1f.3
1478 12:24:16.198516 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1479 12:24:16.208502 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1480 12:24:16.208589 PCI: 00:1f.4
1481 12:24:16.218120 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1482 12:24:16.228047 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1483 12:24:16.231120 PCI: 00:1f.5
1484 12:24:16.241625 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1485 12:24:16.241724 Done allocating resources.
1486 12:24:16.247640 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1487 12:24:16.251347 Enabling resources...
1488 12:24:16.254444 PCI: 00:00.0 subsystem <- 8086/9b61
1489 12:24:16.257955 PCI: 00:00.0 cmd <- 06
1490 12:24:16.261169 PCI: 00:02.0 subsystem <- 8086/9b41
1491 12:24:16.264298 PCI: 00:02.0 cmd <- 03
1492 12:24:16.267621 PCI: 00:08.0 cmd <- 06
1493 12:24:16.270806 PCI: 00:12.0 subsystem <- 8086/02f9
1494 12:24:16.274521 PCI: 00:12.0 cmd <- 02
1495 12:24:16.277722 PCI: 00:14.0 subsystem <- 8086/02ed
1496 12:24:16.281224 PCI: 00:14.0 cmd <- 02
1497 12:24:16.281296 PCI: 00:14.2 cmd <- 02
1498 12:24:16.287693 PCI: 00:14.3 subsystem <- 8086/02f0
1499 12:24:16.287774 PCI: 00:14.3 cmd <- 02
1500 12:24:16.290891 PCI: 00:15.0 subsystem <- 8086/02e8
1501 12:24:16.294087 PCI: 00:15.0 cmd <- 02
1502 12:24:16.297759 PCI: 00:15.1 subsystem <- 8086/02e9
1503 12:24:16.301066 PCI: 00:15.1 cmd <- 02
1504 12:24:16.304245 PCI: 00:16.0 subsystem <- 8086/02e0
1505 12:24:16.307442 PCI: 00:16.0 cmd <- 02
1506 12:24:16.310598 PCI: 00:17.0 subsystem <- 8086/02d3
1507 12:24:16.314350 PCI: 00:17.0 cmd <- 03
1508 12:24:16.317490 PCI: 00:19.0 subsystem <- 8086/02c5
1509 12:24:16.320667 PCI: 00:19.0 cmd <- 02
1510 12:24:16.323912 PCI: 00:1d.0 bridge ctrl <- 0013
1511 12:24:16.327516 PCI: 00:1d.0 subsystem <- 8086/02b0
1512 12:24:16.330669 PCI: 00:1d.0 cmd <- 06
1513 12:24:16.333846 PCI: 00:1e.0 subsystem <- 8086/02a8
1514 12:24:16.333917 PCI: 00:1e.0 cmd <- 06
1515 12:24:16.340723 PCI: 00:1e.2 subsystem <- 8086/02aa
1516 12:24:16.340829 PCI: 00:1e.2 cmd <- 06
1517 12:24:16.343777 PCI: 00:1e.3 subsystem <- 8086/02ab
1518 12:24:16.347338 PCI: 00:1e.3 cmd <- 02
1519 12:24:16.350840 PCI: 00:1f.0 subsystem <- 8086/0284
1520 12:24:16.353774 PCI: 00:1f.0 cmd <- 407
1521 12:24:16.357500 PCI: 00:1f.3 subsystem <- 8086/02c8
1522 12:24:16.360543 PCI: 00:1f.3 cmd <- 02
1523 12:24:16.364117 PCI: 00:1f.4 subsystem <- 8086/02a3
1524 12:24:16.367320 PCI: 00:1f.4 cmd <- 03
1525 12:24:16.370592 PCI: 00:1f.5 subsystem <- 8086/02a4
1526 12:24:16.373860 PCI: 00:1f.5 cmd <- 406
1527 12:24:16.382245 PCI: 01:00.0 cmd <- 02
1528 12:24:16.387530 done.
1529 12:24:16.400508 ME: Version: 14.0.39.1367
1530 12:24:16.407727 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13
1531 12:24:16.411024 Initializing devices...
1532 12:24:16.411098 Root Device init ...
1533 12:24:16.417367 Chrome EC: Set SMI mask to 0x0000000000000000
1534 12:24:16.420621 Chrome EC: clear events_b mask to 0x0000000000000000
1535 12:24:16.427523 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1536 12:24:16.433845 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1537 12:24:16.440872 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1538 12:24:16.443880 Chrome EC: Set WAKE mask to 0x0000000000000000
1539 12:24:16.446856 Root Device init finished in 35217 usecs
1540 12:24:16.451159 CPU_CLUSTER: 0 init ...
1541 12:24:16.457121 CPU_CLUSTER: 0 init finished in 2449 usecs
1542 12:24:16.461370 PCI: 00:00.0 init ...
1543 12:24:16.464956 CPU TDP: 15 Watts
1544 12:24:16.467946 CPU PL2 = 64 Watts
1545 12:24:16.471592 PCI: 00:00.0 init finished in 7083 usecs
1546 12:24:16.474844 PCI: 00:02.0 init ...
1547 12:24:16.478261 PCI: 00:02.0 init finished in 2255 usecs
1548 12:24:16.481528 PCI: 00:08.0 init ...
1549 12:24:16.484781 PCI: 00:08.0 init finished in 2253 usecs
1550 12:24:16.487955 PCI: 00:12.0 init ...
1551 12:24:16.491618 PCI: 00:12.0 init finished in 2252 usecs
1552 12:24:16.494562 PCI: 00:14.0 init ...
1553 12:24:16.498038 PCI: 00:14.0 init finished in 2253 usecs
1554 12:24:16.501194 PCI: 00:14.2 init ...
1555 12:24:16.504377 PCI: 00:14.2 init finished in 2243 usecs
1556 12:24:16.508077 PCI: 00:14.3 init ...
1557 12:24:16.511311 PCI: 00:14.3 init finished in 2270 usecs
1558 12:24:16.514557 PCI: 00:15.0 init ...
1559 12:24:16.517768 DW I2C bus 0 at 0xd121f000 (400 KHz)
1560 12:24:16.520953 PCI: 00:15.0 init finished in 5980 usecs
1561 12:24:16.524840 PCI: 00:15.1 init ...
1562 12:24:16.527943 DW I2C bus 1 at 0xd1220000 (400 KHz)
1563 12:24:16.530965 PCI: 00:15.1 init finished in 5978 usecs
1564 12:24:16.534771 PCI: 00:16.0 init ...
1565 12:24:16.537791 PCI: 00:16.0 init finished in 2254 usecs
1566 12:24:16.542258 PCI: 00:19.0 init ...
1567 12:24:16.545492 DW I2C bus 4 at 0xd1222000 (400 KHz)
1568 12:24:16.551710 PCI: 00:19.0 init finished in 5977 usecs
1569 12:24:16.551793 PCI: 00:1d.0 init ...
1570 12:24:16.555333 Initializing PCH PCIe bridge.
1571 12:24:16.558700 PCI: 00:1d.0 init finished in 5278 usecs
1572 12:24:16.563564 PCI: 00:1f.0 init ...
1573 12:24:16.566485 IOAPIC: Initializing IOAPIC at 0xfec00000
1574 12:24:16.573379 IOAPIC: Bootstrap Processor Local APIC = 0x00
1575 12:24:16.573464 IOAPIC: ID = 0x02
1576 12:24:16.576505 IOAPIC: Dumping registers
1577 12:24:16.580010 reg 0x0000: 0x02000000
1578 12:24:16.583210 reg 0x0001: 0x00770020
1579 12:24:16.583288 reg 0x0002: 0x00000000
1580 12:24:16.590297 PCI: 00:1f.0 init finished in 23552 usecs
1581 12:24:16.593466 PCI: 00:1f.4 init ...
1582 12:24:16.596490 PCI: 00:1f.4 init finished in 2263 usecs
1583 12:24:16.607802 PCI: 01:00.0 init ...
1584 12:24:16.610832 PCI: 01:00.0 init finished in 2252 usecs
1585 12:24:16.615191 PNP: 0c09.0 init ...
1586 12:24:16.618282 Google Chrome EC uptime: 11.101 seconds
1587 12:24:16.625449 Google Chrome AP resets since EC boot: 0
1588 12:24:16.628829 Google Chrome most recent AP reset causes:
1589 12:24:16.635041 Google Chrome EC reset flags at last EC boot: reset-pin
1590 12:24:16.638170 PNP: 0c09.0 init finished in 20571 usecs
1591 12:24:16.641791 Devices initialized
1592 12:24:16.641867 Show all devs... After init.
1593 12:24:16.645227 Root Device: enabled 1
1594 12:24:16.648367 CPU_CLUSTER: 0: enabled 1
1595 12:24:16.651681 DOMAIN: 0000: enabled 1
1596 12:24:16.651767 APIC: 00: enabled 1
1597 12:24:16.654913 PCI: 00:00.0: enabled 1
1598 12:24:16.658477 PCI: 00:02.0: enabled 1
1599 12:24:16.661397 PCI: 00:04.0: enabled 0
1600 12:24:16.661471 PCI: 00:05.0: enabled 0
1601 12:24:16.664974 PCI: 00:12.0: enabled 1
1602 12:24:16.668108 PCI: 00:12.5: enabled 0
1603 12:24:16.668179 PCI: 00:12.6: enabled 0
1604 12:24:16.671667 PCI: 00:14.0: enabled 1
1605 12:24:16.674795 PCI: 00:14.1: enabled 0
1606 12:24:16.678256 PCI: 00:14.3: enabled 1
1607 12:24:16.678328 PCI: 00:14.5: enabled 0
1608 12:24:16.681271 PCI: 00:15.0: enabled 1
1609 12:24:16.684958 PCI: 00:15.1: enabled 1
1610 12:24:16.688133 PCI: 00:15.2: enabled 0
1611 12:24:16.688205 PCI: 00:15.3: enabled 0
1612 12:24:16.691403 PCI: 00:16.0: enabled 1
1613 12:24:16.694628 PCI: 00:16.1: enabled 0
1614 12:24:16.697785 PCI: 00:16.2: enabled 0
1615 12:24:16.697853 PCI: 00:16.3: enabled 0
1616 12:24:16.701009 PCI: 00:16.4: enabled 0
1617 12:24:16.704284 PCI: 00:16.5: enabled 0
1618 12:24:16.707764 PCI: 00:17.0: enabled 1
1619 12:24:16.707837 PCI: 00:19.0: enabled 1
1620 12:24:16.710931 PCI: 00:19.1: enabled 0
1621 12:24:16.714643 PCI: 00:19.2: enabled 0
1622 12:24:16.714722 PCI: 00:1a.0: enabled 0
1623 12:24:16.718103 PCI: 00:1c.0: enabled 0
1624 12:24:16.721013 PCI: 00:1c.1: enabled 0
1625 12:24:16.724725 PCI: 00:1c.2: enabled 0
1626 12:24:16.724799 PCI: 00:1c.3: enabled 0
1627 12:24:16.728027 PCI: 00:1c.4: enabled 0
1628 12:24:16.731214 PCI: 00:1c.5: enabled 0
1629 12:24:16.734426 PCI: 00:1c.6: enabled 0
1630 12:24:16.734512 PCI: 00:1c.7: enabled 0
1631 12:24:16.737724 PCI: 00:1d.0: enabled 1
1632 12:24:16.740944 PCI: 00:1d.1: enabled 0
1633 12:24:16.744606 PCI: 00:1d.2: enabled 0
1634 12:24:16.744691 PCI: 00:1d.3: enabled 0
1635 12:24:16.747566 PCI: 00:1d.4: enabled 0
1636 12:24:16.750843 PCI: 00:1d.5: enabled 0
1637 12:24:16.750938 PCI: 00:1e.0: enabled 1
1638 12:24:16.753960 PCI: 00:1e.1: enabled 0
1639 12:24:16.757339 PCI: 00:1e.2: enabled 1
1640 12:24:16.761102 PCI: 00:1e.3: enabled 1
1641 12:24:16.761176 PCI: 00:1f.0: enabled 1
1642 12:24:16.764281 PCI: 00:1f.1: enabled 0
1643 12:24:16.767257 PCI: 00:1f.2: enabled 0
1644 12:24:16.770862 PCI: 00:1f.3: enabled 1
1645 12:24:16.770936 PCI: 00:1f.4: enabled 1
1646 12:24:16.774341 PCI: 00:1f.5: enabled 1
1647 12:24:16.777385 PCI: 00:1f.6: enabled 0
1648 12:24:16.780919 USB0 port 0: enabled 1
1649 12:24:16.781043 I2C: 01:15: enabled 1
1650 12:24:16.784129 I2C: 02:5d: enabled 1
1651 12:24:16.787200 GENERIC: 0.0: enabled 1
1652 12:24:16.787302 I2C: 03:1a: enabled 1
1653 12:24:16.790858 I2C: 03:38: enabled 1
1654 12:24:16.793898 I2C: 03:39: enabled 1
1655 12:24:16.793974 I2C: 03:3a: enabled 1
1656 12:24:16.797233 I2C: 03:3b: enabled 1
1657 12:24:16.800417 PCI: 00:00.0: enabled 1
1658 12:24:16.800491 SPI: 00: enabled 1
1659 12:24:16.803735 SPI: 01: enabled 1
1660 12:24:16.806901 PNP: 0c09.0: enabled 1
1661 12:24:16.807002 USB2 port 0: enabled 1
1662 12:24:16.810557 USB2 port 1: enabled 1
1663 12:24:16.813907 USB2 port 2: enabled 0
1664 12:24:16.813981 USB2 port 3: enabled 0
1665 12:24:16.817478 USB2 port 5: enabled 0
1666 12:24:16.820384 USB2 port 6: enabled 1
1667 12:24:16.823407 USB2 port 9: enabled 1
1668 12:24:16.823505 USB3 port 0: enabled 1
1669 12:24:16.827208 USB3 port 1: enabled 1
1670 12:24:16.830215 USB3 port 2: enabled 1
1671 12:24:16.830292 USB3 port 3: enabled 1
1672 12:24:16.833545 USB3 port 4: enabled 0
1673 12:24:16.836635 APIC: 02: enabled 1
1674 12:24:16.836729 APIC: 05: enabled 1
1675 12:24:16.840473 APIC: 01: enabled 1
1676 12:24:16.843687 APIC: 03: enabled 1
1677 12:24:16.843792 APIC: 04: enabled 1
1678 12:24:16.846902 APIC: 06: enabled 1
1679 12:24:16.847013 APIC: 07: enabled 1
1680 12:24:16.849842 PCI: 00:08.0: enabled 1
1681 12:24:16.853470 PCI: 00:14.2: enabled 1
1682 12:24:16.856469 PCI: 01:00.0: enabled 1
1683 12:24:16.860471 Disabling ACPI via APMC:
1684 12:24:16.860577 done.
1685 12:24:16.866749 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1686 12:24:16.870604 ELOG: NV offset 0xaf0000 size 0x4000
1687 12:24:16.876785 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1688 12:24:16.883500 ELOG: Event(17) added with size 13 at 2023-06-14 12:24:01 UTC
1689 12:24:16.890318 POST: Unexpected post code in previous boot: 0x73
1690 12:24:16.896999 ELOG: Event(A3) added with size 11 at 2023-06-14 12:24:01 UTC
1691 12:24:16.903482 ELOG: Event(A6) added with size 13 at 2023-06-14 12:24:01 UTC
1692 12:24:16.909868 ELOG: Event(92) added with size 9 at 2023-06-14 12:24:01 UTC
1693 12:24:16.913066 ELOG: Event(93) added with size 9 at 2023-06-14 12:24:01 UTC
1694 12:24:16.920052 ELOG: Event(9A) added with size 9 at 2023-06-14 12:24:01 UTC
1695 12:24:16.926671 ELOG: Event(9E) added with size 10 at 2023-06-14 12:24:01 UTC
1696 12:24:16.933215 ELOG: Event(9F) added with size 14 at 2023-06-14 12:24:01 UTC
1697 12:24:16.939584 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1698 12:24:16.946786 ELOG: Event(A1) added with size 10 at 2023-06-14 12:24:01 UTC
1699 12:24:16.953157 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1700 12:24:16.959731 ELOG: Event(A0) added with size 9 at 2023-06-14 12:24:01 UTC
1701 12:24:16.963221 elog_add_boot_reason: Logged dev mode boot
1702 12:24:16.966268 Finalize devices...
1703 12:24:16.969396 PCI: 00:17.0 final
1704 12:24:16.969473 Devices finalized
1705 12:24:16.976671 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1706 12:24:16.979945 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1707 12:24:16.986447 ME: HFSTS1 : 0x90000245
1708 12:24:16.989351 ME: HFSTS2 : 0x3B850126
1709 12:24:16.992564 ME: HFSTS3 : 0x00000020
1710 12:24:16.996303 ME: HFSTS4 : 0x00004800
1711 12:24:17.002924 ME: HFSTS5 : 0x00000000
1712 12:24:17.006138 ME: HFSTS6 : 0x40400006
1713 12:24:17.009339 ME: Manufacturing Mode : NO
1714 12:24:17.012504 ME: FW Partition Table : OK
1715 12:24:17.015779 ME: Bringup Loader Failure : NO
1716 12:24:17.018904 ME: Firmware Init Complete : YES
1717 12:24:17.022603 ME: Boot Options Present : NO
1718 12:24:17.025830 ME: Update In Progress : NO
1719 12:24:17.029036 ME: D0i3 Support : YES
1720 12:24:17.032093 ME: Low Power State Enabled : NO
1721 12:24:17.035806 ME: CPU Replaced : NO
1722 12:24:17.039078 ME: CPU Replacement Valid : YES
1723 12:24:17.042547 ME: Current Working State : 5
1724 12:24:17.045810 ME: Current Operation State : 1
1725 12:24:17.049032 ME: Current Operation Mode : 0
1726 12:24:17.052194 ME: Error Code : 0
1727 12:24:17.055546 ME: CPU Debug Disabled : YES
1728 12:24:17.058761 ME: TXT Support : NO
1729 12:24:17.061869 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1730 12:24:17.068790 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1731 12:24:17.072150 CBFS @ c08000 size 3f8000
1732 12:24:17.078754 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1733 12:24:17.082064 CBFS: Locating 'fallback/dsdt.aml'
1734 12:24:17.085154 CBFS: Found @ offset 10bb80 size 3fa5
1735 12:24:17.089037 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1736 12:24:17.092054 CBFS @ c08000 size 3f8000
1737 12:24:17.098558 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1738 12:24:17.102204 CBFS: Locating 'fallback/slic'
1739 12:24:17.105059 CBFS: 'fallback/slic' not found.
1740 12:24:17.112154 ACPI: Writing ACPI tables at 99b3e000.
1741 12:24:17.112234 ACPI: * FACS
1742 12:24:17.115376 ACPI: * DSDT
1743 12:24:17.118635 Ramoops buffer: 0x100000@0x99a3d000.
1744 12:24:17.121926 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1745 12:24:17.128196 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1746 12:24:17.131522 Google Chrome EC: version:
1747 12:24:17.134776 ro: helios_v2.0.2659-56403530b
1748 12:24:17.138153 rw: helios_v2.0.2849-c41de27e7d
1749 12:24:17.138228 running image: 1
1750 12:24:17.142395 ACPI: * FADT
1751 12:24:17.142470 SCI is IRQ9
1752 12:24:17.148861 ACPI: added table 1/32, length now 40
1753 12:24:17.148951 ACPI: * SSDT
1754 12:24:17.152518 Found 1 CPU(s) with 8 core(s) each.
1755 12:24:17.155913 Error: Could not locate 'wifi_sar' in VPD.
1756 12:24:17.162161 Checking CBFS for default SAR values
1757 12:24:17.165880 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1758 12:24:17.169239 CBFS @ c08000 size 3f8000
1759 12:24:17.175837 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1760 12:24:17.178770 CBFS: Locating 'wifi_sar_defaults.hex'
1761 12:24:17.182243 CBFS: Found @ offset 5fac0 size 77
1762 12:24:17.185853 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1763 12:24:17.192286 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1764 12:24:17.195551 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1765 12:24:17.202349 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1766 12:24:17.205230 failed to find key in VPD: dsm_calib_r0_0
1767 12:24:17.215478 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1768 12:24:17.218335 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1769 12:24:17.222151 failed to find key in VPD: dsm_calib_r0_1
1770 12:24:17.231928 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1771 12:24:17.238380 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1772 12:24:17.241566 failed to find key in VPD: dsm_calib_r0_2
1773 12:24:17.251595 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1774 12:24:17.255301 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1775 12:24:17.261565 failed to find key in VPD: dsm_calib_r0_3
1776 12:24:17.268026 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1777 12:24:17.275086 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1778 12:24:17.278321 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1779 12:24:17.281458 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1780 12:24:17.285788 EC returned error result code 1
1781 12:24:17.289411 EC returned error result code 1
1782 12:24:17.292924 EC returned error result code 1
1783 12:24:17.299804 PS2K: Bad resp from EC. Vivaldi disabled!
1784 12:24:17.303038 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1785 12:24:17.309330 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1786 12:24:17.316264 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1787 12:24:17.319575 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1788 12:24:17.326169 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1789 12:24:17.332624 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1790 12:24:17.339360 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1791 12:24:17.342691 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1792 12:24:17.349329 ACPI: added table 2/32, length now 44
1793 12:24:17.349423 ACPI: * MCFG
1794 12:24:17.352485 ACPI: added table 3/32, length now 48
1795 12:24:17.356154 ACPI: * TPM2
1796 12:24:17.359271 TPM2 log created at 99a2d000
1797 12:24:17.362321 ACPI: added table 4/32, length now 52
1798 12:24:17.362465 ACPI: * MADT
1799 12:24:17.365581 SCI is IRQ9
1800 12:24:17.369307 ACPI: added table 5/32, length now 56
1801 12:24:17.369430 current = 99b43ac0
1802 12:24:17.372505 ACPI: * DMAR
1803 12:24:17.375952 ACPI: added table 6/32, length now 60
1804 12:24:17.379061 ACPI: * IGD OpRegion
1805 12:24:17.379174 GMA: Found VBT in CBFS
1806 12:24:17.382432 GMA: Found valid VBT in CBFS
1807 12:24:17.385546 ACPI: added table 7/32, length now 64
1808 12:24:17.388656 ACPI: * HPET
1809 12:24:17.392324 ACPI: added table 8/32, length now 68
1810 12:24:17.392409 ACPI: done.
1811 12:24:17.395457 ACPI tables: 31744 bytes.
1812 12:24:17.399140 smbios_write_tables: 99a2c000
1813 12:24:17.402180 EC returned error result code 3
1814 12:24:17.405635 Couldn't obtain OEM name from CBI
1815 12:24:17.409388 Create SMBIOS type 17
1816 12:24:17.412395 PCI: 00:00.0 (Intel Cannonlake)
1817 12:24:17.415613 PCI: 00:14.3 (Intel WiFi)
1818 12:24:17.418831 SMBIOS tables: 939 bytes.
1819 12:24:17.422852 Writing table forward entry at 0x00000500
1820 12:24:17.429049 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1821 12:24:17.432016 Writing coreboot table at 0x99b62000
1822 12:24:17.438661 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1823 12:24:17.442182 1. 0000000000001000-000000000009ffff: RAM
1824 12:24:17.445839 2. 00000000000a0000-00000000000fffff: RESERVED
1825 12:24:17.452051 3. 0000000000100000-0000000099a2bfff: RAM
1826 12:24:17.455466 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1827 12:24:17.462262 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1828 12:24:17.468446 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1829 12:24:17.472191 7. 000000009a000000-000000009f7fffff: RESERVED
1830 12:24:17.478849 8. 00000000e0000000-00000000efffffff: RESERVED
1831 12:24:17.482004 9. 00000000fc000000-00000000fc000fff: RESERVED
1832 12:24:17.485261 10. 00000000fe000000-00000000fe00ffff: RESERVED
1833 12:24:17.491510 11. 00000000fed10000-00000000fed17fff: RESERVED
1834 12:24:17.495255 12. 00000000fed80000-00000000fed83fff: RESERVED
1835 12:24:17.501709 13. 00000000fed90000-00000000fed91fff: RESERVED
1836 12:24:17.504799 14. 00000000feda0000-00000000feda1fff: RESERVED
1837 12:24:17.511594 15. 0000000100000000-000000045e7fffff: RAM
1838 12:24:17.515286 Graphics framebuffer located at 0xc0000000
1839 12:24:17.518163 Passing 5 GPIOs to payload:
1840 12:24:17.521259 NAME | PORT | POLARITY | VALUE
1841 12:24:17.528036 write protect | undefined | high | low
1842 12:24:17.531317 lid | undefined | high | high
1843 12:24:17.538057 power | undefined | high | low
1844 12:24:17.544733 oprom | undefined | high | low
1845 12:24:17.547835 EC in RW | 0x000000cb | high | low
1846 12:24:17.551534 Board ID: 4
1847 12:24:17.554731 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1848 12:24:17.557922 CBFS @ c08000 size 3f8000
1849 12:24:17.564816 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1850 12:24:17.571129 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1851 12:24:17.571240 coreboot table: 1492 bytes.
1852 12:24:17.574734 IMD ROOT 0. 99fff000 00001000
1853 12:24:17.577771 IMD SMALL 1. 99ffe000 00001000
1854 12:24:17.580918 FSP MEMORY 2. 99c4e000 003b0000
1855 12:24:17.584755 CONSOLE 3. 99c2e000 00020000
1856 12:24:17.588005 FMAP 4. 99c2d000 0000054e
1857 12:24:17.591342 TIME STAMP 5. 99c2c000 00000910
1858 12:24:17.594663 VBOOT WORK 6. 99c18000 00014000
1859 12:24:17.597685 MRC DATA 7. 99c16000 00001958
1860 12:24:17.601372 ROMSTG STCK 8. 99c15000 00001000
1861 12:24:17.604651 AFTER CAR 9. 99c0b000 0000a000
1862 12:24:17.607809 RAMSTAGE 10. 99baf000 0005c000
1863 12:24:17.610934 REFCODE 11. 99b7a000 00035000
1864 12:24:17.614680 SMM BACKUP 12. 99b6a000 00010000
1865 12:24:17.617946 COREBOOT 13. 99b62000 00008000
1866 12:24:17.621268 ACPI 14. 99b3e000 00024000
1867 12:24:17.624309 ACPI GNVS 15. 99b3d000 00001000
1868 12:24:17.627926 RAMOOPS 16. 99a3d000 00100000
1869 12:24:17.630882 TPM2 TCGLOG17. 99a2d000 00010000
1870 12:24:17.634618 SMBIOS 18. 99a2c000 00000800
1871 12:24:17.637937 IMD small region:
1872 12:24:17.641050 IMD ROOT 0. 99ffec00 00000400
1873 12:24:17.644550 FSP RUNTIME 1. 99ffebe0 00000004
1874 12:24:17.647563 EC HOSTEVENT 2. 99ffebc0 00000008
1875 12:24:17.651175 POWER STATE 3. 99ffeb80 00000040
1876 12:24:17.654003 ROMSTAGE 4. 99ffeb60 00000004
1877 12:24:17.657479 MEM INFO 5. 99ffe9a0 000001b9
1878 12:24:17.661034 VPD 6. 99ffe920 0000006c
1879 12:24:17.664188 MTRR: Physical address space:
1880 12:24:17.671084 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1881 12:24:17.677553 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1882 12:24:17.684235 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1883 12:24:17.690580 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1884 12:24:17.697698 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1885 12:24:17.703943 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1886 12:24:17.707203 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1887 12:24:17.714220 MTRR: Fixed MSR 0x250 0x0606060606060606
1888 12:24:17.717217 MTRR: Fixed MSR 0x258 0x0606060606060606
1889 12:24:17.720315 MTRR: Fixed MSR 0x259 0x0000000000000000
1890 12:24:17.724182 MTRR: Fixed MSR 0x268 0x0606060606060606
1891 12:24:17.730553 MTRR: Fixed MSR 0x269 0x0606060606060606
1892 12:24:17.733643 MTRR: Fixed MSR 0x26a 0x0606060606060606
1893 12:24:17.737347 MTRR: Fixed MSR 0x26b 0x0606060606060606
1894 12:24:17.740329 MTRR: Fixed MSR 0x26c 0x0606060606060606
1895 12:24:17.747289 MTRR: Fixed MSR 0x26d 0x0606060606060606
1896 12:24:17.750396 MTRR: Fixed MSR 0x26e 0x0606060606060606
1897 12:24:17.753624 MTRR: Fixed MSR 0x26f 0x0606060606060606
1898 12:24:17.757202 call enable_fixed_mtrr()
1899 12:24:17.760098 CPU physical address size: 39 bits
1900 12:24:17.763671 MTRR: default type WB/UC MTRR counts: 6/8.
1901 12:24:17.770211 MTRR: WB selected as default type.
1902 12:24:17.773284 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1903 12:24:17.780312 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1904 12:24:17.786642 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1905 12:24:17.793353 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1906 12:24:17.799830 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1907 12:24:17.806294 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1908 12:24:17.810156 MTRR: Fixed MSR 0x250 0x0606060606060606
1909 12:24:17.816390 MTRR: Fixed MSR 0x258 0x0606060606060606
1910 12:24:17.819594 MTRR: Fixed MSR 0x259 0x0000000000000000
1911 12:24:17.822577 MTRR: Fixed MSR 0x268 0x0606060606060606
1912 12:24:17.826435 MTRR: Fixed MSR 0x269 0x0606060606060606
1913 12:24:17.832861 MTRR: Fixed MSR 0x26a 0x0606060606060606
1914 12:24:17.835974 MTRR: Fixed MSR 0x26b 0x0606060606060606
1915 12:24:17.839187 MTRR: Fixed MSR 0x26c 0x0606060606060606
1916 12:24:17.842400 MTRR: Fixed MSR 0x26d 0x0606060606060606
1917 12:24:17.849088 MTRR: Fixed MSR 0x26e 0x0606060606060606
1918 12:24:17.852487 MTRR: Fixed MSR 0x26f 0x0606060606060606
1919 12:24:17.852619
1920 12:24:17.852688 MTRR check
1921 12:24:17.855697 Fixed MTRRs : Enabled
1922 12:24:17.859463 Variable MTRRs: Enabled
1923 12:24:17.859539
1924 12:24:17.862574 call enable_fixed_mtrr()
1925 12:24:17.865598 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1926 12:24:17.868698 CPU physical address size: 39 bits
1927 12:24:17.875865 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1928 12:24:17.879363 MTRR: Fixed MSR 0x250 0x0606060606060606
1929 12:24:17.882348 MTRR: Fixed MSR 0x250 0x0606060606060606
1930 12:24:17.889378 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 12:24:17.892426 MTRR: Fixed MSR 0x259 0x0000000000000000
1932 12:24:17.895976 MTRR: Fixed MSR 0x268 0x0606060606060606
1933 12:24:17.899163 MTRR: Fixed MSR 0x269 0x0606060606060606
1934 12:24:17.905579 MTRR: Fixed MSR 0x26a 0x0606060606060606
1935 12:24:17.908768 MTRR: Fixed MSR 0x26b 0x0606060606060606
1936 12:24:17.912388 MTRR: Fixed MSR 0x26c 0x0606060606060606
1937 12:24:17.915449 MTRR: Fixed MSR 0x26d 0x0606060606060606
1938 12:24:17.918740 MTRR: Fixed MSR 0x26e 0x0606060606060606
1939 12:24:17.925730 MTRR: Fixed MSR 0x26f 0x0606060606060606
1940 12:24:17.928876 MTRR: Fixed MSR 0x258 0x0606060606060606
1941 12:24:17.932226 MTRR: Fixed MSR 0x259 0x0000000000000000
1942 12:24:17.938501 MTRR: Fixed MSR 0x268 0x0606060606060606
1943 12:24:17.942256 MTRR: Fixed MSR 0x269 0x0606060606060606
1944 12:24:17.945508 MTRR: Fixed MSR 0x26a 0x0606060606060606
1945 12:24:17.948652 MTRR: Fixed MSR 0x26b 0x0606060606060606
1946 12:24:17.952257 MTRR: Fixed MSR 0x26c 0x0606060606060606
1947 12:24:17.958297 MTRR: Fixed MSR 0x26d 0x0606060606060606
1948 12:24:17.961896 MTRR: Fixed MSR 0x26e 0x0606060606060606
1949 12:24:17.964746 MTRR: Fixed MSR 0x26f 0x0606060606060606
1950 12:24:17.968039 call enable_fixed_mtrr()
1951 12:24:17.971666 call enable_fixed_mtrr()
1952 12:24:17.974615 CBFS @ c08000 size 3f8000
1953 12:24:17.978342 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1954 12:24:17.981393 CBFS: Locating 'fallback/payload'
1955 12:24:17.987976 MTRR: Fixed MSR 0x250 0x0606060606060606
1956 12:24:17.991557 MTRR: Fixed MSR 0x250 0x0606060606060606
1957 12:24:17.994899 MTRR: Fixed MSR 0x258 0x0606060606060606
1958 12:24:17.997905 MTRR: Fixed MSR 0x259 0x0000000000000000
1959 12:24:18.004674 MTRR: Fixed MSR 0x268 0x0606060606060606
1960 12:24:18.007847 MTRR: Fixed MSR 0x269 0x0606060606060606
1961 12:24:18.011179 MTRR: Fixed MSR 0x26a 0x0606060606060606
1962 12:24:18.014284 MTRR: Fixed MSR 0x26b 0x0606060606060606
1963 12:24:18.021117 MTRR: Fixed MSR 0x26c 0x0606060606060606
1964 12:24:18.024347 MTRR: Fixed MSR 0x26d 0x0606060606060606
1965 12:24:18.027496 MTRR: Fixed MSR 0x26e 0x0606060606060606
1966 12:24:18.030653 MTRR: Fixed MSR 0x26f 0x0606060606060606
1967 12:24:18.037727 MTRR: Fixed MSR 0x258 0x0606060606060606
1968 12:24:18.037828 call enable_fixed_mtrr()
1969 12:24:18.044525 MTRR: Fixed MSR 0x259 0x0000000000000000
1970 12:24:18.047767 MTRR: Fixed MSR 0x268 0x0606060606060606
1971 12:24:18.051117 MTRR: Fixed MSR 0x269 0x0606060606060606
1972 12:24:18.054205 MTRR: Fixed MSR 0x26a 0x0606060606060606
1973 12:24:18.057511 MTRR: Fixed MSR 0x26b 0x0606060606060606
1974 12:24:18.064221 MTRR: Fixed MSR 0x26c 0x0606060606060606
1975 12:24:18.067205 MTRR: Fixed MSR 0x26d 0x0606060606060606
1976 12:24:18.070858 MTRR: Fixed MSR 0x26e 0x0606060606060606
1977 12:24:18.073991 MTRR: Fixed MSR 0x26f 0x0606060606060606
1978 12:24:18.080364 CPU physical address size: 39 bits
1979 12:24:18.080449 call enable_fixed_mtrr()
1980 12:24:18.087460 CPU physical address size: 39 bits
1981 12:24:18.090585 CPU physical address size: 39 bits
1982 12:24:18.094198 CPU physical address size: 39 bits
1983 12:24:18.097338 CBFS: Found @ offset 1c96c0 size 3f798
1984 12:24:18.100528 MTRR: Fixed MSR 0x250 0x0606060606060606
1985 12:24:18.103607 MTRR: Fixed MSR 0x258 0x0606060606060606
1986 12:24:18.110256 MTRR: Fixed MSR 0x259 0x0000000000000000
1987 12:24:18.113501 MTRR: Fixed MSR 0x268 0x0606060606060606
1988 12:24:18.117465 MTRR: Fixed MSR 0x269 0x0606060606060606
1989 12:24:18.120510 MTRR: Fixed MSR 0x26a 0x0606060606060606
1990 12:24:18.127369 MTRR: Fixed MSR 0x26b 0x0606060606060606
1991 12:24:18.130468 MTRR: Fixed MSR 0x26c 0x0606060606060606
1992 12:24:18.133542 MTRR: Fixed MSR 0x26d 0x0606060606060606
1993 12:24:18.136686 MTRR: Fixed MSR 0x26e 0x0606060606060606
1994 12:24:18.140397 MTRR: Fixed MSR 0x26f 0x0606060606060606
1995 12:24:18.146626 MTRR: Fixed MSR 0x250 0x0606060606060606
1996 12:24:18.149896 call enable_fixed_mtrr()
1997 12:24:18.153059 MTRR: Fixed MSR 0x258 0x0606060606060606
1998 12:24:18.156947 MTRR: Fixed MSR 0x259 0x0000000000000000
1999 12:24:18.160259 MTRR: Fixed MSR 0x268 0x0606060606060606
2000 12:24:18.166910 MTRR: Fixed MSR 0x269 0x0606060606060606
2001 12:24:18.169919 MTRR: Fixed MSR 0x26a 0x0606060606060606
2002 12:24:18.172905 MTRR: Fixed MSR 0x26b 0x0606060606060606
2003 12:24:18.176678 MTRR: Fixed MSR 0x26c 0x0606060606060606
2004 12:24:18.182835 MTRR: Fixed MSR 0x26d 0x0606060606060606
2005 12:24:18.186693 MTRR: Fixed MSR 0x26e 0x0606060606060606
2006 12:24:18.189911 MTRR: Fixed MSR 0x26f 0x0606060606060606
2007 12:24:18.193393 CPU physical address size: 39 bits
2008 12:24:18.196144 call enable_fixed_mtrr()
2009 12:24:18.199623 Checking segment from ROM address 0xffdd16f8
2010 12:24:18.203297 CPU physical address size: 39 bits
2011 12:24:18.209342 Checking segment from ROM address 0xffdd1714
2012 12:24:18.213044 Loading segment from ROM address 0xffdd16f8
2013 12:24:18.216130 code (compression=0)
2014 12:24:18.222771 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2015 12:24:18.232672 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2016 12:24:18.235801 it's not compressed!
2017 12:24:18.327267 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2018 12:24:18.333378 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2019 12:24:18.337245 Loading segment from ROM address 0xffdd1714
2020 12:24:18.340418 Entry Point 0x30000000
2021 12:24:18.343391 Loaded segments
2022 12:24:18.349198 Finalizing chipset.
2023 12:24:18.352263 Finalizing SMM.
2024 12:24:18.355512 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2025 12:24:18.359406 mp_park_aps done after 0 msecs.
2026 12:24:18.365862 Jumping to boot code at 30000000(99b62000)
2027 12:24:18.372361 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2028 12:24:18.372478
2029 12:24:18.372543
2030 12:24:18.372605
2031 12:24:18.375521 Starting depthcharge on Helios...
2032 12:24:18.375605
2033 12:24:18.375972 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2034 12:24:18.376085 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2035 12:24:18.376170 Setting prompt string to ['hatch:']
2036 12:24:18.376266 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2037 12:24:18.385591 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2038 12:24:18.385678
2039 12:24:18.391854 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2040 12:24:18.391939
2041 12:24:18.399100 board_setup: Info: eMMC controller not present; skipping
2042 12:24:18.399184
2043 12:24:18.402215 New NVMe Controller 0x30053ac0 @ 00:1d:00
2044 12:24:18.402314
2045 12:24:18.408574 board_setup: Info: SDHCI controller not present; skipping
2046 12:24:18.408674
2047 12:24:18.415299 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2048 12:24:18.415388
2049 12:24:18.415455 Wipe memory regions:
2050 12:24:18.415519
2051 12:24:18.418304 [0x00000000001000, 0x000000000a0000)
2052 12:24:18.418412
2053 12:24:18.422137 [0x00000000100000, 0x00000030000000)
2054 12:24:18.488503
2055 12:24:18.491118 [0x00000030657430, 0x00000099a2c000)
2056 12:24:18.628592
2057 12:24:18.631933 [0x00000100000000, 0x0000045e800000)
2058 12:24:20.330170
2059 12:24:20.330342 R8152: Initializing
2060 12:24:20.330435
2061 12:24:20.330515 Version 9 (ocp_data = 6010)
2062 12:24:20.330575
2063 12:24:20.330633 R8152: Done initializing
2064 12:24:20.330714
2065 12:24:20.330814 Adding net device
2066 12:24:20.508105
2067 12:24:20.508249 R8152: Initializing
2068 12:24:20.508319
2069 12:24:20.511594 Version 6 (ocp_data = 5c30)
2070 12:24:20.511710
2071 12:24:20.514824 R8152: Done initializing
2072 12:24:20.514899
2073 12:24:20.517780 net_add_device: Attemp to include the same device
2074 12:24:20.521584
2075 12:24:20.529124 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2076 12:24:20.529203
2077 12:24:20.529266
2078 12:24:20.529324
2079 12:24:20.529606 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2081 12:24:20.629906 hatch: tftpboot 192.168.201.1 10724496/tftp-deploy-bh6uywto/kernel/bzImage 10724496/tftp-deploy-bh6uywto/kernel/cmdline 10724496/tftp-deploy-bh6uywto/ramdisk/ramdisk.cpio.gz
2082 12:24:20.630058 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2083 12:24:20.630160 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2084 12:24:20.634556 tftpboot 192.168.201.1 10724496/tftp-deploy-bh6uywto/kernel/bzImploy-bh6uywto/kernel/cmdline 10724496/tftp-deploy-bh6uywto/ramdisk/ramdisk.cpio.gz
2085 12:24:20.634670
2086 12:24:20.634775 Waiting for link
2087 12:24:20.835348
2088 12:24:20.835511 done.
2089 12:24:20.835606
2090 12:24:20.835686 MAC: 00:24:32:50:19:be
2091 12:24:20.835767
2092 12:24:20.838401 Sending DHCP discover... done.
2093 12:24:20.838505
2094 12:24:20.841358 Waiting for reply... done.
2095 12:24:20.841464
2096 12:24:20.844913 Sending DHCP request... done.
2097 12:24:20.844993
2098 12:24:20.848280 Waiting for reply... done.
2099 12:24:20.848386
2100 12:24:20.851238 My ip is 192.168.201.15
2101 12:24:20.851347
2102 12:24:20.855112 The DHCP server ip is 192.168.201.1
2103 12:24:20.855217
2104 12:24:20.858326 TFTP server IP predefined by user: 192.168.201.1
2105 12:24:20.858428
2106 12:24:20.865028 Bootfile predefined by user: 10724496/tftp-deploy-bh6uywto/kernel/bzImage
2107 12:24:20.865112
2108 12:24:20.868126 Sending tftp read request... done.
2109 12:24:20.871350
2110 12:24:20.875101 Waiting for the transfer...
2111 12:24:20.875215
2112 12:24:21.384208 00000000 ################################################################
2113 12:24:21.384386
2114 12:24:21.893492 00080000 ################################################################
2115 12:24:21.893655
2116 12:24:22.402274 00100000 ################################################################
2117 12:24:22.402454
2118 12:24:22.907757 00180000 ################################################################
2119 12:24:22.907899
2120 12:24:23.415347 00200000 ################################################################
2121 12:24:23.415489
2122 12:24:23.925069 00280000 ################################################################
2123 12:24:23.925211
2124 12:24:24.432277 00300000 ################################################################
2125 12:24:24.432413
2126 12:24:24.946148 00380000 ################################################################
2127 12:24:24.946285
2128 12:24:25.491517 00400000 ################################################################
2129 12:24:25.491658
2130 12:24:26.030803 00480000 ################################################################
2131 12:24:26.030952
2132 12:24:26.568407 00500000 ################################################################
2133 12:24:26.568552
2134 12:24:27.102231 00580000 ################################################################
2135 12:24:27.102396
2136 12:24:27.625211 00600000 ################################################################
2137 12:24:27.625349
2138 12:24:28.140797 00680000 ################################################################
2139 12:24:28.140956
2140 12:24:28.657029 00700000 ################################################################
2141 12:24:28.657193
2142 12:24:29.182177 00780000 ################################################################
2143 12:24:29.182311
2144 12:24:29.719130 00800000 ################################################################
2145 12:24:29.719272
2146 12:24:30.253407 00880000 ################################################################
2147 12:24:30.253571
2148 12:24:30.801811 00900000 ################################################################
2149 12:24:30.801943
2150 12:24:31.365385 00980000 ################################################################
2151 12:24:31.365531
2152 12:24:31.747509 00a00000 ############################################### done.
2153 12:24:31.747646
2154 12:24:31.750682 The bootfile was 10863104 bytes long.
2155 12:24:31.750761
2156 12:24:31.753888 Sending tftp read request... done.
2157 12:24:31.753977
2158 12:24:31.757092 Waiting for the transfer...
2159 12:24:31.757178
2160 12:24:32.285297 00000000 ################################################################
2161 12:24:32.285435
2162 12:24:32.804594 00080000 ################################################################
2163 12:24:32.804730
2164 12:24:33.339419 00100000 ################################################################
2165 12:24:33.339566
2166 12:24:33.872546 00180000 ################################################################
2167 12:24:33.872692
2168 12:24:34.401284 00200000 ################################################################
2169 12:24:34.401435
2170 12:24:34.927404 00280000 ################################################################
2171 12:24:34.927571
2172 12:24:35.450746 00300000 ################################################################
2173 12:24:35.450889
2174 12:24:35.981825 00380000 ################################################################
2175 12:24:35.982006
2176 12:24:36.516678 00400000 ################################################################
2177 12:24:36.516897
2178 12:24:37.042144 00480000 ################################################################
2179 12:24:37.042288
2180 12:24:37.601073 00500000 ################################################################
2181 12:24:37.601215
2182 12:24:37.997685 00580000 ################################################ done.
2183 12:24:37.997826
2184 12:24:38.001246 Sending tftp read request... done.
2185 12:24:38.001364
2186 12:24:38.004345 Waiting for the transfer...
2187 12:24:38.004458
2188 12:24:38.004555 00000000 # done.
2189 12:24:38.007446
2190 12:24:38.014721 Command line loaded dynamically from TFTP file: 10724496/tftp-deploy-bh6uywto/kernel/cmdline
2191 12:24:38.014831
2192 12:24:38.041016 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10724496/extract-nfsrootfs-ra2uvnsy,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2193 12:24:38.041129
2194 12:24:38.047287 ec_init(0): CrosEC protocol v3 supported (256, 256)
2195 12:24:38.052250
2196 12:24:38.055542 Shutting down all USB controllers.
2197 12:24:38.055628
2198 12:24:38.055696 Removing current net device
2199 12:24:38.059535
2200 12:24:38.059622 Finalizing coreboot
2201 12:24:38.059691
2202 12:24:38.065848 Exiting depthcharge with code 4 at timestamp: 27048120
2203 12:24:38.065938
2204 12:24:38.066006
2205 12:24:38.066067 Starting kernel ...
2206 12:24:38.066127
2207 12:24:38.066185
2208 12:24:38.066559 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2209 12:24:38.066658 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
2210 12:24:38.066735 Setting prompt string to ['Linux version [0-9]']
2211 12:24:38.066805 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2212 12:24:38.066873 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2214 12:29:00.067634 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
2216 12:29:00.068587 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
2218 12:29:00.069362 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2221 12:29:00.070563 end: 2 depthcharge-action (duration 00:05:00) [common]
2223 12:29:00.071536 Cleaning after the job
2224 12:29:00.071949 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10724496/tftp-deploy-bh6uywto/ramdisk
2225 12:29:00.075302 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10724496/tftp-deploy-bh6uywto/kernel
2226 12:29:00.080395 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10724496/tftp-deploy-bh6uywto/nfsrootfs
2227 12:29:00.177208 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10724496/tftp-deploy-bh6uywto/modules
2228 12:29:00.177891 start: 4.1 power-off (timeout 00:00:30) [common]
2229 12:29:00.178065 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2230 12:29:00.254978 >> Command sent successfully.
2231 12:29:00.259996 Returned 0 in 0 seconds
2232 12:29:00.360941 end: 4.1 power-off (duration 00:00:00) [common]
2234 12:29:00.362289 start: 4.2 read-feedback (timeout 00:10:00) [common]
2235 12:29:00.363367 Listened to connection for namespace 'common' for up to 1s
2237 12:29:00.364541 Listened to connection for namespace 'common' for up to 1s
2238 12:29:01.364097 Finalising connection for namespace 'common'
2239 12:29:01.364672 Disconnecting from shell: Finalise
2240 12:29:01.365054
2241 12:29:01.465735 end: 4.2 read-feedback (duration 00:00:01) [common]
2242 12:29:01.465884 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10724496
2243 12:29:01.930616 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10724496
2244 12:29:01.930816 JobError: Your job cannot terminate cleanly.