Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
1 10:27:07.833280 lava-dispatcher, installed at version: 2023.05.1
2 10:27:07.833480 start: 0 validate
3 10:27:07.833608 Start time: 2023-06-28 10:27:07.833600+00:00 (UTC)
4 10:27:07.833729 Using caching service: 'http://localhost/cache/?uri=%s'
5 10:27:07.833857 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 10:27:08.085354 Using caching service: 'http://localhost/cache/?uri=%s'
7 10:27:08.085553 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.287-cip100-43-g1a6518aa81690%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 10:27:08.335629 Using caching service: 'http://localhost/cache/?uri=%s'
9 10:27:08.335819 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.287-cip100-43-g1a6518aa81690%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 10:27:08.596008 validate duration: 0.76
12 10:27:08.596361 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 10:27:08.596468 start: 1.1 download-retry (timeout 00:10:00) [common]
14 10:27:08.596559 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 10:27:08.596681 Not decompressing ramdisk as can be used compressed.
16 10:27:08.596761 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 10:27:08.596850 saving as /var/lib/lava/dispatcher/tmp/10935855/tftp-deploy-p7kl0hdg/ramdisk/rootfs.cpio.gz
18 10:27:08.596938 total size: 8418130 (8MB)
19 10:27:08.597951 progress 0% (0MB)
20 10:27:08.600358 progress 5% (0MB)
21 10:27:08.602778 progress 10% (0MB)
22 10:27:08.604988 progress 15% (1MB)
23 10:27:08.607407 progress 20% (1MB)
24 10:27:08.609653 progress 25% (2MB)
25 10:27:08.611836 progress 30% (2MB)
26 10:27:08.613892 progress 35% (2MB)
27 10:27:08.616074 progress 40% (3MB)
28 10:27:08.618290 progress 45% (3MB)
29 10:27:08.620440 progress 50% (4MB)
30 10:27:08.622684 progress 55% (4MB)
31 10:27:08.624796 progress 60% (4MB)
32 10:27:08.626813 progress 65% (5MB)
33 10:27:08.628985 progress 70% (5MB)
34 10:27:08.631096 progress 75% (6MB)
35 10:27:08.633268 progress 80% (6MB)
36 10:27:08.635379 progress 85% (6MB)
37 10:27:08.637551 progress 90% (7MB)
38 10:27:08.639712 progress 95% (7MB)
39 10:27:08.641839 progress 100% (8MB)
40 10:27:08.642089 8MB downloaded in 0.05s (177.82MB/s)
41 10:27:08.642231 end: 1.1.1 http-download (duration 00:00:00) [common]
43 10:27:08.642456 end: 1.1 download-retry (duration 00:00:00) [common]
44 10:27:08.642540 start: 1.2 download-retry (timeout 00:10:00) [common]
45 10:27:08.642625 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 10:27:08.642752 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.287-cip100-43-g1a6518aa81690/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 10:27:08.642818 saving as /var/lib/lava/dispatcher/tmp/10935855/tftp-deploy-p7kl0hdg/kernel/bzImage
48 10:27:08.642875 total size: 10863104 (10MB)
49 10:27:08.642931 No compression specified
50 10:27:08.644081 progress 0% (0MB)
51 10:27:08.646903 progress 5% (0MB)
52 10:27:08.649826 progress 10% (1MB)
53 10:27:08.652578 progress 15% (1MB)
54 10:27:08.655446 progress 20% (2MB)
55 10:27:08.658164 progress 25% (2MB)
56 10:27:08.661057 progress 30% (3MB)
57 10:27:08.663943 progress 35% (3MB)
58 10:27:08.666750 progress 40% (4MB)
59 10:27:08.669722 progress 45% (4MB)
60 10:27:08.672438 progress 50% (5MB)
61 10:27:08.675346 progress 55% (5MB)
62 10:27:08.678095 progress 60% (6MB)
63 10:27:08.680985 progress 65% (6MB)
64 10:27:08.683798 progress 70% (7MB)
65 10:27:08.686526 progress 75% (7MB)
66 10:27:08.689386 progress 80% (8MB)
67 10:27:08.692060 progress 85% (8MB)
68 10:27:08.694951 progress 90% (9MB)
69 10:27:08.697631 progress 95% (9MB)
70 10:27:08.700438 progress 100% (10MB)
71 10:27:08.700614 10MB downloaded in 0.06s (179.44MB/s)
72 10:27:08.700757 end: 1.2.1 http-download (duration 00:00:00) [common]
74 10:27:08.701052 end: 1.2 download-retry (duration 00:00:00) [common]
75 10:27:08.701140 start: 1.3 download-retry (timeout 00:10:00) [common]
76 10:27:08.701225 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 10:27:08.701358 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.287-cip100-43-g1a6518aa81690/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 10:27:08.701428 saving as /var/lib/lava/dispatcher/tmp/10935855/tftp-deploy-p7kl0hdg/modules/modules.tar
79 10:27:08.701488 total size: 484660 (0MB)
80 10:27:08.701547 Using unxz to decompress xz
81 10:27:08.705291 progress 6% (0MB)
82 10:27:08.705688 progress 13% (0MB)
83 10:27:08.705997 progress 20% (0MB)
84 10:27:08.707267 progress 27% (0MB)
85 10:27:08.709427 progress 33% (0MB)
86 10:27:08.711622 progress 40% (0MB)
87 10:27:08.713662 progress 47% (0MB)
88 10:27:08.715339 progress 54% (0MB)
89 10:27:08.717644 progress 60% (0MB)
90 10:27:08.719974 progress 67% (0MB)
91 10:27:08.722017 progress 74% (0MB)
92 10:27:08.723890 progress 81% (0MB)
93 10:27:08.725884 progress 87% (0MB)
94 10:27:08.727717 progress 94% (0MB)
95 10:27:08.729805 progress 100% (0MB)
96 10:27:08.735697 0MB downloaded in 0.03s (13.52MB/s)
97 10:27:08.735961 end: 1.3.1 http-download (duration 00:00:00) [common]
99 10:27:08.736215 end: 1.3 download-retry (duration 00:00:00) [common]
100 10:27:08.736309 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
101 10:27:08.736402 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
102 10:27:08.736483 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 10:27:08.736565 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
104 10:27:08.736779 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10935855/lava-overlay-4ye6p4c7
105 10:27:08.736916 makedir: /var/lib/lava/dispatcher/tmp/10935855/lava-overlay-4ye6p4c7/lava-10935855/bin
106 10:27:08.737020 makedir: /var/lib/lava/dispatcher/tmp/10935855/lava-overlay-4ye6p4c7/lava-10935855/tests
107 10:27:08.737115 makedir: /var/lib/lava/dispatcher/tmp/10935855/lava-overlay-4ye6p4c7/lava-10935855/results
108 10:27:08.737223 Creating /var/lib/lava/dispatcher/tmp/10935855/lava-overlay-4ye6p4c7/lava-10935855/bin/lava-add-keys
109 10:27:08.737363 Creating /var/lib/lava/dispatcher/tmp/10935855/lava-overlay-4ye6p4c7/lava-10935855/bin/lava-add-sources
110 10:27:08.737492 Creating /var/lib/lava/dispatcher/tmp/10935855/lava-overlay-4ye6p4c7/lava-10935855/bin/lava-background-process-start
111 10:27:08.737619 Creating /var/lib/lava/dispatcher/tmp/10935855/lava-overlay-4ye6p4c7/lava-10935855/bin/lava-background-process-stop
112 10:27:08.737741 Creating /var/lib/lava/dispatcher/tmp/10935855/lava-overlay-4ye6p4c7/lava-10935855/bin/lava-common-functions
113 10:27:08.737861 Creating /var/lib/lava/dispatcher/tmp/10935855/lava-overlay-4ye6p4c7/lava-10935855/bin/lava-echo-ipv4
114 10:27:08.737984 Creating /var/lib/lava/dispatcher/tmp/10935855/lava-overlay-4ye6p4c7/lava-10935855/bin/lava-install-packages
115 10:27:08.738103 Creating /var/lib/lava/dispatcher/tmp/10935855/lava-overlay-4ye6p4c7/lava-10935855/bin/lava-installed-packages
116 10:27:08.738221 Creating /var/lib/lava/dispatcher/tmp/10935855/lava-overlay-4ye6p4c7/lava-10935855/bin/lava-os-build
117 10:27:08.738340 Creating /var/lib/lava/dispatcher/tmp/10935855/lava-overlay-4ye6p4c7/lava-10935855/bin/lava-probe-channel
118 10:27:08.738458 Creating /var/lib/lava/dispatcher/tmp/10935855/lava-overlay-4ye6p4c7/lava-10935855/bin/lava-probe-ip
119 10:27:08.738576 Creating /var/lib/lava/dispatcher/tmp/10935855/lava-overlay-4ye6p4c7/lava-10935855/bin/lava-target-ip
120 10:27:08.738694 Creating /var/lib/lava/dispatcher/tmp/10935855/lava-overlay-4ye6p4c7/lava-10935855/bin/lava-target-mac
121 10:27:08.738812 Creating /var/lib/lava/dispatcher/tmp/10935855/lava-overlay-4ye6p4c7/lava-10935855/bin/lava-target-storage
122 10:27:08.738937 Creating /var/lib/lava/dispatcher/tmp/10935855/lava-overlay-4ye6p4c7/lava-10935855/bin/lava-test-case
123 10:27:08.739056 Creating /var/lib/lava/dispatcher/tmp/10935855/lava-overlay-4ye6p4c7/lava-10935855/bin/lava-test-event
124 10:27:08.739174 Creating /var/lib/lava/dispatcher/tmp/10935855/lava-overlay-4ye6p4c7/lava-10935855/bin/lava-test-feedback
125 10:27:08.739292 Creating /var/lib/lava/dispatcher/tmp/10935855/lava-overlay-4ye6p4c7/lava-10935855/bin/lava-test-raise
126 10:27:08.739411 Creating /var/lib/lava/dispatcher/tmp/10935855/lava-overlay-4ye6p4c7/lava-10935855/bin/lava-test-reference
127 10:27:08.739533 Creating /var/lib/lava/dispatcher/tmp/10935855/lava-overlay-4ye6p4c7/lava-10935855/bin/lava-test-runner
128 10:27:08.739652 Creating /var/lib/lava/dispatcher/tmp/10935855/lava-overlay-4ye6p4c7/lava-10935855/bin/lava-test-set
129 10:27:08.739772 Creating /var/lib/lava/dispatcher/tmp/10935855/lava-overlay-4ye6p4c7/lava-10935855/bin/lava-test-shell
130 10:27:08.739896 Updating /var/lib/lava/dispatcher/tmp/10935855/lava-overlay-4ye6p4c7/lava-10935855/bin/lava-install-packages (oe)
131 10:27:08.740043 Updating /var/lib/lava/dispatcher/tmp/10935855/lava-overlay-4ye6p4c7/lava-10935855/bin/lava-installed-packages (oe)
132 10:27:08.740159 Creating /var/lib/lava/dispatcher/tmp/10935855/lava-overlay-4ye6p4c7/lava-10935855/environment
133 10:27:08.740254 LAVA metadata
134 10:27:08.740327 - LAVA_JOB_ID=10935855
135 10:27:08.740393 - LAVA_DISPATCHER_IP=192.168.201.1
136 10:27:08.740490 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
137 10:27:08.740559 skipped lava-vland-overlay
138 10:27:08.740631 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 10:27:08.740713 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
140 10:27:08.740774 skipped lava-multinode-overlay
141 10:27:08.740850 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 10:27:08.740930 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
143 10:27:08.741004 Loading test definitions
144 10:27:08.741100 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
145 10:27:08.741173 Using /lava-10935855 at stage 0
146 10:27:08.741469 uuid=10935855_1.4.2.3.1 testdef=None
147 10:27:08.741556 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 10:27:08.741641 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
149 10:27:08.742157 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 10:27:08.742391 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
152 10:27:08.743006 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 10:27:08.743232 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
155 10:27:08.743822 runner path: /var/lib/lava/dispatcher/tmp/10935855/lava-overlay-4ye6p4c7/lava-10935855/0/tests/0_dmesg test_uuid 10935855_1.4.2.3.1
156 10:27:08.743972 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 10:27:08.744210 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
159 10:27:08.744287 Using /lava-10935855 at stage 1
160 10:27:08.744566 uuid=10935855_1.4.2.3.5 testdef=None
161 10:27:08.744652 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 10:27:08.744734 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
163 10:27:08.745250 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 10:27:08.745465 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
166 10:27:08.746098 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 10:27:08.746320 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
169 10:27:08.746923 runner path: /var/lib/lava/dispatcher/tmp/10935855/lava-overlay-4ye6p4c7/lava-10935855/1/tests/1_bootrr test_uuid 10935855_1.4.2.3.5
170 10:27:08.747068 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 10:27:08.747270 Creating lava-test-runner.conf files
173 10:27:08.747333 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10935855/lava-overlay-4ye6p4c7/lava-10935855/0 for stage 0
174 10:27:08.747418 - 0_dmesg
175 10:27:08.747495 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10935855/lava-overlay-4ye6p4c7/lava-10935855/1 for stage 1
176 10:27:08.747582 - 1_bootrr
177 10:27:08.747673 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 10:27:08.747755 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
179 10:27:08.755957 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 10:27:08.756059 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
181 10:27:08.756143 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 10:27:08.756225 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 10:27:08.756325 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
184 10:27:08.998351 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 10:27:08.998748 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
186 10:27:08.998900 extracting modules file /var/lib/lava/dispatcher/tmp/10935855/tftp-deploy-p7kl0hdg/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10935855/extract-overlay-ramdisk-anax3fb_/ramdisk
187 10:27:09.019191 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 10:27:09.019346 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
189 10:27:09.019440 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10935855/compress-overlay-q6phan8n/overlay-1.4.2.4.tar.gz to ramdisk
190 10:27:09.019513 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10935855/compress-overlay-q6phan8n/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10935855/extract-overlay-ramdisk-anax3fb_/ramdisk
191 10:27:09.027499 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 10:27:09.027608 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
193 10:27:09.027699 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 10:27:09.027787 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
195 10:27:09.027863 Building ramdisk /var/lib/lava/dispatcher/tmp/10935855/extract-overlay-ramdisk-anax3fb_/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10935855/extract-overlay-ramdisk-anax3fb_/ramdisk
196 10:27:09.156238 >> 53980 blocks
197 10:27:10.055391 rename /var/lib/lava/dispatcher/tmp/10935855/extract-overlay-ramdisk-anax3fb_/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10935855/tftp-deploy-p7kl0hdg/ramdisk/ramdisk.cpio.gz
198 10:27:10.055841 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 10:27:10.055998 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
200 10:27:10.056105 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
201 10:27:10.056200 No mkimage arch provided, not using FIT.
202 10:27:10.056291 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 10:27:10.056373 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 10:27:10.056478 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 10:27:10.056566 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
206 10:27:10.056646 No LXC device requested
207 10:27:10.056723 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 10:27:10.056842 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
209 10:27:10.056937 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 10:27:10.057008 Checking files for TFTP limit of 4294967296 bytes.
211 10:27:10.057406 end: 1 tftp-deploy (duration 00:00:01) [common]
212 10:27:10.057510 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 10:27:10.057599 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 10:27:10.057716 substitutions:
215 10:27:10.057781 - {DTB}: None
216 10:27:10.057843 - {INITRD}: 10935855/tftp-deploy-p7kl0hdg/ramdisk/ramdisk.cpio.gz
217 10:27:10.057904 - {KERNEL}: 10935855/tftp-deploy-p7kl0hdg/kernel/bzImage
218 10:27:10.057979 - {LAVA_MAC}: None
219 10:27:10.058091 - {PRESEED_CONFIG}: None
220 10:27:10.058159 - {PRESEED_LOCAL}: None
221 10:27:10.058253 - {RAMDISK}: 10935855/tftp-deploy-p7kl0hdg/ramdisk/ramdisk.cpio.gz
222 10:27:10.058306 - {ROOT_PART}: None
223 10:27:10.058359 - {ROOT}: None
224 10:27:10.058410 - {SERVER_IP}: 192.168.201.1
225 10:27:10.058462 - {TEE}: None
226 10:27:10.058514 Parsed boot commands:
227 10:27:10.058567 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 10:27:10.058729 Parsed boot commands: tftpboot 192.168.201.1 10935855/tftp-deploy-p7kl0hdg/kernel/bzImage 10935855/tftp-deploy-p7kl0hdg/kernel/cmdline 10935855/tftp-deploy-p7kl0hdg/ramdisk/ramdisk.cpio.gz
229 10:27:10.058818 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 10:27:10.058900 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 10:27:10.058989 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 10:27:10.059070 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 10:27:10.059136 Not connected, no need to disconnect.
234 10:27:10.059207 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 10:27:10.059288 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 10:27:10.059350 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-3'
237 10:27:10.062756 Setting prompt string to ['lava-test: # ']
238 10:27:10.063084 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 10:27:10.063188 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 10:27:10.063283 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 10:27:10.063372 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 10:27:10.063556 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
243 10:27:15.198593 >> Command sent successfully.
244 10:27:15.208157 Returned 0 in 5 seconds
245 10:27:15.309219 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 10:27:15.310489 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 10:27:15.311056 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 10:27:15.311689 Setting prompt string to 'Starting depthcharge on Helios...'
250 10:27:15.312063 Changing prompt to 'Starting depthcharge on Helios...'
251 10:27:15.312391 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
252 10:27:15.313481 [Enter `^Ec?' for help]
253 10:27:15.921207
254 10:27:15.921731
255 10:27:15.931683 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
256 10:27:15.935719 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
257 10:27:15.941822 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
258 10:27:15.945198 CPU: AES supported, TXT NOT supported, VT supported
259 10:27:15.952171 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
260 10:27:15.955225 PCH: device id 0284 (rev 00) is Cometlake-U Premium
261 10:27:15.961956 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
262 10:27:15.965966 VBOOT: Loading verstage.
263 10:27:15.969225 FMAP: Found "FLASH" version 1.1 at 0xc04000.
264 10:27:15.975683 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
265 10:27:15.978896 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
266 10:27:15.982245 CBFS @ c08000 size 3f8000
267 10:27:15.988775 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
268 10:27:15.992569 CBFS: Locating 'fallback/verstage'
269 10:27:15.995706 CBFS: Found @ offset 10fb80 size 1072c
270 10:27:15.996109
271 10:27:15.996427
272 10:27:16.008864 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
273 10:27:16.022271 Probing TPM: . done!
274 10:27:16.025919 TPM ready after 0 ms
275 10:27:16.028920 Connected to device vid:did:rid of 1ae0:0028:00
276 10:27:16.039282 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
277 10:27:16.043137 Initialized TPM device CR50 revision 0
278 10:27:16.082959 tlcl_send_startup: Startup return code is 0
279 10:27:16.083050 TPM: setup succeeded
280 10:27:16.095482 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
281 10:27:16.099181 Chrome EC: UHEPI supported
282 10:27:16.102345 Phase 1
283 10:27:16.105643 FMAP: area GBB found @ c05000 (12288 bytes)
284 10:27:16.112278 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
285 10:27:16.115515 Phase 2
286 10:27:16.115603 Phase 3
287 10:27:16.118792 FMAP: area GBB found @ c05000 (12288 bytes)
288 10:27:16.125357 VB2:vb2_report_dev_firmware() This is developer signed firmware
289 10:27:16.131983 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
290 10:27:16.135228 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
291 10:27:16.142131 VB2:vb2_verify_keyblock() Checking keyblock signature...
292 10:27:16.157772 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
293 10:27:16.161525 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
294 10:27:16.167883 VB2:vb2_verify_fw_preamble() Verifying preamble.
295 10:27:16.172309 Phase 4
296 10:27:16.175399 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
297 10:27:16.181700 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
298 10:27:16.361964 VB2:vb2_rsa_verify_digest() Digest check failed!
299 10:27:16.368225 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
300 10:27:16.368755 Saving nvdata
301 10:27:16.371574 Reboot requested (10020007)
302 10:27:16.374826 board_reset() called!
303 10:27:16.375422 full_reset() called!
304 10:27:20.896977 &��7l�ock starting (log level: 8)...
305 10:27:20.905300 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
306 10:27:20.908895 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
307 10:27:20.912534 CPU: AES supported, TXT NOT supported, VT supported
308 10:27:20.920290 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
309 10:27:20.924050 PCH: device id 0284 (rev 00) is Cometlake-U Premium
310 10:27:20.927160 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
311 10:27:20.931932 VBOOT: Loading verstage.
312 10:27:20.935518 FMAP: Found "FLASH" version 1.1 at 0xc04000.
313 10:27:20.942954 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
314 10:27:20.946523 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
315 10:27:20.950374 CBFS @ c08000 size 3f8000
316 10:27:20.953757 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
317 10:27:20.957631 CBFS: Locating 'fallback/verstage'
318 10:27:20.964573 CBFS: Found @ offset 10fb80 size 1072c
319 10:27:20.964659
320 10:27:20.964726
321 10:27:20.976173 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
322 10:27:20.991456 Probing TPM: . done!
323 10:27:20.991542 TPM ready after 0 ms
324 10:27:20.998853 Connected to device vid:did:rid of 1ae0:0028:00
325 10:27:21.006570 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
326 10:27:21.056150 Initialized TPM device CR50 revision 0
327 10:27:21.064692 tlcl_send_startup: Startup return code is 0
328 10:27:21.064783 TPM: setup succeeded
329 10:27:21.077130 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
330 10:27:21.080856 Chrome EC: UHEPI supported
331 10:27:21.084691 Phase 1
332 10:27:21.088107 FMAP: area GBB found @ c05000 (12288 bytes)
333 10:27:21.094393 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
334 10:27:21.101220 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
335 10:27:21.104447 Recovery requested (1009000e)
336 10:27:21.109597 Saving nvdata
337 10:27:21.116041 tlcl_extend: response is 0
338 10:27:21.125113 tlcl_extend: response is 0
339 10:27:21.131916 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
340 10:27:21.135092 CBFS @ c08000 size 3f8000
341 10:27:21.141916 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
342 10:27:21.145700 CBFS: Locating 'fallback/romstage'
343 10:27:21.148466 CBFS: Found @ offset 80 size 145fc
344 10:27:21.151747 Accumulated console time in verstage 98 ms
345 10:27:21.151832
346 10:27:21.151898
347 10:27:21.165028 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
348 10:27:21.171551 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
349 10:27:21.174766 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
350 10:27:21.178426 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
351 10:27:21.184668 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
352 10:27:21.188385 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
353 10:27:21.191607 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
354 10:27:21.194649 TCO_STS: 0000 0000
355 10:27:21.197989 GEN_PMCON: e0015238 00000200
356 10:27:21.201058 GBLRST_CAUSE: 00000000 00000000
357 10:27:21.201132 prev_sleep_state 5
358 10:27:21.205009 Boot Count incremented to 60026
359 10:27:21.211745 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
360 10:27:21.215001 CBFS @ c08000 size 3f8000
361 10:27:21.221583 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
362 10:27:21.221666 CBFS: Locating 'fspm.bin'
363 10:27:21.227796 CBFS: Found @ offset 5ffc0 size 71000
364 10:27:21.231290 Chrome EC: UHEPI supported
365 10:27:21.237983 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
366 10:27:21.241655 Probing TPM: done!
367 10:27:21.248218 Connected to device vid:did:rid of 1ae0:0028:00
368 10:27:21.258097 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
369 10:27:21.264126 Initialized TPM device CR50 revision 0
370 10:27:21.272716 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
371 10:27:21.279802 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
372 10:27:21.282904 MRC cache found, size 1948
373 10:27:21.286207 bootmode is set to: 2
374 10:27:21.289255 PRMRR disabled by config.
375 10:27:21.293288 SPD INDEX = 1
376 10:27:21.296170 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
377 10:27:21.299312 CBFS @ c08000 size 3f8000
378 10:27:21.305763 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
379 10:27:21.305846 CBFS: Locating 'spd.bin'
380 10:27:21.309605 CBFS: Found @ offset 5fb80 size 400
381 10:27:21.312561 SPD: module type is LPDDR3
382 10:27:21.315918 SPD: module part is
383 10:27:21.322668 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
384 10:27:21.326374 SPD: device width 4 bits, bus width 8 bits
385 10:27:21.329538 SPD: module size is 4096 MB (per channel)
386 10:27:21.332656 memory slot: 0 configuration done.
387 10:27:21.335654 memory slot: 2 configuration done.
388 10:27:21.387220 CBMEM:
389 10:27:21.390961 IMD: root @ 99fff000 254 entries.
390 10:27:21.394260 IMD: root @ 99ffec00 62 entries.
391 10:27:21.397901 External stage cache:
392 10:27:21.400699 IMD: root @ 9abff000 254 entries.
393 10:27:21.403889 IMD: root @ 9abfec00 62 entries.
394 10:27:21.410987 Chrome EC: clear events_b mask to 0x0000000020004000
395 10:27:21.423686 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
396 10:27:21.433662 tlcl_write: response is 0
397 10:27:21.445837 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
398 10:27:21.452552 MRC: TPM MRC hash updated successfully.
399 10:27:21.452639 2 DIMMs found
400 10:27:21.455867 SMM Memory Map
401 10:27:21.459066 SMRAM : 0x9a000000 0x1000000
402 10:27:21.462639 Subregion 0: 0x9a000000 0xa00000
403 10:27:21.465686 Subregion 1: 0x9aa00000 0x200000
404 10:27:21.469227 Subregion 2: 0x9ac00000 0x400000
405 10:27:21.472191 top_of_ram = 0x9a000000
406 10:27:21.476018 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
407 10:27:21.482484 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
408 10:27:21.485547 MTRR Range: Start=ff000000 End=0 (Size 1000000)
409 10:27:21.492366 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
410 10:27:21.495513 CBFS @ c08000 size 3f8000
411 10:27:21.498905 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
412 10:27:21.502053 CBFS: Locating 'fallback/postcar'
413 10:27:21.509090 CBFS: Found @ offset 107000 size 4b44
414 10:27:21.512269 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
415 10:27:21.525142 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
416 10:27:21.528327 Processing 180 relocs. Offset value of 0x97c0c000
417 10:27:21.536725 Accumulated console time in romstage 286 ms
418 10:27:21.536837
419 10:27:21.536906
420 10:27:21.546741 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
421 10:27:21.553410 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
422 10:27:21.556453 CBFS @ c08000 size 3f8000
423 10:27:21.559872 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
424 10:27:21.566338 CBFS: Locating 'fallback/ramstage'
425 10:27:21.570029 CBFS: Found @ offset 43380 size 1b9e8
426 10:27:21.576507 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
427 10:27:21.608359 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
428 10:27:21.611899 Processing 3976 relocs. Offset value of 0x98db0000
429 10:27:21.618660 Accumulated console time in postcar 52 ms
430 10:27:21.618745
431 10:27:21.618811
432 10:27:21.628272 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
433 10:27:21.635047 FMAP: area RO_VPD found @ c00000 (16384 bytes)
434 10:27:21.638242 WARNING: RO_VPD is uninitialized or empty.
435 10:27:21.641339 FMAP: area RW_VPD found @ af8000 (8192 bytes)
436 10:27:21.648388 FMAP: area RW_VPD found @ af8000 (8192 bytes)
437 10:27:21.648475 Normal boot.
438 10:27:21.654583 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
439 10:27:21.657881 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
440 10:27:21.661162 CBFS @ c08000 size 3f8000
441 10:27:21.667957 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
442 10:27:21.671489 CBFS: Locating 'cpu_microcode_blob.bin'
443 10:27:21.674523 CBFS: Found @ offset 14700 size 2ec00
444 10:27:21.678253 microcode: sig=0x806ec pf=0x4 revision=0xc9
445 10:27:21.681076 Skip microcode update
446 10:27:21.687901 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
447 10:27:21.687986 CBFS @ c08000 size 3f8000
448 10:27:21.694620 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
449 10:27:21.698050 CBFS: Locating 'fsps.bin'
450 10:27:21.701066 CBFS: Found @ offset d1fc0 size 35000
451 10:27:21.726774 Detected 4 core, 8 thread CPU.
452 10:27:21.729879 Setting up SMI for CPU
453 10:27:21.732946 IED base = 0x9ac00000
454 10:27:21.733030 IED size = 0x00400000
455 10:27:21.736953 Will perform SMM setup.
456 10:27:21.743160 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
457 10:27:21.749582 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
458 10:27:21.753233 Processing 16 relocs. Offset value of 0x00030000
459 10:27:21.756633 Attempting to start 7 APs
460 10:27:21.759809 Waiting for 10ms after sending INIT.
461 10:27:21.776572 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
462 10:27:21.776659 done.
463 10:27:21.779643 AP: slot 2 apic_id 5.
464 10:27:21.783329 AP: slot 5 apic_id 4.
465 10:27:21.783414 AP: slot 7 apic_id 6.
466 10:27:21.786352 AP: slot 6 apic_id 7.
467 10:27:21.790012 Waiting for 2nd SIPI to complete...done.
468 10:27:21.793057 AP: slot 1 apic_id 3.
469 10:27:21.796030 AP: slot 4 apic_id 2.
470 10:27:21.802639 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
471 10:27:21.809573 Processing 13 relocs. Offset value of 0x00038000
472 10:27:21.816058 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
473 10:27:21.819138 Installing SMM handler to 0x9a000000
474 10:27:21.826206 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
475 10:27:21.832587 Processing 658 relocs. Offset value of 0x9a010000
476 10:27:21.839358 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
477 10:27:21.842521 Processing 13 relocs. Offset value of 0x9a008000
478 10:27:21.849588 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
479 10:27:21.855839 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
480 10:27:21.862959 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
481 10:27:21.866027 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
482 10:27:21.872296 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
483 10:27:21.879460 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
484 10:27:21.882349 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
485 10:27:21.889079 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
486 10:27:21.892467 Clearing SMI status registers
487 10:27:21.896633 SMI_STS: PM1
488 10:27:21.896720 PM1_STS: PWRBTN
489 10:27:21.899197 TCO_STS: SECOND_TO
490 10:27:21.902677 New SMBASE 0x9a000000
491 10:27:21.906436 In relocation handler: CPU 0
492 10:27:21.909295 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
493 10:27:21.912464 Writing SMRR. base = 0x9a000006, mask=0xff000800
494 10:27:21.916041 Relocation complete.
495 10:27:21.919320 New SMBASE 0x99fff400
496 10:27:21.919395 In relocation handler: CPU 3
497 10:27:21.925938 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
498 10:27:21.929280 Writing SMRR. base = 0x9a000006, mask=0xff000800
499 10:27:21.932314 Relocation complete.
500 10:27:21.936189 New SMBASE 0x99ffec00
501 10:27:21.936266 In relocation handler: CPU 5
502 10:27:21.942454 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
503 10:27:21.945476 Writing SMRR. base = 0x9a000006, mask=0xff000800
504 10:27:21.949248 Relocation complete.
505 10:27:21.949324 New SMBASE 0x99fff800
506 10:27:21.952413 In relocation handler: CPU 2
507 10:27:21.958690 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
508 10:27:21.962312 Writing SMRR. base = 0x9a000006, mask=0xff000800
509 10:27:21.965572 Relocation complete.
510 10:27:21.965646 New SMBASE 0x99fffc00
511 10:27:21.968712 In relocation handler: CPU 1
512 10:27:21.975952 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
513 10:27:21.979014 Writing SMRR. base = 0x9a000006, mask=0xff000800
514 10:27:21.982202 Relocation complete.
515 10:27:21.982278 New SMBASE 0x99fff000
516 10:27:21.985542 In relocation handler: CPU 4
517 10:27:21.989072 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
518 10:27:21.995253 Writing SMRR. base = 0x9a000006, mask=0xff000800
519 10:27:21.998738 Relocation complete.
520 10:27:21.998811 New SMBASE 0x99ffe800
521 10:27:22.002048 In relocation handler: CPU 6
522 10:27:22.005409 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
523 10:27:22.012220 Writing SMRR. base = 0x9a000006, mask=0xff000800
524 10:27:22.012307 Relocation complete.
525 10:27:22.015737 New SMBASE 0x99ffe400
526 10:27:22.018845 In relocation handler: CPU 7
527 10:27:22.022759 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
528 10:27:22.029037 Writing SMRR. base = 0x9a000006, mask=0xff000800
529 10:27:22.029115 Relocation complete.
530 10:27:22.032328 Initializing CPU #0
531 10:27:22.035623 CPU: vendor Intel device 806ec
532 10:27:22.038955 CPU: family 06, model 8e, stepping 0c
533 10:27:22.042532 Clearing out pending MCEs
534 10:27:22.045675 Setting up local APIC...
535 10:27:22.045752 apic_id: 0x00 done.
536 10:27:22.048877 Turbo is available but hidden
537 10:27:22.052082 Turbo is available and visible
538 10:27:22.056000 VMX status: enabled
539 10:27:22.059040 IA32_FEATURE_CONTROL status: locked
540 10:27:22.062173 Skip microcode update
541 10:27:22.062246 CPU #0 initialized
542 10:27:22.065281 Initializing CPU #3
543 10:27:22.065353 Initializing CPU #6
544 10:27:22.068440 Initializing CPU #7
545 10:27:22.072270 CPU: vendor Intel device 806ec
546 10:27:22.075480 CPU: family 06, model 8e, stepping 0c
547 10:27:22.078576 Initializing CPU #5
548 10:27:22.078649 Initializing CPU #2
549 10:27:22.081931 CPU: vendor Intel device 806ec
550 10:27:22.089166 CPU: family 06, model 8e, stepping 0c
551 10:27:22.089250 CPU: vendor Intel device 806ec
552 10:27:22.095055 CPU: family 06, model 8e, stepping 0c
553 10:27:22.095139 Clearing out pending MCEs
554 10:27:22.098548 Clearing out pending MCEs
555 10:27:22.101757 Setting up local APIC...
556 10:27:22.105277 Initializing CPU #1
557 10:27:22.105349 Initializing CPU #4
558 10:27:22.108696 CPU: vendor Intel device 806ec
559 10:27:22.111936 CPU: family 06, model 8e, stepping 0c
560 10:27:22.114890 CPU: vendor Intel device 806ec
561 10:27:22.118391 CPU: family 06, model 8e, stepping 0c
562 10:27:22.121616 Clearing out pending MCEs
563 10:27:22.125011 Clearing out pending MCEs
564 10:27:22.128245 Setting up local APIC...
565 10:27:22.128315 Clearing out pending MCEs
566 10:27:22.131679 CPU: vendor Intel device 806ec
567 10:27:22.138373 CPU: family 06, model 8e, stepping 0c
568 10:27:22.138448 Clearing out pending MCEs
569 10:27:22.141678 apic_id: 0x03 done.
570 10:27:22.144970 Setting up local APIC...
571 10:27:22.145039 apic_id: 0x04 done.
572 10:27:22.147979 Setting up local APIC...
573 10:27:22.151232 CPU: vendor Intel device 806ec
574 10:27:22.155174 CPU: family 06, model 8e, stepping 0c
575 10:27:22.158356 Clearing out pending MCEs
576 10:27:22.161234 apic_id: 0x05 done.
577 10:27:22.161308 Setting up local APIC...
578 10:27:22.164423 Setting up local APIC...
579 10:27:22.168215 VMX status: enabled
580 10:27:22.168295 VMX status: enabled
581 10:27:22.174526 IA32_FEATURE_CONTROL status: locked
582 10:27:22.178224 IA32_FEATURE_CONTROL status: locked
583 10:27:22.178312 apic_id: 0x01 done.
584 10:27:22.181470 Skip microcode update
585 10:27:22.184562 Skip microcode update
586 10:27:22.184631 CPU #5 initialized
587 10:27:22.187840 CPU #2 initialized
588 10:27:22.187907 apic_id: 0x02 done.
589 10:27:22.191018 VMX status: enabled
590 10:27:22.194807 VMX status: enabled
591 10:27:22.197944 IA32_FEATURE_CONTROL status: locked
592 10:27:22.200991 IA32_FEATURE_CONTROL status: locked
593 10:27:22.204579 Skip microcode update
594 10:27:22.204650 apic_id: 0x06 done.
595 10:27:22.207560 Setting up local APIC...
596 10:27:22.211165 Skip microcode update
597 10:27:22.211241 CPU #1 initialized
598 10:27:22.214669 CPU #4 initialized
599 10:27:22.214737 VMX status: enabled
600 10:27:22.217876 VMX status: enabled
601 10:27:22.221436 apic_id: 0x07 done.
602 10:27:22.224459 IA32_FEATURE_CONTROL status: locked
603 10:27:22.224538 VMX status: enabled
604 10:27:22.228066 Skip microcode update
605 10:27:22.231167 IA32_FEATURE_CONTROL status: locked
606 10:27:22.234318 CPU #7 initialized
607 10:27:22.234401 Skip microcode update
608 10:27:22.241370 IA32_FEATURE_CONTROL status: locked
609 10:27:22.241453 CPU #6 initialized
610 10:27:22.244218 Skip microcode update
611 10:27:22.244302 CPU #3 initialized
612 10:27:22.251337 bsp_do_flight_plan done after 457 msecs.
613 10:27:22.254447 CPU: frequency set to 4200 MHz
614 10:27:22.254530 Enabling SMIs.
615 10:27:22.254596 Locking SMM.
616 10:27:22.271011 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
617 10:27:22.274113 CBFS @ c08000 size 3f8000
618 10:27:22.280646 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
619 10:27:22.280747 CBFS: Locating 'vbt.bin'
620 10:27:22.283768 CBFS: Found @ offset 5f5c0 size 499
621 10:27:22.290969 Found a VBT of 4608 bytes after decompression
622 10:27:22.476093 Display FSP Version Info HOB
623 10:27:22.479648 Reference Code - CPU = 9.0.1e.30
624 10:27:22.482826 uCode Version = 0.0.0.ca
625 10:27:22.485915 TXT ACM version = ff.ff.ff.ffff
626 10:27:22.489136 Display FSP Version Info HOB
627 10:27:22.493089 Reference Code - ME = 9.0.1e.30
628 10:27:22.496177 MEBx version = 0.0.0.0
629 10:27:22.499512 ME Firmware Version = Consumer SKU
630 10:27:22.502596 Display FSP Version Info HOB
631 10:27:22.505823 Reference Code - CML PCH = 9.0.1e.30
632 10:27:22.509364 PCH-CRID Status = Disabled
633 10:27:22.512230 PCH-CRID Original Value = ff.ff.ff.ffff
634 10:27:22.516025 PCH-CRID New Value = ff.ff.ff.ffff
635 10:27:22.519158 OPROM - RST - RAID = ff.ff.ff.ffff
636 10:27:22.522192 ChipsetInit Base Version = ff.ff.ff.ffff
637 10:27:22.525786 ChipsetInit Oem Version = ff.ff.ff.ffff
638 10:27:22.528800 Display FSP Version Info HOB
639 10:27:22.535482 Reference Code - SA - System Agent = 9.0.1e.30
640 10:27:22.539058 Reference Code - MRC = 0.7.1.6c
641 10:27:22.539158 SA - PCIe Version = 9.0.1e.30
642 10:27:22.542675 SA-CRID Status = Disabled
643 10:27:22.545793 SA-CRID Original Value = 0.0.0.c
644 10:27:22.549423 SA-CRID New Value = 0.0.0.c
645 10:27:22.552534 OPROM - VBIOS = ff.ff.ff.ffff
646 10:27:22.555526 RTC Init
647 10:27:22.559173 Set power on after power failure.
648 10:27:22.559274 Disabling Deep S3
649 10:27:22.562385 Disabling Deep S3
650 10:27:22.562475 Disabling Deep S4
651 10:27:22.565578 Disabling Deep S4
652 10:27:22.565661 Disabling Deep S5
653 10:27:22.568701 Disabling Deep S5
654 10:27:22.575693 BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 196 exit 1
655 10:27:22.575776 Enumerating buses...
656 10:27:22.582207 Show all devs... Before device enumeration.
657 10:27:22.582290 Root Device: enabled 1
658 10:27:22.585135 CPU_CLUSTER: 0: enabled 1
659 10:27:22.588840 DOMAIN: 0000: enabled 1
660 10:27:22.592006 APIC: 00: enabled 1
661 10:27:22.592089 PCI: 00:00.0: enabled 1
662 10:27:22.595294 PCI: 00:02.0: enabled 1
663 10:27:22.598405 PCI: 00:04.0: enabled 0
664 10:27:22.602064 PCI: 00:05.0: enabled 0
665 10:27:22.602146 PCI: 00:12.0: enabled 1
666 10:27:22.605339 PCI: 00:12.5: enabled 0
667 10:27:22.608544 PCI: 00:12.6: enabled 0
668 10:27:22.611773 PCI: 00:14.0: enabled 1
669 10:27:22.611856 PCI: 00:14.1: enabled 0
670 10:27:22.614998 PCI: 00:14.3: enabled 1
671 10:27:22.618268 PCI: 00:14.5: enabled 0
672 10:27:22.618351 PCI: 00:15.0: enabled 1
673 10:27:22.621973 PCI: 00:15.1: enabled 1
674 10:27:22.625072 PCI: 00:15.2: enabled 0
675 10:27:22.628165 PCI: 00:15.3: enabled 0
676 10:27:22.628248 PCI: 00:16.0: enabled 1
677 10:27:22.631787 PCI: 00:16.1: enabled 0
678 10:27:22.634984 PCI: 00:16.2: enabled 0
679 10:27:22.638438 PCI: 00:16.3: enabled 0
680 10:27:22.638522 PCI: 00:16.4: enabled 0
681 10:27:22.641311 PCI: 00:16.5: enabled 0
682 10:27:22.644914 PCI: 00:17.0: enabled 1
683 10:27:22.647840 PCI: 00:19.0: enabled 1
684 10:27:22.647925 PCI: 00:19.1: enabled 0
685 10:27:22.651453 PCI: 00:19.2: enabled 0
686 10:27:22.654859 PCI: 00:1a.0: enabled 0
687 10:27:22.654943 PCI: 00:1c.0: enabled 0
688 10:27:22.657959 PCI: 00:1c.1: enabled 0
689 10:27:22.661434 PCI: 00:1c.2: enabled 0
690 10:27:22.664705 PCI: 00:1c.3: enabled 0
691 10:27:22.664815 PCI: 00:1c.4: enabled 0
692 10:27:22.668083 PCI: 00:1c.5: enabled 0
693 10:27:22.671221 PCI: 00:1c.6: enabled 0
694 10:27:22.674584 PCI: 00:1c.7: enabled 0
695 10:27:22.674670 PCI: 00:1d.0: enabled 1
696 10:27:22.677601 PCI: 00:1d.1: enabled 0
697 10:27:22.681432 PCI: 00:1d.2: enabled 0
698 10:27:22.684641 PCI: 00:1d.3: enabled 0
699 10:27:22.684728 PCI: 00:1d.4: enabled 0
700 10:27:22.687883 PCI: 00:1d.5: enabled 1
701 10:27:22.690856 PCI: 00:1e.0: enabled 1
702 10:27:22.694594 PCI: 00:1e.1: enabled 0
703 10:27:22.694680 PCI: 00:1e.2: enabled 1
704 10:27:22.697727 PCI: 00:1e.3: enabled 1
705 10:27:22.700786 PCI: 00:1f.0: enabled 1
706 10:27:22.700911 PCI: 00:1f.1: enabled 1
707 10:27:22.704065 PCI: 00:1f.2: enabled 1
708 10:27:22.707354 PCI: 00:1f.3: enabled 1
709 10:27:22.710561 PCI: 00:1f.4: enabled 1
710 10:27:22.710648 PCI: 00:1f.5: enabled 1
711 10:27:22.713893 PCI: 00:1f.6: enabled 0
712 10:27:22.717690 USB0 port 0: enabled 1
713 10:27:22.721139 I2C: 00:15: enabled 1
714 10:27:22.721226 I2C: 00:5d: enabled 1
715 10:27:22.724135 GENERIC: 0.0: enabled 1
716 10:27:22.727287 I2C: 00:1a: enabled 1
717 10:27:22.727373 I2C: 00:38: enabled 1
718 10:27:22.730313 I2C: 00:39: enabled 1
719 10:27:22.733529 I2C: 00:3a: enabled 1
720 10:27:22.733613 I2C: 00:3b: enabled 1
721 10:27:22.737101 PCI: 00:00.0: enabled 1
722 10:27:22.740335 SPI: 00: enabled 1
723 10:27:22.740417 SPI: 01: enabled 1
724 10:27:22.743963 PNP: 0c09.0: enabled 1
725 10:27:22.746853 USB2 port 0: enabled 1
726 10:27:22.746938 USB2 port 1: enabled 1
727 10:27:22.750248 USB2 port 2: enabled 0
728 10:27:22.753883 USB2 port 3: enabled 0
729 10:27:22.756720 USB2 port 5: enabled 0
730 10:27:22.756853 USB2 port 6: enabled 1
731 10:27:22.760126 USB2 port 9: enabled 1
732 10:27:22.763423 USB3 port 0: enabled 1
733 10:27:22.763508 USB3 port 1: enabled 1
734 10:27:22.766586 USB3 port 2: enabled 1
735 10:27:22.769800 USB3 port 3: enabled 1
736 10:27:22.773415 USB3 port 4: enabled 0
737 10:27:22.773499 APIC: 03: enabled 1
738 10:27:22.776960 APIC: 05: enabled 1
739 10:27:22.777044 APIC: 01: enabled 1
740 10:27:22.779847 APIC: 02: enabled 1
741 10:27:22.783577 APIC: 04: enabled 1
742 10:27:22.783661 APIC: 07: enabled 1
743 10:27:22.786729 APIC: 06: enabled 1
744 10:27:22.786812 Compare with tree...
745 10:27:22.790006 Root Device: enabled 1
746 10:27:22.793281 CPU_CLUSTER: 0: enabled 1
747 10:27:22.797042 APIC: 00: enabled 1
748 10:27:22.797125 APIC: 03: enabled 1
749 10:27:22.800108 APIC: 05: enabled 1
750 10:27:22.803156 APIC: 01: enabled 1
751 10:27:22.803241 APIC: 02: enabled 1
752 10:27:22.806345 APIC: 04: enabled 1
753 10:27:22.809526 APIC: 07: enabled 1
754 10:27:22.809610 APIC: 06: enabled 1
755 10:27:22.813323 DOMAIN: 0000: enabled 1
756 10:27:22.816576 PCI: 00:00.0: enabled 1
757 10:27:22.819917 PCI: 00:02.0: enabled 1
758 10:27:22.823121 PCI: 00:04.0: enabled 0
759 10:27:22.823207 PCI: 00:05.0: enabled 0
760 10:27:22.826361 PCI: 00:12.0: enabled 1
761 10:27:22.829480 PCI: 00:12.5: enabled 0
762 10:27:22.832597 PCI: 00:12.6: enabled 0
763 10:27:22.835886 PCI: 00:14.0: enabled 1
764 10:27:22.835970 USB0 port 0: enabled 1
765 10:27:22.839620 USB2 port 0: enabled 1
766 10:27:22.842591 USB2 port 1: enabled 1
767 10:27:22.846220 USB2 port 2: enabled 0
768 10:27:22.849231 USB2 port 3: enabled 0
769 10:27:22.852741 USB2 port 5: enabled 0
770 10:27:22.852863 USB2 port 6: enabled 1
771 10:27:22.855788 USB2 port 9: enabled 1
772 10:27:22.859525 USB3 port 0: enabled 1
773 10:27:22.862681 USB3 port 1: enabled 1
774 10:27:22.866145 USB3 port 2: enabled 1
775 10:27:22.866255 USB3 port 3: enabled 1
776 10:27:22.869291 USB3 port 4: enabled 0
777 10:27:22.872134 PCI: 00:14.1: enabled 0
778 10:27:22.875817 PCI: 00:14.3: enabled 1
779 10:27:22.878943 PCI: 00:14.5: enabled 0
780 10:27:22.879028 PCI: 00:15.0: enabled 1
781 10:27:22.882173 I2C: 00:15: enabled 1
782 10:27:22.885464 PCI: 00:15.1: enabled 1
783 10:27:22.889084 I2C: 00:5d: enabled 1
784 10:27:22.892310 GENERIC: 0.0: enabled 1
785 10:27:22.892408 PCI: 00:15.2: enabled 0
786 10:27:22.895221 PCI: 00:15.3: enabled 0
787 10:27:22.898538 PCI: 00:16.0: enabled 1
788 10:27:22.902359 PCI: 00:16.1: enabled 0
789 10:27:22.905512 PCI: 00:16.2: enabled 0
790 10:27:22.905596 PCI: 00:16.3: enabled 0
791 10:27:22.908601 PCI: 00:16.4: enabled 0
792 10:27:22.912619 PCI: 00:16.5: enabled 0
793 10:27:22.915619 PCI: 00:17.0: enabled 1
794 10:27:22.919155 PCI: 00:19.0: enabled 1
795 10:27:22.919239 I2C: 00:1a: enabled 1
796 10:27:22.921978 I2C: 00:38: enabled 1
797 10:27:22.925338 I2C: 00:39: enabled 1
798 10:27:22.928412 I2C: 00:3a: enabled 1
799 10:27:22.928496 I2C: 00:3b: enabled 1
800 10:27:22.932345 PCI: 00:19.1: enabled 0
801 10:27:22.934947 PCI: 00:19.2: enabled 0
802 10:27:22.938849 PCI: 00:1a.0: enabled 0
803 10:27:22.941862 PCI: 00:1c.0: enabled 0
804 10:27:22.941946 PCI: 00:1c.1: enabled 0
805 10:27:22.944852 PCI: 00:1c.2: enabled 0
806 10:27:22.948747 PCI: 00:1c.3: enabled 0
807 10:27:22.951655 PCI: 00:1c.4: enabled 0
808 10:27:22.955184 PCI: 00:1c.5: enabled 0
809 10:27:22.955269 PCI: 00:1c.6: enabled 0
810 10:27:22.958166 PCI: 00:1c.7: enabled 0
811 10:27:22.961862 PCI: 00:1d.0: enabled 1
812 10:27:22.964842 PCI: 00:1d.1: enabled 0
813 10:27:22.964941 PCI: 00:1d.2: enabled 0
814 10:27:22.968384 PCI: 00:1d.3: enabled 0
815 10:27:22.971420 PCI: 00:1d.4: enabled 0
816 10:27:22.975144 PCI: 00:1d.5: enabled 1
817 10:27:22.977948 PCI: 00:00.0: enabled 1
818 10:27:22.981915 PCI: 00:1e.0: enabled 1
819 10:27:22.982000 PCI: 00:1e.1: enabled 0
820 10:27:22.985001 PCI: 00:1e.2: enabled 1
821 10:27:22.988149 SPI: 00: enabled 1
822 10:27:22.991500 PCI: 00:1e.3: enabled 1
823 10:27:22.991584 SPI: 01: enabled 1
824 10:27:22.994490 PCI: 00:1f.0: enabled 1
825 10:27:22.998172 PNP: 0c09.0: enabled 1
826 10:27:23.001508 PCI: 00:1f.1: enabled 1
827 10:27:23.001592 PCI: 00:1f.2: enabled 1
828 10:27:23.004513 PCI: 00:1f.3: enabled 1
829 10:27:23.007719 PCI: 00:1f.4: enabled 1
830 10:27:23.010810 PCI: 00:1f.5: enabled 1
831 10:27:23.014326 PCI: 00:1f.6: enabled 0
832 10:27:23.014411 Root Device scanning...
833 10:27:23.017558 scan_static_bus for Root Device
834 10:27:23.020859 CPU_CLUSTER: 0 enabled
835 10:27:23.023890 DOMAIN: 0000 enabled
836 10:27:23.027600 DOMAIN: 0000 scanning...
837 10:27:23.031097 PCI: pci_scan_bus for bus 00
838 10:27:23.031182 PCI: 00:00.0 [8086/0000] ops
839 10:27:23.034671 PCI: 00:00.0 [8086/9b61] enabled
840 10:27:23.037608 PCI: 00:02.0 [8086/0000] bus ops
841 10:27:23.040938 PCI: 00:02.0 [8086/9b41] enabled
842 10:27:23.047279 PCI: 00:04.0 [8086/1903] disabled
843 10:27:23.050805 PCI: 00:08.0 [8086/1911] enabled
844 10:27:23.053716 PCI: 00:12.0 [8086/02f9] enabled
845 10:27:23.057543 PCI: 00:14.0 [8086/0000] bus ops
846 10:27:23.060350 PCI: 00:14.0 [8086/02ed] enabled
847 10:27:23.063977 PCI: 00:14.2 [8086/02ef] enabled
848 10:27:23.067267 PCI: 00:14.3 [8086/02f0] enabled
849 10:27:23.070305 PCI: 00:15.0 [8086/0000] bus ops
850 10:27:23.073712 PCI: 00:15.0 [8086/02e8] enabled
851 10:27:23.076823 PCI: 00:15.1 [8086/0000] bus ops
852 10:27:23.080338 PCI: 00:15.1 [8086/02e9] enabled
853 10:27:23.080423 PCI: 00:16.0 [8086/0000] ops
854 10:27:23.083435 PCI: 00:16.0 [8086/02e0] enabled
855 10:27:23.087079 PCI: 00:17.0 [8086/0000] ops
856 10:27:23.090685 PCI: 00:17.0 [8086/02d3] enabled
857 10:27:23.093803 PCI: 00:19.0 [8086/0000] bus ops
858 10:27:23.097163 PCI: 00:19.0 [8086/02c5] enabled
859 10:27:23.100251 PCI: 00:1d.0 [8086/0000] bus ops
860 10:27:23.103722 PCI: 00:1d.0 [8086/02b0] enabled
861 10:27:23.110286 PCI: Static device PCI: 00:1d.5 not found, disabling it.
862 10:27:23.113266 PCI: 00:1e.0 [8086/0000] ops
863 10:27:23.117094 PCI: 00:1e.0 [8086/02a8] enabled
864 10:27:23.120131 PCI: 00:1e.2 [8086/0000] bus ops
865 10:27:23.123414 PCI: 00:1e.2 [8086/02aa] enabled
866 10:27:23.126779 PCI: 00:1e.3 [8086/0000] bus ops
867 10:27:23.129947 PCI: 00:1e.3 [8086/02ab] enabled
868 10:27:23.133732 PCI: 00:1f.0 [8086/0000] bus ops
869 10:27:23.137095 PCI: 00:1f.0 [8086/0284] enabled
870 10:27:23.143457 PCI: Static device PCI: 00:1f.1 not found, disabling it.
871 10:27:23.146681 PCI: Static device PCI: 00:1f.2 not found, disabling it.
872 10:27:23.149830 PCI: 00:1f.3 [8086/0000] bus ops
873 10:27:23.153037 PCI: 00:1f.3 [8086/02c8] enabled
874 10:27:23.156902 PCI: 00:1f.4 [8086/0000] bus ops
875 10:27:23.159811 PCI: 00:1f.4 [8086/02a3] enabled
876 10:27:23.163442 PCI: 00:1f.5 [8086/0000] bus ops
877 10:27:23.166541 PCI: 00:1f.5 [8086/02a4] enabled
878 10:27:23.169946 PCI: Leftover static devices:
879 10:27:23.173100 PCI: 00:05.0
880 10:27:23.173178 PCI: 00:12.5
881 10:27:23.176797 PCI: 00:12.6
882 10:27:23.176906 PCI: 00:14.1
883 10:27:23.176968 PCI: 00:14.5
884 10:27:23.179730 PCI: 00:15.2
885 10:27:23.179828 PCI: 00:15.3
886 10:27:23.183333 PCI: 00:16.1
887 10:27:23.183404 PCI: 00:16.2
888 10:27:23.183470 PCI: 00:16.3
889 10:27:23.186404 PCI: 00:16.4
890 10:27:23.186473 PCI: 00:16.5
891 10:27:23.189423 PCI: 00:19.1
892 10:27:23.189501 PCI: 00:19.2
893 10:27:23.189564 PCI: 00:1a.0
894 10:27:23.193276 PCI: 00:1c.0
895 10:27:23.193345 PCI: 00:1c.1
896 10:27:23.196027 PCI: 00:1c.2
897 10:27:23.196121 PCI: 00:1c.3
898 10:27:23.199848 PCI: 00:1c.4
899 10:27:23.199918 PCI: 00:1c.5
900 10:27:23.199980 PCI: 00:1c.6
901 10:27:23.203205 PCI: 00:1c.7
902 10:27:23.203275 PCI: 00:1d.1
903 10:27:23.206224 PCI: 00:1d.2
904 10:27:23.206296 PCI: 00:1d.3
905 10:27:23.206356 PCI: 00:1d.4
906 10:27:23.209436 PCI: 00:1d.5
907 10:27:23.209511 PCI: 00:1e.1
908 10:27:23.212629 PCI: 00:1f.1
909 10:27:23.212729 PCI: 00:1f.2
910 10:27:23.212839 PCI: 00:1f.6
911 10:27:23.215914 PCI: Check your devicetree.cb.
912 10:27:23.219668 PCI: 00:02.0 scanning...
913 10:27:23.222645 scan_generic_bus for PCI: 00:02.0
914 10:27:23.226007 scan_generic_bus for PCI: 00:02.0 done
915 10:27:23.232953 scan_bus: scanning of bus PCI: 00:02.0 took 10166 usecs
916 10:27:23.235895 PCI: 00:14.0 scanning...
917 10:27:23.239146 scan_static_bus for PCI: 00:14.0
918 10:27:23.242909 USB0 port 0 enabled
919 10:27:23.242980 USB0 port 0 scanning...
920 10:27:23.246061 scan_static_bus for USB0 port 0
921 10:27:23.249180 USB2 port 0 enabled
922 10:27:23.252426 USB2 port 1 enabled
923 10:27:23.252532 USB2 port 2 disabled
924 10:27:23.256535 USB2 port 3 disabled
925 10:27:23.259422 USB2 port 5 disabled
926 10:27:23.259495 USB2 port 6 enabled
927 10:27:23.262619 USB2 port 9 enabled
928 10:27:23.262692 USB3 port 0 enabled
929 10:27:23.266210 USB3 port 1 enabled
930 10:27:23.269199 USB3 port 2 enabled
931 10:27:23.269297 USB3 port 3 enabled
932 10:27:23.272662 USB3 port 4 disabled
933 10:27:23.275847 USB2 port 0 scanning...
934 10:27:23.278851 scan_static_bus for USB2 port 0
935 10:27:23.282355 scan_static_bus for USB2 port 0 done
936 10:27:23.285596 scan_bus: scanning of bus USB2 port 0 took 9685 usecs
937 10:27:23.288914 USB2 port 1 scanning...
938 10:27:23.292693 scan_static_bus for USB2 port 1
939 10:27:23.295631 scan_static_bus for USB2 port 1 done
940 10:27:23.302054 scan_bus: scanning of bus USB2 port 1 took 9700 usecs
941 10:27:23.305683 USB2 port 6 scanning...
942 10:27:23.309024 scan_static_bus for USB2 port 6
943 10:27:23.312207 scan_static_bus for USB2 port 6 done
944 10:27:23.319226 scan_bus: scanning of bus USB2 port 6 took 9700 usecs
945 10:27:23.319310 USB2 port 9 scanning...
946 10:27:23.322432 scan_static_bus for USB2 port 9
947 10:27:23.325503 scan_static_bus for USB2 port 9 done
948 10:27:23.332453 scan_bus: scanning of bus USB2 port 9 took 9701 usecs
949 10:27:23.335369 USB3 port 0 scanning...
950 10:27:23.338895 scan_static_bus for USB3 port 0
951 10:27:23.341850 scan_static_bus for USB3 port 0 done
952 10:27:23.349372 scan_bus: scanning of bus USB3 port 0 took 9696 usecs
953 10:27:23.349456 USB3 port 1 scanning...
954 10:27:23.352011 scan_static_bus for USB3 port 1
955 10:27:23.355067 scan_static_bus for USB3 port 1 done
956 10:27:23.362111 scan_bus: scanning of bus USB3 port 1 took 9702 usecs
957 10:27:23.365381 USB3 port 2 scanning...
958 10:27:23.368426 scan_static_bus for USB3 port 2
959 10:27:23.371550 scan_static_bus for USB3 port 2 done
960 10:27:23.378550 scan_bus: scanning of bus USB3 port 2 took 9701 usecs
961 10:27:23.378634 USB3 port 3 scanning...
962 10:27:23.381677 scan_static_bus for USB3 port 3
963 10:27:23.388623 scan_static_bus for USB3 port 3 done
964 10:27:23.391663 scan_bus: scanning of bus USB3 port 3 took 9703 usecs
965 10:27:23.394701 scan_static_bus for USB0 port 0 done
966 10:27:23.401934 scan_bus: scanning of bus USB0 port 0 took 155302 usecs
967 10:27:23.404655 scan_static_bus for PCI: 00:14.0 done
968 10:27:23.411698 scan_bus: scanning of bus PCI: 00:14.0 took 172921 usecs
969 10:27:23.414608 PCI: 00:15.0 scanning...
970 10:27:23.418369 scan_generic_bus for PCI: 00:15.0
971 10:27:23.421460 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
972 10:27:23.424592 scan_generic_bus for PCI: 00:15.0 done
973 10:27:23.431123 scan_bus: scanning of bus PCI: 00:15.0 took 14289 usecs
974 10:27:23.434513 PCI: 00:15.1 scanning...
975 10:27:23.437699 scan_generic_bus for PCI: 00:15.1
976 10:27:23.441382 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
977 10:27:23.444485 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
978 10:27:23.447685 scan_generic_bus for PCI: 00:15.1 done
979 10:27:23.454534 scan_bus: scanning of bus PCI: 00:15.1 took 18605 usecs
980 10:27:23.457471 PCI: 00:19.0 scanning...
981 10:27:23.460952 scan_generic_bus for PCI: 00:19.0
982 10:27:23.464563 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
983 10:27:23.467806 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
984 10:27:23.474198 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
985 10:27:23.477268 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
986 10:27:23.481176 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
987 10:27:23.484412 scan_generic_bus for PCI: 00:19.0 done
988 10:27:23.490575 scan_bus: scanning of bus PCI: 00:19.0 took 30730 usecs
989 10:27:23.494590 PCI: 00:1d.0 scanning...
990 10:27:23.497685 do_pci_scan_bridge for PCI: 00:1d.0
991 10:27:23.500547 PCI: pci_scan_bus for bus 01
992 10:27:23.503982 PCI: 01:00.0 [1c5c/1327] enabled
993 10:27:23.507584 Enabling Common Clock Configuration
994 10:27:23.510578 L1 Sub-State supported from root port 29
995 10:27:23.514135 L1 Sub-State Support = 0xf
996 10:27:23.517140 CommonModeRestoreTime = 0x28
997 10:27:23.520644 Power On Value = 0x16, Power On Scale = 0x0
998 10:27:23.524207 ASPM: Enabled L1
999 10:27:23.527221 scan_bus: scanning of bus PCI: 00:1d.0 took 32775 usecs
1000 10:27:23.530566 PCI: 00:1e.2 scanning...
1001 10:27:23.533786 scan_generic_bus for PCI: 00:1e.2
1002 10:27:23.540567 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1003 10:27:23.543562 scan_generic_bus for PCI: 00:1e.2 done
1004 10:27:23.547259 scan_bus: scanning of bus PCI: 00:1e.2 took 14000 usecs
1005 10:27:23.550574 PCI: 00:1e.3 scanning...
1006 10:27:23.553909 scan_generic_bus for PCI: 00:1e.3
1007 10:27:23.557060 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1008 10:27:23.563956 scan_generic_bus for PCI: 00:1e.3 done
1009 10:27:23.567288 scan_bus: scanning of bus PCI: 00:1e.3 took 14006 usecs
1010 10:27:23.570481 PCI: 00:1f.0 scanning...
1011 10:27:23.573750 scan_static_bus for PCI: 00:1f.0
1012 10:27:23.576864 PNP: 0c09.0 enabled
1013 10:27:23.580109 scan_static_bus for PCI: 00:1f.0 done
1014 10:27:23.586988 scan_bus: scanning of bus PCI: 00:1f.0 took 12035 usecs
1015 10:27:23.587071 PCI: 00:1f.3 scanning...
1016 10:27:23.593342 scan_bus: scanning of bus PCI: 00:1f.3 took 2849 usecs
1017 10:27:23.597227 PCI: 00:1f.4 scanning...
1018 10:27:23.600059 scan_generic_bus for PCI: 00:1f.4
1019 10:27:23.603557 scan_generic_bus for PCI: 00:1f.4 done
1020 10:27:23.610196 scan_bus: scanning of bus PCI: 00:1f.4 took 10188 usecs
1021 10:27:23.613111 PCI: 00:1f.5 scanning...
1022 10:27:23.616733 scan_generic_bus for PCI: 00:1f.5
1023 10:27:23.619657 scan_generic_bus for PCI: 00:1f.5 done
1024 10:27:23.626331 scan_bus: scanning of bus PCI: 00:1f.5 took 10182 usecs
1025 10:27:23.629941 scan_bus: scanning of bus DOMAIN: 0000 took 604638 usecs
1026 10:27:23.633430 scan_static_bus for Root Device done
1027 10:27:23.639862 scan_bus: scanning of bus Root Device took 624510 usecs
1028 10:27:23.639946 done
1029 10:27:23.642907 Chrome EC: UHEPI supported
1030 10:27:23.649777 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1031 10:27:23.656529 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1032 10:27:23.663006 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1033 10:27:23.669661 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1034 10:27:23.673299 SPI flash protection: WPSW=0 SRP0=1
1035 10:27:23.676572 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1036 10:27:23.682980 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1037 10:27:23.686065 found VGA at PCI: 00:02.0
1038 10:27:23.689913 Setting up VGA for PCI: 00:02.0
1039 10:27:23.693142 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1040 10:27:23.699504 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1041 10:27:23.699610 Allocating resources...
1042 10:27:23.702531 Reading resources...
1043 10:27:23.706488 Root Device read_resources bus 0 link: 0
1044 10:27:23.712850 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1045 10:27:23.715829 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1046 10:27:23.722487 DOMAIN: 0000 read_resources bus 0 link: 0
1047 10:27:23.726053 PCI: 00:14.0 read_resources bus 0 link: 0
1048 10:27:23.732959 USB0 port 0 read_resources bus 0 link: 0
1049 10:27:23.739878 USB0 port 0 read_resources bus 0 link: 0 done
1050 10:27:23.742895 PCI: 00:14.0 read_resources bus 0 link: 0 done
1051 10:27:23.750766 PCI: 00:15.0 read_resources bus 1 link: 0
1052 10:27:23.753896 PCI: 00:15.0 read_resources bus 1 link: 0 done
1053 10:27:23.760532 PCI: 00:15.1 read_resources bus 2 link: 0
1054 10:27:23.763593 PCI: 00:15.1 read_resources bus 2 link: 0 done
1055 10:27:23.771297 PCI: 00:19.0 read_resources bus 3 link: 0
1056 10:27:23.777836 PCI: 00:19.0 read_resources bus 3 link: 0 done
1057 10:27:23.781013 PCI: 00:1d.0 read_resources bus 1 link: 0
1058 10:27:23.787514 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1059 10:27:23.790649 PCI: 00:1e.2 read_resources bus 4 link: 0
1060 10:27:23.797625 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1061 10:27:23.800884 PCI: 00:1e.3 read_resources bus 5 link: 0
1062 10:27:23.807710 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1063 10:27:23.810972 PCI: 00:1f.0 read_resources bus 0 link: 0
1064 10:27:23.817839 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1065 10:27:23.824141 DOMAIN: 0000 read_resources bus 0 link: 0 done
1066 10:27:23.827283 Root Device read_resources bus 0 link: 0 done
1067 10:27:23.830886 Done reading resources.
1068 10:27:23.833837 Show resources in subtree (Root Device)...After reading.
1069 10:27:23.840881 Root Device child on link 0 CPU_CLUSTER: 0
1070 10:27:23.843856 CPU_CLUSTER: 0 child on link 0 APIC: 00
1071 10:27:23.843978 APIC: 00
1072 10:27:23.847282 APIC: 03
1073 10:27:23.847370 APIC: 05
1074 10:27:23.850495 APIC: 01
1075 10:27:23.850579 APIC: 02
1076 10:27:23.850644 APIC: 04
1077 10:27:23.854067 APIC: 07
1078 10:27:23.854150 APIC: 06
1079 10:27:23.857155 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1080 10:27:23.909957 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1081 10:27:23.910222 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1082 10:27:23.910294 PCI: 00:00.0
1083 10:27:23.910550 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1084 10:27:23.911225 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1085 10:27:23.911669 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1086 10:27:23.960034 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1087 10:27:23.960311 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1088 10:27:23.960396 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1089 10:27:23.960952 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1090 10:27:23.961340 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1091 10:27:23.966340 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1092 10:27:23.973178 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1093 10:27:23.983102 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1094 10:27:23.992748 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1095 10:27:23.999125 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1096 10:27:24.009523 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1097 10:27:24.019420 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1098 10:27:24.028932 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1099 10:27:24.032637 PCI: 00:02.0
1100 10:27:24.042681 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1101 10:27:24.052730 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1102 10:27:24.059600 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1103 10:27:24.062401 PCI: 00:04.0
1104 10:27:24.062484 PCI: 00:08.0
1105 10:27:24.072140 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1106 10:27:24.075668 PCI: 00:12.0
1107 10:27:24.085628 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1108 10:27:24.088988 PCI: 00:14.0 child on link 0 USB0 port 0
1109 10:27:24.099192 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1110 10:27:24.102331 USB0 port 0 child on link 0 USB2 port 0
1111 10:27:24.105525 USB2 port 0
1112 10:27:24.105609 USB2 port 1
1113 10:27:24.108707 USB2 port 2
1114 10:27:24.108789 USB2 port 3
1115 10:27:24.111938 USB2 port 5
1116 10:27:24.115815 USB2 port 6
1117 10:27:24.115892 USB2 port 9
1118 10:27:24.118769 USB3 port 0
1119 10:27:24.118845 USB3 port 1
1120 10:27:24.121888 USB3 port 2
1121 10:27:24.121979 USB3 port 3
1122 10:27:24.125159 USB3 port 4
1123 10:27:24.125255 PCI: 00:14.2
1124 10:27:24.135066 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1125 10:27:24.145139 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1126 10:27:24.148813 PCI: 00:14.3
1127 10:27:24.158156 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1128 10:27:24.161555 PCI: 00:15.0 child on link 0 I2C: 01:15
1129 10:27:24.171743 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1130 10:27:24.171851 I2C: 01:15
1131 10:27:24.178373 PCI: 00:15.1 child on link 0 I2C: 02:5d
1132 10:27:24.188075 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1133 10:27:24.188187 I2C: 02:5d
1134 10:27:24.191729 GENERIC: 0.0
1135 10:27:24.191827 PCI: 00:16.0
1136 10:27:24.201679 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1137 10:27:24.204764 PCI: 00:17.0
1138 10:27:24.214598 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1139 10:27:24.221536 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1140 10:27:24.231279 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1141 10:27:24.237641 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1142 10:27:24.248339 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1143 10:27:24.254223 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1144 10:27:24.261454 PCI: 00:19.0 child on link 0 I2C: 03:1a
1145 10:27:24.271482 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1146 10:27:24.271565 I2C: 03:1a
1147 10:27:24.274410 I2C: 03:38
1148 10:27:24.274513 I2C: 03:39
1149 10:27:24.278070 I2C: 03:3a
1150 10:27:24.278152 I2C: 03:3b
1151 10:27:24.281108 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1152 10:27:24.290945 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1153 10:27:24.301377 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1154 10:27:24.310892 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1155 10:27:24.310976 PCI: 01:00.0
1156 10:27:24.321398 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1157 10:27:24.324200 PCI: 00:1e.0
1158 10:27:24.333789 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1159 10:27:24.343967 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1160 10:27:24.347230 PCI: 00:1e.2 child on link 0 SPI: 00
1161 10:27:24.356886 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1162 10:27:24.360559 SPI: 00
1163 10:27:24.363570 PCI: 00:1e.3 child on link 0 SPI: 01
1164 10:27:24.373747 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 10:27:24.373832 SPI: 01
1166 10:27:24.380584 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1167 10:27:24.386954 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1168 10:27:24.396546 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1169 10:27:24.396630 PNP: 0c09.0
1170 10:27:24.407072 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1171 10:27:24.409962 PCI: 00:1f.3
1172 10:27:24.419658 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1173 10:27:24.429870 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1174 10:27:24.429954 PCI: 00:1f.4
1175 10:27:24.439726 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1176 10:27:24.449844 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1177 10:27:24.449929 PCI: 00:1f.5
1178 10:27:24.459476 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1179 10:27:24.466309 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1180 10:27:24.473055 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1181 10:27:24.479625 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1182 10:27:24.482643 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1183 10:27:24.486217 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1184 10:27:24.489185 PCI: 00:17.0 18 * [0x60 - 0x67] io
1185 10:27:24.492690 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1186 10:27:24.499330 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1187 10:27:24.505626 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1188 10:27:24.515670 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1189 10:27:24.522372 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1190 10:27:24.528964 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1191 10:27:24.535816 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1192 10:27:24.542191 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1193 10:27:24.545401 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1194 10:27:24.552202 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1195 10:27:24.555484 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1196 10:27:24.562010 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1197 10:27:24.565288 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1198 10:27:24.571998 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1199 10:27:24.575162 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1200 10:27:24.581983 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1201 10:27:24.585037 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1202 10:27:24.591642 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1203 10:27:24.595284 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1204 10:27:24.602034 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1205 10:27:24.604988 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1206 10:27:24.611906 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1207 10:27:24.615090 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1208 10:27:24.618288 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1209 10:27:24.624518 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1210 10:27:24.628212 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1211 10:27:24.634699 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1212 10:27:24.637873 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1213 10:27:24.644741 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1214 10:27:24.647927 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1215 10:27:24.654631 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1216 10:27:24.661480 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1217 10:27:24.664596 avoid_fixed_resources: DOMAIN: 0000
1218 10:27:24.671031 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1219 10:27:24.677877 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1220 10:27:24.684064 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1221 10:27:24.694535 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1222 10:27:24.701323 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1223 10:27:24.707922 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1224 10:27:24.717621 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1225 10:27:24.723837 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1226 10:27:24.730859 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1227 10:27:24.736963 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1228 10:27:24.747382 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1229 10:27:24.753627 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1230 10:27:24.756709 Setting resources...
1231 10:27:24.760424 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1232 10:27:24.766784 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1233 10:27:24.770362 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1234 10:27:24.773731 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1235 10:27:24.776797 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1236 10:27:24.783201 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1237 10:27:24.790110 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1238 10:27:24.796555 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1239 10:27:24.803073 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1240 10:27:24.809761 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1241 10:27:24.812789 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1242 10:27:24.819640 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1243 10:27:24.823523 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1244 10:27:24.829722 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1245 10:27:24.832922 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1246 10:27:24.839950 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1247 10:27:24.842863 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1248 10:27:24.849599 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1249 10:27:24.852993 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1250 10:27:24.859154 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1251 10:27:24.863127 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1252 10:27:24.869390 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1253 10:27:24.872538 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1254 10:27:24.875876 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1255 10:27:24.882902 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1256 10:27:24.886092 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1257 10:27:24.892482 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1258 10:27:24.896118 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1259 10:27:24.902937 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1260 10:27:24.905805 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1261 10:27:24.912306 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1262 10:27:24.915864 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1263 10:27:24.922352 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1264 10:27:24.931835 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1265 10:27:24.938596 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1266 10:27:24.945774 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1267 10:27:24.951725 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1268 10:27:24.958807 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1269 10:27:24.962002 Root Device assign_resources, bus 0 link: 0
1270 10:27:24.968211 DOMAIN: 0000 assign_resources, bus 0 link: 0
1271 10:27:24.975549 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1272 10:27:24.984852 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1273 10:27:24.991323 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1274 10:27:25.001577 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1275 10:27:25.007886 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1276 10:27:25.017790 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1277 10:27:25.021412 PCI: 00:14.0 assign_resources, bus 0 link: 0
1278 10:27:25.024550 PCI: 00:14.0 assign_resources, bus 0 link: 0
1279 10:27:25.035198 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1280 10:27:25.041452 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1281 10:27:25.051546 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1282 10:27:25.057846 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1283 10:27:25.064851 PCI: 00:15.0 assign_resources, bus 1 link: 0
1284 10:27:25.068033 PCI: 00:15.0 assign_resources, bus 1 link: 0
1285 10:27:25.078188 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1286 10:27:25.081346 PCI: 00:15.1 assign_resources, bus 2 link: 0
1287 10:27:25.084645 PCI: 00:15.1 assign_resources, bus 2 link: 0
1288 10:27:25.094925 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1289 10:27:25.101587 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1290 10:27:25.110811 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1291 10:27:25.117924 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1292 10:27:25.124600 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1293 10:27:25.134109 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1294 10:27:25.140966 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1295 10:27:25.147388 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1296 10:27:25.154183 PCI: 00:19.0 assign_resources, bus 3 link: 0
1297 10:27:25.157447 PCI: 00:19.0 assign_resources, bus 3 link: 0
1298 10:27:25.167721 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1299 10:27:25.177701 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1300 10:27:25.184083 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1301 10:27:25.187400 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1302 10:27:25.197358 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1303 10:27:25.200554 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1304 10:27:25.210797 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1305 10:27:25.216984 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1306 10:27:25.223714 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1307 10:27:25.227265 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1308 10:27:25.236782 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1309 10:27:25.240299 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1310 10:27:25.243522 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1311 10:27:25.250455 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1312 10:27:25.253693 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1313 10:27:25.260507 LPC: Trying to open IO window from 800 size 1ff
1314 10:27:25.267401 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1315 10:27:25.276995 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1316 10:27:25.283345 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1317 10:27:25.293696 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1318 10:27:25.296940 DOMAIN: 0000 assign_resources, bus 0 link: 0
1319 10:27:25.303492 Root Device assign_resources, bus 0 link: 0
1320 10:27:25.303566 Done setting resources.
1321 10:27:25.310448 Show resources in subtree (Root Device)...After assigning values.
1322 10:27:25.316615 Root Device child on link 0 CPU_CLUSTER: 0
1323 10:27:25.319798 CPU_CLUSTER: 0 child on link 0 APIC: 00
1324 10:27:25.319870 APIC: 00
1325 10:27:25.323557 APIC: 03
1326 10:27:25.323629 APIC: 05
1327 10:27:25.323687 APIC: 01
1328 10:27:25.326807 APIC: 02
1329 10:27:25.326878 APIC: 04
1330 10:27:25.326936 APIC: 07
1331 10:27:25.329959 APIC: 06
1332 10:27:25.333470 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1333 10:27:25.343305 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1334 10:27:25.353030 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1335 10:27:25.356170 PCI: 00:00.0
1336 10:27:25.366230 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1337 10:27:25.376320 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1338 10:27:25.386388 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1339 10:27:25.392664 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1340 10:27:25.402903 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1341 10:27:25.412699 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1342 10:27:25.422436 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1343 10:27:25.432208 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1344 10:27:25.442402 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1345 10:27:25.449079 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1346 10:27:25.459109 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1347 10:27:25.468456 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1348 10:27:25.478650 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1349 10:27:25.488636 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1350 10:27:25.498185 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1351 10:27:25.505132 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1352 10:27:25.508512 PCI: 00:02.0
1353 10:27:25.518024 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1354 10:27:25.528335 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1355 10:27:25.537844 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1356 10:27:25.541570 PCI: 00:04.0
1357 10:27:25.541651 PCI: 00:08.0
1358 10:27:25.551111 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1359 10:27:25.554939 PCI: 00:12.0
1360 10:27:25.564469 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1361 10:27:25.567949 PCI: 00:14.0 child on link 0 USB0 port 0
1362 10:27:25.577602 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1363 10:27:25.584534 USB0 port 0 child on link 0 USB2 port 0
1364 10:27:25.584634 USB2 port 0
1365 10:27:25.587546 USB2 port 1
1366 10:27:25.587629 USB2 port 2
1367 10:27:25.590754 USB2 port 3
1368 10:27:25.590836 USB2 port 5
1369 10:27:25.594898 USB2 port 6
1370 10:27:25.594981 USB2 port 9
1371 10:27:25.597846 USB3 port 0
1372 10:27:25.597930 USB3 port 1
1373 10:27:25.601120 USB3 port 2
1374 10:27:25.601203 USB3 port 3
1375 10:27:25.604111 USB3 port 4
1376 10:27:25.604193 PCI: 00:14.2
1377 10:27:25.617762 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1378 10:27:25.627534 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1379 10:27:25.627618 PCI: 00:14.3
1380 10:27:25.637813 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1381 10:27:25.644032 PCI: 00:15.0 child on link 0 I2C: 01:15
1382 10:27:25.654298 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1383 10:27:25.654383 I2C: 01:15
1384 10:27:25.657094 PCI: 00:15.1 child on link 0 I2C: 02:5d
1385 10:27:25.670388 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1386 10:27:25.670472 I2C: 02:5d
1387 10:27:25.674039 GENERIC: 0.0
1388 10:27:25.674139 PCI: 00:16.0
1389 10:27:25.683422 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1390 10:27:25.686655 PCI: 00:17.0
1391 10:27:25.697072 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1392 10:27:25.706504 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1393 10:27:25.716607 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1394 10:27:25.723119 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1395 10:27:25.733231 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1396 10:27:25.742724 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1397 10:27:25.749724 PCI: 00:19.0 child on link 0 I2C: 03:1a
1398 10:27:25.759218 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1399 10:27:25.759304 I2C: 03:1a
1400 10:27:25.762945 I2C: 03:38
1401 10:27:25.763028 I2C: 03:39
1402 10:27:25.766142 I2C: 03:3a
1403 10:27:25.766241 I2C: 03:3b
1404 10:27:25.769488 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1405 10:27:25.778980 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1406 10:27:25.789278 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1407 10:27:25.799146 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1408 10:27:25.802164 PCI: 01:00.0
1409 10:27:25.812289 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1410 10:27:25.815603 PCI: 00:1e.0
1411 10:27:25.825571 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1412 10:27:25.835297 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1413 10:27:25.838511 PCI: 00:1e.2 child on link 0 SPI: 00
1414 10:27:25.848734 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1415 10:27:25.851907 SPI: 00
1416 10:27:25.855061 PCI: 00:1e.3 child on link 0 SPI: 01
1417 10:27:25.865278 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1418 10:27:25.868477 SPI: 01
1419 10:27:25.871720 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1420 10:27:25.878162 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1421 10:27:25.888128 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1422 10:27:25.891579 PNP: 0c09.0
1423 10:27:25.898262 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1424 10:27:25.901376 PCI: 00:1f.3
1425 10:27:25.911123 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1426 10:27:25.920741 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1427 10:27:25.924710 PCI: 00:1f.4
1428 10:27:25.931256 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1429 10:27:25.940810 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1430 10:27:25.943941 PCI: 00:1f.5
1431 10:27:25.954255 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1432 10:27:25.957451 Done allocating resources.
1433 10:27:25.963836 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1434 10:27:25.963921 Enabling resources...
1435 10:27:25.971320 PCI: 00:00.0 subsystem <- 8086/9b61
1436 10:27:25.971403 PCI: 00:00.0 cmd <- 06
1437 10:27:25.974461 PCI: 00:02.0 subsystem <- 8086/9b41
1438 10:27:25.977688 PCI: 00:02.0 cmd <- 03
1439 10:27:25.981320 PCI: 00:08.0 cmd <- 06
1440 10:27:25.984351 PCI: 00:12.0 subsystem <- 8086/02f9
1441 10:27:25.987856 PCI: 00:12.0 cmd <- 02
1442 10:27:25.991544 PCI: 00:14.0 subsystem <- 8086/02ed
1443 10:27:25.994395 PCI: 00:14.0 cmd <- 02
1444 10:27:25.997952 PCI: 00:14.2 cmd <- 02
1445 10:27:26.000830 PCI: 00:14.3 subsystem <- 8086/02f0
1446 10:27:26.000926 PCI: 00:14.3 cmd <- 02
1447 10:27:26.007700 PCI: 00:15.0 subsystem <- 8086/02e8
1448 10:27:26.007779 PCI: 00:15.0 cmd <- 02
1449 10:27:26.011286 PCI: 00:15.1 subsystem <- 8086/02e9
1450 10:27:26.014350 PCI: 00:15.1 cmd <- 02
1451 10:27:26.018116 PCI: 00:16.0 subsystem <- 8086/02e0
1452 10:27:26.020933 PCI: 00:16.0 cmd <- 02
1453 10:27:26.024442 PCI: 00:17.0 subsystem <- 8086/02d3
1454 10:27:26.027552 PCI: 00:17.0 cmd <- 03
1455 10:27:26.031256 PCI: 00:19.0 subsystem <- 8086/02c5
1456 10:27:26.034496 PCI: 00:19.0 cmd <- 02
1457 10:27:26.037696 PCI: 00:1d.0 bridge ctrl <- 0013
1458 10:27:26.040970 PCI: 00:1d.0 subsystem <- 8086/02b0
1459 10:27:26.044175 PCI: 00:1d.0 cmd <- 06
1460 10:27:26.047392 PCI: 00:1e.0 subsystem <- 8086/02a8
1461 10:27:26.051274 PCI: 00:1e.0 cmd <- 06
1462 10:27:26.054530 PCI: 00:1e.2 subsystem <- 8086/02aa
1463 10:27:26.054603 PCI: 00:1e.2 cmd <- 06
1464 10:27:26.060959 PCI: 00:1e.3 subsystem <- 8086/02ab
1465 10:27:26.061034 PCI: 00:1e.3 cmd <- 02
1466 10:27:26.064277 PCI: 00:1f.0 subsystem <- 8086/0284
1467 10:27:26.067479 PCI: 00:1f.0 cmd <- 407
1468 10:27:26.071235 PCI: 00:1f.3 subsystem <- 8086/02c8
1469 10:27:26.074470 PCI: 00:1f.3 cmd <- 02
1470 10:27:26.077697 PCI: 00:1f.4 subsystem <- 8086/02a3
1471 10:27:26.080930 PCI: 00:1f.4 cmd <- 03
1472 10:27:26.084037 PCI: 00:1f.5 subsystem <- 8086/02a4
1473 10:27:26.087760 PCI: 00:1f.5 cmd <- 406
1474 10:27:26.096218 PCI: 01:00.0 cmd <- 02
1475 10:27:26.101521 done.
1476 10:27:26.114961 ME: Version: 14.0.39.1367
1477 10:27:26.121140 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1478 10:27:26.124849 Initializing devices...
1479 10:27:26.124931 Root Device init ...
1480 10:27:26.131316 Chrome EC: Set SMI mask to 0x0000000000000000
1481 10:27:26.134883 Chrome EC: clear events_b mask to 0x0000000000000000
1482 10:27:26.141556 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1483 10:27:26.148116 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1484 10:27:26.154347 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1485 10:27:26.157845 Chrome EC: Set WAKE mask to 0x0000000000000000
1486 10:27:26.160841 Root Device init finished in 35275 usecs
1487 10:27:26.164566 CPU_CLUSTER: 0 init ...
1488 10:27:26.171465 CPU_CLUSTER: 0 init finished in 2447 usecs
1489 10:27:26.175292 PCI: 00:00.0 init ...
1490 10:27:26.179180 CPU TDP: 15 Watts
1491 10:27:26.182536 CPU PL2 = 64 Watts
1492 10:27:26.185685 PCI: 00:00.0 init finished in 7082 usecs
1493 10:27:26.188726 PCI: 00:02.0 init ...
1494 10:27:26.192441 PCI: 00:02.0 init finished in 2254 usecs
1495 10:27:26.195630 PCI: 00:08.0 init ...
1496 10:27:26.199025 PCI: 00:08.0 init finished in 2254 usecs
1497 10:27:26.202099 PCI: 00:12.0 init ...
1498 10:27:26.205648 PCI: 00:12.0 init finished in 2252 usecs
1499 10:27:26.208682 PCI: 00:14.0 init ...
1500 10:27:26.212267 PCI: 00:14.0 init finished in 2254 usecs
1501 10:27:26.215187 PCI: 00:14.2 init ...
1502 10:27:26.218618 PCI: 00:14.2 init finished in 2244 usecs
1503 10:27:26.222285 PCI: 00:14.3 init ...
1504 10:27:26.225148 PCI: 00:14.3 init finished in 2270 usecs
1505 10:27:26.228937 PCI: 00:15.0 init ...
1506 10:27:26.232079 DW I2C bus 0 at 0xd121f000 (400 KHz)
1507 10:27:26.235221 PCI: 00:15.0 init finished in 5978 usecs
1508 10:27:26.238850 PCI: 00:15.1 init ...
1509 10:27:26.242011 DW I2C bus 1 at 0xd1220000 (400 KHz)
1510 10:27:26.248130 PCI: 00:15.1 init finished in 5978 usecs
1511 10:27:26.248212 PCI: 00:16.0 init ...
1512 10:27:26.255184 PCI: 00:16.0 init finished in 2254 usecs
1513 10:27:26.258422 PCI: 00:19.0 init ...
1514 10:27:26.262088 DW I2C bus 4 at 0xd1222000 (400 KHz)
1515 10:27:26.264944 PCI: 00:19.0 init finished in 5977 usecs
1516 10:27:26.268063 PCI: 00:1d.0 init ...
1517 10:27:26.271390 Initializing PCH PCIe bridge.
1518 10:27:26.274415 PCI: 00:1d.0 init finished in 5286 usecs
1519 10:27:26.278394 PCI: 00:1f.0 init ...
1520 10:27:26.281215 IOAPIC: Initializing IOAPIC at 0xfec00000
1521 10:27:26.288259 IOAPIC: Bootstrap Processor Local APIC = 0x00
1522 10:27:26.288341 IOAPIC: ID = 0x02
1523 10:27:26.291442 IOAPIC: Dumping registers
1524 10:27:26.294855 reg 0x0000: 0x02000000
1525 10:27:26.297667 reg 0x0001: 0x00770020
1526 10:27:26.297748 reg 0x0002: 0x00000000
1527 10:27:26.304869 PCI: 00:1f.0 init finished in 23530 usecs
1528 10:27:26.307996 PCI: 00:1f.4 init ...
1529 10:27:26.310992 PCI: 00:1f.4 init finished in 2264 usecs
1530 10:27:26.321578 PCI: 01:00.0 init ...
1531 10:27:26.325205 PCI: 01:00.0 init finished in 2245 usecs
1532 10:27:26.329048 PNP: 0c09.0 init ...
1533 10:27:26.332822 Google Chrome EC uptime: 11.098 seconds
1534 10:27:26.339148 Google Chrome AP resets since EC boot: 0
1535 10:27:26.343087 Google Chrome most recent AP reset causes:
1536 10:27:26.349144 Google Chrome EC reset flags at last EC boot: reset-pin
1537 10:27:26.352722 PNP: 0c09.0 init finished in 20626 usecs
1538 10:27:26.355847 Devices initialized
1539 10:27:26.355929 Show all devs... After init.
1540 10:27:26.359497 Root Device: enabled 1
1541 10:27:26.362373 CPU_CLUSTER: 0: enabled 1
1542 10:27:26.365851 DOMAIN: 0000: enabled 1
1543 10:27:26.365953 APIC: 00: enabled 1
1544 10:27:26.368998 PCI: 00:00.0: enabled 1
1545 10:27:26.372654 PCI: 00:02.0: enabled 1
1546 10:27:26.375856 PCI: 00:04.0: enabled 0
1547 10:27:26.375960 PCI: 00:05.0: enabled 0
1548 10:27:26.379081 PCI: 00:12.0: enabled 1
1549 10:27:26.382224 PCI: 00:12.5: enabled 0
1550 10:27:26.385834 PCI: 00:12.6: enabled 0
1551 10:27:26.385908 PCI: 00:14.0: enabled 1
1552 10:27:26.389089 PCI: 00:14.1: enabled 0
1553 10:27:26.392275 PCI: 00:14.3: enabled 1
1554 10:27:26.392346 PCI: 00:14.5: enabled 0
1555 10:27:26.395526 PCI: 00:15.0: enabled 1
1556 10:27:26.398617 PCI: 00:15.1: enabled 1
1557 10:27:26.401825 PCI: 00:15.2: enabled 0
1558 10:27:26.401897 PCI: 00:15.3: enabled 0
1559 10:27:26.405030 PCI: 00:16.0: enabled 1
1560 10:27:26.408838 PCI: 00:16.1: enabled 0
1561 10:27:26.412123 PCI: 00:16.2: enabled 0
1562 10:27:26.412228 PCI: 00:16.3: enabled 0
1563 10:27:26.415195 PCI: 00:16.4: enabled 0
1564 10:27:26.418384 PCI: 00:16.5: enabled 0
1565 10:27:26.422250 PCI: 00:17.0: enabled 1
1566 10:27:26.422321 PCI: 00:19.0: enabled 1
1567 10:27:26.425281 PCI: 00:19.1: enabled 0
1568 10:27:26.428197 PCI: 00:19.2: enabled 0
1569 10:27:26.431897 PCI: 00:1a.0: enabled 0
1570 10:27:26.431973 PCI: 00:1c.0: enabled 0
1571 10:27:26.434863 PCI: 00:1c.1: enabled 0
1572 10:27:26.438413 PCI: 00:1c.2: enabled 0
1573 10:27:26.438518 PCI: 00:1c.3: enabled 0
1574 10:27:26.441329 PCI: 00:1c.4: enabled 0
1575 10:27:26.445249 PCI: 00:1c.5: enabled 0
1576 10:27:26.448143 PCI: 00:1c.6: enabled 0
1577 10:27:26.448239 PCI: 00:1c.7: enabled 0
1578 10:27:26.451723 PCI: 00:1d.0: enabled 1
1579 10:27:26.454751 PCI: 00:1d.1: enabled 0
1580 10:27:26.458401 PCI: 00:1d.2: enabled 0
1581 10:27:26.458482 PCI: 00:1d.3: enabled 0
1582 10:27:26.461769 PCI: 00:1d.4: enabled 0
1583 10:27:26.464630 PCI: 00:1d.5: enabled 0
1584 10:27:26.468274 PCI: 00:1e.0: enabled 1
1585 10:27:26.468355 PCI: 00:1e.1: enabled 0
1586 10:27:26.470974 PCI: 00:1e.2: enabled 1
1587 10:27:26.474839 PCI: 00:1e.3: enabled 1
1588 10:27:26.477733 PCI: 00:1f.0: enabled 1
1589 10:27:26.477814 PCI: 00:1f.1: enabled 0
1590 10:27:26.480954 PCI: 00:1f.2: enabled 0
1591 10:27:26.484956 PCI: 00:1f.3: enabled 1
1592 10:27:26.485046 PCI: 00:1f.4: enabled 1
1593 10:27:26.488115 PCI: 00:1f.5: enabled 1
1594 10:27:26.491507 PCI: 00:1f.6: enabled 0
1595 10:27:26.494596 USB0 port 0: enabled 1
1596 10:27:26.494676 I2C: 01:15: enabled 1
1597 10:27:26.497804 I2C: 02:5d: enabled 1
1598 10:27:26.500759 GENERIC: 0.0: enabled 1
1599 10:27:26.500860 I2C: 03:1a: enabled 1
1600 10:27:26.503985 I2C: 03:38: enabled 1
1601 10:27:26.507690 I2C: 03:39: enabled 1
1602 10:27:26.510897 I2C: 03:3a: enabled 1
1603 10:27:26.510977 I2C: 03:3b: enabled 1
1604 10:27:26.514179 PCI: 00:00.0: enabled 1
1605 10:27:26.517257 SPI: 00: enabled 1
1606 10:27:26.517338 SPI: 01: enabled 1
1607 10:27:26.521034 PNP: 0c09.0: enabled 1
1608 10:27:26.524460 USB2 port 0: enabled 1
1609 10:27:26.524541 USB2 port 1: enabled 1
1610 10:27:26.527283 USB2 port 2: enabled 0
1611 10:27:26.531278 USB2 port 3: enabled 0
1612 10:27:26.531359 USB2 port 5: enabled 0
1613 10:27:26.534151 USB2 port 6: enabled 1
1614 10:27:26.537188 USB2 port 9: enabled 1
1615 10:27:26.537270 USB3 port 0: enabled 1
1616 10:27:26.540356 USB3 port 1: enabled 1
1617 10:27:26.543893 USB3 port 2: enabled 1
1618 10:27:26.546982 USB3 port 3: enabled 1
1619 10:27:26.547063 USB3 port 4: enabled 0
1620 10:27:26.550606 APIC: 03: enabled 1
1621 10:27:26.553681 APIC: 05: enabled 1
1622 10:27:26.553764 APIC: 01: enabled 1
1623 10:27:26.557236 APIC: 02: enabled 1
1624 10:27:26.557319 APIC: 04: enabled 1
1625 10:27:26.560274 APIC: 07: enabled 1
1626 10:27:26.563468 APIC: 06: enabled 1
1627 10:27:26.563550 PCI: 00:08.0: enabled 1
1628 10:27:26.567118 PCI: 00:14.2: enabled 1
1629 10:27:26.570104 PCI: 01:00.0: enabled 1
1630 10:27:26.573063 Disabling ACPI via APMC:
1631 10:27:26.576982 done.
1632 10:27:26.580068 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1633 10:27:26.583228 ELOG: NV offset 0xaf0000 size 0x4000
1634 10:27:26.590996 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1635 10:27:26.597689 ELOG: Event(17) added with size 13 at 2023-06-28 10:27:11 UTC
1636 10:27:26.603939 POST: Unexpected post code in previous boot: 0x73
1637 10:27:26.610906 ELOG: Event(A3) added with size 11 at 2023-06-28 10:27:11 UTC
1638 10:27:26.617464 ELOG: Event(A6) added with size 13 at 2023-06-28 10:27:11 UTC
1639 10:27:26.624319 ELOG: Event(92) added with size 9 at 2023-06-28 10:27:11 UTC
1640 10:27:26.630913 ELOG: Event(93) added with size 9 at 2023-06-28 10:27:11 UTC
1641 10:27:26.633859 ELOG: Event(9A) added with size 9 at 2023-06-28 10:27:11 UTC
1642 10:27:26.640219 ELOG: Event(9E) added with size 10 at 2023-06-28 10:27:11 UTC
1643 10:27:26.646762 ELOG: Event(9F) added with size 14 at 2023-06-28 10:27:11 UTC
1644 10:27:26.653500 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1645 10:27:26.660499 ELOG: Event(A1) added with size 10 at 2023-06-28 10:27:11 UTC
1646 10:27:26.666839 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1647 10:27:26.673543 ELOG: Event(A0) added with size 9 at 2023-06-28 10:27:11 UTC
1648 10:27:26.676647 elog_add_boot_reason: Logged dev mode boot
1649 10:27:26.680542 Finalize devices...
1650 10:27:26.683393 PCI: 00:17.0 final
1651 10:27:26.683476 Devices finalized
1652 10:27:26.690255 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1653 10:27:26.693451 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1654 10:27:26.699869 ME: HFSTS1 : 0x90000245
1655 10:27:26.703042 ME: HFSTS2 : 0x3B850126
1656 10:27:26.706321 ME: HFSTS3 : 0x00000020
1657 10:27:26.709620 ME: HFSTS4 : 0x00004800
1658 10:27:26.716700 ME: HFSTS5 : 0x00000000
1659 10:27:26.719709 ME: HFSTS6 : 0x40400006
1660 10:27:26.723108 ME: Manufacturing Mode : NO
1661 10:27:26.726798 ME: FW Partition Table : OK
1662 10:27:26.729988 ME: Bringup Loader Failure : NO
1663 10:27:26.733306 ME: Firmware Init Complete : YES
1664 10:27:26.736720 ME: Boot Options Present : NO
1665 10:27:26.739809 ME: Update In Progress : NO
1666 10:27:26.742685 ME: D0i3 Support : YES
1667 10:27:26.746411 ME: Low Power State Enabled : NO
1668 10:27:26.749601 ME: CPU Replaced : NO
1669 10:27:26.752574 ME: CPU Replacement Valid : YES
1670 10:27:26.756505 ME: Current Working State : 5
1671 10:27:26.759540 ME: Current Operation State : 1
1672 10:27:26.762696 ME: Current Operation Mode : 0
1673 10:27:26.766471 ME: Error Code : 0
1674 10:27:26.769603 ME: CPU Debug Disabled : YES
1675 10:27:26.772740 ME: TXT Support : NO
1676 10:27:26.779376 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1677 10:27:26.782389 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1678 10:27:26.786462 CBFS @ c08000 size 3f8000
1679 10:27:26.792619 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1680 10:27:26.796111 CBFS: Locating 'fallback/dsdt.aml'
1681 10:27:26.799214 CBFS: Found @ offset 10bb80 size 3fa5
1682 10:27:26.805574 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1683 10:27:26.805651 CBFS @ c08000 size 3f8000
1684 10:27:26.812301 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1685 10:27:26.815800 CBFS: Locating 'fallback/slic'
1686 10:27:26.819526 CBFS: 'fallback/slic' not found.
1687 10:27:26.826128 ACPI: Writing ACPI tables at 99b3e000.
1688 10:27:26.826204 ACPI: * FACS
1689 10:27:26.829624 ACPI: * DSDT
1690 10:27:26.832567 Ramoops buffer: 0x100000@0x99a3d000.
1691 10:27:26.836535 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1692 10:27:26.842712 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1693 10:27:26.846055 Google Chrome EC: version:
1694 10:27:26.849431 ro: helios_v2.0.2659-56403530b
1695 10:27:26.852572 rw: helios_v2.0.2849-c41de27e7d
1696 10:27:26.852651 running image: 1
1697 10:27:26.857113 ACPI: * FADT
1698 10:27:26.857197 SCI is IRQ9
1699 10:27:26.863690 ACPI: added table 1/32, length now 40
1700 10:27:26.863773 ACPI: * SSDT
1701 10:27:26.866907 Found 1 CPU(s) with 8 core(s) each.
1702 10:27:26.870006 Error: Could not locate 'wifi_sar' in VPD.
1703 10:27:26.876822 Checking CBFS for default SAR values
1704 10:27:26.879840 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1705 10:27:26.883915 CBFS @ c08000 size 3f8000
1706 10:27:26.890052 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1707 10:27:26.893153 CBFS: Locating 'wifi_sar_defaults.hex'
1708 10:27:26.896431 CBFS: Found @ offset 5fac0 size 77
1709 10:27:26.899967 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1710 10:27:26.906375 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1711 10:27:26.909628 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1712 10:27:26.916193 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1713 10:27:26.919315 failed to find key in VPD: dsm_calib_r0_0
1714 10:27:26.929447 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1715 10:27:26.932549 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1716 10:27:26.939367 failed to find key in VPD: dsm_calib_r0_1
1717 10:27:26.945817 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1718 10:27:26.952622 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1719 10:27:26.955653 failed to find key in VPD: dsm_calib_r0_2
1720 10:27:26.966152 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1721 10:27:26.969203 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1722 10:27:26.975934 failed to find key in VPD: dsm_calib_r0_3
1723 10:27:26.982332 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1724 10:27:26.989169 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1725 10:27:26.992426 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1726 10:27:26.999069 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1727 10:27:27.002788 EC returned error result code 1
1728 10:27:27.005853 EC returned error result code 1
1729 10:27:27.009491 EC returned error result code 1
1730 10:27:27.012676 PS2K: Bad resp from EC. Vivaldi disabled!
1731 10:27:27.019258 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1732 10:27:27.026225 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1733 10:27:27.029350 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1734 10:27:27.036072 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1735 10:27:27.039386 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1736 10:27:27.045991 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1737 10:27:27.052344 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1738 10:27:27.059476 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1739 10:27:27.062167 ACPI: added table 2/32, length now 44
1740 10:27:27.062250 ACPI: * MCFG
1741 10:27:27.068909 ACPI: added table 3/32, length now 48
1742 10:27:27.068990 ACPI: * TPM2
1743 10:27:27.072546 TPM2 log created at 99a2d000
1744 10:27:27.075749 ACPI: added table 4/32, length now 52
1745 10:27:27.078706 ACPI: * MADT
1746 10:27:27.078787 SCI is IRQ9
1747 10:27:27.082543 ACPI: added table 5/32, length now 56
1748 10:27:27.085804 current = 99b43ac0
1749 10:27:27.085886 ACPI: * DMAR
1750 10:27:27.088813 ACPI: added table 6/32, length now 60
1751 10:27:27.092034 ACPI: * IGD OpRegion
1752 10:27:27.095931 GMA: Found VBT in CBFS
1753 10:27:27.098929 GMA: Found valid VBT in CBFS
1754 10:27:27.102198 ACPI: added table 7/32, length now 64
1755 10:27:27.102281 ACPI: * HPET
1756 10:27:27.105205 ACPI: added table 8/32, length now 68
1757 10:27:27.108637 ACPI: done.
1758 10:27:27.112029 ACPI tables: 31744 bytes.
1759 10:27:27.115349 smbios_write_tables: 99a2c000
1760 10:27:27.118659 EC returned error result code 3
1761 10:27:27.121858 Couldn't obtain OEM name from CBI
1762 10:27:27.125419 Create SMBIOS type 17
1763 10:27:27.128535 PCI: 00:00.0 (Intel Cannonlake)
1764 10:27:27.128617 PCI: 00:14.3 (Intel WiFi)
1765 10:27:27.131661 SMBIOS tables: 939 bytes.
1766 10:27:27.135532 Writing table forward entry at 0x00000500
1767 10:27:27.142033 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1768 10:27:27.145228 Writing coreboot table at 0x99b62000
1769 10:27:27.151685 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1770 10:27:27.154963 1. 0000000000001000-000000000009ffff: RAM
1771 10:27:27.161667 2. 00000000000a0000-00000000000fffff: RESERVED
1772 10:27:27.165352 3. 0000000000100000-0000000099a2bfff: RAM
1773 10:27:27.171676 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1774 10:27:27.174756 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1775 10:27:27.181623 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1776 10:27:27.188288 7. 000000009a000000-000000009f7fffff: RESERVED
1777 10:27:27.191421 8. 00000000e0000000-00000000efffffff: RESERVED
1778 10:27:27.198159 9. 00000000fc000000-00000000fc000fff: RESERVED
1779 10:27:27.201151 10. 00000000fe000000-00000000fe00ffff: RESERVED
1780 10:27:27.205271 11. 00000000fed10000-00000000fed17fff: RESERVED
1781 10:27:27.211273 12. 00000000fed80000-00000000fed83fff: RESERVED
1782 10:27:27.214361 13. 00000000fed90000-00000000fed91fff: RESERVED
1783 10:27:27.221727 14. 00000000feda0000-00000000feda1fff: RESERVED
1784 10:27:27.224699 15. 0000000100000000-000000045e7fffff: RAM
1785 10:27:27.227882 Graphics framebuffer located at 0xc0000000
1786 10:27:27.231050 Passing 5 GPIOs to payload:
1787 10:27:27.237584 NAME | PORT | POLARITY | VALUE
1788 10:27:27.240832 write protect | undefined | high | low
1789 10:27:27.247712 lid | undefined | high | high
1790 10:27:27.254130 power | undefined | high | low
1791 10:27:27.257527 oprom | undefined | high | low
1792 10:27:27.264474 EC in RW | 0x000000cb | high | low
1793 10:27:27.264556 Board ID: 4
1794 10:27:27.271030 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1795 10:27:27.271114 CBFS @ c08000 size 3f8000
1796 10:27:27.277727 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1797 10:27:27.283910 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1798 10:27:27.287559 coreboot table: 1492 bytes.
1799 10:27:27.290751 IMD ROOT 0. 99fff000 00001000
1800 10:27:27.294460 IMD SMALL 1. 99ffe000 00001000
1801 10:27:27.297578 FSP MEMORY 2. 99c4e000 003b0000
1802 10:27:27.300836 CONSOLE 3. 99c2e000 00020000
1803 10:27:27.304148 FMAP 4. 99c2d000 0000054e
1804 10:27:27.307747 TIME STAMP 5. 99c2c000 00000910
1805 10:27:27.310919 VBOOT WORK 6. 99c18000 00014000
1806 10:27:27.313945 MRC DATA 7. 99c16000 00001958
1807 10:27:27.317629 ROMSTG STCK 8. 99c15000 00001000
1808 10:27:27.320635 AFTER CAR 9. 99c0b000 0000a000
1809 10:27:27.324481 RAMSTAGE 10. 99baf000 0005c000
1810 10:27:27.327627 REFCODE 11. 99b7a000 00035000
1811 10:27:27.330748 SMM BACKUP 12. 99b6a000 00010000
1812 10:27:27.334271 COREBOOT 13. 99b62000 00008000
1813 10:27:27.337283 ACPI 14. 99b3e000 00024000
1814 10:27:27.340743 ACPI GNVS 15. 99b3d000 00001000
1815 10:27:27.344272 RAMOOPS 16. 99a3d000 00100000
1816 10:27:27.347631 TPM2 TCGLOG17. 99a2d000 00010000
1817 10:27:27.350678 SMBIOS 18. 99a2c000 00000800
1818 10:27:27.350750 IMD small region:
1819 10:27:27.354255 IMD ROOT 0. 99ffec00 00000400
1820 10:27:27.360528 FSP RUNTIME 1. 99ffebe0 00000004
1821 10:27:27.364352 EC HOSTEVENT 2. 99ffebc0 00000008
1822 10:27:27.367166 POWER STATE 3. 99ffeb80 00000040
1823 10:27:27.371045 ROMSTAGE 4. 99ffeb60 00000004
1824 10:27:27.374002 MEM INFO 5. 99ffe9a0 000001b9
1825 10:27:27.377197 VPD 6. 99ffe920 0000006c
1826 10:27:27.380867 MTRR: Physical address space:
1827 10:27:27.387093 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1828 10:27:27.393991 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1829 10:27:27.397198 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1830 10:27:27.404280 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1831 10:27:27.410636 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1832 10:27:27.417054 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1833 10:27:27.423986 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1834 10:27:27.427081 MTRR: Fixed MSR 0x250 0x0606060606060606
1835 10:27:27.430565 MTRR: Fixed MSR 0x258 0x0606060606060606
1836 10:27:27.436769 MTRR: Fixed MSR 0x259 0x0000000000000000
1837 10:27:27.440050 MTRR: Fixed MSR 0x268 0x0606060606060606
1838 10:27:27.443476 MTRR: Fixed MSR 0x269 0x0606060606060606
1839 10:27:27.446508 MTRR: Fixed MSR 0x26a 0x0606060606060606
1840 10:27:27.453196 MTRR: Fixed MSR 0x26b 0x0606060606060606
1841 10:27:27.457146 MTRR: Fixed MSR 0x26c 0x0606060606060606
1842 10:27:27.460259 MTRR: Fixed MSR 0x26d 0x0606060606060606
1843 10:27:27.463309 MTRR: Fixed MSR 0x26e 0x0606060606060606
1844 10:27:27.469697 MTRR: Fixed MSR 0x26f 0x0606060606060606
1845 10:27:27.473035 call enable_fixed_mtrr()
1846 10:27:27.476407 CPU physical address size: 39 bits
1847 10:27:27.479512 MTRR: default type WB/UC MTRR counts: 6/8.
1848 10:27:27.483290 MTRR: WB selected as default type.
1849 10:27:27.489492 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1850 10:27:27.496233 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1851 10:27:27.503175 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1852 10:27:27.509449 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1853 10:27:27.512614 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1854 10:27:27.519147 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1855 10:27:27.526175 MTRR: Fixed MSR 0x250 0x0606060606060606
1856 10:27:27.530078 MTRR: Fixed MSR 0x258 0x0606060606060606
1857 10:27:27.532939 MTRR: Fixed MSR 0x259 0x0000000000000000
1858 10:27:27.536595 MTRR: Fixed MSR 0x268 0x0606060606060606
1859 10:27:27.543052 MTRR: Fixed MSR 0x269 0x0606060606060606
1860 10:27:27.546651 MTRR: Fixed MSR 0x26a 0x0606060606060606
1861 10:27:27.549544 MTRR: Fixed MSR 0x26b 0x0606060606060606
1862 10:27:27.552739 MTRR: Fixed MSR 0x26c 0x0606060606060606
1863 10:27:27.559615 MTRR: Fixed MSR 0x26d 0x0606060606060606
1864 10:27:27.563008 MTRR: Fixed MSR 0x26e 0x0606060606060606
1865 10:27:27.566190 MTRR: Fixed MSR 0x26f 0x0606060606060606
1866 10:27:27.566272
1867 10:27:27.569194 MTRR check
1868 10:27:27.569277 Fixed MTRRs : Enabled
1869 10:27:27.573041 Variable MTRRs: Enabled
1870 10:27:27.573123
1871 10:27:27.576170 call enable_fixed_mtrr()
1872 10:27:27.582354 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1873 10:27:27.586319 CPU physical address size: 39 bits
1874 10:27:27.589194 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1875 10:27:27.592944 CBFS @ c08000 size 3f8000
1876 10:27:27.599209 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1877 10:27:27.602405 CBFS: Locating 'fallback/payload'
1878 10:27:27.605560 MTRR: Fixed MSR 0x250 0x0606060606060606
1879 10:27:27.609330 CBFS: Found @ offset 1c96c0 size 3f798
1880 10:27:27.612395 MTRR: Fixed MSR 0x250 0x0606060606060606
1881 10:27:27.618842 MTRR: Fixed MSR 0x250 0x0606060606060606
1882 10:27:27.622945 MTRR: Fixed MSR 0x258 0x0606060606060606
1883 10:27:27.625915 MTRR: Fixed MSR 0x259 0x0000000000000000
1884 10:27:27.628955 MTRR: Fixed MSR 0x268 0x0606060606060606
1885 10:27:27.635459 MTRR: Fixed MSR 0x269 0x0606060606060606
1886 10:27:27.639127 MTRR: Fixed MSR 0x26a 0x0606060606060606
1887 10:27:27.642178 MTRR: Fixed MSR 0x26b 0x0606060606060606
1888 10:27:27.645776 MTRR: Fixed MSR 0x26c 0x0606060606060606
1889 10:27:27.652161 MTRR: Fixed MSR 0x26d 0x0606060606060606
1890 10:27:27.655240 MTRR: Fixed MSR 0x26e 0x0606060606060606
1891 10:27:27.658444 MTRR: Fixed MSR 0x26f 0x0606060606060606
1892 10:27:27.661601 MTRR: Fixed MSR 0x258 0x0606060606060606
1893 10:27:27.665433 call enable_fixed_mtrr()
1894 10:27:27.668304 MTRR: Fixed MSR 0x259 0x0000000000000000
1895 10:27:27.674993 MTRR: Fixed MSR 0x268 0x0606060606060606
1896 10:27:27.678776 MTRR: Fixed MSR 0x269 0x0606060606060606
1897 10:27:27.682266 MTRR: Fixed MSR 0x26a 0x0606060606060606
1898 10:27:27.685052 MTRR: Fixed MSR 0x26b 0x0606060606060606
1899 10:27:27.691869 MTRR: Fixed MSR 0x26c 0x0606060606060606
1900 10:27:27.695115 MTRR: Fixed MSR 0x26d 0x0606060606060606
1901 10:27:27.698579 MTRR: Fixed MSR 0x26e 0x0606060606060606
1902 10:27:27.701724 MTRR: Fixed MSR 0x26f 0x0606060606060606
1903 10:27:27.704827 CPU physical address size: 39 bits
1904 10:27:27.708973 call enable_fixed_mtrr()
1905 10:27:27.712061 MTRR: Fixed MSR 0x250 0x0606060606060606
1906 10:27:27.718654 MTRR: Fixed MSR 0x250 0x0606060606060606
1907 10:27:27.721581 MTRR: Fixed MSR 0x258 0x0606060606060606
1908 10:27:27.724945 MTRR: Fixed MSR 0x259 0x0000000000000000
1909 10:27:27.728213 MTRR: Fixed MSR 0x268 0x0606060606060606
1910 10:27:27.734811 MTRR: Fixed MSR 0x269 0x0606060606060606
1911 10:27:27.738436 MTRR: Fixed MSR 0x26a 0x0606060606060606
1912 10:27:27.741656 MTRR: Fixed MSR 0x26b 0x0606060606060606
1913 10:27:27.744585 MTRR: Fixed MSR 0x26c 0x0606060606060606
1914 10:27:27.751372 MTRR: Fixed MSR 0x26d 0x0606060606060606
1915 10:27:27.754975 MTRR: Fixed MSR 0x26e 0x0606060606060606
1916 10:27:27.758114 MTRR: Fixed MSR 0x26f 0x0606060606060606
1917 10:27:27.761377 MTRR: Fixed MSR 0x258 0x0606060606060606
1918 10:27:27.764377 call enable_fixed_mtrr()
1919 10:27:27.768181 MTRR: Fixed MSR 0x259 0x0000000000000000
1920 10:27:27.774495 MTRR: Fixed MSR 0x268 0x0606060606060606
1921 10:27:27.778160 MTRR: Fixed MSR 0x269 0x0606060606060606
1922 10:27:27.781183 MTRR: Fixed MSR 0x26a 0x0606060606060606
1923 10:27:27.784746 MTRR: Fixed MSR 0x26b 0x0606060606060606
1924 10:27:27.790862 MTRR: Fixed MSR 0x26c 0x0606060606060606
1925 10:27:27.794448 MTRR: Fixed MSR 0x26d 0x0606060606060606
1926 10:27:27.797514 MTRR: Fixed MSR 0x26e 0x0606060606060606
1927 10:27:27.801237 MTRR: Fixed MSR 0x26f 0x0606060606060606
1928 10:27:27.805032 CPU physical address size: 39 bits
1929 10:27:27.807998 call enable_fixed_mtrr()
1930 10:27:27.811263 CPU physical address size: 39 bits
1931 10:27:27.818304 Checking segment from ROM address 0xffdd16f8
1932 10:27:27.820937 MTRR: Fixed MSR 0x250 0x0606060606060606
1933 10:27:27.824700 Checking segment from ROM address 0xffdd1714
1934 10:27:27.827998 MTRR: Fixed MSR 0x258 0x0606060606060606
1935 10:27:27.834523 MTRR: Fixed MSR 0x259 0x0000000000000000
1936 10:27:27.837624 MTRR: Fixed MSR 0x268 0x0606060606060606
1937 10:27:27.840906 MTRR: Fixed MSR 0x269 0x0606060606060606
1938 10:27:27.844048 MTRR: Fixed MSR 0x26a 0x0606060606060606
1939 10:27:27.851002 MTRR: Fixed MSR 0x26b 0x0606060606060606
1940 10:27:27.854116 MTRR: Fixed MSR 0x26c 0x0606060606060606
1941 10:27:27.857705 MTRR: Fixed MSR 0x26d 0x0606060606060606
1942 10:27:27.860712 MTRR: Fixed MSR 0x26e 0x0606060606060606
1943 10:27:27.867345 MTRR: Fixed MSR 0x26f 0x0606060606060606
1944 10:27:27.871117 MTRR: Fixed MSR 0x258 0x0606060606060606
1945 10:27:27.874318 MTRR: Fixed MSR 0x259 0x0000000000000000
1946 10:27:27.877519 MTRR: Fixed MSR 0x268 0x0606060606060606
1947 10:27:27.883954 MTRR: Fixed MSR 0x269 0x0606060606060606
1948 10:27:27.887542 MTRR: Fixed MSR 0x26a 0x0606060606060606
1949 10:27:27.890664 MTRR: Fixed MSR 0x26b 0x0606060606060606
1950 10:27:27.894435 MTRR: Fixed MSR 0x26c 0x0606060606060606
1951 10:27:27.900366 MTRR: Fixed MSR 0x26d 0x0606060606060606
1952 10:27:27.903844 MTRR: Fixed MSR 0x26e 0x0606060606060606
1953 10:27:27.907587 MTRR: Fixed MSR 0x26f 0x0606060606060606
1954 10:27:27.910301 call enable_fixed_mtrr()
1955 10:27:27.914033 call enable_fixed_mtrr()
1956 10:27:27.917542 CPU physical address size: 39 bits
1957 10:27:27.920331 CPU physical address size: 39 bits
1958 10:27:27.923574 CPU physical address size: 39 bits
1959 10:27:27.927403 Loading segment from ROM address 0xffdd16f8
1960 10:27:27.930533 code (compression=0)
1961 10:27:27.940393 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1962 10:27:27.946787 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1963 10:27:27.949932 it's not compressed!
1964 10:27:28.041592 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1965 10:27:28.048550 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1966 10:27:28.052041 Loading segment from ROM address 0xffdd1714
1967 10:27:28.054911 Entry Point 0x30000000
1968 10:27:28.058211 Loaded segments
1969 10:27:28.064014 Finalizing chipset.
1970 10:27:28.067148 Finalizing SMM.
1971 10:27:28.070324 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1972 10:27:28.073488 mp_park_aps done after 0 msecs.
1973 10:27:28.080374 Jumping to boot code at 30000000(99b62000)
1974 10:27:28.087234 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1975 10:27:28.087339
1976 10:27:28.087432
1977 10:27:28.087521
1978 10:27:28.090187 Starting depthcharge on Helios...
1979 10:27:28.090278
1980 10:27:28.090743 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
1981 10:27:28.090851 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
1982 10:27:28.090934 Setting prompt string to ['hatch:']
1983 10:27:28.091014 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
1984 10:27:28.100152 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1985 10:27:28.100255
1986 10:27:28.106963 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1987 10:27:28.107040
1988 10:27:28.113479 board_setup: Info: eMMC controller not present; skipping
1989 10:27:28.113580
1990 10:27:28.116519 New NVMe Controller 0x30053ac0 @ 00:1d:00
1991 10:27:28.116615
1992 10:27:28.123439 board_setup: Info: SDHCI controller not present; skipping
1993 10:27:28.123541
1994 10:27:28.130037 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1995 10:27:28.130114
1996 10:27:28.130178 Wipe memory regions:
1997 10:27:28.130238
1998 10:27:28.133585 [0x00000000001000, 0x000000000a0000)
1999 10:27:28.133656
2000 10:27:28.136492 [0x00000000100000, 0x00000030000000)
2001 10:27:28.203222
2002 10:27:28.206534 [0x00000030657430, 0x00000099a2c000)
2003 10:27:28.343272
2004 10:27:28.346417 [0x00000100000000, 0x0000045e800000)
2005 10:27:29.729395
2006 10:27:29.729532 R8152: Initializing
2007 10:27:29.729599
2008 10:27:29.732196 Version 9 (ocp_data = 6010)
2009 10:27:29.736594
2010 10:27:29.736676 R8152: Done initializing
2011 10:27:29.736758
2012 10:27:29.740132 Adding net device
2013 10:27:30.222619
2014 10:27:30.222889 R8152: Initializing
2015 10:27:30.223050
2016 10:27:30.226336 Version 6 (ocp_data = 5c30)
2017 10:27:30.226540
2018 10:27:30.229488 R8152: Done initializing
2019 10:27:30.229688
2020 10:27:30.232634 net_add_device: Attemp to include the same device
2021 10:27:30.236384
2022 10:27:30.243279 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2023 10:27:30.243486
2024 10:27:30.243643
2025 10:27:30.243791
2026 10:27:30.244228 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2028 10:27:30.344861 hatch: tftpboot 192.168.201.1 10935855/tftp-deploy-p7kl0hdg/kernel/bzImage 10935855/tftp-deploy-p7kl0hdg/kernel/cmdline 10935855/tftp-deploy-p7kl0hdg/ramdisk/ramdisk.cpio.gz
2029 10:27:30.345024 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2030 10:27:30.345108 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2031 10:27:30.349200 tftpboot 192.168.201.1 10935855/tftp-deploy-p7kl0hdg/kernel/bzIploy-p7kl0hdg/kernel/cmdline 10935855/tftp-deploy-p7kl0hdg/ramdisk/ramdisk.cpio.gz
2032 10:27:30.349296
2033 10:27:30.349363 Waiting for link
2034 10:27:30.549959
2035 10:27:30.550095 done.
2036 10:27:30.550168
2037 10:27:30.550231 MAC: 00:24:32:50:19:be
2038 10:27:30.550321
2039 10:27:30.553746 Sending DHCP discover... done.
2040 10:27:30.553833
2041 10:27:30.556993 Waiting for reply... done.
2042 10:27:30.557068
2043 10:27:30.559948 Sending DHCP request... done.
2044 10:27:30.560061
2045 10:27:30.567626 Waiting for reply... done.
2046 10:27:30.567711
2047 10:27:30.567784 My ip is 192.168.201.15
2048 10:27:30.567847
2049 10:27:30.571458 The DHCP server ip is 192.168.201.1
2050 10:27:30.574448
2051 10:27:30.577665 TFTP server IP predefined by user: 192.168.201.1
2052 10:27:30.577746
2053 10:27:30.584031 Bootfile predefined by user: 10935855/tftp-deploy-p7kl0hdg/kernel/bzImage
2054 10:27:30.584141
2055 10:27:30.587984 Sending tftp read request... done.
2056 10:27:30.588061
2057 10:27:30.591084 Waiting for the transfer...
2058 10:27:30.591171
2059 10:27:31.133784 00000000 ################################################################
2060 10:27:31.133918
2061 10:27:31.659010 00080000 ################################################################
2062 10:27:31.659177
2063 10:27:32.173849 00100000 ################################################################
2064 10:27:32.173985
2065 10:27:32.715636 00180000 ################################################################
2066 10:27:32.715802
2067 10:27:33.236379 00200000 ################################################################
2068 10:27:33.236532
2069 10:27:33.761559 00280000 ################################################################
2070 10:27:33.761694
2071 10:27:34.280106 00300000 ################################################################
2072 10:27:34.280290
2073 10:27:34.804066 00380000 ################################################################
2074 10:27:34.804208
2075 10:27:35.325975 00400000 ################################################################
2076 10:27:35.326112
2077 10:27:35.847027 00480000 ################################################################
2078 10:27:35.847164
2079 10:27:36.368815 00500000 ################################################################
2080 10:27:36.368964
2081 10:27:36.898854 00580000 ################################################################
2082 10:27:36.898992
2083 10:27:37.415119 00600000 ################################################################
2084 10:27:37.415258
2085 10:27:37.941588 00680000 ################################################################
2086 10:27:37.941786
2087 10:27:38.462166 00700000 ################################################################
2088 10:27:38.462299
2089 10:27:38.983393 00780000 ################################################################
2090 10:27:38.983557
2091 10:27:39.507072 00800000 ################################################################
2092 10:27:39.507236
2093 10:27:40.032151 00880000 ################################################################
2094 10:27:40.032288
2095 10:27:40.561315 00900000 ################################################################
2096 10:27:40.561518
2097 10:27:41.084551 00980000 ################################################################
2098 10:27:41.084688
2099 10:27:41.464090 00a00000 ############################################### done.
2100 10:27:41.464229
2101 10:27:41.467129 The bootfile was 10863104 bytes long.
2102 10:27:41.467214
2103 10:27:41.470804 Sending tftp read request... done.
2104 10:27:41.470891
2105 10:27:41.474019 Waiting for the transfer...
2106 10:27:41.474103
2107 10:27:42.026090 00000000 ################################################################
2108 10:27:42.026238
2109 10:27:42.574486 00080000 ################################################################
2110 10:27:42.574651
2111 10:27:43.112419 00100000 ################################################################
2112 10:27:43.112567
2113 10:27:43.657851 00180000 ################################################################
2114 10:27:43.658003
2115 10:27:44.267700 00200000 ################################################################
2116 10:27:44.268239
2117 10:27:44.946660 00280000 ################################################################
2118 10:27:44.947231
2119 10:27:45.649741 00300000 ################################################################
2120 10:27:45.650245
2121 10:27:46.327080 00380000 ################################################################
2122 10:27:46.327773
2123 10:27:47.015093 00400000 ################################################################
2124 10:27:47.015593
2125 10:27:47.588161 00480000 ################################################################
2126 10:27:47.588342
2127 10:27:48.209375 00500000 ################################################################
2128 10:27:48.209621
2129 10:27:48.869300 00580000 ################################################################
2130 10:27:48.869853
2131 10:27:49.518862 00600000 ################################################################
2132 10:27:49.519031
2133 10:27:50.094732 00680000 ################################################################
2134 10:27:50.094884
2135 10:27:50.678893 00700000 ################################################################
2136 10:27:50.679047
2137 10:27:51.251419 00780000 ################################################################
2138 10:27:51.251572
2139 10:27:51.780730 00800000 ################################################################
2140 10:27:51.780885
2141 10:27:52.107185 00880000 ####################################### done.
2142 10:27:52.107338
2143 10:27:52.110268 Sending tftp read request... done.
2144 10:27:52.110353
2145 10:27:52.113590 Waiting for the transfer...
2146 10:27:52.113673
2147 10:27:52.113739 00000000 # done.
2148 10:27:52.113803
2149 10:27:52.124043 Command line loaded dynamically from TFTP file: 10935855/tftp-deploy-p7kl0hdg/kernel/cmdline
2150 10:27:52.124128
2151 10:27:52.140130 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2152 10:27:52.140215
2153 10:27:52.147126 ec_init(0): CrosEC protocol v3 supported (256, 256)
2154 10:27:52.151315
2155 10:27:52.155024 Shutting down all USB controllers.
2156 10:27:52.155107
2157 10:27:52.155172 Removing current net device
2158 10:27:52.158908
2159 10:27:52.158990 Finalizing coreboot
2160 10:27:52.159055
2161 10:27:52.165680 Exiting depthcharge with code 4 at timestamp: 31468535
2162 10:27:52.165762
2163 10:27:52.165826
2164 10:27:52.165885 Starting kernel ...
2165 10:27:52.165943
2166 10:27:52.165998
2167 10:27:52.166374 end: 2.2.4 bootloader-commands (duration 00:00:24) [common]
2168 10:27:52.166471 start: 2.2.5 auto-login-action (timeout 00:04:18) [common]
2169 10:27:52.166564 Setting prompt string to ['Linux version [0-9]']
2170 10:27:52.166632 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2171 10:27:52.166698 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2173 10:32:10.166747 end: 2.2.5 auto-login-action (duration 00:04:18) [common]
2175 10:32:10.167040 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 258 seconds'
2177 10:32:10.167224 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2180 10:32:10.167496 end: 2 depthcharge-action (duration 00:05:00) [common]
2182 10:32:10.167728 Cleaning after the job
2183 10:32:10.167850 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10935855/tftp-deploy-p7kl0hdg/ramdisk
2184 10:32:10.169178 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10935855/tftp-deploy-p7kl0hdg/kernel
2185 10:32:10.170504 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10935855/tftp-deploy-p7kl0hdg/modules
2186 10:32:10.171113 start: 5.1 power-off (timeout 00:00:30) [common]
2187 10:32:10.171402 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2188 10:32:10.247681 >> Command sent successfully.
2189 10:32:10.250284 Returned 0 in 0 seconds
2190 10:32:10.350726 end: 5.1 power-off (duration 00:00:00) [common]
2192 10:32:10.351179 start: 5.2 read-feedback (timeout 00:10:00) [common]
2193 10:32:10.351540 Listened to connection for namespace 'common' for up to 1s
2195 10:32:10.352028 Listened to connection for namespace 'common' for up to 1s
2196 10:32:11.352488 Finalising connection for namespace 'common'
2197 10:32:11.352665 Disconnecting from shell: Finalise
2198 10:32:11.352745
2199 10:32:11.453100 end: 5.2 read-feedback (duration 00:00:01) [common]
2200 10:32:11.453258 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10935855
2201 10:32:11.467766 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10935855
2202 10:32:11.467908 JobError: Your job cannot terminate cleanly.