Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Kernel Warnings: 0
- Errors: 2
- Warnings: 0
1 10:51:33.643661 lava-dispatcher, installed at version: 2023.05.1
2 10:51:33.643867 start: 0 validate
3 10:51:33.643991 Start time: 2023-06-28 10:51:33.643984+00:00 (UTC)
4 10:51:33.644104 Using caching service: 'http://localhost/cache/?uri=%s'
5 10:51:33.644247 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 10:51:33.898754 Using caching service: 'http://localhost/cache/?uri=%s'
7 10:51:33.899627 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.287-cip100-43-g1a6518aa81690%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 10:51:34.153889 Using caching service: 'http://localhost/cache/?uri=%s'
9 10:51:34.154654 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 10:51:34.408036 Using caching service: 'http://localhost/cache/?uri=%s'
11 10:51:34.408812 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.287-cip100-43-g1a6518aa81690%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 10:51:34.667511 validate duration: 1.02
14 10:51:34.667834 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 10:51:34.667931 start: 1.1 download-retry (timeout 00:10:00) [common]
16 10:51:34.668020 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 10:51:34.668146 Not decompressing ramdisk as can be used compressed.
18 10:51:34.668229 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/initrd.cpio.gz
19 10:51:34.668292 saving as /var/lib/lava/dispatcher/tmp/10935909/tftp-deploy-5yl72eh7/ramdisk/initrd.cpio.gz
20 10:51:34.668351 total size: 5432480 (5MB)
21 10:51:34.669437 progress 0% (0MB)
22 10:51:34.670998 progress 5% (0MB)
23 10:51:34.672472 progress 10% (0MB)
24 10:51:34.673873 progress 15% (0MB)
25 10:51:34.675399 progress 20% (1MB)
26 10:51:34.676820 progress 25% (1MB)
27 10:51:34.678173 progress 30% (1MB)
28 10:51:34.679738 progress 35% (1MB)
29 10:51:34.681072 progress 40% (2MB)
30 10:51:34.682408 progress 45% (2MB)
31 10:51:34.683781 progress 50% (2MB)
32 10:51:34.685268 progress 55% (2MB)
33 10:51:34.686598 progress 60% (3MB)
34 10:51:34.688038 progress 65% (3MB)
35 10:51:34.689534 progress 70% (3MB)
36 10:51:34.690900 progress 75% (3MB)
37 10:51:34.692311 progress 80% (4MB)
38 10:51:34.693648 progress 85% (4MB)
39 10:51:34.695137 progress 90% (4MB)
40 10:51:34.696522 progress 95% (4MB)
41 10:51:34.697875 progress 100% (5MB)
42 10:51:34.698077 5MB downloaded in 0.03s (174.31MB/s)
43 10:51:34.698216 end: 1.1.1 http-download (duration 00:00:00) [common]
45 10:51:34.698445 end: 1.1 download-retry (duration 00:00:00) [common]
46 10:51:34.698529 start: 1.2 download-retry (timeout 00:10:00) [common]
47 10:51:34.698623 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 10:51:34.698749 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.287-cip100-43-g1a6518aa81690/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 10:51:34.698819 saving as /var/lib/lava/dispatcher/tmp/10935909/tftp-deploy-5yl72eh7/kernel/bzImage
50 10:51:34.698878 total size: 10863104 (10MB)
51 10:51:34.698937 No compression specified
52 10:51:34.700041 progress 0% (0MB)
53 10:51:34.702740 progress 5% (0MB)
54 10:51:34.705578 progress 10% (1MB)
55 10:51:34.708500 progress 15% (1MB)
56 10:51:34.712420 progress 20% (2MB)
57 10:51:34.715481 progress 25% (2MB)
58 10:51:34.718355 progress 30% (3MB)
59 10:51:34.721186 progress 35% (3MB)
60 10:51:34.723850 progress 40% (4MB)
61 10:51:34.726635 progress 45% (4MB)
62 10:51:34.729300 progress 50% (5MB)
63 10:51:34.732126 progress 55% (5MB)
64 10:51:34.734754 progress 60% (6MB)
65 10:51:34.737566 progress 65% (6MB)
66 10:51:34.740433 progress 70% (7MB)
67 10:51:34.743051 progress 75% (7MB)
68 10:51:34.745886 progress 80% (8MB)
69 10:51:34.748529 progress 85% (8MB)
70 10:51:34.751264 progress 90% (9MB)
71 10:51:34.753997 progress 95% (9MB)
72 10:51:34.756850 progress 100% (10MB)
73 10:51:34.757019 10MB downloaded in 0.06s (178.20MB/s)
74 10:51:34.757158 end: 1.2.1 http-download (duration 00:00:00) [common]
76 10:51:34.757379 end: 1.2 download-retry (duration 00:00:00) [common]
77 10:51:34.757466 start: 1.3 download-retry (timeout 00:10:00) [common]
78 10:51:34.757554 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 10:51:34.757684 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/full.rootfs.tar.xz
80 10:51:34.757752 saving as /var/lib/lava/dispatcher/tmp/10935909/tftp-deploy-5yl72eh7/nfsrootfs/full.rootfs.tar
81 10:51:34.757812 total size: 207157356 (197MB)
82 10:51:34.757871 Using unxz to decompress xz
83 10:51:34.761541 progress 0% (0MB)
84 10:51:35.299377 progress 5% (9MB)
85 10:51:35.813699 progress 10% (19MB)
86 10:51:36.401050 progress 15% (29MB)
87 10:51:36.754833 progress 20% (39MB)
88 10:51:37.109198 progress 25% (49MB)
89 10:51:37.695882 progress 30% (59MB)
90 10:51:38.231074 progress 35% (69MB)
91 10:51:38.823414 progress 40% (79MB)
92 10:51:39.367891 progress 45% (88MB)
93 10:51:39.953340 progress 50% (98MB)
94 10:51:40.586210 progress 55% (108MB)
95 10:51:41.277022 progress 60% (118MB)
96 10:51:41.415354 progress 65% (128MB)
97 10:51:41.554420 progress 70% (138MB)
98 10:51:41.648536 progress 75% (148MB)
99 10:51:41.720708 progress 80% (158MB)
100 10:51:41.791964 progress 85% (167MB)
101 10:51:41.892707 progress 90% (177MB)
102 10:51:42.163519 progress 95% (187MB)
103 10:51:42.748315 progress 100% (197MB)
104 10:51:42.754726 197MB downloaded in 8.00s (24.70MB/s)
105 10:51:42.755013 end: 1.3.1 http-download (duration 00:00:08) [common]
107 10:51:42.755273 end: 1.3 download-retry (duration 00:00:08) [common]
108 10:51:42.755364 start: 1.4 download-retry (timeout 00:09:52) [common]
109 10:51:42.755453 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 10:51:42.755637 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.287-cip100-43-g1a6518aa81690/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 10:51:42.755708 saving as /var/lib/lava/dispatcher/tmp/10935909/tftp-deploy-5yl72eh7/modules/modules.tar
112 10:51:42.755769 total size: 484660 (0MB)
113 10:51:42.755831 Using unxz to decompress xz
114 10:51:42.759434 progress 6% (0MB)
115 10:51:42.759878 progress 13% (0MB)
116 10:51:42.760111 progress 20% (0MB)
117 10:51:42.761577 progress 27% (0MB)
118 10:51:42.763764 progress 33% (0MB)
119 10:51:42.765961 progress 40% (0MB)
120 10:51:42.768069 progress 47% (0MB)
121 10:51:42.769788 progress 54% (0MB)
122 10:51:42.772276 progress 60% (0MB)
123 10:51:42.774782 progress 67% (0MB)
124 10:51:42.776962 progress 74% (0MB)
125 10:51:42.778971 progress 81% (0MB)
126 10:51:42.781194 progress 87% (0MB)
127 10:51:42.783123 progress 94% (0MB)
128 10:51:42.785144 progress 100% (0MB)
129 10:51:42.791342 0MB downloaded in 0.04s (13.00MB/s)
130 10:51:42.791680 end: 1.4.1 http-download (duration 00:00:00) [common]
132 10:51:42.791936 end: 1.4 download-retry (duration 00:00:00) [common]
133 10:51:42.792030 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
134 10:51:42.792126 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
135 10:51:46.011196 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10935909/extract-nfsrootfs-xb3ywdl4
136 10:51:46.011404 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
137 10:51:46.011507 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
138 10:51:46.011714 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10935909/lava-overlay-_gmzgyfx
139 10:51:46.011843 makedir: /var/lib/lava/dispatcher/tmp/10935909/lava-overlay-_gmzgyfx/lava-10935909/bin
140 10:51:46.011943 makedir: /var/lib/lava/dispatcher/tmp/10935909/lava-overlay-_gmzgyfx/lava-10935909/tests
141 10:51:46.012042 makedir: /var/lib/lava/dispatcher/tmp/10935909/lava-overlay-_gmzgyfx/lava-10935909/results
142 10:51:46.012142 Creating /var/lib/lava/dispatcher/tmp/10935909/lava-overlay-_gmzgyfx/lava-10935909/bin/lava-add-keys
143 10:51:46.012278 Creating /var/lib/lava/dispatcher/tmp/10935909/lava-overlay-_gmzgyfx/lava-10935909/bin/lava-add-sources
144 10:51:46.012417 Creating /var/lib/lava/dispatcher/tmp/10935909/lava-overlay-_gmzgyfx/lava-10935909/bin/lava-background-process-start
145 10:51:46.012543 Creating /var/lib/lava/dispatcher/tmp/10935909/lava-overlay-_gmzgyfx/lava-10935909/bin/lava-background-process-stop
146 10:51:46.012664 Creating /var/lib/lava/dispatcher/tmp/10935909/lava-overlay-_gmzgyfx/lava-10935909/bin/lava-common-functions
147 10:51:46.012785 Creating /var/lib/lava/dispatcher/tmp/10935909/lava-overlay-_gmzgyfx/lava-10935909/bin/lava-echo-ipv4
148 10:51:46.012906 Creating /var/lib/lava/dispatcher/tmp/10935909/lava-overlay-_gmzgyfx/lava-10935909/bin/lava-install-packages
149 10:51:46.013026 Creating /var/lib/lava/dispatcher/tmp/10935909/lava-overlay-_gmzgyfx/lava-10935909/bin/lava-installed-packages
150 10:51:46.013145 Creating /var/lib/lava/dispatcher/tmp/10935909/lava-overlay-_gmzgyfx/lava-10935909/bin/lava-os-build
151 10:51:46.013263 Creating /var/lib/lava/dispatcher/tmp/10935909/lava-overlay-_gmzgyfx/lava-10935909/bin/lava-probe-channel
152 10:51:46.013389 Creating /var/lib/lava/dispatcher/tmp/10935909/lava-overlay-_gmzgyfx/lava-10935909/bin/lava-probe-ip
153 10:51:46.013509 Creating /var/lib/lava/dispatcher/tmp/10935909/lava-overlay-_gmzgyfx/lava-10935909/bin/lava-target-ip
154 10:51:46.013631 Creating /var/lib/lava/dispatcher/tmp/10935909/lava-overlay-_gmzgyfx/lava-10935909/bin/lava-target-mac
155 10:51:46.013750 Creating /var/lib/lava/dispatcher/tmp/10935909/lava-overlay-_gmzgyfx/lava-10935909/bin/lava-target-storage
156 10:51:46.013872 Creating /var/lib/lava/dispatcher/tmp/10935909/lava-overlay-_gmzgyfx/lava-10935909/bin/lava-test-case
157 10:51:46.013992 Creating /var/lib/lava/dispatcher/tmp/10935909/lava-overlay-_gmzgyfx/lava-10935909/bin/lava-test-event
158 10:51:46.014111 Creating /var/lib/lava/dispatcher/tmp/10935909/lava-overlay-_gmzgyfx/lava-10935909/bin/lava-test-feedback
159 10:51:46.014231 Creating /var/lib/lava/dispatcher/tmp/10935909/lava-overlay-_gmzgyfx/lava-10935909/bin/lava-test-raise
160 10:51:46.014350 Creating /var/lib/lava/dispatcher/tmp/10935909/lava-overlay-_gmzgyfx/lava-10935909/bin/lava-test-reference
161 10:51:46.014469 Creating /var/lib/lava/dispatcher/tmp/10935909/lava-overlay-_gmzgyfx/lava-10935909/bin/lava-test-runner
162 10:51:46.014588 Creating /var/lib/lava/dispatcher/tmp/10935909/lava-overlay-_gmzgyfx/lava-10935909/bin/lava-test-set
163 10:51:46.014706 Creating /var/lib/lava/dispatcher/tmp/10935909/lava-overlay-_gmzgyfx/lava-10935909/bin/lava-test-shell
164 10:51:46.014827 Updating /var/lib/lava/dispatcher/tmp/10935909/lava-overlay-_gmzgyfx/lava-10935909/bin/lava-add-keys (debian)
165 10:51:46.014972 Updating /var/lib/lava/dispatcher/tmp/10935909/lava-overlay-_gmzgyfx/lava-10935909/bin/lava-add-sources (debian)
166 10:51:46.015107 Updating /var/lib/lava/dispatcher/tmp/10935909/lava-overlay-_gmzgyfx/lava-10935909/bin/lava-install-packages (debian)
167 10:51:46.015245 Updating /var/lib/lava/dispatcher/tmp/10935909/lava-overlay-_gmzgyfx/lava-10935909/bin/lava-installed-packages (debian)
168 10:51:46.015381 Updating /var/lib/lava/dispatcher/tmp/10935909/lava-overlay-_gmzgyfx/lava-10935909/bin/lava-os-build (debian)
169 10:51:46.015501 Creating /var/lib/lava/dispatcher/tmp/10935909/lava-overlay-_gmzgyfx/lava-10935909/environment
170 10:51:46.015613 LAVA metadata
171 10:51:46.015683 - LAVA_JOB_ID=10935909
172 10:51:46.015745 - LAVA_DISPATCHER_IP=192.168.201.1
173 10:51:46.015843 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
174 10:51:46.015910 skipped lava-vland-overlay
175 10:51:46.015984 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
176 10:51:46.016063 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
177 10:51:46.016123 skipped lava-multinode-overlay
178 10:51:46.016195 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
179 10:51:46.016271 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
180 10:51:46.016343 Loading test definitions
181 10:51:46.016430 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:49) [common]
182 10:51:46.016502 Using /lava-10935909 at stage 0
183 10:51:46.016774 uuid=10935909_1.5.2.3.1 testdef=None
184 10:51:46.016861 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
185 10:51:46.016945 start: 1.5.2.3.2 test-overlay (timeout 00:09:49) [common]
186 10:51:46.017380 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
188 10:51:46.017597 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:49) [common]
189 10:51:46.018134 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
191 10:51:46.018366 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
192 10:51:46.018893 runner path: /var/lib/lava/dispatcher/tmp/10935909/lava-overlay-_gmzgyfx/lava-10935909/0/tests/0_timesync-off test_uuid 10935909_1.5.2.3.1
193 10:51:46.019043 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
195 10:51:46.019266 start: 1.5.2.3.5 git-repo-action (timeout 00:09:49) [common]
196 10:51:46.019338 Using /lava-10935909 at stage 0
197 10:51:46.019435 Fetching tests from https://github.com/kernelci/test-definitions.git
198 10:51:46.019512 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/10935909/lava-overlay-_gmzgyfx/lava-10935909/0/tests/1_kselftest-futex'
199 10:51:52.689280 Running '/usr/bin/git checkout kernelci.org
200 10:51:52.834546 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/10935909/lava-overlay-_gmzgyfx/lava-10935909/0/tests/1_kselftest-futex/automated/linux/kselftest/kselftest.yaml
201 10:51:52.835257 uuid=10935909_1.5.2.3.5 testdef=None
202 10:51:52.835421 end: 1.5.2.3.5 git-repo-action (duration 00:00:07) [common]
204 10:51:52.835688 start: 1.5.2.3.6 test-overlay (timeout 00:09:42) [common]
205 10:51:52.836448 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
207 10:51:52.836691 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:42) [common]
208 10:51:52.837655 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
210 10:51:52.837898 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:42) [common]
211 10:51:52.838827 runner path: /var/lib/lava/dispatcher/tmp/10935909/lava-overlay-_gmzgyfx/lava-10935909/0/tests/1_kselftest-futex test_uuid 10935909_1.5.2.3.5
212 10:51:52.838920 BOARD='asus-C436FA-Flip-hatch'
213 10:51:52.838988 BRANCH='cip-gitlab'
214 10:51:52.839050 SKIPFILE='/dev/null'
215 10:51:52.839110 SKIP_INSTALL='True'
216 10:51:52.839169 TESTPROG_URL='None'
217 10:51:52.839227 TST_CASENAME=''
218 10:51:52.839282 TST_CMDFILES='futex'
219 10:51:52.839422 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
221 10:51:52.839647 Creating lava-test-runner.conf files
222 10:51:52.839714 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10935909/lava-overlay-_gmzgyfx/lava-10935909/0 for stage 0
223 10:51:52.839809 - 0_timesync-off
224 10:51:52.839882 - 1_kselftest-futex
225 10:51:52.839984 end: 1.5.2.3 test-definition (duration 00:00:07) [common]
226 10:51:52.840075 start: 1.5.2.4 compress-overlay (timeout 00:09:42) [common]
227 10:52:00.217737 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
228 10:52:00.217902 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:34) [common]
229 10:52:00.217997 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
230 10:52:00.218097 end: 1.5.2 lava-overlay (duration 00:00:14) [common]
231 10:52:00.218184 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
232 10:52:00.347393 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
233 10:52:00.347802 start: 1.5.4 extract-modules (timeout 00:09:34) [common]
234 10:52:00.347917 extracting modules file /var/lib/lava/dispatcher/tmp/10935909/tftp-deploy-5yl72eh7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10935909/extract-nfsrootfs-xb3ywdl4
235 10:52:00.366781 extracting modules file /var/lib/lava/dispatcher/tmp/10935909/tftp-deploy-5yl72eh7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10935909/extract-overlay-ramdisk-8_q7pz1u/ramdisk
236 10:52:00.385623 end: 1.5.4 extract-modules (duration 00:00:00) [common]
237 10:52:00.385752 start: 1.5.5 apply-overlay-tftp (timeout 00:09:34) [common]
238 10:52:00.385846 [common] Applying overlay to NFS
239 10:52:00.385949 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10935909/compress-overlay-gl37070j/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10935909/extract-nfsrootfs-xb3ywdl4
240 10:52:01.263785 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
241 10:52:01.263953 start: 1.5.6 configure-preseed-file (timeout 00:09:33) [common]
242 10:52:01.264044 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
243 10:52:01.264136 start: 1.5.7 compress-ramdisk (timeout 00:09:33) [common]
244 10:52:01.264223 Building ramdisk /var/lib/lava/dispatcher/tmp/10935909/extract-overlay-ramdisk-8_q7pz1u/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10935909/extract-overlay-ramdisk-8_q7pz1u/ramdisk
245 10:52:01.346770 >> 30352 blocks
246 10:52:01.929382 rename /var/lib/lava/dispatcher/tmp/10935909/extract-overlay-ramdisk-8_q7pz1u/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10935909/tftp-deploy-5yl72eh7/ramdisk/ramdisk.cpio.gz
247 10:52:01.929808 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
248 10:52:01.929930 start: 1.5.8 prepare-kernel (timeout 00:09:33) [common]
249 10:52:01.930035 start: 1.5.8.1 prepare-fit (timeout 00:09:33) [common]
250 10:52:01.930130 No mkimage arch provided, not using FIT.
251 10:52:01.930219 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
252 10:52:01.930304 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
253 10:52:01.930408 end: 1.5 prepare-tftp-overlay (duration 00:00:19) [common]
254 10:52:01.930502 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:33) [common]
255 10:52:01.930582 No LXC device requested
256 10:52:01.930660 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 10:52:01.930747 start: 1.7 deploy-device-env (timeout 00:09:33) [common]
258 10:52:01.930829 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 10:52:01.930918 Checking files for TFTP limit of 4294967296 bytes.
260 10:52:01.931324 end: 1 tftp-deploy (duration 00:00:27) [common]
261 10:52:01.931427 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 10:52:01.931518 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 10:52:01.931698 substitutions:
264 10:52:01.931768 - {DTB}: None
265 10:52:01.931831 - {INITRD}: 10935909/tftp-deploy-5yl72eh7/ramdisk/ramdisk.cpio.gz
266 10:52:01.931890 - {KERNEL}: 10935909/tftp-deploy-5yl72eh7/kernel/bzImage
267 10:52:01.931948 - {LAVA_MAC}: None
268 10:52:01.932004 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10935909/extract-nfsrootfs-xb3ywdl4
269 10:52:01.932062 - {NFS_SERVER_IP}: 192.168.201.1
270 10:52:01.932117 - {PRESEED_CONFIG}: None
271 10:52:01.932171 - {PRESEED_LOCAL}: None
272 10:52:01.932226 - {RAMDISK}: 10935909/tftp-deploy-5yl72eh7/ramdisk/ramdisk.cpio.gz
273 10:52:01.932280 - {ROOT_PART}: None
274 10:52:01.932334 - {ROOT}: None
275 10:52:01.932387 - {SERVER_IP}: 192.168.201.1
276 10:52:01.932440 - {TEE}: None
277 10:52:01.932493 Parsed boot commands:
278 10:52:01.932546 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
279 10:52:01.932713 Parsed boot commands: tftpboot 192.168.201.1 10935909/tftp-deploy-5yl72eh7/kernel/bzImage 10935909/tftp-deploy-5yl72eh7/kernel/cmdline 10935909/tftp-deploy-5yl72eh7/ramdisk/ramdisk.cpio.gz
280 10:52:01.932800 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
281 10:52:01.932890 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
282 10:52:01.933027 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
283 10:52:01.933122 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
284 10:52:01.933188 Not connected, no need to disconnect.
285 10:52:01.933261 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
286 10:52:01.933339 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
287 10:52:01.933410 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
288 10:52:01.936873 Setting prompt string to ['lava-test: # ']
289 10:52:01.937202 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
290 10:52:01.937309 end: 2.2.1 reset-connection (duration 00:00:00) [common]
291 10:52:01.937428 start: 2.2.2 reset-device (timeout 00:05:00) [common]
292 10:52:01.937584 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
293 10:52:01.937783 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
294 10:52:07.085971 >> Command sent successfully.
295 10:52:07.097341 Returned 0 in 5 seconds
296 10:52:07.198721 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
298 10:52:07.200727 end: 2.2.2 reset-device (duration 00:00:05) [common]
299 10:52:07.201360 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
300 10:52:07.201934 Setting prompt string to 'Starting depthcharge on Helios...'
301 10:52:07.202397 Changing prompt to 'Starting depthcharge on Helios...'
302 10:52:07.202932 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
303 10:52:07.204582 [Enter `^Ec?' for help]
304 10:52:07.810814
305 10:52:07.811636
306 10:52:07.821570 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
307 10:52:07.824407 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
308 10:52:07.830664 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
309 10:52:07.834315 CPU: AES supported, TXT NOT supported, VT supported
310 10:52:07.841188 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
311 10:52:07.844058 PCH: device id 0284 (rev 00) is Cometlake-U Premium
312 10:52:07.850821 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
313 10:52:07.854326 VBOOT: Loading verstage.
314 10:52:07.857398 FMAP: Found "FLASH" version 1.1 at 0xc04000.
315 10:52:07.864513 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
316 10:52:07.867879 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
317 10:52:07.871100 CBFS @ c08000 size 3f8000
318 10:52:07.877706 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
319 10:52:07.881190 CBFS: Locating 'fallback/verstage'
320 10:52:07.884469 CBFS: Found @ offset 10fb80 size 1072c
321 10:52:07.887819
322 10:52:07.888403
323 10:52:07.897409 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
324 10:52:07.911832 Probing TPM: . done!
325 10:52:07.915338 TPM ready after 0 ms
326 10:52:07.918496 Connected to device vid:did:rid of 1ae0:0028:00
327 10:52:07.928611 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
328 10:52:07.932019 Initialized TPM device CR50 revision 0
329 10:52:07.973490 tlcl_send_startup: Startup return code is 0
330 10:52:07.974087 TPM: setup succeeded
331 10:52:07.986034 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
332 10:52:07.989943 Chrome EC: UHEPI supported
333 10:52:07.993504 Phase 1
334 10:52:07.996719 FMAP: area GBB found @ c05000 (12288 bytes)
335 10:52:08.002926 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
336 10:52:08.006611 Phase 2
337 10:52:08.007200 Phase 3
338 10:52:08.009948 FMAP: area GBB found @ c05000 (12288 bytes)
339 10:52:08.016732 VB2:vb2_report_dev_firmware() This is developer signed firmware
340 10:52:08.023015 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
341 10:52:08.026322 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
342 10:52:08.032862 VB2:vb2_verify_keyblock() Checking keyblock signature...
343 10:52:08.048294 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
344 10:52:08.051949 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
345 10:52:08.058826 VB2:vb2_verify_fw_preamble() Verifying preamble.
346 10:52:08.062683 Phase 4
347 10:52:08.066205 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
348 10:52:08.072769 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
349 10:52:08.253033 VB2:vb2_rsa_verify_digest() Digest check failed!
350 10:52:08.259407 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
351 10:52:08.260125 Saving nvdata
352 10:52:08.262533 Reboot requested (10020007)
353 10:52:08.265678 board_reset() called!
354 10:52:08.266292 full_reset() called!
355 10:52:12.777610
356 10:52:12.777762
357 10:52:12.787792 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
358 10:52:12.790798 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
359 10:52:12.797093 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
360 10:52:12.800721 CPU: AES supported, TXT NOT supported, VT supported
361 10:52:12.807887 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
362 10:52:12.810720 PCH: device id 0284 (rev 00) is Cometlake-U Premium
363 10:52:12.817648 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
364 10:52:12.820495 VBOOT: Loading verstage.
365 10:52:12.824394 FMAP: Found "FLASH" version 1.1 at 0xc04000.
366 10:52:12.830526 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
367 10:52:12.834214 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
368 10:52:12.837129 CBFS @ c08000 size 3f8000
369 10:52:12.844137 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
370 10:52:12.847293 CBFS: Locating 'fallback/verstage'
371 10:52:12.850617 CBFS: Found @ offset 10fb80 size 1072c
372 10:52:12.854353
373 10:52:12.854441
374 10:52:12.864105 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
375 10:52:12.878684 Probing TPM: . done!
376 10:52:12.882155 TPM ready after 0 ms
377 10:52:12.885214 Connected to device vid:did:rid of 1ae0:0028:00
378 10:52:12.895450 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
379 10:52:12.899528 Initialized TPM device CR50 revision 0
380 10:52:12.940357 tlcl_send_startup: Startup return code is 0
381 10:52:12.940457 TPM: setup succeeded
382 10:52:12.952687 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
383 10:52:12.956927 Chrome EC: UHEPI supported
384 10:52:12.960096 Phase 1
385 10:52:12.963299 FMAP: area GBB found @ c05000 (12288 bytes)
386 10:52:12.970191 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
387 10:52:12.976537 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
388 10:52:12.980276 Recovery requested (1009000e)
389 10:52:12.985846 Saving nvdata
390 10:52:12.991545 tlcl_extend: response is 0
391 10:52:13.000666 tlcl_extend: response is 0
392 10:52:13.007838 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
393 10:52:13.010791 CBFS @ c08000 size 3f8000
394 10:52:13.017800 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
395 10:52:13.020774 CBFS: Locating 'fallback/romstage'
396 10:52:13.024746 CBFS: Found @ offset 80 size 145fc
397 10:52:13.027680 Accumulated console time in verstage 98 ms
398 10:52:13.027794
399 10:52:13.027895
400 10:52:13.040574 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
401 10:52:13.047104 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
402 10:52:13.050614 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
403 10:52:13.053643 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
404 10:52:13.060319 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
405 10:52:13.063510 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
406 10:52:13.067019 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
407 10:52:13.070435 TCO_STS: 0000 0000
408 10:52:13.073755 GEN_PMCON: e0015238 00000200
409 10:52:13.076718 GBLRST_CAUSE: 00000000 00000000
410 10:52:13.076816 prev_sleep_state 5
411 10:52:13.080774 Boot Count incremented to 65609
412 10:52:13.087223 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
413 10:52:13.091086 CBFS @ c08000 size 3f8000
414 10:52:13.097000 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
415 10:52:13.097104 CBFS: Locating 'fspm.bin'
416 10:52:13.103577 CBFS: Found @ offset 5ffc0 size 71000
417 10:52:13.106992 Chrome EC: UHEPI supported
418 10:52:13.113857 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
419 10:52:13.117272 Probing TPM: done!
420 10:52:13.123897 Connected to device vid:did:rid of 1ae0:0028:00
421 10:52:13.134079 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
422 10:52:13.140466 Initialized TPM device CR50 revision 0
423 10:52:13.148645 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
424 10:52:13.155910 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
425 10:52:13.158962 MRC cache found, size 1948
426 10:52:13.162514 bootmode is set to: 2
427 10:52:13.165334 PRMRR disabled by config.
428 10:52:13.165418 SPD INDEX = 1
429 10:52:13.171786 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
430 10:52:13.175455 CBFS @ c08000 size 3f8000
431 10:52:13.181814 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
432 10:52:13.181894 CBFS: Locating 'spd.bin'
433 10:52:13.185239 CBFS: Found @ offset 5fb80 size 400
434 10:52:13.188649 SPD: module type is LPDDR3
435 10:52:13.192111 SPD: module part is
436 10:52:13.199886 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
437 10:52:13.201899 SPD: device width 4 bits, bus width 8 bits
438 10:52:13.205094 SPD: module size is 4096 MB (per channel)
439 10:52:13.208778 memory slot: 0 configuration done.
440 10:52:13.211500 memory slot: 2 configuration done.
441 10:52:13.263593 CBMEM:
442 10:52:13.266538 IMD: root @ 99fff000 254 entries.
443 10:52:13.270048 IMD: root @ 99ffec00 62 entries.
444 10:52:13.273310 External stage cache:
445 10:52:13.276893 IMD: root @ 9abff000 254 entries.
446 10:52:13.280050 IMD: root @ 9abfec00 62 entries.
447 10:52:13.283100 Chrome EC: clear events_b mask to 0x0000000020004000
448 10:52:13.299505 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
449 10:52:13.312649 tlcl_write: response is 0
450 10:52:13.321647 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
451 10:52:13.328211 MRC: TPM MRC hash updated successfully.
452 10:52:13.328287 2 DIMMs found
453 10:52:13.331640 SMM Memory Map
454 10:52:13.334763 SMRAM : 0x9a000000 0x1000000
455 10:52:13.337904 Subregion 0: 0x9a000000 0xa00000
456 10:52:13.342021 Subregion 1: 0x9aa00000 0x200000
457 10:52:13.344809 Subregion 2: 0x9ac00000 0x400000
458 10:52:13.347790 top_of_ram = 0x9a000000
459 10:52:13.351972 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
460 10:52:13.358169 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
461 10:52:13.361288 MTRR Range: Start=ff000000 End=0 (Size 1000000)
462 10:52:13.368709 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
463 10:52:13.371069 CBFS @ c08000 size 3f8000
464 10:52:13.374343 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
465 10:52:13.377826 CBFS: Locating 'fallback/postcar'
466 10:52:13.384449 CBFS: Found @ offset 107000 size 4b44
467 10:52:13.387645 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
468 10:52:13.400788 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
469 10:52:13.403769 Processing 180 relocs. Offset value of 0x97c0c000
470 10:52:13.412423 Accumulated console time in romstage 286 ms
471 10:52:13.412524
472 10:52:13.412618
473 10:52:13.422702 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
474 10:52:13.429147 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
475 10:52:13.432355 CBFS @ c08000 size 3f8000
476 10:52:13.439279 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
477 10:52:13.441945 CBFS: Locating 'fallback/ramstage'
478 10:52:13.445591 CBFS: Found @ offset 43380 size 1b9e8
479 10:52:13.451937 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
480 10:52:13.484434 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
481 10:52:13.487468 Processing 3976 relocs. Offset value of 0x98db0000
482 10:52:13.494438 Accumulated console time in postcar 52 ms
483 10:52:13.494520
484 10:52:13.494600
485 10:52:13.504293 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
486 10:52:13.510856 FMAP: area RO_VPD found @ c00000 (16384 bytes)
487 10:52:13.514262 WARNING: RO_VPD is uninitialized or empty.
488 10:52:13.517309 FMAP: area RW_VPD found @ af8000 (8192 bytes)
489 10:52:13.524478 FMAP: area RW_VPD found @ af8000 (8192 bytes)
490 10:52:13.524583 Normal boot.
491 10:52:13.531113 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
492 10:52:13.534031 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
493 10:52:13.537695 CBFS @ c08000 size 3f8000
494 10:52:13.543828 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
495 10:52:13.547284 CBFS: Locating 'cpu_microcode_blob.bin'
496 10:52:13.550358 CBFS: Found @ offset 14700 size 2ec00
497 10:52:13.553758 microcode: sig=0x806ec pf=0x4 revision=0xc9
498 10:52:13.557566 Skip microcode update
499 10:52:13.563892 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
500 10:52:13.563978 CBFS @ c08000 size 3f8000
501 10:52:13.570026 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
502 10:52:13.574195 CBFS: Locating 'fsps.bin'
503 10:52:13.576880 CBFS: Found @ offset d1fc0 size 35000
504 10:52:13.602520 Detected 4 core, 8 thread CPU.
505 10:52:13.605824 Setting up SMI for CPU
506 10:52:13.609671 IED base = 0x9ac00000
507 10:52:13.609756 IED size = 0x00400000
508 10:52:13.612384 Will perform SMM setup.
509 10:52:13.619169 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
510 10:52:13.626105 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
511 10:52:13.629381 Processing 16 relocs. Offset value of 0x00030000
512 10:52:13.632741 Attempting to start 7 APs
513 10:52:13.636045 Waiting for 10ms after sending INIT.
514 10:52:13.652175 Waiting for 1st SIPI to complete...done.
515 10:52:13.652261 AP: slot 2 apic_id 1.
516 10:52:13.658494 Waiting for 2nd SIPI to complete...done.
517 10:52:13.658579 AP: slot 6 apic_id 7.
518 10:52:13.662350 AP: slot 7 apic_id 6.
519 10:52:13.665240 AP: slot 3 apic_id 3.
520 10:52:13.665324 AP: slot 1 apic_id 2.
521 10:52:13.669222 AP: slot 4 apic_id 4.
522 10:52:13.671824 AP: slot 5 apic_id 5.
523 10:52:13.678550 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
524 10:52:13.685195 Processing 13 relocs. Offset value of 0x00038000
525 10:52:13.691857 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
526 10:52:13.695752 Installing SMM handler to 0x9a000000
527 10:52:13.701885 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
528 10:52:13.708752 Processing 658 relocs. Offset value of 0x9a010000
529 10:52:13.714993 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
530 10:52:13.718178 Processing 13 relocs. Offset value of 0x9a008000
531 10:52:13.725276 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
532 10:52:13.731631 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
533 10:52:13.738345 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
534 10:52:13.741664 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
535 10:52:13.748081 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
536 10:52:13.754995 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
537 10:52:13.761246 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
538 10:52:13.765147 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
539 10:52:13.769187 Clearing SMI status registers
540 10:52:13.771863 SMI_STS: PM1
541 10:52:13.771949 PM1_STS: PWRBTN
542 10:52:13.775045 TCO_STS: SECOND_TO
543 10:52:13.778258 New SMBASE 0x9a000000
544 10:52:13.781677 In relocation handler: CPU 0
545 10:52:13.784991 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
546 10:52:13.788616 Writing SMRR. base = 0x9a000006, mask=0xff000800
547 10:52:13.791494 Relocation complete.
548 10:52:13.795314 New SMBASE 0x99fff800
549 10:52:13.798553 In relocation handler: CPU 2
550 10:52:13.801707 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
551 10:52:13.804980 Writing SMRR. base = 0x9a000006, mask=0xff000800
552 10:52:13.808176 Relocation complete.
553 10:52:13.811453 New SMBASE 0x99ffe400
554 10:52:13.811564 In relocation handler: CPU 7
555 10:52:13.818274 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
556 10:52:13.821214 Writing SMRR. base = 0x9a000006, mask=0xff000800
557 10:52:13.824522 Relocation complete.
558 10:52:13.827713 New SMBASE 0x99ffe800
559 10:52:13.827798 In relocation handler: CPU 6
560 10:52:13.834440 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
561 10:52:13.838143 Writing SMRR. base = 0x9a000006, mask=0xff000800
562 10:52:13.841345 Relocation complete.
563 10:52:13.844416 New SMBASE 0x99fff000
564 10:52:13.844533 In relocation handler: CPU 4
565 10:52:13.851090 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
566 10:52:13.854761 Writing SMRR. base = 0x9a000006, mask=0xff000800
567 10:52:13.858095 Relocation complete.
568 10:52:13.858178 New SMBASE 0x99ffec00
569 10:52:13.861157 In relocation handler: CPU 5
570 10:52:13.867442 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
571 10:52:13.871296 Writing SMRR. base = 0x9a000006, mask=0xff000800
572 10:52:13.874510 Relocation complete.
573 10:52:13.874609 New SMBASE 0x99fff400
574 10:52:13.877712 In relocation handler: CPU 3
575 10:52:13.884126 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
576 10:52:13.887409 Writing SMRR. base = 0x9a000006, mask=0xff000800
577 10:52:13.890815 Relocation complete.
578 10:52:13.890898 New SMBASE 0x99fffc00
579 10:52:13.894144 In relocation handler: CPU 1
580 10:52:13.900763 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
581 10:52:13.903895 Writing SMRR. base = 0x9a000006, mask=0xff000800
582 10:52:13.907252 Relocation complete.
583 10:52:13.907337 Initializing CPU #0
584 10:52:13.910574 CPU: vendor Intel device 806ec
585 10:52:13.913988 CPU: family 06, model 8e, stepping 0c
586 10:52:13.917549 Clearing out pending MCEs
587 10:52:13.920735 Setting up local APIC...
588 10:52:13.923737 apic_id: 0x00 done.
589 10:52:13.927016 Turbo is available but hidden
590 10:52:13.927101 Turbo is available and visible
591 10:52:13.930466 VMX status: enabled
592 10:52:13.933984 IA32_FEATURE_CONTROL status: locked
593 10:52:13.938158 Skip microcode update
594 10:52:13.940581 CPU #0 initialized
595 10:52:13.940666 Initializing CPU #2
596 10:52:13.943809 Initializing CPU #7
597 10:52:13.943893 Initializing CPU #6
598 10:52:13.947231 CPU: vendor Intel device 806ec
599 10:52:13.950885 CPU: family 06, model 8e, stepping 0c
600 10:52:13.953622 CPU: vendor Intel device 806ec
601 10:52:13.960239 CPU: family 06, model 8e, stepping 0c
602 10:52:13.960340 Clearing out pending MCEs
603 10:52:13.963485 Initializing CPU #4
604 10:52:13.967490 Initializing CPU #5
605 10:52:13.970070 CPU: vendor Intel device 806ec
606 10:52:13.973488 CPU: family 06, model 8e, stepping 0c
607 10:52:13.976856 CPU: vendor Intel device 806ec
608 10:52:13.980248 CPU: family 06, model 8e, stepping 0c
609 10:52:13.983468 Clearing out pending MCEs
610 10:52:13.983552 Setting up local APIC...
611 10:52:13.986936 Clearing out pending MCEs
612 10:52:13.990062 CPU: vendor Intel device 806ec
613 10:52:13.993369 CPU: family 06, model 8e, stepping 0c
614 10:52:13.996533 Setting up local APIC...
615 10:52:14.000169 Setting up local APIC...
616 10:52:14.003657 Clearing out pending MCEs
617 10:52:14.003741 apic_id: 0x04 done.
618 10:52:14.006860 Setting up local APIC...
619 10:52:14.009825 apic_id: 0x06 done.
620 10:52:14.009935 apic_id: 0x01 done.
621 10:52:14.013249 Initializing CPU #3
622 10:52:14.013333 Initializing CPU #1
623 10:52:14.016415 CPU: vendor Intel device 806ec
624 10:52:14.023190 CPU: family 06, model 8e, stepping 0c
625 10:52:14.026321 CPU: vendor Intel device 806ec
626 10:52:14.029918 CPU: family 06, model 8e, stepping 0c
627 10:52:14.030029 Clearing out pending MCEs
628 10:52:14.032926 Clearing out pending MCEs
629 10:52:14.036863 Setting up local APIC...
630 10:52:14.039836 VMX status: enabled
631 10:52:14.039920 Clearing out pending MCEs
632 10:52:14.046411 IA32_FEATURE_CONTROL status: locked
633 10:52:14.046522 Setting up local APIC...
634 10:52:14.049819 VMX status: enabled
635 10:52:14.052803 apic_id: 0x05 done.
636 10:52:14.056511 IA32_FEATURE_CONTROL status: locked
637 10:52:14.056596 VMX status: enabled
638 10:52:14.059511 Skip microcode update
639 10:52:14.062465 IA32_FEATURE_CONTROL status: locked
640 10:52:14.065906 CPU #4 initialized
641 10:52:14.066013 VMX status: enabled
642 10:52:14.069233 Skip microcode update
643 10:52:14.072618 apic_id: 0x07 done.
644 10:52:14.072722 CPU #7 initialized
645 10:52:14.075992 VMX status: enabled
646 10:52:14.076077 apic_id: 0x03 done.
647 10:52:14.079244 Setting up local APIC...
648 10:52:14.082572 Skip microcode update
649 10:52:14.085866 apic_id: 0x02 done.
650 10:52:14.085950 VMX status: enabled
651 10:52:14.089105 VMX status: enabled
652 10:52:14.092767 IA32_FEATURE_CONTROL status: locked
653 10:52:14.095963 IA32_FEATURE_CONTROL status: locked
654 10:52:14.099385 Skip microcode update
655 10:52:14.099470 Skip microcode update
656 10:52:14.102752 CPU #3 initialized
657 10:52:14.102836 CPU #1 initialized
658 10:52:14.109094 IA32_FEATURE_CONTROL status: locked
659 10:52:14.109179 CPU #5 initialized
660 10:52:14.112665 Skip microcode update
661 10:52:14.115881 IA32_FEATURE_CONTROL status: locked
662 10:52:14.115965 CPU #2 initialized
663 10:52:14.118967 Skip microcode update
664 10:52:14.122191 CPU #6 initialized
665 10:52:14.125786 bsp_do_flight_plan done after 466 msecs.
666 10:52:14.128830 CPU: frequency set to 4200 MHz
667 10:52:14.128914 Enabling SMIs.
668 10:52:14.132120 Locking SMM.
669 10:52:14.146961 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
670 10:52:14.149928 CBFS @ c08000 size 3f8000
671 10:52:14.156784 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
672 10:52:14.156869 CBFS: Locating 'vbt.bin'
673 10:52:14.160153 CBFS: Found @ offset 5f5c0 size 499
674 10:52:14.166928 Found a VBT of 4608 bytes after decompression
675 10:52:14.351862 Display FSP Version Info HOB
676 10:52:14.354826 Reference Code - CPU = 9.0.1e.30
677 10:52:14.358293 uCode Version = 0.0.0.ca
678 10:52:14.361907 TXT ACM version = ff.ff.ff.ffff
679 10:52:14.365398 Display FSP Version Info HOB
680 10:52:14.368433 Reference Code - ME = 9.0.1e.30
681 10:52:14.371429 MEBx version = 0.0.0.0
682 10:52:14.374894 ME Firmware Version = Consumer SKU
683 10:52:14.378179 Display FSP Version Info HOB
684 10:52:14.381624 Reference Code - CML PCH = 9.0.1e.30
685 10:52:14.385245 PCH-CRID Status = Disabled
686 10:52:14.388296 PCH-CRID Original Value = ff.ff.ff.ffff
687 10:52:14.391279 PCH-CRID New Value = ff.ff.ff.ffff
688 10:52:14.394568 OPROM - RST - RAID = ff.ff.ff.ffff
689 10:52:14.398110 ChipsetInit Base Version = ff.ff.ff.ffff
690 10:52:14.401411 ChipsetInit Oem Version = ff.ff.ff.ffff
691 10:52:14.405106 Display FSP Version Info HOB
692 10:52:14.411462 Reference Code - SA - System Agent = 9.0.1e.30
693 10:52:14.414755 Reference Code - MRC = 0.7.1.6c
694 10:52:14.414879 SA - PCIe Version = 9.0.1e.30
695 10:52:14.418126 SA-CRID Status = Disabled
696 10:52:14.421812 SA-CRID Original Value = 0.0.0.c
697 10:52:14.424549 SA-CRID New Value = 0.0.0.c
698 10:52:14.427914 OPROM - VBIOS = ff.ff.ff.ffff
699 10:52:14.431101 RTC Init
700 10:52:14.434652 Set power on after power failure.
701 10:52:14.434736 Disabling Deep S3
702 10:52:14.437702 Disabling Deep S3
703 10:52:14.437792 Disabling Deep S4
704 10:52:14.441148 Disabling Deep S4
705 10:52:14.441244 Disabling Deep S5
706 10:52:14.444597 Disabling Deep S5
707 10:52:14.451603 BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 195 exit 1
708 10:52:14.451717 Enumerating buses...
709 10:52:14.457637 Show all devs... Before device enumeration.
710 10:52:14.457784 Root Device: enabled 1
711 10:52:14.461030 CPU_CLUSTER: 0: enabled 1
712 10:52:14.464419 DOMAIN: 0000: enabled 1
713 10:52:14.467761 APIC: 00: enabled 1
714 10:52:14.467917 PCI: 00:00.0: enabled 1
715 10:52:14.471533 PCI: 00:02.0: enabled 1
716 10:52:14.474652 PCI: 00:04.0: enabled 0
717 10:52:14.474829 PCI: 00:05.0: enabled 0
718 10:52:14.477996 PCI: 00:12.0: enabled 1
719 10:52:14.481079 PCI: 00:12.5: enabled 0
720 10:52:14.484775 PCI: 00:12.6: enabled 0
721 10:52:14.485160 PCI: 00:14.0: enabled 1
722 10:52:14.487835 PCI: 00:14.1: enabled 0
723 10:52:14.491529 PCI: 00:14.3: enabled 1
724 10:52:14.494744 PCI: 00:14.5: enabled 0
725 10:52:14.495327 PCI: 00:15.0: enabled 1
726 10:52:14.497884 PCI: 00:15.1: enabled 1
727 10:52:14.501148 PCI: 00:15.2: enabled 0
728 10:52:14.504873 PCI: 00:15.3: enabled 0
729 10:52:14.505329 PCI: 00:16.0: enabled 1
730 10:52:14.507896 PCI: 00:16.1: enabled 0
731 10:52:14.511345 PCI: 00:16.2: enabled 0
732 10:52:14.511844 PCI: 00:16.3: enabled 0
733 10:52:14.514666 PCI: 00:16.4: enabled 0
734 10:52:14.517880 PCI: 00:16.5: enabled 0
735 10:52:14.521364 PCI: 00:17.0: enabled 1
736 10:52:14.521979 PCI: 00:19.0: enabled 1
737 10:52:14.524239 PCI: 00:19.1: enabled 0
738 10:52:14.527813 PCI: 00:19.2: enabled 0
739 10:52:14.530714 PCI: 00:1a.0: enabled 0
740 10:52:14.530799 PCI: 00:1c.0: enabled 0
741 10:52:14.534476 PCI: 00:1c.1: enabled 0
742 10:52:14.537476 PCI: 00:1c.2: enabled 0
743 10:52:14.540717 PCI: 00:1c.3: enabled 0
744 10:52:14.540822 PCI: 00:1c.4: enabled 0
745 10:52:14.544286 PCI: 00:1c.5: enabled 0
746 10:52:14.547585 PCI: 00:1c.6: enabled 0
747 10:52:14.547684 PCI: 00:1c.7: enabled 0
748 10:52:14.550664 PCI: 00:1d.0: enabled 1
749 10:52:14.553899 PCI: 00:1d.1: enabled 0
750 10:52:14.557492 PCI: 00:1d.2: enabled 0
751 10:52:14.557600 PCI: 00:1d.3: enabled 0
752 10:52:14.560528 PCI: 00:1d.4: enabled 0
753 10:52:14.563956 PCI: 00:1d.5: enabled 1
754 10:52:14.567496 PCI: 00:1e.0: enabled 1
755 10:52:14.567652 PCI: 00:1e.1: enabled 0
756 10:52:14.570764 PCI: 00:1e.2: enabled 1
757 10:52:14.573997 PCI: 00:1e.3: enabled 1
758 10:52:14.577116 PCI: 00:1f.0: enabled 1
759 10:52:14.577202 PCI: 00:1f.1: enabled 1
760 10:52:14.580265 PCI: 00:1f.2: enabled 1
761 10:52:14.583773 PCI: 00:1f.3: enabled 1
762 10:52:14.587044 PCI: 00:1f.4: enabled 1
763 10:52:14.587130 PCI: 00:1f.5: enabled 1
764 10:52:14.590703 PCI: 00:1f.6: enabled 0
765 10:52:14.593684 USB0 port 0: enabled 1
766 10:52:14.593794 I2C: 00:15: enabled 1
767 10:52:14.597354 I2C: 00:5d: enabled 1
768 10:52:14.600789 GENERIC: 0.0: enabled 1
769 10:52:14.600899 I2C: 00:1a: enabled 1
770 10:52:14.604007 I2C: 00:38: enabled 1
771 10:52:14.606911 I2C: 00:39: enabled 1
772 10:52:14.607019 I2C: 00:3a: enabled 1
773 10:52:14.610583 I2C: 00:3b: enabled 1
774 10:52:14.614041 PCI: 00:00.0: enabled 1
775 10:52:14.614122 SPI: 00: enabled 1
776 10:52:14.616988 SPI: 01: enabled 1
777 10:52:14.620102 PNP: 0c09.0: enabled 1
778 10:52:14.620186 USB2 port 0: enabled 1
779 10:52:14.623801 USB2 port 1: enabled 1
780 10:52:14.626994 USB2 port 2: enabled 0
781 10:52:14.630620 USB2 port 3: enabled 0
782 10:52:14.630704 USB2 port 5: enabled 0
783 10:52:14.633640 USB2 port 6: enabled 1
784 10:52:14.636748 USB2 port 9: enabled 1
785 10:52:14.636832 USB3 port 0: enabled 1
786 10:52:14.640034 USB3 port 1: enabled 1
787 10:52:14.643702 USB3 port 2: enabled 1
788 10:52:14.646879 USB3 port 3: enabled 1
789 10:52:14.646963 USB3 port 4: enabled 0
790 10:52:14.650015 APIC: 02: enabled 1
791 10:52:14.650099 APIC: 01: enabled 1
792 10:52:14.653281 APIC: 03: enabled 1
793 10:52:14.656710 APIC: 04: enabled 1
794 10:52:14.656793 APIC: 05: enabled 1
795 10:52:14.660063 APIC: 07: enabled 1
796 10:52:14.663283 APIC: 06: enabled 1
797 10:52:14.663392 Compare with tree...
798 10:52:14.666529 Root Device: enabled 1
799 10:52:14.670478 CPU_CLUSTER: 0: enabled 1
800 10:52:14.670557 APIC: 00: enabled 1
801 10:52:14.673062 APIC: 02: enabled 1
802 10:52:14.677016 APIC: 01: enabled 1
803 10:52:14.677098 APIC: 03: enabled 1
804 10:52:14.679896 APIC: 04: enabled 1
805 10:52:14.683069 APIC: 05: enabled 1
806 10:52:14.683144 APIC: 07: enabled 1
807 10:52:14.686934 APIC: 06: enabled 1
808 10:52:14.690146 DOMAIN: 0000: enabled 1
809 10:52:14.693199 PCI: 00:00.0: enabled 1
810 10:52:14.693273 PCI: 00:02.0: enabled 1
811 10:52:14.696267 PCI: 00:04.0: enabled 0
812 10:52:14.699675 PCI: 00:05.0: enabled 0
813 10:52:14.703020 PCI: 00:12.0: enabled 1
814 10:52:14.706214 PCI: 00:12.5: enabled 0
815 10:52:14.706288 PCI: 00:12.6: enabled 0
816 10:52:14.709596 PCI: 00:14.0: enabled 1
817 10:52:14.713173 USB0 port 0: enabled 1
818 10:52:14.716280 USB2 port 0: enabled 1
819 10:52:14.719695 USB2 port 1: enabled 1
820 10:52:14.722857 USB2 port 2: enabled 0
821 10:52:14.722940 USB2 port 3: enabled 0
822 10:52:14.726337 USB2 port 5: enabled 0
823 10:52:14.729453 USB2 port 6: enabled 1
824 10:52:14.732634 USB2 port 9: enabled 1
825 10:52:14.736152 USB3 port 0: enabled 1
826 10:52:14.736235 USB3 port 1: enabled 1
827 10:52:14.739512 USB3 port 2: enabled 1
828 10:52:14.742525 USB3 port 3: enabled 1
829 10:52:14.746295 USB3 port 4: enabled 0
830 10:52:14.749119 PCI: 00:14.1: enabled 0
831 10:52:14.752555 PCI: 00:14.3: enabled 1
832 10:52:14.752638 PCI: 00:14.5: enabled 0
833 10:52:14.756262 PCI: 00:15.0: enabled 1
834 10:52:14.759107 I2C: 00:15: enabled 1
835 10:52:14.762731 PCI: 00:15.1: enabled 1
836 10:52:14.762814 I2C: 00:5d: enabled 1
837 10:52:14.765794 GENERIC: 0.0: enabled 1
838 10:52:14.768984 PCI: 00:15.2: enabled 0
839 10:52:14.772359 PCI: 00:15.3: enabled 0
840 10:52:14.775598 PCI: 00:16.0: enabled 1
841 10:52:14.775723 PCI: 00:16.1: enabled 0
842 10:52:14.779230 PCI: 00:16.2: enabled 0
843 10:52:14.782250 PCI: 00:16.3: enabled 0
844 10:52:14.786025 PCI: 00:16.4: enabled 0
845 10:52:14.788955 PCI: 00:16.5: enabled 0
846 10:52:14.789072 PCI: 00:17.0: enabled 1
847 10:52:14.792716 PCI: 00:19.0: enabled 1
848 10:52:14.795655 I2C: 00:1a: enabled 1
849 10:52:14.798884 I2C: 00:38: enabled 1
850 10:52:14.798995 I2C: 00:39: enabled 1
851 10:52:14.802118 I2C: 00:3a: enabled 1
852 10:52:14.805294 I2C: 00:3b: enabled 1
853 10:52:14.809113 PCI: 00:19.1: enabled 0
854 10:52:14.812107 PCI: 00:19.2: enabled 0
855 10:52:14.812211 PCI: 00:1a.0: enabled 0
856 10:52:14.815817 PCI: 00:1c.0: enabled 0
857 10:52:14.818871 PCI: 00:1c.1: enabled 0
858 10:52:14.822315 PCI: 00:1c.2: enabled 0
859 10:52:14.825434 PCI: 00:1c.3: enabled 0
860 10:52:14.825569 PCI: 00:1c.4: enabled 0
861 10:52:14.828776 PCI: 00:1c.5: enabled 0
862 10:52:14.832040 PCI: 00:1c.6: enabled 0
863 10:52:14.835569 PCI: 00:1c.7: enabled 0
864 10:52:14.835664 PCI: 00:1d.0: enabled 1
865 10:52:14.838778 PCI: 00:1d.1: enabled 0
866 10:52:14.842197 PCI: 00:1d.2: enabled 0
867 10:52:14.845136 PCI: 00:1d.3: enabled 0
868 10:52:14.848826 PCI: 00:1d.4: enabled 0
869 10:52:14.848935 PCI: 00:1d.5: enabled 1
870 10:52:14.852050 PCI: 00:00.0: enabled 1
871 10:52:14.855175 PCI: 00:1e.0: enabled 1
872 10:52:14.858840 PCI: 00:1e.1: enabled 0
873 10:52:14.861880 PCI: 00:1e.2: enabled 1
874 10:52:14.861989 SPI: 00: enabled 1
875 10:52:14.865384 PCI: 00:1e.3: enabled 1
876 10:52:14.868282 SPI: 01: enabled 1
877 10:52:14.871797 PCI: 00:1f.0: enabled 1
878 10:52:14.871912 PNP: 0c09.0: enabled 1
879 10:52:14.875035 PCI: 00:1f.1: enabled 1
880 10:52:14.878281 PCI: 00:1f.2: enabled 1
881 10:52:14.881878 PCI: 00:1f.3: enabled 1
882 10:52:14.885130 PCI: 00:1f.4: enabled 1
883 10:52:14.885205 PCI: 00:1f.5: enabled 1
884 10:52:14.888427 PCI: 00:1f.6: enabled 0
885 10:52:14.892267 Root Device scanning...
886 10:52:14.895506 scan_static_bus for Root Device
887 10:52:14.898152 CPU_CLUSTER: 0 enabled
888 10:52:14.898238 DOMAIN: 0000 enabled
889 10:52:14.901831 DOMAIN: 0000 scanning...
890 10:52:14.904989 PCI: pci_scan_bus for bus 00
891 10:52:14.908097 PCI: 00:00.0 [8086/0000] ops
892 10:52:14.911598 PCI: 00:00.0 [8086/9b61] enabled
893 10:52:14.915028 PCI: 00:02.0 [8086/0000] bus ops
894 10:52:14.918779 PCI: 00:02.0 [8086/9b41] enabled
895 10:52:14.922247 PCI: 00:04.0 [8086/1903] disabled
896 10:52:14.925055 PCI: 00:08.0 [8086/1911] enabled
897 10:52:14.928550 PCI: 00:12.0 [8086/02f9] enabled
898 10:52:14.931754 PCI: 00:14.0 [8086/0000] bus ops
899 10:52:14.934719 PCI: 00:14.0 [8086/02ed] enabled
900 10:52:14.938127 PCI: 00:14.2 [8086/02ef] enabled
901 10:52:14.941512 PCI: 00:14.3 [8086/02f0] enabled
902 10:52:14.945320 PCI: 00:15.0 [8086/0000] bus ops
903 10:52:14.948754 PCI: 00:15.0 [8086/02e8] enabled
904 10:52:14.951437 PCI: 00:15.1 [8086/0000] bus ops
905 10:52:14.955142 PCI: 00:15.1 [8086/02e9] enabled
906 10:52:14.958210 PCI: 00:16.0 [8086/0000] ops
907 10:52:14.961510 PCI: 00:16.0 [8086/02e0] enabled
908 10:52:14.964568 PCI: 00:17.0 [8086/0000] ops
909 10:52:14.968159 PCI: 00:17.0 [8086/02d3] enabled
910 10:52:14.971131 PCI: 00:19.0 [8086/0000] bus ops
911 10:52:14.974482 PCI: 00:19.0 [8086/02c5] enabled
912 10:52:14.977855 PCI: 00:1d.0 [8086/0000] bus ops
913 10:52:14.981009 PCI: 00:1d.0 [8086/02b0] enabled
914 10:52:14.988397 PCI: Static device PCI: 00:1d.5 not found, disabling it.
915 10:52:14.988483 PCI: 00:1e.0 [8086/0000] ops
916 10:52:14.991445 PCI: 00:1e.0 [8086/02a8] enabled
917 10:52:14.994530 PCI: 00:1e.2 [8086/0000] bus ops
918 10:52:14.997694 PCI: 00:1e.2 [8086/02aa] enabled
919 10:52:15.001468 PCI: 00:1e.3 [8086/0000] bus ops
920 10:52:15.004493 PCI: 00:1e.3 [8086/02ab] enabled
921 10:52:15.008110 PCI: 00:1f.0 [8086/0000] bus ops
922 10:52:15.011099 PCI: 00:1f.0 [8086/0284] enabled
923 10:52:15.017477 PCI: Static device PCI: 00:1f.1 not found, disabling it.
924 10:52:15.024356 PCI: Static device PCI: 00:1f.2 not found, disabling it.
925 10:52:15.027713 PCI: 00:1f.3 [8086/0000] bus ops
926 10:52:15.031094 PCI: 00:1f.3 [8086/02c8] enabled
927 10:52:15.034234 PCI: 00:1f.4 [8086/0000] bus ops
928 10:52:15.037433 PCI: 00:1f.4 [8086/02a3] enabled
929 10:52:15.040783 PCI: 00:1f.5 [8086/0000] bus ops
930 10:52:15.044602 PCI: 00:1f.5 [8086/02a4] enabled
931 10:52:15.047517 PCI: Leftover static devices:
932 10:52:15.047641 PCI: 00:05.0
933 10:52:15.050685 PCI: 00:12.5
934 10:52:15.050776 PCI: 00:12.6
935 10:52:15.050844 PCI: 00:14.1
936 10:52:15.053963 PCI: 00:14.5
937 10:52:15.054050 PCI: 00:15.2
938 10:52:15.057994 PCI: 00:15.3
939 10:52:15.058127 PCI: 00:16.1
940 10:52:15.058201 PCI: 00:16.2
941 10:52:15.061431 PCI: 00:16.3
942 10:52:15.061535 PCI: 00:16.4
943 10:52:15.064349 PCI: 00:16.5
944 10:52:15.064436 PCI: 00:19.1
945 10:52:15.064503 PCI: 00:19.2
946 10:52:15.067239 PCI: 00:1a.0
947 10:52:15.067324 PCI: 00:1c.0
948 10:52:15.070692 PCI: 00:1c.1
949 10:52:15.070778 PCI: 00:1c.2
950 10:52:15.074224 PCI: 00:1c.3
951 10:52:15.074315 PCI: 00:1c.4
952 10:52:15.074383 PCI: 00:1c.5
953 10:52:15.077551 PCI: 00:1c.6
954 10:52:15.077677 PCI: 00:1c.7
955 10:52:15.080746 PCI: 00:1d.1
956 10:52:15.080859 PCI: 00:1d.2
957 10:52:15.080930 PCI: 00:1d.3
958 10:52:15.083974 PCI: 00:1d.4
959 10:52:15.084077 PCI: 00:1d.5
960 10:52:15.087277 PCI: 00:1e.1
961 10:52:15.087426 PCI: 00:1f.1
962 10:52:15.087529 PCI: 00:1f.2
963 10:52:15.090761 PCI: 00:1f.6
964 10:52:15.093890 PCI: Check your devicetree.cb.
965 10:52:15.097361 PCI: 00:02.0 scanning...
966 10:52:15.100964 scan_generic_bus for PCI: 00:02.0
967 10:52:15.103778 scan_generic_bus for PCI: 00:02.0 done
968 10:52:15.110433 scan_bus: scanning of bus PCI: 00:02.0 took 10177 usecs
969 10:52:15.110539 PCI: 00:14.0 scanning...
970 10:52:15.113763 scan_static_bus for PCI: 00:14.0
971 10:52:15.117225 USB0 port 0 enabled
972 10:52:15.120542 USB0 port 0 scanning...
973 10:52:15.123776 scan_static_bus for USB0 port 0
974 10:52:15.123900 USB2 port 0 enabled
975 10:52:15.127292 USB2 port 1 enabled
976 10:52:15.130568 USB2 port 2 disabled
977 10:52:15.130661 USB2 port 3 disabled
978 10:52:15.134045 USB2 port 5 disabled
979 10:52:15.137170 USB2 port 6 enabled
980 10:52:15.137313 USB2 port 9 enabled
981 10:52:15.140516 USB3 port 0 enabled
982 10:52:15.140675 USB3 port 1 enabled
983 10:52:15.143710 USB3 port 2 enabled
984 10:52:15.147098 USB3 port 3 enabled
985 10:52:15.147184 USB3 port 4 disabled
986 10:52:15.150262 USB2 port 0 scanning...
987 10:52:15.153548 scan_static_bus for USB2 port 0
988 10:52:15.156897 scan_static_bus for USB2 port 0 done
989 10:52:15.163551 scan_bus: scanning of bus USB2 port 0 took 9695 usecs
990 10:52:15.167016 USB2 port 1 scanning...
991 10:52:15.170031 scan_static_bus for USB2 port 1
992 10:52:15.173607 scan_static_bus for USB2 port 1 done
993 10:52:15.176695 scan_bus: scanning of bus USB2 port 1 took 9703 usecs
994 10:52:15.180425 USB2 port 6 scanning...
995 10:52:15.183403 scan_static_bus for USB2 port 6
996 10:52:15.187424 scan_static_bus for USB2 port 6 done
997 10:52:15.193306 scan_bus: scanning of bus USB2 port 6 took 9695 usecs
998 10:52:15.196509 USB2 port 9 scanning...
999 10:52:15.200232 scan_static_bus for USB2 port 9
1000 10:52:15.203134 scan_static_bus for USB2 port 9 done
1001 10:52:15.206580 scan_bus: scanning of bus USB2 port 9 took 9696 usecs
1002 10:52:15.210358 USB3 port 0 scanning...
1003 10:52:15.213744 scan_static_bus for USB3 port 0
1004 10:52:15.216574 scan_static_bus for USB3 port 0 done
1005 10:52:15.223146 scan_bus: scanning of bus USB3 port 0 took 9696 usecs
1006 10:52:15.226516 USB3 port 1 scanning...
1007 10:52:15.230021 scan_static_bus for USB3 port 1
1008 10:52:15.233019 scan_static_bus for USB3 port 1 done
1009 10:52:15.236389 scan_bus: scanning of bus USB3 port 1 took 9688 usecs
1010 10:52:15.240247 USB3 port 2 scanning...
1011 10:52:15.242901 scan_static_bus for USB3 port 2
1012 10:52:15.246190 scan_static_bus for USB3 port 2 done
1013 10:52:15.253154 scan_bus: scanning of bus USB3 port 2 took 9695 usecs
1014 10:52:15.256295 USB3 port 3 scanning...
1015 10:52:15.259822 scan_static_bus for USB3 port 3
1016 10:52:15.262863 scan_static_bus for USB3 port 3 done
1017 10:52:15.269483 scan_bus: scanning of bus USB3 port 3 took 9703 usecs
1018 10:52:15.272617 scan_static_bus for USB0 port 0 done
1019 10:52:15.276478 scan_bus: scanning of bus USB0 port 0 took 155285 usecs
1020 10:52:15.279206 scan_static_bus for PCI: 00:14.0 done
1021 10:52:15.285967 scan_bus: scanning of bus PCI: 00:14.0 took 172884 usecs
1022 10:52:15.289405 PCI: 00:15.0 scanning...
1023 10:52:15.292797 scan_generic_bus for PCI: 00:15.0
1024 10:52:15.296269 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1025 10:52:15.299670 scan_generic_bus for PCI: 00:15.0 done
1026 10:52:15.305772 scan_bus: scanning of bus PCI: 00:15.0 took 14297 usecs
1027 10:52:15.309277 PCI: 00:15.1 scanning...
1028 10:52:15.312570 scan_generic_bus for PCI: 00:15.1
1029 10:52:15.315842 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1030 10:52:15.322514 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1031 10:52:15.326015 scan_generic_bus for PCI: 00:15.1 done
1032 10:52:15.329244 scan_bus: scanning of bus PCI: 00:15.1 took 18612 usecs
1033 10:52:15.333118 PCI: 00:19.0 scanning...
1034 10:52:15.336024 scan_generic_bus for PCI: 00:19.0
1035 10:52:15.339003 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1036 10:52:15.345867 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1037 10:52:15.348930 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1038 10:52:15.352255 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1039 10:52:15.355786 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1040 10:52:15.362241 scan_generic_bus for PCI: 00:19.0 done
1041 10:52:15.365620 scan_bus: scanning of bus PCI: 00:19.0 took 30729 usecs
1042 10:52:15.369236 PCI: 00:1d.0 scanning...
1043 10:52:15.372293 do_pci_scan_bridge for PCI: 00:1d.0
1044 10:52:15.375673 PCI: pci_scan_bus for bus 01
1045 10:52:15.378904 PCI: 01:00.0 [1c5c/1327] enabled
1046 10:52:15.382647 Enabling Common Clock Configuration
1047 10:52:15.388883 L1 Sub-State supported from root port 29
1048 10:52:15.388967 L1 Sub-State Support = 0xf
1049 10:52:15.392774 CommonModeRestoreTime = 0x28
1050 10:52:15.398936 Power On Value = 0x16, Power On Scale = 0x0
1051 10:52:15.399044 ASPM: Enabled L1
1052 10:52:15.406202 scan_bus: scanning of bus PCI: 00:1d.0 took 32784 usecs
1053 10:52:15.406286 PCI: 00:1e.2 scanning...
1054 10:52:15.412305 scan_generic_bus for PCI: 00:1e.2
1055 10:52:15.415508 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1056 10:52:15.418888 scan_generic_bus for PCI: 00:1e.2 done
1057 10:52:15.426079 scan_bus: scanning of bus PCI: 00:1e.2 took 14010 usecs
1058 10:52:15.426162 PCI: 00:1e.3 scanning...
1059 10:52:15.428709 scan_generic_bus for PCI: 00:1e.3
1060 10:52:15.435420 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1061 10:52:15.438563 scan_generic_bus for PCI: 00:1e.3 done
1062 10:52:15.442163 scan_bus: scanning of bus PCI: 00:1e.3 took 13997 usecs
1063 10:52:15.445293 PCI: 00:1f.0 scanning...
1064 10:52:15.448906 scan_static_bus for PCI: 00:1f.0
1065 10:52:15.451842 PNP: 0c09.0 enabled
1066 10:52:15.455233 scan_static_bus for PCI: 00:1f.0 done
1067 10:52:15.461780 scan_bus: scanning of bus PCI: 00:1f.0 took 12055 usecs
1068 10:52:15.465392 PCI: 00:1f.3 scanning...
1069 10:52:15.468418 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1070 10:52:15.471843 PCI: 00:1f.4 scanning...
1071 10:52:15.475247 scan_generic_bus for PCI: 00:1f.4
1072 10:52:15.478281 scan_generic_bus for PCI: 00:1f.4 done
1073 10:52:15.485114 scan_bus: scanning of bus PCI: 00:1f.4 took 10194 usecs
1074 10:52:15.488433 PCI: 00:1f.5 scanning...
1075 10:52:15.491603 scan_generic_bus for PCI: 00:1f.5
1076 10:52:15.494883 scan_generic_bus for PCI: 00:1f.5 done
1077 10:52:15.501945 scan_bus: scanning of bus PCI: 00:1f.5 took 10186 usecs
1078 10:52:15.505067 scan_bus: scanning of bus DOMAIN: 0000 took 604823 usecs
1079 10:52:15.511464 scan_static_bus for Root Device done
1080 10:52:15.515466 scan_bus: scanning of bus Root Device took 624690 usecs
1081 10:52:15.518080 done
1082 10:52:15.518157 Chrome EC: UHEPI supported
1083 10:52:15.524655 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1084 10:52:15.531705 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1085 10:52:15.538063 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1086 10:52:15.544641 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1087 10:52:15.548110 SPI flash protection: WPSW=0 SRP0=0
1088 10:52:15.554326 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1089 10:52:15.557803 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1090 10:52:15.561052 found VGA at PCI: 00:02.0
1091 10:52:15.564427 Setting up VGA for PCI: 00:02.0
1092 10:52:15.571000 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1093 10:52:15.574128 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1094 10:52:15.577681 Allocating resources...
1095 10:52:15.580808 Reading resources...
1096 10:52:15.584144 Root Device read_resources bus 0 link: 0
1097 10:52:15.587287 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1098 10:52:15.594164 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1099 10:52:15.597745 DOMAIN: 0000 read_resources bus 0 link: 0
1100 10:52:15.604391 PCI: 00:14.0 read_resources bus 0 link: 0
1101 10:52:15.607679 USB0 port 0 read_resources bus 0 link: 0
1102 10:52:15.616253 USB0 port 0 read_resources bus 0 link: 0 done
1103 10:52:15.619531 PCI: 00:14.0 read_resources bus 0 link: 0 done
1104 10:52:15.626549 PCI: 00:15.0 read_resources bus 1 link: 0
1105 10:52:15.629927 PCI: 00:15.0 read_resources bus 1 link: 0 done
1106 10:52:15.636640 PCI: 00:15.1 read_resources bus 2 link: 0
1107 10:52:15.639923 PCI: 00:15.1 read_resources bus 2 link: 0 done
1108 10:52:15.646989 PCI: 00:19.0 read_resources bus 3 link: 0
1109 10:52:15.653582 PCI: 00:19.0 read_resources bus 3 link: 0 done
1110 10:52:15.656740 PCI: 00:1d.0 read_resources bus 1 link: 0
1111 10:52:15.663848 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1112 10:52:15.667270 PCI: 00:1e.2 read_resources bus 4 link: 0
1113 10:52:15.673999 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1114 10:52:15.677122 PCI: 00:1e.3 read_resources bus 5 link: 0
1115 10:52:15.683353 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1116 10:52:15.687168 PCI: 00:1f.0 read_resources bus 0 link: 0
1117 10:52:15.693375 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1118 10:52:15.700162 DOMAIN: 0000 read_resources bus 0 link: 0 done
1119 10:52:15.703231 Root Device read_resources bus 0 link: 0 done
1120 10:52:15.706677 Done reading resources.
1121 10:52:15.713494 Show resources in subtree (Root Device)...After reading.
1122 10:52:15.716511 Root Device child on link 0 CPU_CLUSTER: 0
1123 10:52:15.720066 CPU_CLUSTER: 0 child on link 0 APIC: 00
1124 10:52:15.720147 APIC: 00
1125 10:52:15.723370 APIC: 02
1126 10:52:15.723450 APIC: 01
1127 10:52:15.726895 APIC: 03
1128 10:52:15.726962 APIC: 04
1129 10:52:15.727021 APIC: 05
1130 10:52:15.729979 APIC: 07
1131 10:52:15.730051 APIC: 06
1132 10:52:15.733079 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1133 10:52:15.743075 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1134 10:52:15.793495 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1135 10:52:15.793663 PCI: 00:00.0
1136 10:52:15.793974 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1137 10:52:15.794345 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1138 10:52:15.794857 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1139 10:52:15.795479 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1140 10:52:15.843492 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1141 10:52:15.843776 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1142 10:52:15.844580 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1143 10:52:15.845097 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1144 10:52:15.845427 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1145 10:52:15.848731 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1146 10:52:15.858595 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1147 10:52:15.868690 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1148 10:52:15.878237 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1149 10:52:15.888109 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1150 10:52:15.894846 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1151 10:52:15.904760 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1152 10:52:15.908126 PCI: 00:02.0
1153 10:52:15.917909 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 10:52:15.927988 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1155 10:52:15.934588 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1156 10:52:15.937653 PCI: 00:04.0
1157 10:52:15.937755 PCI: 00:08.0
1158 10:52:15.947648 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1159 10:52:15.951221 PCI: 00:12.0
1160 10:52:15.961163 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1161 10:52:15.964484 PCI: 00:14.0 child on link 0 USB0 port 0
1162 10:52:15.974009 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1163 10:52:15.981158 USB0 port 0 child on link 0 USB2 port 0
1164 10:52:15.981239 USB2 port 0
1165 10:52:15.984087 USB2 port 1
1166 10:52:15.984163 USB2 port 2
1167 10:52:15.987559 USB2 port 3
1168 10:52:15.987679 USB2 port 5
1169 10:52:15.990970 USB2 port 6
1170 10:52:15.991052 USB2 port 9
1171 10:52:15.994167 USB3 port 0
1172 10:52:15.994242 USB3 port 1
1173 10:52:15.997503 USB3 port 2
1174 10:52:15.997602 USB3 port 3
1175 10:52:16.000574 USB3 port 4
1176 10:52:16.004270 PCI: 00:14.2
1177 10:52:16.014303 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1178 10:52:16.020857 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1179 10:52:16.023918 PCI: 00:14.3
1180 10:52:16.034256 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1181 10:52:16.037320 PCI: 00:15.0 child on link 0 I2C: 01:15
1182 10:52:16.047420 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 10:52:16.050550 I2C: 01:15
1184 10:52:16.053593 PCI: 00:15.1 child on link 0 I2C: 02:5d
1185 10:52:16.063593 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1186 10:52:16.063702 I2C: 02:5d
1187 10:52:16.066847 GENERIC: 0.0
1188 10:52:16.070318 PCI: 00:16.0
1189 10:52:16.080524 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 10:52:16.080632 PCI: 00:17.0
1191 10:52:16.090618 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1192 10:52:16.096881 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1193 10:52:16.106765 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1194 10:52:16.113717 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1195 10:52:16.123242 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1196 10:52:16.133596 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1197 10:52:16.136505 PCI: 00:19.0 child on link 0 I2C: 03:1a
1198 10:52:16.146618 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 10:52:16.146722 I2C: 03:1a
1200 10:52:16.149801 I2C: 03:38
1201 10:52:16.149875 I2C: 03:39
1202 10:52:16.153644 I2C: 03:3a
1203 10:52:16.153712 I2C: 03:3b
1204 10:52:16.160215 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1205 10:52:16.166416 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1206 10:52:16.175987 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1207 10:52:16.186244 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1208 10:52:16.189444 PCI: 01:00.0
1209 10:52:16.199652 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1210 10:52:16.199731 PCI: 00:1e.0
1211 10:52:16.209454 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1212 10:52:16.219446 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1213 10:52:16.225955 PCI: 00:1e.2 child on link 0 SPI: 00
1214 10:52:16.236707 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1215 10:52:16.236792 SPI: 00
1216 10:52:16.239082 PCI: 00:1e.3 child on link 0 SPI: 01
1217 10:52:16.248929 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1218 10:52:16.252476 SPI: 01
1219 10:52:16.256038 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1220 10:52:16.265657 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1221 10:52:16.272298 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1222 10:52:16.275548 PNP: 0c09.0
1223 10:52:16.281945 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1224 10:52:16.285458 PCI: 00:1f.3
1225 10:52:16.295423 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1226 10:52:16.305331 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1227 10:52:16.305414 PCI: 00:1f.4
1228 10:52:16.315203 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1229 10:52:16.325319 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1230 10:52:16.328718 PCI: 00:1f.5
1231 10:52:16.334964 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1232 10:52:16.342191 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1233 10:52:16.349322 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1234 10:52:16.355357 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1235 10:52:16.358669 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1236 10:52:16.361710 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1237 10:52:16.368477 PCI: 00:17.0 18 * [0x60 - 0x67] io
1238 10:52:16.371837 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1239 10:52:16.378583 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1240 10:52:16.384881 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1241 10:52:16.391867 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1242 10:52:16.401378 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1243 10:52:16.407854 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1244 10:52:16.411318 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1245 10:52:16.418448 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1246 10:52:16.424832 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1247 10:52:16.427784 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1248 10:52:16.434883 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1249 10:52:16.438039 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1250 10:52:16.441129 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1251 10:52:16.447794 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1252 10:52:16.451261 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1253 10:52:16.458138 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1254 10:52:16.461084 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1255 10:52:16.467960 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1256 10:52:16.470957 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1257 10:52:16.477816 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1258 10:52:16.481251 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1259 10:52:16.487524 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1260 10:52:16.490714 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1261 10:52:16.497409 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1262 10:52:16.501077 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1263 10:52:16.507124 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1264 10:52:16.510928 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1265 10:52:16.517311 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1266 10:52:16.520665 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1267 10:52:16.523636 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1268 10:52:16.530289 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1269 10:52:16.540488 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1270 10:52:16.543499 avoid_fixed_resources: DOMAIN: 0000
1271 10:52:16.547403 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1272 10:52:16.553920 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1273 10:52:16.561116 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1274 10:52:16.570631 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1275 10:52:16.576956 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1276 10:52:16.583517 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1277 10:52:16.593409 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1278 10:52:16.600395 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1279 10:52:16.606721 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1280 10:52:16.616509 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1281 10:52:16.623524 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1282 10:52:16.630041 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1283 10:52:16.633244 Setting resources...
1284 10:52:16.639952 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1285 10:52:16.643288 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1286 10:52:16.646477 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1287 10:52:16.650000 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1288 10:52:16.653664 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1289 10:52:16.660127 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1290 10:52:16.666712 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1291 10:52:16.672964 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1292 10:52:16.679390 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1293 10:52:16.686066 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1294 10:52:16.689577 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1295 10:52:16.696094 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1296 10:52:16.699253 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1297 10:52:16.705995 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1298 10:52:16.709159 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1299 10:52:16.715803 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1300 10:52:16.719384 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1301 10:52:16.725896 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1302 10:52:16.729129 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1303 10:52:16.735899 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1304 10:52:16.739135 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1305 10:52:16.745673 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1306 10:52:16.749209 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1307 10:52:16.755783 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1308 10:52:16.759122 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1309 10:52:16.762407 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1310 10:52:16.768984 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1311 10:52:16.772616 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1312 10:52:16.779238 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1313 10:52:16.782244 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1314 10:52:16.788642 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1315 10:52:16.792261 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1316 10:52:16.802327 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1317 10:52:16.808853 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1318 10:52:16.815411 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1319 10:52:16.822112 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1320 10:52:16.829379 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1321 10:52:16.835750 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1322 10:52:16.838703 Root Device assign_resources, bus 0 link: 0
1323 10:52:16.845020 DOMAIN: 0000 assign_resources, bus 0 link: 0
1324 10:52:16.851966 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1325 10:52:16.861716 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1326 10:52:16.868045 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1327 10:52:16.877902 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1328 10:52:16.884807 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1329 10:52:16.894746 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1330 10:52:16.898098 PCI: 00:14.0 assign_resources, bus 0 link: 0
1331 10:52:16.901393 PCI: 00:14.0 assign_resources, bus 0 link: 0
1332 10:52:16.911453 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1333 10:52:16.918140 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1334 10:52:16.928167 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1335 10:52:16.934610 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1336 10:52:16.940938 PCI: 00:15.0 assign_resources, bus 1 link: 0
1337 10:52:16.944500 PCI: 00:15.0 assign_resources, bus 1 link: 0
1338 10:52:16.954617 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1339 10:52:16.957774 PCI: 00:15.1 assign_resources, bus 2 link: 0
1340 10:52:16.960985 PCI: 00:15.1 assign_resources, bus 2 link: 0
1341 10:52:16.971106 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1342 10:52:16.977551 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1343 10:52:16.987769 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1344 10:52:16.993825 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1345 10:52:17.000932 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1346 10:52:17.010894 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1347 10:52:17.017372 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1348 10:52:17.027418 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1349 10:52:17.030597 PCI: 00:19.0 assign_resources, bus 3 link: 0
1350 10:52:17.033940 PCI: 00:19.0 assign_resources, bus 3 link: 0
1351 10:52:17.043721 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1352 10:52:17.053512 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1353 10:52:17.060181 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1354 10:52:17.066774 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1355 10:52:17.073285 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1356 10:52:17.080302 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1357 10:52:17.086644 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1358 10:52:17.096507 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1359 10:52:17.100052 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1360 10:52:17.103194 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1361 10:52:17.112945 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1362 10:52:17.116306 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1363 10:52:17.123187 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1364 10:52:17.126357 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1365 10:52:17.132949 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1366 10:52:17.136179 LPC: Trying to open IO window from 800 size 1ff
1367 10:52:17.146187 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1368 10:52:17.152636 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1369 10:52:17.162848 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1370 10:52:17.169328 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1371 10:52:17.172916 DOMAIN: 0000 assign_resources, bus 0 link: 0
1372 10:52:17.179237 Root Device assign_resources, bus 0 link: 0
1373 10:52:17.182946 Done setting resources.
1374 10:52:17.189223 Show resources in subtree (Root Device)...After assigning values.
1375 10:52:17.192579 Root Device child on link 0 CPU_CLUSTER: 0
1376 10:52:17.195930 CPU_CLUSTER: 0 child on link 0 APIC: 00
1377 10:52:17.196011 APIC: 00
1378 10:52:17.199150 APIC: 02
1379 10:52:17.199230 APIC: 01
1380 10:52:17.202450 APIC: 03
1381 10:52:17.202531 APIC: 04
1382 10:52:17.202595 APIC: 05
1383 10:52:17.205572 APIC: 07
1384 10:52:17.205672 APIC: 06
1385 10:52:17.209341 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1386 10:52:17.219077 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1387 10:52:17.232254 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1388 10:52:17.232338 PCI: 00:00.0
1389 10:52:17.241926 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1390 10:52:17.252371 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1391 10:52:17.261875 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1392 10:52:17.271937 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1393 10:52:17.278650 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1394 10:52:17.288241 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1395 10:52:17.298646 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1396 10:52:17.308404 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1397 10:52:17.318179 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1398 10:52:17.324743 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1399 10:52:17.334929 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1400 10:52:17.344737 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1401 10:52:17.354441 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1402 10:52:17.364701 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1403 10:52:17.374446 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1404 10:52:17.384229 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1405 10:52:17.384352 PCI: 00:02.0
1406 10:52:17.394424 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1407 10:52:17.407444 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1408 10:52:17.414030 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1409 10:52:17.417239 PCI: 00:04.0
1410 10:52:17.417341 PCI: 00:08.0
1411 10:52:17.430718 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1412 10:52:17.430822 PCI: 00:12.0
1413 10:52:17.440607 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1414 10:52:17.443869 PCI: 00:14.0 child on link 0 USB0 port 0
1415 10:52:17.456857 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1416 10:52:17.460134 USB0 port 0 child on link 0 USB2 port 0
1417 10:52:17.460205 USB2 port 0
1418 10:52:17.463301 USB2 port 1
1419 10:52:17.466692 USB2 port 2
1420 10:52:17.466763 USB2 port 3
1421 10:52:17.470213 USB2 port 5
1422 10:52:17.470286 USB2 port 6
1423 10:52:17.473400 USB2 port 9
1424 10:52:17.473472 USB3 port 0
1425 10:52:17.476681 USB3 port 1
1426 10:52:17.476748 USB3 port 2
1427 10:52:17.479804 USB3 port 3
1428 10:52:17.479917 USB3 port 4
1429 10:52:17.483538 PCI: 00:14.2
1430 10:52:17.493137 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1431 10:52:17.503267 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1432 10:52:17.506447 PCI: 00:14.3
1433 10:52:17.516275 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1434 10:52:17.519745 PCI: 00:15.0 child on link 0 I2C: 01:15
1435 10:52:17.529798 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1436 10:52:17.533381 I2C: 01:15
1437 10:52:17.536558 PCI: 00:15.1 child on link 0 I2C: 02:5d
1438 10:52:17.546201 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1439 10:52:17.546284 I2C: 02:5d
1440 10:52:17.549513 GENERIC: 0.0
1441 10:52:17.549595 PCI: 00:16.0
1442 10:52:17.562940 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1443 10:52:17.563024 PCI: 00:17.0
1444 10:52:17.572930 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1445 10:52:17.582683 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1446 10:52:17.595628 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1447 10:52:17.602567 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1448 10:52:17.609276 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1449 10:52:17.622112 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1450 10:52:17.625717 PCI: 00:19.0 child on link 0 I2C: 03:1a
1451 10:52:17.635344 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1452 10:52:17.635428 I2C: 03:1a
1453 10:52:17.638904 I2C: 03:38
1454 10:52:17.638986 I2C: 03:39
1455 10:52:17.641900 I2C: 03:3a
1456 10:52:17.641982 I2C: 03:3b
1457 10:52:17.648935 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1458 10:52:17.655145 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1459 10:52:17.665409 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1460 10:52:17.678256 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1461 10:52:17.678340 PCI: 01:00.0
1462 10:52:17.688190 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1463 10:52:17.691930 PCI: 00:1e.0
1464 10:52:17.701774 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1465 10:52:17.711299 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1466 10:52:17.718480 PCI: 00:1e.2 child on link 0 SPI: 00
1467 10:52:17.727861 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1468 10:52:17.727969 SPI: 00
1469 10:52:17.731155 PCI: 00:1e.3 child on link 0 SPI: 01
1470 10:52:17.741035 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1471 10:52:17.744490 SPI: 01
1472 10:52:17.748401 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1473 10:52:17.757755 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1474 10:52:17.764467 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1475 10:52:17.767452 PNP: 0c09.0
1476 10:52:17.777296 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1477 10:52:17.777379 PCI: 00:1f.3
1478 10:52:17.787576 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1479 10:52:17.797115 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1480 10:52:17.801092 PCI: 00:1f.4
1481 10:52:17.810754 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1482 10:52:17.820505 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1483 10:52:17.820589 PCI: 00:1f.5
1484 10:52:17.830299 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1485 10:52:17.833552 Done allocating resources.
1486 10:52:17.840172 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1487 10:52:17.843591 Enabling resources...
1488 10:52:17.847104 PCI: 00:00.0 subsystem <- 8086/9b61
1489 10:52:17.850212 PCI: 00:00.0 cmd <- 06
1490 10:52:17.853481 PCI: 00:02.0 subsystem <- 8086/9b41
1491 10:52:17.856685 PCI: 00:02.0 cmd <- 03
1492 10:52:17.856767 PCI: 00:08.0 cmd <- 06
1493 10:52:17.863865 PCI: 00:12.0 subsystem <- 8086/02f9
1494 10:52:17.863948 PCI: 00:12.0 cmd <- 02
1495 10:52:17.866729 PCI: 00:14.0 subsystem <- 8086/02ed
1496 10:52:17.870070 PCI: 00:14.0 cmd <- 02
1497 10:52:17.873149 PCI: 00:14.2 cmd <- 02
1498 10:52:17.876860 PCI: 00:14.3 subsystem <- 8086/02f0
1499 10:52:17.880216 PCI: 00:14.3 cmd <- 02
1500 10:52:17.883419 PCI: 00:15.0 subsystem <- 8086/02e8
1501 10:52:17.886652 PCI: 00:15.0 cmd <- 02
1502 10:52:17.889890 PCI: 00:15.1 subsystem <- 8086/02e9
1503 10:52:17.893427 PCI: 00:15.1 cmd <- 02
1504 10:52:17.896342 PCI: 00:16.0 subsystem <- 8086/02e0
1505 10:52:17.899520 PCI: 00:16.0 cmd <- 02
1506 10:52:17.903006 PCI: 00:17.0 subsystem <- 8086/02d3
1507 10:52:17.906469 PCI: 00:17.0 cmd <- 03
1508 10:52:17.909784 PCI: 00:19.0 subsystem <- 8086/02c5
1509 10:52:17.909875 PCI: 00:19.0 cmd <- 02
1510 10:52:17.912847 PCI: 00:1d.0 bridge ctrl <- 0013
1511 10:52:17.919468 PCI: 00:1d.0 subsystem <- 8086/02b0
1512 10:52:17.919551 PCI: 00:1d.0 cmd <- 06
1513 10:52:17.922805 PCI: 00:1e.0 subsystem <- 8086/02a8
1514 10:52:17.926299 PCI: 00:1e.0 cmd <- 06
1515 10:52:17.929488 PCI: 00:1e.2 subsystem <- 8086/02aa
1516 10:52:17.932621 PCI: 00:1e.2 cmd <- 06
1517 10:52:17.935918 PCI: 00:1e.3 subsystem <- 8086/02ab
1518 10:52:17.939360 PCI: 00:1e.3 cmd <- 02
1519 10:52:17.942565 PCI: 00:1f.0 subsystem <- 8086/0284
1520 10:52:17.945900 PCI: 00:1f.0 cmd <- 407
1521 10:52:17.949116 PCI: 00:1f.3 subsystem <- 8086/02c8
1522 10:52:17.952649 PCI: 00:1f.3 cmd <- 02
1523 10:52:17.956320 PCI: 00:1f.4 subsystem <- 8086/02a3
1524 10:52:17.959407 PCI: 00:1f.4 cmd <- 03
1525 10:52:17.962382 PCI: 00:1f.5 subsystem <- 8086/02a4
1526 10:52:17.965620 PCI: 00:1f.5 cmd <- 406
1527 10:52:17.973399 PCI: 01:00.0 cmd <- 02
1528 10:52:17.978770 done.
1529 10:52:17.990399 ME: Version: 14.0.39.1367
1530 10:52:17.997388 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1531 10:52:18.001023 Initializing devices...
1532 10:52:18.001266 Root Device init ...
1533 10:52:18.006937 Chrome EC: Set SMI mask to 0x0000000000000000
1534 10:52:18.010182 Chrome EC: clear events_b mask to 0x0000000000000000
1535 10:52:18.016916 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1536 10:52:18.023668 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1537 10:52:18.030413 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1538 10:52:18.033940 Chrome EC: Set WAKE mask to 0x0000000000000000
1539 10:52:18.036791 Root Device init finished in 35206 usecs
1540 10:52:18.040481 CPU_CLUSTER: 0 init ...
1541 10:52:18.047136 CPU_CLUSTER: 0 init finished in 2441 usecs
1542 10:52:18.051129 PCI: 00:00.0 init ...
1543 10:52:18.055160 CPU TDP: 15 Watts
1544 10:52:18.058129 CPU PL2 = 64 Watts
1545 10:52:18.061300 PCI: 00:00.0 init finished in 7084 usecs
1546 10:52:18.064766 PCI: 00:02.0 init ...
1547 10:52:18.068178 PCI: 00:02.0 init finished in 2247 usecs
1548 10:52:18.071091 PCI: 00:08.0 init ...
1549 10:52:18.074485 PCI: 00:08.0 init finished in 2254 usecs
1550 10:52:18.077779 PCI: 00:12.0 init ...
1551 10:52:18.081020 PCI: 00:12.0 init finished in 2255 usecs
1552 10:52:18.084801 PCI: 00:14.0 init ...
1553 10:52:18.087890 PCI: 00:14.0 init finished in 2254 usecs
1554 10:52:18.091418 PCI: 00:14.2 init ...
1555 10:52:18.094235 PCI: 00:14.2 init finished in 2254 usecs
1556 10:52:18.097674 PCI: 00:14.3 init ...
1557 10:52:18.101137 PCI: 00:14.3 init finished in 2270 usecs
1558 10:52:18.104201 PCI: 00:15.0 init ...
1559 10:52:18.107411 DW I2C bus 0 at 0xd121f000 (400 KHz)
1560 10:52:18.110556 PCI: 00:15.0 init finished in 5982 usecs
1561 10:52:18.114241 PCI: 00:15.1 init ...
1562 10:52:18.117324 DW I2C bus 1 at 0xd1220000 (400 KHz)
1563 10:52:18.124070 PCI: 00:15.1 init finished in 5980 usecs
1564 10:52:18.124635 PCI: 00:16.0 init ...
1565 10:52:18.130946 PCI: 00:16.0 init finished in 2253 usecs
1566 10:52:18.134068 PCI: 00:19.0 init ...
1567 10:52:18.137546 DW I2C bus 4 at 0xd1222000 (400 KHz)
1568 10:52:18.140776 PCI: 00:19.0 init finished in 5980 usecs
1569 10:52:18.143960 PCI: 00:1d.0 init ...
1570 10:52:18.147401 Initializing PCH PCIe bridge.
1571 10:52:18.150497 PCI: 00:1d.0 init finished in 5287 usecs
1572 10:52:18.154013 PCI: 00:1f.0 init ...
1573 10:52:18.157053 IOAPIC: Initializing IOAPIC at 0xfec00000
1574 10:52:18.163961 IOAPIC: Bootstrap Processor Local APIC = 0x00
1575 10:52:18.164043 IOAPIC: ID = 0x02
1576 10:52:18.167063 IOAPIC: Dumping registers
1577 10:52:18.170555 reg 0x0000: 0x02000000
1578 10:52:18.173680 reg 0x0001: 0x00770020
1579 10:52:18.173762 reg 0x0002: 0x00000000
1580 10:52:18.180487 PCI: 00:1f.0 init finished in 23554 usecs
1581 10:52:18.183322 PCI: 00:1f.4 init ...
1582 10:52:18.186837 PCI: 00:1f.4 init finished in 2263 usecs
1583 10:52:18.197591 PCI: 01:00.0 init ...
1584 10:52:18.200552 PCI: 01:00.0 init finished in 2245 usecs
1585 10:52:18.204930 PNP: 0c09.0 init ...
1586 10:52:18.208302 Google Chrome EC uptime: 11.084 seconds
1587 10:52:18.214626 Google Chrome AP resets since EC boot: 0
1588 10:52:18.218503 Google Chrome most recent AP reset causes:
1589 10:52:18.224734 Google Chrome EC reset flags at last EC boot: reset-pin
1590 10:52:18.227921 PNP: 0c09.0 init finished in 20574 usecs
1591 10:52:18.231450 Devices initialized
1592 10:52:18.235349 Show all devs... After init.
1593 10:52:18.235700 Root Device: enabled 1
1594 10:52:18.238040 CPU_CLUSTER: 0: enabled 1
1595 10:52:18.241338 DOMAIN: 0000: enabled 1
1596 10:52:18.241419 APIC: 00: enabled 1
1597 10:52:18.244669 PCI: 00:00.0: enabled 1
1598 10:52:18.247888 PCI: 00:02.0: enabled 1
1599 10:52:18.250962 PCI: 00:04.0: enabled 0
1600 10:52:18.251044 PCI: 00:05.0: enabled 0
1601 10:52:18.254524 PCI: 00:12.0: enabled 1
1602 10:52:18.257544 PCI: 00:12.5: enabled 0
1603 10:52:18.261341 PCI: 00:12.6: enabled 0
1604 10:52:18.261423 PCI: 00:14.0: enabled 1
1605 10:52:18.264196 PCI: 00:14.1: enabled 0
1606 10:52:18.267981 PCI: 00:14.3: enabled 1
1607 10:52:18.268064 PCI: 00:14.5: enabled 0
1608 10:52:18.271143 PCI: 00:15.0: enabled 1
1609 10:52:18.274503 PCI: 00:15.1: enabled 1
1610 10:52:18.277813 PCI: 00:15.2: enabled 0
1611 10:52:18.277894 PCI: 00:15.3: enabled 0
1612 10:52:18.280852 PCI: 00:16.0: enabled 1
1613 10:52:18.284098 PCI: 00:16.1: enabled 0
1614 10:52:18.287823 PCI: 00:16.2: enabled 0
1615 10:52:18.287904 PCI: 00:16.3: enabled 0
1616 10:52:18.290394 PCI: 00:16.4: enabled 0
1617 10:52:18.293819 PCI: 00:16.5: enabled 0
1618 10:52:18.297803 PCI: 00:17.0: enabled 1
1619 10:52:18.297897 PCI: 00:19.0: enabled 1
1620 10:52:18.300698 PCI: 00:19.1: enabled 0
1621 10:52:18.303988 PCI: 00:19.2: enabled 0
1622 10:52:18.307419 PCI: 00:1a.0: enabled 0
1623 10:52:18.307506 PCI: 00:1c.0: enabled 0
1624 10:52:18.310846 PCI: 00:1c.1: enabled 0
1625 10:52:18.314208 PCI: 00:1c.2: enabled 0
1626 10:52:18.314303 PCI: 00:1c.3: enabled 0
1627 10:52:18.317135 PCI: 00:1c.4: enabled 0
1628 10:52:18.320969 PCI: 00:1c.5: enabled 0
1629 10:52:18.323672 PCI: 00:1c.6: enabled 0
1630 10:52:18.323810 PCI: 00:1c.7: enabled 0
1631 10:52:18.327133 PCI: 00:1d.0: enabled 1
1632 10:52:18.330344 PCI: 00:1d.1: enabled 0
1633 10:52:18.334547 PCI: 00:1d.2: enabled 0
1634 10:52:18.334712 PCI: 00:1d.3: enabled 0
1635 10:52:18.336989 PCI: 00:1d.4: enabled 0
1636 10:52:18.341008 PCI: 00:1d.5: enabled 0
1637 10:52:18.343353 PCI: 00:1e.0: enabled 1
1638 10:52:18.343426 PCI: 00:1e.1: enabled 0
1639 10:52:18.347263 PCI: 00:1e.2: enabled 1
1640 10:52:18.350116 PCI: 00:1e.3: enabled 1
1641 10:52:18.353363 PCI: 00:1f.0: enabled 1
1642 10:52:18.353443 PCI: 00:1f.1: enabled 0
1643 10:52:18.356895 PCI: 00:1f.2: enabled 0
1644 10:52:18.359746 PCI: 00:1f.3: enabled 1
1645 10:52:18.363051 PCI: 00:1f.4: enabled 1
1646 10:52:18.363138 PCI: 00:1f.5: enabled 1
1647 10:52:18.366602 PCI: 00:1f.6: enabled 0
1648 10:52:18.369783 USB0 port 0: enabled 1
1649 10:52:18.369855 I2C: 01:15: enabled 1
1650 10:52:18.373292 I2C: 02:5d: enabled 1
1651 10:52:18.376307 GENERIC: 0.0: enabled 1
1652 10:52:18.376376 I2C: 03:1a: enabled 1
1653 10:52:18.379739 I2C: 03:38: enabled 1
1654 10:52:18.383283 I2C: 03:39: enabled 1
1655 10:52:18.386352 I2C: 03:3a: enabled 1
1656 10:52:18.386456 I2C: 03:3b: enabled 1
1657 10:52:18.389637 PCI: 00:00.0: enabled 1
1658 10:52:18.393414 SPI: 00: enabled 1
1659 10:52:18.393487 SPI: 01: enabled 1
1660 10:52:18.396083 PNP: 0c09.0: enabled 1
1661 10:52:18.399407 USB2 port 0: enabled 1
1662 10:52:18.399480 USB2 port 1: enabled 1
1663 10:52:18.402922 USB2 port 2: enabled 0
1664 10:52:18.406536 USB2 port 3: enabled 0
1665 10:52:18.406601 USB2 port 5: enabled 0
1666 10:52:18.409441 USB2 port 6: enabled 1
1667 10:52:18.412783 USB2 port 9: enabled 1
1668 10:52:18.412864 USB3 port 0: enabled 1
1669 10:52:18.415759 USB3 port 1: enabled 1
1670 10:52:18.419307 USB3 port 2: enabled 1
1671 10:52:18.422369 USB3 port 3: enabled 1
1672 10:52:18.422437 USB3 port 4: enabled 0
1673 10:52:18.426456 APIC: 02: enabled 1
1674 10:52:18.428996 APIC: 01: enabled 1
1675 10:52:18.429069 APIC: 03: enabled 1
1676 10:52:18.432430 APIC: 04: enabled 1
1677 10:52:18.432494 APIC: 05: enabled 1
1678 10:52:18.436107 APIC: 07: enabled 1
1679 10:52:18.438984 APIC: 06: enabled 1
1680 10:52:18.439070 PCI: 00:08.0: enabled 1
1681 10:52:18.442394 PCI: 00:14.2: enabled 1
1682 10:52:18.445582 PCI: 01:00.0: enabled 1
1683 10:52:18.449259 Disabling ACPI via APMC:
1684 10:52:18.452571 done.
1685 10:52:18.455386 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1686 10:52:18.458774 ELOG: NV offset 0xaf0000 size 0x4000
1687 10:52:18.466361 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1688 10:52:18.473315 ELOG: Event(17) added with size 13 at 2023-06-28 10:52:18 UTC
1689 10:52:18.480020 ELOG: Event(92) added with size 9 at 2023-06-28 10:52:18 UTC
1690 10:52:18.486191 ELOG: Event(93) added with size 9 at 2023-06-28 10:52:18 UTC
1691 10:52:18.493007 ELOG: Event(9A) added with size 9 at 2023-06-28 10:52:18 UTC
1692 10:52:18.499644 ELOG: Event(9E) added with size 10 at 2023-06-28 10:52:18 UTC
1693 10:52:18.506597 ELOG: Event(9F) added with size 14 at 2023-06-28 10:52:18 UTC
1694 10:52:18.509556 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1695 10:52:18.517131 ELOG: Event(A1) added with size 10 at 2023-06-28 10:52:18 UTC
1696 10:52:18.526688 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1697 10:52:18.533959 ELOG: Event(A0) added with size 9 at 2023-06-28 10:52:18 UTC
1698 10:52:18.536899 elog_add_boot_reason: Logged dev mode boot
1699 10:52:18.539974 Finalize devices...
1700 10:52:18.540048 PCI: 00:17.0 final
1701 10:52:18.543445 Devices finalized
1702 10:52:18.546351 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1703 10:52:18.553020 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1704 10:52:18.556277 ME: HFSTS1 : 0x90000245
1705 10:52:18.559938 ME: HFSTS2 : 0x3B850126
1706 10:52:18.566358 ME: HFSTS3 : 0x00000020
1707 10:52:18.570129 ME: HFSTS4 : 0x00004800
1708 10:52:18.572829 ME: HFSTS5 : 0x00000000
1709 10:52:18.576085 ME: HFSTS6 : 0x40400006
1710 10:52:18.579459 ME: Manufacturing Mode : NO
1711 10:52:18.582802 ME: FW Partition Table : OK
1712 10:52:18.586041 ME: Bringup Loader Failure : NO
1713 10:52:18.589669 ME: Firmware Init Complete : YES
1714 10:52:18.592759 ME: Boot Options Present : NO
1715 10:52:18.596189 ME: Update In Progress : NO
1716 10:52:18.599346 ME: D0i3 Support : YES
1717 10:52:18.603322 ME: Low Power State Enabled : NO
1718 10:52:18.605825 ME: CPU Replaced : NO
1719 10:52:18.609100 ME: CPU Replacement Valid : YES
1720 10:52:18.612603 ME: Current Working State : 5
1721 10:52:18.615787 ME: Current Operation State : 1
1722 10:52:18.619270 ME: Current Operation Mode : 0
1723 10:52:18.622793 ME: Error Code : 0
1724 10:52:18.625838 ME: CPU Debug Disabled : YES
1725 10:52:18.629193 ME: TXT Support : NO
1726 10:52:18.635665 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1727 10:52:18.642373 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1728 10:52:18.642453 CBFS @ c08000 size 3f8000
1729 10:52:18.648803 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1730 10:52:18.652417 CBFS: Locating 'fallback/dsdt.aml'
1731 10:52:18.655540 CBFS: Found @ offset 10bb80 size 3fa5
1732 10:52:18.662058 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1733 10:52:18.665436 CBFS @ c08000 size 3f8000
1734 10:52:18.672399 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1735 10:52:18.672482 CBFS: Locating 'fallback/slic'
1736 10:52:18.677881 CBFS: 'fallback/slic' not found.
1737 10:52:18.684243 ACPI: Writing ACPI tables at 99b3e000.
1738 10:52:18.684327 ACPI: * FACS
1739 10:52:18.687143 ACPI: * DSDT
1740 10:52:18.690411 Ramoops buffer: 0x100000@0x99a3d000.
1741 10:52:18.694170 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1742 10:52:18.700553 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1743 10:52:18.703921 Google Chrome EC: version:
1744 10:52:18.707253 ro: helios_v2.0.2659-56403530b
1745 10:52:18.710578 rw: helios_v2.0.2849-c41de27e7d
1746 10:52:18.710660 running image: 1
1747 10:52:18.715211 ACPI: * FADT
1748 10:52:18.715324 SCI is IRQ9
1749 10:52:18.721779 ACPI: added table 1/32, length now 40
1750 10:52:18.721861 ACPI: * SSDT
1751 10:52:18.724816 Found 1 CPU(s) with 8 core(s) each.
1752 10:52:18.728230 Error: Could not locate 'wifi_sar' in VPD.
1753 10:52:18.734854 Checking CBFS for default SAR values
1754 10:52:18.738043 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1755 10:52:18.741082 CBFS @ c08000 size 3f8000
1756 10:52:18.747716 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1757 10:52:18.751134 CBFS: Locating 'wifi_sar_defaults.hex'
1758 10:52:18.754736 CBFS: Found @ offset 5fac0 size 77
1759 10:52:18.757605 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1760 10:52:18.764828 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1761 10:52:18.767881 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1762 10:52:18.774505 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1763 10:52:18.778100 failed to find key in VPD: dsm_calib_r0_0
1764 10:52:18.787893 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1765 10:52:18.791171 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1766 10:52:18.794282 failed to find key in VPD: dsm_calib_r0_1
1767 10:52:18.804238 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1768 10:52:18.810964 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1769 10:52:18.813992 failed to find key in VPD: dsm_calib_r0_2
1770 10:52:18.824278 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1771 10:52:18.827405 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1772 10:52:18.833931 failed to find key in VPD: dsm_calib_r0_3
1773 10:52:18.840461 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1774 10:52:18.847014 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1775 10:52:18.850398 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1776 10:52:18.857196 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1777 10:52:18.860893 EC returned error result code 1
1778 10:52:18.863845 EC returned error result code 1
1779 10:52:18.867877 EC returned error result code 1
1780 10:52:18.870564 PS2K: Bad resp from EC. Vivaldi disabled!
1781 10:52:18.877095 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1782 10:52:18.883751 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1783 10:52:18.887205 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1784 10:52:18.893758 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1785 10:52:18.897080 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1786 10:52:18.903459 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1787 10:52:18.910311 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1788 10:52:18.917340 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1789 10:52:18.920172 ACPI: added table 2/32, length now 44
1790 10:52:18.920254 ACPI: * MCFG
1791 10:52:18.926781 ACPI: added table 3/32, length now 48
1792 10:52:18.926862 ACPI: * TPM2
1793 10:52:18.930700 TPM2 log created at 99a2d000
1794 10:52:18.933840 ACPI: added table 4/32, length now 52
1795 10:52:18.936916 ACPI: * MADT
1796 10:52:18.936997 SCI is IRQ9
1797 10:52:18.939916 ACPI: added table 5/32, length now 56
1798 10:52:18.943386 current = 99b43ac0
1799 10:52:18.943467 ACPI: * DMAR
1800 10:52:18.947504 ACPI: added table 6/32, length now 60
1801 10:52:18.950046 ACPI: * IGD OpRegion
1802 10:52:18.953172 GMA: Found VBT in CBFS
1803 10:52:18.956807 GMA: Found valid VBT in CBFS
1804 10:52:18.959820 ACPI: added table 7/32, length now 64
1805 10:52:18.959902 ACPI: * HPET
1806 10:52:18.966939 ACPI: added table 8/32, length now 68
1807 10:52:18.967021 ACPI: done.
1808 10:52:18.969856 ACPI tables: 31744 bytes.
1809 10:52:18.973476 smbios_write_tables: 99a2c000
1810 10:52:18.976622 EC returned error result code 3
1811 10:52:18.979899 Couldn't obtain OEM name from CBI
1812 10:52:18.983138 Create SMBIOS type 17
1813 10:52:18.986752 PCI: 00:00.0 (Intel Cannonlake)
1814 10:52:18.986834 PCI: 00:14.3 (Intel WiFi)
1815 10:52:18.989673 SMBIOS tables: 939 bytes.
1816 10:52:18.993451 Writing table forward entry at 0x00000500
1817 10:52:18.999698 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1818 10:52:19.002968 Writing coreboot table at 0x99b62000
1819 10:52:19.009829 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1820 10:52:19.012914 1. 0000000000001000-000000000009ffff: RAM
1821 10:52:19.020021 2. 00000000000a0000-00000000000fffff: RESERVED
1822 10:52:19.022964 3. 0000000000100000-0000000099a2bfff: RAM
1823 10:52:19.029152 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1824 10:52:19.033186 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1825 10:52:19.039206 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1826 10:52:19.046575 7. 000000009a000000-000000009f7fffff: RESERVED
1827 10:52:19.049202 8. 00000000e0000000-00000000efffffff: RESERVED
1828 10:52:19.055724 9. 00000000fc000000-00000000fc000fff: RESERVED
1829 10:52:19.059160 10. 00000000fe000000-00000000fe00ffff: RESERVED
1830 10:52:19.062500 11. 00000000fed10000-00000000fed17fff: RESERVED
1831 10:52:19.069010 12. 00000000fed80000-00000000fed83fff: RESERVED
1832 10:52:19.072986 13. 00000000fed90000-00000000fed91fff: RESERVED
1833 10:52:19.079180 14. 00000000feda0000-00000000feda1fff: RESERVED
1834 10:52:19.082773 15. 0000000100000000-000000045e7fffff: RAM
1835 10:52:19.085726 Graphics framebuffer located at 0xc0000000
1836 10:52:19.088991 Passing 5 GPIOs to payload:
1837 10:52:19.095395 NAME | PORT | POLARITY | VALUE
1838 10:52:19.099423 write protect | undefined | high | low
1839 10:52:19.105472 lid | undefined | high | high
1840 10:52:19.111881 power | undefined | high | low
1841 10:52:19.115258 oprom | undefined | high | low
1842 10:52:19.122190 EC in RW | 0x000000cb | high | low
1843 10:52:19.122280 Board ID: 4
1844 10:52:19.128786 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1845 10:52:19.128875 CBFS @ c08000 size 3f8000
1846 10:52:19.135239 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1847 10:52:19.141830 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1848 10:52:19.145285 coreboot table: 1492 bytes.
1849 10:52:19.148630 IMD ROOT 0. 99fff000 00001000
1850 10:52:19.151784 IMD SMALL 1. 99ffe000 00001000
1851 10:52:19.154977 FSP MEMORY 2. 99c4e000 003b0000
1852 10:52:19.158552 CONSOLE 3. 99c2e000 00020000
1853 10:52:19.161809 FMAP 4. 99c2d000 0000054e
1854 10:52:19.165038 TIME STAMP 5. 99c2c000 00000910
1855 10:52:19.168557 VBOOT WORK 6. 99c18000 00014000
1856 10:52:19.171430 MRC DATA 7. 99c16000 00001958
1857 10:52:19.174853 ROMSTG STCK 8. 99c15000 00001000
1858 10:52:19.178614 AFTER CAR 9. 99c0b000 0000a000
1859 10:52:19.181563 RAMSTAGE 10. 99baf000 0005c000
1860 10:52:19.184871 REFCODE 11. 99b7a000 00035000
1861 10:52:19.188569 SMM BACKUP 12. 99b6a000 00010000
1862 10:52:19.191800 COREBOOT 13. 99b62000 00008000
1863 10:52:19.194745 ACPI 14. 99b3e000 00024000
1864 10:52:19.197948 ACPI GNVS 15. 99b3d000 00001000
1865 10:52:19.201279 RAMOOPS 16. 99a3d000 00100000
1866 10:52:19.204559 TPM2 TCGLOG17. 99a2d000 00010000
1867 10:52:19.207943 SMBIOS 18. 99a2c000 00000800
1868 10:52:19.211429 IMD small region:
1869 10:52:19.215104 IMD ROOT 0. 99ffec00 00000400
1870 10:52:19.218097 FSP RUNTIME 1. 99ffebe0 00000004
1871 10:52:19.221463 EC HOSTEVENT 2. 99ffebc0 00000008
1872 10:52:19.224646 POWER STATE 3. 99ffeb80 00000040
1873 10:52:19.227912 ROMSTAGE 4. 99ffeb60 00000004
1874 10:52:19.230999 MEM INFO 5. 99ffe9a0 000001b9
1875 10:52:19.234734 VPD 6. 99ffe920 0000006c
1876 10:52:19.237611 MTRR: Physical address space:
1877 10:52:19.244195 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1878 10:52:19.251159 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1879 10:52:19.257334 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1880 10:52:19.264016 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1881 10:52:19.267656 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1882 10:52:19.274539 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1883 10:52:19.280492 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1884 10:52:19.284140 MTRR: Fixed MSR 0x250 0x0606060606060606
1885 10:52:19.290990 MTRR: Fixed MSR 0x258 0x0606060606060606
1886 10:52:19.294052 MTRR: Fixed MSR 0x259 0x0000000000000000
1887 10:52:19.297315 MTRR: Fixed MSR 0x268 0x0606060606060606
1888 10:52:19.300862 MTRR: Fixed MSR 0x269 0x0606060606060606
1889 10:52:19.307006 MTRR: Fixed MSR 0x26a 0x0606060606060606
1890 10:52:19.310695 MTRR: Fixed MSR 0x26b 0x0606060606060606
1891 10:52:19.313803 MTRR: Fixed MSR 0x26c 0x0606060606060606
1892 10:52:19.316987 MTRR: Fixed MSR 0x26d 0x0606060606060606
1893 10:52:19.323785 MTRR: Fixed MSR 0x26e 0x0606060606060606
1894 10:52:19.327085 MTRR: Fixed MSR 0x26f 0x0606060606060606
1895 10:52:19.330254 call enable_fixed_mtrr()
1896 10:52:19.333530 CPU physical address size: 39 bits
1897 10:52:19.337276 MTRR: default type WB/UC MTRR counts: 6/8.
1898 10:52:19.340150 MTRR: WB selected as default type.
1899 10:52:19.347047 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1900 10:52:19.353865 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1901 10:52:19.359983 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1902 10:52:19.366540 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1903 10:52:19.373531 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1904 10:52:19.379765 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1905 10:52:19.383487 MTRR: Fixed MSR 0x250 0x0606060606060606
1906 10:52:19.386653 MTRR: Fixed MSR 0x258 0x0606060606060606
1907 10:52:19.393014 MTRR: Fixed MSR 0x259 0x0000000000000000
1908 10:52:19.396547 MTRR: Fixed MSR 0x268 0x0606060606060606
1909 10:52:19.399515 MTRR: Fixed MSR 0x269 0x0606060606060606
1910 10:52:19.403026 MTRR: Fixed MSR 0x26a 0x0606060606060606
1911 10:52:19.409698 MTRR: Fixed MSR 0x26b 0x0606060606060606
1912 10:52:19.412789 MTRR: Fixed MSR 0x26c 0x0606060606060606
1913 10:52:19.416264 MTRR: Fixed MSR 0x26d 0x0606060606060606
1914 10:52:19.420069 MTRR: Fixed MSR 0x26e 0x0606060606060606
1915 10:52:19.423029 MTRR: Fixed MSR 0x26f 0x0606060606060606
1916 10:52:19.426156
1917 10:52:19.426255 MTRR check
1918 10:52:19.429545 Fixed MTRRs : Enabled
1919 10:52:19.429645 Variable MTRRs: Enabled
1920 10:52:19.432779
1921 10:52:19.432852 call enable_fixed_mtrr()
1922 10:52:19.439356 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1923 10:52:19.442854 CPU physical address size: 39 bits
1924 10:52:19.449568 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1925 10:52:19.452517 MTRR: Fixed MSR 0x250 0x0606060606060606
1926 10:52:19.456777 MTRR: Fixed MSR 0x258 0x0606060606060606
1927 10:52:19.459477 MTRR: Fixed MSR 0x259 0x0000000000000000
1928 10:52:19.465937 MTRR: Fixed MSR 0x268 0x0606060606060606
1929 10:52:19.469246 MTRR: Fixed MSR 0x269 0x0606060606060606
1930 10:52:19.472486 MTRR: Fixed MSR 0x26a 0x0606060606060606
1931 10:52:19.475817 MTRR: Fixed MSR 0x26b 0x0606060606060606
1932 10:52:19.479248 MTRR: Fixed MSR 0x26c 0x0606060606060606
1933 10:52:19.485578 MTRR: Fixed MSR 0x26d 0x0606060606060606
1934 10:52:19.489211 MTRR: Fixed MSR 0x26e 0x0606060606060606
1935 10:52:19.492255 MTRR: Fixed MSR 0x26f 0x0606060606060606
1936 10:52:19.498864 MTRR: Fixed MSR 0x250 0x0606060606060606
1937 10:52:19.502308 MTRR: Fixed MSR 0x258 0x0606060606060606
1938 10:52:19.505570 MTRR: Fixed MSR 0x259 0x0000000000000000
1939 10:52:19.508664 MTRR: Fixed MSR 0x268 0x0606060606060606
1940 10:52:19.512159 MTRR: Fixed MSR 0x269 0x0606060606060606
1941 10:52:19.518588 MTRR: Fixed MSR 0x26a 0x0606060606060606
1942 10:52:19.522448 MTRR: Fixed MSR 0x26b 0x0606060606060606
1943 10:52:19.525479 MTRR: Fixed MSR 0x26c 0x0606060606060606
1944 10:52:19.528562 MTRR: Fixed MSR 0x26d 0x0606060606060606
1945 10:52:19.535222 MTRR: Fixed MSR 0x26e 0x0606060606060606
1946 10:52:19.538391 MTRR: Fixed MSR 0x26f 0x0606060606060606
1947 10:52:19.541622 call enable_fixed_mtrr()
1948 10:52:19.545362 call enable_fixed_mtrr()
1949 10:52:19.548924 CPU physical address size: 39 bits
1950 10:52:19.551881 CPU physical address size: 39 bits
1951 10:52:19.555044 MTRR: Fixed MSR 0x250 0x0606060606060606
1952 10:52:19.558500 MTRR: Fixed MSR 0x258 0x0606060606060606
1953 10:52:19.561418 MTRR: Fixed MSR 0x259 0x0000000000000000
1954 10:52:19.568419 MTRR: Fixed MSR 0x268 0x0606060606060606
1955 10:52:19.571476 MTRR: Fixed MSR 0x269 0x0606060606060606
1956 10:52:19.574728 MTRR: Fixed MSR 0x26a 0x0606060606060606
1957 10:52:19.578681 MTRR: Fixed MSR 0x26b 0x0606060606060606
1958 10:52:19.585141 MTRR: Fixed MSR 0x26c 0x0606060606060606
1959 10:52:19.588103 MTRR: Fixed MSR 0x26d 0x0606060606060606
1960 10:52:19.591825 MTRR: Fixed MSR 0x26e 0x0606060606060606
1961 10:52:19.594629 MTRR: Fixed MSR 0x26f 0x0606060606060606
1962 10:52:19.601082 MTRR: Fixed MSR 0x250 0x0606060606060606
1963 10:52:19.601166 call enable_fixed_mtrr()
1964 10:52:19.607724 MTRR: Fixed MSR 0x258 0x0606060606060606
1965 10:52:19.611401 MTRR: Fixed MSR 0x259 0x0000000000000000
1966 10:52:19.614280 MTRR: Fixed MSR 0x268 0x0606060606060606
1967 10:52:19.617699 MTRR: Fixed MSR 0x269 0x0606060606060606
1968 10:52:19.624668 MTRR: Fixed MSR 0x26a 0x0606060606060606
1969 10:52:19.628133 MTRR: Fixed MSR 0x26b 0x0606060606060606
1970 10:52:19.630994 MTRR: Fixed MSR 0x26c 0x0606060606060606
1971 10:52:19.634541 MTRR: Fixed MSR 0x26d 0x0606060606060606
1972 10:52:19.640914 MTRR: Fixed MSR 0x26e 0x0606060606060606
1973 10:52:19.644177 MTRR: Fixed MSR 0x26f 0x0606060606060606
1974 10:52:19.648190 CPU physical address size: 39 bits
1975 10:52:19.650874 call enable_fixed_mtrr()
1976 10:52:19.654754 MTRR: Fixed MSR 0x250 0x0606060606060606
1977 10:52:19.657411 MTRR: Fixed MSR 0x250 0x0606060606060606
1978 10:52:19.664487 MTRR: Fixed MSR 0x258 0x0606060606060606
1979 10:52:19.667410 MTRR: Fixed MSR 0x259 0x0000000000000000
1980 10:52:19.670828 MTRR: Fixed MSR 0x268 0x0606060606060606
1981 10:52:19.674209 MTRR: Fixed MSR 0x269 0x0606060606060606
1982 10:52:19.680595 MTRR: Fixed MSR 0x26a 0x0606060606060606
1983 10:52:19.683921 MTRR: Fixed MSR 0x26b 0x0606060606060606
1984 10:52:19.687654 MTRR: Fixed MSR 0x26c 0x0606060606060606
1985 10:52:19.690510 MTRR: Fixed MSR 0x26d 0x0606060606060606
1986 10:52:19.693916 MTRR: Fixed MSR 0x26e 0x0606060606060606
1987 10:52:19.700425 MTRR: Fixed MSR 0x26f 0x0606060606060606
1988 10:52:19.703382 MTRR: Fixed MSR 0x258 0x0606060606060606
1989 10:52:19.707264 call enable_fixed_mtrr()
1990 10:52:19.710277 MTRR: Fixed MSR 0x259 0x0000000000000000
1991 10:52:19.713579 MTRR: Fixed MSR 0x268 0x0606060606060606
1992 10:52:19.720289 MTRR: Fixed MSR 0x269 0x0606060606060606
1993 10:52:19.723320 MTRR: Fixed MSR 0x26a 0x0606060606060606
1994 10:52:19.727352 MTRR: Fixed MSR 0x26b 0x0606060606060606
1995 10:52:19.730211 MTRR: Fixed MSR 0x26c 0x0606060606060606
1996 10:52:19.733600 MTRR: Fixed MSR 0x26d 0x0606060606060606
1997 10:52:19.740104 MTRR: Fixed MSR 0x26e 0x0606060606060606
1998 10:52:19.743248 MTRR: Fixed MSR 0x26f 0x0606060606060606
1999 10:52:19.746530 CPU physical address size: 39 bits
2000 10:52:19.749930 call enable_fixed_mtrr()
2001 10:52:19.753669 CBFS @ c08000 size 3f8000
2002 10:52:19.760517 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
2003 10:52:19.763018 CPU physical address size: 39 bits
2004 10:52:19.766823 CBFS: Locating 'fallback/payload'
2005 10:52:19.770176 CPU physical address size: 39 bits
2006 10:52:19.772996 CBFS: Found @ offset 1c96c0 size 3f798
2007 10:52:19.776588 Checking segment from ROM address 0xffdd16f8
2008 10:52:19.783465 Checking segment from ROM address 0xffdd1714
2009 10:52:19.786457 Loading segment from ROM address 0xffdd16f8
2010 10:52:19.789503 code (compression=0)
2011 10:52:19.796379 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2012 10:52:19.806552 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2013 10:52:19.806636 it's not compressed!
2014 10:52:19.900019 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2015 10:52:19.906738 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2016 10:52:19.909647 Loading segment from ROM address 0xffdd1714
2017 10:52:19.912660 Entry Point 0x30000000
2018 10:52:19.916526 Loaded segments
2019 10:52:19.921902 Finalizing chipset.
2020 10:52:19.925376 Finalizing SMM.
2021 10:52:19.928321 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2022 10:52:19.931794 mp_park_aps done after 0 msecs.
2023 10:52:19.938767 Jumping to boot code at 30000000(99b62000)
2024 10:52:19.945336 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2025 10:52:19.945419
2026 10:52:19.945484
2027 10:52:19.945544
2028 10:52:19.948185 Starting depthcharge on Helios...
2029 10:52:19.948267
2030 10:52:19.948617 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2031 10:52:19.948719 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2032 10:52:19.948807 Setting prompt string to ['hatch:']
2033 10:52:19.948887 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2034 10:52:19.958264 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2035 10:52:19.958348
2036 10:52:19.965051 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2037 10:52:19.965134
2038 10:52:19.971810 board_setup: Info: eMMC controller not present; skipping
2039 10:52:19.971892
2040 10:52:19.975342 New NVMe Controller 0x30053ac0 @ 00:1d:00
2041 10:52:19.975425
2042 10:52:19.981415 board_setup: Info: SDHCI controller not present; skipping
2043 10:52:19.981497
2044 10:52:19.988021 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2045 10:52:19.988106
2046 10:52:19.988180 Wipe memory regions:
2047 10:52:19.988244
2048 10:52:19.991224 [0x00000000001000, 0x000000000a0000)
2049 10:52:19.991297
2050 10:52:19.994563 [0x00000000100000, 0x00000030000000)
2051 10:52:20.060874
2052 10:52:20.064429 [0x00000030657430, 0x00000099a2c000)
2053 10:52:20.202630
2054 10:52:20.205962 [0x00000100000000, 0x0000045e800000)
2055 10:52:21.588359
2056 10:52:21.588499 R8152: Initializing
2057 10:52:21.588569
2058 10:52:21.591543 Version 9 (ocp_data = 6010)
2059 10:52:21.596410
2060 10:52:21.596490 R8152: Done initializing
2061 10:52:21.596556
2062 10:52:21.598977 Adding net device
2063 10:52:22.208718
2064 10:52:22.208857 R8152: Initializing
2065 10:52:22.208926
2066 10:52:22.211780 Version 6 (ocp_data = 5c30)
2067 10:52:22.211862
2068 10:52:22.215026 R8152: Done initializing
2069 10:52:22.215107
2070 10:52:22.218464 net_add_device: Attemp to include the same device
2071 10:52:22.221999
2072 10:52:22.229734 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2073 10:52:22.229818
2074 10:52:22.229883
2075 10:52:22.229978
2076 10:52:22.230289 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2078 10:52:22.330643 hatch: tftpboot 192.168.201.1 10935909/tftp-deploy-5yl72eh7/kernel/bzImage 10935909/tftp-deploy-5yl72eh7/kernel/cmdline 10935909/tftp-deploy-5yl72eh7/ramdisk/ramdisk.cpio.gz
2079 10:52:22.330824 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2080 10:52:22.330920 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2081 10:52:22.335346 tftpboot 192.168.201.1 10935909/tftp-deploy-5yl72eh7/kernel/bzImloy-5yl72eh7/kernel/cmdline 10935909/tftp-deploy-5yl72eh7/ramdisk/ramdisk.cpio.gz
2082 10:52:22.335458
2083 10:52:22.335552 Waiting for link
2084 10:52:22.536129
2085 10:52:22.536266 done.
2086 10:52:22.536337
2087 10:52:22.536399 MAC: 00:24:32:50:1a:5f
2088 10:52:22.536459
2089 10:52:22.539249 Sending DHCP discover... done.
2090 10:52:22.539335
2091 10:52:22.542683 Waiting for reply... done.
2092 10:52:22.542766
2093 10:52:22.545975 Sending DHCP request... done.
2094 10:52:22.546091
2095 10:52:22.549370 Waiting for reply... done.
2096 10:52:22.549471
2097 10:52:22.552661 My ip is 192.168.201.21
2098 10:52:22.552777
2099 10:52:22.555794 The DHCP server ip is 192.168.201.1
2100 10:52:22.555883
2101 10:52:22.559427 TFTP server IP predefined by user: 192.168.201.1
2102 10:52:22.562655
2103 10:52:22.569749 Bootfile predefined by user: 10935909/tftp-deploy-5yl72eh7/kernel/bzImage
2104 10:52:22.569889
2105 10:52:22.572137 Sending tftp read request... done.
2106 10:52:22.572250
2107 10:52:22.575696 Waiting for the transfer...
2108 10:52:22.575861
2109 10:52:23.145614 00000000 ################################################################
2110 10:52:23.145778
2111 10:52:23.663739 00080000 ################################################################
2112 10:52:23.663902
2113 10:52:24.205813 00100000 ################################################################
2114 10:52:24.206205
2115 10:52:24.801058 00180000 ################################################################
2116 10:52:24.801326
2117 10:52:25.427760 00200000 ################################################################
2118 10:52:25.428334
2119 10:52:26.132273 00280000 ################################################################
2120 10:52:26.132845
2121 10:52:26.853237 00300000 ################################################################
2122 10:52:26.853815
2123 10:52:27.565937 00380000 ################################################################
2124 10:52:27.566517
2125 10:52:28.287355 00400000 ################################################################
2126 10:52:28.288139
2127 10:52:28.981805 00480000 ################################################################
2128 10:52:28.982379
2129 10:52:29.689120 00500000 ################################################################
2130 10:52:29.689708
2131 10:52:30.421397 00580000 ################################################################
2132 10:52:30.421997
2133 10:52:31.142568 00600000 ################################################################
2134 10:52:31.143178
2135 10:52:31.875701 00680000 ################################################################
2136 10:52:31.876324
2137 10:52:32.594672 00700000 ################################################################
2138 10:52:32.595295
2139 10:52:33.325141 00780000 ################################################################
2140 10:52:33.325736
2141 10:52:34.048973 00800000 ################################################################
2142 10:52:34.049559
2143 10:52:34.777714 00880000 ################################################################
2144 10:52:34.778234
2145 10:52:35.498532 00900000 ################################################################
2146 10:52:35.499112
2147 10:52:36.218270 00980000 ################################################################
2148 10:52:36.218915
2149 10:52:36.740106 00a00000 ############################################### done.
2150 10:52:36.740688
2151 10:52:36.742521 The bootfile was 10863104 bytes long.
2152 10:52:36.742993
2153 10:52:36.745594 Sending tftp read request... done.
2154 10:52:36.746064
2155 10:52:36.748923 Waiting for the transfer...
2156 10:52:36.749433
2157 10:52:37.463090 00000000 ################################################################
2158 10:52:37.463707
2159 10:52:38.182990 00080000 ################################################################
2160 10:52:38.183617
2161 10:52:38.903501 00100000 ################################################################
2162 10:52:38.904277
2163 10:52:39.620977 00180000 ################################################################
2164 10:52:39.621547
2165 10:52:40.345593 00200000 ################################################################
2166 10:52:40.346192
2167 10:52:41.068449 00280000 ################################################################
2168 10:52:41.069012
2169 10:52:41.785387 00300000 ################################################################
2170 10:52:41.785959
2171 10:52:42.508310 00380000 ################################################################
2172 10:52:42.508906
2173 10:52:43.240810 00400000 ################################################################
2174 10:52:43.241407
2175 10:52:43.930974 00480000 ################################################################
2176 10:52:43.931556
2177 10:52:44.643196 00500000 ################################################################
2178 10:52:44.643996
2179 10:52:45.177299 00580000 ################################################ done.
2180 10:52:45.177956
2181 10:52:45.180579 Sending tftp read request... done.
2182 10:52:45.181042
2183 10:52:45.183887 Waiting for the transfer...
2184 10:52:45.184353
2185 10:52:45.184745 00000000 # done.
2186 10:52:45.185097
2187 10:52:45.194161 Command line loaded dynamically from TFTP file: 10935909/tftp-deploy-5yl72eh7/kernel/cmdline
2188 10:52:45.194716
2189 10:52:45.216992 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10935909/extract-nfsrootfs-xb3ywdl4,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2190 10:52:45.217579
2191 10:52:45.223843 ec_init(0): CrosEC protocol v3 supported (256, 256)
2192 10:52:45.227812
2193 10:52:45.231195 Shutting down all USB controllers.
2194 10:52:45.231800
2195 10:52:45.232175 Removing current net device
2196 10:52:45.238863
2197 10:52:45.239444 Finalizing coreboot
2198 10:52:45.239885
2199 10:52:45.245222 Exiting depthcharge with code 4 at timestamp: 32666134
2200 10:52:45.245790
2201 10:52:45.246158
2202 10:52:45.246494 Starting kernel ...
2203 10:52:45.246816
2204 10:52:45.248119 end: 2.2.4 bootloader-commands (duration 00:00:25) [common]
2205 10:52:45.248641 start: 2.2.5 auto-login-action (timeout 00:04:17) [common]
2206 10:52:45.249049 Setting prompt string to ['Linux version [0-9]']
2207 10:52:45.249422 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2208 10:52:45.249794 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2209 10:52:45.250662
2211 10:57:02.248872 end: 2.2.5 auto-login-action (duration 00:04:17) [common]
2213 10:57:02.249079 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 257 seconds'
2215 10:57:02.249233 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2218 10:57:02.249478 end: 2 depthcharge-action (duration 00:05:00) [common]
2220 10:57:02.249688 Cleaning after the job
2221 10:57:02.249800 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10935909/tftp-deploy-5yl72eh7/ramdisk
2222 10:57:02.250673 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10935909/tftp-deploy-5yl72eh7/kernel
2223 10:57:02.252012 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10935909/tftp-deploy-5yl72eh7/nfsrootfs
2224 10:57:02.319184 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10935909/tftp-deploy-5yl72eh7/modules
2225 10:57:02.319876 start: 4.1 power-off (timeout 00:00:30) [common]
2226 10:57:02.320044 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2227 10:57:02.394677 >> Command sent successfully.
2228 10:57:02.397491 Returned 0 in 0 seconds
2229 10:57:02.497876 end: 4.1 power-off (duration 00:00:00) [common]
2231 10:57:02.498204 start: 4.2 read-feedback (timeout 00:10:00) [common]
2232 10:57:02.498459 Listened to connection for namespace 'common' for up to 1s
2234 10:57:02.498829 Listened to connection for namespace 'common' for up to 1s
2235 10:57:03.499413 Finalising connection for namespace 'common'
2236 10:57:03.499610 Disconnecting from shell: Finalise
2237 10:57:03.499705
2238 10:57:03.600007 end: 4.2 read-feedback (duration 00:00:01) [common]
2239 10:57:03.600122 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10935909
2240 10:57:04.044722 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10935909
2241 10:57:04.044914 JobError: Your job cannot terminate cleanly.