Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 00:11:32.278584 lava-dispatcher, installed at version: 2023.05.1
2 00:11:32.278862 start: 0 validate
3 00:11:32.279046 Start time: 2023-08-09 00:11:32.279036+00:00 (UTC)
4 00:11:32.279229 Using caching service: 'http://localhost/cache/?uri=%s'
5 00:11:32.279432 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 00:11:32.548935 Using caching service: 'http://localhost/cache/?uri=%s'
7 00:11:32.549281 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.288-cip101-29-g16cdb005f330%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 00:11:32.821112 Using caching service: 'http://localhost/cache/?uri=%s'
9 00:11:32.821848 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.288-cip101-29-g16cdb005f330%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 00:11:38.275954 validate duration: 6.00
12 00:11:38.276394 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 00:11:38.276565 start: 1.1 download-retry (timeout 00:10:00) [common]
14 00:11:38.276716 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 00:11:38.276928 Not decompressing ramdisk as can be used compressed.
16 00:11:38.277089 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 00:11:38.277204 saving as /var/lib/lava/dispatcher/tmp/11238359/tftp-deploy-823cp21j/ramdisk/rootfs.cpio.gz
18 00:11:38.277311 total size: 8418130 (8MB)
19 00:11:38.916850 progress 0% (0MB)
20 00:11:38.919528 progress 5% (0MB)
21 00:11:38.922106 progress 10% (0MB)
22 00:11:38.924665 progress 15% (1MB)
23 00:11:38.927257 progress 20% (1MB)
24 00:11:38.929804 progress 25% (2MB)
25 00:11:38.932395 progress 30% (2MB)
26 00:11:38.934793 progress 35% (2MB)
27 00:11:38.937405 progress 40% (3MB)
28 00:11:38.940037 progress 45% (3MB)
29 00:11:38.942642 progress 50% (4MB)
30 00:11:38.945197 progress 55% (4MB)
31 00:11:38.947748 progress 60% (4MB)
32 00:11:38.950092 progress 65% (5MB)
33 00:11:38.952583 progress 70% (5MB)
34 00:11:38.955070 progress 75% (6MB)
35 00:11:38.957597 progress 80% (6MB)
36 00:11:38.960141 progress 85% (6MB)
37 00:11:38.962676 progress 90% (7MB)
38 00:11:38.965148 progress 95% (7MB)
39 00:11:38.967460 progress 100% (8MB)
40 00:11:38.967718 8MB downloaded in 0.69s (11.63MB/s)
41 00:11:38.967880 end: 1.1.1 http-download (duration 00:00:01) [common]
43 00:11:38.968152 end: 1.1 download-retry (duration 00:00:01) [common]
44 00:11:38.968246 start: 1.2 download-retry (timeout 00:09:59) [common]
45 00:11:38.968337 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 00:11:38.968487 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.288-cip101-29-g16cdb005f330/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 00:11:38.968563 saving as /var/lib/lava/dispatcher/tmp/11238359/tftp-deploy-823cp21j/kernel/bzImage
48 00:11:38.968628 total size: 10863104 (10MB)
49 00:11:38.968694 No compression specified
50 00:11:38.969887 progress 0% (0MB)
51 00:11:38.973099 progress 5% (0MB)
52 00:11:38.976383 progress 10% (1MB)
53 00:11:38.979503 progress 15% (1MB)
54 00:11:38.982915 progress 20% (2MB)
55 00:11:38.986010 progress 25% (2MB)
56 00:11:38.989289 progress 30% (3MB)
57 00:11:38.992602 progress 35% (3MB)
58 00:11:38.995726 progress 40% (4MB)
59 00:11:38.999001 progress 45% (4MB)
60 00:11:39.002085 progress 50% (5MB)
61 00:11:39.005374 progress 55% (5MB)
62 00:11:39.008497 progress 60% (6MB)
63 00:11:39.011753 progress 65% (6MB)
64 00:11:39.015008 progress 70% (7MB)
65 00:11:39.018111 progress 75% (7MB)
66 00:11:39.021377 progress 80% (8MB)
67 00:11:39.024414 progress 85% (8MB)
68 00:11:39.027644 progress 90% (9MB)
69 00:11:39.030697 progress 95% (9MB)
70 00:11:39.033951 progress 100% (10MB)
71 00:11:39.034175 10MB downloaded in 0.07s (158.07MB/s)
72 00:11:39.034379 end: 1.2.1 http-download (duration 00:00:00) [common]
74 00:11:39.034660 end: 1.2 download-retry (duration 00:00:00) [common]
75 00:11:39.034754 start: 1.3 download-retry (timeout 00:09:59) [common]
76 00:11:39.034855 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 00:11:39.035001 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.288-cip101-29-g16cdb005f330/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 00:11:39.035078 saving as /var/lib/lava/dispatcher/tmp/11238359/tftp-deploy-823cp21j/modules/modules.tar
79 00:11:39.035145 total size: 484456 (0MB)
80 00:11:39.035210 Using unxz to decompress xz
81 00:11:39.039858 progress 6% (0MB)
82 00:11:39.040323 progress 13% (0MB)
83 00:11:39.040587 progress 20% (0MB)
84 00:11:39.042406 progress 27% (0MB)
85 00:11:39.044690 progress 33% (0MB)
86 00:11:39.046706 progress 40% (0MB)
87 00:11:39.048990 progress 47% (0MB)
88 00:11:39.051170 progress 54% (0MB)
89 00:11:39.053405 progress 60% (0MB)
90 00:11:39.056136 progress 67% (0MB)
91 00:11:39.058410 progress 74% (0MB)
92 00:11:39.060817 progress 81% (0MB)
93 00:11:39.063171 progress 87% (0MB)
94 00:11:39.065081 progress 94% (0MB)
95 00:11:39.067525 progress 100% (0MB)
96 00:11:39.074287 0MB downloaded in 0.04s (11.81MB/s)
97 00:11:39.074608 end: 1.3.1 http-download (duration 00:00:00) [common]
99 00:11:39.074902 end: 1.3 download-retry (duration 00:00:00) [common]
100 00:11:39.075006 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
101 00:11:39.075112 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
102 00:11:39.075199 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 00:11:39.075293 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
104 00:11:39.075540 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11238359/lava-overlay-wq73n3tu
105 00:11:39.075689 makedir: /var/lib/lava/dispatcher/tmp/11238359/lava-overlay-wq73n3tu/lava-11238359/bin
106 00:11:39.075806 makedir: /var/lib/lava/dispatcher/tmp/11238359/lava-overlay-wq73n3tu/lava-11238359/tests
107 00:11:39.075917 makedir: /var/lib/lava/dispatcher/tmp/11238359/lava-overlay-wq73n3tu/lava-11238359/results
108 00:11:39.076042 Creating /var/lib/lava/dispatcher/tmp/11238359/lava-overlay-wq73n3tu/lava-11238359/bin/lava-add-keys
109 00:11:39.076205 Creating /var/lib/lava/dispatcher/tmp/11238359/lava-overlay-wq73n3tu/lava-11238359/bin/lava-add-sources
110 00:11:39.076352 Creating /var/lib/lava/dispatcher/tmp/11238359/lava-overlay-wq73n3tu/lava-11238359/bin/lava-background-process-start
111 00:11:39.076496 Creating /var/lib/lava/dispatcher/tmp/11238359/lava-overlay-wq73n3tu/lava-11238359/bin/lava-background-process-stop
112 00:11:39.076638 Creating /var/lib/lava/dispatcher/tmp/11238359/lava-overlay-wq73n3tu/lava-11238359/bin/lava-common-functions
113 00:11:39.076778 Creating /var/lib/lava/dispatcher/tmp/11238359/lava-overlay-wq73n3tu/lava-11238359/bin/lava-echo-ipv4
114 00:11:39.076921 Creating /var/lib/lava/dispatcher/tmp/11238359/lava-overlay-wq73n3tu/lava-11238359/bin/lava-install-packages
115 00:11:39.077060 Creating /var/lib/lava/dispatcher/tmp/11238359/lava-overlay-wq73n3tu/lava-11238359/bin/lava-installed-packages
116 00:11:39.077203 Creating /var/lib/lava/dispatcher/tmp/11238359/lava-overlay-wq73n3tu/lava-11238359/bin/lava-os-build
117 00:11:39.077343 Creating /var/lib/lava/dispatcher/tmp/11238359/lava-overlay-wq73n3tu/lava-11238359/bin/lava-probe-channel
118 00:11:39.077483 Creating /var/lib/lava/dispatcher/tmp/11238359/lava-overlay-wq73n3tu/lava-11238359/bin/lava-probe-ip
119 00:11:39.077624 Creating /var/lib/lava/dispatcher/tmp/11238359/lava-overlay-wq73n3tu/lava-11238359/bin/lava-target-ip
120 00:11:39.077764 Creating /var/lib/lava/dispatcher/tmp/11238359/lava-overlay-wq73n3tu/lava-11238359/bin/lava-target-mac
121 00:11:39.077901 Creating /var/lib/lava/dispatcher/tmp/11238359/lava-overlay-wq73n3tu/lava-11238359/bin/lava-target-storage
122 00:11:39.078046 Creating /var/lib/lava/dispatcher/tmp/11238359/lava-overlay-wq73n3tu/lava-11238359/bin/lava-test-case
123 00:11:39.078187 Creating /var/lib/lava/dispatcher/tmp/11238359/lava-overlay-wq73n3tu/lava-11238359/bin/lava-test-event
124 00:11:39.078325 Creating /var/lib/lava/dispatcher/tmp/11238359/lava-overlay-wq73n3tu/lava-11238359/bin/lava-test-feedback
125 00:11:39.078476 Creating /var/lib/lava/dispatcher/tmp/11238359/lava-overlay-wq73n3tu/lava-11238359/bin/lava-test-raise
126 00:11:39.078619 Creating /var/lib/lava/dispatcher/tmp/11238359/lava-overlay-wq73n3tu/lava-11238359/bin/lava-test-reference
127 00:11:39.078761 Creating /var/lib/lava/dispatcher/tmp/11238359/lava-overlay-wq73n3tu/lava-11238359/bin/lava-test-runner
128 00:11:39.078899 Creating /var/lib/lava/dispatcher/tmp/11238359/lava-overlay-wq73n3tu/lava-11238359/bin/lava-test-set
129 00:11:39.079039 Creating /var/lib/lava/dispatcher/tmp/11238359/lava-overlay-wq73n3tu/lava-11238359/bin/lava-test-shell
130 00:11:39.079183 Updating /var/lib/lava/dispatcher/tmp/11238359/lava-overlay-wq73n3tu/lava-11238359/bin/lava-install-packages (oe)
131 00:11:39.079380 Updating /var/lib/lava/dispatcher/tmp/11238359/lava-overlay-wq73n3tu/lava-11238359/bin/lava-installed-packages (oe)
132 00:11:39.079528 Creating /var/lib/lava/dispatcher/tmp/11238359/lava-overlay-wq73n3tu/lava-11238359/environment
133 00:11:39.079646 LAVA metadata
134 00:11:39.079731 - LAVA_JOB_ID=11238359
135 00:11:39.079804 - LAVA_DISPATCHER_IP=192.168.201.1
136 00:11:39.079928 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
137 00:11:39.080010 skipped lava-vland-overlay
138 00:11:39.080095 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 00:11:39.080187 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
140 00:11:39.080256 skipped lava-multinode-overlay
141 00:11:39.080335 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 00:11:39.080423 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
143 00:11:39.080506 Loading test definitions
144 00:11:39.080607 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
145 00:11:39.080688 Using /lava-11238359 at stage 0
146 00:11:39.081038 uuid=11238359_1.4.2.3.1 testdef=None
147 00:11:39.081135 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 00:11:39.081229 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
149 00:11:39.081830 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 00:11:39.082077 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
152 00:11:39.082807 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 00:11:39.083075 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
155 00:11:39.083779 runner path: /var/lib/lava/dispatcher/tmp/11238359/lava-overlay-wq73n3tu/lava-11238359/0/tests/0_dmesg test_uuid 11238359_1.4.2.3.1
156 00:11:39.083963 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 00:11:39.084217 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
159 00:11:39.084295 Using /lava-11238359 at stage 1
160 00:11:39.084660 uuid=11238359_1.4.2.3.5 testdef=None
161 00:11:39.084773 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 00:11:39.084866 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
163 00:11:39.085402 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 00:11:39.085642 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
166 00:11:39.086356 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 00:11:39.086637 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
169 00:11:39.088727 runner path: /var/lib/lava/dispatcher/tmp/11238359/lava-overlay-wq73n3tu/lava-11238359/1/tests/1_bootrr test_uuid 11238359_1.4.2.3.5
170 00:11:39.088956 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 00:11:39.089334 Creating lava-test-runner.conf files
173 00:11:39.089436 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11238359/lava-overlay-wq73n3tu/lava-11238359/0 for stage 0
174 00:11:39.089569 - 0_dmesg
175 00:11:39.089693 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11238359/lava-overlay-wq73n3tu/lava-11238359/1 for stage 1
176 00:11:39.089828 - 1_bootrr
177 00:11:39.089968 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 00:11:39.090098 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
179 00:11:39.100282 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 00:11:39.100401 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
181 00:11:39.100497 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 00:11:39.100590 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 00:11:39.100683 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
184 00:11:39.385296 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 00:11:39.385712 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
186 00:11:39.385842 extracting modules file /var/lib/lava/dispatcher/tmp/11238359/tftp-deploy-823cp21j/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11238359/extract-overlay-ramdisk-cd42exw0/ramdisk
187 00:11:39.412409 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 00:11:39.412576 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
189 00:11:39.412682 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11238359/compress-overlay-wifb4psd/overlay-1.4.2.4.tar.gz to ramdisk
190 00:11:39.412765 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11238359/compress-overlay-wifb4psd/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11238359/extract-overlay-ramdisk-cd42exw0/ramdisk
191 00:11:39.422389 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 00:11:39.422531 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
193 00:11:39.422631 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 00:11:39.422729 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
195 00:11:39.422818 Building ramdisk /var/lib/lava/dispatcher/tmp/11238359/extract-overlay-ramdisk-cd42exw0/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11238359/extract-overlay-ramdisk-cd42exw0/ramdisk
196 00:11:39.599898 >> 53980 blocks
197 00:11:40.590740 rename /var/lib/lava/dispatcher/tmp/11238359/extract-overlay-ramdisk-cd42exw0/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11238359/tftp-deploy-823cp21j/ramdisk/ramdisk.cpio.gz
198 00:11:40.591247 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 00:11:40.591385 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 00:11:40.591496 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 00:11:40.591603 No mkimage arch provided, not using FIT.
202 00:11:40.591705 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 00:11:40.591812 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 00:11:40.591927 end: 1.4 prepare-tftp-overlay (duration 00:00:02) [common]
205 00:11:40.592028 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 00:11:40.592114 No LXC device requested
207 00:11:40.592202 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 00:11:40.592295 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 00:11:40.592384 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 00:11:40.592463 Checking files for TFTP limit of 4294967296 bytes.
211 00:11:40.592913 end: 1 tftp-deploy (duration 00:00:02) [common]
212 00:11:40.593027 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 00:11:40.593124 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 00:11:40.593259 substitutions:
215 00:11:40.593332 - {DTB}: None
216 00:11:40.593401 - {INITRD}: 11238359/tftp-deploy-823cp21j/ramdisk/ramdisk.cpio.gz
217 00:11:40.593465 - {KERNEL}: 11238359/tftp-deploy-823cp21j/kernel/bzImage
218 00:11:40.593528 - {LAVA_MAC}: None
219 00:11:40.593590 - {PRESEED_CONFIG}: None
220 00:11:40.593651 - {PRESEED_LOCAL}: None
221 00:11:40.593711 - {RAMDISK}: 11238359/tftp-deploy-823cp21j/ramdisk/ramdisk.cpio.gz
222 00:11:40.593806 - {ROOT_PART}: None
223 00:11:40.593905 - {ROOT}: None
224 00:11:40.593973 - {SERVER_IP}: 192.168.201.1
225 00:11:40.594034 - {TEE}: None
226 00:11:40.594093 Parsed boot commands:
227 00:11:40.594152 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 00:11:40.594344 Parsed boot commands: tftpboot 192.168.201.1 11238359/tftp-deploy-823cp21j/kernel/bzImage 11238359/tftp-deploy-823cp21j/kernel/cmdline 11238359/tftp-deploy-823cp21j/ramdisk/ramdisk.cpio.gz
229 00:11:40.594449 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 00:11:40.594547 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 00:11:40.594645 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 00:11:40.594740 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 00:11:40.594816 Not connected, no need to disconnect.
234 00:11:40.594897 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 00:11:40.594985 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 00:11:40.595061 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-11'
237 00:11:40.599386 Setting prompt string to ['lava-test: # ']
238 00:11:40.599805 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 00:11:40.599925 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 00:11:40.600038 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 00:11:40.600145 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 00:11:40.600361 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-11' '--port=1' '--command=reboot'
243 00:11:45.734862 >> Command sent successfully.
244 00:11:45.738003 Returned 0 in 5 seconds
245 00:11:45.838466 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 00:11:45.838817 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 00:11:45.838926 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 00:11:45.839023 Setting prompt string to 'Starting depthcharge on Voema...'
250 00:11:45.839101 Changing prompt to 'Starting depthcharge on Voema...'
251 00:11:45.839177 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
252 00:11:45.839470 [Enter `^Ec?' for help]
253 00:11:47.402133
254 00:11:47.402300
255 00:11:47.411933 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
256 00:11:47.415435 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
257 00:11:47.422069 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
258 00:11:47.425366 CPU: AES supported, TXT NOT supported, VT supported
259 00:11:47.432419 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
260 00:11:47.436036 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
261 00:11:47.443025 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
262 00:11:47.446128 VBOOT: Loading verstage.
263 00:11:47.449575 FMAP: Found "FLASH" version 1.1 at 0x1804000.
264 00:11:47.456259 FMAP: base = 0x0 size = 0x2000000 #areas = 32
265 00:11:47.459204 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
266 00:11:47.469399 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
267 00:11:47.475749 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
268 00:11:47.475850
269 00:11:47.475925
270 00:11:47.486319 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
271 00:11:47.502361 Probing TPM: . done!
272 00:11:47.506004 TPM ready after 0 ms
273 00:11:47.509500 Connected to device vid:did:rid of 1ae0:0028:00
274 00:11:47.520138 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
275 00:11:47.527250 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
276 00:11:47.530383 Initialized TPM device CR50 revision 0
277 00:11:47.593786 tlcl_send_startup: Startup return code is 0
278 00:11:47.593919 TPM: setup succeeded
279 00:11:47.609349 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
280 00:11:47.623473 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
281 00:11:47.636140 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
282 00:11:47.646333 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
283 00:11:47.649739 Chrome EC: UHEPI supported
284 00:11:47.653439 Phase 1
285 00:11:47.656560 FMAP: area GBB found @ 1805000 (458752 bytes)
286 00:11:47.666310 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
287 00:11:47.673184 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
288 00:11:47.680019 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
289 00:11:47.686273 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
290 00:11:47.689997 Recovery requested (1009000e)
291 00:11:47.692760 TPM: Extending digest for VBOOT: boot mode into PCR 0
292 00:11:47.704876 tlcl_extend: response is 0
293 00:11:47.711157 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
294 00:11:47.721261 tlcl_extend: response is 0
295 00:11:47.727813 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
296 00:11:47.734108 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
297 00:11:47.740714 BS: verstage times (exec / console): total (unknown) / 142 ms
298 00:11:47.740815
299 00:11:47.740888
300 00:11:47.754297 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
301 00:11:47.760771 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
302 00:11:47.764121 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
303 00:11:47.767774 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
304 00:11:47.774211 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
305 00:11:47.777556 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
306 00:11:47.780480 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
307 00:11:47.784130 TCO_STS: 0000 0000
308 00:11:47.787107 GEN_PMCON: d0015038 00002200
309 00:11:47.790517 GBLRST_CAUSE: 00000000 00000000
310 00:11:47.790598 HPR_CAUSE0: 00000000
311 00:11:47.794203 prev_sleep_state 5
312 00:11:47.797626 Boot Count incremented to 19999
313 00:11:47.804256 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
314 00:11:47.810745 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
315 00:11:47.817210 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
316 00:11:47.823787 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
317 00:11:47.829013 Chrome EC: UHEPI supported
318 00:11:47.835103 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
319 00:11:47.847972 Probing TPM: done!
320 00:11:47.854787 Connected to device vid:did:rid of 1ae0:0028:00
321 00:11:47.864704 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
322 00:11:47.868848 Initialized TPM device CR50 revision 0
323 00:11:47.883422 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
324 00:11:47.889539 MRC: Hash idx 0x100b comparison successful.
325 00:11:47.893346 MRC cache found, size faa8
326 00:11:47.893438 bootmode is set to: 2
327 00:11:47.896480 SPD index = 2
328 00:11:47.903119 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
329 00:11:47.906108 SPD: module type is LPDDR4X
330 00:11:47.909515 SPD: module part number is MT53D1G64D4NW-046
331 00:11:47.916665 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
332 00:11:47.920012 SPD: device width 16 bits, bus width 16 bits
333 00:11:47.923544 SPD: module size is 2048 MB (per channel)
334 00:11:48.356181 CBMEM:
335 00:11:48.359123 IMD: root @ 0x76fff000 254 entries.
336 00:11:48.362765 IMD: root @ 0x76ffec00 62 entries.
337 00:11:48.365775 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
338 00:11:48.372195 FMAP: area RW_VPD found @ f35000 (8192 bytes)
339 00:11:48.375643 External stage cache:
340 00:11:48.379549 IMD: root @ 0x7b3ff000 254 entries.
341 00:11:48.382313 IMD: root @ 0x7b3fec00 62 entries.
342 00:11:48.397181 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
343 00:11:48.404043 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
344 00:11:48.410550 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
345 00:11:48.424126 MRC: 'RECOVERY_MRC_CACHE' does not need update.
346 00:11:48.431155 cse_lite: Skip switching to RW in the recovery path
347 00:11:48.431248 8 DIMMs found
348 00:11:48.431324 SMM Memory Map
349 00:11:48.434119 SMRAM : 0x7b000000 0x800000
350 00:11:48.440535 Subregion 0: 0x7b000000 0x200000
351 00:11:48.444052 Subregion 1: 0x7b200000 0x200000
352 00:11:48.447560 Subregion 2: 0x7b400000 0x400000
353 00:11:48.447653 top_of_ram = 0x77000000
354 00:11:48.454116 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
355 00:11:48.460818 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
356 00:11:48.463846 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
357 00:11:48.470620 MTRR Range: Start=ff000000 End=0 (Size 1000000)
358 00:11:48.477179 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
359 00:11:48.483901 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
360 00:11:48.493968 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
361 00:11:48.500692 Processing 211 relocs. Offset value of 0x74c0b000
362 00:11:48.507773 BS: romstage times (exec / console): total (unknown) / 277 ms
363 00:11:48.512462
364 00:11:48.512554
365 00:11:48.522667 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
366 00:11:48.525867 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
367 00:11:48.536174 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
368 00:11:48.542393 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
369 00:11:48.548816 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
370 00:11:48.555428 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
371 00:11:48.599774 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
372 00:11:48.606275 Processing 5008 relocs. Offset value of 0x75d98000
373 00:11:48.609253 BS: postcar times (exec / console): total (unknown) / 59 ms
374 00:11:48.613007
375 00:11:48.613099
376 00:11:48.622833 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
377 00:11:48.622927 Normal boot
378 00:11:48.625934 FW_CONFIG value is 0x804c02
379 00:11:48.629152 PCI: 00:07.0 disabled by fw_config
380 00:11:48.632615 PCI: 00:07.1 disabled by fw_config
381 00:11:48.635761 PCI: 00:0d.2 disabled by fw_config
382 00:11:48.642642 PCI: 00:1c.7 disabled by fw_config
383 00:11:48.646047 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
384 00:11:48.652164 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
385 00:11:48.655747 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
386 00:11:48.662233 GENERIC: 0.0 disabled by fw_config
387 00:11:48.665811 GENERIC: 1.0 disabled by fw_config
388 00:11:48.668846 fw_config match found: DB_USB=USB3_ACTIVE
389 00:11:48.672563 fw_config match found: DB_USB=USB3_ACTIVE
390 00:11:48.675611 fw_config match found: DB_USB=USB3_ACTIVE
391 00:11:48.682402 fw_config match found: DB_USB=USB3_ACTIVE
392 00:11:48.685562 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
393 00:11:48.692289 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
394 00:11:48.701910 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
395 00:11:48.708538 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
396 00:11:48.712103 microcode: sig=0x806c1 pf=0x80 revision=0x86
397 00:11:48.718618 microcode: Update skipped, already up-to-date
398 00:11:48.725330 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
399 00:11:48.753096 Detected 4 core, 8 thread CPU.
400 00:11:48.756620 Setting up SMI for CPU
401 00:11:48.759621 IED base = 0x7b400000
402 00:11:48.759746 IED size = 0x00400000
403 00:11:48.762901 Will perform SMM setup.
404 00:11:48.769764 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
405 00:11:48.775945 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
406 00:11:48.782610 Processing 16 relocs. Offset value of 0x00030000
407 00:11:48.786375 Attempting to start 7 APs
408 00:11:48.789533 Waiting for 10ms after sending INIT.
409 00:11:48.804885 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
410 00:11:48.807987 AP: slot 7 apic_id 3.
411 00:11:48.811539 AP: slot 2 apic_id 5.
412 00:11:48.811629 AP: slot 5 apic_id 4.
413 00:11:48.811702 done.
414 00:11:48.814594 AP: slot 4 apic_id 2.
415 00:11:48.818239 AP: slot 3 apic_id 7.
416 00:11:48.818345 AP: slot 6 apic_id 6.
417 00:11:48.824798 Waiting for 2nd SIPI to complete...done.
418 00:11:48.831463 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
419 00:11:48.837875 Processing 13 relocs. Offset value of 0x00038000
420 00:11:48.837967 Unable to locate Global NVS
421 00:11:48.848277 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
422 00:11:48.851258 Installing permanent SMM handler to 0x7b000000
423 00:11:48.861515 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
424 00:11:48.864667 Processing 794 relocs. Offset value of 0x7b010000
425 00:11:48.874790 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
426 00:11:48.877788 Processing 13 relocs. Offset value of 0x7b008000
427 00:11:48.884491 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
428 00:11:48.891479 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
429 00:11:48.894289 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
430 00:11:48.900937 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
431 00:11:48.908198 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
432 00:11:48.914426 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
433 00:11:48.920964 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
434 00:11:48.921065 Unable to locate Global NVS
435 00:11:48.931066 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
436 00:11:48.933968 Clearing SMI status registers
437 00:11:48.934089 SMI_STS: PM1
438 00:11:48.937644 PM1_STS: PWRBTN
439 00:11:48.944400 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
440 00:11:48.947889 In relocation handler: CPU 0
441 00:11:48.951138 New SMBASE=0x7b000000 IEDBASE=0x7b400000
442 00:11:48.957451 Writing SMRR. base = 0x7b000006, mask=0xff800c00
443 00:11:48.957544 Relocation complete.
444 00:11:48.967639 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
445 00:11:48.967732 In relocation handler: CPU 1
446 00:11:48.974346 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
447 00:11:48.974474 Relocation complete.
448 00:11:48.983724 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
449 00:11:48.983817 In relocation handler: CPU 4
450 00:11:48.990803 New SMBASE=0x7afff000 IEDBASE=0x7b400000
451 00:11:48.994001 Writing SMRR. base = 0x7b000006, mask=0xff800c00
452 00:11:48.997351 Relocation complete.
453 00:11:49.004200 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
454 00:11:49.007263 In relocation handler: CPU 7
455 00:11:49.010961 New SMBASE=0x7affe400 IEDBASE=0x7b400000
456 00:11:49.013812 Relocation complete.
457 00:11:49.020807 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
458 00:11:49.023765 In relocation handler: CPU 2
459 00:11:49.027342 New SMBASE=0x7afff800 IEDBASE=0x7b400000
460 00:11:49.030392 Relocation complete.
461 00:11:49.037567 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
462 00:11:49.040362 In relocation handler: CPU 5
463 00:11:49.044067 New SMBASE=0x7affec00 IEDBASE=0x7b400000
464 00:11:49.047224 Writing SMRR. base = 0x7b000006, mask=0xff800c00
465 00:11:49.050761 Relocation complete.
466 00:11:49.057248 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
467 00:11:49.060625 In relocation handler: CPU 3
468 00:11:49.063859 New SMBASE=0x7afff400 IEDBASE=0x7b400000
469 00:11:49.067105 Relocation complete.
470 00:11:49.073799 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
471 00:11:49.077438 In relocation handler: CPU 6
472 00:11:49.080354 New SMBASE=0x7affe800 IEDBASE=0x7b400000
473 00:11:49.087615 Writing SMRR. base = 0x7b000006, mask=0xff800c00
474 00:11:49.087708 Relocation complete.
475 00:11:49.090514 Initializing CPU #0
476 00:11:49.093606 CPU: vendor Intel device 806c1
477 00:11:49.097206 CPU: family 06, model 8c, stepping 01
478 00:11:49.100134 Clearing out pending MCEs
479 00:11:49.103659 Setting up local APIC...
480 00:11:49.103788 apic_id: 0x00 done.
481 00:11:49.107131 Turbo is available but hidden
482 00:11:49.110352 Turbo is available and visible
483 00:11:49.116964 microcode: Update skipped, already up-to-date
484 00:11:49.117050 CPU #0 initialized
485 00:11:49.120487 Initializing CPU #7
486 00:11:49.123903 Initializing CPU #1
487 00:11:49.123992 Initializing CPU #4
488 00:11:49.126831 CPU: vendor Intel device 806c1
489 00:11:49.130489 CPU: family 06, model 8c, stepping 01
490 00:11:49.133551 CPU: vendor Intel device 806c1
491 00:11:49.137141 CPU: family 06, model 8c, stepping 01
492 00:11:49.140681 Clearing out pending MCEs
493 00:11:49.143627 Clearing out pending MCEs
494 00:11:49.147187 Setting up local APIC...
495 00:11:49.147280 Setting up local APIC...
496 00:11:49.150324 Initializing CPU #3
497 00:11:49.153954 Initializing CPU #6
498 00:11:49.156786 CPU: vendor Intel device 806c1
499 00:11:49.160222 CPU: family 06, model 8c, stepping 01
500 00:11:49.163382 CPU: vendor Intel device 806c1
501 00:11:49.166965 CPU: family 06, model 8c, stepping 01
502 00:11:49.170880 CPU: vendor Intel device 806c1
503 00:11:49.174910 CPU: family 06, model 8c, stepping 01
504 00:11:49.175003 apic_id: 0x02 done.
505 00:11:49.178337 apic_id: 0x03 done.
506 00:11:49.181594 microcode: Update skipped, already up-to-date
507 00:11:49.188253 microcode: Update skipped, already up-to-date
508 00:11:49.188346 CPU #4 initialized
509 00:11:49.191628 Initializing CPU #5
510 00:11:49.191720 Initializing CPU #2
511 00:11:49.194718 CPU #7 initialized
512 00:11:49.198339 Clearing out pending MCEs
513 00:11:49.201383 Clearing out pending MCEs
514 00:11:49.201475 Clearing out pending MCEs
515 00:11:49.204808 Setting up local APIC...
516 00:11:49.208260 CPU: vendor Intel device 806c1
517 00:11:49.211723 CPU: family 06, model 8c, stepping 01
518 00:11:49.214578 CPU: vendor Intel device 806c1
519 00:11:49.218172 CPU: family 06, model 8c, stepping 01
520 00:11:49.221179 Clearing out pending MCEs
521 00:11:49.224746 Clearing out pending MCEs
522 00:11:49.228176 Setting up local APIC...
523 00:11:49.228268 apic_id: 0x06 done.
524 00:11:49.231166 Setting up local APIC...
525 00:11:49.234988 Setting up local APIC...
526 00:11:49.237836 Setting up local APIC...
527 00:11:49.237928 apic_id: 0x07 done.
528 00:11:49.244559 microcode: Update skipped, already up-to-date
529 00:11:49.244651 apic_id: 0x01 done.
530 00:11:49.247996 apic_id: 0x04 done.
531 00:11:49.251025 apic_id: 0x05 done.
532 00:11:49.254812 microcode: Update skipped, already up-to-date
533 00:11:49.257856 microcode: Update skipped, already up-to-date
534 00:11:49.261550 CPU #5 initialized
535 00:11:49.264218 CPU #2 initialized
536 00:11:49.268089 microcode: Update skipped, already up-to-date
537 00:11:49.271020 CPU #6 initialized
538 00:11:49.271111 CPU #3 initialized
539 00:11:49.278071 microcode: Update skipped, already up-to-date
540 00:11:49.278164 CPU #1 initialized
541 00:11:49.281550 bsp_do_flight_plan done after 454 msecs.
542 00:11:49.284570 CPU: frequency set to 4400 MHz
543 00:11:49.288068 Enabling SMIs.
544 00:11:49.294367 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
545 00:11:49.309360 SATAXPCIE1 indicates PCIe NVMe is present
546 00:11:49.312813 Probing TPM: done!
547 00:11:49.316363 Connected to device vid:did:rid of 1ae0:0028:00
548 00:11:49.326843 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
549 00:11:49.330747 Initialized TPM device CR50 revision 0
550 00:11:49.333619 Enabling S0i3.4
551 00:11:49.340221 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
552 00:11:49.343797 Found a VBT of 8704 bytes after decompression
553 00:11:49.350336 cse_lite: CSE RO boot. HybridStorageMode disabled
554 00:11:49.357041 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
555 00:11:49.431106 FSPS returned 0
556 00:11:49.434069 Executing Phase 1 of FspMultiPhaseSiInit
557 00:11:49.444131 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
558 00:11:49.447697 port C0 DISC req: usage 1 usb3 1 usb2 5
559 00:11:49.450732 Raw Buffer output 0 00000511
560 00:11:49.454220 Raw Buffer output 1 00000000
561 00:11:49.457976 pmc_send_ipc_cmd succeeded
562 00:11:49.464611 port C1 DISC req: usage 1 usb3 2 usb2 3
563 00:11:49.464711 Raw Buffer output 0 00000321
564 00:11:49.467683 Raw Buffer output 1 00000000
565 00:11:49.472408 pmc_send_ipc_cmd succeeded
566 00:11:49.477059 Detected 4 core, 8 thread CPU.
567 00:11:49.480749 Detected 4 core, 8 thread CPU.
568 00:11:49.680794 Display FSP Version Info HOB
569 00:11:49.684157 Reference Code - CPU = a.0.4c.31
570 00:11:49.687267 uCode Version = 0.0.0.86
571 00:11:49.690861 TXT ACM version = ff.ff.ff.ffff
572 00:11:49.693769 Reference Code - ME = a.0.4c.31
573 00:11:49.697414 MEBx version = 0.0.0.0
574 00:11:49.700366 ME Firmware Version = Consumer SKU
575 00:11:49.704038 Reference Code - PCH = a.0.4c.31
576 00:11:49.706972 PCH-CRID Status = Disabled
577 00:11:49.710502 PCH-CRID Original Value = ff.ff.ff.ffff
578 00:11:49.713819 PCH-CRID New Value = ff.ff.ff.ffff
579 00:11:49.717545 OPROM - RST - RAID = ff.ff.ff.ffff
580 00:11:49.720315 PCH Hsio Version = 4.0.0.0
581 00:11:49.723719 Reference Code - SA - System Agent = a.0.4c.31
582 00:11:49.727335 Reference Code - MRC = 2.0.0.1
583 00:11:49.730388 SA - PCIe Version = a.0.4c.31
584 00:11:49.734028 SA-CRID Status = Disabled
585 00:11:49.737242 SA-CRID Original Value = 0.0.0.1
586 00:11:49.740636 SA-CRID New Value = 0.0.0.1
587 00:11:49.743570 OPROM - VBIOS = ff.ff.ff.ffff
588 00:11:49.746786 IO Manageability Engine FW Version = 11.1.4.0
589 00:11:49.750524 PHY Build Version = 0.0.0.e0
590 00:11:49.754751 Thunderbolt(TM) FW Version = 0.0.0.0
591 00:11:49.761097 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
592 00:11:49.761189 ITSS IRQ Polarities Before:
593 00:11:49.764349 IPC0: 0xffffffff
594 00:11:49.767793 IPC1: 0xffffffff
595 00:11:49.767887 IPC2: 0xffffffff
596 00:11:49.771474 IPC3: 0xffffffff
597 00:11:49.771561 ITSS IRQ Polarities After:
598 00:11:49.774779 IPC0: 0xffffffff
599 00:11:49.774862 IPC1: 0xffffffff
600 00:11:49.777620 IPC2: 0xffffffff
601 00:11:49.781128 IPC3: 0xffffffff
602 00:11:49.784753 Found PCIe Root Port #9 at PCI: 00:1d.0.
603 00:11:49.794279 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
604 00:11:49.807826 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
605 00:11:49.821125 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
606 00:11:49.827778 BS: BS_DEV_INIT_CHIPS run times (exec / console): 290 / 236 ms
607 00:11:49.827906 Enumerating buses...
608 00:11:49.834449 Show all devs... Before device enumeration.
609 00:11:49.834542 Root Device: enabled 1
610 00:11:49.837510 DOMAIN: 0000: enabled 1
611 00:11:49.841185 CPU_CLUSTER: 0: enabled 1
612 00:11:49.841279 PCI: 00:00.0: enabled 1
613 00:11:49.844227 PCI: 00:02.0: enabled 1
614 00:11:49.847770 PCI: 00:04.0: enabled 1
615 00:11:49.851258 PCI: 00:05.0: enabled 1
616 00:11:49.851350 PCI: 00:06.0: enabled 0
617 00:11:49.854029 PCI: 00:07.0: enabled 0
618 00:11:49.857830 PCI: 00:07.1: enabled 0
619 00:11:49.860775 PCI: 00:07.2: enabled 0
620 00:11:49.860867 PCI: 00:07.3: enabled 0
621 00:11:49.864166 PCI: 00:08.0: enabled 1
622 00:11:49.867786 PCI: 00:09.0: enabled 0
623 00:11:49.871512 PCI: 00:0a.0: enabled 0
624 00:11:49.871604 PCI: 00:0d.0: enabled 1
625 00:11:49.874128 PCI: 00:0d.1: enabled 0
626 00:11:49.877345 PCI: 00:0d.2: enabled 0
627 00:11:49.877438 PCI: 00:0d.3: enabled 0
628 00:11:49.881002 PCI: 00:0e.0: enabled 0
629 00:11:49.884027 PCI: 00:10.2: enabled 1
630 00:11:49.887665 PCI: 00:10.6: enabled 0
631 00:11:49.887757 PCI: 00:10.7: enabled 0
632 00:11:49.891108 PCI: 00:12.0: enabled 0
633 00:11:49.894398 PCI: 00:12.6: enabled 0
634 00:11:49.897637 PCI: 00:13.0: enabled 0
635 00:11:49.897759 PCI: 00:14.0: enabled 1
636 00:11:49.900621 PCI: 00:14.1: enabled 0
637 00:11:49.904246 PCI: 00:14.2: enabled 1
638 00:11:49.907283 PCI: 00:14.3: enabled 1
639 00:11:49.907375 PCI: 00:15.0: enabled 1
640 00:11:49.910973 PCI: 00:15.1: enabled 1
641 00:11:49.914005 PCI: 00:15.2: enabled 1
642 00:11:49.917718 PCI: 00:15.3: enabled 1
643 00:11:49.917811 PCI: 00:16.0: enabled 1
644 00:11:49.920636 PCI: 00:16.1: enabled 0
645 00:11:49.924018 PCI: 00:16.2: enabled 0
646 00:11:49.924111 PCI: 00:16.3: enabled 0
647 00:11:49.927329 PCI: 00:16.4: enabled 0
648 00:11:49.930939 PCI: 00:16.5: enabled 0
649 00:11:49.933854 PCI: 00:17.0: enabled 1
650 00:11:49.933947 PCI: 00:19.0: enabled 0
651 00:11:49.936968 PCI: 00:19.1: enabled 1
652 00:11:49.940590 PCI: 00:19.2: enabled 0
653 00:11:49.943587 PCI: 00:1c.0: enabled 1
654 00:11:49.943679 PCI: 00:1c.1: enabled 0
655 00:11:49.947287 PCI: 00:1c.2: enabled 0
656 00:11:49.950278 PCI: 00:1c.3: enabled 0
657 00:11:49.953721 PCI: 00:1c.4: enabled 0
658 00:11:49.953814 PCI: 00:1c.5: enabled 0
659 00:11:49.957422 PCI: 00:1c.6: enabled 1
660 00:11:49.960339 PCI: 00:1c.7: enabled 0
661 00:11:49.963743 PCI: 00:1d.0: enabled 1
662 00:11:49.963841 PCI: 00:1d.1: enabled 0
663 00:11:49.966766 PCI: 00:1d.2: enabled 1
664 00:11:49.970119 PCI: 00:1d.3: enabled 0
665 00:11:49.973723 PCI: 00:1e.0: enabled 1
666 00:11:49.973808 PCI: 00:1e.1: enabled 0
667 00:11:49.976884 PCI: 00:1e.2: enabled 1
668 00:11:49.980441 PCI: 00:1e.3: enabled 1
669 00:11:49.980532 PCI: 00:1f.0: enabled 1
670 00:11:49.983402 PCI: 00:1f.1: enabled 0
671 00:11:49.986975 PCI: 00:1f.2: enabled 1
672 00:11:49.990365 PCI: 00:1f.3: enabled 1
673 00:11:49.990480 PCI: 00:1f.4: enabled 0
674 00:11:49.993649 PCI: 00:1f.5: enabled 1
675 00:11:49.996515 PCI: 00:1f.6: enabled 0
676 00:11:49.999853 PCI: 00:1f.7: enabled 0
677 00:11:49.999961 APIC: 00: enabled 1
678 00:11:50.003366 GENERIC: 0.0: enabled 1
679 00:11:50.006537 GENERIC: 0.0: enabled 1
680 00:11:50.006655 GENERIC: 1.0: enabled 1
681 00:11:50.010236 GENERIC: 0.0: enabled 1
682 00:11:50.013152 GENERIC: 1.0: enabled 1
683 00:11:50.016635 USB0 port 0: enabled 1
684 00:11:50.016781 GENERIC: 0.0: enabled 1
685 00:11:50.020261 USB0 port 0: enabled 1
686 00:11:50.023230 GENERIC: 0.0: enabled 1
687 00:11:50.023378 I2C: 00:1a: enabled 1
688 00:11:50.026996 I2C: 00:31: enabled 1
689 00:11:50.029822 I2C: 00:32: enabled 1
690 00:11:50.033040 I2C: 00:10: enabled 1
691 00:11:50.033331 I2C: 00:15: enabled 1
692 00:11:50.036402 GENERIC: 0.0: enabled 0
693 00:11:50.039854 GENERIC: 1.0: enabled 0
694 00:11:50.040269 GENERIC: 0.0: enabled 1
695 00:11:50.043665 SPI: 00: enabled 1
696 00:11:50.046666 SPI: 00: enabled 1
697 00:11:50.047243 PNP: 0c09.0: enabled 1
698 00:11:50.049653 GENERIC: 0.0: enabled 1
699 00:11:50.053310 USB3 port 0: enabled 1
700 00:11:50.053793 USB3 port 1: enabled 1
701 00:11:50.056930 USB3 port 2: enabled 0
702 00:11:50.059957 USB3 port 3: enabled 0
703 00:11:50.063530 USB2 port 0: enabled 0
704 00:11:50.064099 USB2 port 1: enabled 1
705 00:11:50.066557 USB2 port 2: enabled 1
706 00:11:50.069981 USB2 port 3: enabled 0
707 00:11:50.070594 USB2 port 4: enabled 1
708 00:11:50.073219 USB2 port 5: enabled 0
709 00:11:50.076397 USB2 port 6: enabled 0
710 00:11:50.080014 USB2 port 7: enabled 0
711 00:11:50.080574 USB2 port 8: enabled 0
712 00:11:50.083482 USB2 port 9: enabled 0
713 00:11:50.086504 USB3 port 0: enabled 0
714 00:11:50.086879 USB3 port 1: enabled 1
715 00:11:50.089498 USB3 port 2: enabled 0
716 00:11:50.093152 USB3 port 3: enabled 0
717 00:11:50.096068 GENERIC: 0.0: enabled 1
718 00:11:50.096662 GENERIC: 1.0: enabled 1
719 00:11:50.099413 APIC: 01: enabled 1
720 00:11:50.102649 APIC: 05: enabled 1
721 00:11:50.103198 APIC: 07: enabled 1
722 00:11:50.106168 APIC: 02: enabled 1
723 00:11:50.106906 APIC: 04: enabled 1
724 00:11:50.109442 APIC: 06: enabled 1
725 00:11:50.113131 APIC: 03: enabled 1
726 00:11:50.113731 Compare with tree...
727 00:11:50.116034 Root Device: enabled 1
728 00:11:50.119476 DOMAIN: 0000: enabled 1
729 00:11:50.122761 PCI: 00:00.0: enabled 1
730 00:11:50.123182 PCI: 00:02.0: enabled 1
731 00:11:50.126255 PCI: 00:04.0: enabled 1
732 00:11:50.129537 GENERIC: 0.0: enabled 1
733 00:11:50.133104 PCI: 00:05.0: enabled 1
734 00:11:50.135904 PCI: 00:06.0: enabled 0
735 00:11:50.136376 PCI: 00:07.0: enabled 0
736 00:11:50.139161 GENERIC: 0.0: enabled 1
737 00:11:50.142408 PCI: 00:07.1: enabled 0
738 00:11:50.146050 GENERIC: 1.0: enabled 1
739 00:11:50.149736 PCI: 00:07.2: enabled 0
740 00:11:50.150189 GENERIC: 0.0: enabled 1
741 00:11:50.152756 PCI: 00:07.3: enabled 0
742 00:11:50.155836 GENERIC: 1.0: enabled 1
743 00:11:50.159506 PCI: 00:08.0: enabled 1
744 00:11:50.162474 PCI: 00:09.0: enabled 0
745 00:11:50.162919 PCI: 00:0a.0: enabled 0
746 00:11:50.166191 PCI: 00:0d.0: enabled 1
747 00:11:50.169158 USB0 port 0: enabled 1
748 00:11:50.172787 USB3 port 0: enabled 1
749 00:11:50.175907 USB3 port 1: enabled 1
750 00:11:50.176291 USB3 port 2: enabled 0
751 00:11:50.179548 USB3 port 3: enabled 0
752 00:11:50.182988 PCI: 00:0d.1: enabled 0
753 00:11:50.186201 PCI: 00:0d.2: enabled 0
754 00:11:50.189219 GENERIC: 0.0: enabled 1
755 00:11:50.189644 PCI: 00:0d.3: enabled 0
756 00:11:50.192956 PCI: 00:0e.0: enabled 0
757 00:11:50.196038 PCI: 00:10.2: enabled 1
758 00:11:50.199015 PCI: 00:10.6: enabled 0
759 00:11:50.202833 PCI: 00:10.7: enabled 0
760 00:11:50.203352 PCI: 00:12.0: enabled 0
761 00:11:50.205554 PCI: 00:12.6: enabled 0
762 00:11:50.208918 PCI: 00:13.0: enabled 0
763 00:11:50.212259 PCI: 00:14.0: enabled 1
764 00:11:50.215634 USB0 port 0: enabled 1
765 00:11:50.216059 USB2 port 0: enabled 0
766 00:11:50.219211 USB2 port 1: enabled 1
767 00:11:50.222156 USB2 port 2: enabled 1
768 00:11:50.225929 USB2 port 3: enabled 0
769 00:11:50.229306 USB2 port 4: enabled 1
770 00:11:50.232747 USB2 port 5: enabled 0
771 00:11:50.233190 USB2 port 6: enabled 0
772 00:11:50.235873 USB2 port 7: enabled 0
773 00:11:50.239145 USB2 port 8: enabled 0
774 00:11:50.242247 USB2 port 9: enabled 0
775 00:11:50.245443 USB3 port 0: enabled 0
776 00:11:50.245863 USB3 port 1: enabled 1
777 00:11:50.249083 USB3 port 2: enabled 0
778 00:11:50.252293 USB3 port 3: enabled 0
779 00:11:50.255538 PCI: 00:14.1: enabled 0
780 00:11:50.259182 PCI: 00:14.2: enabled 1
781 00:11:50.262635 PCI: 00:14.3: enabled 1
782 00:11:50.263054 GENERIC: 0.0: enabled 1
783 00:11:50.265472 PCI: 00:15.0: enabled 1
784 00:11:50.269156 I2C: 00:1a: enabled 1
785 00:11:50.272278 I2C: 00:31: enabled 1
786 00:11:50.272701 I2C: 00:32: enabled 1
787 00:11:50.275919 PCI: 00:15.1: enabled 1
788 00:11:50.279122 I2C: 00:10: enabled 1
789 00:11:50.282487 PCI: 00:15.2: enabled 1
790 00:11:50.285487 PCI: 00:15.3: enabled 1
791 00:11:50.285908 PCI: 00:16.0: enabled 1
792 00:11:50.289073 PCI: 00:16.1: enabled 0
793 00:11:50.292407 PCI: 00:16.2: enabled 0
794 00:11:50.295771 PCI: 00:16.3: enabled 0
795 00:11:50.299021 PCI: 00:16.4: enabled 0
796 00:11:50.299441 PCI: 00:16.5: enabled 0
797 00:11:50.301879 PCI: 00:17.0: enabled 1
798 00:11:50.305472 PCI: 00:19.0: enabled 0
799 00:11:50.308832 PCI: 00:19.1: enabled 1
800 00:11:50.309253 I2C: 00:15: enabled 1
801 00:11:50.312265 PCI: 00:19.2: enabled 0
802 00:11:50.315240 PCI: 00:1d.0: enabled 1
803 00:11:50.318845 GENERIC: 0.0: enabled 1
804 00:11:50.322027 PCI: 00:1e.0: enabled 1
805 00:11:50.322503 PCI: 00:1e.1: enabled 0
806 00:11:50.325524 PCI: 00:1e.2: enabled 1
807 00:11:50.328442 SPI: 00: enabled 1
808 00:11:50.332200 PCI: 00:1e.3: enabled 1
809 00:11:50.332621 SPI: 00: enabled 1
810 00:11:50.335280 PCI: 00:1f.0: enabled 1
811 00:11:50.338697 PNP: 0c09.0: enabled 1
812 00:11:50.342124 PCI: 00:1f.1: enabled 0
813 00:11:50.345094 PCI: 00:1f.2: enabled 1
814 00:11:50.345514 GENERIC: 0.0: enabled 1
815 00:11:50.348690 GENERIC: 0.0: enabled 1
816 00:11:50.351679 GENERIC: 1.0: enabled 1
817 00:11:50.354977 PCI: 00:1f.3: enabled 1
818 00:11:50.358816 PCI: 00:1f.4: enabled 0
819 00:11:50.361945 PCI: 00:1f.5: enabled 1
820 00:11:50.362395 PCI: 00:1f.6: enabled 0
821 00:11:50.365241 PCI: 00:1f.7: enabled 0
822 00:11:50.368325 CPU_CLUSTER: 0: enabled 1
823 00:11:50.420553 APIC: 00: enabled 1
824 00:11:50.421134 APIC: 01: enabled 1
825 00:11:50.421549 APIC: 05: enabled 1
826 00:11:50.421930 APIC: 07: enabled 1
827 00:11:50.422298 APIC: 02: enabled 1
828 00:11:50.422716 APIC: 04: enabled 1
829 00:11:50.423428 APIC: 06: enabled 1
830 00:11:50.423823 APIC: 03: enabled 1
831 00:11:50.424268 Root Device scanning...
832 00:11:50.424629 scan_static_bus for Root Device
833 00:11:50.424987 DOMAIN: 0000 enabled
834 00:11:50.425342 CPU_CLUSTER: 0 enabled
835 00:11:50.425672 DOMAIN: 0000 scanning...
836 00:11:50.426023 PCI: pci_scan_bus for bus 00
837 00:11:50.426388 PCI: 00:00.0 [8086/0000] ops
838 00:11:50.426793 PCI: 00:00.0 [8086/9a12] enabled
839 00:11:50.427147 PCI: 00:02.0 [8086/0000] bus ops
840 00:11:50.427522 PCI: 00:02.0 [8086/9a40] enabled
841 00:11:50.427872 PCI: 00:04.0 [8086/0000] bus ops
842 00:11:50.464419 PCI: 00:04.0 [8086/9a03] enabled
843 00:11:50.465157 PCI: 00:05.0 [8086/9a19] enabled
844 00:11:50.466027 PCI: 00:07.0 [0000/0000] hidden
845 00:11:50.466578 PCI: 00:08.0 [8086/9a11] enabled
846 00:11:50.467057 PCI: 00:0a.0 [8086/9a0d] disabled
847 00:11:50.467517 PCI: 00:0d.0 [8086/0000] bus ops
848 00:11:50.467969 PCI: 00:0d.0 [8086/9a13] enabled
849 00:11:50.468416 PCI: 00:14.0 [8086/0000] bus ops
850 00:11:50.468864 PCI: 00:14.0 [8086/a0ed] enabled
851 00:11:50.469236 PCI: 00:14.2 [8086/a0ef] enabled
852 00:11:50.469536 PCI: 00:14.3 [8086/0000] bus ops
853 00:11:50.469830 PCI: 00:14.3 [8086/a0f0] enabled
854 00:11:50.470119 PCI: 00:15.0 [8086/0000] bus ops
855 00:11:50.470521 PCI: 00:15.0 [8086/a0e8] enabled
856 00:11:50.470839 PCI: 00:15.1 [8086/0000] bus ops
857 00:11:50.472195 PCI: 00:15.1 [8086/a0e9] enabled
858 00:11:50.475374 PCI: 00:15.2 [8086/0000] bus ops
859 00:11:50.479019 PCI: 00:15.2 [8086/a0ea] enabled
860 00:11:50.482062 PCI: 00:15.3 [8086/0000] bus ops
861 00:11:50.485537 PCI: 00:15.3 [8086/a0eb] enabled
862 00:11:50.488644 PCI: 00:16.0 [8086/0000] ops
863 00:11:50.492264 PCI: 00:16.0 [8086/a0e0] enabled
864 00:11:50.498933 PCI: Static device PCI: 00:17.0 not found, disabling it.
865 00:11:50.501944 PCI: 00:19.0 [8086/0000] bus ops
866 00:11:50.505400 PCI: 00:19.0 [8086/a0c5] disabled
867 00:11:50.508936 PCI: 00:19.1 [8086/0000] bus ops
868 00:11:50.512118 PCI: 00:19.1 [8086/a0c6] enabled
869 00:11:50.515752 PCI: 00:1d.0 [8086/0000] bus ops
870 00:11:50.518520 PCI: 00:1d.0 [8086/a0b0] enabled
871 00:11:50.521922 PCI: 00:1e.0 [8086/0000] ops
872 00:11:50.525730 PCI: 00:1e.0 [8086/a0a8] enabled
873 00:11:50.528890 PCI: 00:1e.2 [8086/0000] bus ops
874 00:11:50.532237 PCI: 00:1e.2 [8086/a0aa] enabled
875 00:11:50.535040 PCI: 00:1e.3 [8086/0000] bus ops
876 00:11:50.538899 PCI: 00:1e.3 [8086/a0ab] enabled
877 00:11:50.541742 PCI: 00:1f.0 [8086/0000] bus ops
878 00:11:50.545461 PCI: 00:1f.0 [8086/a087] enabled
879 00:11:50.545943 RTC Init
880 00:11:50.548941 Set power on after power failure.
881 00:11:50.552133 Disabling Deep S3
882 00:11:50.552652 Disabling Deep S3
883 00:11:50.555066 Disabling Deep S4
884 00:11:50.558852 Disabling Deep S4
885 00:11:50.559477 Disabling Deep S5
886 00:11:50.561796 Disabling Deep S5
887 00:11:50.565507 PCI: 00:1f.2 [0000/0000] hidden
888 00:11:50.568538 PCI: 00:1f.3 [8086/0000] bus ops
889 00:11:50.571920 PCI: 00:1f.3 [8086/a0c8] enabled
890 00:11:50.575189 PCI: 00:1f.5 [8086/0000] bus ops
891 00:11:50.578882 PCI: 00:1f.5 [8086/a0a4] enabled
892 00:11:50.582030 PCI: Leftover static devices:
893 00:11:50.582510 PCI: 00:10.2
894 00:11:50.582907 PCI: 00:10.6
895 00:11:50.585398 PCI: 00:10.7
896 00:11:50.585930 PCI: 00:06.0
897 00:11:50.588651 PCI: 00:07.1
898 00:11:50.589377 PCI: 00:07.2
899 00:11:50.589808 PCI: 00:07.3
900 00:11:50.591874 PCI: 00:09.0
901 00:11:50.592332 PCI: 00:0d.1
902 00:11:50.595182 PCI: 00:0d.2
903 00:11:50.595576 PCI: 00:0d.3
904 00:11:50.599053 PCI: 00:0e.0
905 00:11:50.599511 PCI: 00:12.0
906 00:11:50.599913 PCI: 00:12.6
907 00:11:50.601833 PCI: 00:13.0
908 00:11:50.602261 PCI: 00:14.1
909 00:11:50.605385 PCI: 00:16.1
910 00:11:50.605811 PCI: 00:16.2
911 00:11:50.606174 PCI: 00:16.3
912 00:11:50.608316 PCI: 00:16.4
913 00:11:50.608742 PCI: 00:16.5
914 00:11:50.611996 PCI: 00:17.0
915 00:11:50.612420 PCI: 00:19.2
916 00:11:50.612757 PCI: 00:1e.1
917 00:11:50.614957 PCI: 00:1f.1
918 00:11:50.615398 PCI: 00:1f.4
919 00:11:50.618745 PCI: 00:1f.6
920 00:11:50.619182 PCI: 00:1f.7
921 00:11:50.621746 PCI: Check your devicetree.cb.
922 00:11:50.625402 PCI: 00:02.0 scanning...
923 00:11:50.628280 scan_generic_bus for PCI: 00:02.0
924 00:11:50.631650 scan_generic_bus for PCI: 00:02.0 done
925 00:11:50.638304 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
926 00:11:50.638818 PCI: 00:04.0 scanning...
927 00:11:50.641753 scan_generic_bus for PCI: 00:04.0
928 00:11:50.644819 GENERIC: 0.0 enabled
929 00:11:50.651837 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
930 00:11:50.654966 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
931 00:11:50.657894 PCI: 00:0d.0 scanning...
932 00:11:50.661492 scan_static_bus for PCI: 00:0d.0
933 00:11:50.664575 USB0 port 0 enabled
934 00:11:50.664665 USB0 port 0 scanning...
935 00:11:50.668192 scan_static_bus for USB0 port 0
936 00:11:50.671290 USB3 port 0 enabled
937 00:11:50.675006 USB3 port 1 enabled
938 00:11:50.675096 USB3 port 2 disabled
939 00:11:50.678255 USB3 port 3 disabled
940 00:11:50.681583 USB3 port 0 scanning...
941 00:11:50.684724 scan_static_bus for USB3 port 0
942 00:11:50.688282 scan_static_bus for USB3 port 0 done
943 00:11:50.691380 scan_bus: bus USB3 port 0 finished in 6 msecs
944 00:11:50.694717 USB3 port 1 scanning...
945 00:11:50.698039 scan_static_bus for USB3 port 1
946 00:11:50.701524 scan_static_bus for USB3 port 1 done
947 00:11:50.708244 scan_bus: bus USB3 port 1 finished in 6 msecs
948 00:11:50.711335 scan_static_bus for USB0 port 0 done
949 00:11:50.714980 scan_bus: bus USB0 port 0 finished in 43 msecs
950 00:11:50.717935 scan_static_bus for PCI: 00:0d.0 done
951 00:11:50.724507 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
952 00:11:50.724601 PCI: 00:14.0 scanning...
953 00:11:50.728220 scan_static_bus for PCI: 00:14.0
954 00:11:50.731249 USB0 port 0 enabled
955 00:11:50.734829 USB0 port 0 scanning...
956 00:11:50.737929 scan_static_bus for USB0 port 0
957 00:11:50.738053 USB2 port 0 disabled
958 00:11:50.741054 USB2 port 1 enabled
959 00:11:50.744837 USB2 port 2 enabled
960 00:11:50.744954 USB2 port 3 disabled
961 00:11:50.748191 USB2 port 4 enabled
962 00:11:50.751422 USB2 port 5 disabled
963 00:11:50.751537 USB2 port 6 disabled
964 00:11:50.754505 USB2 port 7 disabled
965 00:11:50.757695 USB2 port 8 disabled
966 00:11:50.757807 USB2 port 9 disabled
967 00:11:50.760969 USB3 port 0 disabled
968 00:11:50.764756 USB3 port 1 enabled
969 00:11:50.764847 USB3 port 2 disabled
970 00:11:50.767803 USB3 port 3 disabled
971 00:11:50.771433 USB2 port 1 scanning...
972 00:11:50.774535 scan_static_bus for USB2 port 1
973 00:11:50.777662 scan_static_bus for USB2 port 1 done
974 00:11:50.781398 scan_bus: bus USB2 port 1 finished in 6 msecs
975 00:11:50.784363 USB2 port 2 scanning...
976 00:11:50.787726 scan_static_bus for USB2 port 2
977 00:11:50.791374 scan_static_bus for USB2 port 2 done
978 00:11:50.794027 scan_bus: bus USB2 port 2 finished in 6 msecs
979 00:11:50.797553 USB2 port 4 scanning...
980 00:11:50.800917 scan_static_bus for USB2 port 4
981 00:11:50.804336 scan_static_bus for USB2 port 4 done
982 00:11:50.810713 scan_bus: bus USB2 port 4 finished in 6 msecs
983 00:11:50.810839 USB3 port 1 scanning...
984 00:11:50.814148 scan_static_bus for USB3 port 1
985 00:11:50.820634 scan_static_bus for USB3 port 1 done
986 00:11:50.824366 scan_bus: bus USB3 port 1 finished in 6 msecs
987 00:11:50.827416 scan_static_bus for USB0 port 0 done
988 00:11:50.830483 scan_bus: bus USB0 port 0 finished in 93 msecs
989 00:11:50.837746 scan_static_bus for PCI: 00:14.0 done
990 00:11:50.840488 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
991 00:11:50.844115 PCI: 00:14.3 scanning...
992 00:11:50.847799 scan_static_bus for PCI: 00:14.3
993 00:11:50.850650 GENERIC: 0.0 enabled
994 00:11:50.854232 scan_static_bus for PCI: 00:14.3 done
995 00:11:50.857212 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
996 00:11:50.860623 PCI: 00:15.0 scanning...
997 00:11:50.864232 scan_static_bus for PCI: 00:15.0
998 00:11:50.867376 I2C: 00:1a enabled
999 00:11:50.867462 I2C: 00:31 enabled
1000 00:11:50.870540 I2C: 00:32 enabled
1001 00:11:50.873803 scan_static_bus for PCI: 00:15.0 done
1002 00:11:50.877199 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1003 00:11:50.880333 PCI: 00:15.1 scanning...
1004 00:11:50.884259 scan_static_bus for PCI: 00:15.1
1005 00:11:50.887255 I2C: 00:10 enabled
1006 00:11:50.890257 scan_static_bus for PCI: 00:15.1 done
1007 00:11:50.893785 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1008 00:11:50.897518 PCI: 00:15.2 scanning...
1009 00:11:50.900290 scan_static_bus for PCI: 00:15.2
1010 00:11:50.903453 scan_static_bus for PCI: 00:15.2 done
1011 00:11:50.910683 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1012 00:11:50.913792 PCI: 00:15.3 scanning...
1013 00:11:50.916640 scan_static_bus for PCI: 00:15.3
1014 00:11:50.920226 scan_static_bus for PCI: 00:15.3 done
1015 00:11:50.923757 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1016 00:11:50.926685 PCI: 00:19.1 scanning...
1017 00:11:50.930375 scan_static_bus for PCI: 00:19.1
1018 00:11:50.933591 I2C: 00:15 enabled
1019 00:11:50.936522 scan_static_bus for PCI: 00:19.1 done
1020 00:11:50.940224 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1021 00:11:50.943661 PCI: 00:1d.0 scanning...
1022 00:11:50.946564 do_pci_scan_bridge for PCI: 00:1d.0
1023 00:11:50.950358 PCI: pci_scan_bus for bus 01
1024 00:11:50.953270 PCI: 01:00.0 [15b7/5009] enabled
1025 00:11:50.956750 GENERIC: 0.0 enabled
1026 00:11:50.959847 Enabling Common Clock Configuration
1027 00:11:50.962863 L1 Sub-State supported from root port 29
1028 00:11:50.966420 L1 Sub-State Support = 0x5
1029 00:11:50.969868 CommonModeRestoreTime = 0x28
1030 00:11:50.973227 Power On Value = 0x16, Power On Scale = 0x0
1031 00:11:50.976588 ASPM: Enabled L1
1032 00:11:50.979801 PCIe: Max_Payload_Size adjusted to 128
1033 00:11:50.983218 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1034 00:11:50.986680 PCI: 00:1e.2 scanning...
1035 00:11:50.989785 scan_generic_bus for PCI: 00:1e.2
1036 00:11:50.992889 SPI: 00 enabled
1037 00:11:51.000173 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1038 00:11:51.003814 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1039 00:11:51.003906 PCI: 00:1e.3 scanning...
1040 00:11:51.010765 scan_generic_bus for PCI: 00:1e.3
1041 00:11:51.010856 SPI: 00 enabled
1042 00:11:51.017232 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1043 00:11:51.020490 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1044 00:11:51.023522 PCI: 00:1f.0 scanning...
1045 00:11:51.026909 scan_static_bus for PCI: 00:1f.0
1046 00:11:51.030288 PNP: 0c09.0 enabled
1047 00:11:51.030379 PNP: 0c09.0 scanning...
1048 00:11:51.033959 scan_static_bus for PNP: 0c09.0
1049 00:11:51.040664 scan_static_bus for PNP: 0c09.0 done
1050 00:11:51.043736 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1051 00:11:51.047358 scan_static_bus for PCI: 00:1f.0 done
1052 00:11:51.053762 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1053 00:11:51.053847 PCI: 00:1f.2 scanning...
1054 00:11:51.057354 scan_static_bus for PCI: 00:1f.2
1055 00:11:51.060301 GENERIC: 0.0 enabled
1056 00:11:51.063965 GENERIC: 0.0 scanning...
1057 00:11:51.067105 scan_static_bus for GENERIC: 0.0
1058 00:11:51.067187 GENERIC: 0.0 enabled
1059 00:11:51.070688 GENERIC: 1.0 enabled
1060 00:11:51.074068 scan_static_bus for GENERIC: 0.0 done
1061 00:11:51.080339 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1062 00:11:51.083935 scan_static_bus for PCI: 00:1f.2 done
1063 00:11:51.086935 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1064 00:11:51.090214 PCI: 00:1f.3 scanning...
1065 00:11:51.093743 scan_static_bus for PCI: 00:1f.3
1066 00:11:51.097037 scan_static_bus for PCI: 00:1f.3 done
1067 00:11:51.103874 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1068 00:11:51.103964 PCI: 00:1f.5 scanning...
1069 00:11:51.110254 scan_generic_bus for PCI: 00:1f.5
1070 00:11:51.113733 scan_generic_bus for PCI: 00:1f.5 done
1071 00:11:51.117362 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1072 00:11:51.124003 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1073 00:11:51.126814 scan_static_bus for Root Device done
1074 00:11:51.130105 scan_bus: bus Root Device finished in 736 msecs
1075 00:11:51.130205 done
1076 00:11:51.137240 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1077 00:11:51.140244 Chrome EC: UHEPI supported
1078 00:11:51.146872 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1079 00:11:51.153877 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1080 00:11:51.156933 SPI flash protection: WPSW=0 SRP0=1
1081 00:11:51.160552 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1082 00:11:51.166864 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1083 00:11:51.170348 found VGA at PCI: 00:02.0
1084 00:11:51.173376 Setting up VGA for PCI: 00:02.0
1085 00:11:51.179984 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1086 00:11:51.183518 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1087 00:11:51.186768 Allocating resources...
1088 00:11:51.186858 Reading resources...
1089 00:11:51.193816 Root Device read_resources bus 0 link: 0
1090 00:11:51.196652 DOMAIN: 0000 read_resources bus 0 link: 0
1091 00:11:51.200400 PCI: 00:04.0 read_resources bus 1 link: 0
1092 00:11:51.207267 PCI: 00:04.0 read_resources bus 1 link: 0 done
1093 00:11:51.210760 PCI: 00:0d.0 read_resources bus 0 link: 0
1094 00:11:51.217441 USB0 port 0 read_resources bus 0 link: 0
1095 00:11:51.220410 USB0 port 0 read_resources bus 0 link: 0 done
1096 00:11:51.226907 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1097 00:11:51.230546 PCI: 00:14.0 read_resources bus 0 link: 0
1098 00:11:51.233471 USB0 port 0 read_resources bus 0 link: 0
1099 00:11:51.241223 USB0 port 0 read_resources bus 0 link: 0 done
1100 00:11:51.244597 PCI: 00:14.0 read_resources bus 0 link: 0 done
1101 00:11:51.251694 PCI: 00:14.3 read_resources bus 0 link: 0
1102 00:11:51.254778 PCI: 00:14.3 read_resources bus 0 link: 0 done
1103 00:11:51.261297 PCI: 00:15.0 read_resources bus 0 link: 0
1104 00:11:51.264559 PCI: 00:15.0 read_resources bus 0 link: 0 done
1105 00:11:51.271600 PCI: 00:15.1 read_resources bus 0 link: 0
1106 00:11:51.274591 PCI: 00:15.1 read_resources bus 0 link: 0 done
1107 00:11:51.281885 PCI: 00:19.1 read_resources bus 0 link: 0
1108 00:11:51.285356 PCI: 00:19.1 read_resources bus 0 link: 0 done
1109 00:11:51.291619 PCI: 00:1d.0 read_resources bus 1 link: 0
1110 00:11:51.294910 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1111 00:11:51.301618 PCI: 00:1e.2 read_resources bus 2 link: 0
1112 00:11:51.304889 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1113 00:11:51.311710 PCI: 00:1e.3 read_resources bus 3 link: 0
1114 00:11:51.315249 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1115 00:11:51.321927 PCI: 00:1f.0 read_resources bus 0 link: 0
1116 00:11:51.325164 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1117 00:11:51.328016 PCI: 00:1f.2 read_resources bus 0 link: 0
1118 00:11:51.335173 GENERIC: 0.0 read_resources bus 0 link: 0
1119 00:11:51.338209 GENERIC: 0.0 read_resources bus 0 link: 0 done
1120 00:11:51.345137 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1121 00:11:51.351526 DOMAIN: 0000 read_resources bus 0 link: 0 done
1122 00:11:51.355119 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1123 00:11:51.358089 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1124 00:11:51.365005 Root Device read_resources bus 0 link: 0 done
1125 00:11:51.368613 Done reading resources.
1126 00:11:51.371509 Show resources in subtree (Root Device)...After reading.
1127 00:11:51.378750 Root Device child on link 0 DOMAIN: 0000
1128 00:11:51.381841 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1129 00:11:51.391902 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1130 00:11:51.401427 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1131 00:11:51.401519 PCI: 00:00.0
1132 00:11:51.411272 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1133 00:11:51.421675 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1134 00:11:51.431657 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1135 00:11:51.441216 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1136 00:11:51.448243 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1137 00:11:51.458263 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1138 00:11:51.467835 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1139 00:11:51.478087 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1140 00:11:51.487751 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1141 00:11:51.497681 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1142 00:11:51.504236 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1143 00:11:51.514304 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1144 00:11:51.524278 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1145 00:11:51.534431 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1146 00:11:51.544242 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1147 00:11:51.550610 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1148 00:11:51.560857 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1149 00:11:51.570487 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1150 00:11:51.580667 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1151 00:11:51.590567 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1152 00:11:51.590661 PCI: 00:02.0
1153 00:11:51.603725 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 00:11:51.613960 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1155 00:11:51.620201 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1156 00:11:51.627194 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1157 00:11:51.637073 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1158 00:11:51.637173 GENERIC: 0.0
1159 00:11:51.640074 PCI: 00:05.0
1160 00:11:51.650097 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1161 00:11:51.653548 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1162 00:11:51.657005 GENERIC: 0.0
1163 00:11:51.657095 PCI: 00:08.0
1164 00:11:51.666973 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 00:11:51.670019 PCI: 00:0a.0
1166 00:11:51.673480 PCI: 00:0d.0 child on link 0 USB0 port 0
1167 00:11:51.683365 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 00:11:51.686917 USB0 port 0 child on link 0 USB3 port 0
1169 00:11:51.690129 USB3 port 0
1170 00:11:51.690220 USB3 port 1
1171 00:11:51.693757 USB3 port 2
1172 00:11:51.693876 USB3 port 3
1173 00:11:51.700359 PCI: 00:14.0 child on link 0 USB0 port 0
1174 00:11:51.709978 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1175 00:11:51.713670 USB0 port 0 child on link 0 USB2 port 0
1176 00:11:51.716608 USB2 port 0
1177 00:11:51.716710 USB2 port 1
1178 00:11:51.720320 USB2 port 2
1179 00:11:51.720406 USB2 port 3
1180 00:11:51.723316 USB2 port 4
1181 00:11:51.723400 USB2 port 5
1182 00:11:51.726661 USB2 port 6
1183 00:11:51.726746 USB2 port 7
1184 00:11:51.729894 USB2 port 8
1185 00:11:51.729998 USB2 port 9
1186 00:11:51.733430 USB3 port 0
1187 00:11:51.733530 USB3 port 1
1188 00:11:51.736688 USB3 port 2
1189 00:11:51.736772 USB3 port 3
1190 00:11:51.740079 PCI: 00:14.2
1191 00:11:51.749799 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1192 00:11:51.760227 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1193 00:11:51.763131 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1194 00:11:51.773412 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1195 00:11:51.776444 GENERIC: 0.0
1196 00:11:51.780048 PCI: 00:15.0 child on link 0 I2C: 00:1a
1197 00:11:51.790098 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1198 00:11:51.793366 I2C: 00:1a
1199 00:11:51.793505 I2C: 00:31
1200 00:11:51.796553 I2C: 00:32
1201 00:11:51.799496 PCI: 00:15.1 child on link 0 I2C: 00:10
1202 00:11:51.809868 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 00:11:51.809977 I2C: 00:10
1204 00:11:51.813271 PCI: 00:15.2
1205 00:11:51.823033 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 00:11:51.823172 PCI: 00:15.3
1207 00:11:51.832903 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1208 00:11:51.836093 PCI: 00:16.0
1209 00:11:51.846193 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1210 00:11:51.846517 PCI: 00:19.0
1211 00:11:51.853450 PCI: 00:19.1 child on link 0 I2C: 00:15
1212 00:11:51.863302 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1213 00:11:51.863927 I2C: 00:15
1214 00:11:51.866833 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1215 00:11:51.876935 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1216 00:11:51.886251 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1217 00:11:51.896521 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1218 00:11:51.897004 GENERIC: 0.0
1219 00:11:51.900025 PCI: 01:00.0
1220 00:11:51.909581 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1221 00:11:51.919431 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1222 00:11:51.919913 PCI: 00:1e.0
1223 00:11:51.933170 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1224 00:11:51.936137 PCI: 00:1e.2 child on link 0 SPI: 00
1225 00:11:51.946267 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1226 00:11:51.946778 SPI: 00
1227 00:11:51.949749 PCI: 00:1e.3 child on link 0 SPI: 00
1228 00:11:51.962331 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1229 00:11:51.962820 SPI: 00
1230 00:11:51.965697 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1231 00:11:51.975829 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1232 00:11:51.976253 PNP: 0c09.0
1233 00:11:51.986114 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1234 00:11:51.988946 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1235 00:11:51.999210 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1236 00:11:52.009182 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1237 00:11:52.012293 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1238 00:11:52.015483 GENERIC: 0.0
1239 00:11:52.015929 GENERIC: 1.0
1240 00:11:52.019010 PCI: 00:1f.3
1241 00:11:52.028797 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1242 00:11:52.038485 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1243 00:11:52.042198 PCI: 00:1f.5
1244 00:11:52.048798 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1245 00:11:52.055399 CPU_CLUSTER: 0 child on link 0 APIC: 00
1246 00:11:52.055825 APIC: 00
1247 00:11:52.056159 APIC: 01
1248 00:11:52.058638 APIC: 05
1249 00:11:52.059084 APIC: 07
1250 00:11:52.062051 APIC: 02
1251 00:11:52.062505 APIC: 04
1252 00:11:52.062844 APIC: 06
1253 00:11:52.065743 APIC: 03
1254 00:11:52.072180 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1255 00:11:52.078594 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1256 00:11:52.084519 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1257 00:11:52.088050 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1258 00:11:52.094755 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1259 00:11:52.097843 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1260 00:11:52.104712 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1261 00:11:52.111215 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1262 00:11:52.121025 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1263 00:11:52.127810 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1264 00:11:52.134250 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1265 00:11:52.140782 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1266 00:11:52.147634 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1267 00:11:52.157183 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1268 00:11:52.160744 DOMAIN: 0000: Resource ranges:
1269 00:11:52.164170 * Base: 1000, Size: 800, Tag: 100
1270 00:11:52.167401 * Base: 1900, Size: e700, Tag: 100
1271 00:11:52.170543 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1272 00:11:52.177374 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1273 00:11:52.184133 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1274 00:11:52.193748 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1275 00:11:52.200561 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1276 00:11:52.207146 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1277 00:11:52.217218 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1278 00:11:52.223707 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1279 00:11:52.230015 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1280 00:11:52.240382 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1281 00:11:52.246980 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1282 00:11:52.253692 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1283 00:11:52.263462 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1284 00:11:52.269854 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1285 00:11:52.276716 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1286 00:11:52.286609 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1287 00:11:52.293323 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1288 00:11:52.300068 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1289 00:11:52.309954 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1290 00:11:52.316182 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1291 00:11:52.322852 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1292 00:11:52.332913 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1293 00:11:52.339240 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1294 00:11:52.346001 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1295 00:11:52.356461 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1296 00:11:52.359171 DOMAIN: 0000: Resource ranges:
1297 00:11:52.362782 * Base: 7fc00000, Size: 40400000, Tag: 200
1298 00:11:52.365761 * Base: d0000000, Size: 28000000, Tag: 200
1299 00:11:52.372730 * Base: fa000000, Size: 1000000, Tag: 200
1300 00:11:52.375887 * Base: fb001000, Size: 2fff000, Tag: 200
1301 00:11:52.379334 * Base: fe010000, Size: 2e000, Tag: 200
1302 00:11:52.382547 * Base: fe03f000, Size: d41000, Tag: 200
1303 00:11:52.389119 * Base: fed88000, Size: 8000, Tag: 200
1304 00:11:52.392640 * Base: fed93000, Size: d000, Tag: 200
1305 00:11:52.395808 * Base: feda2000, Size: 1e000, Tag: 200
1306 00:11:52.398902 * Base: fede0000, Size: 1220000, Tag: 200
1307 00:11:52.405541 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1308 00:11:52.412260 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1309 00:11:52.418958 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1310 00:11:52.425617 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1311 00:11:52.431940 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1312 00:11:52.438556 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1313 00:11:52.445150 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1314 00:11:52.451852 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1315 00:11:52.458411 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1316 00:11:52.465130 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1317 00:11:52.471669 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1318 00:11:52.478316 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1319 00:11:52.484868 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1320 00:11:52.491658 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1321 00:11:52.498367 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1322 00:11:52.505028 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1323 00:11:52.511723 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1324 00:11:52.518161 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1325 00:11:52.524856 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1326 00:11:52.531432 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1327 00:11:52.538081 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1328 00:11:52.544258 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1329 00:11:52.551064 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1330 00:11:52.557858 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1331 00:11:52.567979 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1332 00:11:52.571002 PCI: 00:1d.0: Resource ranges:
1333 00:11:52.574519 * Base: 7fc00000, Size: 100000, Tag: 200
1334 00:11:52.581175 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1335 00:11:52.587377 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1336 00:11:52.597262 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1337 00:11:52.604151 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1338 00:11:52.607614 Root Device assign_resources, bus 0 link: 0
1339 00:11:52.610940 DOMAIN: 0000 assign_resources, bus 0 link: 0
1340 00:11:52.620902 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1341 00:11:52.627615 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1342 00:11:52.637368 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1343 00:11:52.643931 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1344 00:11:52.650437 PCI: 00:04.0 assign_resources, bus 1 link: 0
1345 00:11:52.653740 PCI: 00:04.0 assign_resources, bus 1 link: 0
1346 00:11:52.663850 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1347 00:11:52.670218 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1348 00:11:52.680416 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1349 00:11:52.684137 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1350 00:11:52.687114 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1351 00:11:52.697430 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1352 00:11:52.700432 PCI: 00:14.0 assign_resources, bus 0 link: 0
1353 00:11:52.707094 PCI: 00:14.0 assign_resources, bus 0 link: 0
1354 00:11:52.713639 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1355 00:11:52.720017 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1356 00:11:52.730713 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1357 00:11:52.733724 PCI: 00:14.3 assign_resources, bus 0 link: 0
1358 00:11:52.740389 PCI: 00:14.3 assign_resources, bus 0 link: 0
1359 00:11:52.746733 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1360 00:11:52.753789 PCI: 00:15.0 assign_resources, bus 0 link: 0
1361 00:11:52.757035 PCI: 00:15.0 assign_resources, bus 0 link: 0
1362 00:11:52.763410 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1363 00:11:52.769973 PCI: 00:15.1 assign_resources, bus 0 link: 0
1364 00:11:52.773399 PCI: 00:15.1 assign_resources, bus 0 link: 0
1365 00:11:52.783081 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1366 00:11:52.790355 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1367 00:11:52.799959 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1368 00:11:52.806641 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1369 00:11:52.810089 PCI: 00:19.1 assign_resources, bus 0 link: 0
1370 00:11:52.816598 PCI: 00:19.1 assign_resources, bus 0 link: 0
1371 00:11:52.823706 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1372 00:11:52.833529 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1373 00:11:52.843528 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1374 00:11:52.846496 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1375 00:11:52.856614 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1376 00:11:52.863270 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1377 00:11:52.869962 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1378 00:11:52.876198 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1379 00:11:52.882869 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1380 00:11:52.886501 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1381 00:11:52.896153 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1382 00:11:52.900072 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1383 00:11:52.902820 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1384 00:11:52.909595 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1385 00:11:52.913167 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1386 00:11:52.919842 LPC: Trying to open IO window from 800 size 1ff
1387 00:11:52.926461 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1388 00:11:52.936000 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1389 00:11:52.942719 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1390 00:11:52.946073 DOMAIN: 0000 assign_resources, bus 0 link: 0
1391 00:11:52.953268 Root Device assign_resources, bus 0 link: 0
1392 00:11:52.956142 Done setting resources.
1393 00:11:52.962822 Show resources in subtree (Root Device)...After assigning values.
1394 00:11:52.966327 Root Device child on link 0 DOMAIN: 0000
1395 00:11:52.969332 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1396 00:11:52.979606 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1397 00:11:52.989719 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1398 00:11:52.989910 PCI: 00:00.0
1399 00:11:52.999265 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1400 00:11:53.009719 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1401 00:11:53.019555 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1402 00:11:53.029572 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1403 00:11:53.039015 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1404 00:11:53.045739 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1405 00:11:53.055920 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1406 00:11:53.065533 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1407 00:11:53.075825 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1408 00:11:53.085760 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1409 00:11:53.095780 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1410 00:11:53.102148 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1411 00:11:53.112459 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1412 00:11:53.122178 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1413 00:11:53.131893 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1414 00:11:53.142108 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1415 00:11:53.151942 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1416 00:11:53.158693 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1417 00:11:53.168239 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1418 00:11:53.178335 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1419 00:11:53.181714 PCI: 00:02.0
1420 00:11:53.191639 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1421 00:11:53.201649 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1422 00:11:53.211430 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1423 00:11:53.214784 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1424 00:11:53.224969 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1425 00:11:53.227987 GENERIC: 0.0
1426 00:11:53.228109 PCI: 00:05.0
1427 00:11:53.241456 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1428 00:11:53.244494 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1429 00:11:53.248092 GENERIC: 0.0
1430 00:11:53.248227 PCI: 00:08.0
1431 00:11:53.257949 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1432 00:11:53.261471 PCI: 00:0a.0
1433 00:11:53.264528 PCI: 00:0d.0 child on link 0 USB0 port 0
1434 00:11:53.274754 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1435 00:11:53.277819 USB0 port 0 child on link 0 USB3 port 0
1436 00:11:53.281177 USB3 port 0
1437 00:11:53.281314 USB3 port 1
1438 00:11:53.284481 USB3 port 2
1439 00:11:53.287902 USB3 port 3
1440 00:11:53.291370 PCI: 00:14.0 child on link 0 USB0 port 0
1441 00:11:53.301383 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1442 00:11:53.304541 USB0 port 0 child on link 0 USB2 port 0
1443 00:11:53.308123 USB2 port 0
1444 00:11:53.308233 USB2 port 1
1445 00:11:53.311158 USB2 port 2
1446 00:11:53.311253 USB2 port 3
1447 00:11:53.314828 USB2 port 4
1448 00:11:53.314929 USB2 port 5
1449 00:11:53.317967 USB2 port 6
1450 00:11:53.321316 USB2 port 7
1451 00:11:53.321410 USB2 port 8
1452 00:11:53.324670 USB2 port 9
1453 00:11:53.324764 USB3 port 0
1454 00:11:53.327846 USB3 port 1
1455 00:11:53.327985 USB3 port 2
1456 00:11:53.331308 USB3 port 3
1457 00:11:53.331418 PCI: 00:14.2
1458 00:11:53.340900 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1459 00:11:53.351235 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1460 00:11:53.357874 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1461 00:11:53.367727 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1462 00:11:53.367921 GENERIC: 0.0
1463 00:11:53.374164 PCI: 00:15.0 child on link 0 I2C: 00:1a
1464 00:11:53.384365 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1465 00:11:53.384552 I2C: 00:1a
1466 00:11:53.387616 I2C: 00:31
1467 00:11:53.387737 I2C: 00:32
1468 00:11:53.394147 PCI: 00:15.1 child on link 0 I2C: 00:10
1469 00:11:53.403913 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1470 00:11:53.404112 I2C: 00:10
1471 00:11:53.407347 PCI: 00:15.2
1472 00:11:53.417648 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1473 00:11:53.417812 PCI: 00:15.3
1474 00:11:53.427167 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1475 00:11:53.430590 PCI: 00:16.0
1476 00:11:53.440537 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1477 00:11:53.443596 PCI: 00:19.0
1478 00:11:53.447099 PCI: 00:19.1 child on link 0 I2C: 00:15
1479 00:11:53.456659 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1480 00:11:53.460210 I2C: 00:15
1481 00:11:53.463725 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1482 00:11:53.473665 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1483 00:11:53.483384 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1484 00:11:53.493619 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1485 00:11:53.496685 GENERIC: 0.0
1486 00:11:53.496830 PCI: 01:00.0
1487 00:11:53.510012 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1488 00:11:53.519999 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1489 00:11:53.520197 PCI: 00:1e.0
1490 00:11:53.532897 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1491 00:11:53.536328 PCI: 00:1e.2 child on link 0 SPI: 00
1492 00:11:53.546328 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1493 00:11:53.546495 SPI: 00
1494 00:11:53.549896 PCI: 00:1e.3 child on link 0 SPI: 00
1495 00:11:53.563118 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1496 00:11:53.563310 SPI: 00
1497 00:11:53.565981 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1498 00:11:53.576014 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1499 00:11:53.576185 PNP: 0c09.0
1500 00:11:53.585970 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1501 00:11:53.589609 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1502 00:11:53.599367 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1503 00:11:53.609272 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1504 00:11:53.612281 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1505 00:11:53.615735 GENERIC: 0.0
1506 00:11:53.619436 GENERIC: 1.0
1507 00:11:53.619583 PCI: 00:1f.3
1508 00:11:53.628905 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1509 00:11:53.638870 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1510 00:11:53.642294 PCI: 00:1f.5
1511 00:11:53.652311 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1512 00:11:53.655367 CPU_CLUSTER: 0 child on link 0 APIC: 00
1513 00:11:53.658666 APIC: 00
1514 00:11:53.658806 APIC: 01
1515 00:11:53.658920 APIC: 05
1516 00:11:53.662354 APIC: 07
1517 00:11:53.662493 APIC: 02
1518 00:11:53.665314 APIC: 04
1519 00:11:53.665438 APIC: 06
1520 00:11:53.665546 APIC: 03
1521 00:11:53.668816 Done allocating resources.
1522 00:11:53.675517 BS: BS_DEV_RESOURCES run times (exec / console): 27 / 2475 ms
1523 00:11:53.681880 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1524 00:11:53.685297 Configure GPIOs for I2S audio on UP4.
1525 00:11:53.691905 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1526 00:11:53.695520 Enabling resources...
1527 00:11:53.698521 PCI: 00:00.0 subsystem <- 8086/9a12
1528 00:11:53.702258 PCI: 00:00.0 cmd <- 06
1529 00:11:53.705186 PCI: 00:02.0 subsystem <- 8086/9a40
1530 00:11:53.708876 PCI: 00:02.0 cmd <- 03
1531 00:11:53.712064 PCI: 00:04.0 subsystem <- 8086/9a03
1532 00:11:53.712205 PCI: 00:04.0 cmd <- 02
1533 00:11:53.718776 PCI: 00:05.0 subsystem <- 8086/9a19
1534 00:11:53.718946 PCI: 00:05.0 cmd <- 02
1535 00:11:53.721832 PCI: 00:08.0 subsystem <- 8086/9a11
1536 00:11:53.725484 PCI: 00:08.0 cmd <- 06
1537 00:11:53.728494 PCI: 00:0d.0 subsystem <- 8086/9a13
1538 00:11:53.732215 PCI: 00:0d.0 cmd <- 02
1539 00:11:53.735324 PCI: 00:14.0 subsystem <- 8086/a0ed
1540 00:11:53.738353 PCI: 00:14.0 cmd <- 02
1541 00:11:53.741895 PCI: 00:14.2 subsystem <- 8086/a0ef
1542 00:11:53.745546 PCI: 00:14.2 cmd <- 02
1543 00:11:53.748326 PCI: 00:14.3 subsystem <- 8086/a0f0
1544 00:11:53.751826 PCI: 00:14.3 cmd <- 02
1545 00:11:53.755162 PCI: 00:15.0 subsystem <- 8086/a0e8
1546 00:11:53.755272 PCI: 00:15.0 cmd <- 02
1547 00:11:53.762067 PCI: 00:15.1 subsystem <- 8086/a0e9
1548 00:11:53.762208 PCI: 00:15.1 cmd <- 02
1549 00:11:53.765239 PCI: 00:15.2 subsystem <- 8086/a0ea
1550 00:11:53.768376 PCI: 00:15.2 cmd <- 02
1551 00:11:53.771778 PCI: 00:15.3 subsystem <- 8086/a0eb
1552 00:11:53.775472 PCI: 00:15.3 cmd <- 02
1553 00:11:53.778698 PCI: 00:16.0 subsystem <- 8086/a0e0
1554 00:11:53.781652 PCI: 00:16.0 cmd <- 02
1555 00:11:53.785201 PCI: 00:19.1 subsystem <- 8086/a0c6
1556 00:11:53.788615 PCI: 00:19.1 cmd <- 02
1557 00:11:53.791925 PCI: 00:1d.0 bridge ctrl <- 0013
1558 00:11:53.795521 PCI: 00:1d.0 subsystem <- 8086/a0b0
1559 00:11:53.798532 PCI: 00:1d.0 cmd <- 06
1560 00:11:53.802097 PCI: 00:1e.0 subsystem <- 8086/a0a8
1561 00:11:53.802234 PCI: 00:1e.0 cmd <- 06
1562 00:11:53.808823 PCI: 00:1e.2 subsystem <- 8086/a0aa
1563 00:11:53.808954 PCI: 00:1e.2 cmd <- 06
1564 00:11:53.812176 PCI: 00:1e.3 subsystem <- 8086/a0ab
1565 00:11:53.815734 PCI: 00:1e.3 cmd <- 02
1566 00:11:53.818793 PCI: 00:1f.0 subsystem <- 8086/a087
1567 00:11:53.821778 PCI: 00:1f.0 cmd <- 407
1568 00:11:53.825156 PCI: 00:1f.3 subsystem <- 8086/a0c8
1569 00:11:53.828816 PCI: 00:1f.3 cmd <- 02
1570 00:11:53.831879 PCI: 00:1f.5 subsystem <- 8086/a0a4
1571 00:11:53.835501 PCI: 00:1f.5 cmd <- 406
1572 00:11:53.838561 PCI: 01:00.0 cmd <- 02
1573 00:11:53.843335 done.
1574 00:11:53.846834 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1575 00:11:53.849828 Initializing devices...
1576 00:11:53.853347 Root Device init
1577 00:11:53.856279 Chrome EC: Set SMI mask to 0x0000000000000000
1578 00:11:53.863925 Chrome EC: clear events_b mask to 0x0000000000000000
1579 00:11:53.870352 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1580 00:11:53.877405 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1581 00:11:53.883617 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1582 00:11:53.886931 Chrome EC: Set WAKE mask to 0x0000000000000000
1583 00:11:53.894466 fw_config match found: DB_USB=USB3_ACTIVE
1584 00:11:53.897834 Configure Right Type-C port orientation for retimer
1585 00:11:53.900974 Root Device init finished in 46 msecs
1586 00:11:53.905468 PCI: 00:00.0 init
1587 00:11:53.908343 CPU TDP = 9 Watts
1588 00:11:53.908470 CPU PL1 = 9 Watts
1589 00:11:53.911966 CPU PL2 = 40 Watts
1590 00:11:53.915439 CPU PL4 = 83 Watts
1591 00:11:53.918342 PCI: 00:00.0 init finished in 8 msecs
1592 00:11:53.918485 PCI: 00:02.0 init
1593 00:11:53.921886 GMA: Found VBT in CBFS
1594 00:11:53.925510 GMA: Found valid VBT in CBFS
1595 00:11:53.931719 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1596 00:11:53.938530 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1597 00:11:53.941564 PCI: 00:02.0 init finished in 18 msecs
1598 00:11:53.945145 PCI: 00:05.0 init
1599 00:11:53.948708 PCI: 00:05.0 init finished in 0 msecs
1600 00:11:53.951771 PCI: 00:08.0 init
1601 00:11:53.955460 PCI: 00:08.0 init finished in 0 msecs
1602 00:11:53.958274 PCI: 00:14.0 init
1603 00:11:53.961791 PCI: 00:14.0 init finished in 0 msecs
1604 00:11:53.965164 PCI: 00:14.2 init
1605 00:11:53.968810 PCI: 00:14.2 init finished in 0 msecs
1606 00:11:53.968943 PCI: 00:15.0 init
1607 00:11:53.971754 I2C bus 0 version 0x3230302a
1608 00:11:53.975313 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1609 00:11:53.981909 PCI: 00:15.0 init finished in 6 msecs
1610 00:11:53.982075 PCI: 00:15.1 init
1611 00:11:53.985287 I2C bus 1 version 0x3230302a
1612 00:11:53.988266 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1613 00:11:53.991713 PCI: 00:15.1 init finished in 6 msecs
1614 00:11:53.995046 PCI: 00:15.2 init
1615 00:11:53.998729 I2C bus 2 version 0x3230302a
1616 00:11:54.002143 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1617 00:11:54.005382 PCI: 00:15.2 init finished in 6 msecs
1618 00:11:54.008424 PCI: 00:15.3 init
1619 00:11:54.012012 I2C bus 3 version 0x3230302a
1620 00:11:54.015296 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1621 00:11:54.018294 PCI: 00:15.3 init finished in 6 msecs
1622 00:11:54.021882 PCI: 00:16.0 init
1623 00:11:54.025487 PCI: 00:16.0 init finished in 0 msecs
1624 00:11:54.028526 PCI: 00:19.1 init
1625 00:11:54.028650 I2C bus 5 version 0x3230302a
1626 00:11:54.035458 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1627 00:11:54.038453 PCI: 00:19.1 init finished in 6 msecs
1628 00:11:54.038567 PCI: 00:1d.0 init
1629 00:11:54.042035 Initializing PCH PCIe bridge.
1630 00:11:54.045105 PCI: 00:1d.0 init finished in 3 msecs
1631 00:11:54.049382 PCI: 00:1f.0 init
1632 00:11:54.052865 IOAPIC: Initializing IOAPIC at 0xfec00000
1633 00:11:54.059565 IOAPIC: Bootstrap Processor Local APIC = 0x00
1634 00:11:54.059730 IOAPIC: ID = 0x02
1635 00:11:54.062552 IOAPIC: Dumping registers
1636 00:11:54.065935 reg 0x0000: 0x02000000
1637 00:11:54.069287 reg 0x0001: 0x00770020
1638 00:11:54.069419 reg 0x0002: 0x00000000
1639 00:11:54.075759 PCI: 00:1f.0 init finished in 21 msecs
1640 00:11:54.075903 PCI: 00:1f.2 init
1641 00:11:54.078746 Disabling ACPI via APMC.
1642 00:11:54.082461 APMC done.
1643 00:11:54.086104 PCI: 00:1f.2 init finished in 5 msecs
1644 00:11:54.096867 PCI: 01:00.0 init
1645 00:11:54.100403 PCI: 01:00.0 init finished in 0 msecs
1646 00:11:54.103725 PNP: 0c09.0 init
1647 00:11:54.106884 Google Chrome EC uptime: 8.263 seconds
1648 00:11:54.114031 Google Chrome AP resets since EC boot: 1
1649 00:11:54.117254 Google Chrome most recent AP reset causes:
1650 00:11:54.120336 0.451: 32775 shutdown: entering G3
1651 00:11:54.127071 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1652 00:11:54.130028 PNP: 0c09.0 init finished in 22 msecs
1653 00:11:54.135721 Devices initialized
1654 00:11:54.139012 Show all devs... After init.
1655 00:11:54.141990 Root Device: enabled 1
1656 00:11:54.142115 DOMAIN: 0000: enabled 1
1657 00:11:54.145602 CPU_CLUSTER: 0: enabled 1
1658 00:11:54.148584 PCI: 00:00.0: enabled 1
1659 00:11:54.152287 PCI: 00:02.0: enabled 1
1660 00:11:54.152408 PCI: 00:04.0: enabled 1
1661 00:11:54.155314 PCI: 00:05.0: enabled 1
1662 00:11:54.158951 PCI: 00:06.0: enabled 0
1663 00:11:54.162123 PCI: 00:07.0: enabled 0
1664 00:11:54.162237 PCI: 00:07.1: enabled 0
1665 00:11:54.165323 PCI: 00:07.2: enabled 0
1666 00:11:54.168797 PCI: 00:07.3: enabled 0
1667 00:11:54.172207 PCI: 00:08.0: enabled 1
1668 00:11:54.172328 PCI: 00:09.0: enabled 0
1669 00:11:54.175553 PCI: 00:0a.0: enabled 0
1670 00:11:54.178473 PCI: 00:0d.0: enabled 1
1671 00:11:54.181880 PCI: 00:0d.1: enabled 0
1672 00:11:54.182002 PCI: 00:0d.2: enabled 0
1673 00:11:54.185137 PCI: 00:0d.3: enabled 0
1674 00:11:54.188310 PCI: 00:0e.0: enabled 0
1675 00:11:54.188400 PCI: 00:10.2: enabled 1
1676 00:11:54.191975 PCI: 00:10.6: enabled 0
1677 00:11:54.195408 PCI: 00:10.7: enabled 0
1678 00:11:54.198506 PCI: 00:12.0: enabled 0
1679 00:11:54.198613 PCI: 00:12.6: enabled 0
1680 00:11:54.201613 PCI: 00:13.0: enabled 0
1681 00:11:54.205216 PCI: 00:14.0: enabled 1
1682 00:11:54.208816 PCI: 00:14.1: enabled 0
1683 00:11:54.208938 PCI: 00:14.2: enabled 1
1684 00:11:54.211851 PCI: 00:14.3: enabled 1
1685 00:11:54.215055 PCI: 00:15.0: enabled 1
1686 00:11:54.218375 PCI: 00:15.1: enabled 1
1687 00:11:54.218500 PCI: 00:15.2: enabled 1
1688 00:11:54.221540 PCI: 00:15.3: enabled 1
1689 00:11:54.225144 PCI: 00:16.0: enabled 1
1690 00:11:54.228629 PCI: 00:16.1: enabled 0
1691 00:11:54.228730 PCI: 00:16.2: enabled 0
1692 00:11:54.231588 PCI: 00:16.3: enabled 0
1693 00:11:54.234877 PCI: 00:16.4: enabled 0
1694 00:11:54.234982 PCI: 00:16.5: enabled 0
1695 00:11:54.238138 PCI: 00:17.0: enabled 0
1696 00:11:54.241864 PCI: 00:19.0: enabled 0
1697 00:11:54.245083 PCI: 00:19.1: enabled 1
1698 00:11:54.245211 PCI: 00:19.2: enabled 0
1699 00:11:54.248202 PCI: 00:1c.0: enabled 1
1700 00:11:54.251348 PCI: 00:1c.1: enabled 0
1701 00:11:54.254966 PCI: 00:1c.2: enabled 0
1702 00:11:54.255093 PCI: 00:1c.3: enabled 0
1703 00:11:54.258546 PCI: 00:1c.4: enabled 0
1704 00:11:54.261579 PCI: 00:1c.5: enabled 0
1705 00:11:54.265177 PCI: 00:1c.6: enabled 1
1706 00:11:54.265304 PCI: 00:1c.7: enabled 0
1707 00:11:54.268210 PCI: 00:1d.0: enabled 1
1708 00:11:54.271358 PCI: 00:1d.1: enabled 0
1709 00:11:54.271478 PCI: 00:1d.2: enabled 1
1710 00:11:54.275153 PCI: 00:1d.3: enabled 0
1711 00:11:54.277953 PCI: 00:1e.0: enabled 1
1712 00:11:54.281231 PCI: 00:1e.1: enabled 0
1713 00:11:54.281362 PCI: 00:1e.2: enabled 1
1714 00:11:54.285098 PCI: 00:1e.3: enabled 1
1715 00:11:54.287905 PCI: 00:1f.0: enabled 1
1716 00:11:54.291525 PCI: 00:1f.1: enabled 0
1717 00:11:54.291628 PCI: 00:1f.2: enabled 1
1718 00:11:54.294496 PCI: 00:1f.3: enabled 1
1719 00:11:54.298070 PCI: 00:1f.4: enabled 0
1720 00:11:54.301615 PCI: 00:1f.5: enabled 1
1721 00:11:54.301744 PCI: 00:1f.6: enabled 0
1722 00:11:54.304587 PCI: 00:1f.7: enabled 0
1723 00:11:54.308304 APIC: 00: enabled 1
1724 00:11:54.308435 GENERIC: 0.0: enabled 1
1725 00:11:54.311280 GENERIC: 0.0: enabled 1
1726 00:11:54.314695 GENERIC: 1.0: enabled 1
1727 00:11:54.317723 GENERIC: 0.0: enabled 1
1728 00:11:54.317818 GENERIC: 1.0: enabled 1
1729 00:11:54.321167 USB0 port 0: enabled 1
1730 00:11:54.324472 GENERIC: 0.0: enabled 1
1731 00:11:54.324591 USB0 port 0: enabled 1
1732 00:11:54.327873 GENERIC: 0.0: enabled 1
1733 00:11:54.331583 I2C: 00:1a: enabled 1
1734 00:11:54.334646 I2C: 00:31: enabled 1
1735 00:11:54.334776 I2C: 00:32: enabled 1
1736 00:11:54.338094 I2C: 00:10: enabled 1
1737 00:11:54.341262 I2C: 00:15: enabled 1
1738 00:11:54.341388 GENERIC: 0.0: enabled 0
1739 00:11:54.344257 GENERIC: 1.0: enabled 0
1740 00:11:54.348159 GENERIC: 0.0: enabled 1
1741 00:11:54.348282 SPI: 00: enabled 1
1742 00:11:54.351011 SPI: 00: enabled 1
1743 00:11:54.354331 PNP: 0c09.0: enabled 1
1744 00:11:54.354466 GENERIC: 0.0: enabled 1
1745 00:11:54.357901 USB3 port 0: enabled 1
1746 00:11:54.360871 USB3 port 1: enabled 1
1747 00:11:54.364497 USB3 port 2: enabled 0
1748 00:11:54.364636 USB3 port 3: enabled 0
1749 00:11:54.368054 USB2 port 0: enabled 0
1750 00:11:54.371089 USB2 port 1: enabled 1
1751 00:11:54.371219 USB2 port 2: enabled 1
1752 00:11:54.374156 USB2 port 3: enabled 0
1753 00:11:54.377934 USB2 port 4: enabled 1
1754 00:11:54.378061 USB2 port 5: enabled 0
1755 00:11:54.380910 USB2 port 6: enabled 0
1756 00:11:54.384318 USB2 port 7: enabled 0
1757 00:11:54.387663 USB2 port 8: enabled 0
1758 00:11:54.387795 USB2 port 9: enabled 0
1759 00:11:54.391148 USB3 port 0: enabled 0
1760 00:11:54.394452 USB3 port 1: enabled 1
1761 00:11:54.394560 USB3 port 2: enabled 0
1762 00:11:54.397418 USB3 port 3: enabled 0
1763 00:11:54.400894 GENERIC: 0.0: enabled 1
1764 00:11:54.404488 GENERIC: 1.0: enabled 1
1765 00:11:54.404622 APIC: 01: enabled 1
1766 00:11:54.407551 APIC: 05: enabled 1
1767 00:11:54.407667 APIC: 07: enabled 1
1768 00:11:54.411057 APIC: 02: enabled 1
1769 00:11:54.414187 APIC: 04: enabled 1
1770 00:11:54.414312 APIC: 06: enabled 1
1771 00:11:54.417742 APIC: 03: enabled 1
1772 00:11:54.420617 PCI: 01:00.0: enabled 1
1773 00:11:54.424391 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1774 00:11:54.430768 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1775 00:11:54.434023 ELOG: NV offset 0xf30000 size 0x1000
1776 00:11:54.440907 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1777 00:11:54.447523 ELOG: Event(17) added with size 13 at 2023-08-09 00:11:53 UTC
1778 00:11:54.454161 ELOG: Event(92) added with size 9 at 2023-08-09 00:11:53 UTC
1779 00:11:54.460509 ELOG: Event(93) added with size 9 at 2023-08-09 00:11:53 UTC
1780 00:11:54.467656 ELOG: Event(9E) added with size 10 at 2023-08-09 00:11:53 UTC
1781 00:11:54.474321 ELOG: Event(9F) added with size 14 at 2023-08-09 00:11:53 UTC
1782 00:11:54.480698 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1783 00:11:54.483840 ELOG: Event(A1) added with size 10 at 2023-08-09 00:11:53 UTC
1784 00:11:54.493811 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1785 00:11:54.500736 ELOG: Event(A0) added with size 9 at 2023-08-09 00:11:53 UTC
1786 00:11:54.503635 elog_add_boot_reason: Logged dev mode boot
1787 00:11:54.510371 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1788 00:11:54.510526 Finalize devices...
1789 00:11:54.513940 Devices finalized
1790 00:11:54.520674 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1791 00:11:54.523565 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1792 00:11:54.530210 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1793 00:11:54.533899 ME: HFSTS1 : 0x80030055
1794 00:11:54.540218 ME: HFSTS2 : 0x30280116
1795 00:11:54.543407 ME: HFSTS3 : 0x00000050
1796 00:11:54.547085 ME: HFSTS4 : 0x00004000
1797 00:11:54.553427 ME: HFSTS5 : 0x00000000
1798 00:11:54.557052 ME: HFSTS6 : 0x40400006
1799 00:11:54.560671 ME: Manufacturing Mode : YES
1800 00:11:54.563702 ME: SPI Protection Mode Enabled : NO
1801 00:11:54.566647 ME: FW Partition Table : OK
1802 00:11:54.570340 ME: Bringup Loader Failure : NO
1803 00:11:54.576924 ME: Firmware Init Complete : NO
1804 00:11:54.580324 ME: Boot Options Present : NO
1805 00:11:54.583779 ME: Update In Progress : NO
1806 00:11:54.586659 ME: D0i3 Support : YES
1807 00:11:54.590311 ME: Low Power State Enabled : NO
1808 00:11:54.593317 ME: CPU Replaced : YES
1809 00:11:54.596636 ME: CPU Replacement Valid : YES
1810 00:11:54.599992 ME: Current Working State : 5
1811 00:11:54.606612 ME: Current Operation State : 1
1812 00:11:54.610110 ME: Current Operation Mode : 3
1813 00:11:54.613178 ME: Error Code : 0
1814 00:11:54.616854 ME: Enhanced Debug Mode : NO
1815 00:11:54.619845 ME: CPU Debug Disabled : YES
1816 00:11:54.623549 ME: TXT Support : NO
1817 00:11:54.629992 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1818 00:11:54.636691 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1819 00:11:54.639735 CBFS: 'fallback/slic' not found.
1820 00:11:54.643343 ACPI: Writing ACPI tables at 76b01000.
1821 00:11:54.646605 ACPI: * FACS
1822 00:11:54.646710 ACPI: * DSDT
1823 00:11:54.653129 Ramoops buffer: 0x100000@0x76a00000.
1824 00:11:54.656305 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1825 00:11:54.659852 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1826 00:11:54.663915 Google Chrome EC: version:
1827 00:11:54.666885 ro: voema_v2.0.10114-a447f03e46
1828 00:11:54.670308 rw: voema_v2.0.10114-a447f03e46
1829 00:11:54.673746 running image: 2
1830 00:11:54.680330 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1831 00:11:54.683677 ACPI: * FADT
1832 00:11:54.683825 SCI is IRQ9
1833 00:11:54.687071 ACPI: added table 1/32, length now 40
1834 00:11:54.690574 ACPI: * SSDT
1835 00:11:54.693508 Found 1 CPU(s) with 8 core(s) each.
1836 00:11:54.697051 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1837 00:11:54.704035 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1838 00:11:54.707000 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1839 00:11:54.710216 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1840 00:11:54.716882 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1841 00:11:54.723594 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1842 00:11:54.727199 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1843 00:11:54.733655 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1844 00:11:54.740339 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1845 00:11:54.743323 \_SB.PCI0.RP09: Added StorageD3Enable property
1846 00:11:54.747025 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1847 00:11:54.753668 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1848 00:11:54.760128 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1849 00:11:54.763563 PS2K: Passing 80 keymaps to kernel
1850 00:11:54.770049 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1851 00:11:54.776568 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1852 00:11:54.783143 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1853 00:11:54.790273 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1854 00:11:54.796538 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1855 00:11:54.803024 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1856 00:11:54.809557 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1857 00:11:54.816138 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1858 00:11:54.819462 ACPI: added table 2/32, length now 44
1859 00:11:54.819602 ACPI: * MCFG
1860 00:11:54.826228 ACPI: added table 3/32, length now 48
1861 00:11:54.826380 ACPI: * TPM2
1862 00:11:54.829301 TPM2 log created at 0x769f0000
1863 00:11:54.832946 ACPI: added table 4/32, length now 52
1864 00:11:54.836522 ACPI: * MADT
1865 00:11:54.836654 SCI is IRQ9
1866 00:11:54.839374 ACPI: added table 5/32, length now 56
1867 00:11:54.843069 current = 76b09850
1868 00:11:54.843169 ACPI: * DMAR
1869 00:11:54.846073 ACPI: added table 6/32, length now 60
1870 00:11:54.852835 ACPI: added table 7/32, length now 64
1871 00:11:54.852980 ACPI: * HPET
1872 00:11:54.856500 ACPI: added table 8/32, length now 68
1873 00:11:54.859507 ACPI: done.
1874 00:11:54.859628 ACPI tables: 35216 bytes.
1875 00:11:54.862444 smbios_write_tables: 769ef000
1876 00:11:54.866098 EC returned error result code 3
1877 00:11:54.869676 Couldn't obtain OEM name from CBI
1878 00:11:54.873943 Create SMBIOS type 16
1879 00:11:54.877489 Create SMBIOS type 17
1880 00:11:54.880388 GENERIC: 0.0 (WIFI Device)
1881 00:11:54.880504 SMBIOS tables: 1734 bytes.
1882 00:11:54.887152 Writing table forward entry at 0x00000500
1883 00:11:54.893635 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1884 00:11:54.897174 Writing coreboot table at 0x76b25000
1885 00:11:54.903862 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1886 00:11:54.907222 1. 0000000000001000-000000000009ffff: RAM
1887 00:11:54.910517 2. 00000000000a0000-00000000000fffff: RESERVED
1888 00:11:54.917006 3. 0000000000100000-00000000769eefff: RAM
1889 00:11:54.920573 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1890 00:11:54.926912 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1891 00:11:54.933481 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1892 00:11:54.937287 7. 0000000077000000-000000007fbfffff: RESERVED
1893 00:11:54.939995 8. 00000000c0000000-00000000cfffffff: RESERVED
1894 00:11:54.947186 9. 00000000f8000000-00000000f9ffffff: RESERVED
1895 00:11:54.950162 10. 00000000fb000000-00000000fb000fff: RESERVED
1896 00:11:54.956833 11. 00000000fe000000-00000000fe00ffff: RESERVED
1897 00:11:54.960450 12. 00000000fed80000-00000000fed87fff: RESERVED
1898 00:11:54.966996 13. 00000000fed90000-00000000fed92fff: RESERVED
1899 00:11:54.970147 14. 00000000feda0000-00000000feda1fff: RESERVED
1900 00:11:54.976746 15. 00000000fedc0000-00000000feddffff: RESERVED
1901 00:11:54.980324 16. 0000000100000000-00000004803fffff: RAM
1902 00:11:54.983367 Passing 4 GPIOs to payload:
1903 00:11:54.987042 NAME | PORT | POLARITY | VALUE
1904 00:11:54.993483 lid | undefined | high | high
1905 00:11:54.996392 power | undefined | high | low
1906 00:11:55.003491 oprom | undefined | high | low
1907 00:11:55.009901 EC in RW | 0x000000e5 | high | high
1908 00:11:55.016848 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f1ab
1909 00:11:55.016978 coreboot table: 1576 bytes.
1910 00:11:55.023371 IMD ROOT 0. 0x76fff000 0x00001000
1911 00:11:55.026600 IMD SMALL 1. 0x76ffe000 0x00001000
1912 00:11:55.030171 FSP MEMORY 2. 0x76c4e000 0x003b0000
1913 00:11:55.033502 VPD 3. 0x76c4d000 0x00000367
1914 00:11:55.036432 RO MCACHE 4. 0x76c4c000 0x00000fdc
1915 00:11:55.040285 CONSOLE 5. 0x76c2c000 0x00020000
1916 00:11:55.043426 FMAP 6. 0x76c2b000 0x00000578
1917 00:11:55.046390 TIME STAMP 7. 0x76c2a000 0x00000910
1918 00:11:55.049890 VBOOT WORK 8. 0x76c16000 0x00014000
1919 00:11:55.056568 ROMSTG STCK 9. 0x76c15000 0x00001000
1920 00:11:55.060356 AFTER CAR 10. 0x76c0a000 0x0000b000
1921 00:11:55.063416 RAMSTAGE 11. 0x76b97000 0x00073000
1922 00:11:55.066532 REFCODE 12. 0x76b42000 0x00055000
1923 00:11:55.070009 SMM BACKUP 13. 0x76b32000 0x00010000
1924 00:11:55.073074 4f444749 14. 0x76b30000 0x00002000
1925 00:11:55.076795 EXT VBT15. 0x76b2d000 0x0000219f
1926 00:11:55.079906 COREBOOT 16. 0x76b25000 0x00008000
1927 00:11:55.083499 ACPI 17. 0x76b01000 0x00024000
1928 00:11:55.090018 ACPI GNVS 18. 0x76b00000 0x00001000
1929 00:11:55.093072 RAMOOPS 19. 0x76a00000 0x00100000
1930 00:11:55.096657 TPM2 TCGLOG20. 0x769f0000 0x00010000
1931 00:11:55.100225 SMBIOS 21. 0x769ef000 0x00000800
1932 00:11:55.100337 IMD small region:
1933 00:11:55.106932 IMD ROOT 0. 0x76ffec00 0x00000400
1934 00:11:55.109880 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1935 00:11:55.113296 POWER STATE 2. 0x76ffeb80 0x00000044
1936 00:11:55.116689 ROMSTAGE 3. 0x76ffeb60 0x00000004
1937 00:11:55.119792 MEM INFO 4. 0x76ffe980 0x000001e0
1938 00:11:55.126781 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1939 00:11:55.130056 MTRR: Physical address space:
1940 00:11:55.136585 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1941 00:11:55.143411 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1942 00:11:55.149674 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1943 00:11:55.156396 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1944 00:11:55.159647 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1945 00:11:55.166291 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1946 00:11:55.172923 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1947 00:11:55.176590 MTRR: Fixed MSR 0x250 0x0606060606060606
1948 00:11:55.183249 MTRR: Fixed MSR 0x258 0x0606060606060606
1949 00:11:55.186204 MTRR: Fixed MSR 0x259 0x0000000000000000
1950 00:11:55.189753 MTRR: Fixed MSR 0x268 0x0606060606060606
1951 00:11:55.192788 MTRR: Fixed MSR 0x269 0x0606060606060606
1952 00:11:55.199381 MTRR: Fixed MSR 0x26a 0x0606060606060606
1953 00:11:55.202798 MTRR: Fixed MSR 0x26b 0x0606060606060606
1954 00:11:55.206408 MTRR: Fixed MSR 0x26c 0x0606060606060606
1955 00:11:55.209592 MTRR: Fixed MSR 0x26d 0x0606060606060606
1956 00:11:55.216321 MTRR: Fixed MSR 0x26e 0x0606060606060606
1957 00:11:55.219654 MTRR: Fixed MSR 0x26f 0x0606060606060606
1958 00:11:55.222887 call enable_fixed_mtrr()
1959 00:11:55.226614 CPU physical address size: 39 bits
1960 00:11:55.232707 MTRR: default type WB/UC MTRR counts: 6/7.
1961 00:11:55.236291 MTRR: WB selected as default type.
1962 00:11:55.242825 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1963 00:11:55.246379 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1964 00:11:55.252797 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1965 00:11:55.259567 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1966 00:11:55.265906 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1967 00:11:55.272354 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1968 00:11:55.279806 MTRR: Fixed MSR 0x250 0x0606060606060606
1969 00:11:55.283516 MTRR: Fixed MSR 0x258 0x0606060606060606
1970 00:11:55.286545 MTRR: Fixed MSR 0x259 0x0000000000000000
1971 00:11:55.290127 MTRR: Fixed MSR 0x268 0x0606060606060606
1972 00:11:55.296485 MTRR: Fixed MSR 0x269 0x0606060606060606
1973 00:11:55.299547 MTRR: Fixed MSR 0x26a 0x0606060606060606
1974 00:11:55.303125 MTRR: Fixed MSR 0x26b 0x0606060606060606
1975 00:11:55.306510 MTRR: Fixed MSR 0x26c 0x0606060606060606
1976 00:11:55.313210 MTRR: Fixed MSR 0x26d 0x0606060606060606
1977 00:11:55.316280 MTRR: Fixed MSR 0x26e 0x0606060606060606
1978 00:11:55.319373 MTRR: Fixed MSR 0x26f 0x0606060606060606
1979 00:11:55.323016 MTRR: Fixed MSR 0x250 0x0606060606060606
1980 00:11:55.329475 MTRR: Fixed MSR 0x250 0x0606060606060606
1981 00:11:55.332751 MTRR: Fixed MSR 0x258 0x0606060606060606
1982 00:11:55.336073 MTRR: Fixed MSR 0x259 0x0000000000000000
1983 00:11:55.339661 MTRR: Fixed MSR 0x268 0x0606060606060606
1984 00:11:55.343013 MTRR: Fixed MSR 0x269 0x0606060606060606
1985 00:11:55.349468 MTRR: Fixed MSR 0x26a 0x0606060606060606
1986 00:11:55.352755 MTRR: Fixed MSR 0x26b 0x0606060606060606
1987 00:11:55.356104 MTRR: Fixed MSR 0x26c 0x0606060606060606
1988 00:11:55.359375 MTRR: Fixed MSR 0x26d 0x0606060606060606
1989 00:11:55.366410 MTRR: Fixed MSR 0x26e 0x0606060606060606
1990 00:11:55.369270 MTRR: Fixed MSR 0x26f 0x0606060606060606
1991 00:11:55.376319 MTRR: Fixed MSR 0x258 0x0606060606060606
1992 00:11:55.379533 MTRR: Fixed MSR 0x259 0x0000000000000000
1993 00:11:55.382764 MTRR: Fixed MSR 0x268 0x0606060606060606
1994 00:11:55.386033 MTRR: Fixed MSR 0x269 0x0606060606060606
1995 00:11:55.392740 MTRR: Fixed MSR 0x26a 0x0606060606060606
1996 00:11:55.396405 MTRR: Fixed MSR 0x26b 0x0606060606060606
1997 00:11:55.399180 MTRR: Fixed MSR 0x26c 0x0606060606060606
1998 00:11:55.402795 MTRR: Fixed MSR 0x26d 0x0606060606060606
1999 00:11:55.409353 MTRR: Fixed MSR 0x26e 0x0606060606060606
2000 00:11:55.412893 MTRR: Fixed MSR 0x26f 0x0606060606060606
2001 00:11:55.415940 call enable_fixed_mtrr()
2002 00:11:55.419595 call enable_fixed_mtrr()
2003 00:11:55.422532 MTRR: Fixed MSR 0x250 0x0606060606060606
2004 00:11:55.426236 MTRR: Fixed MSR 0x250 0x0606060606060606
2005 00:11:55.432644 MTRR: Fixed MSR 0x258 0x0606060606060606
2006 00:11:55.436281 MTRR: Fixed MSR 0x259 0x0000000000000000
2007 00:11:55.439249 MTRR: Fixed MSR 0x268 0x0606060606060606
2008 00:11:55.442408 MTRR: Fixed MSR 0x269 0x0606060606060606
2009 00:11:55.449012 MTRR: Fixed MSR 0x26a 0x0606060606060606
2010 00:11:55.452603 MTRR: Fixed MSR 0x26b 0x0606060606060606
2011 00:11:55.455927 MTRR: Fixed MSR 0x26c 0x0606060606060606
2012 00:11:55.459198 MTRR: Fixed MSR 0x26d 0x0606060606060606
2013 00:11:55.466118 MTRR: Fixed MSR 0x26e 0x0606060606060606
2014 00:11:55.468894 MTRR: Fixed MSR 0x26f 0x0606060606060606
2015 00:11:55.475631 MTRR: Fixed MSR 0x258 0x0606060606060606
2016 00:11:55.479230 MTRR: Fixed MSR 0x259 0x0000000000000000
2017 00:11:55.482684 MTRR: Fixed MSR 0x268 0x0606060606060606
2018 00:11:55.485876 MTRR: Fixed MSR 0x269 0x0606060606060606
2019 00:11:55.492173 MTRR: Fixed MSR 0x26a 0x0606060606060606
2020 00:11:55.495589 MTRR: Fixed MSR 0x26b 0x0606060606060606
2021 00:11:55.498942 MTRR: Fixed MSR 0x26c 0x0606060606060606
2022 00:11:55.502542 MTRR: Fixed MSR 0x26d 0x0606060606060606
2023 00:11:55.509121 MTRR: Fixed MSR 0x26e 0x0606060606060606
2024 00:11:55.512079 MTRR: Fixed MSR 0x26f 0x0606060606060606
2025 00:11:55.515679 call enable_fixed_mtrr()
2026 00:11:55.518681 call enable_fixed_mtrr()
2027 00:11:55.518792
2028 00:11:55.518867 MTRR check
2029 00:11:55.522355 call enable_fixed_mtrr()
2030 00:11:55.525337 CPU physical address size: 39 bits
2031 00:11:55.530138 CPU physical address size: 39 bits
2032 00:11:55.536844 CPU physical address size: 39 bits
2033 00:11:55.540478 CPU physical address size: 39 bits
2034 00:11:55.543559 MTRR: Fixed MSR 0x250 0x0606060606060606
2035 00:11:55.550228 MTRR: Fixed MSR 0x250 0x0606060606060606
2036 00:11:55.553684 MTRR: Fixed MSR 0x258 0x0606060606060606
2037 00:11:55.557280 MTRR: Fixed MSR 0x259 0x0000000000000000
2038 00:11:55.560363 MTRR: Fixed MSR 0x268 0x0606060606060606
2039 00:11:55.567191 MTRR: Fixed MSR 0x269 0x0606060606060606
2040 00:11:55.570198 MTRR: Fixed MSR 0x26a 0x0606060606060606
2041 00:11:55.573439 MTRR: Fixed MSR 0x26b 0x0606060606060606
2042 00:11:55.576730 MTRR: Fixed MSR 0x26c 0x0606060606060606
2043 00:11:55.583338 MTRR: Fixed MSR 0x26d 0x0606060606060606
2044 00:11:55.586925 MTRR: Fixed MSR 0x26e 0x0606060606060606
2045 00:11:55.589808 MTRR: Fixed MSR 0x26f 0x0606060606060606
2046 00:11:55.597649 MTRR: Fixed MSR 0x258 0x0606060606060606
2047 00:11:55.601002 MTRR: Fixed MSR 0x259 0x0000000000000000
2048 00:11:55.604362 MTRR: Fixed MSR 0x268 0x0606060606060606
2049 00:11:55.607595 MTRR: Fixed MSR 0x269 0x0606060606060606
2050 00:11:55.614091 MTRR: Fixed MSR 0x26a 0x0606060606060606
2051 00:11:55.617558 MTRR: Fixed MSR 0x26b 0x0606060606060606
2052 00:11:55.621055 MTRR: Fixed MSR 0x26c 0x0606060606060606
2053 00:11:55.624100 MTRR: Fixed MSR 0x26d 0x0606060606060606
2054 00:11:55.630710 MTRR: Fixed MSR 0x26e 0x0606060606060606
2055 00:11:55.634348 MTRR: Fixed MSR 0x26f 0x0606060606060606
2056 00:11:55.637360 call enable_fixed_mtrr()
2057 00:11:55.641003 call enable_fixed_mtrr()
2058 00:11:55.643984 Fixed MTRRs : CPU physical address size: 39 bits
2059 00:11:55.647665 Enabled
2060 00:11:55.650753 CPU physical address size: 39 bits
2061 00:11:55.657586 CPU physical address size: 39 bits
2062 00:11:55.660617 Variable MTRRs: Enabled
2063 00:11:55.660730
2064 00:11:55.667284 BS: BS_WRITE_TABLES exit times (exec / console): 382 / 152 ms
2065 00:11:55.670616 Checking cr50 for pending updates
2066 00:11:55.677139 Reading cr50 TPM mode
2067 00:11:55.687909 BS: BS_PAYLOAD_LOAD entry times (exec / console): 9 / 6 ms
2068 00:11:55.697560 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2069 00:11:55.701080 Checking segment from ROM address 0xffc02b38
2070 00:11:55.704503 Checking segment from ROM address 0xffc02b54
2071 00:11:55.711001 Loading segment from ROM address 0xffc02b38
2072 00:11:55.711143 code (compression=0)
2073 00:11:55.720812 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2074 00:11:55.727450 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2075 00:11:55.731006 it's not compressed!
2076 00:11:55.880357 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2077 00:11:55.887302 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2078 00:11:55.894301 Loading segment from ROM address 0xffc02b54
2079 00:11:55.897146 Entry Point 0x30000000
2080 00:11:55.897236 Loaded segments
2081 00:11:55.904089 BS: BS_PAYLOAD_LOAD run times (exec / console): 146 / 63 ms
2082 00:11:55.949526 Finalizing chipset.
2083 00:11:55.952581 Finalizing SMM.
2084 00:11:55.952678 APMC done.
2085 00:11:55.959085 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2086 00:11:55.962762 mp_park_aps done after 0 msecs.
2087 00:11:55.965825 Jumping to boot code at 0x30000000(0x76b25000)
2088 00:11:55.975729 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2089 00:11:55.975862
2090 00:11:55.975937
2091 00:11:55.976004
2092 00:11:55.979461 Starting depthcharge on Voema...
2093 00:11:55.979555
2094 00:11:55.979931 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2095 00:11:55.980044 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2096 00:11:55.980136 Setting prompt string to ['volteer:']
2097 00:11:55.980223 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2098 00:11:55.989437 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2099 00:11:55.989567
2100 00:11:55.995954 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2101 00:11:55.996062
2102 00:11:56.002363 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2103 00:11:56.002495
2104 00:11:56.005796 Failed to find eMMC card reader
2105 00:11:56.005892
2106 00:11:56.005999 Wipe memory regions:
2107 00:11:56.006099
2108 00:11:56.012688 [0x00000000001000, 0x000000000a0000)
2109 00:11:56.012810
2110 00:11:56.015689 [0x00000000100000, 0x00000030000000)
2111 00:11:56.054807
2112 00:11:56.057908 [0x00000032662db0, 0x000000769ef000)
2113 00:11:56.112138
2114 00:11:56.115225 [0x00000100000000, 0x00000480400000)
2115 00:11:56.792471
2116 00:11:56.795790 ec_init: CrosEC protocol v3 supported (256, 256)
2117 00:11:57.228013
2118 00:11:57.228157 R8152: Initializing
2119 00:11:57.228232
2120 00:11:57.231527 Version 6 (ocp_data = 5c30)
2121 00:11:57.231619
2122 00:11:57.234646 R8152: Done initializing
2123 00:11:57.234738
2124 00:11:57.238168 Adding net device
2125 00:11:57.540578
2126 00:11:57.543645 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2127 00:11:57.543738
2128 00:11:57.543809
2129 00:11:57.543876
2130 00:11:57.547231 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2132 00:11:57.647579 volteer: tftpboot 192.168.201.1 11238359/tftp-deploy-823cp21j/kernel/bzImage 11238359/tftp-deploy-823cp21j/kernel/cmdline 11238359/tftp-deploy-823cp21j/ramdisk/ramdisk.cpio.gz
2133 00:11:57.647751 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2134 00:11:57.647851 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2135 00:11:57.652756 tftpboot 192.168.201.1 11238359/tftp-deploy-823cp21j/kernel/bzIploy-823cp21j/kernel/cmdline 11238359/tftp-deploy-823cp21j/ramdisk/ramdisk.cpio.gz
2136 00:11:57.652850
2137 00:11:57.652921 Waiting for link
2138 00:11:57.855191
2139 00:11:57.855352 done.
2140 00:11:57.855428
2141 00:11:57.855496 MAC: 00:24:32:30:77:d1
2142 00:11:57.855562
2143 00:11:57.858471 Sending DHCP discover... done.
2144 00:11:57.858566
2145 00:11:57.861970 Waiting for reply... done.
2146 00:11:57.862061
2147 00:11:57.865020 Sending DHCP request... done.
2148 00:11:57.865112
2149 00:11:57.871951 Waiting for reply... done.
2150 00:11:57.872044
2151 00:11:57.872116 My ip is 192.168.201.13
2152 00:11:57.872183
2153 00:11:57.875486 The DHCP server ip is 192.168.201.1
2154 00:11:57.875578
2155 00:11:57.881741 TFTP server IP predefined by user: 192.168.201.1
2156 00:11:57.881833
2157 00:11:57.888577 Bootfile predefined by user: 11238359/tftp-deploy-823cp21j/kernel/bzImage
2158 00:11:57.888670
2159 00:11:57.891434 Sending tftp read request... done.
2160 00:11:57.891525
2161 00:11:57.894729 Waiting for the transfer...
2162 00:11:57.898364
2163 00:11:58.423244 00000000 ################################################################
2164 00:11:58.423391
2165 00:11:58.951892 00080000 ################################################################
2166 00:11:58.952050
2167 00:11:59.482905 00100000 ################################################################
2168 00:11:59.483060
2169 00:12:00.024805 00180000 ################################################################
2170 00:12:00.024943
2171 00:12:00.558446 00200000 ################################################################
2172 00:12:00.558639
2173 00:12:01.104558 00280000 ################################################################
2174 00:12:01.104764
2175 00:12:01.640880 00300000 ################################################################
2176 00:12:01.641073
2177 00:12:02.155445 00380000 ################################################################
2178 00:12:02.155638
2179 00:12:02.667236 00400000 ################################################################
2180 00:12:02.667411
2181 00:12:03.180128 00480000 ################################################################
2182 00:12:03.180322
2183 00:12:03.696553 00500000 ################################################################
2184 00:12:03.696742
2185 00:12:04.212975 00580000 ################################################################
2186 00:12:04.213242
2187 00:12:04.728835 00600000 ################################################################
2188 00:12:04.728997
2189 00:12:05.247477 00680000 ################################################################
2190 00:12:05.247663
2191 00:12:05.772908 00700000 ################################################################
2192 00:12:05.773090
2193 00:12:06.291100 00780000 ################################################################
2194 00:12:06.291293
2195 00:12:06.805811 00800000 ################################################################
2196 00:12:06.805972
2197 00:12:07.322899 00880000 ################################################################
2198 00:12:07.323068
2199 00:12:07.840741 00900000 ################################################################
2200 00:12:07.840940
2201 00:12:08.365943 00980000 ################################################################
2202 00:12:08.366180
2203 00:12:08.737612 00a00000 ############################################### done.
2204 00:12:08.737799
2205 00:12:08.740991 The bootfile was 10863104 bytes long.
2206 00:12:08.741113
2207 00:12:08.744519 Sending tftp read request... done.
2208 00:12:08.744653
2209 00:12:08.747445 Waiting for the transfer...
2210 00:12:08.747551
2211 00:12:09.267813 00000000 ################################################################
2212 00:12:09.267996
2213 00:12:09.785914 00080000 ################################################################
2214 00:12:09.786081
2215 00:12:10.316581 00100000 ################################################################
2216 00:12:10.316748
2217 00:12:10.860176 00180000 ################################################################
2218 00:12:10.860349
2219 00:12:11.387017 00200000 ################################################################
2220 00:12:11.387194
2221 00:12:11.923650 00280000 ################################################################
2222 00:12:11.923856
2223 00:12:12.456357 00300000 ################################################################
2224 00:12:12.456547
2225 00:12:12.986872 00380000 ################################################################
2226 00:12:12.987065
2227 00:12:13.505601 00400000 ################################################################
2228 00:12:13.505785
2229 00:12:14.026756 00480000 ################################################################
2230 00:12:14.026954
2231 00:12:14.569748 00500000 ################################################################
2232 00:12:14.569944
2233 00:12:15.093643 00580000 ################################################################
2234 00:12:15.093808
2235 00:12:15.622620 00600000 ################################################################
2236 00:12:15.622809
2237 00:12:16.153269 00680000 ################################################################
2238 00:12:16.153458
2239 00:12:16.687841 00700000 ################################################################
2240 00:12:16.688005
2241 00:12:17.215229 00780000 ################################################################
2242 00:12:17.215395
2243 00:12:17.738956 00800000 ################################################################
2244 00:12:17.739123
2245 00:12:18.054312 00880000 ###################################### done.
2246 00:12:18.054487
2247 00:12:18.057726 Sending tftp read request... done.
2248 00:12:18.057821
2249 00:12:18.061230 Waiting for the transfer...
2250 00:12:18.061349
2251 00:12:18.061452 00000000 # done.
2252 00:12:18.061558
2253 00:12:18.071111 Command line loaded dynamically from TFTP file: 11238359/tftp-deploy-823cp21j/kernel/cmdline
2254 00:12:18.071254
2255 00:12:18.087663 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2256 00:12:18.091147
2257 00:12:18.094628 Shutting down all USB controllers.
2258 00:12:18.094724
2259 00:12:18.094798 Removing current net device
2260 00:12:18.094866
2261 00:12:18.097496 Finalizing coreboot
2262 00:12:18.097588
2263 00:12:18.104018 Exiting depthcharge with code 4 at timestamp: 30729252
2264 00:12:18.104111
2265 00:12:18.104190
2266 00:12:18.104262 Starting kernel ...
2267 00:12:18.104328
2268 00:12:18.104392
2269 00:12:18.104802 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
2270 00:12:18.104907 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
2271 00:12:18.104997 Setting prompt string to ['Linux version [0-9]']
2272 00:12:18.105072 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2273 00:12:18.105148 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2275 00:16:40.105742 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
2277 00:16:40.106754 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
2279 00:16:40.107525 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2282 00:16:40.108799 end: 2 depthcharge-action (duration 00:05:00) [common]
2284 00:16:40.109798 Cleaning after the job
2285 00:16:40.110222 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11238359/tftp-deploy-823cp21j/ramdisk
2286 00:16:40.116294 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11238359/tftp-deploy-823cp21j/kernel
2287 00:16:40.124401 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11238359/tftp-deploy-823cp21j/modules
2288 00:16:40.127244 start: 5.1 power-off (timeout 00:00:30) [common]
2289 00:16:40.128014 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-11' '--port=1' '--command=off'
2290 00:16:40.242187 >> Command sent successfully.
2291 00:16:40.246166 Returned 0 in 0 seconds
2292 00:16:40.347286 end: 5.1 power-off (duration 00:00:00) [common]
2294 00:16:40.348832 start: 5.2 read-feedback (timeout 00:10:00) [common]
2295 00:16:40.350294 Listened to connection for namespace 'common' for up to 1s
2296 00:16:41.350773 Finalising connection for namespace 'common'
2297 00:16:41.351437 Disconnecting from shell: Finalise
2298 00:16:41.351834
2299 00:16:41.452798 end: 5.2 read-feedback (duration 00:00:01) [common]
2300 00:16:41.453387 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11238359
2301 00:16:41.508271 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11238359
2302 00:16:41.508471 JobError: Your job cannot terminate cleanly.