Boot log: acer-cbv514-1h-34uz-brya

    1 18:01:13.325474  lava-dispatcher, installed at version: 2023.06
    2 18:01:13.325647  start: 0 validate
    3 18:01:13.325755  Start time: 2023-08-30 18:01:13.325749+00:00 (UTC)
    4 18:01:13.325861  Using caching service: 'http://localhost/cache/?uri=%s'
    5 18:01:13.325979  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
    6 18:01:13.592993  Using caching service: 'http://localhost/cache/?uri=%s'
    7 18:01:13.593203  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.292-cip102-130-g18b864070345b%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 18:01:17.596086  Using caching service: 'http://localhost/cache/?uri=%s'
    9 18:01:17.596658  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.292-cip102-130-g18b864070345b%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 18:01:18.601983  validate duration: 5.28
   12 18:01:18.602298  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 18:01:18.602398  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 18:01:18.602475  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 18:01:18.602578  Not decompressing ramdisk as can be used compressed.
   16 18:01:18.602655  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
   17 18:01:18.602713  saving as /var/lib/lava/dispatcher/tmp/11385824/tftp-deploy-2wij49rg/ramdisk/rootfs.cpio.gz
   18 18:01:18.602765  total size: 8418130 (8 MB)
   19 18:01:18.603762  progress   0 % (0 MB)
   20 18:01:18.605454  progress   5 % (0 MB)
   21 18:01:18.606985  progress  10 % (0 MB)
   22 18:01:18.608545  progress  15 % (1 MB)
   23 18:01:18.610144  progress  20 % (1 MB)
   24 18:01:18.611662  progress  25 % (2 MB)
   25 18:01:18.613194  progress  30 % (2 MB)
   26 18:01:18.614638  progress  35 % (2 MB)
   27 18:01:18.616187  progress  40 % (3 MB)
   28 18:01:18.617788  progress  45 % (3 MB)
   29 18:01:18.619311  progress  50 % (4 MB)
   30 18:01:18.620812  progress  55 % (4 MB)
   31 18:01:18.622365  progress  60 % (4 MB)
   32 18:01:18.623790  progress  65 % (5 MB)
   33 18:01:18.625331  progress  70 % (5 MB)
   34 18:01:18.626887  progress  75 % (6 MB)
   35 18:01:18.628428  progress  80 % (6 MB)
   36 18:01:18.629969  progress  85 % (6 MB)
   37 18:01:18.631457  progress  90 % (7 MB)
   38 18:01:18.633005  progress  95 % (7 MB)
   39 18:01:18.634429  progress 100 % (8 MB)
   40 18:01:18.634596  8 MB downloaded in 0.03 s (252.23 MB/s)
   41 18:01:18.634724  end: 1.1.1 http-download (duration 00:00:00) [common]
   43 18:01:18.634918  end: 1.1 download-retry (duration 00:00:00) [common]
   44 18:01:18.634982  start: 1.2 download-retry (timeout 00:10:00) [common]
   45 18:01:18.635043  start: 1.2.1 http-download (timeout 00:10:00) [common]
   46 18:01:18.635158  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.292-cip102-130-g18b864070345b/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 18:01:18.635221  saving as /var/lib/lava/dispatcher/tmp/11385824/tftp-deploy-2wij49rg/kernel/bzImage
   48 18:01:18.635267  total size: 11469312 (10 MB)
   49 18:01:18.635317  No compression specified
   50 18:01:18.636307  progress   0 % (0 MB)
   51 18:01:18.638432  progress   5 % (0 MB)
   52 18:01:18.640662  progress  10 % (1 MB)
   53 18:01:18.642688  progress  15 % (1 MB)
   54 18:01:18.644784  progress  20 % (2 MB)
   55 18:01:18.646811  progress  25 % (2 MB)
   56 18:01:18.648910  progress  30 % (3 MB)
   57 18:01:18.650960  progress  35 % (3 MB)
   58 18:01:18.653097  progress  40 % (4 MB)
   59 18:01:18.655124  progress  45 % (4 MB)
   60 18:01:18.657216  progress  50 % (5 MB)
   61 18:01:18.659238  progress  55 % (6 MB)
   62 18:01:18.661410  progress  60 % (6 MB)
   63 18:01:18.663417  progress  65 % (7 MB)
   64 18:01:18.665542  progress  70 % (7 MB)
   65 18:01:18.667553  progress  75 % (8 MB)
   66 18:01:18.669688  progress  80 % (8 MB)
   67 18:01:18.671645  progress  85 % (9 MB)
   68 18:01:18.673750  progress  90 % (9 MB)
   69 18:01:18.675681  progress  95 % (10 MB)
   70 18:01:18.677778  progress 100 % (10 MB)
   71 18:01:18.677858  10 MB downloaded in 0.04 s (256.84 MB/s)
   72 18:01:18.677986  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 18:01:18.678173  end: 1.2 download-retry (duration 00:00:00) [common]
   75 18:01:18.678239  start: 1.3 download-retry (timeout 00:10:00) [common]
   76 18:01:18.678302  start: 1.3.1 http-download (timeout 00:10:00) [common]
   77 18:01:18.678421  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.292-cip102-130-g18b864070345b/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 18:01:18.678479  saving as /var/lib/lava/dispatcher/tmp/11385824/tftp-deploy-2wij49rg/modules/modules.tar
   79 18:01:18.678526  total size: 484136 (0 MB)
   80 18:01:18.678572  Using unxz to decompress xz
   81 18:01:18.682161  progress   6 % (0 MB)
   82 18:01:18.682495  progress  13 % (0 MB)
   83 18:01:18.682691  progress  20 % (0 MB)
   84 18:01:18.684426  progress  27 % (0 MB)
   85 18:01:18.686232  progress  33 % (0 MB)
   86 18:01:18.687884  progress  40 % (0 MB)
   87 18:01:18.689682  progress  47 % (0 MB)
   88 18:01:18.691388  progress  54 % (0 MB)
   89 18:01:18.693156  progress  60 % (0 MB)
   90 18:01:18.695295  progress  67 % (0 MB)
   91 18:01:18.697063  progress  74 % (0 MB)
   92 18:01:18.699006  progress  81 % (0 MB)
   93 18:01:18.700860  progress  87 % (0 MB)
   94 18:01:18.702373  progress  94 % (0 MB)
   95 18:01:18.704271  progress 100 % (0 MB)
   96 18:01:18.709548  0 MB downloaded in 0.03 s (14.89 MB/s)
   97 18:01:18.709748  end: 1.3.1 http-download (duration 00:00:00) [common]
   99 18:01:18.709968  end: 1.3 download-retry (duration 00:00:00) [common]
  100 18:01:18.710042  start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
  101 18:01:18.710114  start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
  102 18:01:18.710189  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
  103 18:01:18.710252  start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
  104 18:01:18.710424  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11385824/lava-overlay-2vvckrb6
  105 18:01:18.710528  makedir: /var/lib/lava/dispatcher/tmp/11385824/lava-overlay-2vvckrb6/lava-11385824/bin
  106 18:01:18.710609  makedir: /var/lib/lava/dispatcher/tmp/11385824/lava-overlay-2vvckrb6/lava-11385824/tests
  107 18:01:18.710685  makedir: /var/lib/lava/dispatcher/tmp/11385824/lava-overlay-2vvckrb6/lava-11385824/results
  108 18:01:18.710779  Creating /var/lib/lava/dispatcher/tmp/11385824/lava-overlay-2vvckrb6/lava-11385824/bin/lava-add-keys
  109 18:01:18.710894  Creating /var/lib/lava/dispatcher/tmp/11385824/lava-overlay-2vvckrb6/lava-11385824/bin/lava-add-sources
  110 18:01:18.710995  Creating /var/lib/lava/dispatcher/tmp/11385824/lava-overlay-2vvckrb6/lava-11385824/bin/lava-background-process-start
  111 18:01:18.711090  Creating /var/lib/lava/dispatcher/tmp/11385824/lava-overlay-2vvckrb6/lava-11385824/bin/lava-background-process-stop
  112 18:01:18.711188  Creating /var/lib/lava/dispatcher/tmp/11385824/lava-overlay-2vvckrb6/lava-11385824/bin/lava-common-functions
  113 18:01:18.711278  Creating /var/lib/lava/dispatcher/tmp/11385824/lava-overlay-2vvckrb6/lava-11385824/bin/lava-echo-ipv4
  114 18:01:18.711369  Creating /var/lib/lava/dispatcher/tmp/11385824/lava-overlay-2vvckrb6/lava-11385824/bin/lava-install-packages
  115 18:01:18.711461  Creating /var/lib/lava/dispatcher/tmp/11385824/lava-overlay-2vvckrb6/lava-11385824/bin/lava-installed-packages
  116 18:01:18.711553  Creating /var/lib/lava/dispatcher/tmp/11385824/lava-overlay-2vvckrb6/lava-11385824/bin/lava-os-build
  117 18:01:18.711645  Creating /var/lib/lava/dispatcher/tmp/11385824/lava-overlay-2vvckrb6/lava-11385824/bin/lava-probe-channel
  118 18:01:18.711737  Creating /var/lib/lava/dispatcher/tmp/11385824/lava-overlay-2vvckrb6/lava-11385824/bin/lava-probe-ip
  119 18:01:18.711828  Creating /var/lib/lava/dispatcher/tmp/11385824/lava-overlay-2vvckrb6/lava-11385824/bin/lava-target-ip
  120 18:01:18.711919  Creating /var/lib/lava/dispatcher/tmp/11385824/lava-overlay-2vvckrb6/lava-11385824/bin/lava-target-mac
  121 18:01:18.712017  Creating /var/lib/lava/dispatcher/tmp/11385824/lava-overlay-2vvckrb6/lava-11385824/bin/lava-target-storage
  122 18:01:18.712112  Creating /var/lib/lava/dispatcher/tmp/11385824/lava-overlay-2vvckrb6/lava-11385824/bin/lava-test-case
  123 18:01:18.712219  Creating /var/lib/lava/dispatcher/tmp/11385824/lava-overlay-2vvckrb6/lava-11385824/bin/lava-test-event
  124 18:01:18.712311  Creating /var/lib/lava/dispatcher/tmp/11385824/lava-overlay-2vvckrb6/lava-11385824/bin/lava-test-feedback
  125 18:01:18.712402  Creating /var/lib/lava/dispatcher/tmp/11385824/lava-overlay-2vvckrb6/lava-11385824/bin/lava-test-raise
  126 18:01:18.712493  Creating /var/lib/lava/dispatcher/tmp/11385824/lava-overlay-2vvckrb6/lava-11385824/bin/lava-test-reference
  127 18:01:18.712586  Creating /var/lib/lava/dispatcher/tmp/11385824/lava-overlay-2vvckrb6/lava-11385824/bin/lava-test-runner
  128 18:01:18.712677  Creating /var/lib/lava/dispatcher/tmp/11385824/lava-overlay-2vvckrb6/lava-11385824/bin/lava-test-set
  129 18:01:18.712770  Creating /var/lib/lava/dispatcher/tmp/11385824/lava-overlay-2vvckrb6/lava-11385824/bin/lava-test-shell
  130 18:01:18.712865  Updating /var/lib/lava/dispatcher/tmp/11385824/lava-overlay-2vvckrb6/lava-11385824/bin/lava-install-packages (oe)
  131 18:01:18.712993  Updating /var/lib/lava/dispatcher/tmp/11385824/lava-overlay-2vvckrb6/lava-11385824/bin/lava-installed-packages (oe)
  132 18:01:18.713086  Creating /var/lib/lava/dispatcher/tmp/11385824/lava-overlay-2vvckrb6/lava-11385824/environment
  133 18:01:18.713168  LAVA metadata
  134 18:01:18.713234  - LAVA_JOB_ID=11385824
  135 18:01:18.713303  - LAVA_DISPATCHER_IP=192.168.201.1
  136 18:01:18.713384  start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
  137 18:01:18.713438  skipped lava-vland-overlay
  138 18:01:18.713496  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  139 18:01:18.713558  start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
  140 18:01:18.713607  skipped lava-multinode-overlay
  141 18:01:18.713662  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  142 18:01:18.713721  start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
  143 18:01:18.713778  Loading test definitions
  144 18:01:18.713848  start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
  145 18:01:18.713905  Using /lava-11385824 at stage 0
  146 18:01:18.714140  uuid=11385824_1.4.2.3.1 testdef=None
  147 18:01:18.714212  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  148 18:01:18.714276  start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
  149 18:01:18.714678  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  151 18:01:18.714848  start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
  152 18:01:18.715397  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  154 18:01:18.715569  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
  155 18:01:18.716056  runner path: /var/lib/lava/dispatcher/tmp/11385824/lava-overlay-2vvckrb6/lava-11385824/0/tests/0_dmesg test_uuid 11385824_1.4.2.3.1
  156 18:01:18.716175  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  158 18:01:18.716348  start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
  159 18:01:18.716402  Using /lava-11385824 at stage 1
  160 18:01:18.716629  uuid=11385824_1.4.2.3.5 testdef=None
  161 18:01:18.716696  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  162 18:01:18.716759  start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
  163 18:01:18.717120  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  165 18:01:18.717315  start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
  166 18:01:18.717807  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  168 18:01:18.717980  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
  169 18:01:18.718445  runner path: /var/lib/lava/dispatcher/tmp/11385824/lava-overlay-2vvckrb6/lava-11385824/1/tests/1_bootrr test_uuid 11385824_1.4.2.3.5
  170 18:01:18.718573  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  172 18:01:18.718772  Creating lava-test-runner.conf files
  173 18:01:18.718836  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11385824/lava-overlay-2vvckrb6/lava-11385824/0 for stage 0
  174 18:01:18.718903  - 0_dmesg
  175 18:01:18.718966  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11385824/lava-overlay-2vvckrb6/lava-11385824/1 for stage 1
  176 18:01:18.719036  - 1_bootrr
  177 18:01:18.719109  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  178 18:01:18.719175  start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
  179 18:01:18.725927  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  180 18:01:18.726022  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
  181 18:01:18.726092  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  182 18:01:18.726158  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  183 18:01:18.726222  start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
  184 18:01:18.893016  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  185 18:01:18.893328  start: 1.4.4 extract-modules (timeout 00:10:00) [common]
  186 18:01:18.893454  extracting modules file /var/lib/lava/dispatcher/tmp/11385824/tftp-deploy-2wij49rg/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11385824/extract-overlay-ramdisk-2m9i5ugx/ramdisk
  187 18:01:18.906810  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  188 18:01:18.906931  start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
  189 18:01:18.907007  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11385824/compress-overlay-ud5mu4oq/overlay-1.4.2.4.tar.gz to ramdisk
  190 18:01:18.907064  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11385824/compress-overlay-ud5mu4oq/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11385824/extract-overlay-ramdisk-2m9i5ugx/ramdisk
  191 18:01:18.912824  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  192 18:01:18.912934  start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
  193 18:01:18.913039  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  194 18:01:18.913105  start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
  195 18:01:18.913167  Building ramdisk /var/lib/lava/dispatcher/tmp/11385824/extract-overlay-ramdisk-2m9i5ugx/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11385824/extract-overlay-ramdisk-2m9i5ugx/ramdisk
  196 18:01:18.973047  >> 53981 blocks

  197 18:01:19.757476  rename /var/lib/lava/dispatcher/tmp/11385824/extract-overlay-ramdisk-2m9i5ugx/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11385824/tftp-deploy-2wij49rg/ramdisk/ramdisk.cpio.gz
  198 18:01:19.757801  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  199 18:01:19.757922  start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
  200 18:01:19.758001  start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
  201 18:01:19.758097  No mkimage arch provided, not using FIT.
  202 18:01:19.758171  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  203 18:01:19.758236  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  204 18:01:19.758324  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  205 18:01:19.758396  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
  206 18:01:19.758459  No LXC device requested
  207 18:01:19.758521  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  208 18:01:19.758593  start: 1.6 deploy-device-env (timeout 00:09:59) [common]
  209 18:01:19.758655  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  210 18:01:19.758714  Checking files for TFTP limit of 4294967296 bytes.
  211 18:01:19.759033  end: 1 tftp-deploy (duration 00:00:01) [common]
  212 18:01:19.759124  start: 2 depthcharge-action (timeout 00:05:00) [common]
  213 18:01:19.759189  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  214 18:01:19.759277  substitutions:
  215 18:01:19.759329  - {DTB}: None
  216 18:01:19.759375  - {INITRD}: 11385824/tftp-deploy-2wij49rg/ramdisk/ramdisk.cpio.gz
  217 18:01:19.759420  - {KERNEL}: 11385824/tftp-deploy-2wij49rg/kernel/bzImage
  218 18:01:19.759464  - {LAVA_MAC}: None
  219 18:01:19.759506  - {PRESEED_CONFIG}: None
  220 18:01:19.759548  - {PRESEED_LOCAL}: None
  221 18:01:19.759592  - {RAMDISK}: 11385824/tftp-deploy-2wij49rg/ramdisk/ramdisk.cpio.gz
  222 18:01:19.759635  - {ROOT_PART}: None
  223 18:01:19.759678  - {ROOT}: None
  224 18:01:19.759720  - {SERVER_IP}: 192.168.201.1
  225 18:01:19.759763  - {TEE}: None
  226 18:01:19.759806  Parsed boot commands:
  227 18:01:19.759848  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  228 18:01:19.759990  Parsed boot commands: tftpboot 192.168.201.1 11385824/tftp-deploy-2wij49rg/kernel/bzImage 11385824/tftp-deploy-2wij49rg/kernel/cmdline 11385824/tftp-deploy-2wij49rg/ramdisk/ramdisk.cpio.gz
  229 18:01:19.760061  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  230 18:01:19.760125  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  231 18:01:19.760197  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  232 18:01:19.760261  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  233 18:01:19.760320  Not connected, no need to disconnect.
  234 18:01:19.760374  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  235 18:01:19.760439  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  236 18:01:19.760490  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-1'
  237 18:01:19.763379  Setting prompt string to ['lava-test: # ']
  238 18:01:19.763621  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  239 18:01:19.763697  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  240 18:01:19.763768  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  241 18:01:19.763837  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  242 18:01:19.763988  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-1' '--port=1' '--command=reboot'
  243 18:01:24.913658  >> Command sent successfully.

  244 18:01:24.919818  Returned 0 in 5 seconds
  245 18:01:25.020430  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  247 18:01:25.021809  end: 2.2.2 reset-device (duration 00:00:05) [common]
  248 18:01:25.022205  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  249 18:01:25.022539  Setting prompt string to 'Starting depthcharge on Volmar...'
  250 18:01:25.022794  Changing prompt to 'Starting depthcharge on Volmar...'
  251 18:01:25.023056  depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
  252 18:01:25.023874  [Enter `^Ec?' for help]

  253 18:01:26.392116  

  254 18:01:26.392640  

  255 18:01:26.398966  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 bootblock starting (log level: 8)...

  256 18:01:26.402654  CPU: 12th Gen Intel(R) Core(TM) i3-1215U

  257 18:01:26.405981  CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423

  258 18:01:26.413748  CPU: AES supported, TXT NOT supported, VT supported

  259 18:01:26.421184  Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384

  260 18:01:26.421639  Cache size = 10 MiB

  261 18:01:26.428367  MCH: device id 4609 (rev 04) is Alderlake-P

  262 18:01:26.431887  PCH: device id 5182 (rev 01) is Raptorlake-P SKU

  263 18:01:26.438596  IGD: device id 46b3 (rev 0c) is Alderlake P GT2

  264 18:01:26.439172  VBOOT: Loading verstage.

  265 18:01:26.445823  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  266 18:01:26.449251  FMAP: base = 0x0 size = 0x2000000 #areas = 37

  267 18:01:26.452444  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  268 18:01:26.463950  CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes

  269 18:01:26.470545  CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954

  270 18:01:26.471051  

  271 18:01:26.471338  

  272 18:01:26.480493  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 verstage starting (log level: 8)...

  273 18:01:26.487785  Probing TPM I2C: I2C bus 1 version 0x3230302a

  274 18:01:26.490730  DW I2C bus 1 at 0xfe022000 (400 KHz)

  275 18:01:26.491206  done! DID_VID 0x00281ae0

  276 18:01:26.494385  TPM ready after 0 ms

  277 18:01:26.498562  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  278 18:01:26.511314  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  279 18:01:26.517772  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  280 18:01:26.570571  tlcl_send_startup: Startup return code is 0

  281 18:01:26.570996  TPM: setup succeeded

  282 18:01:26.592166  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  283 18:01:26.614323  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  284 18:01:26.617777  Chrome EC: UHEPI supported

  285 18:01:26.621071  Reading cr50 boot mode

  286 18:01:26.635799  Cr50 says boot_mode is VERIFIED_RW(0x00).

  287 18:01:26.636306  Phase 1

  288 18:01:26.642239  FMAP: area GBB found @ 1805000 (458752 bytes)

  289 18:01:26.649139  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  290 18:01:26.656448  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  291 18:01:26.663338  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  292 18:01:26.663734  Phase 2

  293 18:01:26.663998  Phase 3

  294 18:01:26.670664  FMAP: area GBB found @ 1805000 (458752 bytes)

  295 18:01:26.673975  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  296 18:01:26.680345  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  297 18:01:26.687468  VB2:vb2_verify_keyblock() Checking keyblock signature...

  298 18:01:26.693818  VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW

  299 18:01:26.700278  VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW

  300 18:01:26.707024  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW

  301 18:01:26.721264  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  302 18:01:26.724310  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  303 18:01:26.731948  VB2:vb2_verify_fw_preamble() Verifying preamble.

  304 18:01:26.736241  VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2

  305 18:01:26.742388  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  306 18:01:26.752313  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  307 18:01:26.756014  Phase 4

  308 18:01:26.759145  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  309 18:01:26.765683  VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2

  310 18:01:26.977332  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  311 18:01:26.984266  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  312 18:01:26.987565  Saving vboot hash.

  313 18:01:26.994411  TPM: Extending digest for `VBOOT: boot mode` into PCR 0

  314 18:01:27.009536  tlcl_extend: response is 0

  315 18:01:27.016113  TPM: Digest of `VBOOT: boot mode` to PCR 0 measured

  316 18:01:27.022975  TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1

  317 18:01:27.037753  tlcl_extend: response is 0

  318 18:01:27.044245  TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured

  319 18:01:27.061366  tlcl_lock_nv_write: response is 0

  320 18:01:27.083593  tlcl_lock_nv_write: response is 0

  321 18:01:27.084068  Slot A is selected

  322 18:01:27.089961  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  323 18:01:27.096721  CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes

  324 18:01:27.103071  CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600

  325 18:01:27.110038  BS: verstage times (exec / console): total (unknown) / 257 ms

  326 18:01:27.110394  

  327 18:01:27.110644  

  328 18:01:27.116330  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 romstage starting (log level: 8)...

  329 18:01:27.120800  Google Chrome EC: version:

  330 18:01:27.123709  	ro: volmar_v2.0.14126-e605144e9c

  331 18:01:27.126990  	rw: volmar_v0.0.55-22d1557

  332 18:01:27.130314    running image: 2

  333 18:01:27.133786  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  334 18:01:27.143616  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  335 18:01:27.150505  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  336 18:01:27.156873  CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c

  337 18:01:27.167357  VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  338 18:01:27.177143  VB2:check_ec_hash()            Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  339 18:01:27.180302  EC took 941us to calculate image hash

  340 18:01:27.190285  VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  341 18:01:27.196478  VB2:sync_ec() select_rw=RW(active)

  342 18:01:27.206192  Waited 1425us to clear limit power flag.

  343 18:01:27.209195  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  344 18:01:27.212996  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  345 18:01:27.219670  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  346 18:01:27.222820  gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000

  347 18:01:27.226213  gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000

  348 18:01:27.229616  TCO_STS:   0000 0000

  349 18:01:27.232991  GEN_PMCON: d0015038 00002200

  350 18:01:27.236247  GBLRST_CAUSE: 00000000 00000000

  351 18:01:27.236743  HPR_CAUSE0: 00000000

  352 18:01:27.239641  prev_sleep_state 5

  353 18:01:27.242803  Abort disabling TXT, as CPU is not TXT capable.

  354 18:01:27.250699  cse_lite: Number of partitions = 3

  355 18:01:27.254029  cse_lite: Current partition = RO

  356 18:01:27.254332  cse_lite: Next partition = RO

  357 18:01:27.257727  cse_lite: Flags = 0x7

  358 18:01:27.264060  cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)

  359 18:01:27.274286  cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)

  360 18:01:27.277205  FMAP: area SI_ME found @ 1000 (5238784 bytes)

  361 18:01:27.284109  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  362 18:01:27.290806  cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000

  363 18:01:27.297684  CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8

  364 18:01:27.300685  cse_lite: CSE CBFS RW version : 16.1.25.2049

  365 18:01:27.307621  cse_lite: Set Boot Partition Info Command (RW)

  366 18:01:27.310749  HECI: Global Reset(Type:1) Command

  367 18:01:28.722103  

  368 18:01:28.722562  

  369 18:01:28.729087  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 bootblock starting (log level: 8)...

  370 18:01:28.732617  CPU: 12th Gen Intel(R) Core(TM) i3-1215U

  371 18:01:28.739407  CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423

  372 18:01:28.742791  CPU: AES supported, TXT NOT supported, VT supported

  373 18:01:28.752360  Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384

  374 18:01:28.752817  Cache size = 10 MiB

  375 18:01:28.759506  MCH: device id 4609 (rev 04) is Alderlake-P

  376 18:01:28.762569  PCH: device id 5182 (rev 01) is Raptorlake-P SKU

  377 18:01:28.769103  IGD: device id 46b3 (rev 0c) is Alderlake P GT2

  378 18:01:28.769551  VBOOT: Loading verstage.

  379 18:01:28.776559  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  380 18:01:28.779769  FMAP: base = 0x0 size = 0x2000000 #areas = 37

  381 18:01:28.783382  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  382 18:01:28.791926  CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes

  383 18:01:28.801526  CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954

  384 18:01:28.802025  

  385 18:01:28.802331  

  386 18:01:28.811613  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 verstage starting (log level: 8)...

  387 18:01:28.817834  Probing TPM I2C: I2C bus 1 version 0x3230302a

  388 18:01:28.821312  DW I2C bus 1 at 0xfe022000 (400 KHz)

  389 18:01:28.824429  done! DID_VID 0x00281ae0

  390 18:01:28.824751  TPM ready after 0 ms

  391 18:01:28.828870  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  392 18:01:28.839502  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  393 18:01:28.846401  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  394 18:01:28.901444  tlcl_send_startup: Startup return code is 0

  395 18:01:28.901897  TPM: setup succeeded

  396 18:01:28.922962  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  397 18:01:28.943380  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  398 18:01:28.946876  Chrome EC: UHEPI supported

  399 18:01:28.950313  Reading cr50 boot mode

  400 18:01:28.965302  Cr50 says boot_mode is VERIFIED_RW(0x00).

  401 18:01:28.965659  Phase 1

  402 18:01:28.972077  FMAP: area GBB found @ 1805000 (458752 bytes)

  403 18:01:28.978738  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  404 18:01:28.985746  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  405 18:01:28.992228  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  406 18:01:28.995599  Phase 2

  407 18:01:28.995966  Phase 3

  408 18:01:28.998880  FMAP: area GBB found @ 1805000 (458752 bytes)

  409 18:01:29.005433  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  410 18:01:29.008802  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  411 18:01:29.015465  VB2:vb2_verify_keyblock() Checking keyblock signature...

  412 18:01:29.021791  VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW

  413 18:01:29.028371  VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW

  414 18:01:29.038691  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW

  415 18:01:29.050727  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  416 18:01:29.053594  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  417 18:01:29.060182  VB2:vb2_verify_fw_preamble() Verifying preamble.

  418 18:01:29.067498  VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2

  419 18:01:29.073680  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  420 18:01:29.080219  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  421 18:01:29.084296  Phase 4

  422 18:01:29.087875  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  423 18:01:29.094415  VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2

  424 18:01:29.307118  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  425 18:01:29.313470  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  426 18:01:29.317000  Saving vboot hash.

  427 18:01:29.323759  TPM: Extending digest for `VBOOT: boot mode` into PCR 0

  428 18:01:29.339471  tlcl_extend: response is 0

  429 18:01:29.346456  TPM: Digest of `VBOOT: boot mode` to PCR 0 measured

  430 18:01:29.352589  TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1

  431 18:01:29.367265  tlcl_extend: response is 0

  432 18:01:29.373832  TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured

  433 18:01:29.393858  tlcl_lock_nv_write: response is 0

  434 18:01:29.412789  tlcl_lock_nv_write: response is 0

  435 18:01:29.413268  Slot A is selected

  436 18:01:29.419321  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  437 18:01:29.426032  CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes

  438 18:01:29.432903  CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600

  439 18:01:29.440019  BS: verstage times (exec / console): total (unknown) / 256 ms

  440 18:01:29.440496  

  441 18:01:29.440767  

  442 18:01:29.446479  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 romstage starting (log level: 8)...

  443 18:01:29.449664  Google Chrome EC: version:

  444 18:01:29.453382  	ro: volmar_v2.0.14126-e605144e9c

  445 18:01:29.456606  	rw: volmar_v0.0.55-22d1557

  446 18:01:29.459660    running image: 2

  447 18:01:29.463402  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  448 18:01:29.473008  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  449 18:01:29.479845  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  450 18:01:29.486338  CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c

  451 18:01:29.496402  VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  452 18:01:29.506226  VB2:check_ec_hash()            Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  453 18:01:29.509412  EC took 981us to calculate image hash

  454 18:01:29.519741  VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  455 18:01:29.523077  VB2:sync_ec() select_rw=RW(active)

  456 18:01:29.535059  Waited 269us to clear limit power flag.

  457 18:01:29.538264  pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00

  458 18:01:29.542217  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  459 18:01:29.546068  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  460 18:01:29.549826  gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000

  461 18:01:29.556638  gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000

  462 18:01:29.557105  TCO_STS:   0000 0000

  463 18:01:29.559546  GEN_PMCON: d1001038 00002200

  464 18:01:29.563102  GBLRST_CAUSE: 00000040 00000000

  465 18:01:29.566529  HPR_CAUSE0: 00000000

  466 18:01:29.566997  prev_sleep_state 5

  467 18:01:29.572898  Abort disabling TXT, as CPU is not TXT capable.

  468 18:01:29.580082  cse_lite: Number of partitions = 3

  469 18:01:29.583242  cse_lite: Current partition = RW

  470 18:01:29.583715  cse_lite: Next partition = RW

  471 18:01:29.586644  cse_lite: Flags = 0x7

  472 18:01:29.592807  cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)

  473 18:01:29.602956  cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)

  474 18:01:29.606145  FMAP: area SI_ME found @ 1000 (5238784 bytes)

  475 18:01:29.612806  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  476 18:01:29.619626  cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000

  477 18:01:29.626527  CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8

  478 18:01:29.629719  cse_lite: CSE CBFS RW version : 16.1.25.2049

  479 18:01:29.633003  Boot Count incremented to 2254

  480 18:01:29.639181  CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4

  481 18:01:29.645862  FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)

  482 18:01:29.658806  Probing TPM I2C: done! DID_VID 0x00281ae0

  483 18:01:29.662356  Locality already claimed

  484 18:01:29.665814  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  485 18:01:29.685287  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0

  486 18:01:29.691738  MRC: Hash idx 0x100d comparison successful.

  487 18:01:29.695220  MRC cache found, size f6c8

  488 18:01:29.695654  bootmode is set to: 2

  489 18:01:29.699152  EC returned error result code 3

  490 18:01:29.702330  FW_CONFIG value from CBI is 0x131

  491 18:01:29.709101  fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED

  492 18:01:29.712266  SPD index = 0

  493 18:01:29.718731  CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c

  494 18:01:29.719091  SPD: module type is LPDDR4X

  495 18:01:29.725708  SPD: module part number is K4U6E3S4AB-MGCL

  496 18:01:29.732123  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  497 18:01:29.735475  SPD: device width 16 bits, bus width 16 bits

  498 18:01:29.738937  SPD: module size is 1024 MB (per channel)

  499 18:01:29.808082  CBMEM:

  500 18:01:29.811445  IMD: root @ 0x76fff000 254 entries.

  501 18:01:29.814285  IMD: root @ 0x76ffec00 62 entries.

  502 18:01:29.822079  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  503 18:01:29.825487  RO_VPD is uninitialized or empty.

  504 18:01:29.829060  FMAP: area RW_VPD found @ f29000 (8192 bytes)

  505 18:01:29.832515  RW_VPD is uninitialized or empty.

  506 18:01:29.838906  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  507 18:01:29.842052  External stage cache:

  508 18:01:29.845483  IMD: root @ 0x7bbff000 254 entries.

  509 18:01:29.848657  IMD: root @ 0x7bbfec00 62 entries.

  510 18:01:29.855699  FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)

  511 18:01:29.862586  MRC: Checking cached data update for 'RW_MRC_CACHE'.

  512 18:01:29.865676  MRC: 'RW_MRC_CACHE' does not need update.

  513 18:01:29.866033  8 DIMMs found

  514 18:01:29.869105  SMM Memory Map

  515 18:01:29.872596  SMRAM       : 0x7b800000 0x800000

  516 18:01:29.875500   Subregion 0: 0x7b800000 0x200000

  517 18:01:29.879072   Subregion 1: 0x7ba00000 0x200000

  518 18:01:29.882414   Subregion 2: 0x7bc00000 0x400000

  519 18:01:29.886102  top_of_ram = 0x77000000

  520 18:01:29.888965  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  521 18:01:29.895680  MTRR Range: Start=7b800000 End=7c000000 (Size 800000)

  522 18:01:29.902862  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  523 18:01:29.906200  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  524 18:01:29.906660  Normal boot

  525 18:01:29.915617  CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948

  526 18:01:29.922300  Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0

  527 18:01:29.928946  Processing 237 relocs. Offset value of 0x74ab9000

  528 18:01:29.937010  BS: romstage times (exec / console): total (unknown) / 380 ms

  529 18:01:29.944421  

  530 18:01:29.944881  

  531 18:01:29.951278  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 postcar starting (log level: 8)...

  532 18:01:29.951840  Normal boot

  533 18:01:29.957418  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  534 18:01:29.964127  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  535 18:01:29.970874  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  536 18:01:29.980954  CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0

  537 18:01:30.028790  Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0

  538 18:01:30.034914  Processing 5931 relocs. Offset value of 0x72a2f000

  539 18:01:30.038231  BS: postcar times (exec / console): total (unknown) / 51 ms

  540 18:01:30.041785  

  541 18:01:30.042144  

  542 18:01:30.048632  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 ramstage starting (log level: 8)...

  543 18:01:30.051884  Reserving BERT start 76a1e000, size 10000

  544 18:01:30.054642  Normal boot

  545 18:01:30.058080  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  546 18:01:30.065288  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  547 18:01:30.074886  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  548 18:01:30.078191  FMAP: area RW_VPD found @ f29000 (8192 bytes)

  549 18:01:30.081394  Google Chrome EC: version:

  550 18:01:30.085260  	ro: volmar_v2.0.14126-e605144e9c

  551 18:01:30.088715  	rw: volmar_v0.0.55-22d1557

  552 18:01:30.091582    running image: 2

  553 18:01:30.095100  ACPI _SWS is PM1 Index 8 GPE Index -1

  554 18:01:30.097945  BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms

  555 18:01:30.102066  EC returned error result code 3

  556 18:01:30.105321  FW_CONFIG value from CBI is 0x131

  557 18:01:30.111761  fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED

  558 18:01:30.115508  PCI: 00:1c.2 disabled by fw_config

  559 18:01:30.122387  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  560 18:01:30.126027  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  561 18:01:30.132668  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  562 18:01:30.135759  fw_config match found: FPMCU_MASK=FPMCU_ENABLED

  563 18:01:30.142592  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  564 18:01:30.149134  CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080

  565 18:01:30.152044  microcode: sig=0x906a4 pf=0x80 revision=0x423

  566 18:01:30.159320  microcode: Update skipped, already up-to-date

  567 18:01:30.165499  CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314

  568 18:01:30.197705  Detected 6 core, 8 thread CPU.

  569 18:01:30.201403  Setting up SMI for CPU

  570 18:01:30.204724  IED base = 0x7bc00000

  571 18:01:30.205246  IED size = 0x00400000

  572 18:01:30.208139  Will perform SMM setup.

  573 18:01:30.211415  CPU: 12th Gen Intel(R) Core(TM) i3-1215U.

  574 18:01:30.214733  LAPIC 0x0 in XAPIC mode.

  575 18:01:30.224583  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178

  576 18:01:30.227786  Processing 18 relocs. Offset value of 0x00030000

  577 18:01:30.232677  Attempting to start 7 APs

  578 18:01:30.235504  Waiting for 10ms after sending INIT.

  579 18:01:30.248762  Waiting for SIPI to complete...

  580 18:01:30.252147  LAPIC 0x1 in XAPIC mode.

  581 18:01:30.252608  done.

  582 18:01:30.258614  AP: slot 5 apic_id 1, MCU rev: 0x00000423

  583 18:01:30.258981  LAPIC 0x12 in XAPIC mode.

  584 18:01:30.262024  Waiting for SIPI to complete...

  585 18:01:30.264997  done.

  586 18:01:30.265330  LAPIC 0x10 in XAPIC mode.

  587 18:01:30.272007  AP: slot 1 apic_id 12, MCU rev: 0x00000423

  588 18:01:30.275443  LAPIC 0x9 in XAPIC mode.

  589 18:01:30.278499  AP: slot 4 apic_id 10, MCU rev: 0x00000423

  590 18:01:30.281636  LAPIC 0x14 in XAPIC mode.

  591 18:01:30.281994  LAPIC 0x16 in XAPIC mode.

  592 18:01:30.288564  AP: slot 2 apic_id 14, MCU rev: 0x00000423

  593 18:01:30.291748  AP: slot 3 apic_id 16, MCU rev: 0x00000423

  594 18:01:30.295319  AP: slot 6 apic_id 9, MCU rev: 0x00000423

  595 18:01:30.298598  LAPIC 0x8 in XAPIC mode.

  596 18:01:30.301751  AP: slot 7 apic_id 8, MCU rev: 0x00000423

  597 18:01:30.305088  smm_setup_relocation_handler: enter

  598 18:01:30.308708  smm_setup_relocation_handler: exit

  599 18:01:30.318466  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208

  600 18:01:30.321496  Processing 11 relocs. Offset value of 0x00038000

  601 18:01:30.328727  smm_module_setup_stub: stack_top = 0x7b804000

  602 18:01:30.331862  smm_module_setup_stub: per cpu stack_size = 0x800

  603 18:01:30.338513  smm_module_setup_stub: runtime.start32_offset = 0x4c

  604 18:01:30.341519  smm_module_setup_stub: runtime.smm_size = 0x10000

  605 18:01:30.348466  SMM Module: stub loaded at 38000. Will call 0x76a52094

  606 18:01:30.351625  Installing permanent SMM handler to 0x7b800000

  607 18:01:30.357975  smm_load_module: total_smm_space_needed e468, available -> 200000

  608 18:01:30.367956  Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468

  609 18:01:30.371493  Processing 255 relocs. Offset value of 0x7b9f6000

  610 18:01:30.378052  smm_load_module: smram_start: 0x7b800000

  611 18:01:30.381410  smm_load_module: smram_end: 7ba00000

  612 18:01:30.384933  smm_load_module: handler start 0x7b9f6d5f

  613 18:01:30.387601  smm_load_module: handler_size 98d0

  614 18:01:30.391298  smm_load_module: fxsave_area 0x7b9ff000

  615 18:01:30.394633  smm_load_module: fxsave_size 1000

  616 18:01:30.398214  smm_load_module: CONFIG_MSEG_SIZE 0x0

  617 18:01:30.404750  smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0

  618 18:01:30.411610  smm_load_module: handler_mod_params.smbase = 0x7b800000

  619 18:01:30.415052  smm_load_module: per_cpu_save_state_size = 0x400

  620 18:01:30.418101  smm_load_module: num_cpus = 0x8

  621 18:01:30.424507  smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000

  622 18:01:30.427882  smm_load_module: total_save_state_size = 0x2000

  623 18:01:30.434285  smm_load_module: cpu0 entry: 7b9e6000

  624 18:01:30.438171  smm_create_map: cpus allowed in one segment 30

  625 18:01:30.441180  smm_create_map: min # of segments needed 1

  626 18:01:30.441712  CPU 0x0

  627 18:01:30.447851      smbase 7b9e6000  entry 7b9ee000

  628 18:01:30.450944             ss_start 7b9f5c00  code_end 7b9ee208

  629 18:01:30.451395  CPU 0x1

  630 18:01:30.454377      smbase 7b9e5c00  entry 7b9edc00

  631 18:01:30.460814             ss_start 7b9f5800  code_end 7b9ede08

  632 18:01:30.461205  CPU 0x2

  633 18:01:30.464602      smbase 7b9e5800  entry 7b9ed800

  634 18:01:30.471055             ss_start 7b9f5400  code_end 7b9eda08

  635 18:01:30.471559  CPU 0x3

  636 18:01:30.474203      smbase 7b9e5400  entry 7b9ed400

  637 18:01:30.477535             ss_start 7b9f5000  code_end 7b9ed608

  638 18:01:30.481007  CPU 0x4

  639 18:01:30.484579      smbase 7b9e5000  entry 7b9ed000

  640 18:01:30.487660             ss_start 7b9f4c00  code_end 7b9ed208

  641 18:01:30.488231  CPU 0x5

  642 18:01:30.494306      smbase 7b9e4c00  entry 7b9ecc00

  643 18:01:30.497333             ss_start 7b9f4800  code_end 7b9ece08

  644 18:01:30.497782  CPU 0x6

  645 18:01:30.500885      smbase 7b9e4800  entry 7b9ec800

  646 18:01:30.507743             ss_start 7b9f4400  code_end 7b9eca08

  647 18:01:30.508273  CPU 0x7

  648 18:01:30.511260      smbase 7b9e4400  entry 7b9ec400

  649 18:01:30.517663             ss_start 7b9f4000  code_end 7b9ec608

  650 18:01:30.523970  Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208

  651 18:01:30.530863  Processing 11 relocs. Offset value of 0x7b9ee000

  652 18:01:30.534082  smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000

  653 18:01:30.540492  SMM Module: placing smm entry code at 7b9edc00,  cpu # 0x1

  654 18:01:30.547544  smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes

  655 18:01:30.554138  SMM Module: placing smm entry code at 7b9ed800,  cpu # 0x2

  656 18:01:30.560414  smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes

  657 18:01:30.567567  SMM Module: placing smm entry code at 7b9ed400,  cpu # 0x3

  658 18:01:30.573965  smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes

  659 18:01:30.576942  SMM Module: placing smm entry code at 7b9ed000,  cpu # 0x4

  660 18:01:30.583714  smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes

  661 18:01:30.590953  SMM Module: placing smm entry code at 7b9ecc00,  cpu # 0x5

  662 18:01:30.596769  smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes

  663 18:01:30.603569  SMM Module: placing smm entry code at 7b9ec800,  cpu # 0x6

  664 18:01:30.610537  smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes

  665 18:01:30.617177  SMM Module: placing smm entry code at 7b9ec400,  cpu # 0x7

  666 18:01:30.623365  smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes

  667 18:01:30.627011  smm_module_setup_stub: stack_top = 0x7b804000

  668 18:01:30.633628  smm_module_setup_stub: per cpu stack_size = 0x800

  669 18:01:30.636867  smm_module_setup_stub: runtime.start32_offset = 0x4c

  670 18:01:30.643128  smm_module_setup_stub: runtime.smm_size = 0x200000

  671 18:01:30.649802  SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f

  672 18:01:30.653586  Clearing SMI status registers

  673 18:01:30.656423  SMI_STS: PM1 

  674 18:01:30.656804  PM1_STS: WAK PWRBTN 

  675 18:01:30.663162  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0

  676 18:01:30.666675  In relocation handler: CPU 0

  677 18:01:30.673057  New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000

  678 18:01:30.676631  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  679 18:01:30.680359  Relocation complete.

  680 18:01:30.686351  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5

  681 18:01:30.690022  In relocation handler: CPU 5

  682 18:01:30.692994  New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000

  683 18:01:30.696725  Relocation complete.

  684 18:01:30.702953  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3

  685 18:01:30.706602  In relocation handler: CPU 3

  686 18:01:30.710013  New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000

  687 18:01:30.713007  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  688 18:01:30.716409  Relocation complete.

  689 18:01:30.723100  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4

  690 18:01:30.726372  In relocation handler: CPU 4

  691 18:01:30.729514  New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000

  692 18:01:30.736753  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  693 18:01:30.737182  Relocation complete.

  694 18:01:30.743326  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2

  695 18:01:30.746111  In relocation handler: CPU 2

  696 18:01:30.753309  New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000

  697 18:01:30.756429  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  698 18:01:30.759488  Relocation complete.

  699 18:01:30.766404  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1

  700 18:01:30.769594  In relocation handler: CPU 1

  701 18:01:30.773059  New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000

  702 18:01:30.776044  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  703 18:01:30.779383  Relocation complete.

  704 18:01:30.786048  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6

  705 18:01:30.789579  In relocation handler: CPU 6

  706 18:01:30.792772  New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000

  707 18:01:30.796107  Relocation complete.

  708 18:01:30.802762  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7

  709 18:01:30.806132  In relocation handler: CPU 7

  710 18:01:30.809656  New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000

  711 18:01:30.815837  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  712 18:01:30.816198  Relocation complete.

  713 18:01:30.819318  Initializing CPU #0

  714 18:01:30.823091  CPU: vendor Intel device 906a4

  715 18:01:30.826388  CPU: family 06, model 9a, stepping 04

  716 18:01:30.829199  Clearing out pending MCEs

  717 18:01:30.832727  cpu: energy policy set to 7

  718 18:01:30.836146  Turbo is available but hidden

  719 18:01:30.839225  Turbo is available and visible

  720 18:01:30.842708  microcode: Update skipped, already up-to-date

  721 18:01:30.846022  CPU #0 initialized

  722 18:01:30.846453  Initializing CPU #5

  723 18:01:30.849100  Initializing CPU #4

  724 18:01:30.853091  Initializing CPU #3

  725 18:01:30.853619  Initializing CPU #1

  726 18:01:30.855697  CPU: vendor Intel device 906a4

  727 18:01:30.858904  CPU: family 06, model 9a, stepping 04

  728 18:01:30.862085  Initializing CPU #6

  729 18:01:30.865645  CPU: vendor Intel device 906a4

  730 18:01:30.868940  CPU: family 06, model 9a, stepping 04

  731 18:01:30.872694  CPU: vendor Intel device 906a4

  732 18:01:30.875607  CPU: family 06, model 9a, stepping 04

  733 18:01:30.879264  Initializing CPU #2

  734 18:01:30.879625  Clearing out pending MCEs

  735 18:01:30.882070  CPU: vendor Intel device 906a4

  736 18:01:30.889125  CPU: family 06, model 9a, stepping 04

  737 18:01:30.889619  cpu: energy policy set to 7

  738 18:01:30.892435  Clearing out pending MCEs

  739 18:01:30.895830  Clearing out pending MCEs

  740 18:01:30.898973  Initializing CPU #7

  741 18:01:30.899433  Clearing out pending MCEs

  742 18:01:30.902187  cpu: energy policy set to 7

  743 18:01:30.908940  microcode: Update skipped, already up-to-date

  744 18:01:30.909322  CPU #3 initialized

  745 18:01:30.912291  cpu: energy policy set to 7

  746 18:01:30.915578  CPU: vendor Intel device 906a4

  747 18:01:30.919154  CPU: family 06, model 9a, stepping 04

  748 18:01:30.925376  microcode: Update skipped, already up-to-date

  749 18:01:30.925826  CPU #1 initialized

  750 18:01:30.928895  cpu: energy policy set to 7

  751 18:01:30.932144  microcode: Update skipped, already up-to-date

  752 18:01:30.935493  CPU #4 initialized

  753 18:01:30.938839  microcode: Update skipped, already up-to-date

  754 18:01:30.942563  CPU #2 initialized

  755 18:01:30.945924  Clearing out pending MCEs

  756 18:01:30.948998  CPU: vendor Intel device 906a4

  757 18:01:30.952071  CPU: family 06, model 9a, stepping 04

  758 18:01:30.955280  cpu: energy policy set to 7

  759 18:01:30.955753  Clearing out pending MCEs

  760 18:01:30.961935  microcode: Update skipped, already up-to-date

  761 18:01:30.962276  CPU #7 initialized

  762 18:01:30.965198  cpu: energy policy set to 7

  763 18:01:30.968565  CPU: vendor Intel device 906a4

  764 18:01:30.972124  CPU: family 06, model 9a, stepping 04

  765 18:01:30.978793  microcode: Update skipped, already up-to-date

  766 18:01:30.979243  CPU #6 initialized

  767 18:01:30.982056  Clearing out pending MCEs

  768 18:01:30.985764  cpu: energy policy set to 7

  769 18:01:30.988817  microcode: Update skipped, already up-to-date

  770 18:01:30.991808  CPU #5 initialized

  771 18:01:30.995495  bsp_do_flight_plan done after 727 msecs.

  772 18:01:30.998678  CPU: frequency set to 4400 MHz

  773 18:01:31.002367  Enabling SMIs.

  774 18:01:31.008490  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms

  775 18:01:31.023255  Probing TPM I2C: done! DID_VID 0x00281ae0

  776 18:01:31.026364  Locality already claimed

  777 18:01:31.029763  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  778 18:01:31.041594  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  779 18:01:31.044508  Enabling GPIO PM b/c CR50 has long IRQ pulse support

  780 18:01:31.051283  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  781 18:01:31.057717  CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8

  782 18:01:31.061038  Found a VBT of 9216 bytes after decompression

  783 18:01:31.064520  PCI  1.0, PIN A, using IRQ #16

  784 18:01:31.068452  PCI  2.0, PIN A, using IRQ #17

  785 18:01:31.071076  PCI  4.0, PIN A, using IRQ #18

  786 18:01:31.074654  PCI  5.0, PIN A, using IRQ #16

  787 18:01:31.077700  PCI  6.0, PIN A, using IRQ #16

  788 18:01:31.081330  PCI  6.2, PIN C, using IRQ #18

  789 18:01:31.084380  PCI  7.0, PIN A, using IRQ #19

  790 18:01:31.087354  PCI  7.1, PIN B, using IRQ #20

  791 18:01:31.090855  PCI  7.2, PIN C, using IRQ #21

  792 18:01:31.094416  PCI  7.3, PIN D, using IRQ #22

  793 18:01:31.097333  PCI  8.0, PIN A, using IRQ #23

  794 18:01:31.100746  PCI  D.0, PIN A, using IRQ #17

  795 18:01:31.104004  PCI  D.1, PIN B, using IRQ #19

  796 18:01:31.107776  PCI 10.0, PIN A, using IRQ #24

  797 18:01:31.108272  PCI 10.1, PIN B, using IRQ #25

  798 18:01:31.110628  PCI 10.6, PIN C, using IRQ #20

  799 18:01:31.114051  PCI 10.7, PIN D, using IRQ #21

  800 18:01:31.117169  PCI 11.0, PIN A, using IRQ #26

  801 18:01:31.120554  PCI 11.1, PIN B, using IRQ #27

  802 18:01:31.124028  PCI 11.2, PIN C, using IRQ #28

  803 18:01:31.127152  PCI 11.3, PIN D, using IRQ #29

  804 18:01:31.130727  PCI 12.0, PIN A, using IRQ #30

  805 18:01:31.133707  PCI 12.6, PIN B, using IRQ #31

  806 18:01:31.137368  PCI 12.7, PIN C, using IRQ #22

  807 18:01:31.140739  PCI 13.0, PIN A, using IRQ #32

  808 18:01:31.143898  PCI 13.1, PIN B, using IRQ #33

  809 18:01:31.147668  PCI 13.2, PIN C, using IRQ #34

  810 18:01:31.150724  PCI 13.3, PIN D, using IRQ #35

  811 18:01:31.154510  PCI 14.0, PIN B, using IRQ #23

  812 18:01:31.157104  PCI 14.1, PIN A, using IRQ #36

  813 18:01:31.160696  PCI 14.3, PIN C, using IRQ #17

  814 18:01:31.161061  PCI 15.0, PIN A, using IRQ #37

  815 18:01:31.163729  PCI 15.1, PIN B, using IRQ #38

  816 18:01:31.166685  PCI 15.2, PIN C, using IRQ #39

  817 18:01:31.170642  PCI 15.3, PIN D, using IRQ #40

  818 18:01:31.173897  PCI 16.0, PIN A, using IRQ #18

  819 18:01:31.177523  PCI 16.1, PIN B, using IRQ #19

  820 18:01:31.180324  PCI 16.2, PIN C, using IRQ #20

  821 18:01:31.183539  PCI 16.3, PIN D, using IRQ #21

  822 18:01:31.187356  PCI 16.4, PIN A, using IRQ #18

  823 18:01:31.190452  PCI 16.5, PIN B, using IRQ #19

  824 18:01:31.193925  PCI 17.0, PIN A, using IRQ #22

  825 18:01:31.197119  PCI 19.0, PIN A, using IRQ #41

  826 18:01:31.200704  PCI 19.1, PIN B, using IRQ #42

  827 18:01:31.204099  PCI 19.2, PIN C, using IRQ #43

  828 18:01:31.206836  PCI 1C.0, PIN A, using IRQ #16

  829 18:01:31.210724  PCI 1C.1, PIN B, using IRQ #17

  830 18:01:31.213708  PCI 1C.2, PIN C, using IRQ #18

  831 18:01:31.214166  PCI 1C.3, PIN D, using IRQ #19

  832 18:01:31.216618  PCI 1C.4, PIN A, using IRQ #16

  833 18:01:31.220383  PCI 1C.5, PIN B, using IRQ #17

  834 18:01:31.223727  PCI 1C.6, PIN C, using IRQ #18

  835 18:01:31.226989  PCI 1C.7, PIN D, using IRQ #19

  836 18:01:31.230550  PCI 1D.0, PIN A, using IRQ #16

  837 18:01:31.233628  PCI 1D.1, PIN B, using IRQ #17

  838 18:01:31.236910  PCI 1D.2, PIN C, using IRQ #18

  839 18:01:31.240372  PCI 1D.3, PIN D, using IRQ #19

  840 18:01:31.243507  PCI 1E.0, PIN A, using IRQ #23

  841 18:01:31.246976  PCI 1E.1, PIN B, using IRQ #20

  842 18:01:31.250346  PCI 1E.2, PIN C, using IRQ #44

  843 18:01:31.253509  PCI 1E.3, PIN D, using IRQ #45

  844 18:01:31.256591  PCI 1F.3, PIN B, using IRQ #22

  845 18:01:31.259750  PCI 1F.4, PIN C, using IRQ #23

  846 18:01:31.263310  PCI 1F.6, PIN D, using IRQ #20

  847 18:01:31.266819  PCI 1F.7, PIN A, using IRQ #21

  848 18:01:31.269794  IRQ: Using dynamically assigned PCI IO-APIC IRQs

  849 18:01:31.276693  WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called

  850 18:01:31.456547  FSPS returned 0

  851 18:01:31.459718  Executing Phase 1 of FspMultiPhaseSiInit

  852 18:01:31.469853  FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  853 18:01:31.473018  port C0 DISC req: usage 1 usb3 1 usb2 1

  854 18:01:31.476795  Raw Buffer output 0 00000111

  855 18:01:31.479413  Raw Buffer output 1 00000000

  856 18:01:31.484124  pmc_send_ipc_cmd succeeded

  857 18:01:31.490260  port C1 DISC req: usage 1 usb3 3 usb2 3

  858 18:01:31.490621  Raw Buffer output 0 00000331

  859 18:01:31.493279  Raw Buffer output 1 00000000

  860 18:01:31.497676  pmc_send_ipc_cmd succeeded

  861 18:01:31.501626  Detected 6 core, 8 thread CPU.

  862 18:01:31.504867  Detected 6 core, 8 thread CPU.

  863 18:01:31.509854  Detected 6 core, 8 thread CPU.

  864 18:01:31.512955  Detected 6 core, 8 thread CPU.

  865 18:01:31.516408  Detected 6 core, 8 thread CPU.

  866 18:01:31.520040  Detected 6 core, 8 thread CPU.

  867 18:01:31.523005  Detected 6 core, 8 thread CPU.

  868 18:01:31.526542  Detected 6 core, 8 thread CPU.

  869 18:01:31.529748  Detected 6 core, 8 thread CPU.

  870 18:01:31.533292  Detected 6 core, 8 thread CPU.

  871 18:01:31.536672  Detected 6 core, 8 thread CPU.

  872 18:01:31.539988  Detected 6 core, 8 thread CPU.

  873 18:01:31.543544  Detected 6 core, 8 thread CPU.

  874 18:01:31.546344  Detected 6 core, 8 thread CPU.

  875 18:01:31.549656  Detected 6 core, 8 thread CPU.

  876 18:01:31.553079  Detected 6 core, 8 thread CPU.

  877 18:01:31.556677  Detected 6 core, 8 thread CPU.

  878 18:01:31.559437  Detected 6 core, 8 thread CPU.

  879 18:01:31.562973  Detected 6 core, 8 thread CPU.

  880 18:01:31.566262  Detected 6 core, 8 thread CPU.

  881 18:01:31.569447  Detected 6 core, 8 thread CPU.

  882 18:01:31.572871  Detected 6 core, 8 thread CPU.

  883 18:01:31.854128  Detected 6 core, 8 thread CPU.

  884 18:01:31.857240  Detected 6 core, 8 thread CPU.

  885 18:01:31.860478  Detected 6 core, 8 thread CPU.

  886 18:01:31.863759  Detected 6 core, 8 thread CPU.

  887 18:01:31.867110  Detected 6 core, 8 thread CPU.

  888 18:01:31.870457  Detected 6 core, 8 thread CPU.

  889 18:01:31.873942  Detected 6 core, 8 thread CPU.

  890 18:01:31.877247  Detected 6 core, 8 thread CPU.

  891 18:01:31.880508  Detected 6 core, 8 thread CPU.

  892 18:01:31.883544  Detected 6 core, 8 thread CPU.

  893 18:01:31.887107  Detected 6 core, 8 thread CPU.

  894 18:01:31.890460  Detected 6 core, 8 thread CPU.

  895 18:01:31.893804  Detected 6 core, 8 thread CPU.

  896 18:01:31.897161  Detected 6 core, 8 thread CPU.

  897 18:01:31.900278  Detected 6 core, 8 thread CPU.

  898 18:01:31.903629  Detected 6 core, 8 thread CPU.

  899 18:01:31.907229  Detected 6 core, 8 thread CPU.

  900 18:01:31.910587  Detected 6 core, 8 thread CPU.

  901 18:01:31.913737  Detected 6 core, 8 thread CPU.

  902 18:01:31.917311  Detected 6 core, 8 thread CPU.

  903 18:01:31.920300  Display FSP Version Info HOB

  904 18:01:31.923882  Reference Code - CPU = c.0.65.70

  905 18:01:31.924236  uCode Version = 0.0.4.23

  906 18:01:31.926958  TXT ACM version = ff.ff.ff.ffff

  907 18:01:31.930396  Reference Code - ME = c.0.65.70

  908 18:01:31.933821  MEBx version = 0.0.0.0

  909 18:01:31.937264  ME Firmware Version = Lite SKU

  910 18:01:31.940379  Reference Code - PCH = c.0.65.70

  911 18:01:31.943745  PCH-CRID Status = Disabled

  912 18:01:31.947003  PCH-CRID Original Value = ff.ff.ff.ffff

  913 18:01:31.950417  PCH-CRID New Value = ff.ff.ff.ffff

  914 18:01:31.953931  OPROM - RST - RAID = ff.ff.ff.ffff

  915 18:01:31.956885  PCH Hsio Version = 4.0.0.0

  916 18:01:31.960413  Reference Code - SA - System Agent = c.0.65.70

  917 18:01:31.963746  Reference Code - MRC = 0.0.3.80

  918 18:01:31.966831  SA - PCIe Version = c.0.65.70

  919 18:01:31.970575  SA-CRID Status = Disabled

  920 18:01:31.973623  SA-CRID Original Value = 0.0.0.4

  921 18:01:31.977096  SA-CRID New Value = 0.0.0.4

  922 18:01:31.980365  OPROM - VBIOS = ff.ff.ff.ffff

  923 18:01:31.983796  IO Manageability Engine FW Version = 24.0.4.0

  924 18:01:31.986735  PHY Build Version = 0.0.0.2016

  925 18:01:31.989997  Thunderbolt(TM) FW Version = 0.0.0.0

  926 18:01:31.996888  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  927 18:01:32.003925  BS: BS_DEV_INIT_CHIPS run times (exec / console): 482 / 507 ms

  928 18:01:32.007093  Enumerating buses...

  929 18:01:32.010205  Show all devs... Before device enumeration.

  930 18:01:32.013542  Root Device: enabled 1

  931 18:01:32.013990  CPU_CLUSTER: 0: enabled 1

  932 18:01:32.016716  DOMAIN: 0000: enabled 1

  933 18:01:32.020064  GPIO: 0: enabled 1

  934 18:01:32.020416  PCI: 00:00.0: enabled 1

  935 18:01:32.023482  PCI: 00:01.0: enabled 0

  936 18:01:32.026578  PCI: 00:01.1: enabled 0

  937 18:01:32.030825  PCI: 00:02.0: enabled 1

  938 18:01:32.031284  PCI: 00:04.0: enabled 1

  939 18:01:32.033627  PCI: 00:05.0: enabled 0

  940 18:01:32.036935  PCI: 00:06.0: enabled 1

  941 18:01:32.040283  PCI: 00:06.2: enabled 0

  942 18:01:32.040730  PCI: 00:07.0: enabled 0

  943 18:01:32.044028  PCI: 00:07.1: enabled 0

  944 18:01:32.046781  PCI: 00:07.2: enabled 0

  945 18:01:32.050040  PCI: 00:07.3: enabled 0

  946 18:01:32.050393  PCI: 00:08.0: enabled 0

  947 18:01:32.053549  PCI: 00:09.0: enabled 0

  948 18:01:32.056854  PCI: 00:0a.0: enabled 1

  949 18:01:32.057332  PCI: 00:0d.0: enabled 1

  950 18:01:32.059824  PCI: 00:0d.1: enabled 0

  951 18:01:32.063265  PCI: 00:0d.2: enabled 0

  952 18:01:32.066589  PCI: 00:0d.3: enabled 0

  953 18:01:32.066673  PCI: 00:0e.0: enabled 0

  954 18:01:32.070215  PCI: 00:10.0: enabled 0

  955 18:01:32.073764  PCI: 00:10.1: enabled 0

  956 18:01:32.076629  PCI: 00:10.6: enabled 0

  957 18:01:32.077050  PCI: 00:10.7: enabled 0

  958 18:01:32.079988  PCI: 00:12.0: enabled 0

  959 18:01:32.083272  PCI: 00:12.6: enabled 0

  960 18:01:32.086598  PCI: 00:12.7: enabled 0

  961 18:01:32.086949  PCI: 00:13.0: enabled 0

  962 18:01:32.090090  PCI: 00:14.0: enabled 1

  963 18:01:32.093151  PCI: 00:14.1: enabled 0

  964 18:01:32.096452  PCI: 00:14.2: enabled 1

  965 18:01:32.096899  PCI: 00:14.3: enabled 1

  966 18:01:32.100002  PCI: 00:15.0: enabled 1

  967 18:01:32.103203  PCI: 00:15.1: enabled 1

  968 18:01:32.106663  PCI: 00:15.2: enabled 0

  969 18:01:32.107016  PCI: 00:15.3: enabled 1

  970 18:01:32.109863  PCI: 00:16.0: enabled 1

  971 18:01:32.113188  PCI: 00:16.1: enabled 0

  972 18:01:32.113638  PCI: 00:16.2: enabled 0

  973 18:01:32.116492  PCI: 00:16.3: enabled 0

  974 18:01:32.119812  PCI: 00:16.4: enabled 0

  975 18:01:32.123111  PCI: 00:16.5: enabled 0

  976 18:01:32.123547  PCI: 00:17.0: enabled 1

  977 18:01:32.126866  PCI: 00:19.0: enabled 0

  978 18:01:32.130600  PCI: 00:19.1: enabled 1

  979 18:01:32.133120  PCI: 00:19.2: enabled 0

  980 18:01:32.133590  PCI: 00:1a.0: enabled 0

  981 18:01:32.136271  PCI: 00:1c.0: enabled 0

  982 18:01:32.139422  PCI: 00:1c.1: enabled 0

  983 18:01:32.142849  PCI: 00:1c.2: enabled 0

  984 18:01:32.143203  PCI: 00:1c.3: enabled 0

  985 18:01:32.146173  PCI: 00:1c.4: enabled 0

  986 18:01:32.149572  PCI: 00:1c.5: enabled 0

  987 18:01:32.149922  PCI: 00:1c.6: enabled 0

  988 18:01:32.152941  PCI: 00:1c.7: enabled 0

  989 18:01:32.156172  PCI: 00:1d.0: enabled 0

  990 18:01:32.159559  PCI: 00:1d.1: enabled 0

  991 18:01:32.159912  PCI: 00:1d.2: enabled 0

  992 18:01:32.162661  PCI: 00:1d.3: enabled 0

  993 18:01:32.166161  PCI: 00:1e.0: enabled 1

  994 18:01:32.169874  PCI: 00:1e.1: enabled 0

  995 18:01:32.170227  PCI: 00:1e.2: enabled 0

  996 18:01:32.172928  PCI: 00:1e.3: enabled 1

  997 18:01:32.176032  PCI: 00:1f.0: enabled 1

  998 18:01:32.179675  PCI: 00:1f.1: enabled 0

  999 18:01:32.180106  PCI: 00:1f.2: enabled 1

 1000 18:01:32.182940  PCI: 00:1f.3: enabled 1

 1001 18:01:32.186133  PCI: 00:1f.4: enabled 0

 1002 18:01:32.189639  PCI: 00:1f.5: enabled 1

 1003 18:01:32.190086  PCI: 00:1f.6: enabled 0

 1004 18:01:32.192905  PCI: 00:1f.7: enabled 0

 1005 18:01:32.196172  GENERIC: 0.0: enabled 1

 1006 18:01:32.196621  GENERIC: 0.0: enabled 1

 1007 18:01:32.199653  GENERIC: 1.0: enabled 1

 1008 18:01:32.203208  GENERIC: 0.0: enabled 1

 1009 18:01:32.206380  GENERIC: 1.0: enabled 1

 1010 18:01:32.206734  USB0 port 0: enabled 1

 1011 18:01:32.209280  USB0 port 0: enabled 1

 1012 18:01:32.213080  GENERIC: 0.0: enabled 1

 1013 18:01:32.213552  I2C: 00:1a: enabled 1

 1014 18:01:32.216087  I2C: 00:31: enabled 1

 1015 18:01:32.219380  I2C: 00:32: enabled 1

 1016 18:01:32.222715  I2C: 00:50: enabled 1

 1017 18:01:32.223065  I2C: 00:10: enabled 1

 1018 18:01:32.226224  I2C: 00:15: enabled 1

 1019 18:01:32.229729  I2C: 00:2c: enabled 1

 1020 18:01:32.230157  GENERIC: 0.0: enabled 1

 1021 18:01:32.233120  SPI: 00: enabled 1

 1022 18:01:32.236283  PNP: 0c09.0: enabled 1

 1023 18:01:32.236724  GENERIC: 0.0: enabled 1

 1024 18:01:32.239466  USB3 port 0: enabled 1

 1025 18:01:32.243040  USB3 port 1: enabled 0

 1026 18:01:32.243475  USB3 port 2: enabled 1

 1027 18:01:32.246146  USB3 port 3: enabled 0

 1028 18:01:32.249557  USB2 port 0: enabled 1

 1029 18:01:32.252947  USB2 port 1: enabled 0

 1030 18:01:32.253411  USB2 port 2: enabled 1

 1031 18:01:32.256148  USB2 port 3: enabled 0

 1032 18:01:32.259358  USB2 port 4: enabled 0

 1033 18:01:32.259456  USB2 port 5: enabled 1

 1034 18:01:32.262294  USB2 port 6: enabled 0

 1035 18:01:32.266012  USB2 port 7: enabled 0

 1036 18:01:32.266379  USB2 port 8: enabled 1

 1037 18:01:32.269532  USB2 port 9: enabled 1

 1038 18:01:32.272819  USB3 port 0: enabled 1

 1039 18:01:32.276516  USB3 port 1: enabled 0

 1040 18:01:32.276965  USB3 port 2: enabled 0

 1041 18:01:32.279686  USB3 port 3: enabled 0

 1042 18:01:32.282672  GENERIC: 0.0: enabled 1

 1043 18:01:32.283038  GENERIC: 1.0: enabled 1

 1044 18:01:32.285946  APIC: 00: enabled 1

 1045 18:01:32.289176  APIC: 12: enabled 1

 1046 18:01:32.289702  APIC: 14: enabled 1

 1047 18:01:32.292651  APIC: 16: enabled 1

 1048 18:01:32.296293  APIC: 10: enabled 1

 1049 18:01:32.296640  APIC: 01: enabled 1

 1050 18:01:32.299541  APIC: 09: enabled 1

 1051 18:01:32.300038  APIC: 08: enabled 1

 1052 18:01:32.302729  Compare with tree...

 1053 18:01:32.306417  Root Device: enabled 1

 1054 18:01:32.309245   CPU_CLUSTER: 0: enabled 1

 1055 18:01:32.309617    APIC: 00: enabled 1

 1056 18:01:32.312626    APIC: 12: enabled 1

 1057 18:01:32.316330    APIC: 14: enabled 1

 1058 18:01:32.316766    APIC: 16: enabled 1

 1059 18:01:32.319745    APIC: 10: enabled 1

 1060 18:01:32.322755    APIC: 01: enabled 1

 1061 18:01:32.323196    APIC: 09: enabled 1

 1062 18:01:32.326140    APIC: 08: enabled 1

 1063 18:01:32.329651   DOMAIN: 0000: enabled 1

 1064 18:01:32.330112    GPIO: 0: enabled 1

 1065 18:01:32.332743    PCI: 00:00.0: enabled 1

 1066 18:01:32.335984    PCI: 00:01.0: enabled 0

 1067 18:01:32.339667    PCI: 00:01.1: enabled 0

 1068 18:01:32.342723    PCI: 00:02.0: enabled 1

 1069 18:01:32.343153    PCI: 00:04.0: enabled 1

 1070 18:01:32.346188     GENERIC: 0.0: enabled 1

 1071 18:01:32.349463    PCI: 00:05.0: enabled 0

 1072 18:01:32.353014    PCI: 00:06.0: enabled 1

 1073 18:01:32.356094    PCI: 00:06.2: enabled 0

 1074 18:01:32.356452    PCI: 00:08.0: enabled 0

 1075 18:01:32.359628    PCI: 00:09.0: enabled 0

 1076 18:01:32.362318    PCI: 00:0a.0: enabled 1

 1077 18:01:32.365894    PCI: 00:0d.0: enabled 1

 1078 18:01:32.366246     USB0 port 0: enabled 1

 1079 18:01:32.369454      USB3 port 0: enabled 1

 1080 18:01:32.372548      USB3 port 1: enabled 0

 1081 18:01:32.375872      USB3 port 2: enabled 1

 1082 18:01:32.379397      USB3 port 3: enabled 0

 1083 18:01:32.382515    PCI: 00:0d.1: enabled 0

 1084 18:01:32.382864    PCI: 00:0d.2: enabled 0

 1085 18:01:32.386168    PCI: 00:0d.3: enabled 0

 1086 18:01:32.389044    PCI: 00:0e.0: enabled 0

 1087 18:01:32.392451    PCI: 00:10.0: enabled 0

 1088 18:01:32.396500    PCI: 00:10.1: enabled 0

 1089 18:01:32.396849    PCI: 00:10.6: enabled 0

 1090 18:01:32.399064    PCI: 00:10.7: enabled 0

 1091 18:01:32.402819    PCI: 00:12.0: enabled 0

 1092 18:01:32.405876    PCI: 00:12.6: enabled 0

 1093 18:01:32.409124    PCI: 00:12.7: enabled 0

 1094 18:01:32.409599    PCI: 00:13.0: enabled 0

 1095 18:01:32.412893    PCI: 00:14.0: enabled 1

 1096 18:01:32.415750     USB0 port 0: enabled 1

 1097 18:01:32.419236      USB2 port 0: enabled 1

 1098 18:01:32.422278      USB2 port 1: enabled 0

 1099 18:01:32.422628      USB2 port 2: enabled 1

 1100 18:01:32.425630      USB2 port 3: enabled 0

 1101 18:01:32.429168      USB2 port 4: enabled 0

 1102 18:01:32.432464      USB2 port 5: enabled 1

 1103 18:01:32.435992      USB2 port 6: enabled 0

 1104 18:01:32.438874      USB2 port 7: enabled 0

 1105 18:01:32.439225      USB2 port 8: enabled 1

 1106 18:01:32.442549      USB2 port 9: enabled 1

 1107 18:01:32.445876      USB3 port 0: enabled 1

 1108 18:01:32.449070      USB3 port 1: enabled 0

 1109 18:01:32.452213      USB3 port 2: enabled 0

 1110 18:01:32.452596      USB3 port 3: enabled 0

 1111 18:01:32.455668    PCI: 00:14.1: enabled 0

 1112 18:01:32.459682    PCI: 00:14.2: enabled 1

 1113 18:01:32.462162    PCI: 00:14.3: enabled 1

 1114 18:01:32.465400     GENERIC: 0.0: enabled 1

 1115 18:01:32.465837    PCI: 00:15.0: enabled 1

 1116 18:01:32.468548     I2C: 00:1a: enabled 1

 1117 18:01:32.472140     I2C: 00:31: enabled 1

 1118 18:01:32.475383     I2C: 00:32: enabled 1

 1119 18:01:32.479176    PCI: 00:15.1: enabled 1

 1120 18:01:32.479813     I2C: 00:50: enabled 1

 1121 18:01:32.482344    PCI: 00:15.2: enabled 0

 1122 18:01:32.485654    PCI: 00:15.3: enabled 1

 1123 18:01:32.488708     I2C: 00:10: enabled 1

 1124 18:01:32.489093    PCI: 00:16.0: enabled 1

 1125 18:01:32.492348    PCI: 00:16.1: enabled 0

 1126 18:01:32.495830    PCI: 00:16.2: enabled 0

 1127 18:01:32.498862    PCI: 00:16.3: enabled 0

 1128 18:01:32.502145    PCI: 00:16.4: enabled 0

 1129 18:01:32.502562    PCI: 00:16.5: enabled 0

 1130 18:01:32.505909    PCI: 00:17.0: enabled 1

 1131 18:01:32.509361    PCI: 00:19.0: enabled 0

 1132 18:01:32.512443    PCI: 00:19.1: enabled 1

 1133 18:01:32.515810     I2C: 00:15: enabled 1

 1134 18:01:32.516296     I2C: 00:2c: enabled 1

 1135 18:01:32.519067    PCI: 00:19.2: enabled 0

 1136 18:01:32.522205    PCI: 00:1a.0: enabled 0

 1137 18:01:32.525647    PCI: 00:1e.0: enabled 1

 1138 18:01:32.528613    PCI: 00:1e.1: enabled 0

 1139 18:01:32.528979    PCI: 00:1e.2: enabled 0

 1140 18:01:32.532208    PCI: 00:1e.3: enabled 1

 1141 18:01:32.535599     SPI: 00: enabled 1

 1142 18:01:32.539102    PCI: 00:1f.0: enabled 1

 1143 18:01:32.539574     PNP: 0c09.0: enabled 1

 1144 18:01:32.542033    PCI: 00:1f.1: enabled 0

 1145 18:01:32.545513    PCI: 00:1f.2: enabled 1

 1146 18:01:32.548682     GENERIC: 0.0: enabled 1

 1147 18:01:32.552402      GENERIC: 0.0: enabled 1

 1148 18:01:32.552885      GENERIC: 1.0: enabled 1

 1149 18:01:32.555440    PCI: 00:1f.3: enabled 1

 1150 18:01:32.558640    PCI: 00:1f.4: enabled 0

 1151 18:01:32.561879    PCI: 00:1f.5: enabled 1

 1152 18:01:32.565497    PCI: 00:1f.6: enabled 0

 1153 18:01:32.566005    PCI: 00:1f.7: enabled 0

 1154 18:01:32.568932  Root Device scanning...

 1155 18:01:32.571938  scan_static_bus for Root Device

 1156 18:01:32.575406  CPU_CLUSTER: 0 enabled

 1157 18:01:32.578782  DOMAIN: 0000 enabled

 1158 18:01:32.579291  DOMAIN: 0000 scanning...

 1159 18:01:32.581938  PCI: pci_scan_bus for bus 00

 1160 18:01:32.585052  PCI: 00:00.0 [8086/0000] ops

 1161 18:01:32.588790  PCI: 00:00.0 [8086/4609] enabled

 1162 18:01:32.591919  PCI: 00:02.0 [8086/0000] bus ops

 1163 18:01:32.595041  PCI: 00:02.0 [8086/46b3] enabled

 1164 18:01:32.598485  PCI: 00:04.0 [8086/0000] bus ops

 1165 18:01:32.601899  PCI: 00:04.0 [8086/461d] enabled

 1166 18:01:32.604936  PCI: 00:06.0 [8086/0000] bus ops

 1167 18:01:32.608119  PCI: 00:06.0 [8086/464d] enabled

 1168 18:01:32.611848  PCI: 00:08.0 [8086/464f] disabled

 1169 18:01:32.615565  PCI: 00:0a.0 [8086/467d] enabled

 1170 18:01:32.618501  PCI: 00:0d.0 [8086/0000] bus ops

 1171 18:01:32.621623  PCI: 00:0d.0 [8086/461e] enabled

 1172 18:01:32.624869  PCI: 00:14.0 [8086/0000] bus ops

 1173 18:01:32.628640  PCI: 00:14.0 [8086/51ed] enabled

 1174 18:01:32.632132  PCI: 00:14.2 [8086/51ef] enabled

 1175 18:01:32.635052  PCI: 00:14.3 [8086/0000] bus ops

 1176 18:01:32.638541  PCI: 00:14.3 [8086/51f0] enabled

 1177 18:01:32.641815  PCI: 00:15.0 [8086/0000] bus ops

 1178 18:01:32.645177  PCI: 00:15.0 [8086/51e8] enabled

 1179 18:01:32.648412  PCI: 00:15.1 [8086/0000] bus ops

 1180 18:01:32.651625  PCI: 00:15.1 [8086/51e9] enabled

 1181 18:01:32.654853  PCI: 00:15.2 [8086/0000] bus ops

 1182 18:01:32.658500  PCI: 00:15.2 [8086/51ea] disabled

 1183 18:01:32.661651  PCI: 00:15.3 [8086/0000] bus ops

 1184 18:01:32.664740  PCI: 00:15.3 [8086/51eb] enabled

 1185 18:01:32.668853  PCI: 00:16.0 [8086/0000] ops

 1186 18:01:32.671991  PCI: 00:16.0 [8086/51e0] enabled

 1187 18:01:32.678284  PCI: Static device PCI: 00:17.0 not found, disabling it.

 1188 18:01:32.681445  PCI: 00:19.0 [8086/0000] bus ops

 1189 18:01:32.684660  PCI: 00:19.0 [8086/51c5] disabled

 1190 18:01:32.688293  PCI: 00:19.1 [8086/0000] bus ops

 1191 18:01:32.691498  PCI: 00:19.1 [8086/51c6] enabled

 1192 18:01:32.694930  PCI: 00:1e.0 [8086/0000] ops

 1193 18:01:32.697999  PCI: 00:1e.0 [8086/51a8] enabled

 1194 18:01:32.701317  PCI: 00:1e.3 [8086/0000] bus ops

 1195 18:01:32.704705  PCI: 00:1e.3 [8086/51ab] enabled

 1196 18:01:32.708107  PCI: 00:1f.0 [8086/0000] bus ops

 1197 18:01:32.711816  PCI: 00:1f.0 [8086/5182] enabled

 1198 18:01:32.714742  RTC Init

 1199 18:01:32.718092  Set power on after power failure.

 1200 18:01:32.718508  Disabling Deep S3

 1201 18:01:32.721301  Disabling Deep S3

 1202 18:01:32.724575  Disabling Deep S4

 1203 18:01:32.724927  Disabling Deep S4

 1204 18:01:32.727840  Disabling Deep S5

 1205 18:01:32.728185  Disabling Deep S5

 1206 18:01:32.731823  PCI: 00:1f.2 [0000/0000] hidden

 1207 18:01:32.735313  PCI: 00:1f.3 [8086/0000] bus ops

 1208 18:01:32.737899  PCI: 00:1f.3 [8086/51c8] enabled

 1209 18:01:32.741471  PCI: 00:1f.5 [8086/0000] bus ops

 1210 18:01:32.744893  PCI: 00:1f.5 [8086/51a4] enabled

 1211 18:01:32.747867  GPIO: 0 enabled

 1212 18:01:32.751273  PCI: Leftover static devices:

 1213 18:01:32.751621  PCI: 00:01.0

 1214 18:01:32.751860  PCI: 00:01.1

 1215 18:01:32.754679  PCI: 00:05.0

 1216 18:01:32.755032  PCI: 00:06.2

 1217 18:01:32.757611  PCI: 00:09.0

 1218 18:01:32.757925  PCI: 00:0d.1

 1219 18:01:32.760911  PCI: 00:0d.2

 1220 18:01:32.761139  PCI: 00:0d.3

 1221 18:01:32.761320  PCI: 00:0e.0

 1222 18:01:32.764548  PCI: 00:10.0

 1223 18:01:32.764631  PCI: 00:10.1

 1224 18:01:32.767738  PCI: 00:10.6

 1225 18:01:32.767819  PCI: 00:10.7

 1226 18:01:32.767876  PCI: 00:12.0

 1227 18:01:32.770917  PCI: 00:12.6

 1228 18:01:32.770990  PCI: 00:12.7

 1229 18:01:32.774435  PCI: 00:13.0

 1230 18:01:32.774779  PCI: 00:14.1

 1231 18:01:32.775024  PCI: 00:16.1

 1232 18:01:32.777743  PCI: 00:16.2

 1233 18:01:32.778087  PCI: 00:16.3

 1234 18:01:32.781084  PCI: 00:16.4

 1235 18:01:32.781438  PCI: 00:16.5

 1236 18:01:32.784477  PCI: 00:17.0

 1237 18:01:32.784846  PCI: 00:19.2

 1238 18:01:32.785068  PCI: 00:1a.0

 1239 18:01:32.787669  PCI: 00:1e.1

 1240 18:01:32.787944  PCI: 00:1e.2

 1241 18:01:32.791208  PCI: 00:1f.1

 1242 18:01:32.791362  PCI: 00:1f.4

 1243 18:01:32.791454  PCI: 00:1f.6

 1244 18:01:32.794402  PCI: 00:1f.7

 1245 18:01:32.797764  PCI: Check your devicetree.cb.

 1246 18:01:32.801759  PCI: 00:02.0 scanning...

 1247 18:01:32.804420  scan_generic_bus for PCI: 00:02.0

 1248 18:01:32.807801  scan_generic_bus for PCI: 00:02.0 done

 1249 18:01:32.811367  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

 1250 18:01:32.814497  PCI: 00:04.0 scanning...

 1251 18:01:32.817951  scan_generic_bus for PCI: 00:04.0

 1252 18:01:32.821025  GENERIC: 0.0 enabled

 1253 18:01:32.824254  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

 1254 18:01:32.831312  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

 1255 18:01:32.834378  PCI: 00:06.0 scanning...

 1256 18:01:32.837604  do_pci_scan_bridge for PCI: 00:06.0

 1257 18:01:32.840979  PCI: pci_scan_bus for bus 01

 1258 18:01:32.845338  PCI: 01:00.0 [15b7/5009] enabled

 1259 18:01:32.848022  Enabling Common Clock Configuration

 1260 18:01:32.850848  L1 Sub-State supported from root port 6

 1261 18:01:32.854281  L1 Sub-State Support = 0x5

 1262 18:01:32.857570  CommonModeRestoreTime = 0x6e

 1263 18:01:32.861025  Power On Value = 0x5, Power On Scale = 0x2

 1264 18:01:32.861484  ASPM: Enabled L1

 1265 18:01:32.867774  PCIe: Max_Payload_Size adjusted to 256

 1266 18:01:32.868121  PCI: 01:00.0: Enabled LTR

 1267 18:01:32.874292  PCI: 01:00.0: Programmed LTR max latencies

 1268 18:01:32.877606  scan_bus: bus PCI: 00:06.0 finished in 40 msecs

 1269 18:01:32.881064  PCI: 00:0d.0 scanning...

 1270 18:01:32.883754  scan_static_bus for PCI: 00:0d.0

 1271 18:01:32.887712  USB0 port 0 enabled

 1272 18:01:32.888055  USB0 port 0 scanning...

 1273 18:01:32.891420  scan_static_bus for USB0 port 0

 1274 18:01:32.894300  USB3 port 0 enabled

 1275 18:01:32.897424  USB3 port 1 disabled

 1276 18:01:32.897770  USB3 port 2 enabled

 1277 18:01:32.900774  USB3 port 3 disabled

 1278 18:01:32.904255  USB3 port 0 scanning...

 1279 18:01:32.907515  scan_static_bus for USB3 port 0

 1280 18:01:32.910883  scan_static_bus for USB3 port 0 done

 1281 18:01:32.914130  scan_bus: bus USB3 port 0 finished in 6 msecs

 1282 18:01:32.917558  USB3 port 2 scanning...

 1283 18:01:32.920690  scan_static_bus for USB3 port 2

 1284 18:01:32.924109  scan_static_bus for USB3 port 2 done

 1285 18:01:32.927438  scan_bus: bus USB3 port 2 finished in 6 msecs

 1286 18:01:32.931060  scan_static_bus for USB0 port 0 done

 1287 18:01:32.937194  scan_bus: bus USB0 port 0 finished in 43 msecs

 1288 18:01:32.940745  scan_static_bus for PCI: 00:0d.0 done

 1289 18:01:32.944446  scan_bus: bus PCI: 00:0d.0 finished in 59 msecs

 1290 18:01:32.947395  PCI: 00:14.0 scanning...

 1291 18:01:32.950964  scan_static_bus for PCI: 00:14.0

 1292 18:01:32.954200  USB0 port 0 enabled

 1293 18:01:32.954621  USB0 port 0 scanning...

 1294 18:01:32.957263  scan_static_bus for USB0 port 0

 1295 18:01:32.960770  USB2 port 0 enabled

 1296 18:01:32.963611  USB2 port 1 disabled

 1297 18:01:32.963688  USB2 port 2 enabled

 1298 18:01:32.967067  USB2 port 3 disabled

 1299 18:01:32.970610  USB2 port 4 disabled

 1300 18:01:32.970957  USB2 port 5 enabled

 1301 18:01:32.974105  USB2 port 6 disabled

 1302 18:01:32.974450  USB2 port 7 disabled

 1303 18:01:32.977117  USB2 port 8 enabled

 1304 18:01:32.980625  USB2 port 9 enabled

 1305 18:01:32.981060  USB3 port 0 enabled

 1306 18:01:32.984302  USB3 port 1 disabled

 1307 18:01:32.987011  USB3 port 2 disabled

 1308 18:01:32.987489  USB3 port 3 disabled

 1309 18:01:32.990478  USB2 port 0 scanning...

 1310 18:01:32.993980  scan_static_bus for USB2 port 0

 1311 18:01:32.996798  scan_static_bus for USB2 port 0 done

 1312 18:01:33.000195  scan_bus: bus USB2 port 0 finished in 6 msecs

 1313 18:01:33.004030  USB2 port 2 scanning...

 1314 18:01:33.007232  scan_static_bus for USB2 port 2

 1315 18:01:33.010981  scan_static_bus for USB2 port 2 done

 1316 18:01:33.017142  scan_bus: bus USB2 port 2 finished in 6 msecs

 1317 18:01:33.017494  USB2 port 5 scanning...

 1318 18:01:33.020635  scan_static_bus for USB2 port 5

 1319 18:01:33.027248  scan_static_bus for USB2 port 5 done

 1320 18:01:33.030490  scan_bus: bus USB2 port 5 finished in 6 msecs

 1321 18:01:33.034239  USB2 port 8 scanning...

 1322 18:01:33.036878  scan_static_bus for USB2 port 8

 1323 18:01:33.040396  scan_static_bus for USB2 port 8 done

 1324 18:01:33.043779  scan_bus: bus USB2 port 8 finished in 6 msecs

 1325 18:01:33.047202  USB2 port 9 scanning...

 1326 18:01:33.050478  scan_static_bus for USB2 port 9

 1327 18:01:33.053614  scan_static_bus for USB2 port 9 done

 1328 18:01:33.057081  scan_bus: bus USB2 port 9 finished in 6 msecs

 1329 18:01:33.060411  USB3 port 0 scanning...

 1330 18:01:33.063644  scan_static_bus for USB3 port 0

 1331 18:01:33.067236  scan_static_bus for USB3 port 0 done

 1332 18:01:33.070572  scan_bus: bus USB3 port 0 finished in 6 msecs

 1333 18:01:33.076907  scan_static_bus for USB0 port 0 done

 1334 18:01:33.080555  scan_bus: bus USB0 port 0 finished in 120 msecs

 1335 18:01:33.083856  scan_static_bus for PCI: 00:14.0 done

 1336 18:01:33.090243  scan_bus: bus PCI: 00:14.0 finished in 136 msecs

 1337 18:01:33.090599  PCI: 00:14.3 scanning...

 1338 18:01:33.093148  scan_static_bus for PCI: 00:14.3

 1339 18:01:33.097026  GENERIC: 0.0 enabled

 1340 18:01:33.100353  scan_static_bus for PCI: 00:14.3 done

 1341 18:01:33.107313  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

 1342 18:01:33.107778  PCI: 00:15.0 scanning...

 1343 18:01:33.110478  scan_static_bus for PCI: 00:15.0

 1344 18:01:33.113183  I2C: 00:1a enabled

 1345 18:01:33.116646  I2C: 00:31 enabled

 1346 18:01:33.117026  I2C: 00:32 enabled

 1347 18:01:33.120266  scan_static_bus for PCI: 00:15.0 done

 1348 18:01:33.126558  scan_bus: bus PCI: 00:15.0 finished in 12 msecs

 1349 18:01:33.130057  PCI: 00:15.1 scanning...

 1350 18:01:33.133569  scan_static_bus for PCI: 00:15.1

 1351 18:01:33.134026  I2C: 00:50 enabled

 1352 18:01:33.136671  scan_static_bus for PCI: 00:15.1 done

 1353 18:01:33.143162  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

 1354 18:01:33.143512  PCI: 00:15.3 scanning...

 1355 18:01:33.146845  scan_static_bus for PCI: 00:15.3

 1356 18:01:33.150090  I2C: 00:10 enabled

 1357 18:01:33.152977  scan_static_bus for PCI: 00:15.3 done

 1358 18:01:33.159865  scan_bus: bus PCI: 00:15.3 finished in 9 msecs

 1359 18:01:33.160408  PCI: 00:19.1 scanning...

 1360 18:01:33.163228  scan_static_bus for PCI: 00:19.1

 1361 18:01:33.166407  I2C: 00:15 enabled

 1362 18:01:33.170221  I2C: 00:2c enabled

 1363 18:01:33.173338  scan_static_bus for PCI: 00:19.1 done

 1364 18:01:33.176388  scan_bus: bus PCI: 00:19.1 finished in 11 msecs

 1365 18:01:33.179917  PCI: 00:1e.3 scanning...

 1366 18:01:33.183416  scan_generic_bus for PCI: 00:1e.3

 1367 18:01:33.183877  SPI: 00 enabled

 1368 18:01:33.189967  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1369 18:01:33.196485  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1370 18:01:33.196869  PCI: 00:1f.0 scanning...

 1371 18:01:33.199294  scan_static_bus for PCI: 00:1f.0

 1372 18:01:33.203488  PNP: 0c09.0 enabled

 1373 18:01:33.206614  PNP: 0c09.0 scanning...

 1374 18:01:33.209664  scan_static_bus for PNP: 0c09.0

 1375 18:01:33.213201  scan_static_bus for PNP: 0c09.0 done

 1376 18:01:33.216108  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1377 18:01:33.219492  scan_static_bus for PCI: 00:1f.0 done

 1378 18:01:33.226576  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1379 18:01:33.229189  PCI: 00:1f.2 scanning...

 1380 18:01:33.232484  scan_static_bus for PCI: 00:1f.2

 1381 18:01:33.232560  GENERIC: 0.0 enabled

 1382 18:01:33.235624  GENERIC: 0.0 scanning...

 1383 18:01:33.239573  scan_static_bus for GENERIC: 0.0

 1384 18:01:33.243064  GENERIC: 0.0 enabled

 1385 18:01:33.243535  GENERIC: 1.0 enabled

 1386 18:01:33.249742  scan_static_bus for GENERIC: 0.0 done

 1387 18:01:33.253046  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1388 18:01:33.256232  scan_static_bus for PCI: 00:1f.2 done

 1389 18:01:33.262448  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1390 18:01:33.262836  PCI: 00:1f.3 scanning...

 1391 18:01:33.266016  scan_static_bus for PCI: 00:1f.3

 1392 18:01:33.269066  scan_static_bus for PCI: 00:1f.3 done

 1393 18:01:33.275788  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1394 18:01:33.279038  PCI: 00:1f.5 scanning...

 1395 18:01:33.282839  scan_generic_bus for PCI: 00:1f.5

 1396 18:01:33.286152  scan_generic_bus for PCI: 00:1f.5 done

 1397 18:01:33.289694  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1398 18:01:33.296121  scan_bus: bus DOMAIN: 0000 finished in 710 msecs

 1399 18:01:33.299626  scan_static_bus for Root Device done

 1400 18:01:33.302618  scan_bus: bus Root Device finished in 729 msecs

 1401 18:01:33.302965  done

 1402 18:01:33.309108  BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms

 1403 18:01:33.316163  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)

 1404 18:01:33.322704  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1405 18:01:33.325856  SPI flash protection: WPSW=1 SRP0=0

 1406 18:01:33.329015  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1407 18:01:33.336067  BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms

 1408 18:01:33.339368  found VGA at PCI: 00:02.0

 1409 18:01:33.343053  Setting up VGA for PCI: 00:02.0

 1410 18:01:33.348910  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1411 18:01:33.352214  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1412 18:01:33.355508  Allocating resources...

 1413 18:01:33.355582  Reading resources...

 1414 18:01:33.362424  Root Device read_resources bus 0 link: 0

 1415 18:01:33.365633  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1416 18:01:33.368679  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1417 18:01:33.375868  DOMAIN: 0000 read_resources bus 0 link: 0

 1418 18:01:33.382098  SA MMIO resource: MCHBAR ->  base = 0xfedc0000, size = 0x20000

 1419 18:01:33.385325  SA MMIO resource: DMIBAR ->  base = 0xfeda0000, size = 0x1000

 1420 18:01:33.392228  SA MMIO resource: EPBAR ->  base = 0xfeda1000, size = 0x1000

 1421 18:01:33.398960  SA MMIO resource: REGBAR ->  base = 0xfb000000, size = 0x1000

 1422 18:01:33.405528  SA MMIO resource: EDRAMBAR ->  base = 0xfed80000, size = 0x4000

 1423 18:01:33.412311  SA MMIO resource: CRAB_ABORT ->  base = 0xfeb00000, size = 0x80000

 1424 18:01:33.418835  SA MMIO resource: TPM ->  base = 0xfed40000, size = 0x10000

 1425 18:01:33.425570  SA MMIO resource: LT_SECURITY ->  base = 0xfed50000, size = 0x20000

 1426 18:01:33.432155  SA MMIO resource: APIC ->  base = 0xfec00000, size = 0x100000

 1427 18:01:33.438803  SA MMIO resource: PCH_RESERVED ->  base = 0xfc800000, size = 0x2000000

 1428 18:01:33.446373  SA MMIO resource: GFXVTBAR ->  base = 0xfed90000, size = 0x1000

 1429 18:01:33.452528  SA MMIO resource: IPUVTBAR ->  base = 0xfed92000, size = 0x1000

 1430 18:01:33.455399  SA MMIO resource: TBT0BAR ->  base = 0xfed84000, size = 0x1000

 1431 18:01:33.462018  SA MMIO resource: TBT1BAR ->  base = 0xfed85000, size = 0x1000

 1432 18:01:33.468620  SA MMIO resource: TBT2BAR ->  base = 0xfed86000, size = 0x1000

 1433 18:01:33.475412  SA MMIO resource: TBT3BAR ->  base = 0xfed87000, size = 0x1000

 1434 18:01:33.481891  SA MMIO resource: VTVC0BAR ->  base = 0xfed91000, size = 0x1000

 1435 18:01:33.488737  SA MMIO resource: MMCONF ->  base = 0xc0000000, size = 0x10000000

 1436 18:01:33.495242  SA MMIO resource: DSM ->  base = 0x7c800000, size = 0x3c00000

 1437 18:01:33.501745  SA MMIO resource: TSEG ->  base = 0x7b800000, size = 0x800000

 1438 18:01:33.508547  SA MMIO resource: GSM ->  base = 0x7c000000, size = 0x800000

 1439 18:01:33.511445  PCI: 00:04.0 read_resources bus 1 link: 0

 1440 18:01:33.515142  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1441 18:01:33.521674  PCI: 00:06.0 read_resources bus 1 link: 0

 1442 18:01:33.524769  PCI: 00:06.0 read_resources bus 1 link: 0 done

 1443 18:01:33.527998  PCI: 00:0d.0 read_resources bus 0 link: 0

 1444 18:01:33.534730  USB0 port 0 read_resources bus 0 link: 0

 1445 18:01:33.538143  USB0 port 0 read_resources bus 0 link: 0 done

 1446 18:01:33.541441  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1447 18:01:33.548283  PCI: 00:14.0 read_resources bus 0 link: 0

 1448 18:01:33.551975  USB0 port 0 read_resources bus 0 link: 0

 1449 18:01:33.554714  USB0 port 0 read_resources bus 0 link: 0 done

 1450 18:01:33.561317  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1451 18:01:33.564409  PCI: 00:14.3 read_resources bus 0 link: 0

 1452 18:01:33.568098  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1453 18:01:33.574463  PCI: 00:15.0 read_resources bus 0 link: 0

 1454 18:01:33.578366  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1455 18:01:33.581394  PCI: 00:15.1 read_resources bus 0 link: 0

 1456 18:01:33.587923  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1457 18:01:33.590844  PCI: 00:15.3 read_resources bus 0 link: 0

 1458 18:01:33.597455  PCI: 00:15.3 read_resources bus 0 link: 0 done

 1459 18:01:33.601326  PCI: 00:19.1 read_resources bus 0 link: 0

 1460 18:01:33.604359  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1461 18:01:33.610972  PCI: 00:1e.3 read_resources bus 2 link: 0

 1462 18:01:33.614278  PCI: 00:1e.3 read_resources bus 2 link: 0 done

 1463 18:01:33.617919  PCI: 00:1f.0 read_resources bus 0 link: 0

 1464 18:01:33.624201  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1465 18:01:33.628060  PCI: 00:1f.2 read_resources bus 0 link: 0

 1466 18:01:33.631292  GENERIC: 0.0 read_resources bus 0 link: 0

 1467 18:01:33.637724  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1468 18:01:33.641037  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1469 18:01:33.647796  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1470 18:01:33.651277  Root Device read_resources bus 0 link: 0 done

 1471 18:01:33.654461  Done reading resources.

 1472 18:01:33.660995  Show resources in subtree (Root Device)...After reading.

 1473 18:01:33.664131   Root Device child on link 0 CPU_CLUSTER: 0

 1474 18:01:33.667502    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1475 18:01:33.667858     APIC: 00

 1476 18:01:33.670776     APIC: 12

 1477 18:01:33.671120     APIC: 14

 1478 18:01:33.674248     APIC: 16

 1479 18:01:33.674592     APIC: 10

 1480 18:01:33.674832     APIC: 01

 1481 18:01:33.677344     APIC: 09

 1482 18:01:33.677684     APIC: 08

 1483 18:01:33.681096    DOMAIN: 0000 child on link 0 GPIO: 0

 1484 18:01:33.690968    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1485 18:01:33.700551    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1486 18:01:33.700655     GPIO: 0

 1487 18:01:33.704290     PCI: 00:00.0

 1488 18:01:33.714085     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0

 1489 18:01:33.724031     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1

 1490 18:01:33.731011     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1491 18:01:33.740838     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1492 18:01:33.751080     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4

 1493 18:01:33.760838     PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5

 1494 18:01:33.770425     PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1495 18:01:33.780446     PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7

 1496 18:01:33.790416     PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8

 1497 18:01:33.797053     PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9

 1498 18:01:33.807385     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1499 18:01:33.817161     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1500 18:01:33.826722     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1501 18:01:33.837022     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d

 1502 18:01:33.847017     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e

 1503 18:01:33.853306     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f

 1504 18:01:33.863238     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10

 1505 18:01:33.873833     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11

 1506 18:01:33.882966     PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12

 1507 18:01:33.893011     PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13

 1508 18:01:33.902901     PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14

 1509 18:01:33.913310     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15

 1510 18:01:33.920231     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16

 1511 18:01:33.929702     PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17

 1512 18:01:33.940053     PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18

 1513 18:01:33.949867     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19

 1514 18:01:33.959544     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a

 1515 18:01:33.969547     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b

 1516 18:01:33.972846     PCI: 00:02.0

 1517 18:01:33.982432     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1518 18:01:33.992734     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1519 18:01:33.999634     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1520 18:01:34.006008     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1521 18:01:34.016561     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1522 18:01:34.017010      GENERIC: 0.0

 1523 18:01:34.022573     PCI: 00:06.0 child on link 0 PCI: 01:00.0

 1524 18:01:34.029291     PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1525 18:01:34.039124     PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1526 18:01:34.049077     PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1527 18:01:34.049523      PCI: 01:00.0

 1528 18:01:34.059235      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1529 18:01:34.068910      PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20

 1530 18:01:34.072603     PCI: 00:08.0

 1531 18:01:34.072945     PCI: 00:0a.0

 1532 18:01:34.082549     PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10

 1533 18:01:34.088983     PCI: 00:0d.0 child on link 0 USB0 port 0

 1534 18:01:34.098878     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1535 18:01:34.102198      USB0 port 0 child on link 0 USB3 port 0

 1536 18:01:34.105694       USB3 port 0

 1537 18:01:34.106105       USB3 port 1

 1538 18:01:34.108917       USB3 port 2

 1539 18:01:34.109359       USB3 port 3

 1540 18:01:34.112345     PCI: 00:14.0 child on link 0 USB0 port 0

 1541 18:01:34.125514     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1542 18:01:34.128958      USB0 port 0 child on link 0 USB2 port 0

 1543 18:01:34.129395       USB2 port 0

 1544 18:01:34.132013       USB2 port 1

 1545 18:01:34.132355       USB2 port 2

 1546 18:01:34.135536       USB2 port 3

 1547 18:01:34.135881       USB2 port 4

 1548 18:01:34.138750       USB2 port 5

 1549 18:01:34.142151       USB2 port 6

 1550 18:01:34.142568       USB2 port 7

 1551 18:01:34.145525       USB2 port 8

 1552 18:01:34.145939       USB2 port 9

 1553 18:01:34.148936       USB3 port 0

 1554 18:01:34.149380       USB3 port 1

 1555 18:01:34.152237       USB3 port 2

 1556 18:01:34.152647       USB3 port 3

 1557 18:01:34.155921     PCI: 00:14.2

 1558 18:01:34.165680     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1559 18:01:34.175185     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1560 18:01:34.179199     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1561 18:01:34.188705     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1562 18:01:34.192027      GENERIC: 0.0

 1563 18:01:34.195455     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1564 18:01:34.205466     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1565 18:01:34.205871      I2C: 00:1a

 1566 18:01:34.208942      I2C: 00:31

 1567 18:01:34.209379      I2C: 00:32

 1568 18:01:34.215414     PCI: 00:15.1 child on link 0 I2C: 00:50

 1569 18:01:34.225859     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1570 18:01:34.226265      I2C: 00:50

 1571 18:01:34.229022     PCI: 00:15.2

 1572 18:01:34.232619     PCI: 00:15.3 child on link 0 I2C: 00:10

 1573 18:01:34.242184     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1574 18:01:34.242602      I2C: 00:10

 1575 18:01:34.245689     PCI: 00:16.0

 1576 18:01:34.255675     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1577 18:01:34.256095     PCI: 00:19.0

 1578 18:01:34.262503     PCI: 00:19.1 child on link 0 I2C: 00:15

 1579 18:01:34.271808     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1580 18:01:34.272242      I2C: 00:15

 1581 18:01:34.275309      I2C: 00:2c

 1582 18:01:34.275754     PCI: 00:1e.0

 1583 18:01:34.285193     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1584 18:01:34.291342     PCI: 00:1e.3 child on link 0 SPI: 00

 1585 18:01:34.301837     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1586 18:01:34.302244      SPI: 00

 1587 18:01:34.304746     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1588 18:01:34.315086     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1589 18:01:34.315516      PNP: 0c09.0

 1590 18:01:34.324566      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1591 18:01:34.327991     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1592 18:01:34.338252     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1593 18:01:34.348400     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1594 18:01:34.351582      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1595 18:01:34.354968       GENERIC: 0.0

 1596 18:01:34.358453       GENERIC: 1.0

 1597 18:01:34.358913     PCI: 00:1f.3

 1598 18:01:34.368186     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1599 18:01:34.378185     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1600 18:01:34.381793     PCI: 00:1f.5

 1601 18:01:34.388472     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1602 18:01:34.398327  === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1603 18:01:34.401199   PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1604 18:01:34.408085   PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1605 18:01:34.414724   PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1606 18:01:34.417963    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1607 18:01:34.424922    PCI: 01:00.0 20 *  [0x4000 - 0x40ff] mem

 1608 18:01:34.431563   PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1609 18:01:34.437752   PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1610 18:01:34.444338   PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1611 18:01:34.450903  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1612 18:01:34.457548  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1613 18:01:34.467696   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1614 18:01:34.474456   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1615 18:01:34.480862   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1616 18:01:34.484579   DOMAIN: 0000: Resource ranges:

 1617 18:01:34.487831   * Base: 1000, Size: 800, Tag: 100

 1618 18:01:34.490759   * Base: 1900, Size: e700, Tag: 100

 1619 18:01:34.497487    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1620 18:01:34.504260  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1621 18:01:34.511040  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1622 18:01:34.517147   update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)

 1623 18:01:34.526937   update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)

 1624 18:01:34.534095   update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)

 1625 18:01:34.541149   update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)

 1626 18:01:34.550545   update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)

 1627 18:01:34.557086   update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)

 1628 18:01:34.564194   update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)

 1629 18:01:34.573685   update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)

 1630 18:01:34.580431   update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)

 1631 18:01:34.587206   update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)

 1632 18:01:34.596956   update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)

 1633 18:01:34.603643   update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)

 1634 18:01:34.610351   update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)

 1635 18:01:34.616724   update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)

 1636 18:01:34.626943   update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)

 1637 18:01:34.633287   update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)

 1638 18:01:34.639953   update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)

 1639 18:01:34.650816   update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)

 1640 18:01:34.656699   update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)

 1641 18:01:34.663163   update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)

 1642 18:01:34.673644   update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)

 1643 18:01:34.680006   update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)

 1644 18:01:34.686396   update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)

 1645 18:01:34.696585   update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)

 1646 18:01:34.703398   update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)

 1647 18:01:34.709790   update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)

 1648 18:01:34.719607   update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)

 1649 18:01:34.726454   update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)

 1650 18:01:34.733353   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1651 18:01:34.743227   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1652 18:01:34.746273   DOMAIN: 0000: Resource ranges:

 1653 18:01:34.749713   * Base: 80400000, Size: 3fc00000, Tag: 200

 1654 18:01:34.752557   * Base: d0000000, Size: 28000000, Tag: 200

 1655 18:01:34.759409   * Base: fa000000, Size: 1000000, Tag: 200

 1656 18:01:34.762342   * Base: fb001000, Size: 17ff000, Tag: 200

 1657 18:01:34.765641   * Base: fe800000, Size: 300000, Tag: 200

 1658 18:01:34.768953   * Base: feb80000, Size: 80000, Tag: 200

 1659 18:01:34.776291   * Base: fed00000, Size: 40000, Tag: 200

 1660 18:01:34.779537   * Base: fed70000, Size: 10000, Tag: 200

 1661 18:01:34.782109   * Base: fed88000, Size: 8000, Tag: 200

 1662 18:01:34.785956   * Base: fed93000, Size: d000, Tag: 200

 1663 18:01:34.792250   * Base: feda2000, Size: 1e000, Tag: 200

 1664 18:01:34.795383   * Base: fede0000, Size: 1220000, Tag: 200

 1665 18:01:34.798978   * Base: 27fc00000, Size: 7d80400000, Tag: 100200

 1666 18:01:34.808859    PCI: 00:02.0 18 *  [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem

 1667 18:01:34.815706    PCI: 00:02.0 10 *  [0x81000000 - 0x81ffffff] limit: 81ffffff mem

 1668 18:01:34.822652    PCI: 00:06.0 20 *  [0x80400000 - 0x804fffff] limit: 804fffff mem

 1669 18:01:34.828856    PCI: 00:1f.3 20 *  [0x80500000 - 0x805fffff] limit: 805fffff mem

 1670 18:01:34.835537    PCI: 00:04.0 10 *  [0x80600000 - 0x8061ffff] limit: 8061ffff mem

 1671 18:01:34.842178    PCI: 00:0d.0 10 *  [0x80620000 - 0x8062ffff] limit: 8062ffff mem

 1672 18:01:34.848624    PCI: 00:14.0 10 *  [0x80630000 - 0x8063ffff] limit: 8063ffff mem

 1673 18:01:34.855463    PCI: 00:0a.0 10 *  [0x80640000 - 0x80647fff] limit: 80647fff mem

 1674 18:01:34.861531    PCI: 00:14.2 10 *  [0x80648000 - 0x8064bfff] limit: 8064bfff mem

 1675 18:01:34.868244    PCI: 00:14.3 10 *  [0x8064c000 - 0x8064ffff] limit: 8064ffff mem

 1676 18:01:34.874988    PCI: 00:1f.3 10 *  [0x80650000 - 0x80653fff] limit: 80653fff mem

 1677 18:01:34.882047    PCI: 00:14.2 18 *  [0x80654000 - 0x80654fff] limit: 80654fff mem

 1678 18:01:34.888729    PCI: 00:15.0 10 *  [0x80655000 - 0x80655fff] limit: 80655fff mem

 1679 18:01:34.895425    PCI: 00:15.1 10 *  [0x80656000 - 0x80656fff] limit: 80656fff mem

 1680 18:01:34.902012    PCI: 00:15.3 10 *  [0x80657000 - 0x80657fff] limit: 80657fff mem

 1681 18:01:34.908495    PCI: 00:16.0 10 *  [0x80658000 - 0x80658fff] limit: 80658fff mem

 1682 18:01:34.915214    PCI: 00:19.1 10 *  [0x80659000 - 0x80659fff] limit: 80659fff mem

 1683 18:01:34.921891    PCI: 00:1e.3 10 *  [0x8065a000 - 0x8065afff] limit: 8065afff mem

 1684 18:01:34.928768    PCI: 00:1f.5 10 *  [0x8065b000 - 0x8065bfff] limit: 8065bfff mem

 1685 18:01:34.934981  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1686 18:01:34.941670  PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff

 1687 18:01:34.944823   PCI: 00:06.0: Resource ranges:

 1688 18:01:34.948214   * Base: 80400000, Size: 100000, Tag: 200

 1689 18:01:34.954717    PCI: 01:00.0 10 *  [0x80400000 - 0x80403fff] limit: 80403fff mem

 1690 18:01:34.961436    PCI: 01:00.0 20 *  [0x80404000 - 0x804040ff] limit: 804040ff mem

 1691 18:01:34.971558  PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done

 1692 18:01:34.977870  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1693 18:01:34.981161  Root Device assign_resources, bus 0 link: 0

 1694 18:01:34.987734  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1695 18:01:34.994495  PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64

 1696 18:01:35.005139  PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64

 1697 18:01:35.011206  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1698 18:01:35.017707  PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64

 1699 18:01:35.024386  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1700 18:01:35.027733  PCI: 00:04.0 assign_resources, bus 1 link: 0 done

 1701 18:01:35.038078  PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1702 18:01:35.047530  PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1703 18:01:35.054513  PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem

 1704 18:01:35.060939  PCI: 00:06.0 assign_resources, bus 1 link: 0

 1705 18:01:35.067497  PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64

 1706 18:01:35.077549  PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64

 1707 18:01:35.080756  PCI: 00:06.0 assign_resources, bus 1 link: 0 done

 1708 18:01:35.090795  PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64

 1709 18:01:35.097211  PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64

 1710 18:01:35.100127  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1711 18:01:35.107160  PCI: 00:0d.0 assign_resources, bus 0 link: 0 done

 1712 18:01:35.113506  PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64

 1713 18:01:35.120902  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1714 18:01:35.123891  PCI: 00:14.0 assign_resources, bus 0 link: 0 done

 1715 18:01:35.133767  PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64

 1716 18:01:35.140571  PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64

 1717 18:01:35.147041  PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64

 1718 18:01:35.153644  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1719 18:01:35.157365  PCI: 00:14.3 assign_resources, bus 0 link: 0 done

 1720 18:01:35.166756  PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64

 1721 18:01:35.170175  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1722 18:01:35.176976  PCI: 00:15.0 assign_resources, bus 0 link: 0 done

 1723 18:01:35.183321  PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64

 1724 18:01:35.187047  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1725 18:01:35.193621  PCI: 00:15.1 assign_resources, bus 0 link: 0 done

 1726 18:01:35.199971  PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64

 1727 18:01:35.207053  PCI: 00:15.3 assign_resources, bus 0 link: 0

 1728 18:01:35.209771  PCI: 00:15.3 assign_resources, bus 0 link: 0 done

 1729 18:01:35.216402  PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64

 1730 18:01:35.226359  PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64

 1731 18:01:35.229621  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1732 18:01:35.236278  PCI: 00:19.1 assign_resources, bus 0 link: 0 done

 1733 18:01:35.243490  PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64

 1734 18:01:35.249758  PCI: 00:1e.3 assign_resources, bus 2 link: 0

 1735 18:01:35.252826  PCI: 00:1e.3 assign_resources, bus 2 link: 0 done

 1736 18:01:35.256213  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1737 18:01:35.262596  PCI: 00:1f.0 assign_resources, bus 0 link: 0 done

 1738 18:01:35.265900  LPC: Trying to open IO window from 800 size 1ff

 1739 18:01:35.276072  PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64

 1740 18:01:35.282748  PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64

 1741 18:01:35.292786  PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem

 1742 18:01:35.296113  DOMAIN: 0000 assign_resources, bus 0 link: 0 done

 1743 18:01:35.302583  Root Device assign_resources, bus 0 link: 0 done

 1744 18:01:35.302951  Done setting resources.

 1745 18:01:35.308791  Show resources in subtree (Root Device)...After assigning values.

 1746 18:01:35.316115   Root Device child on link 0 CPU_CLUSTER: 0

 1747 18:01:35.319361    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1748 18:01:35.319800     APIC: 00

 1749 18:01:35.322760     APIC: 12

 1750 18:01:35.323218     APIC: 14

 1751 18:01:35.323487     APIC: 16

 1752 18:01:35.326082     APIC: 10

 1753 18:01:35.326503     APIC: 01

 1754 18:01:35.329032     APIC: 09

 1755 18:01:35.329109     APIC: 08

 1756 18:01:35.332454    DOMAIN: 0000 child on link 0 GPIO: 0

 1757 18:01:35.342199    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1758 18:01:35.352082    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1759 18:01:35.352263     GPIO: 0

 1760 18:01:35.355998     PCI: 00:00.0

 1761 18:01:35.365873     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0

 1762 18:01:35.372434     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1

 1763 18:01:35.382285     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1764 18:01:35.392473     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1765 18:01:35.402145     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4

 1766 18:01:35.412401     PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5

 1767 18:01:35.421584     PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1768 18:01:35.428682     PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7

 1769 18:01:35.438663     PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8

 1770 18:01:35.448581     PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9

 1771 18:01:35.458411     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1772 18:01:35.468344     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1773 18:01:35.478417     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1774 18:01:35.488108     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d

 1775 18:01:35.494507     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e

 1776 18:01:35.505170     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f

 1777 18:01:35.515199     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10

 1778 18:01:35.524898     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11

 1779 18:01:35.534891     PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12

 1780 18:01:35.544712     PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13

 1781 18:01:35.554875     PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14

 1782 18:01:35.561539     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15

 1783 18:01:35.570996     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16

 1784 18:01:35.581723     PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17

 1785 18:01:35.591447     PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18

 1786 18:01:35.601139     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19

 1787 18:01:35.611159     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a

 1788 18:01:35.621256     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b

 1789 18:01:35.621608     PCI: 00:02.0

 1790 18:01:35.634434     PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10

 1791 18:01:35.644050     PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18

 1792 18:01:35.654050     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1793 18:01:35.657182     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1794 18:01:35.667528     PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10

 1795 18:01:35.670595      GENERIC: 0.0

 1796 18:01:35.674263     PCI: 00:06.0 child on link 0 PCI: 01:00.0

 1797 18:01:35.684198     PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1798 18:01:35.694108     PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1799 18:01:35.703865     PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20

 1800 18:01:35.707420      PCI: 01:00.0

 1801 18:01:35.717035      PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10

 1802 18:01:35.727217      PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20

 1803 18:01:35.730382     PCI: 00:08.0

 1804 18:01:35.730476     PCI: 00:0a.0

 1805 18:01:35.740328     PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10

 1806 18:01:35.747339     PCI: 00:0d.0 child on link 0 USB0 port 0

 1807 18:01:35.757025     PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10

 1808 18:01:35.760603      USB0 port 0 child on link 0 USB3 port 0

 1809 18:01:35.763749       USB3 port 0

 1810 18:01:35.764181       USB3 port 1

 1811 18:01:35.766757       USB3 port 2

 1812 18:01:35.767100       USB3 port 3

 1813 18:01:35.773384     PCI: 00:14.0 child on link 0 USB0 port 0

 1814 18:01:35.783357     PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10

 1815 18:01:35.787021      USB0 port 0 child on link 0 USB2 port 0

 1816 18:01:35.790141       USB2 port 0

 1817 18:01:35.790507       USB2 port 1

 1818 18:01:35.793205       USB2 port 2

 1819 18:01:35.793583       USB2 port 3

 1820 18:01:35.796627       USB2 port 4

 1821 18:01:35.796973       USB2 port 5

 1822 18:01:35.800306       USB2 port 6

 1823 18:01:35.800767       USB2 port 7

 1824 18:01:35.803595       USB2 port 8

 1825 18:01:35.803941       USB2 port 9

 1826 18:01:35.806303       USB3 port 0

 1827 18:01:35.806379       USB3 port 1

 1828 18:01:35.809613       USB3 port 2

 1829 18:01:35.812732       USB3 port 3

 1830 18:01:35.812805     PCI: 00:14.2

 1831 18:01:35.823049     PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10

 1832 18:01:35.833376     PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18

 1833 18:01:35.839903     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1834 18:01:35.849584     PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10

 1835 18:01:35.850012      GENERIC: 0.0

 1836 18:01:35.856384     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1837 18:01:35.866259     PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10

 1838 18:01:35.866667      I2C: 00:1a

 1839 18:01:35.869817      I2C: 00:31

 1840 18:01:35.870311      I2C: 00:32

 1841 18:01:35.872781     PCI: 00:15.1 child on link 0 I2C: 00:50

 1842 18:01:35.885764     PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10

 1843 18:01:35.885893      I2C: 00:50

 1844 18:01:35.885956     PCI: 00:15.2

 1845 18:01:35.892608     PCI: 00:15.3 child on link 0 I2C: 00:10

 1846 18:01:35.903180     PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10

 1847 18:01:35.903655      I2C: 00:10

 1848 18:01:35.906087     PCI: 00:16.0

 1849 18:01:35.916540     PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10

 1850 18:01:35.917010     PCI: 00:19.0

 1851 18:01:35.923221     PCI: 00:19.1 child on link 0 I2C: 00:15

 1852 18:01:35.932566     PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10

 1853 18:01:35.932654      I2C: 00:15

 1854 18:01:35.935792      I2C: 00:2c

 1855 18:01:35.935866     PCI: 00:1e.0

 1856 18:01:35.949028     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1857 18:01:35.953103     PCI: 00:1e.3 child on link 0 SPI: 00

 1858 18:01:35.962198     PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10

 1859 18:01:35.962325      SPI: 00

 1860 18:01:35.968972     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1861 18:01:35.975521     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1862 18:01:35.979449      PNP: 0c09.0

 1863 18:01:35.989167      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1864 18:01:35.992113     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1865 18:01:36.002412     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1866 18:01:36.008611     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1867 18:01:36.015290      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1868 18:01:36.015364       GENERIC: 0.0

 1869 18:01:36.018627       GENERIC: 1.0

 1870 18:01:36.018939     PCI: 00:1f.3

 1871 18:01:36.032522     PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10

 1872 18:01:36.041902     PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20

 1873 18:01:36.042029     PCI: 00:1f.5

 1874 18:01:36.051812     PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10

 1875 18:01:36.055214  Done allocating resources.

 1876 18:01:36.062404  BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2717 ms

 1877 18:01:36.068566  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

 1878 18:01:36.071846  Configure audio over I2S with MAX98373 NAU88L25B.

 1879 18:01:36.076939  Enabling BT offload

 1880 18:01:36.084381  BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms

 1881 18:01:36.087743  Enabling resources...

 1882 18:01:36.090760  PCI: 00:00.0 subsystem <- 8086/4609

 1883 18:01:36.094171  PCI: 00:00.0 cmd <- 06

 1884 18:01:36.097677  PCI: 00:02.0 subsystem <- 8086/46b3

 1885 18:01:36.100744  PCI: 00:02.0 cmd <- 03

 1886 18:01:36.104258  PCI: 00:04.0 subsystem <- 8086/461d

 1887 18:01:36.104696  PCI: 00:04.0 cmd <- 02

 1888 18:01:36.107523  PCI: 00:06.0 bridge ctrl <- 0013

 1889 18:01:36.110905  PCI: 00:06.0 subsystem <- 8086/464d

 1890 18:01:36.114184  PCI: 00:06.0 cmd <- 106

 1891 18:01:36.117225  PCI: 00:0a.0 subsystem <- 8086/467d

 1892 18:01:36.120693  PCI: 00:0a.0 cmd <- 02

 1893 18:01:36.123714  PCI: 00:0d.0 subsystem <- 8086/461e

 1894 18:01:36.126972  PCI: 00:0d.0 cmd <- 02

 1895 18:01:36.130537  PCI: 00:14.0 subsystem <- 8086/51ed

 1896 18:01:36.133873  PCI: 00:14.0 cmd <- 02

 1897 18:01:36.136788  PCI: 00:14.2 subsystem <- 8086/51ef

 1898 18:01:36.136863  PCI: 00:14.2 cmd <- 02

 1899 18:01:36.144076  PCI: 00:14.3 subsystem <- 8086/51f0

 1900 18:01:36.144391  PCI: 00:14.3 cmd <- 02

 1901 18:01:36.147492  PCI: 00:15.0 subsystem <- 8086/51e8

 1902 18:01:36.151214  PCI: 00:15.0 cmd <- 02

 1903 18:01:36.154101  PCI: 00:15.1 subsystem <- 8086/51e9

 1904 18:01:36.157690  PCI: 00:15.1 cmd <- 06

 1905 18:01:36.160928  PCI: 00:15.3 subsystem <- 8086/51eb

 1906 18:01:36.163711  PCI: 00:15.3 cmd <- 02

 1907 18:01:36.167163  PCI: 00:16.0 subsystem <- 8086/51e0

 1908 18:01:36.167238  PCI: 00:16.0 cmd <- 02

 1909 18:01:36.174093  PCI: 00:19.1 subsystem <- 8086/51c6

 1910 18:01:36.174505  PCI: 00:19.1 cmd <- 02

 1911 18:01:36.177185  PCI: 00:1e.0 subsystem <- 8086/51a8

 1912 18:01:36.180248  PCI: 00:1e.0 cmd <- 06

 1913 18:01:36.183830  PCI: 00:1e.3 subsystem <- 8086/51ab

 1914 18:01:36.186897  PCI: 00:1e.3 cmd <- 02

 1915 18:01:36.190410  PCI: 00:1f.0 subsystem <- 8086/5182

 1916 18:01:36.193898  PCI: 00:1f.0 cmd <- 407

 1917 18:01:36.196809  PCI: 00:1f.3 subsystem <- 8086/51c8

 1918 18:01:36.200317  PCI: 00:1f.3 cmd <- 02

 1919 18:01:36.203689  PCI: 00:1f.5 subsystem <- 8086/51a4

 1920 18:01:36.203765  PCI: 00:1f.5 cmd <- 406

 1921 18:01:36.207224  PCI: 01:00.0 cmd <- 02

 1922 18:01:36.207298  done.

 1923 18:01:36.214184  BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms

 1924 18:01:36.216884  ME: Version: Unavailable

 1925 18:01:36.220341  BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms

 1926 18:01:36.223708  Initializing devices...

 1927 18:01:36.226968  Root Device init

 1928 18:01:36.227371  mainboard: EC init

 1929 18:01:36.233296  Chrome EC: Set SMI mask to 0x0000000000000000

 1930 18:01:36.236815  Chrome EC: UHEPI supported

 1931 18:01:36.242915  Chrome EC: clear events_b mask to 0x0000000000000000

 1932 18:01:36.249798  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1933 18:01:36.256422  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e

 1934 18:01:36.263107  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e

 1935 18:01:36.266170  Chrome EC: Set WAKE mask to 0x0000000000000000

 1936 18:01:36.274589  Root Device init finished in 43 msecs

 1937 18:01:36.274693  PCI: 00:00.0 init

 1938 18:01:36.277992  CPU TDP = 15 Watts

 1939 18:01:36.281438  CPU PL1 = 15 Watts

 1940 18:01:36.281511  CPU PL2 = 55 Watts

 1941 18:01:36.284682  CPU PL4 = 123 Watts

 1942 18:01:36.287777  PCI: 00:00.0 init finished in 8 msecs

 1943 18:01:36.291071  PCI: 00:02.0 init

 1944 18:01:36.291144  GMA: Found VBT in CBFS

 1945 18:01:36.294741  GMA: Found valid VBT in CBFS

 1946 18:01:36.301368  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1947 18:01:36.307781                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000

 1948 18:01:36.311505  PCI: 00:02.0 init finished in 18 msecs

 1949 18:01:36.315058  PCI: 00:06.0 init

 1950 18:01:36.317983  Initializing PCH PCIe bridge.

 1951 18:01:36.320880  PCI: 00:06.0 init finished in 3 msecs

 1952 18:01:36.324433  PCI: 00:0a.0 init

 1953 18:01:36.327921  PCI: 00:0a.0 init finished in 0 msecs

 1954 18:01:36.328267  PCI: 00:14.0 init

 1955 18:01:36.331279  PCI: 00:14.0 init finished in 0 msecs

 1956 18:01:36.335041  PCI: 00:14.2 init

 1957 18:01:36.338007  PCI: 00:14.2 init finished in 0 msecs

 1958 18:01:36.340829  PCI: 00:15.0 init

 1959 18:01:36.344356  I2C bus 0 version 0x3230302a

 1960 18:01:36.348000  DW I2C bus 0 at 0x80655000 (400 KHz)

 1961 18:01:36.350906  PCI: 00:15.0 init finished in 6 msecs

 1962 18:01:36.351008  PCI: 00:15.1 init

 1963 18:01:36.354366  I2C bus 1 version 0x3230302a

 1964 18:01:36.357510  DW I2C bus 1 at 0x80656000 (400 KHz)

 1965 18:01:36.364227  PCI: 00:15.1 init finished in 6 msecs

 1966 18:01:36.364302  PCI: 00:15.3 init

 1967 18:01:36.367616  I2C bus 3 version 0x3230302a

 1968 18:01:36.371449  DW I2C bus 3 at 0x80657000 (400 KHz)

 1969 18:01:36.374403  PCI: 00:15.3 init finished in 6 msecs

 1970 18:01:36.377628  PCI: 00:16.0 init

 1971 18:01:36.380923  PCI: 00:16.0 init finished in 0 msecs

 1972 18:01:36.384949  PCI: 00:19.1 init

 1973 18:01:36.385471  I2C bus 5 version 0x3230302a

 1974 18:01:36.391602  DW I2C bus 5 at 0x80659000 (400 KHz)

 1975 18:01:36.394244  PCI: 00:19.1 init finished in 6 msecs

 1976 18:01:36.394622  PCI: 00:1f.0 init

 1977 18:01:36.400721  IOAPIC: Initializing IOAPIC at 0xfec00000

 1978 18:01:36.400807  IOAPIC: ID = 0x02

 1979 18:01:36.404060  IOAPIC: Dumping registers

 1980 18:01:36.408186    reg 0x0000: 0x02000000

 1981 18:01:36.411290    reg 0x0001: 0x00770020

 1982 18:01:36.411751    reg 0x0002: 0x00000000

 1983 18:01:36.414613  IOAPIC: 120 interrupts

 1984 18:01:36.417490  IOAPIC: Clearing IOAPIC at 0xfec00000

 1985 18:01:36.424138  IOAPIC: vector 0x00 value 0x00000000 0x00010000

 1986 18:01:36.427444  IOAPIC: vector 0x01 value 0x00000000 0x00010000

 1987 18:01:36.430571  IOAPIC: vector 0x02 value 0x00000000 0x00010000

 1988 18:01:36.437286  IOAPIC: vector 0x03 value 0x00000000 0x00010000

 1989 18:01:36.440492  IOAPIC: vector 0x04 value 0x00000000 0x00010000

 1990 18:01:36.447804  IOAPIC: vector 0x05 value 0x00000000 0x00010000

 1991 18:01:36.450793  IOAPIC: vector 0x06 value 0x00000000 0x00010000

 1992 18:01:36.457236  IOAPIC: vector 0x07 value 0x00000000 0x00010000

 1993 18:01:36.460577  IOAPIC: vector 0x08 value 0x00000000 0x00010000

 1994 18:01:36.467382  IOAPIC: vector 0x09 value 0x00000000 0x00010000

 1995 18:01:36.470400  IOAPIC: vector 0x0a value 0x00000000 0x00010000

 1996 18:01:36.473929  IOAPIC: vector 0x0b value 0x00000000 0x00010000

 1997 18:01:36.480037  IOAPIC: vector 0x0c value 0x00000000 0x00010000

 1998 18:01:36.483544  IOAPIC: vector 0x0d value 0x00000000 0x00010000

 1999 18:01:36.490381  IOAPIC: vector 0x0e value 0x00000000 0x00010000

 2000 18:01:36.493875  IOAPIC: vector 0x0f value 0x00000000 0x00010000

 2001 18:01:36.500320  IOAPIC: vector 0x10 value 0x00000000 0x00010000

 2002 18:01:36.503466  IOAPIC: vector 0x11 value 0x00000000 0x00010000

 2003 18:01:36.510070  IOAPIC: vector 0x12 value 0x00000000 0x00010000

 2004 18:01:36.513473  IOAPIC: vector 0x13 value 0x00000000 0x00010000

 2005 18:01:36.516695  IOAPIC: vector 0x14 value 0x00000000 0x00010000

 2006 18:01:36.524028  IOAPIC: vector 0x15 value 0x00000000 0x00010000

 2007 18:01:36.526958  IOAPIC: vector 0x16 value 0x00000000 0x00010000

 2008 18:01:36.534028  IOAPIC: vector 0x17 value 0x00000000 0x00010000

 2009 18:01:36.537019  IOAPIC: vector 0x18 value 0x00000000 0x00010000

 2010 18:01:36.543839  IOAPIC: vector 0x19 value 0x00000000 0x00010000

 2011 18:01:36.547290  IOAPIC: vector 0x1a value 0x00000000 0x00010000

 2012 18:01:36.553242  IOAPIC: vector 0x1b value 0x00000000 0x00010000

 2013 18:01:36.556838  IOAPIC: vector 0x1c value 0x00000000 0x00010000

 2014 18:01:36.560476  IOAPIC: vector 0x1d value 0x00000000 0x00010000

 2015 18:01:36.567082  IOAPIC: vector 0x1e value 0x00000000 0x00010000

 2016 18:01:36.570135  IOAPIC: vector 0x1f value 0x00000000 0x00010000

 2017 18:01:36.577071  IOAPIC: vector 0x20 value 0x00000000 0x00010000

 2018 18:01:36.579588  IOAPIC: vector 0x21 value 0x00000000 0x00010000

 2019 18:01:36.586289  IOAPIC: vector 0x22 value 0x00000000 0x00010000

 2020 18:01:36.589591  IOAPIC: vector 0x23 value 0x00000000 0x00010000

 2021 18:01:36.596686  IOAPIC: vector 0x24 value 0x00000000 0x00010000

 2022 18:01:36.600357  IOAPIC: vector 0x25 value 0x00000000 0x00010000

 2023 18:01:36.603058  IOAPIC: vector 0x26 value 0x00000000 0x00010000

 2024 18:01:36.609604  IOAPIC: vector 0x27 value 0x00000000 0x00010000

 2025 18:01:36.613554  IOAPIC: vector 0x28 value 0x00000000 0x00010000

 2026 18:01:36.620022  IOAPIC: vector 0x29 value 0x00000000 0x00010000

 2027 18:01:36.622957  IOAPIC: vector 0x2a value 0x00000000 0x00010000

 2028 18:01:36.629591  IOAPIC: vector 0x2b value 0x00000000 0x00010000

 2029 18:01:36.633098  IOAPIC: vector 0x2c value 0x00000000 0x00010000

 2030 18:01:36.640288  IOAPIC: vector 0x2d value 0x00000000 0x00010000

 2031 18:01:36.643091  IOAPIC: vector 0x2e value 0x00000000 0x00010000

 2032 18:01:36.646369  IOAPIC: vector 0x2f value 0x00000000 0x00010000

 2033 18:01:36.652918  IOAPIC: vector 0x30 value 0x00000000 0x00010000

 2034 18:01:36.656581  IOAPIC: vector 0x31 value 0x00000000 0x00010000

 2035 18:01:36.662838  IOAPIC: vector 0x32 value 0x00000000 0x00010000

 2036 18:01:36.666002  IOAPIC: vector 0x33 value 0x00000000 0x00010000

 2037 18:01:36.672632  IOAPIC: vector 0x34 value 0x00000000 0x00010000

 2038 18:01:36.676072  IOAPIC: vector 0x35 value 0x00000000 0x00010000

 2039 18:01:36.682913  IOAPIC: vector 0x36 value 0x00000000 0x00010000

 2040 18:01:36.686198  IOAPIC: vector 0x37 value 0x00000000 0x00010000

 2041 18:01:36.689555  IOAPIC: vector 0x38 value 0x00000000 0x00010000

 2042 18:01:36.696171  IOAPIC: vector 0x39 value 0x00000000 0x00010000

 2043 18:01:36.699449  IOAPIC: vector 0x3a value 0x00000000 0x00010000

 2044 18:01:36.706227  IOAPIC: vector 0x3b value 0x00000000 0x00010000

 2045 18:01:36.709163  IOAPIC: vector 0x3c value 0x00000000 0x00010000

 2046 18:01:36.715896  IOAPIC: vector 0x3d value 0x00000000 0x00010000

 2047 18:01:36.719439  IOAPIC: vector 0x3e value 0x00000000 0x00010000

 2048 18:01:36.726014  IOAPIC: vector 0x3f value 0x00000000 0x00010000

 2049 18:01:36.729252  IOAPIC: vector 0x40 value 0x00000000 0x00010000

 2050 18:01:36.732454  IOAPIC: vector 0x41 value 0x00000000 0x00010000

 2051 18:01:36.739292  IOAPIC: vector 0x42 value 0x00000000 0x00010000

 2052 18:01:36.742080  IOAPIC: vector 0x43 value 0x00000000 0x00010000

 2053 18:01:36.749061  IOAPIC: vector 0x44 value 0x00000000 0x00010000

 2054 18:01:36.752605  IOAPIC: vector 0x45 value 0x00000000 0x00010000

 2055 18:01:36.759467  IOAPIC: vector 0x46 value 0x00000000 0x00010000

 2056 18:01:36.762905  IOAPIC: vector 0x47 value 0x00000000 0x00010000

 2057 18:01:36.766426  IOAPIC: vector 0x48 value 0x00000000 0x00010000

 2058 18:01:36.772470  IOAPIC: vector 0x49 value 0x00000000 0x00010000

 2059 18:01:36.776213  IOAPIC: vector 0x4a value 0x00000000 0x00010000

 2060 18:01:36.782702  IOAPIC: vector 0x4b value 0x00000000 0x00010000

 2061 18:01:36.785904  IOAPIC: vector 0x4c value 0x00000000 0x00010000

 2062 18:01:36.792246  IOAPIC: vector 0x4d value 0x00000000 0x00010000

 2063 18:01:36.796128  IOAPIC: vector 0x4e value 0x00000000 0x00010000

 2064 18:01:36.802800  IOAPIC: vector 0x4f value 0x00000000 0x00010000

 2065 18:01:36.805588  IOAPIC: vector 0x50 value 0x00000000 0x00010000

 2066 18:01:36.812422  IOAPIC: vector 0x51 value 0x00000000 0x00010000

 2067 18:01:36.815510  IOAPIC: vector 0x52 value 0x00000000 0x00010000

 2068 18:01:36.818750  IOAPIC: vector 0x53 value 0x00000000 0x00010000

 2069 18:01:36.825247  IOAPIC: vector 0x54 value 0x00000000 0x00010000

 2070 18:01:36.828638  IOAPIC: vector 0x55 value 0x00000000 0x00010000

 2071 18:01:36.835509  IOAPIC: vector 0x56 value 0x00000000 0x00010000

 2072 18:01:36.838800  IOAPIC: vector 0x57 value 0x00000000 0x00010000

 2073 18:01:36.845109  IOAPIC: vector 0x58 value 0x00000000 0x00010000

 2074 18:01:36.848717  IOAPIC: vector 0x59 value 0x00000000 0x00010000

 2075 18:01:36.851977  IOAPIC: vector 0x5a value 0x00000000 0x00010000

 2076 18:01:36.858672  IOAPIC: vector 0x5b value 0x00000000 0x00010000

 2077 18:01:36.862505  IOAPIC: vector 0x5c value 0x00000000 0x00010000

 2078 18:01:36.868443  IOAPIC: vector 0x5d value 0x00000000 0x00010000

 2079 18:01:36.871736  IOAPIC: vector 0x5e value 0x00000000 0x00010000

 2080 18:01:36.878421  IOAPIC: vector 0x5f value 0x00000000 0x00010000

 2081 18:01:36.882042  IOAPIC: vector 0x60 value 0x00000000 0x00010000

 2082 18:01:36.888431  IOAPIC: vector 0x61 value 0x00000000 0x00010000

 2083 18:01:36.892113  IOAPIC: vector 0x62 value 0x00000000 0x00010000

 2084 18:01:36.894879  IOAPIC: vector 0x63 value 0x00000000 0x00010000

 2085 18:01:36.901419  IOAPIC: vector 0x64 value 0x00000000 0x00010000

 2086 18:01:36.904805  IOAPIC: vector 0x65 value 0x00000000 0x00010000

 2087 18:01:36.911403  IOAPIC: vector 0x66 value 0x00000000 0x00010000

 2088 18:01:36.914711  IOAPIC: vector 0x67 value 0x00000000 0x00010000

 2089 18:01:36.922070  IOAPIC: vector 0x68 value 0x00000000 0x00010000

 2090 18:01:36.925193  IOAPIC: vector 0x69 value 0x00000000 0x00010000

 2091 18:01:36.931485  IOAPIC: vector 0x6a value 0x00000000 0x00010000

 2092 18:01:36.935343  IOAPIC: vector 0x6b value 0x00000000 0x00010000

 2093 18:01:36.938570  IOAPIC: vector 0x6c value 0x00000000 0x00010000

 2094 18:01:36.944627  IOAPIC: vector 0x6d value 0x00000000 0x00010000

 2095 18:01:36.948066  IOAPIC: vector 0x6e value 0x00000000 0x00010000

 2096 18:01:36.955156  IOAPIC: vector 0x6f value 0x00000000 0x00010000

 2097 18:01:36.958136  IOAPIC: vector 0x70 value 0x00000000 0x00010000

 2098 18:01:36.964787  IOAPIC: vector 0x71 value 0x00000000 0x00010000

 2099 18:01:36.967895  IOAPIC: vector 0x72 value 0x00000000 0x00010000

 2100 18:01:36.974167  IOAPIC: vector 0x73 value 0x00000000 0x00010000

 2101 18:01:36.977595  IOAPIC: vector 0x74 value 0x00000000 0x00010000

 2102 18:01:36.984754  IOAPIC: vector 0x75 value 0x00000000 0x00010000

 2103 18:01:36.987572  IOAPIC: vector 0x76 value 0x00000000 0x00010000

 2104 18:01:36.991040  IOAPIC: vector 0x77 value 0x00000000 0x00010000

 2105 18:01:36.998103  IOAPIC: Bootstrap Processor Local APIC = 0x00

 2106 18:01:37.001162  IOAPIC: vector 0x00 value 0x00000000 0x00000700

 2107 18:01:37.007993  PCI: 00:1f.0 init finished in 607 msecs

 2108 18:01:37.008418  PCI: 00:1f.2 init

 2109 18:01:37.011075  apm_control: Disabling ACPI.

 2110 18:01:37.014957  APMC done.

 2111 18:01:37.018331  PCI: 00:1f.2 init finished in 6 msecs

 2112 18:01:37.021737  PCI: 00:1f.3 init

 2113 18:01:37.025327  PCI: 00:1f.3 init finished in 0 msecs

 2114 18:01:37.025393  PCI: 01:00.0 init

 2115 18:01:37.027930  PCI: 01:00.0 init finished in 0 msecs

 2116 18:01:37.031259  PNP: 0c09.0 init

 2117 18:01:37.034798  Google Chrome EC uptime: 12.121 seconds

 2118 18:01:37.041967  Google Chrome AP resets since EC boot: 1

 2119 18:01:37.044726  Google Chrome most recent AP reset causes:

 2120 18:01:37.048664  	0.341: 32775 shutdown: entering G3

 2121 18:01:37.054575  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

 2122 18:01:37.058004  PNP: 0c09.0 init finished in 23 msecs

 2123 18:01:37.061071  GENERIC: 0.0 init

 2124 18:01:37.064332  GENERIC: 0.0 init finished in 0 msecs

 2125 18:01:37.064402  GENERIC: 1.0 init

 2126 18:01:37.071183  GENERIC: 1.0 init finished in 0 msecs

 2127 18:01:37.071265  Devices initialized

 2128 18:01:37.074174  Show all devs... After init.

 2129 18:01:37.077652  Root Device: enabled 1

 2130 18:01:37.081470  CPU_CLUSTER: 0: enabled 1

 2131 18:01:37.081807  DOMAIN: 0000: enabled 1

 2132 18:01:37.084410  GPIO: 0: enabled 1

 2133 18:01:37.087934  PCI: 00:00.0: enabled 1

 2134 18:01:37.088283  PCI: 00:01.0: enabled 0

 2135 18:01:37.091743  PCI: 00:01.1: enabled 0

 2136 18:01:37.095411  PCI: 00:02.0: enabled 1

 2137 18:01:37.098123  PCI: 00:04.0: enabled 1

 2138 18:01:37.098577  PCI: 00:05.0: enabled 0

 2139 18:01:37.100868  PCI: 00:06.0: enabled 1

 2140 18:01:37.104428  PCI: 00:06.2: enabled 0

 2141 18:01:37.104487  PCI: 00:07.0: enabled 0

 2142 18:01:37.107810  PCI: 00:07.1: enabled 0

 2143 18:01:37.111377  PCI: 00:07.2: enabled 0

 2144 18:01:37.114765  PCI: 00:07.3: enabled 0

 2145 18:01:37.115112  PCI: 00:08.0: enabled 0

 2146 18:01:37.118118  PCI: 00:09.0: enabled 0

 2147 18:01:37.121272  PCI: 00:0a.0: enabled 1

 2148 18:01:37.124411  PCI: 00:0d.0: enabled 1

 2149 18:01:37.124776  PCI: 00:0d.1: enabled 0

 2150 18:01:37.127920  PCI: 00:0d.2: enabled 0

 2151 18:01:37.130944  PCI: 00:0d.3: enabled 0

 2152 18:01:37.134288  PCI: 00:0e.0: enabled 0

 2153 18:01:37.134363  PCI: 00:10.0: enabled 0

 2154 18:01:37.137485  PCI: 00:10.1: enabled 0

 2155 18:01:37.140760  PCI: 00:10.6: enabled 0

 2156 18:01:37.144098  PCI: 00:10.7: enabled 0

 2157 18:01:37.144155  PCI: 00:12.0: enabled 0

 2158 18:01:37.147491  PCI: 00:12.6: enabled 0

 2159 18:01:37.151400  PCI: 00:12.7: enabled 0

 2160 18:01:37.151754  PCI: 00:13.0: enabled 0

 2161 18:01:37.154581  PCI: 00:14.0: enabled 1

 2162 18:01:37.158203  PCI: 00:14.1: enabled 0

 2163 18:01:37.161049  PCI: 00:14.2: enabled 1

 2164 18:01:37.161433  PCI: 00:14.3: enabled 1

 2165 18:01:37.164272  PCI: 00:15.0: enabled 1

 2166 18:01:37.167615  PCI: 00:15.1: enabled 1

 2167 18:01:37.171312  PCI: 00:15.2: enabled 0

 2168 18:01:37.171632  PCI: 00:15.3: enabled 1

 2169 18:01:37.174674  PCI: 00:16.0: enabled 1

 2170 18:01:37.177444  PCI: 00:16.1: enabled 0

 2171 18:01:37.180788  PCI: 00:16.2: enabled 0

 2172 18:01:37.180853  PCI: 00:16.3: enabled 0

 2173 18:01:37.183935  PCI: 00:16.4: enabled 0

 2174 18:01:37.187296  PCI: 00:16.5: enabled 0

 2175 18:01:37.190657  PCI: 00:17.0: enabled 0

 2176 18:01:37.190718  PCI: 00:19.0: enabled 0

 2177 18:01:37.193605  PCI: 00:19.1: enabled 1

 2178 18:01:37.197020  PCI: 00:19.2: enabled 0

 2179 18:01:37.200696  PCI: 00:1a.0: enabled 0

 2180 18:01:37.200938  PCI: 00:1c.0: enabled 0

 2181 18:01:37.203712  PCI: 00:1c.1: enabled 0

 2182 18:01:37.207216  PCI: 00:1c.2: enabled 0

 2183 18:01:37.207307  PCI: 00:1c.3: enabled 0

 2184 18:01:37.210202  PCI: 00:1c.4: enabled 0

 2185 18:01:37.213502  PCI: 00:1c.5: enabled 0

 2186 18:01:37.217001  PCI: 00:1c.6: enabled 0

 2187 18:01:37.217058  PCI: 00:1c.7: enabled 0

 2188 18:01:37.220145  PCI: 00:1d.0: enabled 0

 2189 18:01:37.223535  PCI: 00:1d.1: enabled 0

 2190 18:01:37.227294  PCI: 00:1d.2: enabled 0

 2191 18:01:37.227349  PCI: 00:1d.3: enabled 0

 2192 18:01:37.230140  PCI: 00:1e.0: enabled 1

 2193 18:01:37.233918  PCI: 00:1e.1: enabled 0

 2194 18:01:37.237300  PCI: 00:1e.2: enabled 0

 2195 18:01:37.237658  PCI: 00:1e.3: enabled 1

 2196 18:01:37.240625  PCI: 00:1f.0: enabled 1

 2197 18:01:37.243774  PCI: 00:1f.1: enabled 0

 2198 18:01:37.244194  PCI: 00:1f.2: enabled 1

 2199 18:01:37.247010  PCI: 00:1f.3: enabled 1

 2200 18:01:37.250424  PCI: 00:1f.4: enabled 0

 2201 18:01:37.253776  PCI: 00:1f.5: enabled 1

 2202 18:01:37.254112  PCI: 00:1f.6: enabled 0

 2203 18:01:37.256805  PCI: 00:1f.7: enabled 0

 2204 18:01:37.260203  GENERIC: 0.0: enabled 1

 2205 18:01:37.263562  GENERIC: 0.0: enabled 1

 2206 18:01:37.263618  GENERIC: 1.0: enabled 1

 2207 18:01:37.266966  GENERIC: 0.0: enabled 1

 2208 18:01:37.270180  GENERIC: 1.0: enabled 1

 2209 18:01:37.273360  USB0 port 0: enabled 1

 2210 18:01:37.273421  USB0 port 0: enabled 1

 2211 18:01:37.276721  GENERIC: 0.0: enabled 1

 2212 18:01:37.280169  I2C: 00:1a: enabled 1

 2213 18:01:37.280237  I2C: 00:31: enabled 1

 2214 18:01:37.283382  I2C: 00:32: enabled 1

 2215 18:01:37.286731  I2C: 00:50: enabled 1

 2216 18:01:37.286798  I2C: 00:10: enabled 1

 2217 18:01:37.290197  I2C: 00:15: enabled 1

 2218 18:01:37.293864  I2C: 00:2c: enabled 1

 2219 18:01:37.293923  GENERIC: 0.0: enabled 1

 2220 18:01:37.296910  SPI: 00: enabled 1

 2221 18:01:37.299897  PNP: 0c09.0: enabled 1

 2222 18:01:37.299952  GENERIC: 0.0: enabled 1

 2223 18:01:37.303244  USB3 port 0: enabled 1

 2224 18:01:37.306617  USB3 port 1: enabled 0

 2225 18:01:37.310036  USB3 port 2: enabled 1

 2226 18:01:37.310096  USB3 port 3: enabled 0

 2227 18:01:37.313175  USB2 port 0: enabled 1

 2228 18:01:37.316746  USB2 port 1: enabled 0

 2229 18:01:37.317187  USB2 port 2: enabled 1

 2230 18:01:37.320168  USB2 port 3: enabled 0

 2231 18:01:37.323437  USB2 port 4: enabled 0

 2232 18:01:37.326713  USB2 port 5: enabled 1

 2233 18:01:37.327030  USB2 port 6: enabled 0

 2234 18:01:37.330063  USB2 port 7: enabled 0

 2235 18:01:37.333040  USB2 port 8: enabled 1

 2236 18:01:37.333117  USB2 port 9: enabled 1

 2237 18:01:37.336878  USB3 port 0: enabled 1

 2238 18:01:37.339917  USB3 port 1: enabled 0

 2239 18:01:37.342928  USB3 port 2: enabled 0

 2240 18:01:37.342985  USB3 port 3: enabled 0

 2241 18:01:37.346315  GENERIC: 0.0: enabled 1

 2242 18:01:37.349693  GENERIC: 1.0: enabled 1

 2243 18:01:37.349761  APIC: 00: enabled 1

 2244 18:01:37.353686  APIC: 12: enabled 1

 2245 18:01:37.356719  APIC: 14: enabled 1

 2246 18:01:37.356800  APIC: 16: enabled 1

 2247 18:01:37.360218  APIC: 10: enabled 1

 2248 18:01:37.360784  APIC: 01: enabled 1

 2249 18:01:37.363220  APIC: 09: enabled 1

 2250 18:01:37.366236  APIC: 08: enabled 1

 2251 18:01:37.366302  PCI: 01:00.0: enabled 1

 2252 18:01:37.372737  BS: BS_DEV_INIT run times (exec / console): 13 / 1133 ms

 2253 18:01:37.379815  FMAP: area RW_ELOG found @ f20000 (16384 bytes)

 2254 18:01:37.383057  ELOG: NV offset 0xf20000 size 0x4000

 2255 18:01:37.390049  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 2256 18:01:37.396726  ELOG: Event(17) added with size 13 at 2023-08-30 18:01:37 UTC

 2257 18:01:37.403242  ELOG: Event(9E) added with size 10 at 2023-08-30 18:01:37 UTC

 2258 18:01:37.409662  ELOG: Event(9F) added with size 14 at 2023-08-30 18:01:37 UTC

 2259 18:01:37.416363  BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms

 2260 18:01:37.422727  ELOG: Event(A0) added with size 9 at 2023-08-30 18:01:37 UTC

 2261 18:01:37.426061  elog_add_boot_reason: Logged dev mode boot

 2262 18:01:37.432747  BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms

 2263 18:01:37.433287  Finalize devices...

 2264 18:01:37.436800  PCI: 00:16.0 final

 2265 18:01:37.437256  PCI: 00:1f.2 final

 2266 18:01:37.439505  GENERIC: 0.0 final

 2267 18:01:37.445640  added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0

 2268 18:01:37.449130  GENERIC: 1.0 final

 2269 18:01:37.452295  added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0

 2270 18:01:37.455946  Devices finalized

 2271 18:01:37.462238  BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms

 2272 18:01:37.466010  FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)

 2273 18:01:37.472302  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 2274 18:01:37.476047  ME: HFSTS1                      : 0x90000245

 2275 18:01:37.482327  ME: HFSTS2                      : 0x82100116

 2276 18:01:37.486069  ME: HFSTS3                      : 0x00000050

 2277 18:01:37.489040  ME: HFSTS4                      : 0x00004000

 2278 18:01:37.495424  ME: HFSTS5                      : 0x00000000

 2279 18:01:37.498775  ME: HFSTS6                      : 0x40600006

 2280 18:01:37.502180  ME: Manufacturing Mode          : NO

 2281 18:01:37.506107  ME: SPI Protection Mode Enabled : YES

 2282 18:01:37.512480  ME: FPFs Committed              : YES

 2283 18:01:37.516028  ME: Manufacturing Vars Locked   : YES

 2284 18:01:37.518973  ME: FW Partition Table          : OK

 2285 18:01:37.522052  ME: Bringup Loader Failure      : NO

 2286 18:01:37.525490  ME: Firmware Init Complete      : YES

 2287 18:01:37.528818  ME: Boot Options Present        : NO

 2288 18:01:37.532049  ME: Update In Progress          : NO

 2289 18:01:37.535442  ME: D0i3 Support                : YES

 2290 18:01:37.542815  ME: Low Power State Enabled     : NO

 2291 18:01:37.545569  ME: CPU Replaced                : YES

 2292 18:01:37.548988  ME: CPU Replacement Valid       : YES

 2293 18:01:37.552676  ME: Current Working State       : 5

 2294 18:01:37.555637  ME: Current Operation State     : 1

 2295 18:01:37.559078  ME: Current Operation Mode      : 0

 2296 18:01:37.562580  ME: Error Code                  : 0

 2297 18:01:37.565603  ME: Enhanced Debug Mode         : NO

 2298 18:01:37.568645  ME: CPU Debug Disabled          : YES

 2299 18:01:37.575115  ME: TXT Support                 : NO

 2300 18:01:37.578338  ME: WP for RO is enabled        : YES

 2301 18:01:37.585334  ME: RO write protection scope - Start=0x1000, End=0x15AFFF

 2302 18:01:37.588542  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms

 2303 18:01:37.595028  Ramoops buffer: 0x100000@0x76899000.

 2304 18:01:37.598244  BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms

 2305 18:01:37.607998  CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c

 2306 18:01:37.611340  CBFS: 'fallback/slic' not found.

 2307 18:01:37.614863  ACPI: Writing ACPI tables at 7686d000.

 2308 18:01:37.614937  ACPI:    * FACS

 2309 18:01:37.618182  ACPI:    * DSDT

 2310 18:01:37.624798  PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000

 2311 18:01:37.628052  ACPI:    * FADT

 2312 18:01:37.628395  SCI is IRQ9

 2313 18:01:37.631332  ACPI: added table 1/32, length now 40

 2314 18:01:37.635068  ACPI:     * SSDT

 2315 18:01:37.641724  Found 1 CPU(s) with 6/8 physical/logical core(s) each.

 2316 18:01:37.644514  \_SB.PCI0.PEPD: Intel Power Engine Plug-in

 2317 18:01:37.651000  \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2

 2318 18:01:37.654214  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 2319 18:01:37.661104  CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4

 2320 18:01:37.664142  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 2321 18:01:37.670827  \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0

 2322 18:01:37.677218  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 2323 18:01:37.680900  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 2324 18:01:37.687645  \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50

 2325 18:01:37.690776  \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10

 2326 18:01:37.697899  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 2327 18:01:37.700908  \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c

 2328 18:01:37.707539  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 2329 18:01:37.714218  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 2330 18:01:37.717353  PS2K: Passing 80 keymaps to kernel

 2331 18:01:37.723897  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 2332 18:01:37.730894  \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2

 2333 18:01:37.737186  \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0

 2334 18:01:37.744063  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 2335 18:01:37.747261  \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5

 2336 18:01:37.753675  \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8

 2337 18:01:37.760605  \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9

 2338 18:01:37.766626  \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0

 2339 18:01:37.773238  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 2340 18:01:37.780337  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 2341 18:01:37.783516  ACPI: added table 2/32, length now 44

 2342 18:01:37.787086  ACPI:    * MCFG

 2343 18:01:37.790296  ACPI: added table 3/32, length now 48

 2344 18:01:37.790657  ACPI:    * TPM2

 2345 18:01:37.793321  TPM2 log created at 0x7685d000

 2346 18:01:37.797002  ACPI: added table 4/32, length now 52

 2347 18:01:37.799957  ACPI:     * LPIT

 2348 18:01:37.803301  ACPI: added table 5/32, length now 56

 2349 18:01:37.803379  ACPI:    * MADT

 2350 18:01:37.806662  SCI is IRQ9

 2351 18:01:37.809902  ACPI: added table 6/32, length now 60

 2352 18:01:37.813266  cmd_reg from pmc_make_ipc_cmd 1052838

 2353 18:01:37.820305  CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc

 2354 18:01:37.826738  CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200

 2355 18:01:37.833295  CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00

 2356 18:01:37.836405  PMC CrashLog size in discovery mode: 0xC00

 2357 18:01:37.839676  cpu crashlog bar addr: 0x80640000

 2358 18:01:37.843042  cpu discovery table offset: 0x6030

 2359 18:01:37.846160  cpu_crashlog_discovery_table buffer count: 0x3

 2360 18:01:37.852764  cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0

 2361 18:01:37.859737  cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000

 2362 18:01:37.866249  cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000

 2363 18:01:37.872986  PMC crashLog size in discovery mode : 0xC00

 2364 18:01:37.879808  Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.

 2365 18:01:37.882665  discover mode PMC crashlog size adjusted to: 0x200

 2366 18:01:37.889243  Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.

 2367 18:01:37.896355  discover mode PMC crashlog size adjusted to: 0x0

 2368 18:01:37.899460  m_cpu_crashLog_size : 0x3480 bytes

 2369 18:01:37.902904  CPU crashLog present.

 2370 18:01:37.906832  CPU crash data size: 0x3480 bytes in 0x3 region(s).

 2371 18:01:37.912491  Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.

 2372 18:01:37.915845  current = 76876550

 2373 18:01:37.915917  ACPI:    * DMAR

 2374 18:01:37.922776  ACPI: added table 7/32, length now 64

 2375 18:01:37.926144  ACPI: added table 8/32, length now 68

 2376 18:01:37.926216  ACPI:    * HPET

 2377 18:01:37.929397  ACPI: added table 9/32, length now 72

 2378 18:01:37.932604  ACPI: done.

 2379 18:01:37.936181  ACPI tables: 38528 bytes.

 2380 18:01:37.936558  smbios_write_tables: 76857000

 2381 18:01:37.940632  EC returned error result code 3

 2382 18:01:37.944249  Couldn't obtain OEM name from CBI

 2383 18:01:37.947378  Create SMBIOS type 16

 2384 18:01:37.951088  Create SMBIOS type 17

 2385 18:01:37.953759  Create SMBIOS type 20

 2386 18:01:37.954118  GENERIC: 0.0 (WIFI Device)

 2387 18:01:37.957040  SMBIOS tables: 2156 bytes.

 2388 18:01:37.960277  Writing table forward entry at 0x00000500

 2389 18:01:37.967128  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955

 2390 18:01:37.970027  Writing coreboot table at 0x76891000

 2391 18:01:37.976855   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 2392 18:01:37.983302   1. 0000000000001000-000000000009ffff: RAM

 2393 18:01:37.986623   2. 00000000000a0000-00000000000fffff: RESERVED

 2394 18:01:37.989758   3. 0000000000100000-0000000076856fff: RAM

 2395 18:01:37.996439   4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES

 2396 18:01:38.003088   5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE

 2397 18:01:38.006722   6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES

 2398 18:01:38.012942   7. 0000000077000000-00000000803fffff: RESERVED

 2399 18:01:38.016437   8. 00000000c0000000-00000000cfffffff: RESERVED

 2400 18:01:38.023279   9. 00000000f8000000-00000000f9ffffff: RESERVED

 2401 18:01:38.026654  10. 00000000fb000000-00000000fb000fff: RESERVED

 2402 18:01:38.032860  11. 00000000fc800000-00000000fe7fffff: RESERVED

 2403 18:01:38.036262  12. 00000000feb00000-00000000feb7ffff: RESERVED

 2404 18:01:38.042951  13. 00000000fec00000-00000000fecfffff: RESERVED

 2405 18:01:38.046164  14. 00000000fed40000-00000000fed6ffff: RESERVED

 2406 18:01:38.049518  15. 00000000fed80000-00000000fed87fff: RESERVED

 2407 18:01:38.056195  16. 00000000fed90000-00000000fed92fff: RESERVED

 2408 18:01:38.059355  17. 00000000feda0000-00000000feda1fff: RESERVED

 2409 18:01:38.066130  18. 00000000fedc0000-00000000feddffff: RESERVED

 2410 18:01:38.069455  19. 0000000100000000-000000027fbfffff: RAM

 2411 18:01:38.072396  Passing 4 GPIOs to payload:

 2412 18:01:38.079557              NAME |       PORT | POLARITY |     VALUE

 2413 18:01:38.082511               lid |  undefined |     high |      high

 2414 18:01:38.089036             power |  undefined |     high |       low

 2415 18:01:38.092318             oprom |  undefined |     high |       low

 2416 18:01:38.099209          EC in RW | 0x00000151 |     high |      high

 2417 18:01:38.099288  Board ID: 3

 2418 18:01:38.103038  FW config: 0x131

 2419 18:01:38.109530  Wrote coreboot table at: 0x76891000, 0x6bc bytes, checksum c11c

 2420 18:01:38.112436  coreboot table: 1748 bytes.

 2421 18:01:38.115445  IMD ROOT    0. 0x76fff000 0x00001000

 2422 18:01:38.118745  IMD SMALL   1. 0x76ffe000 0x00001000

 2423 18:01:38.122363  FSP MEMORY  2. 0x76afe000 0x00500000

 2424 18:01:38.125535  CONSOLE     3. 0x76ade000 0x00020000

 2425 18:01:38.128828  RW MCACHE   4. 0x76add000 0x0000043c

 2426 18:01:38.132259  RO MCACHE   5. 0x76adc000 0x00000fd8

 2427 18:01:38.135688  FMAP        6. 0x76adb000 0x0000064a

 2428 18:01:38.142319  TIME STAMP  7. 0x76ada000 0x00000910

 2429 18:01:38.145237  VBOOT WORK  8. 0x76ac6000 0x00014000

 2430 18:01:38.148586  MEM INFO    9. 0x76ac5000 0x000003b8

 2431 18:01:38.151909  ROMSTG STCK10. 0x76ac4000 0x00001000

 2432 18:01:38.155344  AFTER CAR  11. 0x76ab8000 0x0000c000

 2433 18:01:38.158774  RAMSTAGE   12. 0x76a2e000 0x0008a000

 2434 18:01:38.161984  ACPI BERT  13. 0x76a1e000 0x00010000

 2435 18:01:38.168681  CHROMEOS NVS14. 0x76a1d000 0x00000f00

 2436 18:01:38.171901  REFCODE    15. 0x769ae000 0x0006f000

 2437 18:01:38.175091  SMM BACKUP 16. 0x7699e000 0x00010000

 2438 18:01:38.178861  IGD OPREGION17. 0x76999000 0x00004203

 2439 18:01:38.182017  RAMOOPS    18. 0x76899000 0x00100000

 2440 18:01:38.185178  COREBOOT   19. 0x76891000 0x00008000

 2441 18:01:38.188726  ACPI       20. 0x7686d000 0x00024000

 2442 18:01:38.191790  TPM2 TCGLOG21. 0x7685d000 0x00010000

 2443 18:01:38.198278  PMC CRASHLOG22. 0x7685c000 0x00000c00

 2444 18:01:38.201536  CPU CRASHLOG23. 0x76858000 0x00003480

 2445 18:01:38.205404  SMBIOS     24. 0x76857000 0x00001000

 2446 18:01:38.205715  IMD small region:

 2447 18:01:38.212051    IMD ROOT    0. 0x76ffec00 0x00000400

 2448 18:01:38.215421    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 2449 18:01:38.218886    POWER STATE 2. 0x76ffeb80 0x00000044

 2450 18:01:38.221773    ROMSTAGE    3. 0x76ffeb60 0x00000004

 2451 18:01:38.224851    ACPI GNVS   4. 0x76ffeb00 0x00000048

 2452 18:01:38.228137    TYPE_C INFO 5. 0x76ffeae0 0x0000000c

 2453 18:01:38.234881  BS: BS_WRITE_TABLES run times (exec / console): 6 / 624 ms

 2454 18:01:38.238256  MTRR: Physical address space:

 2455 18:01:38.244891  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 2456 18:01:38.251884  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 2457 18:01:38.258435  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 2458 18:01:38.265132  0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0

 2459 18:01:38.271279  0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1

 2460 18:01:38.274887  0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0

 2461 18:01:38.281202  0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6

 2462 18:01:38.287964  MTRR: Fixed MSR 0x250 0x0606060606060606

 2463 18:01:38.291123  MTRR: Fixed MSR 0x258 0x0606060606060606

 2464 18:01:38.294674  MTRR: Fixed MSR 0x259 0x0000000000000000

 2465 18:01:38.297842  MTRR: Fixed MSR 0x268 0x0606060606060606

 2466 18:01:38.304488  MTRR: Fixed MSR 0x269 0x0606060606060606

 2467 18:01:38.308091  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2468 18:01:38.311266  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2469 18:01:38.314811  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2470 18:01:38.317872  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2471 18:01:38.324894  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2472 18:01:38.328093  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2473 18:01:38.331278  call enable_fixed_mtrr()

 2474 18:01:38.334789  CPU physical address size: 39 bits

 2475 18:01:38.341346  MTRR: default type WB/UC MTRR counts: 6/6.

 2476 18:01:38.344502  MTRR: UC selected as default type.

 2477 18:01:38.347669  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 2478 18:01:38.354404  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 2479 18:01:38.361126  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 2480 18:01:38.368126  MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1

 2481 18:01:38.374401  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 2482 18:01:38.380775  MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6

 2483 18:01:38.387232  MTRR: Fixed MSR 0x250 0x0606060606060606

 2484 18:01:38.390434  MTRR: Fixed MSR 0x258 0x0606060606060606

 2485 18:01:38.394087  MTRR: Fixed MSR 0x259 0x0000000000000000

 2486 18:01:38.397002  MTRR: Fixed MSR 0x268 0x0606060606060606

 2487 18:01:38.403933  MTRR: Fixed MSR 0x269 0x0606060606060606

 2488 18:01:38.407754  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2489 18:01:38.410889  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2490 18:01:38.414512  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2491 18:01:38.417639  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2492 18:01:38.424492  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2493 18:01:38.427176  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2494 18:01:38.430373  MTRR: Fixed MSR 0x250 0x0606060606060606

 2495 18:01:38.434053  MTRR: Fixed MSR 0x250 0x0606060606060606

 2496 18:01:38.440401  MTRR: Fixed MSR 0x250 0x0606060606060606

 2497 18:01:38.444268  MTRR: Fixed MSR 0x258 0x0606060606060606

 2498 18:01:38.447133  MTRR: Fixed MSR 0x259 0x0000000000000000

 2499 18:01:38.450544  MTRR: Fixed MSR 0x268 0x0606060606060606

 2500 18:01:38.456870  MTRR: Fixed MSR 0x269 0x0606060606060606

 2501 18:01:38.460534  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2502 18:01:38.463488  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2503 18:01:38.467079  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2504 18:01:38.473630  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2505 18:01:38.477016  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2506 18:01:38.480093  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2507 18:01:38.483577  MTRR: Fixed MSR 0x250 0x0606060606060606

 2508 18:01:38.486794  MTRR: Fixed MSR 0x258 0x0606060606060606

 2509 18:01:38.490247  call enable_fixed_mtrr()

 2510 18:01:38.493714  MTRR: Fixed MSR 0x250 0x0606060606060606

 2511 18:01:38.500003  MTRR: Fixed MSR 0x250 0x0606060606060606

 2512 18:01:38.503347  MTRR: Fixed MSR 0x259 0x0000000000000000

 2513 18:01:38.506678  MTRR: Fixed MSR 0x268 0x0606060606060606

 2514 18:01:38.510012  MTRR: Fixed MSR 0x269 0x0606060606060606

 2515 18:01:38.516873  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2516 18:01:38.520118  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2517 18:01:38.523466  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2518 18:01:38.526952  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2519 18:01:38.533395  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2520 18:01:38.536459  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2521 18:01:38.539654  CPU physical address size: 39 bits

 2522 18:01:38.543319  MTRR: Fixed MSR 0x258 0x0606060606060606

 2523 18:01:38.546583  call enable_fixed_mtrr()

 2524 18:01:38.550031  call enable_fixed_mtrr()

 2525 18:01:38.553202  MTRR: Fixed MSR 0x258 0x0606060606060606

 2526 18:01:38.556526  MTRR: Fixed MSR 0x259 0x0000000000000000

 2527 18:01:38.560183  MTRR: Fixed MSR 0x268 0x0606060606060606

 2528 18:01:38.567179  MTRR: Fixed MSR 0x269 0x0606060606060606

 2529 18:01:38.569910  CPU physical address size: 39 bits

 2530 18:01:38.573266  MTRR: Fixed MSR 0x258 0x0606060606060606

 2531 18:01:38.576388  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2532 18:01:38.580222  MTRR: Fixed MSR 0x259 0x0000000000000000

 2533 18:01:38.586285  MTRR: Fixed MSR 0x268 0x0606060606060606

 2534 18:01:38.589426  MTRR: Fixed MSR 0x269 0x0606060606060606

 2535 18:01:38.593032  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2536 18:01:38.596504  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2537 18:01:38.603379  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2538 18:01:38.606509  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2539 18:01:38.609534  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2540 18:01:38.612752  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2541 18:01:38.616208  call enable_fixed_mtrr()

 2542 18:01:38.619426  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2543 18:01:38.626007  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2544 18:01:38.629461  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2545 18:01:38.632774  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2546 18:01:38.636135  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2547 18:01:38.639331  CPU physical address size: 39 bits

 2548 18:01:38.643049  call enable_fixed_mtrr()

 2549 18:01:38.646229  MTRR: Fixed MSR 0x258 0x0606060606060606

 2550 18:01:38.650031  CPU physical address size: 39 bits

 2551 18:01:38.656727  MTRR: Fixed MSR 0x259 0x0000000000000000

 2552 18:01:38.659770  CPU physical address size: 39 bits

 2553 18:01:38.662773  MTRR: Fixed MSR 0x259 0x0000000000000000

 2554 18:01:38.666134  MTRR: Fixed MSR 0x268 0x0606060606060606

 2555 18:01:38.672908  MTRR: Fixed MSR 0x268 0x0606060606060606

 2556 18:01:38.676068  MTRR: Fixed MSR 0x269 0x0606060606060606

 2557 18:01:38.679186  MTRR: Fixed MSR 0x269 0x0606060606060606

 2558 18:01:38.682835  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2559 18:01:38.685651  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2560 18:01:38.692344  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2561 18:01:38.695747  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2562 18:01:38.699005  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2563 18:01:38.702378  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2564 18:01:38.709104  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2565 18:01:38.709178  call enable_fixed_mtrr()

 2566 18:01:38.715510  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2567 18:01:38.719366  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2568 18:01:38.722711  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2569 18:01:38.725751  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2570 18:01:38.732377  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2571 18:01:38.735863  CPU physical address size: 39 bits

 2572 18:01:38.736331  call enable_fixed_mtrr()

 2573 18:01:38.739184  CPU physical address size: 39 bits

 2574 18:01:38.744208  

 2575 18:01:38.744549  MTRR check

 2576 18:01:38.747622  Fixed MTRRs   : Enabled

 2577 18:01:38.748047  Variable MTRRs: Enabled

 2578 18:01:38.748298  

 2579 18:01:38.754104  BS: BS_WRITE_TABLES exit times (exec / console): 251 / 150 ms

 2580 18:01:38.757069  Checking cr50 for pending updates

 2581 18:01:38.769535  Reading cr50 TPM mode

 2582 18:01:38.784759  BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms

 2583 18:01:38.794777  CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c

 2584 18:01:38.798321  Checking segment from ROM address 0xf96cbe6c

 2585 18:01:38.801650  Checking segment from ROM address 0xf96cbe88

 2586 18:01:38.808359  Loading segment from ROM address 0xf96cbe6c

 2587 18:01:38.808775    code (compression=1)

 2588 18:01:38.818151    New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca

 2589 18:01:38.824813  Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca

 2590 18:01:38.828033  using LZMA

 2591 18:01:38.850007  [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4

 2592 18:01:38.856520  Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c

 2593 18:01:38.864509  Loading segment from ROM address 0xf96cbe88

 2594 18:01:38.868354    Entry Point 0x30000000

 2595 18:01:38.868508  Loaded segments

 2596 18:01:38.875200  BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms

 2597 18:01:38.881564  BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms

 2598 18:01:38.884819  Finalizing chipset.

 2599 18:01:38.885173  apm_control: Finalizing SMM.

 2600 18:01:38.888261  APMC done.

 2601 18:01:38.891434  HECI: CSE device 16.1 is disabled

 2602 18:01:38.895050  HECI: CSE device 16.2 is disabled

 2603 18:01:38.898495  HECI: CSE device 16.3 is disabled

 2604 18:01:38.901746  HECI: CSE device 16.4 is disabled

 2605 18:01:38.904536  HECI: CSE device 16.5 is disabled

 2606 18:01:38.907946  HECI: Sending End-of-Post

 2607 18:01:38.916277  CSE: EOP requested action: continue boot

 2608 18:01:38.919664  CSE EOP successful, continuing boot

 2609 18:01:38.926037  BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms

 2610 18:01:38.928991  mp_park_aps done after 0 msecs.

 2611 18:01:38.932605  Jumping to boot code at 0x30000000(0x76891000)

 2612 18:01:38.942420  CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes

 2613 18:01:38.946724  

 2614 18:01:38.946797  

 2615 18:01:38.946848  

 2616 18:01:38.950259  Starting depthcharge on Volmar...

 2617 18:01:38.950649  

 2618 18:01:38.951554  end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
 2619 18:01:38.951936  start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
 2620 18:01:38.952227  Setting prompt string to ['brya:']
 2621 18:01:38.952495  bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
 2622 18:01:38.956754  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2623 18:01:38.957128  

 2624 18:01:38.963542  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2625 18:01:38.963900  

 2626 18:01:38.970164  Looking for NVMe Controller 0x300653d8 @ 00:06:00

 2627 18:01:38.970533  

 2628 18:01:38.973132  configure_storage: Failed to remap 1C:2

 2629 18:01:38.973467  

 2630 18:01:38.976506  Wipe memory regions:

 2631 18:01:38.976820  

 2632 18:01:38.979869  	[0x00000000001000, 0x000000000a0000)

 2633 18:01:38.980114  

 2634 18:01:38.982963  	[0x00000000100000, 0x00000030000000)

 2635 18:01:39.088016  

 2636 18:01:39.091163  	[0x00000032668e60, 0x00000076857000)

 2637 18:01:39.239014  

 2638 18:01:39.242157  	[0x00000100000000, 0x0000027fc00000)

 2639 18:01:40.073335  

 2640 18:01:40.076605  ec_init: CrosEC protocol v3 supported (256, 256)

 2641 18:01:40.686584  

 2642 18:01:40.687062  R8152: Initializing

 2643 18:01:40.687343  

 2644 18:01:40.690027  Version 9 (ocp_data = 6010)

 2645 18:01:40.690382  

 2646 18:01:40.693541  R8152: Done initializing

 2647 18:01:40.693953  

 2648 18:01:40.696187  Adding net device

 2649 18:01:40.997104  

 2650 18:01:41.000389  [firmware-brya-14505.B-collabora] Feb  7 2023 16:06:26

 2651 18:01:41.000941  

 2652 18:01:41.001341  

 2653 18:01:41.001585  

 2654 18:01:41.002166  Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2656 18:01:41.103146  brya: tftpboot 192.168.201.1 11385824/tftp-deploy-2wij49rg/kernel/bzImage 11385824/tftp-deploy-2wij49rg/kernel/cmdline 11385824/tftp-deploy-2wij49rg/ramdisk/ramdisk.cpio.gz

 2657 18:01:41.103773  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2658 18:01:41.104285  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
 2659 18:01:41.107937  tftpboot 192.168.201.1 11385824/tftp-deploy-2wij49rg/kernel/bzIploy-2wij49rg/kernel/cmdline 11385824/tftp-deploy-2wij49rg/ramdisk/ramdisk.cpio.gz

 2660 18:01:41.108021  

 2661 18:01:41.108075  Waiting for link

 2662 18:01:41.311786  

 2663 18:01:41.312199  done.

 2664 18:01:41.312451  

 2665 18:01:41.312681  MAC: 00:e0:4c:68:03:d9

 2666 18:01:41.312910  

 2667 18:01:41.315226  Sending DHCP discover... done.

 2668 18:01:41.315485  

 2669 18:01:41.318246  Waiting for reply... done.

 2670 18:01:41.318595  

 2671 18:01:41.321339  Sending DHCP request... done.

 2672 18:01:41.321414  

 2673 18:01:41.327920  Waiting for reply... done.

 2674 18:01:41.327994  

 2675 18:01:41.328062  My ip is 192.168.201.14

 2676 18:01:41.328140  

 2677 18:01:41.331622  The DHCP server ip is 192.168.201.1

 2678 18:01:41.331696  

 2679 18:01:41.338440  TFTP server IP predefined by user: 192.168.201.1

 2680 18:01:41.338792  

 2681 18:01:41.344549  Bootfile predefined by user: 11385824/tftp-deploy-2wij49rg/kernel/bzImage

 2682 18:01:41.344625  

 2683 18:01:41.348068  Sending tftp read request... done.

 2684 18:01:41.348143  

 2685 18:01:41.351530  Waiting for the transfer... 

 2686 18:01:41.351611  

 2687 18:01:41.598644  00000000 ################################################################

 2688 18:01:41.598762  

 2689 18:01:41.841286  00080000 ################################################################

 2690 18:01:41.841424  

 2691 18:01:42.082492  00100000 ################################################################

 2692 18:01:42.082611  

 2693 18:01:42.328192  00180000 ################################################################

 2694 18:01:42.328319  

 2695 18:01:42.574738  00200000 ################################################################

 2696 18:01:42.574850  

 2697 18:01:42.818926  00280000 ################################################################

 2698 18:01:42.819057  

 2699 18:01:43.063592  00300000 ################################################################

 2700 18:01:43.063717  

 2701 18:01:43.305319  00380000 ################################################################

 2702 18:01:43.305442  

 2703 18:01:43.548701  00400000 ################################################################

 2704 18:01:43.548829  

 2705 18:01:43.793925  00480000 ################################################################

 2706 18:01:43.794051  

 2707 18:01:44.036232  00500000 ################################################################

 2708 18:01:44.036352  

 2709 18:01:44.277567  00580000 ################################################################

 2710 18:01:44.277693  

 2711 18:01:44.520416  00600000 ################################################################

 2712 18:01:44.520538  

 2713 18:01:44.762418  00680000 ################################################################

 2714 18:01:44.762565  

 2715 18:01:45.007883  00700000 ################################################################

 2716 18:01:45.008005  

 2717 18:01:45.252615  00780000 ################################################################

 2718 18:01:45.252739  

 2719 18:01:45.496227  00800000 ################################################################

 2720 18:01:45.496359  

 2721 18:01:45.739096  00880000 ################################################################

 2722 18:01:45.739217  

 2723 18:01:45.980879  00900000 ################################################################

 2724 18:01:45.980995  

 2725 18:01:46.221681  00980000 ################################################################

 2726 18:01:46.221819  

 2727 18:01:46.468539  00a00000 ################################################################

 2728 18:01:46.468661  

 2729 18:01:46.684081  00a80000 ######################################################### done.

 2730 18:01:46.684205  

 2731 18:01:46.687406  The bootfile was 11469312 bytes long.

 2732 18:01:46.687478  

 2733 18:01:46.691173  Sending tftp read request... done.

 2734 18:01:46.691246  

 2735 18:01:46.694054  Waiting for the transfer... 

 2736 18:01:46.694111  

 2737 18:01:46.940713  00000000 ################################################################

 2738 18:01:46.940835  

 2739 18:01:47.185610  00080000 ################################################################

 2740 18:01:47.185730  

 2741 18:01:47.433773  00100000 ################################################################

 2742 18:01:47.433926  

 2743 18:01:47.678858  00180000 ################################################################

 2744 18:01:47.678978  

 2745 18:01:47.924557  00200000 ################################################################

 2746 18:01:47.924681  

 2747 18:01:48.172038  00280000 ################################################################

 2748 18:01:48.172155  

 2749 18:01:48.417871  00300000 ################################################################

 2750 18:01:48.417987  

 2751 18:01:48.665573  00380000 ################################################################

 2752 18:01:48.665729  

 2753 18:01:48.913417  00400000 ################################################################

 2754 18:01:48.913553  

 2755 18:01:49.158486  00480000 ################################################################

 2756 18:01:49.158616  

 2757 18:01:49.409163  00500000 ################################################################

 2758 18:01:49.409292  

 2759 18:01:49.660879  00580000 ################################################################

 2760 18:01:49.660997  

 2761 18:01:49.910447  00600000 ################################################################

 2762 18:01:49.910567  

 2763 18:01:50.164752  00680000 ################################################################

 2764 18:01:50.164877  

 2765 18:01:50.415178  00700000 ################################################################

 2766 18:01:50.415300  

 2767 18:01:50.667113  00780000 ################################################################

 2768 18:01:50.667234  

 2769 18:01:50.914179  00800000 ################################################################

 2770 18:01:50.914303  

 2771 18:01:51.059422  00880000 ###################################### done.

 2772 18:01:51.059531  

 2773 18:01:51.062641  Sending tftp read request... done.

 2774 18:01:51.062725  

 2775 18:01:51.065948  Waiting for the transfer... 

 2776 18:01:51.066025  

 2777 18:01:51.066078  00000000 # done.

 2778 18:01:51.069352  

 2779 18:01:51.076168  Command line loaded dynamically from TFTP file: 11385824/tftp-deploy-2wij49rg/kernel/cmdline

 2780 18:01:51.076252  

 2781 18:01:51.092494  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2782 18:01:51.097560  

 2783 18:01:51.101187  Shutting down all USB controllers.

 2784 18:01:51.101270  

 2785 18:01:51.101325  Removing current net device

 2786 18:01:51.101373  

 2787 18:01:51.104121  Finalizing coreboot

 2788 18:01:51.104196  

 2789 18:01:51.110696  Exiting depthcharge with code 4 at timestamp: 22399161

 2790 18:01:51.110770  

 2791 18:01:51.110839  

 2792 18:01:51.110886  Starting kernel ...

 2793 18:01:51.110931  

 2794 18:01:51.110975  

 2795 18:01:51.111306  end: 2.2.4 bootloader-commands (duration 00:00:12) [common]
 2796 18:01:51.111384  start: 2.2.5 auto-login-action (timeout 00:04:29) [common]
 2797 18:01:51.111443  Setting prompt string to ['Linux version [0-9]']
 2798 18:01:51.111496  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2799 18:01:51.111549  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2801 18:06:20.112263  end: 2.2.5 auto-login-action (duration 00:04:29) [common]
 2803 18:06:20.113324  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 269 seconds'
 2805 18:06:20.114082  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2808 18:06:20.115101  end: 2 depthcharge-action (duration 00:05:00) [common]
 2810 18:06:20.115938  Cleaning after the job
 2811 18:06:20.116280  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11385824/tftp-deploy-2wij49rg/ramdisk
 2812 18:06:20.117759  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11385824/tftp-deploy-2wij49rg/kernel
 2813 18:06:20.118911  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11385824/tftp-deploy-2wij49rg/modules
 2814 18:06:20.119318  start: 5.1 power-off (timeout 00:00:30) [common]
 2815 18:06:20.119450  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-1' '--port=1' '--command=off'
 2816 18:06:20.200729  >> Command sent successfully.

 2817 18:06:20.208567  Returned 0 in 0 seconds
 2818 18:06:20.309590  end: 5.1 power-off (duration 00:00:00) [common]
 2820 18:06:20.310774  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2821 18:06:20.311583  Listened to connection for namespace 'common' for up to 1s
 2823 18:06:20.312584  Listened to connection for namespace 'common' for up to 1s
 2824 18:06:21.312498  Finalising connection for namespace 'common'
 2825 18:06:21.313051  Disconnecting from shell: Finalise
 2826 18:06:21.313429  
 2827 18:06:21.414355  end: 5.2 read-feedback (duration 00:00:01) [common]
 2828 18:06:21.414822  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11385824
 2829 18:06:21.428387  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11385824
 2830 18:06:21.428521  JobError: Your job cannot terminate cleanly.