Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Errors: 2
- Kernel Warnings: 0
1 18:01:11.263367 lava-dispatcher, installed at version: 2023.06
2 18:01:11.263584 start: 0 validate
3 18:01:11.263721 Start time: 2023-08-30 18:01:11.263713+00:00 (UTC)
4 18:01:11.263852 Using caching service: 'http://localhost/cache/?uri=%s'
5 18:01:11.264028 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 18:01:11.534786 Using caching service: 'http://localhost/cache/?uri=%s'
7 18:01:11.535566 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.292-cip102-130-g18b864070345b%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 18:01:11.806006 Using caching service: 'http://localhost/cache/?uri=%s'
9 18:01:11.806411 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.292-cip102-130-g18b864070345b%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 18:01:16.338344 validate duration: 5.07
12 18:01:16.338605 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 18:01:16.338702 start: 1.1 download-retry (timeout 00:10:00) [common]
14 18:01:16.338789 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 18:01:16.338914 Not decompressing ramdisk as can be used compressed.
16 18:01:16.339009 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 18:01:16.339105 saving as /var/lib/lava/dispatcher/tmp/11385840/tftp-deploy-xxjolq3l/ramdisk/rootfs.cpio.gz
18 18:01:16.339207 total size: 8418130 (8 MB)
19 18:01:17.001491 progress 0 % (0 MB)
20 18:01:17.015150 progress 5 % (0 MB)
21 18:01:17.026388 progress 10 % (0 MB)
22 18:01:17.033302 progress 15 % (1 MB)
23 18:01:17.038725 progress 20 % (1 MB)
24 18:01:17.043023 progress 25 % (2 MB)
25 18:01:17.046937 progress 30 % (2 MB)
26 18:01:17.050027 progress 35 % (2 MB)
27 18:01:17.053218 progress 40 % (3 MB)
28 18:01:17.056281 progress 45 % (3 MB)
29 18:01:17.058959 progress 50 % (4 MB)
30 18:01:17.061535 progress 55 % (4 MB)
31 18:01:17.063931 progress 60 % (4 MB)
32 18:01:17.066140 progress 65 % (5 MB)
33 18:01:17.068554 progress 70 % (5 MB)
34 18:01:17.070826 progress 75 % (6 MB)
35 18:01:17.073219 progress 80 % (6 MB)
36 18:01:17.075664 progress 85 % (6 MB)
37 18:01:17.078015 progress 90 % (7 MB)
38 18:01:17.080370 progress 95 % (7 MB)
39 18:01:17.082525 progress 100 % (8 MB)
40 18:01:17.082786 8 MB downloaded in 0.74 s (10.80 MB/s)
41 18:01:17.082992 end: 1.1.1 http-download (duration 00:00:01) [common]
43 18:01:17.083354 end: 1.1 download-retry (duration 00:00:01) [common]
44 18:01:17.083456 start: 1.2 download-retry (timeout 00:09:59) [common]
45 18:01:17.083578 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 18:01:17.083758 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.292-cip102-130-g18b864070345b/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 18:01:17.083854 saving as /var/lib/lava/dispatcher/tmp/11385840/tftp-deploy-xxjolq3l/kernel/bzImage
48 18:01:17.083945 total size: 11469312 (10 MB)
49 18:01:17.084009 No compression specified
50 18:01:17.085360 progress 0 % (0 MB)
51 18:01:17.088562 progress 5 % (0 MB)
52 18:01:17.091860 progress 10 % (1 MB)
53 18:01:17.094904 progress 15 % (1 MB)
54 18:01:17.098176 progress 20 % (2 MB)
55 18:01:17.101355 progress 25 % (2 MB)
56 18:01:17.104737 progress 30 % (3 MB)
57 18:01:17.107834 progress 35 % (3 MB)
58 18:01:17.111168 progress 40 % (4 MB)
59 18:01:17.114280 progress 45 % (4 MB)
60 18:01:17.117649 progress 50 % (5 MB)
61 18:01:17.120869 progress 55 % (6 MB)
62 18:01:17.124200 progress 60 % (6 MB)
63 18:01:17.127464 progress 65 % (7 MB)
64 18:01:17.130838 progress 70 % (7 MB)
65 18:01:17.134068 progress 75 % (8 MB)
66 18:01:17.137583 progress 80 % (8 MB)
67 18:01:17.140645 progress 85 % (9 MB)
68 18:01:17.143986 progress 90 % (9 MB)
69 18:01:17.147060 progress 95 % (10 MB)
70 18:01:17.150377 progress 100 % (10 MB)
71 18:01:17.150575 10 MB downloaded in 0.07 s (164.18 MB/s)
72 18:01:17.150801 end: 1.2.1 http-download (duration 00:00:00) [common]
74 18:01:17.151278 end: 1.2 download-retry (duration 00:00:00) [common]
75 18:01:17.151380 start: 1.3 download-retry (timeout 00:09:59) [common]
76 18:01:17.151467 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 18:01:17.151620 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.292-cip102-130-g18b864070345b/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 18:01:17.151753 saving as /var/lib/lava/dispatcher/tmp/11385840/tftp-deploy-xxjolq3l/modules/modules.tar
79 18:01:17.151862 total size: 484136 (0 MB)
80 18:01:17.151966 Using unxz to decompress xz
81 18:01:17.156835 progress 6 % (0 MB)
82 18:01:17.157321 progress 13 % (0 MB)
83 18:01:17.157658 progress 20 % (0 MB)
84 18:01:17.159253 progress 27 % (0 MB)
85 18:01:17.161628 progress 33 % (0 MB)
86 18:01:17.164062 progress 40 % (0 MB)
87 18:01:17.167131 progress 47 % (0 MB)
88 18:01:17.169477 progress 54 % (0 MB)
89 18:01:17.172719 progress 60 % (0 MB)
90 18:01:17.176525 progress 67 % (0 MB)
91 18:01:17.179523 progress 74 % (0 MB)
92 18:01:17.198776 progress 81 % (0 MB)
93 18:01:17.201235 progress 87 % (0 MB)
94 18:01:17.203087 progress 94 % (0 MB)
95 18:01:17.205609 progress 100 % (0 MB)
96 18:01:17.212599 0 MB downloaded in 0.06 s (7.60 MB/s)
97 18:01:17.212840 end: 1.3.1 http-download (duration 00:00:00) [common]
99 18:01:17.213101 end: 1.3 download-retry (duration 00:00:00) [common]
100 18:01:17.213194 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
101 18:01:17.213288 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
102 18:01:17.213369 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 18:01:17.213451 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
104 18:01:17.213675 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11385840/lava-overlay-vzo6ke1b
105 18:01:17.213820 makedir: /var/lib/lava/dispatcher/tmp/11385840/lava-overlay-vzo6ke1b/lava-11385840/bin
106 18:01:17.213931 makedir: /var/lib/lava/dispatcher/tmp/11385840/lava-overlay-vzo6ke1b/lava-11385840/tests
107 18:01:17.214034 makedir: /var/lib/lava/dispatcher/tmp/11385840/lava-overlay-vzo6ke1b/lava-11385840/results
108 18:01:17.214152 Creating /var/lib/lava/dispatcher/tmp/11385840/lava-overlay-vzo6ke1b/lava-11385840/bin/lava-add-keys
109 18:01:17.214306 Creating /var/lib/lava/dispatcher/tmp/11385840/lava-overlay-vzo6ke1b/lava-11385840/bin/lava-add-sources
110 18:01:17.214440 Creating /var/lib/lava/dispatcher/tmp/11385840/lava-overlay-vzo6ke1b/lava-11385840/bin/lava-background-process-start
111 18:01:17.214572 Creating /var/lib/lava/dispatcher/tmp/11385840/lava-overlay-vzo6ke1b/lava-11385840/bin/lava-background-process-stop
112 18:01:17.214702 Creating /var/lib/lava/dispatcher/tmp/11385840/lava-overlay-vzo6ke1b/lava-11385840/bin/lava-common-functions
113 18:01:17.214829 Creating /var/lib/lava/dispatcher/tmp/11385840/lava-overlay-vzo6ke1b/lava-11385840/bin/lava-echo-ipv4
114 18:01:17.214956 Creating /var/lib/lava/dispatcher/tmp/11385840/lava-overlay-vzo6ke1b/lava-11385840/bin/lava-install-packages
115 18:01:17.215081 Creating /var/lib/lava/dispatcher/tmp/11385840/lava-overlay-vzo6ke1b/lava-11385840/bin/lava-installed-packages
116 18:01:17.215207 Creating /var/lib/lava/dispatcher/tmp/11385840/lava-overlay-vzo6ke1b/lava-11385840/bin/lava-os-build
117 18:01:17.215333 Creating /var/lib/lava/dispatcher/tmp/11385840/lava-overlay-vzo6ke1b/lava-11385840/bin/lava-probe-channel
118 18:01:17.215465 Creating /var/lib/lava/dispatcher/tmp/11385840/lava-overlay-vzo6ke1b/lava-11385840/bin/lava-probe-ip
119 18:01:17.215589 Creating /var/lib/lava/dispatcher/tmp/11385840/lava-overlay-vzo6ke1b/lava-11385840/bin/lava-target-ip
120 18:01:17.215714 Creating /var/lib/lava/dispatcher/tmp/11385840/lava-overlay-vzo6ke1b/lava-11385840/bin/lava-target-mac
121 18:01:17.215842 Creating /var/lib/lava/dispatcher/tmp/11385840/lava-overlay-vzo6ke1b/lava-11385840/bin/lava-target-storage
122 18:01:17.215983 Creating /var/lib/lava/dispatcher/tmp/11385840/lava-overlay-vzo6ke1b/lava-11385840/bin/lava-test-case
123 18:01:17.216111 Creating /var/lib/lava/dispatcher/tmp/11385840/lava-overlay-vzo6ke1b/lava-11385840/bin/lava-test-event
124 18:01:17.216235 Creating /var/lib/lava/dispatcher/tmp/11385840/lava-overlay-vzo6ke1b/lava-11385840/bin/lava-test-feedback
125 18:01:17.216362 Creating /var/lib/lava/dispatcher/tmp/11385840/lava-overlay-vzo6ke1b/lava-11385840/bin/lava-test-raise
126 18:01:17.216486 Creating /var/lib/lava/dispatcher/tmp/11385840/lava-overlay-vzo6ke1b/lava-11385840/bin/lava-test-reference
127 18:01:17.216614 Creating /var/lib/lava/dispatcher/tmp/11385840/lava-overlay-vzo6ke1b/lava-11385840/bin/lava-test-runner
128 18:01:17.216738 Creating /var/lib/lava/dispatcher/tmp/11385840/lava-overlay-vzo6ke1b/lava-11385840/bin/lava-test-set
129 18:01:17.216866 Creating /var/lib/lava/dispatcher/tmp/11385840/lava-overlay-vzo6ke1b/lava-11385840/bin/lava-test-shell
130 18:01:17.216994 Updating /var/lib/lava/dispatcher/tmp/11385840/lava-overlay-vzo6ke1b/lava-11385840/bin/lava-install-packages (oe)
131 18:01:17.217146 Updating /var/lib/lava/dispatcher/tmp/11385840/lava-overlay-vzo6ke1b/lava-11385840/bin/lava-installed-packages (oe)
132 18:01:17.217269 Creating /var/lib/lava/dispatcher/tmp/11385840/lava-overlay-vzo6ke1b/lava-11385840/environment
133 18:01:17.217372 LAVA metadata
134 18:01:17.217448 - LAVA_JOB_ID=11385840
135 18:01:17.217514 - LAVA_DISPATCHER_IP=192.168.201.1
136 18:01:17.217617 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
137 18:01:17.217683 skipped lava-vland-overlay
138 18:01:17.217762 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 18:01:17.217840 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
140 18:01:17.217901 skipped lava-multinode-overlay
141 18:01:17.217973 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 18:01:17.218052 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
143 18:01:17.218124 Loading test definitions
144 18:01:17.218214 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
145 18:01:17.218288 Using /lava-11385840 at stage 0
146 18:01:17.218615 uuid=11385840_1.4.2.3.1 testdef=None
147 18:01:17.218703 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 18:01:17.218790 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
149 18:01:17.219508 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 18:01:17.219853 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
152 18:01:17.220827 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 18:01:17.221093 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
155 18:01:17.251010 runner path: /var/lib/lava/dispatcher/tmp/11385840/lava-overlay-vzo6ke1b/lava-11385840/0/tests/0_dmesg test_uuid 11385840_1.4.2.3.1
156 18:01:17.254841 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 18:01:17.256523 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
159 18:01:17.256946 Using /lava-11385840 at stage 1
160 18:01:17.259157 uuid=11385840_1.4.2.3.5 testdef=None
161 18:01:17.259713 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 18:01:17.260429 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
163 18:01:17.263953 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 18:01:17.265284 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
166 18:01:17.269795 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 18:01:17.271762 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
169 18:01:17.276636 runner path: /var/lib/lava/dispatcher/tmp/11385840/lava-overlay-vzo6ke1b/lava-11385840/1/tests/1_bootrr test_uuid 11385840_1.4.2.3.5
170 18:01:17.277454 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 18:01:17.278331 Creating lava-test-runner.conf files
173 18:01:17.278579 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11385840/lava-overlay-vzo6ke1b/lava-11385840/0 for stage 0
174 18:01:17.278966 - 0_dmesg
175 18:01:17.279453 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11385840/lava-overlay-vzo6ke1b/lava-11385840/1 for stage 1
176 18:01:17.279963 - 1_bootrr
177 18:01:17.280481 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 18:01:17.280909 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
179 18:01:17.300250 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 18:01:17.300473 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
181 18:01:17.300615 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 18:01:17.300751 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 18:01:17.300902 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
184 18:01:17.568734 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 18:01:17.569150 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
186 18:01:17.569270 extracting modules file /var/lib/lava/dispatcher/tmp/11385840/tftp-deploy-xxjolq3l/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11385840/extract-overlay-ramdisk-mvh31rhv/ramdisk
187 18:01:17.591576 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 18:01:17.591734 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
189 18:01:17.591829 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11385840/compress-overlay-czlp1pni/overlay-1.4.2.4.tar.gz to ramdisk
190 18:01:17.591925 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11385840/compress-overlay-czlp1pni/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11385840/extract-overlay-ramdisk-mvh31rhv/ramdisk
191 18:01:17.601036 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 18:01:17.601213 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
193 18:01:17.601354 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 18:01:17.601489 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
195 18:01:17.601609 Building ramdisk /var/lib/lava/dispatcher/tmp/11385840/extract-overlay-ramdisk-mvh31rhv/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11385840/extract-overlay-ramdisk-mvh31rhv/ramdisk
196 18:01:17.779125 >> 53981 blocks
197 18:01:18.787000 rename /var/lib/lava/dispatcher/tmp/11385840/extract-overlay-ramdisk-mvh31rhv/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11385840/tftp-deploy-xxjolq3l/ramdisk/ramdisk.cpio.gz
198 18:01:18.787463 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 18:01:18.787594 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 18:01:18.787701 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 18:01:18.787804 No mkimage arch provided, not using FIT.
202 18:01:18.787897 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 18:01:18.788004 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 18:01:18.788111 end: 1.4 prepare-tftp-overlay (duration 00:00:02) [common]
205 18:01:18.788210 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 18:01:18.788292 No LXC device requested
207 18:01:18.788373 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 18:01:18.788464 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 18:01:18.788549 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 18:01:18.788647 Checking files for TFTP limit of 4294967296 bytes.
211 18:01:18.789222 end: 1 tftp-deploy (duration 00:00:02) [common]
212 18:01:18.789330 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 18:01:18.789425 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 18:01:18.789551 substitutions:
215 18:01:18.789621 - {DTB}: None
216 18:01:18.789685 - {INITRD}: 11385840/tftp-deploy-xxjolq3l/ramdisk/ramdisk.cpio.gz
217 18:01:18.789745 - {KERNEL}: 11385840/tftp-deploy-xxjolq3l/kernel/bzImage
218 18:01:18.789820 - {LAVA_MAC}: None
219 18:01:18.789895 - {PRESEED_CONFIG}: None
220 18:01:18.789989 - {PRESEED_LOCAL}: None
221 18:01:18.790098 - {RAMDISK}: 11385840/tftp-deploy-xxjolq3l/ramdisk/ramdisk.cpio.gz
222 18:01:18.790196 - {ROOT_PART}: None
223 18:01:18.790296 - {ROOT}: None
224 18:01:18.790398 - {SERVER_IP}: 192.168.201.1
225 18:01:18.790498 - {TEE}: None
226 18:01:18.790601 Parsed boot commands:
227 18:01:18.790706 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 18:01:18.791003 Parsed boot commands: tftpboot 192.168.201.1 11385840/tftp-deploy-xxjolq3l/kernel/bzImage 11385840/tftp-deploy-xxjolq3l/kernel/cmdline 11385840/tftp-deploy-xxjolq3l/ramdisk/ramdisk.cpio.gz
229 18:01:18.791142 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 18:01:18.791235 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 18:01:18.791340 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 18:01:18.791427 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 18:01:18.791500 Not connected, no need to disconnect.
234 18:01:18.791577 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 18:01:18.791667 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 18:01:18.791735 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-5'
237 18:01:18.795948 Setting prompt string to ['lava-test: # ']
238 18:01:18.796380 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 18:01:18.796502 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 18:01:18.796602 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 18:01:18.796695 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 18:01:18.796914 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-5' '--port=1' '--command=reboot'
243 18:01:23.940723 >> Command sent successfully.
244 18:01:23.945026 Returned 0 in 5 seconds
245 18:01:24.045885 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 18:01:24.047999 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 18:01:24.048535 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 18:01:24.048998 Setting prompt string to 'Starting depthcharge on Voema...'
250 18:01:24.049331 Changing prompt to 'Starting depthcharge on Voema...'
251 18:01:24.049679 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
252 18:01:24.050992 [Enter `^Ec?' for help]
253 18:01:25.647112
254 18:01:25.647345
255 18:01:25.657472 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
256 18:01:25.660363 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
257 18:01:25.666708 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
258 18:01:25.670029 CPU: AES supported, TXT NOT supported, VT supported
259 18:01:25.677011 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
260 18:01:25.679980 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
261 18:01:25.686812 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
262 18:01:25.690241 VBOOT: Loading verstage.
263 18:01:25.693224 FMAP: Found "FLASH" version 1.1 at 0x1804000.
264 18:01:25.700011 FMAP: base = 0x0 size = 0x2000000 #areas = 32
265 18:01:25.703602 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
266 18:01:25.713964 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
267 18:01:25.720482 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
268 18:01:25.720684
269 18:01:25.720837
270 18:01:25.733775 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
271 18:01:25.747368 Probing TPM: . done!
272 18:01:25.750717 TPM ready after 0 ms
273 18:01:25.753917 Connected to device vid:did:rid of 1ae0:0028:00
274 18:01:25.765366 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
275 18:01:25.771949 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
276 18:01:25.775466 Initialized TPM device CR50 revision 0
277 18:01:25.826386 tlcl_send_startup: Startup return code is 0
278 18:01:25.826849 TPM: setup succeeded
279 18:01:25.840192 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
280 18:01:25.854414 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
281 18:01:25.866966 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
282 18:01:25.877128 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
283 18:01:25.880960 Chrome EC: UHEPI supported
284 18:01:25.884565 Phase 1
285 18:01:25.887622 FMAP: area GBB found @ 1805000 (458752 bytes)
286 18:01:25.894357 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
287 18:01:25.904596 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
288 18:01:25.910850 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
289 18:01:25.917916 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
290 18:01:25.921089 Recovery requested (1009000e)
291 18:01:25.924515 TPM: Extending digest for VBOOT: boot mode into PCR 0
292 18:01:25.936181 tlcl_extend: response is 0
293 18:01:25.942794 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
294 18:01:25.952319 tlcl_extend: response is 0
295 18:01:25.958971 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
296 18:01:25.965406 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
297 18:01:25.972146 BS: verstage times (exec / console): total (unknown) / 142 ms
298 18:01:25.972596
299 18:01:25.972932
300 18:01:25.985362 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
301 18:01:25.988994 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
302 18:01:25.996263 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
303 18:01:25.999786 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
304 18:01:26.002970 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
305 18:01:26.010005 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
306 18:01:26.012969 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
307 18:01:26.016822 TCO_STS: 0000 0000
308 18:01:26.019610 GEN_PMCON: d0015038 00002200
309 18:01:26.020061 GBLRST_CAUSE: 00000000 00000000
310 18:01:26.023424 HPR_CAUSE0: 00000000
311 18:01:26.026341 prev_sleep_state 5
312 18:01:26.029705 Boot Count incremented to 22548
313 18:01:26.036549 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
314 18:01:26.043805 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
315 18:01:26.050089 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
316 18:01:26.056770 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
317 18:01:26.059793 Chrome EC: UHEPI supported
318 18:01:26.066917 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
319 18:01:26.079139 Probing TPM: done!
320 18:01:26.087679 Connected to device vid:did:rid of 1ae0:0028:00
321 18:01:26.095027 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
322 18:01:26.104172 Initialized TPM device CR50 revision 0
323 18:01:26.114640 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
324 18:01:26.120705 MRC: Hash idx 0x100b comparison successful.
325 18:01:26.124269 MRC cache found, size faa8
326 18:01:26.124736 bootmode is set to: 2
327 18:01:26.127482 SPD index = 0
328 18:01:26.134155 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
329 18:01:26.137832 SPD: module type is LPDDR4X
330 18:01:26.141371 SPD: module part number is MT53E512M64D4NW-046
331 18:01:26.147837 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
332 18:01:26.150820 SPD: device width 16 bits, bus width 16 bits
333 18:01:26.157609 SPD: module size is 1024 MB (per channel)
334 18:01:26.591263 CBMEM:
335 18:01:26.594774 IMD: root @ 0x76fff000 254 entries.
336 18:01:26.598454 IMD: root @ 0x76ffec00 62 entries.
337 18:01:26.601597 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
338 18:01:26.608215 FMAP: area RW_VPD found @ f35000 (8192 bytes)
339 18:01:26.611757 External stage cache:
340 18:01:26.614774 IMD: root @ 0x7b3ff000 254 entries.
341 18:01:26.618279 IMD: root @ 0x7b3fec00 62 entries.
342 18:01:26.633632 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
343 18:01:26.640199 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
344 18:01:26.646555 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
345 18:01:26.660851 MRC: 'RECOVERY_MRC_CACHE' does not need update.
346 18:01:26.664646 cse_lite: Skip switching to RW in the recovery path
347 18:01:26.668248 8 DIMMs found
348 18:01:26.668925 SMM Memory Map
349 18:01:26.671780 SMRAM : 0x7b000000 0x800000
350 18:01:26.674918 Subregion 0: 0x7b000000 0x200000
351 18:01:26.678454 Subregion 1: 0x7b200000 0x200000
352 18:01:26.681413 Subregion 2: 0x7b400000 0x400000
353 18:01:26.685158 top_of_ram = 0x77000000
354 18:01:26.691651 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
355 18:01:26.694815 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
356 18:01:26.701584 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
357 18:01:26.704582 MTRR Range: Start=ff000000 End=0 (Size 1000000)
358 18:01:26.711384 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
359 18:01:26.717990 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
360 18:01:26.730161 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
361 18:01:26.736884 Processing 211 relocs. Offset value of 0x74c0b000
362 18:01:26.743638 BS: romstage times (exec / console): total (unknown) / 277 ms
363 18:01:26.749423
364 18:01:26.749982
365 18:01:26.759346 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
366 18:01:26.762866 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
367 18:01:26.772910 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
368 18:01:26.779503 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
369 18:01:26.786496 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
370 18:01:26.793052 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
371 18:01:26.840120 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
372 18:01:26.846113 Processing 5008 relocs. Offset value of 0x75d98000
373 18:01:26.849858 BS: postcar times (exec / console): total (unknown) / 59 ms
374 18:01:26.852959
375 18:01:26.853397
376 18:01:26.863250 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
377 18:01:26.863712 Normal boot
378 18:01:26.866413 FW_CONFIG value is 0x804c02
379 18:01:26.870154 PCI: 00:07.0 disabled by fw_config
380 18:01:26.873066 PCI: 00:07.1 disabled by fw_config
381 18:01:26.876794 PCI: 00:0d.2 disabled by fw_config
382 18:01:26.879996 PCI: 00:1c.7 disabled by fw_config
383 18:01:26.886583 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
384 18:01:26.893332 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
385 18:01:26.896343 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
386 18:01:26.899467 GENERIC: 0.0 disabled by fw_config
387 18:01:26.902949 GENERIC: 1.0 disabled by fw_config
388 18:01:26.909565 fw_config match found: DB_USB=USB3_ACTIVE
389 18:01:26.912925 fw_config match found: DB_USB=USB3_ACTIVE
390 18:01:26.916466 fw_config match found: DB_USB=USB3_ACTIVE
391 18:01:26.919624 fw_config match found: DB_USB=USB3_ACTIVE
392 18:01:26.926155 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
393 18:01:26.932962 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
394 18:01:26.939505 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
395 18:01:26.949933 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
396 18:01:26.953091 microcode: sig=0x806c1 pf=0x80 revision=0x86
397 18:01:26.960201 microcode: Update skipped, already up-to-date
398 18:01:26.966539 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
399 18:01:26.992813 Detected 4 core, 8 thread CPU.
400 18:01:26.996268 Setting up SMI for CPU
401 18:01:26.999246 IED base = 0x7b400000
402 18:01:26.999335 IED size = 0x00400000
403 18:01:27.003028 Will perform SMM setup.
404 18:01:27.009459 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
405 18:01:27.016134 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
406 18:01:27.022954 Processing 16 relocs. Offset value of 0x00030000
407 18:01:27.026268 Attempting to start 7 APs
408 18:01:27.029991 Waiting for 10ms after sending INIT.
409 18:01:27.045708 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
410 18:01:27.046230 done.
411 18:01:27.048643 AP: slot 7 apic_id 7.
412 18:01:27.051953 AP: slot 3 apic_id 6.
413 18:01:27.052381 AP: slot 2 apic_id 3.
414 18:01:27.055534 AP: slot 6 apic_id 2.
415 18:01:27.058875 AP: slot 5 apic_id 4.
416 18:01:27.059297 AP: slot 4 apic_id 5.
417 18:01:27.065099 Waiting for 2nd SIPI to complete...done.
418 18:01:27.072010 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
419 18:01:27.078656 Processing 13 relocs. Offset value of 0x00038000
420 18:01:27.079079 Unable to locate Global NVS
421 18:01:27.088942 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
422 18:01:27.091894 Installing permanent SMM handler to 0x7b000000
423 18:01:27.099153 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
424 18:01:27.105425 Processing 794 relocs. Offset value of 0x7b010000
425 18:01:27.111956 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
426 18:01:27.118942 Processing 13 relocs. Offset value of 0x7b008000
427 18:01:27.125528 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
428 18:01:27.128852 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
429 18:01:27.135423 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
430 18:01:27.142129 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
431 18:01:27.148384 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
432 18:01:27.155350 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
433 18:01:27.158714 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
434 18:01:27.162064 Unable to locate Global NVS
435 18:01:27.168820 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
436 18:01:27.173015 Clearing SMI status registers
437 18:01:27.176016 SMI_STS: PM1
438 18:01:27.176523 PM1_STS: PWRBTN
439 18:01:27.186602 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
440 18:01:27.189589 In relocation handler: CPU 0
441 18:01:27.193143 New SMBASE=0x7b000000 IEDBASE=0x7b400000
442 18:01:27.196462 Writing SMRR. base = 0x7b000006, mask=0xff800c00
443 18:01:27.199981 Relocation complete.
444 18:01:27.206415 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
445 18:01:27.209782 In relocation handler: CPU 1
446 18:01:27.213039 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
447 18:01:27.216004 Relocation complete.
448 18:01:27.222960 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
449 18:01:27.225939 In relocation handler: CPU 2
450 18:01:27.229713 New SMBASE=0x7afff800 IEDBASE=0x7b400000
451 18:01:27.232906 Relocation complete.
452 18:01:27.239656 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
453 18:01:27.242773 In relocation handler: CPU 6
454 18:01:27.245924 New SMBASE=0x7affe800 IEDBASE=0x7b400000
455 18:01:27.252768 Writing SMRR. base = 0x7b000006, mask=0xff800c00
456 18:01:27.253186 Relocation complete.
457 18:01:27.259491 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
458 18:01:27.262570 In relocation handler: CPU 7
459 18:01:27.269632 New SMBASE=0x7affe400 IEDBASE=0x7b400000
460 18:01:27.270229 Relocation complete.
461 18:01:27.275867 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
462 18:01:27.279543 In relocation handler: CPU 3
463 18:01:27.285898 New SMBASE=0x7afff400 IEDBASE=0x7b400000
464 18:01:27.289476 Writing SMRR. base = 0x7b000006, mask=0xff800c00
465 18:01:27.292472 Relocation complete.
466 18:01:27.299249 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
467 18:01:27.302311 In relocation handler: CPU 5
468 18:01:27.305445 New SMBASE=0x7affec00 IEDBASE=0x7b400000
469 18:01:27.308634 Writing SMRR. base = 0x7b000006, mask=0xff800c00
470 18:01:27.312290 Relocation complete.
471 18:01:27.318653 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
472 18:01:27.322057 In relocation handler: CPU 4
473 18:01:27.325388 New SMBASE=0x7afff000 IEDBASE=0x7b400000
474 18:01:27.329497 Relocation complete.
475 18:01:27.329633 Initializing CPU #0
476 18:01:27.333684 CPU: vendor Intel device 806c1
477 18:01:27.337457 CPU: family 06, model 8c, stepping 01
478 18:01:27.340828 Clearing out pending MCEs
479 18:01:27.343656 Setting up local APIC...
480 18:01:27.347284 apic_id: 0x00 done.
481 18:01:27.347519 Turbo is available but hidden
482 18:01:27.350639 Turbo is available and visible
483 18:01:27.357308 microcode: Update skipped, already up-to-date
484 18:01:27.357539 CPU #0 initialized
485 18:01:27.360482 Initializing CPU #5
486 18:01:27.363928 Initializing CPU #4
487 18:01:27.367063 CPU: vendor Intel device 806c1
488 18:01:27.370685 CPU: family 06, model 8c, stepping 01
489 18:01:27.373928 CPU: vendor Intel device 806c1
490 18:01:27.377372 CPU: family 06, model 8c, stepping 01
491 18:01:27.380608 Clearing out pending MCEs
492 18:01:27.381202 Clearing out pending MCEs
493 18:01:27.384189 Setting up local APIC...
494 18:01:27.387551 Initializing CPU #6
495 18:01:27.388194 Initializing CPU #2
496 18:01:27.390964 CPU: vendor Intel device 806c1
497 18:01:27.394454 CPU: family 06, model 8c, stepping 01
498 18:01:27.397474 Initializing CPU #1
499 18:01:27.401004 Clearing out pending MCEs
500 18:01:27.404235 CPU: vendor Intel device 806c1
501 18:01:27.407691 CPU: family 06, model 8c, stepping 01
502 18:01:27.410669 Setting up local APIC...
503 18:01:27.411260 Initializing CPU #3
504 18:01:27.414291 Initializing CPU #7
505 18:01:27.417416 CPU: vendor Intel device 806c1
506 18:01:27.421117 CPU: family 06, model 8c, stepping 01
507 18:01:27.423815 Setting up local APIC...
508 18:01:27.427339 Clearing out pending MCEs
509 18:01:27.430580 CPU: vendor Intel device 806c1
510 18:01:27.434067 CPU: family 06, model 8c, stepping 01
511 18:01:27.434663 Setting up local APIC...
512 18:01:27.437291 apic_id: 0x04 done.
513 18:01:27.440615 CPU: vendor Intel device 806c1
514 18:01:27.444081 CPU: family 06, model 8c, stepping 01
515 18:01:27.447048 Clearing out pending MCEs
516 18:01:27.450654 apic_id: 0x02 done.
517 18:01:27.451229 Setting up local APIC...
518 18:01:27.453663 Clearing out pending MCEs
519 18:01:27.457137 apic_id: 0x06 done.
520 18:01:27.460417 Setting up local APIC...
521 18:01:27.463860 microcode: Update skipped, already up-to-date
522 18:01:27.467102 apic_id: 0x03 done.
523 18:01:27.467686 CPU #6 initialized
524 18:01:27.474150 microcode: Update skipped, already up-to-date
525 18:01:27.474717 Clearing out pending MCEs
526 18:01:27.477280 CPU #2 initialized
527 18:01:27.480405 Setting up local APIC...
528 18:01:27.483823 microcode: Update skipped, already up-to-date
529 18:01:27.487535 apic_id: 0x07 done.
530 18:01:27.488169 CPU #3 initialized
531 18:01:27.494021 microcode: Update skipped, already up-to-date
532 18:01:27.494568 apic_id: 0x05 done.
533 18:01:27.500421 microcode: Update skipped, already up-to-date
534 18:01:27.504124 microcode: Update skipped, already up-to-date
535 18:01:27.507108 CPU #5 initialized
536 18:01:27.507599 CPU #4 initialized
537 18:01:27.510673 CPU #7 initialized
538 18:01:27.514188 apic_id: 0x01 done.
539 18:01:27.517193 microcode: Update skipped, already up-to-date
540 18:01:27.520684 CPU #1 initialized
541 18:01:27.524190 bsp_do_flight_plan done after 455 msecs.
542 18:01:27.527052 CPU: frequency set to 4000 MHz
543 18:01:27.527589 Enabling SMIs.
544 18:01:27.533800 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
545 18:01:27.550303 SATAXPCIE1 indicates PCIe NVMe is present
546 18:01:27.553362 Probing TPM: done!
547 18:01:27.556952 Connected to device vid:did:rid of 1ae0:0028:00
548 18:01:27.567168 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
549 18:01:27.570722 Initialized TPM device CR50 revision 0
550 18:01:27.574199 Enabling S0i3.4
551 18:01:27.580813 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
552 18:01:27.583878 Found a VBT of 8704 bytes after decompression
553 18:01:27.590737 cse_lite: CSE RO boot. HybridStorageMode disabled
554 18:01:27.597182 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
555 18:01:27.673066 FSPS returned 0
556 18:01:27.676007 Executing Phase 1 of FspMultiPhaseSiInit
557 18:01:27.686078 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
558 18:01:27.689398 port C0 DISC req: usage 1 usb3 1 usb2 5
559 18:01:27.692910 Raw Buffer output 0 00000511
560 18:01:27.695895 Raw Buffer output 1 00000000
561 18:01:27.699592 pmc_send_ipc_cmd succeeded
562 18:01:27.706042 port C1 DISC req: usage 1 usb3 2 usb2 3
563 18:01:27.706127 Raw Buffer output 0 00000321
564 18:01:27.709421 Raw Buffer output 1 00000000
565 18:01:27.713585 pmc_send_ipc_cmd succeeded
566 18:01:27.719103 Detected 4 core, 8 thread CPU.
567 18:01:27.722238 Detected 4 core, 8 thread CPU.
568 18:01:27.956315 Display FSP Version Info HOB
569 18:01:27.959796 Reference Code - CPU = a.0.4c.31
570 18:01:27.963004 uCode Version = 0.0.0.86
571 18:01:27.966781 TXT ACM version = ff.ff.ff.ffff
572 18:01:27.969727 Reference Code - ME = a.0.4c.31
573 18:01:27.973439 MEBx version = 0.0.0.0
574 18:01:27.976319 ME Firmware Version = Consumer SKU
575 18:01:27.979726 Reference Code - PCH = a.0.4c.31
576 18:01:27.983355 PCH-CRID Status = Disabled
577 18:01:27.986125 PCH-CRID Original Value = ff.ff.ff.ffff
578 18:01:27.989807 PCH-CRID New Value = ff.ff.ff.ffff
579 18:01:27.992815 OPROM - RST - RAID = ff.ff.ff.ffff
580 18:01:27.996542 PCH Hsio Version = 4.0.0.0
581 18:01:27.999641 Reference Code - SA - System Agent = a.0.4c.31
582 18:01:28.003080 Reference Code - MRC = 2.0.0.1
583 18:01:28.006093 SA - PCIe Version = a.0.4c.31
584 18:01:28.009836 SA-CRID Status = Disabled
585 18:01:28.013285 SA-CRID Original Value = 0.0.0.1
586 18:01:28.016053 SA-CRID New Value = 0.0.0.1
587 18:01:28.019684 OPROM - VBIOS = ff.ff.ff.ffff
588 18:01:28.023314 IO Manageability Engine FW Version = 11.1.4.0
589 18:01:28.026329 PHY Build Version = 0.0.0.e0
590 18:01:28.029493 Thunderbolt(TM) FW Version = 0.0.0.0
591 18:01:28.036243 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
592 18:01:28.039724 ITSS IRQ Polarities Before:
593 18:01:28.039833 IPC0: 0xffffffff
594 18:01:28.043083 IPC1: 0xffffffff
595 18:01:28.043197 IPC2: 0xffffffff
596 18:01:28.046156 IPC3: 0xffffffff
597 18:01:28.049939 ITSS IRQ Polarities After:
598 18:01:28.050047 IPC0: 0xffffffff
599 18:01:28.053654 IPC1: 0xffffffff
600 18:01:28.053756 IPC2: 0xffffffff
601 18:01:28.056233 IPC3: 0xffffffff
602 18:01:28.059649 Found PCIe Root Port #9 at PCI: 00:1d.0.
603 18:01:28.073110 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
604 18:01:28.082830 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
605 18:01:28.096776 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
606 18:01:28.103005 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
607 18:01:28.103089 Enumerating buses...
608 18:01:28.109778 Show all devs... Before device enumeration.
609 18:01:28.109886 Root Device: enabled 1
610 18:01:28.113455 DOMAIN: 0000: enabled 1
611 18:01:28.116936 CPU_CLUSTER: 0: enabled 1
612 18:01:28.117015 PCI: 00:00.0: enabled 1
613 18:01:28.119973 PCI: 00:02.0: enabled 1
614 18:01:28.123410 PCI: 00:04.0: enabled 1
615 18:01:28.126717 PCI: 00:05.0: enabled 1
616 18:01:28.126827 PCI: 00:06.0: enabled 0
617 18:01:28.130126 PCI: 00:07.0: enabled 0
618 18:01:28.133226 PCI: 00:07.1: enabled 0
619 18:01:28.136807 PCI: 00:07.2: enabled 0
620 18:01:28.136915 PCI: 00:07.3: enabled 0
621 18:01:28.139997 PCI: 00:08.0: enabled 1
622 18:01:28.143182 PCI: 00:09.0: enabled 0
623 18:01:28.146618 PCI: 00:0a.0: enabled 0
624 18:01:28.146728 PCI: 00:0d.0: enabled 1
625 18:01:28.150076 PCI: 00:0d.1: enabled 0
626 18:01:28.153222 PCI: 00:0d.2: enabled 0
627 18:01:28.153324 PCI: 00:0d.3: enabled 0
628 18:01:28.156786 PCI: 00:0e.0: enabled 0
629 18:01:28.160398 PCI: 00:10.2: enabled 1
630 18:01:28.163245 PCI: 00:10.6: enabled 0
631 18:01:28.163350 PCI: 00:10.7: enabled 0
632 18:01:28.167114 PCI: 00:12.0: enabled 0
633 18:01:28.170071 PCI: 00:12.6: enabled 0
634 18:01:28.173426 PCI: 00:13.0: enabled 0
635 18:01:28.173535 PCI: 00:14.0: enabled 1
636 18:01:28.176664 PCI: 00:14.1: enabled 0
637 18:01:28.179776 PCI: 00:14.2: enabled 1
638 18:01:28.183129 PCI: 00:14.3: enabled 1
639 18:01:28.183238 PCI: 00:15.0: enabled 1
640 18:01:28.186874 PCI: 00:15.1: enabled 1
641 18:01:28.189870 PCI: 00:15.2: enabled 1
642 18:01:28.193004 PCI: 00:15.3: enabled 1
643 18:01:28.193112 PCI: 00:16.0: enabled 1
644 18:01:28.196762 PCI: 00:16.1: enabled 0
645 18:01:28.200190 PCI: 00:16.2: enabled 0
646 18:01:28.200301 PCI: 00:16.3: enabled 0
647 18:01:28.203570 PCI: 00:16.4: enabled 0
648 18:01:28.206947 PCI: 00:16.5: enabled 0
649 18:01:28.210239 PCI: 00:17.0: enabled 1
650 18:01:28.210437 PCI: 00:19.0: enabled 0
651 18:01:28.213138 PCI: 00:19.1: enabled 1
652 18:01:28.216978 PCI: 00:19.2: enabled 0
653 18:01:28.220013 PCI: 00:1c.0: enabled 1
654 18:01:28.220096 PCI: 00:1c.1: enabled 0
655 18:01:28.223041 PCI: 00:1c.2: enabled 0
656 18:01:28.226619 PCI: 00:1c.3: enabled 0
657 18:01:28.230172 PCI: 00:1c.4: enabled 0
658 18:01:28.230287 PCI: 00:1c.5: enabled 0
659 18:01:28.233081 PCI: 00:1c.6: enabled 1
660 18:01:28.236721 PCI: 00:1c.7: enabled 0
661 18:01:28.236829 PCI: 00:1d.0: enabled 1
662 18:01:28.239611 PCI: 00:1d.1: enabled 0
663 18:01:28.243328 PCI: 00:1d.2: enabled 1
664 18:01:28.246418 PCI: 00:1d.3: enabled 0
665 18:01:28.246527 PCI: 00:1e.0: enabled 1
666 18:01:28.249975 PCI: 00:1e.1: enabled 0
667 18:01:28.252920 PCI: 00:1e.2: enabled 1
668 18:01:28.256506 PCI: 00:1e.3: enabled 1
669 18:01:28.256614 PCI: 00:1f.0: enabled 1
670 18:01:28.259690 PCI: 00:1f.1: enabled 0
671 18:01:28.263282 PCI: 00:1f.2: enabled 1
672 18:01:28.266426 PCI: 00:1f.3: enabled 1
673 18:01:28.266535 PCI: 00:1f.4: enabled 0
674 18:01:28.269980 PCI: 00:1f.5: enabled 1
675 18:01:28.273130 PCI: 00:1f.6: enabled 0
676 18:01:28.273239 PCI: 00:1f.7: enabled 0
677 18:01:28.276669 APIC: 00: enabled 1
678 18:01:28.279617 GENERIC: 0.0: enabled 1
679 18:01:28.283211 GENERIC: 0.0: enabled 1
680 18:01:28.283321 GENERIC: 1.0: enabled 1
681 18:01:28.286658 GENERIC: 0.0: enabled 1
682 18:01:28.290017 GENERIC: 1.0: enabled 1
683 18:01:28.290125 USB0 port 0: enabled 1
684 18:01:28.293124 GENERIC: 0.0: enabled 1
685 18:01:28.296591 USB0 port 0: enabled 1
686 18:01:28.299490 GENERIC: 0.0: enabled 1
687 18:01:28.299598 I2C: 00:1a: enabled 1
688 18:01:28.303325 I2C: 00:31: enabled 1
689 18:01:28.306134 I2C: 00:32: enabled 1
690 18:01:28.306242 I2C: 00:10: enabled 1
691 18:01:28.309752 I2C: 00:15: enabled 1
692 18:01:28.313207 GENERIC: 0.0: enabled 0
693 18:01:28.313315 GENERIC: 1.0: enabled 0
694 18:01:28.316531 GENERIC: 0.0: enabled 1
695 18:01:28.319841 SPI: 00: enabled 1
696 18:01:28.319986 SPI: 00: enabled 1
697 18:01:28.322821 PNP: 0c09.0: enabled 1
698 18:01:28.326593 GENERIC: 0.0: enabled 1
699 18:01:28.329468 USB3 port 0: enabled 1
700 18:01:28.329589 USB3 port 1: enabled 1
701 18:01:28.333223 USB3 port 2: enabled 0
702 18:01:28.336326 USB3 port 3: enabled 0
703 18:01:28.336434 USB2 port 0: enabled 0
704 18:01:28.339889 USB2 port 1: enabled 1
705 18:01:28.343345 USB2 port 2: enabled 1
706 18:01:28.343455 USB2 port 3: enabled 0
707 18:01:28.346412 USB2 port 4: enabled 1
708 18:01:28.349787 USB2 port 5: enabled 0
709 18:01:28.353250 USB2 port 6: enabled 0
710 18:01:28.353360 USB2 port 7: enabled 0
711 18:01:28.356840 USB2 port 8: enabled 0
712 18:01:28.359784 USB2 port 9: enabled 0
713 18:01:28.359891 USB3 port 0: enabled 0
714 18:01:28.363500 USB3 port 1: enabled 1
715 18:01:28.366480 USB3 port 2: enabled 0
716 18:01:28.366589 USB3 port 3: enabled 0
717 18:01:28.369917 GENERIC: 0.0: enabled 1
718 18:01:28.373001 GENERIC: 1.0: enabled 1
719 18:01:28.376645 APIC: 01: enabled 1
720 18:01:28.376751 APIC: 03: enabled 1
721 18:01:28.379677 APIC: 06: enabled 1
722 18:01:28.379789 APIC: 05: enabled 1
723 18:01:28.383361 APIC: 04: enabled 1
724 18:01:28.386326 APIC: 02: enabled 1
725 18:01:28.386436 APIC: 07: enabled 1
726 18:01:28.390138 Compare with tree...
727 18:01:28.393153 Root Device: enabled 1
728 18:01:28.393263 DOMAIN: 0000: enabled 1
729 18:01:28.396455 PCI: 00:00.0: enabled 1
730 18:01:28.400148 PCI: 00:02.0: enabled 1
731 18:01:28.403450 PCI: 00:04.0: enabled 1
732 18:01:28.406519 GENERIC: 0.0: enabled 1
733 18:01:28.406626 PCI: 00:05.0: enabled 1
734 18:01:28.409544 PCI: 00:06.0: enabled 0
735 18:01:28.413207 PCI: 00:07.0: enabled 0
736 18:01:28.416632 GENERIC: 0.0: enabled 1
737 18:01:28.419693 PCI: 00:07.1: enabled 0
738 18:01:28.419802 GENERIC: 1.0: enabled 1
739 18:01:28.423198 PCI: 00:07.2: enabled 0
740 18:01:28.426461 GENERIC: 0.0: enabled 1
741 18:01:28.430146 PCI: 00:07.3: enabled 0
742 18:01:28.433002 GENERIC: 1.0: enabled 1
743 18:01:28.433114 PCI: 00:08.0: enabled 1
744 18:01:28.436581 PCI: 00:09.0: enabled 0
745 18:01:28.439689 PCI: 00:0a.0: enabled 0
746 18:01:28.443249 PCI: 00:0d.0: enabled 1
747 18:01:28.446381 USB0 port 0: enabled 1
748 18:01:28.446479 USB3 port 0: enabled 1
749 18:01:28.449874 USB3 port 1: enabled 1
750 18:01:28.452940 USB3 port 2: enabled 0
751 18:01:28.456397 USB3 port 3: enabled 0
752 18:01:28.459659 PCI: 00:0d.1: enabled 0
753 18:01:28.459767 PCI: 00:0d.2: enabled 0
754 18:01:28.462952 GENERIC: 0.0: enabled 1
755 18:01:28.466503 PCI: 00:0d.3: enabled 0
756 18:01:28.469350 PCI: 00:0e.0: enabled 0
757 18:01:28.473037 PCI: 00:10.2: enabled 1
758 18:01:28.473147 PCI: 00:10.6: enabled 0
759 18:01:28.476518 PCI: 00:10.7: enabled 0
760 18:01:28.479753 PCI: 00:12.0: enabled 0
761 18:01:28.483347 PCI: 00:12.6: enabled 0
762 18:01:28.486418 PCI: 00:13.0: enabled 0
763 18:01:28.486526 PCI: 00:14.0: enabled 1
764 18:01:28.489528 USB0 port 0: enabled 1
765 18:01:28.493059 USB2 port 0: enabled 0
766 18:01:28.496161 USB2 port 1: enabled 1
767 18:01:28.499812 USB2 port 2: enabled 1
768 18:01:28.499942 USB2 port 3: enabled 0
769 18:01:28.503301 USB2 port 4: enabled 1
770 18:01:28.507015 USB2 port 5: enabled 0
771 18:01:28.509615 USB2 port 6: enabled 0
772 18:01:28.513243 USB2 port 7: enabled 0
773 18:01:28.516309 USB2 port 8: enabled 0
774 18:01:28.516396 USB2 port 9: enabled 0
775 18:01:28.519567 USB3 port 0: enabled 0
776 18:01:28.523150 USB3 port 1: enabled 1
777 18:01:28.526913 USB3 port 2: enabled 0
778 18:01:28.529758 USB3 port 3: enabled 0
779 18:01:28.529846 PCI: 00:14.1: enabled 0
780 18:01:28.533144 PCI: 00:14.2: enabled 1
781 18:01:28.536361 PCI: 00:14.3: enabled 1
782 18:01:28.539882 GENERIC: 0.0: enabled 1
783 18:01:28.542968 PCI: 00:15.0: enabled 1
784 18:01:28.543044 I2C: 00:1a: enabled 1
785 18:01:28.546709 I2C: 00:31: enabled 1
786 18:01:28.549884 I2C: 00:32: enabled 1
787 18:01:28.553283 PCI: 00:15.1: enabled 1
788 18:01:28.553358 I2C: 00:10: enabled 1
789 18:01:28.556289 PCI: 00:15.2: enabled 1
790 18:01:28.560030 PCI: 00:15.3: enabled 1
791 18:01:28.563098 PCI: 00:16.0: enabled 1
792 18:01:28.566453 PCI: 00:16.1: enabled 0
793 18:01:28.566529 PCI: 00:16.2: enabled 0
794 18:01:28.569787 PCI: 00:16.3: enabled 0
795 18:01:28.574020 PCI: 00:16.4: enabled 0
796 18:01:28.577694 PCI: 00:16.5: enabled 0
797 18:01:28.577812 PCI: 00:17.0: enabled 1
798 18:01:28.581084 PCI: 00:19.0: enabled 0
799 18:01:28.584405 PCI: 00:19.1: enabled 1
800 18:01:28.588149 I2C: 00:15: enabled 1
801 18:01:28.588247 PCI: 00:19.2: enabled 0
802 18:01:28.591115 PCI: 00:1d.0: enabled 1
803 18:01:28.594697 GENERIC: 0.0: enabled 1
804 18:01:28.597696 PCI: 00:1e.0: enabled 1
805 18:01:28.601435 PCI: 00:1e.1: enabled 0
806 18:01:28.601532 PCI: 00:1e.2: enabled 1
807 18:01:28.604517 SPI: 00: enabled 1
808 18:01:28.607964 PCI: 00:1e.3: enabled 1
809 18:01:28.608041 SPI: 00: enabled 1
810 18:01:28.610958 PCI: 00:1f.0: enabled 1
811 18:01:28.614275 PNP: 0c09.0: enabled 1
812 18:01:28.617815 PCI: 00:1f.1: enabled 0
813 18:01:28.620745 PCI: 00:1f.2: enabled 1
814 18:01:28.620845 GENERIC: 0.0: enabled 1
815 18:01:28.624302 GENERIC: 0.0: enabled 1
816 18:01:28.674728 GENERIC: 1.0: enabled 1
817 18:01:28.674870 PCI: 00:1f.3: enabled 1
818 18:01:28.675341 PCI: 00:1f.4: enabled 0
819 18:01:28.675438 PCI: 00:1f.5: enabled 1
820 18:01:28.675711 PCI: 00:1f.6: enabled 0
821 18:01:28.675804 PCI: 00:1f.7: enabled 0
822 18:01:28.675894 CPU_CLUSTER: 0: enabled 1
823 18:01:28.676018 APIC: 00: enabled 1
824 18:01:28.676104 APIC: 01: enabled 1
825 18:01:28.676191 APIC: 03: enabled 1
826 18:01:28.676291 APIC: 06: enabled 1
827 18:01:28.676377 APIC: 05: enabled 1
828 18:01:28.676460 APIC: 04: enabled 1
829 18:01:28.676545 APIC: 02: enabled 1
830 18:01:28.676631 APIC: 07: enabled 1
831 18:01:28.676714 Root Device scanning...
832 18:01:28.676775 scan_static_bus for Root Device
833 18:01:28.679407 DOMAIN: 0000 enabled
834 18:01:28.679504 CPU_CLUSTER: 0 enabled
835 18:01:28.679593 DOMAIN: 0000 scanning...
836 18:01:28.682975 PCI: pci_scan_bus for bus 00
837 18:01:28.683068 PCI: 00:00.0 [8086/0000] ops
838 18:01:28.686124 PCI: 00:00.0 [8086/9a12] enabled
839 18:01:28.689657 PCI: 00:02.0 [8086/0000] bus ops
840 18:01:28.693020 PCI: 00:02.0 [8086/9a40] enabled
841 18:01:28.696219 PCI: 00:04.0 [8086/0000] bus ops
842 18:01:28.699393 PCI: 00:04.0 [8086/9a03] enabled
843 18:01:28.702892 PCI: 00:05.0 [8086/9a19] enabled
844 18:01:28.705918 PCI: 00:07.0 [0000/0000] hidden
845 18:01:28.709646 PCI: 00:08.0 [8086/9a11] enabled
846 18:01:28.712522 PCI: 00:0a.0 [8086/9a0d] disabled
847 18:01:28.716254 PCI: 00:0d.0 [8086/0000] bus ops
848 18:01:28.719515 PCI: 00:0d.0 [8086/9a13] enabled
849 18:01:28.723112 PCI: 00:14.0 [8086/0000] bus ops
850 18:01:28.726433 PCI: 00:14.0 [8086/a0ed] enabled
851 18:01:28.729590 PCI: 00:14.2 [8086/a0ef] enabled
852 18:01:28.732983 PCI: 00:14.3 [8086/0000] bus ops
853 18:01:28.736304 PCI: 00:14.3 [8086/a0f0] enabled
854 18:01:28.739581 PCI: 00:15.0 [8086/0000] bus ops
855 18:01:28.742706 PCI: 00:15.0 [8086/a0e8] enabled
856 18:01:28.746239 PCI: 00:15.1 [8086/0000] bus ops
857 18:01:28.749764 PCI: 00:15.1 [8086/a0e9] enabled
858 18:01:28.753025 PCI: 00:15.2 [8086/0000] bus ops
859 18:01:28.755874 PCI: 00:15.2 [8086/a0ea] enabled
860 18:01:28.759630 PCI: 00:15.3 [8086/0000] bus ops
861 18:01:28.762747 PCI: 00:15.3 [8086/a0eb] enabled
862 18:01:28.766391 PCI: 00:16.0 [8086/0000] ops
863 18:01:28.769395 PCI: 00:16.0 [8086/a0e0] enabled
864 18:01:28.776253 PCI: Static device PCI: 00:17.0 not found, disabling it.
865 18:01:28.779708 PCI: 00:19.0 [8086/0000] bus ops
866 18:01:28.782732 PCI: 00:19.0 [8086/a0c5] disabled
867 18:01:28.785953 PCI: 00:19.1 [8086/0000] bus ops
868 18:01:28.789507 PCI: 00:19.1 [8086/a0c6] enabled
869 18:01:28.793128 PCI: 00:1d.0 [8086/0000] bus ops
870 18:01:28.795899 PCI: 00:1d.0 [8086/a0b0] enabled
871 18:01:28.795998 PCI: 00:1e.0 [8086/0000] ops
872 18:01:28.799325 PCI: 00:1e.0 [8086/a0a8] enabled
873 18:01:28.802861 PCI: 00:1e.2 [8086/0000] bus ops
874 18:01:28.806434 PCI: 00:1e.2 [8086/a0aa] enabled
875 18:01:28.809570 PCI: 00:1e.3 [8086/0000] bus ops
876 18:01:28.813169 PCI: 00:1e.3 [8086/a0ab] enabled
877 18:01:28.816367 PCI: 00:1f.0 [8086/0000] bus ops
878 18:01:28.819924 PCI: 00:1f.0 [8086/a087] enabled
879 18:01:28.823140 RTC Init
880 18:01:28.826461 Set power on after power failure.
881 18:01:28.826563 Disabling Deep S3
882 18:01:28.829325 Disabling Deep S3
883 18:01:28.833232 Disabling Deep S4
884 18:01:28.833331 Disabling Deep S4
885 18:01:28.836366 Disabling Deep S5
886 18:01:28.836463 Disabling Deep S5
887 18:01:28.839773 PCI: 00:1f.2 [0000/0000] hidden
888 18:01:28.842803 PCI: 00:1f.3 [8086/0000] bus ops
889 18:01:28.845994 PCI: 00:1f.3 [8086/a0c8] enabled
890 18:01:28.849543 PCI: 00:1f.5 [8086/0000] bus ops
891 18:01:28.852605 PCI: 00:1f.5 [8086/a0a4] enabled
892 18:01:28.856308 PCI: Leftover static devices:
893 18:01:28.859480 PCI: 00:10.2
894 18:01:28.859577 PCI: 00:10.6
895 18:01:28.859666 PCI: 00:10.7
896 18:01:28.862867 PCI: 00:06.0
897 18:01:28.862962 PCI: 00:07.1
898 18:01:28.866247 PCI: 00:07.2
899 18:01:28.866345 PCI: 00:07.3
900 18:01:28.866432 PCI: 00:09.0
901 18:01:28.869282 PCI: 00:0d.1
902 18:01:28.869381 PCI: 00:0d.2
903 18:01:28.873179 PCI: 00:0d.3
904 18:01:28.873281 PCI: 00:0e.0
905 18:01:28.876266 PCI: 00:12.0
906 18:01:28.876365 PCI: 00:12.6
907 18:01:28.876455 PCI: 00:13.0
908 18:01:28.879707 PCI: 00:14.1
909 18:01:28.879808 PCI: 00:16.1
910 18:01:28.882808 PCI: 00:16.2
911 18:01:28.882909 PCI: 00:16.3
912 18:01:28.882997 PCI: 00:16.4
913 18:01:28.886511 PCI: 00:16.5
914 18:01:28.886607 PCI: 00:17.0
915 18:01:28.889542 PCI: 00:19.2
916 18:01:28.889642 PCI: 00:1e.1
917 18:01:28.889731 PCI: 00:1f.1
918 18:01:28.892602 PCI: 00:1f.4
919 18:01:28.892705 PCI: 00:1f.6
920 18:01:28.896237 PCI: 00:1f.7
921 18:01:28.899180 PCI: Check your devicetree.cb.
922 18:01:28.899277 PCI: 00:02.0 scanning...
923 18:01:28.906400 scan_generic_bus for PCI: 00:02.0
924 18:01:28.909457 scan_generic_bus for PCI: 00:02.0 done
925 18:01:28.912796 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
926 18:01:28.916118 PCI: 00:04.0 scanning...
927 18:01:28.919339 scan_generic_bus for PCI: 00:04.0
928 18:01:28.922578 GENERIC: 0.0 enabled
929 18:01:28.926327 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
930 18:01:28.932716 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
931 18:01:28.936212 PCI: 00:0d.0 scanning...
932 18:01:28.939142 scan_static_bus for PCI: 00:0d.0
933 18:01:28.939238 USB0 port 0 enabled
934 18:01:28.942680 USB0 port 0 scanning...
935 18:01:28.946326 scan_static_bus for USB0 port 0
936 18:01:28.949114 USB3 port 0 enabled
937 18:01:28.949215 USB3 port 1 enabled
938 18:01:28.952640 USB3 port 2 disabled
939 18:01:28.956179 USB3 port 3 disabled
940 18:01:28.956271 USB3 port 0 scanning...
941 18:01:28.959349 scan_static_bus for USB3 port 0
942 18:01:28.963044 scan_static_bus for USB3 port 0 done
943 18:01:28.969670 scan_bus: bus USB3 port 0 finished in 6 msecs
944 18:01:28.972454 USB3 port 1 scanning...
945 18:01:28.976110 scan_static_bus for USB3 port 1
946 18:01:28.979200 scan_static_bus for USB3 port 1 done
947 18:01:28.982749 scan_bus: bus USB3 port 1 finished in 6 msecs
948 18:01:28.985811 scan_static_bus for USB0 port 0 done
949 18:01:28.992559 scan_bus: bus USB0 port 0 finished in 43 msecs
950 18:01:28.996305 scan_static_bus for PCI: 00:0d.0 done
951 18:01:28.999311 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
952 18:01:29.002983 PCI: 00:14.0 scanning...
953 18:01:29.005975 scan_static_bus for PCI: 00:14.0
954 18:01:29.009670 USB0 port 0 enabled
955 18:01:29.009757 USB0 port 0 scanning...
956 18:01:29.012852 scan_static_bus for USB0 port 0
957 18:01:29.016480 USB2 port 0 disabled
958 18:01:29.019593 USB2 port 1 enabled
959 18:01:29.019688 USB2 port 2 enabled
960 18:01:29.023229 USB2 port 3 disabled
961 18:01:29.026067 USB2 port 4 enabled
962 18:01:29.026145 USB2 port 5 disabled
963 18:01:29.029572 USB2 port 6 disabled
964 18:01:29.029676 USB2 port 7 disabled
965 18:01:29.032828 USB2 port 8 disabled
966 18:01:29.036269 USB2 port 9 disabled
967 18:01:29.036364 USB3 port 0 disabled
968 18:01:29.039489 USB3 port 1 enabled
969 18:01:29.043362 USB3 port 2 disabled
970 18:01:29.043524 USB3 port 3 disabled
971 18:01:29.046490 USB2 port 1 scanning...
972 18:01:29.049798 scan_static_bus for USB2 port 1
973 18:01:29.053070 scan_static_bus for USB2 port 1 done
974 18:01:29.059482 scan_bus: bus USB2 port 1 finished in 6 msecs
975 18:01:29.059592 USB2 port 2 scanning...
976 18:01:29.063059 scan_static_bus for USB2 port 2
977 18:01:29.066046 scan_static_bus for USB2 port 2 done
978 18:01:29.072663 scan_bus: bus USB2 port 2 finished in 6 msecs
979 18:01:29.076068 USB2 port 4 scanning...
980 18:01:29.079449 scan_static_bus for USB2 port 4
981 18:01:29.082744 scan_static_bus for USB2 port 4 done
982 18:01:29.086221 scan_bus: bus USB2 port 4 finished in 6 msecs
983 18:01:29.089365 USB3 port 1 scanning...
984 18:01:29.093161 scan_static_bus for USB3 port 1
985 18:01:29.096157 scan_static_bus for USB3 port 1 done
986 18:01:29.099301 scan_bus: bus USB3 port 1 finished in 6 msecs
987 18:01:29.102951 scan_static_bus for USB0 port 0 done
988 18:01:29.109658 scan_bus: bus USB0 port 0 finished in 93 msecs
989 18:01:29.112759 scan_static_bus for PCI: 00:14.0 done
990 18:01:29.119259 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
991 18:01:29.119369 PCI: 00:14.3 scanning...
992 18:01:29.122874 scan_static_bus for PCI: 00:14.3
993 18:01:29.125904 GENERIC: 0.0 enabled
994 18:01:29.129528 scan_static_bus for PCI: 00:14.3 done
995 18:01:29.136100 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
996 18:01:29.136208 PCI: 00:15.0 scanning...
997 18:01:29.139185 scan_static_bus for PCI: 00:15.0
998 18:01:29.142789 I2C: 00:1a enabled
999 18:01:29.145824 I2C: 00:31 enabled
1000 18:01:29.145932 I2C: 00:32 enabled
1001 18:01:29.149157 scan_static_bus for PCI: 00:15.0 done
1002 18:01:29.156504 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1003 18:01:29.156612 PCI: 00:15.1 scanning...
1004 18:01:29.160081 scan_static_bus for PCI: 00:15.1
1005 18:01:29.163238 I2C: 00:10 enabled
1006 18:01:29.166661 scan_static_bus for PCI: 00:15.1 done
1007 18:01:29.173392 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1008 18:01:29.173501 PCI: 00:15.2 scanning...
1009 18:01:29.176471 scan_static_bus for PCI: 00:15.2
1010 18:01:29.182903 scan_static_bus for PCI: 00:15.2 done
1011 18:01:29.186373 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1012 18:01:29.190003 PCI: 00:15.3 scanning...
1013 18:01:29.193178 scan_static_bus for PCI: 00:15.3
1014 18:01:29.196793 scan_static_bus for PCI: 00:15.3 done
1015 18:01:29.199773 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1016 18:01:29.203406 PCI: 00:19.1 scanning...
1017 18:01:29.206470 scan_static_bus for PCI: 00:19.1
1018 18:01:29.210186 I2C: 00:15 enabled
1019 18:01:29.213085 scan_static_bus for PCI: 00:19.1 done
1020 18:01:29.216284 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1021 18:01:29.219788 PCI: 00:1d.0 scanning...
1022 18:01:29.222925 do_pci_scan_bridge for PCI: 00:1d.0
1023 18:01:29.226724 PCI: pci_scan_bus for bus 01
1024 18:01:29.230128 PCI: 01:00.0 [1c5c/174a] enabled
1025 18:01:29.233161 GENERIC: 0.0 enabled
1026 18:01:29.236704 Enabling Common Clock Configuration
1027 18:01:29.240235 L1 Sub-State supported from root port 29
1028 18:01:29.243340 L1 Sub-State Support = 0xf
1029 18:01:29.246292 CommonModeRestoreTime = 0x28
1030 18:01:29.249911 Power On Value = 0x16, Power On Scale = 0x0
1031 18:01:29.252856 ASPM: Enabled L1
1032 18:01:29.256413 PCIe: Max_Payload_Size adjusted to 128
1033 18:01:29.260124 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1034 18:01:29.263416 PCI: 00:1e.2 scanning...
1035 18:01:29.266299 scan_generic_bus for PCI: 00:1e.2
1036 18:01:29.269718 SPI: 00 enabled
1037 18:01:29.273223 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1038 18:01:29.279877 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1039 18:01:29.283364 PCI: 00:1e.3 scanning...
1040 18:01:29.286544 scan_generic_bus for PCI: 00:1e.3
1041 18:01:29.286615 SPI: 00 enabled
1042 18:01:29.292984 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1043 18:01:29.299828 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1044 18:01:29.299938 PCI: 00:1f.0 scanning...
1045 18:01:29.303187 scan_static_bus for PCI: 00:1f.0
1046 18:01:29.306801 PNP: 0c09.0 enabled
1047 18:01:29.309911 PNP: 0c09.0 scanning...
1048 18:01:29.312931 scan_static_bus for PNP: 0c09.0
1049 18:01:29.316613 scan_static_bus for PNP: 0c09.0 done
1050 18:01:29.319708 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1051 18:01:29.323155 scan_static_bus for PCI: 00:1f.0 done
1052 18:01:29.329945 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1053 18:01:29.333066 PCI: 00:1f.2 scanning...
1054 18:01:29.336722 scan_static_bus for PCI: 00:1f.2
1055 18:01:29.336803 GENERIC: 0.0 enabled
1056 18:01:29.340131 GENERIC: 0.0 scanning...
1057 18:01:29.343109 scan_static_bus for GENERIC: 0.0
1058 18:01:29.346788 GENERIC: 0.0 enabled
1059 18:01:29.346870 GENERIC: 1.0 enabled
1060 18:01:29.352899 scan_static_bus for GENERIC: 0.0 done
1061 18:01:29.356665 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1062 18:01:29.359510 scan_static_bus for PCI: 00:1f.2 done
1063 18:01:29.366469 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1064 18:01:29.366551 PCI: 00:1f.3 scanning...
1065 18:01:29.369665 scan_static_bus for PCI: 00:1f.3
1066 18:01:29.376868 scan_static_bus for PCI: 00:1f.3 done
1067 18:01:29.380090 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1068 18:01:29.383033 PCI: 00:1f.5 scanning...
1069 18:01:29.386423 scan_generic_bus for PCI: 00:1f.5
1070 18:01:29.389669 scan_generic_bus for PCI: 00:1f.5 done
1071 18:01:29.393302 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1072 18:01:29.399912 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1073 18:01:29.403356 scan_static_bus for Root Device done
1074 18:01:29.406755 scan_bus: bus Root Device finished in 736 msecs
1075 18:01:29.409965 done
1076 18:01:29.412923 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1077 18:01:29.416782 Chrome EC: UHEPI supported
1078 18:01:29.423272 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1079 18:01:29.430072 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1080 18:01:29.433628 SPI flash protection: WPSW=1 SRP0=0
1081 18:01:29.439805 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1082 18:01:29.443230 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1083 18:01:29.446759 found VGA at PCI: 00:02.0
1084 18:01:29.449862 Setting up VGA for PCI: 00:02.0
1085 18:01:29.456567 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1086 18:01:29.460232 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1087 18:01:29.463252 Allocating resources...
1088 18:01:29.463353 Reading resources...
1089 18:01:29.469999 Root Device read_resources bus 0 link: 0
1090 18:01:29.473502 DOMAIN: 0000 read_resources bus 0 link: 0
1091 18:01:29.479687 PCI: 00:04.0 read_resources bus 1 link: 0
1092 18:01:29.483485 PCI: 00:04.0 read_resources bus 1 link: 0 done
1093 18:01:29.490064 PCI: 00:0d.0 read_resources bus 0 link: 0
1094 18:01:29.493264 USB0 port 0 read_resources bus 0 link: 0
1095 18:01:29.500316 USB0 port 0 read_resources bus 0 link: 0 done
1096 18:01:29.503548 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1097 18:01:29.507096 PCI: 00:14.0 read_resources bus 0 link: 0
1098 18:01:29.513506 USB0 port 0 read_resources bus 0 link: 0
1099 18:01:29.516959 USB0 port 0 read_resources bus 0 link: 0 done
1100 18:01:29.523611 PCI: 00:14.0 read_resources bus 0 link: 0 done
1101 18:01:29.526732 PCI: 00:14.3 read_resources bus 0 link: 0
1102 18:01:29.533408 PCI: 00:14.3 read_resources bus 0 link: 0 done
1103 18:01:29.537040 PCI: 00:15.0 read_resources bus 0 link: 0
1104 18:01:29.543796 PCI: 00:15.0 read_resources bus 0 link: 0 done
1105 18:01:29.546714 PCI: 00:15.1 read_resources bus 0 link: 0
1106 18:01:29.553306 PCI: 00:15.1 read_resources bus 0 link: 0 done
1107 18:01:29.556430 PCI: 00:19.1 read_resources bus 0 link: 0
1108 18:01:29.563654 PCI: 00:19.1 read_resources bus 0 link: 0 done
1109 18:01:29.566656 PCI: 00:1d.0 read_resources bus 1 link: 0
1110 18:01:29.573799 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1111 18:01:29.576842 PCI: 00:1e.2 read_resources bus 2 link: 0
1112 18:01:29.583751 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1113 18:01:29.586613 PCI: 00:1e.3 read_resources bus 3 link: 0
1114 18:01:29.593785 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1115 18:01:29.596771 PCI: 00:1f.0 read_resources bus 0 link: 0
1116 18:01:29.603482 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1117 18:01:29.606956 PCI: 00:1f.2 read_resources bus 0 link: 0
1118 18:01:29.609935 GENERIC: 0.0 read_resources bus 0 link: 0
1119 18:01:29.617092 GENERIC: 0.0 read_resources bus 0 link: 0 done
1120 18:01:29.620526 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1121 18:01:29.627911 DOMAIN: 0000 read_resources bus 0 link: 0 done
1122 18:01:29.631353 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1123 18:01:29.637925 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1124 18:01:29.640960 Root Device read_resources bus 0 link: 0 done
1125 18:01:29.644355 Done reading resources.
1126 18:01:29.651337 Show resources in subtree (Root Device)...After reading.
1127 18:01:29.654373 Root Device child on link 0 DOMAIN: 0000
1128 18:01:29.658073 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1129 18:01:29.667951 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1130 18:01:29.678112 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1131 18:01:29.678236 PCI: 00:00.0
1132 18:01:29.687800 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1133 18:01:29.697858 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1134 18:01:29.707918 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1135 18:01:29.717852 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1136 18:01:29.728136 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1137 18:01:29.734755 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1138 18:01:29.744580 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1139 18:01:29.754345 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1140 18:01:29.764513 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1141 18:01:29.774490 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1142 18:01:29.784658 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1143 18:01:29.791157 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1144 18:01:29.801116 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1145 18:01:29.811015 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1146 18:01:29.821113 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1147 18:01:29.828142 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1148 18:01:29.841240 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1149 18:01:29.848127 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1150 18:01:29.857610 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1151 18:01:29.867517 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1152 18:01:29.870878 PCI: 00:02.0
1153 18:01:29.881420 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 18:01:29.891303 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1155 18:01:29.897903 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1156 18:01:29.904873 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1157 18:01:29.914326 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1158 18:01:29.914436 GENERIC: 0.0
1159 18:01:29.917534 PCI: 00:05.0
1160 18:01:29.927620 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1161 18:01:29.931019 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1162 18:01:29.934551 GENERIC: 0.0
1163 18:01:29.934657 PCI: 00:08.0
1164 18:01:29.944251 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 18:01:29.947655 PCI: 00:0a.0
1166 18:01:29.951058 PCI: 00:0d.0 child on link 0 USB0 port 0
1167 18:01:29.960829 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 18:01:29.964150 USB0 port 0 child on link 0 USB3 port 0
1169 18:01:29.967604 USB3 port 0
1170 18:01:29.967718 USB3 port 1
1171 18:01:29.971316 USB3 port 2
1172 18:01:29.971398 USB3 port 3
1173 18:01:29.977545 PCI: 00:14.0 child on link 0 USB0 port 0
1174 18:01:29.987974 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1175 18:01:29.990885 USB0 port 0 child on link 0 USB2 port 0
1176 18:01:29.994500 USB2 port 0
1177 18:01:29.994603 USB2 port 1
1178 18:01:29.997608 USB2 port 2
1179 18:01:29.997710 USB2 port 3
1180 18:01:30.001211 USB2 port 4
1181 18:01:30.001295 USB2 port 5
1182 18:01:30.004174 USB2 port 6
1183 18:01:30.004249 USB2 port 7
1184 18:01:30.007586 USB2 port 8
1185 18:01:30.007691 USB2 port 9
1186 18:01:30.010908 USB3 port 0
1187 18:01:30.010999 USB3 port 1
1188 18:01:30.014591 USB3 port 2
1189 18:01:30.014691 USB3 port 3
1190 18:01:30.017623 PCI: 00:14.2
1191 18:01:30.027893 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1192 18:01:30.037479 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1193 18:01:30.040986 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1194 18:01:30.050911 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1195 18:01:30.054550 GENERIC: 0.0
1196 18:01:30.057397 PCI: 00:15.0 child on link 0 I2C: 00:1a
1197 18:01:30.067568 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1198 18:01:30.071232 I2C: 00:1a
1199 18:01:30.071341 I2C: 00:31
1200 18:01:30.071449 I2C: 00:32
1201 18:01:30.077549 PCI: 00:15.1 child on link 0 I2C: 00:10
1202 18:01:30.087532 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 18:01:30.087618 I2C: 00:10
1204 18:01:30.090955 PCI: 00:15.2
1205 18:01:30.101122 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 18:01:30.101208 PCI: 00:15.3
1207 18:01:30.111351 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1208 18:01:30.114521 PCI: 00:16.0
1209 18:01:30.124750 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1210 18:01:30.124835 PCI: 00:19.0
1211 18:01:30.127636 PCI: 00:19.1 child on link 0 I2C: 00:15
1212 18:01:30.137762 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1213 18:01:30.141530 I2C: 00:15
1214 18:01:30.144408 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1215 18:01:30.154407 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1216 18:01:30.164611 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1217 18:01:30.174363 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1218 18:01:30.174448 GENERIC: 0.0
1219 18:01:30.177797 PCI: 01:00.0
1220 18:01:30.187555 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1221 18:01:30.194363 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1222 18:01:30.204418 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1223 18:01:30.207624 PCI: 00:1e.0
1224 18:01:30.217918 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1225 18:01:30.221213 PCI: 00:1e.2 child on link 0 SPI: 00
1226 18:01:30.231424 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1227 18:01:30.234646 SPI: 00
1228 18:01:30.237690 PCI: 00:1e.3 child on link 0 SPI: 00
1229 18:01:30.247994 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1230 18:01:30.248077 SPI: 00
1231 18:01:30.250898 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1232 18:01:30.261043 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1233 18:01:30.264852 PNP: 0c09.0
1234 18:01:30.271510 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1235 18:01:30.274445 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1236 18:01:30.284770 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1237 18:01:30.294738 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1238 18:01:30.297854 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1239 18:01:30.301548 GENERIC: 0.0
1240 18:01:30.304618 GENERIC: 1.0
1241 18:01:30.304859 PCI: 00:1f.3
1242 18:01:30.314887 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1243 18:01:30.324723 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1244 18:01:30.328109 PCI: 00:1f.5
1245 18:01:30.334309 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1246 18:01:30.340937 CPU_CLUSTER: 0 child on link 0 APIC: 00
1247 18:01:30.341020 APIC: 00
1248 18:01:30.341084 APIC: 01
1249 18:01:30.344712 APIC: 03
1250 18:01:30.344807 APIC: 06
1251 18:01:30.347892 APIC: 05
1252 18:01:30.348013 APIC: 04
1253 18:01:30.348092 APIC: 02
1254 18:01:30.351340 APIC: 07
1255 18:01:30.357764 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1256 18:01:30.364819 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1257 18:01:30.370946 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1258 18:01:30.374161 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1259 18:01:30.380769 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1260 18:01:30.384128 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1261 18:01:30.387404 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1262 18:01:30.394655 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1263 18:01:30.404329 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1264 18:01:30.411075 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1265 18:01:30.417486 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1266 18:01:30.424053 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1267 18:01:30.430613 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1268 18:01:30.440536 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1269 18:01:30.447354 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1270 18:01:30.450953 DOMAIN: 0000: Resource ranges:
1271 18:01:30.454153 * Base: 1000, Size: 800, Tag: 100
1272 18:01:30.457095 * Base: 1900, Size: e700, Tag: 100
1273 18:01:30.463693 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1274 18:01:30.470938 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1275 18:01:30.477470 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1276 18:01:30.484327 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1277 18:01:30.490835 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1278 18:01:30.500865 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1279 18:01:30.507170 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1280 18:01:30.513927 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1281 18:01:30.520747 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1282 18:01:30.530348 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1283 18:01:30.537243 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1284 18:01:30.543817 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1285 18:01:30.554009 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1286 18:01:30.560547 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1287 18:01:30.567350 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1288 18:01:30.576974 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1289 18:01:30.583506 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1290 18:01:30.590282 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1291 18:01:30.600552 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1292 18:01:30.607317 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1293 18:01:30.613882 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1294 18:01:30.624057 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1295 18:01:30.630485 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1296 18:01:30.636779 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1297 18:01:30.646977 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1298 18:01:30.650059 DOMAIN: 0000: Resource ranges:
1299 18:01:30.653631 * Base: 7fc00000, Size: 40400000, Tag: 200
1300 18:01:30.656753 * Base: d0000000, Size: 28000000, Tag: 200
1301 18:01:30.663816 * Base: fa000000, Size: 1000000, Tag: 200
1302 18:01:30.666659 * Base: fb001000, Size: 2fff000, Tag: 200
1303 18:01:30.670224 * Base: fe010000, Size: 2e000, Tag: 200
1304 18:01:30.673603 * Base: fe03f000, Size: d41000, Tag: 200
1305 18:01:30.680334 * Base: fed88000, Size: 8000, Tag: 200
1306 18:01:30.683365 * Base: fed93000, Size: d000, Tag: 200
1307 18:01:30.687014 * Base: feda2000, Size: 1e000, Tag: 200
1308 18:01:30.690091 * Base: fede0000, Size: 1220000, Tag: 200
1309 18:01:30.696870 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1310 18:01:30.703626 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1311 18:01:30.710244 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1312 18:01:30.716450 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1313 18:01:30.723219 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1314 18:01:30.730006 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1315 18:01:30.736925 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1316 18:01:30.743213 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1317 18:01:30.749920 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1318 18:01:30.756686 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1319 18:01:30.763356 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1320 18:01:30.770275 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1321 18:01:30.776802 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1322 18:01:30.783485 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1323 18:01:30.790306 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1324 18:01:30.796542 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1325 18:01:30.803314 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1326 18:01:30.810073 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1327 18:01:30.816869 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1328 18:01:30.823438 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1329 18:01:30.830361 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1330 18:01:30.836670 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1331 18:01:30.843541 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1332 18:01:30.849952 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1333 18:01:30.857060 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1334 18:01:30.860356 PCI: 00:1d.0: Resource ranges:
1335 18:01:30.863260 * Base: 7fc00000, Size: 100000, Tag: 200
1336 18:01:30.870558 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1337 18:01:30.877195 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1338 18:01:30.883545 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1339 18:01:30.893648 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1340 18:01:30.900427 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1341 18:01:30.903392 Root Device assign_resources, bus 0 link: 0
1342 18:01:30.910125 DOMAIN: 0000 assign_resources, bus 0 link: 0
1343 18:01:30.916943 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1344 18:01:30.927113 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1345 18:01:30.933647 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1346 18:01:30.943633 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1347 18:01:30.947204 PCI: 00:04.0 assign_resources, bus 1 link: 0
1348 18:01:30.950138 PCI: 00:04.0 assign_resources, bus 1 link: 0
1349 18:01:30.960398 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1350 18:01:30.967413 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1351 18:01:30.977312 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1352 18:01:30.980402 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1353 18:01:30.987079 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1354 18:01:30.993659 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1355 18:01:30.997240 PCI: 00:14.0 assign_resources, bus 0 link: 0
1356 18:01:31.003825 PCI: 00:14.0 assign_resources, bus 0 link: 0
1357 18:01:31.010570 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1358 18:01:31.020226 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1359 18:01:31.026854 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1360 18:01:31.030641 PCI: 00:14.3 assign_resources, bus 0 link: 0
1361 18:01:31.037234 PCI: 00:14.3 assign_resources, bus 0 link: 0
1362 18:01:31.044055 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1363 18:01:31.050578 PCI: 00:15.0 assign_resources, bus 0 link: 0
1364 18:01:31.054029 PCI: 00:15.0 assign_resources, bus 0 link: 0
1365 18:01:31.063759 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1366 18:01:31.067483 PCI: 00:15.1 assign_resources, bus 0 link: 0
1367 18:01:31.070507 PCI: 00:15.1 assign_resources, bus 0 link: 0
1368 18:01:31.080421 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1369 18:01:31.087449 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1370 18:01:31.097154 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1371 18:01:31.103861 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1372 18:01:31.107199 PCI: 00:19.1 assign_resources, bus 0 link: 0
1373 18:01:31.114404 PCI: 00:19.1 assign_resources, bus 0 link: 0
1374 18:01:31.121199 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1375 18:01:31.130965 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1376 18:01:31.141454 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1377 18:01:31.144570 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1378 18:01:31.154590 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1379 18:01:31.161312 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1380 18:01:31.167850 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1381 18:01:31.174792 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1382 18:01:31.180993 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1383 18:01:31.188015 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1384 18:01:31.191222 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1385 18:01:31.201331 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1386 18:01:31.204313 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1387 18:01:31.208154 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1388 18:01:31.214442 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1389 18:01:31.217969 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1390 18:01:31.224715 LPC: Trying to open IO window from 800 size 1ff
1391 18:01:31.230989 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1392 18:01:31.241303 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1393 18:01:31.247963 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1394 18:01:31.251143 DOMAIN: 0000 assign_resources, bus 0 link: 0
1395 18:01:31.258031 Root Device assign_resources, bus 0 link: 0
1396 18:01:31.261434 Done setting resources.
1397 18:01:31.268198 Show resources in subtree (Root Device)...After assigning values.
1398 18:01:31.271858 Root Device child on link 0 DOMAIN: 0000
1399 18:01:31.274808 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1400 18:01:31.284805 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1401 18:01:31.295067 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1402 18:01:31.295151 PCI: 00:00.0
1403 18:01:31.304653 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1404 18:01:31.314717 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1405 18:01:31.324458 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1406 18:01:31.334760 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1407 18:01:31.344761 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1408 18:01:31.351498 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1409 18:01:31.361341 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1410 18:01:31.371275 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1411 18:01:31.381298 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1412 18:01:31.391324 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1413 18:01:31.398256 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1414 18:01:31.407892 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1415 18:01:31.417951 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1416 18:01:31.428009 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1417 18:01:31.434740 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1418 18:01:31.444812 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1419 18:01:31.454874 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1420 18:01:31.464653 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1421 18:01:31.474526 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1422 18:01:31.484680 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1423 18:01:31.484775 PCI: 00:02.0
1424 18:01:31.498216 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1425 18:01:31.507971 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1426 18:01:31.518096 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1427 18:01:31.521108 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1428 18:01:31.531029 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1429 18:01:31.534512 GENERIC: 0.0
1430 18:01:31.534587 PCI: 00:05.0
1431 18:01:31.545044 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1432 18:01:31.551394 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1433 18:01:31.551502 GENERIC: 0.0
1434 18:01:31.554737 PCI: 00:08.0
1435 18:01:31.564482 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1436 18:01:31.564567 PCI: 00:0a.0
1437 18:01:31.571543 PCI: 00:0d.0 child on link 0 USB0 port 0
1438 18:01:31.581223 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1439 18:01:31.584888 USB0 port 0 child on link 0 USB3 port 0
1440 18:01:31.587915 USB3 port 0
1441 18:01:31.588002 USB3 port 1
1442 18:01:31.591338 USB3 port 2
1443 18:01:31.591412 USB3 port 3
1444 18:01:31.594783 PCI: 00:14.0 child on link 0 USB0 port 0
1445 18:01:31.607734 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1446 18:01:31.611169 USB0 port 0 child on link 0 USB2 port 0
1447 18:01:31.611252 USB2 port 0
1448 18:01:31.614836 USB2 port 1
1449 18:01:31.614950 USB2 port 2
1450 18:01:31.617970 USB2 port 3
1451 18:01:31.621457 USB2 port 4
1452 18:01:31.621559 USB2 port 5
1453 18:01:31.624519 USB2 port 6
1454 18:01:31.624634 USB2 port 7
1455 18:01:31.628299 USB2 port 8
1456 18:01:31.628375 USB2 port 9
1457 18:01:31.631335 USB3 port 0
1458 18:01:31.631417 USB3 port 1
1459 18:01:31.634709 USB3 port 2
1460 18:01:31.634787 USB3 port 3
1461 18:01:31.638164 PCI: 00:14.2
1462 18:01:31.648438 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1463 18:01:31.658040 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1464 18:01:31.661595 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1465 18:01:31.671421 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1466 18:01:31.675278 GENERIC: 0.0
1467 18:01:31.677948 PCI: 00:15.0 child on link 0 I2C: 00:1a
1468 18:01:31.688177 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1469 18:01:31.691324 I2C: 00:1a
1470 18:01:31.691412 I2C: 00:31
1471 18:01:31.694920 I2C: 00:32
1472 18:01:31.697908 PCI: 00:15.1 child on link 0 I2C: 00:10
1473 18:01:31.708020 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1474 18:01:31.711194 I2C: 00:10
1475 18:01:31.711269 PCI: 00:15.2
1476 18:01:31.721151 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1477 18:01:31.724404 PCI: 00:15.3
1478 18:01:31.734735 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1479 18:01:31.734814 PCI: 00:16.0
1480 18:01:31.744801 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1481 18:01:31.748138 PCI: 00:19.0
1482 18:01:31.751138 PCI: 00:19.1 child on link 0 I2C: 00:15
1483 18:01:31.761460 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1484 18:01:31.764622 I2C: 00:15
1485 18:01:31.768250 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1486 18:01:31.777987 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1487 18:01:31.788294 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1488 18:01:31.801260 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1489 18:01:31.801354 GENERIC: 0.0
1490 18:01:31.804912 PCI: 01:00.0
1491 18:01:31.814732 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1492 18:01:31.824332 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1493 18:01:31.834499 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1494 18:01:31.838071 PCI: 00:1e.0
1495 18:01:31.848038 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1496 18:01:31.851292 PCI: 00:1e.2 child on link 0 SPI: 00
1497 18:01:31.861091 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1498 18:01:31.864929 SPI: 00
1499 18:01:31.868165 PCI: 00:1e.3 child on link 0 SPI: 00
1500 18:01:31.878107 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1501 18:01:31.878197 SPI: 00
1502 18:01:31.884836 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1503 18:01:31.891435 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1504 18:01:31.894521 PNP: 0c09.0
1505 18:01:31.901236 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1506 18:01:31.908038 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1507 18:01:31.914906 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1508 18:01:31.924787 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1509 18:01:31.931304 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1510 18:01:31.931393 GENERIC: 0.0
1511 18:01:31.934316 GENERIC: 1.0
1512 18:01:31.934416 PCI: 00:1f.3
1513 18:01:31.944456 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1514 18:01:31.954799 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1515 18:01:31.958104 PCI: 00:1f.5
1516 18:01:31.967933 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1517 18:01:31.971326 CPU_CLUSTER: 0 child on link 0 APIC: 00
1518 18:01:31.974863 APIC: 00
1519 18:01:31.974953 APIC: 01
1520 18:01:31.977963 APIC: 03
1521 18:01:31.978064 APIC: 06
1522 18:01:31.978126 APIC: 05
1523 18:01:31.981597 APIC: 04
1524 18:01:31.981669 APIC: 02
1525 18:01:31.981729 APIC: 07
1526 18:01:31.984636 Done allocating resources.
1527 18:01:31.991274 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1528 18:01:31.997992 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1529 18:01:32.001139 Configure GPIOs for I2S audio on UP4.
1530 18:01:32.007884 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1531 18:01:32.011405 Enabling resources...
1532 18:01:32.014691 PCI: 00:00.0 subsystem <- 8086/9a12
1533 18:01:32.018031 PCI: 00:00.0 cmd <- 06
1534 18:01:32.021509 PCI: 00:02.0 subsystem <- 8086/9a40
1535 18:01:32.024913 PCI: 00:02.0 cmd <- 03
1536 18:01:32.028272 PCI: 00:04.0 subsystem <- 8086/9a03
1537 18:01:32.028347 PCI: 00:04.0 cmd <- 02
1538 18:01:32.034861 PCI: 00:05.0 subsystem <- 8086/9a19
1539 18:01:32.034938 PCI: 00:05.0 cmd <- 02
1540 18:01:32.038519 PCI: 00:08.0 subsystem <- 8086/9a11
1541 18:01:32.041646 PCI: 00:08.0 cmd <- 06
1542 18:01:32.045169 PCI: 00:0d.0 subsystem <- 8086/9a13
1543 18:01:32.048352 PCI: 00:0d.0 cmd <- 02
1544 18:01:32.051421 PCI: 00:14.0 subsystem <- 8086/a0ed
1545 18:01:32.054949 PCI: 00:14.0 cmd <- 02
1546 18:01:32.058018 PCI: 00:14.2 subsystem <- 8086/a0ef
1547 18:01:32.061464 PCI: 00:14.2 cmd <- 02
1548 18:01:32.064983 PCI: 00:14.3 subsystem <- 8086/a0f0
1549 18:01:32.065054 PCI: 00:14.3 cmd <- 02
1550 18:01:32.072242 PCI: 00:15.0 subsystem <- 8086/a0e8
1551 18:01:32.072341 PCI: 00:15.0 cmd <- 02
1552 18:01:32.075244 PCI: 00:15.1 subsystem <- 8086/a0e9
1553 18:01:32.078728 PCI: 00:15.1 cmd <- 02
1554 18:01:32.081891 PCI: 00:15.2 subsystem <- 8086/a0ea
1555 18:01:32.085637 PCI: 00:15.2 cmd <- 02
1556 18:01:32.088570 PCI: 00:15.3 subsystem <- 8086/a0eb
1557 18:01:32.092243 PCI: 00:15.3 cmd <- 02
1558 18:01:32.095436 PCI: 00:16.0 subsystem <- 8086/a0e0
1559 18:01:32.098533 PCI: 00:16.0 cmd <- 02
1560 18:01:32.102290 PCI: 00:19.1 subsystem <- 8086/a0c6
1561 18:01:32.105250 PCI: 00:19.1 cmd <- 02
1562 18:01:32.108965 PCI: 00:1d.0 bridge ctrl <- 0013
1563 18:01:32.111915 PCI: 00:1d.0 subsystem <- 8086/a0b0
1564 18:01:32.111997 PCI: 00:1d.0 cmd <- 06
1565 18:01:32.118640 PCI: 00:1e.0 subsystem <- 8086/a0a8
1566 18:01:32.118711 PCI: 00:1e.0 cmd <- 06
1567 18:01:32.122292 PCI: 00:1e.2 subsystem <- 8086/a0aa
1568 18:01:32.125315 PCI: 00:1e.2 cmd <- 06
1569 18:01:32.128634 PCI: 00:1e.3 subsystem <- 8086/a0ab
1570 18:01:32.132103 PCI: 00:1e.3 cmd <- 02
1571 18:01:32.135500 PCI: 00:1f.0 subsystem <- 8086/a087
1572 18:01:32.138891 PCI: 00:1f.0 cmd <- 407
1573 18:01:32.142400 PCI: 00:1f.3 subsystem <- 8086/a0c8
1574 18:01:32.145413 PCI: 00:1f.3 cmd <- 02
1575 18:01:32.148827 PCI: 00:1f.5 subsystem <- 8086/a0a4
1576 18:01:32.152518 PCI: 00:1f.5 cmd <- 406
1577 18:01:32.155565 PCI: 01:00.0 cmd <- 02
1578 18:01:32.159929 done.
1579 18:01:32.163523 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1580 18:01:32.166558 Initializing devices...
1581 18:01:32.170115 Root Device init
1582 18:01:32.173217 Chrome EC: Set SMI mask to 0x0000000000000000
1583 18:01:32.179839 Chrome EC: clear events_b mask to 0x0000000000000000
1584 18:01:32.186521 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1585 18:01:32.189576 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1586 18:01:32.196947 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1587 18:01:32.203405 Chrome EC: Set WAKE mask to 0x0000000000000000
1588 18:01:32.206693 fw_config match found: DB_USB=USB3_ACTIVE
1589 18:01:32.213298 Configure Right Type-C port orientation for retimer
1590 18:01:32.216887 Root Device init finished in 44 msecs
1591 18:01:32.219840 PCI: 00:00.0 init
1592 18:01:32.223181 CPU TDP = 9 Watts
1593 18:01:32.223264 CPU PL1 = 9 Watts
1594 18:01:32.226870 CPU PL2 = 40 Watts
1595 18:01:32.229949 CPU PL4 = 83 Watts
1596 18:01:32.233227 PCI: 00:00.0 init finished in 8 msecs
1597 18:01:32.233301 PCI: 00:02.0 init
1598 18:01:32.236581 GMA: Found VBT in CBFS
1599 18:01:32.240408 GMA: Found valid VBT in CBFS
1600 18:01:32.246991 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1601 18:01:32.253442 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1602 18:01:32.256669 PCI: 00:02.0 init finished in 18 msecs
1603 18:01:32.260289 PCI: 00:05.0 init
1604 18:01:32.263697 PCI: 00:05.0 init finished in 0 msecs
1605 18:01:32.266649 PCI: 00:08.0 init
1606 18:01:32.270086 PCI: 00:08.0 init finished in 0 msecs
1607 18:01:32.273722 PCI: 00:14.0 init
1608 18:01:32.276761 PCI: 00:14.0 init finished in 0 msecs
1609 18:01:32.276842 PCI: 00:14.2 init
1610 18:01:32.283408 PCI: 00:14.2 init finished in 0 msecs
1611 18:01:32.283488 PCI: 00:15.0 init
1612 18:01:32.286911 I2C bus 0 version 0x3230302a
1613 18:01:32.290099 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1614 18:01:32.296556 PCI: 00:15.0 init finished in 6 msecs
1615 18:01:32.296640 PCI: 00:15.1 init
1616 18:01:32.300268 I2C bus 1 version 0x3230302a
1617 18:01:32.303214 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1618 18:01:32.306883 PCI: 00:15.1 init finished in 6 msecs
1619 18:01:32.309891 PCI: 00:15.2 init
1620 18:01:32.313646 I2C bus 2 version 0x3230302a
1621 18:01:32.316722 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1622 18:01:32.320331 PCI: 00:15.2 init finished in 6 msecs
1623 18:01:32.323684 PCI: 00:15.3 init
1624 18:01:32.327176 I2C bus 3 version 0x3230302a
1625 18:01:32.330302 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1626 18:01:32.333346 PCI: 00:15.3 init finished in 6 msecs
1627 18:01:32.336642 PCI: 00:16.0 init
1628 18:01:32.340133 PCI: 00:16.0 init finished in 0 msecs
1629 18:01:32.340210 PCI: 00:19.1 init
1630 18:01:32.343555 I2C bus 5 version 0x3230302a
1631 18:01:32.346637 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1632 18:01:32.353485 PCI: 00:19.1 init finished in 6 msecs
1633 18:01:32.353560 PCI: 00:1d.0 init
1634 18:01:32.357234 Initializing PCH PCIe bridge.
1635 18:01:32.360238 PCI: 00:1d.0 init finished in 3 msecs
1636 18:01:32.363677 PCI: 00:1f.0 init
1637 18:01:32.367106 IOAPIC: Initializing IOAPIC at 0xfec00000
1638 18:01:32.374264 IOAPIC: Bootstrap Processor Local APIC = 0x00
1639 18:01:32.374352 IOAPIC: ID = 0x02
1640 18:01:32.377525 IOAPIC: Dumping registers
1641 18:01:32.380511 reg 0x0000: 0x02000000
1642 18:01:32.384142 reg 0x0001: 0x00770020
1643 18:01:32.384225 reg 0x0002: 0x00000000
1644 18:01:32.390877 PCI: 00:1f.0 init finished in 21 msecs
1645 18:01:32.390958 PCI: 00:1f.2 init
1646 18:01:32.393865 Disabling ACPI via APMC.
1647 18:01:32.397613 APMC done.
1648 18:01:32.401253 PCI: 00:1f.2 init finished in 5 msecs
1649 18:01:32.412698 PCI: 01:00.0 init
1650 18:01:32.416403 PCI: 01:00.0 init finished in 0 msecs
1651 18:01:32.419640 PNP: 0c09.0 init
1652 18:01:32.423120 Google Chrome EC uptime: 8.411 seconds
1653 18:01:32.429315 Google Chrome AP resets since EC boot: 1
1654 18:01:32.432921 Google Chrome most recent AP reset causes:
1655 18:01:32.435973 0.350: 32775 shutdown: entering G3
1656 18:01:32.442739 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1657 18:01:32.446102 PNP: 0c09.0 init finished in 22 msecs
1658 18:01:32.451573 Devices initialized
1659 18:01:32.454941 Show all devs... After init.
1660 18:01:32.458315 Root Device: enabled 1
1661 18:01:32.458409 DOMAIN: 0000: enabled 1
1662 18:01:32.461534 CPU_CLUSTER: 0: enabled 1
1663 18:01:32.465010 PCI: 00:00.0: enabled 1
1664 18:01:32.468090 PCI: 00:02.0: enabled 1
1665 18:01:32.468165 PCI: 00:04.0: enabled 1
1666 18:01:32.471613 PCI: 00:05.0: enabled 1
1667 18:01:32.475344 PCI: 00:06.0: enabled 0
1668 18:01:32.478378 PCI: 00:07.0: enabled 0
1669 18:01:32.478460 PCI: 00:07.1: enabled 0
1670 18:01:32.482087 PCI: 00:07.2: enabled 0
1671 18:01:32.485033 PCI: 00:07.3: enabled 0
1672 18:01:32.488382 PCI: 00:08.0: enabled 1
1673 18:01:32.488465 PCI: 00:09.0: enabled 0
1674 18:01:32.492026 PCI: 00:0a.0: enabled 0
1675 18:01:32.495359 PCI: 00:0d.0: enabled 1
1676 18:01:32.495448 PCI: 00:0d.1: enabled 0
1677 18:01:32.498131 PCI: 00:0d.2: enabled 0
1678 18:01:32.501694 PCI: 00:0d.3: enabled 0
1679 18:01:32.504917 PCI: 00:0e.0: enabled 0
1680 18:01:32.504990 PCI: 00:10.2: enabled 1
1681 18:01:32.508631 PCI: 00:10.6: enabled 0
1682 18:01:32.511878 PCI: 00:10.7: enabled 0
1683 18:01:32.515349 PCI: 00:12.0: enabled 0
1684 18:01:32.515422 PCI: 00:12.6: enabled 0
1685 18:01:32.518256 PCI: 00:13.0: enabled 0
1686 18:01:32.522051 PCI: 00:14.0: enabled 1
1687 18:01:32.522136 PCI: 00:14.1: enabled 0
1688 18:01:32.525029 PCI: 00:14.2: enabled 1
1689 18:01:32.528637 PCI: 00:14.3: enabled 1
1690 18:01:32.531724 PCI: 00:15.0: enabled 1
1691 18:01:32.531796 PCI: 00:15.1: enabled 1
1692 18:01:32.535511 PCI: 00:15.2: enabled 1
1693 18:01:32.538418 PCI: 00:15.3: enabled 1
1694 18:01:32.541586 PCI: 00:16.0: enabled 1
1695 18:01:32.541656 PCI: 00:16.1: enabled 0
1696 18:01:32.545190 PCI: 00:16.2: enabled 0
1697 18:01:32.548257 PCI: 00:16.3: enabled 0
1698 18:01:32.551899 PCI: 00:16.4: enabled 0
1699 18:01:32.552035 PCI: 00:16.5: enabled 0
1700 18:01:32.554922 PCI: 00:17.0: enabled 0
1701 18:01:32.558657 PCI: 00:19.0: enabled 0
1702 18:01:32.561500 PCI: 00:19.1: enabled 1
1703 18:01:32.561578 PCI: 00:19.2: enabled 0
1704 18:01:32.565057 PCI: 00:1c.0: enabled 1
1705 18:01:32.568517 PCI: 00:1c.1: enabled 0
1706 18:01:32.568595 PCI: 00:1c.2: enabled 0
1707 18:01:32.571801 PCI: 00:1c.3: enabled 0
1708 18:01:32.574899 PCI: 00:1c.4: enabled 0
1709 18:01:32.578363 PCI: 00:1c.5: enabled 0
1710 18:01:32.578443 PCI: 00:1c.6: enabled 1
1711 18:01:32.581738 PCI: 00:1c.7: enabled 0
1712 18:01:32.584904 PCI: 00:1d.0: enabled 1
1713 18:01:32.588577 PCI: 00:1d.1: enabled 0
1714 18:01:32.588653 PCI: 00:1d.2: enabled 1
1715 18:01:32.591619 PCI: 00:1d.3: enabled 0
1716 18:01:32.594878 PCI: 00:1e.0: enabled 1
1717 18:01:32.598441 PCI: 00:1e.1: enabled 0
1718 18:01:32.598510 PCI: 00:1e.2: enabled 1
1719 18:01:32.601520 PCI: 00:1e.3: enabled 1
1720 18:01:32.604918 PCI: 00:1f.0: enabled 1
1721 18:01:32.604987 PCI: 00:1f.1: enabled 0
1722 18:01:32.608356 PCI: 00:1f.2: enabled 1
1723 18:01:32.611676 PCI: 00:1f.3: enabled 1
1724 18:01:32.615058 PCI: 00:1f.4: enabled 0
1725 18:01:32.615134 PCI: 00:1f.5: enabled 1
1726 18:01:32.618301 PCI: 00:1f.6: enabled 0
1727 18:01:32.621306 PCI: 00:1f.7: enabled 0
1728 18:01:32.621380 APIC: 00: enabled 1
1729 18:01:32.624925 GENERIC: 0.0: enabled 1
1730 18:01:32.628043 GENERIC: 0.0: enabled 1
1731 18:01:32.631454 GENERIC: 1.0: enabled 1
1732 18:01:32.631534 GENERIC: 0.0: enabled 1
1733 18:01:32.634929 GENERIC: 1.0: enabled 1
1734 18:01:32.638575 USB0 port 0: enabled 1
1735 18:01:32.641653 GENERIC: 0.0: enabled 1
1736 18:01:32.641732 USB0 port 0: enabled 1
1737 18:01:32.645504 GENERIC: 0.0: enabled 1
1738 18:01:32.648460 I2C: 00:1a: enabled 1
1739 18:01:32.648540 I2C: 00:31: enabled 1
1740 18:01:32.651622 I2C: 00:32: enabled 1
1741 18:01:32.655228 I2C: 00:10: enabled 1
1742 18:01:32.655307 I2C: 00:15: enabled 1
1743 18:01:32.658216 GENERIC: 0.0: enabled 0
1744 18:01:32.661783 GENERIC: 1.0: enabled 0
1745 18:01:32.664829 GENERIC: 0.0: enabled 1
1746 18:01:32.664908 SPI: 00: enabled 1
1747 18:01:32.668408 SPI: 00: enabled 1
1748 18:01:32.668487 PNP: 0c09.0: enabled 1
1749 18:01:32.671393 GENERIC: 0.0: enabled 1
1750 18:01:32.675097 USB3 port 0: enabled 1
1751 18:01:32.678267 USB3 port 1: enabled 1
1752 18:01:32.678358 USB3 port 2: enabled 0
1753 18:01:32.681758 USB3 port 3: enabled 0
1754 18:01:32.684863 USB2 port 0: enabled 0
1755 18:01:32.684937 USB2 port 1: enabled 1
1756 18:01:32.688161 USB2 port 2: enabled 1
1757 18:01:32.691291 USB2 port 3: enabled 0
1758 18:01:32.694914 USB2 port 4: enabled 1
1759 18:01:32.694988 USB2 port 5: enabled 0
1760 18:01:32.697874 USB2 port 6: enabled 0
1761 18:01:32.701879 USB2 port 7: enabled 0
1762 18:01:32.701958 USB2 port 8: enabled 0
1763 18:01:32.704893 USB2 port 9: enabled 0
1764 18:01:32.707792 USB3 port 0: enabled 0
1765 18:01:32.707928 USB3 port 1: enabled 1
1766 18:01:32.711387 USB3 port 2: enabled 0
1767 18:01:32.715010 USB3 port 3: enabled 0
1768 18:01:32.717986 GENERIC: 0.0: enabled 1
1769 18:01:32.718066 GENERIC: 1.0: enabled 1
1770 18:01:32.721687 APIC: 01: enabled 1
1771 18:01:32.724721 APIC: 03: enabled 1
1772 18:01:32.724791 APIC: 06: enabled 1
1773 18:01:32.728165 APIC: 05: enabled 1
1774 18:01:32.728236 APIC: 04: enabled 1
1775 18:01:32.731650 APIC: 02: enabled 1
1776 18:01:32.734960 APIC: 07: enabled 1
1777 18:01:32.735032 PCI: 01:00.0: enabled 1
1778 18:01:32.741794 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1779 18:01:32.744819 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1780 18:01:32.751256 ELOG: NV offset 0xf30000 size 0x1000
1781 18:01:32.758003 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1782 18:01:32.764488 ELOG: Event(17) added with size 13 at 2023-08-30 18:01:31 UTC
1783 18:01:32.771212 ELOG: Event(92) added with size 9 at 2023-08-30 18:01:31 UTC
1784 18:01:32.777803 ELOG: Event(93) added with size 9 at 2023-08-30 18:01:31 UTC
1785 18:01:32.784663 ELOG: Event(9E) added with size 10 at 2023-08-30 18:01:31 UTC
1786 18:01:32.791464 ELOG: Event(9F) added with size 14 at 2023-08-30 18:01:31 UTC
1787 18:01:32.794996 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1788 18:01:32.801842 ELOG: Event(A1) added with size 10 at 2023-08-30 18:01:31 UTC
1789 18:01:32.808352 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1790 18:01:32.814868 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1791 18:01:32.814944 Finalize devices...
1792 18:01:32.818168 Devices finalized
1793 18:01:32.824789 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1794 18:01:32.828510 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1795 18:01:32.835089 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1796 18:01:32.838148 ME: HFSTS1 : 0x80030055
1797 18:01:32.841617 ME: HFSTS2 : 0x30280116
1798 18:01:32.848166 ME: HFSTS3 : 0x00000050
1799 18:01:32.851633 ME: HFSTS4 : 0x00004000
1800 18:01:32.858245 ME: HFSTS5 : 0x00000000
1801 18:01:32.861934 ME: HFSTS6 : 0x00400006
1802 18:01:32.864897 ME: Manufacturing Mode : YES
1803 18:01:32.868447 ME: SPI Protection Mode Enabled : NO
1804 18:01:32.871459 ME: FW Partition Table : OK
1805 18:01:32.875111 ME: Bringup Loader Failure : NO
1806 18:01:32.878061 ME: Firmware Init Complete : NO
1807 18:01:32.884883 ME: Boot Options Present : NO
1808 18:01:32.888449 ME: Update In Progress : NO
1809 18:01:32.891538 ME: D0i3 Support : YES
1810 18:01:32.895171 ME: Low Power State Enabled : NO
1811 18:01:32.898139 ME: CPU Replaced : YES
1812 18:01:32.901308 ME: CPU Replacement Valid : YES
1813 18:01:32.904857 ME: Current Working State : 5
1814 18:01:32.907973 ME: Current Operation State : 1
1815 18:01:32.914592 ME: Current Operation Mode : 3
1816 18:01:32.918183 ME: Error Code : 0
1817 18:01:32.921049 ME: Enhanced Debug Mode : NO
1818 18:01:32.924382 ME: CPU Debug Disabled : YES
1819 18:01:32.928023 ME: TXT Support : NO
1820 18:01:32.934578 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1821 18:01:32.941304 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1822 18:01:32.944993 CBFS: 'fallback/slic' not found.
1823 18:01:32.948072 ACPI: Writing ACPI tables at 76b01000.
1824 18:01:32.951452 ACPI: * FACS
1825 18:01:32.951531 ACPI: * DSDT
1826 18:01:32.954467 Ramoops buffer: 0x100000@0x76a00000.
1827 18:01:32.961210 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1828 18:01:32.964813 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1829 18:01:32.968918 Google Chrome EC: version:
1830 18:01:32.971843 ro: voema_v2.0.7540-147f8d37d1
1831 18:01:32.975283 rw: voema_v2.0.7540-147f8d37d1
1832 18:01:32.978734 running image: 2
1833 18:01:32.985701 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1834 18:01:32.988769 ACPI: * FADT
1835 18:01:32.988849 SCI is IRQ9
1836 18:01:32.992496 ACPI: added table 1/32, length now 40
1837 18:01:32.995475 ACPI: * SSDT
1838 18:01:32.998924 Found 1 CPU(s) with 8 core(s) each.
1839 18:01:33.002111 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1840 18:01:33.008874 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1841 18:01:33.011868 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1842 18:01:33.015596 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1843 18:01:33.022336 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1844 18:01:33.025441 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1845 18:01:33.032191 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1846 18:01:33.035615 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1847 18:01:33.045516 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1848 18:01:33.049193 \_SB.PCI0.RP09: Added StorageD3Enable property
1849 18:01:33.052157 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1850 18:01:33.055840 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1851 18:01:33.063794 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1852 18:01:33.066630 PS2K: Passing 80 keymaps to kernel
1853 18:01:33.073826 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1854 18:01:33.080064 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1855 18:01:33.086960 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1856 18:01:33.093349 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1857 18:01:33.099928 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1858 18:01:33.106501 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1859 18:01:33.113233 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1860 18:01:33.120010 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1861 18:01:33.123610 ACPI: added table 2/32, length now 44
1862 18:01:33.123686 ACPI: * MCFG
1863 18:01:33.130173 ACPI: added table 3/32, length now 48
1864 18:01:33.130250 ACPI: * TPM2
1865 18:01:33.133245 TPM2 log created at 0x769f0000
1866 18:01:33.137012 ACPI: added table 4/32, length now 52
1867 18:01:33.140402 ACPI: * MADT
1868 18:01:33.140477 SCI is IRQ9
1869 18:01:33.143188 ACPI: added table 5/32, length now 56
1870 18:01:33.146881 current = 76b09850
1871 18:01:33.147011 ACPI: * DMAR
1872 18:01:33.149956 ACPI: added table 6/32, length now 60
1873 18:01:33.156731 ACPI: added table 7/32, length now 64
1874 18:01:33.156827 ACPI: * HPET
1875 18:01:33.160262 ACPI: added table 8/32, length now 68
1876 18:01:33.163677 ACPI: done.
1877 18:01:33.163756 ACPI tables: 35216 bytes.
1878 18:01:33.166806 smbios_write_tables: 769ef000
1879 18:01:33.169960 EC returned error result code 3
1880 18:01:33.173367 Couldn't obtain OEM name from CBI
1881 18:01:33.177258 Create SMBIOS type 16
1882 18:01:33.180635 Create SMBIOS type 17
1883 18:01:33.183869 GENERIC: 0.0 (WIFI Device)
1884 18:01:33.183983 SMBIOS tables: 1750 bytes.
1885 18:01:33.190673 Writing table forward entry at 0x00000500
1886 18:01:33.197148 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1887 18:01:33.200895 Writing coreboot table at 0x76b25000
1888 18:01:33.207294 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1889 18:01:33.210956 1. 0000000000001000-000000000009ffff: RAM
1890 18:01:33.214013 2. 00000000000a0000-00000000000fffff: RESERVED
1891 18:01:33.220693 3. 0000000000100000-00000000769eefff: RAM
1892 18:01:33.223811 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1893 18:01:33.230437 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1894 18:01:33.237135 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1895 18:01:33.240892 7. 0000000077000000-000000007fbfffff: RESERVED
1896 18:01:33.243850 8. 00000000c0000000-00000000cfffffff: RESERVED
1897 18:01:33.250552 9. 00000000f8000000-00000000f9ffffff: RESERVED
1898 18:01:33.254180 10. 00000000fb000000-00000000fb000fff: RESERVED
1899 18:01:33.260311 11. 00000000fe000000-00000000fe00ffff: RESERVED
1900 18:01:33.263446 12. 00000000fed80000-00000000fed87fff: RESERVED
1901 18:01:33.270076 13. 00000000fed90000-00000000fed92fff: RESERVED
1902 18:01:33.273675 14. 00000000feda0000-00000000feda1fff: RESERVED
1903 18:01:33.280195 15. 00000000fedc0000-00000000feddffff: RESERVED
1904 18:01:33.283741 16. 0000000100000000-00000002803fffff: RAM
1905 18:01:33.286653 Passing 4 GPIOs to payload:
1906 18:01:33.290076 NAME | PORT | POLARITY | VALUE
1907 18:01:33.296899 lid | undefined | high | high
1908 18:01:33.300477 power | undefined | high | low
1909 18:01:33.306816 oprom | undefined | high | low
1910 18:01:33.313621 EC in RW | 0x000000e5 | high | high
1911 18:01:33.320298 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 2988
1912 18:01:33.320474 coreboot table: 1576 bytes.
1913 18:01:33.326950 IMD ROOT 0. 0x76fff000 0x00001000
1914 18:01:33.330531 IMD SMALL 1. 0x76ffe000 0x00001000
1915 18:01:33.333416 FSP MEMORY 2. 0x76c4e000 0x003b0000
1916 18:01:33.337271 VPD 3. 0x76c4d000 0x00000367
1917 18:01:33.340225 RO MCACHE 4. 0x76c4c000 0x00000fdc
1918 18:01:33.343881 CONSOLE 5. 0x76c2c000 0x00020000
1919 18:01:33.347099 FMAP 6. 0x76c2b000 0x00000578
1920 18:01:33.350497 TIME STAMP 7. 0x76c2a000 0x00000910
1921 18:01:33.354184 VBOOT WORK 8. 0x76c16000 0x00014000
1922 18:01:33.360214 ROMSTG STCK 9. 0x76c15000 0x00001000
1923 18:01:33.363764 AFTER CAR 10. 0x76c0a000 0x0000b000
1924 18:01:33.367432 RAMSTAGE 11. 0x76b97000 0x00073000
1925 18:01:33.370518 REFCODE 12. 0x76b42000 0x00055000
1926 18:01:33.373500 SMM BACKUP 13. 0x76b32000 0x00010000
1927 18:01:33.377063 4f444749 14. 0x76b30000 0x00002000
1928 18:01:33.380593 EXT VBT15. 0x76b2d000 0x0000219f
1929 18:01:33.436599 COREBOOT 16. 0x76b25000 0x00008000
1930 18:01:33.436714 ACPI 17. 0x76b01000 0x00024000
1931 18:01:33.436780 ACPI GNVS 18. 0x76b00000 0x00001000
1932 18:01:33.436842 RAMOOPS 19. 0x76a00000 0x00100000
1933 18:01:33.436901 TPM2 TCGLOG20. 0x769f0000 0x00010000
1934 18:01:33.436960 SMBIOS 21. 0x769ef000 0x00000800
1935 18:01:33.437028 IMD small region:
1936 18:01:33.437088 IMD ROOT 0. 0x76ffec00 0x00000400
1937 18:01:33.437144 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1938 18:01:33.437199 POWER STATE 2. 0x76ffeb80 0x00000044
1939 18:01:33.437254 ROMSTAGE 3. 0x76ffeb60 0x00000004
1940 18:01:33.437309 MEM INFO 4. 0x76ffe980 0x000001e0
1941 18:01:33.437420 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1942 18:01:33.437506 MTRR: Physical address space:
1943 18:01:33.480092 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1944 18:01:33.480259 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1945 18:01:33.480360 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1946 18:01:33.480453 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1947 18:01:33.480540 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1948 18:01:33.480626 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1949 18:01:33.480914 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1950 18:01:33.524156 MTRR: Fixed MSR 0x250 0x0606060606060606
1951 18:01:33.524474 MTRR: Fixed MSR 0x258 0x0606060606060606
1952 18:01:33.524689 MTRR: Fixed MSR 0x259 0x0000000000000000
1953 18:01:33.524892 MTRR: Fixed MSR 0x268 0x0606060606060606
1954 18:01:33.525096 MTRR: Fixed MSR 0x269 0x0606060606060606
1955 18:01:33.525290 MTRR: Fixed MSR 0x26a 0x0606060606060606
1956 18:01:33.525489 MTRR: Fixed MSR 0x26b 0x0606060606060606
1957 18:01:33.525682 MTRR: Fixed MSR 0x26c 0x0606060606060606
1958 18:01:33.526107 MTRR: Fixed MSR 0x26d 0x0606060606060606
1959 18:01:33.526311 MTRR: Fixed MSR 0x26e 0x0606060606060606
1960 18:01:33.526500 MTRR: Fixed MSR 0x26f 0x0606060606060606
1961 18:01:33.572064 call enable_fixed_mtrr()
1962 18:01:33.572233 CPU physical address size: 39 bits
1963 18:01:33.572307 MTRR: default type WB/UC MTRR counts: 6/6.
1964 18:01:33.572373 MTRR: UC selected as default type.
1965 18:01:33.572437 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1966 18:01:33.572500 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1967 18:01:33.572560 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1968 18:01:33.572623 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1969 18:01:33.572683 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1970 18:01:33.616075 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1971 18:01:33.616468
1972 18:01:33.616749 MTRR check
1973 18:01:33.617009 Fixed MTRRs : Enabled
1974 18:01:33.617326 Variable MTRRs: Enabled
1975 18:01:33.617681
1976 18:01:33.618082 MTRR: Fixed MSR 0x250 0x0606060606060606
1977 18:01:33.618375 MTRR: Fixed MSR 0x258 0x0606060606060606
1978 18:01:33.618651 MTRR: Fixed MSR 0x259 0x0000000000000000
1979 18:01:33.619201 MTRR: Fixed MSR 0x268 0x0606060606060606
1980 18:01:33.619551 MTRR: Fixed MSR 0x269 0x0606060606060606
1981 18:01:33.619882 MTRR: Fixed MSR 0x26a 0x0606060606060606
1982 18:01:33.620282 MTRR: Fixed MSR 0x26b 0x0606060606060606
1983 18:01:33.620487 MTRR: Fixed MSR 0x26c 0x0606060606060606
1984 18:01:33.620684 MTRR: Fixed MSR 0x26d 0x0606060606060606
1985 18:01:33.624868 MTRR: Fixed MSR 0x26e 0x0606060606060606
1986 18:01:33.628676 MTRR: Fixed MSR 0x26f 0x0606060606060606
1987 18:01:33.635135 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1988 18:01:33.638259 call enable_fixed_mtrr()
1989 18:01:33.641609 Checking cr50 for pending updates
1990 18:01:33.646280 CPU physical address size: 39 bits
1991 18:01:33.649739 MTRR: Fixed MSR 0x250 0x0606060606060606
1992 18:01:33.652806 MTRR: Fixed MSR 0x250 0x0606060606060606
1993 18:01:33.656528 MTRR: Fixed MSR 0x258 0x0606060606060606
1994 18:01:33.659463 MTRR: Fixed MSR 0x259 0x0000000000000000
1995 18:01:33.666213 MTRR: Fixed MSR 0x268 0x0606060606060606
1996 18:01:33.669644 MTRR: Fixed MSR 0x269 0x0606060606060606
1997 18:01:33.672602 MTRR: Fixed MSR 0x26a 0x0606060606060606
1998 18:01:33.675957 MTRR: Fixed MSR 0x26b 0x0606060606060606
1999 18:01:33.682800 MTRR: Fixed MSR 0x26c 0x0606060606060606
2000 18:01:33.685935 MTRR: Fixed MSR 0x26d 0x0606060606060606
2001 18:01:33.689645 MTRR: Fixed MSR 0x26e 0x0606060606060606
2002 18:01:33.692364 MTRR: Fixed MSR 0x26f 0x0606060606060606
2003 18:01:33.699549 MTRR: Fixed MSR 0x258 0x0606060606060606
2004 18:01:33.699704 call enable_fixed_mtrr()
2005 18:01:33.706614 MTRR: Fixed MSR 0x259 0x0000000000000000
2006 18:01:33.709607 MTRR: Fixed MSR 0x268 0x0606060606060606
2007 18:01:33.712688 MTRR: Fixed MSR 0x269 0x0606060606060606
2008 18:01:33.716299 MTRR: Fixed MSR 0x26a 0x0606060606060606
2009 18:01:33.722777 MTRR: Fixed MSR 0x26b 0x0606060606060606
2010 18:01:33.726586 MTRR: Fixed MSR 0x26c 0x0606060606060606
2011 18:01:33.729537 MTRR: Fixed MSR 0x26d 0x0606060606060606
2012 18:01:33.733135 MTRR: Fixed MSR 0x26e 0x0606060606060606
2013 18:01:33.736203 MTRR: Fixed MSR 0x26f 0x0606060606060606
2014 18:01:33.742843 CPU physical address size: 39 bits
2015 18:01:33.746468 call enable_fixed_mtrr()
2016 18:01:33.751782 Reading cr50 TPM mode
2017 18:01:33.751964 MTRR: Fixed MSR 0x250 0x0606060606060606
2018 18:01:33.755098 MTRR: Fixed MSR 0x250 0x0606060606060606
2019 18:01:33.761925 MTRR: Fixed MSR 0x258 0x0606060606060606
2020 18:01:33.764807 MTRR: Fixed MSR 0x259 0x0000000000000000
2021 18:01:33.768469 MTRR: Fixed MSR 0x268 0x0606060606060606
2022 18:01:33.771432 MTRR: Fixed MSR 0x269 0x0606060606060606
2023 18:01:33.778371 MTRR: Fixed MSR 0x26a 0x0606060606060606
2024 18:01:33.781674 MTRR: Fixed MSR 0x26b 0x0606060606060606
2025 18:01:33.785115 MTRR: Fixed MSR 0x26c 0x0606060606060606
2026 18:01:33.788257 MTRR: Fixed MSR 0x26d 0x0606060606060606
2027 18:01:33.795171 MTRR: Fixed MSR 0x26e 0x0606060606060606
2028 18:01:33.798595 MTRR: Fixed MSR 0x26f 0x0606060606060606
2029 18:01:33.801681 MTRR: Fixed MSR 0x258 0x0606060606060606
2030 18:01:33.805364 call enable_fixed_mtrr()
2031 18:01:33.808412 MTRR: Fixed MSR 0x259 0x0000000000000000
2032 18:01:33.814955 MTRR: Fixed MSR 0x268 0x0606060606060606
2033 18:01:33.818347 MTRR: Fixed MSR 0x269 0x0606060606060606
2034 18:01:33.821704 MTRR: Fixed MSR 0x26a 0x0606060606060606
2035 18:01:33.824800 MTRR: Fixed MSR 0x26b 0x0606060606060606
2036 18:01:33.828534 MTRR: Fixed MSR 0x26c 0x0606060606060606
2037 18:01:33.835224 MTRR: Fixed MSR 0x26d 0x0606060606060606
2038 18:01:33.838644 MTRR: Fixed MSR 0x26e 0x0606060606060606
2039 18:01:33.841652 MTRR: Fixed MSR 0x26f 0x0606060606060606
2040 18:01:33.844942 CPU physical address size: 39 bits
2041 18:01:33.851609 call enable_fixed_mtrr()
2042 18:01:33.854547 MTRR: Fixed MSR 0x250 0x0606060606060606
2043 18:01:33.857888 MTRR: Fixed MSR 0x250 0x0606060606060606
2044 18:01:33.861284 MTRR: Fixed MSR 0x258 0x0606060606060606
2045 18:01:33.867844 MTRR: Fixed MSR 0x259 0x0000000000000000
2046 18:01:33.871579 MTRR: Fixed MSR 0x268 0x0606060606060606
2047 18:01:33.874673 MTRR: Fixed MSR 0x269 0x0606060606060606
2048 18:01:33.878309 MTRR: Fixed MSR 0x26a 0x0606060606060606
2049 18:01:33.881329 MTRR: Fixed MSR 0x26b 0x0606060606060606
2050 18:01:33.887805 MTRR: Fixed MSR 0x26c 0x0606060606060606
2051 18:01:33.891573 MTRR: Fixed MSR 0x26d 0x0606060606060606
2052 18:01:33.894564 MTRR: Fixed MSR 0x26e 0x0606060606060606
2053 18:01:33.897829 MTRR: Fixed MSR 0x26f 0x0606060606060606
2054 18:01:33.905444 MTRR: Fixed MSR 0x258 0x0606060606060606
2055 18:01:33.905605 call enable_fixed_mtrr()
2056 18:01:33.912512 MTRR: Fixed MSR 0x259 0x0000000000000000
2057 18:01:33.916064 MTRR: Fixed MSR 0x268 0x0606060606060606
2058 18:01:33.919406 MTRR: Fixed MSR 0x269 0x0606060606060606
2059 18:01:33.922391 MTRR: Fixed MSR 0x26a 0x0606060606060606
2060 18:01:33.928944 MTRR: Fixed MSR 0x26b 0x0606060606060606
2061 18:01:33.932689 MTRR: Fixed MSR 0x26c 0x0606060606060606
2062 18:01:33.935740 MTRR: Fixed MSR 0x26d 0x0606060606060606
2063 18:01:33.939473 MTRR: Fixed MSR 0x26e 0x0606060606060606
2064 18:01:33.942450 MTRR: Fixed MSR 0x26f 0x0606060606060606
2065 18:01:33.949031 CPU physical address size: 39 bits
2066 18:01:33.952650 call enable_fixed_mtrr()
2067 18:01:33.955646 CPU physical address size: 39 bits
2068 18:01:33.959081 CPU physical address size: 39 bits
2069 18:01:33.962553 CPU physical address size: 39 bits
2070 18:01:33.968967 BS: BS_PAYLOAD_LOAD entry times (exec / console): 112 / 6 ms
2071 18:01:33.975559 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2072 18:01:33.982042 Checking segment from ROM address 0xffc02b38
2073 18:01:33.985678 Checking segment from ROM address 0xffc02b54
2074 18:01:33.989173 Loading segment from ROM address 0xffc02b38
2075 18:01:33.992091 code (compression=0)
2076 18:01:34.002401 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2077 18:01:34.009195 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2078 18:01:34.012263 it's not compressed!
2079 18:01:34.150839 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2080 18:01:34.157362 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2081 18:01:34.164132 Loading segment from ROM address 0xffc02b54
2082 18:01:34.164221 Entry Point 0x30000000
2083 18:01:34.167215 Loaded segments
2084 18:01:34.173914 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2085 18:01:34.216717 Finalizing chipset.
2086 18:01:34.220035 Finalizing SMM.
2087 18:01:34.220139 APMC done.
2088 18:01:34.226410 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2089 18:01:34.229546 mp_park_aps done after 0 msecs.
2090 18:01:34.233108 Jumping to boot code at 0x30000000(0x76b25000)
2091 18:01:34.242840 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2092 18:01:34.242945
2093 18:01:34.243036
2094 18:01:34.243126
2095 18:01:34.246386 Starting depthcharge on Voema...
2096 18:01:34.246479
2097 18:01:34.246891 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2098 18:01:34.247021 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2099 18:01:34.247130 Setting prompt string to ['volteer:']
2100 18:01:34.247237 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2101 18:01:34.256006 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2102 18:01:34.256109
2103 18:01:34.263018 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2104 18:01:34.263118
2105 18:01:34.269732 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2106 18:01:34.269832
2107 18:01:34.272773 Failed to find eMMC card reader
2108 18:01:34.272874
2109 18:01:34.272966 Wipe memory regions:
2110 18:01:34.273053
2111 18:01:34.279518 [0x00000000001000, 0x000000000a0000)
2112 18:01:34.279668
2113 18:01:34.283138 [0x00000000100000, 0x00000030000000)
2114 18:01:34.308094
2115 18:01:34.311646 [0x00000032662db0, 0x000000769ef000)
2116 18:01:34.347428
2117 18:01:34.350868 [0x00000100000000, 0x00000280400000)
2118 18:01:34.552433
2119 18:01:34.555206 ec_init: CrosEC protocol v3 supported (256, 256)
2120 18:01:34.555285
2121 18:01:34.561864 update_port_state: port C0 state: usb enable 1 mux conn 0
2122 18:01:34.561961
2123 18:01:34.572205 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2124 18:01:34.572299
2125 18:01:34.575162 pmc_check_ipc_sts: STS_BUSY done after 1561 us
2126 18:01:34.578409
2127 18:01:34.582096 send_conn_disc_msg: pmc_send_cmd succeeded
2128 18:01:35.013038
2129 18:01:35.013196 R8152: Initializing
2130 18:01:35.013290
2131 18:01:35.016019 Version 6 (ocp_data = 5c30)
2132 18:01:35.016105
2133 18:01:35.019374 R8152: Done initializing
2134 18:01:35.019461
2135 18:01:35.023089 Adding net device
2136 18:01:35.325715
2137 18:01:35.328665 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2138 18:01:35.328751
2139 18:01:35.328835
2140 18:01:35.328916
2141 18:01:35.332515 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2143 18:01:35.432897 volteer: tftpboot 192.168.201.1 11385840/tftp-deploy-xxjolq3l/kernel/bzImage 11385840/tftp-deploy-xxjolq3l/kernel/cmdline 11385840/tftp-deploy-xxjolq3l/ramdisk/ramdisk.cpio.gz
2144 18:01:35.433062 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2145 18:01:35.433159 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2146 18:01:35.437508 tftpboot 192.168.201.1 11385840/tftp-deploy-xxjolq3l/kernel/bzIploy-xxjolq3l/kernel/cmdline 11385840/tftp-deploy-xxjolq3l/ramdisk/ramdisk.cpio.gz
2147 18:01:35.437596
2148 18:01:35.437679 Waiting for link
2149 18:01:35.641035
2150 18:01:35.641190 done.
2151 18:01:35.641317
2152 18:01:35.641397 MAC: 00:24:32:30:7d:bc
2153 18:01:35.641474
2154 18:01:35.644568 Sending DHCP discover... done.
2155 18:01:35.644674
2156 18:01:35.648023 Waiting for reply... done.
2157 18:01:35.648106
2158 18:01:35.651262 Sending DHCP request... done.
2159 18:01:35.651370
2160 18:01:35.654471 Waiting for reply... done.
2161 18:01:35.654557
2162 18:01:35.657538 My ip is 192.168.201.22
2163 18:01:35.657619
2164 18:01:35.661112 The DHCP server ip is 192.168.201.1
2165 18:01:35.661195
2166 18:01:35.668018 TFTP server IP predefined by user: 192.168.201.1
2167 18:01:35.668102
2168 18:01:35.674278 Bootfile predefined by user: 11385840/tftp-deploy-xxjolq3l/kernel/bzImage
2169 18:01:35.674360
2170 18:01:35.677749 Sending tftp read request... done.
2171 18:01:35.677833
2172 18:01:35.680782 Waiting for the transfer...
2173 18:01:35.680869
2174 18:01:36.197497 00000000 ################################################################
2175 18:01:36.197670
2176 18:01:36.721044 00080000 ################################################################
2177 18:01:36.721229
2178 18:01:37.246578 00100000 ################################################################
2179 18:01:37.246743
2180 18:01:37.803811 00180000 ################################################################
2181 18:01:37.804009
2182 18:01:38.414853 00200000 ################################################################
2183 18:01:38.415018
2184 18:01:38.979649 00280000 ################################################################
2185 18:01:38.979820
2186 18:01:39.522665 00300000 ################################################################
2187 18:01:39.522816
2188 18:01:40.056799 00380000 ################################################################
2189 18:01:40.056982
2190 18:01:40.588712 00400000 ################################################################
2191 18:01:40.588892
2192 18:01:41.125615 00480000 ################################################################
2193 18:01:41.125793
2194 18:01:41.664900 00500000 ################################################################
2195 18:01:41.665107
2196 18:01:42.196959 00580000 ################################################################
2197 18:01:42.197147
2198 18:01:42.718401 00600000 ################################################################
2199 18:01:42.718554
2200 18:01:43.244150 00680000 ################################################################
2201 18:01:43.244321
2202 18:01:43.766776 00700000 ################################################################
2203 18:01:43.766961
2204 18:01:44.289612 00780000 ################################################################
2205 18:01:44.289810
2206 18:01:44.824110 00800000 ################################################################
2207 18:01:44.824296
2208 18:01:45.381032 00880000 ################################################################
2209 18:01:45.381208
2210 18:01:45.920066 00900000 ################################################################
2211 18:01:45.920249
2212 18:01:46.457540 00980000 ################################################################
2213 18:01:46.457724
2214 18:01:47.015591 00a00000 ################################################################
2215 18:01:47.015754
2216 18:01:47.488023 00a80000 ######################################################### done.
2217 18:01:47.488172
2218 18:01:47.491749 The bootfile was 11469312 bytes long.
2219 18:01:47.491831
2220 18:01:47.494743 Sending tftp read request... done.
2221 18:01:47.494851
2222 18:01:47.497912 Waiting for the transfer...
2223 18:01:47.498017
2224 18:01:48.040876 00000000 ################################################################
2225 18:01:48.041067
2226 18:01:48.610506 00080000 ################################################################
2227 18:01:48.610695
2228 18:01:49.153499 00100000 ################################################################
2229 18:01:49.153686
2230 18:01:49.698981 00180000 ################################################################
2231 18:01:49.699143
2232 18:01:50.242409 00200000 ################################################################
2233 18:01:50.242595
2234 18:01:50.828861 00280000 ################################################################
2235 18:01:50.829039
2236 18:01:51.445894 00300000 ################################################################
2237 18:01:51.446068
2238 18:01:52.031627 00380000 ################################################################
2239 18:01:52.031791
2240 18:01:52.571958 00400000 ################################################################
2241 18:01:52.572138
2242 18:01:53.119991 00480000 ################################################################
2243 18:01:53.120182
2244 18:01:53.663588 00500000 ################################################################
2245 18:01:53.663772
2246 18:01:54.206929 00580000 ################################################################
2247 18:01:54.207120
2248 18:01:54.745956 00600000 ################################################################
2249 18:01:54.746149
2250 18:01:55.274738 00680000 ################################################################
2251 18:01:55.274923
2252 18:01:55.799749 00700000 ################################################################
2253 18:01:55.799951
2254 18:01:56.324318 00780000 ################################################################
2255 18:01:56.324466
2256 18:01:56.845497 00800000 ################################################################
2257 18:01:56.845645
2258 18:01:57.152784 00880000 ###################################### done.
2259 18:01:57.152937
2260 18:01:57.156158 Sending tftp read request... done.
2261 18:01:57.156244
2262 18:01:57.159518 Waiting for the transfer...
2263 18:01:57.159625
2264 18:01:57.159717 00000000 # done.
2265 18:01:57.159826
2266 18:01:57.169459 Command line loaded dynamically from TFTP file: 11385840/tftp-deploy-xxjolq3l/kernel/cmdline
2267 18:01:57.169576
2268 18:01:57.185989 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2269 18:01:57.189688
2270 18:01:57.193247 Shutting down all USB controllers.
2271 18:01:57.193326
2272 18:01:57.193389 Removing current net device
2273 18:01:57.193449
2274 18:01:57.196791 Finalizing coreboot
2275 18:01:57.196874
2276 18:01:57.203386 Exiting depthcharge with code 4 at timestamp: 31597264
2277 18:01:57.203472
2278 18:01:57.203537
2279 18:01:57.203597 Starting kernel ...
2280 18:01:57.203656
2281 18:01:57.203712
2282 18:01:57.204079 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
2283 18:01:57.204174 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
2284 18:01:57.204248 Setting prompt string to ['Linux version [0-9]']
2285 18:01:57.204317 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2286 18:01:57.204385 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2288 18:06:19.205056 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
2290 18:06:19.206401 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
2292 18:06:19.207197 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2295 18:06:19.208731 end: 2 depthcharge-action (duration 00:05:00) [common]
2297 18:06:19.209940 Cleaning after the job
2298 18:06:19.210382 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11385840/tftp-deploy-xxjolq3l/ramdisk
2299 18:06:19.216846 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11385840/tftp-deploy-xxjolq3l/kernel
2300 18:06:19.225005 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11385840/tftp-deploy-xxjolq3l/modules
2301 18:06:19.227837 start: 5.1 power-off (timeout 00:00:30) [common]
2302 18:06:19.228660 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-5' '--port=1' '--command=off'
2303 18:06:19.354692 >> Command sent successfully.
2304 18:06:19.365318 Returned 0 in 0 seconds
2305 18:06:19.466658 end: 5.1 power-off (duration 00:00:00) [common]
2307 18:06:19.468124 start: 5.2 read-feedback (timeout 00:10:00) [common]
2308 18:06:19.469380 Listened to connection for namespace 'common' for up to 1s
2309 18:06:20.470095 Finalising connection for namespace 'common'
2310 18:06:20.470770 Disconnecting from shell: Finalise
2311 18:06:20.471170
2312 18:06:20.572167 end: 5.2 read-feedback (duration 00:00:01) [common]
2313 18:06:20.572755 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11385840
2314 18:06:20.626254 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11385840
2315 18:06:20.626479 JobError: Your job cannot terminate cleanly.