Boot log: asus-cx9400-volteer

    1 18:01:09.054767  lava-dispatcher, installed at version: 2023.06
    2 18:01:09.055121  start: 0 validate
    3 18:01:09.055316  Start time: 2023-08-30 18:01:09.055309+00:00 (UTC)
    4 18:01:09.055495  Using caching service: 'http://localhost/cache/?uri=%s'
    5 18:01:09.055669  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230623.0%2Famd64%2Frootfs.cpio.gz exists
    6 18:01:09.318906  Using caching service: 'http://localhost/cache/?uri=%s'
    7 18:01:09.319171  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.292-cip102-130-g18b864070345b%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 18:01:09.584879  Using caching service: 'http://localhost/cache/?uri=%s'
    9 18:01:09.585062  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.292-cip102-130-g18b864070345b%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 18:01:14.361623  validate duration: 5.31
   12 18:01:14.362016  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 18:01:14.362176  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 18:01:14.362325  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 18:01:14.362517  Not decompressing ramdisk as can be used compressed.
   16 18:01:14.362658  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230623.0/amd64/rootfs.cpio.gz
   17 18:01:14.362780  saving as /var/lib/lava/dispatcher/tmp/11385817/tftp-deploy-8d7jfq48/ramdisk/rootfs.cpio.gz
   18 18:01:14.362893  total size: 35760064 (34 MB)
   19 18:01:15.021215  progress   0 % (0 MB)
   20 18:01:15.030825  progress   5 % (1 MB)
   21 18:01:15.040982  progress  10 % (3 MB)
   22 18:01:15.050345  progress  15 % (5 MB)
   23 18:01:15.060492  progress  20 % (6 MB)
   24 18:01:15.069992  progress  25 % (8 MB)
   25 18:01:15.079698  progress  30 % (10 MB)
   26 18:01:15.089205  progress  35 % (11 MB)
   27 18:01:15.098808  progress  40 % (13 MB)
   28 18:01:15.108490  progress  45 % (15 MB)
   29 18:01:15.117978  progress  50 % (17 MB)
   30 18:01:15.127704  progress  55 % (18 MB)
   31 18:01:15.137129  progress  60 % (20 MB)
   32 18:01:15.146798  progress  65 % (22 MB)
   33 18:01:15.156478  progress  70 % (23 MB)
   34 18:01:15.166135  progress  75 % (25 MB)
   35 18:01:15.175811  progress  80 % (27 MB)
   36 18:01:15.185327  progress  85 % (29 MB)
   37 18:01:15.195110  progress  90 % (30 MB)
   38 18:01:15.204484  progress  95 % (32 MB)
   39 18:01:15.213987  progress 100 % (34 MB)
   40 18:01:15.214190  34 MB downloaded in 0.85 s (40.06 MB/s)
   41 18:01:15.214407  end: 1.1.1 http-download (duration 00:00:01) [common]
   43 18:01:15.214819  end: 1.1 download-retry (duration 00:00:01) [common]
   44 18:01:15.214951  start: 1.2 download-retry (timeout 00:09:59) [common]
   45 18:01:15.215081  start: 1.2.1 http-download (timeout 00:09:59) [common]
   46 18:01:15.215248  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.292-cip102-130-g18b864070345b/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 18:01:15.215352  saving as /var/lib/lava/dispatcher/tmp/11385817/tftp-deploy-8d7jfq48/kernel/bzImage
   48 18:01:15.215454  total size: 11469312 (10 MB)
   49 18:01:15.215560  No compression specified
   50 18:01:15.217266  progress   0 % (0 MB)
   51 18:01:15.220473  progress   5 % (0 MB)
   52 18:01:15.223824  progress  10 % (1 MB)
   53 18:01:15.226886  progress  15 % (1 MB)
   54 18:01:15.230078  progress  20 % (2 MB)
   55 18:01:15.233104  progress  25 % (2 MB)
   56 18:01:15.236330  progress  30 % (3 MB)
   57 18:01:15.239323  progress  35 % (3 MB)
   58 18:01:15.242672  progress  40 % (4 MB)
   59 18:01:15.245860  progress  45 % (4 MB)
   60 18:01:15.249104  progress  50 % (5 MB)
   61 18:01:15.252073  progress  55 % (6 MB)
   62 18:01:15.255332  progress  60 % (6 MB)
   63 18:01:15.258458  progress  65 % (7 MB)
   64 18:01:15.261626  progress  70 % (7 MB)
   65 18:01:15.264739  progress  75 % (8 MB)
   66 18:01:15.267858  progress  80 % (8 MB)
   67 18:01:15.270917  progress  85 % (9 MB)
   68 18:01:15.274082  progress  90 % (9 MB)
   69 18:01:15.277079  progress  95 % (10 MB)
   70 18:01:15.280229  progress 100 % (10 MB)
   71 18:01:15.280352  10 MB downloaded in 0.06 s (168.55 MB/s)
   72 18:01:15.280560  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 18:01:15.280878  end: 1.2 download-retry (duration 00:00:00) [common]
   75 18:01:15.280972  start: 1.3 download-retry (timeout 00:09:59) [common]
   76 18:01:15.281064  start: 1.3.1 http-download (timeout 00:09:59) [common]
   77 18:01:15.281197  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.292-cip102-130-g18b864070345b/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 18:01:15.281270  saving as /var/lib/lava/dispatcher/tmp/11385817/tftp-deploy-8d7jfq48/modules/modules.tar
   79 18:01:15.281335  total size: 484136 (0 MB)
   80 18:01:15.281400  Using unxz to decompress xz
   81 18:01:15.284853  progress   6 % (0 MB)
   82 18:01:15.285283  progress  13 % (0 MB)
   83 18:01:15.285558  progress  20 % (0 MB)
   84 18:01:15.286858  progress  27 % (0 MB)
   85 18:01:15.289175  progress  33 % (0 MB)
   86 18:01:15.291154  progress  40 % (0 MB)
   87 18:01:15.293415  progress  47 % (0 MB)
   88 18:01:15.295461  progress  54 % (0 MB)
   89 18:01:15.297618  progress  60 % (0 MB)
   90 18:01:15.300358  progress  67 % (0 MB)
   91 18:01:15.302621  progress  74 % (0 MB)
   92 18:01:15.305006  progress  81 % (0 MB)
   93 18:01:15.307260  progress  87 % (0 MB)
   94 18:01:15.309018  progress  94 % (0 MB)
   95 18:01:15.311259  progress 100 % (0 MB)
   96 18:01:15.317507  0 MB downloaded in 0.04 s (12.77 MB/s)
   97 18:01:15.317817  end: 1.3.1 http-download (duration 00:00:00) [common]
   99 18:01:15.318143  end: 1.3 download-retry (duration 00:00:00) [common]
  100 18:01:15.318276  start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
  101 18:01:15.318411  start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
  102 18:01:15.318498  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
  103 18:01:15.318587  start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
  104 18:01:15.318813  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11385817/lava-overlay-acwmp6sp
  105 18:01:15.318950  makedir: /var/lib/lava/dispatcher/tmp/11385817/lava-overlay-acwmp6sp/lava-11385817/bin
  106 18:01:15.319058  makedir: /var/lib/lava/dispatcher/tmp/11385817/lava-overlay-acwmp6sp/lava-11385817/tests
  107 18:01:15.319156  makedir: /var/lib/lava/dispatcher/tmp/11385817/lava-overlay-acwmp6sp/lava-11385817/results
  108 18:01:15.319273  Creating /var/lib/lava/dispatcher/tmp/11385817/lava-overlay-acwmp6sp/lava-11385817/bin/lava-add-keys
  109 18:01:15.319430  Creating /var/lib/lava/dispatcher/tmp/11385817/lava-overlay-acwmp6sp/lava-11385817/bin/lava-add-sources
  110 18:01:15.319571  Creating /var/lib/lava/dispatcher/tmp/11385817/lava-overlay-acwmp6sp/lava-11385817/bin/lava-background-process-start
  111 18:01:15.319737  Creating /var/lib/lava/dispatcher/tmp/11385817/lava-overlay-acwmp6sp/lava-11385817/bin/lava-background-process-stop
  112 18:01:15.319896  Creating /var/lib/lava/dispatcher/tmp/11385817/lava-overlay-acwmp6sp/lava-11385817/bin/lava-common-functions
  113 18:01:15.320022  Creating /var/lib/lava/dispatcher/tmp/11385817/lava-overlay-acwmp6sp/lava-11385817/bin/lava-echo-ipv4
  114 18:01:15.320181  Creating /var/lib/lava/dispatcher/tmp/11385817/lava-overlay-acwmp6sp/lava-11385817/bin/lava-install-packages
  115 18:01:15.320341  Creating /var/lib/lava/dispatcher/tmp/11385817/lava-overlay-acwmp6sp/lava-11385817/bin/lava-installed-packages
  116 18:01:15.320500  Creating /var/lib/lava/dispatcher/tmp/11385817/lava-overlay-acwmp6sp/lava-11385817/bin/lava-os-build
  117 18:01:15.320661  Creating /var/lib/lava/dispatcher/tmp/11385817/lava-overlay-acwmp6sp/lava-11385817/bin/lava-probe-channel
  118 18:01:15.320830  Creating /var/lib/lava/dispatcher/tmp/11385817/lava-overlay-acwmp6sp/lava-11385817/bin/lava-probe-ip
  119 18:01:15.320965  Creating /var/lib/lava/dispatcher/tmp/11385817/lava-overlay-acwmp6sp/lava-11385817/bin/lava-target-ip
  120 18:01:15.321093  Creating /var/lib/lava/dispatcher/tmp/11385817/lava-overlay-acwmp6sp/lava-11385817/bin/lava-target-mac
  121 18:01:15.321219  Creating /var/lib/lava/dispatcher/tmp/11385817/lava-overlay-acwmp6sp/lava-11385817/bin/lava-target-storage
  122 18:01:15.321353  Creating /var/lib/lava/dispatcher/tmp/11385817/lava-overlay-acwmp6sp/lava-11385817/bin/lava-test-case
  123 18:01:15.321484  Creating /var/lib/lava/dispatcher/tmp/11385817/lava-overlay-acwmp6sp/lava-11385817/bin/lava-test-event
  124 18:01:15.321607  Creating /var/lib/lava/dispatcher/tmp/11385817/lava-overlay-acwmp6sp/lava-11385817/bin/lava-test-feedback
  125 18:01:15.321732  Creating /var/lib/lava/dispatcher/tmp/11385817/lava-overlay-acwmp6sp/lava-11385817/bin/lava-test-raise
  126 18:01:15.321855  Creating /var/lib/lava/dispatcher/tmp/11385817/lava-overlay-acwmp6sp/lava-11385817/bin/lava-test-reference
  127 18:01:15.321986  Creating /var/lib/lava/dispatcher/tmp/11385817/lava-overlay-acwmp6sp/lava-11385817/bin/lava-test-runner
  128 18:01:15.322113  Creating /var/lib/lava/dispatcher/tmp/11385817/lava-overlay-acwmp6sp/lava-11385817/bin/lava-test-set
  129 18:01:15.322241  Creating /var/lib/lava/dispatcher/tmp/11385817/lava-overlay-acwmp6sp/lava-11385817/bin/lava-test-shell
  130 18:01:15.322380  Updating /var/lib/lava/dispatcher/tmp/11385817/lava-overlay-acwmp6sp/lava-11385817/bin/lava-install-packages (oe)
  131 18:01:15.322573  Updating /var/lib/lava/dispatcher/tmp/11385817/lava-overlay-acwmp6sp/lava-11385817/bin/lava-installed-packages (oe)
  132 18:01:15.322741  Creating /var/lib/lava/dispatcher/tmp/11385817/lava-overlay-acwmp6sp/lava-11385817/environment
  133 18:01:15.322873  LAVA metadata
  134 18:01:15.322977  - LAVA_JOB_ID=11385817
  135 18:01:15.323078  - LAVA_DISPATCHER_IP=192.168.201.1
  136 18:01:15.323216  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
  137 18:01:15.323311  skipped lava-vland-overlay
  138 18:01:15.323424  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  139 18:01:15.323547  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
  140 18:01:15.323641  skipped lava-multinode-overlay
  141 18:01:15.323748  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  142 18:01:15.323863  start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
  143 18:01:15.323972  Loading test definitions
  144 18:01:15.324105  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
  145 18:01:15.324211  Using /lava-11385817 at stage 0
  146 18:01:15.324581  uuid=11385817_1.4.2.3.1 testdef=None
  147 18:01:15.324708  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  148 18:01:15.324830  start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
  149 18:01:15.325346  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  151 18:01:15.325579  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
  152 18:01:15.326239  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  154 18:01:15.326629  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
  155 18:01:15.327524  runner path: /var/lib/lava/dispatcher/tmp/11385817/lava-overlay-acwmp6sp/lava-11385817/0/tests/0_cros-ec test_uuid 11385817_1.4.2.3.1
  156 18:01:15.327722  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  158 18:01:15.328068  Creating lava-test-runner.conf files
  159 18:01:15.328162  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11385817/lava-overlay-acwmp6sp/lava-11385817/0 for stage 0
  160 18:01:15.328285  - 0_cros-ec
  161 18:01:15.328386  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  162 18:01:15.328478  start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
  163 18:01:15.336426  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  164 18:01:15.336577  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
  165 18:01:15.336713  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  166 18:01:15.336850  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  167 18:01:15.336985  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
  168 18:01:16.382343  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
  169 18:01:16.382734  start: 1.4.4 extract-modules (timeout 00:09:58) [common]
  170 18:01:16.382881  extracting modules file /var/lib/lava/dispatcher/tmp/11385817/tftp-deploy-8d7jfq48/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11385817/extract-overlay-ramdisk-knc9lm7b/ramdisk
  171 18:01:16.409286  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  172 18:01:16.409476  start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
  173 18:01:16.409609  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11385817/compress-overlay-k6lu3cl_/overlay-1.4.2.4.tar.gz to ramdisk
  174 18:01:16.409713  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11385817/compress-overlay-k6lu3cl_/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11385817/extract-overlay-ramdisk-knc9lm7b/ramdisk
  175 18:01:16.418544  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  176 18:01:16.418706  start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
  177 18:01:16.418837  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  178 18:01:16.418961  start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
  179 18:01:16.419073  Building ramdisk /var/lib/lava/dispatcher/tmp/11385817/extract-overlay-ramdisk-knc9lm7b/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11385817/extract-overlay-ramdisk-knc9lm7b/ramdisk
  180 18:01:17.059677  >> 188275 blocks

  181 18:01:21.007283  rename /var/lib/lava/dispatcher/tmp/11385817/extract-overlay-ramdisk-knc9lm7b/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11385817/tftp-deploy-8d7jfq48/ramdisk/ramdisk.cpio.gz
  182 18:01:21.007798  end: 1.4.7 compress-ramdisk (duration 00:00:05) [common]
  183 18:01:21.007990  start: 1.4.8 prepare-kernel (timeout 00:09:53) [common]
  184 18:01:21.008142  start: 1.4.8.1 prepare-fit (timeout 00:09:53) [common]
  185 18:01:21.008487  No mkimage arch provided, not using FIT.
  186 18:01:21.008613  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  187 18:01:21.008762  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  188 18:01:21.008907  end: 1.4 prepare-tftp-overlay (duration 00:00:06) [common]
  189 18:01:21.009037  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:53) [common]
  190 18:01:21.009154  No LXC device requested
  191 18:01:21.009285  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  192 18:01:21.009404  start: 1.6 deploy-device-env (timeout 00:09:53) [common]
  193 18:01:21.009524  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  194 18:01:21.009632  Checking files for TFTP limit of 4294967296 bytes.
  195 18:01:21.010186  end: 1 tftp-deploy (duration 00:00:07) [common]
  196 18:01:21.010345  start: 2 depthcharge-action (timeout 00:05:00) [common]
  197 18:01:21.010484  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  198 18:01:21.010653  substitutions:
  199 18:01:21.010749  - {DTB}: None
  200 18:01:21.010852  - {INITRD}: 11385817/tftp-deploy-8d7jfq48/ramdisk/ramdisk.cpio.gz
  201 18:01:21.010941  - {KERNEL}: 11385817/tftp-deploy-8d7jfq48/kernel/bzImage
  202 18:01:21.011047  - {LAVA_MAC}: None
  203 18:01:21.011139  - {PRESEED_CONFIG}: None
  204 18:01:21.011238  - {PRESEED_LOCAL}: None
  205 18:01:21.011326  - {RAMDISK}: 11385817/tftp-deploy-8d7jfq48/ramdisk/ramdisk.cpio.gz
  206 18:01:21.011415  - {ROOT_PART}: None
  207 18:01:21.011506  - {ROOT}: None
  208 18:01:21.011594  - {SERVER_IP}: 192.168.201.1
  209 18:01:21.011681  - {TEE}: None
  210 18:01:21.011779  Parsed boot commands:
  211 18:01:21.011865  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  212 18:01:21.012087  Parsed boot commands: tftpboot 192.168.201.1 11385817/tftp-deploy-8d7jfq48/kernel/bzImage 11385817/tftp-deploy-8d7jfq48/kernel/cmdline 11385817/tftp-deploy-8d7jfq48/ramdisk/ramdisk.cpio.gz
  213 18:01:21.012208  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  214 18:01:21.012336  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  215 18:01:21.012464  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  216 18:01:21.012589  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  217 18:01:21.012690  Not connected, no need to disconnect.
  218 18:01:21.012808  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  219 18:01:21.012890  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  220 18:01:21.012970  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-1'
  221 18:01:21.016254  Setting prompt string to ['lava-test: # ']
  222 18:01:21.016618  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  223 18:01:21.016732  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  224 18:01:21.016872  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  225 18:01:21.016969  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  226 18:01:21.017170  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-1' '--port=1' '--command=reboot'
  227 18:01:26.157105  >> Command sent successfully.

  228 18:01:26.159944  Returned 0 in 5 seconds
  229 18:01:26.260345  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  231 18:01:26.260795  end: 2.2.2 reset-device (duration 00:00:05) [common]
  232 18:01:26.260939  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  233 18:01:26.261042  Setting prompt string to 'Starting depthcharge on Voema...'
  234 18:01:26.261110  Changing prompt to 'Starting depthcharge on Voema...'
  235 18:01:26.261182  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  236 18:01:26.261449  [Enter `^Ec?' for help]

  237 18:01:27.864611  

  238 18:01:27.864809  

  239 18:01:27.874485  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...

  240 18:01:27.878043  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz

  241 18:01:27.884564  CPU: ID 806c1, Tigerlake B0, ucode: 00000086

  242 18:01:27.888091  CPU: AES supported, TXT NOT supported, VT supported

  243 18:01:27.894589  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2

  244 18:01:27.901131  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU

  245 18:01:27.904520  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2

  246 18:01:27.908116  VBOOT: Loading verstage.

  247 18:01:27.911138  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  248 18:01:27.917875  FMAP: base = 0x0 size = 0x2000000 #areas = 32

  249 18:01:27.921115  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  250 18:01:27.931942  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes

  251 18:01:27.938256  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984

  252 18:01:27.938345  

  253 18:01:27.938413  

  254 18:01:27.951697  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...

  255 18:01:27.965481  Probing TPM: . done!

  256 18:01:27.968644  TPM ready after 0 ms

  257 18:01:27.972155  Connected to device vid:did:rid of 1ae0:0028:00

  258 18:01:27.983030  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.153/cr50_v3.94_pp.113-620c9b9523

  259 18:01:27.990000  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  260 18:01:27.993218  Initialized TPM device CR50 revision 0

  261 18:01:28.062615  tlcl_send_startup: Startup return code is 0

  262 18:01:28.062752  TPM: setup succeeded

  263 18:01:28.078347  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  264 18:01:28.095760  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  265 18:01:28.105169  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

  266 18:01:28.115375  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  267 18:01:28.118636  Chrome EC: UHEPI supported

  268 18:01:28.121940  Phase 1

  269 18:01:28.125592  FMAP: area GBB found @ 1805000 (458752 bytes)

  270 18:01:28.135140  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  271 18:01:28.142000  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  272 18:01:28.148500  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  273 18:01:28.155603  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7

  274 18:01:28.158891  Recovery requested (1009000e)

  275 18:01:28.162263  TPM: Extending digest for VBOOT: boot mode into PCR 0

  276 18:01:28.173666  tlcl_extend: response is 0

  277 18:01:28.180113  TPM: Extending digest for VBOOT: GBB HWID into PCR 1

  278 18:01:28.190234  tlcl_extend: response is 0

  279 18:01:28.196948  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  280 18:01:28.203650  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638

  281 18:01:28.210261  BS: verstage times (exec / console): total (unknown) / 142 ms

  282 18:01:28.210350  

  283 18:01:28.210418  

  284 18:01:28.223715  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...

  285 18:01:28.226728  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  286 18:01:28.233946  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  287 18:01:28.237536  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000

  288 18:01:28.240639  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  289 18:01:28.247557  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000

  290 18:01:28.250742  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000

  291 18:01:28.254162  TCO_STS:   0000 0000

  292 18:01:28.257658  GEN_PMCON: d0015038 00002200

  293 18:01:28.260556  GBLRST_CAUSE: 00000000 00000000

  294 18:01:28.260683  HPR_CAUSE0: 00000000

  295 18:01:28.264245  prev_sleep_state 5

  296 18:01:28.267625  Boot Count incremented to 25388

  297 18:01:28.274195  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  298 18:01:28.280654  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  299 18:01:28.287536  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  300 18:01:28.294267  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c

  301 18:01:28.297810  Chrome EC: UHEPI supported

  302 18:01:28.304710  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  303 18:01:28.317649  Probing TPM:  done!

  304 18:01:28.324061  Connected to device vid:did:rid of 1ae0:0028:00

  305 18:01:28.334109  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.153/cr50_v3.94_pp.113-620c9b9523

  306 18:01:28.338249  Initialized TPM device CR50 revision 0

  307 18:01:28.352412  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  308 18:01:28.359256  MRC: Hash idx 0x100b comparison successful.

  309 18:01:28.362796  MRC cache found, size faa8

  310 18:01:28.362883  bootmode is set to: 2

  311 18:01:28.365752  SPD index = 0

  312 18:01:28.372756  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c

  313 18:01:28.376158  SPD: module type is LPDDR4X

  314 18:01:28.379302  SPD: module part number is MT53E512M64D4NW-046

  315 18:01:28.385903  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  316 18:01:28.389433  SPD: device width 16 bits, bus width 16 bits

  317 18:01:28.395828  SPD: module size is 1024 MB (per channel)

  318 18:01:28.828345  CBMEM:

  319 18:01:28.831887  IMD: root @ 0x76fff000 254 entries.

  320 18:01:28.835212  IMD: root @ 0x76ffec00 62 entries.

  321 18:01:28.838591  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  322 18:01:28.844957  FMAP: area RW_VPD found @ f35000 (8192 bytes)

  323 18:01:28.848529  External stage cache:

  324 18:01:28.851709  IMD: root @ 0x7b3ff000 254 entries.

  325 18:01:28.855418  IMD: root @ 0x7b3fec00 62 entries.

  326 18:01:28.870500  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  327 18:01:28.876829  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  328 18:01:28.883658  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  329 18:01:28.897760  MRC: 'RECOVERY_MRC_CACHE' does not need update.

  330 18:01:28.904065  cse_lite: Skip switching to RW in the recovery path

  331 18:01:28.904151  8 DIMMs found

  332 18:01:28.904250  SMM Memory Map

  333 18:01:28.907332  SMRAM       : 0x7b000000 0x800000

  334 18:01:28.914007   Subregion 0: 0x7b000000 0x200000

  335 18:01:28.917669   Subregion 1: 0x7b200000 0x200000

  336 18:01:28.920681   Subregion 2: 0x7b400000 0x400000

  337 18:01:28.920786  top_of_ram = 0x77000000

  338 18:01:28.927415  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  339 18:01:28.933820  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)

  340 18:01:28.937144  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  341 18:01:28.943967  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  342 18:01:28.950684  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c

  343 18:01:28.957097  Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)

  344 18:01:28.967369  Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500

  345 18:01:28.970664  Processing 211 relocs. Offset value of 0x74c0b000

  346 18:01:28.980239  BS: romstage times (exec / console): total (unknown) / 277 ms

  347 18:01:28.986504  

  348 18:01:28.986613  

  349 18:01:28.996481  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...

  350 18:01:28.999652  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  351 18:01:29.009918  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  352 18:01:29.016226  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  353 18:01:29.022886  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec

  354 18:01:29.029693  Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)

  355 18:01:29.076947  Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270

  356 18:01:29.080172  Processing 5008 relocs. Offset value of 0x75d98000

  357 18:01:29.087171  BS: postcar times (exec / console): total (unknown) / 59 ms

  358 18:01:29.087290  

  359 18:01:29.087395  

  360 18:01:29.100261  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...

  361 18:01:29.100352  Normal boot

  362 18:01:29.103706  FW_CONFIG value is 0x804c02

  363 18:01:29.106863  PCI: 00:07.0 disabled by fw_config

  364 18:01:29.110089  PCI: 00:07.1 disabled by fw_config

  365 18:01:29.113694  PCI: 00:0d.2 disabled by fw_config

  366 18:01:29.116675  PCI: 00:1c.7 disabled by fw_config

  367 18:01:29.123652  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  368 18:01:29.130216  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  369 18:01:29.133611  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  370 18:01:29.136989  GENERIC: 0.0 disabled by fw_config

  371 18:01:29.140135  GENERIC: 1.0 disabled by fw_config

  372 18:01:29.147126  fw_config match found: DB_USB=USB3_ACTIVE

  373 18:01:29.150148  fw_config match found: DB_USB=USB3_ACTIVE

  374 18:01:29.153533  fw_config match found: DB_USB=USB3_ACTIVE

  375 18:01:29.156990  fw_config match found: DB_USB=USB3_ACTIVE

  376 18:01:29.163807  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  377 18:01:29.170281  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  378 18:01:29.177015  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  379 18:01:29.186871  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c

  380 18:01:29.190455  microcode: sig=0x806c1 pf=0x80 revision=0x86

  381 18:01:29.197158  microcode: Update skipped, already up-to-date

  382 18:01:29.203500  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c

  383 18:01:29.230099  Detected 4 core, 8 thread CPU.

  384 18:01:29.233788  Setting up SMI for CPU

  385 18:01:29.236971  IED base = 0x7b400000

  386 18:01:29.237103  IED size = 0x00400000

  387 18:01:29.240180  Will perform SMM setup.

  388 18:01:29.247103  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.

  389 18:01:29.253969  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

  390 18:01:29.260491  Processing 16 relocs. Offset value of 0x00030000

  391 18:01:29.263624  Attempting to start 7 APs

  392 18:01:29.267295  Waiting for 10ms after sending INIT.

  393 18:01:29.282643  Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.

  394 18:01:29.285652  AP: slot 5 apic_id 3.

  395 18:01:29.289217  AP: slot 2 apic_id 2.

  396 18:01:29.289304  done.

  397 18:01:29.289372  AP: slot 4 apic_id 6.

  398 18:01:29.292445  AP: slot 6 apic_id 4.

  399 18:01:29.295562  AP: slot 3 apic_id 5.

  400 18:01:29.295642  AP: slot 7 apic_id 7.

  401 18:01:29.302449  Waiting for 2nd SIPI to complete...done.

  402 18:01:29.309043  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

  403 18:01:29.315739  Processing 13 relocs. Offset value of 0x00038000

  404 18:01:29.315820  Unable to locate Global NVS

  405 18:01:29.325842  SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)

  406 18:01:29.329017  Installing permanent SMM handler to 0x7b000000

  407 18:01:29.338921  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908

  408 18:01:29.342152  Processing 794 relocs. Offset value of 0x7b010000

  409 18:01:29.348957  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8

  410 18:01:29.355648  Processing 13 relocs. Offset value of 0x7b008000

  411 18:01:29.362272  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd

  412 18:01:29.369078  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd

  413 18:01:29.372209  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd

  414 18:01:29.379019  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd

  415 18:01:29.385349  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd

  416 18:01:29.391952  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd

  417 18:01:29.395692  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd

  418 18:01:29.398864  Unable to locate Global NVS

  419 18:01:29.405352  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)

  420 18:01:29.410271  Clearing SMI status registers

  421 18:01:29.413807  SMI_STS: PM1 

  422 18:01:29.413886  PM1_STS: PWRBTN 

  423 18:01:29.423449  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0

  424 18:01:29.423532  In relocation handler: CPU 0

  425 18:01:29.430220  New SMBASE=0x7b000000 IEDBASE=0x7b400000

  426 18:01:29.433989  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  427 18:01:29.437313  Relocation complete.

  428 18:01:29.443665  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1

  429 18:01:29.447084  In relocation handler: CPU 1

  430 18:01:29.450357  New SMBASE=0x7afffc00 IEDBASE=0x7b400000

  431 18:01:29.453730  Relocation complete.

  432 18:01:29.460181  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5

  433 18:01:29.463684  In relocation handler: CPU 5

  434 18:01:29.466927  New SMBASE=0x7affec00 IEDBASE=0x7b400000

  435 18:01:29.470226  Relocation complete.

  436 18:01:29.477034  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2

  437 18:01:29.480293  In relocation handler: CPU 2

  438 18:01:29.483955  New SMBASE=0x7afff800 IEDBASE=0x7b400000

  439 18:01:29.486924  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  440 18:01:29.490275  Relocation complete.

  441 18:01:29.497512  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3

  442 18:01:29.500589  In relocation handler: CPU 3

  443 18:01:29.503792  New SMBASE=0x7afff400 IEDBASE=0x7b400000

  444 18:01:29.507496  Relocation complete.

  445 18:01:29.513798  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6

  446 18:01:29.517577  In relocation handler: CPU 6

  447 18:01:29.520664  New SMBASE=0x7affe800 IEDBASE=0x7b400000

  448 18:01:29.527545  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  449 18:01:29.527648  Relocation complete.

  450 18:01:29.537223  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4

  451 18:01:29.537407  In relocation handler: CPU 4

  452 18:01:29.543797  New SMBASE=0x7afff000 IEDBASE=0x7b400000

  453 18:01:29.547669  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  454 18:01:29.552264  Relocation complete.

  455 18:01:29.555662  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7

  456 18:01:29.558783  In relocation handler: CPU 7

  457 18:01:29.565637  New SMBASE=0x7affe400 IEDBASE=0x7b400000

  458 18:01:29.565729  Relocation complete.

  459 18:01:29.568597  Initializing CPU #0

  460 18:01:29.571999  CPU: vendor Intel device 806c1

  461 18:01:29.575559  CPU: family 06, model 8c, stepping 01

  462 18:01:29.578812  Clearing out pending MCEs

  463 18:01:29.582070  Setting up local APIC...

  464 18:01:29.582157   apic_id: 0x00 done.

  465 18:01:29.585251  Turbo is available but hidden

  466 18:01:29.588972  Turbo is available and visible

  467 18:01:29.592218  microcode: Update skipped, already up-to-date

  468 18:01:29.595735  CPU #0 initialized

  469 18:01:29.599006  Initializing CPU #1

  470 18:01:29.599122  Initializing CPU #3

  471 18:01:29.602580  Initializing CPU #6

  472 18:01:29.605724  Initializing CPU #2

  473 18:01:29.605849  Initializing CPU #5

  474 18:01:29.608906  CPU: vendor Intel device 806c1

  475 18:01:29.612527  CPU: family 06, model 8c, stepping 01

  476 18:01:29.615689  CPU: vendor Intel device 806c1

  477 18:01:29.618964  CPU: family 06, model 8c, stepping 01

  478 18:01:29.622209  Clearing out pending MCEs

  479 18:01:29.625829  Clearing out pending MCEs

  480 18:01:29.628976  Setting up local APIC...

  481 18:01:29.629063  Initializing CPU #7

  482 18:01:29.632453  Initializing CPU #4

  483 18:01:29.635991  CPU: vendor Intel device 806c1

  484 18:01:29.639262  CPU: family 06, model 8c, stepping 01

  485 18:01:29.642441  CPU: vendor Intel device 806c1

  486 18:01:29.645788  CPU: family 06, model 8c, stepping 01

  487 18:01:29.648920  CPU: vendor Intel device 806c1

  488 18:01:29.652436  CPU: family 06, model 8c, stepping 01

  489 18:01:29.655772  Clearing out pending MCEs

  490 18:01:29.659206  Clearing out pending MCEs

  491 18:01:29.659289  Setting up local APIC...

  492 18:01:29.662405  Clearing out pending MCEs

  493 18:01:29.665726  CPU: vendor Intel device 806c1

  494 18:01:29.669190  CPU: family 06, model 8c, stepping 01

  495 18:01:29.672457  Setting up local APIC...

  496 18:01:29.675627  CPU: vendor Intel device 806c1

  497 18:01:29.678923  CPU: family 06, model 8c, stepping 01

  498 18:01:29.682236  Clearing out pending MCEs

  499 18:01:29.685577   apic_id: 0x07 done.

  500 18:01:29.685709  Setting up local APIC...

  501 18:01:29.689241   apic_id: 0x02 done.

  502 18:01:29.692375  Setting up local APIC...

  503 18:01:29.692454   apic_id: 0x06 done.

  504 18:01:29.699234  microcode: Update skipped, already up-to-date

  505 18:01:29.702680  microcode: Update skipped, already up-to-date

  506 18:01:29.705954  CPU #7 initialized

  507 18:01:29.706045  CPU #4 initialized

  508 18:01:29.708917  Setting up local APIC...

  509 18:01:29.712207  Clearing out pending MCEs

  510 18:01:29.715696   apic_id: 0x05 done.

  511 18:01:29.715774   apic_id: 0x04 done.

  512 18:01:29.722501  microcode: Update skipped, already up-to-date

  513 18:01:29.725734  microcode: Update skipped, already up-to-date

  514 18:01:29.728944  CPU #3 initialized

  515 18:01:29.729022  CPU #6 initialized

  516 18:01:29.732118  Setting up local APIC...

  517 18:01:29.735743  microcode: Update skipped, already up-to-date

  518 18:01:29.738857   apic_id: 0x03 done.

  519 18:01:29.738936  CPU #2 initialized

  520 18:01:29.745583  microcode: Update skipped, already up-to-date

  521 18:01:29.748940   apic_id: 0x01 done.

  522 18:01:29.749027  CPU #5 initialized

  523 18:01:29.752258  microcode: Update skipped, already up-to-date

  524 18:01:29.755820  CPU #1 initialized

  525 18:01:29.758986  bsp_do_flight_plan done after 454 msecs.

  526 18:01:29.762495  CPU: frequency set to 4000 MHz

  527 18:01:29.765888  Enabling SMIs.

  528 18:01:29.772543  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 348 / 317 ms

  529 18:01:29.787531  SATAXPCIE1 indicates PCIe NVMe is present

  530 18:01:29.787658  Probing TPM:  done!

  531 18:01:29.794824  Connected to device vid:did:rid of 1ae0:0028:00

  532 18:01:29.804567  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.153/cr50_v3.94_pp.113-620c9b9523

  533 18:01:29.808232  Initialized TPM device CR50 revision 0

  534 18:01:29.811714  Enabling S0i3.4

  535 18:01:29.817999  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc

  536 18:01:29.821304  Found a VBT of 8704 bytes after decompression

  537 18:01:29.828084  cse_lite: CSE RO boot. HybridStorageMode disabled

  538 18:01:29.834537  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called

  539 18:01:29.910244  FSPS returned 0

  540 18:01:29.913257  Executing Phase 1 of FspMultiPhaseSiInit

  541 18:01:29.923492  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  542 18:01:29.927085  port C0 DISC req: usage 1 usb3 1 usb2 5

  543 18:01:29.930262  Raw Buffer output 0 00000511

  544 18:01:29.933376  Raw Buffer output 1 00000000

  545 18:01:29.937149  pmc_send_ipc_cmd succeeded

  546 18:01:29.943530  port C1 DISC req: usage 1 usb3 2 usb2 3

  547 18:01:29.943619  Raw Buffer output 0 00000321

  548 18:01:29.947037  Raw Buffer output 1 00000000

  549 18:01:29.951031  pmc_send_ipc_cmd succeeded

  550 18:01:29.956246  Detected 4 core, 8 thread CPU.

  551 18:01:29.959601  Detected 4 core, 8 thread CPU.

  552 18:01:30.193873  Display FSP Version Info HOB

  553 18:01:30.197229  Reference Code - CPU = a.0.4c.31

  554 18:01:30.200528  uCode Version = 0.0.0.86

  555 18:01:30.203715  TXT ACM version = ff.ff.ff.ffff

  556 18:01:30.207318  Reference Code - ME = a.0.4c.31

  557 18:01:30.210710  MEBx version = 0.0.0.0

  558 18:01:30.213914  ME Firmware Version = Consumer SKU

  559 18:01:30.216971  Reference Code - PCH = a.0.4c.31

  560 18:01:30.220440  PCH-CRID Status = Disabled

  561 18:01:30.223724  PCH-CRID Original Value = ff.ff.ff.ffff

  562 18:01:30.227155  PCH-CRID New Value = ff.ff.ff.ffff

  563 18:01:30.230216  OPROM - RST - RAID = ff.ff.ff.ffff

  564 18:01:30.233847  PCH Hsio Version = 4.0.0.0

  565 18:01:30.237036  Reference Code - SA - System Agent = a.0.4c.31

  566 18:01:30.240325  Reference Code - MRC = 2.0.0.1

  567 18:01:30.243490  SA - PCIe Version = a.0.4c.31

  568 18:01:30.246759  SA-CRID Status = Disabled

  569 18:01:30.250332  SA-CRID Original Value = 0.0.0.1

  570 18:01:30.253535  SA-CRID New Value = 0.0.0.1

  571 18:01:30.257170  OPROM - VBIOS = ff.ff.ff.ffff

  572 18:01:30.260390  IO Manageability Engine FW Version = 11.1.4.0

  573 18:01:30.263581  PHY Build Version = 0.0.0.e0

  574 18:01:30.266821  Thunderbolt(TM) FW Version = 0.0.0.0

  575 18:01:30.273459  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  576 18:01:30.277129  ITSS IRQ Polarities Before:

  577 18:01:30.277213  IPC0: 0xffffffff

  578 18:01:30.280249  IPC1: 0xffffffff

  579 18:01:30.280350  IPC2: 0xffffffff

  580 18:01:30.283888  IPC3: 0xffffffff

  581 18:01:30.287142  ITSS IRQ Polarities After:

  582 18:01:30.287240  IPC0: 0xffffffff

  583 18:01:30.290328  IPC1: 0xffffffff

  584 18:01:30.290432  IPC2: 0xffffffff

  585 18:01:30.294046  IPC3: 0xffffffff

  586 18:01:30.297235  Found PCIe Root Port #9 at PCI: 00:1d.0.

  587 18:01:30.310136  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.

  588 18:01:30.320270  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.

  589 18:01:30.333613  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.

  590 18:01:30.340220  BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms

  591 18:01:30.340355  Enumerating buses...

  592 18:01:30.346750  Show all devs... Before device enumeration.

  593 18:01:30.346881  Root Device: enabled 1

  594 18:01:30.350274  DOMAIN: 0000: enabled 1

  595 18:01:30.353546  CPU_CLUSTER: 0: enabled 1

  596 18:01:30.357241  PCI: 00:00.0: enabled 1

  597 18:01:30.357378  PCI: 00:02.0: enabled 1

  598 18:01:30.360449  PCI: 00:04.0: enabled 1

  599 18:01:30.363624  PCI: 00:05.0: enabled 1

  600 18:01:30.367260  PCI: 00:06.0: enabled 0

  601 18:01:30.367381  PCI: 00:07.0: enabled 0

  602 18:01:30.370434  PCI: 00:07.1: enabled 0

  603 18:01:30.373580  PCI: 00:07.2: enabled 0

  604 18:01:30.377000  PCI: 00:07.3: enabled 0

  605 18:01:30.377082  PCI: 00:08.0: enabled 1

  606 18:01:30.380279  PCI: 00:09.0: enabled 0

  607 18:01:30.383435  PCI: 00:0a.0: enabled 0

  608 18:01:30.383561  PCI: 00:0d.0: enabled 1

  609 18:01:30.387145  PCI: 00:0d.1: enabled 0

  610 18:01:30.390471  PCI: 00:0d.2: enabled 0

  611 18:01:30.393631  PCI: 00:0d.3: enabled 0

  612 18:01:30.393766  PCI: 00:0e.0: enabled 0

  613 18:01:30.396795  PCI: 00:10.2: enabled 1

  614 18:01:30.400401  PCI: 00:10.6: enabled 0

  615 18:01:30.403569  PCI: 00:10.7: enabled 0

  616 18:01:30.403658  PCI: 00:12.0: enabled 0

  617 18:01:30.406813  PCI: 00:12.6: enabled 0

  618 18:01:30.410349  PCI: 00:13.0: enabled 0

  619 18:01:30.413470  PCI: 00:14.0: enabled 1

  620 18:01:30.413555  PCI: 00:14.1: enabled 0

  621 18:01:30.416730  PCI: 00:14.2: enabled 1

  622 18:01:30.420300  PCI: 00:14.3: enabled 1

  623 18:01:30.420386  PCI: 00:15.0: enabled 1

  624 18:01:30.423418  PCI: 00:15.1: enabled 1

  625 18:01:30.426977  PCI: 00:15.2: enabled 1

  626 18:01:30.430195  PCI: 00:15.3: enabled 1

  627 18:01:30.430272  PCI: 00:16.0: enabled 1

  628 18:01:30.433953  PCI: 00:16.1: enabled 0

  629 18:01:30.437009  PCI: 00:16.2: enabled 0

  630 18:01:30.440131  PCI: 00:16.3: enabled 0

  631 18:01:30.440219  PCI: 00:16.4: enabled 0

  632 18:01:30.443631  PCI: 00:16.5: enabled 0

  633 18:01:30.446771  PCI: 00:17.0: enabled 1

  634 18:01:30.450520  PCI: 00:19.0: enabled 0

  635 18:01:30.450606  PCI: 00:19.1: enabled 1

  636 18:01:30.453601  PCI: 00:19.2: enabled 0

  637 18:01:30.456696  PCI: 00:1c.0: enabled 1

  638 18:01:30.456790  PCI: 00:1c.1: enabled 0

  639 18:01:30.460533  PCI: 00:1c.2: enabled 0

  640 18:01:30.463537  PCI: 00:1c.3: enabled 0

  641 18:01:30.466869  PCI: 00:1c.4: enabled 0

  642 18:01:30.466954  PCI: 00:1c.5: enabled 0

  643 18:01:30.470492  PCI: 00:1c.6: enabled 1

  644 18:01:30.473327  PCI: 00:1c.7: enabled 0

  645 18:01:30.476901  PCI: 00:1d.0: enabled 1

  646 18:01:30.477024  PCI: 00:1d.1: enabled 0

  647 18:01:30.480208  PCI: 00:1d.2: enabled 1

  648 18:01:30.483330  PCI: 00:1d.3: enabled 0

  649 18:01:30.487034  PCI: 00:1e.0: enabled 1

  650 18:01:30.487142  PCI: 00:1e.1: enabled 0

  651 18:01:30.490254  PCI: 00:1e.2: enabled 1

  652 18:01:30.493632  PCI: 00:1e.3: enabled 1

  653 18:01:30.493707  PCI: 00:1f.0: enabled 1

  654 18:01:30.496927  PCI: 00:1f.1: enabled 0

  655 18:01:30.500071  PCI: 00:1f.2: enabled 1

  656 18:01:30.503690  PCI: 00:1f.3: enabled 1

  657 18:01:30.503793  PCI: 00:1f.4: enabled 0

  658 18:01:30.506805  PCI: 00:1f.5: enabled 1

  659 18:01:30.510476  PCI: 00:1f.6: enabled 0

  660 18:01:30.513578  PCI: 00:1f.7: enabled 0

  661 18:01:30.513709  APIC: 00: enabled 1

  662 18:01:30.516840  GENERIC: 0.0: enabled 1

  663 18:01:30.520363  GENERIC: 0.0: enabled 1

  664 18:01:30.520484  GENERIC: 1.0: enabled 1

  665 18:01:30.523249  GENERIC: 0.0: enabled 1

  666 18:01:30.526638  GENERIC: 1.0: enabled 1

  667 18:01:30.530221  USB0 port 0: enabled 1

  668 18:01:30.530331  GENERIC: 0.0: enabled 1

  669 18:01:30.533380  USB0 port 0: enabled 1

  670 18:01:30.536640  GENERIC: 0.0: enabled 1

  671 18:01:30.536747  I2C: 00:1a: enabled 1

  672 18:01:30.540202  I2C: 00:31: enabled 1

  673 18:01:30.543198  I2C: 00:32: enabled 1

  674 18:01:30.543303  I2C: 00:10: enabled 1

  675 18:01:30.546485  I2C: 00:15: enabled 1

  676 18:01:30.550263  GENERIC: 0.0: enabled 0

  677 18:01:30.553206  GENERIC: 1.0: enabled 0

  678 18:01:30.553294  GENERIC: 0.0: enabled 1

  679 18:01:30.556517  SPI: 00: enabled 1

  680 18:01:30.559988  SPI: 00: enabled 1

  681 18:01:30.560065  PNP: 0c09.0: enabled 1

  682 18:01:30.563229  GENERIC: 0.0: enabled 1

  683 18:01:30.566509  USB3 port 0: enabled 1

  684 18:01:30.566582  USB3 port 1: enabled 1

  685 18:01:30.569795  USB3 port 2: enabled 0

  686 18:01:30.573090  USB3 port 3: enabled 0

  687 18:01:30.576863  USB2 port 0: enabled 0

  688 18:01:30.576946  USB2 port 1: enabled 1

  689 18:01:30.580048  USB2 port 2: enabled 1

  690 18:01:30.583111  USB2 port 3: enabled 0

  691 18:01:30.583192  USB2 port 4: enabled 1

  692 18:01:30.586539  USB2 port 5: enabled 0

  693 18:01:30.590019  USB2 port 6: enabled 0

  694 18:01:30.590122  USB2 port 7: enabled 0

  695 18:01:30.593161  USB2 port 8: enabled 0

  696 18:01:30.596880  USB2 port 9: enabled 0

  697 18:01:30.600030  USB3 port 0: enabled 0

  698 18:01:30.600116  USB3 port 1: enabled 1

  699 18:01:30.603382  USB3 port 2: enabled 0

  700 18:01:30.606535  USB3 port 3: enabled 0

  701 18:01:30.606615  GENERIC: 0.0: enabled 1

  702 18:01:30.609790  GENERIC: 1.0: enabled 1

  703 18:01:30.613340  APIC: 01: enabled 1

  704 18:01:30.613411  APIC: 02: enabled 1

  705 18:01:30.616518  APIC: 05: enabled 1

  706 18:01:30.619703  APIC: 06: enabled 1

  707 18:01:30.619835  APIC: 03: enabled 1

  708 18:01:30.623347  APIC: 04: enabled 1

  709 18:01:30.623476  APIC: 07: enabled 1

  710 18:01:30.626631  Compare with tree...

  711 18:01:30.629890  Root Device: enabled 1

  712 18:01:30.633048   DOMAIN: 0000: enabled 1

  713 18:01:30.633169    PCI: 00:00.0: enabled 1

  714 18:01:30.636521    PCI: 00:02.0: enabled 1

  715 18:01:30.639975    PCI: 00:04.0: enabled 1

  716 18:01:30.643181     GENERIC: 0.0: enabled 1

  717 18:01:30.646901    PCI: 00:05.0: enabled 1

  718 18:01:30.647031    PCI: 00:06.0: enabled 0

  719 18:01:30.650131    PCI: 00:07.0: enabled 0

  720 18:01:30.653207     GENERIC: 0.0: enabled 1

  721 18:01:30.656665    PCI: 00:07.1: enabled 0

  722 18:01:30.660212     GENERIC: 1.0: enabled 1

  723 18:01:30.660352    PCI: 00:07.2: enabled 0

  724 18:01:30.663363     GENERIC: 0.0: enabled 1

  725 18:01:30.666580    PCI: 00:07.3: enabled 0

  726 18:01:30.670294     GENERIC: 1.0: enabled 1

  727 18:01:30.673380    PCI: 00:08.0: enabled 1

  728 18:01:30.673524    PCI: 00:09.0: enabled 0

  729 18:01:30.676589    PCI: 00:0a.0: enabled 0

  730 18:01:30.679772    PCI: 00:0d.0: enabled 1

  731 18:01:30.683128     USB0 port 0: enabled 1

  732 18:01:30.686656      USB3 port 0: enabled 1

  733 18:01:30.686740      USB3 port 1: enabled 1

  734 18:01:30.689998      USB3 port 2: enabled 0

  735 18:01:30.693598      USB3 port 3: enabled 0

  736 18:01:30.696658    PCI: 00:0d.1: enabled 0

  737 18:01:30.699952    PCI: 00:0d.2: enabled 0

  738 18:01:30.700057     GENERIC: 0.0: enabled 1

  739 18:01:30.703293    PCI: 00:0d.3: enabled 0

  740 18:01:30.706447    PCI: 00:0e.0: enabled 0

  741 18:01:30.710097    PCI: 00:10.2: enabled 1

  742 18:01:30.713240    PCI: 00:10.6: enabled 0

  743 18:01:30.713328    PCI: 00:10.7: enabled 0

  744 18:01:30.716561    PCI: 00:12.0: enabled 0

  745 18:01:30.719760    PCI: 00:12.6: enabled 0

  746 18:01:30.722938    PCI: 00:13.0: enabled 0

  747 18:01:30.726512    PCI: 00:14.0: enabled 1

  748 18:01:30.726589     USB0 port 0: enabled 1

  749 18:01:30.729653      USB2 port 0: enabled 0

  750 18:01:30.733064      USB2 port 1: enabled 1

  751 18:01:30.736474      USB2 port 2: enabled 1

  752 18:01:30.739573      USB2 port 3: enabled 0

  753 18:01:30.739692      USB2 port 4: enabled 1

  754 18:01:30.743141      USB2 port 5: enabled 0

  755 18:01:30.746247      USB2 port 6: enabled 0

  756 18:01:30.749851      USB2 port 7: enabled 0

  757 18:01:30.753114      USB2 port 8: enabled 0

  758 18:01:30.756509      USB2 port 9: enabled 0

  759 18:01:30.756655      USB3 port 0: enabled 0

  760 18:01:30.759596      USB3 port 1: enabled 1

  761 18:01:30.763062      USB3 port 2: enabled 0

  762 18:01:30.766384      USB3 port 3: enabled 0

  763 18:01:30.769609    PCI: 00:14.1: enabled 0

  764 18:01:30.769703    PCI: 00:14.2: enabled 1

  765 18:01:30.773346    PCI: 00:14.3: enabled 1

  766 18:01:30.776498     GENERIC: 0.0: enabled 1

  767 18:01:30.779677    PCI: 00:15.0: enabled 1

  768 18:01:30.782831     I2C: 00:1a: enabled 1

  769 18:01:30.782937     I2C: 00:31: enabled 1

  770 18:01:30.786587     I2C: 00:32: enabled 1

  771 18:01:30.790693    PCI: 00:15.1: enabled 1

  772 18:01:30.794155     I2C: 00:10: enabled 1

  773 18:01:30.794241    PCI: 00:15.2: enabled 1

  774 18:01:30.797820    PCI: 00:15.3: enabled 1

  775 18:01:30.801507    PCI: 00:16.0: enabled 1

  776 18:01:30.801615    PCI: 00:16.1: enabled 0

  777 18:01:30.804271    PCI: 00:16.2: enabled 0

  778 18:01:30.807822    PCI: 00:16.3: enabled 0

  779 18:01:30.811087    PCI: 00:16.4: enabled 0

  780 18:01:30.814319    PCI: 00:16.5: enabled 0

  781 18:01:30.814428    PCI: 00:17.0: enabled 1

  782 18:01:30.817991    PCI: 00:19.0: enabled 0

  783 18:01:30.821163    PCI: 00:19.1: enabled 1

  784 18:01:30.824359     I2C: 00:15: enabled 1

  785 18:01:30.827920    PCI: 00:19.2: enabled 0

  786 18:01:30.828000    PCI: 00:1d.0: enabled 1

  787 18:01:30.831269     GENERIC: 0.0: enabled 1

  788 18:01:30.881146    PCI: 00:1e.0: enabled 1

  789 18:01:30.881273    PCI: 00:1e.1: enabled 0

  790 18:01:30.881563    PCI: 00:1e.2: enabled 1

  791 18:01:30.881667     SPI: 00: enabled 1

  792 18:01:30.881776    PCI: 00:1e.3: enabled 1

  793 18:01:30.881894     SPI: 00: enabled 1

  794 18:01:30.882001    PCI: 00:1f.0: enabled 1

  795 18:01:30.882093     PNP: 0c09.0: enabled 1

  796 18:01:30.882196    PCI: 00:1f.1: enabled 0

  797 18:01:30.882286    PCI: 00:1f.2: enabled 1

  798 18:01:30.882397     GENERIC: 0.0: enabled 1

  799 18:01:30.882477      GENERIC: 0.0: enabled 1

  800 18:01:30.882570      GENERIC: 1.0: enabled 1

  801 18:01:30.882667    PCI: 00:1f.3: enabled 1

  802 18:01:30.882733    PCI: 00:1f.4: enabled 0

  803 18:01:30.882791    PCI: 00:1f.5: enabled 1

  804 18:01:30.882848    PCI: 00:1f.6: enabled 0

  805 18:01:30.882908    PCI: 00:1f.7: enabled 0

  806 18:01:30.882965   CPU_CLUSTER: 0: enabled 1

  807 18:01:30.933258    APIC: 00: enabled 1

  808 18:01:30.933404    APIC: 01: enabled 1

  809 18:01:30.933507    APIC: 02: enabled 1

  810 18:01:30.933795    APIC: 05: enabled 1

  811 18:01:30.933893    APIC: 06: enabled 1

  812 18:01:30.933988    APIC: 03: enabled 1

  813 18:01:30.934084    APIC: 04: enabled 1

  814 18:01:30.934177    APIC: 07: enabled 1

  815 18:01:30.934268  Root Device scanning...

  816 18:01:30.934356  scan_static_bus for Root Device

  817 18:01:30.934444  DOMAIN: 0000 enabled

  818 18:01:30.934531  CPU_CLUSTER: 0 enabled

  819 18:01:30.934618  DOMAIN: 0000 scanning...

  820 18:01:30.934718  PCI: pci_scan_bus for bus 00

  821 18:01:30.934807  PCI: 00:00.0 [8086/0000] ops

  822 18:01:30.934895  PCI: 00:00.0 [8086/9a12] enabled

  823 18:01:30.934982  PCI: 00:02.0 [8086/0000] bus ops

  824 18:01:30.935068  PCI: 00:02.0 [8086/9a40] enabled

  825 18:01:30.935156  PCI: 00:04.0 [8086/0000] bus ops

  826 18:01:30.958820  PCI: 00:04.0 [8086/9a03] enabled

  827 18:01:30.958934  PCI: 00:05.0 [8086/9a19] enabled

  828 18:01:30.959230  PCI: 00:07.0 [0000/0000] hidden

  829 18:01:30.959341  PCI: 00:08.0 [8086/9a11] enabled

  830 18:01:30.959436  PCI: 00:0a.0 [8086/9a0d] disabled

  831 18:01:30.959528  PCI: 00:0d.0 [8086/0000] bus ops

  832 18:01:30.959633  PCI: 00:0d.0 [8086/9a13] enabled

  833 18:01:30.962466  PCI: 00:14.0 [8086/0000] bus ops

  834 18:01:30.962572  PCI: 00:14.0 [8086/a0ed] enabled

  835 18:01:30.966170  PCI: 00:14.2 [8086/a0ef] enabled

  836 18:01:30.969540  PCI: 00:14.3 [8086/0000] bus ops

  837 18:01:30.972857  PCI: 00:14.3 [8086/a0f0] enabled

  838 18:01:30.976025  PCI: 00:15.0 [8086/0000] bus ops

  839 18:01:30.979412  PCI: 00:15.0 [8086/a0e8] enabled

  840 18:01:30.982635  PCI: 00:15.1 [8086/0000] bus ops

  841 18:01:30.986055  PCI: 00:15.1 [8086/a0e9] enabled

  842 18:01:30.989155  PCI: 00:15.2 [8086/0000] bus ops

  843 18:01:30.992825  PCI: 00:15.2 [8086/a0ea] enabled

  844 18:01:30.995941  PCI: 00:15.3 [8086/0000] bus ops

  845 18:01:30.999236  PCI: 00:15.3 [8086/a0eb] enabled

  846 18:01:31.002632  PCI: 00:16.0 [8086/0000] ops

  847 18:01:31.006049  PCI: 00:16.0 [8086/a0e0] enabled

  848 18:01:31.012496  PCI: Static device PCI: 00:17.0 not found, disabling it.

  849 18:01:31.016046  PCI: 00:19.0 [8086/0000] bus ops

  850 18:01:31.019324  PCI: 00:19.0 [8086/a0c5] disabled

  851 18:01:31.022575  PCI: 00:19.1 [8086/0000] bus ops

  852 18:01:31.025737  PCI: 00:19.1 [8086/a0c6] enabled

  853 18:01:31.029515  PCI: 00:1d.0 [8086/0000] bus ops

  854 18:01:31.032791  PCI: 00:1d.0 [8086/a0b0] enabled

  855 18:01:31.035934  PCI: 00:1e.0 [8086/0000] ops

  856 18:01:31.039538  PCI: 00:1e.0 [8086/a0a8] enabled

  857 18:01:31.042720  PCI: 00:1e.2 [8086/0000] bus ops

  858 18:01:31.045812  PCI: 00:1e.2 [8086/a0aa] enabled

  859 18:01:31.049268  PCI: 00:1e.3 [8086/0000] bus ops

  860 18:01:31.052499  PCI: 00:1e.3 [8086/a0ab] enabled

  861 18:01:31.055724  PCI: 00:1f.0 [8086/0000] bus ops

  862 18:01:31.059444  PCI: 00:1f.0 [8086/a087] enabled

  863 18:01:31.059565  RTC Init

  864 18:01:31.062549  Set power on after power failure.

  865 18:01:31.065809  Disabling Deep S3

  866 18:01:31.065920  Disabling Deep S3

  867 18:01:31.069187  Disabling Deep S4

  868 18:01:31.069275  Disabling Deep S4

  869 18:01:31.072540  Disabling Deep S5

  870 18:01:31.075980  Disabling Deep S5

  871 18:01:31.079450  PCI: 00:1f.2 [0000/0000] hidden

  872 18:01:31.082665  PCI: 00:1f.3 [8086/0000] bus ops

  873 18:01:31.085697  PCI: 00:1f.3 [8086/a0c8] enabled

  874 18:01:31.089038  PCI: 00:1f.5 [8086/0000] bus ops

  875 18:01:31.092737  PCI: 00:1f.5 [8086/a0a4] enabled

  876 18:01:31.092855  PCI: Leftover static devices:

  877 18:01:31.095880  PCI: 00:10.2

  878 18:01:31.095987  PCI: 00:10.6

  879 18:01:31.099273  PCI: 00:10.7

  880 18:01:31.099390  PCI: 00:06.0

  881 18:01:31.102616  PCI: 00:07.1

  882 18:01:31.102692  PCI: 00:07.2

  883 18:01:31.102755  PCI: 00:07.3

  884 18:01:31.105805  PCI: 00:09.0

  885 18:01:31.105886  PCI: 00:0d.1

  886 18:01:31.109082  PCI: 00:0d.2

  887 18:01:31.109156  PCI: 00:0d.3

  888 18:01:31.109223  PCI: 00:0e.0

  889 18:01:31.112427  PCI: 00:12.0

  890 18:01:31.112502  PCI: 00:12.6

  891 18:01:31.116025  PCI: 00:13.0

  892 18:01:31.116136  PCI: 00:14.1

  893 18:01:31.116238  PCI: 00:16.1

  894 18:01:31.119171  PCI: 00:16.2

  895 18:01:31.119272  PCI: 00:16.3

  896 18:01:31.122334  PCI: 00:16.4

  897 18:01:31.122409  PCI: 00:16.5

  898 18:01:31.125844  PCI: 00:17.0

  899 18:01:31.125917  PCI: 00:19.2

  900 18:01:31.125982  PCI: 00:1e.1

  901 18:01:31.129143  PCI: 00:1f.1

  902 18:01:31.129216  PCI: 00:1f.4

  903 18:01:31.132335  PCI: 00:1f.6

  904 18:01:31.132433  PCI: 00:1f.7

  905 18:01:31.136106  PCI: Check your devicetree.cb.

  906 18:01:31.139296  PCI: 00:02.0 scanning...

  907 18:01:31.142417  scan_generic_bus for PCI: 00:02.0

  908 18:01:31.146148  scan_generic_bus for PCI: 00:02.0 done

  909 18:01:31.149235  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

  910 18:01:31.152321  PCI: 00:04.0 scanning...

  911 18:01:31.155810  scan_generic_bus for PCI: 00:04.0

  912 18:01:31.159049  GENERIC: 0.0 enabled

  913 18:01:31.165870  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

  914 18:01:31.169115  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

  915 18:01:31.172818  PCI: 00:0d.0 scanning...

  916 18:01:31.175907  scan_static_bus for PCI: 00:0d.0

  917 18:01:31.179053  USB0 port 0 enabled

  918 18:01:31.179179  USB0 port 0 scanning...

  919 18:01:31.182571  scan_static_bus for USB0 port 0

  920 18:01:31.185737  USB3 port 0 enabled

  921 18:01:31.189185  USB3 port 1 enabled

  922 18:01:31.189314  USB3 port 2 disabled

  923 18:01:31.192569  USB3 port 3 disabled

  924 18:01:31.195527  USB3 port 0 scanning...

  925 18:01:31.199201  scan_static_bus for USB3 port 0

  926 18:01:31.202600  scan_static_bus for USB3 port 0 done

  927 18:01:31.205749  scan_bus: bus USB3 port 0 finished in 6 msecs

  928 18:01:31.208954  USB3 port 1 scanning...

  929 18:01:31.212371  scan_static_bus for USB3 port 1

  930 18:01:31.215684  scan_static_bus for USB3 port 1 done

  931 18:01:31.219146  scan_bus: bus USB3 port 1 finished in 6 msecs

  932 18:01:31.225693  scan_static_bus for USB0 port 0 done

  933 18:01:31.229291  scan_bus: bus USB0 port 0 finished in 43 msecs

  934 18:01:31.232455  scan_static_bus for PCI: 00:0d.0 done

  935 18:01:31.239305  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs

  936 18:01:31.239465  PCI: 00:14.0 scanning...

  937 18:01:31.242458  scan_static_bus for PCI: 00:14.0

  938 18:01:31.245745  USB0 port 0 enabled

  939 18:01:31.248950  USB0 port 0 scanning...

  940 18:01:31.252710  scan_static_bus for USB0 port 0

  941 18:01:31.252815  USB2 port 0 disabled

  942 18:01:31.256048  USB2 port 1 enabled

  943 18:01:31.259114  USB2 port 2 enabled

  944 18:01:31.259219  USB2 port 3 disabled

  945 18:01:31.262395  USB2 port 4 enabled

  946 18:01:31.262501  USB2 port 5 disabled

  947 18:01:31.265932  USB2 port 6 disabled

  948 18:01:31.269035  USB2 port 7 disabled

  949 18:01:31.269111  USB2 port 8 disabled

  950 18:01:31.272695  USB2 port 9 disabled

  951 18:01:31.275931  USB3 port 0 disabled

  952 18:01:31.276029  USB3 port 1 enabled

  953 18:01:31.279147  USB3 port 2 disabled

  954 18:01:31.282696  USB3 port 3 disabled

  955 18:01:31.282807  USB2 port 1 scanning...

  956 18:01:31.285745  scan_static_bus for USB2 port 1

  957 18:01:31.292488  scan_static_bus for USB2 port 1 done

  958 18:01:31.295768  scan_bus: bus USB2 port 1 finished in 6 msecs

  959 18:01:31.299151  USB2 port 2 scanning...

  960 18:01:31.302652  scan_static_bus for USB2 port 2

  961 18:01:31.305942  scan_static_bus for USB2 port 2 done

  962 18:01:31.309247  scan_bus: bus USB2 port 2 finished in 6 msecs

  963 18:01:31.312619  USB2 port 4 scanning...

  964 18:01:31.315737  scan_static_bus for USB2 port 4

  965 18:01:31.319196  scan_static_bus for USB2 port 4 done

  966 18:01:31.322479  scan_bus: bus USB2 port 4 finished in 6 msecs

  967 18:01:31.325530  USB3 port 1 scanning...

  968 18:01:31.329058  scan_static_bus for USB3 port 1

  969 18:01:31.332408  scan_static_bus for USB3 port 1 done

  970 18:01:31.338927  scan_bus: bus USB3 port 1 finished in 6 msecs

  971 18:01:31.342253  scan_static_bus for USB0 port 0 done

  972 18:01:31.345958  scan_bus: bus USB0 port 0 finished in 93 msecs

  973 18:01:31.348896  scan_static_bus for PCI: 00:14.0 done

  974 18:01:31.355771  scan_bus: bus PCI: 00:14.0 finished in 110 msecs

  975 18:01:31.359136  PCI: 00:14.3 scanning...

  976 18:01:31.362243  scan_static_bus for PCI: 00:14.3

  977 18:01:31.362362  GENERIC: 0.0 enabled

  978 18:01:31.365390  scan_static_bus for PCI: 00:14.3 done

  979 18:01:31.373257  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

  980 18:01:31.373393  PCI: 00:15.0 scanning...

  981 18:01:31.376259  scan_static_bus for PCI: 00:15.0

  982 18:01:31.379549  I2C: 00:1a enabled

  983 18:01:31.383203  I2C: 00:31 enabled

  984 18:01:31.383317  I2C: 00:32 enabled

  985 18:01:31.386333  scan_static_bus for PCI: 00:15.0 done

  986 18:01:31.392953  scan_bus: bus PCI: 00:15.0 finished in 12 msecs

  987 18:01:31.396120  PCI: 00:15.1 scanning...

  988 18:01:31.399412  scan_static_bus for PCI: 00:15.1

  989 18:01:31.399498  I2C: 00:10 enabled

  990 18:01:31.402701  scan_static_bus for PCI: 00:15.1 done

  991 18:01:31.409551  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

  992 18:01:31.412934  PCI: 00:15.2 scanning...

  993 18:01:31.416404  scan_static_bus for PCI: 00:15.2

  994 18:01:31.419484  scan_static_bus for PCI: 00:15.2 done

  995 18:01:31.423117  scan_bus: bus PCI: 00:15.2 finished in 7 msecs

  996 18:01:31.426546  PCI: 00:15.3 scanning...

  997 18:01:31.429648  scan_static_bus for PCI: 00:15.3

  998 18:01:31.433126  scan_static_bus for PCI: 00:15.3 done

  999 18:01:31.439849  scan_bus: bus PCI: 00:15.3 finished in 7 msecs

 1000 18:01:31.439954  PCI: 00:19.1 scanning...

 1001 18:01:31.443037  scan_static_bus for PCI: 00:19.1

 1002 18:01:31.446221  I2C: 00:15 enabled

 1003 18:01:31.449528  scan_static_bus for PCI: 00:19.1 done

 1004 18:01:31.456377  scan_bus: bus PCI: 00:19.1 finished in 9 msecs

 1005 18:01:31.456482  PCI: 00:1d.0 scanning...

 1006 18:01:31.459602  do_pci_scan_bridge for PCI: 00:1d.0

 1007 18:01:31.462986  PCI: pci_scan_bus for bus 01

 1008 18:01:31.466077  PCI: 01:00.0 [1c5c/174a] enabled

 1009 18:01:31.469348  GENERIC: 0.0 enabled

 1010 18:01:31.472873  Enabling Common Clock Configuration

 1011 18:01:31.476335  L1 Sub-State supported from root port 29

 1012 18:01:31.479583  L1 Sub-State Support = 0xf

 1013 18:01:31.482810  CommonModeRestoreTime = 0x28

 1014 18:01:31.486472  Power On Value = 0x16, Power On Scale = 0x0

 1015 18:01:31.489644  ASPM: Enabled L1

 1016 18:01:31.492810  PCIe: Max_Payload_Size adjusted to 128

 1017 18:01:31.499473  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs

 1018 18:01:31.499561  PCI: 00:1e.2 scanning...

 1019 18:01:31.502674  scan_generic_bus for PCI: 00:1e.2

 1020 18:01:31.506270  SPI: 00 enabled

 1021 18:01:31.512986  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done

 1022 18:01:31.516226  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs

 1023 18:01:31.519404  PCI: 00:1e.3 scanning...

 1024 18:01:31.522908  scan_generic_bus for PCI: 00:1e.3

 1025 18:01:31.526183  SPI: 00 enabled

 1026 18:01:31.529347  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1027 18:01:31.536226  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1028 18:01:31.539404  PCI: 00:1f.0 scanning...

 1029 18:01:31.543027  scan_static_bus for PCI: 00:1f.0

 1030 18:01:31.543101  PNP: 0c09.0 enabled

 1031 18:01:31.546113  PNP: 0c09.0 scanning...

 1032 18:01:31.549388  scan_static_bus for PNP: 0c09.0

 1033 18:01:31.553023  scan_static_bus for PNP: 0c09.0 done

 1034 18:01:31.559487  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1035 18:01:31.562726  scan_static_bus for PCI: 00:1f.0 done

 1036 18:01:31.565994  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1037 18:01:31.569490  PCI: 00:1f.2 scanning...

 1038 18:01:31.572928  scan_static_bus for PCI: 00:1f.2

 1039 18:01:31.576188  GENERIC: 0.0 enabled

 1040 18:01:31.576295  GENERIC: 0.0 scanning...

 1041 18:01:31.579399  scan_static_bus for GENERIC: 0.0

 1042 18:01:31.582632  GENERIC: 0.0 enabled

 1043 18:01:31.586314  GENERIC: 1.0 enabled

 1044 18:01:31.589400  scan_static_bus for GENERIC: 0.0 done

 1045 18:01:31.592775  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1046 18:01:31.596308  scan_static_bus for PCI: 00:1f.2 done

 1047 18:01:31.602495  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1048 18:01:31.606124  PCI: 00:1f.3 scanning...

 1049 18:01:31.609467  scan_static_bus for PCI: 00:1f.3

 1050 18:01:31.612593  scan_static_bus for PCI: 00:1f.3 done

 1051 18:01:31.615896  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1052 18:01:31.619528  PCI: 00:1f.5 scanning...

 1053 18:01:31.622859  scan_generic_bus for PCI: 00:1f.5

 1054 18:01:31.626376  scan_generic_bus for PCI: 00:1f.5 done

 1055 18:01:31.632922  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1056 18:01:31.636398  scan_bus: bus DOMAIN: 0000 finished in 717 msecs

 1057 18:01:31.639771  scan_static_bus for Root Device done

 1058 18:01:31.646145  scan_bus: bus Root Device finished in 736 msecs

 1059 18:01:31.646232  done

 1060 18:01:31.652981  BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms

 1061 18:01:31.656250  Chrome EC: UHEPI supported

 1062 18:01:31.663139  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)

 1063 18:01:31.666080  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1064 18:01:31.669420  SPI flash protection: WPSW=1 SRP0=0

 1065 18:01:31.676258  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1066 18:01:31.682984  BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms

 1067 18:01:31.686054  found VGA at PCI: 00:02.0

 1068 18:01:31.686139  Setting up VGA for PCI: 00:02.0

 1069 18:01:31.692859  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1070 18:01:31.699604  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1071 18:01:31.699690  Allocating resources...

 1072 18:01:31.702870  Reading resources...

 1073 18:01:31.706113  Root Device read_resources bus 0 link: 0

 1074 18:01:31.709814  DOMAIN: 0000 read_resources bus 0 link: 0

 1075 18:01:31.717064  PCI: 00:04.0 read_resources bus 1 link: 0

 1076 18:01:31.720030  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1077 18:01:31.727065  PCI: 00:0d.0 read_resources bus 0 link: 0

 1078 18:01:31.730391  USB0 port 0 read_resources bus 0 link: 0

 1079 18:01:31.736966  USB0 port 0 read_resources bus 0 link: 0 done

 1080 18:01:31.740547  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1081 18:01:31.743552  PCI: 00:14.0 read_resources bus 0 link: 0

 1082 18:01:31.750522  USB0 port 0 read_resources bus 0 link: 0

 1083 18:01:31.753789  USB0 port 0 read_resources bus 0 link: 0 done

 1084 18:01:31.760787  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1085 18:01:31.764133  PCI: 00:14.3 read_resources bus 0 link: 0

 1086 18:01:31.770686  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1087 18:01:31.773758  PCI: 00:15.0 read_resources bus 0 link: 0

 1088 18:01:31.780674  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1089 18:01:31.784101  PCI: 00:15.1 read_resources bus 0 link: 0

 1090 18:01:31.790888  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1091 18:01:31.794151  PCI: 00:19.1 read_resources bus 0 link: 0

 1092 18:01:31.800947  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1093 18:01:31.804523  PCI: 00:1d.0 read_resources bus 1 link: 0

 1094 18:01:31.811273  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1095 18:01:31.814593  PCI: 00:1e.2 read_resources bus 2 link: 0

 1096 18:01:31.820951  PCI: 00:1e.2 read_resources bus 2 link: 0 done

 1097 18:01:31.824567  PCI: 00:1e.3 read_resources bus 3 link: 0

 1098 18:01:31.831213  PCI: 00:1e.3 read_resources bus 3 link: 0 done

 1099 18:01:31.834468  PCI: 00:1f.0 read_resources bus 0 link: 0

 1100 18:01:31.841163  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1101 18:01:31.844624  PCI: 00:1f.2 read_resources bus 0 link: 0

 1102 18:01:31.847910  GENERIC: 0.0 read_resources bus 0 link: 0

 1103 18:01:31.854871  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1104 18:01:31.858010  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1105 18:01:31.865125  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1106 18:01:31.868670  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1107 18:01:31.875201  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1108 18:01:31.878693  Root Device read_resources bus 0 link: 0 done

 1109 18:01:31.882138  Done reading resources.

 1110 18:01:31.888701  Show resources in subtree (Root Device)...After reading.

 1111 18:01:31.891845   Root Device child on link 0 DOMAIN: 0000

 1112 18:01:31.895532    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1113 18:01:31.905383    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1114 18:01:31.915204    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1115 18:01:31.918478     PCI: 00:00.0

 1116 18:01:31.925309     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1117 18:01:31.934954     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1118 18:01:31.945118     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1119 18:01:31.955170     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1120 18:01:31.965133     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1121 18:01:31.974966     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1122 18:01:31.981895     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1123 18:01:31.991526     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1124 18:01:32.001749     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1125 18:01:32.011744     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1126 18:01:32.021308     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1127 18:01:32.028216     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1128 18:01:32.038054     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1129 18:01:32.048364     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1130 18:01:32.057760     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1131 18:01:32.067737     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1132 18:01:32.078182     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1133 18:01:32.087803     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1134 18:01:32.094518     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1135 18:01:32.104079     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1136 18:01:32.107802     PCI: 00:02.0

 1137 18:01:32.117624     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1138 18:01:32.127578     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1139 18:01:32.137851     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1140 18:01:32.141042     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1141 18:01:32.150656     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1142 18:01:32.150770      GENERIC: 0.0

 1143 18:01:32.154128     PCI: 00:05.0

 1144 18:01:32.164105     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1145 18:01:32.167526     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1146 18:01:32.171046      GENERIC: 0.0

 1147 18:01:32.171125     PCI: 00:08.0

 1148 18:01:32.180907     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1149 18:01:32.183959     PCI: 00:0a.0

 1150 18:01:32.187172     PCI: 00:0d.0 child on link 0 USB0 port 0

 1151 18:01:32.197196     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1152 18:01:32.203832      USB0 port 0 child on link 0 USB3 port 0

 1153 18:01:32.203918       USB3 port 0

 1154 18:01:32.207379       USB3 port 1

 1155 18:01:32.207463       USB3 port 2

 1156 18:01:32.210586       USB3 port 3

 1157 18:01:32.214167     PCI: 00:14.0 child on link 0 USB0 port 0

 1158 18:01:32.223966     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1159 18:01:32.227518      USB0 port 0 child on link 0 USB2 port 0

 1160 18:01:32.230706       USB2 port 0

 1161 18:01:32.230790       USB2 port 1

 1162 18:01:32.233960       USB2 port 2

 1163 18:01:32.234071       USB2 port 3

 1164 18:01:32.237540       USB2 port 4

 1165 18:01:32.240826       USB2 port 5

 1166 18:01:32.240936       USB2 port 6

 1167 18:01:32.244110       USB2 port 7

 1168 18:01:32.244195       USB2 port 8

 1169 18:01:32.247299       USB2 port 9

 1170 18:01:32.247413       USB3 port 0

 1171 18:01:32.250959       USB3 port 1

 1172 18:01:32.251062       USB3 port 2

 1173 18:01:32.253977       USB3 port 3

 1174 18:01:32.254105     PCI: 00:14.2

 1175 18:01:32.263850     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1176 18:01:32.273976     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1177 18:01:32.280674     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1178 18:01:32.290794     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1179 18:01:32.290883      GENERIC: 0.0

 1180 18:01:32.293954     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1181 18:01:32.303932     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1182 18:01:32.307317      I2C: 00:1a

 1183 18:01:32.307402      I2C: 00:31

 1184 18:01:32.310606      I2C: 00:32

 1185 18:01:32.313767     PCI: 00:15.1 child on link 0 I2C: 00:10

 1186 18:01:32.323812     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1187 18:01:32.327229      I2C: 00:10

 1188 18:01:32.327354     PCI: 00:15.2

 1189 18:01:32.337113     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1190 18:01:32.340496     PCI: 00:15.3

 1191 18:01:32.350501     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1192 18:01:32.350651     PCI: 00:16.0

 1193 18:01:32.360327     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1194 18:01:32.363720     PCI: 00:19.0

 1195 18:01:32.367393     PCI: 00:19.1 child on link 0 I2C: 00:15

 1196 18:01:32.377086     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1197 18:01:32.377205      I2C: 00:15

 1198 18:01:32.383695     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1199 18:01:32.390799     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1200 18:01:32.400307     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1201 18:01:32.410232     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1202 18:01:32.410318      GENERIC: 0.0

 1203 18:01:32.413760      PCI: 01:00.0

 1204 18:01:32.423966      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1205 18:01:32.433812      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18

 1206 18:01:32.443951      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c

 1207 18:01:32.444062     PCI: 00:1e.0

 1208 18:01:32.453649     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1209 18:01:32.460385     PCI: 00:1e.2 child on link 0 SPI: 00

 1210 18:01:32.470365     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1211 18:01:32.470454      SPI: 00

 1212 18:01:32.473521     PCI: 00:1e.3 child on link 0 SPI: 00

 1213 18:01:32.483489     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1214 18:01:32.487206      SPI: 00

 1215 18:01:32.490250     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1216 18:01:32.500078     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1217 18:01:32.500168      PNP: 0c09.0

 1218 18:01:32.510053      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1219 18:01:32.513539     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1220 18:01:32.523290     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1221 18:01:32.533383     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1222 18:01:32.536810      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1223 18:01:32.540087       GENERIC: 0.0

 1224 18:01:32.540192       GENERIC: 1.0

 1225 18:01:32.543829     PCI: 00:1f.3

 1226 18:01:32.553819     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1227 18:01:32.563438     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1228 18:01:32.563527     PCI: 00:1f.5

 1229 18:01:32.573788     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1230 18:01:32.576723    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1231 18:01:32.580354     APIC: 00

 1232 18:01:32.580470     APIC: 01

 1233 18:01:32.580568     APIC: 02

 1234 18:01:32.583509     APIC: 05

 1235 18:01:32.583631     APIC: 06

 1236 18:01:32.583733     APIC: 03

 1237 18:01:32.587115     APIC: 04

 1238 18:01:32.587227     APIC: 07

 1239 18:01:32.597033  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1240 18:01:32.600108   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1241 18:01:32.606720   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1242 18:01:32.613615   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1243 18:01:32.616630    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1244 18:01:32.619966    PCI: 01:00.0 18 *  [0x4000 - 0x4fff] mem

 1245 18:01:32.626586    PCI: 01:00.0 1c *  [0x5000 - 0x5fff] mem

 1246 18:01:32.633254   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1247 18:01:32.639988   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1248 18:01:32.646632   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1249 18:01:32.656658  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1250 18:01:32.660268  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1251 18:01:32.670091   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1252 18:01:32.676637   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1253 18:01:32.683013   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1254 18:01:32.686508   DOMAIN: 0000: Resource ranges:

 1255 18:01:32.689934   * Base: 1000, Size: 800, Tag: 100

 1256 18:01:32.693131   * Base: 1900, Size: e700, Tag: 100

 1257 18:01:32.699763    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1258 18:01:32.706681  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1259 18:01:32.713375  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1260 18:01:32.720082   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)

 1261 18:01:32.729962   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)

 1262 18:01:32.736423   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)

 1263 18:01:32.743292   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)

 1264 18:01:32.753289   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)

 1265 18:01:32.759772   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)

 1266 18:01:32.766333   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)

 1267 18:01:32.776411   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)

 1268 18:01:32.782964   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)

 1269 18:01:32.789427   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)

 1270 18:01:32.799655   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)

 1271 18:01:32.806239   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)

 1272 18:01:32.813030   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)

 1273 18:01:32.820010   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)

 1274 18:01:32.829743   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)

 1275 18:01:32.836620   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)

 1276 18:01:32.842886   update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)

 1277 18:01:32.852848   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)

 1278 18:01:32.859462   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)

 1279 18:01:32.866368   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)

 1280 18:01:32.876303   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1281 18:01:32.882923   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1282 18:01:32.886227   DOMAIN: 0000: Resource ranges:

 1283 18:01:32.889377   * Base: 7fc00000, Size: 40400000, Tag: 200

 1284 18:01:32.896210   * Base: d0000000, Size: 28000000, Tag: 200

 1285 18:01:32.899345   * Base: fa000000, Size: 1000000, Tag: 200

 1286 18:01:32.902665   * Base: fb001000, Size: 2fff000, Tag: 200

 1287 18:01:32.909319   * Base: fe010000, Size: 2e000, Tag: 200

 1288 18:01:32.912551   * Base: fe03f000, Size: d41000, Tag: 200

 1289 18:01:32.915881   * Base: fed88000, Size: 8000, Tag: 200

 1290 18:01:32.919164   * Base: fed93000, Size: d000, Tag: 200

 1291 18:01:32.922506   * Base: feda2000, Size: 1e000, Tag: 200

 1292 18:01:32.928991   * Base: fede0000, Size: 1220000, Tag: 200

 1293 18:01:32.932388   * Base: 280400000, Size: 7d7fc00000, Tag: 100200

 1294 18:01:32.938954    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem

 1295 18:01:32.945674    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem

 1296 18:01:32.952321    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem

 1297 18:01:32.959175    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem

 1298 18:01:32.965894    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem

 1299 18:01:32.972320    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem

 1300 18:01:32.978822    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem

 1301 18:01:32.985397    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem

 1302 18:01:32.992258    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem

 1303 18:01:32.998654    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem

 1304 18:01:33.005419    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem

 1305 18:01:33.011809    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem

 1306 18:01:33.018844    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem

 1307 18:01:33.025141    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem

 1308 18:01:33.032067    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem

 1309 18:01:33.038825    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem

 1310 18:01:33.045193    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem

 1311 18:01:33.051535    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem

 1312 18:01:33.058151    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem

 1313 18:01:33.065011    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem

 1314 18:01:33.071522    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem

 1315 18:01:33.078375    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem

 1316 18:01:33.088230  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1317 18:01:33.094953  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff

 1318 18:01:33.098158   PCI: 00:1d.0: Resource ranges:

 1319 18:01:33.101782   * Base: 7fc00000, Size: 100000, Tag: 200

 1320 18:01:33.108102    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem

 1321 18:01:33.114987    PCI: 01:00.0 18 *  [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem

 1322 18:01:33.121538    PCI: 01:00.0 1c *  [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem

 1323 18:01:33.131619  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done

 1324 18:01:33.137909  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1325 18:01:33.141337  Root Device assign_resources, bus 0 link: 0

 1326 18:01:33.148250  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1327 18:01:33.154662  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64

 1328 18:01:33.164793  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64

 1329 18:01:33.171826  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1330 18:01:33.181348  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64

 1331 18:01:33.184527  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1332 18:01:33.188117  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1333 18:01:33.197912  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64

 1334 18:01:33.204786  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64

 1335 18:01:33.214302  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64

 1336 18:01:33.217583  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1337 18:01:33.224467  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1338 18:01:33.231106  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64

 1339 18:01:33.234347  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1340 18:01:33.240855  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1341 18:01:33.247476  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64

 1342 18:01:33.257729  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64

 1343 18:01:33.264424  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64

 1344 18:01:33.270942  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1345 18:01:33.274126  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1346 18:01:33.280854  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64

 1347 18:01:33.287517  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1348 18:01:33.290803  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1349 18:01:33.301031  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64

 1350 18:01:33.304278  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1351 18:01:33.307726  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1352 18:01:33.317659  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64

 1353 18:01:33.324513  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64

 1354 18:01:33.334421  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64

 1355 18:01:33.341222  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64

 1356 18:01:33.347768  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1357 18:01:33.351083  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1358 18:01:33.360937  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1359 18:01:33.371305  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1360 18:01:33.377632  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem

 1361 18:01:33.384624  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1362 18:01:33.391094  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64

 1363 18:01:33.397830  PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem

 1364 18:01:33.408032  PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem

 1365 18:01:33.411229  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1366 18:01:33.421084  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64

 1367 18:01:33.424328  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1368 18:01:33.428003  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1369 18:01:33.437999  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64

 1370 18:01:33.441305  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1371 18:01:33.447893  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1372 18:01:33.451117  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1373 18:01:33.457846  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1374 18:01:33.461204  LPC: Trying to open IO window from 800 size 1ff

 1375 18:01:33.471094  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64

 1376 18:01:33.477695  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64

 1377 18:01:33.484413  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem

 1378 18:01:33.490881  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1379 18:01:33.494401  Root Device assign_resources, bus 0 link: 0

 1380 18:01:33.497846  Done setting resources.

 1381 18:01:33.504427  Show resources in subtree (Root Device)...After assigning values.

 1382 18:01:33.507846   Root Device child on link 0 DOMAIN: 0000

 1383 18:01:33.511096    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1384 18:01:33.521203    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1385 18:01:33.530959    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1386 18:01:33.534465     PCI: 00:00.0

 1387 18:01:33.544491     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1388 18:01:33.550959     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1389 18:01:33.561027     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1390 18:01:33.571208     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1391 18:01:33.580959     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1392 18:01:33.591255     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1393 18:01:33.600999     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1394 18:01:33.607774     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1395 18:01:33.617706     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1396 18:01:33.627964     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1397 18:01:33.637797     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1398 18:01:33.644693     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1399 18:01:33.654497     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1400 18:01:33.664442     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1401 18:01:33.674405     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1402 18:01:33.684421     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1403 18:01:33.694295     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1404 18:01:33.704422     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1405 18:01:33.710767     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1406 18:01:33.720818     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1407 18:01:33.724294     PCI: 00:02.0

 1408 18:01:33.734306     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10

 1409 18:01:33.744336     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18

 1410 18:01:33.754005     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1411 18:01:33.757638     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1412 18:01:33.767196     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10

 1413 18:01:33.770608      GENERIC: 0.0

 1414 18:01:33.770702     PCI: 00:05.0

 1415 18:01:33.783800     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10

 1416 18:01:33.787288     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1417 18:01:33.790829      GENERIC: 0.0

 1418 18:01:33.790939     PCI: 00:08.0

 1419 18:01:33.800502     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10

 1420 18:01:33.803774     PCI: 00:0a.0

 1421 18:01:33.807436     PCI: 00:0d.0 child on link 0 USB0 port 0

 1422 18:01:33.817498     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10

 1423 18:01:33.823725      USB0 port 0 child on link 0 USB3 port 0

 1424 18:01:33.823820       USB3 port 0

 1425 18:01:33.827197       USB3 port 1

 1426 18:01:33.827301       USB3 port 2

 1427 18:01:33.830391       USB3 port 3

 1428 18:01:33.833664     PCI: 00:14.0 child on link 0 USB0 port 0

 1429 18:01:33.843712     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10

 1430 18:01:33.847203      USB0 port 0 child on link 0 USB2 port 0

 1431 18:01:33.850327       USB2 port 0

 1432 18:01:33.853479       USB2 port 1

 1433 18:01:33.853586       USB2 port 2

 1434 18:01:33.856700       USB2 port 3

 1435 18:01:33.856795       USB2 port 4

 1436 18:01:33.860549       USB2 port 5

 1437 18:01:33.860664       USB2 port 6

 1438 18:01:33.863656       USB2 port 7

 1439 18:01:33.863733       USB2 port 8

 1440 18:01:33.866986       USB2 port 9

 1441 18:01:33.867067       USB3 port 0

 1442 18:01:33.870548       USB3 port 1

 1443 18:01:33.870625       USB3 port 2

 1444 18:01:33.873588       USB3 port 3

 1445 18:01:33.873671     PCI: 00:14.2

 1446 18:01:33.883740     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10

 1447 18:01:33.896845     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18

 1448 18:01:33.900227     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1449 18:01:33.910071     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10

 1450 18:01:33.913476      GENERIC: 0.0

 1451 18:01:33.916552     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1452 18:01:33.926683     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10

 1453 18:01:33.929781      I2C: 00:1a

 1454 18:01:33.929868      I2C: 00:31

 1455 18:01:33.929935      I2C: 00:32

 1456 18:01:33.936780     PCI: 00:15.1 child on link 0 I2C: 00:10

 1457 18:01:33.946985     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10

 1458 18:01:33.947096      I2C: 00:10

 1459 18:01:33.950150     PCI: 00:15.2

 1460 18:01:33.960220     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10

 1461 18:01:33.960334     PCI: 00:15.3

 1462 18:01:33.970089     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10

 1463 18:01:33.973325     PCI: 00:16.0

 1464 18:01:33.983198     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10

 1465 18:01:33.986839     PCI: 00:19.0

 1466 18:01:33.990245     PCI: 00:19.1 child on link 0 I2C: 00:15

 1467 18:01:34.000211     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10

 1468 18:01:34.000341      I2C: 00:15

 1469 18:01:34.006917     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1470 18:01:34.016948     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1471 18:01:34.026837     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1472 18:01:34.036999     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20

 1473 18:01:34.040056      GENERIC: 0.0

 1474 18:01:34.040189      PCI: 01:00.0

 1475 18:01:34.050461      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10

 1476 18:01:34.063689      PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18

 1477 18:01:34.073239      PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c

 1478 18:01:34.073377     PCI: 00:1e.0

 1479 18:01:34.086666     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1480 18:01:34.089896     PCI: 00:1e.2 child on link 0 SPI: 00

 1481 18:01:34.100045     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10

 1482 18:01:34.100176      SPI: 00

 1483 18:01:34.103357     PCI: 00:1e.3 child on link 0 SPI: 00

 1484 18:01:34.116701     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10

 1485 18:01:34.116814      SPI: 00

 1486 18:01:34.119802     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1487 18:01:34.129825     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1488 18:01:34.129939      PNP: 0c09.0

 1489 18:01:34.139730      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1490 18:01:34.143375     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1491 18:01:34.153235     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1492 18:01:34.162997     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1493 18:01:34.166691      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1494 18:01:34.169904       GENERIC: 0.0

 1495 18:01:34.169989       GENERIC: 1.0

 1496 18:01:34.173045     PCI: 00:1f.3

 1497 18:01:34.183082     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10

 1498 18:01:34.193281     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20

 1499 18:01:34.196278     PCI: 00:1f.5

 1500 18:01:34.206281     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10

 1501 18:01:34.209610    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1502 18:01:34.209721     APIC: 00

 1503 18:01:34.213002     APIC: 01

 1504 18:01:34.213075     APIC: 02

 1505 18:01:34.216221     APIC: 05

 1506 18:01:34.216296     APIC: 06

 1507 18:01:34.216358     APIC: 03

 1508 18:01:34.219713     APIC: 04

 1509 18:01:34.219821     APIC: 07

 1510 18:01:34.222971  Done allocating resources.

 1511 18:01:34.229735  BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms

 1512 18:01:34.236645  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

 1513 18:01:34.239592  Configure GPIOs for I2S audio on UP4.

 1514 18:01:34.246574  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms

 1515 18:01:34.249673  Enabling resources...

 1516 18:01:34.252903  PCI: 00:00.0 subsystem <- 8086/9a12

 1517 18:01:34.252981  PCI: 00:00.0 cmd <- 06

 1518 18:01:34.259830  PCI: 00:02.0 subsystem <- 8086/9a40

 1519 18:01:34.259935  PCI: 00:02.0 cmd <- 03

 1520 18:01:34.263154  PCI: 00:04.0 subsystem <- 8086/9a03

 1521 18:01:34.266776  PCI: 00:04.0 cmd <- 02

 1522 18:01:34.269968  PCI: 00:05.0 subsystem <- 8086/9a19

 1523 18:01:34.273250  PCI: 00:05.0 cmd <- 02

 1524 18:01:34.276407  PCI: 00:08.0 subsystem <- 8086/9a11

 1525 18:01:34.280023  PCI: 00:08.0 cmd <- 06

 1526 18:01:34.283262  PCI: 00:0d.0 subsystem <- 8086/9a13

 1527 18:01:34.286944  PCI: 00:0d.0 cmd <- 02

 1528 18:01:34.290022  PCI: 00:14.0 subsystem <- 8086/a0ed

 1529 18:01:34.293087  PCI: 00:14.0 cmd <- 02

 1530 18:01:34.296567  PCI: 00:14.2 subsystem <- 8086/a0ef

 1531 18:01:34.296692  PCI: 00:14.2 cmd <- 02

 1532 18:01:34.303511  PCI: 00:14.3 subsystem <- 8086/a0f0

 1533 18:01:34.303622  PCI: 00:14.3 cmd <- 02

 1534 18:01:34.306885  PCI: 00:15.0 subsystem <- 8086/a0e8

 1535 18:01:34.309867  PCI: 00:15.0 cmd <- 02

 1536 18:01:34.313248  PCI: 00:15.1 subsystem <- 8086/a0e9

 1537 18:01:34.316658  PCI: 00:15.1 cmd <- 02

 1538 18:01:34.320050  PCI: 00:15.2 subsystem <- 8086/a0ea

 1539 18:01:34.323268  PCI: 00:15.2 cmd <- 02

 1540 18:01:34.326668  PCI: 00:15.3 subsystem <- 8086/a0eb

 1541 18:01:34.330117  PCI: 00:15.3 cmd <- 02

 1542 18:01:34.333329  PCI: 00:16.0 subsystem <- 8086/a0e0

 1543 18:01:34.336748  PCI: 00:16.0 cmd <- 02

 1544 18:01:34.340015  PCI: 00:19.1 subsystem <- 8086/a0c6

 1545 18:01:34.340102  PCI: 00:19.1 cmd <- 02

 1546 18:01:34.343486  PCI: 00:1d.0 bridge ctrl <- 0013

 1547 18:01:34.350087  PCI: 00:1d.0 subsystem <- 8086/a0b0

 1548 18:01:34.350173  PCI: 00:1d.0 cmd <- 06

 1549 18:01:34.353746  PCI: 00:1e.0 subsystem <- 8086/a0a8

 1550 18:01:34.356662  PCI: 00:1e.0 cmd <- 06

 1551 18:01:34.360297  PCI: 00:1e.2 subsystem <- 8086/a0aa

 1552 18:01:34.363553  PCI: 00:1e.2 cmd <- 06

 1553 18:01:34.367102  PCI: 00:1e.3 subsystem <- 8086/a0ab

 1554 18:01:34.370328  PCI: 00:1e.3 cmd <- 02

 1555 18:01:34.373473  PCI: 00:1f.0 subsystem <- 8086/a087

 1556 18:01:34.376696  PCI: 00:1f.0 cmd <- 407

 1557 18:01:34.380165  PCI: 00:1f.3 subsystem <- 8086/a0c8

 1558 18:01:34.383585  PCI: 00:1f.3 cmd <- 02

 1559 18:01:34.387103  PCI: 00:1f.5 subsystem <- 8086/a0a4

 1560 18:01:34.390090  PCI: 00:1f.5 cmd <- 406

 1561 18:01:34.393404  PCI: 01:00.0 cmd <- 02

 1562 18:01:34.397241  done.

 1563 18:01:34.400692  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms

 1564 18:01:34.404126  Initializing devices...

 1565 18:01:34.407246  Root Device init

 1566 18:01:34.410835  Chrome EC: Set SMI mask to 0x0000000000000000

 1567 18:01:34.417350  Chrome EC: clear events_b mask to 0x0000000000000000

 1568 18:01:34.424152  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1569 18:01:34.431004  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e

 1570 18:01:34.434027  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e

 1571 18:01:34.440860  Chrome EC: Set WAKE mask to 0x0000000000000000

 1572 18:01:34.444137  fw_config match found: DB_USB=USB3_ACTIVE

 1573 18:01:34.450738  Configure Right Type-C port orientation for retimer

 1574 18:01:34.454209  Root Device init finished in 44 msecs

 1575 18:01:34.457437  PCI: 00:00.0 init

 1576 18:01:34.460631  CPU TDP = 9 Watts

 1577 18:01:34.460713  CPU PL1 = 9 Watts

 1578 18:01:34.464291  CPU PL2 = 40 Watts

 1579 18:01:34.467546  CPU PL4 = 83 Watts

 1580 18:01:34.470761  PCI: 00:00.0 init finished in 8 msecs

 1581 18:01:34.470852  PCI: 00:02.0 init

 1582 18:01:34.474376  GMA: Found VBT in CBFS

 1583 18:01:34.477665  GMA: Found valid VBT in CBFS

 1584 18:01:34.484251  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1585 18:01:34.491003                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000

 1586 18:01:34.494176  PCI: 00:02.0 init finished in 18 msecs

 1587 18:01:34.497635  PCI: 00:05.0 init

 1588 18:01:34.500695  PCI: 00:05.0 init finished in 0 msecs

 1589 18:01:34.504011  PCI: 00:08.0 init

 1590 18:01:34.507750  PCI: 00:08.0 init finished in 0 msecs

 1591 18:01:34.510757  PCI: 00:14.0 init

 1592 18:01:34.513966  PCI: 00:14.0 init finished in 0 msecs

 1593 18:01:34.514059  PCI: 00:14.2 init

 1594 18:01:34.520646  PCI: 00:14.2 init finished in 0 msecs

 1595 18:01:34.520765  PCI: 00:15.0 init

 1596 18:01:34.524236  I2C bus 0 version 0x3230302a

 1597 18:01:34.527445  DW I2C bus 0 at 0x7fe4e000 (400 KHz)

 1598 18:01:34.533909  PCI: 00:15.0 init finished in 6 msecs

 1599 18:01:34.533995  PCI: 00:15.1 init

 1600 18:01:34.537203  I2C bus 1 version 0x3230302a

 1601 18:01:34.540646  DW I2C bus 1 at 0x7fe4f000 (400 KHz)

 1602 18:01:34.543945  PCI: 00:15.1 init finished in 6 msecs

 1603 18:01:34.547776  PCI: 00:15.2 init

 1604 18:01:34.550720  I2C bus 2 version 0x3230302a

 1605 18:01:34.554256  DW I2C bus 2 at 0x7fe50000 (400 KHz)

 1606 18:01:34.557713  PCI: 00:15.2 init finished in 6 msecs

 1607 18:01:34.560809  PCI: 00:15.3 init

 1608 18:01:34.564423  I2C bus 3 version 0x3230302a

 1609 18:01:34.567242  DW I2C bus 3 at 0x7fe51000 (400 KHz)

 1610 18:01:34.570795  PCI: 00:15.3 init finished in 6 msecs

 1611 18:01:34.573926  PCI: 00:16.0 init

 1612 18:01:34.577532  PCI: 00:16.0 init finished in 0 msecs

 1613 18:01:34.577616  PCI: 00:19.1 init

 1614 18:01:34.580723  I2C bus 5 version 0x3230302a

 1615 18:01:34.584102  DW I2C bus 5 at 0x7fe53000 (400 KHz)

 1616 18:01:34.590502  PCI: 00:19.1 init finished in 6 msecs

 1617 18:01:34.590632  PCI: 00:1d.0 init

 1618 18:01:34.594148  Initializing PCH PCIe bridge.

 1619 18:01:34.597184  PCI: 00:1d.0 init finished in 3 msecs

 1620 18:01:34.601183  PCI: 00:1f.0 init

 1621 18:01:34.604761  IOAPIC: Initializing IOAPIC at 0xfec00000

 1622 18:01:34.611291  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1623 18:01:34.611416  IOAPIC: ID = 0x02

 1624 18:01:34.614614  IOAPIC: Dumping registers

 1625 18:01:34.618098    reg 0x0000: 0x02000000

 1626 18:01:34.621510    reg 0x0001: 0x00770020

 1627 18:01:34.621649    reg 0x0002: 0x00000000

 1628 18:01:34.628237  PCI: 00:1f.0 init finished in 21 msecs

 1629 18:01:34.628359  PCI: 00:1f.2 init

 1630 18:01:34.631470  Disabling ACPI via APMC.

 1631 18:01:34.635115  APMC done.

 1632 18:01:34.638120  PCI: 00:1f.2 init finished in 5 msecs

 1633 18:01:34.649603  PCI: 01:00.0 init

 1634 18:01:34.653131  PCI: 01:00.0 init finished in 0 msecs

 1635 18:01:34.656249  PNP: 0c09.0 init

 1636 18:01:34.659722  Google Chrome EC uptime: 8.440 seconds

 1637 18:01:34.666171  Google Chrome AP resets since EC boot: 1

 1638 18:01:34.669945  Google Chrome most recent AP reset causes:

 1639 18:01:34.673142  	0.349: 32775 shutdown: entering G3

 1640 18:01:34.679489  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

 1641 18:01:34.683056  PNP: 0c09.0 init finished in 22 msecs

 1642 18:01:34.688586  Devices initialized

 1643 18:01:34.691787  Show all devs... After init.

 1644 18:01:34.694988  Root Device: enabled 1

 1645 18:01:34.695074  DOMAIN: 0000: enabled 1

 1646 18:01:34.698774  CPU_CLUSTER: 0: enabled 1

 1647 18:01:34.701970  PCI: 00:00.0: enabled 1

 1648 18:01:34.705168  PCI: 00:02.0: enabled 1

 1649 18:01:34.705253  PCI: 00:04.0: enabled 1

 1650 18:01:34.708356  PCI: 00:05.0: enabled 1

 1651 18:01:34.711855  PCI: 00:06.0: enabled 0

 1652 18:01:34.715209  PCI: 00:07.0: enabled 0

 1653 18:01:34.715291  PCI: 00:07.1: enabled 0

 1654 18:01:34.718480  PCI: 00:07.2: enabled 0

 1655 18:01:34.721653  PCI: 00:07.3: enabled 0

 1656 18:01:34.725334  PCI: 00:08.0: enabled 1

 1657 18:01:34.725414  PCI: 00:09.0: enabled 0

 1658 18:01:34.728532  PCI: 00:0a.0: enabled 0

 1659 18:01:34.731719  PCI: 00:0d.0: enabled 1

 1660 18:01:34.731801  PCI: 00:0d.1: enabled 0

 1661 18:01:34.735276  PCI: 00:0d.2: enabled 0

 1662 18:01:34.738340  PCI: 00:0d.3: enabled 0

 1663 18:01:34.741729  PCI: 00:0e.0: enabled 0

 1664 18:01:34.741809  PCI: 00:10.2: enabled 1

 1665 18:01:34.745221  PCI: 00:10.6: enabled 0

 1666 18:01:34.748551  PCI: 00:10.7: enabled 0

 1667 18:01:34.751858  PCI: 00:12.0: enabled 0

 1668 18:01:34.751963  PCI: 00:12.6: enabled 0

 1669 18:01:34.755115  PCI: 00:13.0: enabled 0

 1670 18:01:34.758569  PCI: 00:14.0: enabled 1

 1671 18:01:34.758674  PCI: 00:14.1: enabled 0

 1672 18:01:34.761946  PCI: 00:14.2: enabled 1

 1673 18:01:34.765474  PCI: 00:14.3: enabled 1

 1674 18:01:34.768762  PCI: 00:15.0: enabled 1

 1675 18:01:34.768841  PCI: 00:15.1: enabled 1

 1676 18:01:34.771821  PCI: 00:15.2: enabled 1

 1677 18:01:34.775197  PCI: 00:15.3: enabled 1

 1678 18:01:34.778846  PCI: 00:16.0: enabled 1

 1679 18:01:34.778924  PCI: 00:16.1: enabled 0

 1680 18:01:34.782008  PCI: 00:16.2: enabled 0

 1681 18:01:34.785337  PCI: 00:16.3: enabled 0

 1682 18:01:34.788591  PCI: 00:16.4: enabled 0

 1683 18:01:34.788701  PCI: 00:16.5: enabled 0

 1684 18:01:34.791752  PCI: 00:17.0: enabled 0

 1685 18:01:34.794943  PCI: 00:19.0: enabled 0

 1686 18:01:34.798694  PCI: 00:19.1: enabled 1

 1687 18:01:34.798799  PCI: 00:19.2: enabled 0

 1688 18:01:34.801822  PCI: 00:1c.0: enabled 1

 1689 18:01:34.805075  PCI: 00:1c.1: enabled 0

 1690 18:01:34.805169  PCI: 00:1c.2: enabled 0

 1691 18:01:34.808625  PCI: 00:1c.3: enabled 0

 1692 18:01:34.811655  PCI: 00:1c.4: enabled 0

 1693 18:01:34.815247  PCI: 00:1c.5: enabled 0

 1694 18:01:34.815375  PCI: 00:1c.6: enabled 1

 1695 18:01:34.818739  PCI: 00:1c.7: enabled 0

 1696 18:01:34.821968  PCI: 00:1d.0: enabled 1

 1697 18:01:34.825176  PCI: 00:1d.1: enabled 0

 1698 18:01:34.825304  PCI: 00:1d.2: enabled 1

 1699 18:01:34.828419  PCI: 00:1d.3: enabled 0

 1700 18:01:34.831698  PCI: 00:1e.0: enabled 1

 1701 18:01:34.831803  PCI: 00:1e.1: enabled 0

 1702 18:01:34.834960  PCI: 00:1e.2: enabled 1

 1703 18:01:34.838523  PCI: 00:1e.3: enabled 1

 1704 18:01:34.841704  PCI: 00:1f.0: enabled 1

 1705 18:01:34.841821  PCI: 00:1f.1: enabled 0

 1706 18:01:34.845157  PCI: 00:1f.2: enabled 1

 1707 18:01:34.848680  PCI: 00:1f.3: enabled 1

 1708 18:01:34.851753  PCI: 00:1f.4: enabled 0

 1709 18:01:34.851859  PCI: 00:1f.5: enabled 1

 1710 18:01:34.855096  PCI: 00:1f.6: enabled 0

 1711 18:01:34.858452  PCI: 00:1f.7: enabled 0

 1712 18:01:34.858566  APIC: 00: enabled 1

 1713 18:01:34.862007  GENERIC: 0.0: enabled 1

 1714 18:01:34.865201  GENERIC: 0.0: enabled 1

 1715 18:01:34.868392  GENERIC: 1.0: enabled 1

 1716 18:01:34.868515  GENERIC: 0.0: enabled 1

 1717 18:01:34.872043  GENERIC: 1.0: enabled 1

 1718 18:01:34.875108  USB0 port 0: enabled 1

 1719 18:01:34.878749  GENERIC: 0.0: enabled 1

 1720 18:01:34.878833  USB0 port 0: enabled 1

 1721 18:01:34.881948  GENERIC: 0.0: enabled 1

 1722 18:01:34.885082  I2C: 00:1a: enabled 1

 1723 18:01:34.885166  I2C: 00:31: enabled 1

 1724 18:01:34.888617  I2C: 00:32: enabled 1

 1725 18:01:34.892170  I2C: 00:10: enabled 1

 1726 18:01:34.892255  I2C: 00:15: enabled 1

 1727 18:01:34.895442  GENERIC: 0.0: enabled 0

 1728 18:01:34.898538  GENERIC: 1.0: enabled 0

 1729 18:01:34.901814  GENERIC: 0.0: enabled 1

 1730 18:01:34.901918  SPI: 00: enabled 1

 1731 18:01:34.904986  SPI: 00: enabled 1

 1732 18:01:34.905070  PNP: 0c09.0: enabled 1

 1733 18:01:34.908464  GENERIC: 0.0: enabled 1

 1734 18:01:34.911724  USB3 port 0: enabled 1

 1735 18:01:34.915324  USB3 port 1: enabled 1

 1736 18:01:34.915410  USB3 port 2: enabled 0

 1737 18:01:34.918483  USB3 port 3: enabled 0

 1738 18:01:34.921461  USB2 port 0: enabled 0

 1739 18:01:34.921549  USB2 port 1: enabled 1

 1740 18:01:34.924951  USB2 port 2: enabled 1

 1741 18:01:34.928158  USB2 port 3: enabled 0

 1742 18:01:34.931653  USB2 port 4: enabled 1

 1743 18:01:34.931738  USB2 port 5: enabled 0

 1744 18:01:34.934825  USB2 port 6: enabled 0

 1745 18:01:34.938481  USB2 port 7: enabled 0

 1746 18:01:34.938605  USB2 port 8: enabled 0

 1747 18:01:34.941610  USB2 port 9: enabled 0

 1748 18:01:34.944716  USB3 port 0: enabled 0

 1749 18:01:34.944815  USB3 port 1: enabled 1

 1750 18:01:34.948274  USB3 port 2: enabled 0

 1751 18:01:34.951714  USB3 port 3: enabled 0

 1752 18:01:34.954862  GENERIC: 0.0: enabled 1

 1753 18:01:34.954940  GENERIC: 1.0: enabled 1

 1754 18:01:34.958345  APIC: 01: enabled 1

 1755 18:01:34.961714  APIC: 02: enabled 1

 1756 18:01:34.961792  APIC: 05: enabled 1

 1757 18:01:34.964772  APIC: 06: enabled 1

 1758 18:01:34.964904  APIC: 03: enabled 1

 1759 18:01:34.970806  APIC: 04: enabled 1

 1760 18:01:34.971717  APIC: 07: enabled 1

 1761 18:01:34.971790  PCI: 01:00.0: enabled 1

 1762 18:01:34.978258  BS: BS_DEV_INIT run times (exec / console): 31 / 540 ms

 1763 18:01:34.981707  FMAP: area RW_ELOG found @ f30000 (4096 bytes)

 1764 18:01:34.988108  ELOG: NV offset 0xf30000 size 0x1000

 1765 18:01:34.994891  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1766 18:01:35.001363  ELOG: Event(17) added with size 13 at 2023-08-30 18:01:28 UTC

 1767 18:01:35.008212  ELOG: Event(92) added with size 9 at 2023-08-30 18:01:28 UTC

 1768 18:01:35.014885  ELOG: Event(93) added with size 9 at 2023-08-30 18:01:28 UTC

 1769 18:01:35.021608  ELOG: Event(9E) added with size 10 at 2023-08-30 18:01:28 UTC

 1770 18:01:35.028064  ELOG: Event(9F) added with size 14 at 2023-08-30 18:01:28 UTC

 1771 18:01:35.031634  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms

 1772 18:01:35.038073  ELOG: Event(A1) added with size 10 at 2023-08-30 18:01:28 UTC

 1773 18:01:35.044846  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1774 18:01:35.051701  ELOG: Event(A0) added with size 9 at 2023-08-30 18:01:28 UTC

 1775 18:01:35.055119  elog_add_boot_reason: Logged dev mode boot

 1776 18:01:35.061390  BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms

 1777 18:01:35.065073  Finalize devices...

 1778 18:01:35.065154  Devices finalized

 1779 18:01:35.071732  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms

 1780 18:01:35.078780  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)

 1781 18:01:35.081805  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 1782 18:01:35.088462  ME: HFSTS1                      : 0x80030055

 1783 18:01:35.091694  ME: HFSTS2                      : 0x30280116

 1784 18:01:35.094701  ME: HFSTS3                      : 0x00000050

 1785 18:01:35.101609  ME: HFSTS4                      : 0x00004000

 1786 18:01:35.104894  ME: HFSTS5                      : 0x00000000

 1787 18:01:35.111681  ME: HFSTS6                      : 0x00400006

 1788 18:01:35.114885  ME: Manufacturing Mode          : YES

 1789 18:01:35.118409  ME: SPI Protection Mode Enabled : NO

 1790 18:01:35.121484  ME: FW Partition Table          : OK

 1791 18:01:35.125154  ME: Bringup Loader Failure      : NO

 1792 18:01:35.128313  ME: Firmware Init Complete      : NO

 1793 18:01:35.131782  ME: Boot Options Present        : NO

 1794 18:01:35.135014  ME: Update In Progress          : NO

 1795 18:01:35.138366  ME: D0i3 Support                : YES

 1796 18:01:35.145135  ME: Low Power State Enabled     : NO

 1797 18:01:35.147906  ME: CPU Replaced                : YES

 1798 18:01:35.151619  ME: CPU Replacement Valid       : YES

 1799 18:01:35.154800  ME: Current Working State       : 5

 1800 18:01:35.158191  ME: Current Operation State     : 1

 1801 18:01:35.161241  ME: Current Operation Mode      : 3

 1802 18:01:35.164980  ME: Error Code                  : 0

 1803 18:01:35.168102  ME: Enhanced Debug Mode         : NO

 1804 18:01:35.174666  ME: CPU Debug Disabled          : YES

 1805 18:01:35.178253  ME: TXT Support                 : NO

 1806 18:01:35.181262  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms

 1807 18:01:35.191488  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4

 1808 18:01:35.194847  CBFS: 'fallback/slic' not found.

 1809 18:01:35.198224  ACPI: Writing ACPI tables at 76b01000.

 1810 18:01:35.198329  ACPI:    * FACS

 1811 18:01:35.201452  ACPI:    * DSDT

 1812 18:01:35.204851  Ramoops buffer: 0x100000@0x76a00000.

 1813 18:01:35.208010  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

 1814 18:01:35.214880  FMAP: area RW_VPD found @ f35000 (8192 bytes)

 1815 18:01:35.217945  Google Chrome EC: version:

 1816 18:01:35.221647  	ro: voema_v2.0.7540-147f8d37d1

 1817 18:01:35.225205  	rw: voema_v2.0.7540-147f8d37d1

 1818 18:01:35.228344    running image: 2

 1819 18:01:35.231603  PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000

 1820 18:01:35.237169  ACPI:    * FADT

 1821 18:01:35.237254  SCI is IRQ9

 1822 18:01:35.243943  ACPI: added table 1/32, length now 40

 1823 18:01:35.244028  ACPI:     * SSDT

 1824 18:01:35.247069  Found 1 CPU(s) with 8 core(s) each.

 1825 18:01:35.253779  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2

 1826 18:01:35.257018  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 1827 18:01:35.260565  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 1828 18:01:35.263572  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a

 1829 18:01:35.270252  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 1830 18:01:35.276984  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 1831 18:01:35.280410  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10

 1832 18:01:35.286884  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 1833 18:01:35.293554  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)

 1834 18:01:35.296939  \_SB.PCI0.RP09: Added StorageD3Enable property

 1835 18:01:35.300224  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1836 18:01:35.307015  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 1837 18:01:35.313472  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 1838 18:01:35.316980  PS2K: Passing 80 keymaps to kernel

 1839 18:01:35.323521  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 1840 18:01:35.330579  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1

 1841 18:01:35.337049  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1

 1842 18:01:35.343557  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 1843 18:01:35.350306  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4

 1844 18:01:35.356852  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1

 1845 18:01:35.363854  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 1846 18:01:35.370148  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 1847 18:01:35.373597  ACPI: added table 2/32, length now 44

 1848 18:01:35.373686  ACPI:    * MCFG

 1849 18:01:35.376856  ACPI: added table 3/32, length now 48

 1850 18:01:35.380578  ACPI:    * TPM2

 1851 18:01:35.383722  TPM2 log created at 0x769f0000

 1852 18:01:35.386938  ACPI: added table 4/32, length now 52

 1853 18:01:35.387045  ACPI:    * MADT

 1854 18:01:35.390028  SCI is IRQ9

 1855 18:01:35.393462  ACPI: added table 5/32, length now 56

 1856 18:01:35.396655  current = 76b09850

 1857 18:01:35.396729  ACPI:    * DMAR

 1858 18:01:35.400110  ACPI: added table 6/32, length now 60

 1859 18:01:35.403437  ACPI: added table 7/32, length now 64

 1860 18:01:35.407011  ACPI:    * HPET

 1861 18:01:35.409984  ACPI: added table 8/32, length now 68

 1862 18:01:35.410063  ACPI: done.

 1863 18:01:35.413803  ACPI tables: 35216 bytes.

 1864 18:01:35.416877  smbios_write_tables: 769ef000

 1865 18:01:35.420165  EC returned error result code 3

 1866 18:01:35.423607  Couldn't obtain OEM name from CBI

 1867 18:01:35.426886  Create SMBIOS type 16

 1868 18:01:35.430568  Create SMBIOS type 17

 1869 18:01:35.433652  GENERIC: 0.0 (WIFI Device)

 1870 18:01:35.433731  SMBIOS tables: 1750 bytes.

 1871 18:01:35.440522  Writing table forward entry at 0x00000500

 1872 18:01:35.447145  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c

 1873 18:01:35.450626  Writing coreboot table at 0x76b25000

 1874 18:01:35.457174   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1875 18:01:35.460435   1. 0000000000001000-000000000009ffff: RAM

 1876 18:01:35.463627   2. 00000000000a0000-00000000000fffff: RESERVED

 1877 18:01:35.470210   3. 0000000000100000-00000000769eefff: RAM

 1878 18:01:35.473519   4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES

 1879 18:01:35.480152   5. 0000000076b98000-0000000076c09fff: RAMSTAGE

 1880 18:01:35.486871   6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES

 1881 18:01:35.490082   7. 0000000077000000-000000007fbfffff: RESERVED

 1882 18:01:35.493267   8. 00000000c0000000-00000000cfffffff: RESERVED

 1883 18:01:35.500018   9. 00000000f8000000-00000000f9ffffff: RESERVED

 1884 18:01:35.502972  10. 00000000fb000000-00000000fb000fff: RESERVED

 1885 18:01:35.509904  11. 00000000fe000000-00000000fe00ffff: RESERVED

 1886 18:01:35.513262  12. 00000000fed80000-00000000fed87fff: RESERVED

 1887 18:01:35.520209  13. 00000000fed90000-00000000fed92fff: RESERVED

 1888 18:01:35.523373  14. 00000000feda0000-00000000feda1fff: RESERVED

 1889 18:01:35.529812  15. 00000000fedc0000-00000000feddffff: RESERVED

 1890 18:01:35.532945  16. 0000000100000000-00000002803fffff: RAM

 1891 18:01:35.536192  Passing 4 GPIOs to payload:

 1892 18:01:35.539951              NAME |       PORT | POLARITY |     VALUE

 1893 18:01:35.546649               lid |  undefined |     high |      high

 1894 18:01:35.549805             power |  undefined |     high |       low

 1895 18:01:35.556287             oprom |  undefined |     high |       low

 1896 18:01:35.563225          EC in RW | 0x000000e5 |     high |      high

 1897 18:01:35.569611  Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 6f27

 1898 18:01:35.569719  coreboot table: 1576 bytes.

 1899 18:01:35.576279  IMD ROOT    0. 0x76fff000 0x00001000

 1900 18:01:35.579677  IMD SMALL   1. 0x76ffe000 0x00001000

 1901 18:01:35.582825  FSP MEMORY  2. 0x76c4e000 0x003b0000

 1902 18:01:35.586616  VPD         3. 0x76c4d000 0x00000367

 1903 18:01:35.589944  RO MCACHE   4. 0x76c4c000 0x00000fdc

 1904 18:01:35.593271  CONSOLE     5. 0x76c2c000 0x00020000

 1905 18:01:35.596495  FMAP        6. 0x76c2b000 0x00000578

 1906 18:01:35.599525  TIME STAMP  7. 0x76c2a000 0x00000910

 1907 18:01:35.606511  VBOOT WORK  8. 0x76c16000 0x00014000

 1908 18:01:35.609918  ROMSTG STCK 9. 0x76c15000 0x00001000

 1909 18:01:35.612932  AFTER CAR  10. 0x76c0a000 0x0000b000

 1910 18:01:35.616468  RAMSTAGE   11. 0x76b97000 0x00073000

 1911 18:01:35.619653  REFCODE    12. 0x76b42000 0x00055000

 1912 18:01:35.623267  SMM BACKUP 13. 0x76b32000 0x00010000

 1913 18:01:35.626359  4f444749   14. 0x76b30000 0x00002000

 1914 18:01:35.629660  EXT VBT15. 0x76b2d000 0x0000219f

 1915 18:01:35.632640  COREBOOT   16. 0x76b25000 0x00008000

 1916 18:01:35.636357  ACPI       17. 0x76b01000 0x00024000

 1917 18:01:35.642893  ACPI GNVS  18. 0x76b00000 0x00001000

 1918 18:01:35.646096  RAMOOPS    19. 0x76a00000 0x00100000

 1919 18:01:35.649549  TPM2 TCGLOG20. 0x769f0000 0x00010000

 1920 18:01:35.652777  SMBIOS     21. 0x769ef000 0x00000800

 1921 18:01:35.656347  IMD small region:

 1922 18:01:35.659541    IMD ROOT    0. 0x76ffec00 0x00000400

 1923 18:01:35.662838    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 1924 18:01:35.666394    POWER STATE 2. 0x76ffeb80 0x00000044

 1925 18:01:35.669704    ROMSTAGE    3. 0x76ffeb60 0x00000004

 1926 18:01:35.672863    MEM INFO    4. 0x76ffe980 0x000001e0

 1927 18:01:35.679695  BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms

 1928 18:01:35.682709  MTRR: Physical address space:

 1929 18:01:35.689408  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1930 18:01:35.696063  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1931 18:01:35.703058  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 1932 18:01:35.709520  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0

 1933 18:01:35.712989  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1

 1934 18:01:35.719478  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0

 1935 18:01:35.726404  0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6

 1936 18:01:35.729671  MTRR: Fixed MSR 0x250 0x0606060606060606

 1937 18:01:35.736128  MTRR: Fixed MSR 0x258 0x0606060606060606

 1938 18:01:35.739779  MTRR: Fixed MSR 0x259 0x0000000000000000

 1939 18:01:35.742868  MTRR: Fixed MSR 0x268 0x0606060606060606

 1940 18:01:35.746135  MTRR: Fixed MSR 0x269 0x0606060606060606

 1941 18:01:35.752830  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1942 18:01:35.756291  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1943 18:01:35.759825  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1944 18:01:35.762939  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1945 18:01:35.769515  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1946 18:01:35.772641  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1947 18:01:35.776243  call enable_fixed_mtrr()

 1948 18:01:35.779453  CPU physical address size: 39 bits

 1949 18:01:35.782590  MTRR: default type WB/UC MTRR counts: 6/6.

 1950 18:01:35.786132  MTRR: UC selected as default type.

 1951 18:01:35.792861  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 1952 18:01:35.799367  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 1953 18:01:35.806072  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 1954 18:01:35.812905  MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1

 1955 18:01:35.819543  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 1956 18:01:35.826244  MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6

 1957 18:01:35.826352  

 1958 18:01:35.826447  MTRR check

 1959 18:01:35.829435  Fixed MTRRs   : Enabled

 1960 18:01:35.832721  Variable MTRRs: Enabled

 1961 18:01:35.832810  

 1962 18:01:35.835946  MTRR: Fixed MSR 0x250 0x0606060606060606

 1963 18:01:35.839291  MTRR: Fixed MSR 0x258 0x0606060606060606

 1964 18:01:35.846148  MTRR: Fixed MSR 0x259 0x0000000000000000

 1965 18:01:35.849414  MTRR: Fixed MSR 0x268 0x0606060606060606

 1966 18:01:35.852695  MTRR: Fixed MSR 0x269 0x0606060606060606

 1967 18:01:35.855919  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1968 18:01:35.862766  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1969 18:01:35.865871  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1970 18:01:35.869036  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1971 18:01:35.872678  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1972 18:01:35.875885  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1973 18:01:35.885813  BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms

 1974 18:01:35.885901  call enable_fixed_mtrr()

 1975 18:01:35.890803  Checking cr50 for pending updates

 1976 18:01:35.895731  CPU physical address size: 39 bits

 1977 18:01:35.898810  MTRR: Fixed MSR 0x250 0x0606060606060606

 1978 18:01:35.902050  MTRR: Fixed MSR 0x250 0x0606060606060606

 1979 18:01:35.905500  MTRR: Fixed MSR 0x258 0x0606060606060606

 1980 18:01:35.908661  MTRR: Fixed MSR 0x259 0x0000000000000000

 1981 18:01:35.915419  MTRR: Fixed MSR 0x268 0x0606060606060606

 1982 18:01:35.918448  MTRR: Fixed MSR 0x269 0x0606060606060606

 1983 18:01:35.921774  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1984 18:01:35.925159  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1985 18:01:35.932082  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1986 18:01:35.935420  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1987 18:01:35.938597  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1988 18:01:35.941963  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1989 18:01:35.949245  MTRR: Fixed MSR 0x258 0x0606060606060606

 1990 18:01:35.952584  MTRR: Fixed MSR 0x259 0x0000000000000000

 1991 18:01:35.955887  MTRR: Fixed MSR 0x268 0x0606060606060606

 1992 18:01:35.959563  MTRR: Fixed MSR 0x269 0x0606060606060606

 1993 18:01:35.966049  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1994 18:01:35.969154  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1995 18:01:35.972802  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1996 18:01:35.975857  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1997 18:01:35.982736  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1998 18:01:35.985885  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1999 18:01:35.989401  call enable_fixed_mtrr()

 2000 18:01:35.992564  call enable_fixed_mtrr()

 2001 18:01:35.996122  MTRR: Fixed MSR 0x250 0x0606060606060606

 2002 18:01:35.999247  MTRR: Fixed MSR 0x250 0x0606060606060606

 2003 18:01:36.002472  MTRR: Fixed MSR 0x258 0x0606060606060606

 2004 18:01:36.009251  MTRR: Fixed MSR 0x259 0x0000000000000000

 2005 18:01:36.012579  MTRR: Fixed MSR 0x268 0x0606060606060606

 2006 18:01:36.015752  MTRR: Fixed MSR 0x269 0x0606060606060606

 2007 18:01:36.019156  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2008 18:01:36.022732  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2009 18:01:36.029025  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2010 18:01:36.032361  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2011 18:01:36.035773  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2012 18:01:36.039458  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2013 18:01:36.046837  MTRR: Fixed MSR 0x258 0x0606060606060606

 2014 18:01:36.046959  call enable_fixed_mtrr()

 2015 18:01:36.053280  MTRR: Fixed MSR 0x259 0x0000000000000000

 2016 18:01:36.056794  MTRR: Fixed MSR 0x268 0x0606060606060606

 2017 18:01:36.060270  MTRR: Fixed MSR 0x269 0x0606060606060606

 2018 18:01:36.063466  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2019 18:01:36.070232  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2020 18:01:36.073319  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2021 18:01:36.076685  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2022 18:01:36.079834  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2023 18:01:36.086716  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2024 18:01:36.089853  CPU physical address size: 39 bits

 2025 18:01:36.093105  call enable_fixed_mtrr()

 2026 18:01:36.096342  CPU physical address size: 39 bits

 2027 18:01:36.099841  CPU physical address size: 39 bits

 2028 18:01:36.106658  MTRR: Fixed MSR 0x250 0x0606060606060606

 2029 18:01:36.109690  MTRR: Fixed MSR 0x250 0x0606060606060606

 2030 18:01:36.113385  MTRR: Fixed MSR 0x258 0x0606060606060606

 2031 18:01:36.116462  MTRR: Fixed MSR 0x259 0x0000000000000000

 2032 18:01:36.123323  MTRR: Fixed MSR 0x268 0x0606060606060606

 2033 18:01:36.126431  MTRR: Fixed MSR 0x269 0x0606060606060606

 2034 18:01:36.130136  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2035 18:01:36.133292  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2036 18:01:36.136631  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2037 18:01:36.143111  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2038 18:01:36.146869  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2039 18:01:36.150127  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2040 18:01:36.156693  MTRR: Fixed MSR 0x258 0x0606060606060606

 2041 18:01:36.156786  call enable_fixed_mtrr()

 2042 18:01:36.163127  MTRR: Fixed MSR 0x259 0x0000000000000000

 2043 18:01:36.166654  MTRR: Fixed MSR 0x268 0x0606060606060606

 2044 18:01:36.169754  MTRR: Fixed MSR 0x269 0x0606060606060606

 2045 18:01:36.173008  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2046 18:01:36.179903  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2047 18:01:36.183019  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2048 18:01:36.186611  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2049 18:01:36.189918  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2050 18:01:36.196519  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2051 18:01:36.199722  CPU physical address size: 39 bits

 2052 18:01:36.202955  call enable_fixed_mtrr()

 2053 18:01:36.207197  Reading cr50 TPM mode

 2054 18:01:36.210988  CPU physical address size: 39 bits

 2055 18:01:36.214113  CPU physical address size: 39 bits

 2056 18:01:36.217287  BS: BS_PAYLOAD_LOAD entry times (exec / console): 320 / 6 ms

 2057 18:01:36.227495  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60

 2058 18:01:36.230830  Checking segment from ROM address 0xffc02b38

 2059 18:01:36.234226  Checking segment from ROM address 0xffc02b54

 2060 18:01:36.240862  Loading segment from ROM address 0xffc02b38

 2061 18:01:36.240947    code (compression=0)

 2062 18:01:36.250923    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64

 2063 18:01:36.257452  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64

 2064 18:01:36.260878  it's not compressed!

 2065 18:01:36.400414  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70

 2066 18:01:36.407061  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c

 2067 18:01:36.413453  Loading segment from ROM address 0xffc02b54

 2068 18:01:36.413531    Entry Point 0x30000000

 2069 18:01:36.416930  Loaded segments

 2070 18:01:36.423649  BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms

 2071 18:01:36.466298  Finalizing chipset.

 2072 18:01:36.469978  Finalizing SMM.

 2073 18:01:36.470107  APMC done.

 2074 18:01:36.476598  BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms

 2075 18:01:36.479698  mp_park_aps done after 0 msecs.

 2076 18:01:36.483123  Jumping to boot code at 0x30000000(0x76b25000)

 2077 18:01:36.492951  CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes

 2078 18:01:36.493049  

 2079 18:01:36.493118  

 2080 18:01:36.493180  

 2081 18:01:36.496105  Starting depthcharge on Voema...

 2082 18:01:36.496190  

 2083 18:01:36.496581  end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
 2084 18:01:36.496713  start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
 2085 18:01:36.496821  Setting prompt string to ['volteer:']
 2086 18:01:36.496904  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
 2087 18:01:36.506207  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2088 18:01:36.506340  

 2089 18:01:36.513062  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2090 18:01:36.513188  

 2091 18:01:36.516081  Looking for NVMe Controller 0x3005f220 @ 00:1d:00

 2092 18:01:36.520404  

 2093 18:01:36.520528  Failed to find eMMC card reader

 2094 18:01:36.520643  

 2095 18:01:36.523596  Wipe memory regions:

 2096 18:01:36.523720  

 2097 18:01:36.527013  	[0x00000000001000, 0x000000000a0000)

 2098 18:01:36.527132  

 2099 18:01:36.530267  	[0x00000000100000, 0x00000030000000)

 2100 18:01:36.557555  

 2101 18:01:36.561024  	[0x00000032662db0, 0x000000769ef000)

 2102 18:01:36.595967  

 2103 18:01:36.599221  	[0x00000100000000, 0x00000280400000)

 2104 18:01:36.799479  

 2105 18:01:36.802891  ec_init: CrosEC protocol v3 supported (256, 256)

 2106 18:01:36.802980  

 2107 18:01:36.809865  update_port_state: port C0 state: usb enable 1 mux conn 0

 2108 18:01:36.809960  

 2109 18:01:36.819718  update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1

 2110 18:01:36.819801  

 2111 18:01:36.823017  pmc_check_ipc_sts: STS_BUSY done after 1512 us

 2112 18:01:36.823097  

 2113 18:01:36.829698  send_conn_disc_msg: pmc_send_cmd succeeded

 2114 18:01:37.260937  

 2115 18:01:37.261125  R8152: Initializing

 2116 18:01:37.261233  

 2117 18:01:37.264391  Version 6 (ocp_data = 5c30)

 2118 18:01:37.264470  

 2119 18:01:37.267540  R8152: Done initializing

 2120 18:01:37.267635  

 2121 18:01:37.270732  Adding net device

 2122 18:01:37.573349  

 2123 18:01:37.576618  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35

 2124 18:01:37.576745  

 2125 18:01:37.576824  

 2126 18:01:37.576889  

 2127 18:01:37.580053  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2129 18:01:37.680443  volteer: tftpboot 192.168.201.1 11385817/tftp-deploy-8d7jfq48/kernel/bzImage 11385817/tftp-deploy-8d7jfq48/kernel/cmdline 11385817/tftp-deploy-8d7jfq48/ramdisk/ramdisk.cpio.gz

 2130 18:01:37.680646  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2131 18:01:37.680775  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
 2132 18:01:37.684974  tftpboot 192.168.201.1 11385817/tftp-deploy-8d7jfq48/kernel/bzIploy-8d7jfq48/kernel/cmdline 11385817/tftp-deploy-8d7jfq48/ramdisk/ramdisk.cpio.gz

 2133 18:01:37.685085  

 2134 18:01:37.685166  Waiting for link

 2135 18:01:37.888454  

 2136 18:01:37.888631  done.

 2137 18:01:37.888732  

 2138 18:01:37.888812  MAC: 00:24:32:30:78:74

 2139 18:01:37.888880  

 2140 18:01:37.891648  Sending DHCP discover... done.

 2141 18:01:37.891761  

 2142 18:01:37.894890  Waiting for reply... done.

 2143 18:01:37.895004  

 2144 18:01:37.898127  Sending DHCP request... done.

 2145 18:01:37.898238  

 2146 18:01:37.901656  Waiting for reply... done.

 2147 18:01:37.901764  

 2148 18:01:37.904733  My ip is 192.168.201.14

 2149 18:01:37.904818  

 2150 18:01:37.908321  The DHCP server ip is 192.168.201.1

 2151 18:01:37.908435  

 2152 18:01:37.914771  TFTP server IP predefined by user: 192.168.201.1

 2153 18:01:37.914882  

 2154 18:01:37.921468  Bootfile predefined by user: 11385817/tftp-deploy-8d7jfq48/kernel/bzImage

 2155 18:01:37.921552  

 2156 18:01:37.924710  Sending tftp read request... done.

 2157 18:01:37.924835  

 2158 18:01:37.927783  Waiting for the transfer... 

 2159 18:01:37.927888  

 2160 18:01:38.490595  00000000 ################################################################

 2161 18:01:38.490778  

 2162 18:01:39.028660  00080000 ################################################################

 2163 18:01:39.028822  

 2164 18:01:39.567554  00100000 ################################################################

 2165 18:01:39.567737  

 2166 18:01:40.104894  00180000 ################################################################

 2167 18:01:40.105046  

 2168 18:01:40.641422  00200000 ################################################################

 2169 18:01:40.641600  

 2170 18:01:41.181432  00280000 ################################################################

 2171 18:01:41.181625  

 2172 18:01:41.711092  00300000 ################################################################

 2173 18:01:41.711299  

 2174 18:01:42.244679  00380000 ################################################################

 2175 18:01:42.244880  

 2176 18:01:42.776559  00400000 ################################################################

 2177 18:01:42.776828  

 2178 18:01:43.315096  00480000 ################################################################

 2179 18:01:43.315348  

 2180 18:01:43.864904  00500000 ################################################################

 2181 18:01:43.865057  

 2182 18:01:44.386725  00580000 ################################################################

 2183 18:01:44.386902  

 2184 18:01:44.904584  00600000 ################################################################

 2185 18:01:44.904765  

 2186 18:01:45.432194  00680000 ################################################################

 2187 18:01:45.432371  

 2188 18:01:45.951650  00700000 ################################################################

 2189 18:01:45.951816  

 2190 18:01:46.482330  00780000 ################################################################

 2191 18:01:46.482531  

 2192 18:01:47.021180  00800000 ################################################################

 2193 18:01:47.021330  

 2194 18:01:47.569668  00880000 ################################################################

 2195 18:01:47.569816  

 2196 18:01:48.137634  00900000 ################################################################

 2197 18:01:48.137783  

 2198 18:01:48.697462  00980000 ################################################################

 2199 18:01:48.697598  

 2200 18:01:49.254741  00a00000 ################################################################

 2201 18:01:49.255013  

 2202 18:01:49.716072  00a80000 ######################################################### done.

 2203 18:01:49.716237  

 2204 18:01:49.719246  The bootfile was 11469312 bytes long.

 2205 18:01:49.719357  

 2206 18:01:49.722394  Sending tftp read request... done.

 2207 18:01:49.722479  

 2208 18:01:49.725654  Waiting for the transfer... 

 2209 18:01:49.725754  

 2210 18:01:50.268674  00000000 ################################################################

 2211 18:01:50.268873  

 2212 18:01:50.803035  00080000 ################################################################

 2213 18:01:50.803172  

 2214 18:01:51.352157  00100000 ################################################################

 2215 18:01:51.352296  

 2216 18:01:51.978657  00180000 ################################################################

 2217 18:01:51.978797  

 2218 18:01:52.622433  00200000 ################################################################

 2219 18:01:52.622633  

 2220 18:01:53.256118  00280000 ################################################################

 2221 18:01:53.256293  

 2222 18:01:53.825195  00300000 ################################################################

 2223 18:01:53.825334  

 2224 18:01:54.390406  00380000 ################################################################

 2225 18:01:54.390543  

 2226 18:01:54.950831  00400000 ################################################################

 2227 18:01:54.951010  

 2228 18:01:55.506188  00480000 ################################################################

 2229 18:01:55.506320  

 2230 18:01:56.043051  00500000 ################################################################

 2231 18:01:56.043233  

 2232 18:01:56.568733  00580000 ################################################################

 2233 18:01:56.568907  

 2234 18:01:57.194328  00600000 ################################################################

 2235 18:01:57.194504  

 2236 18:01:57.738015  00680000 ################################################################

 2237 18:01:57.738224  

 2238 18:01:58.276948  00700000 ################################################################

 2239 18:01:58.277084  

 2240 18:01:58.809012  00780000 ################################################################

 2241 18:01:58.809151  

 2242 18:01:59.338252  00800000 ################################################################

 2243 18:01:59.338402  

 2244 18:01:59.869436  00880000 ################################################################

 2245 18:01:59.869599  

 2246 18:02:00.400901  00900000 ################################################################

 2247 18:02:00.401089  

 2248 18:02:00.928297  00980000 ################################################################

 2249 18:02:00.928460  

 2250 18:02:01.472120  00a00000 ################################################################

 2251 18:02:01.472294  

 2252 18:02:02.003064  00a80000 ################################################################

 2253 18:02:02.003244  

 2254 18:02:02.535774  00b00000 ################################################################

 2255 18:02:02.535922  

 2256 18:02:03.056898  00b80000 ################################################################

 2257 18:02:03.057117  

 2258 18:02:03.584555  00c00000 ################################################################

 2259 18:02:03.584721  

 2260 18:02:04.110605  00c80000 ################################################################

 2261 18:02:04.110758  

 2262 18:02:04.653417  00d00000 ################################################################

 2263 18:02:04.653564  

 2264 18:02:05.185431  00d80000 ################################################################

 2265 18:02:05.185595  

 2266 18:02:05.734539  00e00000 ################################################################

 2267 18:02:05.734696  

 2268 18:02:06.264561  00e80000 ################################################################

 2269 18:02:06.264709  

 2270 18:02:06.788597  00f00000 ################################################################

 2271 18:02:06.788772  

 2272 18:02:07.340511  00f80000 ################################################################

 2273 18:02:07.340699  

 2274 18:02:07.887248  01000000 ################################################################

 2275 18:02:07.887398  

 2276 18:02:08.440612  01080000 ################################################################

 2277 18:02:08.440848  

 2278 18:02:08.991723  01100000 ################################################################

 2279 18:02:08.991858  

 2280 18:02:09.550802  01180000 ################################################################

 2281 18:02:09.550939  

 2282 18:02:10.100338  01200000 ################################################################

 2283 18:02:10.100470  

 2284 18:02:10.664647  01280000 ################################################################

 2285 18:02:10.664841  

 2286 18:02:11.213012  01300000 ################################################################

 2287 18:02:11.213163  

 2288 18:02:11.770546  01380000 ################################################################

 2289 18:02:11.770719  

 2290 18:02:12.386350  01400000 ################################################################

 2291 18:02:12.386544  

 2292 18:02:12.923832  01480000 ################################################################

 2293 18:02:12.923981  

 2294 18:02:13.490776  01500000 ################################################################

 2295 18:02:13.490942  

 2296 18:02:14.029635  01580000 ################################################################

 2297 18:02:14.029852  

 2298 18:02:14.561384  01600000 ################################################################

 2299 18:02:14.561538  

 2300 18:02:15.111064  01680000 ################################################################

 2301 18:02:15.111245  

 2302 18:02:15.649074  01700000 ################################################################

 2303 18:02:15.649224  

 2304 18:02:16.248037  01780000 ################################################################

 2305 18:02:16.248233  

 2306 18:02:16.871727  01800000 ################################################################

 2307 18:02:16.871898  

 2308 18:02:17.531837  01880000 ################################################################

 2309 18:02:17.531994  

 2310 18:02:18.196018  01900000 ################################################################

 2311 18:02:18.196203  

 2312 18:02:18.772612  01980000 ################################################################

 2313 18:02:18.772775  

 2314 18:02:19.310458  01a00000 ################################################################

 2315 18:02:19.310682  

 2316 18:02:19.849371  01a80000 ################################################################

 2317 18:02:19.849512  

 2318 18:02:20.393513  01b00000 ################################################################

 2319 18:02:20.393712  

 2320 18:02:20.935089  01b80000 ################################################################

 2321 18:02:20.935238  

 2322 18:02:21.484459  01c00000 ################################################################

 2323 18:02:21.484607  

 2324 18:02:22.038332  01c80000 ################################################################

 2325 18:02:22.038491  

 2326 18:02:22.601947  01d00000 ################################################################

 2327 18:02:22.602097  

 2328 18:02:23.138667  01d80000 ################################################################

 2329 18:02:23.138801  

 2330 18:02:23.673392  01e00000 ################################################################

 2331 18:02:23.673534  

 2332 18:02:24.204840  01e80000 ################################################################

 2333 18:02:24.204994  

 2334 18:02:24.736035  01f00000 ################################################################

 2335 18:02:24.736182  

 2336 18:02:25.281562  01f80000 ################################################################

 2337 18:02:25.281756  

 2338 18:02:25.824670  02000000 ################################################################

 2339 18:02:25.824910  

 2340 18:02:26.388423  02080000 ################################################################

 2341 18:02:26.388634  

 2342 18:02:26.940978  02100000 ################################################################

 2343 18:02:26.941125  

 2344 18:02:27.501924  02180000 ################################################################

 2345 18:02:27.502109  

 2346 18:02:28.062503  02200000 ################################################################

 2347 18:02:28.062655  

 2348 18:02:28.393694  02280000 ###################################### done.

 2349 18:02:28.393904  

 2350 18:02:28.396630  Sending tftp read request... done.

 2351 18:02:28.396763  

 2352 18:02:28.399940  Waiting for the transfer... 

 2353 18:02:28.400064  

 2354 18:02:28.400184  00000000 # done.

 2355 18:02:28.400295  

 2356 18:02:28.410141  Command line loaded dynamically from TFTP file: 11385817/tftp-deploy-8d7jfq48/kernel/cmdline

 2357 18:02:28.410233  

 2358 18:02:28.426364  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2359 18:02:28.433688  

 2360 18:02:28.436870  Shutting down all USB controllers.

 2361 18:02:28.436953  

 2362 18:02:28.437019  Removing current net device

 2363 18:02:28.437079  

 2364 18:02:28.440165  Finalizing coreboot

 2365 18:02:28.440249  

 2366 18:02:28.446943  Exiting depthcharge with code 4 at timestamp: 60635516

 2367 18:02:28.447071  

 2368 18:02:28.447228  

 2369 18:02:28.447345  Starting kernel ...

 2370 18:02:28.447464  

 2371 18:02:28.447581  

 2372 18:02:28.448187  end: 2.2.4 bootloader-commands (duration 00:00:52) [common]
 2373 18:02:28.448348  start: 2.2.5 auto-login-action (timeout 00:03:53) [common]
 2374 18:02:28.448474  Setting prompt string to ['Linux version [0-9]']
 2375 18:02:28.448597  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2376 18:02:28.448719  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2378 18:06:21.448627  end: 2.2.5 auto-login-action (duration 00:03:53) [common]
 2380 18:06:21.448842  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 233 seconds'
 2382 18:06:21.449000  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2385 18:06:21.449256  end: 2 depthcharge-action (duration 00:05:00) [common]
 2387 18:06:21.449527  Cleaning after the job
 2388 18:06:21.449617  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11385817/tftp-deploy-8d7jfq48/ramdisk
 2389 18:06:21.453189  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11385817/tftp-deploy-8d7jfq48/kernel
 2390 18:06:21.454466  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11385817/tftp-deploy-8d7jfq48/modules
 2391 18:06:21.454991  start: 4.1 power-off (timeout 00:00:30) [common]
 2392 18:06:21.455150  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-1' '--port=1' '--command=off'
 2393 18:06:21.532389  >> Command sent successfully.

 2394 18:06:21.534807  Returned 0 in 0 seconds
 2395 18:06:21.635149  end: 4.1 power-off (duration 00:00:00) [common]
 2397 18:06:21.635463  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2398 18:06:21.635712  Listened to connection for namespace 'common' for up to 1s
 2399 18:06:22.636684  Finalising connection for namespace 'common'
 2400 18:06:22.636903  Disconnecting from shell: Finalise
 2401 18:06:22.636985  

 2402 18:06:22.737273  end: 4.2 read-feedback (duration 00:00:01) [common]
 2403 18:06:22.737405  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11385817
 2404 18:06:22.811410  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11385817
 2405 18:06:22.811603  JobError: Your job cannot terminate cleanly.