Boot log: asus-C436FA-Flip-hatch

    1 18:01:03.407666  lava-dispatcher, installed at version: 2023.06
    2 18:01:03.407925  start: 0 validate
    3 18:01:03.408062  Start time: 2023-08-30 18:01:03.408054+00:00 (UTC)
    4 18:01:03.408270  Using caching service: 'http://localhost/cache/?uri=%s'
    5 18:01:03.408423  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
    6 18:01:03.677523  Using caching service: 'http://localhost/cache/?uri=%s'
    7 18:01:03.678120  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.292-cip102-130-g18b864070345b%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 18:01:03.946327  Using caching service: 'http://localhost/cache/?uri=%s'
    9 18:01:03.946547  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 18:01:07.844390  Using caching service: 'http://localhost/cache/?uri=%s'
   11 18:01:07.845162  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.292-cip102-130-g18b864070345b%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 18:01:08.199581  validate duration: 4.79
   14 18:01:08.200713  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 18:01:08.201121  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 18:01:08.201472  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 18:01:09.149888  Not decompressing ramdisk as can be used compressed.
   18 18:01:09.150369  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/initrd.cpio.gz
   19 18:01:09.150675  saving as /var/lib/lava/dispatcher/tmp/11385815/tftp-deploy-vshma22z/ramdisk/initrd.cpio.gz
   20 18:01:09.150963  total size: 5432480 (5 MB)
   21 18:01:09.550299  progress   0 % (0 MB)
   22 18:01:09.552174  progress   5 % (0 MB)
   23 18:01:09.553608  progress  10 % (0 MB)
   24 18:01:09.555011  progress  15 % (0 MB)
   25 18:01:09.579949  progress  20 % (1 MB)
   26 18:01:09.581416  progress  25 % (1 MB)
   27 18:01:09.611782  progress  30 % (1 MB)
   28 18:01:09.613417  progress  35 % (1 MB)
   29 18:01:09.635744  progress  40 % (2 MB)
   30 18:01:09.637220  progress  45 % (2 MB)
   31 18:01:09.638613  progress  50 % (2 MB)
   32 18:01:09.664921  progress  55 % (2 MB)
   33 18:01:09.666386  progress  60 % (3 MB)
   34 18:01:09.695780  progress  65 % (3 MB)
   35 18:01:09.703249  progress  70 % (3 MB)
   36 18:01:09.711597  progress  75 % (3 MB)
   37 18:01:09.716068  progress  80 % (4 MB)
   38 18:01:09.748628  progress  85 % (4 MB)
   39 18:01:09.750327  progress  90 % (4 MB)
   40 18:01:09.776443  progress  95 % (4 MB)
   41 18:01:09.777939  progress 100 % (5 MB)
   42 18:01:09.778162  5 MB downloaded in 0.63 s (8.26 MB/s)
   43 18:01:09.778319  end: 1.1.1 http-download (duration 00:00:02) [common]
   45 18:01:09.778555  end: 1.1 download-retry (duration 00:00:02) [common]
   46 18:01:09.778641  start: 1.2 download-retry (timeout 00:09:58) [common]
   47 18:01:09.778727  start: 1.2.1 http-download (timeout 00:09:58) [common]
   48 18:01:09.778850  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.292-cip102-130-g18b864070345b/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 18:01:09.778919  saving as /var/lib/lava/dispatcher/tmp/11385815/tftp-deploy-vshma22z/kernel/bzImage
   50 18:01:09.778980  total size: 11469312 (10 MB)
   51 18:01:09.779040  No compression specified
   52 18:01:09.780331  progress   0 % (0 MB)
   53 18:01:09.810461  progress   5 % (0 MB)
   54 18:01:09.834167  progress  10 % (1 MB)
   55 18:01:09.865957  progress  15 % (1 MB)
   56 18:01:09.894127  progress  20 % (2 MB)
   57 18:01:09.922084  progress  25 % (2 MB)
   58 18:01:09.950353  progress  30 % (3 MB)
   59 18:01:09.975644  progress  35 % (3 MB)
   60 18:01:10.006363  progress  40 % (4 MB)
   61 18:01:10.032119  progress  45 % (4 MB)
   62 18:01:10.058628  progress  50 % (5 MB)
   63 18:01:10.096909  progress  55 % (6 MB)
   64 18:01:10.104973  progress  60 % (6 MB)
   65 18:01:10.142471  progress  65 % (7 MB)
   66 18:01:10.170600  progress  70 % (7 MB)
   67 18:01:10.198450  progress  75 % (8 MB)
   68 18:01:10.251885  progress  80 % (8 MB)
   69 18:01:10.261750  progress  85 % (9 MB)
   70 18:01:10.307770  progress  90 % (9 MB)
   71 18:01:10.343773  progress  95 % (10 MB)
   72 18:01:10.375945  progress 100 % (10 MB)
   73 18:01:10.376112  10 MB downloaded in 0.60 s (18.32 MB/s)
   74 18:01:10.376264  end: 1.2.1 http-download (duration 00:00:01) [common]
   76 18:01:10.376495  end: 1.2 download-retry (duration 00:00:01) [common]
   77 18:01:10.376580  start: 1.3 download-retry (timeout 00:09:58) [common]
   78 18:01:10.376662  start: 1.3.1 http-download (timeout 00:09:58) [common]
   79 18:01:10.376790  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/full.rootfs.tar.xz
   80 18:01:10.376859  saving as /var/lib/lava/dispatcher/tmp/11385815/tftp-deploy-vshma22z/nfsrootfs/full.rootfs.tar
   81 18:01:10.376920  total size: 207157356 (197 MB)
   82 18:01:10.376980  Using unxz to decompress xz
   83 18:01:10.381007  progress   0 % (0 MB)
   84 18:01:12.553356  progress   5 % (9 MB)
   85 18:01:14.799919  progress  10 % (19 MB)
   86 18:01:18.249626  progress  15 % (29 MB)
   87 18:01:19.216011  progress  20 % (39 MB)
   88 18:01:20.349078  progress  25 % (49 MB)
   89 18:01:22.345090  progress  30 % (59 MB)
   90 18:01:23.596274  progress  35 % (69 MB)
   91 18:01:25.675533  progress  40 % (79 MB)
   92 18:01:27.259829  progress  45 % (88 MB)
   93 18:01:31.089972  progress  50 % (98 MB)
   94 18:01:32.316635  progress  55 % (108 MB)
   95 18:01:33.622647  progress  60 % (118 MB)
   96 18:01:33.761628  progress  65 % (128 MB)
   97 18:01:33.901333  progress  70 % (138 MB)
   98 18:01:33.994545  progress  75 % (148 MB)
   99 18:01:34.064061  progress  80 % (158 MB)
  100 18:01:34.263958  progress  85 % (167 MB)
  101 18:01:34.408869  progress  90 % (177 MB)
  102 18:01:34.885987  progress  95 % (187 MB)
  103 18:01:35.596112  progress 100 % (197 MB)
  104 18:01:35.603130  197 MB downloaded in 25.23 s (7.83 MB/s)
  105 18:01:35.603419  end: 1.3.1 http-download (duration 00:00:25) [common]
  107 18:01:35.603720  end: 1.3 download-retry (duration 00:00:25) [common]
  108 18:01:35.603810  start: 1.4 download-retry (timeout 00:09:33) [common]
  109 18:01:35.603897  start: 1.4.1 http-download (timeout 00:09:33) [common]
  110 18:01:35.604058  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.292-cip102-130-g18b864070345b/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 18:01:35.604132  saving as /var/lib/lava/dispatcher/tmp/11385815/tftp-deploy-vshma22z/modules/modules.tar
  112 18:01:35.604193  total size: 484136 (0 MB)
  113 18:01:35.604255  Using unxz to decompress xz
  114 18:01:35.872818  progress   6 % (0 MB)
  115 18:01:35.873501  progress  13 % (0 MB)
  116 18:01:35.873876  progress  20 % (0 MB)
  117 18:01:35.876206  progress  27 % (0 MB)
  118 18:01:35.879401  progress  33 % (0 MB)
  119 18:01:35.881983  progress  40 % (0 MB)
  120 18:01:35.884698  progress  47 % (0 MB)
  121 18:01:35.887278  progress  54 % (0 MB)
  122 18:01:35.889753  progress  60 % (0 MB)
  123 18:01:35.892703  progress  67 % (0 MB)
  124 18:01:35.894937  progress  74 % (0 MB)
  125 18:01:35.897124  progress  81 % (0 MB)
  126 18:01:35.899431  progress  87 % (0 MB)
  127 18:01:35.901199  progress  94 % (0 MB)
  128 18:01:35.903544  progress 100 % (0 MB)
  129 18:01:35.910176  0 MB downloaded in 0.31 s (1.51 MB/s)
  130 18:01:35.910437  end: 1.4.1 http-download (duration 00:00:00) [common]
  132 18:01:35.910796  end: 1.4 download-retry (duration 00:00:00) [common]
  133 18:01:35.910889  start: 1.5 prepare-tftp-overlay (timeout 00:09:32) [common]
  134 18:01:35.910984  start: 1.5.1 extract-nfsrootfs (timeout 00:09:32) [common]
  135 18:01:52.600036  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11385815/extract-nfsrootfs-2lqahset
  136 18:01:52.600262  end: 1.5.1 extract-nfsrootfs (duration 00:00:17) [common]
  137 18:01:52.600365  start: 1.5.2 lava-overlay (timeout 00:09:16) [common]
  138 18:01:52.600541  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11385815/lava-overlay-ubwry3ie
  139 18:01:52.600695  makedir: /var/lib/lava/dispatcher/tmp/11385815/lava-overlay-ubwry3ie/lava-11385815/bin
  140 18:01:52.600803  makedir: /var/lib/lava/dispatcher/tmp/11385815/lava-overlay-ubwry3ie/lava-11385815/tests
  141 18:01:52.600907  makedir: /var/lib/lava/dispatcher/tmp/11385815/lava-overlay-ubwry3ie/lava-11385815/results
  142 18:01:52.601013  Creating /var/lib/lava/dispatcher/tmp/11385815/lava-overlay-ubwry3ie/lava-11385815/bin/lava-add-keys
  143 18:01:52.601171  Creating /var/lib/lava/dispatcher/tmp/11385815/lava-overlay-ubwry3ie/lava-11385815/bin/lava-add-sources
  144 18:01:52.601304  Creating /var/lib/lava/dispatcher/tmp/11385815/lava-overlay-ubwry3ie/lava-11385815/bin/lava-background-process-start
  145 18:01:52.601442  Creating /var/lib/lava/dispatcher/tmp/11385815/lava-overlay-ubwry3ie/lava-11385815/bin/lava-background-process-stop
  146 18:01:52.601572  Creating /var/lib/lava/dispatcher/tmp/11385815/lava-overlay-ubwry3ie/lava-11385815/bin/lava-common-functions
  147 18:01:52.601717  Creating /var/lib/lava/dispatcher/tmp/11385815/lava-overlay-ubwry3ie/lava-11385815/bin/lava-echo-ipv4
  148 18:01:52.601858  Creating /var/lib/lava/dispatcher/tmp/11385815/lava-overlay-ubwry3ie/lava-11385815/bin/lava-install-packages
  149 18:01:52.601988  Creating /var/lib/lava/dispatcher/tmp/11385815/lava-overlay-ubwry3ie/lava-11385815/bin/lava-installed-packages
  150 18:01:52.602130  Creating /var/lib/lava/dispatcher/tmp/11385815/lava-overlay-ubwry3ie/lava-11385815/bin/lava-os-build
  151 18:01:52.602264  Creating /var/lib/lava/dispatcher/tmp/11385815/lava-overlay-ubwry3ie/lava-11385815/bin/lava-probe-channel
  152 18:01:52.602392  Creating /var/lib/lava/dispatcher/tmp/11385815/lava-overlay-ubwry3ie/lava-11385815/bin/lava-probe-ip
  153 18:01:52.602524  Creating /var/lib/lava/dispatcher/tmp/11385815/lava-overlay-ubwry3ie/lava-11385815/bin/lava-target-ip
  154 18:01:52.602663  Creating /var/lib/lava/dispatcher/tmp/11385815/lava-overlay-ubwry3ie/lava-11385815/bin/lava-target-mac
  155 18:01:52.602794  Creating /var/lib/lava/dispatcher/tmp/11385815/lava-overlay-ubwry3ie/lava-11385815/bin/lava-target-storage
  156 18:01:52.602950  Creating /var/lib/lava/dispatcher/tmp/11385815/lava-overlay-ubwry3ie/lava-11385815/bin/lava-test-case
  157 18:01:52.603084  Creating /var/lib/lava/dispatcher/tmp/11385815/lava-overlay-ubwry3ie/lava-11385815/bin/lava-test-event
  158 18:01:52.603223  Creating /var/lib/lava/dispatcher/tmp/11385815/lava-overlay-ubwry3ie/lava-11385815/bin/lava-test-feedback
  159 18:01:52.603352  Creating /var/lib/lava/dispatcher/tmp/11385815/lava-overlay-ubwry3ie/lava-11385815/bin/lava-test-raise
  160 18:01:52.603479  Creating /var/lib/lava/dispatcher/tmp/11385815/lava-overlay-ubwry3ie/lava-11385815/bin/lava-test-reference
  161 18:01:52.603628  Creating /var/lib/lava/dispatcher/tmp/11385815/lava-overlay-ubwry3ie/lava-11385815/bin/lava-test-runner
  162 18:01:52.603776  Creating /var/lib/lava/dispatcher/tmp/11385815/lava-overlay-ubwry3ie/lava-11385815/bin/lava-test-set
  163 18:01:52.603908  Creating /var/lib/lava/dispatcher/tmp/11385815/lava-overlay-ubwry3ie/lava-11385815/bin/lava-test-shell
  164 18:01:52.604038  Updating /var/lib/lava/dispatcher/tmp/11385815/lava-overlay-ubwry3ie/lava-11385815/bin/lava-add-keys (debian)
  165 18:01:52.607281  Updating /var/lib/lava/dispatcher/tmp/11385815/lava-overlay-ubwry3ie/lava-11385815/bin/lava-add-sources (debian)
  166 18:01:52.611308  Updating /var/lib/lava/dispatcher/tmp/11385815/lava-overlay-ubwry3ie/lava-11385815/bin/lava-install-packages (debian)
  167 18:01:52.614426  Updating /var/lib/lava/dispatcher/tmp/11385815/lava-overlay-ubwry3ie/lava-11385815/bin/lava-installed-packages (debian)
  168 18:01:52.619088  Updating /var/lib/lava/dispatcher/tmp/11385815/lava-overlay-ubwry3ie/lava-11385815/bin/lava-os-build (debian)
  169 18:01:52.621163  Creating /var/lib/lava/dispatcher/tmp/11385815/lava-overlay-ubwry3ie/lava-11385815/environment
  170 18:01:52.621370  LAVA metadata
  171 18:01:52.621466  - LAVA_JOB_ID=11385815
  172 18:01:52.621537  - LAVA_DISPATCHER_IP=192.168.201.1
  173 18:01:52.621675  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:16) [common]
  174 18:01:52.621748  skipped lava-vland-overlay
  175 18:01:52.621832  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  176 18:01:52.621920  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:16) [common]
  177 18:01:52.621983  skipped lava-multinode-overlay
  178 18:01:52.622058  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  179 18:01:52.622156  start: 1.5.2.3 test-definition (timeout 00:09:16) [common]
  180 18:01:52.622240  Loading test definitions
  181 18:01:52.622338  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:16) [common]
  182 18:01:52.622413  Using /lava-11385815 at stage 0
  183 18:01:52.622753  uuid=11385815_1.5.2.3.1 testdef=None
  184 18:01:52.622853  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  185 18:01:52.622946  start: 1.5.2.3.2 test-overlay (timeout 00:09:16) [common]
  186 18:01:52.623459  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  188 18:01:52.623714  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:16) [common]
  189 18:01:52.645872  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  191 18:01:52.646182  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:16) [common]
  192 18:01:52.647419  runner path: /var/lib/lava/dispatcher/tmp/11385815/lava-overlay-ubwry3ie/lava-11385815/0/tests/0_timesync-off test_uuid 11385815_1.5.2.3.1
  193 18:01:52.647588  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  195 18:01:52.647827  start: 1.5.2.3.5 git-repo-action (timeout 00:09:16) [common]
  196 18:01:52.647902  Using /lava-11385815 at stage 0
  197 18:01:52.648009  Fetching tests from https://github.com/kernelci/test-definitions.git
  198 18:01:52.648092  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/11385815/lava-overlay-ubwry3ie/lava-11385815/0/tests/1_kselftest-filesystems'
  199 18:02:00.304524  Running '/usr/bin/git checkout kernelci.org
  200 18:02:00.449550  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/11385815/lava-overlay-ubwry3ie/lava-11385815/0/tests/1_kselftest-filesystems/automated/linux/kselftest/kselftest.yaml
  201 18:02:00.451824  uuid=11385815_1.5.2.3.5 testdef=None
  202 18:02:00.452317  end: 1.5.2.3.5 git-repo-action (duration 00:00:08) [common]
  204 18:02:00.453108  start: 1.5.2.3.6 test-overlay (timeout 00:09:08) [common]
  205 18:02:00.455462  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  207 18:02:00.456361  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:08) [common]
  208 18:02:00.612772  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  210 18:02:00.613058  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:08) [common]
  211 18:02:00.642473  runner path: /var/lib/lava/dispatcher/tmp/11385815/lava-overlay-ubwry3ie/lava-11385815/0/tests/1_kselftest-filesystems test_uuid 11385815_1.5.2.3.5
  212 18:02:00.642591  BOARD='asus-C436FA-Flip-hatch'
  213 18:02:00.642665  BRANCH='cip-gitlab'
  214 18:02:00.642726  SKIPFILE='/dev/null'
  215 18:02:00.642785  SKIP_INSTALL='True'
  216 18:02:00.642842  TESTPROG_URL='None'
  217 18:02:00.642899  TST_CASENAME=''
  218 18:02:00.642955  TST_CMDFILES='filesystems'
  219 18:02:00.643121  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  221 18:02:00.643336  Creating lava-test-runner.conf files
  222 18:02:00.643402  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11385815/lava-overlay-ubwry3ie/lava-11385815/0 for stage 0
  223 18:02:00.643501  - 0_timesync-off
  224 18:02:00.643572  - 1_kselftest-filesystems
  225 18:02:00.643715  end: 1.5.2.3 test-definition (duration 00:00:08) [common]
  226 18:02:00.643810  start: 1.5.2.4 compress-overlay (timeout 00:09:08) [common]
  227 18:02:08.517557  end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
  228 18:02:08.517714  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:00) [common]
  229 18:02:08.517847  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  230 18:02:08.517952  end: 1.5.2 lava-overlay (duration 00:00:16) [common]
  231 18:02:08.518051  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:00) [common]
  232 18:02:08.659522  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  233 18:02:08.659914  start: 1.5.4 extract-modules (timeout 00:09:00) [common]
  234 18:02:08.660031  extracting modules file /var/lib/lava/dispatcher/tmp/11385815/tftp-deploy-vshma22z/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11385815/extract-nfsrootfs-2lqahset
  235 18:02:08.682287  extracting modules file /var/lib/lava/dispatcher/tmp/11385815/tftp-deploy-vshma22z/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11385815/extract-overlay-ramdisk-0a897e6g/ramdisk
  236 18:02:08.704952  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  237 18:02:08.705106  start: 1.5.5 apply-overlay-tftp (timeout 00:08:59) [common]
  238 18:02:08.705200  [common] Applying overlay to NFS
  239 18:02:08.705272  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11385815/compress-overlay-_mo221cz/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11385815/extract-nfsrootfs-2lqahset
  240 18:02:09.662241  end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
  241 18:02:09.662419  start: 1.5.6 configure-preseed-file (timeout 00:08:59) [common]
  242 18:02:09.662511  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  243 18:02:09.662596  start: 1.5.7 compress-ramdisk (timeout 00:08:59) [common]
  244 18:02:09.662675  Building ramdisk /var/lib/lava/dispatcher/tmp/11385815/extract-overlay-ramdisk-0a897e6g/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11385815/extract-overlay-ramdisk-0a897e6g/ramdisk
  245 18:02:10.088838  >> 30352 blocks

  246 18:02:10.865215  rename /var/lib/lava/dispatcher/tmp/11385815/extract-overlay-ramdisk-0a897e6g/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11385815/tftp-deploy-vshma22z/ramdisk/ramdisk.cpio.gz
  247 18:02:10.865669  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  248 18:02:10.865797  start: 1.5.8 prepare-kernel (timeout 00:08:57) [common]
  249 18:02:10.865907  start: 1.5.8.1 prepare-fit (timeout 00:08:57) [common]
  250 18:02:10.866012  No mkimage arch provided, not using FIT.
  251 18:02:10.866134  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  252 18:02:10.866253  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  253 18:02:10.866395  end: 1.5 prepare-tftp-overlay (duration 00:00:35) [common]
  254 18:02:10.866516  start: 1.6 lxc-create-udev-rule-action (timeout 00:08:57) [common]
  255 18:02:10.866624  No LXC device requested
  256 18:02:10.866734  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  257 18:02:10.866848  start: 1.7 deploy-device-env (timeout 00:08:57) [common]
  258 18:02:10.866959  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  259 18:02:10.867059  Checking files for TFTP limit of 4294967296 bytes.
  260 18:02:10.867577  end: 1 tftp-deploy (duration 00:01:03) [common]
  261 18:02:10.867743  start: 2 depthcharge-action (timeout 00:05:00) [common]
  262 18:02:10.867837  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  263 18:02:10.867963  substitutions:
  264 18:02:10.868031  - {DTB}: None
  265 18:02:10.868093  - {INITRD}: 11385815/tftp-deploy-vshma22z/ramdisk/ramdisk.cpio.gz
  266 18:02:10.868152  - {KERNEL}: 11385815/tftp-deploy-vshma22z/kernel/bzImage
  267 18:02:10.868209  - {LAVA_MAC}: None
  268 18:02:10.868265  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11385815/extract-nfsrootfs-2lqahset
  269 18:02:10.868324  - {NFS_SERVER_IP}: 192.168.201.1
  270 18:02:10.868378  - {PRESEED_CONFIG}: None
  271 18:02:10.868432  - {PRESEED_LOCAL}: None
  272 18:02:10.868485  - {RAMDISK}: 11385815/tftp-deploy-vshma22z/ramdisk/ramdisk.cpio.gz
  273 18:02:10.868539  - {ROOT_PART}: None
  274 18:02:10.868592  - {ROOT}: None
  275 18:02:10.868646  - {SERVER_IP}: 192.168.201.1
  276 18:02:10.868699  - {TEE}: None
  277 18:02:10.868751  Parsed boot commands:
  278 18:02:10.868806  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  279 18:02:10.868991  Parsed boot commands: tftpboot 192.168.201.1 11385815/tftp-deploy-vshma22z/kernel/bzImage 11385815/tftp-deploy-vshma22z/kernel/cmdline 11385815/tftp-deploy-vshma22z/ramdisk/ramdisk.cpio.gz
  280 18:02:10.869082  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  281 18:02:10.869164  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  282 18:02:10.869260  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  283 18:02:10.869347  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  284 18:02:10.869420  Not connected, no need to disconnect.
  285 18:02:10.869494  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  286 18:02:10.869581  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  287 18:02:10.869652  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-0'
  288 18:02:10.873780  Setting prompt string to ['lava-test: # ']
  289 18:02:10.874205  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  290 18:02:10.874348  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  291 18:02:10.874477  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  292 18:02:10.874634  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  293 18:02:10.874978  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
  294 18:02:16.011118  >> Command sent successfully.

  295 18:02:16.013503  Returned 0 in 5 seconds
  296 18:02:16.113936  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  298 18:02:16.114272  end: 2.2.2 reset-device (duration 00:00:05) [common]
  299 18:02:16.114377  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  300 18:02:16.114470  Setting prompt string to 'Starting depthcharge on Helios...'
  301 18:02:16.114538  Changing prompt to 'Starting depthcharge on Helios...'
  302 18:02:16.114606  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  303 18:02:16.114886  [Enter `^Ec?' for help]

  304 18:02:16.734593  

  305 18:02:16.734754  

  306 18:02:16.744648  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  307 18:02:16.747765  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  308 18:02:16.754395  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  309 18:02:16.757639  CPU: AES supported, TXT NOT supported, VT supported

  310 18:02:16.764449  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  311 18:02:16.767721  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  312 18:02:16.774504  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  313 18:02:16.778295  VBOOT: Loading verstage.

  314 18:02:16.781222  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  315 18:02:16.787763  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  316 18:02:16.791087  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  317 18:02:16.794439  CBFS @ c08000 size 3f8000

  318 18:02:16.801147  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  319 18:02:16.804496  CBFS: Locating 'fallback/verstage'

  320 18:02:16.807955  CBFS: Found @ offset 10fb80 size 1072c

  321 18:02:16.811309  

  322 18:02:16.811510  

  323 18:02:16.821706  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  324 18:02:16.835758  Probing TPM: . done!

  325 18:02:16.839019  TPM ready after 0 ms

  326 18:02:16.842185  Connected to device vid:did:rid of 1ae0:0028:00

  327 18:02:16.852394  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  328 18:02:16.855878  Initialized TPM device CR50 revision 0

  329 18:02:16.902709  tlcl_send_startup: Startup return code is 0

  330 18:02:16.902929  TPM: setup succeeded

  331 18:02:16.915512  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  332 18:02:16.919516  Chrome EC: UHEPI supported

  333 18:02:16.922756  Phase 1

  334 18:02:16.925893  FMAP: area GBB found @ c05000 (12288 bytes)

  335 18:02:16.932344  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  336 18:02:16.932497  Phase 2

  337 18:02:16.935609  Phase 3

  338 18:02:16.939355  FMAP: area GBB found @ c05000 (12288 bytes)

  339 18:02:16.945910  VB2:vb2_report_dev_firmware() This is developer signed firmware

  340 18:02:16.952744  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  341 18:02:16.955992  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  342 18:02:16.962658  VB2:vb2_verify_keyblock() Checking keyblock signature...

  343 18:02:16.978191  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  344 18:02:16.981487  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  345 18:02:16.987882  VB2:vb2_verify_fw_preamble() Verifying preamble.

  346 18:02:16.992276  Phase 4

  347 18:02:16.995466  FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)

  348 18:02:17.002278  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  349 18:02:17.181753  VB2:vb2_rsa_verify_digest() Digest check failed!

  350 18:02:17.185295  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7

  351 18:02:17.188716  Saving nvdata

  352 18:02:17.191528  Reboot requested (10020007)

  353 18:02:17.195337  board_reset() called!

  354 18:02:17.195530  full_reset() called!

  355 18:02:21.714378  

  356 18:02:21.715011  

  357 18:02:21.715876  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  358 18:02:21.718143  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  359 18:02:21.721476  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  360 18:02:21.725096  CPU: AES supported, TXT NOT supported, VT supported

  361 18:02:21.728827  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  362 18:02:21.736478  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  363 18:02:21.740228  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  364 18:02:21.743938  VBOOT: Loading verstage.

  365 18:02:21.748271  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  366 18:02:21.755532  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  367 18:02:21.759351  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  368 18:02:21.763792  CBFS @ c08000 size 3f8000

  369 18:02:21.767422  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  370 18:02:21.771369  CBFS: Locating 'fallback/verstage'

  371 18:02:21.775100  CBFS: Found @ offset 10fb80 size 1072c

  372 18:02:21.775847  

  373 18:02:21.776417  

  374 18:02:21.785706  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  375 18:02:21.802448  Probing TPM: . done!

  376 18:02:21.806223  TPM ready after 0 ms

  377 18:02:21.810927  Connected to device vid:did:rid of 1ae0:0028:00

  378 18:02:21.818897  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  379 18:02:21.822365  Initialized TPM device CR50 revision 0

  380 18:02:21.886392  tlcl_send_startup: Startup return code is 0

  381 18:02:21.886685  TPM: setup succeeded

  382 18:02:21.899401  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  383 18:02:21.902829  Chrome EC: UHEPI supported

  384 18:02:21.906007  Phase 1

  385 18:02:21.909945  FMAP: area GBB found @ c05000 (12288 bytes)

  386 18:02:21.916036  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  387 18:02:21.923104  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  388 18:02:21.926243  Recovery requested (1009000e)

  389 18:02:21.931916  Saving nvdata

  390 18:02:21.938308  tlcl_extend: response is 0

  391 18:02:21.946895  tlcl_extend: response is 0

  392 18:02:21.953434  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  393 18:02:21.957094  CBFS @ c08000 size 3f8000

  394 18:02:21.963509  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  395 18:02:21.966752  CBFS: Locating 'fallback/romstage'

  396 18:02:21.970446  CBFS: Found @ offset 80 size 145fc

  397 18:02:21.973549  Accumulated console time in verstage 98 ms

  398 18:02:21.973873  

  399 18:02:21.974132  

  400 18:02:21.986622  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...

  401 18:02:21.993207  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  402 18:02:21.996416  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  403 18:02:22.000226  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  404 18:02:22.006592  gpe0_sts[1]: 00300000 gpe0_en[1]: 00000000

  405 18:02:22.009815  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  406 18:02:22.012944  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000

  407 18:02:22.016428  TCO_STS:   0000 0000

  408 18:02:22.019558  GEN_PMCON: e0015238 00000200

  409 18:02:22.022885  GBLRST_CAUSE: 00000000 00000000

  410 18:02:22.023034  prev_sleep_state 5

  411 18:02:22.027021  Boot Count incremented to 68617

  412 18:02:22.033763  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  413 18:02:22.037011  CBFS @ c08000 size 3f8000

  414 18:02:22.043623  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  415 18:02:22.044112  CBFS: Locating 'fspm.bin'

  416 18:02:22.049864  CBFS: Found @ offset 5ffc0 size 71000

  417 18:02:22.053079  Chrome EC: UHEPI supported

  418 18:02:22.059807  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

  419 18:02:22.063439  Probing TPM:  done!

  420 18:02:22.069991  Connected to device vid:did:rid of 1ae0:0028:00

  421 18:02:22.080039  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  422 18:02:22.086209  Initialized TPM device CR50 revision 0

  423 18:02:22.094821  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  424 18:02:22.101500  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  425 18:02:22.105074  MRC cache found, size 1948

  426 18:02:22.108295  bootmode is set to: 2

  427 18:02:22.111597  PRMRR disabled by config.

  428 18:02:22.111855  SPD INDEX = 1

  429 18:02:22.118169  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  430 18:02:22.121336  CBFS @ c08000 size 3f8000

  431 18:02:22.127907  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  432 18:02:22.128164  CBFS: Locating 'spd.bin'

  433 18:02:22.131451  CBFS: Found @ offset 5fb80 size 400

  434 18:02:22.134831  SPD: module type is LPDDR3

  435 18:02:22.138063  SPD: module part is 

  436 18:02:22.144774  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb

  437 18:02:22.147754  SPD: device width 4 bits, bus width 8 bits

  438 18:02:22.151448  SPD: module size is 4096 MB (per channel)

  439 18:02:22.154365  memory slot: 0 configuration done.

  440 18:02:22.157839  memory slot: 2 configuration done.

  441 18:02:22.208979  CBMEM:

  442 18:02:22.212191  IMD: root @ 99fff000 254 entries.

  443 18:02:22.215516  IMD: root @ 99ffec00 62 entries.

  444 18:02:22.218744  External stage cache:

  445 18:02:22.222068  IMD: root @ 9abff000 254 entries.

  446 18:02:22.225248  IMD: root @ 9abfec00 62 entries.

  447 18:02:22.228978  Chrome EC: clear events_b mask to 0x0000000020004000

  448 18:02:22.245019  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  449 18:02:22.258144  tlcl_write: response is 0

  450 18:02:22.266802  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  451 18:02:22.273399  MRC: TPM MRC hash updated successfully.

  452 18:02:22.273582  2 DIMMs found

  453 18:02:22.277012  SMM Memory Map

  454 18:02:22.280330  SMRAM       : 0x9a000000 0x1000000

  455 18:02:22.283643   Subregion 0: 0x9a000000 0xa00000

  456 18:02:22.286814   Subregion 1: 0x9aa00000 0x200000

  457 18:02:22.290032   Subregion 2: 0x9ac00000 0x400000

  458 18:02:22.293454  top_of_ram = 0x9a000000

  459 18:02:22.297011  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)

  460 18:02:22.303489  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)

  461 18:02:22.306636  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  462 18:02:22.313819  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  463 18:02:22.317038  CBFS @ c08000 size 3f8000

  464 18:02:22.320313  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  465 18:02:22.323518  CBFS: Locating 'fallback/postcar'

  466 18:02:22.329917  CBFS: Found @ offset 107000 size 4b44

  467 18:02:22.333701  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)

  468 18:02:22.345853  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8

  469 18:02:22.349361  Processing 180 relocs. Offset value of 0x97c0c000

  470 18:02:22.357707  Accumulated console time in romstage 286 ms

  471 18:02:22.357882  

  472 18:02:22.357988  

  473 18:02:22.367333  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...

  474 18:02:22.374222  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  475 18:02:22.377269  CBFS @ c08000 size 3f8000

  476 18:02:22.380659  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  477 18:02:22.387480  CBFS: Locating 'fallback/ramstage'

  478 18:02:22.390988  CBFS: Found @ offset 43380 size 1b9e8

  479 18:02:22.397072  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)

  480 18:02:22.429812  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38

  481 18:02:22.432790  Processing 3976 relocs. Offset value of 0x98db0000

  482 18:02:22.439518  Accumulated console time in postcar 52 ms

  483 18:02:22.440011  

  484 18:02:22.440359  

  485 18:02:22.449570  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...

  486 18:02:22.456191  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  487 18:02:22.459479  WARNING: RO_VPD is uninitialized or empty.

  488 18:02:22.462569  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  489 18:02:22.469309  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  490 18:02:22.469638  Normal boot.

  491 18:02:22.475969  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

  492 18:02:22.479087  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  493 18:02:22.482389  CBFS @ c08000 size 3f8000

  494 18:02:22.489056  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  495 18:02:22.492378  CBFS: Locating 'cpu_microcode_blob.bin'

  496 18:02:22.495927  CBFS: Found @ offset 14700 size 2ec00

  497 18:02:22.499359  microcode: sig=0x806ec pf=0x4 revision=0xc9

  498 18:02:22.502654  Skip microcode update

  499 18:02:22.509259  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  500 18:02:22.509689  CBFS @ c08000 size 3f8000

  501 18:02:22.515733  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  502 18:02:22.518979  CBFS: Locating 'fsps.bin'

  503 18:02:22.522248  CBFS: Found @ offset d1fc0 size 35000

  504 18:02:22.547920  Detected 4 core, 8 thread CPU.

  505 18:02:22.550979  Setting up SMI for CPU

  506 18:02:22.554540  IED base = 0x9ac00000

  507 18:02:22.554964  IED size = 0x00400000

  508 18:02:22.557502  Will perform SMM setup.

  509 18:02:22.564310  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.

  510 18:02:22.570659  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  511 18:02:22.574405  Processing 16 relocs. Offset value of 0x00030000

  512 18:02:22.577925  Attempting to start 7 APs

  513 18:02:22.580958  Waiting for 10ms after sending INIT.

  514 18:02:22.597248  Waiting for 1st SIPI to complete...done.

  515 18:02:22.597713  AP: slot 2 apic_id 1.

  516 18:02:22.603711  Waiting for 2nd SIPI to complete...done.

  517 18:02:22.604117  AP: slot 4 apic_id 7.

  518 18:02:22.607141  AP: slot 3 apic_id 3.

  519 18:02:22.610552  AP: slot 1 apic_id 2.

  520 18:02:22.610941  AP: slot 5 apic_id 6.

  521 18:02:22.614024  AP: slot 7 apic_id 4.

  522 18:02:22.616946  AP: slot 6 apic_id 5.

  523 18:02:22.623759  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  524 18:02:22.627032  Processing 13 relocs. Offset value of 0x00038000

  525 18:02:22.633910  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)

  526 18:02:22.640379  Installing SMM handler to 0x9a000000

  527 18:02:22.646959  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58

  528 18:02:22.650215  Processing 658 relocs. Offset value of 0x9a010000

  529 18:02:22.660060  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8

  530 18:02:22.663166  Processing 13 relocs. Offset value of 0x9a008000

  531 18:02:22.669729  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd

  532 18:02:22.676689  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd

  533 18:02:22.683060  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd

  534 18:02:22.686530  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd

  535 18:02:22.692802  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd

  536 18:02:22.699770  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd

  537 18:02:22.702910  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd

  538 18:02:22.709478  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)

  539 18:02:22.713121  Clearing SMI status registers

  540 18:02:22.716926  SMI_STS: PM1 

  541 18:02:22.717445  PM1_STS: PWRBTN 

  542 18:02:22.720152  TCO_STS: SECOND_TO 

  543 18:02:22.723264  New SMBASE 0x9a000000

  544 18:02:22.726880  In relocation handler: CPU 0

  545 18:02:22.729881  New SMBASE=0x9a000000 IEDBASE=0x9ac00000

  546 18:02:22.733672  Writing SMRR. base = 0x9a000006, mask=0xff000800

  547 18:02:22.737090  Relocation complete.

  548 18:02:22.740231  New SMBASE 0x99fff800

  549 18:02:22.743466  In relocation handler: CPU 2

  550 18:02:22.746738  New SMBASE=0x99fff800 IEDBASE=0x9ac00000

  551 18:02:22.749973  Writing SMRR. base = 0x9a000006, mask=0xff000800

  552 18:02:22.753103  Relocation complete.

  553 18:02:22.757087  New SMBASE 0x99fff400

  554 18:02:22.757621  In relocation handler: CPU 3

  555 18:02:22.763395  New SMBASE=0x99fff400 IEDBASE=0x9ac00000

  556 18:02:22.766710  Writing SMRR. base = 0x9a000006, mask=0xff000800

  557 18:02:22.770080  Relocation complete.

  558 18:02:22.770512  New SMBASE 0x99fffc00

  559 18:02:22.773872  In relocation handler: CPU 1

  560 18:02:22.779888  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000

  561 18:02:22.783320  Writing SMRR. base = 0x9a000006, mask=0xff000800

  562 18:02:22.786627  Relocation complete.

  563 18:02:22.787050  New SMBASE 0x99fff000

  564 18:02:22.789850  In relocation handler: CPU 4

  565 18:02:22.793397  New SMBASE=0x99fff000 IEDBASE=0x9ac00000

  566 18:02:22.799855  Writing SMRR. base = 0x9a000006, mask=0xff000800

  567 18:02:22.803073  Relocation complete.

  568 18:02:22.803390  New SMBASE 0x99ffec00

  569 18:02:22.806367  In relocation handler: CPU 5

  570 18:02:22.810022  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000

  571 18:02:22.816464  Writing SMRR. base = 0x9a000006, mask=0xff000800

  572 18:02:22.816715  Relocation complete.

  573 18:02:22.819992  New SMBASE 0x99ffe400

  574 18:02:22.823262  In relocation handler: CPU 7

  575 18:02:22.826396  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000

  576 18:02:22.833220  Writing SMRR. base = 0x9a000006, mask=0xff000800

  577 18:02:22.833479  Relocation complete.

  578 18:02:22.836318  New SMBASE 0x99ffe800

  579 18:02:22.840189  In relocation handler: CPU 6

  580 18:02:22.843581  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000

  581 18:02:22.850026  Writing SMRR. base = 0x9a000006, mask=0xff000800

  582 18:02:22.850196  Relocation complete.

  583 18:02:22.853054  Initializing CPU #0

  584 18:02:22.856396  CPU: vendor Intel device 806ec

  585 18:02:22.860133  CPU: family 06, model 8e, stepping 0c

  586 18:02:22.863404  Clearing out pending MCEs

  587 18:02:22.866417  Setting up local APIC...

  588 18:02:22.866586   apic_id: 0x00 done.

  589 18:02:22.869633  Turbo is available but hidden

  590 18:02:22.872970  Turbo is available and visible

  591 18:02:22.876740  VMX status: enabled

  592 18:02:22.879948  IA32_FEATURE_CONTROL status: locked

  593 18:02:22.883130  Skip microcode update

  594 18:02:22.883289  CPU #0 initialized

  595 18:02:22.886543  Initializing CPU #2

  596 18:02:22.886741  Initializing CPU #5

  597 18:02:22.889726  Initializing CPU #4

  598 18:02:22.892620  CPU: vendor Intel device 806ec

  599 18:02:22.896303  CPU: family 06, model 8e, stepping 0c

  600 18:02:22.899551  CPU: vendor Intel device 806ec

  601 18:02:22.902975  CPU: family 06, model 8e, stepping 0c

  602 18:02:22.906044  Clearing out pending MCEs

  603 18:02:22.909778  Clearing out pending MCEs

  604 18:02:22.913058  Setting up local APIC...

  605 18:02:22.913288  Initializing CPU #1

  606 18:02:22.916371  Initializing CPU #3

  607 18:02:22.919662  CPU: vendor Intel device 806ec

  608 18:02:22.923258  CPU: family 06, model 8e, stepping 0c

  609 18:02:22.926132  CPU: vendor Intel device 806ec

  610 18:02:22.929611  CPU: family 06, model 8e, stepping 0c

  611 18:02:22.932974  Clearing out pending MCEs

  612 18:02:22.933259  Clearing out pending MCEs

  613 18:02:22.936511  Setting up local APIC...

  614 18:02:22.939346  Setting up local APIC...

  615 18:02:22.942868  CPU: vendor Intel device 806ec

  616 18:02:22.946115  CPU: family 06, model 8e, stepping 0c

  617 18:02:22.949377  Clearing out pending MCEs

  618 18:02:22.949554  Initializing CPU #7

  619 18:02:22.952494  Initializing CPU #6

  620 18:02:22.956258  CPU: vendor Intel device 806ec

  621 18:02:22.959397  CPU: family 06, model 8e, stepping 0c

  622 18:02:22.962663  Setting up local APIC...

  623 18:02:22.965811   apic_id: 0x06 done.

  624 18:02:22.965944   apic_id: 0x07 done.

  625 18:02:22.969454  VMX status: enabled

  626 18:02:22.969584  VMX status: enabled

  627 18:02:22.975907  IA32_FEATURE_CONTROL status: locked

  628 18:02:22.979097  IA32_FEATURE_CONTROL status: locked

  629 18:02:22.979310  Skip microcode update

  630 18:02:22.982419  Skip microcode update

  631 18:02:22.985592  CPU #5 initialized

  632 18:02:22.985764  CPU #4 initialized

  633 18:02:22.989440  Setting up local APIC...

  634 18:02:22.992607  CPU: vendor Intel device 806ec

  635 18:02:22.995831  CPU: family 06, model 8e, stepping 0c

  636 18:02:22.999336  Clearing out pending MCEs

  637 18:02:23.002361  Clearing out pending MCEs

  638 18:02:23.002531  Setting up local APIC...

  639 18:02:23.005971   apic_id: 0x02 done.

  640 18:02:23.008990   apic_id: 0x03 done.

  641 18:02:23.009123  VMX status: enabled

  642 18:02:23.012601  VMX status: enabled

  643 18:02:23.015504  IA32_FEATURE_CONTROL status: locked

  644 18:02:23.019368  IA32_FEATURE_CONTROL status: locked

  645 18:02:23.022867  Skip microcode update

  646 18:02:23.023056  Skip microcode update

  647 18:02:23.025843  CPU #1 initialized

  648 18:02:23.029199  CPU #3 initialized

  649 18:02:23.029313   apic_id: 0x01 done.

  650 18:02:23.032401   apic_id: 0x04 done.

  651 18:02:23.035656  Setting up local APIC...

  652 18:02:23.035780  VMX status: enabled

  653 18:02:23.039038   apic_id: 0x05 done.

  654 18:02:23.039199  VMX status: enabled

  655 18:02:23.042664  VMX status: enabled

  656 18:02:23.046069  IA32_FEATURE_CONTROL status: locked

  657 18:02:23.049186  IA32_FEATURE_CONTROL status: locked

  658 18:02:23.052484  Skip microcode update

  659 18:02:23.055817  Skip microcode update

  660 18:02:23.056021  CPU #7 initialized

  661 18:02:23.059118  CPU #6 initialized

  662 18:02:23.062709  IA32_FEATURE_CONTROL status: locked

  663 18:02:23.065966  Skip microcode update

  664 18:02:23.066356  CPU #2 initialized

  665 18:02:23.069339  bsp_do_flight_plan done after 466 msecs.

  666 18:02:23.072452  CPU: frequency set to 4200 MHz

  667 18:02:23.075738  Enabling SMIs.

  668 18:02:23.076163  Locking SMM.

  669 18:02:23.091709  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  670 18:02:23.095175  CBFS @ c08000 size 3f8000

  671 18:02:23.101623  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  672 18:02:23.102100  CBFS: Locating 'vbt.bin'

  673 18:02:23.104842  CBFS: Found @ offset 5f5c0 size 499

  674 18:02:23.111672  Found a VBT of 4608 bytes after decompression

  675 18:02:23.291720  Display FSP Version Info HOB

  676 18:02:23.294857  Reference Code - CPU = 9.0.1e.30

  677 18:02:23.298575  uCode Version = 0.0.0.ca

  678 18:02:23.301525  TXT ACM version = ff.ff.ff.ffff

  679 18:02:23.304726  Display FSP Version Info HOB

  680 18:02:23.307991  Reference Code - ME = 9.0.1e.30

  681 18:02:23.311523  MEBx version = 0.0.0.0

  682 18:02:23.314906  ME Firmware Version = Consumer SKU

  683 18:02:23.318163  Display FSP Version Info HOB

  684 18:02:23.321126  Reference Code - CML PCH = 9.0.1e.30

  685 18:02:23.324928  PCH-CRID Status = Disabled

  686 18:02:23.327997  PCH-CRID Original Value = ff.ff.ff.ffff

  687 18:02:23.331096  PCH-CRID New Value = ff.ff.ff.ffff

  688 18:02:23.334415  OPROM - RST - RAID = ff.ff.ff.ffff

  689 18:02:23.338158  ChipsetInit Base Version = ff.ff.ff.ffff

  690 18:02:23.341198  ChipsetInit Oem Version = ff.ff.ff.ffff

  691 18:02:23.344529  Display FSP Version Info HOB

  692 18:02:23.351192  Reference Code - SA - System Agent = 9.0.1e.30

  693 18:02:23.354767  Reference Code - MRC = 0.7.1.6c

  694 18:02:23.355289  SA - PCIe Version = 9.0.1e.30

  695 18:02:23.357719  SA-CRID Status = Disabled

  696 18:02:23.361233  SA-CRID Original Value = 0.0.0.c

  697 18:02:23.364330  SA-CRID New Value = 0.0.0.c

  698 18:02:23.367559  OPROM - VBIOS = ff.ff.ff.ffff

  699 18:02:23.371375  RTC Init

  700 18:02:23.374342  Set power on after power failure.

  701 18:02:23.374771  Disabling Deep S3

  702 18:02:23.377481  Disabling Deep S3

  703 18:02:23.378139  Disabling Deep S4

  704 18:02:23.380926  Disabling Deep S4

  705 18:02:23.381388  Disabling Deep S5

  706 18:02:23.384410  Disabling Deep S5

  707 18:02:23.391012  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 190 exit 1

  708 18:02:23.391303  Enumerating buses...

  709 18:02:23.397631  Show all devs... Before device enumeration.

  710 18:02:23.397836  Root Device: enabled 1

  711 18:02:23.400748  CPU_CLUSTER: 0: enabled 1

  712 18:02:23.404043  DOMAIN: 0000: enabled 1

  713 18:02:23.407131  APIC: 00: enabled 1

  714 18:02:23.407271  PCI: 00:00.0: enabled 1

  715 18:02:23.410338  PCI: 00:02.0: enabled 1

  716 18:02:23.414196  PCI: 00:04.0: enabled 0

  717 18:02:23.414370  PCI: 00:05.0: enabled 0

  718 18:02:23.417398  PCI: 00:12.0: enabled 1

  719 18:02:23.420591  PCI: 00:12.5: enabled 0

  720 18:02:23.423879  PCI: 00:12.6: enabled 0

  721 18:02:23.424043  PCI: 00:14.0: enabled 1

  722 18:02:23.427116  PCI: 00:14.1: enabled 0

  723 18:02:23.430695  PCI: 00:14.3: enabled 1

  724 18:02:23.433980  PCI: 00:14.5: enabled 0

  725 18:02:23.434108  PCI: 00:15.0: enabled 1

  726 18:02:23.437070  PCI: 00:15.1: enabled 1

  727 18:02:23.440281  PCI: 00:15.2: enabled 0

  728 18:02:23.444061  PCI: 00:15.3: enabled 0

  729 18:02:23.444178  PCI: 00:16.0: enabled 1

  730 18:02:23.447320  PCI: 00:16.1: enabled 0

  731 18:02:23.450399  PCI: 00:16.2: enabled 0

  732 18:02:23.450508  PCI: 00:16.3: enabled 0

  733 18:02:23.453687  PCI: 00:16.4: enabled 0

  734 18:02:23.457622  PCI: 00:16.5: enabled 0

  735 18:02:23.460609  PCI: 00:17.0: enabled 1

  736 18:02:23.461035  PCI: 00:19.0: enabled 1

  737 18:02:23.463790  PCI: 00:19.1: enabled 0

  738 18:02:23.467218  PCI: 00:19.2: enabled 0

  739 18:02:23.470461  PCI: 00:1a.0: enabled 0

  740 18:02:23.471142  PCI: 00:1c.0: enabled 0

  741 18:02:23.473853  PCI: 00:1c.1: enabled 0

  742 18:02:23.477279  PCI: 00:1c.2: enabled 0

  743 18:02:23.480350  PCI: 00:1c.3: enabled 0

  744 18:02:23.480877  PCI: 00:1c.4: enabled 0

  745 18:02:23.484086  PCI: 00:1c.5: enabled 0

  746 18:02:23.487334  PCI: 00:1c.6: enabled 0

  747 18:02:23.487906  PCI: 00:1c.7: enabled 0

  748 18:02:23.490494  PCI: 00:1d.0: enabled 1

  749 18:02:23.494411  PCI: 00:1d.1: enabled 0

  750 18:02:23.497138  PCI: 00:1d.2: enabled 0

  751 18:02:23.497568  PCI: 00:1d.3: enabled 0

  752 18:02:23.500488  PCI: 00:1d.4: enabled 0

  753 18:02:23.503706  PCI: 00:1d.5: enabled 1

  754 18:02:23.507401  PCI: 00:1e.0: enabled 1

  755 18:02:23.507879  PCI: 00:1e.1: enabled 0

  756 18:02:23.510659  PCI: 00:1e.2: enabled 1

  757 18:02:23.513822  PCI: 00:1e.3: enabled 1

  758 18:02:23.517172  PCI: 00:1f.0: enabled 1

  759 18:02:23.517595  PCI: 00:1f.1: enabled 1

  760 18:02:23.520369  PCI: 00:1f.2: enabled 1

  761 18:02:23.523445  PCI: 00:1f.3: enabled 1

  762 18:02:23.523939  PCI: 00:1f.4: enabled 1

  763 18:02:23.526755  PCI: 00:1f.5: enabled 1

  764 18:02:23.530560  PCI: 00:1f.6: enabled 0

  765 18:02:23.533485  USB0 port 0: enabled 1

  766 18:02:23.534256  I2C: 00:15: enabled 1

  767 18:02:23.536631  I2C: 00:5d: enabled 1

  768 18:02:23.540062  GENERIC: 0.0: enabled 1

  769 18:02:23.540789  I2C: 00:1a: enabled 1

  770 18:02:23.543208  I2C: 00:38: enabled 1

  771 18:02:23.547214  I2C: 00:39: enabled 1

  772 18:02:23.547798  I2C: 00:3a: enabled 1

  773 18:02:23.550337  I2C: 00:3b: enabled 1

  774 18:02:23.553474  PCI: 00:00.0: enabled 1

  775 18:02:23.554002  SPI: 00: enabled 1

  776 18:02:23.556530  SPI: 01: enabled 1

  777 18:02:23.559851  PNP: 0c09.0: enabled 1

  778 18:02:23.560582  USB2 port 0: enabled 1

  779 18:02:23.563620  USB2 port 1: enabled 1

  780 18:02:23.566620  USB2 port 2: enabled 0

  781 18:02:23.570246  USB2 port 3: enabled 0

  782 18:02:23.570726  USB2 port 5: enabled 0

  783 18:02:23.573740  USB2 port 6: enabled 1

  784 18:02:23.576541  USB2 port 9: enabled 1

  785 18:02:23.576853  USB3 port 0: enabled 1

  786 18:02:23.579941  USB3 port 1: enabled 1

  787 18:02:23.582956  USB3 port 2: enabled 1

  788 18:02:23.583494  USB3 port 3: enabled 1

  789 18:02:23.586535  USB3 port 4: enabled 0

  790 18:02:23.589847  APIC: 02: enabled 1

  791 18:02:23.590248  APIC: 01: enabled 1

  792 18:02:23.592962  APIC: 03: enabled 1

  793 18:02:23.596532  APIC: 07: enabled 1

  794 18:02:23.596836  APIC: 06: enabled 1

  795 18:02:23.599726  APIC: 05: enabled 1

  796 18:02:23.603297  APIC: 04: enabled 1

  797 18:02:23.603718  Compare with tree...

  798 18:02:23.606399  Root Device: enabled 1

  799 18:02:23.609577   CPU_CLUSTER: 0: enabled 1

  800 18:02:23.610128    APIC: 00: enabled 1

  801 18:02:23.612851    APIC: 02: enabled 1

  802 18:02:23.616097    APIC: 01: enabled 1

  803 18:02:23.616401    APIC: 03: enabled 1

  804 18:02:23.619905    APIC: 07: enabled 1

  805 18:02:23.623162    APIC: 06: enabled 1

  806 18:02:23.623549    APIC: 05: enabled 1

  807 18:02:23.626372    APIC: 04: enabled 1

  808 18:02:23.629587   DOMAIN: 0000: enabled 1

  809 18:02:23.632947    PCI: 00:00.0: enabled 1

  810 18:02:23.633485    PCI: 00:02.0: enabled 1

  811 18:02:23.636072    PCI: 00:04.0: enabled 0

  812 18:02:23.639703    PCI: 00:05.0: enabled 0

  813 18:02:23.643018    PCI: 00:12.0: enabled 1

  814 18:02:23.646542    PCI: 00:12.5: enabled 0

  815 18:02:23.646861    PCI: 00:12.6: enabled 0

  816 18:02:23.649545    PCI: 00:14.0: enabled 1

  817 18:02:23.652584     USB0 port 0: enabled 1

  818 18:02:23.655876      USB2 port 0: enabled 1

  819 18:02:23.659137      USB2 port 1: enabled 1

  820 18:02:23.659430      USB2 port 2: enabled 0

  821 18:02:23.662549      USB2 port 3: enabled 0

  822 18:02:23.666545      USB2 port 5: enabled 0

  823 18:02:23.669584      USB2 port 6: enabled 1

  824 18:02:23.672539      USB2 port 9: enabled 1

  825 18:02:23.675742      USB3 port 0: enabled 1

  826 18:02:23.676147      USB3 port 1: enabled 1

  827 18:02:23.679041      USB3 port 2: enabled 1

  828 18:02:23.682921      USB3 port 3: enabled 1

  829 18:02:23.686164      USB3 port 4: enabled 0

  830 18:02:23.689362    PCI: 00:14.1: enabled 0

  831 18:02:23.689678    PCI: 00:14.3: enabled 1

  832 18:02:23.692664    PCI: 00:14.5: enabled 0

  833 18:02:23.695552    PCI: 00:15.0: enabled 1

  834 18:02:23.699231     I2C: 00:15: enabled 1

  835 18:02:23.702719    PCI: 00:15.1: enabled 1

  836 18:02:23.702957     I2C: 00:5d: enabled 1

  837 18:02:23.705601     GENERIC: 0.0: enabled 1

  838 18:02:23.709180    PCI: 00:15.2: enabled 0

  839 18:02:23.712353    PCI: 00:15.3: enabled 0

  840 18:02:23.715890    PCI: 00:16.0: enabled 1

  841 18:02:23.716195    PCI: 00:16.1: enabled 0

  842 18:02:23.718867    PCI: 00:16.2: enabled 0

  843 18:02:23.722589    PCI: 00:16.3: enabled 0

  844 18:02:23.725848    PCI: 00:16.4: enabled 0

  845 18:02:23.726065    PCI: 00:16.5: enabled 0

  846 18:02:23.728908    PCI: 00:17.0: enabled 1

  847 18:02:23.732107    PCI: 00:19.0: enabled 1

  848 18:02:23.735716     I2C: 00:1a: enabled 1

  849 18:02:23.738907     I2C: 00:38: enabled 1

  850 18:02:23.739052     I2C: 00:39: enabled 1

  851 18:02:23.742490     I2C: 00:3a: enabled 1

  852 18:02:23.745586     I2C: 00:3b: enabled 1

  853 18:02:23.748869    PCI: 00:19.1: enabled 0

  854 18:02:23.749023    PCI: 00:19.2: enabled 0

  855 18:02:23.752140    PCI: 00:1a.0: enabled 0

  856 18:02:23.755884    PCI: 00:1c.0: enabled 0

  857 18:02:23.759100    PCI: 00:1c.1: enabled 0

  858 18:02:23.762553    PCI: 00:1c.2: enabled 0

  859 18:02:23.762645    PCI: 00:1c.3: enabled 0

  860 18:02:23.765893    PCI: 00:1c.4: enabled 0

  861 18:02:23.769225    PCI: 00:1c.5: enabled 0

  862 18:02:23.772378    PCI: 00:1c.6: enabled 0

  863 18:02:23.772501    PCI: 00:1c.7: enabled 0

  864 18:02:23.775548    PCI: 00:1d.0: enabled 1

  865 18:02:23.779001    PCI: 00:1d.1: enabled 0

  866 18:02:23.782701    PCI: 00:1d.2: enabled 0

  867 18:02:23.786012    PCI: 00:1d.3: enabled 0

  868 18:02:23.786209    PCI: 00:1d.4: enabled 0

  869 18:02:23.789316    PCI: 00:1d.5: enabled 1

  870 18:02:23.792675     PCI: 00:00.0: enabled 1

  871 18:02:23.795726    PCI: 00:1e.0: enabled 1

  872 18:02:23.798942    PCI: 00:1e.1: enabled 0

  873 18:02:23.799105    PCI: 00:1e.2: enabled 1

  874 18:02:23.802312     SPI: 00: enabled 1

  875 18:02:23.805695    PCI: 00:1e.3: enabled 1

  876 18:02:23.808954     SPI: 01: enabled 1

  877 18:02:23.809233    PCI: 00:1f.0: enabled 1

  878 18:02:23.812457     PNP: 0c09.0: enabled 1

  879 18:02:23.815993    PCI: 00:1f.1: enabled 1

  880 18:02:23.818930    PCI: 00:1f.2: enabled 1

  881 18:02:23.822545    PCI: 00:1f.3: enabled 1

  882 18:02:23.823076    PCI: 00:1f.4: enabled 1

  883 18:02:23.826314    PCI: 00:1f.5: enabled 1

  884 18:02:23.828899    PCI: 00:1f.6: enabled 0

  885 18:02:23.832593  Root Device scanning...

  886 18:02:23.836113  scan_static_bus for Root Device

  887 18:02:23.836637  CPU_CLUSTER: 0 enabled

  888 18:02:23.839073  DOMAIN: 0000 enabled

  889 18:02:23.842508  DOMAIN: 0000 scanning...

  890 18:02:23.845663  PCI: pci_scan_bus for bus 00

  891 18:02:23.849027  PCI: 00:00.0 [8086/0000] ops

  892 18:02:23.852364  PCI: 00:00.0 [8086/9b61] enabled

  893 18:02:23.855362  PCI: 00:02.0 [8086/0000] bus ops

  894 18:02:23.858650  PCI: 00:02.0 [8086/9b41] enabled

  895 18:02:23.862249  PCI: 00:04.0 [8086/1903] disabled

  896 18:02:23.865641  PCI: 00:08.0 [8086/1911] enabled

  897 18:02:23.868870  PCI: 00:12.0 [8086/02f9] enabled

  898 18:02:23.871995  PCI: 00:14.0 [8086/0000] bus ops

  899 18:02:23.875929  PCI: 00:14.0 [8086/02ed] enabled

  900 18:02:23.879032  PCI: 00:14.2 [8086/02ef] enabled

  901 18:02:23.882044  PCI: 00:14.3 [8086/02f0] enabled

  902 18:02:23.885697  PCI: 00:15.0 [8086/0000] bus ops

  903 18:02:23.888818  PCI: 00:15.0 [8086/02e8] enabled

  904 18:02:23.892196  PCI: 00:15.1 [8086/0000] bus ops

  905 18:02:23.895558  PCI: 00:15.1 [8086/02e9] enabled

  906 18:02:23.898876  PCI: 00:16.0 [8086/0000] ops

  907 18:02:23.902235  PCI: 00:16.0 [8086/02e0] enabled

  908 18:02:23.905696  PCI: 00:17.0 [8086/0000] ops

  909 18:02:23.908867  PCI: 00:17.0 [8086/02d3] enabled

  910 18:02:23.911861  PCI: 00:19.0 [8086/0000] bus ops

  911 18:02:23.915662  PCI: 00:19.0 [8086/02c5] enabled

  912 18:02:23.918856  PCI: 00:1d.0 [8086/0000] bus ops

  913 18:02:23.922280  PCI: 00:1d.0 [8086/02b0] enabled

  914 18:02:23.925877  PCI: Static device PCI: 00:1d.5 not found, disabling it.

  915 18:02:23.928467  PCI: 00:1e.0 [8086/0000] ops

  916 18:02:23.932183  PCI: 00:1e.0 [8086/02a8] enabled

  917 18:02:23.935389  PCI: 00:1e.2 [8086/0000] bus ops

  918 18:02:23.938464  PCI: 00:1e.2 [8086/02aa] enabled

  919 18:02:23.942614  PCI: 00:1e.3 [8086/0000] bus ops

  920 18:02:23.945477  PCI: 00:1e.3 [8086/02ab] enabled

  921 18:02:23.948557  PCI: 00:1f.0 [8086/0000] bus ops

  922 18:02:23.951763  PCI: 00:1f.0 [8086/0284] enabled

  923 18:02:23.958269  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  924 18:02:23.965621  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  925 18:02:23.968733  PCI: 00:1f.3 [8086/0000] bus ops

  926 18:02:23.971837  PCI: 00:1f.3 [8086/02c8] enabled

  927 18:02:23.975359  PCI: 00:1f.4 [8086/0000] bus ops

  928 18:02:23.978478  PCI: 00:1f.4 [8086/02a3] enabled

  929 18:02:23.981626  PCI: 00:1f.5 [8086/0000] bus ops

  930 18:02:23.984758  PCI: 00:1f.5 [8086/02a4] enabled

  931 18:02:23.988460  PCI: Leftover static devices:

  932 18:02:23.988887  PCI: 00:05.0

  933 18:02:23.989221  PCI: 00:12.5

  934 18:02:23.991998  PCI: 00:12.6

  935 18:02:23.992515  PCI: 00:14.1

  936 18:02:23.995307  PCI: 00:14.5

  937 18:02:23.995862  PCI: 00:15.2

  938 18:02:23.996236  PCI: 00:15.3

  939 18:02:23.998407  PCI: 00:16.1

  940 18:02:23.998852  PCI: 00:16.2

  941 18:02:24.001946  PCI: 00:16.3

  942 18:02:24.002462  PCI: 00:16.4

  943 18:02:24.002804  PCI: 00:16.5

  944 18:02:24.004813  PCI: 00:19.1

  945 18:02:24.005238  PCI: 00:19.2

  946 18:02:24.008315  PCI: 00:1a.0

  947 18:02:24.008830  PCI: 00:1c.0

  948 18:02:24.011405  PCI: 00:1c.1

  949 18:02:24.011975  PCI: 00:1c.2

  950 18:02:24.012320  PCI: 00:1c.3

  951 18:02:24.015193  PCI: 00:1c.4

  952 18:02:24.015753  PCI: 00:1c.5

  953 18:02:24.017964  PCI: 00:1c.6

  954 18:02:24.018384  PCI: 00:1c.7

  955 18:02:24.018721  PCI: 00:1d.1

  956 18:02:24.021421  PCI: 00:1d.2

  957 18:02:24.021844  PCI: 00:1d.3

  958 18:02:24.024708  PCI: 00:1d.4

  959 18:02:24.025166  PCI: 00:1d.5

  960 18:02:24.025596  PCI: 00:1e.1

  961 18:02:24.028034  PCI: 00:1f.1

  962 18:02:24.028539  PCI: 00:1f.2

  963 18:02:24.031238  PCI: 00:1f.6

  964 18:02:24.034735  PCI: Check your devicetree.cb.

  965 18:02:24.035128  PCI: 00:02.0 scanning...

  966 18:02:24.041079  scan_generic_bus for PCI: 00:02.0

  967 18:02:24.044711  scan_generic_bus for PCI: 00:02.0 done

  968 18:02:24.048247  scan_bus: scanning of bus PCI: 00:02.0 took 10191 usecs

  969 18:02:24.050934  PCI: 00:14.0 scanning...

  970 18:02:24.054444  scan_static_bus for PCI: 00:14.0

  971 18:02:24.057781  USB0 port 0 enabled

  972 18:02:24.060949  USB0 port 0 scanning...

  973 18:02:24.064148  scan_static_bus for USB0 port 0

  974 18:02:24.064331  USB2 port 0 enabled

  975 18:02:24.067281  USB2 port 1 enabled

  976 18:02:24.067462  USB2 port 2 disabled

  977 18:02:24.071041  USB2 port 3 disabled

  978 18:02:24.074101  USB2 port 5 disabled

  979 18:02:24.074237  USB2 port 6 enabled

  980 18:02:24.077285  USB2 port 9 enabled

  981 18:02:24.080608  USB3 port 0 enabled

  982 18:02:24.080766  USB3 port 1 enabled

  983 18:02:24.083885  USB3 port 2 enabled

  984 18:02:24.084072  USB3 port 3 enabled

  985 18:02:24.087144  USB3 port 4 disabled

  986 18:02:24.090771  USB2 port 0 scanning...

  987 18:02:24.093916  scan_static_bus for USB2 port 0

  988 18:02:24.097174  scan_static_bus for USB2 port 0 done

  989 18:02:24.104089  scan_bus: scanning of bus USB2 port 0 took 9711 usecs

  990 18:02:24.104516  USB2 port 1 scanning...

  991 18:02:24.107807  scan_static_bus for USB2 port 1

  992 18:02:24.114448  scan_static_bus for USB2 port 1 done

  993 18:02:24.117540  scan_bus: scanning of bus USB2 port 1 took 9701 usecs

  994 18:02:24.121211  USB2 port 6 scanning...

  995 18:02:24.124245  scan_static_bus for USB2 port 6

  996 18:02:24.127858  scan_static_bus for USB2 port 6 done

  997 18:02:24.134016  scan_bus: scanning of bus USB2 port 6 took 9701 usecs

  998 18:02:24.134473  USB2 port 9 scanning...

  999 18:02:24.137426  scan_static_bus for USB2 port 9

 1000 18:02:24.144346  scan_static_bus for USB2 port 9 done

 1001 18:02:24.147822  scan_bus: scanning of bus USB2 port 9 took 9708 usecs

 1002 18:02:24.150850  USB3 port 0 scanning...

 1003 18:02:24.154407  scan_static_bus for USB3 port 0

 1004 18:02:24.157476  scan_static_bus for USB3 port 0 done

 1005 18:02:24.163825  scan_bus: scanning of bus USB3 port 0 took 9709 usecs

 1006 18:02:24.164091  USB3 port 1 scanning...

 1007 18:02:24.167451  scan_static_bus for USB3 port 1

 1008 18:02:24.174302  scan_static_bus for USB3 port 1 done

 1009 18:02:24.177425  scan_bus: scanning of bus USB3 port 1 took 9701 usecs

 1010 18:02:24.180906  USB3 port 2 scanning...

 1011 18:02:24.184096  scan_static_bus for USB3 port 2

 1012 18:02:24.187288  scan_static_bus for USB3 port 2 done

 1013 18:02:24.194414  scan_bus: scanning of bus USB3 port 2 took 9708 usecs

 1014 18:02:24.194605  USB3 port 3 scanning...

 1015 18:02:24.200481  scan_static_bus for USB3 port 3

 1016 18:02:24.203969  scan_static_bus for USB3 port 3 done

 1017 18:02:24.207188  scan_bus: scanning of bus USB3 port 3 took 9711 usecs

 1018 18:02:24.210897  scan_static_bus for USB0 port 0 done

 1019 18:02:24.217475  scan_bus: scanning of bus USB0 port 0 took 155429 usecs

 1020 18:02:24.220685  scan_static_bus for PCI: 00:14.0 done

 1021 18:02:24.227259  scan_bus: scanning of bus PCI: 00:14.0 took 173044 usecs

 1022 18:02:24.230499  PCI: 00:15.0 scanning...

 1023 18:02:24.233556  scan_generic_bus for PCI: 00:15.0

 1024 18:02:24.236980  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled

 1025 18:02:24.240225  scan_generic_bus for PCI: 00:15.0 done

 1026 18:02:24.247277  scan_bus: scanning of bus PCI: 00:15.0 took 14302 usecs

 1027 18:02:24.250457  PCI: 00:15.1 scanning...

 1028 18:02:24.253368  scan_generic_bus for PCI: 00:15.1

 1029 18:02:24.257042  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled

 1030 18:02:24.260329  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled

 1031 18:02:24.266839  scan_generic_bus for PCI: 00:15.1 done

 1032 18:02:24.270511  scan_bus: scanning of bus PCI: 00:15.1 took 18611 usecs

 1033 18:02:24.273658  PCI: 00:19.0 scanning...

 1034 18:02:24.276671  scan_generic_bus for PCI: 00:19.0

 1035 18:02:24.280296  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled

 1036 18:02:24.286552  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled

 1037 18:02:24.290232  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled

 1038 18:02:24.293720  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled

 1039 18:02:24.296949  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled

 1040 18:02:24.300106  scan_generic_bus for PCI: 00:19.0 done

 1041 18:02:24.307202  scan_bus: scanning of bus PCI: 00:19.0 took 30747 usecs

 1042 18:02:24.310026  PCI: 00:1d.0 scanning...

 1043 18:02:24.313464  do_pci_scan_bridge for PCI: 00:1d.0

 1044 18:02:24.316901  PCI: pci_scan_bus for bus 01

 1045 18:02:24.320174  PCI: 01:00.0 [1c5c/1327] enabled

 1046 18:02:24.323532  Enabling Common Clock Configuration

 1047 18:02:24.326570  L1 Sub-State supported from root port 29

 1048 18:02:24.330068  L1 Sub-State Support = 0xf

 1049 18:02:24.333104  CommonModeRestoreTime = 0x28

 1050 18:02:24.336246  Power On Value = 0x16, Power On Scale = 0x0

 1051 18:02:24.340295  ASPM: Enabled L1

 1052 18:02:24.346807  scan_bus: scanning of bus PCI: 00:1d.0 took 32788 usecs

 1053 18:02:24.347361  PCI: 00:1e.2 scanning...

 1054 18:02:24.349601  scan_generic_bus for PCI: 00:1e.2

 1055 18:02:24.356517  bus: PCI: 00:1e.2[0]->SPI: 00 enabled

 1056 18:02:24.359900  scan_generic_bus for PCI: 00:1e.2 done

 1057 18:02:24.363218  scan_bus: scanning of bus PCI: 00:1e.2 took 14002 usecs

 1058 18:02:24.366707  PCI: 00:1e.3 scanning...

 1059 18:02:24.370168  scan_generic_bus for PCI: 00:1e.3

 1060 18:02:24.372994  bus: PCI: 00:1e.3[0]->SPI: 01 enabled

 1061 18:02:24.380015  scan_generic_bus for PCI: 00:1e.3 done

 1062 18:02:24.383240  scan_bus: scanning of bus PCI: 00:1e.3 took 14020 usecs

 1063 18:02:24.386044  PCI: 00:1f.0 scanning...

 1064 18:02:24.389761  scan_static_bus for PCI: 00:1f.0

 1065 18:02:24.393506  PNP: 0c09.0 enabled

 1066 18:02:24.396547  scan_static_bus for PCI: 00:1f.0 done

 1067 18:02:24.403051  scan_bus: scanning of bus PCI: 00:1f.0 took 12034 usecs

 1068 18:02:24.403471  PCI: 00:1f.3 scanning...

 1069 18:02:24.410164  scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs

 1070 18:02:24.413089  PCI: 00:1f.4 scanning...

 1071 18:02:24.416374  scan_generic_bus for PCI: 00:1f.4

 1072 18:02:24.420009  scan_generic_bus for PCI: 00:1f.4 done

 1073 18:02:24.426062  scan_bus: scanning of bus PCI: 00:1f.4 took 10197 usecs

 1074 18:02:24.429667  PCI: 00:1f.5 scanning...

 1075 18:02:24.432907  scan_generic_bus for PCI: 00:1f.5

 1076 18:02:24.436373  scan_generic_bus for PCI: 00:1f.5 done

 1077 18:02:24.442772  scan_bus: scanning of bus PCI: 00:1f.5 took 10183 usecs

 1078 18:02:24.446226  scan_bus: scanning of bus DOMAIN: 0000 took 605203 usecs

 1079 18:02:24.449498  scan_static_bus for Root Device done

 1080 18:02:24.456146  scan_bus: scanning of bus Root Device took 625056 usecs

 1081 18:02:24.456663  done

 1082 18:02:24.459290  Chrome EC: UHEPI supported

 1083 18:02:24.466243  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

 1084 18:02:24.472495  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1085 18:02:24.479351  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

 1086 18:02:24.485681  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)

 1087 18:02:24.489204  SPI flash protection: WPSW=1 SRP0=0

 1088 18:02:24.492327  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1089 18:02:24.498939  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2

 1090 18:02:24.502473  found VGA at PCI: 00:02.0

 1091 18:02:24.505416  Setting up VGA for PCI: 00:02.0

 1092 18:02:24.508707  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1093 18:02:24.515549  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1094 18:02:24.518843  Allocating resources...

 1095 18:02:24.519262  Reading resources...

 1096 18:02:24.522182  Root Device read_resources bus 0 link: 0

 1097 18:02:24.529204  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1098 18:02:24.532359  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1099 18:02:24.539023  DOMAIN: 0000 read_resources bus 0 link: 0

 1100 18:02:24.541996  PCI: 00:14.0 read_resources bus 0 link: 0

 1101 18:02:24.549276  USB0 port 0 read_resources bus 0 link: 0

 1102 18:02:24.556088  USB0 port 0 read_resources bus 0 link: 0 done

 1103 18:02:24.559484  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1104 18:02:24.567206  PCI: 00:15.0 read_resources bus 1 link: 0

 1105 18:02:24.570284  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1106 18:02:24.576759  PCI: 00:15.1 read_resources bus 2 link: 0

 1107 18:02:24.579998  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1108 18:02:24.587268  PCI: 00:19.0 read_resources bus 3 link: 0

 1109 18:02:24.594162  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1110 18:02:24.597190  PCI: 00:1d.0 read_resources bus 1 link: 0

 1111 18:02:24.603852  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1112 18:02:24.607557  PCI: 00:1e.2 read_resources bus 4 link: 0

 1113 18:02:24.613946  PCI: 00:1e.2 read_resources bus 4 link: 0 done

 1114 18:02:24.617096  PCI: 00:1e.3 read_resources bus 5 link: 0

 1115 18:02:24.623953  PCI: 00:1e.3 read_resources bus 5 link: 0 done

 1116 18:02:24.627160  PCI: 00:1f.0 read_resources bus 0 link: 0

 1117 18:02:24.633642  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1118 18:02:24.640502  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1119 18:02:24.643763  Root Device read_resources bus 0 link: 0 done

 1120 18:02:24.647032  Done reading resources.

 1121 18:02:24.650222  Show resources in subtree (Root Device)...After reading.

 1122 18:02:24.656745   Root Device child on link 0 CPU_CLUSTER: 0

 1123 18:02:24.659912    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1124 18:02:24.660019     APIC: 00

 1125 18:02:24.663754     APIC: 02

 1126 18:02:24.663868     APIC: 01

 1127 18:02:24.666997     APIC: 03

 1128 18:02:24.667084     APIC: 07

 1129 18:02:24.667170     APIC: 06

 1130 18:02:24.670206     APIC: 05

 1131 18:02:24.670293     APIC: 04

 1132 18:02:24.673462    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1133 18:02:24.683627    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1134 18:02:24.693236    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1135 18:02:24.742922     PCI: 00:00.0

 1136 18:02:24.743507     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1137 18:02:24.743776     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1138 18:02:24.743852     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1139 18:02:24.744510     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1140 18:02:24.744775     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1141 18:02:24.793405     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1142 18:02:24.793947     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1143 18:02:24.794775     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1144 18:02:24.795149     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1145 18:02:24.795562     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1146 18:02:24.843278     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1147 18:02:24.844018     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1148 18:02:24.844506     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1149 18:02:24.844968     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1150 18:02:24.845418     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1151 18:02:24.870702     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1152 18:02:24.871444     PCI: 00:02.0

 1153 18:02:24.871838     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1154 18:02:24.872158     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1155 18:02:24.877855     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1156 18:02:24.878364     PCI: 00:04.0

 1157 18:02:24.880825     PCI: 00:08.0

 1158 18:02:24.891004     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1159 18:02:24.891441     PCI: 00:12.0

 1160 18:02:24.900834     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1161 18:02:24.904135     PCI: 00:14.0 child on link 0 USB0 port 0

 1162 18:02:24.917724     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1163 18:02:24.920740      USB0 port 0 child on link 0 USB2 port 0

 1164 18:02:24.921227       USB2 port 0

 1165 18:02:24.923983       USB2 port 1

 1166 18:02:24.924502       USB2 port 2

 1167 18:02:24.927241       USB2 port 3

 1168 18:02:24.928066       USB2 port 5

 1169 18:02:24.930483       USB2 port 6

 1170 18:02:24.933825       USB2 port 9

 1171 18:02:24.934536       USB3 port 0

 1172 18:02:24.937245       USB3 port 1

 1173 18:02:24.937947       USB3 port 2

 1174 18:02:24.940525       USB3 port 3

 1175 18:02:24.941213       USB3 port 4

 1176 18:02:24.943574     PCI: 00:14.2

 1177 18:02:24.953740     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1178 18:02:24.963956     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1179 18:02:24.964374     PCI: 00:14.3

 1180 18:02:24.973718     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1181 18:02:24.976963     PCI: 00:15.0 child on link 0 I2C: 01:15

 1182 18:02:24.986588     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1183 18:02:24.989739      I2C: 01:15

 1184 18:02:24.993460     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1185 18:02:25.003335     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1186 18:02:25.006481      I2C: 02:5d

 1187 18:02:25.006865      GENERIC: 0.0

 1188 18:02:25.009946     PCI: 00:16.0

 1189 18:02:25.019997     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1190 18:02:25.020300     PCI: 00:17.0

 1191 18:02:25.029814     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1192 18:02:25.040037     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1193 18:02:25.046486     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1194 18:02:25.056281     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1195 18:02:25.063362     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1196 18:02:25.072739     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1197 18:02:25.076736     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1198 18:02:25.086261     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1199 18:02:25.089534      I2C: 03:1a

 1200 18:02:25.089944      I2C: 03:38

 1201 18:02:25.092819      I2C: 03:39

 1202 18:02:25.093418      I2C: 03:3a

 1203 18:02:25.095990      I2C: 03:3b

 1204 18:02:25.099717     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1205 18:02:25.109685     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1206 18:02:25.115991     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1207 18:02:25.125938     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1208 18:02:25.129143      PCI: 01:00.0

 1209 18:02:25.139217      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1210 18:02:25.139771     PCI: 00:1e.0

 1211 18:02:25.152737     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1212 18:02:25.162478     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1213 18:02:25.165981     PCI: 00:1e.2 child on link 0 SPI: 00

 1214 18:02:25.176027     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1215 18:02:25.176457      SPI: 00

 1216 18:02:25.179131     PCI: 00:1e.3 child on link 0 SPI: 01

 1217 18:02:25.188740     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1218 18:02:25.192195      SPI: 01

 1219 18:02:25.195399     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1220 18:02:25.205689     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1221 18:02:25.212008     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1222 18:02:25.215267      PNP: 0c09.0

 1223 18:02:25.225668      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1224 18:02:25.226224     PCI: 00:1f.3

 1225 18:02:25.235278     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1226 18:02:25.245454     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1227 18:02:25.248439     PCI: 00:1f.4

 1228 18:02:25.255193     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1229 18:02:25.265348     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1230 18:02:25.268389     PCI: 00:1f.5

 1231 18:02:25.278296     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1232 18:02:25.281734  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1233 18:02:25.288457  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1234 18:02:25.294967  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1235 18:02:25.298122  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1236 18:02:25.305412  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1237 18:02:25.308348  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1238 18:02:25.311757  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1239 18:02:25.318083  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1240 18:02:25.325161  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1241 18:02:25.331513  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1242 18:02:25.341818  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1243 18:02:25.348169  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1244 18:02:25.351770  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1245 18:02:25.358129  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1246 18:02:25.364920  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1247 18:02:25.368125  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1248 18:02:25.375101  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem

 1249 18:02:25.377936  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem

 1250 18:02:25.384615  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem

 1251 18:02:25.388305  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem

 1252 18:02:25.391487  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem

 1253 18:02:25.397738  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem

 1254 18:02:25.401060  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem

 1255 18:02:25.408069  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem

 1256 18:02:25.411380  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem

 1257 18:02:25.417555  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem

 1258 18:02:25.420799  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem

 1259 18:02:25.427875  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem

 1260 18:02:25.431032  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem

 1261 18:02:25.437525  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem

 1262 18:02:25.440760  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem

 1263 18:02:25.447532  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem

 1264 18:02:25.450724  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem

 1265 18:02:25.457721  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem

 1266 18:02:25.460866  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem

 1267 18:02:25.463831  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem

 1268 18:02:25.470924  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem

 1269 18:02:25.480971  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done

 1270 18:02:25.484085  avoid_fixed_resources: DOMAIN: 0000

 1271 18:02:25.487050  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1272 18:02:25.493836  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1273 18:02:25.503561  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1274 18:02:25.510390  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)

 1275 18:02:25.516666  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)

 1276 18:02:25.523346  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)

 1277 18:02:25.533713  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)

 1278 18:02:25.540280  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1279 18:02:25.546822  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1280 18:02:25.556540  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1281 18:02:25.563858  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1282 18:02:25.570293  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1283 18:02:25.573546  Setting resources...

 1284 18:02:25.580160  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1285 18:02:25.583579  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1286 18:02:25.587240  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1287 18:02:25.590284  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1288 18:02:25.593536  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1289 18:02:25.600175  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1290 18:02:25.606935  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1291 18:02:25.613793  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1292 18:02:25.619951  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff

 1293 18:02:25.626868  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1294 18:02:25.630368  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1295 18:02:25.637271  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1296 18:02:25.640453  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem

 1297 18:02:25.646918  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem

 1298 18:02:25.650158  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem

 1299 18:02:25.656744  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem

 1300 18:02:25.660400  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem

 1301 18:02:25.666940  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem

 1302 18:02:25.670221  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem

 1303 18:02:25.673244  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem

 1304 18:02:25.680131  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem

 1305 18:02:25.683180  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem

 1306 18:02:25.690324  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem

 1307 18:02:25.693242  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem

 1308 18:02:25.699720  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem

 1309 18:02:25.702928  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem

 1310 18:02:25.709547  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem

 1311 18:02:25.713232  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem

 1312 18:02:25.719844  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem

 1313 18:02:25.722974  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem

 1314 18:02:25.729402  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem

 1315 18:02:25.733124  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem

 1316 18:02:25.739597  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done

 1317 18:02:25.749342  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1318 18:02:25.756367  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1319 18:02:25.762421  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1320 18:02:25.766104  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem

 1321 18:02:25.775582  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done

 1322 18:02:25.778959  Root Device assign_resources, bus 0 link: 0

 1323 18:02:25.782763  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1324 18:02:25.793074  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1325 18:02:25.799465  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1326 18:02:25.809726  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1327 18:02:25.816162  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64

 1328 18:02:25.826053  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64

 1329 18:02:25.832839  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64

 1330 18:02:25.839775  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1331 18:02:25.842857  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1332 18:02:25.852846  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64

 1333 18:02:25.860021  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64

 1334 18:02:25.869360  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64

 1335 18:02:25.875939  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64

 1336 18:02:25.879174  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1337 18:02:25.886434  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1338 18:02:25.892847  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64

 1339 18:02:25.899006  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1340 18:02:25.902772  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1341 18:02:25.912949  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64

 1342 18:02:25.919074  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem

 1343 18:02:25.925751  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem

 1344 18:02:25.935312  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1345 18:02:25.942553  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1346 18:02:25.948597  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1347 18:02:25.958680  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem

 1348 18:02:25.965205  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64

 1349 18:02:25.972224  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1350 18:02:25.975267  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1351 18:02:25.985241  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1352 18:02:25.991433  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1353 18:02:26.001589  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1354 18:02:26.004792  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1355 18:02:26.015137  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64

 1356 18:02:26.018192  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1357 18:02:26.027768  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64

 1358 18:02:26.034797  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64

 1359 18:02:26.041202  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1360 18:02:26.044236  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1361 18:02:26.054417  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64

 1362 18:02:26.057688  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1363 18:02:26.061264  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1364 18:02:26.067508  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1365 18:02:26.071029  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1366 18:02:26.077592  LPC: Trying to open IO window from 800 size 1ff

 1367 18:02:26.084146  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64

 1368 18:02:26.094058  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64

 1369 18:02:26.100487  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64

 1370 18:02:26.110518  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem

 1371 18:02:26.113985  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1372 18:02:26.123355  Root Device assign_resources, bus 0 link: 0

 1373 18:02:26.123844  Done setting resources.

 1374 18:02:26.127001  Show resources in subtree (Root Device)...After assigning values.

 1375 18:02:26.133497   Root Device child on link 0 CPU_CLUSTER: 0

 1376 18:02:26.136940    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1377 18:02:26.137130     APIC: 00

 1378 18:02:26.140214     APIC: 02

 1379 18:02:26.140367     APIC: 01

 1380 18:02:26.140486     APIC: 03

 1381 18:02:26.143299     APIC: 07

 1382 18:02:26.143450     APIC: 06

 1383 18:02:26.146518     APIC: 05

 1384 18:02:26.146633     APIC: 04

 1385 18:02:26.150173    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1386 18:02:26.159624    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1387 18:02:26.173531    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1388 18:02:26.174024     PCI: 00:00.0

 1389 18:02:26.183307     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1390 18:02:26.192833     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1391 18:02:26.203006     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1392 18:02:26.209451     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1393 18:02:26.219568     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1394 18:02:26.229553     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1395 18:02:26.240046     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1396 18:02:26.249545     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1397 18:02:26.259017     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1398 18:02:26.265843     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1399 18:02:26.275521     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1400 18:02:26.285434     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1401 18:02:26.295674     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1402 18:02:26.305116     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1403 18:02:26.315314     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1404 18:02:26.321732     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1405 18:02:26.325298     PCI: 00:02.0

 1406 18:02:26.335105     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1407 18:02:26.344785     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1408 18:02:26.354719     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1409 18:02:26.358148     PCI: 00:04.0

 1410 18:02:26.358469     PCI: 00:08.0

 1411 18:02:26.367739     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10

 1412 18:02:26.370970     PCI: 00:12.0

 1413 18:02:26.381241     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10

 1414 18:02:26.384273     PCI: 00:14.0 child on link 0 USB0 port 0

 1415 18:02:26.394950     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10

 1416 18:02:26.401178      USB0 port 0 child on link 0 USB2 port 0

 1417 18:02:26.401453       USB2 port 0

 1418 18:02:26.404511       USB2 port 1

 1419 18:02:26.404749       USB2 port 2

 1420 18:02:26.407516       USB2 port 3

 1421 18:02:26.407891       USB2 port 5

 1422 18:02:26.411049       USB2 port 6

 1423 18:02:26.411297       USB2 port 9

 1424 18:02:26.414087       USB3 port 0

 1425 18:02:26.417279       USB3 port 1

 1426 18:02:26.417523       USB3 port 2

 1427 18:02:26.421038       USB3 port 3

 1428 18:02:26.421278       USB3 port 4

 1429 18:02:26.424384     PCI: 00:14.2

 1430 18:02:26.433966     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10

 1431 18:02:26.443862     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18

 1432 18:02:26.444218     PCI: 00:14.3

 1433 18:02:26.453951     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10

 1434 18:02:26.460466     PCI: 00:15.0 child on link 0 I2C: 01:15

 1435 18:02:26.470329     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10

 1436 18:02:26.470607      I2C: 01:15

 1437 18:02:26.477089     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1438 18:02:26.487046     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10

 1439 18:02:26.487237      I2C: 02:5d

 1440 18:02:26.490174      GENERIC: 0.0

 1441 18:02:26.490388     PCI: 00:16.0

 1442 18:02:26.500106     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10

 1443 18:02:26.503176     PCI: 00:17.0

 1444 18:02:26.513289     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10

 1445 18:02:26.523256     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14

 1446 18:02:26.533232     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1447 18:02:26.542901     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1448 18:02:26.549305     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1449 18:02:26.559504     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24

 1450 18:02:26.565935     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1451 18:02:26.575959     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10

 1452 18:02:26.576200      I2C: 03:1a

 1453 18:02:26.579078      I2C: 03:38

 1454 18:02:26.579273      I2C: 03:39

 1455 18:02:26.582780      I2C: 03:3a

 1456 18:02:26.582930      I2C: 03:3b

 1457 18:02:26.586081     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1458 18:02:26.595756     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1459 18:02:26.605653     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1460 18:02:26.615962     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1461 18:02:26.619128      PCI: 01:00.0

 1462 18:02:26.628990      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10

 1463 18:02:26.632100     PCI: 00:1e.0

 1464 18:02:26.642270     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1465 18:02:26.652364     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18

 1466 18:02:26.655600     PCI: 00:1e.2 child on link 0 SPI: 00

 1467 18:02:26.665283     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10

 1468 18:02:26.669041      SPI: 00

 1469 18:02:26.672195     PCI: 00:1e.3 child on link 0 SPI: 01

 1470 18:02:26.681958     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10

 1471 18:02:26.685025      SPI: 01

 1472 18:02:26.688298     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1473 18:02:26.698639     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1474 18:02:26.704725     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1475 18:02:26.708397      PNP: 0c09.0

 1476 18:02:26.715243      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1477 18:02:26.718413     PCI: 00:1f.3

 1478 18:02:26.727933     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10

 1479 18:02:26.738191     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20

 1480 18:02:26.741104     PCI: 00:1f.4

 1481 18:02:26.748072     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1482 18:02:26.758036     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10

 1483 18:02:26.761100     PCI: 00:1f.5

 1484 18:02:26.770826     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10

 1485 18:02:26.774645  Done allocating resources.

 1486 18:02:26.781047  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0

 1487 18:02:26.781202  Enabling resources...

 1488 18:02:26.788015  PCI: 00:00.0 subsystem <- 8086/9b61

 1489 18:02:26.788156  PCI: 00:00.0 cmd <- 06

 1490 18:02:26.791342  PCI: 00:02.0 subsystem <- 8086/9b41

 1491 18:02:26.794828  PCI: 00:02.0 cmd <- 03

 1492 18:02:26.798083  PCI: 00:08.0 cmd <- 06

 1493 18:02:26.801312  PCI: 00:12.0 subsystem <- 8086/02f9

 1494 18:02:26.804670  PCI: 00:12.0 cmd <- 02

 1495 18:02:26.808167  PCI: 00:14.0 subsystem <- 8086/02ed

 1496 18:02:26.811314  PCI: 00:14.0 cmd <- 02

 1497 18:02:26.814559  PCI: 00:14.2 cmd <- 02

 1498 18:02:26.817573  PCI: 00:14.3 subsystem <- 8086/02f0

 1499 18:02:26.817657  PCI: 00:14.3 cmd <- 02

 1500 18:02:26.824484  PCI: 00:15.0 subsystem <- 8086/02e8

 1501 18:02:26.824569  PCI: 00:15.0 cmd <- 02

 1502 18:02:26.828267  PCI: 00:15.1 subsystem <- 8086/02e9

 1503 18:02:26.831523  PCI: 00:15.1 cmd <- 02

 1504 18:02:26.834823  PCI: 00:16.0 subsystem <- 8086/02e0

 1505 18:02:26.838022  PCI: 00:16.0 cmd <- 02

 1506 18:02:26.841308  PCI: 00:17.0 subsystem <- 8086/02d3

 1507 18:02:26.844522  PCI: 00:17.0 cmd <- 03

 1508 18:02:26.848157  PCI: 00:19.0 subsystem <- 8086/02c5

 1509 18:02:26.851167  PCI: 00:19.0 cmd <- 02

 1510 18:02:26.854814  PCI: 00:1d.0 bridge ctrl <- 0013

 1511 18:02:26.858171  PCI: 00:1d.0 subsystem <- 8086/02b0

 1512 18:02:26.861108  PCI: 00:1d.0 cmd <- 06

 1513 18:02:26.864353  PCI: 00:1e.0 subsystem <- 8086/02a8

 1514 18:02:26.867607  PCI: 00:1e.0 cmd <- 06

 1515 18:02:26.870896  PCI: 00:1e.2 subsystem <- 8086/02aa

 1516 18:02:26.870991  PCI: 00:1e.2 cmd <- 06

 1517 18:02:26.877949  PCI: 00:1e.3 subsystem <- 8086/02ab

 1518 18:02:26.878035  PCI: 00:1e.3 cmd <- 02

 1519 18:02:26.881277  PCI: 00:1f.0 subsystem <- 8086/0284

 1520 18:02:26.884591  PCI: 00:1f.0 cmd <- 407

 1521 18:02:26.887858  PCI: 00:1f.3 subsystem <- 8086/02c8

 1522 18:02:26.891082  PCI: 00:1f.3 cmd <- 02

 1523 18:02:26.894732  PCI: 00:1f.4 subsystem <- 8086/02a3

 1524 18:02:26.897786  PCI: 00:1f.4 cmd <- 03

 1525 18:02:26.901238  PCI: 00:1f.5 subsystem <- 8086/02a4

 1526 18:02:26.904480  PCI: 00:1f.5 cmd <- 406

 1527 18:02:26.913529  PCI: 01:00.0 cmd <- 02

 1528 18:02:26.918617  done.

 1529 18:02:26.930691  ME: Version: 14.0.39.1367

 1530 18:02:26.937220  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12

 1531 18:02:26.940422  Initializing devices...

 1532 18:02:26.940510  Root Device init ...

 1533 18:02:26.947430  Chrome EC: Set SMI mask to 0x0000000000000000

 1534 18:02:26.950674  Chrome EC: clear events_b mask to 0x0000000000000000

 1535 18:02:26.957079  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1536 18:02:26.963608  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006

 1537 18:02:26.970038  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006

 1538 18:02:26.973957  Chrome EC: Set WAKE mask to 0x0000000000000000

 1539 18:02:26.977248  Root Device init finished in 35160 usecs

 1540 18:02:26.980450  CPU_CLUSTER: 0 init ...

 1541 18:02:26.987395  CPU_CLUSTER: 0 init finished in 2445 usecs

 1542 18:02:26.991233  PCI: 00:00.0 init ...

 1543 18:02:26.995010  CPU TDP: 15 Watts

 1544 18:02:26.997859  CPU PL2 = 64 Watts

 1545 18:02:27.001806  PCI: 00:00.0 init finished in 7071 usecs

 1546 18:02:27.005080  PCI: 00:02.0 init ...

 1547 18:02:27.007906  PCI: 00:02.0 init finished in 2245 usecs

 1548 18:02:27.011368  PCI: 00:08.0 init ...

 1549 18:02:27.014730  PCI: 00:08.0 init finished in 2251 usecs

 1550 18:02:27.017736  PCI: 00:12.0 init ...

 1551 18:02:27.021584  PCI: 00:12.0 init finished in 2250 usecs

 1552 18:02:27.024343  PCI: 00:14.0 init ...

 1553 18:02:27.027964  PCI: 00:14.0 init finished in 2242 usecs

 1554 18:02:27.031339  PCI: 00:14.2 init ...

 1555 18:02:27.034217  PCI: 00:14.2 init finished in 2253 usecs

 1556 18:02:27.037768  PCI: 00:14.3 init ...

 1557 18:02:27.040892  PCI: 00:14.3 init finished in 2269 usecs

 1558 18:02:27.044198  PCI: 00:15.0 init ...

 1559 18:02:27.047901  DW I2C bus 0 at 0xd121f000 (400 KHz)

 1560 18:02:27.051508  PCI: 00:15.0 init finished in 5976 usecs

 1561 18:02:27.054612  PCI: 00:15.1 init ...

 1562 18:02:27.058097  DW I2C bus 1 at 0xd1220000 (400 KHz)

 1563 18:02:27.064231  PCI: 00:15.1 init finished in 5973 usecs

 1564 18:02:27.064570  PCI: 00:16.0 init ...

 1565 18:02:27.070585  PCI: 00:16.0 init finished in 2251 usecs

 1566 18:02:27.073947  PCI: 00:19.0 init ...

 1567 18:02:27.077487  DW I2C bus 4 at 0xd1222000 (400 KHz)

 1568 18:02:27.080980  PCI: 00:19.0 init finished in 5976 usecs

 1569 18:02:27.084285  PCI: 00:1d.0 init ...

 1570 18:02:27.087370  Initializing PCH PCIe bridge.

 1571 18:02:27.090475  PCI: 00:1d.0 init finished in 5274 usecs

 1572 18:02:27.093808  PCI: 00:1f.0 init ...

 1573 18:02:27.097335  IOAPIC: Initializing IOAPIC at 0xfec00000

 1574 18:02:27.104307  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1575 18:02:27.104944  IOAPIC: ID = 0x02

 1576 18:02:27.107429  IOAPIC: Dumping registers

 1577 18:02:27.110694    reg 0x0000: 0x02000000

 1578 18:02:27.114349    reg 0x0001: 0x00770020

 1579 18:02:27.114733    reg 0x0002: 0x00000000

 1580 18:02:27.120546  PCI: 00:1f.0 init finished in 23528 usecs

 1581 18:02:27.124094  PCI: 00:1f.4 init ...

 1582 18:02:27.126756  PCI: 00:1f.4 init finished in 2261 usecs

 1583 18:02:27.137944  PCI: 01:00.0 init ...

 1584 18:02:27.140763  PCI: 01:00.0 init finished in 2251 usecs

 1585 18:02:27.145538  PNP: 0c09.0 init ...

 1586 18:02:27.148442  Google Chrome EC uptime: 11.106 seconds

 1587 18:02:27.155078  Google Chrome AP resets since EC boot: 0

 1588 18:02:27.158307  Google Chrome most recent AP reset causes:

 1589 18:02:27.164895  Google Chrome EC reset flags at last EC boot: reset-pin

 1590 18:02:27.168428  PNP: 0c09.0 init finished in 20561 usecs

 1591 18:02:27.171342  Devices initialized

 1592 18:02:27.174579  Show all devs... After init.

 1593 18:02:27.175066  Root Device: enabled 1

 1594 18:02:27.178320  CPU_CLUSTER: 0: enabled 1

 1595 18:02:27.181324  DOMAIN: 0000: enabled 1

 1596 18:02:27.181621  APIC: 00: enabled 1

 1597 18:02:27.185127  PCI: 00:00.0: enabled 1

 1598 18:02:27.188126  PCI: 00:02.0: enabled 1

 1599 18:02:27.191127  PCI: 00:04.0: enabled 0

 1600 18:02:27.191411  PCI: 00:05.0: enabled 0

 1601 18:02:27.194907  PCI: 00:12.0: enabled 1

 1602 18:02:27.197975  PCI: 00:12.5: enabled 0

 1603 18:02:27.201244  PCI: 00:12.6: enabled 0

 1604 18:02:27.201535  PCI: 00:14.0: enabled 1

 1605 18:02:27.204312  PCI: 00:14.1: enabled 0

 1606 18:02:27.207503  PCI: 00:14.3: enabled 1

 1607 18:02:27.210763  PCI: 00:14.5: enabled 0

 1608 18:02:27.211054  PCI: 00:15.0: enabled 1

 1609 18:02:27.214140  PCI: 00:15.1: enabled 1

 1610 18:02:27.217333  PCI: 00:15.2: enabled 0

 1611 18:02:27.217624  PCI: 00:15.3: enabled 0

 1612 18:02:27.221486  PCI: 00:16.0: enabled 1

 1613 18:02:27.224404  PCI: 00:16.1: enabled 0

 1614 18:02:27.227703  PCI: 00:16.2: enabled 0

 1615 18:02:27.227997  PCI: 00:16.3: enabled 0

 1616 18:02:27.230951  PCI: 00:16.4: enabled 0

 1617 18:02:27.234360  PCI: 00:16.5: enabled 0

 1618 18:02:27.237809  PCI: 00:17.0: enabled 1

 1619 18:02:27.238107  PCI: 00:19.0: enabled 1

 1620 18:02:27.240890  PCI: 00:19.1: enabled 0

 1621 18:02:27.244261  PCI: 00:19.2: enabled 0

 1622 18:02:27.247933  PCI: 00:1a.0: enabled 0

 1623 18:02:27.248446  PCI: 00:1c.0: enabled 0

 1624 18:02:27.250911  PCI: 00:1c.1: enabled 0

 1625 18:02:27.254179  PCI: 00:1c.2: enabled 0

 1626 18:02:27.254618  PCI: 00:1c.3: enabled 0

 1627 18:02:27.257533  PCI: 00:1c.4: enabled 0

 1628 18:02:27.261145  PCI: 00:1c.5: enabled 0

 1629 18:02:27.263884  PCI: 00:1c.6: enabled 0

 1630 18:02:27.264227  PCI: 00:1c.7: enabled 0

 1631 18:02:27.267401  PCI: 00:1d.0: enabled 1

 1632 18:02:27.270538  PCI: 00:1d.1: enabled 0

 1633 18:02:27.273833  PCI: 00:1d.2: enabled 0

 1634 18:02:27.274092  PCI: 00:1d.3: enabled 0

 1635 18:02:27.277294  PCI: 00:1d.4: enabled 0

 1636 18:02:27.280624  PCI: 00:1d.5: enabled 0

 1637 18:02:27.283860  PCI: 00:1e.0: enabled 1

 1638 18:02:27.284166  PCI: 00:1e.1: enabled 0

 1639 18:02:27.287074  PCI: 00:1e.2: enabled 1

 1640 18:02:27.290654  PCI: 00:1e.3: enabled 1

 1641 18:02:27.293777  PCI: 00:1f.0: enabled 1

 1642 18:02:27.294089  PCI: 00:1f.1: enabled 0

 1643 18:02:27.296915  PCI: 00:1f.2: enabled 0

 1644 18:02:27.300056  PCI: 00:1f.3: enabled 1

 1645 18:02:27.300284  PCI: 00:1f.4: enabled 1

 1646 18:02:27.303610  PCI: 00:1f.5: enabled 1

 1647 18:02:27.306940  PCI: 00:1f.6: enabled 0

 1648 18:02:27.310453  USB0 port 0: enabled 1

 1649 18:02:27.310855  I2C: 01:15: enabled 1

 1650 18:02:27.314027  I2C: 02:5d: enabled 1

 1651 18:02:27.317071  GENERIC: 0.0: enabled 1

 1652 18:02:27.317303  I2C: 03:1a: enabled 1

 1653 18:02:27.320339  I2C: 03:38: enabled 1

 1654 18:02:27.323829  I2C: 03:39: enabled 1

 1655 18:02:27.324336  I2C: 03:3a: enabled 1

 1656 18:02:27.326901  I2C: 03:3b: enabled 1

 1657 18:02:27.330204  PCI: 00:00.0: enabled 1

 1658 18:02:27.330447  SPI: 00: enabled 1

 1659 18:02:27.333439  SPI: 01: enabled 1

 1660 18:02:27.336791  PNP: 0c09.0: enabled 1

 1661 18:02:27.337016  USB2 port 0: enabled 1

 1662 18:02:27.339878  USB2 port 1: enabled 1

 1663 18:02:27.343630  USB2 port 2: enabled 0

 1664 18:02:27.347014  USB2 port 3: enabled 0

 1665 18:02:27.347323  USB2 port 5: enabled 0

 1666 18:02:27.350057  USB2 port 6: enabled 1

 1667 18:02:27.353221  USB2 port 9: enabled 1

 1668 18:02:27.353448  USB3 port 0: enabled 1

 1669 18:02:27.356791  USB3 port 1: enabled 1

 1670 18:02:27.359659  USB3 port 2: enabled 1

 1671 18:02:27.359885  USB3 port 3: enabled 1

 1672 18:02:27.363225  USB3 port 4: enabled 0

 1673 18:02:27.366642  APIC: 02: enabled 1

 1674 18:02:27.366867  APIC: 01: enabled 1

 1675 18:02:27.369534  APIC: 03: enabled 1

 1676 18:02:27.372929  APIC: 07: enabled 1

 1677 18:02:27.373157  APIC: 06: enabled 1

 1678 18:02:27.376326  APIC: 05: enabled 1

 1679 18:02:27.379863  APIC: 04: enabled 1

 1680 18:02:27.380262  PCI: 00:08.0: enabled 1

 1681 18:02:27.383176  PCI: 00:14.2: enabled 1

 1682 18:02:27.386495  PCI: 01:00.0: enabled 1

 1683 18:02:27.390036  Disabling ACPI via APMC:

 1684 18:02:27.393078  done.

 1685 18:02:27.396791  FMAP: area RW_ELOG found @ af0000 (16384 bytes)

 1686 18:02:27.400025  ELOG: NV offset 0xaf0000 size 0x4000

 1687 18:02:27.406865  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1688 18:02:27.413418  ELOG: Event(17) added with size 13 at 2023-08-30 18:02:27 UTC

 1689 18:02:27.419829  ELOG: Event(92) added with size 9 at 2023-08-30 18:02:27 UTC

 1690 18:02:27.426836  ELOG: Event(93) added with size 9 at 2023-08-30 18:02:27 UTC

 1691 18:02:27.433552  ELOG: Event(9A) added with size 9 at 2023-08-30 18:02:27 UTC

 1692 18:02:27.440217  ELOG: Event(9E) added with size 10 at 2023-08-30 18:02:27 UTC

 1693 18:02:27.446400  ELOG: Event(9F) added with size 14 at 2023-08-30 18:02:27 UTC

 1694 18:02:27.449744  BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6

 1695 18:02:27.457174  ELOG: Event(A1) added with size 10 at 2023-08-30 18:02:27 UTC

 1696 18:02:27.466892  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1697 18:02:27.473458  ELOG: Event(A0) added with size 9 at 2023-08-30 18:02:27 UTC

 1698 18:02:27.477137  elog_add_boot_reason: Logged dev mode boot

 1699 18:02:27.480236  Finalize devices...

 1700 18:02:27.480513  PCI: 00:17.0 final

 1701 18:02:27.483605  Devices finalized

 1702 18:02:27.486805  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)

 1703 18:02:27.493193  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0

 1704 18:02:27.496283  ME: HFSTS1                  : 0x90000245

 1705 18:02:27.499882  ME: HFSTS2                  : 0x3B850126

 1706 18:02:27.506528  ME: HFSTS3                  : 0x00000020

 1707 18:02:27.509951  ME: HFSTS4                  : 0x00004800

 1708 18:02:27.513182  ME: HFSTS5                  : 0x00000000

 1709 18:02:27.516312  ME: HFSTS6                  : 0x40400006

 1710 18:02:27.519549  ME: Manufacturing Mode      : NO

 1711 18:02:27.523544  ME: FW Partition Table      : OK

 1712 18:02:27.526458  ME: Bringup Loader Failure  : NO

 1713 18:02:27.529584  ME: Firmware Init Complete  : YES

 1714 18:02:27.533274  ME: Boot Options Present    : NO

 1715 18:02:27.536486  ME: Update In Progress      : NO

 1716 18:02:27.539717  ME: D0i3 Support            : YES

 1717 18:02:27.543165  ME: Low Power State Enabled : NO

 1718 18:02:27.546080  ME: CPU Replaced            : NO

 1719 18:02:27.549406  ME: CPU Replacement Valid   : YES

 1720 18:02:27.553032  ME: Current Working State   : 5

 1721 18:02:27.556148  ME: Current Operation State : 1

 1722 18:02:27.559433  ME: Current Operation Mode  : 0

 1723 18:02:27.562770  ME: Error Code              : 0

 1724 18:02:27.565985  ME: CPU Debug Disabled      : YES

 1725 18:02:27.569499  ME: TXT Support             : NO

 1726 18:02:27.575686  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 1727 18:02:27.582271  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1728 18:02:27.582736  CBFS @ c08000 size 3f8000

 1729 18:02:27.588929  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1730 18:02:27.592348  CBFS: Locating 'fallback/dsdt.aml'

 1731 18:02:27.595486  CBFS: Found @ offset 10bb80 size 3fa5

 1732 18:02:27.602394  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1733 18:02:27.605373  CBFS @ c08000 size 3f8000

 1734 18:02:27.608929  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1735 18:02:27.612173  CBFS: Locating 'fallback/slic'

 1736 18:02:27.617076  CBFS: 'fallback/slic' not found.

 1737 18:02:27.623987  ACPI: Writing ACPI tables at 99b3e000.

 1738 18:02:27.624141  ACPI:    * FACS

 1739 18:02:27.627194  ACPI:    * DSDT

 1740 18:02:27.630534  Ramoops buffer: 0x100000@0x99a3d000.

 1741 18:02:27.633778  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1742 18:02:27.640560  FMAP: area RW_VPD found @ af8000 (8192 bytes)

 1743 18:02:27.644379  Google Chrome EC: version:

 1744 18:02:27.647478  	ro: helios_v2.0.2659-56403530b

 1745 18:02:27.650814  	rw: helios_v2.0.2849-c41de27e7d

 1746 18:02:27.651244    running image: 1

 1747 18:02:27.655168  ACPI:    * FADT

 1748 18:02:27.655592  SCI is IRQ9

 1749 18:02:27.661396  ACPI: added table 1/32, length now 40

 1750 18:02:27.661827  ACPI:     * SSDT

 1751 18:02:27.664753  Found 1 CPU(s) with 8 core(s) each.

 1752 18:02:27.668018  Error: Could not locate 'wifi_sar' in VPD.

 1753 18:02:27.675027  Checking CBFS for default SAR values

 1754 18:02:27.677978  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1755 18:02:27.681330  CBFS @ c08000 size 3f8000

 1756 18:02:27.687821  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1757 18:02:27.691615  CBFS: Locating 'wifi_sar_defaults.hex'

 1758 18:02:27.694908  CBFS: Found @ offset 5fac0 size 77

 1759 18:02:27.698344  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3

 1760 18:02:27.704358  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15

 1761 18:02:27.707847  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d

 1762 18:02:27.714591  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a

 1763 18:02:27.717792  failed to find key in VPD: dsm_calib_r0_0

 1764 18:02:27.727915  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0

 1765 18:02:27.731117  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h

 1766 18:02:27.734800  failed to find key in VPD: dsm_calib_r0_1

 1767 18:02:27.744135  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0

 1768 18:02:27.751067  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h

 1769 18:02:27.754457  failed to find key in VPD: dsm_calib_r0_2

 1770 18:02:27.763842  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0

 1771 18:02:27.767336  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah

 1772 18:02:27.774063  failed to find key in VPD: dsm_calib_r0_3

 1773 18:02:27.780916  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0

 1774 18:02:27.786977  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh

 1775 18:02:27.790174  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1776 18:02:27.794040  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01

 1777 18:02:27.798052  EC returned error result code 1

 1778 18:02:27.801500  EC returned error result code 1

 1779 18:02:27.805024  EC returned error result code 1

 1780 18:02:27.812064  PS2K: Bad resp from EC. Vivaldi disabled!

 1781 18:02:27.815254  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1782 18:02:27.821801  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1

 1783 18:02:27.828795  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6

 1784 18:02:27.831922  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1785 18:02:27.839793  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1786 18:02:27.845457  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1

 1787 18:02:27.851761  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1788 18:02:27.854922  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3

 1789 18:02:27.861708  ACPI: added table 2/32, length now 44

 1790 18:02:27.862097  ACPI:    * MCFG

 1791 18:02:27.864794  ACPI: added table 3/32, length now 48

 1792 18:02:27.867733  ACPI:    * TPM2

 1793 18:02:27.871277  TPM2 log created at 99a2d000

 1794 18:02:27.874589  ACPI: added table 4/32, length now 52

 1795 18:02:27.874886  ACPI:    * MADT

 1796 18:02:27.877859  SCI is IRQ9

 1797 18:02:27.881130  ACPI: added table 5/32, length now 56

 1798 18:02:27.881422  current = 99b43ac0

 1799 18:02:27.884486  ACPI:    * DMAR

 1800 18:02:27.887953  ACPI: added table 6/32, length now 60

 1801 18:02:27.891429  ACPI:    * IGD OpRegion

 1802 18:02:27.891773  GMA: Found VBT in CBFS

 1803 18:02:27.894889  GMA: Found valid VBT in CBFS

 1804 18:02:27.898212  ACPI: added table 7/32, length now 64

 1805 18:02:27.901192  ACPI:    * HPET

 1806 18:02:27.904305  ACPI: added table 8/32, length now 68

 1807 18:02:27.907435  ACPI: done.

 1808 18:02:27.907952  ACPI tables: 31744 bytes.

 1809 18:02:27.911468  smbios_write_tables: 99a2c000

 1810 18:02:27.915043  EC returned error result code 3

 1811 18:02:27.918116  Couldn't obtain OEM name from CBI

 1812 18:02:27.921300  Create SMBIOS type 17

 1813 18:02:27.924369  PCI: 00:00.0 (Intel Cannonlake)

 1814 18:02:27.927971  PCI: 00:14.3 (Intel WiFi)

 1815 18:02:27.930980  SMBIOS tables: 939 bytes.

 1816 18:02:27.934714  Writing table forward entry at 0x00000500

 1817 18:02:27.940902  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628

 1818 18:02:27.944286  Writing coreboot table at 0x99b62000

 1819 18:02:27.950774   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1820 18:02:27.954587   1. 0000000000001000-000000000009ffff: RAM

 1821 18:02:27.958120   2. 00000000000a0000-00000000000fffff: RESERVED

 1822 18:02:27.964400   3. 0000000000100000-0000000099a2bfff: RAM

 1823 18:02:27.970644   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES

 1824 18:02:27.974157   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE

 1825 18:02:27.980603   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES

 1826 18:02:27.983905   7. 000000009a000000-000000009f7fffff: RESERVED

 1827 18:02:27.990679   8. 00000000e0000000-00000000efffffff: RESERVED

 1828 18:02:27.994047   9. 00000000fc000000-00000000fc000fff: RESERVED

 1829 18:02:28.000345  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1830 18:02:28.003882  11. 00000000fed10000-00000000fed17fff: RESERVED

 1831 18:02:28.007023  12. 00000000fed80000-00000000fed83fff: RESERVED

 1832 18:02:28.013567  13. 00000000fed90000-00000000fed91fff: RESERVED

 1833 18:02:28.017383  14. 00000000feda0000-00000000feda1fff: RESERVED

 1834 18:02:28.023414  15. 0000000100000000-000000045e7fffff: RAM

 1835 18:02:28.026989  Graphics framebuffer located at 0xc0000000

 1836 18:02:28.030176  Passing 5 GPIOs to payload:

 1837 18:02:28.033301              NAME |       PORT | POLARITY |     VALUE

 1838 18:02:28.040458     write protect |  undefined |     high |      high

 1839 18:02:28.046931               lid |  undefined |     high |      high

 1840 18:02:28.050509             power |  undefined |     high |       low

 1841 18:02:28.057050             oprom |  undefined |     high |       low

 1842 18:02:28.060426          EC in RW | 0x000000cb |     high |       low

 1843 18:02:28.063716  Board ID: 4

 1844 18:02:28.067040  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1845 18:02:28.070096  CBFS @ c08000 size 3f8000

 1846 18:02:28.076598  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1847 18:02:28.083307  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6ba9

 1848 18:02:28.083761  coreboot table: 1492 bytes.

 1849 18:02:28.086586  IMD ROOT    0. 99fff000 00001000

 1850 18:02:28.090172  IMD SMALL   1. 99ffe000 00001000

 1851 18:02:28.093114  FSP MEMORY  2. 99c4e000 003b0000

 1852 18:02:28.096756  CONSOLE     3. 99c2e000 00020000

 1853 18:02:28.100163  FMAP        4. 99c2d000 0000054e

 1854 18:02:28.103303  TIME STAMP  5. 99c2c000 00000910

 1855 18:02:28.106938  VBOOT WORK  6. 99c18000 00014000

 1856 18:02:28.110134  MRC DATA    7. 99c16000 00001958

 1857 18:02:28.113113  ROMSTG STCK 8. 99c15000 00001000

 1858 18:02:28.116674  AFTER CAR   9. 99c0b000 0000a000

 1859 18:02:28.119968  RAMSTAGE   10. 99baf000 0005c000

 1860 18:02:28.123388  REFCODE    11. 99b7a000 00035000

 1861 18:02:28.126580  SMM BACKUP 12. 99b6a000 00010000

 1862 18:02:28.130138  COREBOOT   13. 99b62000 00008000

 1863 18:02:28.133151  ACPI       14. 99b3e000 00024000

 1864 18:02:28.136759  ACPI GNVS  15. 99b3d000 00001000

 1865 18:02:28.140018  RAMOOPS    16. 99a3d000 00100000

 1866 18:02:28.143163  TPM2 TCGLOG17. 99a2d000 00010000

 1867 18:02:28.146506  SMBIOS     18. 99a2c000 00000800

 1868 18:02:28.149922  IMD small region:

 1869 18:02:28.153135    IMD ROOT    0. 99ffec00 00000400

 1870 18:02:28.156412    FSP RUNTIME 1. 99ffebe0 00000004

 1871 18:02:28.160192    EC HOSTEVENT 2. 99ffebc0 00000008

 1872 18:02:28.163410    POWER STATE 3. 99ffeb80 00000040

 1873 18:02:28.166688    ROMSTAGE    4. 99ffeb60 00000004

 1874 18:02:28.170181    MEM INFO    5. 99ffe9a0 000001b9

 1875 18:02:28.173250    VPD         6. 99ffe920 0000006c

 1876 18:02:28.176463  MTRR: Physical address space:

 1877 18:02:28.182898  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1878 18:02:28.190187  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1879 18:02:28.196410  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6

 1880 18:02:28.202900  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0

 1881 18:02:28.209628  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1882 18:02:28.216310  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1883 18:02:28.222639  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6

 1884 18:02:28.225709  MTRR: Fixed MSR 0x250 0x0606060606060606

 1885 18:02:28.229614  MTRR: Fixed MSR 0x258 0x0606060606060606

 1886 18:02:28.232373  MTRR: Fixed MSR 0x259 0x0000000000000000

 1887 18:02:28.239378  MTRR: Fixed MSR 0x268 0x0606060606060606

 1888 18:02:28.242337  MTRR: Fixed MSR 0x269 0x0606060606060606

 1889 18:02:28.245510  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1890 18:02:28.249239  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1891 18:02:28.252178  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1892 18:02:28.258779  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1893 18:02:28.262268  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1894 18:02:28.265179  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1895 18:02:28.268420  call enable_fixed_mtrr()

 1896 18:02:28.272077  CPU physical address size: 39 bits

 1897 18:02:28.278638  MTRR: default type WB/UC MTRR counts: 6/8.

 1898 18:02:28.282078  MTRR: WB selected as default type.

 1899 18:02:28.288832  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0

 1900 18:02:28.292102  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0

 1901 18:02:28.298355  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 1902 18:02:28.304730  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1903 18:02:28.311894  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0

 1904 18:02:28.318361  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0

 1905 18:02:28.321340  MTRR: Fixed MSR 0x250 0x0606060606060606

 1906 18:02:28.328312  MTRR: Fixed MSR 0x258 0x0606060606060606

 1907 18:02:28.331664  MTRR: Fixed MSR 0x259 0x0000000000000000

 1908 18:02:28.334920  MTRR: Fixed MSR 0x268 0x0606060606060606

 1909 18:02:28.338379  MTRR: Fixed MSR 0x269 0x0606060606060606

 1910 18:02:28.344657  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1911 18:02:28.347993  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1912 18:02:28.351253  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1913 18:02:28.354731  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1914 18:02:28.361313  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1915 18:02:28.364264  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1916 18:02:28.364569  

 1917 18:02:28.364797  MTRR check

 1918 18:02:28.367939  Fixed MTRRs   : Enabled

 1919 18:02:28.371171  Variable MTRRs: Enabled

 1920 18:02:28.371459  

 1921 18:02:28.374570  call enable_fixed_mtrr()

 1922 18:02:28.377894  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2

 1923 18:02:28.381341  CPU physical address size: 39 bits

 1924 18:02:28.388091  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1925 18:02:28.391757  MTRR: Fixed MSR 0x250 0x0606060606060606

 1926 18:02:28.394934  CBFS @ c08000 size 3f8000

 1927 18:02:28.401311  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1928 18:02:28.404382  MTRR: Fixed MSR 0x258 0x0606060606060606

 1929 18:02:28.408467  MTRR: Fixed MSR 0x259 0x0000000000000000

 1930 18:02:28.411475  MTRR: Fixed MSR 0x268 0x0606060606060606

 1931 18:02:28.417947  MTRR: Fixed MSR 0x269 0x0606060606060606

 1932 18:02:28.421095  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1933 18:02:28.424355  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1934 18:02:28.428113  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1935 18:02:28.434325  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1936 18:02:28.437447  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1937 18:02:28.441047  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1938 18:02:28.444108  MTRR: Fixed MSR 0x250 0x0606060606060606

 1939 18:02:28.447433  call enable_fixed_mtrr()

 1940 18:02:28.451048  MTRR: Fixed MSR 0x258 0x0606060606060606

 1941 18:02:28.457345  MTRR: Fixed MSR 0x259 0x0000000000000000

 1942 18:02:28.460676  MTRR: Fixed MSR 0x268 0x0606060606060606

 1943 18:02:28.463795  MTRR: Fixed MSR 0x269 0x0606060606060606

 1944 18:02:28.466965  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1945 18:02:28.473717  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1946 18:02:28.476904  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1947 18:02:28.480135  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1948 18:02:28.483866  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1949 18:02:28.487132  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1950 18:02:28.493739  CPU physical address size: 39 bits

 1951 18:02:28.497151  call enable_fixed_mtrr()

 1952 18:02:28.500320  MTRR: Fixed MSR 0x250 0x0606060606060606

 1953 18:02:28.503527  MTRR: Fixed MSR 0x250 0x0606060606060606

 1954 18:02:28.506744  MTRR: Fixed MSR 0x258 0x0606060606060606

 1955 18:02:28.510187  MTRR: Fixed MSR 0x259 0x0000000000000000

 1956 18:02:28.517218  MTRR: Fixed MSR 0x268 0x0606060606060606

 1957 18:02:28.520187  MTRR: Fixed MSR 0x269 0x0606060606060606

 1958 18:02:28.523553  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1959 18:02:28.526735  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1960 18:02:28.533171  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1961 18:02:28.536346  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1962 18:02:28.539896  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1963 18:02:28.543412  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1964 18:02:28.550119  MTRR: Fixed MSR 0x258 0x0606060606060606

 1965 18:02:28.550266  call enable_fixed_mtrr()

 1966 18:02:28.556715  MTRR: Fixed MSR 0x259 0x0000000000000000

 1967 18:02:28.560475  MTRR: Fixed MSR 0x268 0x0606060606060606

 1968 18:02:28.563629  MTRR: Fixed MSR 0x269 0x0606060606060606

 1969 18:02:28.567033  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1970 18:02:28.573573  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1971 18:02:28.576505  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1972 18:02:28.579773  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1973 18:02:28.583514  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1974 18:02:28.587062  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1975 18:02:28.593329  CPU physical address size: 39 bits

 1976 18:02:28.593523  call enable_fixed_mtrr()

 1977 18:02:28.599857  MTRR: Fixed MSR 0x250 0x0606060606060606

 1978 18:02:28.603432  MTRR: Fixed MSR 0x250 0x0606060606060606

 1979 18:02:28.606321  MTRR: Fixed MSR 0x258 0x0606060606060606

 1980 18:02:28.609950  MTRR: Fixed MSR 0x259 0x0000000000000000

 1981 18:02:28.616475  MTRR: Fixed MSR 0x268 0x0606060606060606

 1982 18:02:28.619725  MTRR: Fixed MSR 0x269 0x0606060606060606

 1983 18:02:28.623084  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1984 18:02:28.626686  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1985 18:02:28.633140  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1986 18:02:28.636503  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1987 18:02:28.639916  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1988 18:02:28.643177  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1989 18:02:28.650313  MTRR: Fixed MSR 0x258 0x0606060606060606

 1990 18:02:28.650856  call enable_fixed_mtrr()

 1991 18:02:28.656491  MTRR: Fixed MSR 0x259 0x0000000000000000

 1992 18:02:28.660190  MTRR: Fixed MSR 0x268 0x0606060606060606

 1993 18:02:28.663687  MTRR: Fixed MSR 0x269 0x0606060606060606

 1994 18:02:28.666647  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1995 18:02:28.669733  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1996 18:02:28.676519  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1997 18:02:28.679938  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1998 18:02:28.683463  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1999 18:02:28.686591  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2000 18:02:28.693246  CPU physical address size: 39 bits

 2001 18:02:28.693780  call enable_fixed_mtrr()

 2002 18:02:29.144703  CPU physical address size: 39 bits

 2003 18:02:29.145772  CPU physical address size: 39 bits

 2004 18:02:29.146153  CBFS: Locating 'fallback/payload'

 2005 18:02:29.146477  CPU physical address size: 39 bits

 2006 18:02:29.146781  CBFS: Found @ offset 1c96c0 size 3f798

 2007 18:02:29.147081  Checking segment from ROM address 0xffdd16f8

 2008 18:02:29.147373  Checking segment from ROM address 0xffdd1714

 2009 18:02:29.147690  Loading segment from ROM address 0xffdd16f8

 2010 18:02:29.147983    code (compression=0)

 2011 18:02:29.148269    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760

 2012 18:02:29.148554  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760

 2013 18:02:29.148836  it's not compressed!

 2014 18:02:29.149115  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730

 2015 18:02:29.149397  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0

 2016 18:02:29.149674  Loading segment from ROM address 0xffdd1714

 2017 18:02:29.149951    Entry Point 0x30000000

 2018 18:02:29.150227  Loaded segments

 2019 18:02:29.150502  Finalizing chipset.

 2020 18:02:29.150776  Finalizing SMM.

 2021 18:02:29.151026  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5

 2022 18:02:29.151228  mp_park_aps done after 0 msecs.

 2023 18:02:29.151425  Jumping to boot code at 30000000(99b62000)

 2024 18:02:29.151623  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes

 2025 18:02:29.151843  

 2026 18:02:29.152042  

 2027 18:02:29.152238  

 2028 18:02:29.152436  Starting depthcharge on Helios...

 2029 18:02:29.152631  

 2030 18:02:29.152827  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2031 18:02:29.153026  

 2032 18:02:29.153220  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2033 18:02:29.153415  

 2034 18:02:29.153607  board_setup: Info: eMMC controller not present; skipping

 2035 18:02:29.153806  

 2036 18:02:29.154002  New NVMe Controller 0x30053aa8 @ 00:1d:00

 2037 18:02:29.154201  

 2038 18:02:29.154397  board_setup: Info: SDHCI controller not present; skipping

 2039 18:02:29.154597  

 2040 18:02:29.154794  vboot_create_vbsd: creating legacy VbSharedDataHeader structure

 2041 18:02:29.155004  

 2042 18:02:29.155200  Wipe memory regions:

 2043 18:02:29.155395  

 2044 18:02:29.155589  	[0x00000000001000, 0x000000000a0000)

 2045 18:02:29.155992  

 2046 18:02:29.156323  	[0x00000000100000, 0x00000030000000)

 2047 18:02:29.156654  

 2048 18:02:29.156986  	[0x00000030657430, 0x00000099a2c000)

 2049 18:02:29.157318  

 2050 18:02:29.157649  	[0x00000100000000, 0x0000045e800000)

 2051 18:02:29.158724  end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
 2052 18:02:29.159209  start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
 2053 18:02:29.159671  Setting prompt string to ['hatch:']
 2054 18:02:29.159958  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
 2055 18:02:30.526774  

 2056 18:02:30.527295  R8152: Initializing

 2057 18:02:30.527678  

 2058 18:02:30.530131  Version 9 (ocp_data = 6010)

 2059 18:02:30.534571  

 2060 18:02:30.535098  R8152: Done initializing

 2061 18:02:30.535437  

 2062 18:02:30.537417  Adding net device

 2063 18:02:31.146722  

 2064 18:02:31.147586  R8152: Initializing

 2065 18:02:31.148313  

 2066 18:02:31.150202  Version 6 (ocp_data = 5c30)

 2067 18:02:31.150835  

 2068 18:02:31.153620  R8152: Done initializing

 2069 18:02:31.154313  

 2070 18:02:31.156561  net_add_device: Attemp to include the same device

 2071 18:02:31.160078  

 2072 18:02:31.167318  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58

 2073 18:02:31.168049  

 2074 18:02:31.168687  

 2075 18:02:31.169310  

 2076 18:02:31.170433  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2078 18:02:31.272148  hatch: tftpboot 192.168.201.1 11385815/tftp-deploy-vshma22z/kernel/bzImage 11385815/tftp-deploy-vshma22z/kernel/cmdline 11385815/tftp-deploy-vshma22z/ramdisk/ramdisk.cpio.gz

 2079 18:02:31.272778  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2080 18:02:31.273202  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
 2081 18:02:31.277754  tftpboot 192.168.201.1 11385815/tftp-deploy-vshma22z/kernel/bzImploy-vshma22z/kernel/cmdline 11385815/tftp-deploy-vshma22z/ramdisk/ramdisk.cpio.gz

 2082 18:02:31.278276  

 2083 18:02:31.278607  Waiting for link

 2084 18:02:31.478401  

 2085 18:02:31.478895  done.

 2086 18:02:31.479222  

 2087 18:02:31.479528  MAC: 00:24:32:50:1a:5f

 2088 18:02:31.479948  

 2089 18:02:31.481335  Sending DHCP discover... done.

 2090 18:02:31.481941  

 2091 18:02:31.485167  Waiting for reply... done.

 2092 18:02:31.485681  

 2093 18:02:31.488485  Sending DHCP request... done.

 2094 18:02:31.488894  

 2095 18:02:31.694998  Waiting for reply... done.

 2096 18:02:31.695545  

 2097 18:02:31.695928  My ip is 192.168.201.21

 2098 18:02:31.696312  

 2099 18:02:31.701306  The DHCP server ip is 192.168.201.1

 2100 18:02:31.701995  

 2101 18:02:31.704959  TFTP server IP predefined by user: 192.168.201.1

 2102 18:02:31.705747  

 2103 18:02:31.711937  Bootfile predefined by user: 11385815/tftp-deploy-vshma22z/kernel/bzImage

 2104 18:02:31.712651  

 2105 18:02:31.714446  Sending tftp read request... done.

 2106 18:02:31.714940  

 2107 18:02:31.722649  Waiting for the transfer... 

 2108 18:02:31.722914  

 2109 18:02:32.368947  00000000 ################################################################

 2110 18:02:32.369238  

 2111 18:02:32.997721  00080000 ################################################################

 2112 18:02:32.997877  

 2113 18:02:33.551480  00100000 ################################################################

 2114 18:02:33.551651  

 2115 18:02:34.142215  00180000 ################################################################

 2116 18:02:34.142729  

 2117 18:02:34.734364  00200000 ################################################################

 2118 18:02:34.734515  

 2119 18:02:35.333554  00280000 ################################################################

 2120 18:02:35.334071  

 2121 18:02:35.984546  00300000 ################################################################

 2122 18:02:35.984695  

 2123 18:02:36.659826  00380000 ################################################################

 2124 18:02:36.659975  

 2125 18:02:37.241682  00400000 ################################################################

 2126 18:02:37.241830  

 2127 18:02:37.892341  00480000 ################################################################

 2128 18:02:37.892489  

 2129 18:02:38.543751  00500000 ################################################################

 2130 18:02:38.544271  

 2131 18:02:39.246964  00580000 ################################################################

 2132 18:02:39.247471  

 2133 18:02:39.927087  00600000 ################################################################

 2134 18:02:39.927714  

 2135 18:02:40.640409  00680000 ################################################################

 2136 18:02:40.640971  

 2137 18:02:41.367964  00700000 ################################################################

 2138 18:02:41.368813  

 2139 18:02:42.058980  00780000 ################################################################

 2140 18:02:42.059485  

 2141 18:02:42.742312  00800000 ################################################################

 2142 18:02:42.742614  

 2143 18:02:43.439274  00880000 ################################################################

 2144 18:02:43.439565  

 2145 18:02:44.134448  00900000 ################################################################

 2146 18:02:44.135020  

 2147 18:02:44.850612  00980000 ################################################################

 2148 18:02:44.851114  

 2149 18:02:45.558513  00a00000 ################################################################

 2150 18:02:45.558997  

 2151 18:02:46.174234  00a80000 ######################################################### done.

 2152 18:02:46.174781  

 2153 18:02:46.177149  The bootfile was 11469312 bytes long.

 2154 18:02:46.177584  

 2155 18:02:46.180370  Sending tftp read request... done.

 2156 18:02:46.180809  

 2157 18:02:46.183785  Waiting for the transfer... 

 2158 18:02:46.184220  

 2159 18:02:46.889478  00000000 ################################################################

 2160 18:02:46.889970  

 2161 18:02:47.525262  00080000 ################################################################

 2162 18:02:47.525420  

 2163 18:02:48.167125  00100000 ################################################################

 2164 18:02:48.167254  

 2165 18:02:48.820296  00180000 ################################################################

 2166 18:02:48.820786  

 2167 18:02:49.509291  00200000 ################################################################

 2168 18:02:49.509838  

 2169 18:02:50.223459  00280000 ################################################################

 2170 18:02:50.223998  

 2171 18:02:50.944768  00300000 ################################################################

 2172 18:02:50.945285  

 2173 18:02:52.988775  00380000 ################################################################

 2174 18:02:52.989293  

 2175 18:02:52.989622  00400000 ################################################################

 2176 18:02:52.989935  

 2177 18:02:53.153976  00480000 ################################################################

 2178 18:02:53.154497  

 2179 18:02:53.858997  00500000 ################################################################

 2180 18:02:53.859555  

 2181 18:02:54.392193  00580000 ################################################ done.

 2182 18:02:54.392701  

 2183 18:02:54.395603  Sending tftp read request... done.

 2184 18:02:54.396044  

 2185 18:02:54.398765  Waiting for the transfer... 

 2186 18:02:54.399312  

 2187 18:02:54.399846  00000000 # done.

 2188 18:02:54.400182  

 2189 18:02:54.408735  Command line loaded dynamically from TFTP file: 11385815/tftp-deploy-vshma22z/kernel/cmdline

 2190 18:02:54.409153  

 2191 18:02:54.438108  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11385815/extract-nfsrootfs-2lqahset,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2192 18:02:54.438626  

 2193 18:02:54.445345  ec_init(0): CrosEC protocol v3 supported (256, 256)

 2194 18:02:54.449141  

 2195 18:02:54.452340  Shutting down all USB controllers.

 2196 18:02:54.452755  

 2197 18:02:54.453078  Removing current net device

 2198 18:02:54.459675  

 2199 18:02:54.460091  Finalizing coreboot

 2200 18:02:54.460418  

 2201 18:02:54.466503  Exiting depthcharge with code 4 at timestamp: 32965588

 2202 18:02:54.466915  

 2203 18:02:54.467240  

 2204 18:02:54.467542  Starting kernel ...

 2205 18:02:54.467877  

 2206 18:02:54.468165  

 2207 18:02:54.469386  end: 2.2.4 bootloader-commands (duration 00:00:25) [common]
 2208 18:02:54.469935  start: 2.2.5 auto-login-action (timeout 00:04:16) [common]
 2209 18:02:54.470310  Setting prompt string to ['Linux version [0-9]']
 2210 18:02:54.470645  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2211 18:02:54.470988  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2213 18:07:10.470182  end: 2.2.5 auto-login-action (duration 00:04:16) [common]
 2215 18:07:10.470501  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 256 seconds'
 2217 18:07:10.470718  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2220 18:07:10.470974  end: 2 depthcharge-action (duration 00:05:00) [common]
 2222 18:07:10.471256  Cleaning after the job
 2223 18:07:10.471377  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11385815/tftp-deploy-vshma22z/ramdisk
 2224 18:07:10.472456  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11385815/tftp-deploy-vshma22z/kernel
 2225 18:07:10.474261  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11385815/tftp-deploy-vshma22z/nfsrootfs
 2226 18:07:10.562064  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11385815/tftp-deploy-vshma22z/modules
 2227 18:07:10.562792  start: 4.1 power-off (timeout 00:00:30) [common]
 2228 18:07:10.562963  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
 2229 18:07:10.639199  >> Command sent successfully.

 2230 18:07:10.641642  Returned 0 in 0 seconds
 2231 18:07:10.742018  end: 4.1 power-off (duration 00:00:00) [common]
 2233 18:07:10.742360  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2234 18:07:10.742629  Listened to connection for namespace 'common' for up to 1s
 2236 18:07:10.742996  Listened to connection for namespace 'common' for up to 1s
 2237 18:07:11.743781  Finalising connection for namespace 'common'
 2238 18:07:11.744433  Disconnecting from shell: Finalise
 2239 18:07:11.744802  
 2240 18:07:11.845728  end: 4.2 read-feedback (duration 00:00:01) [common]
 2241 18:07:11.846262  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11385815
 2242 18:07:12.465550  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11385815
 2243 18:07:12.465759  JobError: Your job cannot terminate cleanly.