Boot log: acer-cb317-1h-c3z6-dedede
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 12:50:38.293449 lava-dispatcher, installed at version: 2023.06
2 12:50:38.293668 start: 0 validate
3 12:50:38.293807 Start time: 2023-09-23 12:50:38.293799+00:00 (UTC)
4 12:50:38.293935 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:50:38.294092 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 12:50:38.561697 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:50:38.561891 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.292-cip102-406-g9efaa60a8cb4%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:50:43.061050 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:50:43.061819 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.292-cip102-406-g9efaa60a8cb4%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:50:43.567583 validate duration: 5.27
12 12:50:43.567841 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:50:43.567938 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:50:43.568022 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:50:43.568146 Not decompressing ramdisk as can be used compressed.
16 12:50:43.568239 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 12:50:43.568309 saving as /var/lib/lava/dispatcher/tmp/11602071/tftp-deploy-d91kzifd/ramdisk/rootfs.cpio.gz
18 12:50:43.568374 total size: 8418130 (8 MB)
19 12:50:43.569522 progress 0 % (0 MB)
20 12:50:43.571830 progress 5 % (0 MB)
21 12:50:43.574103 progress 10 % (0 MB)
22 12:50:43.576396 progress 15 % (1 MB)
23 12:50:43.578655 progress 20 % (1 MB)
24 12:50:43.580965 progress 25 % (2 MB)
25 12:50:43.583291 progress 30 % (2 MB)
26 12:50:43.585447 progress 35 % (2 MB)
27 12:50:43.587751 progress 40 % (3 MB)
28 12:50:43.590203 progress 45 % (3 MB)
29 12:50:43.592525 progress 50 % (4 MB)
30 12:50:43.594756 progress 55 % (4 MB)
31 12:50:43.597008 progress 60 % (4 MB)
32 12:50:43.599089 progress 65 % (5 MB)
33 12:50:43.601314 progress 70 % (5 MB)
34 12:50:43.603562 progress 75 % (6 MB)
35 12:50:43.605761 progress 80 % (6 MB)
36 12:50:43.608021 progress 85 % (6 MB)
37 12:50:43.610236 progress 90 % (7 MB)
38 12:50:43.612462 progress 95 % (7 MB)
39 12:50:43.614543 progress 100 % (8 MB)
40 12:50:43.614786 8 MB downloaded in 0.05 s (172.98 MB/s)
41 12:50:43.614977 end: 1.1.1 http-download (duration 00:00:00) [common]
43 12:50:43.615217 end: 1.1 download-retry (duration 00:00:00) [common]
44 12:50:43.615302 start: 1.2 download-retry (timeout 00:10:00) [common]
45 12:50:43.615384 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 12:50:43.615520 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.292-cip102-406-g9efaa60a8cb4/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:50:43.615589 saving as /var/lib/lava/dispatcher/tmp/11602071/tftp-deploy-d91kzifd/kernel/bzImage
48 12:50:43.615649 total size: 11473408 (10 MB)
49 12:50:43.615713 No compression specified
50 12:50:43.616926 progress 0 % (0 MB)
51 12:50:43.619932 progress 5 % (0 MB)
52 12:50:43.623033 progress 10 % (1 MB)
53 12:50:43.625963 progress 15 % (1 MB)
54 12:50:43.629060 progress 20 % (2 MB)
55 12:50:43.632074 progress 25 % (2 MB)
56 12:50:43.635159 progress 30 % (3 MB)
57 12:50:43.638181 progress 35 % (3 MB)
58 12:50:43.641414 progress 40 % (4 MB)
59 12:50:43.644383 progress 45 % (4 MB)
60 12:50:43.647489 progress 50 % (5 MB)
61 12:50:43.650397 progress 55 % (6 MB)
62 12:50:43.653479 progress 60 % (6 MB)
63 12:50:43.656389 progress 65 % (7 MB)
64 12:50:43.659404 progress 70 % (7 MB)
65 12:50:43.662331 progress 75 % (8 MB)
66 12:50:43.665383 progress 80 % (8 MB)
67 12:50:43.668346 progress 85 % (9 MB)
68 12:50:43.671534 progress 90 % (9 MB)
69 12:50:43.674411 progress 95 % (10 MB)
70 12:50:43.677540 progress 100 % (10 MB)
71 12:50:43.677663 10 MB downloaded in 0.06 s (176.45 MB/s)
72 12:50:43.677807 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:50:43.678037 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:50:43.678122 start: 1.3 download-retry (timeout 00:10:00) [common]
76 12:50:43.678207 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 12:50:43.678347 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.292-cip102-406-g9efaa60a8cb4/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:50:43.678417 saving as /var/lib/lava/dispatcher/tmp/11602071/tftp-deploy-d91kzifd/modules/modules.tar
79 12:50:43.678479 total size: 484692 (0 MB)
80 12:50:43.678541 Using unxz to decompress xz
81 12:50:43.682864 progress 6 % (0 MB)
82 12:50:43.683270 progress 13 % (0 MB)
83 12:50:43.683552 progress 20 % (0 MB)
84 12:50:43.685187 progress 27 % (0 MB)
85 12:50:43.687281 progress 33 % (0 MB)
86 12:50:43.689227 progress 40 % (0 MB)
87 12:50:43.691335 progress 47 % (0 MB)
88 12:50:43.693319 progress 54 % (0 MB)
89 12:50:43.695366 progress 60 % (0 MB)
90 12:50:43.697804 progress 67 % (0 MB)
91 12:50:43.700027 progress 74 % (0 MB)
92 12:50:43.702048 progress 81 % (0 MB)
93 12:50:43.704346 progress 87 % (0 MB)
94 12:50:43.706048 progress 94 % (0 MB)
95 12:50:43.708289 progress 100 % (0 MB)
96 12:50:43.714496 0 MB downloaded in 0.04 s (12.84 MB/s)
97 12:50:43.714855 end: 1.3.1 http-download (duration 00:00:00) [common]
99 12:50:43.715257 end: 1.3 download-retry (duration 00:00:00) [common]
100 12:50:43.715380 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
101 12:50:43.715509 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
102 12:50:43.715621 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 12:50:43.715736 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
104 12:50:43.715987 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11602071/lava-overlay-a4cq9chy
105 12:50:43.716155 makedir: /var/lib/lava/dispatcher/tmp/11602071/lava-overlay-a4cq9chy/lava-11602071/bin
106 12:50:43.716291 makedir: /var/lib/lava/dispatcher/tmp/11602071/lava-overlay-a4cq9chy/lava-11602071/tests
107 12:50:43.716421 makedir: /var/lib/lava/dispatcher/tmp/11602071/lava-overlay-a4cq9chy/lava-11602071/results
108 12:50:43.716568 Creating /var/lib/lava/dispatcher/tmp/11602071/lava-overlay-a4cq9chy/lava-11602071/bin/lava-add-keys
109 12:50:43.716760 Creating /var/lib/lava/dispatcher/tmp/11602071/lava-overlay-a4cq9chy/lava-11602071/bin/lava-add-sources
110 12:50:43.716937 Creating /var/lib/lava/dispatcher/tmp/11602071/lava-overlay-a4cq9chy/lava-11602071/bin/lava-background-process-start
111 12:50:43.717099 Creating /var/lib/lava/dispatcher/tmp/11602071/lava-overlay-a4cq9chy/lava-11602071/bin/lava-background-process-stop
112 12:50:43.717257 Creating /var/lib/lava/dispatcher/tmp/11602071/lava-overlay-a4cq9chy/lava-11602071/bin/lava-common-functions
113 12:50:43.717413 Creating /var/lib/lava/dispatcher/tmp/11602071/lava-overlay-a4cq9chy/lava-11602071/bin/lava-echo-ipv4
114 12:50:43.717569 Creating /var/lib/lava/dispatcher/tmp/11602071/lava-overlay-a4cq9chy/lava-11602071/bin/lava-install-packages
115 12:50:43.717725 Creating /var/lib/lava/dispatcher/tmp/11602071/lava-overlay-a4cq9chy/lava-11602071/bin/lava-installed-packages
116 12:50:43.717881 Creating /var/lib/lava/dispatcher/tmp/11602071/lava-overlay-a4cq9chy/lava-11602071/bin/lava-os-build
117 12:50:43.718038 Creating /var/lib/lava/dispatcher/tmp/11602071/lava-overlay-a4cq9chy/lava-11602071/bin/lava-probe-channel
118 12:50:43.718193 Creating /var/lib/lava/dispatcher/tmp/11602071/lava-overlay-a4cq9chy/lava-11602071/bin/lava-probe-ip
119 12:50:43.718349 Creating /var/lib/lava/dispatcher/tmp/11602071/lava-overlay-a4cq9chy/lava-11602071/bin/lava-target-ip
120 12:50:43.718505 Creating /var/lib/lava/dispatcher/tmp/11602071/lava-overlay-a4cq9chy/lava-11602071/bin/lava-target-mac
121 12:50:43.718662 Creating /var/lib/lava/dispatcher/tmp/11602071/lava-overlay-a4cq9chy/lava-11602071/bin/lava-target-storage
122 12:50:43.718875 Creating /var/lib/lava/dispatcher/tmp/11602071/lava-overlay-a4cq9chy/lava-11602071/bin/lava-test-case
123 12:50:43.719033 Creating /var/lib/lava/dispatcher/tmp/11602071/lava-overlay-a4cq9chy/lava-11602071/bin/lava-test-event
124 12:50:43.719188 Creating /var/lib/lava/dispatcher/tmp/11602071/lava-overlay-a4cq9chy/lava-11602071/bin/lava-test-feedback
125 12:50:43.719343 Creating /var/lib/lava/dispatcher/tmp/11602071/lava-overlay-a4cq9chy/lava-11602071/bin/lava-test-raise
126 12:50:43.719500 Creating /var/lib/lava/dispatcher/tmp/11602071/lava-overlay-a4cq9chy/lava-11602071/bin/lava-test-reference
127 12:50:43.719660 Creating /var/lib/lava/dispatcher/tmp/11602071/lava-overlay-a4cq9chy/lava-11602071/bin/lava-test-runner
128 12:50:43.719816 Creating /var/lib/lava/dispatcher/tmp/11602071/lava-overlay-a4cq9chy/lava-11602071/bin/lava-test-set
129 12:50:43.719974 Creating /var/lib/lava/dispatcher/tmp/11602071/lava-overlay-a4cq9chy/lava-11602071/bin/lava-test-shell
130 12:50:43.720134 Updating /var/lib/lava/dispatcher/tmp/11602071/lava-overlay-a4cq9chy/lava-11602071/bin/lava-install-packages (oe)
131 12:50:43.720319 Updating /var/lib/lava/dispatcher/tmp/11602071/lava-overlay-a4cq9chy/lava-11602071/bin/lava-installed-packages (oe)
132 12:50:43.720477 Creating /var/lib/lava/dispatcher/tmp/11602071/lava-overlay-a4cq9chy/lava-11602071/environment
133 12:50:43.720609 LAVA metadata
134 12:50:43.720719 - LAVA_JOB_ID=11602071
135 12:50:43.720821 - LAVA_DISPATCHER_IP=192.168.201.1
136 12:50:43.720961 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
137 12:50:43.721048 skipped lava-vland-overlay
138 12:50:43.721134 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 12:50:43.721218 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
140 12:50:43.721282 skipped lava-multinode-overlay
141 12:50:43.721356 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 12:50:43.721439 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
143 12:50:43.721519 Loading test definitions
144 12:50:43.721618 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
145 12:50:43.721697 Using /lava-11602071 at stage 0
146 12:50:43.722014 uuid=11602071_1.4.2.3.1 testdef=None
147 12:50:43.722103 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 12:50:43.722187 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
149 12:50:43.722732 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 12:50:43.723052 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
152 12:50:43.723714 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 12:50:43.723944 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
155 12:50:43.724559 runner path: /var/lib/lava/dispatcher/tmp/11602071/lava-overlay-a4cq9chy/lava-11602071/0/tests/0_dmesg test_uuid 11602071_1.4.2.3.1
156 12:50:43.724714 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 12:50:43.724989 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
159 12:50:43.725061 Using /lava-11602071 at stage 1
160 12:50:43.725367 uuid=11602071_1.4.2.3.5 testdef=None
161 12:50:43.725456 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 12:50:43.725539 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
163 12:50:43.726011 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 12:50:43.726226 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
166 12:50:43.726914 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 12:50:43.727140 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
169 12:50:43.727770 runner path: /var/lib/lava/dispatcher/tmp/11602071/lava-overlay-a4cq9chy/lava-11602071/1/tests/1_bootrr test_uuid 11602071_1.4.2.3.5
170 12:50:43.727920 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 12:50:43.728123 Creating lava-test-runner.conf files
173 12:50:43.728185 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11602071/lava-overlay-a4cq9chy/lava-11602071/0 for stage 0
174 12:50:43.728274 - 0_dmesg
175 12:50:43.728353 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11602071/lava-overlay-a4cq9chy/lava-11602071/1 for stage 1
176 12:50:43.728444 - 1_bootrr
177 12:50:43.728542 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 12:50:43.728627 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
179 12:50:43.737283 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 12:50:43.737405 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
181 12:50:43.737500 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 12:50:43.737622 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 12:50:43.737720 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
184 12:50:44.003641 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 12:50:44.004055 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
186 12:50:44.004209 extracting modules file /var/lib/lava/dispatcher/tmp/11602071/tftp-deploy-d91kzifd/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11602071/extract-overlay-ramdisk-d2hwao02/ramdisk
187 12:50:44.027662 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 12:50:44.027837 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
189 12:50:44.027956 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11602071/compress-overlay-1h4xzdbd/overlay-1.4.2.4.tar.gz to ramdisk
190 12:50:44.028038 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11602071/compress-overlay-1h4xzdbd/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11602071/extract-overlay-ramdisk-d2hwao02/ramdisk
191 12:50:44.036471 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 12:50:44.036621 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
193 12:50:44.036735 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 12:50:44.036844 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
195 12:50:44.036936 Building ramdisk /var/lib/lava/dispatcher/tmp/11602071/extract-overlay-ramdisk-d2hwao02/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11602071/extract-overlay-ramdisk-d2hwao02/ramdisk
196 12:50:44.185158 >> 53982 blocks
197 12:50:45.081834 rename /var/lib/lava/dispatcher/tmp/11602071/extract-overlay-ramdisk-d2hwao02/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11602071/tftp-deploy-d91kzifd/ramdisk/ramdisk.cpio.gz
198 12:50:45.082312 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 12:50:45.082489 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 12:50:45.082625 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 12:50:45.082724 No mkimage arch provided, not using FIT.
202 12:50:45.082831 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 12:50:45.082921 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 12:50:45.083034 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 12:50:45.083135 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 12:50:45.083228 No LXC device requested
207 12:50:45.083311 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 12:50:45.083403 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 12:50:45.083485 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 12:50:45.083560 Checking files for TFTP limit of 4294967296 bytes.
211 12:50:45.083978 end: 1 tftp-deploy (duration 00:00:02) [common]
212 12:50:45.084088 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 12:50:45.084182 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 12:50:45.084305 substitutions:
215 12:50:45.084375 - {DTB}: None
216 12:50:45.084439 - {INITRD}: 11602071/tftp-deploy-d91kzifd/ramdisk/ramdisk.cpio.gz
217 12:50:45.084501 - {KERNEL}: 11602071/tftp-deploy-d91kzifd/kernel/bzImage
218 12:50:45.084561 - {LAVA_MAC}: None
219 12:50:45.084620 - {PRESEED_CONFIG}: None
220 12:50:45.084691 - {PRESEED_LOCAL}: None
221 12:50:45.084748 - {RAMDISK}: 11602071/tftp-deploy-d91kzifd/ramdisk/ramdisk.cpio.gz
222 12:50:45.084803 - {ROOT_PART}: None
223 12:50:45.084858 - {ROOT}: None
224 12:50:45.084913 - {SERVER_IP}: 192.168.201.1
225 12:50:45.084968 - {TEE}: None
226 12:50:45.085023 Parsed boot commands:
227 12:50:45.085076 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 12:50:45.085256 Parsed boot commands: tftpboot 192.168.201.1 11602071/tftp-deploy-d91kzifd/kernel/bzImage 11602071/tftp-deploy-d91kzifd/kernel/cmdline 11602071/tftp-deploy-d91kzifd/ramdisk/ramdisk.cpio.gz
229 12:50:45.085346 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 12:50:45.085432 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 12:50:45.085529 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 12:50:45.085618 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 12:50:45.085691 Not connected, no need to disconnect.
234 12:50:45.085766 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 12:50:45.085850 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 12:50:45.085916 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cb317-1h-c3z6-dedede-cbg-7'
237 12:50:45.090549 Setting prompt string to ['lava-test: # ']
238 12:50:45.091196 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 12:50:45.091429 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 12:50:45.091660 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 12:50:45.091796 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 12:50:45.092011 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-7' '--port=1' '--command=reboot'
243 12:50:50.233076 >> Command sent successfully.
244 12:50:50.243707 Returned 0 in 5 seconds
245 12:50:50.344900 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 12:50:50.346307 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 12:50:50.346908 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 12:50:50.347394 Setting prompt string to 'Starting depthcharge on Magolor...'
250 12:50:50.347756 Changing prompt to 'Starting depthcharge on Magolor...'
251 12:50:50.348103 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
252 12:50:50.349399 [Enter `^Ec?' for help]
253 12:50:51.481176
254 12:50:51.481684
255 12:50:51.491071 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
256 12:50:51.494476 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
257 12:50:51.501179 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
258 12:50:51.504506 CPU: AES supported, TXT NOT supported, VT supported
259 12:50:51.511231 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
260 12:50:51.514485 PCH: device id 4d87 (rev 01) is Jasperlake Super
261 12:50:51.518275 IGD: device id 4e55 (rev 01) is Jasperlake GT4
262 12:50:51.521990 VBOOT: Loading verstage.
263 12:50:51.526486 FMAP: Found "FLASH" version 1.1 at 0xc04000.
264 12:50:51.533152 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
265 12:50:51.536714 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
266 12:50:51.543025 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
267 12:50:51.543568
268 12:50:51.543946
269 12:50:51.556250 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
270 12:50:51.570464 Probing TPM: . done!
271 12:50:51.573698 TPM ready after 0 ms
272 12:50:51.578139 Connected to device vid:did:rid of 1ae0:0028:00
273 12:50:51.588458 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
274 12:50:51.594909 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
275 12:50:51.645479 Initialized TPM device CR50 revision 0
276 12:50:51.655135 tlcl_send_startup: Startup return code is 0
277 12:50:51.655677 TPM: setup succeeded
278 12:50:51.669986 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
279 12:50:51.684053 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
280 12:50:51.691721 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
281 12:50:51.706526 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
282 12:50:51.709893 Chrome EC: UHEPI supported
283 12:50:51.713062 Phase 1
284 12:50:51.716385 FMAP: area GBB found @ c05000 (12288 bytes)
285 12:50:51.722715 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
286 12:50:51.729486 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
287 12:50:51.733244 Recovery requested (1009000e)
288 12:50:51.748054 TPM: Extending digest for VBOOT: boot mode into PCR 0
289 12:50:51.751759 tlcl_extend: response is 0
290 12:50:51.756050 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
291 12:50:51.771211 tlcl_extend: response is 0
292 12:50:51.777759 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
293 12:50:51.781178 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
294 12:50:51.788132 BS: verstage times (exec / console): total (unknown) / 124 ms
295 12:50:51.791343
296 12:50:51.791815
297 12:50:51.801682 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
298 12:50:51.805100 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
299 12:50:51.812665 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
300 12:50:51.815608 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
301 12:50:51.818447 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
302 12:50:51.825220 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
303 12:50:51.828471 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
304 12:50:51.831562 TCO_STS: 0000 0001
305 12:50:51.832060 GEN_PMCON: d0015038 00002200
306 12:50:51.835239 GBLRST_CAUSE: 00000000 00000000
307 12:50:51.838668 prev_sleep_state 5
308 12:50:51.841844 Boot Count incremented to 675
309 12:50:51.848305 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
310 12:50:51.852087 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
311 12:50:51.855360 Chrome EC: UHEPI supported
312 12:50:51.862428 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
313 12:50:51.868874 Probing TPM: done!
314 12:50:51.874995 Connected to device vid:did:rid of 1ae0:0028:00
315 12:50:51.885666 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
316 12:50:51.888837 Initialized TPM device CR50 revision 0
317 12:50:51.904613 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
318 12:50:51.907972 MRC: Hash idx 0x100b comparison successful.
319 12:50:51.911380 MRC cache found, size 5458
320 12:50:51.914718 bootmode is set to: 2
321 12:50:51.915245 SPD INDEX = 0
322 12:50:51.921855 CBFS: Found 'spd.bin' @0x40c40 size 0x600
323 12:50:51.922667 SPD: module type is LPDDR4X
324 12:50:51.929425 SPD: module part number is MT53E512M32D2NP-046 WT:E
325 12:50:51.935687 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
326 12:50:51.939334 SPD: device width 16 bits, bus width 32 bits
327 12:50:51.942349 SPD: module size is 4096 MB (per channel)
328 12:50:51.948694 meminit_channels: DRAM half-populated
329 12:50:52.029211 CBMEM:
330 12:50:52.032593 IMD: root @ 0x76fff000 254 entries.
331 12:50:52.035482 IMD: root @ 0x76ffec00 62 entries.
332 12:50:52.039118 FMAP: area RO_VPD found @ c00000 (16384 bytes)
333 12:50:52.046223 WARNING: RO_VPD is uninitialized or empty.
334 12:50:52.049204 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
335 12:50:52.052293 External stage cache:
336 12:50:52.055880 IMD: root @ 0x7b3ff000 254 entries.
337 12:50:52.059530 IMD: root @ 0x7b3fec00 62 entries.
338 12:50:52.069182 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
339 12:50:52.075593 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
340 12:50:52.082521 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
341 12:50:52.090839 MRC: 'RECOVERY_MRC_CACHE' does not need update.
342 12:50:52.093840 cse_lite: Skip switching to RW in the recovery path
343 12:50:52.097842 1 DIMMs found
344 12:50:52.098446 SMM Memory Map
345 12:50:52.101041 SMRAM : 0x7b000000 0x800000
346 12:50:52.104115 Subregion 0: 0x7b000000 0x200000
347 12:50:52.107414 Subregion 1: 0x7b200000 0x200000
348 12:50:52.111122 Subregion 2: 0x7b400000 0x400000
349 12:50:52.114077 top_of_ram = 0x77000000
350 12:50:52.121241 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
351 12:50:52.123853 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
352 12:50:52.130729 MTRR Range: Start=ff000000 End=0 (Size 1000000)
353 12:50:52.134238 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
354 12:50:52.141188 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
355 12:50:52.152503 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
356 12:50:52.159612 Processing 188 relocs. Offset value of 0x74c0e000
357 12:50:52.166032 BS: romstage times (exec / console): total (unknown) / 255 ms
358 12:50:52.170754
359 12:50:52.171352
360 12:50:52.180458 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
361 12:50:52.187209 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
362 12:50:52.190555 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
363 12:50:52.197370 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
364 12:50:52.252957 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
365 12:50:52.259705 Processing 4805 relocs. Offset value of 0x75da8000
366 12:50:52.263219 BS: postcar times (exec / console): total (unknown) / 42 ms
367 12:50:52.266453
368 12:50:52.267066
369 12:50:52.276274 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
370 12:50:52.276853 Normal boot
371 12:50:52.280458 EC returned error result code 3
372 12:50:52.283377 FW_CONFIG value is 0x204
373 12:50:52.286472 GENERIC: 0.0 disabled by fw_config
374 12:50:52.293176 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
375 12:50:52.296447 I2C: 00:10 disabled by fw_config
376 12:50:52.299499 I2C: 00:10 disabled by fw_config
377 12:50:52.303203 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
378 12:50:52.310235 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
379 12:50:52.312834 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
380 12:50:52.319528 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
381 12:50:52.323017 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
382 12:50:52.326578 I2C: 00:10 disabled by fw_config
383 12:50:52.333453 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
384 12:50:52.339447 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
385 12:50:52.342819 I2C: 00:1a disabled by fw_config
386 12:50:52.346219 I2C: 00:1a disabled by fw_config
387 12:50:52.352852 fw_config match found: AUDIO_AMP=UNPROVISIONED
388 12:50:52.356113 fw_config match found: AUDIO_AMP=UNPROVISIONED
389 12:50:52.359622 GENERIC: 0.0 disabled by fw_config
390 12:50:52.366257 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
391 12:50:52.369115 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
392 12:50:52.375672 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
393 12:50:52.379004 microcode: Update skipped, already up-to-date
394 12:50:52.385765 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
395 12:50:52.411723 Detected 2 core, 2 thread CPU.
396 12:50:52.415000 Setting up SMI for CPU
397 12:50:52.418384 IED base = 0x7b400000
398 12:50:52.419013 IED size = 0x00400000
399 12:50:52.421572 Will perform SMM setup.
400 12:50:52.425217 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
401 12:50:52.435125 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
402 12:50:52.438386 Processing 16 relocs. Offset value of 0x00030000
403 12:50:52.442162 Attempting to start 1 APs
404 12:50:52.445603 Waiting for 10ms after sending INIT.
405 12:50:52.461620 Waiting for 1st SIPI to complete...done.
406 12:50:52.462194 AP: slot 1 apic_id 2.
407 12:50:52.468210 Waiting for 2nd SIPI to complete...done.
408 12:50:52.475081 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
409 12:50:52.482003 Processing 13 relocs. Offset value of 0x00038000
410 12:50:52.482610 Unable to locate Global NVS
411 12:50:52.491955 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
412 12:50:52.495192 Installing permanent SMM handler to 0x7b000000
413 12:50:52.501623 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
414 12:50:52.508578 Processing 704 relocs. Offset value of 0x7b010000
415 12:50:52.515383 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
416 12:50:52.521520 Processing 13 relocs. Offset value of 0x7b008000
417 12:50:52.528311 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
418 12:50:52.531502 Unable to locate Global NVS
419 12:50:52.538548 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
420 12:50:52.541601 Clearing SMI status registers
421 12:50:52.542209 SMI_STS: PM1
422 12:50:52.544836 PM1_STS: PWRBTN
423 12:50:52.545410 TCO_STS: INTRD_DET
424 12:50:52.554273 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
425 12:50:52.554871 In relocation handler: CPU 0
426 12:50:52.561153 New SMBASE=0x7b000000 IEDBASE=0x7b400000
427 12:50:52.564836 Writing SMRR. base = 0x7b000006, mask=0xff800800
428 12:50:52.568098 Relocation complete.
429 12:50:52.574866 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
430 12:50:52.578074 In relocation handler: CPU 1
431 12:50:52.582459 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
432 12:50:52.586304 Writing SMRR. base = 0x7b000006, mask=0xff800800
433 12:50:52.589591 Relocation complete.
434 12:50:52.590389 Initializing CPU #0
435 12:50:52.592857 CPU: vendor Intel device 906c0
436 12:50:52.596103 CPU: family 06, model 9c, stepping 00
437 12:50:52.599233 Clearing out pending MCEs
438 12:50:52.602741 Setting up local APIC...
439 12:50:52.606140 apic_id: 0x00 done.
440 12:50:52.609523 Turbo is available but hidden
441 12:50:52.610096 Turbo is available and visible
442 12:50:52.616857 microcode: Update skipped, already up-to-date
443 12:50:52.617437 CPU #0 initialized
444 12:50:52.619390 Initializing CPU #1
445 12:50:52.622915 CPU: vendor Intel device 906c0
446 12:50:52.625782 CPU: family 06, model 9c, stepping 00
447 12:50:52.629628 Clearing out pending MCEs
448 12:50:52.632880 Setting up local APIC...
449 12:50:52.633315 apic_id: 0x02 done.
450 12:50:52.639428 microcode: Update skipped, already up-to-date
451 12:50:52.639996 CPU #1 initialized
452 12:50:52.646589 bsp_do_flight_plan done after 173 msecs.
453 12:50:52.649782 CPU: frequency set to 2800 MHz
454 12:50:52.650364 Enabling SMIs.
455 12:50:52.655961 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 86 / 287 ms
456 12:50:52.666241 Probing TPM: done!
457 12:50:52.672830 Connected to device vid:did:rid of 1ae0:0028:00
458 12:50:52.682918 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
459 12:50:52.686056 Initialized TPM device CR50 revision 0
460 12:50:52.689501 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
461 12:50:52.696395 Found a VBT of 7680 bytes after decompression
462 12:50:52.703110 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
463 12:50:52.737999 Detected 2 core, 2 thread CPU.
464 12:50:52.741549 Detected 2 core, 2 thread CPU.
465 12:50:53.103848 Display FSP Version Info HOB
466 12:50:53.107362 Reference Code - CPU = 8.7.22.30
467 12:50:53.110631 uCode Version = 24.0.0.1f
468 12:50:53.114129 TXT ACM version = ff.ff.ff.ffff
469 12:50:53.117247 Reference Code - ME = 8.7.22.30
470 12:50:53.120577 MEBx version = 0.0.0.0
471 12:50:53.124293 ME Firmware Version = Consumer SKU
472 12:50:53.127433 Reference Code - PCH = 8.7.22.30
473 12:50:53.130501 PCH-CRID Status = Disabled
474 12:50:53.133736 PCH-CRID Original Value = ff.ff.ff.ffff
475 12:50:53.137474 PCH-CRID New Value = ff.ff.ff.ffff
476 12:50:53.140497 OPROM - RST - RAID = ff.ff.ff.ffff
477 12:50:53.143341 PCH Hsio Version = 4.0.0.0
478 12:50:53.146979 Reference Code - SA - System Agent = 8.7.22.30
479 12:50:53.150179 Reference Code - MRC = 0.0.4.68
480 12:50:53.154015 SA - PCIe Version = 8.7.22.30
481 12:50:53.156657 SA-CRID Status = Disabled
482 12:50:53.160311 SA-CRID Original Value = 0.0.0.0
483 12:50:53.163918 SA-CRID New Value = 0.0.0.0
484 12:50:53.167671 OPROM - VBIOS = ff.ff.ff.ffff
485 12:50:53.171355 IO Manageability Engine FW Version = ff.ff.ff.ffff
486 12:50:53.174883 PHY Build Version = ff.ff.ff.ffff
487 12:50:53.178329 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
488 12:50:53.185593 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
489 12:50:53.186155 ITSS IRQ Polarities Before:
490 12:50:53.189278 IPC0: 0xffffffff
491 12:50:53.192245 IPC1: 0xffffffff
492 12:50:53.192829 IPC2: 0xffffffff
493 12:50:53.195820 IPC3: 0xffffffff
494 12:50:53.196286 ITSS IRQ Polarities After:
495 12:50:53.199349 IPC0: 0xffffffff
496 12:50:53.199815 IPC1: 0xffffffff
497 12:50:53.202832 IPC2: 0xffffffff
498 12:50:53.205286 IPC3: 0xffffffff
499 12:50:53.215814 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
500 12:50:53.222682 BS: BS_DEV_INIT_CHIPS run times (exec / console): 404 / 156 ms
501 12:50:53.225949 Enumerating buses...
502 12:50:53.229144 Show all devs... Before device enumeration.
503 12:50:53.232323 Root Device: enabled 1
504 12:50:53.235769 CPU_CLUSTER: 0: enabled 1
505 12:50:53.236340 DOMAIN: 0000: enabled 1
506 12:50:53.238727 PCI: 00:00.0: enabled 1
507 12:50:53.241955 PCI: 00:02.0: enabled 1
508 12:50:53.242525 PCI: 00:04.0: enabled 1
509 12:50:53.245327 PCI: 00:05.0: enabled 1
510 12:50:53.249387 PCI: 00:09.0: enabled 0
511 12:50:53.252309 PCI: 00:12.6: enabled 0
512 12:50:53.252886 PCI: 00:14.0: enabled 1
513 12:50:53.255663 PCI: 00:14.1: enabled 0
514 12:50:53.258677 PCI: 00:14.2: enabled 0
515 12:50:53.262562 PCI: 00:14.3: enabled 1
516 12:50:53.263174 PCI: 00:14.5: enabled 1
517 12:50:53.265752 PCI: 00:15.0: enabled 1
518 12:50:53.268902 PCI: 00:15.1: enabled 1
519 12:50:53.272286 PCI: 00:15.2: enabled 1
520 12:50:53.272858 PCI: 00:15.3: enabled 1
521 12:50:53.275553 PCI: 00:16.0: enabled 1
522 12:50:53.278893 PCI: 00:16.1: enabled 0
523 12:50:53.279474 PCI: 00:16.4: enabled 0
524 12:50:53.282613 PCI: 00:16.5: enabled 0
525 12:50:53.285800 PCI: 00:17.0: enabled 0
526 12:50:53.289121 PCI: 00:19.0: enabled 1
527 12:50:53.289702 PCI: 00:19.1: enabled 0
528 12:50:53.292432 PCI: 00:19.2: enabled 1
529 12:50:53.295360 PCI: 00:1a.0: enabled 1
530 12:50:53.298819 PCI: 00:1c.0: enabled 0
531 12:50:53.299291 PCI: 00:1c.1: enabled 0
532 12:50:53.301927 PCI: 00:1c.2: enabled 0
533 12:50:53.305278 PCI: 00:1c.3: enabled 0
534 12:50:53.305749 PCI: 00:1c.4: enabled 0
535 12:50:53.309010 PCI: 00:1c.5: enabled 0
536 12:50:53.312146 PCI: 00:1c.6: enabled 0
537 12:50:53.315429 PCI: 00:1c.7: enabled 1
538 12:50:53.315897 PCI: 00:1e.0: enabled 0
539 12:50:53.319117 PCI: 00:1e.1: enabled 0
540 12:50:53.322377 PCI: 00:1e.2: enabled 1
541 12:50:53.325648 PCI: 00:1e.3: enabled 0
542 12:50:53.326219 PCI: 00:1f.0: enabled 1
543 12:50:53.329065 PCI: 00:1f.1: enabled 1
544 12:50:53.332189 PCI: 00:1f.2: enabled 1
545 12:50:53.332778 PCI: 00:1f.3: enabled 1
546 12:50:53.335620 PCI: 00:1f.4: enabled 0
547 12:50:53.338564 PCI: 00:1f.5: enabled 1
548 12:50:53.342396 PCI: 00:1f.7: enabled 0
549 12:50:53.343020 GENERIC: 0.0: enabled 1
550 12:50:53.345505 GENERIC: 0.0: enabled 1
551 12:50:53.348503 USB0 port 0: enabled 1
552 12:50:53.352032 GENERIC: 0.0: enabled 1
553 12:50:53.352611 I2C: 00:2c: enabled 1
554 12:50:53.354895 I2C: 00:15: enabled 1
555 12:50:53.358861 GENERIC: 0.0: enabled 0
556 12:50:53.359429 I2C: 00:15: enabled 1
557 12:50:53.361790 I2C: 00:10: enabled 0
558 12:50:53.365366 I2C: 00:10: enabled 0
559 12:50:53.365838 I2C: 00:2c: enabled 1
560 12:50:53.368795 I2C: 00:40: enabled 1
561 12:50:53.372149 I2C: 00:10: enabled 1
562 12:50:53.372722 I2C: 00:39: enabled 1
563 12:50:53.375380 I2C: 00:36: enabled 1
564 12:50:53.378814 I2C: 00:10: enabled 0
565 12:50:53.379396 I2C: 00:0c: enabled 1
566 12:50:53.381448 I2C: 00:50: enabled 1
567 12:50:53.385095 I2C: 00:1a: enabled 1
568 12:50:53.385672 I2C: 00:1a: enabled 0
569 12:50:53.388081 I2C: 00:1a: enabled 0
570 12:50:53.391460 I2C: 00:28: enabled 1
571 12:50:53.391932 I2C: 00:29: enabled 1
572 12:50:53.395052 PCI: 00:00.0: enabled 1
573 12:50:53.398458 SPI: 00: enabled 1
574 12:50:53.401452 PNP: 0c09.0: enabled 1
575 12:50:53.401950 GENERIC: 0.0: enabled 0
576 12:50:53.404783 USB2 port 0: enabled 1
577 12:50:53.408502 USB2 port 1: enabled 1
578 12:50:53.409076 USB2 port 2: enabled 1
579 12:50:53.411854 USB2 port 3: enabled 1
580 12:50:53.415679 USB2 port 4: enabled 0
581 12:50:53.416254 USB2 port 5: enabled 1
582 12:50:53.418046 USB2 port 6: enabled 0
583 12:50:53.422223 USB2 port 7: enabled 1
584 12:50:53.424877 USB3 port 0: enabled 1
585 12:50:53.425454 USB3 port 1: enabled 1
586 12:50:53.428251 USB3 port 2: enabled 1
587 12:50:53.431709 USB3 port 3: enabled 1
588 12:50:53.432282 APIC: 00: enabled 1
589 12:50:53.434973 APIC: 02: enabled 1
590 12:50:53.438386 Compare with tree...
591 12:50:53.439000 Root Device: enabled 1
592 12:50:53.441387 CPU_CLUSTER: 0: enabled 1
593 12:50:53.444684 APIC: 00: enabled 1
594 12:50:53.445260 APIC: 02: enabled 1
595 12:50:53.447744 DOMAIN: 0000: enabled 1
596 12:50:53.451537 PCI: 00:00.0: enabled 1
597 12:50:53.454941 PCI: 00:02.0: enabled 1
598 12:50:53.458508 PCI: 00:04.0: enabled 1
599 12:50:53.459140 GENERIC: 0.0: enabled 1
600 12:50:53.461617 PCI: 00:05.0: enabled 1
601 12:50:53.464823 GENERIC: 0.0: enabled 1
602 12:50:53.467643 PCI: 00:09.0: enabled 0
603 12:50:53.471042 PCI: 00:12.6: enabled 0
604 12:50:53.471569 PCI: 00:14.0: enabled 1
605 12:50:53.474974 USB0 port 0: enabled 1
606 12:50:53.477948 USB2 port 0: enabled 1
607 12:50:53.481496 USB2 port 1: enabled 1
608 12:50:53.484173 USB2 port 2: enabled 1
609 12:50:53.484652 USB2 port 3: enabled 1
610 12:50:53.487566 USB2 port 4: enabled 0
611 12:50:53.491495 USB2 port 5: enabled 1
612 12:50:53.494551 USB2 port 6: enabled 0
613 12:50:53.497566 USB2 port 7: enabled 1
614 12:50:53.501109 USB3 port 0: enabled 1
615 12:50:53.501584 USB3 port 1: enabled 1
616 12:50:53.504372 USB3 port 2: enabled 1
617 12:50:53.507430 USB3 port 3: enabled 1
618 12:50:53.510684 PCI: 00:14.1: enabled 0
619 12:50:53.514870 PCI: 00:14.2: enabled 0
620 12:50:53.515536 PCI: 00:14.3: enabled 1
621 12:50:53.517475 GENERIC: 0.0: enabled 1
622 12:50:53.520946 PCI: 00:14.5: enabled 1
623 12:50:53.524925 PCI: 00:15.0: enabled 1
624 12:50:53.527539 I2C: 00:2c: enabled 1
625 12:50:53.528014 I2C: 00:15: enabled 1
626 12:50:53.531015 PCI: 00:15.1: enabled 1
627 12:50:53.534302 PCI: 00:15.2: enabled 1
628 12:50:53.537647 GENERIC: 0.0: enabled 0
629 12:50:53.538222 I2C: 00:15: enabled 1
630 12:50:53.541181 I2C: 00:10: enabled 0
631 12:50:53.544301 I2C: 00:10: enabled 0
632 12:50:53.547745 I2C: 00:2c: enabled 1
633 12:50:53.550748 I2C: 00:40: enabled 1
634 12:50:53.551369 I2C: 00:10: enabled 1
635 12:50:53.554643 I2C: 00:39: enabled 1
636 12:50:53.557160 PCI: 00:15.3: enabled 1
637 12:50:53.560935 I2C: 00:36: enabled 1
638 12:50:53.561505 I2C: 00:10: enabled 0
639 12:50:53.564291 I2C: 00:0c: enabled 1
640 12:50:53.567469 I2C: 00:50: enabled 1
641 12:50:53.570957 PCI: 00:16.0: enabled 1
642 12:50:53.574143 PCI: 00:16.1: enabled 0
643 12:50:53.574620 PCI: 00:16.4: enabled 0
644 12:50:53.577335 PCI: 00:16.5: enabled 0
645 12:50:53.580846 PCI: 00:17.0: enabled 0
646 12:50:53.584274 PCI: 00:19.0: enabled 1
647 12:50:53.584851 I2C: 00:1a: enabled 1
648 12:50:53.587402 I2C: 00:1a: enabled 0
649 12:50:53.590721 I2C: 00:1a: enabled 0
650 12:50:53.594400 I2C: 00:28: enabled 1
651 12:50:53.597271 I2C: 00:29: enabled 1
652 12:50:53.597846 PCI: 00:19.1: enabled 0
653 12:50:53.600580 PCI: 00:19.2: enabled 1
654 12:50:53.603479 PCI: 00:1a.0: enabled 1
655 12:50:53.607488 PCI: 00:1e.0: enabled 0
656 12:50:53.610510 PCI: 00:1e.1: enabled 0
657 12:50:53.611133 PCI: 00:1e.2: enabled 1
658 12:50:53.613777 SPI: 00: enabled 1
659 12:50:53.616833 PCI: 00:1e.3: enabled 0
660 12:50:53.620277 PCI: 00:1f.0: enabled 1
661 12:50:53.620752 PNP: 0c09.0: enabled 1
662 12:50:53.623496 PCI: 00:1f.1: enabled 1
663 12:50:53.626831 PCI: 00:1f.2: enabled 1
664 12:50:53.629764 PCI: 00:1f.3: enabled 1
665 12:50:53.633784 GENERIC: 0.0: enabled 0
666 12:50:53.634363 PCI: 00:1f.4: enabled 0
667 12:50:53.636663 PCI: 00:1f.5: enabled 1
668 12:50:53.640267 PCI: 00:1f.7: enabled 0
669 12:50:53.643463 Root Device scanning...
670 12:50:53.646949 scan_static_bus for Root Device
671 12:50:53.647527 CPU_CLUSTER: 0 enabled
672 12:50:53.650403 DOMAIN: 0000 enabled
673 12:50:53.653776 DOMAIN: 0000 scanning...
674 12:50:53.656420 PCI: pci_scan_bus for bus 00
675 12:50:53.659697 PCI: 00:00.0 [8086/0000] ops
676 12:50:53.663319 PCI: 00:00.0 [8086/4e22] enabled
677 12:50:53.667638 PCI: 00:02.0 [8086/0000] bus ops
678 12:50:53.670385 PCI: 00:02.0 [8086/4e55] enabled
679 12:50:53.673292 PCI: 00:04.0 [8086/0000] bus ops
680 12:50:53.676786 PCI: 00:04.0 [8086/4e03] enabled
681 12:50:53.680052 PCI: 00:05.0 [8086/0000] bus ops
682 12:50:53.683216 PCI: 00:05.0 [8086/4e19] enabled
683 12:50:53.686633 PCI: 00:08.0 [8086/4e11] enabled
684 12:50:53.689933 PCI: 00:14.0 [8086/0000] bus ops
685 12:50:53.693164 PCI: 00:14.0 [8086/4ded] enabled
686 12:50:53.696347 PCI: 00:14.2 [8086/4def] disabled
687 12:50:53.699707 PCI: 00:14.3 [8086/0000] bus ops
688 12:50:53.703092 PCI: 00:14.3 [8086/4df0] enabled
689 12:50:53.706815 PCI: 00:14.5 [8086/0000] ops
690 12:50:53.709882 PCI: 00:14.5 [8086/4df8] enabled
691 12:50:53.713325 PCI: 00:15.0 [8086/0000] bus ops
692 12:50:53.716682 PCI: 00:15.0 [8086/4de8] enabled
693 12:50:53.719627 PCI: 00:15.1 [8086/0000] bus ops
694 12:50:53.723203 PCI: 00:15.1 [8086/4de9] enabled
695 12:50:53.726571 PCI: 00:15.2 [8086/0000] bus ops
696 12:50:53.729929 PCI: 00:15.2 [8086/4dea] enabled
697 12:50:53.730505 PCI: 00:15.3 [8086/0000] bus ops
698 12:50:53.733594 PCI: 00:15.3 [8086/4deb] enabled
699 12:50:53.736193 PCI: 00:16.0 [8086/0000] ops
700 12:50:53.740167 PCI: 00:16.0 [8086/4de0] enabled
701 12:50:53.743338 PCI: 00:19.0 [8086/0000] bus ops
702 12:50:53.746579 PCI: 00:19.0 [8086/4dc5] enabled
703 12:50:53.750008 PCI: 00:19.2 [8086/0000] ops
704 12:50:53.753310 PCI: 00:19.2 [8086/4dc7] enabled
705 12:50:53.756462 PCI: 00:1a.0 [8086/0000] ops
706 12:50:53.759692 PCI: 00:1a.0 [8086/4dc4] enabled
707 12:50:53.762936 PCI: 00:1e.0 [8086/0000] ops
708 12:50:53.766704 PCI: 00:1e.0 [8086/4da8] disabled
709 12:50:53.769706 PCI: 00:1e.2 [8086/0000] bus ops
710 12:50:53.772975 PCI: 00:1e.2 [8086/4daa] enabled
711 12:50:53.776272 PCI: 00:1f.0 [8086/0000] bus ops
712 12:50:53.779647 PCI: 00:1f.0 [8086/4d87] enabled
713 12:50:53.786301 PCI: Static device PCI: 00:1f.1 not found, disabling it.
714 12:50:53.786927 RTC Init
715 12:50:53.789395 Set power on after power failure.
716 12:50:53.792843 Disabling Deep S3
717 12:50:53.793449 Disabling Deep S3
718 12:50:53.796386 Disabling Deep S4
719 12:50:53.796966 Disabling Deep S4
720 12:50:53.799535 Disabling Deep S5
721 12:50:53.803013 Disabling Deep S5
722 12:50:53.803485 PCI: 00:1f.2 [0000/0000] hidden
723 12:50:53.806436 PCI: 00:1f.3 [8086/0000] bus ops
724 12:50:53.809730 PCI: 00:1f.3 [8086/4dc8] enabled
725 12:50:53.812839 PCI: 00:1f.5 [8086/0000] bus ops
726 12:50:53.816125 PCI: 00:1f.5 [8086/4da4] enabled
727 12:50:53.819562 PCI: Leftover static devices:
728 12:50:53.823241 PCI: 00:12.6
729 12:50:53.823830 PCI: 00:09.0
730 12:50:53.826668 PCI: 00:14.1
731 12:50:53.827326 PCI: 00:16.1
732 12:50:53.827832 PCI: 00:16.4
733 12:50:53.829383 PCI: 00:16.5
734 12:50:53.829875 PCI: 00:17.0
735 12:50:53.832739 PCI: 00:19.1
736 12:50:53.833322 PCI: 00:1e.1
737 12:50:53.836206 PCI: 00:1e.3
738 12:50:53.836797 PCI: 00:1f.1
739 12:50:53.837301 PCI: 00:1f.4
740 12:50:53.839135 PCI: 00:1f.7
741 12:50:53.842351 PCI: Check your devicetree.cb.
742 12:50:53.842872 PCI: 00:02.0 scanning...
743 12:50:53.850321 scan_generic_bus for PCI: 00:02.0
744 12:50:53.850970 scan_generic_bus for PCI: 00:02.0 done
745 12:50:53.857947 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
746 12:50:53.858511 PCI: 00:04.0 scanning...
747 12:50:53.861481 scan_generic_bus for PCI: 00:04.0
748 12:50:53.864532 GENERIC: 0.0 enabled
749 12:50:53.871395 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
750 12:50:53.874434 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
751 12:50:53.878111 PCI: 00:05.0 scanning...
752 12:50:53.881608 scan_generic_bus for PCI: 00:05.0
753 12:50:53.884586 GENERIC: 0.0 enabled
754 12:50:53.890989 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
755 12:50:53.894232 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
756 12:50:53.898121 PCI: 00:14.0 scanning...
757 12:50:53.900849 scan_static_bus for PCI: 00:14.0
758 12:50:53.901328 USB0 port 0 enabled
759 12:50:53.904287 USB0 port 0 scanning...
760 12:50:53.908176 scan_static_bus for USB0 port 0
761 12:50:53.911402 USB2 port 0 enabled
762 12:50:53.912053 USB2 port 1 enabled
763 12:50:53.914790 USB2 port 2 enabled
764 12:50:53.917671 USB2 port 3 enabled
765 12:50:53.918143 USB2 port 4 disabled
766 12:50:53.920943 USB2 port 5 enabled
767 12:50:53.921415 USB2 port 6 disabled
768 12:50:53.924652 USB2 port 7 enabled
769 12:50:53.927671 USB3 port 0 enabled
770 12:50:53.928143 USB3 port 1 enabled
771 12:50:53.931166 USB3 port 2 enabled
772 12:50:53.934466 USB3 port 3 enabled
773 12:50:53.934982 USB2 port 0 scanning...
774 12:50:53.937557 scan_static_bus for USB2 port 0
775 12:50:53.941365 scan_static_bus for USB2 port 0 done
776 12:50:53.947819 scan_bus: bus USB2 port 0 finished in 6 msecs
777 12:50:53.951097 USB2 port 1 scanning...
778 12:50:53.954261 scan_static_bus for USB2 port 1
779 12:50:53.957868 scan_static_bus for USB2 port 1 done
780 12:50:53.961089 scan_bus: bus USB2 port 1 finished in 6 msecs
781 12:50:53.964542 USB2 port 2 scanning...
782 12:50:53.967859 scan_static_bus for USB2 port 2
783 12:50:53.971020 scan_static_bus for USB2 port 2 done
784 12:50:53.974901 scan_bus: bus USB2 port 2 finished in 6 msecs
785 12:50:53.977284 USB2 port 3 scanning...
786 12:50:53.981323 scan_static_bus for USB2 port 3
787 12:50:53.984696 scan_static_bus for USB2 port 3 done
788 12:50:53.990659 scan_bus: bus USB2 port 3 finished in 6 msecs
789 12:50:53.991175 USB2 port 5 scanning...
790 12:50:53.994345 scan_static_bus for USB2 port 5
791 12:50:53.997500 scan_static_bus for USB2 port 5 done
792 12:50:54.004057 scan_bus: bus USB2 port 5 finished in 6 msecs
793 12:50:54.007098 USB2 port 7 scanning...
794 12:50:54.011002 scan_static_bus for USB2 port 7
795 12:50:54.014276 scan_static_bus for USB2 port 7 done
796 12:50:54.017525 scan_bus: bus USB2 port 7 finished in 6 msecs
797 12:50:54.020749 USB3 port 0 scanning...
798 12:50:54.023869 scan_static_bus for USB3 port 0
799 12:50:54.027037 scan_static_bus for USB3 port 0 done
800 12:50:54.030613 scan_bus: bus USB3 port 0 finished in 6 msecs
801 12:50:54.033771 USB3 port 1 scanning...
802 12:50:54.037053 scan_static_bus for USB3 port 1
803 12:50:54.040566 scan_static_bus for USB3 port 1 done
804 12:50:54.047528 scan_bus: bus USB3 port 1 finished in 6 msecs
805 12:50:54.048104 USB3 port 2 scanning...
806 12:50:54.050719 scan_static_bus for USB3 port 2
807 12:50:54.053781 scan_static_bus for USB3 port 2 done
808 12:50:54.060289 scan_bus: bus USB3 port 2 finished in 6 msecs
809 12:50:54.063821 USB3 port 3 scanning...
810 12:50:54.067446 scan_static_bus for USB3 port 3
811 12:50:54.070178 scan_static_bus for USB3 port 3 done
812 12:50:54.073892 scan_bus: bus USB3 port 3 finished in 6 msecs
813 12:50:54.076893 scan_static_bus for USB0 port 0 done
814 12:50:54.083620 scan_bus: bus USB0 port 0 finished in 172 msecs
815 12:50:54.086988 scan_static_bus for PCI: 00:14.0 done
816 12:50:54.090452 scan_bus: bus PCI: 00:14.0 finished in 188 msecs
817 12:50:54.093617 PCI: 00:14.3 scanning...
818 12:50:54.096917 scan_static_bus for PCI: 00:14.3
819 12:50:54.100168 GENERIC: 0.0 enabled
820 12:50:54.103305 scan_static_bus for PCI: 00:14.3 done
821 12:50:54.106885 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
822 12:50:54.110377 PCI: 00:15.0 scanning...
823 12:50:54.113666 scan_static_bus for PCI: 00:15.0
824 12:50:54.116930 I2C: 00:2c enabled
825 12:50:54.117536 I2C: 00:15 enabled
826 12:50:54.120145 scan_static_bus for PCI: 00:15.0 done
827 12:50:54.126931 scan_bus: bus PCI: 00:15.0 finished in 10 msecs
828 12:50:54.129951 PCI: 00:15.1 scanning...
829 12:50:54.133357 scan_static_bus for PCI: 00:15.1
830 12:50:54.136405 scan_static_bus for PCI: 00:15.1 done
831 12:50:54.139498 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
832 12:50:54.143627 PCI: 00:15.2 scanning...
833 12:50:54.146812 scan_static_bus for PCI: 00:15.2
834 12:50:54.150232 GENERIC: 0.0 disabled
835 12:50:54.150861 I2C: 00:15 enabled
836 12:50:54.153148 I2C: 00:10 disabled
837 12:50:54.153724 I2C: 00:10 disabled
838 12:50:54.156184 I2C: 00:2c enabled
839 12:50:54.159999 I2C: 00:40 enabled
840 12:50:54.160575 I2C: 00:10 enabled
841 12:50:54.163727 I2C: 00:39 enabled
842 12:50:54.166429 scan_static_bus for PCI: 00:15.2 done
843 12:50:54.169953 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
844 12:50:54.173144 PCI: 00:15.3 scanning...
845 12:50:54.176999 scan_static_bus for PCI: 00:15.3
846 12:50:54.180187 I2C: 00:36 enabled
847 12:50:54.180768 I2C: 00:10 disabled
848 12:50:54.183183 I2C: 00:0c enabled
849 12:50:54.186879 I2C: 00:50 enabled
850 12:50:54.189746 scan_static_bus for PCI: 00:15.3 done
851 12:50:54.193077 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
852 12:50:54.196464 PCI: 00:19.0 scanning...
853 12:50:54.199934 scan_static_bus for PCI: 00:19.0
854 12:50:54.203158 I2C: 00:1a enabled
855 12:50:54.203634 I2C: 00:1a disabled
856 12:50:54.206210 I2C: 00:1a disabled
857 12:50:54.206684 I2C: 00:28 enabled
858 12:50:54.210042 I2C: 00:29 enabled
859 12:50:54.212979 scan_static_bus for PCI: 00:19.0 done
860 12:50:54.216920 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
861 12:50:54.220185 PCI: 00:1e.2 scanning...
862 12:50:54.222957 scan_generic_bus for PCI: 00:1e.2
863 12:50:54.226209 SPI: 00 enabled
864 12:50:54.233203 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
865 12:50:54.236262 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
866 12:50:54.239758 PCI: 00:1f.0 scanning...
867 12:50:54.243362 scan_static_bus for PCI: 00:1f.0
868 12:50:54.243935 PNP: 0c09.0 enabled
869 12:50:54.246404 PNP: 0c09.0 scanning...
870 12:50:54.250089 scan_static_bus for PNP: 0c09.0
871 12:50:54.253351 scan_static_bus for PNP: 0c09.0 done
872 12:50:54.259764 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
873 12:50:54.263374 scan_static_bus for PCI: 00:1f.0 done
874 12:50:54.266499 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
875 12:50:54.269980 PCI: 00:1f.3 scanning...
876 12:50:54.273298 scan_static_bus for PCI: 00:1f.3
877 12:50:54.276420 GENERIC: 0.0 disabled
878 12:50:54.279796 scan_static_bus for PCI: 00:1f.3 done
879 12:50:54.282937 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
880 12:50:54.286255 PCI: 00:1f.5 scanning...
881 12:50:54.289713 scan_generic_bus for PCI: 00:1f.5
882 12:50:54.292707 scan_generic_bus for PCI: 00:1f.5 done
883 12:50:54.299976 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
884 12:50:54.303205 scan_bus: bus DOMAIN: 0000 finished in 646 msecs
885 12:50:54.305924 scan_static_bus for Root Device done
886 12:50:54.313351 scan_bus: bus Root Device finished in 665 msecs
887 12:50:54.313924 done
888 12:50:54.319920 BS: BS_DEV_ENUMERATE run times (exec / console): 7 / 1084 ms
889 12:50:54.322804 Chrome EC: UHEPI supported
890 12:50:54.329360 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
891 12:50:54.332890 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
892 12:50:54.339346 SPI flash protection: WPSW=0 SRP0=0
893 12:50:54.342409 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
894 12:50:54.349154 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
895 12:50:54.352495 found VGA at PCI: 00:02.0
896 12:50:54.355435 Setting up VGA for PCI: 00:02.0
897 12:50:54.359183 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
898 12:50:54.365370 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
899 12:50:54.365841 Allocating resources...
900 12:50:54.369057 Reading resources...
901 12:50:54.372474 Root Device read_resources bus 0 link: 0
902 12:50:54.379601 CPU_CLUSTER: 0 read_resources bus 0 link: 0
903 12:50:54.382465 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
904 12:50:54.385699 DOMAIN: 0000 read_resources bus 0 link: 0
905 12:50:54.393253 PCI: 00:04.0 read_resources bus 1 link: 0
906 12:50:54.396557 PCI: 00:04.0 read_resources bus 1 link: 0 done
907 12:50:54.403240 PCI: 00:05.0 read_resources bus 2 link: 0
908 12:50:54.406391 PCI: 00:05.0 read_resources bus 2 link: 0 done
909 12:50:54.409672 PCI: 00:14.0 read_resources bus 0 link: 0
910 12:50:54.416544 USB0 port 0 read_resources bus 0 link: 0
911 12:50:54.422677 USB0 port 0 read_resources bus 0 link: 0 done
912 12:50:54.426470 PCI: 00:14.0 read_resources bus 0 link: 0 done
913 12:50:54.429968 PCI: 00:14.3 read_resources bus 0 link: 0
914 12:50:54.437698 PCI: 00:14.3 read_resources bus 0 link: 0 done
915 12:50:54.493600 PCI: 00:15.0 read_resources bus 0 link: 0
916 12:50:54.494350 PCI: 00:15.0 read_resources bus 0 link: 0 done
917 12:50:54.494808 PCI: 00:15.2 read_resources bus 0 link: 0
918 12:50:54.495542 PCI: 00:15.2 read_resources bus 0 link: 0 done
919 12:50:54.496015 PCI: 00:15.3 read_resources bus 0 link: 0
920 12:50:54.496382 PCI: 00:15.3 read_resources bus 0 link: 0 done
921 12:50:54.496717 PCI: 00:19.0 read_resources bus 0 link: 0
922 12:50:54.497037 PCI: 00:19.0 read_resources bus 0 link: 0 done
923 12:50:54.497359 PCI: 00:1e.2 read_resources bus 3 link: 0
924 12:50:54.497678 PCI: 00:1e.2 read_resources bus 3 link: 0 done
925 12:50:54.498016 PCI: 00:1f.0 read_resources bus 0 link: 0
926 12:50:54.508940 PCI: 00:1f.0 read_resources bus 0 link: 0 done
927 12:50:54.509461 PCI: 00:1f.3 read_resources bus 0 link: 0
928 12:50:54.510187 PCI: 00:1f.3 read_resources bus 0 link: 0 done
929 12:50:54.512347 DOMAIN: 0000 read_resources bus 0 link: 0 done
930 12:50:54.515451 Root Device read_resources bus 0 link: 0 done
931 12:50:54.515936 Done reading resources.
932 12:50:54.522468 Show resources in subtree (Root Device)...After reading.
933 12:50:54.529407 Root Device child on link 0 CPU_CLUSTER: 0
934 12:50:54.532557 CPU_CLUSTER: 0 child on link 0 APIC: 00
935 12:50:54.533025 APIC: 00
936 12:50:54.535789 APIC: 02
937 12:50:54.538967 DOMAIN: 0000 child on link 0 PCI: 00:00.0
938 12:50:54.549172 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
939 12:50:54.558627 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
940 12:50:54.559208 PCI: 00:00.0
941 12:50:54.568793 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
942 12:50:54.578438 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
943 12:50:54.588219 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
944 12:50:54.598396 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
945 12:50:54.605346 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
946 12:50:54.615154 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
947 12:50:54.625030 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
948 12:50:54.635331 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
949 12:50:54.642037 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
950 12:50:54.652260 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
951 12:50:54.661432 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
952 12:50:54.672172 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
953 12:50:54.681637 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
954 12:50:54.688381 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
955 12:50:54.698392 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
956 12:50:54.708003 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
957 12:50:54.717839 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
958 12:50:54.727706 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
959 12:50:54.738103 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
960 12:50:54.738582 PCI: 00:02.0
961 12:50:54.747742 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
962 12:50:54.757502 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
963 12:50:54.768122 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
964 12:50:54.771149 PCI: 00:04.0 child on link 0 GENERIC: 0.0
965 12:50:54.781329 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
966 12:50:54.784487 GENERIC: 0.0
967 12:50:54.787594 PCI: 00:05.0 child on link 0 GENERIC: 0.0
968 12:50:54.797552 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
969 12:50:54.800906 GENERIC: 0.0
970 12:50:54.801488 PCI: 00:08.0
971 12:50:54.810622 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
972 12:50:54.817492 PCI: 00:14.0 child on link 0 USB0 port 0
973 12:50:54.827291 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
974 12:50:54.830942 USB0 port 0 child on link 0 USB2 port 0
975 12:50:54.831416 USB2 port 0
976 12:50:54.834248 USB2 port 1
977 12:50:54.834718 USB2 port 2
978 12:50:54.837224 USB2 port 3
979 12:50:54.841094 USB2 port 4
980 12:50:54.841566 USB2 port 5
981 12:50:54.843728 USB2 port 6
982 12:50:54.844199 USB2 port 7
983 12:50:54.847149 USB3 port 0
984 12:50:54.847622 USB3 port 1
985 12:50:54.850645 USB3 port 2
986 12:50:54.851155 USB3 port 3
987 12:50:54.854413 PCI: 00:14.2
988 12:50:54.857409 PCI: 00:14.3 child on link 0 GENERIC: 0.0
989 12:50:54.867387 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
990 12:50:54.870829 GENERIC: 0.0
991 12:50:54.871400 PCI: 00:14.5
992 12:50:54.880491 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
993 12:50:54.884189 PCI: 00:15.0 child on link 0 I2C: 00:2c
994 12:50:54.894224 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
995 12:50:54.897718 I2C: 00:2c
996 12:50:54.898289 I2C: 00:15
997 12:50:54.900952 PCI: 00:15.1
998 12:50:54.910460 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
999 12:50:54.913669 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1000 12:50:54.923469 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1001 12:50:54.927096 GENERIC: 0.0
1002 12:50:54.927572 I2C: 00:15
1003 12:50:54.930103 I2C: 00:10
1004 12:50:54.930576 I2C: 00:10
1005 12:50:54.933481 I2C: 00:2c
1006 12:50:54.934046 I2C: 00:40
1007 12:50:54.934424 I2C: 00:10
1008 12:50:54.937116 I2C: 00:39
1009 12:50:54.940753 PCI: 00:15.3 child on link 0 I2C: 00:36
1010 12:50:54.950360 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1011 12:50:54.954145 I2C: 00:36
1012 12:50:54.954683 I2C: 00:10
1013 12:50:54.957070 I2C: 00:0c
1014 12:50:54.957540 I2C: 00:50
1015 12:50:54.960246 PCI: 00:16.0
1016 12:50:54.970448 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1017 12:50:54.973607 PCI: 00:19.0 child on link 0 I2C: 00:1a
1018 12:50:54.983746 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1019 12:50:54.984197 I2C: 00:1a
1020 12:50:54.986757 I2C: 00:1a
1021 12:50:54.987273 I2C: 00:1a
1022 12:50:54.990238 I2C: 00:28
1023 12:50:54.990858 I2C: 00:29
1024 12:50:54.993528 PCI: 00:19.2
1025 12:50:55.003738 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1026 12:50:55.013499 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1027 12:50:55.016511 PCI: 00:1a.0
1028 12:50:55.026671 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1029 12:50:55.027273 PCI: 00:1e.0
1030 12:50:55.030019 PCI: 00:1e.2 child on link 0 SPI: 00
1031 12:50:55.040062 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1032 12:50:55.043014 SPI: 00
1033 12:50:55.046082 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1034 12:50:55.056520 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1035 12:50:55.057080 PNP: 0c09.0
1036 12:50:55.066383 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1037 12:50:55.067130 PCI: 00:1f.2
1038 12:50:55.076346 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1039 12:50:55.086347 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1040 12:50:55.090293 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1041 12:50:55.100177 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1042 12:50:55.109988 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1043 12:50:55.113456 GENERIC: 0.0
1044 12:50:55.113916 PCI: 00:1f.5
1045 12:50:55.121244 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1046 12:50:55.131090 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1047 12:50:55.137609 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1048 12:50:55.144389 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1049 12:50:55.150816 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1050 12:50:55.157833 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1051 12:50:55.167485 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1052 12:50:55.167948 DOMAIN: 0000: Resource ranges:
1053 12:50:55.171104 * Base: 1000, Size: 800, Tag: 100
1054 12:50:55.177906 * Base: 1900, Size: e700, Tag: 100
1055 12:50:55.181354 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1056 12:50:55.188312 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1057 12:50:55.194283 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1058 12:50:55.205024 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1059 12:50:55.210902 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1060 12:50:55.217666 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1061 12:50:55.224142 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1062 12:50:55.234309 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1063 12:50:55.241333 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1064 12:50:55.247841 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1065 12:50:55.257913 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1066 12:50:55.264453 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1067 12:50:55.270860 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1068 12:50:55.280947 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1069 12:50:55.288119 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1070 12:50:55.294613 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1071 12:50:55.301002 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1072 12:50:55.311122 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1073 12:50:55.317840 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1074 12:50:55.324538 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1075 12:50:55.334057 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1076 12:50:55.340888 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1077 12:50:55.347283 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1078 12:50:55.358000 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1079 12:50:55.360389 DOMAIN: 0000: Resource ranges:
1080 12:50:55.363917 * Base: 7fc00000, Size: 40400000, Tag: 200
1081 12:50:55.367443 * Base: d0000000, Size: 2b000000, Tag: 200
1082 12:50:55.374020 * Base: fb001000, Size: 2fff000, Tag: 200
1083 12:50:55.377770 * Base: fe010000, Size: 22000, Tag: 200
1084 12:50:55.380673 * Base: fe033000, Size: a4d000, Tag: 200
1085 12:50:55.384247 * Base: fea88000, Size: 2f8000, Tag: 200
1086 12:50:55.390874 * Base: fed88000, Size: 8000, Tag: 200
1087 12:50:55.394097 * Base: fed93000, Size: d000, Tag: 200
1088 12:50:55.397149 * Base: feda2000, Size: 125e000, Tag: 200
1089 12:50:55.404763 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1090 12:50:55.410580 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1091 12:50:55.417033 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1092 12:50:55.423532 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1093 12:50:55.430150 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1094 12:50:55.437407 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1095 12:50:55.443553 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1096 12:50:55.450063 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1097 12:50:55.457053 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1098 12:50:55.463557 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1099 12:50:55.470339 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1100 12:50:55.476826 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1101 12:50:55.483332 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1102 12:50:55.490137 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1103 12:50:55.496803 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1104 12:50:55.503238 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1105 12:50:55.507040 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1106 12:50:55.513427 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1107 12:50:55.519898 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1108 12:50:55.526741 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1109 12:50:55.533315 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1110 12:50:55.543465 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1111 12:50:55.550038 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1112 12:50:55.553314 Root Device assign_resources, bus 0 link: 0
1113 12:50:55.559765 DOMAIN: 0000 assign_resources, bus 0 link: 0
1114 12:50:55.566129 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1115 12:50:55.576408 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1116 12:50:55.583511 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1117 12:50:55.590016 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1118 12:50:55.596311 PCI: 00:04.0 assign_resources, bus 1 link: 0
1119 12:50:55.599533 PCI: 00:04.0 assign_resources, bus 1 link: 0
1120 12:50:55.609804 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1121 12:50:55.612967 PCI: 00:05.0 assign_resources, bus 2 link: 0
1122 12:50:55.615622 PCI: 00:05.0 assign_resources, bus 2 link: 0
1123 12:50:55.625473 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1124 12:50:55.632331 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1125 12:50:55.638580 PCI: 00:14.0 assign_resources, bus 0 link: 0
1126 12:50:55.642098 PCI: 00:14.0 assign_resources, bus 0 link: 0
1127 12:50:55.652275 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1128 12:50:55.655408 PCI: 00:14.3 assign_resources, bus 0 link: 0
1129 12:50:55.659105 PCI: 00:14.3 assign_resources, bus 0 link: 0
1130 12:50:55.668863 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1131 12:50:55.675638 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1132 12:50:55.682310 PCI: 00:15.0 assign_resources, bus 0 link: 0
1133 12:50:55.685477 PCI: 00:15.0 assign_resources, bus 0 link: 0
1134 12:50:55.696176 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1135 12:50:55.703110 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1136 12:50:55.706006 PCI: 00:15.2 assign_resources, bus 0 link: 0
1137 12:50:55.709558 PCI: 00:15.2 assign_resources, bus 0 link: 0
1138 12:50:55.719588 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1139 12:50:55.722758 PCI: 00:15.3 assign_resources, bus 0 link: 0
1140 12:50:55.729249 PCI: 00:15.3 assign_resources, bus 0 link: 0
1141 12:50:55.735818 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1142 12:50:55.745702 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1143 12:50:55.749102 PCI: 00:19.0 assign_resources, bus 0 link: 0
1144 12:50:55.752588 PCI: 00:19.0 assign_resources, bus 0 link: 0
1145 12:50:55.762578 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1146 12:50:55.769179 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1147 12:50:55.779676 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1148 12:50:55.782318 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1149 12:50:55.785860 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1150 12:50:55.792104 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1151 12:50:55.795431 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1152 12:50:55.801858 LPC: Trying to open IO window from 800 size 1ff
1153 12:50:55.808807 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1154 12:50:55.819494 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1155 12:50:55.822671 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1156 12:50:55.825510 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1157 12:50:55.835517 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1158 12:50:55.838904 DOMAIN: 0000 assign_resources, bus 0 link: 0
1159 12:50:55.842505 Root Device assign_resources, bus 0 link: 0
1160 12:50:55.845621 Done setting resources.
1161 12:50:55.852299 Show resources in subtree (Root Device)...After assigning values.
1162 12:50:55.855960 Root Device child on link 0 CPU_CLUSTER: 0
1163 12:50:55.862042 CPU_CLUSTER: 0 child on link 0 APIC: 00
1164 12:50:55.862508 APIC: 00
1165 12:50:55.865655 APIC: 02
1166 12:50:55.868943 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1167 12:50:55.878547 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1168 12:50:55.889001 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1169 12:50:55.889568 PCI: 00:00.0
1170 12:50:55.898953 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1171 12:50:55.908802 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1172 12:50:55.918888 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1173 12:50:55.926083 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1174 12:50:55.935363 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1175 12:50:55.945338 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1176 12:50:55.955267 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1177 12:50:55.965398 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1178 12:50:55.971906 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1179 12:50:55.981554 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1180 12:50:55.991829 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1181 12:50:56.001387 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1182 12:50:56.011651 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1183 12:50:56.018067 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1184 12:50:56.027977 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1185 12:50:56.037840 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1186 12:50:56.048244 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1187 12:50:56.058153 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1188 12:50:56.067841 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1189 12:50:56.068394 PCI: 00:02.0
1190 12:50:56.077953 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1191 12:50:56.091760 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1192 12:50:56.097869 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1193 12:50:56.104509 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1194 12:50:56.114303 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1195 12:50:56.114900 GENERIC: 0.0
1196 12:50:56.121491 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1197 12:50:56.131210 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1198 12:50:56.131793 GENERIC: 0.0
1199 12:50:56.134651 PCI: 00:08.0
1200 12:50:56.144377 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1201 12:50:56.148164 PCI: 00:14.0 child on link 0 USB0 port 0
1202 12:50:56.158036 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1203 12:50:56.164549 USB0 port 0 child on link 0 USB2 port 0
1204 12:50:56.165104 USB2 port 0
1205 12:50:56.168116 USB2 port 1
1206 12:50:56.168577 USB2 port 2
1207 12:50:56.171292 USB2 port 3
1208 12:50:56.171756 USB2 port 4
1209 12:50:56.174673 USB2 port 5
1210 12:50:56.175274 USB2 port 6
1211 12:50:56.178028 USB2 port 7
1212 12:50:56.178583 USB3 port 0
1213 12:50:56.181390 USB3 port 1
1214 12:50:56.181956 USB3 port 2
1215 12:50:56.184556 USB3 port 3
1216 12:50:56.187539 PCI: 00:14.2
1217 12:50:56.191248 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1218 12:50:56.201278 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1219 12:50:56.201805 GENERIC: 0.0
1220 12:50:56.204089 PCI: 00:14.5
1221 12:50:56.214612 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1222 12:50:56.217459 PCI: 00:15.0 child on link 0 I2C: 00:2c
1223 12:50:56.227772 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1224 12:50:56.231199 I2C: 00:2c
1225 12:50:56.231689 I2C: 00:15
1226 12:50:56.234442 PCI: 00:15.1
1227 12:50:56.244800 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1228 12:50:56.247485 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1229 12:50:56.258307 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1230 12:50:56.260945 GENERIC: 0.0
1231 12:50:56.261422 I2C: 00:15
1232 12:50:56.264613 I2C: 00:10
1233 12:50:56.265089 I2C: 00:10
1234 12:50:56.267575 I2C: 00:2c
1235 12:50:56.268052 I2C: 00:40
1236 12:50:56.271394 I2C: 00:10
1237 12:50:56.271960 I2C: 00:39
1238 12:50:56.274317 PCI: 00:15.3 child on link 0 I2C: 00:36
1239 12:50:56.287627 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1240 12:50:56.288215 I2C: 00:36
1241 12:50:56.290999 I2C: 00:10
1242 12:50:56.291571 I2C: 00:0c
1243 12:50:56.292065 I2C: 00:50
1244 12:50:56.294327 PCI: 00:16.0
1245 12:50:56.304618 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1246 12:50:56.307306 PCI: 00:19.0 child on link 0 I2C: 00:1a
1247 12:50:56.317719 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1248 12:50:56.321111 I2C: 00:1a
1249 12:50:56.321628 I2C: 00:1a
1250 12:50:56.324877 I2C: 00:1a
1251 12:50:56.325434 I2C: 00:28
1252 12:50:56.327448 I2C: 00:29
1253 12:50:56.327946 PCI: 00:19.2
1254 12:50:56.341567 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1255 12:50:56.351497 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1256 12:50:56.352058 PCI: 00:1a.0
1257 12:50:56.360672 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1258 12:50:56.364205 PCI: 00:1e.0
1259 12:50:56.367765 PCI: 00:1e.2 child on link 0 SPI: 00
1260 12:50:56.377697 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1261 12:50:56.381299 SPI: 00
1262 12:50:56.384150 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1263 12:50:56.390703 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1264 12:50:56.393973 PNP: 0c09.0
1265 12:50:56.403689 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1266 12:50:56.404386 PCI: 00:1f.2
1267 12:50:56.413818 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1268 12:50:56.423558 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1269 12:50:56.426698 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1270 12:50:56.436999 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1271 12:50:56.447130 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1272 12:50:56.450476 GENERIC: 0.0
1273 12:50:56.451075 PCI: 00:1f.5
1274 12:50:56.463446 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1275 12:50:56.463977 Done allocating resources.
1276 12:50:56.470170 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2096 ms
1277 12:50:56.473001 Enabling resources...
1278 12:50:56.476647 PCI: 00:00.0 subsystem <- 8086/4e22
1279 12:50:56.479630 PCI: 00:00.0 cmd <- 06
1280 12:50:56.483043 PCI: 00:02.0 subsystem <- 8086/4e55
1281 12:50:56.486622 PCI: 00:02.0 cmd <- 03
1282 12:50:56.489741 PCI: 00:04.0 subsystem <- 8086/4e03
1283 12:50:56.493576 PCI: 00:04.0 cmd <- 02
1284 12:50:56.496492 PCI: 00:05.0 bridge ctrl <- 0003
1285 12:50:56.499717 PCI: 00:05.0 subsystem <- 8086/4e19
1286 12:50:56.500276 PCI: 00:05.0 cmd <- 02
1287 12:50:56.503498 PCI: 00:08.0 cmd <- 06
1288 12:50:56.506683 PCI: 00:14.0 subsystem <- 8086/4ded
1289 12:50:56.509577 PCI: 00:14.0 cmd <- 02
1290 12:50:56.512828 PCI: 00:14.3 subsystem <- 8086/4df0
1291 12:50:56.516343 PCI: 00:14.3 cmd <- 02
1292 12:50:56.519962 PCI: 00:14.5 subsystem <- 8086/4df8
1293 12:50:56.523074 PCI: 00:14.5 cmd <- 06
1294 12:50:56.526213 PCI: 00:15.0 subsystem <- 8086/4de8
1295 12:50:56.529298 PCI: 00:15.0 cmd <- 02
1296 12:50:56.532957 PCI: 00:15.1 subsystem <- 8086/4de9
1297 12:50:56.533530 PCI: 00:15.1 cmd <- 02
1298 12:50:56.539498 PCI: 00:15.2 subsystem <- 8086/4dea
1299 12:50:56.539966 PCI: 00:15.2 cmd <- 02
1300 12:50:56.543490 PCI: 00:15.3 subsystem <- 8086/4deb
1301 12:50:56.546950 PCI: 00:15.3 cmd <- 02
1302 12:50:56.550228 PCI: 00:16.0 subsystem <- 8086/4de0
1303 12:50:56.553394 PCI: 00:16.0 cmd <- 02
1304 12:50:56.557054 PCI: 00:19.0 subsystem <- 8086/4dc5
1305 12:50:56.559364 PCI: 00:19.0 cmd <- 02
1306 12:50:56.562610 PCI: 00:19.2 subsystem <- 8086/4dc7
1307 12:50:56.566244 PCI: 00:19.2 cmd <- 06
1308 12:50:56.569692 PCI: 00:1a.0 subsystem <- 8086/4dc4
1309 12:50:56.570269 PCI: 00:1a.0 cmd <- 06
1310 12:50:56.577195 PCI: 00:1e.2 subsystem <- 8086/4daa
1311 12:50:56.577745 PCI: 00:1e.2 cmd <- 06
1312 12:50:56.579592 PCI: 00:1f.0 subsystem <- 8086/4d87
1313 12:50:56.582886 PCI: 00:1f.0 cmd <- 407
1314 12:50:56.586564 PCI: 00:1f.3 subsystem <- 8086/4dc8
1315 12:50:56.589420 PCI: 00:1f.3 cmd <- 02
1316 12:50:56.593163 PCI: 00:1f.5 subsystem <- 8086/4da4
1317 12:50:56.596352 PCI: 00:1f.5 cmd <- 406
1318 12:50:56.600514 done.
1319 12:50:56.603762 BS: BS_DEV_ENABLE run times (exec / console): 7 / 121 ms
1320 12:50:56.607037 Initializing devices...
1321 12:50:56.609787 Root Device init
1322 12:50:56.610296 mainboard: EC init
1323 12:50:56.616478 Chrome EC: Set SMI mask to 0x0000000000000000
1324 12:50:56.619856 Chrome EC: clear events_b mask to 0x0000000000000000
1325 12:50:56.626475 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1326 12:50:56.633049 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1327 12:50:56.639629 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1328 12:50:56.643120 Chrome EC: Set WAKE mask to 0x0000000000000000
1329 12:50:56.646674 Root Device init finished in 35 msecs
1330 12:50:56.650476 PCI: 00:00.0 init
1331 12:50:56.654007 CPU TDP = 6 Watts
1332 12:50:56.654471 CPU PL1 = 7 Watts
1333 12:50:56.657520 CPU PL2 = 12 Watts
1334 12:50:56.660669 PCI: 00:00.0 init finished in 6 msecs
1335 12:50:56.664210 PCI: 00:02.0 init
1336 12:50:56.667290 GMA: Found VBT in CBFS
1337 12:50:56.667857 GMA: Found valid VBT in CBFS
1338 12:50:56.673923 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1339 12:50:56.680480 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1340 12:50:56.687238 PCI: 00:02.0 init finished in 18 msecs
1341 12:50:56.687777 PCI: 00:08.0 init
1342 12:50:56.693435 PCI: 00:08.0 init finished in 0 msecs
1343 12:50:56.693904 PCI: 00:14.0 init
1344 12:50:56.700392 XHCI: Updated LFPS sampling OFF time to 9 ms
1345 12:50:56.703624 PCI: 00:14.0 init finished in 4 msecs
1346 12:50:56.707090 PCI: 00:15.0 init
1347 12:50:56.707556 I2C bus 0 version 0x3230302a
1348 12:50:56.713541 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1349 12:50:56.716922 PCI: 00:15.0 init finished in 6 msecs
1350 12:50:56.717463 PCI: 00:15.1 init
1351 12:50:56.720132 I2C bus 1 version 0x3230302a
1352 12:50:56.723098 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1353 12:50:56.726812 PCI: 00:15.1 init finished in 6 msecs
1354 12:50:56.730345 PCI: 00:15.2 init
1355 12:50:56.733453 I2C bus 2 version 0x3230302a
1356 12:50:56.737118 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1357 12:50:56.740589 PCI: 00:15.2 init finished in 6 msecs
1358 12:50:56.743492 PCI: 00:15.3 init
1359 12:50:56.746617 I2C bus 3 version 0x3230302a
1360 12:50:56.750054 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1361 12:50:56.753632 PCI: 00:15.3 init finished in 6 msecs
1362 12:50:56.757218 PCI: 00:16.0 init
1363 12:50:56.759939 PCI: 00:16.0 init finished in 0 msecs
1364 12:50:56.760403 PCI: 00:19.0 init
1365 12:50:56.763584 I2C bus 4 version 0x3230302a
1366 12:50:56.766798 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1367 12:50:56.773894 PCI: 00:19.0 init finished in 6 msecs
1368 12:50:56.774435 PCI: 00:1a.0 init
1369 12:50:56.776514 PCI: 00:1a.0 init finished in 0 msecs
1370 12:50:56.780654 PCI: 00:1f.0 init
1371 12:50:56.783988 IOAPIC: Initializing IOAPIC at 0xfec00000
1372 12:50:56.790599 IOAPIC: Bootstrap Processor Local APIC = 0x00
1373 12:50:56.791173 IOAPIC: ID = 0x02
1374 12:50:56.794222 IOAPIC: Dumping registers
1375 12:50:56.796933 reg 0x0000: 0x02000000
1376 12:50:56.800791 reg 0x0001: 0x00770020
1377 12:50:56.801331 reg 0x0002: 0x00000000
1378 12:50:56.807255 PCI: 00:1f.0 init finished in 21 msecs
1379 12:50:56.807818 PCI: 00:1f.2 init
1380 12:50:56.810464 Disabling ACPI via APMC.
1381 12:50:56.813766 APMC done.
1382 12:50:56.816651 PCI: 00:1f.2 init finished in 5 msecs
1383 12:50:56.828247 PNP: 0c09.0 init
1384 12:50:56.831686 Google Chrome EC uptime: 6.503 seconds
1385 12:50:56.838382 Google Chrome AP resets since EC boot: 0
1386 12:50:56.841187 Google Chrome most recent AP reset causes:
1387 12:50:56.847995 Google Chrome EC reset flags at last EC boot: reset-pin
1388 12:50:56.851133 PNP: 0c09.0 init finished in 18 msecs
1389 12:50:56.851598 Devices initialized
1390 12:50:56.854839 Show all devs... After init.
1391 12:50:56.858145 Root Device: enabled 1
1392 12:50:56.861083 CPU_CLUSTER: 0: enabled 1
1393 12:50:56.864644 DOMAIN: 0000: enabled 1
1394 12:50:56.865106 PCI: 00:00.0: enabled 1
1395 12:50:56.868008 PCI: 00:02.0: enabled 1
1396 12:50:56.871245 PCI: 00:04.0: enabled 1
1397 12:50:56.871708 PCI: 00:05.0: enabled 1
1398 12:50:56.874817 PCI: 00:09.0: enabled 0
1399 12:50:56.877642 PCI: 00:12.6: enabled 0
1400 12:50:56.881303 PCI: 00:14.0: enabled 1
1401 12:50:56.881765 PCI: 00:14.1: enabled 0
1402 12:50:56.884651 PCI: 00:14.2: enabled 0
1403 12:50:56.888070 PCI: 00:14.3: enabled 1
1404 12:50:56.891351 PCI: 00:14.5: enabled 1
1405 12:50:56.891881 PCI: 00:15.0: enabled 1
1406 12:50:56.894814 PCI: 00:15.1: enabled 1
1407 12:50:56.897892 PCI: 00:15.2: enabled 1
1408 12:50:56.898355 PCI: 00:15.3: enabled 1
1409 12:50:56.901378 PCI: 00:16.0: enabled 1
1410 12:50:56.904523 PCI: 00:16.1: enabled 0
1411 12:50:56.907978 PCI: 00:16.4: enabled 0
1412 12:50:56.908439 PCI: 00:16.5: enabled 0
1413 12:50:56.911014 PCI: 00:17.0: enabled 0
1414 12:50:56.914673 PCI: 00:19.0: enabled 1
1415 12:50:56.917853 PCI: 00:19.1: enabled 0
1416 12:50:56.918313 PCI: 00:19.2: enabled 1
1417 12:50:56.920970 PCI: 00:1a.0: enabled 1
1418 12:50:56.925036 PCI: 00:1c.0: enabled 0
1419 12:50:56.927591 PCI: 00:1c.1: enabled 0
1420 12:50:56.928054 PCI: 00:1c.2: enabled 0
1421 12:50:56.931446 PCI: 00:1c.3: enabled 0
1422 12:50:56.934892 PCI: 00:1c.4: enabled 0
1423 12:50:56.935432 PCI: 00:1c.5: enabled 0
1424 12:50:56.938106 PCI: 00:1c.6: enabled 0
1425 12:50:56.941565 PCI: 00:1c.7: enabled 1
1426 12:50:56.944884 PCI: 00:1e.0: enabled 0
1427 12:50:56.945428 PCI: 00:1e.1: enabled 0
1428 12:50:56.947484 PCI: 00:1e.2: enabled 1
1429 12:50:56.950831 PCI: 00:1e.3: enabled 0
1430 12:50:56.954366 PCI: 00:1f.0: enabled 1
1431 12:50:56.954987 PCI: 00:1f.1: enabled 0
1432 12:50:56.958063 PCI: 00:1f.2: enabled 1
1433 12:50:56.961362 PCI: 00:1f.3: enabled 1
1434 12:50:56.964211 PCI: 00:1f.4: enabled 0
1435 12:50:56.964670 PCI: 00:1f.5: enabled 1
1436 12:50:56.967566 PCI: 00:1f.7: enabled 0
1437 12:50:56.971217 GENERIC: 0.0: enabled 1
1438 12:50:56.971783 GENERIC: 0.0: enabled 1
1439 12:50:56.974273 USB0 port 0: enabled 1
1440 12:50:56.977552 GENERIC: 0.0: enabled 1
1441 12:50:56.981065 I2C: 00:2c: enabled 1
1442 12:50:56.981755 I2C: 00:15: enabled 1
1443 12:50:56.984697 GENERIC: 0.0: enabled 0
1444 12:50:56.987536 I2C: 00:15: enabled 1
1445 12:50:56.988003 I2C: 00:10: enabled 0
1446 12:50:56.990620 I2C: 00:10: enabled 0
1447 12:50:56.994140 I2C: 00:2c: enabled 1
1448 12:50:56.994605 I2C: 00:40: enabled 1
1449 12:50:56.997700 I2C: 00:10: enabled 1
1450 12:50:57.001040 I2C: 00:39: enabled 1
1451 12:50:57.001630 I2C: 00:36: enabled 1
1452 12:50:57.004362 I2C: 00:10: enabled 0
1453 12:50:57.007187 I2C: 00:0c: enabled 1
1454 12:50:57.007653 I2C: 00:50: enabled 1
1455 12:50:57.010714 I2C: 00:1a: enabled 1
1456 12:50:57.014109 I2C: 00:1a: enabled 0
1457 12:50:57.014759 I2C: 00:1a: enabled 0
1458 12:50:57.017446 I2C: 00:28: enabled 1
1459 12:50:57.020589 I2C: 00:29: enabled 1
1460 12:50:57.021052 PCI: 00:00.0: enabled 1
1461 12:50:57.024180 SPI: 00: enabled 1
1462 12:50:57.027139 PNP: 0c09.0: enabled 1
1463 12:50:57.030413 GENERIC: 0.0: enabled 0
1464 12:50:57.030909 USB2 port 0: enabled 1
1465 12:50:57.033633 USB2 port 1: enabled 1
1466 12:50:57.037206 USB2 port 2: enabled 1
1467 12:50:57.037625 USB2 port 3: enabled 1
1468 12:50:57.040558 USB2 port 4: enabled 0
1469 12:50:57.043827 USB2 port 5: enabled 1
1470 12:50:57.044264 USB2 port 6: enabled 0
1471 12:50:57.046928 USB2 port 7: enabled 1
1472 12:50:57.050422 USB3 port 0: enabled 1
1473 12:50:57.053584 USB3 port 1: enabled 1
1474 12:50:57.054080 USB3 port 2: enabled 1
1475 12:50:57.056893 USB3 port 3: enabled 1
1476 12:50:57.060507 APIC: 00: enabled 1
1477 12:50:57.060937 APIC: 02: enabled 1
1478 12:50:57.063719 PCI: 00:08.0: enabled 1
1479 12:50:57.070695 BS: BS_DEV_INIT run times (exec / console): 22 / 437 ms
1480 12:50:57.073730 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1481 12:50:57.077220 ELOG: NV offset 0xbfa000 size 0x1000
1482 12:50:57.084177 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1483 12:50:57.091018 ELOG: Event(17) added with size 13 at 2023-09-23 12:50:56 UTC
1484 12:50:57.097607 ELOG: Event(92) added with size 9 at 2023-09-23 12:50:56 UTC
1485 12:50:57.104884 ELOG: Event(93) added with size 9 at 2023-09-23 12:50:56 UTC
1486 12:50:57.110727 ELOG: Event(9E) added with size 10 at 2023-09-23 12:50:56 UTC
1487 12:50:57.118129 ELOG: Event(9F) added with size 14 at 2023-09-23 12:50:56 UTC
1488 12:50:57.121275 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1489 12:50:57.128250 ELOG: Event(A1) added with size 10 at 2023-09-23 12:50:56 UTC
1490 12:50:57.138014 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1491 12:50:57.141317 ELOG: Event(A0) added with size 9 at 2023-09-23 12:50:56 UTC
1492 12:50:57.147421 elog_add_boot_reason: Logged dev mode boot
1493 12:50:57.154321 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1494 12:50:57.154841 Finalize devices...
1495 12:50:57.157847 Devices finalized
1496 12:50:57.161073 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1497 12:50:57.167380 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1498 12:50:57.173987 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1499 12:50:57.177293 ME: HFSTS1 : 0x80030045
1500 12:50:57.180709 ME: HFSTS2 : 0x30280136
1501 12:50:57.184001 ME: HFSTS3 : 0x00000050
1502 12:50:57.191274 ME: HFSTS4 : 0x00004000
1503 12:50:57.193878 ME: HFSTS5 : 0x00000000
1504 12:50:57.197504 ME: HFSTS6 : 0x40400006
1505 12:50:57.201032 ME: Manufacturing Mode : NO
1506 12:50:57.204027 ME: FW Partition Table : OK
1507 12:50:57.207326 ME: Bringup Loader Failure : NO
1508 12:50:57.210454 ME: Firmware Init Complete : NO
1509 12:50:57.214304 ME: Boot Options Present : NO
1510 12:50:57.217099 ME: Update In Progress : NO
1511 12:50:57.221046 ME: D0i3 Support : YES
1512 12:50:57.224422 ME: Low Power State Enabled : NO
1513 12:50:57.227719 ME: CPU Replaced : YES
1514 12:50:57.230529 ME: CPU Replacement Valid : YES
1515 12:50:57.233966 ME: Current Working State : 5
1516 12:50:57.237328 ME: Current Operation State : 1
1517 12:50:57.240581 ME: Current Operation Mode : 3
1518 12:50:57.243678 ME: Error Code : 0
1519 12:50:57.247115 ME: CPU Debug Disabled : YES
1520 12:50:57.250555 ME: TXT Support : NO
1521 12:50:57.257153 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1522 12:50:57.260489 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1523 12:50:57.267735 ACPI: Writing ACPI tables at 76b27000.
1524 12:50:57.268157 ACPI: * FACS
1525 12:50:57.271286 ACPI: * DSDT
1526 12:50:57.274311 Ramoops buffer: 0x100000@0x76a26000.
1527 12:50:57.277652 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1528 12:50:57.284527 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1529 12:50:57.287457 Google Chrome EC: version:
1530 12:50:57.290564 ro: magolor_1.1.9999-103b6f9
1531 12:50:57.291040 rw: magolor_1.1.9999-103b6f9
1532 12:50:57.293880 running image: 1
1533 12:50:57.300890 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1534 12:50:57.304453 ACPI: * FADT
1535 12:50:57.304977 SCI is IRQ9
1536 12:50:57.307679 ACPI: added table 1/32, length now 40
1537 12:50:57.311271 ACPI: * SSDT
1538 12:50:57.314221 Found 1 CPU(s) with 2 core(s) each.
1539 12:50:57.317337 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1540 12:50:57.324223 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1541 12:50:57.327833 Could not locate 'wifi_sar' in VPD.
1542 12:50:57.331234 Checking CBFS for default SAR values
1543 12:50:57.337423 wifi_sar_defaults.hex has bad len in CBFS
1544 12:50:57.341019 failed from getting SAR limits!
1545 12:50:57.344832 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1546 12:50:57.347251 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1547 12:50:57.354249 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1548 12:50:57.357520 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1549 12:50:57.364127 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1550 12:50:57.367502 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1551 12:50:57.374184 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1552 12:50:57.380831 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1553 12:50:57.384113 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1554 12:50:57.390742 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1555 12:50:57.397006 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1556 12:50:57.404165 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1557 12:50:57.407310 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1558 12:50:57.414238 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1559 12:50:57.417039 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1560 12:50:57.425107 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1561 12:50:57.428694 PS2K: Passing 101 keymaps to kernel
1562 12:50:57.435265 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1563 12:50:57.442272 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1564 12:50:57.445385 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1565 12:50:57.452119 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1566 12:50:57.455376 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1567 12:50:57.461911 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1568 12:50:57.468649 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1569 12:50:57.471702 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1570 12:50:57.478390 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1571 12:50:57.485133 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1572 12:50:57.488656 ACPI: added table 2/32, length now 44
1573 12:50:57.491857 ACPI: * MCFG
1574 12:50:57.495192 ACPI: added table 3/32, length now 48
1575 12:50:57.495777 ACPI: * TPM2
1576 12:50:57.498217 TPM2 log created at 0x76a16000
1577 12:50:57.501968 ACPI: added table 4/32, length now 52
1578 12:50:57.504909 ACPI: * MADT
1579 12:50:57.505688 SCI is IRQ9
1580 12:50:57.508345 ACPI: added table 5/32, length now 56
1581 12:50:57.511495 current = 76b2d580
1582 12:50:57.514874 ACPI: * DMAR
1583 12:50:57.518306 ACPI: added table 6/32, length now 60
1584 12:50:57.521507 ACPI: added table 7/32, length now 64
1585 12:50:57.522015 ACPI: * HPET
1586 12:50:57.525187 ACPI: added table 8/32, length now 68
1587 12:50:57.528645 ACPI: done.
1588 12:50:57.531628 ACPI tables: 26304 bytes.
1589 12:50:57.534890 smbios_write_tables: 76a15000
1590 12:50:57.538229 EC returned error result code 3
1591 12:50:57.541511 Couldn't obtain OEM name from CBI
1592 12:50:57.544645 Create SMBIOS type 16
1593 12:50:57.545120 Create SMBIOS type 17
1594 12:50:57.548232 GENERIC: 0.0 (WIFI Device)
1595 12:50:57.551712 SMBIOS tables: 913 bytes.
1596 12:50:57.554681 Writing table forward entry at 0x00000500
1597 12:50:57.561904 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1598 12:50:57.564937 Writing coreboot table at 0x76b4b000
1599 12:50:57.571562 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1600 12:50:57.575354 1. 0000000000001000-000000000009ffff: RAM
1601 12:50:57.581871 2. 00000000000a0000-00000000000fffff: RESERVED
1602 12:50:57.585048 3. 0000000000100000-0000000076a14fff: RAM
1603 12:50:57.591451 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1604 12:50:57.595003 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1605 12:50:57.601204 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1606 12:50:57.604599 7. 0000000077000000-000000007fbfffff: RESERVED
1607 12:50:57.611748 8. 00000000c0000000-00000000cfffffff: RESERVED
1608 12:50:57.614531 9. 00000000fb000000-00000000fb000fff: RESERVED
1609 12:50:57.621324 10. 00000000fe000000-00000000fe00ffff: RESERVED
1610 12:50:57.624517 11. 00000000fea80000-00000000fea87fff: RESERVED
1611 12:50:57.631088 12. 00000000fed80000-00000000fed87fff: RESERVED
1612 12:50:57.634442 13. 00000000fed90000-00000000fed92fff: RESERVED
1613 12:50:57.638100 14. 00000000feda0000-00000000feda1fff: RESERVED
1614 12:50:57.644802 15. 0000000100000000-00000001803fffff: RAM
1615 12:50:57.648197 Passing 4 GPIOs to payload:
1616 12:50:57.651241 NAME | PORT | POLARITY | VALUE
1617 12:50:57.657924 lid | undefined | high | high
1618 12:50:57.661272 power | undefined | high | low
1619 12:50:57.668064 oprom | undefined | high | low
1620 12:50:57.670963 EC in RW | 0x000000b9 | high | low
1621 12:50:57.677882 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum b3e4
1622 12:50:57.680695 coreboot table: 1504 bytes.
1623 12:50:57.684604 IMD ROOT 0. 0x76fff000 0x00001000
1624 12:50:57.687895 IMD SMALL 1. 0x76ffe000 0x00001000
1625 12:50:57.694341 FSP MEMORY 2. 0x76c4e000 0x003b0000
1626 12:50:57.697743 CONSOLE 3. 0x76c2e000 0x00020000
1627 12:50:57.701333 FMAP 4. 0x76c2d000 0x00000578
1628 12:50:57.704238 TIME STAMP 5. 0x76c2c000 0x00000910
1629 12:50:57.707500 VBOOT WORK 6. 0x76c18000 0x00014000
1630 12:50:57.710935 ROMSTG STCK 7. 0x76c17000 0x00001000
1631 12:50:57.714276 AFTER CAR 8. 0x76c0d000 0x0000a000
1632 12:50:57.717617 RAMSTAGE 9. 0x76ba7000 0x00066000
1633 12:50:57.724003 REFCODE 10. 0x76b67000 0x00040000
1634 12:50:57.727211 SMM BACKUP 11. 0x76b57000 0x00010000
1635 12:50:57.730821 4f444749 12. 0x76b55000 0x00002000
1636 12:50:57.734359 EXT VBT13. 0x76b53000 0x00001c43
1637 12:50:57.737436 COREBOOT 14. 0x76b4b000 0x00008000
1638 12:50:57.740846 ACPI 15. 0x76b27000 0x00024000
1639 12:50:57.744189 ACPI GNVS 16. 0x76b26000 0x00001000
1640 12:50:57.747619 RAMOOPS 17. 0x76a26000 0x00100000
1641 12:50:57.751052 TPM2 TCGLOG18. 0x76a16000 0x00010000
1642 12:50:57.754241 SMBIOS 19. 0x76a15000 0x00000800
1643 12:50:57.757845 IMD small region:
1644 12:50:57.760950 IMD ROOT 0. 0x76ffec00 0x00000400
1645 12:50:57.764125 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1646 12:50:57.770891 VPD 2. 0x76ffeb60 0x0000006c
1647 12:50:57.774524 POWER STATE 3. 0x76ffeb20 0x00000040
1648 12:50:57.777410 ROMSTAGE 4. 0x76ffeb00 0x00000004
1649 12:50:57.780879 MEM INFO 5. 0x76ffe920 0x000001e0
1650 12:50:57.787221 BS: BS_WRITE_TABLES run times (exec / console): 7 / 517 ms
1651 12:50:57.791105 MTRR: Physical address space:
1652 12:50:57.797516 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1653 12:50:57.800870 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1654 12:50:57.807293 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1655 12:50:57.814082 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1656 12:50:57.820827 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1657 12:50:57.827093 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1658 12:50:57.834088 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1659 12:50:57.837377 MTRR: Fixed MSR 0x250 0x0606060606060606
1660 12:50:57.840505 MTRR: Fixed MSR 0x258 0x0606060606060606
1661 12:50:57.844111 MTRR: Fixed MSR 0x259 0x0000000000000000
1662 12:50:57.850213 MTRR: Fixed MSR 0x268 0x0606060606060606
1663 12:50:57.853596 MTRR: Fixed MSR 0x269 0x0606060606060606
1664 12:50:57.857258 MTRR: Fixed MSR 0x26a 0x0606060606060606
1665 12:50:57.860891 MTRR: Fixed MSR 0x26b 0x0606060606060606
1666 12:50:57.867350 MTRR: Fixed MSR 0x26c 0x0606060606060606
1667 12:50:57.870437 MTRR: Fixed MSR 0x26d 0x0606060606060606
1668 12:50:57.873866 MTRR: Fixed MSR 0x26e 0x0606060606060606
1669 12:50:57.877024 MTRR: Fixed MSR 0x26f 0x0606060606060606
1670 12:50:57.880347 call enable_fixed_mtrr()
1671 12:50:57.884062 CPU physical address size: 39 bits
1672 12:50:57.890396 MTRR: default type WB/UC MTRR counts: 6/5.
1673 12:50:57.893662 MTRR: UC selected as default type.
1674 12:50:57.900896 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1675 12:50:57.903396 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1676 12:50:57.910216 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1677 12:50:57.916598 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1678 12:50:57.923212 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1679 12:50:57.923827
1680 12:50:57.926492 MTRR check
1681 12:50:57.926991 Fixed MTRRs : Enabled
1682 12:50:57.929859 Variable MTRRs: Enabled
1683 12:50:57.930320
1684 12:50:57.933368 MTRR: Fixed MSR 0x250 0x0606060606060606
1685 12:50:57.939908 MTRR: Fixed MSR 0x258 0x0606060606060606
1686 12:50:57.942920 MTRR: Fixed MSR 0x259 0x0000000000000000
1687 12:50:57.946500 MTRR: Fixed MSR 0x268 0x0606060606060606
1688 12:50:57.949923 MTRR: Fixed MSR 0x269 0x0606060606060606
1689 12:50:57.956521 MTRR: Fixed MSR 0x26a 0x0606060606060606
1690 12:50:57.959747 MTRR: Fixed MSR 0x26b 0x0606060606060606
1691 12:50:57.962915 MTRR: Fixed MSR 0x26c 0x0606060606060606
1692 12:50:57.966625 MTRR: Fixed MSR 0x26d 0x0606060606060606
1693 12:50:57.969731 MTRR: Fixed MSR 0x26e 0x0606060606060606
1694 12:50:57.976406 MTRR: Fixed MSR 0x26f 0x0606060606060606
1695 12:50:57.979921 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1696 12:50:57.982916 call enable_fixed_mtrr()
1697 12:50:57.987583 Checking cr50 for pending updates
1698 12:50:57.991228 CPU physical address size: 39 bits
1699 12:50:57.994437 Reading cr50 TPM mode
1700 12:50:58.004790 BS: BS_PAYLOAD_LOAD entry times (exec / console): 12 / 6 ms
1701 12:50:58.011647 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1702 12:50:58.015010 Checking segment from ROM address 0xfff9d5b8
1703 12:50:58.021453 Checking segment from ROM address 0xfff9d5d4
1704 12:50:58.025269 Loading segment from ROM address 0xfff9d5b8
1705 12:50:58.028377 code (compression=0)
1706 12:50:58.035226 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1707 12:50:58.045559 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1708 12:50:58.048682 it's not compressed!
1709 12:50:58.173700 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1710 12:50:58.180082 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1711 12:50:58.187472 Loading segment from ROM address 0xfff9d5d4
1712 12:50:58.190706 Entry Point 0x30000000
1713 12:50:58.191307 Loaded segments
1714 12:50:58.197077 BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms
1715 12:50:58.213837 Finalizing chipset.
1716 12:50:58.216711 Finalizing SMM.
1717 12:50:58.217250 APMC done.
1718 12:50:58.223349 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1719 12:50:58.226960 mp_park_aps done after 0 msecs.
1720 12:50:58.230417 Jumping to boot code at 0x30000000(0x76b4b000)
1721 12:50:58.240012 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1722 12:50:58.240561
1723 12:50:58.241057
1724 12:50:58.241522
1725 12:50:58.243473 Starting depthcharge on Magolor...
1726 12:50:58.243954
1727 12:50:58.245137 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1728 12:50:58.245762 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1729 12:50:58.246270 Setting prompt string to ['dedede:']
1730 12:50:58.246820 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1731 12:50:58.253448 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1732 12:50:58.254036
1733 12:50:58.260462 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1734 12:50:58.261052
1735 12:50:58.263459 fw_config match found: AUDIO_AMP=UNPROVISIONED
1736 12:50:58.263931
1737 12:50:58.266572 Wipe memory regions:
1738 12:50:58.267138
1739 12:50:58.269600 [0x00000000001000, 0x000000000a0000)
1740 12:50:58.270067
1741 12:50:58.273719 [0x00000000100000, 0x00000030000000)
1742 12:50:58.402225
1743 12:50:58.405458 [0x00000031062170, 0x00000076a15000)
1744 12:50:58.574539
1745 12:50:58.577804 [0x00000100000000, 0x00000180400000)
1746 12:50:59.640000
1747 12:50:59.640531 R8152: Initializing
1748 12:50:59.640904
1749 12:50:59.643426 Version 6 (ocp_data = 5c30)
1750 12:50:59.646736
1751 12:50:59.647319 R8152: Done initializing
1752 12:50:59.647690
1753 12:50:59.649738 Adding net device
1754 12:50:59.650199
1755 12:50:59.653000 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1756 12:50:59.656505
1757 12:50:59.657060
1758 12:50:59.657425
1759 12:50:59.658239 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1761 12:50:59.759556 dedede: tftpboot 192.168.201.1 11602071/tftp-deploy-d91kzifd/kernel/bzImage 11602071/tftp-deploy-d91kzifd/kernel/cmdline 11602071/tftp-deploy-d91kzifd/ramdisk/ramdisk.cpio.gz
1762 12:50:59.760189 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1763 12:50:59.760615 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1764 12:50:59.765597 tftpboot 192.168.201.1 11602071/tftp-deploy-d91kzifd/kernel/bzImaloy-d91kzifd/kernel/cmdline 11602071/tftp-deploy-d91kzifd/ramdisk/ramdisk.cpio.gz
1765 12:50:59.766143
1766 12:50:59.766509 Waiting for link
1767 12:50:59.967508
1768 12:50:59.968031 done.
1769 12:50:59.968641
1770 12:50:59.969199 MAC: 00:24:32:30:79:17
1771 12:50:59.969571
1772 12:50:59.970381 Sending DHCP discover... done.
1773 12:50:59.970812
1774 12:50:59.974177 Waiting for reply... done.
1775 12:50:59.974646
1776 12:50:59.977294 Sending DHCP request... done.
1777 12:50:59.977892
1778 12:50:59.984042 Waiting for reply... done.
1779 12:50:59.984610
1780 12:50:59.984980 My ip is 192.168.201.10
1781 12:50:59.985323
1782 12:50:59.987422 The DHCP server ip is 192.168.201.1
1783 12:50:59.990611
1784 12:50:59.994163 TFTP server IP predefined by user: 192.168.201.1
1785 12:50:59.994733
1786 12:51:00.000210 Bootfile predefined by user: 11602071/tftp-deploy-d91kzifd/kernel/bzImage
1787 12:51:00.000748
1788 12:51:00.004002 Sending tftp read request... done.
1789 12:51:00.004557
1790 12:51:00.013008 Waiting for the transfer...
1791 12:51:00.013533
1792 12:51:00.712263 00000000 ################################################################
1793 12:51:00.712890
1794 12:51:01.330963 00080000 ################################################################
1795 12:51:01.331100
1796 12:51:01.931522 00100000 ################################################################
1797 12:51:01.931653
1798 12:51:02.545261 00180000 ################################################################
1799 12:51:02.545420
1800 12:51:03.078143 00200000 ################################################################
1801 12:51:03.078279
1802 12:51:03.614099 00280000 ################################################################
1803 12:51:03.614249
1804 12:51:04.151263 00300000 ################################################################
1805 12:51:04.151395
1806 12:51:04.683234 00380000 ################################################################
1807 12:51:04.683369
1808 12:51:05.214455 00400000 ################################################################
1809 12:51:05.214593
1810 12:51:05.744582 00480000 ################################################################
1811 12:51:05.744718
1812 12:51:06.274431 00500000 ################################################################
1813 12:51:06.274600
1814 12:51:06.803328 00580000 ################################################################
1815 12:51:06.803468
1816 12:51:07.329616 00600000 ################################################################
1817 12:51:07.329783
1818 12:51:07.861133 00680000 ################################################################
1819 12:51:07.861294
1820 12:51:08.393561 00700000 ################################################################
1821 12:51:08.393728
1822 12:51:08.923505 00780000 ################################################################
1823 12:51:08.923640
1824 12:51:09.446472 00800000 ################################################################
1825 12:51:09.446611
1826 12:51:09.969542 00880000 ################################################################
1827 12:51:09.969709
1828 12:51:10.488201 00900000 ################################################################
1829 12:51:10.488343
1830 12:51:11.005200 00980000 ################################################################
1831 12:51:11.005379
1832 12:51:11.527861 00a00000 ################################################################
1833 12:51:11.527998
1834 12:51:11.988913 00a80000 ######################################################### done.
1835 12:51:11.989078
1836 12:51:11.992089 The bootfile was 11473408 bytes long.
1837 12:51:11.992201
1838 12:51:11.995787 Sending tftp read request... done.
1839 12:51:11.995897
1840 12:51:11.998972 Waiting for the transfer...
1841 12:51:11.999057
1842 12:51:12.524504 00000000 ################################################################
1843 12:51:12.524686
1844 12:51:13.047330 00080000 ################################################################
1845 12:51:13.047480
1846 12:51:13.573300 00100000 ################################################################
1847 12:51:13.573488
1848 12:51:14.109306 00180000 ################################################################
1849 12:51:14.109449
1850 12:51:14.645300 00200000 ################################################################
1851 12:51:14.645446
1852 12:51:15.172972 00280000 ################################################################
1853 12:51:15.173107
1854 12:51:15.697547 00300000 ################################################################
1855 12:51:15.697692
1856 12:51:16.227670 00380000 ################################################################
1857 12:51:16.227821
1858 12:51:16.748034 00400000 ################################################################
1859 12:51:16.748171
1860 12:51:17.269198 00480000 ################################################################
1861 12:51:17.269341
1862 12:51:17.788188 00500000 ################################################################
1863 12:51:17.788353
1864 12:51:18.308381 00580000 ################################################################
1865 12:51:18.308544
1866 12:51:18.828989 00600000 ################################################################
1867 12:51:18.829126
1868 12:51:19.348770 00680000 ################################################################
1869 12:51:19.348932
1870 12:51:19.867046 00700000 ################################################################
1871 12:51:19.867188
1872 12:51:20.389030 00780000 ################################################################
1873 12:51:20.389191
1874 12:51:20.909728 00800000 ################################################################
1875 12:51:20.909868
1876 12:51:21.207258 00880000 ##################################### done.
1877 12:51:21.207412
1878 12:51:21.210874 Sending tftp read request... done.
1879 12:51:21.210996
1880 12:51:21.214047 Waiting for the transfer...
1881 12:51:21.214150
1882 12:51:21.214251 00000000 # done.
1883 12:51:21.214369
1884 12:51:21.223870 Command line loaded dynamically from TFTP file: 11602071/tftp-deploy-d91kzifd/kernel/cmdline
1885 12:51:21.223982
1886 12:51:21.237909 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1887 12:51:21.240520
1888 12:51:21.243755 ec_init: CrosEC protocol v3 supported (256, 256)
1889 12:51:21.251723
1890 12:51:21.254623 Shutting down all USB controllers.
1891 12:51:21.254706
1892 12:51:21.254795 Removing current net device
1893 12:51:21.254874
1894 12:51:21.258618 Finalizing coreboot
1895 12:51:21.258702
1896 12:51:21.265369 Exiting depthcharge with code 4 at timestamp: 29827802
1897 12:51:21.265452
1898 12:51:21.265517
1899 12:51:21.265579 Starting kernel ...
1900 12:51:21.265638
1901 12:51:21.265695
1902 12:51:21.266075 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
1903 12:51:21.266171 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
1904 12:51:21.266247 Setting prompt string to ['Linux version [0-9]']
1905 12:51:21.266314 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1906 12:51:21.266380 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1908 12:55:45.267175 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
1910 12:55:45.268248 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
1912 12:55:45.269086 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1915 12:55:45.270459 end: 2 depthcharge-action (duration 00:05:00) [common]
1917 12:55:45.271473 Cleaning after the job
1918 12:55:45.271558 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11602071/tftp-deploy-d91kzifd/ramdisk
1919 12:55:45.272928 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11602071/tftp-deploy-d91kzifd/kernel
1920 12:55:45.274697 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11602071/tftp-deploy-d91kzifd/modules
1921 12:55:45.275326 start: 5.1 power-off (timeout 00:00:30) [common]
1922 12:55:45.275483 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-7' '--port=1' '--command=off'
1923 12:55:45.353598 >> Command sent successfully.
1924 12:55:45.359241 Returned 0 in 0 seconds
1925 12:55:45.460568 end: 5.1 power-off (duration 00:00:00) [common]
1927 12:55:45.462517 start: 5.2 read-feedback (timeout 00:10:00) [common]
1928 12:55:45.464251 Listened to connection for namespace 'common' for up to 1s
1930 12:55:45.465791 Listened to connection for namespace 'common' for up to 1s
1931 12:55:46.464757 Finalising connection for namespace 'common'
1932 12:55:46.465456 Disconnecting from shell: Finalise
1933 12:55:46.465903
1934 12:55:46.567141 end: 5.2 read-feedback (duration 00:00:01) [common]
1935 12:55:46.567793 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11602071
1936 12:55:46.622808 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11602071
1937 12:55:46.623033 JobError: Your job cannot terminate cleanly.