Boot log: acer-cbv514-1h-34uz-brya
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 12:50:33.022953 lava-dispatcher, installed at version: 2023.06
2 12:50:33.023153 start: 0 validate
3 12:50:33.023286 Start time: 2023-09-23 12:50:33.023278+00:00 (UTC)
4 12:50:33.023413 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:50:33.023561 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 12:50:33.026480 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:50:33.026675 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.292-cip102-406-g9efaa60a8cb4%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:50:37.038303 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:50:37.039104 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.292-cip102-406-g9efaa60a8cb4%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:50:38.043613 validate duration: 5.02
12 12:50:38.043875 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:50:38.043968 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:50:38.044050 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:50:38.044162 Not decompressing ramdisk as can be used compressed.
16 12:50:38.044247 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 12:50:38.044311 saving as /var/lib/lava/dispatcher/tmp/11602072/tftp-deploy-u8jg9vk_/ramdisk/rootfs.cpio.gz
18 12:50:38.044375 total size: 8418130 (8 MB)
19 12:50:38.045783 progress 0 % (0 MB)
20 12:50:38.048094 progress 5 % (0 MB)
21 12:50:38.050437 progress 10 % (0 MB)
22 12:50:38.052769 progress 15 % (1 MB)
23 12:50:38.055179 progress 20 % (1 MB)
24 12:50:38.057413 progress 25 % (2 MB)
25 12:50:38.059752 progress 30 % (2 MB)
26 12:50:38.061872 progress 35 % (2 MB)
27 12:50:38.064182 progress 40 % (3 MB)
28 12:50:38.066395 progress 45 % (3 MB)
29 12:50:38.068654 progress 50 % (4 MB)
30 12:50:38.070901 progress 55 % (4 MB)
31 12:50:38.073071 progress 60 % (4 MB)
32 12:50:38.075126 progress 65 % (5 MB)
33 12:50:38.077285 progress 70 % (5 MB)
34 12:50:38.079513 progress 75 % (6 MB)
35 12:50:38.081661 progress 80 % (6 MB)
36 12:50:38.083858 progress 85 % (6 MB)
37 12:50:38.086178 progress 90 % (7 MB)
38 12:50:38.088432 progress 95 % (7 MB)
39 12:50:38.090452 progress 100 % (8 MB)
40 12:50:38.090731 8 MB downloaded in 0.05 s (173.18 MB/s)
41 12:50:38.090881 end: 1.1.1 http-download (duration 00:00:00) [common]
43 12:50:38.091115 end: 1.1 download-retry (duration 00:00:00) [common]
44 12:50:38.091197 start: 1.2 download-retry (timeout 00:10:00) [common]
45 12:50:38.091277 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 12:50:38.091403 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.292-cip102-406-g9efaa60a8cb4/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:50:38.091469 saving as /var/lib/lava/dispatcher/tmp/11602072/tftp-deploy-u8jg9vk_/kernel/bzImage
48 12:50:38.091527 total size: 11473408 (10 MB)
49 12:50:38.091588 No compression specified
50 12:50:38.093051 progress 0 % (0 MB)
51 12:50:38.096035 progress 5 % (0 MB)
52 12:50:38.099108 progress 10 % (1 MB)
53 12:50:38.101985 progress 15 % (1 MB)
54 12:50:38.105041 progress 20 % (2 MB)
55 12:50:38.107958 progress 25 % (2 MB)
56 12:50:38.111064 progress 30 % (3 MB)
57 12:50:38.114085 progress 35 % (3 MB)
58 12:50:38.117199 progress 40 % (4 MB)
59 12:50:38.120158 progress 45 % (4 MB)
60 12:50:38.123325 progress 50 % (5 MB)
61 12:50:38.126340 progress 55 % (6 MB)
62 12:50:38.129484 progress 60 % (6 MB)
63 12:50:38.132413 progress 65 % (7 MB)
64 12:50:38.135579 progress 70 % (7 MB)
65 12:50:38.138479 progress 75 % (8 MB)
66 12:50:38.141655 progress 80 % (8 MB)
67 12:50:38.144625 progress 85 % (9 MB)
68 12:50:38.147835 progress 90 % (9 MB)
69 12:50:38.150882 progress 95 % (10 MB)
70 12:50:38.154101 progress 100 % (10 MB)
71 12:50:38.154250 10 MB downloaded in 0.06 s (174.46 MB/s)
72 12:50:38.154439 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:50:38.154758 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:50:38.154843 start: 1.3 download-retry (timeout 00:10:00) [common]
76 12:50:38.154927 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 12:50:38.155051 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.292-cip102-406-g9efaa60a8cb4/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:50:38.155120 saving as /var/lib/lava/dispatcher/tmp/11602072/tftp-deploy-u8jg9vk_/modules/modules.tar
79 12:50:38.155180 total size: 484692 (0 MB)
80 12:50:38.155241 Using unxz to decompress xz
81 12:50:38.159816 progress 6 % (0 MB)
82 12:50:38.160227 progress 13 % (0 MB)
83 12:50:38.160466 progress 20 % (0 MB)
84 12:50:38.162091 progress 27 % (0 MB)
85 12:50:38.164161 progress 33 % (0 MB)
86 12:50:38.165944 progress 40 % (0 MB)
87 12:50:38.168044 progress 47 % (0 MB)
88 12:50:38.169991 progress 54 % (0 MB)
89 12:50:38.172017 progress 60 % (0 MB)
90 12:50:38.174410 progress 67 % (0 MB)
91 12:50:38.176491 progress 74 % (0 MB)
92 12:50:38.178492 progress 81 % (0 MB)
93 12:50:38.180755 progress 87 % (0 MB)
94 12:50:38.182577 progress 94 % (0 MB)
95 12:50:38.184944 progress 100 % (0 MB)
96 12:50:38.191334 0 MB downloaded in 0.04 s (12.79 MB/s)
97 12:50:38.191575 end: 1.3.1 http-download (duration 00:00:00) [common]
99 12:50:38.191836 end: 1.3 download-retry (duration 00:00:00) [common]
100 12:50:38.191927 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
101 12:50:38.192021 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
102 12:50:38.192101 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 12:50:38.192183 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
104 12:50:38.192402 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11602072/lava-overlay-14kadwvl
105 12:50:38.192538 makedir: /var/lib/lava/dispatcher/tmp/11602072/lava-overlay-14kadwvl/lava-11602072/bin
106 12:50:38.192644 makedir: /var/lib/lava/dispatcher/tmp/11602072/lava-overlay-14kadwvl/lava-11602072/tests
107 12:50:38.192742 makedir: /var/lib/lava/dispatcher/tmp/11602072/lava-overlay-14kadwvl/lava-11602072/results
108 12:50:38.192861 Creating /var/lib/lava/dispatcher/tmp/11602072/lava-overlay-14kadwvl/lava-11602072/bin/lava-add-keys
109 12:50:38.193011 Creating /var/lib/lava/dispatcher/tmp/11602072/lava-overlay-14kadwvl/lava-11602072/bin/lava-add-sources
110 12:50:38.193146 Creating /var/lib/lava/dispatcher/tmp/11602072/lava-overlay-14kadwvl/lava-11602072/bin/lava-background-process-start
111 12:50:38.193274 Creating /var/lib/lava/dispatcher/tmp/11602072/lava-overlay-14kadwvl/lava-11602072/bin/lava-background-process-stop
112 12:50:38.193399 Creating /var/lib/lava/dispatcher/tmp/11602072/lava-overlay-14kadwvl/lava-11602072/bin/lava-common-functions
113 12:50:38.193522 Creating /var/lib/lava/dispatcher/tmp/11602072/lava-overlay-14kadwvl/lava-11602072/bin/lava-echo-ipv4
114 12:50:38.193647 Creating /var/lib/lava/dispatcher/tmp/11602072/lava-overlay-14kadwvl/lava-11602072/bin/lava-install-packages
115 12:50:38.193771 Creating /var/lib/lava/dispatcher/tmp/11602072/lava-overlay-14kadwvl/lava-11602072/bin/lava-installed-packages
116 12:50:38.193894 Creating /var/lib/lava/dispatcher/tmp/11602072/lava-overlay-14kadwvl/lava-11602072/bin/lava-os-build
117 12:50:38.194016 Creating /var/lib/lava/dispatcher/tmp/11602072/lava-overlay-14kadwvl/lava-11602072/bin/lava-probe-channel
118 12:50:38.194139 Creating /var/lib/lava/dispatcher/tmp/11602072/lava-overlay-14kadwvl/lava-11602072/bin/lava-probe-ip
119 12:50:38.194262 Creating /var/lib/lava/dispatcher/tmp/11602072/lava-overlay-14kadwvl/lava-11602072/bin/lava-target-ip
120 12:50:38.194385 Creating /var/lib/lava/dispatcher/tmp/11602072/lava-overlay-14kadwvl/lava-11602072/bin/lava-target-mac
121 12:50:38.194509 Creating /var/lib/lava/dispatcher/tmp/11602072/lava-overlay-14kadwvl/lava-11602072/bin/lava-target-storage
122 12:50:38.194677 Creating /var/lib/lava/dispatcher/tmp/11602072/lava-overlay-14kadwvl/lava-11602072/bin/lava-test-case
123 12:50:38.194801 Creating /var/lib/lava/dispatcher/tmp/11602072/lava-overlay-14kadwvl/lava-11602072/bin/lava-test-event
124 12:50:38.194923 Creating /var/lib/lava/dispatcher/tmp/11602072/lava-overlay-14kadwvl/lava-11602072/bin/lava-test-feedback
125 12:50:38.195047 Creating /var/lib/lava/dispatcher/tmp/11602072/lava-overlay-14kadwvl/lava-11602072/bin/lava-test-raise
126 12:50:38.195171 Creating /var/lib/lava/dispatcher/tmp/11602072/lava-overlay-14kadwvl/lava-11602072/bin/lava-test-reference
127 12:50:38.195296 Creating /var/lib/lava/dispatcher/tmp/11602072/lava-overlay-14kadwvl/lava-11602072/bin/lava-test-runner
128 12:50:38.195419 Creating /var/lib/lava/dispatcher/tmp/11602072/lava-overlay-14kadwvl/lava-11602072/bin/lava-test-set
129 12:50:38.195544 Creating /var/lib/lava/dispatcher/tmp/11602072/lava-overlay-14kadwvl/lava-11602072/bin/lava-test-shell
130 12:50:38.195673 Updating /var/lib/lava/dispatcher/tmp/11602072/lava-overlay-14kadwvl/lava-11602072/bin/lava-install-packages (oe)
131 12:50:38.195833 Updating /var/lib/lava/dispatcher/tmp/11602072/lava-overlay-14kadwvl/lava-11602072/bin/lava-installed-packages (oe)
132 12:50:38.195955 Creating /var/lib/lava/dispatcher/tmp/11602072/lava-overlay-14kadwvl/lava-11602072/environment
133 12:50:38.196058 LAVA metadata
134 12:50:38.196132 - LAVA_JOB_ID=11602072
135 12:50:38.196198 - LAVA_DISPATCHER_IP=192.168.201.1
136 12:50:38.196299 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
137 12:50:38.196366 skipped lava-vland-overlay
138 12:50:38.196441 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 12:50:38.196518 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
140 12:50:38.196579 skipped lava-multinode-overlay
141 12:50:38.196651 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 12:50:38.196730 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
143 12:50:38.196803 Loading test definitions
144 12:50:38.196893 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
145 12:50:38.196968 Using /lava-11602072 at stage 0
146 12:50:38.197279 uuid=11602072_1.4.2.3.1 testdef=None
147 12:50:38.197366 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 12:50:38.197449 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
149 12:50:38.197979 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 12:50:38.198196 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
152 12:50:38.198919 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 12:50:38.199146 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
155 12:50:38.199756 runner path: /var/lib/lava/dispatcher/tmp/11602072/lava-overlay-14kadwvl/lava-11602072/0/tests/0_dmesg test_uuid 11602072_1.4.2.3.1
156 12:50:38.199910 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 12:50:38.200131 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
159 12:50:38.200201 Using /lava-11602072 at stage 1
160 12:50:38.200497 uuid=11602072_1.4.2.3.5 testdef=None
161 12:50:38.200583 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 12:50:38.200665 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
163 12:50:38.201134 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 12:50:38.201347 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
166 12:50:38.201978 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 12:50:38.202201 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
169 12:50:38.202897 runner path: /var/lib/lava/dispatcher/tmp/11602072/lava-overlay-14kadwvl/lava-11602072/1/tests/1_bootrr test_uuid 11602072_1.4.2.3.5
170 12:50:38.203047 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 12:50:38.203248 Creating lava-test-runner.conf files
173 12:50:38.203310 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11602072/lava-overlay-14kadwvl/lava-11602072/0 for stage 0
174 12:50:38.203399 - 0_dmesg
175 12:50:38.203477 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11602072/lava-overlay-14kadwvl/lava-11602072/1 for stage 1
176 12:50:38.203565 - 1_bootrr
177 12:50:38.203658 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 12:50:38.203741 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
179 12:50:38.212265 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 12:50:38.212373 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
181 12:50:38.212458 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 12:50:38.212542 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 12:50:38.212626 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
184 12:50:38.462854 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 12:50:38.463236 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
186 12:50:38.463350 extracting modules file /var/lib/lava/dispatcher/tmp/11602072/tftp-deploy-u8jg9vk_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11602072/extract-overlay-ramdisk-rnci0l8x/ramdisk
187 12:50:38.484359 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 12:50:38.484502 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
189 12:50:38.484599 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11602072/compress-overlay-s2mni2x3/overlay-1.4.2.4.tar.gz to ramdisk
190 12:50:38.484668 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11602072/compress-overlay-s2mni2x3/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11602072/extract-overlay-ramdisk-rnci0l8x/ramdisk
191 12:50:38.493365 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 12:50:38.493481 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
193 12:50:38.493573 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 12:50:38.493658 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
195 12:50:38.493735 Building ramdisk /var/lib/lava/dispatcher/tmp/11602072/extract-overlay-ramdisk-rnci0l8x/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11602072/extract-overlay-ramdisk-rnci0l8x/ramdisk
196 12:50:38.643087 >> 53982 blocks
197 12:50:39.520586 rename /var/lib/lava/dispatcher/tmp/11602072/extract-overlay-ramdisk-rnci0l8x/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11602072/tftp-deploy-u8jg9vk_/ramdisk/ramdisk.cpio.gz
198 12:50:39.521023 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 12:50:39.521147 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
200 12:50:39.521252 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
201 12:50:39.521347 No mkimage arch provided, not using FIT.
202 12:50:39.521435 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 12:50:39.521520 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 12:50:39.521623 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 12:50:39.521714 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
206 12:50:39.521796 No LXC device requested
207 12:50:39.521873 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 12:50:39.521956 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
209 12:50:39.522033 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 12:50:39.522107 Checking files for TFTP limit of 4294967296 bytes.
211 12:50:39.522508 end: 1 tftp-deploy (duration 00:00:01) [common]
212 12:50:39.522623 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 12:50:39.522716 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 12:50:39.522836 substitutions:
215 12:50:39.522901 - {DTB}: None
216 12:50:39.522961 - {INITRD}: 11602072/tftp-deploy-u8jg9vk_/ramdisk/ramdisk.cpio.gz
217 12:50:39.523018 - {KERNEL}: 11602072/tftp-deploy-u8jg9vk_/kernel/bzImage
218 12:50:39.523074 - {LAVA_MAC}: None
219 12:50:39.523129 - {PRESEED_CONFIG}: None
220 12:50:39.523184 - {PRESEED_LOCAL}: None
221 12:50:39.523238 - {RAMDISK}: 11602072/tftp-deploy-u8jg9vk_/ramdisk/ramdisk.cpio.gz
222 12:50:39.523292 - {ROOT_PART}: None
223 12:50:39.523346 - {ROOT}: None
224 12:50:39.523400 - {SERVER_IP}: 192.168.201.1
225 12:50:39.523454 - {TEE}: None
226 12:50:39.523507 Parsed boot commands:
227 12:50:39.523560 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 12:50:39.523731 Parsed boot commands: tftpboot 192.168.201.1 11602072/tftp-deploy-u8jg9vk_/kernel/bzImage 11602072/tftp-deploy-u8jg9vk_/kernel/cmdline 11602072/tftp-deploy-u8jg9vk_/ramdisk/ramdisk.cpio.gz
229 12:50:39.523817 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 12:50:39.523897 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 12:50:39.523985 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 12:50:39.524070 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 12:50:39.524138 Not connected, no need to disconnect.
234 12:50:39.524209 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 12:50:39.524290 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 12:50:39.524356 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-7'
237 12:50:39.528290 Setting prompt string to ['lava-test: # ']
238 12:50:39.528640 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 12:50:39.528741 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 12:50:39.528841 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 12:50:39.528932 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 12:50:39.529126 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-7' '--port=1' '--command=reboot'
243 12:50:44.674681 >> Command sent successfully.
244 12:50:44.685346 Returned 0 in 5 seconds
245 12:50:44.786775 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 12:50:44.788230 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 12:50:44.788723 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 12:50:44.789170 Setting prompt string to 'Starting depthcharge on Volmar...'
250 12:50:44.789628 Changing prompt to 'Starting depthcharge on Volmar...'
251 12:50:44.789984 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
252 12:50:44.791223 [Enter `^Ec?' for help]
253 12:50:46.156626
254 12:50:46.157139
255 12:50:46.164061 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
256 12:50:46.167154 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
257 12:50:46.173762 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
258 12:50:46.177334 CPU: AES supported, TXT NOT supported, VT supported
259 12:50:46.183845 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
260 12:50:46.187440 Cache size = 10 MiB
261 12:50:46.191598 MCH: device id 4609 (rev 04) is Alderlake-P
262 12:50:46.198641 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
263 12:50:46.202870 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
264 12:50:46.205685 VBOOT: Loading verstage.
265 12:50:46.210025 FMAP: Found "FLASH" version 1.1 at 0x1804000.
266 12:50:46.213599 FMAP: base = 0x0 size = 0x2000000 #areas = 37
267 12:50:46.220034 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
268 12:50:46.226926 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
269 12:50:46.233750 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
270 12:50:46.237963
271 12:50:46.238485
272 12:50:46.245296 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
273 12:50:46.253114 Probing TPM I2C: I2C bus 1 version 0x3230302a
274 12:50:46.253640 DW I2C bus 1 at 0xfe022000 (400 KHz)
275 12:50:46.256220 I2C TX abort detected (00000001)
276 12:50:46.259881 cr50_i2c_read: Address write failed
277 12:50:46.273111 .done! DID_VID 0x00281ae0
278 12:50:46.276417 TPM ready after 0 ms
279 12:50:46.279633 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
280 12:50:46.293267 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
281 12:50:46.300078 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
282 12:50:46.349817 tlcl_send_startup: Startup return code is 0
283 12:50:46.350282 TPM: setup succeeded
284 12:50:46.373084 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
285 12:50:46.394331 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
286 12:50:46.398395 Chrome EC: UHEPI supported
287 12:50:46.401900 Reading cr50 boot mode
288 12:50:46.416478 Cr50 says boot_mode is VERIFIED_RW(0x00).
289 12:50:46.416901 Phase 1
290 12:50:46.423099 FMAP: area GBB found @ 1805000 (458752 bytes)
291 12:50:46.430076 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
292 12:50:46.436522 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
293 12:50:46.443663 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
294 12:50:46.444200 Phase 2
295 12:50:46.446721 Phase 3
296 12:50:46.449807 FMAP: area GBB found @ 1805000 (458752 bytes)
297 12:50:46.456907 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
298 12:50:46.460250 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
299 12:50:46.467267 VB2:vb2_verify_keyblock() Checking keyblock signature...
300 12:50:46.473562 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
301 12:50:46.480350 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
302 12:50:46.490244 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
303 12:50:46.501805 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
304 12:50:46.505068 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
305 12:50:46.511531 VB2:vb2_verify_fw_preamble() Verifying preamble.
306 12:50:46.518438 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
307 12:50:46.524904 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
308 12:50:46.531857 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
309 12:50:46.535461 Phase 4
310 12:50:46.538792 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
311 12:50:46.545236 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
312 12:50:46.758064 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
313 12:50:46.764545 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
314 12:50:46.767891 Saving vboot hash.
315 12:50:46.774462 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
316 12:50:46.790459 tlcl_extend: response is 0
317 12:50:46.797240 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
318 12:50:46.800639 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
319 12:50:46.818108 tlcl_extend: response is 0
320 12:50:46.825666 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
321 12:50:46.845415 tlcl_lock_nv_write: response is 0
322 12:50:46.864440 tlcl_lock_nv_write: response is 0
323 12:50:46.864965 Slot A is selected
324 12:50:46.871124 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
325 12:50:46.877696 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
326 12:50:46.884139 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
327 12:50:46.891044 BS: verstage times (exec / console): total (unknown) / 264 ms
328 12:50:46.891507
329 12:50:46.891901
330 12:50:46.897737 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
331 12:50:46.901611 Google Chrome EC: version:
332 12:50:46.904609 ro: volmar_v2.0.14126-e605144e9c
333 12:50:46.908195 rw: volmar_v0.0.55-22d1557
334 12:50:46.911644 running image: 2
335 12:50:46.914940 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
336 12:50:46.924789 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
337 12:50:46.931560 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
338 12:50:46.938164 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
339 12:50:46.948160 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
340 12:50:46.958146 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
341 12:50:46.961631 EC took 1286us to calculate image hash
342 12:50:46.972025 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
343 12:50:46.975005 VB2:sync_ec() select_rw=RW(active)
344 12:50:46.984546 Waited 275us to clear limit power flag.
345 12:50:46.991476 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
346 12:50:46.994551 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
347 12:50:46.997910 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
348 12:50:47.004780 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
349 12:50:47.008517 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
350 12:50:47.011949 TCO_STS: 0000 0000
351 12:50:47.012563 GEN_PMCON: d0015038 00002200
352 12:50:47.014814 GBLRST_CAUSE: 00000000 00000000
353 12:50:47.018466 HPR_CAUSE0: 00000000
354 12:50:47.021883 prev_sleep_state 5
355 12:50:47.024969 Abort disabling TXT, as CPU is not TXT capable.
356 12:50:47.032386 cse_lite: Number of partitions = 3
357 12:50:47.036143 cse_lite: Current partition = RO
358 12:50:47.036369 cse_lite: Next partition = RO
359 12:50:47.039120 cse_lite: Flags = 0x7
360 12:50:47.046145 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
361 12:50:47.056421 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
362 12:50:47.059204 FMAP: area SI_ME found @ 1000 (5238784 bytes)
363 12:50:47.065849 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
364 12:50:47.072793 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
365 12:50:47.079303 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
366 12:50:47.082911 cse_lite: CSE CBFS RW version : 16.1.25.2049
367 12:50:47.089290 cse_lite: Set Boot Partition Info Command (RW)
368 12:50:47.092716 HECI: Global Reset(Type:1) Command
369 12:50:48.528267 orted
370 12:50:48.534702 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
371 12:50:48.538109 Cache size = 10 MiB
372 12:50:48.541961 MCH: device id 4609 (rev 04) is Alderlake-P
373 12:50:48.545087 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
374 12:50:48.551730 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
375 12:50:48.556067 VBOOT: Loading verstage.
376 12:50:48.559444 FMAP: Found "FLASH" version 1.1 at 0x1804000.
377 12:50:48.562813 FMAP: base = 0x0 size = 0x2000000 #areas = 37
378 12:50:48.570348 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
379 12:50:48.577530 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
380 12:50:48.583615 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
381 12:50:48.584148
382 12:50:48.584484
383 12:50:48.593560 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
384 12:50:48.600483 Probing TPM I2C: I2C bus 1 version 0x3230302a
385 12:50:48.603873 DW I2C bus 1 at 0xfe022000 (400 KHz)
386 12:50:48.607061 done! DID_VID 0x00281ae0
387 12:50:48.610146 TPM ready after 0 ms
388 12:50:48.614339 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
389 12:50:48.626292 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
390 12:50:48.629502 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
391 12:50:48.685876 tlcl_send_startup: Startup return code is 0
392 12:50:48.686393 TPM: setup succeeded
393 12:50:48.707152 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
394 12:50:48.729271 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
395 12:50:48.733231 Chrome EC: UHEPI supported
396 12:50:48.736325 Reading cr50 boot mode
397 12:50:48.751587 Cr50 says boot_mode is VERIFIED_RW(0x00).
398 12:50:48.752126 Phase 1
399 12:50:48.757651 FMAP: area GBB found @ 1805000 (458752 bytes)
400 12:50:48.764665 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
401 12:50:48.771782 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
402 12:50:48.778285 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
403 12:50:48.778852 Phase 2
404 12:50:48.781443 Phase 3
405 12:50:48.784550 FMAP: area GBB found @ 1805000 (458752 bytes)
406 12:50:48.791532 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
407 12:50:48.795010 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
408 12:50:48.801945 VB2:vb2_verify_keyblock() Checking keyblock signature...
409 12:50:48.808606 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
410 12:50:48.815049 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
411 12:50:48.824963 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
412 12:50:48.836443 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
413 12:50:48.839882 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
414 12:50:48.845922 VB2:vb2_verify_fw_preamble() Verifying preamble.
415 12:50:48.852590 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
416 12:50:48.859810 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
417 12:50:48.866162 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
418 12:50:48.870619 Phase 4
419 12:50:48.873664 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
420 12:50:48.880719 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
421 12:50:49.093177 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
422 12:50:49.099453 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
423 12:50:49.103527 Saving vboot hash.
424 12:50:49.109534 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
425 12:50:49.125568 tlcl_extend: response is 0
426 12:50:49.132418 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
427 12:50:49.135866 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
428 12:50:49.153275 tlcl_extend: response is 0
429 12:50:49.159929 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
430 12:50:49.179703 tlcl_lock_nv_write: response is 0
431 12:50:49.199178 tlcl_lock_nv_write: response is 0
432 12:50:49.199713 Slot A is selected
433 12:50:49.205656 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
434 12:50:49.212228 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
435 12:50:49.218955 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
436 12:50:49.225800 BS: verstage times (exec / console): total (unknown) / 256 ms
437 12:50:49.226335
438 12:50:49.226729
439 12:50:49.232502 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
440 12:50:49.236041 Google Chrome EC: version:
441 12:50:49.239566 ro: volmar_v2.0.14126-e605144e9c
442 12:50:49.242530 rw: volmar_v0.0.55-22d1557
443 12:50:49.246130 running image: 2
444 12:50:49.248974 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
445 12:50:49.259483 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
446 12:50:49.266237 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
447 12:50:49.272853 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
448 12:50:49.283086 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
449 12:50:49.292754 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
450 12:50:49.296593 EC took 943us to calculate image hash
451 12:50:49.306362 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
452 12:50:49.309646 VB2:sync_ec() select_rw=RW(active)
453 12:50:49.320763 Waited 305us to clear limit power flag.
454 12:50:49.324653 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
455 12:50:49.327995 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
456 12:50:49.331482 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
457 12:50:49.335141 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
458 12:50:49.341668 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
459 12:50:49.342251 TCO_STS: 0000 0000
460 12:50:49.345316 GEN_PMCON: d1001038 00002200
461 12:50:49.348214 GBLRST_CAUSE: 00000040 00000000
462 12:50:49.351885 HPR_CAUSE0: 00000000
463 12:50:49.352454 prev_sleep_state 5
464 12:50:49.358486 Abort disabling TXT, as CPU is not TXT capable.
465 12:50:49.365150 cse_lite: Number of partitions = 3
466 12:50:49.368484 cse_lite: Current partition = RW
467 12:50:49.369073 cse_lite: Next partition = RW
468 12:50:49.371608 cse_lite: Flags = 0x7
469 12:50:49.378945 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
470 12:50:49.388634 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
471 12:50:49.391725 FMAP: area SI_ME found @ 1000 (5238784 bytes)
472 12:50:49.398551 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
473 12:50:49.405576 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
474 12:50:49.411554 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
475 12:50:49.415177 cse_lite: CSE CBFS RW version : 16.1.25.2049
476 12:50:49.418764 Boot Count incremented to 425
477 12:50:49.425262 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
478 12:50:49.431814 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
479 12:50:49.444251 Probing TPM I2C: done! DID_VID 0x00281ae0
480 12:50:49.448161 Locality already claimed
481 12:50:49.451264 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
482 12:50:49.470272 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
483 12:50:49.476978 MRC: Hash idx 0x100d comparison successful.
484 12:50:49.480521 MRC cache found, size f6c8
485 12:50:49.481097 bootmode is set to: 2
486 12:50:49.484307 EC returned error result code 3
487 12:50:49.487491 FW_CONFIG value from CBI is 0x131
488 12:50:49.494281 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
489 12:50:49.497574 SPD index = 0
490 12:50:49.504141 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
491 12:50:49.504708 SPD: module type is LPDDR4X
492 12:50:49.511874 SPD: module part number is K4U6E3S4AB-MGCL
493 12:50:49.518661 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
494 12:50:49.522077 SPD: device width 16 bits, bus width 16 bits
495 12:50:49.525464 SPD: module size is 1024 MB (per channel)
496 12:50:49.595491 CBMEM:
497 12:50:49.598652 IMD: root @ 0x76fff000 254 entries.
498 12:50:49.601338 IMD: root @ 0x76ffec00 62 entries.
499 12:50:49.609715 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
500 12:50:49.612726 RO_VPD is uninitialized or empty.
501 12:50:49.616267 FMAP: area RW_VPD found @ f29000 (8192 bytes)
502 12:50:49.623347 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
503 12:50:49.625969 External stage cache:
504 12:50:49.629424 IMD: root @ 0x7bbff000 254 entries.
505 12:50:49.633498 IMD: root @ 0x7bbfec00 62 entries.
506 12:50:49.639723 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
507 12:50:49.646974 MRC: Checking cached data update for 'RW_MRC_CACHE'.
508 12:50:49.649878 MRC: 'RW_MRC_CACHE' does not need update.
509 12:50:49.650158 8 DIMMs found
510 12:50:49.653294 SMM Memory Map
511 12:50:49.656793 SMRAM : 0x7b800000 0x800000
512 12:50:49.660209 Subregion 0: 0x7b800000 0x200000
513 12:50:49.663324 Subregion 1: 0x7ba00000 0x200000
514 12:50:49.667180 Subregion 2: 0x7bc00000 0x400000
515 12:50:49.670366 top_of_ram = 0x77000000
516 12:50:49.673417 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
517 12:50:49.680049 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
518 12:50:49.683250 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
519 12:50:49.690194 MTRR Range: Start=ff000000 End=0 (Size 1000000)
520 12:50:49.690761 Normal boot
521 12:50:49.697060 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
522 12:50:49.707391 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
523 12:50:49.711466 Processing 237 relocs. Offset value of 0x74ab9000
524 12:50:49.721352 BS: romstage times (exec / console): total (unknown) / 377 ms
525 12:50:49.728481
526 12:50:49.729056
527 12:50:49.735684 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
528 12:50:49.736269 Normal boot
529 12:50:49.741822 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
530 12:50:49.748478 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
531 12:50:49.755343 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
532 12:50:49.765241 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
533 12:50:49.813838 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
534 12:50:49.820084 Processing 5931 relocs. Offset value of 0x72a2f000
535 12:50:49.823250 BS: postcar times (exec / console): total (unknown) / 51 ms
536 12:50:49.823680
537 12:50:49.826731
538 12:50:49.833656 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
539 12:50:49.836746 Reserving BERT start 76a1e000, size 10000
540 12:50:49.839932 Normal boot
541 12:50:49.843887 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
542 12:50:49.850358 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
543 12:50:49.857279 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
544 12:50:49.863544 FMAP: area RW_VPD found @ f29000 (8192 bytes)
545 12:50:49.867035 Google Chrome EC: version:
546 12:50:49.870672 ro: volmar_v2.0.14126-e605144e9c
547 12:50:49.873592 rw: volmar_v0.0.55-22d1557
548 12:50:49.874013 running image: 2
549 12:50:49.880655 ACPI _SWS is PM1 Index 8 GPE Index -1
550 12:50:49.884182 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
551 12:50:49.887033 EC returned error result code 3
552 12:50:49.890756 FW_CONFIG value from CBI is 0x131
553 12:50:49.897411 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
554 12:50:49.900693 PCI: 00:1c.2 disabled by fw_config
555 12:50:49.907748 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
556 12:50:49.911170 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
557 12:50:49.918322 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
558 12:50:49.921444 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
559 12:50:49.927884 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
560 12:50:49.934704 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
561 12:50:49.938421 microcode: sig=0x906a4 pf=0x80 revision=0x423
562 12:50:49.945007 microcode: Update skipped, already up-to-date
563 12:50:49.951459 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
564 12:50:49.982998 Detected 6 core, 8 thread CPU.
565 12:50:49.986481 Setting up SMI for CPU
566 12:50:49.989502 IED base = 0x7bc00000
567 12:50:49.990073 IED size = 0x00400000
568 12:50:49.992864 Will perform SMM setup.
569 12:50:49.996186 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
570 12:50:49.999675 LAPIC 0x0 in XAPIC mode.
571 12:50:50.009601 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
572 12:50:50.013004 Processing 18 relocs. Offset value of 0x00030000
573 12:50:50.017542 Attempting to start 7 APs
574 12:50:50.020868 Waiting for 10ms after sending INIT.
575 12:50:50.034240 Waiting for SIPI to complete...
576 12:50:50.037240 done.
577 12:50:50.037769 LAPIC 0x16 in XAPIC mode.
578 12:50:50.040323 LAPIC 0x10 in XAPIC mode.
579 12:50:50.043723 LAPIC 0x14 in XAPIC mode.
580 12:50:50.046697 AP: slot 2 apic_id 16, MCU rev: 0x00000423
581 12:50:50.050350 LAPIC 0x8 in XAPIC mode.
582 12:50:50.053831 AP: slot 3 apic_id 10, MCU rev: 0x00000423
583 12:50:50.060588 AP: slot 1 apic_id 14, MCU rev: 0x00000423
584 12:50:50.061125 LAPIC 0x12 in XAPIC mode.
585 12:50:50.064108 LAPIC 0x9 in XAPIC mode.
586 12:50:50.067123 AP: slot 7 apic_id 8, MCU rev: 0x00000423
587 12:50:50.074147 AP: slot 4 apic_id 12, MCU rev: 0x00000423
588 12:50:50.074708 LAPIC 0x1 in XAPIC mode.
589 12:50:50.077215 Waiting for SIPI to complete...
590 12:50:50.080709 done.
591 12:50:50.084040 AP: slot 6 apic_id 1, MCU rev: 0x00000423
592 12:50:50.087508 AP: slot 5 apic_id 9, MCU rev: 0x00000423
593 12:50:50.090876 smm_setup_relocation_handler: enter
594 12:50:50.093948 smm_setup_relocation_handler: exit
595 12:50:50.103662 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
596 12:50:50.106976 Processing 11 relocs. Offset value of 0x00038000
597 12:50:50.113935 smm_module_setup_stub: stack_top = 0x7b804000
598 12:50:50.117386 smm_module_setup_stub: per cpu stack_size = 0x800
599 12:50:50.124049 smm_module_setup_stub: runtime.start32_offset = 0x4c
600 12:50:50.127310 smm_module_setup_stub: runtime.smm_size = 0x10000
601 12:50:50.134354 SMM Module: stub loaded at 38000. Will call 0x76a52094
602 12:50:50.137224 Installing permanent SMM handler to 0x7b800000
603 12:50:50.144056 smm_load_module: total_smm_space_needed e468, available -> 200000
604 12:50:50.154141 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
605 12:50:50.157864 Processing 255 relocs. Offset value of 0x7b9f6000
606 12:50:50.160758 smm_load_module: smram_start: 0x7b800000
607 12:50:50.164603 smm_load_module: smram_end: 7ba00000
608 12:50:50.171225 smm_load_module: handler start 0x7b9f6d5f
609 12:50:50.174432 smm_load_module: handler_size 98d0
610 12:50:50.177856 smm_load_module: fxsave_area 0x7b9ff000
611 12:50:50.181541 smm_load_module: fxsave_size 1000
612 12:50:50.184616 smm_load_module: CONFIG_MSEG_SIZE 0x0
613 12:50:50.191477 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
614 12:50:50.194577 smm_load_module: handler_mod_params.smbase = 0x7b800000
615 12:50:50.201290 smm_load_module: per_cpu_save_state_size = 0x400
616 12:50:50.204549 smm_load_module: num_cpus = 0x8
617 12:50:50.207485 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
618 12:50:50.214405 smm_load_module: total_save_state_size = 0x2000
619 12:50:50.218158 smm_load_module: cpu0 entry: 7b9e6000
620 12:50:50.221125 smm_create_map: cpus allowed in one segment 30
621 12:50:50.227629 smm_create_map: min # of segments needed 1
622 12:50:50.228152 CPU 0x0
623 12:50:50.231105 smbase 7b9e6000 entry 7b9ee000
624 12:50:50.237607 ss_start 7b9f5c00 code_end 7b9ee208
625 12:50:50.238138 CPU 0x1
626 12:50:50.241024 smbase 7b9e5c00 entry 7b9edc00
627 12:50:50.244506 ss_start 7b9f5800 code_end 7b9ede08
628 12:50:50.248186 CPU 0x2
629 12:50:50.251071 smbase 7b9e5800 entry 7b9ed800
630 12:50:50.254642 ss_start 7b9f5400 code_end 7b9eda08
631 12:50:50.255184 CPU 0x3
632 12:50:50.257838 smbase 7b9e5400 entry 7b9ed400
633 12:50:50.264485 ss_start 7b9f5000 code_end 7b9ed608
634 12:50:50.265012 CPU 0x4
635 12:50:50.267638 smbase 7b9e5000 entry 7b9ed000
636 12:50:50.274809 ss_start 7b9f4c00 code_end 7b9ed208
637 12:50:50.275399 CPU 0x5
638 12:50:50.277880 smbase 7b9e4c00 entry 7b9ecc00
639 12:50:50.281432 ss_start 7b9f4800 code_end 7b9ece08
640 12:50:50.284481 CPU 0x6
641 12:50:50.287796 smbase 7b9e4800 entry 7b9ec800
642 12:50:50.290863 ss_start 7b9f4400 code_end 7b9eca08
643 12:50:50.291294 CPU 0x7
644 12:50:50.298361 smbase 7b9e4400 entry 7b9ec400
645 12:50:50.301327 ss_start 7b9f4000 code_end 7b9ec608
646 12:50:50.307837 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
647 12:50:50.314660 Processing 11 relocs. Offset value of 0x7b9ee000
648 12:50:50.321201 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
649 12:50:50.324473 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
650 12:50:50.331367 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
651 12:50:50.338022 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
652 12:50:50.344972 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
653 12:50:50.351502 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
654 12:50:50.358014 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
655 12:50:50.364865 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
656 12:50:50.371521 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
657 12:50:50.374958 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
658 12:50:50.381448 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
659 12:50:50.388063 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
660 12:50:50.395083 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
661 12:50:50.401682 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
662 12:50:50.408445 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
663 12:50:50.411539 smm_module_setup_stub: stack_top = 0x7b804000
664 12:50:50.418137 smm_module_setup_stub: per cpu stack_size = 0x800
665 12:50:50.421248 smm_module_setup_stub: runtime.start32_offset = 0x4c
666 12:50:50.428090 smm_module_setup_stub: runtime.smm_size = 0x200000
667 12:50:50.434723 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
668 12:50:50.438273 Clearing SMI status registers
669 12:50:50.441556 SMI_STS: PM1
670 12:50:50.441980 PM1_STS: WAK PWRBTN
671 12:50:50.448753 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
672 12:50:50.451712 In relocation handler: CPU 0
673 12:50:50.454828 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
674 12:50:50.462175 Writing SMRR. base = 0x7b800006, mask=0xff800c00
675 12:50:50.465520 Relocation complete.
676 12:50:50.472085 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
677 12:50:50.475273 In relocation handler: CPU 6
678 12:50:50.478753 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
679 12:50:50.482317 Relocation complete.
680 12:50:50.488174 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
681 12:50:50.491558 In relocation handler: CPU 3
682 12:50:50.494705 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
683 12:50:50.498243 Writing SMRR. base = 0x7b800006, mask=0xff800c00
684 12:50:50.501800 Relocation complete.
685 12:50:50.508307 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
686 12:50:50.511601 In relocation handler: CPU 2
687 12:50:50.514858 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
688 12:50:50.521541 Writing SMRR. base = 0x7b800006, mask=0xff800c00
689 12:50:50.522146 Relocation complete.
690 12:50:50.528121 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
691 12:50:50.531680 In relocation handler: CPU 4
692 12:50:50.534923 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
693 12:50:50.541399 Writing SMRR. base = 0x7b800006, mask=0xff800c00
694 12:50:50.544945 Relocation complete.
695 12:50:50.551712 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
696 12:50:50.554902 In relocation handler: CPU 1
697 12:50:50.558299 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
698 12:50:50.561728 Writing SMRR. base = 0x7b800006, mask=0xff800c00
699 12:50:50.565075 Relocation complete.
700 12:50:50.571635 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
701 12:50:50.575141 In relocation handler: CPU 7
702 12:50:50.578179 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
703 12:50:50.585036 Writing SMRR. base = 0x7b800006, mask=0xff800c00
704 12:50:50.585463 Relocation complete.
705 12:50:50.591418 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
706 12:50:50.595004 In relocation handler: CPU 5
707 12:50:50.601636 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
708 12:50:50.602093 Relocation complete.
709 12:50:50.604942 Initializing CPU #0
710 12:50:50.608470 CPU: vendor Intel device 906a4
711 12:50:50.611822 CPU: family 06, model 9a, stepping 04
712 12:50:50.615138 Clearing out pending MCEs
713 12:50:50.618871 cpu: energy policy set to 7
714 12:50:50.619312 Turbo is available but hidden
715 12:50:50.621966 Turbo is available and visible
716 12:50:50.628763 microcode: Update skipped, already up-to-date
717 12:50:50.629197 CPU #0 initialized
718 12:50:50.631638 Initializing CPU #6
719 12:50:50.635329 Initializing CPU #4
720 12:50:50.635894 Initializing CPU #1
721 12:50:50.638524 CPU: vendor Intel device 906a4
722 12:50:50.641821 CPU: family 06, model 9a, stepping 04
723 12:50:50.645454 Initializing CPU #5
724 12:50:50.646062 Initializing CPU #3
725 12:50:50.648548 Clearing out pending MCEs
726 12:50:50.652022 CPU: vendor Intel device 906a4
727 12:50:50.655511 CPU: family 06, model 9a, stepping 04
728 12:50:50.658683 Initializing CPU #2
729 12:50:50.662050 Clearing out pending MCEs
730 12:50:50.665288 CPU: vendor Intel device 906a4
731 12:50:50.668457 CPU: family 06, model 9a, stepping 04
732 12:50:50.672027 cpu: energy policy set to 7
733 12:50:50.672627 cpu: energy policy set to 7
734 12:50:50.678801 microcode: Update skipped, already up-to-date
735 12:50:50.679341 CPU #4 initialized
736 12:50:50.681924 CPU: vendor Intel device 906a4
737 12:50:50.685698 CPU: family 06, model 9a, stepping 04
738 12:50:50.692201 microcode: Update skipped, already up-to-date
739 12:50:50.692607 CPU #1 initialized
740 12:50:50.695035 Clearing out pending MCEs
741 12:50:50.698675 Clearing out pending MCEs
742 12:50:50.702108 cpu: energy policy set to 7
743 12:50:50.702222 Initializing CPU #7
744 12:50:50.705034 cpu: energy policy set to 7
745 12:50:50.708627 CPU: vendor Intel device 906a4
746 12:50:50.711720 CPU: family 06, model 9a, stepping 04
747 12:50:50.718734 microcode: Update skipped, already up-to-date
748 12:50:50.718819 CPU #2 initialized
749 12:50:50.721821 CPU: vendor Intel device 906a4
750 12:50:50.725368 CPU: family 06, model 9a, stepping 04
751 12:50:50.731686 microcode: Update skipped, already up-to-date
752 12:50:50.731797 CPU #3 initialized
753 12:50:50.735348 Clearing out pending MCEs
754 12:50:50.738752 Clearing out pending MCEs
755 12:50:50.742385 CPU: vendor Intel device 906a4
756 12:50:50.745232 CPU: family 06, model 9a, stepping 04
757 12:50:50.748621 cpu: energy policy set to 7
758 12:50:50.752429 cpu: energy policy set to 7
759 12:50:50.752538 Clearing out pending MCEs
760 12:50:50.758873 microcode: Update skipped, already up-to-date
761 12:50:50.758977 CPU #7 initialized
762 12:50:50.762170 cpu: energy policy set to 7
763 12:50:50.769001 microcode: Update skipped, already up-to-date
764 12:50:50.769095 CPU #6 initialized
765 12:50:50.775545 microcode: Update skipped, already up-to-date
766 12:50:50.775657 CPU #5 initialized
767 12:50:50.778951 bsp_do_flight_plan done after 697 msecs.
768 12:50:50.782464 CPU: frequency set to 4400 MHz
769 12:50:50.785680 Enabling SMIs.
770 12:50:50.792095 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms
771 12:50:50.807705 Probing TPM I2C: done! DID_VID 0x00281ae0
772 12:50:50.810616 Locality already claimed
773 12:50:50.814052 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
774 12:50:50.825654 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
775 12:50:50.829280 Enabling GPIO PM b/c CR50 has long IRQ pulse support
776 12:50:50.835673 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
777 12:50:50.842805 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
778 12:50:50.846056 Found a VBT of 9216 bytes after decompression
779 12:50:50.849685 PCI 1.0, PIN A, using IRQ #16
780 12:50:50.852736 PCI 2.0, PIN A, using IRQ #17
781 12:50:50.856746 PCI 4.0, PIN A, using IRQ #18
782 12:50:50.859583 PCI 5.0, PIN A, using IRQ #16
783 12:50:50.862879 PCI 6.0, PIN A, using IRQ #16
784 12:50:50.866527 PCI 6.2, PIN C, using IRQ #18
785 12:50:50.869034 PCI 7.0, PIN A, using IRQ #19
786 12:50:50.872267 PCI 7.1, PIN B, using IRQ #20
787 12:50:50.875766 PCI 7.2, PIN C, using IRQ #21
788 12:50:50.879144 PCI 7.3, PIN D, using IRQ #22
789 12:50:50.882619 PCI 8.0, PIN A, using IRQ #23
790 12:50:50.882709 PCI D.0, PIN A, using IRQ #17
791 12:50:50.885836 PCI D.1, PIN B, using IRQ #19
792 12:50:50.889388 PCI 10.0, PIN A, using IRQ #24
793 12:50:50.892913 PCI 10.1, PIN B, using IRQ #25
794 12:50:50.896002 PCI 10.6, PIN C, using IRQ #20
795 12:50:50.899381 PCI 10.7, PIN D, using IRQ #21
796 12:50:50.902981 PCI 11.0, PIN A, using IRQ #26
797 12:50:50.905990 PCI 11.1, PIN B, using IRQ #27
798 12:50:50.909394 PCI 11.2, PIN C, using IRQ #28
799 12:50:50.912697 PCI 11.3, PIN D, using IRQ #29
800 12:50:50.916419 PCI 12.0, PIN A, using IRQ #30
801 12:50:50.919701 PCI 12.6, PIN B, using IRQ #31
802 12:50:50.922728 PCI 12.7, PIN C, using IRQ #22
803 12:50:50.926369 PCI 13.0, PIN A, using IRQ #32
804 12:50:50.926473 PCI 13.1, PIN B, using IRQ #33
805 12:50:50.929297 PCI 13.2, PIN C, using IRQ #34
806 12:50:50.932806 PCI 13.3, PIN D, using IRQ #35
807 12:50:50.935978 PCI 14.0, PIN B, using IRQ #23
808 12:50:50.939606 PCI 14.1, PIN A, using IRQ #36
809 12:50:50.942737 PCI 14.3, PIN C, using IRQ #17
810 12:50:50.945855 PCI 15.0, PIN A, using IRQ #37
811 12:50:50.949353 PCI 15.1, PIN B, using IRQ #38
812 12:50:50.952902 PCI 15.2, PIN C, using IRQ #39
813 12:50:50.956037 PCI 15.3, PIN D, using IRQ #40
814 12:50:50.959684 PCI 16.0, PIN A, using IRQ #18
815 12:50:50.962878 PCI 16.1, PIN B, using IRQ #19
816 12:50:50.966222 PCI 16.2, PIN C, using IRQ #20
817 12:50:50.969485 PCI 16.3, PIN D, using IRQ #21
818 12:50:50.972843 PCI 16.4, PIN A, using IRQ #18
819 12:50:50.976031 PCI 16.5, PIN B, using IRQ #19
820 12:50:50.976113 PCI 17.0, PIN A, using IRQ #22
821 12:50:50.979506 PCI 19.0, PIN A, using IRQ #41
822 12:50:50.982979 PCI 19.1, PIN B, using IRQ #42
823 12:50:50.986122 PCI 19.2, PIN C, using IRQ #43
824 12:50:50.989374 PCI 1C.0, PIN A, using IRQ #16
825 12:50:50.992920 PCI 1C.1, PIN B, using IRQ #17
826 12:50:50.996200 PCI 1C.2, PIN C, using IRQ #18
827 12:50:50.999592 PCI 1C.3, PIN D, using IRQ #19
828 12:50:51.002811 PCI 1C.4, PIN A, using IRQ #16
829 12:50:51.006347 PCI 1C.5, PIN B, using IRQ #17
830 12:50:51.009736 PCI 1C.6, PIN C, using IRQ #18
831 12:50:51.012826 PCI 1C.7, PIN D, using IRQ #19
832 12:50:51.016165 PCI 1D.0, PIN A, using IRQ #16
833 12:50:51.020031 PCI 1D.1, PIN B, using IRQ #17
834 12:50:51.023180 PCI 1D.2, PIN C, using IRQ #18
835 12:50:51.023278 PCI 1D.3, PIN D, using IRQ #19
836 12:50:51.026207 PCI 1E.0, PIN A, using IRQ #23
837 12:50:51.029763 PCI 1E.1, PIN B, using IRQ #20
838 12:50:51.033006 PCI 1E.2, PIN C, using IRQ #44
839 12:50:51.036433 PCI 1E.3, PIN D, using IRQ #45
840 12:50:51.039647 PCI 1F.3, PIN B, using IRQ #22
841 12:50:51.042932 PCI 1F.4, PIN C, using IRQ #23
842 12:50:51.046357 PCI 1F.6, PIN D, using IRQ #20
843 12:50:51.049532 PCI 1F.7, PIN A, using IRQ #21
844 12:50:51.052951 IRQ: Using dynamically assigned PCI IO-APIC IRQs
845 12:50:51.062976 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
846 12:50:51.243783 FSPS returned 0
847 12:50:51.247083 Executing Phase 1 of FspMultiPhaseSiInit
848 12:50:51.257087 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
849 12:50:51.260655 port C0 DISC req: usage 1 usb3 1 usb2 1
850 12:50:51.263962 Raw Buffer output 0 00000111
851 12:50:51.267194 Raw Buffer output 1 00000000
852 12:50:51.270948 pmc_send_ipc_cmd succeeded
853 12:50:51.277680 port C1 DISC req: usage 1 usb3 3 usb2 3
854 12:50:51.277763 Raw Buffer output 0 00000331
855 12:50:51.280656 Raw Buffer output 1 00000000
856 12:50:51.285035 pmc_send_ipc_cmd succeeded
857 12:50:51.288826 Detected 6 core, 8 thread CPU.
858 12:50:51.291889 Detected 6 core, 8 thread CPU.
859 12:50:51.297523 Detected 6 core, 8 thread CPU.
860 12:50:51.300662 Detected 6 core, 8 thread CPU.
861 12:50:51.303980 Detected 6 core, 8 thread CPU.
862 12:50:51.307555 Detected 6 core, 8 thread CPU.
863 12:50:51.310533 Detected 6 core, 8 thread CPU.
864 12:50:51.314292 Detected 6 core, 8 thread CPU.
865 12:50:51.317679 Detected 6 core, 8 thread CPU.
866 12:50:51.320973 Detected 6 core, 8 thread CPU.
867 12:50:51.323991 Detected 6 core, 8 thread CPU.
868 12:50:51.327894 Detected 6 core, 8 thread CPU.
869 12:50:51.331007 Detected 6 core, 8 thread CPU.
870 12:50:51.334666 Detected 6 core, 8 thread CPU.
871 12:50:51.337892 Detected 6 core, 8 thread CPU.
872 12:50:51.341135 Detected 6 core, 8 thread CPU.
873 12:50:51.344524 Detected 6 core, 8 thread CPU.
874 12:50:51.347809 Detected 6 core, 8 thread CPU.
875 12:50:51.347916 Detected 6 core, 8 thread CPU.
876 12:50:51.351404 Detected 6 core, 8 thread CPU.
877 12:50:51.354615 Detected 6 core, 8 thread CPU.
878 12:50:51.357882 Detected 6 core, 8 thread CPU.
879 12:50:51.649980 Detected 6 core, 8 thread CPU.
880 12:50:51.653654 Detected 6 core, 8 thread CPU.
881 12:50:51.656816 Detected 6 core, 8 thread CPU.
882 12:50:51.660168 Detected 6 core, 8 thread CPU.
883 12:50:51.663259 Detected 6 core, 8 thread CPU.
884 12:50:51.667177 Detected 6 core, 8 thread CPU.
885 12:50:51.670144 Detected 6 core, 8 thread CPU.
886 12:50:51.673209 Detected 6 core, 8 thread CPU.
887 12:50:51.677123 Detected 6 core, 8 thread CPU.
888 12:50:51.680042 Detected 6 core, 8 thread CPU.
889 12:50:51.683488 Detected 6 core, 8 thread CPU.
890 12:50:51.686848 Detected 6 core, 8 thread CPU.
891 12:50:51.690334 Detected 6 core, 8 thread CPU.
892 12:50:51.693454 Detected 6 core, 8 thread CPU.
893 12:50:51.696813 Detected 6 core, 8 thread CPU.
894 12:50:51.700510 Detected 6 core, 8 thread CPU.
895 12:50:51.703784 Detected 6 core, 8 thread CPU.
896 12:50:51.703890 Detected 6 core, 8 thread CPU.
897 12:50:51.706852 Detected 6 core, 8 thread CPU.
898 12:50:51.710055 Detected 6 core, 8 thread CPU.
899 12:50:51.713532 Display FSP Version Info HOB
900 12:50:51.716871 Reference Code - CPU = c.0.65.70
901 12:50:51.720220 uCode Version = 0.0.4.23
902 12:50:51.723480 TXT ACM version = ff.ff.ff.ffff
903 12:50:51.727005 Reference Code - ME = c.0.65.70
904 12:50:51.730477 MEBx version = 0.0.0.0
905 12:50:51.733895 ME Firmware Version = Lite SKU
906 12:50:51.736851 Reference Code - PCH = c.0.65.70
907 12:50:51.736946 PCH-CRID Status = Disabled
908 12:50:51.743462 PCH-CRID Original Value = ff.ff.ff.ffff
909 12:50:51.747170 PCH-CRID New Value = ff.ff.ff.ffff
910 12:50:51.750475 OPROM - RST - RAID = ff.ff.ff.ffff
911 12:50:51.753993 PCH Hsio Version = 4.0.0.0
912 12:50:51.756860 Reference Code - SA - System Agent = c.0.65.70
913 12:50:51.760539 Reference Code - MRC = 0.0.3.80
914 12:50:51.763673 SA - PCIe Version = c.0.65.70
915 12:50:51.767355 SA-CRID Status = Disabled
916 12:50:51.770487 SA-CRID Original Value = 0.0.0.4
917 12:50:51.773865 SA-CRID New Value = 0.0.0.4
918 12:50:51.774067 OPROM - VBIOS = ff.ff.ff.ffff
919 12:50:51.780913 IO Manageability Engine FW Version = 24.0.4.0
920 12:50:51.783978 PHY Build Version = 0.0.0.2016
921 12:50:51.787549 Thunderbolt(TM) FW Version = 0.0.0.0
922 12:50:51.793998 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
923 12:50:51.800603 BS: BS_DEV_INIT_CHIPS run times (exec / console): 493 / 507 ms
924 12:50:51.800842 Enumerating buses...
925 12:50:51.807448 Show all devs... Before device enumeration.
926 12:50:51.807743 Root Device: enabled 1
927 12:50:51.810894 CPU_CLUSTER: 0: enabled 1
928 12:50:51.814120 DOMAIN: 0000: enabled 1
929 12:50:51.814414 GPIO: 0: enabled 1
930 12:50:51.817770 PCI: 00:00.0: enabled 1
931 12:50:51.820920 PCI: 00:01.0: enabled 0
932 12:50:51.824214 PCI: 00:01.1: enabled 0
933 12:50:51.824539 PCI: 00:02.0: enabled 1
934 12:50:51.827368 PCI: 00:04.0: enabled 1
935 12:50:51.830536 PCI: 00:05.0: enabled 0
936 12:50:51.834366 PCI: 00:06.0: enabled 1
937 12:50:51.834819 PCI: 00:06.2: enabled 0
938 12:50:51.837543 PCI: 00:07.0: enabled 0
939 12:50:51.840776 PCI: 00:07.1: enabled 0
940 12:50:51.841177 PCI: 00:07.2: enabled 0
941 12:50:51.844291 PCI: 00:07.3: enabled 0
942 12:50:51.847607 PCI: 00:08.0: enabled 0
943 12:50:51.850882 PCI: 00:09.0: enabled 0
944 12:50:51.851184 PCI: 00:0a.0: enabled 1
945 12:50:51.854173 PCI: 00:0d.0: enabled 1
946 12:50:51.857498 PCI: 00:0d.1: enabled 0
947 12:50:51.861071 PCI: 00:0d.2: enabled 0
948 12:50:51.861372 PCI: 00:0d.3: enabled 0
949 12:50:51.864424 PCI: 00:0e.0: enabled 0
950 12:50:51.867521 PCI: 00:10.0: enabled 0
951 12:50:51.867822 PCI: 00:10.1: enabled 0
952 12:50:51.870959 PCI: 00:10.6: enabled 0
953 12:50:51.874216 PCI: 00:10.7: enabled 0
954 12:50:51.877322 PCI: 00:12.0: enabled 0
955 12:50:51.877634 PCI: 00:12.6: enabled 0
956 12:50:51.881217 PCI: 00:12.7: enabled 0
957 12:50:51.884372 PCI: 00:13.0: enabled 0
958 12:50:51.887806 PCI: 00:14.0: enabled 1
959 12:50:51.888174 PCI: 00:14.1: enabled 0
960 12:50:51.891121 PCI: 00:14.2: enabled 1
961 12:50:51.894345 PCI: 00:14.3: enabled 1
962 12:50:51.897939 PCI: 00:15.0: enabled 1
963 12:50:51.898323 PCI: 00:15.1: enabled 1
964 12:50:51.901289 PCI: 00:15.2: enabled 0
965 12:50:51.904434 PCI: 00:15.3: enabled 1
966 12:50:51.904735 PCI: 00:16.0: enabled 1
967 12:50:51.907836 PCI: 00:16.1: enabled 0
968 12:50:51.911006 PCI: 00:16.2: enabled 0
969 12:50:51.914155 PCI: 00:16.3: enabled 0
970 12:50:51.914236 PCI: 00:16.4: enabled 0
971 12:50:51.917375 PCI: 00:16.5: enabled 0
972 12:50:51.920677 PCI: 00:17.0: enabled 1
973 12:50:51.924446 PCI: 00:19.0: enabled 0
974 12:50:51.924529 PCI: 00:19.1: enabled 1
975 12:50:51.927605 PCI: 00:19.2: enabled 0
976 12:50:51.930709 PCI: 00:1a.0: enabled 0
977 12:50:51.930791 PCI: 00:1c.0: enabled 0
978 12:50:51.934295 PCI: 00:1c.1: enabled 0
979 12:50:51.937805 PCI: 00:1c.2: enabled 0
980 12:50:51.940986 PCI: 00:1c.3: enabled 0
981 12:50:51.941069 PCI: 00:1c.4: enabled 0
982 12:50:51.944399 PCI: 00:1c.5: enabled 0
983 12:50:51.947763 PCI: 00:1c.6: enabled 0
984 12:50:51.951210 PCI: 00:1c.7: enabled 0
985 12:50:51.951292 PCI: 00:1d.0: enabled 0
986 12:50:51.954446 PCI: 00:1d.1: enabled 0
987 12:50:51.957612 PCI: 00:1d.2: enabled 0
988 12:50:51.961158 PCI: 00:1d.3: enabled 0
989 12:50:51.961241 PCI: 00:1e.0: enabled 1
990 12:50:51.964153 PCI: 00:1e.1: enabled 0
991 12:50:51.967370 PCI: 00:1e.2: enabled 0
992 12:50:51.967452 PCI: 00:1e.3: enabled 1
993 12:50:51.971182 PCI: 00:1f.0: enabled 1
994 12:50:51.974265 PCI: 00:1f.1: enabled 0
995 12:50:51.977614 PCI: 00:1f.2: enabled 1
996 12:50:51.977697 PCI: 00:1f.3: enabled 1
997 12:50:51.981188 PCI: 00:1f.4: enabled 0
998 12:50:51.984582 PCI: 00:1f.5: enabled 1
999 12:50:51.987472 PCI: 00:1f.6: enabled 0
1000 12:50:51.987553 PCI: 00:1f.7: enabled 0
1001 12:50:51.990905 GENERIC: 0.0: enabled 1
1002 12:50:51.994361 GENERIC: 0.0: enabled 1
1003 12:50:51.994442 GENERIC: 1.0: enabled 1
1004 12:50:51.997816 GENERIC: 0.0: enabled 1
1005 12:50:52.000980 GENERIC: 1.0: enabled 1
1006 12:50:52.004526 USB0 port 0: enabled 1
1007 12:50:52.004609 USB0 port 0: enabled 1
1008 12:50:52.007759 GENERIC: 0.0: enabled 1
1009 12:50:52.011130 I2C: 00:1a: enabled 1
1010 12:50:52.011240 I2C: 00:31: enabled 1
1011 12:50:52.014489 I2C: 00:32: enabled 1
1012 12:50:52.017993 I2C: 00:50: enabled 1
1013 12:50:52.018107 I2C: 00:10: enabled 1
1014 12:50:52.021030 I2C: 00:15: enabled 1
1015 12:50:52.024517 I2C: 00:2c: enabled 1
1016 12:50:52.024597 GENERIC: 0.0: enabled 1
1017 12:50:52.027657 SPI: 00: enabled 1
1018 12:50:52.031404 PNP: 0c09.0: enabled 1
1019 12:50:52.031494 GENERIC: 0.0: enabled 1
1020 12:50:52.034834 USB3 port 0: enabled 1
1021 12:50:52.037843 USB3 port 1: enabled 0
1022 12:50:52.041632 USB3 port 2: enabled 1
1023 12:50:52.041728 USB3 port 3: enabled 0
1024 12:50:52.044420 USB2 port 0: enabled 1
1025 12:50:52.047943 USB2 port 1: enabled 0
1026 12:50:52.048019 USB2 port 2: enabled 1
1027 12:50:52.051427 USB2 port 3: enabled 0
1028 12:50:52.054406 USB2 port 4: enabled 0
1029 12:50:52.058190 USB2 port 5: enabled 1
1030 12:50:52.058263 USB2 port 6: enabled 0
1031 12:50:52.061286 USB2 port 7: enabled 0
1032 12:50:52.064559 USB2 port 8: enabled 1
1033 12:50:52.064656 USB2 port 9: enabled 1
1034 12:50:52.067796 USB3 port 0: enabled 1
1035 12:50:52.071245 USB3 port 1: enabled 0
1036 12:50:52.071327 USB3 port 2: enabled 0
1037 12:50:52.074568 USB3 port 3: enabled 0
1038 12:50:52.078082 GENERIC: 0.0: enabled 1
1039 12:50:52.081384 GENERIC: 1.0: enabled 1
1040 12:50:52.081464 APIC: 00: enabled 1
1041 12:50:52.084897 APIC: 14: enabled 1
1042 12:50:52.084971 APIC: 16: enabled 1
1043 12:50:52.088274 APIC: 10: enabled 1
1044 12:50:52.091710 APIC: 12: enabled 1
1045 12:50:52.091782 APIC: 09: enabled 1
1046 12:50:52.094801 APIC: 01: enabled 1
1047 12:50:52.094876 APIC: 08: enabled 1
1048 12:50:52.098240 Compare with tree...
1049 12:50:52.101545 Root Device: enabled 1
1050 12:50:52.104690 CPU_CLUSTER: 0: enabled 1
1051 12:50:52.104763 APIC: 00: enabled 1
1052 12:50:52.108111 APIC: 14: enabled 1
1053 12:50:52.111334 APIC: 16: enabled 1
1054 12:50:52.111409 APIC: 10: enabled 1
1055 12:50:52.114828 APIC: 12: enabled 1
1056 12:50:52.118368 APIC: 09: enabled 1
1057 12:50:52.118517 APIC: 01: enabled 1
1058 12:50:52.121842 APIC: 08: enabled 1
1059 12:50:52.124917 DOMAIN: 0000: enabled 1
1060 12:50:52.124991 GPIO: 0: enabled 1
1061 12:50:52.128157 PCI: 00:00.0: enabled 1
1062 12:50:52.131552 PCI: 00:01.0: enabled 0
1063 12:50:52.134864 PCI: 00:01.1: enabled 0
1064 12:50:52.138527 PCI: 00:02.0: enabled 1
1065 12:50:52.138640 PCI: 00:04.0: enabled 1
1066 12:50:52.141675 GENERIC: 0.0: enabled 1
1067 12:50:52.144691 PCI: 00:05.0: enabled 0
1068 12:50:52.148295 PCI: 00:06.0: enabled 1
1069 12:50:52.151543 PCI: 00:06.2: enabled 0
1070 12:50:52.151628 PCI: 00:08.0: enabled 0
1071 12:50:52.154856 PCI: 00:09.0: enabled 0
1072 12:50:52.158390 PCI: 00:0a.0: enabled 1
1073 12:50:52.161615 PCI: 00:0d.0: enabled 1
1074 12:50:52.164860 USB0 port 0: enabled 1
1075 12:50:52.164932 USB3 port 0: enabled 1
1076 12:50:52.168117 USB3 port 1: enabled 0
1077 12:50:52.171669 USB3 port 2: enabled 1
1078 12:50:52.175051 USB3 port 3: enabled 0
1079 12:50:52.178239 PCI: 00:0d.1: enabled 0
1080 12:50:52.178323 PCI: 00:0d.2: enabled 0
1081 12:50:52.181800 PCI: 00:0d.3: enabled 0
1082 12:50:52.184843 PCI: 00:0e.0: enabled 0
1083 12:50:52.188509 PCI: 00:10.0: enabled 0
1084 12:50:52.191972 PCI: 00:10.1: enabled 0
1085 12:50:52.192045 PCI: 00:10.6: enabled 0
1086 12:50:52.194797 PCI: 00:10.7: enabled 0
1087 12:50:52.198499 PCI: 00:12.0: enabled 0
1088 12:50:52.201538 PCI: 00:12.6: enabled 0
1089 12:50:52.201619 PCI: 00:12.7: enabled 0
1090 12:50:52.204945 PCI: 00:13.0: enabled 0
1091 12:50:52.208440 PCI: 00:14.0: enabled 1
1092 12:50:52.211364 USB0 port 0: enabled 1
1093 12:50:52.215103 USB2 port 0: enabled 1
1094 12:50:52.218148 USB2 port 1: enabled 0
1095 12:50:52.218252 USB2 port 2: enabled 1
1096 12:50:52.221680 USB2 port 3: enabled 0
1097 12:50:52.224898 USB2 port 4: enabled 0
1098 12:50:52.228416 USB2 port 5: enabled 1
1099 12:50:52.231611 USB2 port 6: enabled 0
1100 12:50:52.231693 USB2 port 7: enabled 0
1101 12:50:52.235126 USB2 port 8: enabled 1
1102 12:50:52.238198 USB2 port 9: enabled 1
1103 12:50:52.241720 USB3 port 0: enabled 1
1104 12:50:52.244785 USB3 port 1: enabled 0
1105 12:50:52.248235 USB3 port 2: enabled 0
1106 12:50:52.248316 USB3 port 3: enabled 0
1107 12:50:52.251849 PCI: 00:14.1: enabled 0
1108 12:50:52.255284 PCI: 00:14.2: enabled 1
1109 12:50:52.258729 PCI: 00:14.3: enabled 1
1110 12:50:52.258811 GENERIC: 0.0: enabled 1
1111 12:50:52.261939 PCI: 00:15.0: enabled 1
1112 12:50:52.264977 I2C: 00:1a: enabled 1
1113 12:50:52.268336 I2C: 00:31: enabled 1
1114 12:50:52.271774 I2C: 00:32: enabled 1
1115 12:50:52.271856 PCI: 00:15.1: enabled 1
1116 12:50:52.275179 I2C: 00:50: enabled 1
1117 12:50:52.278691 PCI: 00:15.2: enabled 0
1118 12:50:52.281891 PCI: 00:15.3: enabled 1
1119 12:50:52.281971 I2C: 00:10: enabled 1
1120 12:50:52.285174 PCI: 00:16.0: enabled 1
1121 12:50:52.288414 PCI: 00:16.1: enabled 0
1122 12:50:52.291898 PCI: 00:16.2: enabled 0
1123 12:50:52.295157 PCI: 00:16.3: enabled 0
1124 12:50:52.295238 PCI: 00:16.4: enabled 0
1125 12:50:52.298586 PCI: 00:16.5: enabled 0
1126 12:50:52.301727 PCI: 00:17.0: enabled 1
1127 12:50:52.305026 PCI: 00:19.0: enabled 0
1128 12:50:52.308535 PCI: 00:19.1: enabled 1
1129 12:50:52.308616 I2C: 00:15: enabled 1
1130 12:50:52.311672 I2C: 00:2c: enabled 1
1131 12:50:52.314821 PCI: 00:19.2: enabled 0
1132 12:50:52.318519 PCI: 00:1a.0: enabled 0
1133 12:50:52.322212 PCI: 00:1e.0: enabled 1
1134 12:50:52.322320 PCI: 00:1e.1: enabled 0
1135 12:50:52.325374 PCI: 00:1e.2: enabled 0
1136 12:50:52.328348 PCI: 00:1e.3: enabled 1
1137 12:50:52.331708 SPI: 00: enabled 1
1138 12:50:52.331779 PCI: 00:1f.0: enabled 1
1139 12:50:52.335203 PNP: 0c09.0: enabled 1
1140 12:50:52.338389 PCI: 00:1f.1: enabled 0
1141 12:50:52.342065 PCI: 00:1f.2: enabled 1
1142 12:50:52.345120 GENERIC: 0.0: enabled 1
1143 12:50:52.345202 GENERIC: 0.0: enabled 1
1144 12:50:52.348513 GENERIC: 1.0: enabled 1
1145 12:50:52.351572 PCI: 00:1f.3: enabled 1
1146 12:50:52.355058 PCI: 00:1f.4: enabled 0
1147 12:50:52.358620 PCI: 00:1f.5: enabled 1
1148 12:50:52.358746 PCI: 00:1f.6: enabled 0
1149 12:50:52.361689 PCI: 00:1f.7: enabled 0
1150 12:50:52.365217 Root Device scanning...
1151 12:50:52.368274 scan_static_bus for Root Device
1152 12:50:52.371833 CPU_CLUSTER: 0 enabled
1153 12:50:52.371940 DOMAIN: 0000 enabled
1154 12:50:52.375299 DOMAIN: 0000 scanning...
1155 12:50:52.378373 PCI: pci_scan_bus for bus 00
1156 12:50:52.382140 PCI: 00:00.0 [8086/0000] ops
1157 12:50:52.385415 PCI: 00:00.0 [8086/4609] enabled
1158 12:50:52.388778 PCI: 00:02.0 [8086/0000] bus ops
1159 12:50:52.392115 PCI: 00:02.0 [8086/46b3] enabled
1160 12:50:52.395339 PCI: 00:04.0 [8086/0000] bus ops
1161 12:50:52.398698 PCI: 00:04.0 [8086/461d] enabled
1162 12:50:52.401907 PCI: 00:06.0 [8086/0000] bus ops
1163 12:50:52.405285 PCI: 00:06.0 [8086/464d] enabled
1164 12:50:52.408904 PCI: 00:08.0 [8086/464f] disabled
1165 12:50:52.412070 PCI: 00:0a.0 [8086/467d] enabled
1166 12:50:52.415397 PCI: 00:0d.0 [8086/0000] bus ops
1167 12:50:52.418794 PCI: 00:0d.0 [8086/461e] enabled
1168 12:50:52.422071 PCI: 00:14.0 [8086/0000] bus ops
1169 12:50:52.425327 PCI: 00:14.0 [8086/51ed] enabled
1170 12:50:52.429120 PCI: 00:14.2 [8086/51ef] enabled
1171 12:50:52.432288 PCI: 00:14.3 [8086/0000] bus ops
1172 12:50:52.435680 PCI: 00:14.3 [8086/51f0] enabled
1173 12:50:52.439164 PCI: 00:15.0 [8086/0000] bus ops
1174 12:50:52.442218 PCI: 00:15.0 [8086/51e8] enabled
1175 12:50:52.445342 PCI: 00:15.1 [8086/0000] bus ops
1176 12:50:52.448732 PCI: 00:15.1 [8086/51e9] enabled
1177 12:50:52.452288 PCI: 00:15.2 [8086/0000] bus ops
1178 12:50:52.455308 PCI: 00:15.2 [8086/51ea] disabled
1179 12:50:52.458806 PCI: 00:15.3 [8086/0000] bus ops
1180 12:50:52.462253 PCI: 00:15.3 [8086/51eb] enabled
1181 12:50:52.465487 PCI: 00:16.0 [8086/0000] ops
1182 12:50:52.468651 PCI: 00:16.0 [8086/51e0] enabled
1183 12:50:52.475755 PCI: Static device PCI: 00:17.0 not found, disabling it.
1184 12:50:52.478842 PCI: 00:19.0 [8086/0000] bus ops
1185 12:50:52.482123 PCI: 00:19.0 [8086/51c5] disabled
1186 12:50:52.485384 PCI: 00:19.1 [8086/0000] bus ops
1187 12:50:52.489034 PCI: 00:19.1 [8086/51c6] enabled
1188 12:50:52.492150 PCI: 00:1e.0 [8086/0000] ops
1189 12:50:52.495761 PCI: 00:1e.0 [8086/51a8] enabled
1190 12:50:52.499048 PCI: 00:1e.3 [8086/0000] bus ops
1191 12:50:52.502697 PCI: 00:1e.3 [8086/51ab] enabled
1192 12:50:52.506033 PCI: 00:1f.0 [8086/0000] bus ops
1193 12:50:52.508845 PCI: 00:1f.0 [8086/5182] enabled
1194 12:50:52.508948 RTC Init
1195 12:50:52.512167 Set power on after power failure.
1196 12:50:52.515757 Disabling Deep S3
1197 12:50:52.515858 Disabling Deep S3
1198 12:50:52.519394 Disabling Deep S4
1199 12:50:52.522514 Disabling Deep S4
1200 12:50:52.522646 Disabling Deep S5
1201 12:50:52.525675 Disabling Deep S5
1202 12:50:52.529285 PCI: 00:1f.2 [0000/0000] hidden
1203 12:50:52.532242 PCI: 00:1f.3 [8086/0000] bus ops
1204 12:50:52.535948 PCI: 00:1f.3 [8086/51c8] enabled
1205 12:50:52.539052 PCI: 00:1f.5 [8086/0000] bus ops
1206 12:50:52.542542 PCI: 00:1f.5 [8086/51a4] enabled
1207 12:50:52.542665 GPIO: 0 enabled
1208 12:50:52.545914 PCI: Leftover static devices:
1209 12:50:52.545995 PCI: 00:01.0
1210 12:50:52.549829 PCI: 00:01.1
1211 12:50:52.549919 PCI: 00:05.0
1212 12:50:52.552591 PCI: 00:06.2
1213 12:50:52.552679 PCI: 00:09.0
1214 12:50:52.552748 PCI: 00:0d.1
1215 12:50:52.556052 PCI: 00:0d.2
1216 12:50:52.556172 PCI: 00:0d.3
1217 12:50:52.559236 PCI: 00:0e.0
1218 12:50:52.559350 PCI: 00:10.0
1219 12:50:52.559428 PCI: 00:10.1
1220 12:50:52.562662 PCI: 00:10.6
1221 12:50:52.562758 PCI: 00:10.7
1222 12:50:52.566251 PCI: 00:12.0
1223 12:50:52.566389 PCI: 00:12.6
1224 12:50:52.569465 PCI: 00:12.7
1225 12:50:52.569573 PCI: 00:13.0
1226 12:50:52.569663 PCI: 00:14.1
1227 12:50:52.572904 PCI: 00:16.1
1228 12:50:52.573077 PCI: 00:16.2
1229 12:50:52.575981 PCI: 00:16.3
1230 12:50:52.576118 PCI: 00:16.4
1231 12:50:52.576229 PCI: 00:16.5
1232 12:50:52.579436 PCI: 00:17.0
1233 12:50:52.579580 PCI: 00:19.2
1234 12:50:52.582846 PCI: 00:1a.0
1235 12:50:52.582996 PCI: 00:1e.1
1236 12:50:52.583123 PCI: 00:1e.2
1237 12:50:52.586054 PCI: 00:1f.1
1238 12:50:52.586226 PCI: 00:1f.4
1239 12:50:52.589581 PCI: 00:1f.6
1240 12:50:52.589755 PCI: 00:1f.7
1241 12:50:52.593008 PCI: Check your devicetree.cb.
1242 12:50:52.596230 PCI: 00:02.0 scanning...
1243 12:50:52.599309 scan_generic_bus for PCI: 00:02.0
1244 12:50:52.602742 scan_generic_bus for PCI: 00:02.0 done
1245 12:50:52.606282 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1246 12:50:52.609490 PCI: 00:04.0 scanning...
1247 12:50:52.612732 scan_generic_bus for PCI: 00:04.0
1248 12:50:52.616158 GENERIC: 0.0 enabled
1249 12:50:52.622740 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1250 12:50:52.626180 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1251 12:50:52.629660 PCI: 00:06.0 scanning...
1252 12:50:52.633033 do_pci_scan_bridge for PCI: 00:06.0
1253 12:50:52.636308 PCI: pci_scan_bus for bus 01
1254 12:50:52.639669 PCI: 01:00.0 [15b7/5009] enabled
1255 12:50:52.643082 Enabling Common Clock Configuration
1256 12:50:52.646425 L1 Sub-State supported from root port 6
1257 12:50:52.650192 L1 Sub-State Support = 0x5
1258 12:50:52.653008 CommonModeRestoreTime = 0x6e
1259 12:50:52.656930 Power On Value = 0x5, Power On Scale = 0x2
1260 12:50:52.657384 ASPM: Enabled L1
1261 12:50:52.663433 PCIe: Max_Payload_Size adjusted to 256
1262 12:50:52.663944 PCI: 01:00.0: Enabled LTR
1263 12:50:52.670394 PCI: 01:00.0: Programmed LTR max latencies
1264 12:50:52.673572 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1265 12:50:52.676811 PCI: 00:0d.0 scanning...
1266 12:50:52.680220 scan_static_bus for PCI: 00:0d.0
1267 12:50:52.684065 USB0 port 0 enabled
1268 12:50:52.684573 USB0 port 0 scanning...
1269 12:50:52.687179 scan_static_bus for USB0 port 0
1270 12:50:52.689979 USB3 port 0 enabled
1271 12:50:52.690634 USB3 port 1 disabled
1272 12:50:52.693696 USB3 port 2 enabled
1273 12:50:52.697070 USB3 port 3 disabled
1274 12:50:52.697603 USB3 port 0 scanning...
1275 12:50:52.700027 scan_static_bus for USB3 port 0
1276 12:50:52.707201 scan_static_bus for USB3 port 0 done
1277 12:50:52.710166 scan_bus: bus USB3 port 0 finished in 6 msecs
1278 12:50:52.713330 USB3 port 2 scanning...
1279 12:50:52.716990 scan_static_bus for USB3 port 2
1280 12:50:52.720109 scan_static_bus for USB3 port 2 done
1281 12:50:52.723886 scan_bus: bus USB3 port 2 finished in 6 msecs
1282 12:50:52.726832 scan_static_bus for USB0 port 0 done
1283 12:50:52.733457 scan_bus: bus USB0 port 0 finished in 43 msecs
1284 12:50:52.736690 scan_static_bus for PCI: 00:0d.0 done
1285 12:50:52.740131 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1286 12:50:52.743496 PCI: 00:14.0 scanning...
1287 12:50:52.746820 scan_static_bus for PCI: 00:14.0
1288 12:50:52.750104 USB0 port 0 enabled
1289 12:50:52.750465 USB0 port 0 scanning...
1290 12:50:52.753428 scan_static_bus for USB0 port 0
1291 12:50:52.756517 USB2 port 0 enabled
1292 12:50:52.760232 USB2 port 1 disabled
1293 12:50:52.760462 USB2 port 2 enabled
1294 12:50:52.763100 USB2 port 3 disabled
1295 12:50:52.763356 USB2 port 4 disabled
1296 12:50:52.766277 USB2 port 5 enabled
1297 12:50:52.769452 USB2 port 6 disabled
1298 12:50:52.769518 USB2 port 7 disabled
1299 12:50:52.772928 USB2 port 8 enabled
1300 12:50:52.776343 USB2 port 9 enabled
1301 12:50:52.776411 USB3 port 0 enabled
1302 12:50:52.779600 USB3 port 1 disabled
1303 12:50:52.782974 USB3 port 2 disabled
1304 12:50:52.783076 USB3 port 3 disabled
1305 12:50:52.786261 USB2 port 0 scanning...
1306 12:50:52.789422 scan_static_bus for USB2 port 0
1307 12:50:52.793162 scan_static_bus for USB2 port 0 done
1308 12:50:52.796393 scan_bus: bus USB2 port 0 finished in 6 msecs
1309 12:50:52.799485 USB2 port 2 scanning...
1310 12:50:52.802793 scan_static_bus for USB2 port 2
1311 12:50:52.806408 scan_static_bus for USB2 port 2 done
1312 12:50:52.813267 scan_bus: bus USB2 port 2 finished in 6 msecs
1313 12:50:52.813341 USB2 port 5 scanning...
1314 12:50:52.816766 scan_static_bus for USB2 port 5
1315 12:50:52.819821 scan_static_bus for USB2 port 5 done
1316 12:50:52.826537 scan_bus: bus USB2 port 5 finished in 6 msecs
1317 12:50:52.826642 USB2 port 8 scanning...
1318 12:50:52.829599 scan_static_bus for USB2 port 8
1319 12:50:52.836238 scan_static_bus for USB2 port 8 done
1320 12:50:52.839881 scan_bus: bus USB2 port 8 finished in 6 msecs
1321 12:50:52.843426 USB2 port 9 scanning...
1322 12:50:52.846394 scan_static_bus for USB2 port 9
1323 12:50:52.849938 scan_static_bus for USB2 port 9 done
1324 12:50:52.853274 scan_bus: bus USB2 port 9 finished in 6 msecs
1325 12:50:52.856613 USB3 port 0 scanning...
1326 12:50:52.859732 scan_static_bus for USB3 port 0
1327 12:50:52.863518 scan_static_bus for USB3 port 0 done
1328 12:50:52.866622 scan_bus: bus USB3 port 0 finished in 6 msecs
1329 12:50:52.870082 scan_static_bus for USB0 port 0 done
1330 12:50:52.876750 scan_bus: bus USB0 port 0 finished in 120 msecs
1331 12:50:52.880047 scan_static_bus for PCI: 00:14.0 done
1332 12:50:52.883406 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1333 12:50:52.886655 PCI: 00:14.3 scanning...
1334 12:50:52.890154 scan_static_bus for PCI: 00:14.3
1335 12:50:52.893858 GENERIC: 0.0 enabled
1336 12:50:52.896808 scan_static_bus for PCI: 00:14.3 done
1337 12:50:52.900045 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1338 12:50:52.903660 PCI: 00:15.0 scanning...
1339 12:50:52.907023 scan_static_bus for PCI: 00:15.0
1340 12:50:52.910344 I2C: 00:1a enabled
1341 12:50:52.910797 I2C: 00:31 enabled
1342 12:50:52.913578 I2C: 00:32 enabled
1343 12:50:52.916779 scan_static_bus for PCI: 00:15.0 done
1344 12:50:52.923449 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1345 12:50:52.923948 PCI: 00:15.1 scanning...
1346 12:50:52.926883 scan_static_bus for PCI: 00:15.1
1347 12:50:52.930041 I2C: 00:50 enabled
1348 12:50:52.933362 scan_static_bus for PCI: 00:15.1 done
1349 12:50:52.937079 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1350 12:50:52.940577 PCI: 00:15.3 scanning...
1351 12:50:52.943450 scan_static_bus for PCI: 00:15.3
1352 12:50:52.947090 I2C: 00:10 enabled
1353 12:50:52.950350 scan_static_bus for PCI: 00:15.3 done
1354 12:50:52.953901 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1355 12:50:52.956843 PCI: 00:19.1 scanning...
1356 12:50:52.960816 scan_static_bus for PCI: 00:19.1
1357 12:50:52.964119 I2C: 00:15 enabled
1358 12:50:52.964530 I2C: 00:2c enabled
1359 12:50:52.966953 scan_static_bus for PCI: 00:19.1 done
1360 12:50:52.973628 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1361 12:50:52.974046 PCI: 00:1e.3 scanning...
1362 12:50:52.977189 scan_generic_bus for PCI: 00:1e.3
1363 12:50:52.980714 SPI: 00 enabled
1364 12:50:52.987147 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1365 12:50:52.990326 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1366 12:50:52.993767 PCI: 00:1f.0 scanning...
1367 12:50:52.996812 scan_static_bus for PCI: 00:1f.0
1368 12:50:53.000374 PNP: 0c09.0 enabled
1369 12:50:53.000815 PNP: 0c09.0 scanning...
1370 12:50:53.003831 scan_static_bus for PNP: 0c09.0
1371 12:50:53.007094 scan_static_bus for PNP: 0c09.0 done
1372 12:50:53.014112 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1373 12:50:53.017172 scan_static_bus for PCI: 00:1f.0 done
1374 12:50:53.020669 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1375 12:50:53.023989 PCI: 00:1f.2 scanning...
1376 12:50:53.027145 scan_static_bus for PCI: 00:1f.2
1377 12:50:53.030481 GENERIC: 0.0 enabled
1378 12:50:53.034109 GENERIC: 0.0 scanning...
1379 12:50:53.034523 scan_static_bus for GENERIC: 0.0
1380 12:50:53.036976 GENERIC: 0.0 enabled
1381 12:50:53.040647 GENERIC: 1.0 enabled
1382 12:50:53.043758 scan_static_bus for GENERIC: 0.0 done
1383 12:50:53.047225 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1384 12:50:53.050348 scan_static_bus for PCI: 00:1f.2 done
1385 12:50:53.057242 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1386 12:50:53.060561 PCI: 00:1f.3 scanning...
1387 12:50:53.063996 scan_static_bus for PCI: 00:1f.3
1388 12:50:53.066981 scan_static_bus for PCI: 00:1f.3 done
1389 12:50:53.070389 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1390 12:50:53.073476 PCI: 00:1f.5 scanning...
1391 12:50:53.077153 scan_generic_bus for PCI: 00:1f.5
1392 12:50:53.080214 scan_generic_bus for PCI: 00:1f.5 done
1393 12:50:53.087064 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1394 12:50:53.090740 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1395 12:50:53.093719 scan_static_bus for Root Device done
1396 12:50:53.100342 scan_bus: bus Root Device finished in 729 msecs
1397 12:50:53.100568 done
1398 12:50:53.107345 BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 1296 ms
1399 12:50:53.110382 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1400 12:50:53.117216 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1401 12:50:53.120397 SPI flash protection: WPSW=0 SRP0=0
1402 12:50:53.127083 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1403 12:50:53.130575 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1404 12:50:53.133804 found VGA at PCI: 00:02.0
1405 12:50:53.137108 Setting up VGA for PCI: 00:02.0
1406 12:50:53.143915 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1407 12:50:53.147463 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1408 12:50:53.150647 Allocating resources...
1409 12:50:53.153505 Reading resources...
1410 12:50:53.157092 Root Device read_resources bus 0 link: 0
1411 12:50:53.160380 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1412 12:50:53.167079 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1413 12:50:53.170507 DOMAIN: 0000 read_resources bus 0 link: 0
1414 12:50:53.177183 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1415 12:50:53.183949 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1416 12:50:53.187292 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1417 12:50:53.193951 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1418 12:50:53.200746 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1419 12:50:53.207406 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1420 12:50:53.213625 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1421 12:50:53.220316 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1422 12:50:53.227260 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1423 12:50:53.234629 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1424 12:50:53.240598 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1425 12:50:53.247314 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1426 12:50:53.250738 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1427 12:50:53.257392 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1428 12:50:53.263987 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1429 12:50:53.270726 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1430 12:50:53.277561 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1431 12:50:53.283897 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1432 12:50:53.290713 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1433 12:50:53.297725 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1434 12:50:53.301522 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1435 12:50:53.307805 PCI: 00:04.0 read_resources bus 1 link: 0
1436 12:50:53.311375 PCI: 00:04.0 read_resources bus 1 link: 0 done
1437 12:50:53.314357 PCI: 00:06.0 read_resources bus 1 link: 0
1438 12:50:53.321177 PCI: 00:06.0 read_resources bus 1 link: 0 done
1439 12:50:53.324812 PCI: 00:0d.0 read_resources bus 0 link: 0
1440 12:50:53.327854 USB0 port 0 read_resources bus 0 link: 0
1441 12:50:53.334283 USB0 port 0 read_resources bus 0 link: 0 done
1442 12:50:53.337879 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1443 12:50:53.341338 PCI: 00:14.0 read_resources bus 0 link: 0
1444 12:50:53.347916 USB0 port 0 read_resources bus 0 link: 0
1445 12:50:53.351467 USB0 port 0 read_resources bus 0 link: 0 done
1446 12:50:53.354568 PCI: 00:14.0 read_resources bus 0 link: 0 done
1447 12:50:53.361521 PCI: 00:14.3 read_resources bus 0 link: 0
1448 12:50:53.364823 PCI: 00:14.3 read_resources bus 0 link: 0 done
1449 12:50:53.368058 PCI: 00:15.0 read_resources bus 0 link: 0
1450 12:50:53.374824 PCI: 00:15.0 read_resources bus 0 link: 0 done
1451 12:50:53.378236 PCI: 00:15.1 read_resources bus 0 link: 0
1452 12:50:53.381258 PCI: 00:15.1 read_resources bus 0 link: 0 done
1453 12:50:53.388176 PCI: 00:15.3 read_resources bus 0 link: 0
1454 12:50:53.391448 PCI: 00:15.3 read_resources bus 0 link: 0 done
1455 12:50:53.394338 PCI: 00:19.1 read_resources bus 0 link: 0
1456 12:50:53.401577 PCI: 00:19.1 read_resources bus 0 link: 0 done
1457 12:50:53.404690 PCI: 00:1e.3 read_resources bus 2 link: 0
1458 12:50:53.411343 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1459 12:50:53.415014 PCI: 00:1f.0 read_resources bus 0 link: 0
1460 12:50:53.417799 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1461 12:50:53.424955 PCI: 00:1f.2 read_resources bus 0 link: 0
1462 12:50:53.428425 GENERIC: 0.0 read_resources bus 0 link: 0
1463 12:50:53.431456 GENERIC: 0.0 read_resources bus 0 link: 0 done
1464 12:50:53.438218 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1465 12:50:53.441294 DOMAIN: 0000 read_resources bus 0 link: 0 done
1466 12:50:53.448077 Root Device read_resources bus 0 link: 0 done
1467 12:50:53.448498 Done reading resources.
1468 12:50:53.454720 Show resources in subtree (Root Device)...After reading.
1469 12:50:53.458567 Root Device child on link 0 CPU_CLUSTER: 0
1470 12:50:53.465071 CPU_CLUSTER: 0 child on link 0 APIC: 00
1471 12:50:53.465507 APIC: 00
1472 12:50:53.465947 APIC: 14
1473 12:50:53.467973 APIC: 16
1474 12:50:53.468406 APIC: 10
1475 12:50:53.471807 APIC: 12
1476 12:50:53.472237 APIC: 09
1477 12:50:53.472677 APIC: 01
1478 12:50:53.475132 APIC: 08
1479 12:50:53.478293 DOMAIN: 0000 child on link 0 GPIO: 0
1480 12:50:53.488329 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1481 12:50:53.498685 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1482 12:50:53.499103 GPIO: 0
1483 12:50:53.499429 PCI: 00:00.0
1484 12:50:53.508234 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1485 12:50:53.518657 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1486 12:50:53.528216 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1487 12:50:53.538604 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1488 12:50:53.544978 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1489 12:50:53.555205 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1490 12:50:53.565219 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1491 12:50:53.574925 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1492 12:50:53.585303 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1493 12:50:53.594783 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1494 12:50:53.605033 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1495 12:50:53.611943 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1496 12:50:53.621664 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1497 12:50:53.631957 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1498 12:50:53.641565 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1499 12:50:53.651415 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1500 12:50:53.658139 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1501 12:50:53.667667 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1502 12:50:53.678189 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1503 12:50:53.688027 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1504 12:50:53.698092 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1505 12:50:53.708075 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1506 12:50:53.717916 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1507 12:50:53.728110 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1508 12:50:53.737904 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1509 12:50:53.744628 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1510 12:50:53.754646 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1511 12:50:53.764762 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1512 12:50:53.764842 PCI: 00:02.0
1513 12:50:53.778312 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1514 12:50:53.788218 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1515 12:50:53.794743 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1516 12:50:53.801735 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1517 12:50:53.811493 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1518 12:50:53.811573 GENERIC: 0.0
1519 12:50:53.814897 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1520 12:50:53.825267 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1521 12:50:53.835146 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1522 12:50:53.845140 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1523 12:50:53.845221 PCI: 01:00.0
1524 12:50:53.854905 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1525 12:50:53.864903 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1526 12:50:53.868437 PCI: 00:08.0
1527 12:50:53.868509 PCI: 00:0a.0
1528 12:50:53.878173 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1529 12:50:53.881752 PCI: 00:0d.0 child on link 0 USB0 port 0
1530 12:50:53.894857 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1531 12:50:53.898111 USB0 port 0 child on link 0 USB3 port 0
1532 12:50:53.898218 USB3 port 0
1533 12:50:53.901627 USB3 port 1
1534 12:50:53.901746 USB3 port 2
1535 12:50:53.904792 USB3 port 3
1536 12:50:53.907992 PCI: 00:14.0 child on link 0 USB0 port 0
1537 12:50:53.918429 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1538 12:50:53.924821 USB0 port 0 child on link 0 USB2 port 0
1539 12:50:53.924904 USB2 port 0
1540 12:50:53.928404 USB2 port 1
1541 12:50:53.928484 USB2 port 2
1542 12:50:53.931509 USB2 port 3
1543 12:50:53.931615 USB2 port 4
1544 12:50:53.935327 USB2 port 5
1545 12:50:53.935413 USB2 port 6
1546 12:50:53.938350 USB2 port 7
1547 12:50:53.938455 USB2 port 8
1548 12:50:53.941850 USB2 port 9
1549 12:50:53.941931 USB3 port 0
1550 12:50:53.945073 USB3 port 1
1551 12:50:53.945182 USB3 port 2
1552 12:50:53.948693 USB3 port 3
1553 12:50:53.948799 PCI: 00:14.2
1554 12:50:53.958487 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1555 12:50:53.968573 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1556 12:50:53.975509 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1557 12:50:53.985465 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1558 12:50:53.985548 GENERIC: 0.0
1559 12:50:53.991911 PCI: 00:15.0 child on link 0 I2C: 00:1a
1560 12:50:53.998565 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1561 12:50:54.001958 I2C: 00:1a
1562 12:50:54.002040 I2C: 00:31
1563 12:50:54.005685 I2C: 00:32
1564 12:50:54.008658 PCI: 00:15.1 child on link 0 I2C: 00:50
1565 12:50:54.018594 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1566 12:50:54.022010 I2C: 00:50
1567 12:50:54.022093 PCI: 00:15.2
1568 12:50:54.025198 PCI: 00:15.3 child on link 0 I2C: 00:10
1569 12:50:54.035487 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1570 12:50:54.038828 I2C: 00:10
1571 12:50:54.038908 PCI: 00:16.0
1572 12:50:54.049156 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1573 12:50:54.052131 PCI: 00:19.0
1574 12:50:54.055375 PCI: 00:19.1 child on link 0 I2C: 00:15
1575 12:50:54.065547 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1576 12:50:54.068822 I2C: 00:15
1577 12:50:54.068927 I2C: 00:2c
1578 12:50:54.072221 PCI: 00:1e.0
1579 12:50:54.082161 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1580 12:50:54.085740 PCI: 00:1e.3 child on link 0 SPI: 00
1581 12:50:54.095322 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1582 12:50:54.095404 SPI: 00
1583 12:50:54.102207 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1584 12:50:54.109297 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1585 12:50:54.112459 PNP: 0c09.0
1586 12:50:54.119128 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1587 12:50:54.125690 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1588 12:50:54.135544 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1589 12:50:54.142137 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1590 12:50:54.148921 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1591 12:50:54.149004 GENERIC: 0.0
1592 12:50:54.152465 GENERIC: 1.0
1593 12:50:54.152547 PCI: 00:1f.3
1594 12:50:54.162539 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1595 12:50:54.172478 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1596 12:50:54.175664 PCI: 00:1f.5
1597 12:50:54.185728 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1598 12:50:54.192810 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1599 12:50:54.199474 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1600 12:50:54.202437 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1601 12:50:54.209631 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1602 12:50:54.212665 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1603 12:50:54.219116 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1604 12:50:54.225849 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1605 12:50:54.232284 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1606 12:50:54.239378 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1607 12:50:54.249408 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1608 12:50:54.252815 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1609 12:50:54.262803 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1610 12:50:54.269201 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1611 12:50:54.275894 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1612 12:50:54.279684 DOMAIN: 0000: Resource ranges:
1613 12:50:54.282627 * Base: 1000, Size: 800, Tag: 100
1614 12:50:54.285837 * Base: 1900, Size: e700, Tag: 100
1615 12:50:54.292820 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1616 12:50:54.299313 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1617 12:50:54.306163 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1618 12:50:54.312793 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1619 12:50:54.322884 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1620 12:50:54.329257 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1621 12:50:54.336114 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1622 12:50:54.345899 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1623 12:50:54.352812 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1624 12:50:54.359406 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1625 12:50:54.365905 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1626 12:50:54.375987 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1627 12:50:54.382839 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1628 12:50:54.389472 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1629 12:50:54.399660 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1630 12:50:54.406110 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1631 12:50:54.413051 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1632 12:50:54.422905 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1633 12:50:54.429528 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1634 12:50:54.436232 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1635 12:50:54.443082 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1636 12:50:54.453163 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1637 12:50:54.459645 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1638 12:50:54.466552 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1639 12:50:54.476606 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1640 12:50:54.483265 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1641 12:50:54.489832 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1642 12:50:54.500064 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1643 12:50:54.506387 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1644 12:50:54.513186 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1645 12:50:54.523384 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1646 12:50:54.529913 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1647 12:50:54.536574 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1648 12:50:54.539846 DOMAIN: 0000: Resource ranges:
1649 12:50:54.543457 * Base: 80400000, Size: 3fc00000, Tag: 200
1650 12:50:54.550326 * Base: d0000000, Size: 28000000, Tag: 200
1651 12:50:54.553422 * Base: fa000000, Size: 1000000, Tag: 200
1652 12:50:54.556613 * Base: fb001000, Size: 17ff000, Tag: 200
1653 12:50:54.563692 * Base: fe800000, Size: 300000, Tag: 200
1654 12:50:54.566795 * Base: feb80000, Size: 80000, Tag: 200
1655 12:50:54.570446 * Base: fed00000, Size: 40000, Tag: 200
1656 12:50:54.573819 * Base: fed70000, Size: 10000, Tag: 200
1657 12:50:54.576655 * Base: fed88000, Size: 8000, Tag: 200
1658 12:50:54.583733 * Base: fed93000, Size: d000, Tag: 200
1659 12:50:54.587122 * Base: feda2000, Size: 1e000, Tag: 200
1660 12:50:54.590022 * Base: fede0000, Size: 1220000, Tag: 200
1661 12:50:54.596821 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1662 12:50:54.603940 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1663 12:50:54.610525 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1664 12:50:54.616873 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1665 12:50:54.623643 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1666 12:50:54.630276 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1667 12:50:54.637195 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1668 12:50:54.643568 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1669 12:50:54.650474 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1670 12:50:54.656981 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1671 12:50:54.663643 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1672 12:50:54.670344 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1673 12:50:54.677379 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1674 12:50:54.683645 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1675 12:50:54.690707 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1676 12:50:54.696750 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1677 12:50:54.703797 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1678 12:50:54.710329 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1679 12:50:54.717218 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1680 12:50:54.720531 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1681 12:50:54.730342 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1682 12:50:54.737119 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1683 12:50:54.740251 PCI: 00:06.0: Resource ranges:
1684 12:50:54.743884 * Base: 80400000, Size: 100000, Tag: 200
1685 12:50:54.750531 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1686 12:50:54.756990 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1687 12:50:54.766816 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1688 12:50:54.773457 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1689 12:50:54.776894 Root Device assign_resources, bus 0 link: 0
1690 12:50:54.783634 DOMAIN: 0000 assign_resources, bus 0 link: 0
1691 12:50:54.790191 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1692 12:50:54.800417 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1693 12:50:54.806868 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1694 12:50:54.813286 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1695 12:50:54.819978 PCI: 00:04.0 assign_resources, bus 1 link: 0
1696 12:50:54.823389 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1697 12:50:54.833165 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1698 12:50:54.843129 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1699 12:50:54.850073 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1700 12:50:54.856557 PCI: 00:06.0 assign_resources, bus 1 link: 0
1701 12:50:54.863049 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1702 12:50:54.869858 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1703 12:50:54.876416 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1704 12:50:54.883554 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1705 12:50:54.893233 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1706 12:50:54.896448 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1707 12:50:54.903199 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1708 12:50:54.910032 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1709 12:50:54.913415 PCI: 00:14.0 assign_resources, bus 0 link: 0
1710 12:50:54.920064 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1711 12:50:54.926947 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1712 12:50:54.937114 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1713 12:50:54.943961 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1714 12:50:54.946874 PCI: 00:14.3 assign_resources, bus 0 link: 0
1715 12:50:54.953786 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1716 12:50:54.960753 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1717 12:50:54.966728 PCI: 00:15.0 assign_resources, bus 0 link: 0
1718 12:50:54.970105 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1719 12:50:54.980456 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1720 12:50:54.983821 PCI: 00:15.1 assign_resources, bus 0 link: 0
1721 12:50:54.986783 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1722 12:50:54.997045 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1723 12:50:55.000242 PCI: 00:15.3 assign_resources, bus 0 link: 0
1724 12:50:55.006759 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1725 12:50:55.013276 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1726 12:50:55.019890 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1727 12:50:55.026817 PCI: 00:19.1 assign_resources, bus 0 link: 0
1728 12:50:55.029687 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1729 12:50:55.040400 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1730 12:50:55.043431 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1731 12:50:55.050334 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1732 12:50:55.053387 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1733 12:50:55.056518 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1734 12:50:55.063701 LPC: Trying to open IO window from 800 size 1ff
1735 12:50:55.069766 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1736 12:50:55.080396 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1737 12:50:55.086913 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1738 12:50:55.090160 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1739 12:50:55.096486 Root Device assign_resources, bus 0 link: 0 done
1740 12:50:55.099836 Done setting resources.
1741 12:50:55.106554 Show resources in subtree (Root Device)...After assigning values.
1742 12:50:55.110029 Root Device child on link 0 CPU_CLUSTER: 0
1743 12:50:55.113431 CPU_CLUSTER: 0 child on link 0 APIC: 00
1744 12:50:55.116670 APIC: 00
1745 12:50:55.117109 APIC: 14
1746 12:50:55.117434 APIC: 16
1747 12:50:55.119823 APIC: 10
1748 12:50:55.120433 APIC: 12
1749 12:50:55.123912 APIC: 09
1750 12:50:55.124259 APIC: 01
1751 12:50:55.124550 APIC: 08
1752 12:50:55.130142 DOMAIN: 0000 child on link 0 GPIO: 0
1753 12:50:55.136281 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1754 12:50:55.146683 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1755 12:50:55.149811 GPIO: 0
1756 12:50:55.150191 PCI: 00:00.0
1757 12:50:55.159951 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1758 12:50:55.169923 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1759 12:50:55.179479 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1760 12:50:55.186917 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1761 12:50:55.196101 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1762 12:50:55.206132 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1763 12:50:55.216300 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1764 12:50:55.226288 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1765 12:50:55.236074 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1766 12:50:55.246155 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1767 12:50:55.252439 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1768 12:50:55.262678 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1769 12:50:55.272267 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1770 12:50:55.282025 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1771 12:50:55.292304 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1772 12:50:55.302148 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1773 12:50:55.309165 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1774 12:50:55.318805 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1775 12:50:55.328771 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1776 12:50:55.338839 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1777 12:50:55.348621 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1778 12:50:55.358491 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1779 12:50:55.368472 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1780 12:50:55.378747 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1781 12:50:55.388531 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1782 12:50:55.395273 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1783 12:50:55.405337 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1784 12:50:55.415126 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1785 12:50:55.418463 PCI: 00:02.0
1786 12:50:55.428484 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1787 12:50:55.438615 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1788 12:50:55.448931 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1789 12:50:55.452131 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1790 12:50:55.462382 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1791 12:50:55.465683 GENERIC: 0.0
1792 12:50:55.468757 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1793 12:50:55.479072 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1794 12:50:55.488685 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1795 12:50:55.502272 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1796 12:50:55.502517 PCI: 01:00.0
1797 12:50:55.511859 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1798 12:50:55.521707 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1799 12:50:55.525098 PCI: 00:08.0
1800 12:50:55.525337 PCI: 00:0a.0
1801 12:50:55.535182 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1802 12:50:55.541830 PCI: 00:0d.0 child on link 0 USB0 port 0
1803 12:50:55.552075 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1804 12:50:55.555196 USB0 port 0 child on link 0 USB3 port 0
1805 12:50:55.558455 USB3 port 0
1806 12:50:55.558733 USB3 port 1
1807 12:50:55.561814 USB3 port 2
1808 12:50:55.562053 USB3 port 3
1809 12:50:55.568727 PCI: 00:14.0 child on link 0 USB0 port 0
1810 12:50:55.578657 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1811 12:50:55.581589 USB0 port 0 child on link 0 USB2 port 0
1812 12:50:55.585136 USB2 port 0
1813 12:50:55.585375 USB2 port 1
1814 12:50:55.588264 USB2 port 2
1815 12:50:55.588503 USB2 port 3
1816 12:50:55.591632 USB2 port 4
1817 12:50:55.591872 USB2 port 5
1818 12:50:55.595163 USB2 port 6
1819 12:50:55.595476 USB2 port 7
1820 12:50:55.598455 USB2 port 8
1821 12:50:55.598786 USB2 port 9
1822 12:50:55.601967 USB3 port 0
1823 12:50:55.602293 USB3 port 1
1824 12:50:55.605138 USB3 port 2
1825 12:50:55.608302 USB3 port 3
1826 12:50:55.608625 PCI: 00:14.2
1827 12:50:55.618497 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1828 12:50:55.628324 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1829 12:50:55.635148 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1830 12:50:55.645399 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1831 12:50:55.645791 GENERIC: 0.0
1832 12:50:55.652104 PCI: 00:15.0 child on link 0 I2C: 00:1a
1833 12:50:55.662035 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1834 12:50:55.662630 I2C: 00:1a
1835 12:50:55.665410 I2C: 00:31
1836 12:50:55.665960 I2C: 00:32
1837 12:50:55.668793 PCI: 00:15.1 child on link 0 I2C: 00:50
1838 12:50:55.678886 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1839 12:50:55.681713 I2C: 00:50
1840 12:50:55.682264 PCI: 00:15.2
1841 12:50:55.688786 PCI: 00:15.3 child on link 0 I2C: 00:10
1842 12:50:55.698128 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1843 12:50:55.698717 I2C: 00:10
1844 12:50:55.701981 PCI: 00:16.0
1845 12:50:55.712460 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1846 12:50:55.713038 PCI: 00:19.0
1847 12:50:55.718218 PCI: 00:19.1 child on link 0 I2C: 00:15
1848 12:50:55.728507 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1849 12:50:55.729075 I2C: 00:15
1850 12:50:55.731513 I2C: 00:2c
1851 12:50:55.731974 PCI: 00:1e.0
1852 12:50:55.744885 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1853 12:50:55.748645 PCI: 00:1e.3 child on link 0 SPI: 00
1854 12:50:55.758149 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1855 12:50:55.758700 SPI: 00
1856 12:50:55.765364 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1857 12:50:55.771471 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1858 12:50:55.774552 PNP: 0c09.0
1859 12:50:55.781423 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1860 12:50:55.787933 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1861 12:50:55.797937 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1862 12:50:55.804467 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1863 12:50:55.811142 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1864 12:50:55.811499 GENERIC: 0.0
1865 12:50:55.814704 GENERIC: 1.0
1866 12:50:55.815031 PCI: 00:1f.3
1867 12:50:55.824596 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1868 12:50:55.838133 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1869 12:50:55.838445 PCI: 00:1f.5
1870 12:50:55.848152 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1871 12:50:55.851660 Done allocating resources.
1872 12:50:55.858068 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms
1873 12:50:55.864868 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1874 12:50:55.867728 Configure audio over I2S with MAX98373 NAU88L25B.
1875 12:50:55.872785 Enabling BT offload
1876 12:50:55.880319 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1877 12:50:55.883515 Enabling resources...
1878 12:50:55.886861 PCI: 00:00.0 subsystem <- 8086/4609
1879 12:50:55.890052 PCI: 00:00.0 cmd <- 06
1880 12:50:55.893318 PCI: 00:02.0 subsystem <- 8086/46b3
1881 12:50:55.897097 PCI: 00:02.0 cmd <- 03
1882 12:50:55.900093 PCI: 00:04.0 subsystem <- 8086/461d
1883 12:50:55.900648 PCI: 00:04.0 cmd <- 02
1884 12:50:55.903541 PCI: 00:06.0 bridge ctrl <- 0013
1885 12:50:55.906979 PCI: 00:06.0 subsystem <- 8086/464d
1886 12:50:55.910235 PCI: 00:06.0 cmd <- 106
1887 12:50:55.913397 PCI: 00:0a.0 subsystem <- 8086/467d
1888 12:50:55.916693 PCI: 00:0a.0 cmd <- 02
1889 12:50:55.919662 PCI: 00:0d.0 subsystem <- 8086/461e
1890 12:50:55.923175 PCI: 00:0d.0 cmd <- 02
1891 12:50:55.926958 PCI: 00:14.0 subsystem <- 8086/51ed
1892 12:50:55.929950 PCI: 00:14.0 cmd <- 02
1893 12:50:55.933173 PCI: 00:14.2 subsystem <- 8086/51ef
1894 12:50:55.933628 PCI: 00:14.2 cmd <- 02
1895 12:50:55.936814 PCI: 00:14.3 subsystem <- 8086/51f0
1896 12:50:55.939857 PCI: 00:14.3 cmd <- 02
1897 12:50:55.943259 PCI: 00:15.0 subsystem <- 8086/51e8
1898 12:50:55.946786 PCI: 00:15.0 cmd <- 02
1899 12:50:55.949971 PCI: 00:15.1 subsystem <- 8086/51e9
1900 12:50:55.953527 PCI: 00:15.1 cmd <- 06
1901 12:50:55.956560 PCI: 00:15.3 subsystem <- 8086/51eb
1902 12:50:55.959717 PCI: 00:15.3 cmd <- 02
1903 12:50:55.963499 PCI: 00:16.0 subsystem <- 8086/51e0
1904 12:50:55.964052 PCI: 00:16.0 cmd <- 02
1905 12:50:55.967162 PCI: 00:19.1 subsystem <- 8086/51c6
1906 12:50:55.970376 PCI: 00:19.1 cmd <- 02
1907 12:50:55.973456 PCI: 00:1e.0 subsystem <- 8086/51a8
1908 12:50:55.976815 PCI: 00:1e.0 cmd <- 06
1909 12:50:55.979832 PCI: 00:1e.3 subsystem <- 8086/51ab
1910 12:50:55.983207 PCI: 00:1e.3 cmd <- 02
1911 12:50:55.986746 PCI: 00:1f.0 subsystem <- 8086/5182
1912 12:50:55.990062 PCI: 00:1f.0 cmd <- 407
1913 12:50:55.993014 PCI: 00:1f.3 subsystem <- 8086/51c8
1914 12:50:55.993497 PCI: 00:1f.3 cmd <- 02
1915 12:50:55.996293 PCI: 00:1f.5 subsystem <- 8086/51a4
1916 12:50:55.999877 PCI: 00:1f.5 cmd <- 406
1917 12:50:56.003127 PCI: 01:00.0 cmd <- 02
1918 12:50:56.003582 done.
1919 12:50:56.009846 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1920 12:50:56.013390 ME: Version: Unavailable
1921 12:50:56.015921 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1922 12:50:56.019647 Initializing devices...
1923 12:50:56.023004 Root Device init
1924 12:50:56.023462 mainboard: EC init
1925 12:50:56.029763 Chrome EC: Set SMI mask to 0x0000000000000000
1926 12:50:56.030306 Chrome EC: UHEPI supported
1927 12:50:56.036850 Chrome EC: clear events_b mask to 0x0000000000000000
1928 12:50:56.044007 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1929 12:50:56.050069 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1930 12:50:56.056567 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1931 12:50:56.060392 Chrome EC: Set WAKE mask to 0x0000000000000000
1932 12:50:56.067963 Root Device init finished in 41 msecs
1933 12:50:56.068672 PCI: 00:00.0 init
1934 12:50:56.071057 CPU TDP = 15 Watts
1935 12:50:56.074243 CPU PL1 = 15 Watts
1936 12:50:56.074788 CPU PL2 = 55 Watts
1937 12:50:56.078078 CPU PL4 = 123 Watts
1938 12:50:56.081290 PCI: 00:00.0 init finished in 8 msecs
1939 12:50:56.084868 PCI: 00:02.0 init
1940 12:50:56.085421 GMA: Found VBT in CBFS
1941 12:50:56.087941 GMA: Found valid VBT in CBFS
1942 12:50:56.094848 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1943 12:50:56.101764 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1944 12:50:56.105155 PCI: 00:02.0 init finished in 18 msecs
1945 12:50:56.109375 PCI: 00:06.0 init
1946 12:50:56.111326 Initializing PCH PCIe bridge.
1947 12:50:56.114351 PCI: 00:06.0 init finished in 3 msecs
1948 12:50:56.114854 PCI: 00:0a.0 init
1949 12:50:56.120965 PCI: 00:0a.0 init finished in 0 msecs
1950 12:50:56.121511 PCI: 00:14.0 init
1951 12:50:56.124569 PCI: 00:14.0 init finished in 0 msecs
1952 12:50:56.127663 PCI: 00:14.2 init
1953 12:50:56.131076 PCI: 00:14.2 init finished in 0 msecs
1954 12:50:56.134555 PCI: 00:15.0 init
1955 12:50:56.135082 I2C bus 0 version 0x3230302a
1956 12:50:56.141266 DW I2C bus 0 at 0x80655000 (400 KHz)
1957 12:50:56.144755 PCI: 00:15.0 init finished in 6 msecs
1958 12:50:56.145313 PCI: 00:15.1 init
1959 12:50:56.147913 I2C bus 1 version 0x3230302a
1960 12:50:56.151167 DW I2C bus 1 at 0x80656000 (400 KHz)
1961 12:50:56.154409 PCI: 00:15.1 init finished in 6 msecs
1962 12:50:56.158100 PCI: 00:15.3 init
1963 12:50:56.161190 I2C bus 3 version 0x3230302a
1964 12:50:56.164588 DW I2C bus 3 at 0x80657000 (400 KHz)
1965 12:50:56.167742 PCI: 00:15.3 init finished in 6 msecs
1966 12:50:56.171106 PCI: 00:16.0 init
1967 12:50:56.174922 PCI: 00:16.0 init finished in 0 msecs
1968 12:50:56.175380 PCI: 00:19.1 init
1969 12:50:56.177908 I2C bus 5 version 0x3230302a
1970 12:50:56.181071 DW I2C bus 5 at 0x80659000 (400 KHz)
1971 12:50:56.188198 PCI: 00:19.1 init finished in 6 msecs
1972 12:50:56.188751 PCI: 00:1f.0 init
1973 12:50:56.191370 IOAPIC: Initializing IOAPIC at 0xfec00000
1974 12:50:56.194638 IOAPIC: ID = 0x02
1975 12:50:56.198167 IOAPIC: Dumping registers
1976 12:50:56.201564 reg 0x0000: 0x02000000
1977 12:50:56.202160 reg 0x0001: 0x00770020
1978 12:50:56.204664 reg 0x0002: 0x00000000
1979 12:50:56.207799 IOAPIC: 120 interrupts
1980 12:50:56.211328 IOAPIC: Clearing IOAPIC at 0xfec00000
1981 12:50:56.214772 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1982 12:50:56.220993 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1983 12:50:56.224447 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1984 12:50:56.231159 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1985 12:50:56.234665 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1986 12:50:56.241523 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1987 12:50:56.244836 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1988 12:50:56.248206 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1989 12:50:56.254814 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1990 12:50:56.258181 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1991 12:50:56.264671 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1992 12:50:56.268165 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1993 12:50:56.274428 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1994 12:50:56.277836 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1995 12:50:56.284487 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1996 12:50:56.287705 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1997 12:50:56.291445 IOAPIC: vector 0x10 value 0x00000000 0x00010000
1998 12:50:56.298313 IOAPIC: vector 0x11 value 0x00000000 0x00010000
1999 12:50:56.301203 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2000 12:50:56.307628 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2001 12:50:56.311493 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2002 12:50:56.318058 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2003 12:50:56.321423 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2004 12:50:56.324714 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2005 12:50:56.331473 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2006 12:50:56.334465 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2007 12:50:56.341317 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2008 12:50:56.344033 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2009 12:50:56.351009 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2010 12:50:56.354408 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2011 12:50:56.360972 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2012 12:50:56.364395 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2013 12:50:56.368046 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2014 12:50:56.374678 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2015 12:50:56.377843 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2016 12:50:56.384305 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2017 12:50:56.387481 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2018 12:50:56.394517 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2019 12:50:56.397283 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2020 12:50:56.400818 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2021 12:50:56.407324 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2022 12:50:56.411167 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2023 12:50:56.417878 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2024 12:50:56.420987 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2025 12:50:56.427461 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2026 12:50:56.430858 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2027 12:50:56.437636 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2028 12:50:56.441028 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2029 12:50:56.444667 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2030 12:50:56.451037 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2031 12:50:56.454691 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2032 12:50:56.461323 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2033 12:50:56.464485 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2034 12:50:56.470873 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2035 12:50:56.474396 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2036 12:50:56.480883 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2037 12:50:56.484536 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2038 12:50:56.487548 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2039 12:50:56.494022 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2040 12:50:56.497941 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2041 12:50:56.504220 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2042 12:50:56.507532 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2043 12:50:56.514336 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2044 12:50:56.517627 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2045 12:50:56.520958 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2046 12:50:56.528020 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2047 12:50:56.531083 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2048 12:50:56.537872 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2049 12:50:56.540962 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2050 12:50:56.547508 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2051 12:50:56.550906 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2052 12:50:56.557881 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2053 12:50:56.560894 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2054 12:50:56.564410 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2055 12:50:56.570719 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2056 12:50:56.574127 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2057 12:50:56.580769 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2058 12:50:56.584410 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2059 12:50:56.590572 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2060 12:50:56.594449 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2061 12:50:56.597847 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2062 12:50:56.604241 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2063 12:50:56.607285 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2064 12:50:56.613665 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2065 12:50:56.617297 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2066 12:50:56.623554 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2067 12:50:56.626927 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2068 12:50:56.634384 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2069 12:50:56.637536 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2070 12:50:56.640845 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2071 12:50:56.647394 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2072 12:50:56.650730 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2073 12:50:56.657731 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2074 12:50:56.660835 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2075 12:50:56.667623 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2076 12:50:56.670704 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2077 12:50:56.677409 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2078 12:50:56.680511 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2079 12:50:56.683864 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2080 12:50:56.690603 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2081 12:50:56.693968 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2082 12:50:56.700835 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2083 12:50:56.703946 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2084 12:50:56.710569 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2085 12:50:56.713670 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2086 12:50:56.717260 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2087 12:50:56.723926 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2088 12:50:56.727011 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2089 12:50:56.733760 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2090 12:50:56.737279 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2091 12:50:56.743818 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2092 12:50:56.746910 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2093 12:50:56.753962 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2094 12:50:56.757137 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2095 12:50:56.760655 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2096 12:50:56.767156 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2097 12:50:56.770146 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2098 12:50:56.777090 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2099 12:50:56.780516 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2100 12:50:56.786996 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2101 12:50:56.790328 IOAPIC: Bootstrap Processor Local APIC = 0x00
2102 12:50:56.793556 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2103 12:50:56.801145 PCI: 00:1f.0 init finished in 607 msecs
2104 12:50:56.801700 PCI: 00:1f.2 init
2105 12:50:56.804109 apm_control: Disabling ACPI.
2106 12:50:56.808757 APMC done.
2107 12:50:56.812410 PCI: 00:1f.2 init finished in 7 msecs
2108 12:50:56.815905 PCI: 00:1f.3 init
2109 12:50:56.818743 PCI: 00:1f.3 init finished in 0 msecs
2110 12:50:56.819206 PCI: 01:00.0 init
2111 12:50:56.822250 PCI: 01:00.0 init finished in 0 msecs
2112 12:50:56.825623 PNP: 0c09.0 init
2113 12:50:56.829092 Google Chrome EC uptime: 12.053 seconds
2114 12:50:56.836108 Google Chrome AP resets since EC boot: 1
2115 12:50:56.839117 Google Chrome most recent AP reset causes:
2116 12:50:56.842702 0.339: 32775 shutdown: entering G3
2117 12:50:56.848988 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2118 12:50:56.852657 PNP: 0c09.0 init finished in 23 msecs
2119 12:50:56.856014 GENERIC: 0.0 init
2120 12:50:56.858978 GENERIC: 0.0 init finished in 0 msecs
2121 12:50:56.859716 GENERIC: 1.0 init
2122 12:50:56.862371 GENERIC: 1.0 init finished in 0 msecs
2123 12:50:56.866069 Devices initialized
2124 12:50:56.869102 Show all devs... After init.
2125 12:50:56.872324 Root Device: enabled 1
2126 12:50:56.872874 CPU_CLUSTER: 0: enabled 1
2127 12:50:56.875520 DOMAIN: 0000: enabled 1
2128 12:50:56.879462 GPIO: 0: enabled 1
2129 12:50:56.880018 PCI: 00:00.0: enabled 1
2130 12:50:56.882549 PCI: 00:01.0: enabled 0
2131 12:50:56.885815 PCI: 00:01.1: enabled 0
2132 12:50:56.889114 PCI: 00:02.0: enabled 1
2133 12:50:56.889667 PCI: 00:04.0: enabled 1
2134 12:50:56.891984 PCI: 00:05.0: enabled 0
2135 12:50:56.895582 PCI: 00:06.0: enabled 1
2136 12:50:56.898962 PCI: 00:06.2: enabled 0
2137 12:50:56.899419 PCI: 00:07.0: enabled 0
2138 12:50:56.902526 PCI: 00:07.1: enabled 0
2139 12:50:56.905651 PCI: 00:07.2: enabled 0
2140 12:50:56.908739 PCI: 00:07.3: enabled 0
2141 12:50:56.909197 PCI: 00:08.0: enabled 0
2142 12:50:56.912158 PCI: 00:09.0: enabled 0
2143 12:50:56.915947 PCI: 00:0a.0: enabled 1
2144 12:50:56.919032 PCI: 00:0d.0: enabled 1
2145 12:50:56.919588 PCI: 00:0d.1: enabled 0
2146 12:50:56.921916 PCI: 00:0d.2: enabled 0
2147 12:50:56.925485 PCI: 00:0d.3: enabled 0
2148 12:50:56.925937 PCI: 00:0e.0: enabled 0
2149 12:50:56.928856 PCI: 00:10.0: enabled 0
2150 12:50:56.932377 PCI: 00:10.1: enabled 0
2151 12:50:56.935686 PCI: 00:10.6: enabled 0
2152 12:50:56.936241 PCI: 00:10.7: enabled 0
2153 12:50:56.938524 PCI: 00:12.0: enabled 0
2154 12:50:56.942701 PCI: 00:12.6: enabled 0
2155 12:50:56.945481 PCI: 00:12.7: enabled 0
2156 12:50:56.946029 PCI: 00:13.0: enabled 0
2157 12:50:56.948994 PCI: 00:14.0: enabled 1
2158 12:50:56.952496 PCI: 00:14.1: enabled 0
2159 12:50:56.955886 PCI: 00:14.2: enabled 1
2160 12:50:56.956499 PCI: 00:14.3: enabled 1
2161 12:50:56.958526 PCI: 00:15.0: enabled 1
2162 12:50:56.962372 PCI: 00:15.1: enabled 1
2163 12:50:56.962977 PCI: 00:15.2: enabled 0
2164 12:50:56.965513 PCI: 00:15.3: enabled 1
2165 12:50:56.969129 PCI: 00:16.0: enabled 1
2166 12:50:56.972132 PCI: 00:16.1: enabled 0
2167 12:50:56.972720 PCI: 00:16.2: enabled 0
2168 12:50:56.975212 PCI: 00:16.3: enabled 0
2169 12:50:56.978818 PCI: 00:16.4: enabled 0
2170 12:50:56.982290 PCI: 00:16.5: enabled 0
2171 12:50:56.982825 PCI: 00:17.0: enabled 0
2172 12:50:56.985668 PCI: 00:19.0: enabled 0
2173 12:50:56.989125 PCI: 00:19.1: enabled 1
2174 12:50:56.992038 PCI: 00:19.2: enabled 0
2175 12:50:56.992489 PCI: 00:1a.0: enabled 0
2176 12:50:56.995509 PCI: 00:1c.0: enabled 0
2177 12:50:56.998847 PCI: 00:1c.1: enabled 0
2178 12:50:56.999398 PCI: 00:1c.2: enabled 0
2179 12:50:57.002450 PCI: 00:1c.3: enabled 0
2180 12:50:57.005216 PCI: 00:1c.4: enabled 0
2181 12:50:57.008757 PCI: 00:1c.5: enabled 0
2182 12:50:57.009307 PCI: 00:1c.6: enabled 0
2183 12:50:57.011976 PCI: 00:1c.7: enabled 0
2184 12:50:57.015396 PCI: 00:1d.0: enabled 0
2185 12:50:57.018761 PCI: 00:1d.1: enabled 0
2186 12:50:57.019471 PCI: 00:1d.2: enabled 0
2187 12:50:57.021938 PCI: 00:1d.3: enabled 0
2188 12:50:57.024978 PCI: 00:1e.0: enabled 1
2189 12:50:57.028239 PCI: 00:1e.1: enabled 0
2190 12:50:57.028812 PCI: 00:1e.2: enabled 0
2191 12:50:57.031857 PCI: 00:1e.3: enabled 1
2192 12:50:57.035223 PCI: 00:1f.0: enabled 1
2193 12:50:57.038360 PCI: 00:1f.1: enabled 0
2194 12:50:57.038930 PCI: 00:1f.2: enabled 1
2195 12:50:57.041608 PCI: 00:1f.3: enabled 1
2196 12:50:57.045039 PCI: 00:1f.4: enabled 0
2197 12:50:57.045615 PCI: 00:1f.5: enabled 1
2198 12:50:57.048437 PCI: 00:1f.6: enabled 0
2199 12:50:57.051736 PCI: 00:1f.7: enabled 0
2200 12:50:57.055487 GENERIC: 0.0: enabled 1
2201 12:50:57.055898 GENERIC: 0.0: enabled 1
2202 12:50:57.058355 GENERIC: 1.0: enabled 1
2203 12:50:57.061839 GENERIC: 0.0: enabled 1
2204 12:50:57.065480 GENERIC: 1.0: enabled 1
2205 12:50:57.066096 USB0 port 0: enabled 1
2206 12:50:57.068488 USB0 port 0: enabled 1
2207 12:50:57.071687 GENERIC: 0.0: enabled 1
2208 12:50:57.072149 I2C: 00:1a: enabled 1
2209 12:50:57.075354 I2C: 00:31: enabled 1
2210 12:50:57.078544 I2C: 00:32: enabled 1
2211 12:50:57.079225 I2C: 00:50: enabled 1
2212 12:50:57.081621 I2C: 00:10: enabled 1
2213 12:50:57.085151 I2C: 00:15: enabled 1
2214 12:50:57.085593 I2C: 00:2c: enabled 1
2215 12:50:57.088187 GENERIC: 0.0: enabled 1
2216 12:50:57.091998 SPI: 00: enabled 1
2217 12:50:57.092436 PNP: 0c09.0: enabled 1
2218 12:50:57.094957 GENERIC: 0.0: enabled 1
2219 12:50:57.098708 USB3 port 0: enabled 1
2220 12:50:57.101757 USB3 port 1: enabled 0
2221 12:50:57.102272 USB3 port 2: enabled 1
2222 12:50:57.104979 USB3 port 3: enabled 0
2223 12:50:57.108403 USB2 port 0: enabled 1
2224 12:50:57.108852 USB2 port 1: enabled 0
2225 12:50:57.111655 USB2 port 2: enabled 1
2226 12:50:57.114699 USB2 port 3: enabled 0
2227 12:50:57.117993 USB2 port 4: enabled 0
2228 12:50:57.118073 USB2 port 5: enabled 1
2229 12:50:57.121130 USB2 port 6: enabled 0
2230 12:50:57.124813 USB2 port 7: enabled 0
2231 12:50:57.124885 USB2 port 8: enabled 1
2232 12:50:57.128219 USB2 port 9: enabled 1
2233 12:50:57.131260 USB3 port 0: enabled 1
2234 12:50:57.131343 USB3 port 1: enabled 0
2235 12:50:57.134417 USB3 port 2: enabled 0
2236 12:50:57.137815 USB3 port 3: enabled 0
2237 12:50:57.141279 GENERIC: 0.0: enabled 1
2238 12:50:57.141348 GENERIC: 1.0: enabled 1
2239 12:50:57.145011 APIC: 00: enabled 1
2240 12:50:57.147953 APIC: 14: enabled 1
2241 12:50:57.148022 APIC: 16: enabled 1
2242 12:50:57.151347 APIC: 10: enabled 1
2243 12:50:57.151417 APIC: 12: enabled 1
2244 12:50:57.154721 APIC: 09: enabled 1
2245 12:50:57.158134 APIC: 01: enabled 1
2246 12:50:57.158200 APIC: 08: enabled 1
2247 12:50:57.161435 PCI: 01:00.0: enabled 1
2248 12:50:57.168197 BS: BS_DEV_INIT run times (exec / console): 11 / 1133 ms
2249 12:50:57.171378 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2250 12:50:57.174551 ELOG: NV offset 0xf20000 size 0x4000
2251 12:50:57.182686 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2252 12:50:57.189205 ELOG: Event(17) added with size 13 at 2023-09-23 12:50:57 UTC
2253 12:50:57.195935 ELOG: Event(9E) added with size 10 at 2023-09-23 12:50:57 UTC
2254 12:50:57.202883 ELOG: Event(9F) added with size 14 at 2023-09-23 12:50:57 UTC
2255 12:50:57.209354 ELOG: Event(16) added with size 11 at 2023-09-23 12:50:57 UTC
2256 12:50:57.212483 Erasing flash addr f20000 + 4 KiB
2257 12:50:57.269566 BS: BS_DEV_INIT exit times (exec / console): 52 / 43 ms
2258 12:50:57.275792 ELOG: Event(A0) added with size 9 at 2023-09-23 12:50:57 UTC
2259 12:50:57.279357 elog_add_boot_reason: Logged dev mode boot
2260 12:50:57.286117 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2261 12:50:57.289057 Finalize devices...
2262 12:50:57.289442 PCI: 00:16.0 final
2263 12:50:57.292370 PCI: 00:1f.2 final
2264 12:50:57.295890 GENERIC: 0.0 final
2265 12:50:57.299195 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2266 12:50:57.302496 GENERIC: 1.0 final
2267 12:50:57.309037 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2268 12:50:57.309454 Devices finalized
2269 12:50:57.315959 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2270 12:50:57.322459 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2271 12:50:57.325844 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2272 12:50:57.332718 ME: HFSTS1 : 0x90000245
2273 12:50:57.335728 ME: HFSTS2 : 0x82100116
2274 12:50:57.339018 ME: HFSTS3 : 0x00000050
2275 12:50:57.345700 ME: HFSTS4 : 0x00004000
2276 12:50:57.349219 ME: HFSTS5 : 0x00000000
2277 12:50:57.352317 ME: HFSTS6 : 0x40600006
2278 12:50:57.359063 ME: Manufacturing Mode : NO
2279 12:50:57.362468 ME: SPI Protection Mode Enabled : YES
2280 12:50:57.365798 ME: FPFs Committed : YES
2281 12:50:57.368967 ME: Manufacturing Vars Locked : YES
2282 12:50:57.372642 ME: FW Partition Table : OK
2283 12:50:57.375664 ME: Bringup Loader Failure : NO
2284 12:50:57.378933 ME: Firmware Init Complete : YES
2285 12:50:57.385824 ME: Boot Options Present : NO
2286 12:50:57.389116 ME: Update In Progress : NO
2287 12:50:57.392267 ME: D0i3 Support : YES
2288 12:50:57.395636 ME: Low Power State Enabled : NO
2289 12:50:57.399120 ME: CPU Replaced : YES
2290 12:50:57.402152 ME: CPU Replacement Valid : YES
2291 12:50:57.405869 ME: Current Working State : 5
2292 12:50:57.408844 ME: Current Operation State : 1
2293 12:50:57.412399 ME: Current Operation Mode : 0
2294 12:50:57.415634 ME: Error Code : 0
2295 12:50:57.422660 ME: Enhanced Debug Mode : NO
2296 12:50:57.425659 ME: CPU Debug Disabled : YES
2297 12:50:57.429168 ME: TXT Support : NO
2298 12:50:57.432240 ME: WP for RO is enabled : YES
2299 12:50:57.438944 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2300 12:50:57.445732 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2301 12:50:57.449022 Ramoops buffer: 0x100000@0x76899000.
2302 12:50:57.455804 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2303 12:50:57.462667 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2304 12:50:57.465594 CBFS: 'fallback/slic' not found.
2305 12:50:57.468880 ACPI: Writing ACPI tables at 7686d000.
2306 12:50:57.469300 ACPI: * FACS
2307 12:50:57.472500 ACPI: * DSDT
2308 12:50:57.478884 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2309 12:50:57.482764 ACPI: * FADT
2310 12:50:57.483184 SCI is IRQ9
2311 12:50:57.485633 ACPI: added table 1/32, length now 40
2312 12:50:57.488877 ACPI: * SSDT
2313 12:50:57.495972 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2314 12:50:57.498909 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2315 12:50:57.505754 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2316 12:50:57.508903 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2317 12:50:57.515572 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2318 12:50:57.518945 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2319 12:50:57.525524 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2320 12:50:57.532220 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2321 12:50:57.535630 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2322 12:50:57.542099 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2323 12:50:57.545694 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2324 12:50:57.552535 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2325 12:50:57.555415 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2326 12:50:57.562318 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2327 12:50:57.568905 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2328 12:50:57.572290 PS2K: Passing 80 keymaps to kernel
2329 12:50:57.578749 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2330 12:50:57.585300 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2331 12:50:57.592199 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2332 12:50:57.598907 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2333 12:50:57.601954 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2334 12:50:57.608579 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2335 12:50:57.615272 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2336 12:50:57.622171 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2337 12:50:57.628613 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2338 12:50:57.635586 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2339 12:50:57.638696 ACPI: added table 2/32, length now 44
2340 12:50:57.641891 ACPI: * MCFG
2341 12:50:57.645650 ACPI: added table 3/32, length now 48
2342 12:50:57.646141 ACPI: * TPM2
2343 12:50:57.648660 TPM2 log created at 0x7685d000
2344 12:50:57.652011 ACPI: added table 4/32, length now 52
2345 12:50:57.655267 ACPI: * LPIT
2346 12:50:57.658532 ACPI: added table 5/32, length now 56
2347 12:50:57.659015 ACPI: * MADT
2348 12:50:57.661653 SCI is IRQ9
2349 12:50:57.665434 ACPI: added table 6/32, length now 60
2350 12:50:57.668559 cmd_reg from pmc_make_ipc_cmd 1052838
2351 12:50:57.675045 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2352 12:50:57.681663 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2353 12:50:57.688608 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2354 12:50:57.691881 PMC CrashLog size in discovery mode: 0xC00
2355 12:50:57.695177 cpu crashlog bar addr: 0x80640000
2356 12:50:57.698255 cpu discovery table offset: 0x6030
2357 12:50:57.701866 cpu_crashlog_discovery_table buffer count: 0x3
2358 12:50:57.708370 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2359 12:50:57.714919 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2360 12:50:57.721420 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2361 12:50:57.728288 PMC crashLog size in discovery mode : 0xC00
2362 12:50:57.734978 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2363 12:50:57.738252 discover mode PMC crashlog size adjusted to: 0x200
2364 12:50:57.745027 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2365 12:50:57.751545 discover mode PMC crashlog size adjusted to: 0x0
2366 12:50:57.754849 m_cpu_crashLog_size : 0x3480 bytes
2367 12:50:57.758084 CPU crashLog present.
2368 12:50:57.761635 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2369 12:50:57.768288 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2370 12:50:57.771714 current = 76876550
2371 12:50:57.772152 ACPI: * DMAR
2372 12:50:57.774699 ACPI: added table 7/32, length now 64
2373 12:50:57.781492 ACPI: added table 8/32, length now 68
2374 12:50:57.781937 ACPI: * HPET
2375 12:50:57.784805 ACPI: added table 9/32, length now 72
2376 12:50:57.788295 ACPI: done.
2377 12:50:57.788762 ACPI tables: 38528 bytes.
2378 12:50:57.791455 smbios_write_tables: 76857000
2379 12:50:57.795665 EC returned error result code 3
2380 12:50:57.798943 Couldn't obtain OEM name from CBI
2381 12:50:57.802539 Create SMBIOS type 16
2382 12:50:57.805524 Create SMBIOS type 17
2383 12:50:57.805901 Create SMBIOS type 20
2384 12:50:57.808835 GENERIC: 0.0 (WIFI Device)
2385 12:50:57.812520 SMBIOS tables: 2156 bytes.
2386 12:50:57.815797 Writing table forward entry at 0x00000500
2387 12:50:57.822506 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2388 12:50:57.825539 Writing coreboot table at 0x76891000
2389 12:50:57.832201 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2390 12:50:57.835378 1. 0000000000001000-000000000009ffff: RAM
2391 12:50:57.841986 2. 00000000000a0000-00000000000fffff: RESERVED
2392 12:50:57.845322 3. 0000000000100000-0000000076856fff: RAM
2393 12:50:57.851988 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2394 12:50:57.855539 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2395 12:50:57.862228 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2396 12:50:57.868971 7. 0000000077000000-00000000803fffff: RESERVED
2397 12:50:57.871998 8. 00000000c0000000-00000000cfffffff: RESERVED
2398 12:50:57.878563 9. 00000000f8000000-00000000f9ffffff: RESERVED
2399 12:50:57.882131 10. 00000000fb000000-00000000fb000fff: RESERVED
2400 12:50:57.885248 11. 00000000fc800000-00000000fe7fffff: RESERVED
2401 12:50:57.892143 12. 00000000feb00000-00000000feb7ffff: RESERVED
2402 12:50:57.895699 13. 00000000fec00000-00000000fecfffff: RESERVED
2403 12:50:57.902067 14. 00000000fed40000-00000000fed6ffff: RESERVED
2404 12:50:57.905448 15. 00000000fed80000-00000000fed87fff: RESERVED
2405 12:50:57.911811 16. 00000000fed90000-00000000fed92fff: RESERVED
2406 12:50:57.915286 17. 00000000feda0000-00000000feda1fff: RESERVED
2407 12:50:57.921997 18. 00000000fedc0000-00000000feddffff: RESERVED
2408 12:50:57.925225 19. 0000000100000000-000000027fbfffff: RAM
2409 12:50:57.928746 Passing 4 GPIOs to payload:
2410 12:50:57.931749 NAME | PORT | POLARITY | VALUE
2411 12:50:57.938703 lid | undefined | high | high
2412 12:50:57.942071 power | undefined | high | low
2413 12:50:57.948339 oprom | undefined | high | low
2414 12:50:57.955230 EC in RW | 0x00000151 | high | high
2415 12:50:57.955614 Board ID: 3
2416 12:50:57.958546 FW config: 0x131
2417 12:50:57.962095 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum 2007
2418 12:50:57.964978 coreboot table: 1788 bytes.
2419 12:50:57.968403 IMD ROOT 0. 0x76fff000 0x00001000
2420 12:50:57.975282 IMD SMALL 1. 0x76ffe000 0x00001000
2421 12:50:57.978546 FSP MEMORY 2. 0x76afe000 0x00500000
2422 12:50:57.981996 CONSOLE 3. 0x76ade000 0x00020000
2423 12:50:57.985155 RW MCACHE 4. 0x76add000 0x0000043c
2424 12:50:57.988443 RO MCACHE 5. 0x76adc000 0x00000fd8
2425 12:50:57.991909 FMAP 6. 0x76adb000 0x0000064a
2426 12:50:57.995249 TIME STAMP 7. 0x76ada000 0x00000910
2427 12:50:57.998341 VBOOT WORK 8. 0x76ac6000 0x00014000
2428 12:50:58.001709 MEM INFO 9. 0x76ac5000 0x000003b8
2429 12:50:58.008538 ROMSTG STCK10. 0x76ac4000 0x00001000
2430 12:50:58.011669 AFTER CAR 11. 0x76ab8000 0x0000c000
2431 12:50:58.015192 RAMSTAGE 12. 0x76a2e000 0x0008a000
2432 12:50:58.018524 ACPI BERT 13. 0x76a1e000 0x00010000
2433 12:50:58.022198 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2434 12:50:58.025360 REFCODE 15. 0x769ae000 0x0006f000
2435 12:50:58.028591 SMM BACKUP 16. 0x7699e000 0x00010000
2436 12:50:58.032084 IGD OPREGION17. 0x76999000 0x00004203
2437 12:50:58.038929 RAMOOPS 18. 0x76899000 0x00100000
2438 12:50:58.041915 COREBOOT 19. 0x76891000 0x00008000
2439 12:50:58.045620 ACPI 20. 0x7686d000 0x00024000
2440 12:50:58.048668 TPM2 TCGLOG21. 0x7685d000 0x00010000
2441 12:50:58.051841 PMC CRASHLOG22. 0x7685c000 0x00000c00
2442 12:50:58.055364 CPU CRASHLOG23. 0x76858000 0x00003480
2443 12:50:58.058793 SMBIOS 24. 0x76857000 0x00001000
2444 12:50:58.061800 IMD small region:
2445 12:50:58.065448 IMD ROOT 0. 0x76ffec00 0x00000400
2446 12:50:58.068740 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2447 12:50:58.071887 VPD 2. 0x76ffeb60 0x0000006c
2448 12:50:58.078852 POWER STATE 3. 0x76ffeb00 0x00000044
2449 12:50:58.081984 ROMSTAGE 4. 0x76ffeae0 0x00000004
2450 12:50:58.085273 ACPI GNVS 5. 0x76ffea80 0x00000048
2451 12:50:58.088524 TYPE_C INFO 6. 0x76ffea60 0x0000000c
2452 12:50:58.095928 BS: BS_WRITE_TABLES run times (exec / console): 7 / 628 ms
2453 12:50:58.098909 MTRR: Physical address space:
2454 12:50:58.105287 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2455 12:50:58.112150 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2456 12:50:58.115435 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2457 12:50:58.122332 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2458 12:50:58.128963 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2459 12:50:58.135575 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2460 12:50:58.141885 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2461 12:50:58.145241 MTRR: Fixed MSR 0x250 0x0606060606060606
2462 12:50:58.148675 MTRR: Fixed MSR 0x258 0x0606060606060606
2463 12:50:58.155311 MTRR: Fixed MSR 0x259 0x0000000000000000
2464 12:50:58.158513 MTRR: Fixed MSR 0x268 0x0606060606060606
2465 12:50:58.162320 MTRR: Fixed MSR 0x269 0x0606060606060606
2466 12:50:58.165237 MTRR: Fixed MSR 0x26a 0x0606060606060606
2467 12:50:58.171728 MTRR: Fixed MSR 0x26b 0x0606060606060606
2468 12:50:58.175494 MTRR: Fixed MSR 0x26c 0x0606060606060606
2469 12:50:58.178331 MTRR: Fixed MSR 0x26d 0x0606060606060606
2470 12:50:58.182015 MTRR: Fixed MSR 0x26e 0x0606060606060606
2471 12:50:58.185127 MTRR: Fixed MSR 0x26f 0x0606060606060606
2472 12:50:58.190270 call enable_fixed_mtrr()
2473 12:50:58.193388 CPU physical address size: 39 bits
2474 12:50:58.200153 MTRR: default type WB/UC MTRR counts: 6/6.
2475 12:50:58.203187 MTRR: UC selected as default type.
2476 12:50:58.210243 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2477 12:50:58.213342 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2478 12:50:58.219949 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2479 12:50:58.226668 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2480 12:50:58.233318 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2481 12:50:58.239566 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2482 12:50:58.246499 MTRR: Fixed MSR 0x250 0x0606060606060606
2483 12:50:58.249939 MTRR: Fixed MSR 0x258 0x0606060606060606
2484 12:50:58.252926 MTRR: Fixed MSR 0x259 0x0000000000000000
2485 12:50:58.256303 MTRR: Fixed MSR 0x268 0x0606060606060606
2486 12:50:58.263027 MTRR: Fixed MSR 0x269 0x0606060606060606
2487 12:50:58.266388 MTRR: Fixed MSR 0x26a 0x0606060606060606
2488 12:50:58.269545 MTRR: Fixed MSR 0x26b 0x0606060606060606
2489 12:50:58.273240 MTRR: Fixed MSR 0x26c 0x0606060606060606
2490 12:50:58.279620 MTRR: Fixed MSR 0x26d 0x0606060606060606
2491 12:50:58.282689 MTRR: Fixed MSR 0x26e 0x0606060606060606
2492 12:50:58.286559 MTRR: Fixed MSR 0x26f 0x0606060606060606
2493 12:50:58.289516 MTRR: Fixed MSR 0x250 0x0606060606060606
2494 12:50:58.292906 MTRR: Fixed MSR 0x250 0x0606060606060606
2495 12:50:58.299982 MTRR: Fixed MSR 0x250 0x0606060606060606
2496 12:50:58.302795 MTRR: Fixed MSR 0x250 0x0606060606060606
2497 12:50:58.306363 MTRR: Fixed MSR 0x258 0x0606060606060606
2498 12:50:58.309759 MTRR: Fixed MSR 0x259 0x0000000000000000
2499 12:50:58.316074 MTRR: Fixed MSR 0x268 0x0606060606060606
2500 12:50:58.319692 MTRR: Fixed MSR 0x269 0x0606060606060606
2501 12:50:58.322612 MTRR: Fixed MSR 0x26a 0x0606060606060606
2502 12:50:58.326063 MTRR: Fixed MSR 0x26b 0x0606060606060606
2503 12:50:58.333117 MTRR: Fixed MSR 0x26c 0x0606060606060606
2504 12:50:58.335936 MTRR: Fixed MSR 0x26d 0x0606060606060606
2505 12:50:58.339230 MTRR: Fixed MSR 0x26e 0x0606060606060606
2506 12:50:58.342730 MTRR: Fixed MSR 0x26f 0x0606060606060606
2507 12:50:58.346126 MTRR: Fixed MSR 0x258 0x0606060606060606
2508 12:50:58.349456 call enable_fixed_mtrr()
2509 12:50:58.352876 MTRR: Fixed MSR 0x258 0x0606060606060606
2510 12:50:58.359540 MTRR: Fixed MSR 0x250 0x0606060606060606
2511 12:50:58.362832 CPU physical address size: 39 bits
2512 12:50:58.366142 call enable_fixed_mtrr()
2513 12:50:58.369653 MTRR: Fixed MSR 0x258 0x0606060606060606
2514 12:50:58.373055 CPU physical address size: 39 bits
2515 12:50:58.376302 MTRR: Fixed MSR 0x259 0x0000000000000000
2516 12:50:58.379546 MTRR: Fixed MSR 0x258 0x0606060606060606
2517 12:50:58.385876 MTRR: Fixed MSR 0x259 0x0000000000000000
2518 12:50:58.389557 MTRR: Fixed MSR 0x259 0x0000000000000000
2519 12:50:58.392570 MTRR: Fixed MSR 0x268 0x0606060606060606
2520 12:50:58.396188 MTRR: Fixed MSR 0x269 0x0606060606060606
2521 12:50:58.402488 MTRR: Fixed MSR 0x26a 0x0606060606060606
2522 12:50:58.405915 MTRR: Fixed MSR 0x26b 0x0606060606060606
2523 12:50:58.409435 MTRR: Fixed MSR 0x26c 0x0606060606060606
2524 12:50:58.412565 MTRR: Fixed MSR 0x26d 0x0606060606060606
2525 12:50:58.419193 MTRR: Fixed MSR 0x26e 0x0606060606060606
2526 12:50:58.422466 MTRR: Fixed MSR 0x26f 0x0606060606060606
2527 12:50:58.426184 MTRR: Fixed MSR 0x268 0x0606060606060606
2528 12:50:58.429413 call enable_fixed_mtrr()
2529 12:50:58.432548 MTRR: Fixed MSR 0x250 0x0606060606060606
2530 12:50:58.436217 MTRR: Fixed MSR 0x259 0x0000000000000000
2531 12:50:58.439734 MTRR: Fixed MSR 0x269 0x0606060606060606
2532 12:50:58.445876 MTRR: Fixed MSR 0x268 0x0606060606060606
2533 12:50:58.449350 MTRR: Fixed MSR 0x258 0x0606060606060606
2534 12:50:58.452765 MTRR: Fixed MSR 0x259 0x0000000000000000
2535 12:50:58.456035 MTRR: Fixed MSR 0x268 0x0606060606060606
2536 12:50:58.463076 MTRR: Fixed MSR 0x269 0x0606060606060606
2537 12:50:58.466242 MTRR: Fixed MSR 0x26a 0x0606060606060606
2538 12:50:58.469377 MTRR: Fixed MSR 0x26b 0x0606060606060606
2539 12:50:58.472690 MTRR: Fixed MSR 0x26c 0x0606060606060606
2540 12:50:58.479283 MTRR: Fixed MSR 0x26d 0x0606060606060606
2541 12:50:58.482713 MTRR: Fixed MSR 0x26e 0x0606060606060606
2542 12:50:58.486237 MTRR: Fixed MSR 0x26f 0x0606060606060606
2543 12:50:58.489514 CPU physical address size: 39 bits
2544 12:50:58.492703 call enable_fixed_mtrr()
2545 12:50:58.495739 MTRR: Fixed MSR 0x26a 0x0606060606060606
2546 12:50:58.499688 CPU physical address size: 39 bits
2547 12:50:58.502756 MTRR: Fixed MSR 0x268 0x0606060606060606
2548 12:50:58.509314 MTRR: Fixed MSR 0x26b 0x0606060606060606
2549 12:50:58.512767 MTRR: Fixed MSR 0x269 0x0606060606060606
2550 12:50:58.515672 MTRR: Fixed MSR 0x26c 0x0606060606060606
2551 12:50:58.518980 MTRR: Fixed MSR 0x26d 0x0606060606060606
2552 12:50:58.525854 MTRR: Fixed MSR 0x26e 0x0606060606060606
2553 12:50:58.529063 MTRR: Fixed MSR 0x26f 0x0606060606060606
2554 12:50:58.532290 MTRR: Fixed MSR 0x269 0x0606060606060606
2555 12:50:58.535869 call enable_fixed_mtrr()
2556 12:50:58.539039 MTRR: Fixed MSR 0x26a 0x0606060606060606
2557 12:50:58.542495 MTRR: Fixed MSR 0x26b 0x0606060606060606
2558 12:50:58.545649 MTRR: Fixed MSR 0x26c 0x0606060606060606
2559 12:50:58.552223 MTRR: Fixed MSR 0x26d 0x0606060606060606
2560 12:50:58.555807 MTRR: Fixed MSR 0x26e 0x0606060606060606
2561 12:50:58.559147 MTRR: Fixed MSR 0x26f 0x0606060606060606
2562 12:50:58.562466 CPU physical address size: 39 bits
2563 12:50:58.565885 call enable_fixed_mtrr()
2564 12:50:58.568944 MTRR: Fixed MSR 0x26a 0x0606060606060606
2565 12:50:58.572640 CPU physical address size: 39 bits
2566 12:50:58.575751 MTRR: Fixed MSR 0x26b 0x0606060606060606
2567 12:50:58.582366 MTRR: Fixed MSR 0x26c 0x0606060606060606
2568 12:50:58.585599 MTRR: Fixed MSR 0x26d 0x0606060606060606
2569 12:50:58.588896 MTRR: Fixed MSR 0x26e 0x0606060606060606
2570 12:50:58.592014 MTRR: Fixed MSR 0x26f 0x0606060606060606
2571 12:50:58.597090 call enable_fixed_mtrr()
2572 12:50:58.600435 CPU physical address size: 39 bits
2573 12:50:58.604777
2574 12:50:58.605186 MTRR check
2575 12:50:58.607984 Fixed MTRRs : Enabled
2576 12:50:58.608394 Variable MTRRs: Enabled
2577 12:50:58.608719
2578 12:50:58.614691 BS: BS_WRITE_TABLES exit times (exec / console): 251 / 150 ms
2579 12:50:58.618045 Checking cr50 for pending updates
2580 12:50:58.630458 Reading cr50 TPM mode
2581 12:50:58.645373 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2582 12:50:58.655749 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2583 12:50:58.659015 Checking segment from ROM address 0xf96cbe6c
2584 12:50:58.662477 Checking segment from ROM address 0xf96cbe88
2585 12:50:58.668733 Loading segment from ROM address 0xf96cbe6c
2586 12:50:58.669142 code (compression=1)
2587 12:50:58.679039 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2588 12:50:58.685436 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2589 12:50:58.688817 using LZMA
2590 12:50:58.711273 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2591 12:50:58.717671 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2592 12:50:58.725665 Loading segment from ROM address 0xf96cbe88
2593 12:50:58.728929 Entry Point 0x30000000
2594 12:50:58.729364 Loaded segments
2595 12:50:58.735964 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2596 12:50:58.742403 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2597 12:50:58.745801 Finalizing chipset.
2598 12:50:58.746163 apm_control: Finalizing SMM.
2599 12:50:58.749276 APMC done.
2600 12:50:58.752657 HECI: CSE device 16.1 is disabled
2601 12:50:58.755962 HECI: CSE device 16.2 is disabled
2602 12:50:58.758978 HECI: CSE device 16.3 is disabled
2603 12:50:58.762550 HECI: CSE device 16.4 is disabled
2604 12:50:58.765478 HECI: CSE device 16.5 is disabled
2605 12:50:58.769315 HECI: Sending End-of-Post
2606 12:50:58.777602 CSE: EOP requested action: continue boot
2607 12:50:58.780782 CSE EOP successful, continuing boot
2608 12:50:58.787060 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2609 12:50:58.790685 mp_park_aps done after 0 msecs.
2610 12:50:58.793920 Jumping to boot code at 0x30000000(0x76891000)
2611 12:50:58.803700 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2612 12:50:58.807700
2613 12:50:58.808110
2614 12:50:58.808429
2615 12:50:58.811084 Starting depthcharge on Volmar...
2616 12:50:58.811491
2617 12:50:58.812668 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2618 12:50:58.813131 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2619 12:50:58.813535 Setting prompt string to ['brya:']
2620 12:50:58.813903 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2621 12:50:58.818298 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2622 12:50:58.818749
2623 12:50:58.824495 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2624 12:50:58.824912
2625 12:50:58.831184 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2626 12:50:58.831658
2627 12:50:58.834468 configure_storage: Failed to remap 1C:2
2628 12:50:58.834912
2629 12:50:58.835244 Wipe memory regions:
2630 12:50:58.838209
2631 12:50:58.841354 [0x00000000001000, 0x000000000a0000)
2632 12:50:58.841769
2633 12:50:58.844671 [0x00000000100000, 0x00000030000000)
2634 12:50:58.951947
2635 12:50:58.955377 [0x00000032668e60, 0x00000076857000)
2636 12:50:59.107028
2637 12:50:59.110235 [0x00000100000000, 0x0000027fc00000)
2638 12:50:59.954750
2639 12:50:59.958115 ec_init: CrosEC protocol v3 supported (256, 256)
2640 12:51:00.566380
2641 12:51:00.566533 R8152: Initializing
2642 12:51:00.566625
2643 12:51:00.569942 Version 9 (ocp_data = 6010)
2644 12:51:00.570024
2645 12:51:00.573022 R8152: Done initializing
2646 12:51:00.573101
2647 12:51:00.576161 Adding net device
2648 12:51:00.877229
2649 12:51:00.880813 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2650 12:51:00.880898
2651 12:51:00.880964
2652 12:51:00.881024
2653 12:51:00.881305 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2655 12:51:00.981654 brya: tftpboot 192.168.201.1 11602072/tftp-deploy-u8jg9vk_/kernel/bzImage 11602072/tftp-deploy-u8jg9vk_/kernel/cmdline 11602072/tftp-deploy-u8jg9vk_/ramdisk/ramdisk.cpio.gz
2656 12:51:00.981767 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2657 12:51:00.981847 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2658 12:51:00.986190 tftpboot 192.168.201.1 11602072/tftp-deploy-u8jg9vk_/kernel/bzIploy-u8jg9vk_/kernel/cmdline 11602072/tftp-deploy-u8jg9vk_/ramdisk/ramdisk.cpio.gz
2659 12:51:00.986276
2660 12:51:00.986340 Waiting for link
2661 12:51:01.190561
2662 12:51:01.190719 done.
2663 12:51:01.190786
2664 12:51:01.190846 MAC: 00:e0:4c:68:02:37
2665 12:51:01.190906
2666 12:51:01.193674 Sending DHCP discover... done.
2667 12:51:01.193756
2668 12:51:01.197451 Waiting for reply... done.
2669 12:51:01.197533
2670 12:51:01.200429 Sending DHCP request... done.
2671 12:51:01.200511
2672 12:51:01.203520 Waiting for reply... done.
2673 12:51:01.207286
2674 12:51:01.207363 My ip is 192.168.201.15
2675 12:51:01.207429
2676 12:51:01.210537 The DHCP server ip is 192.168.201.1
2677 12:51:01.210668
2678 12:51:01.216812 TFTP server IP predefined by user: 192.168.201.1
2679 12:51:01.216893
2680 12:51:01.223747 Bootfile predefined by user: 11602072/tftp-deploy-u8jg9vk_/kernel/bzImage
2681 12:51:01.223829
2682 12:51:01.227156 Sending tftp read request... done.
2683 12:51:01.227238
2684 12:51:01.230368 Waiting for the transfer...
2685 12:51:01.230450
2686 12:51:01.505810 00000000 ################################################################
2687 12:51:01.505952
2688 12:51:01.779255 00080000 ################################################################
2689 12:51:01.779394
2690 12:51:02.054768 00100000 ################################################################
2691 12:51:02.054897
2692 12:51:02.330647 00180000 ################################################################
2693 12:51:02.330806
2694 12:51:02.607082 00200000 ################################################################
2695 12:51:02.607208
2696 12:51:02.876371 00280000 ################################################################
2697 12:51:02.876530
2698 12:51:03.124939 00300000 ################################################################
2699 12:51:03.125090
2700 12:51:03.371352 00380000 ################################################################
2701 12:51:03.371482
2702 12:51:03.628112 00400000 ################################################################
2703 12:51:03.628270
2704 12:51:03.884410 00480000 ################################################################
2705 12:51:03.884546
2706 12:51:04.150938 00500000 ################################################################
2707 12:51:04.151107
2708 12:51:04.406890 00580000 ################################################################
2709 12:51:04.407028
2710 12:51:04.682931 00600000 ################################################################
2711 12:51:04.683074
2712 12:51:04.959437 00680000 ################################################################
2713 12:51:04.959572
2714 12:51:05.225627 00700000 ################################################################
2715 12:51:05.225756
2716 12:51:05.472152 00780000 ################################################################
2717 12:51:05.472303
2718 12:51:05.721873 00800000 ################################################################
2719 12:51:05.722020
2720 12:51:05.996562 00880000 ################################################################
2721 12:51:05.996696
2722 12:51:06.273063 00900000 ################################################################
2723 12:51:06.273199
2724 12:51:06.543879 00980000 ################################################################
2725 12:51:06.544027
2726 12:51:06.793600 00a00000 ################################################################
2727 12:51:06.793736
2728 12:51:07.009501 00a80000 ######################################################### done.
2729 12:51:07.009644
2730 12:51:07.012799 The bootfile was 11473408 bytes long.
2731 12:51:07.016146
2732 12:51:07.019440 Sending tftp read request... done.
2733 12:51:07.019523
2734 12:51:07.019588 Waiting for the transfer...
2735 12:51:07.019650
2736 12:51:07.275149 00000000 ################################################################
2737 12:51:07.275283
2738 12:51:07.521315 00080000 ################################################################
2739 12:51:07.521445
2740 12:51:07.777192 00100000 ################################################################
2741 12:51:07.777327
2742 12:51:08.070372 00180000 ################################################################
2743 12:51:08.070517
2744 12:51:08.368222 00200000 ################################################################
2745 12:51:08.368374
2746 12:51:08.668751 00280000 ################################################################
2747 12:51:08.668897
2748 12:51:08.967915 00300000 ################################################################
2749 12:51:08.968056
2750 12:51:09.268303 00380000 ################################################################
2751 12:51:09.268437
2752 12:51:09.560615 00400000 ################################################################
2753 12:51:09.560750
2754 12:51:09.859665 00480000 ################################################################
2755 12:51:09.859798
2756 12:51:10.158870 00500000 ################################################################
2757 12:51:10.159007
2758 12:51:10.459433 00580000 ################################################################
2759 12:51:10.459565
2760 12:51:10.749311 00600000 ################################################################
2761 12:51:10.749448
2762 12:51:11.140044 00680000 ################################################################
2763 12:51:11.140588
2764 12:51:11.542284 00700000 ################################################################
2765 12:51:11.542886
2766 12:51:11.912646 00780000 ################################################################
2767 12:51:11.912783
2768 12:51:12.211832 00800000 ################################################################
2769 12:51:12.211968
2770 12:51:12.395872 00880000 ######################################## done.
2771 12:51:12.396002
2772 12:51:12.399626 Sending tftp read request... done.
2773 12:51:12.399718
2774 12:51:12.402720 Waiting for the transfer...
2775 12:51:12.402816
2776 12:51:12.402891 00000000 # done.
2777 12:51:12.402964
2778 12:51:12.412739 Command line loaded dynamically from TFTP file: 11602072/tftp-deploy-u8jg9vk_/kernel/cmdline
2779 12:51:12.412930
2780 12:51:12.429472 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2781 12:51:12.434521
2782 12:51:12.437665 Shutting down all USB controllers.
2783 12:51:12.437929
2784 12:51:12.438078 Removing current net device
2785 12:51:12.438215
2786 12:51:12.440707 Finalizing coreboot
2787 12:51:12.440912
2788 12:51:12.447398 Exiting depthcharge with code 4 at timestamp: 23952364
2789 12:51:12.447641
2790 12:51:12.447830
2791 12:51:12.448010 Starting kernel ...
2792 12:51:12.448182
2793 12:51:12.448349
2794 12:51:12.449215 end: 2.2.4 bootloader-commands (duration 00:00:14) [common]
2795 12:51:12.449554 start: 2.2.5 auto-login-action (timeout 00:04:27) [common]
2796 12:51:12.449828 Setting prompt string to ['Linux version [0-9]']
2797 12:51:12.450128 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2798 12:51:12.450377 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2800 12:55:39.450545 end: 2.2.5 auto-login-action (duration 00:04:27) [common]
2802 12:55:39.451659 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 267 seconds'
2804 12:55:39.452524 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2807 12:55:39.453865 end: 2 depthcharge-action (duration 00:05:00) [common]
2809 12:55:39.454944 Cleaning after the job
2810 12:55:39.455167 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11602072/tftp-deploy-u8jg9vk_/ramdisk
2811 12:55:39.456567 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11602072/tftp-deploy-u8jg9vk_/kernel
2812 12:55:39.458429 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11602072/tftp-deploy-u8jg9vk_/modules
2813 12:55:39.459077 start: 5.1 power-off (timeout 00:00:30) [common]
2814 12:55:39.459238 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-7' '--port=1' '--command=off'
2815 12:55:39.537842 >> Command sent successfully.
2816 12:55:39.544289 Returned 0 in 0 seconds
2817 12:55:39.645469 end: 5.1 power-off (duration 00:00:00) [common]
2819 12:55:39.647052 start: 5.2 read-feedback (timeout 00:10:00) [common]
2820 12:55:39.648556 Listened to connection for namespace 'common' for up to 1s
2822 12:55:39.650188 Listened to connection for namespace 'common' for up to 1s
2823 12:55:40.649373 Finalising connection for namespace 'common'
2824 12:55:40.650018 Disconnecting from shell: Finalise
2825 12:55:40.650395
2826 12:55:40.751432 end: 5.2 read-feedback (duration 00:00:01) [common]
2827 12:55:40.752004 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11602072
2828 12:55:40.772527 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11602072
2829 12:55:40.772662 JobError: Your job cannot terminate cleanly.