Boot log: acer-chromebox-cxi4-puff
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 12:50:32.742987 lava-dispatcher, installed at version: 2023.06
2 12:50:32.743187 start: 0 validate
3 12:50:32.743323 Start time: 2023-09-23 12:50:32.743315+00:00 (UTC)
4 12:50:32.743460 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:50:32.743608 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 12:50:33.004065 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:50:33.004259 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.292-cip102-406-g9efaa60a8cb4%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:50:33.272740 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:50:33.273501 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.292-cip102-406-g9efaa60a8cb4%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:50:37.043329 validate duration: 4.30
12 12:50:37.043596 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:50:37.043701 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:50:37.043793 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:50:37.043921 Not decompressing ramdisk as can be used compressed.
16 12:50:37.044017 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 12:50:37.044091 saving as /var/lib/lava/dispatcher/tmp/11602066/tftp-deploy-j7sndxv_/ramdisk/rootfs.cpio.gz
18 12:50:37.044161 total size: 8418130 (8 MB)
19 12:50:37.705608 progress 0 % (0 MB)
20 12:50:37.711507 progress 5 % (0 MB)
21 12:50:37.713781 progress 10 % (0 MB)
22 12:50:37.716116 progress 15 % (1 MB)
23 12:50:37.718375 progress 20 % (1 MB)
24 12:50:37.720783 progress 25 % (2 MB)
25 12:50:37.723103 progress 30 % (2 MB)
26 12:50:37.725211 progress 35 % (2 MB)
27 12:50:37.727477 progress 40 % (3 MB)
28 12:50:37.729688 progress 45 % (3 MB)
29 12:50:37.731971 progress 50 % (4 MB)
30 12:50:37.734197 progress 55 % (4 MB)
31 12:50:37.736438 progress 60 % (4 MB)
32 12:50:37.738447 progress 65 % (5 MB)
33 12:50:37.740715 progress 70 % (5 MB)
34 12:50:37.742956 progress 75 % (6 MB)
35 12:50:37.745117 progress 80 % (6 MB)
36 12:50:37.747329 progress 85 % (6 MB)
37 12:50:37.749489 progress 90 % (7 MB)
38 12:50:37.751698 progress 95 % (7 MB)
39 12:50:37.753719 progress 100 % (8 MB)
40 12:50:37.753947 8 MB downloaded in 0.71 s (11.31 MB/s)
41 12:50:37.754098 end: 1.1.1 http-download (duration 00:00:01) [common]
43 12:50:37.754335 end: 1.1 download-retry (duration 00:00:01) [common]
44 12:50:37.754421 start: 1.2 download-retry (timeout 00:09:59) [common]
45 12:50:37.754505 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 12:50:37.754687 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.292-cip102-406-g9efaa60a8cb4/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:50:37.754758 saving as /var/lib/lava/dispatcher/tmp/11602066/tftp-deploy-j7sndxv_/kernel/bzImage
48 12:50:37.754819 total size: 11473408 (10 MB)
49 12:50:37.754885 No compression specified
50 12:50:37.756211 progress 0 % (0 MB)
51 12:50:37.759177 progress 5 % (0 MB)
52 12:50:37.762218 progress 10 % (1 MB)
53 12:50:37.765196 progress 15 % (1 MB)
54 12:50:37.768289 progress 20 % (2 MB)
55 12:50:37.771224 progress 25 % (2 MB)
56 12:50:37.774264 progress 30 % (3 MB)
57 12:50:37.777157 progress 35 % (3 MB)
58 12:50:37.780237 progress 40 % (4 MB)
59 12:50:37.783167 progress 45 % (4 MB)
60 12:50:37.786362 progress 50 % (5 MB)
61 12:50:37.789334 progress 55 % (6 MB)
62 12:50:37.792485 progress 60 % (6 MB)
63 12:50:37.795432 progress 65 % (7 MB)
64 12:50:37.798504 progress 70 % (7 MB)
65 12:50:37.801370 progress 75 % (8 MB)
66 12:50:37.804440 progress 80 % (8 MB)
67 12:50:37.807366 progress 85 % (9 MB)
68 12:50:37.810376 progress 90 % (9 MB)
69 12:50:37.813293 progress 95 % (10 MB)
70 12:50:37.816350 progress 100 % (10 MB)
71 12:50:37.816473 10 MB downloaded in 0.06 s (177.48 MB/s)
72 12:50:37.816618 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:50:37.816845 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:50:37.816931 start: 1.3 download-retry (timeout 00:09:59) [common]
76 12:50:37.817016 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 12:50:37.817159 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.292-cip102-406-g9efaa60a8cb4/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:50:37.817229 saving as /var/lib/lava/dispatcher/tmp/11602066/tftp-deploy-j7sndxv_/modules/modules.tar
79 12:50:37.817290 total size: 484692 (0 MB)
80 12:50:37.817351 Using unxz to decompress xz
81 12:50:37.821773 progress 6 % (0 MB)
82 12:50:37.822160 progress 13 % (0 MB)
83 12:50:37.822390 progress 20 % (0 MB)
84 12:50:37.824035 progress 27 % (0 MB)
85 12:50:37.826043 progress 33 % (0 MB)
86 12:50:37.827868 progress 40 % (0 MB)
87 12:50:37.829915 progress 47 % (0 MB)
88 12:50:37.831857 progress 54 % (0 MB)
89 12:50:37.833898 progress 60 % (0 MB)
90 12:50:37.836323 progress 67 % (0 MB)
91 12:50:37.838435 progress 74 % (0 MB)
92 12:50:37.840477 progress 81 % (0 MB)
93 12:50:37.842781 progress 87 % (0 MB)
94 12:50:37.844442 progress 94 % (0 MB)
95 12:50:37.846576 progress 100 % (0 MB)
96 12:50:37.852650 0 MB downloaded in 0.04 s (13.07 MB/s)
97 12:50:37.852882 end: 1.3.1 http-download (duration 00:00:00) [common]
99 12:50:37.853137 end: 1.3 download-retry (duration 00:00:00) [common]
100 12:50:37.853231 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
101 12:50:37.853327 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
102 12:50:37.853408 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 12:50:37.853493 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
104 12:50:37.853710 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11602066/lava-overlay-kvd_e0sq
105 12:50:37.853846 makedir: /var/lib/lava/dispatcher/tmp/11602066/lava-overlay-kvd_e0sq/lava-11602066/bin
106 12:50:37.853953 makedir: /var/lib/lava/dispatcher/tmp/11602066/lava-overlay-kvd_e0sq/lava-11602066/tests
107 12:50:37.854054 makedir: /var/lib/lava/dispatcher/tmp/11602066/lava-overlay-kvd_e0sq/lava-11602066/results
108 12:50:37.854172 Creating /var/lib/lava/dispatcher/tmp/11602066/lava-overlay-kvd_e0sq/lava-11602066/bin/lava-add-keys
109 12:50:37.854323 Creating /var/lib/lava/dispatcher/tmp/11602066/lava-overlay-kvd_e0sq/lava-11602066/bin/lava-add-sources
110 12:50:37.854461 Creating /var/lib/lava/dispatcher/tmp/11602066/lava-overlay-kvd_e0sq/lava-11602066/bin/lava-background-process-start
111 12:50:37.854625 Creating /var/lib/lava/dispatcher/tmp/11602066/lava-overlay-kvd_e0sq/lava-11602066/bin/lava-background-process-stop
112 12:50:37.854783 Creating /var/lib/lava/dispatcher/tmp/11602066/lava-overlay-kvd_e0sq/lava-11602066/bin/lava-common-functions
113 12:50:37.854910 Creating /var/lib/lava/dispatcher/tmp/11602066/lava-overlay-kvd_e0sq/lava-11602066/bin/lava-echo-ipv4
114 12:50:37.855037 Creating /var/lib/lava/dispatcher/tmp/11602066/lava-overlay-kvd_e0sq/lava-11602066/bin/lava-install-packages
115 12:50:37.855164 Creating /var/lib/lava/dispatcher/tmp/11602066/lava-overlay-kvd_e0sq/lava-11602066/bin/lava-installed-packages
116 12:50:37.855292 Creating /var/lib/lava/dispatcher/tmp/11602066/lava-overlay-kvd_e0sq/lava-11602066/bin/lava-os-build
117 12:50:37.855419 Creating /var/lib/lava/dispatcher/tmp/11602066/lava-overlay-kvd_e0sq/lava-11602066/bin/lava-probe-channel
118 12:50:37.855545 Creating /var/lib/lava/dispatcher/tmp/11602066/lava-overlay-kvd_e0sq/lava-11602066/bin/lava-probe-ip
119 12:50:37.855673 Creating /var/lib/lava/dispatcher/tmp/11602066/lava-overlay-kvd_e0sq/lava-11602066/bin/lava-target-ip
120 12:50:37.855799 Creating /var/lib/lava/dispatcher/tmp/11602066/lava-overlay-kvd_e0sq/lava-11602066/bin/lava-target-mac
121 12:50:37.855925 Creating /var/lib/lava/dispatcher/tmp/11602066/lava-overlay-kvd_e0sq/lava-11602066/bin/lava-target-storage
122 12:50:37.856059 Creating /var/lib/lava/dispatcher/tmp/11602066/lava-overlay-kvd_e0sq/lava-11602066/bin/lava-test-case
123 12:50:37.856186 Creating /var/lib/lava/dispatcher/tmp/11602066/lava-overlay-kvd_e0sq/lava-11602066/bin/lava-test-event
124 12:50:37.856312 Creating /var/lib/lava/dispatcher/tmp/11602066/lava-overlay-kvd_e0sq/lava-11602066/bin/lava-test-feedback
125 12:50:37.856437 Creating /var/lib/lava/dispatcher/tmp/11602066/lava-overlay-kvd_e0sq/lava-11602066/bin/lava-test-raise
126 12:50:37.856564 Creating /var/lib/lava/dispatcher/tmp/11602066/lava-overlay-kvd_e0sq/lava-11602066/bin/lava-test-reference
127 12:50:37.856695 Creating /var/lib/lava/dispatcher/tmp/11602066/lava-overlay-kvd_e0sq/lava-11602066/bin/lava-test-runner
128 12:50:37.856822 Creating /var/lib/lava/dispatcher/tmp/11602066/lava-overlay-kvd_e0sq/lava-11602066/bin/lava-test-set
129 12:50:37.856951 Creating /var/lib/lava/dispatcher/tmp/11602066/lava-overlay-kvd_e0sq/lava-11602066/bin/lava-test-shell
130 12:50:37.857080 Updating /var/lib/lava/dispatcher/tmp/11602066/lava-overlay-kvd_e0sq/lava-11602066/bin/lava-install-packages (oe)
131 12:50:37.857239 Updating /var/lib/lava/dispatcher/tmp/11602066/lava-overlay-kvd_e0sq/lava-11602066/bin/lava-installed-packages (oe)
132 12:50:37.857364 Creating /var/lib/lava/dispatcher/tmp/11602066/lava-overlay-kvd_e0sq/lava-11602066/environment
133 12:50:37.857470 LAVA metadata
134 12:50:37.857545 - LAVA_JOB_ID=11602066
135 12:50:37.857613 - LAVA_DISPATCHER_IP=192.168.201.1
136 12:50:37.857716 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
137 12:50:37.857786 skipped lava-vland-overlay
138 12:50:37.857865 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 12:50:37.857946 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
140 12:50:37.858010 skipped lava-multinode-overlay
141 12:50:37.858084 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 12:50:37.858164 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
143 12:50:37.858240 Loading test definitions
144 12:50:37.858331 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
145 12:50:37.858410 Using /lava-11602066 at stage 0
146 12:50:37.858775 uuid=11602066_1.4.2.3.1 testdef=None
147 12:50:37.858866 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 12:50:37.858952 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
149 12:50:37.859485 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 12:50:37.859708 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
152 12:50:37.860364 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 12:50:37.860595 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
155 12:50:37.861215 runner path: /var/lib/lava/dispatcher/tmp/11602066/lava-overlay-kvd_e0sq/lava-11602066/0/tests/0_dmesg test_uuid 11602066_1.4.2.3.1
156 12:50:37.861373 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 12:50:37.861597 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
159 12:50:37.861670 Using /lava-11602066 at stage 1
160 12:50:37.861974 uuid=11602066_1.4.2.3.5 testdef=None
161 12:50:37.862063 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 12:50:37.862148 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
163 12:50:37.862708 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 12:50:37.862959 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
166 12:50:37.863608 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 12:50:37.863832 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
169 12:50:37.864469 runner path: /var/lib/lava/dispatcher/tmp/11602066/lava-overlay-kvd_e0sq/lava-11602066/1/tests/1_bootrr test_uuid 11602066_1.4.2.3.5
170 12:50:37.864623 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 12:50:37.864826 Creating lava-test-runner.conf files
173 12:50:37.864889 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11602066/lava-overlay-kvd_e0sq/lava-11602066/0 for stage 0
174 12:50:37.864979 - 0_dmesg
175 12:50:37.865063 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11602066/lava-overlay-kvd_e0sq/lava-11602066/1 for stage 1
176 12:50:37.865155 - 1_bootrr
177 12:50:37.865252 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 12:50:37.865336 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
179 12:50:37.873675 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 12:50:37.873781 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
181 12:50:37.873867 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 12:50:37.873952 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 12:50:37.874037 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
184 12:50:38.123327 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 12:50:38.123700 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
186 12:50:38.123817 extracting modules file /var/lib/lava/dispatcher/tmp/11602066/tftp-deploy-j7sndxv_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11602066/extract-overlay-ramdisk-l3ljm_dz/ramdisk
187 12:50:38.146262 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 12:50:38.146422 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
189 12:50:38.146526 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11602066/compress-overlay-fws1s_se/overlay-1.4.2.4.tar.gz to ramdisk
190 12:50:38.146609 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11602066/compress-overlay-fws1s_se/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11602066/extract-overlay-ramdisk-l3ljm_dz/ramdisk
191 12:50:38.155482 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 12:50:38.155634 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
193 12:50:38.155760 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 12:50:38.155877 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
195 12:50:38.155991 Building ramdisk /var/lib/lava/dispatcher/tmp/11602066/extract-overlay-ramdisk-l3ljm_dz/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11602066/extract-overlay-ramdisk-l3ljm_dz/ramdisk
196 12:50:38.302883 >> 53982 blocks
197 12:50:39.187223 rename /var/lib/lava/dispatcher/tmp/11602066/extract-overlay-ramdisk-l3ljm_dz/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11602066/tftp-deploy-j7sndxv_/ramdisk/ramdisk.cpio.gz
198 12:50:39.187701 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 12:50:39.187827 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 12:50:39.187935 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 12:50:39.188030 No mkimage arch provided, not using FIT.
202 12:50:39.188120 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 12:50:39.188205 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 12:50:39.188315 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 12:50:39.188411 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 12:50:39.188495 No LXC device requested
207 12:50:39.188578 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 12:50:39.188670 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 12:50:39.188748 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 12:50:39.188823 Checking files for TFTP limit of 4294967296 bytes.
211 12:50:39.189240 end: 1 tftp-deploy (duration 00:00:02) [common]
212 12:50:39.189346 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 12:50:39.189440 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 12:50:39.189565 substitutions:
215 12:50:39.189634 - {DTB}: None
216 12:50:39.189698 - {INITRD}: 11602066/tftp-deploy-j7sndxv_/ramdisk/ramdisk.cpio.gz
217 12:50:39.189760 - {KERNEL}: 11602066/tftp-deploy-j7sndxv_/kernel/bzImage
218 12:50:39.189819 - {LAVA_MAC}: None
219 12:50:39.189878 - {PRESEED_CONFIG}: None
220 12:50:39.189936 - {PRESEED_LOCAL}: None
221 12:50:39.189993 - {RAMDISK}: 11602066/tftp-deploy-j7sndxv_/ramdisk/ramdisk.cpio.gz
222 12:50:39.190049 - {ROOT_PART}: None
223 12:50:39.190105 - {ROOT}: None
224 12:50:39.190160 - {SERVER_IP}: 192.168.201.1
225 12:50:39.190215 - {TEE}: None
226 12:50:39.190270 Parsed boot commands:
227 12:50:39.190324 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 12:50:39.190501 Parsed boot commands: tftpboot 192.168.201.1 11602066/tftp-deploy-j7sndxv_/kernel/bzImage 11602066/tftp-deploy-j7sndxv_/kernel/cmdline 11602066/tftp-deploy-j7sndxv_/ramdisk/ramdisk.cpio.gz
229 12:50:39.190620 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 12:50:39.190724 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 12:50:39.190820 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 12:50:39.190906 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 12:50:39.190980 Not connected, no need to disconnect.
234 12:50:39.191056 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 12:50:39.191143 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 12:50:39.191212 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-chromebox-cxi4-puff-cbg-4'
237 12:50:39.195105 Setting prompt string to ['lava-test: # ']
238 12:50:39.195452 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 12:50:39.195558 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 12:50:39.195661 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 12:50:39.195754 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 12:50:39.195989 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-chromebox-cxi4-puff-cbg-4' '--port=1' '--command=reboot'
243 12:50:45.886721 >> Command sent successfully.
244 12:50:45.897040 Returned 0 in 6 seconds
245 12:50:45.998380 end: 2.2.2.1 pdu-reboot (duration 00:00:07) [common]
247 12:50:45.999865 end: 2.2.2 reset-device (duration 00:00:07) [common]
248 12:50:46.000367 start: 2.2.3 depthcharge-start (timeout 00:04:53) [common]
249 12:50:46.000823 Setting prompt string to 'Starting depthcharge on Kaisa...'
250 12:50:46.001186 Changing prompt to 'Starting depthcharge on Kaisa...'
251 12:50:46.001542 depthcharge-start: Wait for prompt Starting depthcharge on Kaisa... (timeout 00:05:00)
252 12:50:46.002765 [Enter `^Ec?' for help]
253 12:50:46.295260 �
254 12:50:46.295783
255 12:50:46.306051 coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 bootblock starting (log level: 8)...
256 12:50:46.311020 CPU: Intel(R) Celeron(R) CPU 5205U @ 1.90GHz
257 12:50:46.315867 CPU: ID a0660, Cometlake-U A0 (6+2), ucode: 000000c9
258 12:50:46.321492 CPU: AES supported, TXT NOT supported, VT supported
259 12:50:46.326762 MCH: device id 9b71 (rev 00) is CometLake-U (2+2)
260 12:50:46.331822 PCH: device id 0285 (rev 00) is Cometlake-U Base
261 12:50:46.336722 IGD: device id 9baa (rev 04) is CometLake ULT GT2
262 12:50:46.339723 VBOOT: Loading verstage.
263 12:50:46.345212 FMAP: Found "FLASH" version 1.1 at 0xc04000.
264 12:50:46.349811 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
265 12:50:46.354705 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
266 12:50:46.358910 CBFS: Locating 'fallback/verstage'
267 12:50:46.362708 CBFS: Found @ offset 10c240 size 1152c
268 12:50:46.363223
269 12:50:46.363905
270 12:50:46.374702 coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 verstage starting (log level: 8)...
271 12:50:46.388842 Probing TPM: . done!
272 12:50:46.391719 TPM ready after 0 ms
273 12:50:46.397006 Connected to device vid:did:rid of 1ae0:0028:00
274 12:50:46.407154 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b81dc66
275 12:50:46.411278 Initialized TPM device CR50 revision 0
276 12:50:46.518189 tlcl_send_startup: Startup return code is 0
277 12:50:46.520139 TPM: setup succeeded
278 12:50:46.533112 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
279 12:50:46.545666 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
280 12:50:46.554049 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
281 12:50:46.566891 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
282 12:50:46.570364 Chrome EC: UHEPI supported
283 12:50:46.571144 Phase 1
284 12:50:46.575825 FMAP: area GBB found @ c05000 (12288 bytes)
285 12:50:46.583255 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
286 12:50:46.589383 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
287 12:50:46.592741 Recovery requested (1009000e)
288 12:50:46.598701 TPM: Extending digest for VBOOT: boot mode into PCR 0
289 12:50:46.607852 tlcl_extend: response is 0
290 12:50:46.612715 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
291 12:50:46.622541 tlcl_extend: response is 0
292 12:50:46.627497 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
293 12:50:46.630979 CBFS: Locating 'fallback/romstage'
294 12:50:46.634453 CBFS: Found @ offset 80 size 1607c
295 12:50:46.640548 BS: verstage times (exec / console): total (unknown) / 120 ms
296 12:50:46.641969
297 12:50:46.642427
298 12:50:46.652529 coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 romstage starting (log level: 8)...
299 12:50:46.659061 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
300 12:50:46.664613 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
301 12:50:46.668628 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
302 12:50:46.673036 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
303 12:50:46.677470 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
304 12:50:46.681526 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
305 12:50:46.683531 TCO_STS: 0000 0000
306 12:50:46.686611 GEN_PMCON: e0015038 00000200
307 12:50:46.689655 GBLRST_CAUSE: 00000000 00000000
308 12:50:46.691816 prev_sleep_state 5
309 12:50:46.695523 Boot Count incremented to 21151
310 12:50:46.701280 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
311 12:50:46.703747 CBFS: Locating 'fspm.bin'
312 12:50:46.707543 CBFS: Found @ offset 66fc0 size 71000
313 12:50:46.712341 Chrome EC: UHEPI supported
314 12:50:46.717989 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
315 12:50:46.722957 Probing TPM: done!
316 12:50:46.728391 Connected to device vid:did:rid of 1ae0:0028:00
317 12:50:46.737653 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b81dc66
318 12:50:46.741607 Initialized TPM device CR50 revision 0
319 12:50:46.755510 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
320 12:50:46.762074 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
321 12:50:46.764918 MRC cache found, size 1948
322 12:50:46.766688 bootmode is set to: 2
323 12:50:46.769963 PRMRR disabled by config.
324 12:50:46.774922 FMAP: area RW_SPD_CACHE found @ aff000 (4096 bytes)
325 12:50:46.778436 SPD_CACHE: cache found, size 0x1000
326 12:50:46.782193 No memory dimm at address 50
327 12:50:46.785364 SPD_CACHE: DIMM0 is not present
328 12:50:46.790438 SPD_CACHE: DIMM1 is the same
329 12:50:46.791945 SPD @ 0x52
330 12:50:46.794803 SPD: module type is DDR4
331 12:50:46.799462 SPD: module part number is HMA851S6CJR6N-VK
332 12:50:46.805028 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
333 12:50:46.809692 SPD: device width 16 bits, bus width 64 bits
334 12:50:46.814049 SPD: module size is 4096 MB (per channel)
335 12:50:46.817347 memory slot: 2 configuration done.
336 12:50:46.866534 CBMEM:
337 12:50:46.869521 IMD: root @ 0x99fff000 254 entries.
338 12:50:46.873869 IMD: root @ 0x99ffec00 62 entries.
339 12:50:46.878222 FMAP: area RO_VPD found @ c00000 (16384 bytes)
340 12:50:46.882113 WARNING: RO_VPD is uninitialized or empty.
341 12:50:46.887143 FMAP: area RW_VPD found @ af8000 (8192 bytes)
342 12:50:46.890007 External stage cache:
343 12:50:46.893886 IMD: root @ 0x9abff000 254 entries.
344 12:50:46.897862 IMD: root @ 0x9abfec00 62 entries.
345 12:50:46.912316 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
346 12:50:46.921306 tlcl_write: response is 0
347 12:50:46.925680 MRC: TPM MRC hash updated successfully.
348 12:50:46.927030 1 DIMMs found
349 12:50:46.929131 SMM Memory Map
350 12:50:46.932280 SMRAM : 0x9a000000 0x1000000
351 12:50:46.935778 Subregion 0: 0x9a000000 0xa00000
352 12:50:46.938829 Subregion 1: 0x9aa00000 0x200000
353 12:50:46.942667 Subregion 2: 0x9ac00000 0x400000
354 12:50:46.945811 top_of_ram = 0x9a000000
355 12:50:46.950292 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
356 12:50:46.955840 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
357 12:50:46.960866 MTRR Range: Start=ff000000 End=0 (Size 1000000)
358 12:50:46.965307 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
359 12:50:46.968941 CBFS: Locating 'fallback/postcar'
360 12:50:46.972520 CBFS: Found @ offset 1076c0 size 4b28
361 12:50:46.978793 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
362 12:50:46.990006 Loading module at 0x99c0c000 with entry 0x99c0c000. filesize: 0x4818 memsize: 0x8af8
363 12:50:46.994455 Processing 173 relocs. Offset value of 0x97c0c000
364 12:50:47.002491 BS: romstage times (exec / console): total (unknown) / 267 ms
365 12:50:47.003555
366 12:50:47.003933
367 12:50:47.014080 coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 postcar starting (log level: 8)...
368 12:50:47.018885 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
369 12:50:47.023022 CBFS: Locating 'fallback/ramstage'
370 12:50:47.027049 CBFS: Found @ offset 44e00 size 1e0ef
371 12:50:47.032902 Decompressing stage fallback/ramstage @ 0x99ba4fc0 (415200 bytes)
372 12:50:47.064162 Loading module at 0x99ba5000 with entry 0x99ba5000. filesize: 0x46598 memsize: 0x655a0
373 12:50:47.069453 Processing 4604 relocs. Offset value of 0x98da5000
374 12:50:47.075344 BS: postcar times (exec / console): total (unknown) / 43 ms
375 12:50:47.075587
376 12:50:47.075869
377 12:50:47.086499 coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 ramstage starting (log level: 8)...
378 12:50:47.087777 Normal boot
379 12:50:47.093431 cse_lite: Skip switching to RW in the recovery path
380 12:50:47.099088 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 5 ms
381 12:50:47.103817 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
382 12:50:47.107468 CBFS: Locating 'cpu_microcode_blob.bin'
383 12:50:47.111949 CBFS: Found @ offset 16180 size 2ec00
384 12:50:47.116372 microcode: sig=0xa0660 pf=0x80 revision=0xc9
385 12:50:47.118028 Skip microcode update
386 12:50:47.123211 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
387 12:50:47.126170 CBFS: Locating 'fsps.bin'
388 12:50:47.129718 CBFS: Found @ offset d8fc0 size 2e69d
389 12:50:47.165752 Detected 2 core, 2 thread CPU.
390 12:50:47.168007 Setting up SMI for CPU
391 12:50:47.169981 IED base = 0x9ac00000
392 12:50:47.172358 IED size = 0x00400000
393 12:50:47.174732 Will perform SMM setup.
394 12:50:47.179335 CPU: Intel(R) Celeron(R) CPU 5205U @ 1.90GHz.
395 12:50:47.187486 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
396 12:50:47.192446 Processing 16 relocs. Offset value of 0x00030000
397 12:50:47.195124 Attempting to start 1 APs
398 12:50:47.198360 Waiting for 10ms after sending INIT.
399 12:50:47.214450 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 2.
400 12:50:47.215685 done.
401 12:50:47.219091 Waiting for 2nd SIPI to complete...done.
402 12:50:47.227532 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
403 12:50:47.232705 Processing 13 relocs. Offset value of 0x00038000
404 12:50:47.239995 SMM Module: stub loaded at 0x00038000. Will call 0x99bc2760(0x00000000)
405 12:50:47.243152 Installing SMM handler to 0x9a000000
406 12:50:47.251607 Loading module at 0x9a010000 with entry 0x9a010a30. filesize: 0x7bc8 memsize: 0xcc90
407 12:50:47.256908 Processing 617 relocs. Offset value of 0x9a010000
408 12:50:47.265084 Loading module at 0x9a008000 with entry 0x9a008000. filesize: 0x1b8 memsize: 0x1b8
409 12:50:47.269841 Processing 13 relocs. Offset value of 0x9a008000
410 12:50:47.275424 SMM Module: placing jmp sequence at 0x9a007c00 rel16 0x03fd
411 12:50:47.282927 SMM Module: stub loaded at 0x9a008000. Will call 0x9a010a30(0x00000000)
412 12:50:47.286422 Clearing SMI status registers
413 12:50:47.287326 SMI_STS: PM1
414 12:50:47.288836 PM1_STS: PWRBTN
415 12:50:47.291728 New SMBASE 0x9a000000
416 12:50:47.293908 In relocation handler: CPU 0
417 12:50:47.298129 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
418 12:50:47.303382 Writing SMRR. base = 0x9a000006, mask=0xff000800
419 12:50:47.305251 Relocation complete.
420 12:50:47.307933 New SMBASE 0x99fffc00
421 12:50:47.310808 In relocation handler: CPU 1
422 12:50:47.314769 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
423 12:50:47.319650 Writing SMRR. base = 0x9a000006, mask=0xff000800
424 12:50:47.321787 Relocation complete.
425 12:50:47.324035 Initializing CPU #0
426 12:50:47.327388 CPU: vendor Intel device a0660
427 12:50:47.330774 CPU: family 06, model a6, stepping 00
428 12:50:47.334061 Clearing out pending MCEs
429 12:50:47.336485 Setting up local APIC...
430 12:50:47.338187 apic_id: 0x00 done.
431 12:50:47.341449 Turbo is available but hidden
432 12:50:47.343190 Turbo is unavailable
433 12:50:47.344978 VMX status: enabled
434 12:50:47.348870 IA32_FEATURE_CONTROL status: locked
435 12:50:47.350636 Skip microcode update
436 12:50:47.353092 CPU #0 initialized
437 12:50:47.355295 Initializing CPU #1
438 12:50:47.358706 CPU: vendor Intel device a0660
439 12:50:47.362631 CPU: family 06, model a6, stepping 00
440 12:50:47.365056 Clearing out pending MCEs
441 12:50:47.367382 Setting up local APIC...
442 12:50:47.369408 apic_id: 0x02 done.
443 12:50:47.371474 VMX status: enabled
444 12:50:47.375141 IA32_FEATURE_CONTROL status: locked
445 12:50:47.377215 Skip microcode update
446 12:50:47.379782 CPU #1 initialized
447 12:50:47.383691 bsp_do_flight_plan done after 160 msecs.
448 12:50:47.385253 Enabling SMIs.
449 12:50:47.386571 Locking SMM.
450 12:50:47.393182 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 89 / 199 ms
451 12:50:47.404487 Waiting for DisplayPort
452 12:50:50.421923 DisplayPort not ready after 3000ms. Abort.
453 12:50:50.427892 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
454 12:50:50.430412 CBFS: Locating 'vbt.bin'
455 12:50:50.434096 CBFS: Found @ offset 66a80 size 49e
456 12:50:50.438733 Found a VBT of 4608 bytes after decompression
457 12:50:50.440499 psys_pmax = 182W
458 12:50:50.488340 Display FSP Version Info HOB
459 12:50:50.492019 Reference Code - CPU = 9.0.1e.30
460 12:50:50.494273 uCode Version = 0.0.0.ca
461 12:50:50.497649 TXT ACM version = ff.ff.ff.ffff
462 12:50:50.500675 Reference Code - ME = 9.0.1e.30
463 12:50:50.503473 MEBx version = 0.0.0.0
464 12:50:50.506625 ME Firmware Version = Consumer SKU
465 12:50:50.510633 Reference Code - CML PCH = 9.0.1e.30
466 12:50:50.513064 PCH-CRID Status = Disabled
467 12:50:50.517367 PCH-CRID Original Value = ff.ff.ff.ffff
468 12:50:50.520566 PCH-CRID New Value = ff.ff.ff.ffff
469 12:50:50.524210 OPROM - RST - RAID = ff.ff.ff.ffff
470 12:50:50.528121 ChipsetInit Base Version = ff.ff.ff.ffff
471 12:50:50.532192 ChipsetInit Oem Version = ff.ff.ff.ffff
472 12:50:50.537162 Reference Code - SA - System Agent = 9.0.1e.30
473 12:50:50.540110 Reference Code - MRC = 0.0.0.2d
474 12:50:50.543214 SA - PCIe Version = 9.0.1e.30
475 12:50:50.545562 SA-CRID Status = Disabled
476 12:50:50.549050 SA-CRID Original Value = 0.0.0.0
477 12:50:50.551711 SA-CRID New Value = 0.0.0.0
478 12:50:50.554902 OPROM - VBIOS = ff.ff.ff.ffff
479 12:50:50.559476 Found PCIe Root Port #7 at PCI: 00:1c.0.
480 12:50:50.566190 Remapping PCIe Root Port #7 from PCI: 00:1c.6 to new function number 0.
481 12:50:50.578442 pcie_rp_update_dev: Couldn't find PCIe Root Port #9 (originally PCI: 00:1d.0) which was enabled in devicetree, removing.
482 12:50:50.589395 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
483 12:50:50.602155 pcie_rp_update_dev: Couldn't find PCIe Root Port #14 (originally PCI: 00:1d.5) which was enabled in devicetree, removing.
484 12:50:50.608188 BS: BS_DEV_INIT_CHIPS run times (exec / console): 3062 / 140 ms
485 12:50:50.609942 RTC Init
486 12:50:50.612930 Set power on after power failure.
487 12:50:50.615010 Disabling Deep S3
488 12:50:50.617755 Disabling Deep S3
489 12:50:50.619581 Disabling Deep S4
490 12:50:50.620840 Disabling Deep S4
491 12:50:50.622578 Disabling Deep S5
492 12:50:50.624596 Disabling Deep S5
493 12:50:50.630347 BS: BS_DEV_INIT_CHIPS exit times (exec / console): 1 / 15 ms
494 12:50:50.632524 Enumerating buses...
495 12:50:50.637000 Show all devs... Before device enumeration.
496 12:50:50.639802 Root Device: enabled 1
497 12:50:50.642475 CPU_CLUSTER: 0: enabled 1
498 12:50:50.644457 DOMAIN: 0000: enabled 1
499 12:50:50.646893 APIC: 00: enabled 1
500 12:50:50.649153 PCI: 00:00.0: enabled 1
501 12:50:50.651322 PCI: 00:02.0: enabled 1
502 12:50:50.654041 PCI: 00:04.0: enabled 1
503 12:50:50.656541 PCI: 00:05.0: enabled 0
504 12:50:50.658539 PCI: 00:12.0: enabled 1
505 12:50:50.661379 PCI: 00:12.5: enabled 0
506 12:50:50.663559 PCI: 00:12.6: enabled 0
507 12:50:50.665973 PCI: 00:14.0: enabled 1
508 12:50:50.668172 PCI: 00:14.1: enabled 0
509 12:50:50.671108 PCI: 00:14.3: enabled 1
510 12:50:50.673231 PCI: 00:14.5: enabled 1
511 12:50:50.675792 PCI: 00:15.0: enabled 0
512 12:50:50.678194 PCI: 00:15.1: enabled 0
513 12:50:50.680317 PCI: 00:15.2: enabled 1
514 12:50:50.683315 PCI: 00:15.3: enabled 1
515 12:50:50.685314 PCI: 00:16.0: enabled 1
516 12:50:50.688406 PCI: 00:16.1: enabled 0
517 12:50:50.690534 PCI: 00:16.2: enabled 0
518 12:50:50.692704 PCI: 00:16.3: enabled 0
519 12:50:50.695090 PCI: 00:16.4: enabled 0
520 12:50:50.697545 PCI: 00:16.5: enabled 0
521 12:50:50.700345 PCI: 00:17.0: enabled 1
522 12:50:50.702108 PCI: 00:19.0: enabled 1
523 12:50:50.704945 PCI: 00:19.1: enabled 0
524 12:50:50.707381 PCI: 00:19.2: enabled 0
525 12:50:50.709718 PCI: 00:1a.0: enabled 1
526 12:50:50.712154 PCI: 00:1c.0: enabled 0
527 12:50:50.714346 PCI: 00:1c.1: enabled 0
528 12:50:50.716880 PCI: 00:1c.2: enabled 0
529 12:50:50.719093 PCI: 00:1c.3: enabled 0
530 12:50:50.721778 PCI: 00:1c.4: enabled 0
531 12:50:50.724281 PCI: 00:1c.5: enabled 0
532 12:50:50.726354 PCI: 00:1c.0: enabled 1
533 12:50:50.728948 PCI: 00:1c.7: enabled 0
534 12:50:50.731610 PCI: 00:1d.0: enabled 1
535 12:50:50.733715 PCI: 00:1d.1: enabled 0
536 12:50:50.736477 PCI: 00:1d.2: enabled 1
537 12:50:50.738750 PCI: 00:1d.3: enabled 0
538 12:50:50.740824 PCI: 00:1d.4: enabled 0
539 12:50:50.743540 PCI: 00:1d.5: enabled 1
540 12:50:50.746728 PCI: 00:1e.0: enabled 1
541 12:50:50.748513 PCI: 00:1e.1: enabled 0
542 12:50:50.751106 PCI: 00:1e.2: enabled 1
543 12:50:50.753162 PCI: 00:1e.3: enabled 0
544 12:50:50.755873 PCI: 00:1f.0: enabled 1
545 12:50:50.758172 PCI: 00:1f.1: enabled 1
546 12:50:50.760726 PCI: 00:1f.2: enabled 1
547 12:50:50.763112 PCI: 00:1f.3: enabled 1
548 12:50:50.765440 PCI: 00:1f.4: enabled 1
549 12:50:50.767846 PCI: 00:1f.5: enabled 1
550 12:50:50.770391 PCI: 00:1f.6: enabled 0
551 12:50:50.772820 GENERIC: 0.0: enabled 1
552 12:50:50.775021 USB0 port 0: enabled 1
553 12:50:50.777715 I2C: 00:4a: enabled 1
554 12:50:50.779551 I2C: 00:4a: enabled 1
555 12:50:50.781778 I2C: 00:1a: enabled 1
556 12:50:50.785087 PCI: 00:00.0: enabled 1
557 12:50:50.786708 PCI: 00:00.0: enabled 1
558 12:50:50.789002 SPI: 00: enabled 1
559 12:50:50.791571 PNP: 0c09.0: enabled 1
560 12:50:50.793338 USB2 port 0: enabled 1
561 12:50:50.795709 USB2 port 1: enabled 1
562 12:50:50.797681 USB2 port 2: enabled 1
563 12:50:50.800738 USB2 port 3: enabled 1
564 12:50:50.802375 USB2 port 5: enabled 1
565 12:50:50.804968 USB2 port 6: enabled 0
566 12:50:50.807728 USB2 port 9: enabled 1
567 12:50:50.810222 USB3 port 0: enabled 1
568 12:50:50.812170 USB3 port 1: enabled 1
569 12:50:50.814075 USB3 port 2: enabled 1
570 12:50:50.816470 USB3 port 3: enabled 1
571 12:50:50.819229 USB3 port 4: enabled 1
572 12:50:50.821549 USB2 port 4: enabled 1
573 12:50:50.823830 USB3 port 5: enabled 1
574 12:50:50.825590 APIC: 02: enabled 1
575 12:50:50.827891 Compare with tree...
576 12:50:50.829939 Root Device: enabled 1
577 12:50:50.833101 CPU_CLUSTER: 0: enabled 1
578 12:50:50.835522 APIC: 00: enabled 1
579 12:50:50.837624 APIC: 02: enabled 1
580 12:50:50.839982 DOMAIN: 0000: enabled 1
581 12:50:50.842475 PCI: 00:00.0: enabled 1
582 12:50:50.845516 PCI: 00:02.0: enabled 1
583 12:50:50.848669 PCI: 00:04.0: enabled 1
584 12:50:50.851055 GENERIC: 0.0: enabled 1
585 12:50:50.853303 PCI: 00:05.0: enabled 0
586 12:50:50.856419 PCI: 00:12.0: enabled 1
587 12:50:50.859224 PCI: 00:12.5: enabled 0
588 12:50:50.861500 PCI: 00:12.6: enabled 0
589 12:50:50.863889 PCI: 00:14.0: enabled 1
590 12:50:50.866562 USB0 port 0: enabled 1
591 12:50:50.869079 USB2 port 0: enabled 1
592 12:50:50.871956 USB2 port 1: enabled 1
593 12:50:50.874228 USB2 port 2: enabled 1
594 12:50:50.877034 USB2 port 3: enabled 1
595 12:50:50.880655 USB2 port 5: enabled 1
596 12:50:50.882524 USB2 port 6: enabled 0
597 12:50:50.885755 USB2 port 9: enabled 1
598 12:50:50.888098 USB3 port 0: enabled 1
599 12:50:50.891334 USB3 port 1: enabled 1
600 12:50:50.893629 USB3 port 2: enabled 1
601 12:50:50.896420 USB3 port 3: enabled 1
602 12:50:50.899296 USB3 port 4: enabled 1
603 12:50:50.901442 USB2 port 4: enabled 1
604 12:50:50.904331 USB3 port 5: enabled 1
605 12:50:50.907225 PCI: 00:14.1: enabled 0
606 12:50:50.909501 PCI: 00:14.3: enabled 1
607 12:50:50.912224 PCI: 00:14.5: enabled 1
608 12:50:50.915121 PCI: 00:15.0: enabled 0
609 12:50:50.917859 PCI: 00:15.1: enabled 0
610 12:50:50.920327 PCI: 00:15.2: enabled 1
611 12:50:50.922549 I2C: 00:4a: enabled 1
612 12:50:50.925310 PCI: 00:15.3: enabled 1
613 12:50:50.928148 I2C: 00:4a: enabled 1
614 12:50:50.930591 PCI: 00:16.0: enabled 1
615 12:50:50.933274 PCI: 00:16.1: enabled 0
616 12:50:50.935888 PCI: 00:16.2: enabled 0
617 12:50:50.938714 PCI: 00:16.3: enabled 0
618 12:50:50.941069 PCI: 00:16.4: enabled 0
619 12:50:50.943714 PCI: 00:16.5: enabled 0
620 12:50:50.946478 PCI: 00:17.0: enabled 1
621 12:50:50.948548 PCI: 00:19.0: enabled 1
622 12:50:50.952111 I2C: 00:1a: enabled 1
623 12:50:50.953748 PCI: 00:19.1: enabled 0
624 12:50:50.956513 PCI: 00:19.2: enabled 0
625 12:50:50.958913 PCI: 00:1a.0: enabled 1
626 12:50:50.962091 PCI: 00:1c.0: enabled 1
627 12:50:50.964739 PCI: 00:00.0: enabled 1
628 12:50:50.967219 PCI: 00:1e.0: enabled 1
629 12:50:50.970150 PCI: 00:1e.1: enabled 0
630 12:50:50.972837 PCI: 00:1e.2: enabled 1
631 12:50:50.974414 SPI: 00: enabled 1
632 12:50:50.977386 PCI: 00:1e.3: enabled 0
633 12:50:50.980195 PCI: 00:1f.0: enabled 1
634 12:50:50.982736 PNP: 0c09.0: enabled 1
635 12:50:50.985002 PCI: 00:1f.1: enabled 1
636 12:50:50.987787 PCI: 00:1f.2: enabled 1
637 12:50:50.990202 PCI: 00:1f.3: enabled 1
638 12:50:50.993261 PCI: 00:1f.4: enabled 1
639 12:50:50.996062 PCI: 00:1f.5: enabled 1
640 12:50:50.998667 PCI: 00:1f.6: enabled 0
641 12:50:51.001149 Root Device scanning...
642 12:50:51.004413 scan_static_bus for Root Device
643 12:50:51.006863 CPU_CLUSTER: 0 enabled
644 12:50:51.008664 DOMAIN: 0000 enabled
645 12:50:51.011326 DOMAIN: 0000 scanning...
646 12:50:51.014483 PCI: pci_scan_bus for bus 00
647 12:50:51.018133 PCI: 00:00.0 [8086/0000] ops
648 12:50:51.021041 PCI: 00:00.0 [8086/9b71] enabled
649 12:50:51.024656 PCI: 00:02.0 [8086/0000] bus ops
650 12:50:51.027417 PCI: 00:02.0 [8086/9baa] enabled
651 12:50:51.031032 PCI: 00:04.0 [8086/0000] bus ops
652 12:50:51.033881 PCI: 00:04.0 [8086/1903] enabled
653 12:50:51.037665 PCI: 00:08.0 [8086/1911] enabled
654 12:50:51.041163 PCI: 00:12.0 [8086/02f9] enabled
655 12:50:51.043900 PCI: 00:14.0 [8086/0000] bus ops
656 12:50:51.047527 PCI: 00:14.0 [8086/02ed] enabled
657 12:50:51.051276 PCI: 00:14.2 [8086/02ef] enabled
658 12:50:51.054439 PCI: 00:14.3 [8086/02f0] enabled
659 12:50:51.057033 PCI: 00:14.5 [8086/0000] ops
660 12:50:51.060924 PCI: 00:14.5 [8086/02f5] enabled
661 12:50:51.063458 PCI: 00:15.0 [8086/0000] bus ops
662 12:50:51.067031 PCI: 00:15.0 [8086/02e8] disabled
663 12:50:51.070143 PCI: 00:15.2 [8086/0000] bus ops
664 12:50:51.073877 PCI: 00:15.2 [8086/02ea] enabled
665 12:50:51.077413 PCI: 00:15.3 [8086/0000] bus ops
666 12:50:51.080425 PCI: 00:15.3 [8086/02eb] enabled
667 12:50:51.083522 PCI: 00:16.0 [8086/0000] ops
668 12:50:51.086319 PCI: 00:16.0 [8086/02e0] enabled
669 12:50:51.092200 PCI: Static device PCI: 00:17.0 not found, disabling it.
670 12:50:51.096038 PCI: 00:19.0 [8086/0000] bus ops
671 12:50:51.099071 PCI: 00:19.0 [8086/02c5] enabled
672 12:50:51.102027 PCI: 00:1a.0 [8086/0000] ops
673 12:50:51.105488 PCI: 00:1a.0 [8086/02c4] enabled
674 12:50:51.108398 PCI: 00:1c.0 [8086/0000] bus ops
675 12:50:51.112228 PCI: 00:1c.0 [8086/02be] enabled
676 12:50:51.115036 PCI: 00:1e.0 [8086/0000] ops
677 12:50:51.118436 PCI: 00:1e.0 [8086/02a8] enabled
678 12:50:51.121635 PCI: 00:1e.2 [8086/0000] bus ops
679 12:50:51.124748 PCI: 00:1e.2 [8086/02aa] enabled
680 12:50:51.128252 PCI: 00:1f.0 [8086/0000] bus ops
681 12:50:51.131448 PCI: 00:1f.0 [8086/0285] enabled
682 12:50:51.137076 PCI: Static device PCI: 00:1f.1 not found, disabling it.
683 12:50:51.142592 PCI: Static device PCI: 00:1f.2 not found, disabling it.
684 12:50:51.146032 PCI: 00:1f.3 [8086/0000] bus ops
685 12:50:51.149323 PCI: 00:1f.3 [8086/02c8] enabled
686 12:50:51.153041 PCI: 00:1f.4 [8086/0000] bus ops
687 12:50:51.156008 PCI: 00:1f.4 [8086/02a3] enabled
688 12:50:51.159661 PCI: 00:1f.5 [8086/0000] bus ops
689 12:50:51.162896 PCI: 00:1f.5 [8086/02a4] enabled
690 12:50:51.166223 PCI: Leftover static devices:
691 12:50:51.167156 PCI: 00:05.0
692 12:50:51.168203 PCI: 00:12.5
693 12:50:51.170163 PCI: 00:12.6
694 12:50:51.171282 PCI: 00:14.1
695 12:50:51.172911 PCI: 00:15.1
696 12:50:51.173542 PCI: 00:16.1
697 12:50:51.175068 PCI: 00:16.2
698 12:50:51.176824 PCI: 00:16.3
699 12:50:51.177879 PCI: 00:16.4
700 12:50:51.179384 PCI: 00:16.5
701 12:50:51.181045 PCI: 00:17.0
702 12:50:51.182182 PCI: 00:19.1
703 12:50:51.183308 PCI: 00:19.2
704 12:50:51.185216 PCI: 00:1e.1
705 12:50:51.186108 PCI: 00:1e.3
706 12:50:51.187759 PCI: 00:1f.1
707 12:50:51.189444 PCI: 00:1f.2
708 12:50:51.190385 PCI: 00:1f.6
709 12:50:51.193269 PCI: Check your devicetree.cb.
710 12:50:51.196187 PCI: 00:02.0 scanning...
711 12:50:51.199720 scan_generic_bus for PCI: 00:02.0
712 12:50:51.203742 scan_generic_bus for PCI: 00:02.0 done
713 12:50:51.207979 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
714 12:50:51.210853 PCI: 00:04.0 scanning...
715 12:50:51.214667 scan_generic_bus for PCI: 00:04.0
716 12:50:51.218572 bus: PCI: 00:04.0[0]->GENERIC: 0.0 enabled
717 12:50:51.222487 scan_generic_bus for PCI: 00:04.0 done
718 12:50:51.227139 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
719 12:50:51.230203 PCI: 00:14.0 scanning...
720 12:50:51.233403 scan_static_bus for PCI: 00:14.0
721 12:50:51.235444 USB0 port 0 enabled
722 12:50:51.237987 USB0 port 0 scanning...
723 12:50:51.241816 scan_static_bus for USB0 port 0
724 12:50:51.243822 USB2 port 0 enabled
725 12:50:51.245410 USB2 port 1 enabled
726 12:50:51.247443 USB2 port 2 enabled
727 12:50:51.249458 USB2 port 3 enabled
728 12:50:51.251693 USB2 port 5 enabled
729 12:50:51.253657 USB2 port 6 disabled
730 12:50:51.255712 USB2 port 9 enabled
731 12:50:51.258893 USB3 port 0 enabled
732 12:50:51.259914 USB3 port 1 enabled
733 12:50:51.261866 USB3 port 2 enabled
734 12:50:51.263800 USB3 port 3 enabled
735 12:50:51.266133 USB3 port 4 enabled
736 12:50:51.267881 USB2 port 4 enabled
737 12:50:51.270923 USB3 port 5 enabled
738 12:50:51.273133 USB2 port 0 scanning...
739 12:50:51.276439 scan_static_bus for USB2 port 0
740 12:50:51.280016 scan_static_bus for USB2 port 0 done
741 12:50:51.284498 scan_bus: bus USB2 port 0 finished in 6 msecs
742 12:50:51.286944 USB2 port 1 scanning...
743 12:50:51.290342 scan_static_bus for USB2 port 1
744 12:50:51.294184 scan_static_bus for USB2 port 1 done
745 12:50:51.298872 scan_bus: bus USB2 port 1 finished in 6 msecs
746 12:50:51.301309 USB2 port 2 scanning...
747 12:50:51.304459 scan_static_bus for USB2 port 2
748 12:50:51.308440 scan_static_bus for USB2 port 2 done
749 12:50:51.312788 scan_bus: bus USB2 port 2 finished in 6 msecs
750 12:50:51.315253 USB2 port 3 scanning...
751 12:50:51.319272 scan_static_bus for USB2 port 3
752 12:50:51.322642 scan_static_bus for USB2 port 3 done
753 12:50:51.327269 scan_bus: bus USB2 port 3 finished in 6 msecs
754 12:50:51.329846 USB2 port 5 scanning...
755 12:50:51.333610 scan_static_bus for USB2 port 5
756 12:50:51.336604 scan_static_bus for USB2 port 5 done
757 12:50:51.341361 scan_bus: bus USB2 port 5 finished in 6 msecs
758 12:50:51.343795 USB2 port 9 scanning...
759 12:50:51.347166 scan_static_bus for USB2 port 9
760 12:50:51.351592 scan_static_bus for USB2 port 9 done
761 12:50:51.355405 scan_bus: bus USB2 port 9 finished in 6 msecs
762 12:50:51.358131 USB3 port 0 scanning...
763 12:50:51.361763 scan_static_bus for USB3 port 0
764 12:50:51.365234 scan_static_bus for USB3 port 0 done
765 12:50:51.369986 scan_bus: bus USB3 port 0 finished in 6 msecs
766 12:50:51.372502 USB3 port 1 scanning...
767 12:50:51.375646 scan_static_bus for USB3 port 1
768 12:50:51.379812 scan_static_bus for USB3 port 1 done
769 12:50:51.384324 scan_bus: bus USB3 port 1 finished in 6 msecs
770 12:50:51.386508 USB3 port 2 scanning...
771 12:50:51.390792 scan_static_bus for USB3 port 2
772 12:50:51.394324 scan_static_bus for USB3 port 2 done
773 12:50:51.397997 scan_bus: bus USB3 port 2 finished in 6 msecs
774 12:50:51.400590 USB3 port 3 scanning...
775 12:50:51.404308 scan_static_bus for USB3 port 3
776 12:50:51.407709 scan_static_bus for USB3 port 3 done
777 12:50:51.412430 scan_bus: bus USB3 port 3 finished in 6 msecs
778 12:50:51.414620 USB3 port 4 scanning...
779 12:50:51.418791 scan_static_bus for USB3 port 4
780 12:50:51.422022 scan_static_bus for USB3 port 4 done
781 12:50:51.427097 scan_bus: bus USB3 port 4 finished in 6 msecs
782 12:50:51.428894 USB2 port 4 scanning...
783 12:50:51.432755 scan_static_bus for USB2 port 4
784 12:50:51.436053 scan_static_bus for USB2 port 4 done
785 12:50:51.441465 scan_bus: bus USB2 port 4 finished in 6 msecs
786 12:50:51.443337 USB3 port 5 scanning...
787 12:50:51.446814 scan_static_bus for USB3 port 5
788 12:50:51.450336 scan_static_bus for USB3 port 5 done
789 12:50:51.455042 scan_bus: bus USB3 port 5 finished in 6 msecs
790 12:50:51.458963 scan_static_bus for USB0 port 0 done
791 12:50:51.463408 scan_bus: bus USB0 port 0 finished in 219 msecs
792 12:50:51.467499 scan_static_bus for PCI: 00:14.0 done
793 12:50:51.472566 scan_bus: bus PCI: 00:14.0 finished in 236 msecs
794 12:50:51.475383 PCI: 00:15.2 scanning...
795 12:50:51.478475 scan_generic_bus for PCI: 00:15.2
796 12:50:51.482332 bus: PCI: 00:15.2[0]->I2C: 02:4a enabled
797 12:50:51.486301 scan_generic_bus for PCI: 00:15.2 done
798 12:50:51.491292 scan_bus: bus PCI: 00:15.2 finished in 11 msecs
799 12:50:51.493550 PCI: 00:15.3 scanning...
800 12:50:51.497252 scan_generic_bus for PCI: 00:15.3
801 12:50:51.501988 bus: PCI: 00:15.3[0]->I2C: 03:4a enabled
802 12:50:51.505748 scan_generic_bus for PCI: 00:15.3 done
803 12:50:51.510045 scan_bus: bus PCI: 00:15.3 finished in 11 msecs
804 12:50:51.512645 PCI: 00:19.0 scanning...
805 12:50:51.516702 scan_generic_bus for PCI: 00:19.0
806 12:50:51.520359 bus: PCI: 00:19.0[0]->I2C: 04:1a enabled
807 12:50:51.524521 scan_generic_bus for PCI: 00:19.0 done
808 12:50:51.528813 scan_bus: bus PCI: 00:19.0 finished in 11 msecs
809 12:50:51.531626 PCI: 00:1c.0 scanning...
810 12:50:51.535416 do_pci_scan_bridge for PCI: 00:1c.0
811 12:50:51.538750 PCI: pci_scan_bus for bus 01
812 12:50:51.541897 PCI: 01:00.0 [10ec/8168] ops
813 12:50:51.544724 PCI: 01:00.0 [10ec/8168] enabled
814 12:50:51.548812 Enabling Common Clock Configuration
815 12:50:51.552768 L1 Sub-State supported from root port 28
816 12:50:51.556001 L1 Sub-State Support = 0xf
817 12:50:51.558565 CommonModeRestoreTime = 0x96
818 12:50:51.563029 Power On Value = 0xf, Power On Scale = 0x1
819 12:50:51.565005 ASPM: Enabled L1
820 12:50:51.568424 PCIe: Max_Payload_Size adjusted to 128
821 12:50:51.573201 scan_bus: bus PCI: 00:1c.0 finished in 36 msecs
822 12:50:51.575587 PCI: 00:1e.2 scanning...
823 12:50:51.579425 scan_generic_bus for PCI: 00:1e.2
824 12:50:51.584004 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
825 12:50:51.587627 scan_generic_bus for PCI: 00:1e.2 done
826 12:50:51.592223 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
827 12:50:51.594248 PCI: 00:1f.0 scanning...
828 12:50:51.598325 scan_static_bus for PCI: 00:1f.0
829 12:50:51.600074 PNP: 0c09.0 enabled
830 12:50:51.602435 PNP: 0c09.0 scanning...
831 12:50:51.606661 scan_static_bus for PNP: 0c09.0
832 12:50:51.609475 scan_static_bus for PNP: 0c09.0 done
833 12:50:51.614552 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
834 12:50:51.618345 scan_static_bus for PCI: 00:1f.0 done
835 12:50:51.623034 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
836 12:50:51.625525 PCI: 00:1f.3 scanning...
837 12:50:51.629679 scan_static_bus for PCI: 00:1f.3
838 12:50:51.632936 scan_static_bus for PCI: 00:1f.3 done
839 12:50:51.637377 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
840 12:50:51.639838 PCI: 00:1f.4 scanning...
841 12:50:51.643670 scan_generic_bus for PCI: 00:1f.4
842 12:50:51.647767 scan_generic_bus for PCI: 00:1f.4 done
843 12:50:51.651950 scan_bus: bus PCI: 00:1f.4 finished in 7 msecs
844 12:50:51.655001 PCI: 00:1f.5 scanning...
845 12:50:51.658443 scan_generic_bus for PCI: 00:1f.5
846 12:50:51.662257 scan_generic_bus for PCI: 00:1f.5 done
847 12:50:51.667162 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
848 12:50:51.671995 scan_bus: bus DOMAIN: 0000 finished in 653 msecs
849 12:50:51.675867 scan_static_bus for Root Device done
850 12:50:51.680817 scan_bus: bus Root Device finished in 672 msecs
851 12:50:51.681093 done
852 12:50:51.687233 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1037 ms
853 12:50:51.693554 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
854 12:50:51.699219 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
855 12:50:51.705352 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
856 12:50:51.710976 MRC: 'RECOVERY_MRC_CACHE' does not need update.
857 12:50:51.713647 Chrome EC: UHEPI supported
858 12:50:51.719614 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
859 12:50:51.723596 SPI flash protection: WPSW=0 SRP0=0
860 12:50:51.728516 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
861 12:50:51.733895 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 39 ms
862 12:50:51.736577 found VGA at PCI: 00:02.0
863 12:50:51.739704 Setting up VGA for PCI: 00:02.0
864 12:50:51.744978 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
865 12:50:51.749614 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
866 12:50:51.753112 Allocating resources...
867 12:50:51.754680 Reading resources...
868 12:50:51.759084 Root Device read_resources bus 0 link: 0
869 12:50:51.763450 CPU_CLUSTER: 0 read_resources bus 0 link: 0
870 12:50:51.768613 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
871 12:50:51.773612 DOMAIN: 0000 read_resources bus 0 link: 0
872 12:50:51.778730 PCI: 00:04.0 read_resources bus 1 link: 0
873 12:50:51.784429 PCI: 00:04.0 read_resources bus 1 link: 0 done
874 12:50:51.788702 PCI: 00:14.0 read_resources bus 0 link: 0
875 12:50:51.793666 USB0 port 0 read_resources bus 0 link: 0
876 12:50:51.802329 USB0 port 0 read_resources bus 0 link: 0 done
877 12:50:51.807473 PCI: 00:14.0 read_resources bus 0 link: 0 done
878 12:50:51.812925 PCI: 00:15.2 read_resources bus 2 link: 0
879 12:50:51.818280 PCI: 00:15.2 read_resources bus 2 link: 0 done
880 12:50:51.822240 PCI: 00:15.3 read_resources bus 3 link: 0
881 12:50:51.828052 PCI: 00:15.3 read_resources bus 3 link: 0 done
882 12:50:51.833482 PCI: 00:19.0 read_resources bus 4 link: 0
883 12:50:51.837965 PCI: 00:19.0 read_resources bus 4 link: 0 done
884 12:50:51.843141 PCI: 00:1c.0 read_resources bus 1 link: 0
885 12:50:51.848774 PCI: 00:1c.0 read_resources bus 1 link: 0 done
886 12:50:51.853216 PCI: 00:1e.2 read_resources bus 5 link: 0
887 12:50:51.858562 PCI: 00:1e.2 read_resources bus 5 link: 0 done
888 12:50:51.863680 PCI: 00:1f.0 read_resources bus 0 link: 0
889 12:50:51.868796 PCI: 00:1f.0 read_resources bus 0 link: 0 done
890 12:50:51.874350 DOMAIN: 0000 read_resources bus 0 link: 0 done
891 12:50:51.879705 Root Device read_resources bus 0 link: 0 done
892 12:50:51.882135 Done reading resources.
893 12:50:51.887524 Show resources in subtree (Root Device)...After reading.
894 12:50:51.891643 Root Device child on link 0 CPU_CLUSTER: 0
895 12:50:51.896301 CPU_CLUSTER: 0 child on link 0 APIC: 00
896 12:50:51.897348 APIC: 00
897 12:50:51.899028 APIC: 02
898 12:50:51.903331 DOMAIN: 0000 child on link 0 PCI: 00:00.0
899 12:50:51.911705 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
900 12:50:51.922364 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
901 12:50:51.923768 PCI: 00:00.0
902 12:50:51.933450 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
903 12:50:51.942819 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
904 12:50:51.951861 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
905 12:50:51.960943 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
906 12:50:51.971218 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
907 12:50:51.979594 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
908 12:50:51.989555 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
909 12:50:51.998526 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
910 12:50:52.008712 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
911 12:50:52.016232 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
912 12:50:52.026320 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
913 12:50:52.035675 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
914 12:50:52.045965 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
915 12:50:52.054904 PCI: 00:00.0 resource base 100000000 size 5e800000 align 0 gran 0 limit 0 flags e0004200 index d
916 12:50:52.064605 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
917 12:50:52.073534 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
918 12:50:52.075512 PCI: 00:02.0
919 12:50:52.085119 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
920 12:50:52.096105 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
921 12:50:52.104128 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
922 12:50:52.108378 PCI: 00:04.0 child on link 0 GENERIC: 0.0
923 12:50:52.118397 PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
924 12:50:52.119895 GENERIC: 0.0
925 12:50:52.121704 PCI: 00:08.0
926 12:50:52.131679 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
927 12:50:52.133872 PCI: 00:12.0
928 12:50:52.143174 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
929 12:50:52.147559 PCI: 00:14.0 child on link 0 USB0 port 0
930 12:50:52.157780 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
931 12:50:52.162184 USB0 port 0 child on link 0 USB2 port 0
932 12:50:52.164011 USB2 port 0
933 12:50:52.165822 USB2 port 1
934 12:50:52.167786 USB2 port 2
935 12:50:52.169115 USB2 port 3
936 12:50:52.170917 USB2 port 5
937 12:50:52.172743 USB2 port 6
938 12:50:52.174767 USB2 port 9
939 12:50:52.176329 USB3 port 0
940 12:50:52.178003 USB3 port 1
941 12:50:52.179594 USB3 port 2
942 12:50:52.181503 USB3 port 3
943 12:50:52.183090 USB3 port 4
944 12:50:52.185208 USB2 port 4
945 12:50:52.186444 USB3 port 5
946 12:50:52.188369 PCI: 00:14.2
947 12:50:52.198221 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
948 12:50:52.208422 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
949 12:50:52.210035 PCI: 00:14.3
950 12:50:52.219501 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
951 12:50:52.221846 PCI: 00:14.5
952 12:50:52.231349 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
953 12:50:52.233172 PCI: 00:15.0
954 12:50:52.237021 PCI: 00:15.2 child on link 0 I2C: 02:4a
955 12:50:52.246950 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
956 12:50:52.248976 I2C: 02:4a
957 12:50:52.252655 PCI: 00:15.3 child on link 0 I2C: 03:4a
958 12:50:52.262961 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
959 12:50:52.264886 I2C: 03:4a
960 12:50:52.266031 PCI: 00:16.0
961 12:50:52.275970 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
962 12:50:52.280533 PCI: 00:19.0 child on link 0 I2C: 04:1a
963 12:50:52.290803 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
964 12:50:52.292038 I2C: 04:1a
965 12:50:52.293379 PCI: 00:1a.0
966 12:50:52.303715 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
967 12:50:52.308231 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
968 12:50:52.316852 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
969 12:50:52.326774 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
970 12:50:52.335150 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
971 12:50:52.337287 PCI: 01:00.0
972 12:50:52.345749 PCI: 01:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
973 12:50:52.355329 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
974 12:50:52.365670 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 20
975 12:50:52.367158 PCI: 00:1e.0
976 12:50:52.378186 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
977 12:50:52.388684 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
978 12:50:52.392903 PCI: 00:1e.2 child on link 0 SPI: 00
979 12:50:52.402735 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
980 12:50:52.403896 SPI: 00
981 12:50:52.408132 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
982 12:50:52.416761 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
983 12:50:52.426010 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
984 12:50:52.427477 PNP: 0c09.0
985 12:50:52.436357 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
986 12:50:52.437690 PCI: 00:1f.3
987 12:50:52.447807 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
988 12:50:52.457600 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
989 12:50:52.459508 PCI: 00:1f.4
990 12:50:52.468662 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
991 12:50:52.477933 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
992 12:50:52.479948 PCI: 00:1f.5
993 12:50:52.489114 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
994 12:50:52.497047 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
995 12:50:52.502576 PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff
996 12:50:52.506462 PCI: 01:00.0 10 * [0x0 - 0xff] io
997 12:50:52.512374 PCI: 00:1c.0 io: size: 1000 align: 12 gran: 12 limit: ffff done
998 12:50:52.518416 PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
999 12:50:52.522533 PCI: 01:00.0 20 * [0x0 - 0x3fff] mem
1000 12:50:52.526818 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1001 12:50:52.534164 PCI: 00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1002 12:50:52.541314 PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1003 12:50:52.549834 PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1004 12:50:52.556088 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1005 12:50:52.562287 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1006 12:50:52.570393 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1007 12:50:52.578028 update_constraints: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1008 12:50:52.584886 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1009 12:50:52.593137 update_constraints: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1010 12:50:52.596165 DOMAIN: 0000: Resource ranges:
1011 12:50:52.599327 * Base: 1000, Size: 800, Tag: 100
1012 12:50:52.603120 * Base: 1900, Size: d6a0, Tag: 100
1013 12:50:52.606405 * Base: efc0, Size: 1040, Tag: 100
1014 12:50:52.612214 PCI: 00:1c.0 1c * [0x2000 - 0x2fff] limit: 2fff io
1015 12:50:52.617035 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1016 12:50:52.624027 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1017 12:50:52.630553 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1018 12:50:52.638188 update_constraints: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1019 12:50:52.645990 update_constraints: PCI: 00:00.0 01 base fed10000 limit fed17fff mem (fixed)
1020 12:50:52.654176 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1021 12:50:52.661829 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1022 12:50:52.668877 update_constraints: PCI: 00:00.0 04 base fc000000 limit fc000fff mem (fixed)
1023 12:50:52.676899 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1024 12:50:52.684610 update_constraints: PCI: 00:00.0 06 base fe000000 limit fe00ffff mem (fixed)
1025 12:50:52.692298 update_constraints: PCI: 00:00.0 07 base fed90000 limit fed90fff mem (fixed)
1026 12:50:52.699792 update_constraints: PCI: 00:00.0 08 base fed91000 limit fed91fff mem (fixed)
1027 12:50:52.707589 update_constraints: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1028 12:50:52.715007 update_constraints: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1029 12:50:52.723166 update_constraints: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1030 12:50:52.730929 update_constraints: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1031 12:50:52.738554 update_constraints: PCI: 00:00.0 0d base 100000000 limit 15e7fffff mem (fixed)
1032 12:50:52.746150 update_constraints: PCI: 00:00.0 0e base 000a0000 limit 000bffff mem (fixed)
1033 12:50:52.753713 update_constraints: PCI: 00:00.0 0f base 000c0000 limit 000fffff mem (fixed)
1034 12:50:52.761616 update_constraints: PCI: 00:1e.0 10 base fe032000 limit fe032fff mem (fixed)
1035 12:50:52.764932 DOMAIN: 0000: Resource ranges:
1036 12:50:52.769050 * Base: 9f800000, Size: 40800000, Tag: 200
1037 12:50:52.772993 * Base: f0000000, Size: c000000, Tag: 200
1038 12:50:52.777607 * Base: fc001000, Size: 1fff000, Tag: 200
1039 12:50:52.781490 * Base: fe010000, Size: 22000, Tag: 200
1040 12:50:52.785535 * Base: fe033000, Size: cdd000, Tag: 200
1041 12:50:52.789520 * Base: fed18000, Size: 68000, Tag: 200
1042 12:50:52.793875 * Base: fed84000, Size: c000, Tag: 200
1043 12:50:52.797600 * Base: fed92000, Size: e000, Tag: 200
1044 12:50:52.801952 * Base: feda2000, Size: 125e000, Tag: 200
1045 12:50:52.806821 * Base: 15e800000, Size: 7ea1800000, Tag: 100200
1046 12:50:52.814007 PCI: 00:02.0 18 * [0xa0000000 - 0xafffffff] limit: afffffff prefmem
1047 12:50:52.820763 PCI: 00:02.0 10 * [0xb0000000 - 0xb0ffffff] limit: b0ffffff mem
1048 12:50:52.827265 PCI: 00:1c.0 20 * [0x9f800000 - 0x9f8fffff] limit: 9f8fffff mem
1049 12:50:52.833994 PCI: 00:1f.3 20 * [0x9f900000 - 0x9f9fffff] limit: 9f9fffff mem
1050 12:50:52.840665 PCI: 00:14.0 10 * [0x9fa00000 - 0x9fa0ffff] limit: 9fa0ffff mem
1051 12:50:52.847381 PCI: 00:04.0 10 * [0x9fa10000 - 0x9fa17fff] limit: 9fa17fff mem
1052 12:50:52.853569 PCI: 00:14.3 10 * [0x9fa18000 - 0x9fa1bfff] limit: 9fa1bfff mem
1053 12:50:52.860244 PCI: 00:1f.3 10 * [0x9fa1c000 - 0x9fa1ffff] limit: 9fa1ffff mem
1054 12:50:52.866877 PCI: 00:14.2 10 * [0x9fa20000 - 0x9fa21fff] limit: 9fa21fff mem
1055 12:50:52.873402 PCI: 00:08.0 10 * [0x9fa22000 - 0x9fa22fff] limit: 9fa22fff mem
1056 12:50:52.880423 PCI: 00:12.0 10 * [0x9fa23000 - 0x9fa23fff] limit: 9fa23fff mem
1057 12:50:52.887338 PCI: 00:14.2 18 * [0x9fa24000 - 0x9fa24fff] limit: 9fa24fff mem
1058 12:50:52.893520 PCI: 00:14.5 10 * [0x9fa25000 - 0x9fa25fff] limit: 9fa25fff mem
1059 12:50:52.900005 PCI: 00:15.2 10 * [0x9fa26000 - 0x9fa26fff] limit: 9fa26fff mem
1060 12:50:52.907083 PCI: 00:15.3 10 * [0x9fa27000 - 0x9fa27fff] limit: 9fa27fff mem
1061 12:50:52.913631 PCI: 00:16.0 10 * [0x9fa28000 - 0x9fa28fff] limit: 9fa28fff mem
1062 12:50:52.920068 PCI: 00:19.0 10 * [0x9fa29000 - 0x9fa29fff] limit: 9fa29fff mem
1063 12:50:52.927131 PCI: 00:1a.0 10 * [0x9fa2a000 - 0x9fa2afff] limit: 9fa2afff mem
1064 12:50:52.932942 PCI: 00:1e.0 18 * [0x9fa2b000 - 0x9fa2bfff] limit: 9fa2bfff mem
1065 12:50:52.940187 PCI: 00:1e.2 10 * [0x9fa2c000 - 0x9fa2cfff] limit: 9fa2cfff mem
1066 12:50:52.946714 PCI: 00:1f.5 10 * [0x9fa2d000 - 0x9fa2dfff] limit: 9fa2dfff mem
1067 12:50:52.953077 PCI: 00:1f.4 10 * [0x9fa2e000 - 0x9fa2e0ff] limit: 9fa2e0ff mem
1068 12:50:52.959961 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1069 12:50:52.967099 PCI: 00:1c.0 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff
1070 12:50:52.970553 PCI: 00:1c.0: Resource ranges:
1071 12:50:52.973399 * Base: 2000, Size: 1000, Tag: 100
1072 12:50:52.979911 PCI: 01:00.0 10 * [0x2000 - 0x20ff] limit: 20ff io
1073 12:50:52.987051 PCI: 00:1c.0 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff done
1074 12:50:52.994858 PCI: 00:1c.0 mem: base: 9f800000 size: 100000 align: 20 gran: 20 limit: 9f8fffff
1075 12:50:52.998123 PCI: 00:1c.0: Resource ranges:
1076 12:50:53.001478 * Base: 9f800000, Size: 100000, Tag: 200
1077 12:50:53.008611 PCI: 01:00.0 20 * [0x9f800000 - 0x9f803fff] limit: 9f803fff mem
1078 12:50:53.015731 PCI: 01:00.0 18 * [0x9f804000 - 0x9f804fff] limit: 9f804fff mem
1079 12:50:53.023698 PCI: 00:1c.0 mem: base: 9f800000 size: 100000 align: 20 gran: 20 limit: 9f8fffff done
1080 12:50:53.030422 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1081 12:50:53.035518 Root Device assign_resources, bus 0 link: 0
1082 12:50:53.039803 DOMAIN: 0000 assign_resources, bus 0 link: 0
1083 12:50:53.048673 PCI: 00:02.0 10 <- [0x00b0000000 - 0x00b0ffffff] size 0x01000000 gran 0x18 mem64
1084 12:50:53.056494 PCI: 00:02.0 18 <- [0x00a0000000 - 0x00afffffff] size 0x10000000 gran 0x1c prefmem64
1085 12:50:53.064749 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1086 12:50:53.072440 PCI: 00:04.0 10 <- [0x009fa10000 - 0x009fa17fff] size 0x00008000 gran 0x0f mem64
1087 12:50:53.078030 PCI: 00:04.0 assign_resources, bus 1 link: 0
1088 12:50:53.082014 PCI: 00:04.0 assign_resources, bus 1 link: 0
1089 12:50:53.090130 PCI: 00:08.0 10 <- [0x009fa22000 - 0x009fa22fff] size 0x00001000 gran 0x0c mem64
1090 12:50:53.098226 PCI: 00:12.0 10 <- [0x009fa23000 - 0x009fa23fff] size 0x00001000 gran 0x0c mem64
1091 12:50:53.106953 PCI: 00:14.0 10 <- [0x009fa00000 - 0x009fa0ffff] size 0x00010000 gran 0x10 mem64
1092 12:50:53.111125 PCI: 00:14.0 assign_resources, bus 0 link: 0
1093 12:50:53.116416 PCI: 00:14.0 assign_resources, bus 0 link: 0
1094 12:50:53.124365 PCI: 00:14.2 10 <- [0x009fa20000 - 0x009fa21fff] size 0x00002000 gran 0x0d mem64
1095 12:50:53.132355 PCI: 00:14.2 18 <- [0x009fa24000 - 0x009fa24fff] size 0x00001000 gran 0x0c mem64
1096 12:50:53.140817 PCI: 00:14.3 10 <- [0x009fa18000 - 0x009fa1bfff] size 0x00004000 gran 0x0e mem64
1097 12:50:53.149128 PCI: 00:14.5 10 <- [0x009fa25000 - 0x009fa25fff] size 0x00001000 gran 0x0c mem64
1098 12:50:53.156913 PCI: 00:15.2 10 <- [0x009fa26000 - 0x009fa26fff] size 0x00001000 gran 0x0c mem64
1099 12:50:53.161376 PCI: 00:15.2 assign_resources, bus 2 link: 0
1100 12:50:53.166172 PCI: 00:15.2 assign_resources, bus 2 link: 0
1101 12:50:53.174334 PCI: 00:15.3 10 <- [0x009fa27000 - 0x009fa27fff] size 0x00001000 gran 0x0c mem64
1102 12:50:53.179686 PCI: 00:15.3 assign_resources, bus 3 link: 0
1103 12:50:53.183641 PCI: 00:15.3 assign_resources, bus 3 link: 0
1104 12:50:53.192499 PCI: 00:16.0 10 <- [0x009fa28000 - 0x009fa28fff] size 0x00001000 gran 0x0c mem64
1105 12:50:53.200710 PCI: 00:19.0 10 <- [0x009fa29000 - 0x009fa29fff] size 0x00001000 gran 0x0c mem64
1106 12:50:53.205196 PCI: 00:19.0 assign_resources, bus 4 link: 0
1107 12:50:53.209415 PCI: 00:19.0 assign_resources, bus 4 link: 0
1108 12:50:53.218121 PCI: 00:1a.0 10 <- [0x009fa2a000 - 0x009fa2afff] size 0x00001000 gran 0x0c mem64
1109 12:50:53.226862 PCI: 00:1c.0 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 01 io
1110 12:50:53.237223 PCI: 00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1111 12:50:53.244784 PCI: 00:1c.0 20 <- [0x009f800000 - 0x009f8fffff] size 0x00100000 gran 0x14 bus 01 mem
1112 12:50:53.249538 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1113 12:50:53.257179 PCI: 01:00.0 10 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io
1114 12:50:53.265344 PCI: 01:00.0 18 <- [0x009f804000 - 0x009f804fff] size 0x00001000 gran 0x0c mem64
1115 12:50:53.273541 PCI: 01:00.0 20 <- [0x009f800000 - 0x009f803fff] size 0x00004000 gran 0x0e mem64
1116 12:50:53.278611 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1117 12:50:53.286805 PCI: 00:1e.0 18 <- [0x009fa2b000 - 0x009fa2bfff] size 0x00001000 gran 0x0c mem64
1118 12:50:53.295162 PCI: 00:1e.2 10 <- [0x009fa2c000 - 0x009fa2cfff] size 0x00001000 gran 0x0c mem64
1119 12:50:53.300004 PCI: 00:1e.2 assign_resources, bus 5 link: 0
1120 12:50:53.304054 PCI: 00:1e.2 assign_resources, bus 5 link: 0
1121 12:50:53.308732 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1122 12:50:53.314475 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1123 12:50:53.319363 LPC: Trying to open IO window from 800 size 1ff
1124 12:50:53.326738 PCI: 00:1f.3 10 <- [0x009fa1c000 - 0x009fa1ffff] size 0x00004000 gran 0x0e mem64
1125 12:50:53.335109 PCI: 00:1f.3 20 <- [0x009f900000 - 0x009f9fffff] size 0x00100000 gran 0x14 mem64
1126 12:50:53.343949 PCI: 00:1f.4 10 <- [0x009fa2e000 - 0x009fa2e0ff] size 0x00000100 gran 0x08 mem64
1127 12:50:53.351891 PCI: 00:1f.5 10 <- [0x009fa2d000 - 0x009fa2dfff] size 0x00001000 gran 0x0c mem
1128 12:50:53.356562 DOMAIN: 0000 assign_resources, bus 0 link: 0
1129 12:50:53.361521 Root Device assign_resources, bus 0 link: 0
1130 12:50:53.363726 Done setting resources.
1131 12:50:53.370179 Show resources in subtree (Root Device)...After assigning values.
1132 12:50:53.374488 Root Device child on link 0 CPU_CLUSTER: 0
1133 12:50:53.378748 CPU_CLUSTER: 0 child on link 0 APIC: 00
1134 12:50:53.379937 APIC: 00
1135 12:50:53.381376 APIC: 02
1136 12:50:53.385586 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1137 12:50:53.394820 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1138 12:50:53.404701 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1139 12:50:53.406530 PCI: 00:00.0
1140 12:50:53.415796 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1141 12:50:53.424868 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1142 12:50:53.434269 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1143 12:50:53.444272 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1144 12:50:53.453281 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1145 12:50:53.462766 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1146 12:50:53.472079 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1147 12:50:53.481519 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1148 12:50:53.490796 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1149 12:50:53.499116 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1150 12:50:53.508647 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1151 12:50:53.518576 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1152 12:50:53.528083 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1153 12:50:53.538112 PCI: 00:00.0 resource base 100000000 size 5e800000 align 0 gran 0 limit 0 flags e0004200 index d
1154 12:50:53.547467 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1155 12:50:53.556072 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1156 12:50:53.557590 PCI: 00:02.0
1157 12:50:53.568333 PCI: 00:02.0 resource base b0000000 size 1000000 align 24 gran 24 limit b0ffffff flags 60000201 index 10
1158 12:50:53.578798 PCI: 00:02.0 resource base a0000000 size 10000000 align 28 gran 28 limit afffffff flags 60001201 index 18
1159 12:50:53.588057 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1160 12:50:53.593196 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1161 12:50:53.603319 PCI: 00:04.0 resource base 9fa10000 size 8000 align 15 gran 15 limit 9fa17fff flags 60000201 index 10
1162 12:50:53.604933 GENERIC: 0.0
1163 12:50:53.606406 PCI: 00:08.0
1164 12:50:53.617284 PCI: 00:08.0 resource base 9fa22000 size 1000 align 12 gran 12 limit 9fa22fff flags 60000201 index 10
1165 12:50:53.618266 PCI: 00:12.0
1166 12:50:53.628839 PCI: 00:12.0 resource base 9fa23000 size 1000 align 12 gran 12 limit 9fa23fff flags 60000201 index 10
1167 12:50:53.633150 PCI: 00:14.0 child on link 0 USB0 port 0
1168 12:50:53.643299 PCI: 00:14.0 resource base 9fa00000 size 10000 align 16 gran 16 limit 9fa0ffff flags 60000201 index 10
1169 12:50:53.648087 USB0 port 0 child on link 0 USB2 port 0
1170 12:50:53.649554 USB2 port 0
1171 12:50:53.651607 USB2 port 1
1172 12:50:53.652962 USB2 port 2
1173 12:50:53.654484 USB2 port 3
1174 12:50:53.656188 USB2 port 5
1175 12:50:53.658003 USB2 port 6
1176 12:50:53.659503 USB2 port 9
1177 12:50:53.661490 USB3 port 0
1178 12:50:53.663619 USB3 port 1
1179 12:50:53.665398 USB3 port 2
1180 12:50:53.667225 USB3 port 3
1181 12:50:53.668593 USB3 port 4
1182 12:50:53.670346 USB2 port 4
1183 12:50:53.672226 USB3 port 5
1184 12:50:53.674172 PCI: 00:14.2
1185 12:50:53.683959 PCI: 00:14.2 resource base 9fa20000 size 2000 align 13 gran 13 limit 9fa21fff flags 60000201 index 10
1186 12:50:53.694455 PCI: 00:14.2 resource base 9fa24000 size 1000 align 12 gran 12 limit 9fa24fff flags 60000201 index 18
1187 12:50:53.696490 PCI: 00:14.3
1188 12:50:53.706597 PCI: 00:14.3 resource base 9fa18000 size 4000 align 14 gran 14 limit 9fa1bfff flags 60000201 index 10
1189 12:50:53.708203 PCI: 00:14.5
1190 12:50:53.718588 PCI: 00:14.5 resource base 9fa25000 size 1000 align 12 gran 12 limit 9fa25fff flags 60000201 index 10
1191 12:50:53.720240 PCI: 00:15.0
1192 12:50:53.724434 PCI: 00:15.2 child on link 0 I2C: 02:4a
1193 12:50:53.734908 PCI: 00:15.2 resource base 9fa26000 size 1000 align 12 gran 12 limit 9fa26fff flags 60000201 index 10
1194 12:50:53.736405 I2C: 02:4a
1195 12:50:53.740763 PCI: 00:15.3 child on link 0 I2C: 03:4a
1196 12:50:53.750835 PCI: 00:15.3 resource base 9fa27000 size 1000 align 12 gran 12 limit 9fa27fff flags 60000201 index 10
1197 12:50:53.752119 I2C: 03:4a
1198 12:50:53.754043 PCI: 00:16.0
1199 12:50:53.764184 PCI: 00:16.0 resource base 9fa28000 size 1000 align 12 gran 12 limit 9fa28fff flags 60000201 index 10
1200 12:50:53.768965 PCI: 00:19.0 child on link 0 I2C: 04:1a
1201 12:50:53.778958 PCI: 00:19.0 resource base 9fa29000 size 1000 align 12 gran 12 limit 9fa29fff flags 60000201 index 10
1202 12:50:53.780588 I2C: 04:1a
1203 12:50:53.782068 PCI: 00:1a.0
1204 12:50:53.792052 PCI: 00:1a.0 resource base 9fa2a000 size 1000 align 12 gran 12 limit 9fa2afff flags 60000201 index 10
1205 12:50:53.797295 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1206 12:50:53.806947 PCI: 00:1c.0 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c
1207 12:50:53.818034 PCI: 00:1c.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1208 12:50:53.828910 PCI: 00:1c.0 resource base 9f800000 size 100000 align 20 gran 20 limit 9f8fffff flags 60080202 index 20
1209 12:50:53.829784 PCI: 01:00.0
1210 12:50:53.839587 PCI: 01:00.0 resource base 2000 size 100 align 8 gran 8 limit 20ff flags 60000100 index 10
1211 12:50:53.850173 PCI: 01:00.0 resource base 9f804000 size 1000 align 12 gran 12 limit 9f804fff flags 60000201 index 18
1212 12:50:53.860504 PCI: 01:00.0 resource base 9f800000 size 4000 align 14 gran 14 limit 9f803fff flags 60000201 index 20
1213 12:50:53.861905 PCI: 00:1e.0
1214 12:50:53.873440 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1215 12:50:53.882920 PCI: 00:1e.0 resource base 9fa2b000 size 1000 align 12 gran 12 limit 9fa2bfff flags 60000201 index 18
1216 12:50:53.887528 PCI: 00:1e.2 child on link 0 SPI: 00
1217 12:50:53.897731 PCI: 00:1e.2 resource base 9fa2c000 size 1000 align 12 gran 12 limit 9fa2cfff flags 60000201 index 10
1218 12:50:53.898985 SPI: 00
1219 12:50:53.902797 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1220 12:50:53.912139 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1221 12:50:53.920740 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1222 12:50:53.922534 PNP: 0c09.0
1223 12:50:53.931322 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1224 12:50:53.933035 PCI: 00:1f.3
1225 12:50:53.942856 PCI: 00:1f.3 resource base 9fa1c000 size 4000 align 14 gran 14 limit 9fa1ffff flags 60000201 index 10
1226 12:50:53.953782 PCI: 00:1f.3 resource base 9f900000 size 100000 align 20 gran 20 limit 9f9fffff flags 60000201 index 20
1227 12:50:53.955485 PCI: 00:1f.4
1228 12:50:53.964189 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1229 12:50:53.974642 PCI: 00:1f.4 resource base 9fa2e000 size 100 align 12 gran 8 limit 9fa2e0ff flags 60000201 index 10
1230 12:50:53.976497 PCI: 00:1f.5
1231 12:50:53.986709 PCI: 00:1f.5 resource base 9fa2d000 size 1000 align 12 gran 12 limit 9fa2dfff flags 60000200 index 10
1232 12:50:53.989341 Done allocating resources.
1233 12:50:53.995045 BS: BS_DEV_RESOURCES run times (exec / console): 30 / 2220 ms
1234 12:50:53.997953 Enabling resources...
1235 12:50:54.002442 PCI: 00:00.0 subsystem <- 8086/9b71
1236 12:50:54.004643 PCI: 00:00.0 cmd <- 06
1237 12:50:54.009130 PCI: 00:02.0 subsystem <- 8086/9baa
1238 12:50:54.010994 PCI: 00:02.0 cmd <- 03
1239 12:50:54.014999 PCI: 00:04.0 subsystem <- 8086/1903
1240 12:50:54.017206 PCI: 00:04.0 cmd <- 02
1241 12:50:54.019730 PCI: 00:08.0 cmd <- 06
1242 12:50:54.023681 PCI: 00:12.0 subsystem <- 8086/02f9
1243 12:50:54.026162 PCI: 00:12.0 cmd <- 02
1244 12:50:54.030405 PCI: 00:14.0 subsystem <- 8086/02ed
1245 12:50:54.032100 PCI: 00:14.0 cmd <- 02
1246 12:50:54.035190 PCI: 00:14.2 cmd <- 02
1247 12:50:54.039224 PCI: 00:14.3 subsystem <- 8086/02f0
1248 12:50:54.041547 PCI: 00:14.3 cmd <- 02
1249 12:50:54.045667 PCI: 00:14.5 subsystem <- 8086/02f5
1250 12:50:54.047741 PCI: 00:14.5 cmd <- 06
1251 12:50:54.051435 PCI: 00:15.2 subsystem <- 8086/02ea
1252 12:50:54.054079 PCI: 00:15.2 cmd <- 02
1253 12:50:54.057455 PCI: 00:15.3 subsystem <- 8086/02eb
1254 12:50:54.059703 PCI: 00:15.3 cmd <- 02
1255 12:50:54.064023 PCI: 00:16.0 subsystem <- 8086/02e0
1256 12:50:54.065920 PCI: 00:16.0 cmd <- 02
1257 12:50:54.070041 PCI: 00:19.0 subsystem <- 8086/02c5
1258 12:50:54.072801 PCI: 00:19.0 cmd <- 02
1259 12:50:54.076543 PCI: 00:1a.0 subsystem <- 8086/02c4
1260 12:50:54.078527 PCI: 00:1a.0 cmd <- 06
1261 12:50:54.082436 PCI: 00:1c.0 bridge ctrl <- 0013
1262 12:50:54.085871 PCI: 00:1c.0 subsystem <- 8086/02be
1263 12:50:54.088697 PCI: 00:1c.0 cmd <- 07
1264 12:50:54.092249 PCI: 00:1e.0 subsystem <- 8086/02a8
1265 12:50:54.095145 PCI: 00:1e.0 cmd <- 06
1266 12:50:54.098640 PCI: 00:1e.2 subsystem <- 8086/02aa
1267 12:50:54.100786 PCI: 00:1e.2 cmd <- 06
1268 12:50:54.104370 PCI: 00:1f.0 subsystem <- 8086/0285
1269 12:50:54.107513 PCI: 00:1f.0 cmd <- 407
1270 12:50:54.110840 PCI: 00:1f.3 subsystem <- 8086/02c8
1271 12:50:54.113722 PCI: 00:1f.3 cmd <- 02
1272 12:50:54.117320 PCI: 00:1f.4 subsystem <- 8086/02a3
1273 12:50:54.119844 PCI: 00:1f.4 cmd <- 03
1274 12:50:54.123772 PCI: 00:1f.5 subsystem <- 8086/02a4
1275 12:50:54.126014 PCI: 00:1f.5 cmd <- 406
1276 12:50:54.130593 PCI: 01:00.0 cmd <- 03
1277 12:50:54.132836 done.
1278 12:50:54.138274 BS: BS_DEV_ENABLE run times (exec / console): 11 / 126 ms
1279 12:50:54.141180 Initializing devices...
1280 12:50:54.142693 Root Device init
1281 12:50:54.147697 Chrome EC: Set SMI mask to 0x0000000000000000
1282 12:50:54.153083 Chrome EC: clear events_b mask to 0x0000000000000000
1283 12:50:54.159166 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000004
1284 12:50:54.164986 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000000000004
1285 12:50:54.170834 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000000080004
1286 12:50:54.175177 Chrome EC: Set WAKE mask to 0x0000000000000000
1287 12:50:54.179504 Root Device init finished in 32 msecs
1288 12:50:54.183008 PCI: 00:00.0 init
1289 12:50:54.186452 CPU TDP = 15 Watts
1290 12:50:54.187855 CPU PL1 = 15 Watts
1291 12:50:54.190253 CPU PL2 = 35 Watts
1292 12:50:54.192670 CPU PsysPL2 = 65 Watts
1293 12:50:54.196386 PCI: 00:00.0 init finished in 9 msecs
1294 12:50:54.198572 PCI: 00:02.0 init
1295 12:50:54.200666 GMA: Found VBT in CBFS
1296 12:50:54.204287 GMA: Found valid VBT in CBFS
1297 12:50:54.207539 PCI: 00:02.0 init finished in 5 msecs
1298 12:50:54.210716 PCI: 00:08.0 init
1299 12:50:54.213986 PCI: 00:08.0 init finished in 0 msecs
1300 12:50:54.216428 PCI: 00:12.0 init
1301 12:50:54.219902 PCI: 00:12.0 init finished in 0 msecs
1302 12:50:54.222258 PCI: 00:14.0 init
1303 12:50:54.226245 PCI: 00:14.0 init finished in 0 msecs
1304 12:50:54.228547 PCI: 00:14.2 init
1305 12:50:54.232094 PCI: 00:14.2 init finished in 0 msecs
1306 12:50:54.235059 PCI: 00:14.3 init
1307 12:50:54.238260 PCI: 00:14.3 init finished in 0 msecs
1308 12:50:54.241576 PCI: 00:15.2 init
1309 12:50:54.244359 I2C bus 2 version 0x3132322a
1310 12:50:54.248155 DW I2C bus 2 at 0x9fa26000 (400 KHz)
1311 12:50:54.251782 PCI: 00:15.2 init finished in 6 msecs
1312 12:50:54.254150 PCI: 00:15.3 init
1313 12:50:54.257127 I2C bus 3 version 0x3132322a
1314 12:50:54.260682 DW I2C bus 3 at 0x9fa27000 (400 KHz)
1315 12:50:54.264846 PCI: 00:15.3 init finished in 6 msecs
1316 12:50:54.266644 PCI: 00:16.0 init
1317 12:50:54.270130 PCI: 00:16.0 init finished in 0 msecs
1318 12:50:54.273262 PCI: 00:19.0 init
1319 12:50:54.275533 I2C bus 4 version 0x3132322a
1320 12:50:54.279333 DW I2C bus 4 at 0x9fa29000 (400 KHz)
1321 12:50:54.283062 PCI: 00:19.0 init finished in 6 msecs
1322 12:50:54.285385 PCI: 00:1a.0 init
1323 12:50:54.289106 PCI: 00:1a.0 init finished in 0 msecs
1324 12:50:54.291485 PCI: 00:1c.0 init
1325 12:50:54.294275 Initializing PCH PCIe bridge.
1326 12:50:54.297982 PCI: 00:1c.0 init finished in 3 msecs
1327 12:50:54.301598 PCI: 00:1f.0 init
1328 12:50:54.305641 IOAPIC: Initializing IOAPIC at 0xfec00000
1329 12:50:54.310152 IOAPIC: Bootstrap Processor Local APIC = 0x00
1330 12:50:54.312386 IOAPIC: ID = 0x02
1331 12:50:54.315190 IOAPIC: Dumping registers
1332 12:50:54.317492 reg 0x0000: 0x02000000
1333 12:50:54.319865 reg 0x0001: 0x00770020
1334 12:50:54.322266 reg 0x0002: 0x00000000
1335 12:50:54.326558 PCI: 00:1f.0 init finished in 21 msecs
1336 12:50:54.329396 PCI: 00:1f.4 init
1337 12:50:54.332840 PCI: 00:1f.4 init finished in 0 msecs
1338 12:50:54.343291 PCI: 01:00.0 init
1339 12:50:54.347979 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1340 12:50:54.354813 Error: Could not locate 'ethernet_mac0' in VPD
1341 12:50:54.361717 r8168: mac address not found in VPD, using default 00:e0:4c:00:c0:b0
1342 12:50:54.365600 r8168: ignore invalid MAC address in cbfs
1343 12:50:54.368531 r8168: Resetting NIC...done
1344 12:50:54.372039 r8168: Programming MAC Address...done
1345 12:50:54.375087 r8168: Customized LED 0x5af
1346 12:50:54.379108 r8168: read back LED setting as 0x5af
1347 12:50:54.382588 PCI: 01:00.0 init finished in 35 msecs
1348 12:50:54.385660 PNP: 0c09.0 init
1349 12:50:54.390481 Google Chrome EC uptime: 2850171.255 seconds
1350 12:50:54.394936 Google Chrome AP resets since EC boot: 4052
1351 12:50:54.398961 Google Chrome most recent AP reset causes:
1352 12:50:54.403286 2841743.509: 32768 shutdown: power failure
1353 12:50:54.407806 2841743.510: 32768 shutdown: power failure
1354 12:50:54.411976 2841743.796: 32775 shutdown: entering G3
1355 12:50:54.416595 2850156.020: 32774 shutdown: by console command
1356 12:50:54.422779 Google Chrome EC reset flags at last EC boot: reset-pin
1357 12:50:54.426259 PNP: 0c09.0 init finished in 36 msecs
1358 12:50:54.428783 Devices initialized
1359 12:50:54.431697 Show all devs... After init.
1360 12:50:54.433624 Root Device: enabled 1
1361 12:50:54.436097 CPU_CLUSTER: 0: enabled 1
1362 12:50:54.438336 DOMAIN: 0000: enabled 1
1363 12:50:54.440677 APIC: 00: enabled 1
1364 12:50:54.443296 PCI: 00:00.0: enabled 1
1365 12:50:54.445517 PCI: 00:02.0: enabled 1
1366 12:50:54.448585 PCI: 00:04.0: enabled 1
1367 12:50:54.450700 PCI: 00:05.0: enabled 0
1368 12:50:54.453126 PCI: 00:12.0: enabled 1
1369 12:50:54.455482 PCI: 00:12.5: enabled 0
1370 12:50:54.457699 PCI: 00:12.6: enabled 0
1371 12:50:54.460257 PCI: 00:14.0: enabled 1
1372 12:50:54.462769 PCI: 00:14.1: enabled 0
1373 12:50:54.465006 PCI: 00:14.3: enabled 1
1374 12:50:54.467831 PCI: 00:14.5: enabled 1
1375 12:50:54.469793 PCI: 00:15.0: enabled 0
1376 12:50:54.472998 PCI: 00:15.1: enabled 0
1377 12:50:54.475019 PCI: 00:15.2: enabled 1
1378 12:50:54.477725 PCI: 00:15.3: enabled 1
1379 12:50:54.479881 PCI: 00:16.0: enabled 1
1380 12:50:54.482479 PCI: 00:16.1: enabled 0
1381 12:50:54.484383 PCI: 00:16.2: enabled 0
1382 12:50:54.486989 PCI: 00:16.3: enabled 0
1383 12:50:54.489876 PCI: 00:16.4: enabled 0
1384 12:50:54.491700 PCI: 00:16.5: enabled 0
1385 12:50:54.494457 PCI: 00:17.0: enabled 0
1386 12:50:54.497140 PCI: 00:19.0: enabled 1
1387 12:50:54.499673 PCI: 00:19.1: enabled 0
1388 12:50:54.501639 PCI: 00:19.2: enabled 0
1389 12:50:54.504170 PCI: 00:1a.0: enabled 1
1390 12:50:54.506499 PCI: 00:1c.0: enabled 0
1391 12:50:54.508823 PCI: 00:1c.1: enabled 0
1392 12:50:54.511096 PCI: 00:1c.2: enabled 0
1393 12:50:54.514144 PCI: 00:1c.3: enabled 0
1394 12:50:54.516153 PCI: 00:1c.4: enabled 0
1395 12:50:54.518877 PCI: 00:1c.5: enabled 0
1396 12:50:54.521852 PCI: 00:1c.0: enabled 1
1397 12:50:54.523433 PCI: 00:1c.7: enabled 0
1398 12:50:54.525931 PCI: 00:1d.0: enabled 1
1399 12:50:54.528517 PCI: 00:1d.1: enabled 0
1400 12:50:54.530829 PCI: 00:1d.2: enabled 1
1401 12:50:54.533269 PCI: 00:1d.3: enabled 0
1402 12:50:54.535571 PCI: 00:1d.4: enabled 0
1403 12:50:54.538156 PCI: 00:1d.5: enabled 1
1404 12:50:54.540076 PCI: 00:1e.0: enabled 1
1405 12:50:54.542819 PCI: 00:1e.1: enabled 0
1406 12:50:54.545170 PCI: 00:1e.2: enabled 1
1407 12:50:54.547604 PCI: 00:1e.3: enabled 0
1408 12:50:54.550496 PCI: 00:1f.0: enabled 1
1409 12:50:54.552651 PCI: 00:1f.1: enabled 0
1410 12:50:54.555239 PCI: 00:1f.2: enabled 0
1411 12:50:54.557594 PCI: 00:1f.3: enabled 1
1412 12:50:54.560043 PCI: 00:1f.4: enabled 1
1413 12:50:54.562767 PCI: 00:1f.5: enabled 1
1414 12:50:54.565058 PCI: 00:1f.6: enabled 0
1415 12:50:54.567712 GENERIC: 0.0: enabled 1
1416 12:50:54.569698 USB0 port 0: enabled 1
1417 12:50:54.572180 I2C: 02:4a: enabled 1
1418 12:50:54.574270 I2C: 03:4a: enabled 1
1419 12:50:54.576405 I2C: 04:1a: enabled 1
1420 12:50:54.578913 PCI: 01:00.0: enabled 1
1421 12:50:54.581462 PCI: 00:00.0: enabled 1
1422 12:50:54.582891 SPI: 00: enabled 1
1423 12:50:54.585212 PNP: 0c09.0: enabled 1
1424 12:50:54.587946 USB2 port 0: enabled 1
1425 12:50:54.590636 USB2 port 1: enabled 1
1426 12:50:54.592891 USB2 port 2: enabled 1
1427 12:50:54.594712 USB2 port 3: enabled 1
1428 12:50:54.597052 USB2 port 5: enabled 1
1429 12:50:54.599610 USB2 port 6: enabled 0
1430 12:50:54.601513 USB2 port 9: enabled 1
1431 12:50:54.604475 USB3 port 0: enabled 1
1432 12:50:54.606630 USB3 port 1: enabled 1
1433 12:50:54.608817 USB3 port 2: enabled 1
1434 12:50:54.611432 USB3 port 3: enabled 1
1435 12:50:54.613434 USB3 port 4: enabled 1
1436 12:50:54.615807 USB2 port 4: enabled 1
1437 12:50:54.618353 USB3 port 5: enabled 1
1438 12:50:54.619929 APIC: 02: enabled 1
1439 12:50:54.622436 PCI: 00:08.0: enabled 1
1440 12:50:54.625031 PCI: 00:14.2: enabled 1
1441 12:50:54.630482 BS: BS_DEV_INIT run times (exec / console): 26 / 459 ms
1442 12:50:54.632966 Disabling ACPI via APMC.
1443 12:50:54.636527 APMC done.
1444 12:50:54.640870 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1445 12:50:54.644629 ELOG: NV offset 0xaf0000 size 0x4000
1446 12:50:54.652444 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1447 12:50:54.659305 ELOG: Event(17) added with size 13 at 2023-09-23 12:50:53 UTC
1448 12:50:54.665315 ELOG: Event(92) added with size 9 at 2023-09-23 12:50:53 UTC
1449 12:50:54.671782 ELOG: Event(93) added with size 9 at 2023-09-23 12:50:53 UTC
1450 12:50:54.678293 ELOG: Event(9E) added with size 10 at 2023-09-23 12:50:53 UTC
1451 12:50:54.685452 ELOG: Event(9F) added with size 14 at 2023-09-23 12:50:53 UTC
1452 12:50:54.689984 BS: BS_DEV_INIT exit times (exec / console): 5 / 49 ms
1453 12:50:54.696023 ELOG: Event(A1) added with size 10 at 2023-09-23 12:50:53 UTC
1454 12:50:54.704411 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1455 12:50:54.710300 ELOG: Event(A0) added with size 9 at 2023-09-23 12:50:53 UTC
1456 12:50:54.714777 elog_add_boot_reason: Logged dev mode boot
1457 12:50:54.720192 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1458 12:50:54.722449 Finalize devices...
1459 12:50:54.724194 Devices finalized
1460 12:50:54.729531 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1461 12:50:54.734673 FMAP: area RW_NVRAM found @ afa000 (20480 bytes)
1462 12:50:54.740851 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1463 12:50:54.745123 ME: HFSTS1 : 0x80030045
1464 12:50:54.748927 ME: HFSTS2 : 0x30280136
1465 12:50:54.752804 ME: HFSTS3 : 0x00000050
1466 12:50:54.757027 ME: HFSTS4 : 0x00004800
1467 12:50:54.761111 ME: HFSTS5 : 0x00000000
1468 12:50:54.765121 ME: HFSTS6 : 0x40400006
1469 12:50:54.768406 ME: Manufacturing Mode : NO
1470 12:50:54.771866 ME: FW Partition Table : OK
1471 12:50:54.775443 ME: Bringup Loader Failure : NO
1472 12:50:54.778511 ME: Firmware Init Complete : NO
1473 12:50:54.781880 ME: Boot Options Present : NO
1474 12:50:54.785123 ME: Update In Progress : NO
1475 12:50:54.788809 ME: D0i3 Support : YES
1476 12:50:54.792134 ME: Low Power State Enabled : NO
1477 12:50:54.795642 ME: CPU Replaced : YES
1478 12:50:54.798850 ME: CPU Replacement Valid : YES
1479 12:50:54.801905 ME: Current Working State : 5
1480 12:50:54.804707 ME: Current Operation State : 1
1481 12:50:54.808013 ME: Current Operation Mode : 3
1482 12:50:54.811120 ME: Error Code : 0
1483 12:50:54.814947 ME: CPU Debug Disabled : YES
1484 12:50:54.817860 ME: TXT Support : NO
1485 12:50:54.824438 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1486 12:50:54.829494 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1487 12:50:54.833165 CBFS: Locating 'fallback/dsdt.aml'
1488 12:50:54.836772 CBFS: Found @ offset 636c0 size 32e0
1489 12:50:54.842170 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1490 12:50:54.845503 CBFS: Locating 'fallback/slic'
1491 12:50:54.850245 CBFS: 'fallback/slic' not found.
1492 12:50:54.854259 ACPI: Writing ACPI tables at 99b31000.
1493 12:50:54.855918 ACPI: * FACS
1494 12:50:54.857543 ACPI: * DSDT
1495 12:50:54.861210 Ramoops buffer: 0x100000@0x99a30000.
1496 12:50:54.865671 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1497 12:50:54.870309 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1498 12:50:54.873476 Google Chrome EC: version:
1499 12:50:54.876798 ro: puff_v2.0.4638-67e4d7990
1500 12:50:54.879560 rw: puff_v2.0.4638-67e4d7990
1501 12:50:54.881889 running image: 1
1502 12:50:54.888133 PCI space above 4GB MMIO is at 0x15e800000, len = 0x7ea1800000
1503 12:50:54.890927 ACPI: * FADT
1504 12:50:54.892773 SCI is IRQ9
1505 12:50:54.896376 ACPI: added table 1/32, length now 40
1506 12:50:54.898173 ACPI: * SSDT
1507 12:50:54.901769 Found 1 CPU(s) with 2 core(s) each.
1508 12:50:54.906393 \_SB.PCI0.WFA3.WFA3: Intel WiFi PCI: 00:14.3
1509 12:50:54.910051 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1510 12:50:54.914780 \_SB.PCI0.I2C2.PS17: Parade PS175 at I2C: 02:4a
1511 12:50:54.919575 \_SB.PCI0.I2C3.RTD2: Realtek RTD2142 at I2C: 03:4a
1512 12:50:54.925294 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 04:1a
1513 12:50:54.929807 \_SB.PCI0.RP01.RLTK.RLTK: Realtek r8168 PCI: 01:00.0
1514 12:50:54.934248 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1515 12:50:54.938652 EC returned error result code 3
1516 12:50:54.941552 EC returned error result code 1
1517 12:50:54.945856 PS2K: Bad resp from EC. Vivaldi disabled!
1518 12:50:54.951963 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-A Front Left at USB2 port 0
1519 12:50:54.958640 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-C Port Rear at USB2 port 1
1520 12:50:54.965320 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-A Front Right at USB2 port 2
1521 12:50:54.970958 \_SB.PCI0.XHCI.RHUB.HS04: USB2 Type-A Rear Right at USB2 port 3
1522 12:50:54.977324 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Type-A Rear Left at USB2 port 5
1523 12:50:54.981881 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1524 12:50:54.988760 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Front Left at USB3 port 0
1525 12:50:54.995069 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Front Right at USB3 port 1
1526 12:50:55.001342 \_SB.PCI0.XHCI.RHUB.SS03: USB3 Type-A Rear Right at USB3 port 2
1527 12:50:55.006830 \_SB.PCI0.XHCI.RHUB.SS04: USB3 Type-C Rear at USB3 port 3
1528 12:50:55.013234 \_SB.PCI0.XHCI.RHUB.SS05: USB3 Type-A Rear Left at USB3 port 4
1529 12:50:55.019325 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-A Rear Middle at USB2 port 4
1530 12:50:55.025828 \_SB.PCI0.XHCI.RHUB.SS06: USB3 Type-A Rear Middle at USB3 port 5
1531 12:50:55.029587 ACPI: added table 2/32, length now 44
1532 12:50:55.031328 ACPI: * MCFG
1533 12:50:55.035215 ACPI: added table 3/32, length now 48
1534 12:50:55.036917 ACPI: * TPM2
1535 12:50:55.039853 TPM2 log created at 0x99a20000
1536 12:50:55.043792 ACPI: added table 4/32, length now 52
1537 12:50:55.045245 ACPI: * MADT
1538 12:50:55.046564 SCI is IRQ9
1539 12:50:55.050498 ACPI: added table 5/32, length now 56
1540 12:50:55.052640 current = 99b36070
1541 12:50:55.054316 ACPI: * DMAR
1542 12:50:55.057747 ACPI: added table 6/32, length now 60
1543 12:50:55.061902 ACPI: added table 7/32, length now 64
1544 12:50:55.063018 ACPI: * HPET
1545 12:50:55.067143 ACPI: added table 8/32, length now 68
1546 12:50:55.068519 ACPI: done.
1547 12:50:55.071040 ACPI tables: 20912 bytes.
1548 12:50:55.073937 smbios_write_tables: 99a1f000
1549 12:50:55.078013 EC returned error result code 3
1550 12:50:55.080574 Couldn't obtain OEM name from CBI
1551 12:50:55.083927 Create SMBIOS type 17
1552 12:50:55.087160 PCI: 00:00.0 (Intel Cannonlake)
1553 12:50:55.089424 PCI: 00:14.3 (Intel WiFi)
1554 12:50:55.091628 SMBIOS tables: 841 bytes.
1555 12:50:55.096371 Writing table forward entry at 0x00000500
1556 12:50:55.102823 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 1629
1557 12:50:55.106525 Writing coreboot table at 0x99b55000
1558 12:50:55.112246 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1559 12:50:55.116899 1. 0000000000001000-000000000009ffff: RAM
1560 12:50:55.121158 2. 00000000000a0000-00000000000fffff: RESERVED
1561 12:50:55.125918 3. 0000000000100000-0000000099a1efff: RAM
1562 12:50:55.131766 4. 0000000099a1f000-0000000099ba4fff: CONFIGURATION TABLES
1563 12:50:55.136314 5. 0000000099ba5000-0000000099c0afff: RAMSTAGE
1564 12:50:55.142351 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1565 12:50:55.146900 7. 000000009a000000-000000009f7fffff: RESERVED
1566 12:50:55.151993 8. 00000000e0000000-00000000efffffff: RESERVED
1567 12:50:55.156879 9. 00000000fc000000-00000000fc000fff: RESERVED
1568 12:50:55.161211 10. 00000000fe000000-00000000fe00ffff: RESERVED
1569 12:50:55.166255 11. 00000000fed10000-00000000fed17fff: RESERVED
1570 12:50:55.170696 12. 00000000fed80000-00000000fed83fff: RESERVED
1571 12:50:55.175101 13. 00000000fed90000-00000000fed91fff: RESERVED
1572 12:50:55.180016 14. 00000000feda0000-00000000feda1fff: RESERVED
1573 12:50:55.184570 15. 0000000100000000-000000015e7fffff: RAM
1574 12:50:55.188028 Graphics hand-off block not found
1575 12:50:55.191829 FSP did not return a valid framebuffer
1576 12:50:55.194669 Passing 4 GPIOs to payload:
1577 12:50:55.200197 NAME | PORT | POLARITY | VALUE
1578 12:50:55.205317 lid | undefined | high | high
1579 12:50:55.210360 power | undefined | high | low
1580 12:50:55.215632 oprom | undefined | high | low
1581 12:50:55.220730 EC in RW | 0x000000cb | high | low
1582 12:50:55.222339 Board ID: 4
1583 12:50:55.227551 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1584 12:50:55.233579 Wrote coreboot table at: 0x99b55000, 0x578 bytes, checksum e9f7
1585 12:50:55.236531 coreboot table: 1424 bytes.
1586 12:50:55.240314 IMD ROOT 0. 0x99fff000 0x00001000
1587 12:50:55.243587 IMD SMALL 1. 0x99ffe000 0x00001000
1588 12:50:55.247855 FSP MEMORY 2. 0x99c4e000 0x003b0000
1589 12:50:55.252263 CONSOLE 3. 0x99c2e000 0x00020000
1590 12:50:55.255527 FMAP 4. 0x99c2d000 0x00000578
1591 12:50:55.258377 TIME STAMP 5. 0x99c2c000 0x00000910
1592 12:50:55.262168 VBOOT WORK 6. 0x99c18000 0x00014000
1593 12:50:55.265685 MRC DATA 7. 0x99c16000 0x00001958
1594 12:50:55.269448 ROMSTG STCK 8. 0x99c15000 0x00001000
1595 12:50:55.273142 AFTER CAR 9. 0x99c0b000 0x0000a000
1596 12:50:55.277278 RAMSTAGE 10. 0x99ba4000 0x00067000
1597 12:50:55.282029 REFCODE 11. 0x99b6f000 0x00035000
1598 12:50:55.284163 SMM BACKUP 12. 0x99b5f000 0x00010000
1599 12:50:55.288154 4f444749 13. 0x99b5d000 0x00002000
1600 12:50:55.292297 COREBOOT 14. 0x99b55000 0x00008000
1601 12:50:55.296010 ACPI 15. 0x99b31000 0x00024000
1602 12:50:55.299227 ACPI GNVS 16. 0x99b30000 0x00001000
1603 12:50:55.303164 RAMOOPS 17. 0x99a30000 0x00100000
1604 12:50:55.306690 TPM2 TCGLOG18. 0x99a20000 0x00010000
1605 12:50:55.310677 SMBIOS 19. 0x99a1f000 0x00000800
1606 12:50:55.312433 IMD small region:
1607 12:50:55.316266 IMD ROOT 0. 0x99ffec00 0x00000400
1608 12:50:55.319962 FSP RUNTIME 1. 0x99ffebe0 0x00000004
1609 12:50:55.324627 VPD 2. 0x99ffeb80 0x00000058
1610 12:50:55.328466 POWER STATE 3. 0x99ffeb40 0x00000040
1611 12:50:55.332417 ROMSTAGE 4. 0x99ffeb20 0x00000004
1612 12:50:55.336135 MEM INFO 5. 0x99ffe960 0x000001b9
1613 12:50:55.341852 BS: BS_WRITE_TABLES run times (exec / console): 6 / 504 ms
1614 12:50:55.344822 MTRR: Physical address space:
1615 12:50:55.351025 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1616 12:50:55.356928 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1617 12:50:55.363397 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1618 12:50:55.369836 0x000000009b000000 - 0x00000000a0000000 size 0x05000000 type 0
1619 12:50:55.375653 0x00000000a0000000 - 0x00000000b0000000 size 0x10000000 type 1
1620 12:50:55.381602 0x00000000b0000000 - 0x0000000100000000 size 0x50000000 type 0
1621 12:50:55.387865 0x0000000100000000 - 0x000000015e800000 size 0x5e800000 type 6
1622 12:50:55.392354 MTRR: Fixed MSR 0x250 0x0606060606060606
1623 12:50:55.396459 MTRR: Fixed MSR 0x258 0x0606060606060606
1624 12:50:55.400068 MTRR: Fixed MSR 0x259 0x0000000000000000
1625 12:50:55.404341 MTRR: Fixed MSR 0x268 0x0606060606060606
1626 12:50:55.408601 MTRR: Fixed MSR 0x269 0x0606060606060606
1627 12:50:55.413104 MTRR: Fixed MSR 0x26a 0x0606060606060606
1628 12:50:55.416454 MTRR: Fixed MSR 0x26b 0x0606060606060606
1629 12:50:55.420444 MTRR: Fixed MSR 0x26c 0x0606060606060606
1630 12:50:55.424791 MTRR: Fixed MSR 0x26d 0x0606060606060606
1631 12:50:55.428872 MTRR: Fixed MSR 0x26e 0x0606060606060606
1632 12:50:55.432765 MTRR: Fixed MSR 0x26f 0x0606060606060606
1633 12:50:55.435842 call enable_fixed_mtrr()
1634 12:50:55.439479 CPU physical address size: 39 bits
1635 12:50:55.444871 MTRR: default type WB/UC MTRR counts: 5/6.
1636 12:50:55.447717 MTRR: WB selected as default type.
1637 12:50:55.453347 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1638 12:50:55.460240 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1639 12:50:55.466004 MTRR: 2 base 0x00000000a0000000 mask 0x0000007ff0000000 type 1
1640 12:50:55.472532 MTRR: 3 base 0x00000000b0000000 mask 0x0000007ff0000000 type 0
1641 12:50:55.478382 MTRR: 4 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1642 12:50:55.482942 MTRR: Fixed MSR 0x250 0x0606060606060606
1643 12:50:55.487185 MTRR: Fixed MSR 0x258 0x0606060606060606
1644 12:50:55.491356 MTRR: Fixed MSR 0x259 0x0000000000000000
1645 12:50:55.496184 MTRR: Fixed MSR 0x268 0x0606060606060606
1646 12:50:55.499764 MTRR: Fixed MSR 0x269 0x0606060606060606
1647 12:50:55.503704 MTRR: Fixed MSR 0x26a 0x0606060606060606
1648 12:50:55.507822 MTRR: Fixed MSR 0x26b 0x0606060606060606
1649 12:50:55.511752 MTRR: Fixed MSR 0x26c 0x0606060606060606
1650 12:50:55.516109 MTRR: Fixed MSR 0x26d 0x0606060606060606
1651 12:50:55.519760 MTRR: Fixed MSR 0x26e 0x0606060606060606
1652 12:50:55.524123 MTRR: Fixed MSR 0x26f 0x0606060606060606
1653 12:50:55.524363
1654 12:50:55.525330 MTRR check
1655 12:50:55.527404 Fixed MTRRs : Enabled
1656 12:50:55.529906 Variable MTRRs: Enabled
1657 12:50:55.530811
1658 12:50:55.532884 call enable_fixed_mtrr()
1659 12:50:55.539068 BS: BS_WRITE_TABLES exit times (exec / console): 46 / 142 ms
1660 12:50:55.542448 CPU physical address size: 39 bits
1661 12:50:55.544850 Probing TPM: done!
1662 12:50:55.549830 Connected to device vid:did:rid of 1ae0:0028:00
1663 12:50:55.559701 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b81dc66
1664 12:50:55.563682 Initialized TPM device CR50 revision 0
1665 12:50:55.567427 Checking cr50 for pending updates
1666 12:50:55.572944 Reading cr50 TPM mode
1667 12:50:55.582301 BS: BS_PAYLOAD_LOAD entry times (exec / console): 12 / 25 ms
1668 12:50:55.588127 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1669 12:50:55.590969 CBFS: Locating 'fallback/payload'
1670 12:50:55.596242 CBFS: Found @ offset 3a0c00 size 48db0
1671 12:50:55.600554 Checking segment from ROM address 0xfffa8c38
1672 12:50:55.605138 Checking segment from ROM address 0xfffa8c54
1673 12:50:55.609185 Loading segment from ROM address 0xfffa8c38
1674 12:50:55.611901 code (compression=0)
1675 12:50:55.620519 New segment dstaddr 0x30000000 memsize 0x2660100 srcaddr 0xfffa8c70 filesize 0x48d78
1676 12:50:55.628632 Loading Segment: addr: 0x30000000 memsz: 0x0000000002660100 filesz: 0x0000000000048d78
1677 12:50:55.630824 it's not compressed!
1678 12:50:55.734268 [ 0x30000000, 30048d78, 0x32660100) <- fffa8c70
1679 12:50:55.740946 Clearing Segment: addr: 0x0000000030048d78 memsz: 0x0000000002617388
1680 12:50:55.748979 Loading segment from ROM address 0xfffa8c54
1681 12:50:55.752001 Entry Point 0x30000000
1682 12:50:55.753272 Loaded segments
1683 12:50:55.759107 BS: BS_PAYLOAD_LOAD run times (exec / console): 103 / 67 ms
1684 12:50:55.762856 Finalizing chipset.
1685 12:50:55.764260 Finalizing SMM.
1686 12:50:55.765420 APMC done.
1687 12:50:55.771096 BS: BS_PAYLOAD_LOAD exit times (exec / console): 2 / 5 ms
1688 12:50:55.774209 mp_park_aps done after 0 msecs.
1689 12:50:55.779474 Jumping to boot code at 0x30000000(0x99b55000)
1690 12:50:55.788594 CPU0: stack: 0x99bf8000 - 0x99bf9000, lowest used address 0x99bf8a88, stack used: 1400 bytes
1691 12:50:55.789499
1692 12:50:55.789888
1693 12:50:55.790232
1694 12:50:55.792184 Starting depthcharge on Kaisa...
1695 12:50:55.792652
1696 12:50:55.796155 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
1697 12:50:55.796716 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
1698 12:50:55.797162 Setting prompt string to ['puff:']
1699 12:50:55.797594 bootloader-commands: Wait for prompt ['puff:'] (timeout 00:04:43)
1700 12:50:55.799510 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1701 12:50:55.799972
1702 12:50:55.807303 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1703 12:50:55.807634
1704 12:50:55.808759 BIOS MMAP details:
1705 12:50:55.809366
1706 12:50:55.811979 IFD Base Offset : 0x300000
1707 12:50:55.812308
1708 12:50:55.814795 IFD End Offset : 0x1000000
1709 12:50:55.815366
1710 12:50:55.817710 MMAP Size : 0xd00000
1711 12:50:55.818317
1712 12:50:55.820035 MMAP Start : 0xff300000
1713 12:50:55.820645
1714 12:50:55.825677 Looking for NVMe Controller 0x3105c848 @ 00:1d:00
1715 12:50:55.826251
1716 12:50:55.827379 Wipe memory regions:
1717 12:50:55.827784
1718 12:50:55.831058 [0x00000000001000, 0x000000000a0000)
1719 12:50:55.831665
1720 12:50:55.835474 [0x00000000100000, 0x00000030000000)
1721 12:50:55.884137
1722 12:50:55.888049 [0x00000032660100, 0x00000099a1f000)
1723 12:50:55.990984
1724 12:50:55.994566 [0x00000100000000, 0x0000015e800000)
1725 12:50:56.395169
1726 12:50:56.396567 R8152: Initializing
1727 12:50:56.397260
1728 12:50:56.400164 Version 9 (ocp_data = 6010)
1729 12:50:56.401040
1730 12:50:56.403407 R8152: Done initializing
1731 12:50:56.404120
1732 12:50:56.405045 Adding net device
1733 12:50:56.705747
1734 12:50:56.710561 [firmware-puff-13324.B-collabora] Feb 14 2023 12:06:39
1735 12:50:56.711114
1736 12:50:56.711960
1737 12:50:56.712348
1738 12:50:56.713250 Setting prompt string to ['puff:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1740 12:50:56.814866 puff: tftpboot 192.168.201.1 11602066/tftp-deploy-j7sndxv_/kernel/bzImage 11602066/tftp-deploy-j7sndxv_/kernel/cmdline 11602066/tftp-deploy-j7sndxv_/ramdisk/ramdisk.cpio.gz
1741 12:50:56.815605 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1742 12:50:56.816079 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
1743 12:50:56.858978 tftpboot 192.168.201.1 11602066/tftp-deploy-j7sndxv_/kernel/bzImage 11602066/tftp-deploy-j7sndxv_/kernel/cmdline 11602066/tftp-deploy-j7sndxv_/ramdisk/ramdisk.cpio.gz
1744 12:50:56.859775
1745 12:50:56.860674 Waiting for link
1746 12:50:57.019920
1747 12:50:57.021025 done.
1748 12:50:57.021538
1749 12:50:57.022661 MAC: 00:e0:4c:68:00:ff
1750 12:50:57.023271
1751 12:50:57.026171 Sending DHCP discover... done.
1752 12:50:57.026757
1753 12:50:57.028319 Waiting for reply... done.
1754 12:50:57.028730
1755 12:50:57.031679 Sending DHCP request... done.
1756 12:50:57.032148
1757 12:50:57.037087 Waiting for reply... done.
1758 12:50:57.037606
1759 12:50:57.039744 My ip is 192.168.201.13
1760 12:50:57.040473
1761 12:50:57.043520 The DHCP server ip is 192.168.201.1
1762 12:50:57.043944
1763 12:50:57.047807 TFTP server IP predefined by user: 192.168.201.1
1764 12:50:57.048258
1765 12:50:57.055900 Bootfile predefined by user: 11602066/tftp-deploy-j7sndxv_/kernel/bzImage
1766 12:50:57.056319
1767 12:50:57.058689 Sending tftp read request... done.
1768 12:50:57.059171
1769 12:50:57.065077 Waiting for the transfer...
1770 12:50:57.065586
1771 12:50:57.408743 00000000 ################################################################
1772 12:50:57.409609
1773 12:50:57.806612 00080000 ################################################################
1774 12:50:57.807518
1775 12:50:58.188929 00100000 ################################################################
1776 12:50:58.189969
1777 12:50:58.579827 00180000 ################################################################
1778 12:50:58.580728
1779 12:50:58.961757 00200000 ################################################################
1780 12:50:58.962695
1781 12:50:59.331544 00280000 ################################################################
1782 12:50:59.332095
1783 12:50:59.711761 00300000 ################################################################
1784 12:50:59.712659
1785 12:50:59.977277 00380000 ################################################################
1786 12:50:59.977603
1787 12:51:00.250422 00400000 ################################################################
1788 12:51:00.250601
1789 12:51:00.493744 00480000 ################################################################
1790 12:51:00.494357
1791 12:51:00.757176 00500000 ################################################################
1792 12:51:00.757305
1793 12:51:01.045467 00580000 ################################################################
1794 12:51:01.045593
1795 12:51:01.314544 00600000 ################################################################
1796 12:51:01.315002
1797 12:51:01.552679 00680000 ################################################################
1798 12:51:01.552813
1799 12:51:01.791699 00700000 ################################################################
1800 12:51:01.792699
1801 12:51:02.029601 00780000 ################################################################
1802 12:51:02.029945
1803 12:51:02.268290 00800000 ################################################################
1804 12:51:02.268659
1805 12:51:02.506607 00880000 ################################################################
1806 12:51:02.507175
1807 12:51:02.745261 00900000 ################################################################
1808 12:51:02.745734
1809 12:51:02.987830 00980000 ################################################################
1810 12:51:02.988724
1811 12:51:03.233105 00a00000 ################################################################
1812 12:51:03.233823
1813 12:51:03.447370 00a80000 ######################################################### done.
1814 12:51:03.447760
1815 12:51:03.451007 The bootfile was 11473408 bytes long.
1816 12:51:03.451627
1817 12:51:03.454578 Sending tftp read request... done.
1818 12:51:03.454720
1819 12:51:03.458072 Waiting for the transfer...
1820 12:51:03.458149
1821 12:51:03.703118 00000000 ################################################################
1822 12:51:03.703770
1823 12:51:03.945927 00080000 ################################################################
1824 12:51:03.946291
1825 12:51:04.221155 00100000 ################################################################
1826 12:51:04.221742
1827 12:51:04.462606 00180000 ################################################################
1828 12:51:04.463001
1829 12:51:04.701072 00200000 ################################################################
1830 12:51:04.701697
1831 12:51:04.939561 00280000 ################################################################
1832 12:51:04.940351
1833 12:51:05.180039 00300000 ################################################################
1834 12:51:05.180832
1835 12:51:05.426737 00380000 ################################################################
1836 12:51:05.427297
1837 12:51:05.681136 00400000 ################################################################
1838 12:51:05.681611
1839 12:51:05.921798 00480000 ################################################################
1840 12:51:05.922181
1841 12:51:06.160346 00500000 ################################################################
1842 12:51:06.160729
1843 12:51:06.398345 00580000 ################################################################
1844 12:51:06.398880
1845 12:51:06.644883 00600000 ################################################################
1846 12:51:06.645558
1847 12:51:06.891335 00680000 ################################################################
1848 12:51:06.892308
1849 12:51:07.142150 00700000 ################################################################
1850 12:51:07.142663
1851 12:51:07.388067 00780000 ################################################################
1852 12:51:07.388456
1853 12:51:07.633793 00800000 ################################################################
1854 12:51:07.634173
1855 12:51:07.787647 00880000 ######################################## done.
1856 12:51:07.788168
1857 12:51:07.790683 Sending tftp read request... done.
1858 12:51:07.791256
1859 12:51:07.793828 Waiting for the transfer...
1860 12:51:07.794201
1861 12:51:07.795499 00000000 # done.
1862 12:51:07.795588
1863 12:51:07.804784 Command line loaded dynamically from TFTP file: 11602066/tftp-deploy-j7sndxv_/kernel/cmdline
1864 12:51:07.804872
1865 12:51:07.820095 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1866 12:51:07.820183
1867 12:51:07.824726 ec_init: CrosEC protocol v3 supported (256, 256)
1868 12:51:07.828946
1869 12:51:07.832599 Shutting down all USB controllers.
1870 12:51:07.832684
1871 12:51:07.835275 Removing current net device
1872 12:51:07.835361
1873 12:51:07.836914 Finalizing coreboot
1874 12:51:07.837622
1875 12:51:07.843364 Exiting depthcharge with code 4 at timestamp: 21512393
1876 12:51:07.843450
1877 12:51:07.843802
1878 12:51:07.844883 end: 2.2.4 bootloader-commands (duration 00:00:12) [common]
1879 12:51:07.845005 start: 2.2.5 auto-login-action (timeout 00:04:31) [common]
1880 12:51:07.845096 Setting prompt string to ['Linux version [0-9]']
1881 12:51:07.845184 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1882 12:51:07.845272 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1883 12:51:07.845475 Starting kernel ...
1884 12:51:07.845731
1885 12:51:07.845806
1887 12:55:38.846060 end: 2.2.5 auto-login-action (duration 00:04:31) [common]
1889 12:55:38.847236 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 271 seconds'
1891 12:55:38.848126 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1894 12:55:38.849500 end: 2 depthcharge-action (duration 00:05:00) [common]
1896 12:55:38.850605 Cleaning after the job
1897 12:55:38.850985 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11602066/tftp-deploy-j7sndxv_/ramdisk
1898 12:55:38.852502 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11602066/tftp-deploy-j7sndxv_/kernel
1899 12:55:38.854212 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11602066/tftp-deploy-j7sndxv_/modules
1900 12:55:38.855051 start: 5.1 power-off (timeout 00:00:30) [common]
1901 12:55:38.855211 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-chromebox-cxi4-puff-cbg-4' '--port=1' '--command=off'
1902 12:55:39.688284 >> Command sent successfully.
1903 12:55:39.699898 Returned 0 in 0 seconds
1904 12:55:39.801162 end: 5.1 power-off (duration 00:00:01) [common]
1906 12:55:39.802616 start: 5.2 read-feedback (timeout 00:09:59) [common]
1907 12:55:39.803792 Listened to connection for namespace 'common' for up to 1s
1909 12:55:40.804374 Finalising connection for namespace 'common'
1910 12:55:40.804588 Disconnecting from shell: Finalise
1911 12:55:40.804701
1912 12:55:40.905287 end: 5.2 read-feedback (duration 00:00:01) [common]
1913 12:55:40.905472 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11602066
1914 12:55:40.924743 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11602066
1915 12:55:40.924913 JobError: Your job cannot terminate cleanly.