Boot log: asus-C436FA-Flip-hatch
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 12:50:50.875191 lava-dispatcher, installed at version: 2023.06
2 12:50:50.875401 start: 0 validate
3 12:50:50.875523 Start time: 2023-09-23 12:50:50.875516+00:00 (UTC)
4 12:50:50.875649 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:50:50.875807 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 12:50:51.147803 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:50:51.148242 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.292-cip102-406-g9efaa60a8cb4%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:50:51.417457 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:50:51.418160 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.292-cip102-406-g9efaa60a8cb4%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:50:56.223723 validate duration: 5.35
12 12:50:56.224973 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:50:56.225504 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:50:56.225973 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:50:56.226621 Not decompressing ramdisk as can be used compressed.
16 12:50:56.227086 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 12:50:56.227440 saving as /var/lib/lava/dispatcher/tmp/11602086/tftp-deploy-0wmdosp3/ramdisk/rootfs.cpio.gz
18 12:50:56.227792 total size: 8418130 (8 MB)
19 12:50:56.880457 progress 0 % (0 MB)
20 12:50:56.893889 progress 5 % (0 MB)
21 12:50:56.906851 progress 10 % (0 MB)
22 12:50:56.914746 progress 15 % (1 MB)
23 12:50:56.920420 progress 20 % (1 MB)
24 12:50:56.925000 progress 25 % (2 MB)
25 12:50:56.929035 progress 30 % (2 MB)
26 12:50:56.932532 progress 35 % (2 MB)
27 12:50:56.935865 progress 40 % (3 MB)
28 12:50:56.938938 progress 45 % (3 MB)
29 12:50:56.941849 progress 50 % (4 MB)
30 12:50:56.944475 progress 55 % (4 MB)
31 12:50:56.947069 progress 60 % (4 MB)
32 12:50:56.949200 progress 65 % (5 MB)
33 12:50:56.951607 progress 70 % (5 MB)
34 12:50:56.953873 progress 75 % (6 MB)
35 12:50:56.956159 progress 80 % (6 MB)
36 12:50:56.958345 progress 85 % (6 MB)
37 12:50:56.960595 progress 90 % (7 MB)
38 12:50:56.962811 progress 95 % (7 MB)
39 12:50:56.964830 progress 100 % (8 MB)
40 12:50:56.965055 8 MB downloaded in 0.74 s (10.89 MB/s)
41 12:50:56.965200 end: 1.1.1 http-download (duration 00:00:01) [common]
43 12:50:56.965433 end: 1.1 download-retry (duration 00:00:01) [common]
44 12:50:56.965519 start: 1.2 download-retry (timeout 00:09:59) [common]
45 12:50:56.965603 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 12:50:56.965737 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.292-cip102-406-g9efaa60a8cb4/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:50:56.965806 saving as /var/lib/lava/dispatcher/tmp/11602086/tftp-deploy-0wmdosp3/kernel/bzImage
48 12:50:56.965863 total size: 11473408 (10 MB)
49 12:50:56.965921 No compression specified
50 12:50:56.967078 progress 0 % (0 MB)
51 12:50:56.970003 progress 5 % (0 MB)
52 12:50:56.973052 progress 10 % (1 MB)
53 12:50:56.975987 progress 15 % (1 MB)
54 12:50:56.979111 progress 20 % (2 MB)
55 12:50:56.981990 progress 25 % (2 MB)
56 12:50:56.985070 progress 30 % (3 MB)
57 12:50:56.988069 progress 35 % (3 MB)
58 12:50:56.991106 progress 40 % (4 MB)
59 12:50:56.994105 progress 45 % (4 MB)
60 12:50:56.997275 progress 50 % (5 MB)
61 12:50:57.000181 progress 55 % (6 MB)
62 12:50:57.003209 progress 60 % (6 MB)
63 12:50:57.006065 progress 65 % (7 MB)
64 12:50:57.009031 progress 70 % (7 MB)
65 12:50:57.011838 progress 75 % (8 MB)
66 12:50:57.014800 progress 80 % (8 MB)
67 12:50:57.017594 progress 85 % (9 MB)
68 12:50:57.020552 progress 90 % (9 MB)
69 12:50:57.023343 progress 95 % (10 MB)
70 12:50:57.026320 progress 100 % (10 MB)
71 12:50:57.026435 10 MB downloaded in 0.06 s (180.65 MB/s)
72 12:50:57.026578 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:50:57.026802 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:50:57.026885 start: 1.3 download-retry (timeout 00:09:59) [common]
76 12:50:57.026972 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 12:50:57.027109 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.292-cip102-406-g9efaa60a8cb4/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:50:57.027179 saving as /var/lib/lava/dispatcher/tmp/11602086/tftp-deploy-0wmdosp3/modules/modules.tar
79 12:50:57.027238 total size: 484692 (0 MB)
80 12:50:57.027299 Using unxz to decompress xz
81 12:50:57.031432 progress 6 % (0 MB)
82 12:50:57.031818 progress 13 % (0 MB)
83 12:50:57.032051 progress 20 % (0 MB)
84 12:50:57.033640 progress 27 % (0 MB)
85 12:50:57.035725 progress 33 % (0 MB)
86 12:50:57.037572 progress 40 % (0 MB)
87 12:50:57.039614 progress 47 % (0 MB)
88 12:50:57.041513 progress 54 % (0 MB)
89 12:50:57.043525 progress 60 % (0 MB)
90 12:50:57.045899 progress 67 % (0 MB)
91 12:50:57.047934 progress 74 % (0 MB)
92 12:50:57.049917 progress 81 % (0 MB)
93 12:50:57.052336 progress 87 % (0 MB)
94 12:50:57.054033 progress 94 % (0 MB)
95 12:50:57.056251 progress 100 % (0 MB)
96 12:50:57.062213 0 MB downloaded in 0.03 s (13.22 MB/s)
97 12:50:57.062449 end: 1.3.1 http-download (duration 00:00:00) [common]
99 12:50:57.062738 end: 1.3 download-retry (duration 00:00:00) [common]
100 12:50:57.062828 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
101 12:50:57.062920 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
102 12:50:57.062996 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 12:50:57.063079 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
104 12:50:57.063302 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11602086/lava-overlay-o8nixkcb
105 12:50:57.063431 makedir: /var/lib/lava/dispatcher/tmp/11602086/lava-overlay-o8nixkcb/lava-11602086/bin
106 12:50:57.063534 makedir: /var/lib/lava/dispatcher/tmp/11602086/lava-overlay-o8nixkcb/lava-11602086/tests
107 12:50:57.063631 makedir: /var/lib/lava/dispatcher/tmp/11602086/lava-overlay-o8nixkcb/lava-11602086/results
108 12:50:57.063745 Creating /var/lib/lava/dispatcher/tmp/11602086/lava-overlay-o8nixkcb/lava-11602086/bin/lava-add-keys
109 12:50:57.063886 Creating /var/lib/lava/dispatcher/tmp/11602086/lava-overlay-o8nixkcb/lava-11602086/bin/lava-add-sources
110 12:50:57.064019 Creating /var/lib/lava/dispatcher/tmp/11602086/lava-overlay-o8nixkcb/lava-11602086/bin/lava-background-process-start
111 12:50:57.064155 Creating /var/lib/lava/dispatcher/tmp/11602086/lava-overlay-o8nixkcb/lava-11602086/bin/lava-background-process-stop
112 12:50:57.064316 Creating /var/lib/lava/dispatcher/tmp/11602086/lava-overlay-o8nixkcb/lava-11602086/bin/lava-common-functions
113 12:50:57.064438 Creating /var/lib/lava/dispatcher/tmp/11602086/lava-overlay-o8nixkcb/lava-11602086/bin/lava-echo-ipv4
114 12:50:57.064559 Creating /var/lib/lava/dispatcher/tmp/11602086/lava-overlay-o8nixkcb/lava-11602086/bin/lava-install-packages
115 12:50:57.064679 Creating /var/lib/lava/dispatcher/tmp/11602086/lava-overlay-o8nixkcb/lava-11602086/bin/lava-installed-packages
116 12:50:57.064799 Creating /var/lib/lava/dispatcher/tmp/11602086/lava-overlay-o8nixkcb/lava-11602086/bin/lava-os-build
117 12:50:57.064922 Creating /var/lib/lava/dispatcher/tmp/11602086/lava-overlay-o8nixkcb/lava-11602086/bin/lava-probe-channel
118 12:50:57.065046 Creating /var/lib/lava/dispatcher/tmp/11602086/lava-overlay-o8nixkcb/lava-11602086/bin/lava-probe-ip
119 12:50:57.065167 Creating /var/lib/lava/dispatcher/tmp/11602086/lava-overlay-o8nixkcb/lava-11602086/bin/lava-target-ip
120 12:50:57.065290 Creating /var/lib/lava/dispatcher/tmp/11602086/lava-overlay-o8nixkcb/lava-11602086/bin/lava-target-mac
121 12:50:57.065410 Creating /var/lib/lava/dispatcher/tmp/11602086/lava-overlay-o8nixkcb/lava-11602086/bin/lava-target-storage
122 12:50:57.065536 Creating /var/lib/lava/dispatcher/tmp/11602086/lava-overlay-o8nixkcb/lava-11602086/bin/lava-test-case
123 12:50:57.065657 Creating /var/lib/lava/dispatcher/tmp/11602086/lava-overlay-o8nixkcb/lava-11602086/bin/lava-test-event
124 12:50:57.065824 Creating /var/lib/lava/dispatcher/tmp/11602086/lava-overlay-o8nixkcb/lava-11602086/bin/lava-test-feedback
125 12:50:57.065957 Creating /var/lib/lava/dispatcher/tmp/11602086/lava-overlay-o8nixkcb/lava-11602086/bin/lava-test-raise
126 12:50:57.066077 Creating /var/lib/lava/dispatcher/tmp/11602086/lava-overlay-o8nixkcb/lava-11602086/bin/lava-test-reference
127 12:50:57.066200 Creating /var/lib/lava/dispatcher/tmp/11602086/lava-overlay-o8nixkcb/lava-11602086/bin/lava-test-runner
128 12:50:57.066321 Creating /var/lib/lava/dispatcher/tmp/11602086/lava-overlay-o8nixkcb/lava-11602086/bin/lava-test-set
129 12:50:57.066443 Creating /var/lib/lava/dispatcher/tmp/11602086/lava-overlay-o8nixkcb/lava-11602086/bin/lava-test-shell
130 12:50:57.066608 Updating /var/lib/lava/dispatcher/tmp/11602086/lava-overlay-o8nixkcb/lava-11602086/bin/lava-install-packages (oe)
131 12:50:57.066760 Updating /var/lib/lava/dispatcher/tmp/11602086/lava-overlay-o8nixkcb/lava-11602086/bin/lava-installed-packages (oe)
132 12:50:57.066879 Creating /var/lib/lava/dispatcher/tmp/11602086/lava-overlay-o8nixkcb/lava-11602086/environment
133 12:50:57.066977 LAVA metadata
134 12:50:57.067049 - LAVA_JOB_ID=11602086
135 12:50:57.067112 - LAVA_DISPATCHER_IP=192.168.201.1
136 12:50:57.067210 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
137 12:50:57.067275 skipped lava-vland-overlay
138 12:50:57.067350 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 12:50:57.067427 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
140 12:50:57.067487 skipped lava-multinode-overlay
141 12:50:57.067558 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 12:50:57.067635 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
143 12:50:57.067706 Loading test definitions
144 12:50:57.067798 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
145 12:50:57.067870 Using /lava-11602086 at stage 0
146 12:50:57.068183 uuid=11602086_1.4.2.3.1 testdef=None
147 12:50:57.068267 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 12:50:57.068352 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
149 12:50:57.068876 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 12:50:57.069094 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
152 12:50:57.069736 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 12:50:57.069959 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
155 12:50:57.070689 runner path: /var/lib/lava/dispatcher/tmp/11602086/lava-overlay-o8nixkcb/lava-11602086/0/tests/0_dmesg test_uuid 11602086_1.4.2.3.1
156 12:50:57.070880 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 12:50:57.071242 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
159 12:50:57.071339 Using /lava-11602086 at stage 1
160 12:50:57.071747 uuid=11602086_1.4.2.3.5 testdef=None
161 12:50:57.071860 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 12:50:57.072009 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
163 12:50:57.072730 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 12:50:57.073072 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
166 12:50:57.073745 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 12:50:57.073975 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
169 12:50:57.074635 runner path: /var/lib/lava/dispatcher/tmp/11602086/lava-overlay-o8nixkcb/lava-11602086/1/tests/1_bootrr test_uuid 11602086_1.4.2.3.5
170 12:50:57.074785 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 12:50:57.074985 Creating lava-test-runner.conf files
173 12:50:57.075046 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11602086/lava-overlay-o8nixkcb/lava-11602086/0 for stage 0
174 12:50:57.075134 - 0_dmesg
175 12:50:57.075217 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11602086/lava-overlay-o8nixkcb/lava-11602086/1 for stage 1
176 12:50:57.075307 - 1_bootrr
177 12:50:57.075400 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 12:50:57.075483 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
179 12:50:57.084142 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 12:50:57.084242 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
181 12:50:57.084325 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 12:50:57.084407 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 12:50:57.084489 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
184 12:50:57.335595 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 12:50:57.336018 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
186 12:50:57.336204 extracting modules file /var/lib/lava/dispatcher/tmp/11602086/tftp-deploy-0wmdosp3/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11602086/extract-overlay-ramdisk-vpwys6r6/ramdisk
187 12:50:57.357233 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 12:50:57.357380 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
189 12:50:57.357474 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11602086/compress-overlay-pcqvn8ri/overlay-1.4.2.4.tar.gz to ramdisk
190 12:50:57.357541 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11602086/compress-overlay-pcqvn8ri/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11602086/extract-overlay-ramdisk-vpwys6r6/ramdisk
191 12:50:57.365709 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 12:50:57.365817 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
193 12:50:57.365916 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 12:50:57.366011 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
195 12:50:57.366084 Building ramdisk /var/lib/lava/dispatcher/tmp/11602086/extract-overlay-ramdisk-vpwys6r6/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11602086/extract-overlay-ramdisk-vpwys6r6/ramdisk
196 12:50:57.521271 >> 53982 blocks
197 12:50:58.425784 rename /var/lib/lava/dispatcher/tmp/11602086/extract-overlay-ramdisk-vpwys6r6/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11602086/tftp-deploy-0wmdosp3/ramdisk/ramdisk.cpio.gz
198 12:50:58.426233 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 12:50:58.426356 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 12:50:58.426458 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 12:50:58.426581 No mkimage arch provided, not using FIT.
202 12:50:58.426696 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 12:50:58.426777 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 12:50:58.426883 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 12:50:58.426969 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 12:50:58.427051 No LXC device requested
207 12:50:58.427127 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 12:50:58.427210 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 12:50:58.427285 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 12:50:58.427361 Checking files for TFTP limit of 4294967296 bytes.
211 12:50:58.427847 end: 1 tftp-deploy (duration 00:00:02) [common]
212 12:50:58.427948 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 12:50:58.428036 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 12:50:58.428154 substitutions:
215 12:50:58.428217 - {DTB}: None
216 12:50:58.428276 - {INITRD}: 11602086/tftp-deploy-0wmdosp3/ramdisk/ramdisk.cpio.gz
217 12:50:58.428332 - {KERNEL}: 11602086/tftp-deploy-0wmdosp3/kernel/bzImage
218 12:50:58.428387 - {LAVA_MAC}: None
219 12:50:58.428440 - {PRESEED_CONFIG}: None
220 12:50:58.428493 - {PRESEED_LOCAL}: None
221 12:50:58.428544 - {RAMDISK}: 11602086/tftp-deploy-0wmdosp3/ramdisk/ramdisk.cpio.gz
222 12:50:58.428596 - {ROOT_PART}: None
223 12:50:58.428648 - {ROOT}: None
224 12:50:58.428698 - {SERVER_IP}: 192.168.201.1
225 12:50:58.428749 - {TEE}: None
226 12:50:58.428801 Parsed boot commands:
227 12:50:58.428852 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 12:50:58.429019 Parsed boot commands: tftpboot 192.168.201.1 11602086/tftp-deploy-0wmdosp3/kernel/bzImage 11602086/tftp-deploy-0wmdosp3/kernel/cmdline 11602086/tftp-deploy-0wmdosp3/ramdisk/ramdisk.cpio.gz
229 12:50:58.429103 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 12:50:58.429185 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 12:50:58.429276 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 12:50:58.429356 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 12:50:58.429426 Not connected, no need to disconnect.
234 12:50:58.429502 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 12:50:58.429588 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 12:50:58.429651 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-0'
237 12:50:58.433810 Setting prompt string to ['lava-test: # ']
238 12:50:58.434162 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 12:50:58.434261 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 12:50:58.434355 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 12:50:58.434459 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 12:50:58.434733 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
243 12:51:03.596199 >> Command sent successfully.
244 12:51:03.602985 Returned 0 in 5 seconds
245 12:51:03.703732 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 12:51:03.705438 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 12:51:03.706004 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 12:51:03.706514 Setting prompt string to 'Starting depthcharge on Helios...'
250 12:51:03.707009 Changing prompt to 'Starting depthcharge on Helios...'
251 12:51:03.707389 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
252 12:51:03.708796 [Enter `^Ec?' for help]
253 12:51:04.321482
254 12:51:04.322058
255 12:51:04.331061 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
256 12:51:04.334819 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
257 12:51:04.340880 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
258 12:51:04.344134 CPU: AES supported, TXT NOT supported, VT supported
259 12:51:04.351044 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
260 12:51:04.354203 PCH: device id 0284 (rev 00) is Cometlake-U Premium
261 12:51:04.361157 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
262 12:51:04.364376 VBOOT: Loading verstage.
263 12:51:04.367593 FMAP: Found "FLASH" version 1.1 at 0xc04000.
264 12:51:04.374597 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
265 12:51:04.377661 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
266 12:51:04.380938 CBFS @ c08000 size 3f8000
267 12:51:04.387882 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
268 12:51:04.391148 CBFS: Locating 'fallback/verstage'
269 12:51:04.394354 CBFS: Found @ offset 10fb80 size 1072c
270 12:51:04.397796
271 12:51:04.398351
272 12:51:04.407646 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
273 12:51:04.421992 Probing TPM: . done!
274 12:51:04.425340 TPM ready after 0 ms
275 12:51:04.428660 Connected to device vid:did:rid of 1ae0:0028:00
276 12:51:04.438804 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
277 12:51:04.443392 Initialized TPM device CR50 revision 0
278 12:51:04.490429 tlcl_send_startup: Startup return code is 0
279 12:51:04.491038 TPM: setup succeeded
280 12:51:04.503095 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
281 12:51:04.506741 Chrome EC: UHEPI supported
282 12:51:04.509789 Phase 1
283 12:51:04.513291 FMAP: area GBB found @ c05000 (12288 bytes)
284 12:51:04.519828 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
285 12:51:04.520379 Phase 2
286 12:51:04.524667 Phase 3
287 12:51:04.526701 FMAP: area GBB found @ c05000 (12288 bytes)
288 12:51:04.533282 VB2:vb2_report_dev_firmware() This is developer signed firmware
289 12:51:04.539947 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
290 12:51:04.543569 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
291 12:51:04.549927 VB2:vb2_verify_keyblock() Checking keyblock signature...
292 12:51:04.565949 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
293 12:51:04.568817 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
294 12:51:04.575481 VB2:vb2_verify_fw_preamble() Verifying preamble.
295 12:51:04.579454 Phase 4
296 12:51:04.582916 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
297 12:51:04.589495 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
298 12:51:04.769786 VB2:vb2_rsa_verify_digest() Digest check failed!
299 12:51:04.775632 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
300 12:51:04.776240 Saving nvdata
301 12:51:04.779293 Reboot requested (10020007)
302 12:51:04.782003 board_reset() called!
303 12:51:04.782474 full_reset() called!
304 12:51:09.287652
305 12:51:09.288218
306 12:51:09.297105 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
307 12:51:09.300737 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
308 12:51:09.307047 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
309 12:51:09.310778 CPU: AES supported, TXT NOT supported, VT supported
310 12:51:09.317156 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
311 12:51:09.320914 PCH: device id 0284 (rev 00) is Cometlake-U Premium
312 12:51:09.327041 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
313 12:51:09.330450 VBOOT: Loading verstage.
314 12:51:09.333928 FMAP: Found "FLASH" version 1.1 at 0xc04000.
315 12:51:09.340615 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
316 12:51:09.344799 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
317 12:51:09.347184 CBFS @ c08000 size 3f8000
318 12:51:09.353858 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
319 12:51:09.358085 CBFS: Locating 'fallback/verstage'
320 12:51:09.360785 CBFS: Found @ offset 10fb80 size 1072c
321 12:51:09.364227
322 12:51:09.364789
323 12:51:09.374896 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
324 12:51:09.388740 Probing TPM: . done!
325 12:51:09.391758 TPM ready after 0 ms
326 12:51:09.395246 Connected to device vid:did:rid of 1ae0:0028:00
327 12:51:09.405139 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
328 12:51:09.409066 Initialized TPM device CR50 revision 0
329 12:51:09.457422 tlcl_send_startup: Startup return code is 0
330 12:51:09.458026 TPM: setup succeeded
331 12:51:09.469700 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
332 12:51:09.473677 Chrome EC: UHEPI supported
333 12:51:09.476916 Phase 1
334 12:51:09.479978 FMAP: area GBB found @ c05000 (12288 bytes)
335 12:51:09.487137 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
336 12:51:09.493835 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
337 12:51:09.497389 Recovery requested (1009000e)
338 12:51:09.502924 Saving nvdata
339 12:51:09.508480 tlcl_extend: response is 0
340 12:51:09.518273 tlcl_extend: response is 0
341 12:51:09.524815 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
342 12:51:09.527901 CBFS @ c08000 size 3f8000
343 12:51:09.534324 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
344 12:51:09.537781 CBFS: Locating 'fallback/romstage'
345 12:51:09.541474 CBFS: Found @ offset 80 size 145fc
346 12:51:09.544736 Accumulated console time in verstage 98 ms
347 12:51:09.545324
348 12:51:09.545700
349 12:51:09.557822 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
350 12:51:09.564048 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
351 12:51:09.567374 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
352 12:51:09.571092 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
353 12:51:09.577049 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
354 12:51:09.580721 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
355 12:51:09.583759 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
356 12:51:09.587387 TCO_STS: 0000 0000
357 12:51:09.590625 GEN_PMCON: e0015238 00000200
358 12:51:09.593931 GBLRST_CAUSE: 00000000 00000000
359 12:51:09.594494 prev_sleep_state 5
360 12:51:09.596960 Boot Count incremented to 70266
361 12:51:09.604292 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
362 12:51:09.607384 CBFS @ c08000 size 3f8000
363 12:51:09.613989 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
364 12:51:09.614605 CBFS: Locating 'fspm.bin'
365 12:51:09.620596 CBFS: Found @ offset 5ffc0 size 71000
366 12:51:09.623837 Chrome EC: UHEPI supported
367 12:51:09.630627 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
368 12:51:09.634065 Probing TPM: done!
369 12:51:09.640757 Connected to device vid:did:rid of 1ae0:0028:00
370 12:51:09.651470 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
371 12:51:09.657141 Initialized TPM device CR50 revision 0
372 12:51:09.665515 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
373 12:51:09.675431 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
374 12:51:09.676030 MRC cache found, size 1948
375 12:51:09.679198 bootmode is set to: 2
376 12:51:09.681882 PRMRR disabled by config.
377 12:51:09.685708 SPD INDEX = 1
378 12:51:09.688435 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 12:51:09.692229 CBFS @ c08000 size 3f8000
380 12:51:09.698862 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 12:51:09.699444 CBFS: Locating 'spd.bin'
382 12:51:09.701934 CBFS: Found @ offset 5fb80 size 400
383 12:51:09.706148 SPD: module type is LPDDR3
384 12:51:09.708567 SPD: module part is
385 12:51:09.715248 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
386 12:51:09.718483 SPD: device width 4 bits, bus width 8 bits
387 12:51:09.721769 SPD: module size is 4096 MB (per channel)
388 12:51:09.724947 memory slot: 0 configuration done.
389 12:51:09.728450 memory slot: 2 configuration done.
390 12:51:09.779851 CBMEM:
391 12:51:09.783215 IMD: root @ 99fff000 254 entries.
392 12:51:09.786392 IMD: root @ 99ffec00 62 entries.
393 12:51:09.790025 External stage cache:
394 12:51:09.793287 IMD: root @ 9abff000 254 entries.
395 12:51:09.796902 IMD: root @ 9abfec00 62 entries.
396 12:51:09.799727 Chrome EC: clear events_b mask to 0x0000000020004000
397 12:51:09.816057 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
398 12:51:09.829261 tlcl_write: response is 0
399 12:51:09.838628 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
400 12:51:09.844840 MRC: TPM MRC hash updated successfully.
401 12:51:09.845418 2 DIMMs found
402 12:51:09.848355 SMM Memory Map
403 12:51:09.851509 SMRAM : 0x9a000000 0x1000000
404 12:51:09.854573 Subregion 0: 0x9a000000 0xa00000
405 12:51:09.858044 Subregion 1: 0x9aa00000 0x200000
406 12:51:09.861358 Subregion 2: 0x9ac00000 0x400000
407 12:51:09.864339 top_of_ram = 0x9a000000
408 12:51:09.868132 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
409 12:51:09.874381 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
410 12:51:09.877850 MTRR Range: Start=ff000000 End=0 (Size 1000000)
411 12:51:09.884065 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
412 12:51:09.887851 CBFS @ c08000 size 3f8000
413 12:51:09.890991 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
414 12:51:09.894434 CBFS: Locating 'fallback/postcar'
415 12:51:09.902065 CBFS: Found @ offset 107000 size 4b44
416 12:51:09.904465 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
417 12:51:09.917051 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
418 12:51:09.920631 Processing 180 relocs. Offset value of 0x97c0c000
419 12:51:09.928976 Accumulated console time in romstage 286 ms
420 12:51:09.929536
421 12:51:09.929908
422 12:51:09.939238 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
423 12:51:09.945447 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
424 12:51:09.948544 CBFS @ c08000 size 3f8000
425 12:51:09.951902 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
426 12:51:09.959001 CBFS: Locating 'fallback/ramstage'
427 12:51:09.962095 CBFS: Found @ offset 43380 size 1b9e8
428 12:51:09.968684 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
429 12:51:10.000345 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
430 12:51:10.003533 Processing 3976 relocs. Offset value of 0x98db0000
431 12:51:10.010136 Accumulated console time in postcar 52 ms
432 12:51:10.010737
433 12:51:10.011114
434 12:51:10.020289 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
435 12:51:10.027207 FMAP: area RO_VPD found @ c00000 (16384 bytes)
436 12:51:10.030511 WARNING: RO_VPD is uninitialized or empty.
437 12:51:10.033497 FMAP: area RW_VPD found @ af8000 (8192 bytes)
438 12:51:10.040189 FMAP: area RW_VPD found @ af8000 (8192 bytes)
439 12:51:10.040772 Normal boot.
440 12:51:10.046504 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
441 12:51:10.050066 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 12:51:10.053367 CBFS @ c08000 size 3f8000
443 12:51:10.060047 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 12:51:10.063255 CBFS: Locating 'cpu_microcode_blob.bin'
445 12:51:10.066912 CBFS: Found @ offset 14700 size 2ec00
446 12:51:10.069961 microcode: sig=0x806ec pf=0x4 revision=0xc9
447 12:51:10.073178 Skip microcode update
448 12:51:10.080116 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
449 12:51:10.080680 CBFS @ c08000 size 3f8000
450 12:51:10.087039 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
451 12:51:10.090226 CBFS: Locating 'fsps.bin'
452 12:51:10.093284 CBFS: Found @ offset d1fc0 size 35000
453 12:51:10.118506 Detected 4 core, 8 thread CPU.
454 12:51:10.121579 Setting up SMI for CPU
455 12:51:10.125270 IED base = 0x9ac00000
456 12:51:10.125850 IED size = 0x00400000
457 12:51:10.128760 Will perform SMM setup.
458 12:51:10.134998 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
459 12:51:10.141819 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
460 12:51:10.145247 Processing 16 relocs. Offset value of 0x00030000
461 12:51:10.148734 Attempting to start 7 APs
462 12:51:10.151596 Waiting for 10ms after sending INIT.
463 12:51:10.168373 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
464 12:51:10.168946 done.
465 12:51:10.171669 AP: slot 1 apic_id 3.
466 12:51:10.174995 AP: slot 3 apic_id 2.
467 12:51:10.178061 Waiting for 2nd SIPI to complete...done.
468 12:51:10.181774 AP: slot 4 apic_id 5.
469 12:51:10.182332 AP: slot 5 apic_id 4.
470 12:51:10.184947 AP: slot 6 apic_id 6.
471 12:51:10.189379 AP: slot 7 apic_id 7.
472 12:51:10.194948 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
473 12:51:10.198307 Processing 13 relocs. Offset value of 0x00038000
474 12:51:10.204633 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
475 12:51:10.211182 Installing SMM handler to 0x9a000000
476 12:51:10.218576 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
477 12:51:10.222236 Processing 658 relocs. Offset value of 0x9a010000
478 12:51:10.231471 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
479 12:51:10.234758 Processing 13 relocs. Offset value of 0x9a008000
480 12:51:10.241452 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
481 12:51:10.248241 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
482 12:51:10.250999 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
483 12:51:10.257863 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
484 12:51:10.264612 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
485 12:51:10.271087 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
486 12:51:10.275258 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
487 12:51:10.281242 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
488 12:51:10.284137 Clearing SMI status registers
489 12:51:10.288399 SMI_STS: PM1
490 12:51:10.288955 PM1_STS: PWRBTN
491 12:51:10.291011 TCO_STS: SECOND_TO
492 12:51:10.294630 New SMBASE 0x9a000000
493 12:51:10.295195 In relocation handler: CPU 0
494 12:51:10.301029 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
495 12:51:10.304939 Writing SMRR. base = 0x9a000006, mask=0xff000800
496 12:51:10.308089 Relocation complete.
497 12:51:10.310882 New SMBASE 0x99fff800
498 12:51:10.311359 In relocation handler: CPU 2
499 12:51:10.317644 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
500 12:51:10.321213 Writing SMRR. base = 0x9a000006, mask=0xff000800
501 12:51:10.324382 Relocation complete.
502 12:51:10.324842 New SMBASE 0x99ffe800
503 12:51:10.327647 In relocation handler: CPU 6
504 12:51:10.334617 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
505 12:51:10.337771 Writing SMRR. base = 0x9a000006, mask=0xff000800
506 12:51:10.341082 Relocation complete.
507 12:51:10.341645 New SMBASE 0x99fff000
508 12:51:10.344570 In relocation handler: CPU 4
509 12:51:10.347817 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
510 12:51:10.354517 Writing SMRR. base = 0x9a000006, mask=0xff000800
511 12:51:10.357990 Relocation complete.
512 12:51:10.358589 New SMBASE 0x99fff400
513 12:51:10.361631 In relocation handler: CPU 3
514 12:51:10.364250 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
515 12:51:10.371267 Writing SMRR. base = 0x9a000006, mask=0xff000800
516 12:51:10.371836 Relocation complete.
517 12:51:10.374803 New SMBASE 0x99fffc00
518 12:51:10.377544 In relocation handler: CPU 1
519 12:51:10.381246 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
520 12:51:10.388360 Writing SMRR. base = 0x9a000006, mask=0xff000800
521 12:51:10.388943 Relocation complete.
522 12:51:10.391984 New SMBASE 0x99ffec00
523 12:51:10.394157 In relocation handler: CPU 5
524 12:51:10.397560 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
525 12:51:10.404346 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 12:51:10.404906 Relocation complete.
527 12:51:10.407333 New SMBASE 0x99ffe400
528 12:51:10.411347 In relocation handler: CPU 7
529 12:51:10.413901 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
530 12:51:10.420857 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 12:51:10.421417 Relocation complete.
532 12:51:10.424134 Initializing CPU #0
533 12:51:10.427273 CPU: vendor Intel device 806ec
534 12:51:10.430586 CPU: family 06, model 8e, stepping 0c
535 12:51:10.434459 Clearing out pending MCEs
536 12:51:10.437468 Setting up local APIC...
537 12:51:10.438034 apic_id: 0x00 done.
538 12:51:10.441139 Turbo is available but hidden
539 12:51:10.444594 Turbo is available and visible
540 12:51:10.447625 VMX status: enabled
541 12:51:10.450884 IA32_FEATURE_CONTROL status: locked
542 12:51:10.451447 Skip microcode update
543 12:51:10.454224 CPU #0 initialized
544 12:51:10.458123 Initializing CPU #2
545 12:51:10.458723 Initializing CPU #4
546 12:51:10.460809 Initializing CPU #5
547 12:51:10.464635 CPU: vendor Intel device 806ec
548 12:51:10.467574 CPU: family 06, model 8e, stepping 0c
549 12:51:10.471482 CPU: vendor Intel device 806ec
550 12:51:10.473958 CPU: family 06, model 8e, stepping 0c
551 12:51:10.477191 Clearing out pending MCEs
552 12:51:10.480692 Clearing out pending MCEs
553 12:51:10.481246 Setting up local APIC...
554 12:51:10.484112 CPU: vendor Intel device 806ec
555 12:51:10.487252 CPU: family 06, model 8e, stepping 0c
556 12:51:10.490893 Clearing out pending MCEs
557 12:51:10.494132 Initializing CPU #7
558 12:51:10.497425 Initializing CPU #6
559 12:51:10.497902 CPU: vendor Intel device 806ec
560 12:51:10.504284 CPU: family 06, model 8e, stepping 0c
561 12:51:10.504853 Setting up local APIC...
562 12:51:10.507274 Initializing CPU #3
563 12:51:10.511123 Initializing CPU #1
564 12:51:10.513744 CPU: vendor Intel device 806ec
565 12:51:10.517230 CPU: family 06, model 8e, stepping 0c
566 12:51:10.520611 CPU: vendor Intel device 806ec
567 12:51:10.524015 CPU: family 06, model 8e, stepping 0c
568 12:51:10.527113 Clearing out pending MCEs
569 12:51:10.527576 Clearing out pending MCEs
570 12:51:10.530736 Setting up local APIC...
571 12:51:10.534069 Setting up local APIC...
572 12:51:10.537287 apic_id: 0x01 done.
573 12:51:10.537844 apic_id: 0x02 done.
574 12:51:10.540562 Setting up local APIC...
575 12:51:10.544080 Clearing out pending MCEs
576 12:51:10.547237 CPU: vendor Intel device 806ec
577 12:51:10.550696 CPU: family 06, model 8e, stepping 0c
578 12:51:10.554214 Clearing out pending MCEs
579 12:51:10.554833 Setting up local APIC...
580 12:51:10.557065 apic_id: 0x05 done.
581 12:51:10.560456 apic_id: 0x04 done.
582 12:51:10.561017 VMX status: enabled
583 12:51:10.563826 VMX status: enabled
584 12:51:10.567497 IA32_FEATURE_CONTROL status: locked
585 12:51:10.570381 IA32_FEATURE_CONTROL status: locked
586 12:51:10.573771 Skip microcode update
587 12:51:10.574332 Skip microcode update
588 12:51:10.576961 CPU #4 initialized
589 12:51:10.580131 CPU #5 initialized
590 12:51:10.580599 VMX status: enabled
591 12:51:10.583522 Setting up local APIC...
592 12:51:10.586723 VMX status: enabled
593 12:51:10.587201 apic_id: 0x03 done.
594 12:51:10.589784 IA32_FEATURE_CONTROL status: locked
595 12:51:10.593583 VMX status: enabled
596 12:51:10.596707 Skip microcode update
597 12:51:10.599769 IA32_FEATURE_CONTROL status: locked
598 12:51:10.600304 CPU #3 initialized
599 12:51:10.603503 Skip microcode update
600 12:51:10.606698 apic_id: 0x07 done.
601 12:51:10.607184 apic_id: 0x06 done.
602 12:51:10.610368 VMX status: enabled
603 12:51:10.610907 VMX status: enabled
604 12:51:10.616466 IA32_FEATURE_CONTROL status: locked
605 12:51:10.619632 IA32_FEATURE_CONTROL status: locked
606 12:51:10.620125 Skip microcode update
607 12:51:10.623133 Skip microcode update
608 12:51:10.626740 CPU #7 initialized
609 12:51:10.627213 CPU #6 initialized
610 12:51:10.629885 CPU #1 initialized
611 12:51:10.633336 IA32_FEATURE_CONTROL status: locked
612 12:51:10.636783 Skip microcode update
613 12:51:10.637551 CPU #2 initialized
614 12:51:10.640086 bsp_do_flight_plan done after 461 msecs.
615 12:51:10.643256 CPU: frequency set to 4200 MHz
616 12:51:10.646314 Enabling SMIs.
617 12:51:10.646836 Locking SMM.
618 12:51:10.662312 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
619 12:51:10.665506 CBFS @ c08000 size 3f8000
620 12:51:10.673725 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
621 12:51:10.674306 CBFS: Locating 'vbt.bin'
622 12:51:10.675250 CBFS: Found @ offset 5f5c0 size 499
623 12:51:10.682786 Found a VBT of 4608 bytes after decompression
624 12:51:10.863881 Display FSP Version Info HOB
625 12:51:10.867266 Reference Code - CPU = 9.0.1e.30
626 12:51:10.870608 uCode Version = 0.0.0.ca
627 12:51:10.873683 TXT ACM version = ff.ff.ff.ffff
628 12:51:10.877130 Display FSP Version Info HOB
629 12:51:10.880250 Reference Code - ME = 9.0.1e.30
630 12:51:10.883836 MEBx version = 0.0.0.0
631 12:51:10.886861 ME Firmware Version = Consumer SKU
632 12:51:10.891017 Display FSP Version Info HOB
633 12:51:10.893632 Reference Code - CML PCH = 9.0.1e.30
634 12:51:10.896595 PCH-CRID Status = Disabled
635 12:51:10.899884 PCH-CRID Original Value = ff.ff.ff.ffff
636 12:51:10.903526 PCH-CRID New Value = ff.ff.ff.ffff
637 12:51:10.906858 OPROM - RST - RAID = ff.ff.ff.ffff
638 12:51:10.910389 ChipsetInit Base Version = ff.ff.ff.ffff
639 12:51:10.913381 ChipsetInit Oem Version = ff.ff.ff.ffff
640 12:51:10.917071 Display FSP Version Info HOB
641 12:51:10.923768 Reference Code - SA - System Agent = 9.0.1e.30
642 12:51:10.927227 Reference Code - MRC = 0.7.1.6c
643 12:51:10.927789 SA - PCIe Version = 9.0.1e.30
644 12:51:10.929919 SA-CRID Status = Disabled
645 12:51:10.933713 SA-CRID Original Value = 0.0.0.c
646 12:51:10.936487 SA-CRID New Value = 0.0.0.c
647 12:51:10.939955 OPROM - VBIOS = ff.ff.ff.ffff
648 12:51:10.943607 RTC Init
649 12:51:10.946349 Set power on after power failure.
650 12:51:10.946976 Disabling Deep S3
651 12:51:10.949895 Disabling Deep S3
652 12:51:10.950583 Disabling Deep S4
653 12:51:10.953482 Disabling Deep S4
654 12:51:10.954039 Disabling Deep S5
655 12:51:10.956903 Disabling Deep S5
656 12:51:10.963771 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 192 exit 1
657 12:51:10.964360 Enumerating buses...
658 12:51:10.969721 Show all devs... Before device enumeration.
659 12:51:10.970290 Root Device: enabled 1
660 12:51:10.972872 CPU_CLUSTER: 0: enabled 1
661 12:51:10.976861 DOMAIN: 0000: enabled 1
662 12:51:10.979505 APIC: 00: enabled 1
663 12:51:10.980074 PCI: 00:00.0: enabled 1
664 12:51:10.983475 PCI: 00:02.0: enabled 1
665 12:51:10.985971 PCI: 00:04.0: enabled 0
666 12:51:10.989561 PCI: 00:05.0: enabled 0
667 12:51:10.990133 PCI: 00:12.0: enabled 1
668 12:51:10.993305 PCI: 00:12.5: enabled 0
669 12:51:10.996056 PCI: 00:12.6: enabled 0
670 12:51:10.999482 PCI: 00:14.0: enabled 1
671 12:51:10.999955 PCI: 00:14.1: enabled 0
672 12:51:11.002728 PCI: 00:14.3: enabled 1
673 12:51:11.005879 PCI: 00:14.5: enabled 0
674 12:51:11.006347 PCI: 00:15.0: enabled 1
675 12:51:11.009874 PCI: 00:15.1: enabled 1
676 12:51:11.012987 PCI: 00:15.2: enabled 0
677 12:51:11.016041 PCI: 00:15.3: enabled 0
678 12:51:11.016524 PCI: 00:16.0: enabled 1
679 12:51:11.019839 PCI: 00:16.1: enabled 0
680 12:51:11.023191 PCI: 00:16.2: enabled 0
681 12:51:11.026591 PCI: 00:16.3: enabled 0
682 12:51:11.027159 PCI: 00:16.4: enabled 0
683 12:51:11.029631 PCI: 00:16.5: enabled 0
684 12:51:11.033323 PCI: 00:17.0: enabled 1
685 12:51:11.033898 PCI: 00:19.0: enabled 1
686 12:51:11.036936 PCI: 00:19.1: enabled 0
687 12:51:11.039259 PCI: 00:19.2: enabled 0
688 12:51:11.043001 PCI: 00:1a.0: enabled 0
689 12:51:11.043574 PCI: 00:1c.0: enabled 0
690 12:51:11.046633 PCI: 00:1c.1: enabled 0
691 12:51:11.049856 PCI: 00:1c.2: enabled 0
692 12:51:11.052751 PCI: 00:1c.3: enabled 0
693 12:51:11.053321 PCI: 00:1c.4: enabled 0
694 12:51:11.056024 PCI: 00:1c.5: enabled 0
695 12:51:11.059970 PCI: 00:1c.6: enabled 0
696 12:51:11.062496 PCI: 00:1c.7: enabled 0
697 12:51:11.063096 PCI: 00:1d.0: enabled 1
698 12:51:11.065843 PCI: 00:1d.1: enabled 0
699 12:51:11.069275 PCI: 00:1d.2: enabled 0
700 12:51:11.069844 PCI: 00:1d.3: enabled 0
701 12:51:11.072341 PCI: 00:1d.4: enabled 0
702 12:51:11.076348 PCI: 00:1d.5: enabled 1
703 12:51:11.079116 PCI: 00:1e.0: enabled 1
704 12:51:11.079685 PCI: 00:1e.1: enabled 0
705 12:51:11.082502 PCI: 00:1e.2: enabled 1
706 12:51:11.086137 PCI: 00:1e.3: enabled 1
707 12:51:11.089760 PCI: 00:1f.0: enabled 1
708 12:51:11.090229 PCI: 00:1f.1: enabled 1
709 12:51:11.092415 PCI: 00:1f.2: enabled 1
710 12:51:11.096462 PCI: 00:1f.3: enabled 1
711 12:51:11.099798 PCI: 00:1f.4: enabled 1
712 12:51:11.100372 PCI: 00:1f.5: enabled 1
713 12:51:11.102443 PCI: 00:1f.6: enabled 0
714 12:51:11.106037 USB0 port 0: enabled 1
715 12:51:11.106662 I2C: 00:15: enabled 1
716 12:51:11.109322 I2C: 00:5d: enabled 1
717 12:51:11.112791 GENERIC: 0.0: enabled 1
718 12:51:11.113358 I2C: 00:1a: enabled 1
719 12:51:11.115435 I2C: 00:38: enabled 1
720 12:51:11.119037 I2C: 00:39: enabled 1
721 12:51:11.119509 I2C: 00:3a: enabled 1
722 12:51:11.122570 I2C: 00:3b: enabled 1
723 12:51:11.126579 PCI: 00:00.0: enabled 1
724 12:51:11.127150 SPI: 00: enabled 1
725 12:51:11.129309 SPI: 01: enabled 1
726 12:51:11.132617 PNP: 0c09.0: enabled 1
727 12:51:11.133188 USB2 port 0: enabled 1
728 12:51:11.135349 USB2 port 1: enabled 1
729 12:51:11.139190 USB2 port 2: enabled 0
730 12:51:11.142447 USB2 port 3: enabled 0
731 12:51:11.143063 USB2 port 5: enabled 0
732 12:51:11.145626 USB2 port 6: enabled 1
733 12:51:11.148894 USB2 port 9: enabled 1
734 12:51:11.149462 USB3 port 0: enabled 1
735 12:51:11.151890 USB3 port 1: enabled 1
736 12:51:11.156283 USB3 port 2: enabled 1
737 12:51:11.158657 USB3 port 3: enabled 1
738 12:51:11.159235 USB3 port 4: enabled 0
739 12:51:11.162594 APIC: 03: enabled 1
740 12:51:11.163170 APIC: 01: enabled 1
741 12:51:11.165458 APIC: 02: enabled 1
742 12:51:11.168665 APIC: 05: enabled 1
743 12:51:11.169235 APIC: 04: enabled 1
744 12:51:11.172310 APIC: 06: enabled 1
745 12:51:11.176041 APIC: 07: enabled 1
746 12:51:11.176617 Compare with tree...
747 12:51:11.178996 Root Device: enabled 1
748 12:51:11.182138 CPU_CLUSTER: 0: enabled 1
749 12:51:11.182740 APIC: 00: enabled 1
750 12:51:11.185331 APIC: 03: enabled 1
751 12:51:11.188646 APIC: 01: enabled 1
752 12:51:11.189220 APIC: 02: enabled 1
753 12:51:11.191905 APIC: 05: enabled 1
754 12:51:11.195460 APIC: 04: enabled 1
755 12:51:11.196038 APIC: 06: enabled 1
756 12:51:11.198919 APIC: 07: enabled 1
757 12:51:11.202048 DOMAIN: 0000: enabled 1
758 12:51:11.205679 PCI: 00:00.0: enabled 1
759 12:51:11.206241 PCI: 00:02.0: enabled 1
760 12:51:11.209711 PCI: 00:04.0: enabled 0
761 12:51:11.211845 PCI: 00:05.0: enabled 0
762 12:51:11.215361 PCI: 00:12.0: enabled 1
763 12:51:11.218435 PCI: 00:12.5: enabled 0
764 12:51:11.218986 PCI: 00:12.6: enabled 0
765 12:51:11.222124 PCI: 00:14.0: enabled 1
766 12:51:11.225156 USB0 port 0: enabled 1
767 12:51:11.228538 USB2 port 0: enabled 1
768 12:51:11.232389 USB2 port 1: enabled 1
769 12:51:11.232951 USB2 port 2: enabled 0
770 12:51:11.234848 USB2 port 3: enabled 0
771 12:51:11.239085 USB2 port 5: enabled 0
772 12:51:11.241882 USB2 port 6: enabled 1
773 12:51:11.244977 USB2 port 9: enabled 1
774 12:51:11.248352 USB3 port 0: enabled 1
775 12:51:11.248918 USB3 port 1: enabled 1
776 12:51:11.251451 USB3 port 2: enabled 1
777 12:51:11.255217 USB3 port 3: enabled 1
778 12:51:11.258315 USB3 port 4: enabled 0
779 12:51:11.261945 PCI: 00:14.1: enabled 0
780 12:51:11.262508 PCI: 00:14.3: enabled 1
781 12:51:11.265007 PCI: 00:14.5: enabled 0
782 12:51:11.268233 PCI: 00:15.0: enabled 1
783 12:51:11.271406 I2C: 00:15: enabled 1
784 12:51:11.275018 PCI: 00:15.1: enabled 1
785 12:51:11.275579 I2C: 00:5d: enabled 1
786 12:51:11.278191 GENERIC: 0.0: enabled 1
787 12:51:11.282492 PCI: 00:15.2: enabled 0
788 12:51:11.284609 PCI: 00:15.3: enabled 0
789 12:51:11.288541 PCI: 00:16.0: enabled 1
790 12:51:11.289106 PCI: 00:16.1: enabled 0
791 12:51:11.291603 PCI: 00:16.2: enabled 0
792 12:51:11.294979 PCI: 00:16.3: enabled 0
793 12:51:11.298562 PCI: 00:16.4: enabled 0
794 12:51:11.299131 PCI: 00:16.5: enabled 0
795 12:51:11.301601 PCI: 00:17.0: enabled 1
796 12:51:11.305727 PCI: 00:19.0: enabled 1
797 12:51:11.308171 I2C: 00:1a: enabled 1
798 12:51:11.311718 I2C: 00:38: enabled 1
799 12:51:11.312280 I2C: 00:39: enabled 1
800 12:51:11.314806 I2C: 00:3a: enabled 1
801 12:51:11.318623 I2C: 00:3b: enabled 1
802 12:51:11.321521 PCI: 00:19.1: enabled 0
803 12:51:11.322100 PCI: 00:19.2: enabled 0
804 12:51:11.324615 PCI: 00:1a.0: enabled 0
805 12:51:11.327998 PCI: 00:1c.0: enabled 0
806 12:51:11.331715 PCI: 00:1c.1: enabled 0
807 12:51:11.335061 PCI: 00:1c.2: enabled 0
808 12:51:11.335534 PCI: 00:1c.3: enabled 0
809 12:51:11.337805 PCI: 00:1c.4: enabled 0
810 12:51:11.341701 PCI: 00:1c.5: enabled 0
811 12:51:11.344971 PCI: 00:1c.6: enabled 0
812 12:51:11.347942 PCI: 00:1c.7: enabled 0
813 12:51:11.348414 PCI: 00:1d.0: enabled 1
814 12:51:11.352024 PCI: 00:1d.1: enabled 0
815 12:51:11.354758 PCI: 00:1d.2: enabled 0
816 12:51:11.358300 PCI: 00:1d.3: enabled 0
817 12:51:11.361557 PCI: 00:1d.4: enabled 0
818 12:51:11.362117 PCI: 00:1d.5: enabled 1
819 12:51:11.364895 PCI: 00:00.0: enabled 1
820 12:51:11.368362 PCI: 00:1e.0: enabled 1
821 12:51:11.371372 PCI: 00:1e.1: enabled 0
822 12:51:11.374660 PCI: 00:1e.2: enabled 1
823 12:51:11.375202 SPI: 00: enabled 1
824 12:51:11.378059 PCI: 00:1e.3: enabled 1
825 12:51:11.381255 SPI: 01: enabled 1
826 12:51:11.381814 PCI: 00:1f.0: enabled 1
827 12:51:11.384338 PNP: 0c09.0: enabled 1
828 12:51:11.387556 PCI: 00:1f.1: enabled 1
829 12:51:11.390837 PCI: 00:1f.2: enabled 1
830 12:51:11.394030 PCI: 00:1f.3: enabled 1
831 12:51:11.394501 PCI: 00:1f.4: enabled 1
832 12:51:11.397843 PCI: 00:1f.5: enabled 1
833 12:51:11.400992 PCI: 00:1f.6: enabled 0
834 12:51:11.404663 Root Device scanning...
835 12:51:11.408050 scan_static_bus for Root Device
836 12:51:11.411139 CPU_CLUSTER: 0 enabled
837 12:51:11.411699 DOMAIN: 0000 enabled
838 12:51:11.414574 DOMAIN: 0000 scanning...
839 12:51:11.417892 PCI: pci_scan_bus for bus 00
840 12:51:11.420948 PCI: 00:00.0 [8086/0000] ops
841 12:51:11.424336 PCI: 00:00.0 [8086/9b61] enabled
842 12:51:11.427711 PCI: 00:02.0 [8086/0000] bus ops
843 12:51:11.430925 PCI: 00:02.0 [8086/9b41] enabled
844 12:51:11.434704 PCI: 00:04.0 [8086/1903] disabled
845 12:51:11.437737 PCI: 00:08.0 [8086/1911] enabled
846 12:51:11.441061 PCI: 00:12.0 [8086/02f9] enabled
847 12:51:11.444506 PCI: 00:14.0 [8086/0000] bus ops
848 12:51:11.447894 PCI: 00:14.0 [8086/02ed] enabled
849 12:51:11.450840 PCI: 00:14.2 [8086/02ef] enabled
850 12:51:11.454437 PCI: 00:14.3 [8086/02f0] enabled
851 12:51:11.458143 PCI: 00:15.0 [8086/0000] bus ops
852 12:51:11.461160 PCI: 00:15.0 [8086/02e8] enabled
853 12:51:11.464536 PCI: 00:15.1 [8086/0000] bus ops
854 12:51:11.467929 PCI: 00:15.1 [8086/02e9] enabled
855 12:51:11.471540 PCI: 00:16.0 [8086/0000] ops
856 12:51:11.474696 PCI: 00:16.0 [8086/02e0] enabled
857 12:51:11.477665 PCI: 00:17.0 [8086/0000] ops
858 12:51:11.481626 PCI: 00:17.0 [8086/02d3] enabled
859 12:51:11.485277 PCI: 00:19.0 [8086/0000] bus ops
860 12:51:11.487765 PCI: 00:19.0 [8086/02c5] enabled
861 12:51:11.490895 PCI: 00:1d.0 [8086/0000] bus ops
862 12:51:11.494342 PCI: 00:1d.0 [8086/02b0] enabled
863 12:51:11.497798 PCI: Static device PCI: 00:1d.5 not found, disabling it.
864 12:51:11.500983 PCI: 00:1e.0 [8086/0000] ops
865 12:51:11.504137 PCI: 00:1e.0 [8086/02a8] enabled
866 12:51:11.507468 PCI: 00:1e.2 [8086/0000] bus ops
867 12:51:11.510962 PCI: 00:1e.2 [8086/02aa] enabled
868 12:51:11.514215 PCI: 00:1e.3 [8086/0000] bus ops
869 12:51:11.517430 PCI: 00:1e.3 [8086/02ab] enabled
870 12:51:11.520721 PCI: 00:1f.0 [8086/0000] bus ops
871 12:51:11.524318 PCI: 00:1f.0 [8086/0284] enabled
872 12:51:11.530957 PCI: Static device PCI: 00:1f.1 not found, disabling it.
873 12:51:11.537428 PCI: Static device PCI: 00:1f.2 not found, disabling it.
874 12:51:11.540828 PCI: 00:1f.3 [8086/0000] bus ops
875 12:51:11.544020 PCI: 00:1f.3 [8086/02c8] enabled
876 12:51:11.547171 PCI: 00:1f.4 [8086/0000] bus ops
877 12:51:11.550909 PCI: 00:1f.4 [8086/02a3] enabled
878 12:51:11.553968 PCI: 00:1f.5 [8086/0000] bus ops
879 12:51:11.557147 PCI: 00:1f.5 [8086/02a4] enabled
880 12:51:11.560564 PCI: Leftover static devices:
881 12:51:11.561126 PCI: 00:05.0
882 12:51:11.561501 PCI: 00:12.5
883 12:51:11.564261 PCI: 00:12.6
884 12:51:11.564847 PCI: 00:14.1
885 12:51:11.567182 PCI: 00:14.5
886 12:51:11.567743 PCI: 00:15.2
887 12:51:11.568114 PCI: 00:15.3
888 12:51:11.570640 PCI: 00:16.1
889 12:51:11.571201 PCI: 00:16.2
890 12:51:11.573977 PCI: 00:16.3
891 12:51:11.574575 PCI: 00:16.4
892 12:51:11.574958 PCI: 00:16.5
893 12:51:11.577237 PCI: 00:19.1
894 12:51:11.577747 PCI: 00:19.2
895 12:51:11.580781 PCI: 00:1a.0
896 12:51:11.581338 PCI: 00:1c.0
897 12:51:11.581743 PCI: 00:1c.1
898 12:51:11.584261 PCI: 00:1c.2
899 12:51:11.584724 PCI: 00:1c.3
900 12:51:11.587212 PCI: 00:1c.4
901 12:51:11.587679 PCI: 00:1c.5
902 12:51:11.590187 PCI: 00:1c.6
903 12:51:11.590691 PCI: 00:1c.7
904 12:51:11.591064 PCI: 00:1d.1
905 12:51:11.594080 PCI: 00:1d.2
906 12:51:11.594679 PCI: 00:1d.3
907 12:51:11.598086 PCI: 00:1d.4
908 12:51:11.598693 PCI: 00:1d.5
909 12:51:11.599071 PCI: 00:1e.1
910 12:51:11.600530 PCI: 00:1f.1
911 12:51:11.600995 PCI: 00:1f.2
912 12:51:11.603523 PCI: 00:1f.6
913 12:51:11.607029 PCI: Check your devicetree.cb.
914 12:51:11.607590 PCI: 00:02.0 scanning...
915 12:51:11.610421 scan_generic_bus for PCI: 00:02.0
916 12:51:11.617212 scan_generic_bus for PCI: 00:02.0 done
917 12:51:11.620549 scan_bus: scanning of bus PCI: 00:02.0 took 10187 usecs
918 12:51:11.623526 PCI: 00:14.0 scanning...
919 12:51:11.627116 scan_static_bus for PCI: 00:14.0
920 12:51:11.630477 USB0 port 0 enabled
921 12:51:11.633960 USB0 port 0 scanning...
922 12:51:11.637059 scan_static_bus for USB0 port 0
923 12:51:11.637756 USB2 port 0 enabled
924 12:51:11.640096 USB2 port 1 enabled
925 12:51:11.640655 USB2 port 2 disabled
926 12:51:11.643287 USB2 port 3 disabled
927 12:51:11.646933 USB2 port 5 disabled
928 12:51:11.647418 USB2 port 6 enabled
929 12:51:11.649943 USB2 port 9 enabled
930 12:51:11.653280 USB3 port 0 enabled
931 12:51:11.653798 USB3 port 1 enabled
932 12:51:11.657131 USB3 port 2 enabled
933 12:51:11.657620 USB3 port 3 enabled
934 12:51:11.660079 USB3 port 4 disabled
935 12:51:11.664051 USB2 port 0 scanning...
936 12:51:11.666581 scan_static_bus for USB2 port 0
937 12:51:11.670501 scan_static_bus for USB2 port 0 done
938 12:51:11.676714 scan_bus: scanning of bus USB2 port 0 took 9701 usecs
939 12:51:11.677280 USB2 port 1 scanning...
940 12:51:11.680094 scan_static_bus for USB2 port 1
941 12:51:11.686478 scan_static_bus for USB2 port 1 done
942 12:51:11.690256 scan_bus: scanning of bus USB2 port 1 took 9702 usecs
943 12:51:11.693531 USB2 port 6 scanning...
944 12:51:11.696639 scan_static_bus for USB2 port 6
945 12:51:11.699845 scan_static_bus for USB2 port 6 done
946 12:51:11.706330 scan_bus: scanning of bus USB2 port 6 took 9706 usecs
947 12:51:11.706918 USB2 port 9 scanning...
948 12:51:11.709841 scan_static_bus for USB2 port 9
949 12:51:11.716732 scan_static_bus for USB2 port 9 done
950 12:51:11.719625 scan_bus: scanning of bus USB2 port 9 took 9700 usecs
951 12:51:11.723246 USB3 port 0 scanning...
952 12:51:11.726980 scan_static_bus for USB3 port 0
953 12:51:11.729930 scan_static_bus for USB3 port 0 done
954 12:51:11.736606 scan_bus: scanning of bus USB3 port 0 took 9700 usecs
955 12:51:11.737166 USB3 port 1 scanning...
956 12:51:11.740162 scan_static_bus for USB3 port 1
957 12:51:11.747109 scan_static_bus for USB3 port 1 done
958 12:51:11.750123 scan_bus: scanning of bus USB3 port 1 took 9701 usecs
959 12:51:11.753394 USB3 port 2 scanning...
960 12:51:11.757441 scan_static_bus for USB3 port 2
961 12:51:11.759714 scan_static_bus for USB3 port 2 done
962 12:51:11.766636 scan_bus: scanning of bus USB3 port 2 took 9709 usecs
963 12:51:11.767207 USB3 port 3 scanning...
964 12:51:11.770265 scan_static_bus for USB3 port 3
965 12:51:11.776640 scan_static_bus for USB3 port 3 done
966 12:51:11.779735 scan_bus: scanning of bus USB3 port 3 took 9703 usecs
967 12:51:11.783186 scan_static_bus for USB0 port 0 done
968 12:51:11.789998 scan_bus: scanning of bus USB0 port 0 took 155382 usecs
969 12:51:11.793563 scan_static_bus for PCI: 00:14.0 done
970 12:51:11.800094 scan_bus: scanning of bus PCI: 00:14.0 took 173009 usecs
971 12:51:11.803042 PCI: 00:15.0 scanning...
972 12:51:11.806684 scan_generic_bus for PCI: 00:15.0
973 12:51:11.809826 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
974 12:51:11.813506 scan_generic_bus for PCI: 00:15.0 done
975 12:51:11.819917 scan_bus: scanning of bus PCI: 00:15.0 took 14304 usecs
976 12:51:11.823054 PCI: 00:15.1 scanning...
977 12:51:11.826724 scan_generic_bus for PCI: 00:15.1
978 12:51:11.830021 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
979 12:51:11.833016 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
980 12:51:11.836655 scan_generic_bus for PCI: 00:15.1 done
981 12:51:11.843464 scan_bus: scanning of bus PCI: 00:15.1 took 18602 usecs
982 12:51:11.846376 PCI: 00:19.0 scanning...
983 12:51:11.849745 scan_generic_bus for PCI: 00:19.0
984 12:51:11.852881 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
985 12:51:11.856296 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
986 12:51:11.863315 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
987 12:51:11.866339 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
988 12:51:11.869583 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
989 12:51:11.873274 scan_generic_bus for PCI: 00:19.0 done
990 12:51:11.880948 scan_bus: scanning of bus PCI: 00:19.0 took 30747 usecs
991 12:51:11.882622 PCI: 00:1d.0 scanning...
992 12:51:11.886700 do_pci_scan_bridge for PCI: 00:1d.0
993 12:51:11.889412 PCI: pci_scan_bus for bus 01
994 12:51:11.892971 PCI: 01:00.0 [1c5c/1327] enabled
995 12:51:11.896971 Enabling Common Clock Configuration
996 12:51:11.899141 L1 Sub-State supported from root port 29
997 12:51:11.903165 L1 Sub-State Support = 0xf
998 12:51:11.906327 CommonModeRestoreTime = 0x28
999 12:51:11.909471 Power On Value = 0x16, Power On Scale = 0x0
1000 12:51:11.912870 ASPM: Enabled L1
1001 12:51:11.916188 scan_bus: scanning of bus PCI: 00:1d.0 took 32789 usecs
1002 12:51:11.919218 PCI: 00:1e.2 scanning...
1003 12:51:11.922647 scan_generic_bus for PCI: 00:1e.2
1004 12:51:11.925991 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1005 12:51:11.932652 scan_generic_bus for PCI: 00:1e.2 done
1006 12:51:11.936341 scan_bus: scanning of bus PCI: 00:1e.2 took 14009 usecs
1007 12:51:11.939278 PCI: 00:1e.3 scanning...
1008 12:51:11.942299 scan_generic_bus for PCI: 00:1e.3
1009 12:51:11.946645 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1010 12:51:11.949679 scan_generic_bus for PCI: 00:1e.3 done
1011 12:51:11.955947 scan_bus: scanning of bus PCI: 00:1e.3 took 14011 usecs
1012 12:51:11.959272 PCI: 00:1f.0 scanning...
1013 12:51:11.963075 scan_static_bus for PCI: 00:1f.0
1014 12:51:11.966068 PNP: 0c09.0 enabled
1015 12:51:11.969498 scan_static_bus for PCI: 00:1f.0 done
1016 12:51:11.972676 scan_bus: scanning of bus PCI: 00:1f.0 took 12035 usecs
1017 12:51:11.976031 PCI: 00:1f.3 scanning...
1018 12:51:11.982439 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1019 12:51:11.985902 PCI: 00:1f.4 scanning...
1020 12:51:11.988959 scan_generic_bus for PCI: 00:1f.4
1021 12:51:11.992096 scan_generic_bus for PCI: 00:1f.4 done
1022 12:51:11.999143 scan_bus: scanning of bus PCI: 00:1f.4 took 10199 usecs
1023 12:51:11.999720 PCI: 00:1f.5 scanning...
1024 12:51:12.005856 scan_generic_bus for PCI: 00:1f.5
1025 12:51:12.009179 scan_generic_bus for PCI: 00:1f.5 done
1026 12:51:12.012609 scan_bus: scanning of bus PCI: 00:1f.5 took 10190 usecs
1027 12:51:12.019065 scan_bus: scanning of bus DOMAIN: 0000 took 605132 usecs
1028 12:51:12.022300 scan_static_bus for Root Device done
1029 12:51:12.028686 scan_bus: scanning of bus Root Device took 625018 usecs
1030 12:51:12.029240 done
1031 12:51:12.032195 Chrome EC: UHEPI supported
1032 12:51:12.039115 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1033 12:51:12.045722 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1034 12:51:12.049167 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1035 12:51:12.057042 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1036 12:51:12.060287 SPI flash protection: WPSW=0 SRP0=0
1037 12:51:12.067398 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1038 12:51:12.070631 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1039 12:51:12.073590 found VGA at PCI: 00:02.0
1040 12:51:12.076764 Setting up VGA for PCI: 00:02.0
1041 12:51:12.083509 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1042 12:51:12.086701 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1043 12:51:12.089876 Allocating resources...
1044 12:51:12.093610 Reading resources...
1045 12:51:12.096580 Root Device read_resources bus 0 link: 0
1046 12:51:12.100116 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1047 12:51:12.107329 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1048 12:51:12.110074 DOMAIN: 0000 read_resources bus 0 link: 0
1049 12:51:12.117342 PCI: 00:14.0 read_resources bus 0 link: 0
1050 12:51:12.120596 USB0 port 0 read_resources bus 0 link: 0
1051 12:51:12.128922 USB0 port 0 read_resources bus 0 link: 0 done
1052 12:51:12.131450 PCI: 00:14.0 read_resources bus 0 link: 0 done
1053 12:51:12.139321 PCI: 00:15.0 read_resources bus 1 link: 0
1054 12:51:12.142622 PCI: 00:15.0 read_resources bus 1 link: 0 done
1055 12:51:12.149464 PCI: 00:15.1 read_resources bus 2 link: 0
1056 12:51:12.152921 PCI: 00:15.1 read_resources bus 2 link: 0 done
1057 12:51:12.159577 PCI: 00:19.0 read_resources bus 3 link: 0
1058 12:51:12.167000 PCI: 00:19.0 read_resources bus 3 link: 0 done
1059 12:51:12.170239 PCI: 00:1d.0 read_resources bus 1 link: 0
1060 12:51:12.176526 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1061 12:51:12.179823 PCI: 00:1e.2 read_resources bus 4 link: 0
1062 12:51:12.186500 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1063 12:51:12.190184 PCI: 00:1e.3 read_resources bus 5 link: 0
1064 12:51:12.196681 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1065 12:51:12.199961 PCI: 00:1f.0 read_resources bus 0 link: 0
1066 12:51:12.206792 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1067 12:51:12.210347 DOMAIN: 0000 read_resources bus 0 link: 0 done
1068 12:51:12.217584 Root Device read_resources bus 0 link: 0 done
1069 12:51:12.219987 Done reading resources.
1070 12:51:12.223415 Show resources in subtree (Root Device)...After reading.
1071 12:51:12.230213 Root Device child on link 0 CPU_CLUSTER: 0
1072 12:51:12.233279 CPU_CLUSTER: 0 child on link 0 APIC: 00
1073 12:51:12.233747 APIC: 00
1074 12:51:12.237242 APIC: 03
1075 12:51:12.237802 APIC: 01
1076 12:51:12.238170 APIC: 02
1077 12:51:12.239928 APIC: 05
1078 12:51:12.240384 APIC: 04
1079 12:51:12.243616 APIC: 06
1080 12:51:12.244075 APIC: 07
1081 12:51:12.246780 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1082 12:51:12.256657 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1083 12:51:12.309913 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1084 12:51:12.310480 PCI: 00:00.0
1085 12:51:12.310896 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1086 12:51:12.311590 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1087 12:51:12.312021 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1088 12:51:12.312696 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1089 12:51:12.359847 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1090 12:51:12.361350 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1091 12:51:12.361819 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1092 12:51:12.362193 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1093 12:51:12.362914 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1094 12:51:12.365879 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1095 12:51:12.369707 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1096 12:51:12.379378 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1097 12:51:12.388918 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1098 12:51:12.399516 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1099 12:51:12.409028 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1100 12:51:12.418917 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1101 12:51:12.419484 PCI: 00:02.0
1102 12:51:12.429238 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1103 12:51:12.442131 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1104 12:51:12.449029 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1105 12:51:12.452041 PCI: 00:04.0
1106 12:51:12.452588 PCI: 00:08.0
1107 12:51:12.461586 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1108 12:51:12.464927 PCI: 00:12.0
1109 12:51:12.475410 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1110 12:51:12.478602 PCI: 00:14.0 child on link 0 USB0 port 0
1111 12:51:12.488219 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1112 12:51:12.491553 USB0 port 0 child on link 0 USB2 port 0
1113 12:51:12.494912 USB2 port 0
1114 12:51:12.495463 USB2 port 1
1115 12:51:12.498738 USB2 port 2
1116 12:51:12.499291 USB2 port 3
1117 12:51:12.501916 USB2 port 5
1118 12:51:12.502465 USB2 port 6
1119 12:51:12.504893 USB2 port 9
1120 12:51:12.505438 USB3 port 0
1121 12:51:12.508507 USB3 port 1
1122 12:51:12.509057 USB3 port 2
1123 12:51:12.512603 USB3 port 3
1124 12:51:12.515236 USB3 port 4
1125 12:51:12.515949 PCI: 00:14.2
1126 12:51:12.524736 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1127 12:51:12.535170 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1128 12:51:12.535730 PCI: 00:14.3
1129 12:51:12.545007 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1130 12:51:12.551471 PCI: 00:15.0 child on link 0 I2C: 01:15
1131 12:51:12.561787 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 12:51:12.562347 I2C: 01:15
1133 12:51:12.568687 PCI: 00:15.1 child on link 0 I2C: 02:5d
1134 12:51:12.578164 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1135 12:51:12.578765 I2C: 02:5d
1136 12:51:12.581909 GENERIC: 0.0
1137 12:51:12.582456 PCI: 00:16.0
1138 12:51:12.590958 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1139 12:51:12.594932 PCI: 00:17.0
1140 12:51:12.601554 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1141 12:51:12.611151 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1142 12:51:12.618243 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1143 12:51:12.627780 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1144 12:51:12.634907 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1145 12:51:12.644292 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1146 12:51:12.651178 PCI: 00:19.0 child on link 0 I2C: 03:1a
1147 12:51:12.657835 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 12:51:12.661518 I2C: 03:1a
1149 12:51:12.662071 I2C: 03:38
1150 12:51:12.664535 I2C: 03:39
1151 12:51:12.665080 I2C: 03:3a
1152 12:51:12.667259 I2C: 03:3b
1153 12:51:12.671188 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1154 12:51:12.681272 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1155 12:51:12.690928 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1156 12:51:12.697186 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1157 12:51:12.700626 PCI: 01:00.0
1158 12:51:12.711143 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1159 12:51:12.713921 PCI: 00:1e.0
1160 12:51:12.724637 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1161 12:51:12.734370 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1162 12:51:12.737618 PCI: 00:1e.2 child on link 0 SPI: 00
1163 12:51:12.747492 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 12:51:12.748052 SPI: 00
1165 12:51:12.754080 PCI: 00:1e.3 child on link 0 SPI: 01
1166 12:51:12.764116 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1167 12:51:12.764676 SPI: 01
1168 12:51:12.767473 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1169 12:51:12.777373 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1170 12:51:12.786880 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1171 12:51:12.787434 PNP: 0c09.0
1172 12:51:12.796827 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1173 12:51:12.797371 PCI: 00:1f.3
1174 12:51:12.807485 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1175 12:51:12.817248 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1176 12:51:12.820131 PCI: 00:1f.4
1177 12:51:12.830371 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1178 12:51:12.836975 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1179 12:51:12.840514 PCI: 00:1f.5
1180 12:51:12.850052 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1181 12:51:12.856657 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1182 12:51:12.863507 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1183 12:51:12.870186 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1184 12:51:12.873435 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1185 12:51:12.876624 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1186 12:51:12.880228 PCI: 00:17.0 18 * [0x60 - 0x67] io
1187 12:51:12.883359 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1188 12:51:12.889393 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1189 12:51:12.897109 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1190 12:51:12.903244 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1191 12:51:12.913515 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1192 12:51:12.919562 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1193 12:51:12.923027 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1194 12:51:12.932962 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1195 12:51:12.936334 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1196 12:51:12.939307 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1197 12:51:12.946152 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1198 12:51:12.949546 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1199 12:51:12.956313 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1200 12:51:12.959357 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1201 12:51:12.966474 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1202 12:51:12.969339 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1203 12:51:12.976691 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1204 12:51:12.979017 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1205 12:51:12.985842 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1206 12:51:12.989046 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1207 12:51:12.995849 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1208 12:51:12.998911 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1209 12:51:13.002876 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1210 12:51:13.009085 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1211 12:51:13.012396 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1212 12:51:13.019420 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1213 12:51:13.022622 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1214 12:51:13.028682 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1215 12:51:13.032572 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1216 12:51:13.039270 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1217 12:51:13.041964 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1218 12:51:13.051791 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1219 12:51:13.055659 avoid_fixed_resources: DOMAIN: 0000
1220 12:51:13.061530 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1221 12:51:13.068384 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1222 12:51:13.074913 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1223 12:51:13.081764 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1224 12:51:13.088437 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1225 12:51:13.098579 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1226 12:51:13.105577 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1227 12:51:13.111610 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1228 12:51:13.121973 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1229 12:51:13.128492 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1230 12:51:13.134795 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1231 12:51:13.141725 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1232 12:51:13.144842 Setting resources...
1233 12:51:13.151503 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1234 12:51:13.154510 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1235 12:51:13.158734 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1236 12:51:13.161691 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1237 12:51:13.168179 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1238 12:51:13.174933 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1239 12:51:13.178388 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1240 12:51:13.185106 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1241 12:51:13.194785 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1242 12:51:13.198113 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1243 12:51:13.204507 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1244 12:51:13.208329 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1245 12:51:13.214466 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1246 12:51:13.217958 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1247 12:51:13.224578 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1248 12:51:13.228180 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1249 12:51:13.234473 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1250 12:51:13.237658 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1251 12:51:13.241401 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1252 12:51:13.248436 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1253 12:51:13.251144 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1254 12:51:13.257783 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1255 12:51:13.261372 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1256 12:51:13.267509 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1257 12:51:13.270770 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1258 12:51:13.277636 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1259 12:51:13.281166 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1260 12:51:13.287487 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1261 12:51:13.291296 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1262 12:51:13.297640 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1263 12:51:13.301211 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1264 12:51:13.307484 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1265 12:51:13.313920 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1266 12:51:13.320757 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1267 12:51:13.327450 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1268 12:51:13.333988 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1269 12:51:13.340635 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1270 12:51:13.347318 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1271 12:51:13.350404 Root Device assign_resources, bus 0 link: 0
1272 12:51:13.357544 DOMAIN: 0000 assign_resources, bus 0 link: 0
1273 12:51:13.364237 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1274 12:51:13.374635 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1275 12:51:13.380526 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1276 12:51:13.390343 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1277 12:51:13.396834 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1278 12:51:13.407389 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1279 12:51:13.410490 PCI: 00:14.0 assign_resources, bus 0 link: 0
1280 12:51:13.417172 PCI: 00:14.0 assign_resources, bus 0 link: 0
1281 12:51:13.423917 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1282 12:51:13.429977 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1283 12:51:13.441480 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1284 12:51:13.447167 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1285 12:51:13.454253 PCI: 00:15.0 assign_resources, bus 1 link: 0
1286 12:51:13.456946 PCI: 00:15.0 assign_resources, bus 1 link: 0
1287 12:51:13.467194 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1288 12:51:13.470345 PCI: 00:15.1 assign_resources, bus 2 link: 0
1289 12:51:13.476897 PCI: 00:15.1 assign_resources, bus 2 link: 0
1290 12:51:13.483369 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1291 12:51:13.490014 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1292 12:51:13.500154 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1293 12:51:13.506933 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1294 12:51:13.513322 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1295 12:51:13.523417 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1296 12:51:13.529905 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1297 12:51:13.539994 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1298 12:51:13.543282 PCI: 00:19.0 assign_resources, bus 3 link: 0
1299 12:51:13.546595 PCI: 00:19.0 assign_resources, bus 3 link: 0
1300 12:51:13.556816 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1301 12:51:13.566210 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1302 12:51:13.573911 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1303 12:51:13.579366 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1304 12:51:13.586167 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1305 12:51:13.592458 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1306 12:51:13.598838 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1307 12:51:13.608958 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1308 12:51:13.612124 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1309 12:51:13.615203 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1310 12:51:13.625408 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1311 12:51:13.628906 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1312 12:51:13.635344 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1313 12:51:13.639062 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1314 12:51:13.645290 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1315 12:51:13.648904 LPC: Trying to open IO window from 800 size 1ff
1316 12:51:13.658547 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1317 12:51:13.665373 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1318 12:51:13.675046 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1319 12:51:13.682238 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1320 12:51:13.685928 DOMAIN: 0000 assign_resources, bus 0 link: 0
1321 12:51:13.691756 Root Device assign_resources, bus 0 link: 0
1322 12:51:13.695516 Done setting resources.
1323 12:51:13.701996 Show resources in subtree (Root Device)...After assigning values.
1324 12:51:13.705719 Root Device child on link 0 CPU_CLUSTER: 0
1325 12:51:13.708564 CPU_CLUSTER: 0 child on link 0 APIC: 00
1326 12:51:13.709111 APIC: 00
1327 12:51:13.711609 APIC: 03
1328 12:51:13.712272 APIC: 01
1329 12:51:13.714928 APIC: 02
1330 12:51:13.715406 APIC: 05
1331 12:51:13.715769 APIC: 04
1332 12:51:13.718254 APIC: 06
1333 12:51:13.718996 APIC: 07
1334 12:51:13.725086 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1335 12:51:13.731582 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1336 12:51:13.744990 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1337 12:51:13.745453 PCI: 00:00.0
1338 12:51:13.754768 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1339 12:51:13.764959 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1340 12:51:13.774778 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1341 12:51:13.784516 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1342 12:51:13.791497 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1343 12:51:13.801342 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1344 12:51:13.811175 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1345 12:51:13.821033 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1346 12:51:13.830620 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1347 12:51:13.837712 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1348 12:51:13.847047 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1349 12:51:13.857390 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1350 12:51:13.867225 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1351 12:51:13.878640 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1352 12:51:13.887555 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1353 12:51:13.897165 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1354 12:51:13.897717 PCI: 00:02.0
1355 12:51:13.906823 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1356 12:51:13.920348 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1357 12:51:13.927058 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1358 12:51:13.930410 PCI: 00:04.0
1359 12:51:13.931266 PCI: 00:08.0
1360 12:51:13.939774 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1361 12:51:13.943473 PCI: 00:12.0
1362 12:51:13.953877 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1363 12:51:13.956484 PCI: 00:14.0 child on link 0 USB0 port 0
1364 12:51:13.970304 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1365 12:51:13.972898 USB0 port 0 child on link 0 USB2 port 0
1366 12:51:13.973445 USB2 port 0
1367 12:51:13.976392 USB2 port 1
1368 12:51:13.976939 USB2 port 2
1369 12:51:13.979812 USB2 port 3
1370 12:51:13.983149 USB2 port 5
1371 12:51:13.983697 USB2 port 6
1372 12:51:13.986234 USB2 port 9
1373 12:51:13.986822 USB3 port 0
1374 12:51:13.990037 USB3 port 1
1375 12:51:13.990650 USB3 port 2
1376 12:51:13.993310 USB3 port 3
1377 12:51:13.993773 USB3 port 4
1378 12:51:13.996102 PCI: 00:14.2
1379 12:51:14.006035 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1380 12:51:14.016775 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1381 12:51:14.017333 PCI: 00:14.3
1382 12:51:14.029785 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1383 12:51:14.033323 PCI: 00:15.0 child on link 0 I2C: 01:15
1384 12:51:14.042515 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1385 12:51:14.043117 I2C: 01:15
1386 12:51:14.049078 PCI: 00:15.1 child on link 0 I2C: 02:5d
1387 12:51:14.058960 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1388 12:51:14.059516 I2C: 02:5d
1389 12:51:14.062305 GENERIC: 0.0
1390 12:51:14.062907 PCI: 00:16.0
1391 12:51:14.075885 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1392 12:51:14.076445 PCI: 00:17.0
1393 12:51:14.085447 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1394 12:51:14.095170 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1395 12:51:14.105283 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1396 12:51:14.115414 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1397 12:51:14.122458 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1398 12:51:14.134732 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1399 12:51:14.138260 PCI: 00:19.0 child on link 0 I2C: 03:1a
1400 12:51:14.148386 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1401 12:51:14.148948 I2C: 03:1a
1402 12:51:14.151653 I2C: 03:38
1403 12:51:14.152205 I2C: 03:39
1404 12:51:14.154765 I2C: 03:3a
1405 12:51:14.155222 I2C: 03:3b
1406 12:51:14.161718 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1407 12:51:14.168189 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1408 12:51:14.178167 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1409 12:51:14.191623 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1410 12:51:14.192345 PCI: 01:00.0
1411 12:51:14.201100 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1412 12:51:14.204225 PCI: 00:1e.0
1413 12:51:14.214514 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1414 12:51:14.224465 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1415 12:51:14.228020 PCI: 00:1e.2 child on link 0 SPI: 00
1416 12:51:14.241008 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1417 12:51:14.241565 SPI: 00
1418 12:51:14.244586 PCI: 00:1e.3 child on link 0 SPI: 01
1419 12:51:14.254222 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1420 12:51:14.257237 SPI: 01
1421 12:51:14.261118 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1422 12:51:14.270961 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1423 12:51:14.277318 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1424 12:51:14.280625 PNP: 0c09.0
1425 12:51:14.287767 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1426 12:51:14.291086 PCI: 00:1f.3
1427 12:51:14.300943 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1428 12:51:14.310590 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1429 12:51:14.313441 PCI: 00:1f.4
1430 12:51:14.323540 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1431 12:51:14.333074 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1432 12:51:14.333637 PCI: 00:1f.5
1433 12:51:14.343457 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1434 12:51:14.346600 Done allocating resources.
1435 12:51:14.353293 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1436 12:51:14.356507 Enabling resources...
1437 12:51:14.359775 PCI: 00:00.0 subsystem <- 8086/9b61
1438 12:51:14.363521 PCI: 00:00.0 cmd <- 06
1439 12:51:14.366412 PCI: 00:02.0 subsystem <- 8086/9b41
1440 12:51:14.366895 PCI: 00:02.0 cmd <- 03
1441 12:51:14.370499 PCI: 00:08.0 cmd <- 06
1442 12:51:14.373091 PCI: 00:12.0 subsystem <- 8086/02f9
1443 12:51:14.376705 PCI: 00:12.0 cmd <- 02
1444 12:51:14.379976 PCI: 00:14.0 subsystem <- 8086/02ed
1445 12:51:14.383719 PCI: 00:14.0 cmd <- 02
1446 12:51:14.386303 PCI: 00:14.2 cmd <- 02
1447 12:51:14.389936 PCI: 00:14.3 subsystem <- 8086/02f0
1448 12:51:14.393498 PCI: 00:14.3 cmd <- 02
1449 12:51:14.396564 PCI: 00:15.0 subsystem <- 8086/02e8
1450 12:51:14.400429 PCI: 00:15.0 cmd <- 02
1451 12:51:14.403304 PCI: 00:15.1 subsystem <- 8086/02e9
1452 12:51:14.403852 PCI: 00:15.1 cmd <- 02
1453 12:51:14.409963 PCI: 00:16.0 subsystem <- 8086/02e0
1454 12:51:14.410499 PCI: 00:16.0 cmd <- 02
1455 12:51:14.413113 PCI: 00:17.0 subsystem <- 8086/02d3
1456 12:51:14.416572 PCI: 00:17.0 cmd <- 03
1457 12:51:14.419876 PCI: 00:19.0 subsystem <- 8086/02c5
1458 12:51:14.422953 PCI: 00:19.0 cmd <- 02
1459 12:51:14.426279 PCI: 00:1d.0 bridge ctrl <- 0013
1460 12:51:14.429709 PCI: 00:1d.0 subsystem <- 8086/02b0
1461 12:51:14.434684 PCI: 00:1d.0 cmd <- 06
1462 12:51:14.436519 PCI: 00:1e.0 subsystem <- 8086/02a8
1463 12:51:14.439553 PCI: 00:1e.0 cmd <- 06
1464 12:51:14.443037 PCI: 00:1e.2 subsystem <- 8086/02aa
1465 12:51:14.446234 PCI: 00:1e.2 cmd <- 06
1466 12:51:14.449908 PCI: 00:1e.3 subsystem <- 8086/02ab
1467 12:51:14.452959 PCI: 00:1e.3 cmd <- 02
1468 12:51:14.457128 PCI: 00:1f.0 subsystem <- 8086/0284
1469 12:51:14.459739 PCI: 00:1f.0 cmd <- 407
1470 12:51:14.463094 PCI: 00:1f.3 subsystem <- 8086/02c8
1471 12:51:14.463647 PCI: 00:1f.3 cmd <- 02
1472 12:51:14.470722 PCI: 00:1f.4 subsystem <- 8086/02a3
1473 12:51:14.471269 PCI: 00:1f.4 cmd <- 03
1474 12:51:14.473447 PCI: 00:1f.5 subsystem <- 8086/02a4
1475 12:51:14.476400 PCI: 00:1f.5 cmd <- 406
1476 12:51:14.486180 PCI: 01:00.0 cmd <- 02
1477 12:51:14.491056 done.
1478 12:51:14.502687 ME: Version: 14.0.39.1367
1479 12:51:14.509336 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1480 12:51:14.512824 Initializing devices...
1481 12:51:14.513373 Root Device init ...
1482 12:51:14.519652 Chrome EC: Set SMI mask to 0x0000000000000000
1483 12:51:14.522698 Chrome EC: clear events_b mask to 0x0000000000000000
1484 12:51:14.529338 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1485 12:51:14.535701 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1486 12:51:14.542622 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1487 12:51:14.546147 Chrome EC: Set WAKE mask to 0x0000000000000000
1488 12:51:14.548951 Root Device init finished in 35155 usecs
1489 12:51:14.553126 CPU_CLUSTER: 0 init ...
1490 12:51:14.559180 CPU_CLUSTER: 0 init finished in 2447 usecs
1491 12:51:14.563432 PCI: 00:00.0 init ...
1492 12:51:14.566918 CPU TDP: 15 Watts
1493 12:51:14.569906 CPU PL2 = 64 Watts
1494 12:51:14.573336 PCI: 00:00.0 init finished in 7080 usecs
1495 12:51:14.576722 PCI: 00:02.0 init ...
1496 12:51:14.579973 PCI: 00:02.0 init finished in 2252 usecs
1497 12:51:14.583429 PCI: 00:08.0 init ...
1498 12:51:14.586619 PCI: 00:08.0 init finished in 2251 usecs
1499 12:51:14.589869 PCI: 00:12.0 init ...
1500 12:51:14.592806 PCI: 00:12.0 init finished in 2252 usecs
1501 12:51:14.596599 PCI: 00:14.0 init ...
1502 12:51:14.599649 PCI: 00:14.0 init finished in 2251 usecs
1503 12:51:14.603170 PCI: 00:14.2 init ...
1504 12:51:14.606480 PCI: 00:14.2 init finished in 2253 usecs
1505 12:51:14.609922 PCI: 00:14.3 init ...
1506 12:51:14.613111 PCI: 00:14.3 init finished in 2269 usecs
1507 12:51:14.616268 PCI: 00:15.0 init ...
1508 12:51:14.619536 DW I2C bus 0 at 0xd121f000 (400 KHz)
1509 12:51:14.623279 PCI: 00:15.0 init finished in 5975 usecs
1510 12:51:14.626294 PCI: 00:15.1 init ...
1511 12:51:14.629690 DW I2C bus 1 at 0xd1220000 (400 KHz)
1512 12:51:14.636150 PCI: 00:15.1 init finished in 5975 usecs
1513 12:51:14.636850 PCI: 00:16.0 init ...
1514 12:51:14.642838 PCI: 00:16.0 init finished in 2252 usecs
1515 12:51:14.646392 PCI: 00:19.0 init ...
1516 12:51:14.649489 DW I2C bus 4 at 0xd1222000 (400 KHz)
1517 12:51:14.652394 PCI: 00:19.0 init finished in 5974 usecs
1518 12:51:14.656236 PCI: 00:1d.0 init ...
1519 12:51:14.659530 Initializing PCH PCIe bridge.
1520 12:51:14.662886 PCI: 00:1d.0 init finished in 5282 usecs
1521 12:51:14.666236 PCI: 00:1f.0 init ...
1522 12:51:14.669243 IOAPIC: Initializing IOAPIC at 0xfec00000
1523 12:51:14.675527 IOAPIC: Bootstrap Processor Local APIC = 0x00
1524 12:51:14.676070 IOAPIC: ID = 0x02
1525 12:51:14.678841 IOAPIC: Dumping registers
1526 12:51:14.682113 reg 0x0000: 0x02000000
1527 12:51:14.685477 reg 0x0001: 0x00770020
1528 12:51:14.686027 reg 0x0002: 0x00000000
1529 12:51:14.691992 PCI: 00:1f.0 init finished in 23514 usecs
1530 12:51:14.696157 PCI: 00:1f.4 init ...
1531 12:51:14.698755 PCI: 00:1f.4 init finished in 2263 usecs
1532 12:51:14.709538 PCI: 01:00.0 init ...
1533 12:51:14.712734 PCI: 01:00.0 init finished in 2243 usecs
1534 12:51:14.717071 PNP: 0c09.0 init ...
1535 12:51:14.720278 Google Chrome EC uptime: 11.096 seconds
1536 12:51:14.726889 Google Chrome AP resets since EC boot: 0
1537 12:51:14.730742 Google Chrome most recent AP reset causes:
1538 12:51:14.736656 Google Chrome EC reset flags at last EC boot: reset-pin
1539 12:51:14.740074 PNP: 0c09.0 init finished in 20631 usecs
1540 12:51:14.743248 Devices initialized
1541 12:51:14.746956 Show all devs... After init.
1542 12:51:14.747508 Root Device: enabled 1
1543 12:51:14.750028 CPU_CLUSTER: 0: enabled 1
1544 12:51:14.753034 DOMAIN: 0000: enabled 1
1545 12:51:14.753638 APIC: 00: enabled 1
1546 12:51:14.756369 PCI: 00:00.0: enabled 1
1547 12:51:14.760276 PCI: 00:02.0: enabled 1
1548 12:51:14.763200 PCI: 00:04.0: enabled 0
1549 12:51:14.763657 PCI: 00:05.0: enabled 0
1550 12:51:14.766515 PCI: 00:12.0: enabled 1
1551 12:51:14.769666 PCI: 00:12.5: enabled 0
1552 12:51:14.772896 PCI: 00:12.6: enabled 0
1553 12:51:14.773405 PCI: 00:14.0: enabled 1
1554 12:51:14.776176 PCI: 00:14.1: enabled 0
1555 12:51:14.779556 PCI: 00:14.3: enabled 1
1556 12:51:14.780008 PCI: 00:14.5: enabled 0
1557 12:51:14.783245 PCI: 00:15.0: enabled 1
1558 12:51:14.786455 PCI: 00:15.1: enabled 1
1559 12:51:14.789988 PCI: 00:15.2: enabled 0
1560 12:51:14.790415 PCI: 00:15.3: enabled 0
1561 12:51:14.793075 PCI: 00:16.0: enabled 1
1562 12:51:14.796031 PCI: 00:16.1: enabled 0
1563 12:51:14.799992 PCI: 00:16.2: enabled 0
1564 12:51:14.800536 PCI: 00:16.3: enabled 0
1565 12:51:14.803065 PCI: 00:16.4: enabled 0
1566 12:51:14.806205 PCI: 00:16.5: enabled 0
1567 12:51:14.809949 PCI: 00:17.0: enabled 1
1568 12:51:14.810453 PCI: 00:19.0: enabled 1
1569 12:51:14.813028 PCI: 00:19.1: enabled 0
1570 12:51:14.816358 PCI: 00:19.2: enabled 0
1571 12:51:14.816766 PCI: 00:1a.0: enabled 0
1572 12:51:14.819233 PCI: 00:1c.0: enabled 0
1573 12:51:14.822884 PCI: 00:1c.1: enabled 0
1574 12:51:14.826389 PCI: 00:1c.2: enabled 0
1575 12:51:14.826926 PCI: 00:1c.3: enabled 0
1576 12:51:14.829830 PCI: 00:1c.4: enabled 0
1577 12:51:14.832828 PCI: 00:1c.5: enabled 0
1578 12:51:14.835748 PCI: 00:1c.6: enabled 0
1579 12:51:14.836168 PCI: 00:1c.7: enabled 0
1580 12:51:14.839212 PCI: 00:1d.0: enabled 1
1581 12:51:14.843104 PCI: 00:1d.1: enabled 0
1582 12:51:14.846128 PCI: 00:1d.2: enabled 0
1583 12:51:14.846714 PCI: 00:1d.3: enabled 0
1584 12:51:14.849521 PCI: 00:1d.4: enabled 0
1585 12:51:14.852400 PCI: 00:1d.5: enabled 0
1586 12:51:14.856422 PCI: 00:1e.0: enabled 1
1587 12:51:14.856980 PCI: 00:1e.1: enabled 0
1588 12:51:14.859131 PCI: 00:1e.2: enabled 1
1589 12:51:14.863014 PCI: 00:1e.3: enabled 1
1590 12:51:14.863568 PCI: 00:1f.0: enabled 1
1591 12:51:14.865857 PCI: 00:1f.1: enabled 0
1592 12:51:14.869451 PCI: 00:1f.2: enabled 0
1593 12:51:14.873304 PCI: 00:1f.3: enabled 1
1594 12:51:14.873856 PCI: 00:1f.4: enabled 1
1595 12:51:14.875914 PCI: 00:1f.5: enabled 1
1596 12:51:14.879531 PCI: 00:1f.6: enabled 0
1597 12:51:14.882645 USB0 port 0: enabled 1
1598 12:51:14.883200 I2C: 01:15: enabled 1
1599 12:51:14.885505 I2C: 02:5d: enabled 1
1600 12:51:14.889230 GENERIC: 0.0: enabled 1
1601 12:51:14.889787 I2C: 03:1a: enabled 1
1602 12:51:14.892258 I2C: 03:38: enabled 1
1603 12:51:14.895398 I2C: 03:39: enabled 1
1604 12:51:14.895869 I2C: 03:3a: enabled 1
1605 12:51:14.898835 I2C: 03:3b: enabled 1
1606 12:51:14.902646 PCI: 00:00.0: enabled 1
1607 12:51:14.903221 SPI: 00: enabled 1
1608 12:51:14.905815 SPI: 01: enabled 1
1609 12:51:14.908942 PNP: 0c09.0: enabled 1
1610 12:51:14.909513 USB2 port 0: enabled 1
1611 12:51:14.912948 USB2 port 1: enabled 1
1612 12:51:14.915473 USB2 port 2: enabled 0
1613 12:51:14.915947 USB2 port 3: enabled 0
1614 12:51:14.919074 USB2 port 5: enabled 0
1615 12:51:14.922160 USB2 port 6: enabled 1
1616 12:51:14.925173 USB2 port 9: enabled 1
1617 12:51:14.925645 USB3 port 0: enabled 1
1618 12:51:14.928949 USB3 port 1: enabled 1
1619 12:51:14.932433 USB3 port 2: enabled 1
1620 12:51:14.932998 USB3 port 3: enabled 1
1621 12:51:14.935265 USB3 port 4: enabled 0
1622 12:51:14.938605 APIC: 03: enabled 1
1623 12:51:14.939076 APIC: 01: enabled 1
1624 12:51:14.942128 APIC: 02: enabled 1
1625 12:51:14.945440 APIC: 05: enabled 1
1626 12:51:14.946010 APIC: 04: enabled 1
1627 12:51:14.949294 APIC: 06: enabled 1
1628 12:51:14.949863 APIC: 07: enabled 1
1629 12:51:14.952142 PCI: 00:08.0: enabled 1
1630 12:51:14.955454 PCI: 00:14.2: enabled 1
1631 12:51:14.958787 PCI: 01:00.0: enabled 1
1632 12:51:14.962677 Disabling ACPI via APMC:
1633 12:51:14.963250 done.
1634 12:51:14.968764 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1635 12:51:14.973125 ELOG: NV offset 0xaf0000 size 0x4000
1636 12:51:14.979071 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1637 12:51:14.985730 ELOG: Event(17) added with size 13 at 2023-09-23 12:51:14 UTC
1638 12:51:14.992261 ELOG: Event(92) added with size 9 at 2023-09-23 12:51:14 UTC
1639 12:51:14.999392 ELOG: Event(93) added with size 9 at 2023-09-23 12:51:14 UTC
1640 12:51:15.005519 ELOG: Event(9A) added with size 9 at 2023-09-23 12:51:14 UTC
1641 12:51:15.011931 ELOG: Event(9E) added with size 10 at 2023-09-23 12:51:14 UTC
1642 12:51:15.019478 ELOG: Event(9F) added with size 14 at 2023-09-23 12:51:14 UTC
1643 12:51:15.021938 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1644 12:51:15.029065 ELOG: Event(A1) added with size 10 at 2023-09-23 12:51:14 UTC
1645 12:51:15.038757 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1646 12:51:15.045600 ELOG: Event(A0) added with size 9 at 2023-09-23 12:51:14 UTC
1647 12:51:15.049154 elog_add_boot_reason: Logged dev mode boot
1648 12:51:15.049702 Finalize devices...
1649 12:51:15.051921 PCI: 00:17.0 final
1650 12:51:15.055058 Devices finalized
1651 12:51:15.058860 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1652 12:51:15.065320 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1653 12:51:15.069028 ME: HFSTS1 : 0x90000245
1654 12:51:15.071968 ME: HFSTS2 : 0x3B850126
1655 12:51:15.078850 ME: HFSTS3 : 0x00000020
1656 12:51:15.082209 ME: HFSTS4 : 0x00004800
1657 12:51:15.085257 ME: HFSTS5 : 0x00000000
1658 12:51:15.088487 ME: HFSTS6 : 0x40400006
1659 12:51:15.091764 ME: Manufacturing Mode : NO
1660 12:51:15.095086 ME: FW Partition Table : OK
1661 12:51:15.098222 ME: Bringup Loader Failure : NO
1662 12:51:15.102360 ME: Firmware Init Complete : YES
1663 12:51:15.104950 ME: Boot Options Present : NO
1664 12:51:15.108308 ME: Update In Progress : NO
1665 12:51:15.111509 ME: D0i3 Support : YES
1666 12:51:15.115203 ME: Low Power State Enabled : NO
1667 12:51:15.118295 ME: CPU Replaced : NO
1668 12:51:15.121351 ME: CPU Replacement Valid : YES
1669 12:51:15.125305 ME: Current Working State : 5
1670 12:51:15.128311 ME: Current Operation State : 1
1671 12:51:15.131728 ME: Current Operation Mode : 0
1672 12:51:15.134456 ME: Error Code : 0
1673 12:51:15.137973 ME: CPU Debug Disabled : YES
1674 12:51:15.140939 ME: TXT Support : NO
1675 12:51:15.147893 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1676 12:51:15.154512 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1677 12:51:15.155113 CBFS @ c08000 size 3f8000
1678 12:51:15.161085 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1679 12:51:15.164407 CBFS: Locating 'fallback/dsdt.aml'
1680 12:51:15.167873 CBFS: Found @ offset 10bb80 size 3fa5
1681 12:51:15.174291 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1682 12:51:15.177868 CBFS @ c08000 size 3f8000
1683 12:51:15.180709 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1684 12:51:15.184223 CBFS: Locating 'fallback/slic'
1685 12:51:15.189514 CBFS: 'fallback/slic' not found.
1686 12:51:15.195615 ACPI: Writing ACPI tables at 99b3e000.
1687 12:51:15.196099 ACPI: * FACS
1688 12:51:15.199066 ACPI: * DSDT
1689 12:51:15.203212 Ramoops buffer: 0x100000@0x99a3d000.
1690 12:51:15.206753 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1691 12:51:15.212421 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1692 12:51:15.216220 Google Chrome EC: version:
1693 12:51:15.219395 ro: helios_v2.0.2659-56403530b
1694 12:51:15.222231 rw: helios_v2.0.2849-c41de27e7d
1695 12:51:15.222827 running image: 1
1696 12:51:15.226573 ACPI: * FADT
1697 12:51:15.227128 SCI is IRQ9
1698 12:51:15.233647 ACPI: added table 1/32, length now 40
1699 12:51:15.234200 ACPI: * SSDT
1700 12:51:15.236537 Found 1 CPU(s) with 8 core(s) each.
1701 12:51:15.239673 Error: Could not locate 'wifi_sar' in VPD.
1702 12:51:15.246589 Checking CBFS for default SAR values
1703 12:51:15.249865 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1704 12:51:15.252969 CBFS @ c08000 size 3f8000
1705 12:51:15.259814 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1706 12:51:15.262946 CBFS: Locating 'wifi_sar_defaults.hex'
1707 12:51:15.266699 CBFS: Found @ offset 5fac0 size 77
1708 12:51:15.269401 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1709 12:51:15.273251 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1710 12:51:15.279413 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1711 12:51:15.286621 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1712 12:51:15.290362 failed to find key in VPD: dsm_calib_r0_0
1713 12:51:15.299835 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1714 12:51:15.303119 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1715 12:51:15.306378 failed to find key in VPD: dsm_calib_r0_1
1716 12:51:15.316650 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1717 12:51:15.323057 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1718 12:51:15.326222 failed to find key in VPD: dsm_calib_r0_2
1719 12:51:15.335772 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1720 12:51:15.339302 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1721 12:51:15.345801 failed to find key in VPD: dsm_calib_r0_3
1722 12:51:15.352521 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1723 12:51:15.358832 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1724 12:51:15.362254 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1725 12:51:15.365360 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1726 12:51:15.369848 EC returned error result code 1
1727 12:51:15.373675 EC returned error result code 1
1728 12:51:15.377166 EC returned error result code 1
1729 12:51:15.384233 PS2K: Bad resp from EC. Vivaldi disabled!
1730 12:51:15.388353 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1731 12:51:15.393613 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1732 12:51:15.400379 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1733 12:51:15.403492 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1734 12:51:15.410051 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1735 12:51:15.416416 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1736 12:51:15.423198 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1737 12:51:15.427168 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1738 12:51:15.433900 ACPI: added table 2/32, length now 44
1739 12:51:15.434454 ACPI: * MCFG
1740 12:51:15.436236 ACPI: added table 3/32, length now 48
1741 12:51:15.440828 ACPI: * TPM2
1742 12:51:15.443185 TPM2 log created at 99a2d000
1743 12:51:15.446446 ACPI: added table 4/32, length now 52
1744 12:51:15.447046 ACPI: * MADT
1745 12:51:15.449999 SCI is IRQ9
1746 12:51:15.453613 ACPI: added table 5/32, length now 56
1747 12:51:15.454162 current = 99b43ac0
1748 12:51:15.456580 ACPI: * DMAR
1749 12:51:15.460436 ACPI: added table 6/32, length now 60
1750 12:51:15.463138 ACPI: * IGD OpRegion
1751 12:51:15.463589 GMA: Found VBT in CBFS
1752 12:51:15.466510 GMA: Found valid VBT in CBFS
1753 12:51:15.469380 ACPI: added table 7/32, length now 64
1754 12:51:15.473400 ACPI: * HPET
1755 12:51:15.476161 ACPI: added table 8/32, length now 68
1756 12:51:15.479385 ACPI: done.
1757 12:51:15.479966 ACPI tables: 31744 bytes.
1758 12:51:15.483272 smbios_write_tables: 99a2c000
1759 12:51:15.486656 EC returned error result code 3
1760 12:51:15.489971 Couldn't obtain OEM name from CBI
1761 12:51:15.493033 Create SMBIOS type 17
1762 12:51:15.496179 PCI: 00:00.0 (Intel Cannonlake)
1763 12:51:15.499828 PCI: 00:14.3 (Intel WiFi)
1764 12:51:15.503174 SMBIOS tables: 939 bytes.
1765 12:51:15.506753 Writing table forward entry at 0x00000500
1766 12:51:15.512993 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1767 12:51:15.516494 Writing coreboot table at 0x99b62000
1768 12:51:15.522699 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1769 12:51:15.526194 1. 0000000000001000-000000000009ffff: RAM
1770 12:51:15.529845 2. 00000000000a0000-00000000000fffff: RESERVED
1771 12:51:15.537144 3. 0000000000100000-0000000099a2bfff: RAM
1772 12:51:15.543109 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1773 12:51:15.546332 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1774 12:51:15.553074 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1775 12:51:15.555937 7. 000000009a000000-000000009f7fffff: RESERVED
1776 12:51:15.562802 8. 00000000e0000000-00000000efffffff: RESERVED
1777 12:51:15.565987 9. 00000000fc000000-00000000fc000fff: RESERVED
1778 12:51:15.572450 10. 00000000fe000000-00000000fe00ffff: RESERVED
1779 12:51:15.575852 11. 00000000fed10000-00000000fed17fff: RESERVED
1780 12:51:15.579589 12. 00000000fed80000-00000000fed83fff: RESERVED
1781 12:51:15.585748 13. 00000000fed90000-00000000fed91fff: RESERVED
1782 12:51:15.588847 14. 00000000feda0000-00000000feda1fff: RESERVED
1783 12:51:15.595313 15. 0000000100000000-000000045e7fffff: RAM
1784 12:51:15.598814 Graphics framebuffer located at 0xc0000000
1785 12:51:15.602759 Passing 5 GPIOs to payload:
1786 12:51:15.605672 NAME | PORT | POLARITY | VALUE
1787 12:51:15.612304 write protect | undefined | high | low
1788 12:51:15.616136 lid | undefined | high | high
1789 12:51:15.622183 power | undefined | high | low
1790 12:51:15.628958 oprom | undefined | high | low
1791 12:51:15.632545 EC in RW | 0x000000cb | high | low
1792 12:51:15.635107 Board ID: 4
1793 12:51:15.638709 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1794 12:51:15.641862 CBFS @ c08000 size 3f8000
1795 12:51:15.648778 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1796 12:51:15.655268 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1797 12:51:15.655845 coreboot table: 1492 bytes.
1798 12:51:15.658480 IMD ROOT 0. 99fff000 00001000
1799 12:51:15.661967 IMD SMALL 1. 99ffe000 00001000
1800 12:51:15.665231 FSP MEMORY 2. 99c4e000 003b0000
1801 12:51:15.668401 CONSOLE 3. 99c2e000 00020000
1802 12:51:15.671506 FMAP 4. 99c2d000 0000054e
1803 12:51:15.674950 TIME STAMP 5. 99c2c000 00000910
1804 12:51:15.678134 VBOOT WORK 6. 99c18000 00014000
1805 12:51:15.681648 MRC DATA 7. 99c16000 00001958
1806 12:51:15.684926 ROMSTG STCK 8. 99c15000 00001000
1807 12:51:15.688512 AFTER CAR 9. 99c0b000 0000a000
1808 12:51:15.691788 RAMSTAGE 10. 99baf000 0005c000
1809 12:51:15.694984 REFCODE 11. 99b7a000 00035000
1810 12:51:15.697808 SMM BACKUP 12. 99b6a000 00010000
1811 12:51:15.701583 COREBOOT 13. 99b62000 00008000
1812 12:51:15.705803 ACPI 14. 99b3e000 00024000
1813 12:51:15.708050 ACPI GNVS 15. 99b3d000 00001000
1814 12:51:15.711254 RAMOOPS 16. 99a3d000 00100000
1815 12:51:15.714980 TPM2 TCGLOG17. 99a2d000 00010000
1816 12:51:15.718096 SMBIOS 18. 99a2c000 00000800
1817 12:51:15.721243 IMD small region:
1818 12:51:15.725183 IMD ROOT 0. 99ffec00 00000400
1819 12:51:15.727999 FSP RUNTIME 1. 99ffebe0 00000004
1820 12:51:15.731256 EC HOSTEVENT 2. 99ffebc0 00000008
1821 12:51:15.735038 POWER STATE 3. 99ffeb80 00000040
1822 12:51:15.737915 ROMSTAGE 4. 99ffeb60 00000004
1823 12:51:15.741386 MEM INFO 5. 99ffe9a0 000001b9
1824 12:51:15.744516 VPD 6. 99ffe920 0000006c
1825 12:51:15.748451 MTRR: Physical address space:
1826 12:51:15.754917 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1827 12:51:15.761468 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1828 12:51:15.768478 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1829 12:51:15.774933 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1830 12:51:15.781158 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1831 12:51:15.787917 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1832 12:51:15.794983 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1833 12:51:15.797894 MTRR: Fixed MSR 0x250 0x0606060606060606
1834 12:51:15.800996 MTRR: Fixed MSR 0x258 0x0606060606060606
1835 12:51:15.804453 MTRR: Fixed MSR 0x259 0x0000000000000000
1836 12:51:15.811344 MTRR: Fixed MSR 0x268 0x0606060606060606
1837 12:51:15.814352 MTRR: Fixed MSR 0x269 0x0606060606060606
1838 12:51:15.817540 MTRR: Fixed MSR 0x26a 0x0606060606060606
1839 12:51:15.820760 MTRR: Fixed MSR 0x26b 0x0606060606060606
1840 12:51:15.824303 MTRR: Fixed MSR 0x26c 0x0606060606060606
1841 12:51:15.830709 MTRR: Fixed MSR 0x26d 0x0606060606060606
1842 12:51:15.834087 MTRR: Fixed MSR 0x26e 0x0606060606060606
1843 12:51:15.837520 MTRR: Fixed MSR 0x26f 0x0606060606060606
1844 12:51:15.840354 call enable_fixed_mtrr()
1845 12:51:15.843927 CPU physical address size: 39 bits
1846 12:51:15.850304 MTRR: default type WB/UC MTRR counts: 6/8.
1847 12:51:15.853810 MTRR: WB selected as default type.
1848 12:51:15.857317 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1849 12:51:15.863963 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1850 12:51:15.870441 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1851 12:51:15.877121 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1852 12:51:15.883905 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1853 12:51:15.890426 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1854 12:51:15.894326 MTRR: Fixed MSR 0x250 0x0606060606060606
1855 12:51:15.900255 MTRR: Fixed MSR 0x258 0x0606060606060606
1856 12:51:15.903500 MTRR: Fixed MSR 0x259 0x0000000000000000
1857 12:51:15.907045 MTRR: Fixed MSR 0x268 0x0606060606060606
1858 12:51:15.910041 MTRR: Fixed MSR 0x269 0x0606060606060606
1859 12:51:15.917278 MTRR: Fixed MSR 0x26a 0x0606060606060606
1860 12:51:15.920020 MTRR: Fixed MSR 0x26b 0x0606060606060606
1861 12:51:15.923342 MTRR: Fixed MSR 0x26c 0x0606060606060606
1862 12:51:15.926623 MTRR: Fixed MSR 0x26d 0x0606060606060606
1863 12:51:15.933583 MTRR: Fixed MSR 0x26e 0x0606060606060606
1864 12:51:15.936312 MTRR: Fixed MSR 0x26f 0x0606060606060606
1865 12:51:15.936866
1866 12:51:15.937231 MTRR check
1867 12:51:15.939849 Fixed MTRRs : Enabled
1868 12:51:15.942838 Variable MTRRs: Enabled
1869 12:51:15.943515
1870 12:51:15.946494 call enable_fixed_mtrr()
1871 12:51:15.949764 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1872 12:51:15.952888 CPU physical address size: 39 bits
1873 12:51:15.959931 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1874 12:51:15.962735 MTRR: Fixed MSR 0x250 0x0606060606060606
1875 12:51:15.966332 MTRR: Fixed MSR 0x250 0x0606060606060606
1876 12:51:15.973001 MTRR: Fixed MSR 0x258 0x0606060606060606
1877 12:51:15.976218 MTRR: Fixed MSR 0x259 0x0000000000000000
1878 12:51:15.979488 MTRR: Fixed MSR 0x268 0x0606060606060606
1879 12:51:15.983149 MTRR: Fixed MSR 0x269 0x0606060606060606
1880 12:51:15.989990 MTRR: Fixed MSR 0x26a 0x0606060606060606
1881 12:51:15.992628 MTRR: Fixed MSR 0x26b 0x0606060606060606
1882 12:51:15.996473 MTRR: Fixed MSR 0x26c 0x0606060606060606
1883 12:51:15.999479 MTRR: Fixed MSR 0x26d 0x0606060606060606
1884 12:51:16.002609 MTRR: Fixed MSR 0x26e 0x0606060606060606
1885 12:51:16.009559 MTRR: Fixed MSR 0x26f 0x0606060606060606
1886 12:51:16.012852 MTRR: Fixed MSR 0x258 0x0606060606060606
1887 12:51:16.015965 call enable_fixed_mtrr()
1888 12:51:16.019321 MTRR: Fixed MSR 0x259 0x0000000000000000
1889 12:51:16.023088 MTRR: Fixed MSR 0x268 0x0606060606060606
1890 12:51:16.029166 MTRR: Fixed MSR 0x269 0x0606060606060606
1891 12:51:16.032116 MTRR: Fixed MSR 0x26a 0x0606060606060606
1892 12:51:16.035686 MTRR: Fixed MSR 0x26b 0x0606060606060606
1893 12:51:16.039429 MTRR: Fixed MSR 0x26c 0x0606060606060606
1894 12:51:16.042382 MTRR: Fixed MSR 0x26d 0x0606060606060606
1895 12:51:16.048843 MTRR: Fixed MSR 0x26e 0x0606060606060606
1896 12:51:16.052033 MTRR: Fixed MSR 0x26f 0x0606060606060606
1897 12:51:16.055123 CPU physical address size: 39 bits
1898 12:51:16.059267 call enable_fixed_mtrr()
1899 12:51:16.062613 MTRR: Fixed MSR 0x250 0x0606060606060606
1900 12:51:16.065453 MTRR: Fixed MSR 0x250 0x0606060606060606
1901 12:51:16.072185 MTRR: Fixed MSR 0x258 0x0606060606060606
1902 12:51:16.075627 MTRR: Fixed MSR 0x259 0x0000000000000000
1903 12:51:16.078633 MTRR: Fixed MSR 0x268 0x0606060606060606
1904 12:51:16.082068 MTRR: Fixed MSR 0x269 0x0606060606060606
1905 12:51:16.088420 MTRR: Fixed MSR 0x26a 0x0606060606060606
1906 12:51:16.091818 MTRR: Fixed MSR 0x26b 0x0606060606060606
1907 12:51:16.095424 MTRR: Fixed MSR 0x26c 0x0606060606060606
1908 12:51:16.098311 MTRR: Fixed MSR 0x26d 0x0606060606060606
1909 12:51:16.105437 MTRR: Fixed MSR 0x26e 0x0606060606060606
1910 12:51:16.108729 MTRR: Fixed MSR 0x26f 0x0606060606060606
1911 12:51:16.111715 MTRR: Fixed MSR 0x258 0x0606060606060606
1912 12:51:16.115068 call enable_fixed_mtrr()
1913 12:51:16.118563 MTRR: Fixed MSR 0x259 0x0000000000000000
1914 12:51:16.121688 MTRR: Fixed MSR 0x268 0x0606060606060606
1915 12:51:16.128150 MTRR: Fixed MSR 0x269 0x0606060606060606
1916 12:51:16.131515 MTRR: Fixed MSR 0x26a 0x0606060606060606
1917 12:51:16.135195 MTRR: Fixed MSR 0x26b 0x0606060606060606
1918 12:51:16.138101 MTRR: Fixed MSR 0x26c 0x0606060606060606
1919 12:51:16.145143 MTRR: Fixed MSR 0x26d 0x0606060606060606
1920 12:51:16.147928 MTRR: Fixed MSR 0x26e 0x0606060606060606
1921 12:51:16.151698 MTRR: Fixed MSR 0x26f 0x0606060606060606
1922 12:51:16.154401 CPU physical address size: 39 bits
1923 12:51:16.158025 call enable_fixed_mtrr()
1924 12:51:16.161393 MTRR: Fixed MSR 0x250 0x0606060606060606
1925 12:51:16.168102 MTRR: Fixed MSR 0x250 0x0606060606060606
1926 12:51:16.170989 MTRR: Fixed MSR 0x258 0x0606060606060606
1927 12:51:16.174942 MTRR: Fixed MSR 0x259 0x0000000000000000
1928 12:51:16.177718 MTRR: Fixed MSR 0x268 0x0606060606060606
1929 12:51:16.181045 MTRR: Fixed MSR 0x269 0x0606060606060606
1930 12:51:16.187442 MTRR: Fixed MSR 0x26a 0x0606060606060606
1931 12:51:16.191004 MTRR: Fixed MSR 0x26b 0x0606060606060606
1932 12:51:16.194427 MTRR: Fixed MSR 0x26c 0x0606060606060606
1933 12:51:16.197554 MTRR: Fixed MSR 0x26d 0x0606060606060606
1934 12:51:16.204528 MTRR: Fixed MSR 0x26e 0x0606060606060606
1935 12:51:16.207574 MTRR: Fixed MSR 0x26f 0x0606060606060606
1936 12:51:16.211069 MTRR: Fixed MSR 0x258 0x0606060606060606
1937 12:51:16.214123 call enable_fixed_mtrr()
1938 12:51:16.217689 MTRR: Fixed MSR 0x259 0x0000000000000000
1939 12:51:16.221088 MTRR: Fixed MSR 0x268 0x0606060606060606
1940 12:51:16.227520 MTRR: Fixed MSR 0x269 0x0606060606060606
1941 12:51:16.230923 MTRR: Fixed MSR 0x26a 0x0606060606060606
1942 12:51:16.233828 MTRR: Fixed MSR 0x26b 0x0606060606060606
1943 12:51:16.237774 MTRR: Fixed MSR 0x26c 0x0606060606060606
1944 12:51:16.243549 MTRR: Fixed MSR 0x26d 0x0606060606060606
1945 12:51:16.247235 MTRR: Fixed MSR 0x26e 0x0606060606060606
1946 12:51:16.250241 MTRR: Fixed MSR 0x26f 0x0606060606060606
1947 12:51:16.253641 CPU physical address size: 39 bits
1948 12:51:16.256927 call enable_fixed_mtrr()
1949 12:51:16.260500 CPU physical address size: 39 bits
1950 12:51:16.264559 CPU physical address size: 39 bits
1951 12:51:16.267143 CPU physical address size: 39 bits
1952 12:51:16.270217 CBFS @ c08000 size 3f8000
1953 12:51:16.277176 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1954 12:51:16.280542 CBFS: Locating 'fallback/payload'
1955 12:51:16.284033 CBFS: Found @ offset 1c96c0 size 3f798
1956 12:51:16.290498 Checking segment from ROM address 0xffdd16f8
1957 12:51:16.293756 Checking segment from ROM address 0xffdd1714
1958 12:51:16.297075 Loading segment from ROM address 0xffdd16f8
1959 12:51:16.300253 code (compression=0)
1960 12:51:16.310273 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1961 12:51:16.316906 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1962 12:51:16.319851 it's not compressed!
1963 12:51:16.412122 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1964 12:51:16.418245 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1965 12:51:16.421919 Loading segment from ROM address 0xffdd1714
1966 12:51:16.424747 Entry Point 0x30000000
1967 12:51:16.429913 Loaded segments
1968 12:51:16.434223 Finalizing chipset.
1969 12:51:16.437058 Finalizing SMM.
1970 12:51:16.440921 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
1971 12:51:16.443341 mp_park_aps done after 0 msecs.
1972 12:51:16.450041 Jumping to boot code at 30000000(99b62000)
1973 12:51:16.456878 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1974 12:51:16.457428
1975 12:51:16.457790
1976 12:51:16.458126
1977 12:51:16.460299 Starting depthcharge on Helios...
1978 12:51:16.460851
1979 12:51:16.462044 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
1980 12:51:16.462637 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
1981 12:51:16.463085 Setting prompt string to ['hatch:']
1982 12:51:16.463504 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
1983 12:51:16.470696 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1984 12:51:16.471248
1985 12:51:16.476098 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1986 12:51:16.476654
1987 12:51:16.482830 board_setup: Info: eMMC controller not present; skipping
1988 12:51:16.483387
1989 12:51:16.486619 New NVMe Controller 0x30053ac0 @ 00:1d:00
1990 12:51:16.487174
1991 12:51:16.492970 board_setup: Info: SDHCI controller not present; skipping
1992 12:51:16.493533
1993 12:51:16.499273 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1994 12:51:16.499747
1995 12:51:16.500107 Wipe memory regions:
1996 12:51:16.500542
1997 12:51:16.503043 [0x00000000001000, 0x000000000a0000)
1998 12:51:16.503496
1999 12:51:16.509166 [0x00000000100000, 0x00000030000000)
2000 12:51:16.572186
2001 12:51:16.575224 [0x00000030657430, 0x00000099a2c000)
2002 12:51:16.712727
2003 12:51:16.715706 [0x00000100000000, 0x0000045e800000)
2004 12:51:18.099150
2005 12:51:18.099811 R8152: Initializing
2006 12:51:18.100350
2007 12:51:18.102157 Version 9 (ocp_data = 6010)
2008 12:51:18.106177
2009 12:51:18.106675 R8152: Done initializing
2010 12:51:18.107048
2011 12:51:18.109482 Adding net device
2012 12:51:18.718684
2013 12:51:18.719224 R8152: Initializing
2014 12:51:18.719588
2015 12:51:18.722178 Version 6 (ocp_data = 5c30)
2016 12:51:18.722668
2017 12:51:18.725104 R8152: Done initializing
2018 12:51:18.725181
2019 12:51:18.728822 net_add_device: Attemp to include the same device
2020 12:51:18.732098
2021 12:51:18.738988 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2022 12:51:18.739157
2023 12:51:18.739234
2024 12:51:18.739302
2025 12:51:18.739607 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2027 12:51:18.840389 hatch: tftpboot 192.168.201.1 11602086/tftp-deploy-0wmdosp3/kernel/bzImage 11602086/tftp-deploy-0wmdosp3/kernel/cmdline 11602086/tftp-deploy-0wmdosp3/ramdisk/ramdisk.cpio.gz
2028 12:51:18.841062 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2029 12:51:18.841506 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2030 12:51:18.845922 tftpboot 192.168.201.1 11602086/tftp-deploy-0wmdosp3/kernel/bzIloy-0wmdosp3/kernel/cmdline 11602086/tftp-deploy-0wmdosp3/ramdisk/ramdisk.cpio.gz
2031 12:51:18.846497
2032 12:51:18.846898 Waiting for link
2033 12:51:19.047388
2034 12:51:19.047934 done.
2035 12:51:19.048299
2036 12:51:19.048717 MAC: 00:24:32:50:1a:5f
2037 12:51:19.049064
2038 12:51:19.050154 Sending DHCP discover... done.
2039 12:51:19.050645
2040 12:51:19.053308 Waiting for reply... done.
2041 12:51:19.053760
2042 12:51:19.056861 Sending DHCP request... done.
2043 12:51:19.057310
2044 12:51:19.060177 Waiting for reply... done.
2045 12:51:19.060628
2046 12:51:19.063083 My ip is 192.168.201.21
2047 12:51:19.063557
2048 12:51:19.066471 The DHCP server ip is 192.168.201.1
2049 12:51:19.066987
2050 12:51:19.070085 TFTP server IP predefined by user: 192.168.201.1
2051 12:51:19.070597
2052 12:51:19.076496 Bootfile predefined by user: 11602086/tftp-deploy-0wmdosp3/kernel/bzImage
2053 12:51:19.076973
2054 12:51:19.080274 Sending tftp read request... done.
2055 12:51:19.080849
2056 12:51:19.090434 Waiting for the transfer...
2057 12:51:19.091043
2058 12:51:19.814654 00000000 ################################################################
2059 12:51:19.815218
2060 12:51:20.515497 00080000 ################################################################
2061 12:51:20.516065
2062 12:51:21.207556 00100000 ################################################################
2063 12:51:21.208126
2064 12:51:21.923890 00180000 ################################################################
2065 12:51:21.924436
2066 12:51:22.631103 00200000 ################################################################
2067 12:51:22.631665
2068 12:51:23.329909 00280000 ################################################################
2069 12:51:23.330486
2070 12:51:24.043839 00300000 ################################################################
2071 12:51:24.044406
2072 12:51:24.767232 00380000 ################################################################
2073 12:51:24.767826
2074 12:51:25.501889 00400000 ################################################################
2075 12:51:25.502468
2076 12:51:26.216166 00480000 ################################################################
2077 12:51:26.216788
2078 12:51:26.941063 00500000 ################################################################
2079 12:51:26.941679
2080 12:51:27.659182 00580000 ################################################################
2081 12:51:27.659781
2082 12:51:28.394293 00600000 ################################################################
2083 12:51:28.394957
2084 12:51:29.132530 00680000 ################################################################
2085 12:51:29.133086
2086 12:51:29.854916 00700000 ################################################################
2087 12:51:29.855478
2088 12:51:30.583010 00780000 ################################################################
2089 12:51:30.583617
2090 12:51:31.322662 00800000 ################################################################
2091 12:51:31.323225
2092 12:51:32.040499 00880000 ################################################################
2093 12:51:32.041065
2094 12:51:32.785465 00900000 ################################################################
2095 12:51:32.786024
2096 12:51:33.521198 00980000 ################################################################
2097 12:51:33.521769
2098 12:51:34.237641 00a00000 ################################################################
2099 12:51:34.238216
2100 12:51:34.870731 00a80000 ######################################################### done.
2101 12:51:34.871279
2102 12:51:34.874204 The bootfile was 11473408 bytes long.
2103 12:51:34.874829
2104 12:51:34.877245 Sending tftp read request... done.
2105 12:51:34.877703
2106 12:51:34.881030 Waiting for the transfer...
2107 12:51:34.881583
2108 12:51:35.593384 00000000 ################################################################
2109 12:51:35.593963
2110 12:51:36.309884 00080000 ################################################################
2111 12:51:36.310445
2112 12:51:37.049662 00100000 ################################################################
2113 12:51:37.050212
2114 12:51:37.769114 00180000 ################################################################
2115 12:51:37.769921
2116 12:51:38.497997 00200000 ################################################################
2117 12:51:38.498601
2118 12:51:39.191253 00280000 ################################################################
2119 12:51:39.191918
2120 12:51:39.866816 00300000 ################################################################
2121 12:51:39.867348
2122 12:51:40.566697 00380000 ################################################################
2123 12:51:40.567211
2124 12:51:41.266849 00400000 ################################################################
2125 12:51:41.267416
2126 12:51:41.999322 00480000 ################################################################
2127 12:51:41.999842
2128 12:51:42.727134 00500000 ################################################################
2129 12:51:42.727703
2130 12:51:43.449994 00580000 ################################################################
2131 12:51:43.450603
2132 12:51:44.178941 00600000 ################################################################
2133 12:51:44.179529
2134 12:51:44.912484 00680000 ################################################################
2135 12:51:44.913065
2136 12:51:45.643573 00700000 ################################################################
2137 12:51:45.644136
2138 12:51:46.368997 00780000 ################################################################
2139 12:51:46.369570
2140 12:51:47.081608 00800000 ################################################################
2141 12:51:47.082133
2142 12:51:47.470002 00880000 ##################################### done.
2143 12:51:47.470761
2144 12:51:47.472853 Sending tftp read request... done.
2145 12:51:47.473318
2146 12:51:47.477013 Waiting for the transfer...
2147 12:51:47.477477
2148 12:51:47.477844 00000000 # done.
2149 12:51:47.479415
2150 12:51:47.486834 Command line loaded dynamically from TFTP file: 11602086/tftp-deploy-0wmdosp3/kernel/cmdline
2151 12:51:47.487416
2152 12:51:47.506101 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2153 12:51:47.506724
2154 12:51:47.512804 ec_init(0): CrosEC protocol v3 supported (256, 256)
2155 12:51:47.518994
2156 12:51:47.521651 Shutting down all USB controllers.
2157 12:51:47.522116
2158 12:51:47.522480 Removing current net device
2159 12:51:47.529072
2160 12:51:47.529553 Finalizing coreboot
2161 12:51:47.529981
2162 12:51:47.535725 Exiting depthcharge with code 4 at timestamp: 38480115
2163 12:51:47.536277
2164 12:51:47.536646
2165 12:51:47.536988 Starting kernel ...
2166 12:51:47.537315
2167 12:51:47.538747 end: 2.2.4 bootloader-commands (duration 00:00:31) [common]
2168 12:51:47.539322 start: 2.2.5 auto-login-action (timeout 00:04:11) [common]
2169 12:51:47.539741 Setting prompt string to ['Linux version [0-9]']
2170 12:51:47.540128 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2171 12:51:47.540509 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2172 12:51:47.541395
2174 12:55:58.540333 end: 2.2.5 auto-login-action (duration 00:04:11) [common]
2176 12:55:58.541427 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 251 seconds'
2178 12:55:58.542061 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2181 12:55:58.542323 end: 2 depthcharge-action (duration 00:05:00) [common]
2183 12:55:58.542572 Cleaning after the job
2184 12:55:58.542681 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11602086/tftp-deploy-0wmdosp3/ramdisk
2185 12:55:58.544088 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11602086/tftp-deploy-0wmdosp3/kernel
2186 12:55:58.545704 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11602086/tftp-deploy-0wmdosp3/modules
2187 12:55:58.546444 start: 5.1 power-off (timeout 00:00:30) [common]
2188 12:55:58.546643 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2189 12:55:58.626755 >> Command sent successfully.
2190 12:55:58.632184 Returned 0 in 0 seconds
2191 12:55:58.733217 end: 5.1 power-off (duration 00:00:00) [common]
2193 12:55:58.734800 start: 5.2 read-feedback (timeout 00:10:00) [common]
2194 12:55:58.736145 Listened to connection for namespace 'common' for up to 1s
2196 12:55:58.737504 Listened to connection for namespace 'common' for up to 1s
2197 12:55:59.736951 Finalising connection for namespace 'common'
2198 12:55:59.737617 Disconnecting from shell: Finalise
2199 12:55:59.738018
2200 12:55:59.839349 end: 5.2 read-feedback (duration 00:00:01) [common]
2201 12:55:59.839939 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11602086
2202 12:55:59.860458 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11602086
2203 12:55:59.860594 JobError: Your job cannot terminate cleanly.