Boot log: asus-C436FA-Flip-hatch
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 12:52:04.799766 lava-dispatcher, installed at version: 2023.06
2 12:52:04.799978 start: 0 validate
3 12:52:04.800108 Start time: 2023-09-23 12:52:04.800099+00:00 (UTC)
4 12:52:04.800242 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:52:04.800397 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 12:52:05.067951 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:52:05.068149 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.292-cip102-406-g9efaa60a8cb4%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:52:09.568954 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:52:09.569211 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:52:09.834802 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:52:09.835046 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.292-cip102-406-g9efaa60a8cb4%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:52:10.339779 validate duration: 5.54
14 12:52:10.340029 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:52:10.340127 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:52:10.340213 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:52:10.340359 Not decompressing ramdisk as can be used compressed.
18 12:52:10.340446 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 12:52:10.340510 saving as /var/lib/lava/dispatcher/tmp/11602057/tftp-deploy-ac4sq2uh/ramdisk/initrd.cpio.gz
20 12:52:10.340576 total size: 5432690 (5 MB)
21 12:52:10.341746 progress 0 % (0 MB)
22 12:52:10.343465 progress 5 % (0 MB)
23 12:52:10.344981 progress 10 % (0 MB)
24 12:52:10.346403 progress 15 % (0 MB)
25 12:52:10.348038 progress 20 % (1 MB)
26 12:52:10.349657 progress 25 % (1 MB)
27 12:52:10.351113 progress 30 % (1 MB)
28 12:52:10.352749 progress 35 % (1 MB)
29 12:52:10.354236 progress 40 % (2 MB)
30 12:52:10.355758 progress 45 % (2 MB)
31 12:52:10.357190 progress 50 % (2 MB)
32 12:52:10.358810 progress 55 % (2 MB)
33 12:52:10.360279 progress 60 % (3 MB)
34 12:52:10.361775 progress 65 % (3 MB)
35 12:52:10.363400 progress 70 % (3 MB)
36 12:52:10.364928 progress 75 % (3 MB)
37 12:52:10.366317 progress 80 % (4 MB)
38 12:52:10.367808 progress 85 % (4 MB)
39 12:52:10.369429 progress 90 % (4 MB)
40 12:52:10.370887 progress 95 % (4 MB)
41 12:52:10.372370 progress 100 % (5 MB)
42 12:52:10.372583 5 MB downloaded in 0.03 s (161.88 MB/s)
43 12:52:10.372755 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:52:10.373009 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:52:10.373095 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:52:10.373179 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:52:10.373325 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.292-cip102-406-g9efaa60a8cb4/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:52:10.373398 saving as /var/lib/lava/dispatcher/tmp/11602057/tftp-deploy-ac4sq2uh/kernel/bzImage
50 12:52:10.373459 total size: 11473408 (10 MB)
51 12:52:10.373520 No compression specified
52 12:52:10.374621 progress 0 % (0 MB)
53 12:52:10.377802 progress 5 % (0 MB)
54 12:52:10.381064 progress 10 % (1 MB)
55 12:52:10.384048 progress 15 % (1 MB)
56 12:52:10.387195 progress 20 % (2 MB)
57 12:52:10.390275 progress 25 % (2 MB)
58 12:52:10.393484 progress 30 % (3 MB)
59 12:52:10.396479 progress 35 % (3 MB)
60 12:52:10.399712 progress 40 % (4 MB)
61 12:52:10.402658 progress 45 % (4 MB)
62 12:52:10.405926 progress 50 % (5 MB)
63 12:52:10.408928 progress 55 % (6 MB)
64 12:52:10.412088 progress 60 % (6 MB)
65 12:52:10.415014 progress 65 % (7 MB)
66 12:52:10.418131 progress 70 % (7 MB)
67 12:52:10.421055 progress 75 % (8 MB)
68 12:52:10.424207 progress 80 % (8 MB)
69 12:52:10.427155 progress 85 % (9 MB)
70 12:52:10.430200 progress 90 % (9 MB)
71 12:52:10.433266 progress 95 % (10 MB)
72 12:52:10.436383 progress 100 % (10 MB)
73 12:52:10.436508 10 MB downloaded in 0.06 s (173.56 MB/s)
74 12:52:10.436655 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:52:10.436891 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:52:10.436975 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:52:10.437062 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:52:10.437203 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 12:52:10.437270 saving as /var/lib/lava/dispatcher/tmp/11602057/tftp-deploy-ac4sq2uh/nfsrootfs/full.rootfs.tar
81 12:52:10.437330 total size: 133380384 (127 MB)
82 12:52:10.437392 Using unxz to decompress xz
83 12:52:10.441806 progress 0 % (0 MB)
84 12:52:10.790255 progress 5 % (6 MB)
85 12:52:11.146980 progress 10 % (12 MB)
86 12:52:11.443730 progress 15 % (19 MB)
87 12:52:11.635412 progress 20 % (25 MB)
88 12:52:11.884923 progress 25 % (31 MB)
89 12:52:12.237126 progress 30 % (38 MB)
90 12:52:12.588360 progress 35 % (44 MB)
91 12:52:12.999364 progress 40 % (50 MB)
92 12:52:13.407288 progress 45 % (57 MB)
93 12:52:13.777088 progress 50 % (63 MB)
94 12:52:14.184516 progress 55 % (69 MB)
95 12:52:14.575076 progress 60 % (76 MB)
96 12:52:14.972353 progress 65 % (82 MB)
97 12:52:15.359813 progress 70 % (89 MB)
98 12:52:15.737082 progress 75 % (95 MB)
99 12:52:16.182482 progress 80 % (101 MB)
100 12:52:16.623411 progress 85 % (108 MB)
101 12:52:16.898291 progress 90 % (114 MB)
102 12:52:17.247527 progress 95 % (120 MB)
103 12:52:17.645765 progress 100 % (127 MB)
104 12:52:17.651196 127 MB downloaded in 7.21 s (17.63 MB/s)
105 12:52:17.651515 end: 1.3.1 http-download (duration 00:00:07) [common]
107 12:52:17.651916 end: 1.3 download-retry (duration 00:00:07) [common]
108 12:52:17.652043 start: 1.4 download-retry (timeout 00:09:53) [common]
109 12:52:17.652172 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 12:52:17.652380 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.292-cip102-406-g9efaa60a8cb4/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:52:17.652487 saving as /var/lib/lava/dispatcher/tmp/11602057/tftp-deploy-ac4sq2uh/modules/modules.tar
112 12:52:17.652582 total size: 484692 (0 MB)
113 12:52:17.652680 Using unxz to decompress xz
114 12:52:17.657942 progress 6 % (0 MB)
115 12:52:17.658501 progress 13 % (0 MB)
116 12:52:17.658869 progress 20 % (0 MB)
117 12:52:17.660335 progress 27 % (0 MB)
118 12:52:17.662372 progress 33 % (0 MB)
119 12:52:17.664201 progress 40 % (0 MB)
120 12:52:17.666262 progress 47 % (0 MB)
121 12:52:17.668243 progress 54 % (0 MB)
122 12:52:17.670243 progress 60 % (0 MB)
123 12:52:17.672728 progress 67 % (0 MB)
124 12:52:17.674744 progress 74 % (0 MB)
125 12:52:17.676775 progress 81 % (0 MB)
126 12:52:17.678984 progress 87 % (0 MB)
127 12:52:17.680726 progress 94 % (0 MB)
128 12:52:17.682887 progress 100 % (0 MB)
129 12:52:17.689024 0 MB downloaded in 0.04 s (12.69 MB/s)
130 12:52:17.689326 end: 1.4.1 http-download (duration 00:00:00) [common]
132 12:52:17.689707 end: 1.4 download-retry (duration 00:00:00) [common]
133 12:52:17.689838 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
134 12:52:17.689973 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
135 12:52:20.129749 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11602057/extract-nfsrootfs-94n83t61
136 12:52:20.129983 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
137 12:52:20.130121 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
138 12:52:20.130329 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11602057/lava-overlay-g8ztzip3
139 12:52:20.130499 makedir: /var/lib/lava/dispatcher/tmp/11602057/lava-overlay-g8ztzip3/lava-11602057/bin
140 12:52:20.130633 makedir: /var/lib/lava/dispatcher/tmp/11602057/lava-overlay-g8ztzip3/lava-11602057/tests
141 12:52:20.130765 makedir: /var/lib/lava/dispatcher/tmp/11602057/lava-overlay-g8ztzip3/lava-11602057/results
142 12:52:20.130897 Creating /var/lib/lava/dispatcher/tmp/11602057/lava-overlay-g8ztzip3/lava-11602057/bin/lava-add-keys
143 12:52:20.131077 Creating /var/lib/lava/dispatcher/tmp/11602057/lava-overlay-g8ztzip3/lava-11602057/bin/lava-add-sources
144 12:52:20.131239 Creating /var/lib/lava/dispatcher/tmp/11602057/lava-overlay-g8ztzip3/lava-11602057/bin/lava-background-process-start
145 12:52:20.131401 Creating /var/lib/lava/dispatcher/tmp/11602057/lava-overlay-g8ztzip3/lava-11602057/bin/lava-background-process-stop
146 12:52:20.131561 Creating /var/lib/lava/dispatcher/tmp/11602057/lava-overlay-g8ztzip3/lava-11602057/bin/lava-common-functions
147 12:52:20.131760 Creating /var/lib/lava/dispatcher/tmp/11602057/lava-overlay-g8ztzip3/lava-11602057/bin/lava-echo-ipv4
148 12:52:20.131919 Creating /var/lib/lava/dispatcher/tmp/11602057/lava-overlay-g8ztzip3/lava-11602057/bin/lava-install-packages
149 12:52:20.132079 Creating /var/lib/lava/dispatcher/tmp/11602057/lava-overlay-g8ztzip3/lava-11602057/bin/lava-installed-packages
150 12:52:20.132234 Creating /var/lib/lava/dispatcher/tmp/11602057/lava-overlay-g8ztzip3/lava-11602057/bin/lava-os-build
151 12:52:20.132396 Creating /var/lib/lava/dispatcher/tmp/11602057/lava-overlay-g8ztzip3/lava-11602057/bin/lava-probe-channel
152 12:52:20.132554 Creating /var/lib/lava/dispatcher/tmp/11602057/lava-overlay-g8ztzip3/lava-11602057/bin/lava-probe-ip
153 12:52:20.132713 Creating /var/lib/lava/dispatcher/tmp/11602057/lava-overlay-g8ztzip3/lava-11602057/bin/lava-target-ip
154 12:52:20.132869 Creating /var/lib/lava/dispatcher/tmp/11602057/lava-overlay-g8ztzip3/lava-11602057/bin/lava-target-mac
155 12:52:20.133027 Creating /var/lib/lava/dispatcher/tmp/11602057/lava-overlay-g8ztzip3/lava-11602057/bin/lava-target-storage
156 12:52:20.133186 Creating /var/lib/lava/dispatcher/tmp/11602057/lava-overlay-g8ztzip3/lava-11602057/bin/lava-test-case
157 12:52:20.133347 Creating /var/lib/lava/dispatcher/tmp/11602057/lava-overlay-g8ztzip3/lava-11602057/bin/lava-test-event
158 12:52:20.133504 Creating /var/lib/lava/dispatcher/tmp/11602057/lava-overlay-g8ztzip3/lava-11602057/bin/lava-test-feedback
159 12:52:20.133710 Creating /var/lib/lava/dispatcher/tmp/11602057/lava-overlay-g8ztzip3/lava-11602057/bin/lava-test-raise
160 12:52:20.133870 Creating /var/lib/lava/dispatcher/tmp/11602057/lava-overlay-g8ztzip3/lava-11602057/bin/lava-test-reference
161 12:52:20.134032 Creating /var/lib/lava/dispatcher/tmp/11602057/lava-overlay-g8ztzip3/lava-11602057/bin/lava-test-runner
162 12:52:20.134188 Creating /var/lib/lava/dispatcher/tmp/11602057/lava-overlay-g8ztzip3/lava-11602057/bin/lava-test-set
163 12:52:20.134347 Creating /var/lib/lava/dispatcher/tmp/11602057/lava-overlay-g8ztzip3/lava-11602057/bin/lava-test-shell
164 12:52:20.134506 Updating /var/lib/lava/dispatcher/tmp/11602057/lava-overlay-g8ztzip3/lava-11602057/bin/lava-install-packages (oe)
165 12:52:20.134702 Updating /var/lib/lava/dispatcher/tmp/11602057/lava-overlay-g8ztzip3/lava-11602057/bin/lava-installed-packages (oe)
166 12:52:20.134892 Creating /var/lib/lava/dispatcher/tmp/11602057/lava-overlay-g8ztzip3/lava-11602057/environment
167 12:52:20.135053 LAVA metadata
168 12:52:20.135178 - LAVA_JOB_ID=11602057
169 12:52:20.135294 - LAVA_DISPATCHER_IP=192.168.201.1
170 12:52:20.135461 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
171 12:52:20.135576 skipped lava-vland-overlay
172 12:52:20.135823 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 12:52:20.135967 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
174 12:52:20.136082 skipped lava-multinode-overlay
175 12:52:20.136212 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 12:52:20.136351 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
177 12:52:20.136483 Loading test definitions
178 12:52:20.136636 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
179 12:52:20.136762 Using /lava-11602057 at stage 0
180 12:52:20.137290 uuid=11602057_1.5.2.3.1 testdef=None
181 12:52:20.137433 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
182 12:52:20.137579 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
183 12:52:20.138518 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
185 12:52:20.138868 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
186 12:52:20.145865 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
188 12:52:20.146327 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
189 12:52:20.147454 runner path: /var/lib/lava/dispatcher/tmp/11602057/lava-overlay-g8ztzip3/lava-11602057/0/tests/0_dmesg test_uuid 11602057_1.5.2.3.1
190 12:52:20.147920 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
192 12:52:20.148378 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
193 12:52:20.148503 Using /lava-11602057 at stage 1
194 12:52:20.149046 uuid=11602057_1.5.2.3.5 testdef=None
195 12:52:20.149171 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
196 12:52:20.149290 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
197 12:52:20.149989 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
199 12:52:20.150336 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
200 12:52:20.156564 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
202 12:52:20.157109 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
203 12:52:20.158257 runner path: /var/lib/lava/dispatcher/tmp/11602057/lava-overlay-g8ztzip3/lava-11602057/1/tests/1_bootrr test_uuid 11602057_1.5.2.3.5
204 12:52:20.158490 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
206 12:52:20.158890 Creating lava-test-runner.conf files
207 12:52:20.158987 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11602057/lava-overlay-g8ztzip3/lava-11602057/0 for stage 0
208 12:52:20.159109 - 0_dmesg
209 12:52:20.159222 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11602057/lava-overlay-g8ztzip3/lava-11602057/1 for stage 1
210 12:52:20.159384 - 1_bootrr
211 12:52:20.159511 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
212 12:52:20.159658 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
213 12:52:20.170194 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
214 12:52:20.170345 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
215 12:52:20.170460 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
216 12:52:20.170580 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
217 12:52:20.170695 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
218 12:52:20.315448 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
219 12:52:20.315995 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
220 12:52:20.316174 extracting modules file /var/lib/lava/dispatcher/tmp/11602057/tftp-deploy-ac4sq2uh/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11602057/extract-nfsrootfs-94n83t61
221 12:52:20.347109 extracting modules file /var/lib/lava/dispatcher/tmp/11602057/tftp-deploy-ac4sq2uh/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11602057/extract-overlay-ramdisk-bulef_qh/ramdisk
222 12:52:20.380601 end: 1.5.4 extract-modules (duration 00:00:00) [common]
223 12:52:20.380843 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
224 12:52:20.380966 [common] Applying overlay to NFS
225 12:52:20.381067 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11602057/compress-overlay-ubhrur00/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11602057/extract-nfsrootfs-94n83t61
226 12:52:20.392316 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
227 12:52:20.392435 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
228 12:52:20.392527 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
229 12:52:20.392618 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
230 12:52:20.392696 Building ramdisk /var/lib/lava/dispatcher/tmp/11602057/extract-overlay-ramdisk-bulef_qh/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11602057/extract-overlay-ramdisk-bulef_qh/ramdisk
231 12:52:20.474423 >> 30353 blocks
232 12:52:21.064085 rename /var/lib/lava/dispatcher/tmp/11602057/extract-overlay-ramdisk-bulef_qh/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11602057/tftp-deploy-ac4sq2uh/ramdisk/ramdisk.cpio.gz
233 12:52:21.064539 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
234 12:52:21.064664 start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
235 12:52:21.064771 start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
236 12:52:21.064868 No mkimage arch provided, not using FIT.
237 12:52:21.064958 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
238 12:52:21.065047 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
239 12:52:21.065152 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
240 12:52:21.065246 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:49) [common]
241 12:52:21.065347 No LXC device requested
242 12:52:21.065445 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
243 12:52:21.065530 start: 1.7 deploy-device-env (timeout 00:09:49) [common]
244 12:52:21.065612 end: 1.7 deploy-device-env (duration 00:00:00) [common]
245 12:52:21.065693 Checking files for TFTP limit of 4294967296 bytes.
246 12:52:21.066103 end: 1 tftp-deploy (duration 00:00:11) [common]
247 12:52:21.066204 start: 2 depthcharge-action (timeout 00:05:00) [common]
248 12:52:21.066296 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
249 12:52:21.066424 substitutions:
250 12:52:21.066494 - {DTB}: None
251 12:52:21.066557 - {INITRD}: 11602057/tftp-deploy-ac4sq2uh/ramdisk/ramdisk.cpio.gz
252 12:52:21.066617 - {KERNEL}: 11602057/tftp-deploy-ac4sq2uh/kernel/bzImage
253 12:52:21.066675 - {LAVA_MAC}: None
254 12:52:21.066733 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11602057/extract-nfsrootfs-94n83t61
255 12:52:21.066791 - {NFS_SERVER_IP}: 192.168.201.1
256 12:52:21.066848 - {PRESEED_CONFIG}: None
257 12:52:21.066904 - {PRESEED_LOCAL}: None
258 12:52:21.066959 - {RAMDISK}: 11602057/tftp-deploy-ac4sq2uh/ramdisk/ramdisk.cpio.gz
259 12:52:21.067015 - {ROOT_PART}: None
260 12:52:21.067071 - {ROOT}: None
261 12:52:21.067127 - {SERVER_IP}: 192.168.201.1
262 12:52:21.067182 - {TEE}: None
263 12:52:21.067236 Parsed boot commands:
264 12:52:21.067290 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
265 12:52:21.067474 Parsed boot commands: tftpboot 192.168.201.1 11602057/tftp-deploy-ac4sq2uh/kernel/bzImage 11602057/tftp-deploy-ac4sq2uh/kernel/cmdline 11602057/tftp-deploy-ac4sq2uh/ramdisk/ramdisk.cpio.gz
266 12:52:21.067566 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
267 12:52:21.067677 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
268 12:52:21.067787 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
269 12:52:21.067876 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
270 12:52:21.067947 Not connected, no need to disconnect.
271 12:52:21.068022 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
272 12:52:21.068103 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
273 12:52:21.068170 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-3'
274 12:52:21.072243 Setting prompt string to ['lava-test: # ']
275 12:52:21.072614 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
276 12:52:21.072728 end: 2.2.1 reset-connection (duration 00:00:00) [common]
277 12:52:21.072829 start: 2.2.2 reset-device (timeout 00:05:00) [common]
278 12:52:21.072937 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
279 12:52:21.073358 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
280 12:52:26.207139 >> Command sent successfully.
281 12:52:26.210606 Returned 0 in 5 seconds
282 12:52:26.311077 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
284 12:52:26.311568 end: 2.2.2 reset-device (duration 00:00:05) [common]
285 12:52:26.311732 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
286 12:52:26.311871 Setting prompt string to 'Starting depthcharge on Helios...'
287 12:52:26.311994 Changing prompt to 'Starting depthcharge on Helios...'
288 12:52:26.312113 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
289 12:52:26.312510 [Enter `^Ec?' for help]
290 12:52:26.931054
291 12:52:26.931274
292 12:52:26.941164 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
293 12:52:26.944465 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
294 12:52:26.951366 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
295 12:52:26.954658 CPU: AES supported, TXT NOT supported, VT supported
296 12:52:26.961512 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
297 12:52:26.964722 PCH: device id 0284 (rev 00) is Cometlake-U Premium
298 12:52:26.971483 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
299 12:52:26.974762 VBOOT: Loading verstage.
300 12:52:26.978268 FMAP: Found "FLASH" version 1.1 at 0xc04000.
301 12:52:26.984632 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
302 12:52:26.988048 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
303 12:52:26.991351 CBFS @ c08000 size 3f8000
304 12:52:26.998207 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
305 12:52:27.001451 CBFS: Locating 'fallback/verstage'
306 12:52:27.004812 CBFS: Found @ offset 10fb80 size 1072c
307 12:52:27.004904
308 12:52:27.004972
309 12:52:27.018316 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
310 12:52:27.031992 Probing TPM: . done!
311 12:52:27.035092 TPM ready after 0 ms
312 12:52:27.038594 Connected to device vid:did:rid of 1ae0:0028:00
313 12:52:27.048947 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
314 12:52:27.052257 Initialized TPM device CR50 revision 0
315 12:52:27.097119 tlcl_send_startup: Startup return code is 0
316 12:52:27.097269 TPM: setup succeeded
317 12:52:27.109350 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
318 12:52:27.113331 Chrome EC: UHEPI supported
319 12:52:27.116671 Phase 1
320 12:52:27.120110 FMAP: area GBB found @ c05000 (12288 bytes)
321 12:52:27.126801 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
322 12:52:27.126931 Phase 2
323 12:52:27.130180 Phase 3
324 12:52:27.133781 FMAP: area GBB found @ c05000 (12288 bytes)
325 12:52:27.140189 VB2:vb2_report_dev_firmware() This is developer signed firmware
326 12:52:27.146706 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
327 12:52:27.149821 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
328 12:52:27.156423 VB2:vb2_verify_keyblock() Checking keyblock signature...
329 12:52:27.172010 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
330 12:52:27.175507 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
331 12:52:27.182161 VB2:vb2_verify_fw_preamble() Verifying preamble.
332 12:52:27.186135 Phase 4
333 12:52:27.189691 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
334 12:52:27.196026 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
335 12:52:27.375947 VB2:vb2_rsa_verify_digest() Digest check failed!
336 12:52:27.382391 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
337 12:52:27.382549 Saving nvdata
338 12:52:27.385528 Reboot requested (10020007)
339 12:52:27.389145 board_reset() called!
340 12:52:27.389285 full_reset() called!
341 12:52:31.897578
342 12:52:31.897716
343 12:52:31.907699 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
344 12:52:31.911277 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
345 12:52:31.918149 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
346 12:52:31.921098 CPU: AES supported, TXT NOT supported, VT supported
347 12:52:31.927525 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
348 12:52:31.930735 PCH: device id 0284 (rev 00) is Cometlake-U Premium
349 12:52:31.937779 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
350 12:52:31.941075 VBOOT: Loading verstage.
351 12:52:31.944104 FMAP: Found "FLASH" version 1.1 at 0xc04000.
352 12:52:31.950494 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
353 12:52:31.957235 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
354 12:52:31.957376 CBFS @ c08000 size 3f8000
355 12:52:31.963753 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
356 12:52:31.967258 CBFS: Locating 'fallback/verstage'
357 12:52:31.970209 CBFS: Found @ offset 10fb80 size 1072c
358 12:52:31.974697
359 12:52:31.974828
360 12:52:31.984819 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
361 12:52:31.998991 Probing TPM: . done!
362 12:52:32.002061 TPM ready after 0 ms
363 12:52:32.005716 Connected to device vid:did:rid of 1ae0:0028:00
364 12:52:32.015781 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
365 12:52:32.019583 Initialized TPM device CR50 revision 0
366 12:52:32.064072 tlcl_send_startup: Startup return code is 0
367 12:52:32.064263 TPM: setup succeeded
368 12:52:32.076972 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
369 12:52:32.080385 Chrome EC: UHEPI supported
370 12:52:32.083743 Phase 1
371 12:52:32.086895 FMAP: area GBB found @ c05000 (12288 bytes)
372 12:52:32.094096 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
373 12:52:32.100440 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
374 12:52:32.103543 Recovery requested (1009000e)
375 12:52:32.109251 Saving nvdata
376 12:52:32.115472 tlcl_extend: response is 0
377 12:52:32.124269 tlcl_extend: response is 0
378 12:52:32.131292 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 12:52:32.134636 CBFS @ c08000 size 3f8000
380 12:52:32.141391 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 12:52:32.144761 CBFS: Locating 'fallback/romstage'
382 12:52:32.148000 CBFS: Found @ offset 80 size 145fc
383 12:52:32.151339 Accumulated console time in verstage 98 ms
384 12:52:32.151472
385 12:52:32.151588
386 12:52:32.164507 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
387 12:52:32.171279 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
388 12:52:32.174259 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
389 12:52:32.177690 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
390 12:52:32.184274 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
391 12:52:32.187853 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
392 12:52:32.191405 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
393 12:52:32.194693 TCO_STS: 0000 0000
394 12:52:32.197327 GEN_PMCON: e0015238 00000200
395 12:52:32.200798 GBLRST_CAUSE: 00000000 00000000
396 12:52:32.200911 prev_sleep_state 5
397 12:52:32.204227 Boot Count incremented to 64806
398 12:52:32.211329 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
399 12:52:32.214079 CBFS @ c08000 size 3f8000
400 12:52:32.220855 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
401 12:52:32.220973 CBFS: Locating 'fspm.bin'
402 12:52:32.227533 CBFS: Found @ offset 5ffc0 size 71000
403 12:52:32.230831 Chrome EC: UHEPI supported
404 12:52:32.237318 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
405 12:52:32.241258 Probing TPM: done!
406 12:52:32.247570 Connected to device vid:did:rid of 1ae0:0028:00
407 12:52:32.257779 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
408 12:52:32.263066 Initialized TPM device CR50 revision 0
409 12:52:32.272522 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
410 12:52:32.278748 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
411 12:52:32.282517 MRC cache found, size 1948
412 12:52:32.285830 bootmode is set to: 2
413 12:52:32.288846 PRMRR disabled by config.
414 12:52:32.288934 SPD INDEX = 1
415 12:52:32.295892 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
416 12:52:32.298907 CBFS @ c08000 size 3f8000
417 12:52:32.305447 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
418 12:52:32.305552 CBFS: Locating 'spd.bin'
419 12:52:32.308978 CBFS: Found @ offset 5fb80 size 400
420 12:52:32.312302 SPD: module type is LPDDR3
421 12:52:32.316036 SPD: module part is
422 12:52:32.322047 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
423 12:52:32.325503 SPD: device width 4 bits, bus width 8 bits
424 12:52:32.328614 SPD: module size is 4096 MB (per channel)
425 12:52:32.332014 memory slot: 0 configuration done.
426 12:52:32.335529 memory slot: 2 configuration done.
427 12:52:32.387434 CBMEM:
428 12:52:32.390688 IMD: root @ 99fff000 254 entries.
429 12:52:32.393576 IMD: root @ 99ffec00 62 entries.
430 12:52:32.396989 External stage cache:
431 12:52:32.400183 IMD: root @ 9abff000 254 entries.
432 12:52:32.403736 IMD: root @ 9abfec00 62 entries.
433 12:52:32.407297 Chrome EC: clear events_b mask to 0x0000000020004000
434 12:52:32.423242 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
435 12:52:32.435950 tlcl_write: response is 0
436 12:52:32.444885 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
437 12:52:32.451927 MRC: TPM MRC hash updated successfully.
438 12:52:32.452038 2 DIMMs found
439 12:52:32.455028 SMM Memory Map
440 12:52:32.458874 SMRAM : 0x9a000000 0x1000000
441 12:52:32.462038 Subregion 0: 0x9a000000 0xa00000
442 12:52:32.465225 Subregion 1: 0x9aa00000 0x200000
443 12:52:32.468860 Subregion 2: 0x9ac00000 0x400000
444 12:52:32.471951 top_of_ram = 0x9a000000
445 12:52:32.474787 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
446 12:52:32.481673 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
447 12:52:32.485156 MTRR Range: Start=ff000000 End=0 (Size 1000000)
448 12:52:32.491286 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
449 12:52:32.494932 CBFS @ c08000 size 3f8000
450 12:52:32.498422 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
451 12:52:32.501300 CBFS: Locating 'fallback/postcar'
452 12:52:32.507796 CBFS: Found @ offset 107000 size 4b44
453 12:52:32.511194 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
454 12:52:32.524015 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
455 12:52:32.527170 Processing 180 relocs. Offset value of 0x97c0c000
456 12:52:32.535842 Accumulated console time in romstage 286 ms
457 12:52:32.535959
458 12:52:32.536068
459 12:52:32.545807 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
460 12:52:32.552467 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
461 12:52:32.555558 CBFS @ c08000 size 3f8000
462 12:52:32.559061 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
463 12:52:32.565966 CBFS: Locating 'fallback/ramstage'
464 12:52:32.568843 CBFS: Found @ offset 43380 size 1b9e8
465 12:52:32.575464 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
466 12:52:32.607284 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
467 12:52:32.610956 Processing 3976 relocs. Offset value of 0x98db0000
468 12:52:32.617275 Accumulated console time in postcar 52 ms
469 12:52:32.617408
470 12:52:32.617501
471 12:52:32.627311 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
472 12:52:32.634352 FMAP: area RO_VPD found @ c00000 (16384 bytes)
473 12:52:32.637654 WARNING: RO_VPD is uninitialized or empty.
474 12:52:32.640359 FMAP: area RW_VPD found @ af8000 (8192 bytes)
475 12:52:32.647415 FMAP: area RW_VPD found @ af8000 (8192 bytes)
476 12:52:32.647547 Normal boot.
477 12:52:32.654128 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
478 12:52:32.657495 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
479 12:52:32.661077 CBFS @ c08000 size 3f8000
480 12:52:32.666917 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
481 12:52:32.670593 CBFS: Locating 'cpu_microcode_blob.bin'
482 12:52:32.674092 CBFS: Found @ offset 14700 size 2ec00
483 12:52:32.676979 microcode: sig=0x806ec pf=0x4 revision=0xc9
484 12:52:32.680334 Skip microcode update
485 12:52:32.687244 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
486 12:52:32.687355 CBFS @ c08000 size 3f8000
487 12:52:32.693354 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
488 12:52:32.697229 CBFS: Locating 'fsps.bin'
489 12:52:32.700291 CBFS: Found @ offset d1fc0 size 35000
490 12:52:32.725407 Detected 4 core, 8 thread CPU.
491 12:52:32.729696 Setting up SMI for CPU
492 12:52:32.732392 IED base = 0x9ac00000
493 12:52:32.732484 IED size = 0x00400000
494 12:52:32.735596 Will perform SMM setup.
495 12:52:32.742068 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
496 12:52:32.748997 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
497 12:52:32.752347 Processing 16 relocs. Offset value of 0x00030000
498 12:52:32.755820 Attempting to start 7 APs
499 12:52:32.759122 Waiting for 10ms after sending INIT.
500 12:52:32.775099 Waiting for 1st SIPI to complete...done.
501 12:52:32.775220 AP: slot 5 apic_id 1.
502 12:52:32.781687 Waiting for 2nd SIPI to complete...done.
503 12:52:32.781785 AP: slot 3 apic_id 3.
504 12:52:32.785203 AP: slot 1 apic_id 2.
505 12:52:32.788654 AP: slot 2 apic_id 4.
506 12:52:32.788744 AP: slot 4 apic_id 5.
507 12:52:32.791793 AP: slot 7 apic_id 6.
508 12:52:32.795045 AP: slot 6 apic_id 7.
509 12:52:32.801823 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
510 12:52:32.808695 Processing 13 relocs. Offset value of 0x00038000
511 12:52:32.812011 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
512 12:52:32.818283 Installing SMM handler to 0x9a000000
513 12:52:32.825600 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
514 12:52:32.828433 Processing 658 relocs. Offset value of 0x9a010000
515 12:52:32.838325 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
516 12:52:32.841960 Processing 13 relocs. Offset value of 0x9a008000
517 12:52:32.848295 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
518 12:52:32.854940 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
519 12:52:32.858239 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
520 12:52:32.864942 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
521 12:52:32.871716 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
522 12:52:32.878209 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
523 12:52:32.881707 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
524 12:52:32.888096 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
525 12:52:32.891445 Clearing SMI status registers
526 12:52:32.895211 SMI_STS: PM1
527 12:52:32.895302 PM1_STS: PWRBTN
528 12:52:32.898446 TCO_STS: SECOND_TO
529 12:52:32.901490 New SMBASE 0x9a000000
530 12:52:32.904866 In relocation handler: CPU 0
531 12:52:32.908521 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
532 12:52:32.911536 Writing SMRR. base = 0x9a000006, mask=0xff000800
533 12:52:32.914739 Relocation complete.
534 12:52:32.918397 New SMBASE 0x99ffec00
535 12:52:32.918486 In relocation handler: CPU 5
536 12:52:32.924793 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
537 12:52:32.928014 Writing SMRR. base = 0x9a000006, mask=0xff000800
538 12:52:32.931739 Relocation complete.
539 12:52:32.931827 New SMBASE 0x99fff800
540 12:52:32.934857 In relocation handler: CPU 2
541 12:52:32.941608 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
542 12:52:32.944556 Writing SMRR. base = 0x9a000006, mask=0xff000800
543 12:52:32.947950 Relocation complete.
544 12:52:32.948037 New SMBASE 0x99ffe400
545 12:52:32.951477 In relocation handler: CPU 7
546 12:52:32.955026 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
547 12:52:32.961664 Writing SMRR. base = 0x9a000006, mask=0xff000800
548 12:52:32.964476 Relocation complete.
549 12:52:32.964590 New SMBASE 0x99ffe800
550 12:52:32.968075 In relocation handler: CPU 6
551 12:52:32.971360 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
552 12:52:32.978027 Writing SMRR. base = 0x9a000006, mask=0xff000800
553 12:52:32.981677 Relocation complete.
554 12:52:32.981769 New SMBASE 0x99fff000
555 12:52:32.984686 In relocation handler: CPU 4
556 12:52:32.987730 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
557 12:52:32.994260 Writing SMRR. base = 0x9a000006, mask=0xff000800
558 12:52:32.994358 Relocation complete.
559 12:52:32.997923 New SMBASE 0x99fff400
560 12:52:33.001261 In relocation handler: CPU 3
561 12:52:33.004832 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
562 12:52:33.011039 Writing SMRR. base = 0x9a000006, mask=0xff000800
563 12:52:33.011160 Relocation complete.
564 12:52:33.014624 New SMBASE 0x99fffc00
565 12:52:33.018073 In relocation handler: CPU 1
566 12:52:33.021047 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
567 12:52:33.027479 Writing SMRR. base = 0x9a000006, mask=0xff000800
568 12:52:33.027602 Relocation complete.
569 12:52:33.031153 Initializing CPU #0
570 12:52:33.034361 CPU: vendor Intel device 806ec
571 12:52:33.037518 CPU: family 06, model 8e, stepping 0c
572 12:52:33.040788 Clearing out pending MCEs
573 12:52:33.044283 Setting up local APIC...
574 12:52:33.044372 apic_id: 0x00 done.
575 12:52:33.047549 Turbo is available but hidden
576 12:52:33.051080 Turbo is available and visible
577 12:52:33.054402 VMX status: enabled
578 12:52:33.058021 IA32_FEATURE_CONTROL status: locked
579 12:52:33.060821 Skip microcode update
580 12:52:33.060908 CPU #0 initialized
581 12:52:33.064455 Initializing CPU #5
582 12:52:33.064542 Initializing CPU #2
583 12:52:33.067648 Initializing CPU #4
584 12:52:33.070775 Initializing CPU #1
585 12:52:33.070887 Initializing CPU #3
586 12:52:33.074243 CPU: vendor Intel device 806ec
587 12:52:33.077468 CPU: family 06, model 8e, stepping 0c
588 12:52:33.080786 CPU: vendor Intel device 806ec
589 12:52:33.084266 CPU: family 06, model 8e, stepping 0c
590 12:52:33.087382 Clearing out pending MCEs
591 12:52:33.091238 Clearing out pending MCEs
592 12:52:33.093862 Setting up local APIC...
593 12:52:33.097131 CPU: vendor Intel device 806ec
594 12:52:33.100745 CPU: family 06, model 8e, stepping 0c
595 12:52:33.104194 Clearing out pending MCEs
596 12:52:33.104283 Initializing CPU #7
597 12:52:33.107342 Initializing CPU #6
598 12:52:33.110576 CPU: vendor Intel device 806ec
599 12:52:33.113722 CPU: family 06, model 8e, stepping 0c
600 12:52:33.117011 CPU: vendor Intel device 806ec
601 12:52:33.120527 CPU: family 06, model 8e, stepping 0c
602 12:52:33.124108 Clearing out pending MCEs
603 12:52:33.126789 Clearing out pending MCEs
604 12:52:33.126880 Setting up local APIC...
605 12:52:33.130046 Setting up local APIC...
606 12:52:33.133918 CPU: vendor Intel device 806ec
607 12:52:33.136918 CPU: family 06, model 8e, stepping 0c
608 12:52:33.140266 CPU: vendor Intel device 806ec
609 12:52:33.143516 CPU: family 06, model 8e, stepping 0c
610 12:52:33.147058 Clearing out pending MCEs
611 12:52:33.150310 Clearing out pending MCEs
612 12:52:33.153418 Setting up local APIC...
613 12:52:33.153512 apic_id: 0x02 done.
614 12:52:33.156972 Setting up local APIC...
615 12:52:33.159744 apic_id: 0x01 done.
616 12:52:33.159872 apic_id: 0x06 done.
617 12:52:33.163270 Setting up local APIC...
618 12:52:33.166737 apic_id: 0x03 done.
619 12:52:33.166866 VMX status: enabled
620 12:52:33.170273 VMX status: enabled
621 12:52:33.173830 IA32_FEATURE_CONTROL status: locked
622 12:52:33.176572 IA32_FEATURE_CONTROL status: locked
623 12:52:33.180041 Skip microcode update
624 12:52:33.183510 Skip microcode update
625 12:52:33.183647 CPU #1 initialized
626 12:52:33.186809 CPU #3 initialized
627 12:52:33.186917 VMX status: enabled
628 12:52:33.189900 apic_id: 0x07 done.
629 12:52:33.192923 apic_id: 0x04 done.
630 12:52:33.193009 Setting up local APIC...
631 12:52:33.196535 VMX status: enabled
632 12:52:33.199999 apic_id: 0x05 done.
633 12:52:33.200112 VMX status: enabled
634 12:52:33.202884 VMX status: enabled
635 12:52:33.206495 IA32_FEATURE_CONTROL status: locked
636 12:52:33.210268 IA32_FEATURE_CONTROL status: locked
637 12:52:33.212844 Skip microcode update
638 12:52:33.212961 VMX status: enabled
639 12:52:33.220002 IA32_FEATURE_CONTROL status: locked
640 12:52:33.223148 IA32_FEATURE_CONTROL status: locked
641 12:52:33.223267 Skip microcode update
642 12:52:33.226253 Skip microcode update
643 12:52:33.229645 CPU #7 initialized
644 12:52:33.229746 CPU #6 initialized
645 12:52:33.232785 Skip microcode update
646 12:52:33.232897 CPU #2 initialized
647 12:52:33.236371 CPU #4 initialized
648 12:52:33.239649 IA32_FEATURE_CONTROL status: locked
649 12:52:33.242832 Skip microcode update
650 12:52:33.242951 CPU #5 initialized
651 12:52:33.249525 bsp_do_flight_plan done after 465 msecs.
652 12:52:33.252848 CPU: frequency set to 4200 MHz
653 12:52:33.252956 Enabling SMIs.
654 12:52:33.253050 Locking SMM.
655 12:52:33.269343 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
656 12:52:33.272206 CBFS @ c08000 size 3f8000
657 12:52:33.279174 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
658 12:52:33.279270 CBFS: Locating 'vbt.bin'
659 12:52:33.282440 CBFS: Found @ offset 5f5c0 size 499
660 12:52:33.289153 Found a VBT of 4608 bytes after decompression
661 12:52:33.475817 Display FSP Version Info HOB
662 12:52:33.479293 Reference Code - CPU = 9.0.1e.30
663 12:52:33.482338 uCode Version = 0.0.0.ca
664 12:52:33.485892 TXT ACM version = ff.ff.ff.ffff
665 12:52:33.489354 Display FSP Version Info HOB
666 12:52:33.492273 Reference Code - ME = 9.0.1e.30
667 12:52:33.495849 MEBx version = 0.0.0.0
668 12:52:33.499489 ME Firmware Version = Consumer SKU
669 12:52:33.502129 Display FSP Version Info HOB
670 12:52:33.505671 Reference Code - CML PCH = 9.0.1e.30
671 12:52:33.509110 PCH-CRID Status = Disabled
672 12:52:33.512259 PCH-CRID Original Value = ff.ff.ff.ffff
673 12:52:33.516133 PCH-CRID New Value = ff.ff.ff.ffff
674 12:52:33.518934 OPROM - RST - RAID = ff.ff.ff.ffff
675 12:52:33.522229 ChipsetInit Base Version = ff.ff.ff.ffff
676 12:52:33.525356 ChipsetInit Oem Version = ff.ff.ff.ffff
677 12:52:33.529125 Display FSP Version Info HOB
678 12:52:33.535195 Reference Code - SA - System Agent = 9.0.1e.30
679 12:52:33.538785 Reference Code - MRC = 0.7.1.6c
680 12:52:33.538897 SA - PCIe Version = 9.0.1e.30
681 12:52:33.542300 SA-CRID Status = Disabled
682 12:52:33.545630 SA-CRID Original Value = 0.0.0.c
683 12:52:33.548688 SA-CRID New Value = 0.0.0.c
684 12:52:33.552049 OPROM - VBIOS = ff.ff.ff.ffff
685 12:52:33.555322 RTC Init
686 12:52:33.558816 Set power on after power failure.
687 12:52:33.558901 Disabling Deep S3
688 12:52:33.562070 Disabling Deep S3
689 12:52:33.562154 Disabling Deep S4
690 12:52:33.565468 Disabling Deep S4
691 12:52:33.565553 Disabling Deep S5
692 12:52:33.568340 Disabling Deep S5
693 12:52:33.575520 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 197 exit 1
694 12:52:33.575644 Enumerating buses...
695 12:52:33.581883 Show all devs... Before device enumeration.
696 12:52:33.582015 Root Device: enabled 1
697 12:52:33.585474 CPU_CLUSTER: 0: enabled 1
698 12:52:33.588449 DOMAIN: 0000: enabled 1
699 12:52:33.591691 APIC: 00: enabled 1
700 12:52:33.591780 PCI: 00:00.0: enabled 1
701 12:52:33.595183 PCI: 00:02.0: enabled 1
702 12:52:33.598182 PCI: 00:04.0: enabled 0
703 12:52:33.601650 PCI: 00:05.0: enabled 0
704 12:52:33.601742 PCI: 00:12.0: enabled 1
705 12:52:33.605188 PCI: 00:12.5: enabled 0
706 12:52:33.608244 PCI: 00:12.6: enabled 0
707 12:52:33.611845 PCI: 00:14.0: enabled 1
708 12:52:33.611952 PCI: 00:14.1: enabled 0
709 12:52:33.615159 PCI: 00:14.3: enabled 1
710 12:52:33.618305 PCI: 00:14.5: enabled 0
711 12:52:33.618425 PCI: 00:15.0: enabled 1
712 12:52:33.622143 PCI: 00:15.1: enabled 1
713 12:52:33.625036 PCI: 00:15.2: enabled 0
714 12:52:33.628495 PCI: 00:15.3: enabled 0
715 12:52:33.628625 PCI: 00:16.0: enabled 1
716 12:52:33.631799 PCI: 00:16.1: enabled 0
717 12:52:33.635127 PCI: 00:16.2: enabled 0
718 12:52:33.638101 PCI: 00:16.3: enabled 0
719 12:52:33.638233 PCI: 00:16.4: enabled 0
720 12:52:33.641567 PCI: 00:16.5: enabled 0
721 12:52:33.644735 PCI: 00:17.0: enabled 1
722 12:52:33.648235 PCI: 00:19.0: enabled 1
723 12:52:33.648321 PCI: 00:19.1: enabled 0
724 12:52:33.651562 PCI: 00:19.2: enabled 0
725 12:52:33.654785 PCI: 00:1a.0: enabled 0
726 12:52:33.654872 PCI: 00:1c.0: enabled 0
727 12:52:33.657919 PCI: 00:1c.1: enabled 0
728 12:52:33.661408 PCI: 00:1c.2: enabled 0
729 12:52:33.664679 PCI: 00:1c.3: enabled 0
730 12:52:33.664764 PCI: 00:1c.4: enabled 0
731 12:52:33.667877 PCI: 00:1c.5: enabled 0
732 12:52:33.671443 PCI: 00:1c.6: enabled 0
733 12:52:33.674633 PCI: 00:1c.7: enabled 0
734 12:52:33.674766 PCI: 00:1d.0: enabled 1
735 12:52:33.677875 PCI: 00:1d.1: enabled 0
736 12:52:33.681489 PCI: 00:1d.2: enabled 0
737 12:52:33.684187 PCI: 00:1d.3: enabled 0
738 12:52:33.684312 PCI: 00:1d.4: enabled 0
739 12:52:33.688080 PCI: 00:1d.5: enabled 1
740 12:52:33.691235 PCI: 00:1e.0: enabled 1
741 12:52:33.691357 PCI: 00:1e.1: enabled 0
742 12:52:33.694694 PCI: 00:1e.2: enabled 1
743 12:52:33.697868 PCI: 00:1e.3: enabled 1
744 12:52:33.701318 PCI: 00:1f.0: enabled 1
745 12:52:33.701446 PCI: 00:1f.1: enabled 1
746 12:52:33.704324 PCI: 00:1f.2: enabled 1
747 12:52:33.707663 PCI: 00:1f.3: enabled 1
748 12:52:33.710952 PCI: 00:1f.4: enabled 1
749 12:52:33.711061 PCI: 00:1f.5: enabled 1
750 12:52:33.714287 PCI: 00:1f.6: enabled 0
751 12:52:33.717497 USB0 port 0: enabled 1
752 12:52:33.717583 I2C: 00:15: enabled 1
753 12:52:33.721034 I2C: 00:5d: enabled 1
754 12:52:33.724026 GENERIC: 0.0: enabled 1
755 12:52:33.727528 I2C: 00:1a: enabled 1
756 12:52:33.727666 I2C: 00:38: enabled 1
757 12:52:33.731148 I2C: 00:39: enabled 1
758 12:52:33.734570 I2C: 00:3a: enabled 1
759 12:52:33.734693 I2C: 00:3b: enabled 1
760 12:52:33.737157 PCI: 00:00.0: enabled 1
761 12:52:33.740587 SPI: 00: enabled 1
762 12:52:33.740710 SPI: 01: enabled 1
763 12:52:33.743939 PNP: 0c09.0: enabled 1
764 12:52:33.747377 USB2 port 0: enabled 1
765 12:52:33.747500 USB2 port 1: enabled 1
766 12:52:33.750788 USB2 port 2: enabled 0
767 12:52:33.754265 USB2 port 3: enabled 0
768 12:52:33.754387 USB2 port 5: enabled 0
769 12:52:33.757087 USB2 port 6: enabled 1
770 12:52:33.760622 USB2 port 9: enabled 1
771 12:52:33.764158 USB3 port 0: enabled 1
772 12:52:33.764283 USB3 port 1: enabled 1
773 12:52:33.767122 USB3 port 2: enabled 1
774 12:52:33.770358 USB3 port 3: enabled 1
775 12:52:33.770481 USB3 port 4: enabled 0
776 12:52:33.774113 APIC: 02: enabled 1
777 12:52:33.777200 APIC: 04: enabled 1
778 12:52:33.777323 APIC: 03: enabled 1
779 12:52:33.780636 APIC: 05: enabled 1
780 12:52:33.780758 APIC: 01: enabled 1
781 12:52:33.783693 APIC: 07: enabled 1
782 12:52:33.786874 APIC: 06: enabled 1
783 12:52:33.786995 Compare with tree...
784 12:52:33.790230 Root Device: enabled 1
785 12:52:33.793955 CPU_CLUSTER: 0: enabled 1
786 12:52:33.797129 APIC: 00: enabled 1
787 12:52:33.797215 APIC: 02: enabled 1
788 12:52:33.800184 APIC: 04: enabled 1
789 12:52:33.803550 APIC: 03: enabled 1
790 12:52:33.803641 APIC: 05: enabled 1
791 12:52:33.807167 APIC: 01: enabled 1
792 12:52:33.810299 APIC: 07: enabled 1
793 12:52:33.810384 APIC: 06: enabled 1
794 12:52:33.813899 DOMAIN: 0000: enabled 1
795 12:52:33.816805 PCI: 00:00.0: enabled 1
796 12:52:33.820446 PCI: 00:02.0: enabled 1
797 12:52:33.820569 PCI: 00:04.0: enabled 0
798 12:52:33.823314 PCI: 00:05.0: enabled 0
799 12:52:33.826774 PCI: 00:12.0: enabled 1
800 12:52:33.829989 PCI: 00:12.5: enabled 0
801 12:52:33.833532 PCI: 00:12.6: enabled 0
802 12:52:33.833650 PCI: 00:14.0: enabled 1
803 12:52:33.836727 USB0 port 0: enabled 1
804 12:52:33.840180 USB2 port 0: enabled 1
805 12:52:33.843301 USB2 port 1: enabled 1
806 12:52:33.846945 USB2 port 2: enabled 0
807 12:52:33.847069 USB2 port 3: enabled 0
808 12:52:33.850011 USB2 port 5: enabled 0
809 12:52:33.853272 USB2 port 6: enabled 1
810 12:52:33.856896 USB2 port 9: enabled 1
811 12:52:33.859938 USB3 port 0: enabled 1
812 12:52:33.863400 USB3 port 1: enabled 1
813 12:52:33.863523 USB3 port 2: enabled 1
814 12:52:33.866680 USB3 port 3: enabled 1
815 12:52:33.869999 USB3 port 4: enabled 0
816 12:52:33.873076 PCI: 00:14.1: enabled 0
817 12:52:33.876419 PCI: 00:14.3: enabled 1
818 12:52:33.876540 PCI: 00:14.5: enabled 0
819 12:52:33.879630 PCI: 00:15.0: enabled 1
820 12:52:33.883144 I2C: 00:15: enabled 1
821 12:52:33.886213 PCI: 00:15.1: enabled 1
822 12:52:33.889691 I2C: 00:5d: enabled 1
823 12:52:33.889813 GENERIC: 0.0: enabled 1
824 12:52:33.892843 PCI: 00:15.2: enabled 0
825 12:52:33.896274 PCI: 00:15.3: enabled 0
826 12:52:33.900015 PCI: 00:16.0: enabled 1
827 12:52:33.902876 PCI: 00:16.1: enabled 0
828 12:52:33.902996 PCI: 00:16.2: enabled 0
829 12:52:33.906508 PCI: 00:16.3: enabled 0
830 12:52:33.909545 PCI: 00:16.4: enabled 0
831 12:52:33.912795 PCI: 00:16.5: enabled 0
832 12:52:33.916091 PCI: 00:17.0: enabled 1
833 12:52:33.916213 PCI: 00:19.0: enabled 1
834 12:52:33.919739 I2C: 00:1a: enabled 1
835 12:52:33.922994 I2C: 00:38: enabled 1
836 12:52:33.926309 I2C: 00:39: enabled 1
837 12:52:33.926431 I2C: 00:3a: enabled 1
838 12:52:33.929600 I2C: 00:3b: enabled 1
839 12:52:33.932886 PCI: 00:19.1: enabled 0
840 12:52:33.936286 PCI: 00:19.2: enabled 0
841 12:52:33.939405 PCI: 00:1a.0: enabled 0
842 12:52:33.939526 PCI: 00:1c.0: enabled 0
843 12:52:33.942787 PCI: 00:1c.1: enabled 0
844 12:52:33.946301 PCI: 00:1c.2: enabled 0
845 12:52:33.949217 PCI: 00:1c.3: enabled 0
846 12:52:33.949340 PCI: 00:1c.4: enabled 0
847 12:52:33.952624 PCI: 00:1c.5: enabled 0
848 12:52:33.955977 PCI: 00:1c.6: enabled 0
849 12:52:33.959405 PCI: 00:1c.7: enabled 0
850 12:52:33.962946 PCI: 00:1d.0: enabled 1
851 12:52:33.963068 PCI: 00:1d.1: enabled 0
852 12:52:33.965767 PCI: 00:1d.2: enabled 0
853 12:52:33.969101 PCI: 00:1d.3: enabled 0
854 12:52:33.972485 PCI: 00:1d.4: enabled 0
855 12:52:33.975859 PCI: 00:1d.5: enabled 1
856 12:52:33.975981 PCI: 00:00.0: enabled 1
857 12:52:33.978974 PCI: 00:1e.0: enabled 1
858 12:52:33.982667 PCI: 00:1e.1: enabled 0
859 12:52:33.985757 PCI: 00:1e.2: enabled 1
860 12:52:33.989249 SPI: 00: enabled 1
861 12:52:33.989373 PCI: 00:1e.3: enabled 1
862 12:52:33.992439 SPI: 01: enabled 1
863 12:52:33.995943 PCI: 00:1f.0: enabled 1
864 12:52:33.999188 PNP: 0c09.0: enabled 1
865 12:52:33.999308 PCI: 00:1f.1: enabled 1
866 12:52:34.002613 PCI: 00:1f.2: enabled 1
867 12:52:34.005405 PCI: 00:1f.3: enabled 1
868 12:52:34.009179 PCI: 00:1f.4: enabled 1
869 12:52:34.012163 PCI: 00:1f.5: enabled 1
870 12:52:34.012286 PCI: 00:1f.6: enabled 0
871 12:52:34.015515 Root Device scanning...
872 12:52:34.018839 scan_static_bus for Root Device
873 12:52:34.022434 CPU_CLUSTER: 0 enabled
874 12:52:34.022556 DOMAIN: 0000 enabled
875 12:52:34.025224 DOMAIN: 0000 scanning...
876 12:52:34.028701 PCI: pci_scan_bus for bus 00
877 12:52:34.032393 PCI: 00:00.0 [8086/0000] ops
878 12:52:34.035649 PCI: 00:00.0 [8086/9b61] enabled
879 12:52:34.038908 PCI: 00:02.0 [8086/0000] bus ops
880 12:52:34.041904 PCI: 00:02.0 [8086/9b41] enabled
881 12:52:34.045575 PCI: 00:04.0 [8086/1903] disabled
882 12:52:34.048767 PCI: 00:08.0 [8086/1911] enabled
883 12:52:34.052397 PCI: 00:12.0 [8086/02f9] enabled
884 12:52:34.055406 PCI: 00:14.0 [8086/0000] bus ops
885 12:52:34.058876 PCI: 00:14.0 [8086/02ed] enabled
886 12:52:34.062035 PCI: 00:14.2 [8086/02ef] enabled
887 12:52:34.065650 PCI: 00:14.3 [8086/02f0] enabled
888 12:52:34.069107 PCI: 00:15.0 [8086/0000] bus ops
889 12:52:34.073023 PCI: 00:15.0 [8086/02e8] enabled
890 12:52:34.075598 PCI: 00:15.1 [8086/0000] bus ops
891 12:52:34.078567 PCI: 00:15.1 [8086/02e9] enabled
892 12:52:34.081881 PCI: 00:16.0 [8086/0000] ops
893 12:52:34.085381 PCI: 00:16.0 [8086/02e0] enabled
894 12:52:34.089114 PCI: 00:17.0 [8086/0000] ops
895 12:52:34.092234 PCI: 00:17.0 [8086/02d3] enabled
896 12:52:34.095600 PCI: 00:19.0 [8086/0000] bus ops
897 12:52:34.098951 PCI: 00:19.0 [8086/02c5] enabled
898 12:52:34.101945 PCI: 00:1d.0 [8086/0000] bus ops
899 12:52:34.105045 PCI: 00:1d.0 [8086/02b0] enabled
900 12:52:34.111796 PCI: Static device PCI: 00:1d.5 not found, disabling it.
901 12:52:34.115089 PCI: 00:1e.0 [8086/0000] ops
902 12:52:34.118576 PCI: 00:1e.0 [8086/02a8] enabled
903 12:52:34.121838 PCI: 00:1e.2 [8086/0000] bus ops
904 12:52:34.125464 PCI: 00:1e.2 [8086/02aa] enabled
905 12:52:34.128760 PCI: 00:1e.3 [8086/0000] bus ops
906 12:52:34.131669 PCI: 00:1e.3 [8086/02ab] enabled
907 12:52:34.135109 PCI: 00:1f.0 [8086/0000] bus ops
908 12:52:34.138176 PCI: 00:1f.0 [8086/0284] enabled
909 12:52:34.141687 PCI: Static device PCI: 00:1f.1 not found, disabling it.
910 12:52:34.148521 PCI: Static device PCI: 00:1f.2 not found, disabling it.
911 12:52:34.151934 PCI: 00:1f.3 [8086/0000] bus ops
912 12:52:34.154795 PCI: 00:1f.3 [8086/02c8] enabled
913 12:52:34.158402 PCI: 00:1f.4 [8086/0000] bus ops
914 12:52:34.161687 PCI: 00:1f.4 [8086/02a3] enabled
915 12:52:34.165045 PCI: 00:1f.5 [8086/0000] bus ops
916 12:52:34.167868 PCI: 00:1f.5 [8086/02a4] enabled
917 12:52:34.171528 PCI: Leftover static devices:
918 12:52:34.171613 PCI: 00:05.0
919 12:52:34.174964 PCI: 00:12.5
920 12:52:34.175047 PCI: 00:12.6
921 12:52:34.177864 PCI: 00:14.1
922 12:52:34.177947 PCI: 00:14.5
923 12:52:34.178013 PCI: 00:15.2
924 12:52:34.181288 PCI: 00:15.3
925 12:52:34.181371 PCI: 00:16.1
926 12:52:34.184716 PCI: 00:16.2
927 12:52:34.184798 PCI: 00:16.3
928 12:52:34.188290 PCI: 00:16.4
929 12:52:34.188373 PCI: 00:16.5
930 12:52:34.188439 PCI: 00:19.1
931 12:52:34.191143 PCI: 00:19.2
932 12:52:34.191226 PCI: 00:1a.0
933 12:52:34.194317 PCI: 00:1c.0
934 12:52:34.194396 PCI: 00:1c.1
935 12:52:34.194460 PCI: 00:1c.2
936 12:52:34.197784 PCI: 00:1c.3
937 12:52:34.197866 PCI: 00:1c.4
938 12:52:34.200916 PCI: 00:1c.5
939 12:52:34.200999 PCI: 00:1c.6
940 12:52:34.201081 PCI: 00:1c.7
941 12:52:34.204593 PCI: 00:1d.1
942 12:52:34.204676 PCI: 00:1d.2
943 12:52:34.207680 PCI: 00:1d.3
944 12:52:34.207777 PCI: 00:1d.4
945 12:52:34.211129 PCI: 00:1d.5
946 12:52:34.211211 PCI: 00:1e.1
947 12:52:34.211277 PCI: 00:1f.1
948 12:52:34.214129 PCI: 00:1f.2
949 12:52:34.214260 PCI: 00:1f.6
950 12:52:34.217521 PCI: Check your devicetree.cb.
951 12:52:34.220883 PCI: 00:02.0 scanning...
952 12:52:34.224144 scan_generic_bus for PCI: 00:02.0
953 12:52:34.227793 scan_generic_bus for PCI: 00:02.0 done
954 12:52:34.233986 scan_bus: scanning of bus PCI: 00:02.0 took 10193 usecs
955 12:52:34.237155 PCI: 00:14.0 scanning...
956 12:52:34.240498 scan_static_bus for PCI: 00:14.0
957 12:52:34.240583 USB0 port 0 enabled
958 12:52:34.244159 USB0 port 0 scanning...
959 12:52:34.247678 scan_static_bus for USB0 port 0
960 12:52:34.250847 USB2 port 0 enabled
961 12:52:34.250932 USB2 port 1 enabled
962 12:52:34.254239 USB2 port 2 disabled
963 12:52:34.257113 USB2 port 3 disabled
964 12:52:34.257197 USB2 port 5 disabled
965 12:52:34.260568 USB2 port 6 enabled
966 12:52:34.263979 USB2 port 9 enabled
967 12:52:34.264063 USB3 port 0 enabled
968 12:52:34.267364 USB3 port 1 enabled
969 12:52:34.267473 USB3 port 2 enabled
970 12:52:34.270907 USB3 port 3 enabled
971 12:52:34.273717 USB3 port 4 disabled
972 12:52:34.273954 USB2 port 0 scanning...
973 12:52:34.277145 scan_static_bus for USB2 port 0
974 12:52:34.284102 scan_static_bus for USB2 port 0 done
975 12:52:34.287120 scan_bus: scanning of bus USB2 port 0 took 9702 usecs
976 12:52:34.290520 USB2 port 1 scanning...
977 12:52:34.294108 scan_static_bus for USB2 port 1
978 12:52:34.297421 scan_static_bus for USB2 port 1 done
979 12:52:34.303468 scan_bus: scanning of bus USB2 port 1 took 9710 usecs
980 12:52:34.303575 USB2 port 6 scanning...
981 12:52:34.307336 scan_static_bus for USB2 port 6
982 12:52:34.313838 scan_static_bus for USB2 port 6 done
983 12:52:34.317587 scan_bus: scanning of bus USB2 port 6 took 9700 usecs
984 12:52:34.320286 USB2 port 9 scanning...
985 12:52:34.323778 scan_static_bus for USB2 port 9
986 12:52:34.327118 scan_static_bus for USB2 port 9 done
987 12:52:34.333640 scan_bus: scanning of bus USB2 port 9 took 9710 usecs
988 12:52:34.333729 USB3 port 0 scanning...
989 12:52:34.337009 scan_static_bus for USB3 port 0
990 12:52:34.343821 scan_static_bus for USB3 port 0 done
991 12:52:34.347240 scan_bus: scanning of bus USB3 port 0 took 9711 usecs
992 12:52:34.350244 USB3 port 1 scanning...
993 12:52:34.353581 scan_static_bus for USB3 port 1
994 12:52:34.356946 scan_static_bus for USB3 port 1 done
995 12:52:34.363859 scan_bus: scanning of bus USB3 port 1 took 9699 usecs
996 12:52:34.363954 USB3 port 2 scanning...
997 12:52:34.367460 scan_static_bus for USB3 port 2
998 12:52:34.373914 scan_static_bus for USB3 port 2 done
999 12:52:34.377003 scan_bus: scanning of bus USB3 port 2 took 9699 usecs
1000 12:52:34.380897 USB3 port 3 scanning...
1001 12:52:34.383834 scan_static_bus for USB3 port 3
1002 12:52:34.387398 scan_static_bus for USB3 port 3 done
1003 12:52:34.394149 scan_bus: scanning of bus USB3 port 3 took 9709 usecs
1004 12:52:34.397145 scan_static_bus for USB0 port 0 done
1005 12:52:34.400908 scan_bus: scanning of bus USB0 port 0 took 155418 usecs
1006 12:52:34.406885 scan_static_bus for PCI: 00:14.0 done
1007 12:52:34.410519 scan_bus: scanning of bus PCI: 00:14.0 took 173033 usecs
1008 12:52:34.413829 PCI: 00:15.0 scanning...
1009 12:52:34.417081 scan_generic_bus for PCI: 00:15.0
1010 12:52:34.420283 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1011 12:52:34.427198 scan_generic_bus for PCI: 00:15.0 done
1012 12:52:34.430644 scan_bus: scanning of bus PCI: 00:15.0 took 14311 usecs
1013 12:52:34.433584 PCI: 00:15.1 scanning...
1014 12:52:34.436806 scan_generic_bus for PCI: 00:15.1
1015 12:52:34.440445 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1016 12:52:34.447164 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1017 12:52:34.450489 scan_generic_bus for PCI: 00:15.1 done
1018 12:52:34.456681 scan_bus: scanning of bus PCI: 00:15.1 took 18600 usecs
1019 12:52:34.456803 PCI: 00:19.0 scanning...
1020 12:52:34.460290 scan_generic_bus for PCI: 00:19.0
1021 12:52:34.466744 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1022 12:52:34.470312 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1023 12:52:34.473260 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1024 12:52:34.476535 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1025 12:52:34.483184 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1026 12:52:34.486601 scan_generic_bus for PCI: 00:19.0 done
1027 12:52:34.490065 scan_bus: scanning of bus PCI: 00:19.0 took 30714 usecs
1028 12:52:34.493789 PCI: 00:1d.0 scanning...
1029 12:52:34.496695 do_pci_scan_bridge for PCI: 00:1d.0
1030 12:52:34.500012 PCI: pci_scan_bus for bus 01
1031 12:52:34.503820 PCI: 01:00.0 [1c5c/1327] enabled
1032 12:52:34.506631 Enabling Common Clock Configuration
1033 12:52:34.513465 L1 Sub-State supported from root port 29
1034 12:52:34.513555 L1 Sub-State Support = 0xf
1035 12:52:34.516811 CommonModeRestoreTime = 0x28
1036 12:52:34.523537 Power On Value = 0x16, Power On Scale = 0x0
1037 12:52:34.523625 ASPM: Enabled L1
1038 12:52:34.530235 scan_bus: scanning of bus PCI: 00:1d.0 took 32794 usecs
1039 12:52:34.533335 PCI: 00:1e.2 scanning...
1040 12:52:34.536626 scan_generic_bus for PCI: 00:1e.2
1041 12:52:34.540351 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1042 12:52:34.543366 scan_generic_bus for PCI: 00:1e.2 done
1043 12:52:34.549680 scan_bus: scanning of bus PCI: 00:1e.2 took 14007 usecs
1044 12:52:34.553330 PCI: 00:1e.3 scanning...
1045 12:52:34.556499 scan_generic_bus for PCI: 00:1e.3
1046 12:52:34.559876 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1047 12:52:34.563180 scan_generic_bus for PCI: 00:1e.3 done
1048 12:52:34.569796 scan_bus: scanning of bus PCI: 00:1e.3 took 14003 usecs
1049 12:52:34.569885 PCI: 00:1f.0 scanning...
1050 12:52:34.573272 scan_static_bus for PCI: 00:1f.0
1051 12:52:34.576213 PNP: 0c09.0 enabled
1052 12:52:34.579648 scan_static_bus for PCI: 00:1f.0 done
1053 12:52:34.586886 scan_bus: scanning of bus PCI: 00:1f.0 took 12052 usecs
1054 12:52:34.589960 PCI: 00:1f.3 scanning...
1055 12:52:34.592956 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1056 12:52:34.596322 PCI: 00:1f.4 scanning...
1057 12:52:34.599797 scan_generic_bus for PCI: 00:1f.4
1058 12:52:34.603171 scan_generic_bus for PCI: 00:1f.4 done
1059 12:52:34.609459 scan_bus: scanning of bus PCI: 00:1f.4 took 10194 usecs
1060 12:52:34.613134 PCI: 00:1f.5 scanning...
1061 12:52:34.616647 scan_generic_bus for PCI: 00:1f.5
1062 12:52:34.619574 scan_generic_bus for PCI: 00:1f.5 done
1063 12:52:34.626432 scan_bus: scanning of bus PCI: 00:1f.5 took 10192 usecs
1064 12:52:34.632942 scan_bus: scanning of bus DOMAIN: 0000 took 605195 usecs
1065 12:52:34.636427 scan_static_bus for Root Device done
1066 12:52:34.639276 scan_bus: scanning of bus Root Device took 625100 usecs
1067 12:52:34.643020 done
1068 12:52:34.645916 Chrome EC: UHEPI supported
1069 12:52:34.649425 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1070 12:52:34.655907 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1071 12:52:34.662658 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1072 12:52:34.669295 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1073 12:52:34.672485 SPI flash protection: WPSW=0 SRP0=0
1074 12:52:34.679156 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1075 12:52:34.682595 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1076 12:52:34.686133 found VGA at PCI: 00:02.0
1077 12:52:34.689268 Setting up VGA for PCI: 00:02.0
1078 12:52:34.695618 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1079 12:52:34.698847 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1080 12:52:34.702657 Allocating resources...
1081 12:52:34.705730 Reading resources...
1082 12:52:34.709147 Root Device read_resources bus 0 link: 0
1083 12:52:34.712039 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1084 12:52:34.719035 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1085 12:52:34.722334 DOMAIN: 0000 read_resources bus 0 link: 0
1086 12:52:34.729412 PCI: 00:14.0 read_resources bus 0 link: 0
1087 12:52:34.732621 USB0 port 0 read_resources bus 0 link: 0
1088 12:52:34.741019 USB0 port 0 read_resources bus 0 link: 0 done
1089 12:52:34.744093 PCI: 00:14.0 read_resources bus 0 link: 0 done
1090 12:52:34.751147 PCI: 00:15.0 read_resources bus 1 link: 0
1091 12:52:34.754798 PCI: 00:15.0 read_resources bus 1 link: 0 done
1092 12:52:34.761182 PCI: 00:15.1 read_resources bus 2 link: 0
1093 12:52:34.764371 PCI: 00:15.1 read_resources bus 2 link: 0 done
1094 12:52:34.771734 PCI: 00:19.0 read_resources bus 3 link: 0
1095 12:52:34.778555 PCI: 00:19.0 read_resources bus 3 link: 0 done
1096 12:52:34.782097 PCI: 00:1d.0 read_resources bus 1 link: 0
1097 12:52:34.788458 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1098 12:52:34.792005 PCI: 00:1e.2 read_resources bus 4 link: 0
1099 12:52:34.798532 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1100 12:52:34.802087 PCI: 00:1e.3 read_resources bus 5 link: 0
1101 12:52:34.808731 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1102 12:52:34.812041 PCI: 00:1f.0 read_resources bus 0 link: 0
1103 12:52:34.818759 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1104 12:52:34.822054 DOMAIN: 0000 read_resources bus 0 link: 0 done
1105 12:52:34.828833 Root Device read_resources bus 0 link: 0 done
1106 12:52:34.831947 Done reading resources.
1107 12:52:34.835180 Show resources in subtree (Root Device)...After reading.
1108 12:52:34.841862 Root Device child on link 0 CPU_CLUSTER: 0
1109 12:52:34.845369 CPU_CLUSTER: 0 child on link 0 APIC: 00
1110 12:52:34.845481 APIC: 00
1111 12:52:34.848603 APIC: 02
1112 12:52:34.848700 APIC: 04
1113 12:52:34.848767 APIC: 03
1114 12:52:34.852295 APIC: 05
1115 12:52:34.852405 APIC: 01
1116 12:52:34.855380 APIC: 07
1117 12:52:34.855467 APIC: 06
1118 12:52:34.858852 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1119 12:52:34.915488 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1120 12:52:34.915849 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1121 12:52:34.916111 PCI: 00:00.0
1122 12:52:34.916646 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1123 12:52:34.917116 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1124 12:52:34.917387 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1125 12:52:34.965299 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1126 12:52:34.965647 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1127 12:52:34.965944 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1128 12:52:34.966070 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1129 12:52:34.966515 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1130 12:52:34.966826 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1131 12:52:34.981810 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1132 12:52:34.984806 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1133 12:52:34.991592 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1134 12:52:35.001779 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1135 12:52:35.011255 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1136 12:52:35.020937 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1137 12:52:35.030981 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1138 12:52:35.031178 PCI: 00:02.0
1139 12:52:35.040615 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1140 12:52:35.054088 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1141 12:52:35.060727 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1142 12:52:35.063874 PCI: 00:04.0
1143 12:52:35.064026 PCI: 00:08.0
1144 12:52:35.074135 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1145 12:52:35.077381 PCI: 00:12.0
1146 12:52:35.087361 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1147 12:52:35.090203 PCI: 00:14.0 child on link 0 USB0 port 0
1148 12:52:35.100241 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1149 12:52:35.103357 USB0 port 0 child on link 0 USB2 port 0
1150 12:52:35.106749 USB2 port 0
1151 12:52:35.106939 USB2 port 1
1152 12:52:35.110389 USB2 port 2
1153 12:52:35.110565 USB2 port 3
1154 12:52:35.113251 USB2 port 5
1155 12:52:35.116429 USB2 port 6
1156 12:52:35.116612 USB2 port 9
1157 12:52:35.119939 USB3 port 0
1158 12:52:35.120102 USB3 port 1
1159 12:52:35.123159 USB3 port 2
1160 12:52:35.123286 USB3 port 3
1161 12:52:35.126871 USB3 port 4
1162 12:52:35.126997 PCI: 00:14.2
1163 12:52:35.136519 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1164 12:52:35.146170 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1165 12:52:35.149575 PCI: 00:14.3
1166 12:52:35.159562 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1167 12:52:35.162986 PCI: 00:15.0 child on link 0 I2C: 01:15
1168 12:52:35.172838 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 12:52:35.172976 I2C: 01:15
1170 12:52:35.179701 PCI: 00:15.1 child on link 0 I2C: 02:5d
1171 12:52:35.189401 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1172 12:52:35.189537 I2C: 02:5d
1173 12:52:35.192383 GENERIC: 0.0
1174 12:52:35.192477 PCI: 00:16.0
1175 12:52:35.202612 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1176 12:52:35.205687 PCI: 00:17.0
1177 12:52:35.215502 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1178 12:52:35.222327 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1179 12:52:35.232276 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1180 12:52:35.238712 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1181 12:52:35.248716 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1182 12:52:35.258591 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1183 12:52:35.261954 PCI: 00:19.0 child on link 0 I2C: 03:1a
1184 12:52:35.271924 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 12:52:35.272055 I2C: 03:1a
1186 12:52:35.275448 I2C: 03:38
1187 12:52:35.275572 I2C: 03:39
1188 12:52:35.278629 I2C: 03:3a
1189 12:52:35.278719 I2C: 03:3b
1190 12:52:35.284769 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1191 12:52:35.291560 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1192 12:52:35.301290 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1193 12:52:35.311539 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1194 12:52:35.311686 PCI: 01:00.0
1195 12:52:35.321137 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1196 12:52:35.324943 PCI: 00:1e.0
1197 12:52:35.334199 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1198 12:52:35.344209 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1199 12:52:35.351054 PCI: 00:1e.2 child on link 0 SPI: 00
1200 12:52:35.360801 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 12:52:35.361003 SPI: 00
1202 12:52:35.364108 PCI: 00:1e.3 child on link 0 SPI: 01
1203 12:52:35.373942 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1204 12:52:35.377291 SPI: 01
1205 12:52:35.380861 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1206 12:52:35.387261 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1207 12:52:35.397024 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1208 12:52:35.400774 PNP: 0c09.0
1209 12:52:35.406957 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1210 12:52:35.410221 PCI: 00:1f.3
1211 12:52:35.420517 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1212 12:52:35.430582 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1213 12:52:35.430784 PCI: 00:1f.4
1214 12:52:35.440301 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1215 12:52:35.449839 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1216 12:52:35.453367 PCI: 00:1f.5
1217 12:52:35.459868 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1218 12:52:35.466695 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1219 12:52:35.472852 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1220 12:52:35.479652 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1221 12:52:35.483006 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1222 12:52:35.486187 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1223 12:52:35.493146 PCI: 00:17.0 18 * [0x60 - 0x67] io
1224 12:52:35.496012 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1225 12:52:35.503282 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1226 12:52:35.509283 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1227 12:52:35.516186 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1228 12:52:35.525807 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1229 12:52:35.532363 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1230 12:52:35.535694 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1231 12:52:35.543258 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1232 12:52:35.546827 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1233 12:52:35.553370 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1234 12:52:35.556992 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1235 12:52:35.563402 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1236 12:52:35.566861 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1237 12:52:35.573500 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1238 12:52:35.577118 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1239 12:52:35.583413 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1240 12:52:35.586585 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1241 12:52:35.593225 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1242 12:52:35.596688 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1243 12:52:35.600115 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1244 12:52:35.606248 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1245 12:52:35.609483 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1246 12:52:35.616314 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1247 12:52:35.619475 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1248 12:52:35.626129 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1249 12:52:35.629966 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1250 12:52:35.636144 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1251 12:52:35.639746 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1252 12:52:35.646386 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1253 12:52:35.649571 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1254 12:52:35.655871 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1255 12:52:35.662664 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1256 12:52:35.666016 avoid_fixed_resources: DOMAIN: 0000
1257 12:52:35.672565 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1258 12:52:35.679375 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1259 12:52:35.685894 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1260 12:52:35.696036 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1261 12:52:35.702193 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1262 12:52:35.708788 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1263 12:52:35.718939 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1264 12:52:35.725444 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1265 12:52:35.732047 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1266 12:52:35.738677 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1267 12:52:35.748379 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1268 12:52:35.755293 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1269 12:52:35.755395 Setting resources...
1270 12:52:35.762234 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1271 12:52:35.768616 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1272 12:52:35.772223 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1273 12:52:35.775536 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1274 12:52:35.778439 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1275 12:52:35.785114 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1276 12:52:35.791538 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1277 12:52:35.798536 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1278 12:52:35.804954 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1279 12:52:35.811902 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1280 12:52:35.814805 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1281 12:52:35.821729 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1282 12:52:35.824748 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1283 12:52:35.831782 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1284 12:52:35.834842 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1285 12:52:35.838544 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1286 12:52:35.844634 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1287 12:52:35.847865 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1288 12:52:35.854554 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1289 12:52:35.857981 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1290 12:52:35.864729 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1291 12:52:35.868168 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1292 12:52:35.874996 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1293 12:52:35.878405 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1294 12:52:35.884587 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1295 12:52:35.887688 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1296 12:52:35.894481 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1297 12:52:35.897884 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1298 12:52:35.904221 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1299 12:52:35.907590 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1300 12:52:35.910876 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1301 12:52:35.917741 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1302 12:52:35.924462 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1303 12:52:35.930690 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1304 12:52:35.941412 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1305 12:52:35.947477 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1306 12:52:35.950694 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1307 12:52:35.960578 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1308 12:52:35.964180 Root Device assign_resources, bus 0 link: 0
1309 12:52:35.967195 DOMAIN: 0000 assign_resources, bus 0 link: 0
1310 12:52:35.977551 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1311 12:52:35.984103 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1312 12:52:35.994100 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1313 12:52:36.000753 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1314 12:52:36.010466 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1315 12:52:36.017386 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1316 12:52:36.023793 PCI: 00:14.0 assign_resources, bus 0 link: 0
1317 12:52:36.027136 PCI: 00:14.0 assign_resources, bus 0 link: 0
1318 12:52:36.037617 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1319 12:52:36.044136 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1320 12:52:36.050320 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1321 12:52:36.060731 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1322 12:52:36.064055 PCI: 00:15.0 assign_resources, bus 1 link: 0
1323 12:52:36.070763 PCI: 00:15.0 assign_resources, bus 1 link: 0
1324 12:52:36.077301 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1325 12:52:36.083887 PCI: 00:15.1 assign_resources, bus 2 link: 0
1326 12:52:36.087190 PCI: 00:15.1 assign_resources, bus 2 link: 0
1327 12:52:36.093614 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1328 12:52:36.103957 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1329 12:52:36.110832 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1330 12:52:36.117248 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1331 12:52:36.127155 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1332 12:52:36.133703 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1333 12:52:36.140371 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1334 12:52:36.150337 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1335 12:52:36.153690 PCI: 00:19.0 assign_resources, bus 3 link: 0
1336 12:52:36.160545 PCI: 00:19.0 assign_resources, bus 3 link: 0
1337 12:52:36.167265 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1338 12:52:36.176976 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1339 12:52:36.186889 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1340 12:52:36.190501 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1341 12:52:36.196595 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1342 12:52:36.203339 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1343 12:52:36.210085 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1344 12:52:36.219874 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1345 12:52:36.223539 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1346 12:52:36.229927 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1347 12:52:36.236702 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1348 12:52:36.239852 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1349 12:52:36.246840 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1350 12:52:36.249963 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1351 12:52:36.256516 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1352 12:52:36.259910 LPC: Trying to open IO window from 800 size 1ff
1353 12:52:36.269752 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1354 12:52:36.276363 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1355 12:52:36.286351 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1356 12:52:36.293059 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1357 12:52:36.299859 DOMAIN: 0000 assign_resources, bus 0 link: 0
1358 12:52:36.303270 Root Device assign_resources, bus 0 link: 0
1359 12:52:36.306202 Done setting resources.
1360 12:52:36.313027 Show resources in subtree (Root Device)...After assigning values.
1361 12:52:36.316322 Root Device child on link 0 CPU_CLUSTER: 0
1362 12:52:36.319955 CPU_CLUSTER: 0 child on link 0 APIC: 00
1363 12:52:36.323109 APIC: 00
1364 12:52:36.323208 APIC: 02
1365 12:52:36.323273 APIC: 04
1366 12:52:36.326229 APIC: 03
1367 12:52:36.326314 APIC: 05
1368 12:52:36.329798 APIC: 01
1369 12:52:36.329885 APIC: 07
1370 12:52:36.329951 APIC: 06
1371 12:52:36.336163 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1372 12:52:36.346003 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1373 12:52:36.355711 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1374 12:52:36.355806 PCI: 00:00.0
1375 12:52:36.366396 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1376 12:52:36.375937 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1377 12:52:36.385542 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1378 12:52:36.395423 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1379 12:52:36.405511 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1380 12:52:36.415218 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1381 12:52:36.422069 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1382 12:52:36.432029 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1383 12:52:36.442329 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1384 12:52:36.451454 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1385 12:52:36.461856 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1386 12:52:36.468534 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1387 12:52:36.478293 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1388 12:52:36.487856 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1389 12:52:36.498174 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1390 12:52:36.507968 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1391 12:52:36.508114 PCI: 00:02.0
1392 12:52:36.521296 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1393 12:52:36.530910 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1394 12:52:36.540975 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1395 12:52:36.541226 PCI: 00:04.0
1396 12:52:36.544357 PCI: 00:08.0
1397 12:52:36.554688 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1398 12:52:36.554824 PCI: 00:12.0
1399 12:52:36.564001 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1400 12:52:36.570646 PCI: 00:14.0 child on link 0 USB0 port 0
1401 12:52:36.580398 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1402 12:52:36.583920 USB0 port 0 child on link 0 USB2 port 0
1403 12:52:36.587238 USB2 port 0
1404 12:52:36.587379 USB2 port 1
1405 12:52:36.590242 USB2 port 2
1406 12:52:36.590367 USB2 port 3
1407 12:52:36.593815 USB2 port 5
1408 12:52:36.593937 USB2 port 6
1409 12:52:36.597204 USB2 port 9
1410 12:52:36.597329 USB3 port 0
1411 12:52:36.600640 USB3 port 1
1412 12:52:36.600764 USB3 port 2
1413 12:52:36.603540 USB3 port 3
1414 12:52:36.603721 USB3 port 4
1415 12:52:36.607018 PCI: 00:14.2
1416 12:52:36.616955 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1417 12:52:36.626637 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1418 12:52:36.630404 PCI: 00:14.3
1419 12:52:36.640134 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1420 12:52:36.643270 PCI: 00:15.0 child on link 0 I2C: 01:15
1421 12:52:36.653108 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1422 12:52:36.656727 I2C: 01:15
1423 12:52:36.660331 PCI: 00:15.1 child on link 0 I2C: 02:5d
1424 12:52:36.670529 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1425 12:52:36.673285 I2C: 02:5d
1426 12:52:36.673433 GENERIC: 0.0
1427 12:52:36.676523 PCI: 00:16.0
1428 12:52:36.686441 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1429 12:52:36.686621 PCI: 00:17.0
1430 12:52:36.696547 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1431 12:52:36.706517 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1432 12:52:36.715875 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1433 12:52:36.726058 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1434 12:52:36.736059 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1435 12:52:36.745706 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1436 12:52:36.748892 PCI: 00:19.0 child on link 0 I2C: 03:1a
1437 12:52:36.759256 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1438 12:52:36.762268 I2C: 03:1a
1439 12:52:36.762398 I2C: 03:38
1440 12:52:36.765812 I2C: 03:39
1441 12:52:36.765938 I2C: 03:3a
1442 12:52:36.769370 I2C: 03:3b
1443 12:52:36.772244 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1444 12:52:36.782229 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1445 12:52:36.792329 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1446 12:52:36.801927 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1447 12:52:36.802014 PCI: 01:00.0
1448 12:52:36.815495 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1449 12:52:36.815579 PCI: 00:1e.0
1450 12:52:36.825318 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1451 12:52:36.838490 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1452 12:52:36.841461 PCI: 00:1e.2 child on link 0 SPI: 00
1453 12:52:36.851593 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1454 12:52:36.851714 SPI: 00
1455 12:52:36.855129 PCI: 00:1e.3 child on link 0 SPI: 01
1456 12:52:36.867911 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1457 12:52:36.867993 SPI: 01
1458 12:52:36.871505 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1459 12:52:36.881642 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1460 12:52:36.891021 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1461 12:52:36.891102 PNP: 0c09.0
1462 12:52:36.901218 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1463 12:52:36.901300 PCI: 00:1f.3
1464 12:52:36.911335 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1465 12:52:36.924102 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1466 12:52:36.924184 PCI: 00:1f.4
1467 12:52:36.934492 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1468 12:52:36.944069 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1469 12:52:36.944192 PCI: 00:1f.5
1470 12:52:36.954288 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1471 12:52:36.957300 Done allocating resources.
1472 12:52:36.964104 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1473 12:52:36.967256 Enabling resources...
1474 12:52:36.970456 PCI: 00:00.0 subsystem <- 8086/9b61
1475 12:52:36.974198 PCI: 00:00.0 cmd <- 06
1476 12:52:36.977279 PCI: 00:02.0 subsystem <- 8086/9b41
1477 12:52:36.980615 PCI: 00:02.0 cmd <- 03
1478 12:52:36.983628 PCI: 00:08.0 cmd <- 06
1479 12:52:36.987189 PCI: 00:12.0 subsystem <- 8086/02f9
1480 12:52:36.987295 PCI: 00:12.0 cmd <- 02
1481 12:52:36.993700 PCI: 00:14.0 subsystem <- 8086/02ed
1482 12:52:36.993781 PCI: 00:14.0 cmd <- 02
1483 12:52:36.997306 PCI: 00:14.2 cmd <- 02
1484 12:52:37.000668 PCI: 00:14.3 subsystem <- 8086/02f0
1485 12:52:37.003868 PCI: 00:14.3 cmd <- 02
1486 12:52:37.007332 PCI: 00:15.0 subsystem <- 8086/02e8
1487 12:52:37.010238 PCI: 00:15.0 cmd <- 02
1488 12:52:37.013885 PCI: 00:15.1 subsystem <- 8086/02e9
1489 12:52:37.016936 PCI: 00:15.1 cmd <- 02
1490 12:52:37.020551 PCI: 00:16.0 subsystem <- 8086/02e0
1491 12:52:37.024033 PCI: 00:16.0 cmd <- 02
1492 12:52:37.026924 PCI: 00:17.0 subsystem <- 8086/02d3
1493 12:52:37.030524 PCI: 00:17.0 cmd <- 03
1494 12:52:37.033514 PCI: 00:19.0 subsystem <- 8086/02c5
1495 12:52:37.033593 PCI: 00:19.0 cmd <- 02
1496 12:52:37.037156 PCI: 00:1d.0 bridge ctrl <- 0013
1497 12:52:37.043528 PCI: 00:1d.0 subsystem <- 8086/02b0
1498 12:52:37.043634 PCI: 00:1d.0 cmd <- 06
1499 12:52:37.046849 PCI: 00:1e.0 subsystem <- 8086/02a8
1500 12:52:37.050466 PCI: 00:1e.0 cmd <- 06
1501 12:52:37.053299 PCI: 00:1e.2 subsystem <- 8086/02aa
1502 12:52:37.056910 PCI: 00:1e.2 cmd <- 06
1503 12:52:37.060466 PCI: 00:1e.3 subsystem <- 8086/02ab
1504 12:52:37.063590 PCI: 00:1e.3 cmd <- 02
1505 12:52:37.067072 PCI: 00:1f.0 subsystem <- 8086/0284
1506 12:52:37.070174 PCI: 00:1f.0 cmd <- 407
1507 12:52:37.073265 PCI: 00:1f.3 subsystem <- 8086/02c8
1508 12:52:37.076708 PCI: 00:1f.3 cmd <- 02
1509 12:52:37.079807 PCI: 00:1f.4 subsystem <- 8086/02a3
1510 12:52:37.083234 PCI: 00:1f.4 cmd <- 03
1511 12:52:37.086607 PCI: 00:1f.5 subsystem <- 8086/02a4
1512 12:52:37.090213 PCI: 00:1f.5 cmd <- 406
1513 12:52:37.097349 PCI: 01:00.0 cmd <- 02
1514 12:52:37.102687 done.
1515 12:52:37.114473 ME: Version: 14.0.39.1367
1516 12:52:37.121255 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1517 12:52:37.124603 Initializing devices...
1518 12:52:37.124724 Root Device init ...
1519 12:52:37.131130 Chrome EC: Set SMI mask to 0x0000000000000000
1520 12:52:37.134192 Chrome EC: clear events_b mask to 0x0000000000000000
1521 12:52:37.140862 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1522 12:52:37.147927 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1523 12:52:37.154491 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1524 12:52:37.157520 Chrome EC: Set WAKE mask to 0x0000000000000000
1525 12:52:37.160468 Root Device init finished in 35157 usecs
1526 12:52:37.164028 CPU_CLUSTER: 0 init ...
1527 12:52:37.170930 CPU_CLUSTER: 0 init finished in 2439 usecs
1528 12:52:37.175023 PCI: 00:00.0 init ...
1529 12:52:37.178624 CPU TDP: 15 Watts
1530 12:52:37.181440 CPU PL2 = 64 Watts
1531 12:52:37.185194 PCI: 00:00.0 init finished in 7072 usecs
1532 12:52:37.188551 PCI: 00:02.0 init ...
1533 12:52:37.191533 PCI: 00:02.0 init finished in 2254 usecs
1534 12:52:37.194684 PCI: 00:08.0 init ...
1535 12:52:37.198101 PCI: 00:08.0 init finished in 2251 usecs
1536 12:52:37.201340 PCI: 00:12.0 init ...
1537 12:52:37.205043 PCI: 00:12.0 init finished in 2252 usecs
1538 12:52:37.208320 PCI: 00:14.0 init ...
1539 12:52:37.211378 PCI: 00:14.0 init finished in 2251 usecs
1540 12:52:37.214902 PCI: 00:14.2 init ...
1541 12:52:37.218299 PCI: 00:14.2 init finished in 2252 usecs
1542 12:52:37.221560 PCI: 00:14.3 init ...
1543 12:52:37.225112 PCI: 00:14.3 init finished in 2271 usecs
1544 12:52:37.228134 PCI: 00:15.0 init ...
1545 12:52:37.231153 DW I2C bus 0 at 0xd121f000 (400 KHz)
1546 12:52:37.234795 PCI: 00:15.0 init finished in 5968 usecs
1547 12:52:37.237809 PCI: 00:15.1 init ...
1548 12:52:37.241418 DW I2C bus 1 at 0xd1220000 (400 KHz)
1549 12:52:37.247926 PCI: 00:15.1 init finished in 5975 usecs
1550 12:52:37.248008 PCI: 00:16.0 init ...
1551 12:52:37.254289 PCI: 00:16.0 init finished in 2253 usecs
1552 12:52:37.257869 PCI: 00:19.0 init ...
1553 12:52:37.260813 DW I2C bus 4 at 0xd1222000 (400 KHz)
1554 12:52:37.264410 PCI: 00:19.0 init finished in 5978 usecs
1555 12:52:37.267928 PCI: 00:1d.0 init ...
1556 12:52:37.270797 Initializing PCH PCIe bridge.
1557 12:52:37.274196 PCI: 00:1d.0 init finished in 5283 usecs
1558 12:52:37.277519 PCI: 00:1f.0 init ...
1559 12:52:37.281003 IOAPIC: Initializing IOAPIC at 0xfec00000
1560 12:52:37.287484 IOAPIC: Bootstrap Processor Local APIC = 0x00
1561 12:52:37.287594 IOAPIC: ID = 0x02
1562 12:52:37.290955 IOAPIC: Dumping registers
1563 12:52:37.293974 reg 0x0000: 0x02000000
1564 12:52:37.297459 reg 0x0001: 0x00770020
1565 12:52:37.297544 reg 0x0002: 0x00000000
1566 12:52:37.303987 PCI: 00:1f.0 init finished in 23543 usecs
1567 12:52:37.307525 PCI: 00:1f.4 init ...
1568 12:52:37.310510 PCI: 00:1f.4 init finished in 2263 usecs
1569 12:52:37.321345 PCI: 01:00.0 init ...
1570 12:52:37.324266 PCI: 01:00.0 init finished in 2251 usecs
1571 12:52:37.328629 PNP: 0c09.0 init ...
1572 12:52:37.332077 Google Chrome EC uptime: 11.093 seconds
1573 12:52:37.338395 Google Chrome AP resets since EC boot: 0
1574 12:52:37.341797 Google Chrome most recent AP reset causes:
1575 12:52:37.348685 Google Chrome EC reset flags at last EC boot: reset-pin
1576 12:52:37.351765 PNP: 0c09.0 init finished in 20601 usecs
1577 12:52:37.355186 Devices initialized
1578 12:52:37.358611 Show all devs... After init.
1579 12:52:37.358736 Root Device: enabled 1
1580 12:52:37.361513 CPU_CLUSTER: 0: enabled 1
1581 12:52:37.365174 DOMAIN: 0000: enabled 1
1582 12:52:37.365310 APIC: 00: enabled 1
1583 12:52:37.368801 PCI: 00:00.0: enabled 1
1584 12:52:37.371851 PCI: 00:02.0: enabled 1
1585 12:52:37.374808 PCI: 00:04.0: enabled 0
1586 12:52:37.374932 PCI: 00:05.0: enabled 0
1587 12:52:37.378406 PCI: 00:12.0: enabled 1
1588 12:52:37.381892 PCI: 00:12.5: enabled 0
1589 12:52:37.385038 PCI: 00:12.6: enabled 0
1590 12:52:37.385143 PCI: 00:14.0: enabled 1
1591 12:52:37.388324 PCI: 00:14.1: enabled 0
1592 12:52:37.391734 PCI: 00:14.3: enabled 1
1593 12:52:37.391823 PCI: 00:14.5: enabled 0
1594 12:52:37.394814 PCI: 00:15.0: enabled 1
1595 12:52:37.397856 PCI: 00:15.1: enabled 1
1596 12:52:37.401237 PCI: 00:15.2: enabled 0
1597 12:52:37.401406 PCI: 00:15.3: enabled 0
1598 12:52:37.404806 PCI: 00:16.0: enabled 1
1599 12:52:37.407866 PCI: 00:16.1: enabled 0
1600 12:52:37.411356 PCI: 00:16.2: enabled 0
1601 12:52:37.411469 PCI: 00:16.3: enabled 0
1602 12:52:37.414347 PCI: 00:16.4: enabled 0
1603 12:52:37.417972 PCI: 00:16.5: enabled 0
1604 12:52:37.421028 PCI: 00:17.0: enabled 1
1605 12:52:37.421110 PCI: 00:19.0: enabled 1
1606 12:52:37.424556 PCI: 00:19.1: enabled 0
1607 12:52:37.427505 PCI: 00:19.2: enabled 0
1608 12:52:37.431122 PCI: 00:1a.0: enabled 0
1609 12:52:37.431229 PCI: 00:1c.0: enabled 0
1610 12:52:37.434648 PCI: 00:1c.1: enabled 0
1611 12:52:37.437580 PCI: 00:1c.2: enabled 0
1612 12:52:37.437718 PCI: 00:1c.3: enabled 0
1613 12:52:37.441121 PCI: 00:1c.4: enabled 0
1614 12:52:37.444122 PCI: 00:1c.5: enabled 0
1615 12:52:37.447403 PCI: 00:1c.6: enabled 0
1616 12:52:37.447485 PCI: 00:1c.7: enabled 0
1617 12:52:37.450865 PCI: 00:1d.0: enabled 1
1618 12:52:37.454111 PCI: 00:1d.1: enabled 0
1619 12:52:37.457305 PCI: 00:1d.2: enabled 0
1620 12:52:37.457413 PCI: 00:1d.3: enabled 0
1621 12:52:37.460809 PCI: 00:1d.4: enabled 0
1622 12:52:37.463980 PCI: 00:1d.5: enabled 0
1623 12:52:37.467291 PCI: 00:1e.0: enabled 1
1624 12:52:37.467426 PCI: 00:1e.1: enabled 0
1625 12:52:37.470784 PCI: 00:1e.2: enabled 1
1626 12:52:37.474084 PCI: 00:1e.3: enabled 1
1627 12:52:37.477411 PCI: 00:1f.0: enabled 1
1628 12:52:37.477495 PCI: 00:1f.1: enabled 0
1629 12:52:37.480605 PCI: 00:1f.2: enabled 0
1630 12:52:37.484274 PCI: 00:1f.3: enabled 1
1631 12:52:37.484424 PCI: 00:1f.4: enabled 1
1632 12:52:37.487043 PCI: 00:1f.5: enabled 1
1633 12:52:37.490906 PCI: 00:1f.6: enabled 0
1634 12:52:37.494104 USB0 port 0: enabled 1
1635 12:52:37.494188 I2C: 01:15: enabled 1
1636 12:52:37.497451 I2C: 02:5d: enabled 1
1637 12:52:37.500314 GENERIC: 0.0: enabled 1
1638 12:52:37.500424 I2C: 03:1a: enabled 1
1639 12:52:37.503918 I2C: 03:38: enabled 1
1640 12:52:37.507326 I2C: 03:39: enabled 1
1641 12:52:37.507466 I2C: 03:3a: enabled 1
1642 12:52:37.510352 I2C: 03:3b: enabled 1
1643 12:52:37.513856 PCI: 00:00.0: enabled 1
1644 12:52:37.513945 SPI: 00: enabled 1
1645 12:52:37.517474 SPI: 01: enabled 1
1646 12:52:37.520368 PNP: 0c09.0: enabled 1
1647 12:52:37.520451 USB2 port 0: enabled 1
1648 12:52:37.523908 USB2 port 1: enabled 1
1649 12:52:37.526925 USB2 port 2: enabled 0
1650 12:52:37.530556 USB2 port 3: enabled 0
1651 12:52:37.530690 USB2 port 5: enabled 0
1652 12:52:37.533554 USB2 port 6: enabled 1
1653 12:52:37.536973 USB2 port 9: enabled 1
1654 12:52:37.537093 USB3 port 0: enabled 1
1655 12:52:37.540022 USB3 port 1: enabled 1
1656 12:52:37.543603 USB3 port 2: enabled 1
1657 12:52:37.543695 USB3 port 3: enabled 1
1658 12:52:37.546583 USB3 port 4: enabled 0
1659 12:52:37.550143 APIC: 02: enabled 1
1660 12:52:37.550251 APIC: 04: enabled 1
1661 12:52:37.553685 APIC: 03: enabled 1
1662 12:52:37.556790 APIC: 05: enabled 1
1663 12:52:37.556899 APIC: 01: enabled 1
1664 12:52:37.559611 APIC: 07: enabled 1
1665 12:52:37.563332 APIC: 06: enabled 1
1666 12:52:37.563415 PCI: 00:08.0: enabled 1
1667 12:52:37.566370 PCI: 00:14.2: enabled 1
1668 12:52:37.569859 PCI: 01:00.0: enabled 1
1669 12:52:37.573327 Disabling ACPI via APMC:
1670 12:52:37.576863 done.
1671 12:52:37.580395 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1672 12:52:37.583260 ELOG: NV offset 0xaf0000 size 0x4000
1673 12:52:37.590153 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1674 12:52:37.596834 ELOG: Event(17) added with size 13 at 2023-09-23 12:51:08 UTC
1675 12:52:37.604003 POST: Unexpected post code in previous boot: 0x73
1676 12:52:37.610170 ELOG: Event(A3) added with size 11 at 2023-09-23 12:51:08 UTC
1677 12:52:37.616801 ELOG: Event(A6) added with size 13 at 2023-09-23 12:51:08 UTC
1678 12:52:37.623371 ELOG: Event(92) added with size 9 at 2023-09-23 12:51:08 UTC
1679 12:52:37.626581 ELOG: Event(93) added with size 9 at 2023-09-23 12:51:08 UTC
1680 12:52:37.633523 ELOG: Event(9A) added with size 9 at 2023-09-23 12:51:08 UTC
1681 12:52:37.640231 ELOG: Event(9E) added with size 10 at 2023-09-23 12:51:08 UTC
1682 12:52:37.646878 ELOG: Event(9F) added with size 14 at 2023-09-23 12:51:08 UTC
1683 12:52:37.653194 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1684 12:52:37.659871 ELOG: Event(A1) added with size 10 at 2023-09-23 12:51:08 UTC
1685 12:52:37.666375 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1686 12:52:37.673093 ELOG: Event(A0) added with size 9 at 2023-09-23 12:51:08 UTC
1687 12:52:37.676649 elog_add_boot_reason: Logged dev mode boot
1688 12:52:37.679454 Finalize devices...
1689 12:52:37.682928 PCI: 00:17.0 final
1690 12:52:37.683006 Devices finalized
1691 12:52:37.689490 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1692 12:52:37.693094 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1693 12:52:37.699496 ME: HFSTS1 : 0x90000245
1694 12:52:37.703005 ME: HFSTS2 : 0x3B850126
1695 12:52:37.706182 ME: HFSTS3 : 0x00000020
1696 12:52:37.709430 ME: HFSTS4 : 0x00004800
1697 12:52:37.716046 ME: HFSTS5 : 0x00000000
1698 12:52:37.719547 ME: HFSTS6 : 0x40400006
1699 12:52:37.722894 ME: Manufacturing Mode : NO
1700 12:52:37.726340 ME: FW Partition Table : OK
1701 12:52:37.729277 ME: Bringup Loader Failure : NO
1702 12:52:37.732961 ME: Firmware Init Complete : YES
1703 12:52:37.735714 ME: Boot Options Present : NO
1704 12:52:37.739179 ME: Update In Progress : NO
1705 12:52:37.742760 ME: D0i3 Support : YES
1706 12:52:37.745831 ME: Low Power State Enabled : NO
1707 12:52:37.748952 ME: CPU Replaced : NO
1708 12:52:37.752395 ME: CPU Replacement Valid : YES
1709 12:52:37.756044 ME: Current Working State : 5
1710 12:52:37.759229 ME: Current Operation State : 1
1711 12:52:37.762409 ME: Current Operation Mode : 0
1712 12:52:37.765463 ME: Error Code : 0
1713 12:52:37.769034 ME: CPU Debug Disabled : YES
1714 12:52:37.772736 ME: TXT Support : NO
1715 12:52:37.775606 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1716 12:52:37.782141 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1717 12:52:37.785560 CBFS @ c08000 size 3f8000
1718 12:52:37.792129 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1719 12:52:37.795612 CBFS: Locating 'fallback/dsdt.aml'
1720 12:52:37.798657 CBFS: Found @ offset 10bb80 size 3fa5
1721 12:52:37.802038 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1722 12:52:37.805517 CBFS @ c08000 size 3f8000
1723 12:52:37.812102 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1724 12:52:37.815299 CBFS: Locating 'fallback/slic'
1725 12:52:37.818631 CBFS: 'fallback/slic' not found.
1726 12:52:37.825168 ACPI: Writing ACPI tables at 99b3e000.
1727 12:52:37.825249 ACPI: * FACS
1728 12:52:37.828416 ACPI: * DSDT
1729 12:52:37.831823 Ramoops buffer: 0x100000@0x99a3d000.
1730 12:52:37.835501 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1731 12:52:37.841894 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1732 12:52:37.844875 Google Chrome EC: version:
1733 12:52:37.848530 ro: helios_v2.0.2659-56403530b
1734 12:52:37.851588 rw: helios_v2.0.2849-c41de27e7d
1735 12:52:37.851721 running image: 1
1736 12:52:37.855711 ACPI: * FADT
1737 12:52:37.855833 SCI is IRQ9
1738 12:52:37.862543 ACPI: added table 1/32, length now 40
1739 12:52:37.862684 ACPI: * SSDT
1740 12:52:37.865615 Found 1 CPU(s) with 8 core(s) each.
1741 12:52:37.869574 Error: Could not locate 'wifi_sar' in VPD.
1742 12:52:37.875508 Checking CBFS for default SAR values
1743 12:52:37.879250 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1744 12:52:37.882186 CBFS @ c08000 size 3f8000
1745 12:52:37.889364 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1746 12:52:37.892522 CBFS: Locating 'wifi_sar_defaults.hex'
1747 12:52:37.895427 CBFS: Found @ offset 5fac0 size 77
1748 12:52:37.899070 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1749 12:52:37.905710 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1750 12:52:37.909189 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1751 12:52:37.915253 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1752 12:52:37.918764 failed to find key in VPD: dsm_calib_r0_0
1753 12:52:37.928505 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1754 12:52:37.931999 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1755 12:52:37.935448 failed to find key in VPD: dsm_calib_r0_1
1756 12:52:37.945426 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1757 12:52:37.951874 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1758 12:52:37.955489 failed to find key in VPD: dsm_calib_r0_2
1759 12:52:37.965268 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1760 12:52:37.968430 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1761 12:52:37.975513 failed to find key in VPD: dsm_calib_r0_3
1762 12:52:37.982141 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1763 12:52:37.988172 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1764 12:52:37.991506 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1765 12:52:37.994762 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1766 12:52:37.998528 EC returned error result code 1
1767 12:52:38.002295 EC returned error result code 1
1768 12:52:38.006553 EC returned error result code 1
1769 12:52:38.013190 PS2K: Bad resp from EC. Vivaldi disabled!
1770 12:52:38.016677 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1771 12:52:38.023186 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1772 12:52:38.029433 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1773 12:52:38.033078 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1774 12:52:38.039286 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1775 12:52:38.046542 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1776 12:52:38.053144 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1777 12:52:38.056117 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1778 12:52:38.059103 ACPI: added table 2/32, length now 44
1779 12:52:38.062752 ACPI: * MCFG
1780 12:52:38.065930 ACPI: added table 3/32, length now 48
1781 12:52:38.069201 ACPI: * TPM2
1782 12:52:38.072571 TPM2 log created at 99a2d000
1783 12:52:38.075955 ACPI: added table 4/32, length now 52
1784 12:52:38.076060 ACPI: * MADT
1785 12:52:38.079169 SCI is IRQ9
1786 12:52:38.082297 ACPI: added table 5/32, length now 56
1787 12:52:38.082422 current = 99b43ac0
1788 12:52:38.085860 ACPI: * DMAR
1789 12:52:38.089492 ACPI: added table 6/32, length now 60
1790 12:52:38.092508 ACPI: * IGD OpRegion
1791 12:52:38.092587 GMA: Found VBT in CBFS
1792 12:52:38.096138 GMA: Found valid VBT in CBFS
1793 12:52:38.099142 ACPI: added table 7/32, length now 64
1794 12:52:38.102155 ACPI: * HPET
1795 12:52:38.105738 ACPI: added table 8/32, length now 68
1796 12:52:38.105849 ACPI: done.
1797 12:52:38.108777 ACPI tables: 31744 bytes.
1798 12:52:38.112572 smbios_write_tables: 99a2c000
1799 12:52:38.115795 EC returned error result code 3
1800 12:52:38.119023 Couldn't obtain OEM name from CBI
1801 12:52:38.122340 Create SMBIOS type 17
1802 12:52:38.126345 PCI: 00:00.0 (Intel Cannonlake)
1803 12:52:38.129396 PCI: 00:14.3 (Intel WiFi)
1804 12:52:38.132443 SMBIOS tables: 939 bytes.
1805 12:52:38.135814 Writing table forward entry at 0x00000500
1806 12:52:38.142390 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1807 12:52:38.145830 Writing coreboot table at 0x99b62000
1808 12:52:38.152276 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1809 12:52:38.155660 1. 0000000000001000-000000000009ffff: RAM
1810 12:52:38.158821 2. 00000000000a0000-00000000000fffff: RESERVED
1811 12:52:38.165331 3. 0000000000100000-0000000099a2bfff: RAM
1812 12:52:38.169045 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1813 12:52:38.175370 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1814 12:52:38.181736 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1815 12:52:38.185164 7. 000000009a000000-000000009f7fffff: RESERVED
1816 12:52:38.192156 8. 00000000e0000000-00000000efffffff: RESERVED
1817 12:52:38.195553 9. 00000000fc000000-00000000fc000fff: RESERVED
1818 12:52:38.198456 10. 00000000fe000000-00000000fe00ffff: RESERVED
1819 12:52:38.205137 11. 00000000fed10000-00000000fed17fff: RESERVED
1820 12:52:38.208574 12. 00000000fed80000-00000000fed83fff: RESERVED
1821 12:52:38.215384 13. 00000000fed90000-00000000fed91fff: RESERVED
1822 12:52:38.218220 14. 00000000feda0000-00000000feda1fff: RESERVED
1823 12:52:38.224928 15. 0000000100000000-000000045e7fffff: RAM
1824 12:52:38.228404 Graphics framebuffer located at 0xc0000000
1825 12:52:38.231727 Passing 5 GPIOs to payload:
1826 12:52:38.235231 NAME | PORT | POLARITY | VALUE
1827 12:52:38.241591 write protect | undefined | high | low
1828 12:52:38.244791 lid | undefined | high | high
1829 12:52:38.251277 power | undefined | high | low
1830 12:52:38.258133 oprom | undefined | high | low
1831 12:52:38.261473 EC in RW | 0x000000cb | high | low
1832 12:52:38.264609 Board ID: 4
1833 12:52:38.268135 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1834 12:52:38.271143 CBFS @ c08000 size 3f8000
1835 12:52:38.277826 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1836 12:52:38.281181 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1837 12:52:38.284841 coreboot table: 1492 bytes.
1838 12:52:38.287808 IMD ROOT 0. 99fff000 00001000
1839 12:52:38.291191 IMD SMALL 1. 99ffe000 00001000
1840 12:52:38.294740 FSP MEMORY 2. 99c4e000 003b0000
1841 12:52:38.298063 CONSOLE 3. 99c2e000 00020000
1842 12:52:38.301455 FMAP 4. 99c2d000 0000054e
1843 12:52:38.304788 TIME STAMP 5. 99c2c000 00000910
1844 12:52:38.307836 VBOOT WORK 6. 99c18000 00014000
1845 12:52:38.311289 MRC DATA 7. 99c16000 00001958
1846 12:52:38.314308 ROMSTG STCK 8. 99c15000 00001000
1847 12:52:38.317967 AFTER CAR 9. 99c0b000 0000a000
1848 12:52:38.321514 RAMSTAGE 10. 99baf000 0005c000
1849 12:52:38.324548 REFCODE 11. 99b7a000 00035000
1850 12:52:38.328162 SMM BACKUP 12. 99b6a000 00010000
1851 12:52:38.331187 COREBOOT 13. 99b62000 00008000
1852 12:52:38.334858 ACPI 14. 99b3e000 00024000
1853 12:52:38.337624 ACPI GNVS 15. 99b3d000 00001000
1854 12:52:38.341336 RAMOOPS 16. 99a3d000 00100000
1855 12:52:38.344688 TPM2 TCGLOG17. 99a2d000 00010000
1856 12:52:38.347705 SMBIOS 18. 99a2c000 00000800
1857 12:52:38.351277 IMD small region:
1858 12:52:38.354605 IMD ROOT 0. 99ffec00 00000400
1859 12:52:38.358007 FSP RUNTIME 1. 99ffebe0 00000004
1860 12:52:38.361179 EC HOSTEVENT 2. 99ffebc0 00000008
1861 12:52:38.364814 POWER STATE 3. 99ffeb80 00000040
1862 12:52:38.367732 ROMSTAGE 4. 99ffeb60 00000004
1863 12:52:38.371144 MEM INFO 5. 99ffe9a0 000001b9
1864 12:52:38.374407 VPD 6. 99ffe920 0000006c
1865 12:52:38.377917 MTRR: Physical address space:
1866 12:52:38.384027 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1867 12:52:38.390855 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1868 12:52:38.397778 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1869 12:52:38.404114 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1870 12:52:38.410613 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1871 12:52:38.417454 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1872 12:52:38.424176 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1873 12:52:38.427180 MTRR: Fixed MSR 0x250 0x0606060606060606
1874 12:52:38.430681 MTRR: Fixed MSR 0x258 0x0606060606060606
1875 12:52:38.433713 MTRR: Fixed MSR 0x259 0x0000000000000000
1876 12:52:38.437312 MTRR: Fixed MSR 0x268 0x0606060606060606
1877 12:52:38.443969 MTRR: Fixed MSR 0x269 0x0606060606060606
1878 12:52:38.446816 MTRR: Fixed MSR 0x26a 0x0606060606060606
1879 12:52:38.450259 MTRR: Fixed MSR 0x26b 0x0606060606060606
1880 12:52:38.453966 MTRR: Fixed MSR 0x26c 0x0606060606060606
1881 12:52:38.460362 MTRR: Fixed MSR 0x26d 0x0606060606060606
1882 12:52:38.463745 MTRR: Fixed MSR 0x26e 0x0606060606060606
1883 12:52:38.467097 MTRR: Fixed MSR 0x26f 0x0606060606060606
1884 12:52:38.470102 call enable_fixed_mtrr()
1885 12:52:38.473713 CPU physical address size: 39 bits
1886 12:52:38.480351 MTRR: default type WB/UC MTRR counts: 6/8.
1887 12:52:38.483345 MTRR: WB selected as default type.
1888 12:52:38.486325 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1889 12:52:38.493320 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1890 12:52:38.499780 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1891 12:52:38.506498 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1892 12:52:38.513231 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1893 12:52:38.519510 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1894 12:52:38.519622
1895 12:52:38.522996 MTRR check
1896 12:52:38.523110 Fixed MTRRs : Enabled
1897 12:52:38.526163 Variable MTRRs: Enabled
1898 12:52:38.526272
1899 12:52:38.529919 MTRR: Fixed MSR 0x250 0x0606060606060606
1900 12:52:38.536051 MTRR: Fixed MSR 0x258 0x0606060606060606
1901 12:52:38.539519 MTRR: Fixed MSR 0x259 0x0000000000000000
1902 12:52:38.543175 MTRR: Fixed MSR 0x268 0x0606060606060606
1903 12:52:38.546160 MTRR: Fixed MSR 0x269 0x0606060606060606
1904 12:52:38.552602 MTRR: Fixed MSR 0x26a 0x0606060606060606
1905 12:52:38.556030 MTRR: Fixed MSR 0x26b 0x0606060606060606
1906 12:52:38.559052 MTRR: Fixed MSR 0x26c 0x0606060606060606
1907 12:52:38.562500 MTRR: Fixed MSR 0x26d 0x0606060606060606
1908 12:52:38.565836 MTRR: Fixed MSR 0x26e 0x0606060606060606
1909 12:52:38.572481 MTRR: Fixed MSR 0x26f 0x0606060606060606
1910 12:52:38.575894 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1911 12:52:38.578829 call enable_fixed_mtrr()
1912 12:52:38.586087 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1913 12:52:38.589068 CPU physical address size: 39 bits
1914 12:52:38.592613 CBFS @ c08000 size 3f8000
1915 12:52:38.595527 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1916 12:52:38.599175 CBFS: Locating 'fallback/payload'
1917 12:52:38.605508 MTRR: Fixed MSR 0x250 0x0606060606060606
1918 12:52:38.608746 MTRR: Fixed MSR 0x258 0x0606060606060606
1919 12:52:38.612154 MTRR: Fixed MSR 0x259 0x0000000000000000
1920 12:52:38.615491 MTRR: Fixed MSR 0x268 0x0606060606060606
1921 12:52:38.621830 MTRR: Fixed MSR 0x269 0x0606060606060606
1922 12:52:38.625501 MTRR: Fixed MSR 0x26a 0x0606060606060606
1923 12:52:38.628366 MTRR: Fixed MSR 0x26b 0x0606060606060606
1924 12:52:38.631896 MTRR: Fixed MSR 0x26c 0x0606060606060606
1925 12:52:38.638669 MTRR: Fixed MSR 0x26d 0x0606060606060606
1926 12:52:38.641816 MTRR: Fixed MSR 0x26e 0x0606060606060606
1927 12:52:38.644927 MTRR: Fixed MSR 0x26f 0x0606060606060606
1928 12:52:38.648540 MTRR: Fixed MSR 0x250 0x0606060606060606
1929 12:52:38.651714 call enable_fixed_mtrr()
1930 12:52:38.655131 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 12:52:38.661469 MTRR: Fixed MSR 0x259 0x0000000000000000
1932 12:52:38.664748 MTRR: Fixed MSR 0x268 0x0606060606060606
1933 12:52:38.668290 MTRR: Fixed MSR 0x269 0x0606060606060606
1934 12:52:38.671782 MTRR: Fixed MSR 0x26a 0x0606060606060606
1935 12:52:38.678247 MTRR: Fixed MSR 0x26b 0x0606060606060606
1936 12:52:38.681595 MTRR: Fixed MSR 0x26c 0x0606060606060606
1937 12:52:38.684657 MTRR: Fixed MSR 0x26d 0x0606060606060606
1938 12:52:38.688089 MTRR: Fixed MSR 0x26e 0x0606060606060606
1939 12:52:38.694721 MTRR: Fixed MSR 0x26f 0x0606060606060606
1940 12:52:38.698241 CPU physical address size: 39 bits
1941 12:52:38.701134 call enable_fixed_mtrr()
1942 12:52:38.704734 MTRR: Fixed MSR 0x250 0x0606060606060606
1943 12:52:38.707669 MTRR: Fixed MSR 0x250 0x0606060606060606
1944 12:52:38.711140 MTRR: Fixed MSR 0x258 0x0606060606060606
1945 12:52:38.717704 MTRR: Fixed MSR 0x259 0x0000000000000000
1946 12:52:38.721192 MTRR: Fixed MSR 0x268 0x0606060606060606
1947 12:52:38.724292 MTRR: Fixed MSR 0x269 0x0606060606060606
1948 12:52:38.727694 MTRR: Fixed MSR 0x26a 0x0606060606060606
1949 12:52:38.734437 MTRR: Fixed MSR 0x26b 0x0606060606060606
1950 12:52:38.737752 MTRR: Fixed MSR 0x26c 0x0606060606060606
1951 12:52:38.740712 MTRR: Fixed MSR 0x26d 0x0606060606060606
1952 12:52:38.744245 MTRR: Fixed MSR 0x26e 0x0606060606060606
1953 12:52:38.750654 MTRR: Fixed MSR 0x26f 0x0606060606060606
1954 12:52:38.754177 MTRR: Fixed MSR 0x258 0x0606060606060606
1955 12:52:38.757503 call enable_fixed_mtrr()
1956 12:52:38.760544 MTRR: Fixed MSR 0x259 0x0000000000000000
1957 12:52:38.764098 MTRR: Fixed MSR 0x268 0x0606060606060606
1958 12:52:38.767407 MTRR: Fixed MSR 0x269 0x0606060606060606
1959 12:52:38.773891 MTRR: Fixed MSR 0x26a 0x0606060606060606
1960 12:52:38.777313 MTRR: Fixed MSR 0x26b 0x0606060606060606
1961 12:52:38.780271 MTRR: Fixed MSR 0x26c 0x0606060606060606
1962 12:52:38.783572 MTRR: Fixed MSR 0x26d 0x0606060606060606
1963 12:52:38.790626 MTRR: Fixed MSR 0x26e 0x0606060606060606
1964 12:52:38.793496 MTRR: Fixed MSR 0x26f 0x0606060606060606
1965 12:52:38.796891 CPU physical address size: 39 bits
1966 12:52:38.800541 call enable_fixed_mtrr()
1967 12:52:38.803502 CBFS: Found @ offset 1c96c0 size 3f798
1968 12:52:38.806992 CPU physical address size: 39 bits
1969 12:52:38.810119 MTRR: Fixed MSR 0x250 0x0606060606060606
1970 12:52:38.816723 MTRR: Fixed MSR 0x250 0x0606060606060606
1971 12:52:38.819833 MTRR: Fixed MSR 0x258 0x0606060606060606
1972 12:52:38.823267 MTRR: Fixed MSR 0x259 0x0000000000000000
1973 12:52:38.826837 MTRR: Fixed MSR 0x268 0x0606060606060606
1974 12:52:38.829717 MTRR: Fixed MSR 0x269 0x0606060606060606
1975 12:52:38.836694 MTRR: Fixed MSR 0x26a 0x0606060606060606
1976 12:52:38.840004 MTRR: Fixed MSR 0x26b 0x0606060606060606
1977 12:52:38.843225 MTRR: Fixed MSR 0x26c 0x0606060606060606
1978 12:52:38.846503 MTRR: Fixed MSR 0x26d 0x0606060606060606
1979 12:52:38.853095 MTRR: Fixed MSR 0x26e 0x0606060606060606
1980 12:52:38.856499 MTRR: Fixed MSR 0x26f 0x0606060606060606
1981 12:52:38.859393 MTRR: Fixed MSR 0x258 0x0606060606060606
1982 12:52:38.862901 call enable_fixed_mtrr()
1983 12:52:38.866457 MTRR: Fixed MSR 0x259 0x0000000000000000
1984 12:52:38.869436 MTRR: Fixed MSR 0x268 0x0606060606060606
1985 12:52:38.876200 MTRR: Fixed MSR 0x269 0x0606060606060606
1986 12:52:38.879238 MTRR: Fixed MSR 0x26a 0x0606060606060606
1987 12:52:38.882805 MTRR: Fixed MSR 0x26b 0x0606060606060606
1988 12:52:38.885817 MTRR: Fixed MSR 0x26c 0x0606060606060606
1989 12:52:38.892513 MTRR: Fixed MSR 0x26d 0x0606060606060606
1990 12:52:38.895972 MTRR: Fixed MSR 0x26e 0x0606060606060606
1991 12:52:38.899410 MTRR: Fixed MSR 0x26f 0x0606060606060606
1992 12:52:38.902256 CPU physical address size: 39 bits
1993 12:52:38.905910 call enable_fixed_mtrr()
1994 12:52:38.908731 CPU physical address size: 39 bits
1995 12:52:38.915821 Checking segment from ROM address 0xffdd16f8
1996 12:52:38.918924 CPU physical address size: 39 bits
1997 12:52:38.922521 Checking segment from ROM address 0xffdd1714
1998 12:52:38.925828 Loading segment from ROM address 0xffdd16f8
1999 12:52:38.928680 code (compression=0)
2000 12:52:38.938935 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2001 12:52:38.945200 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2002 12:52:38.948485 it's not compressed!
2003 12:52:39.040439 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2004 12:52:39.047320 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2005 12:52:39.050934 Loading segment from ROM address 0xffdd1714
2006 12:52:39.054024 Entry Point 0x30000000
2007 12:52:39.057448 Loaded segments
2008 12:52:39.062723 Finalizing chipset.
2009 12:52:39.066179 Finalizing SMM.
2010 12:52:39.069598 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2011 12:52:39.072605 mp_park_aps done after 0 msecs.
2012 12:52:39.079154 Jumping to boot code at 30000000(99b62000)
2013 12:52:39.085750 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2014 12:52:39.085853
2015 12:52:39.085940
2016 12:52:39.086042
2017 12:52:39.089209 Starting depthcharge on Helios...
2018 12:52:39.089310
2019 12:52:39.089733 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2020 12:52:39.089862 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2021 12:52:39.089984 Setting prompt string to ['hatch:']
2022 12:52:39.090096 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2023 12:52:39.099381 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2024 12:52:39.099499
2025 12:52:39.105980 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2026 12:52:39.106065
2027 12:52:39.112445 board_setup: Info: eMMC controller not present; skipping
2028 12:52:39.112526
2029 12:52:39.115435 New NVMe Controller 0x30053ac0 @ 00:1d:00
2030 12:52:39.115528
2031 12:52:39.122450 board_setup: Info: SDHCI controller not present; skipping
2032 12:52:39.122534
2033 12:52:39.128647 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2034 12:52:39.128729
2035 12:52:39.128815 Wipe memory regions:
2036 12:52:39.128894
2037 12:52:39.132056 [0x00000000001000, 0x000000000a0000)
2038 12:52:39.132152
2039 12:52:39.135519 [0x00000000100000, 0x00000030000000)
2040 12:52:39.201706
2041 12:52:39.205229 [0x00000030657430, 0x00000099a2c000)
2042 12:52:39.342684
2043 12:52:39.345705 [0x00000100000000, 0x0000045e800000)
2044 12:52:40.728065
2045 12:52:40.728242 R8152: Initializing
2046 12:52:40.728345
2047 12:52:40.731034 Version 9 (ocp_data = 6010)
2048 12:52:40.735569
2049 12:52:40.735725 R8152: Done initializing
2050 12:52:40.735793
2051 12:52:40.738446 Adding net device
2052 12:52:41.221681
2053 12:52:41.221817 R8152: Initializing
2054 12:52:41.221884
2055 12:52:41.224554 Version 6 (ocp_data = 5c30)
2056 12:52:41.224636
2057 12:52:41.228042 R8152: Done initializing
2058 12:52:41.228124
2059 12:52:41.231838 net_add_device: Attemp to include the same device
2060 12:52:41.234528
2061 12:52:41.242098 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2062 12:52:41.242204
2063 12:52:41.242307
2064 12:52:41.242396
2065 12:52:41.242705 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2067 12:52:41.343129 hatch: tftpboot 192.168.201.1 11602057/tftp-deploy-ac4sq2uh/kernel/bzImage 11602057/tftp-deploy-ac4sq2uh/kernel/cmdline 11602057/tftp-deploy-ac4sq2uh/ramdisk/ramdisk.cpio.gz
2068 12:52:41.343292 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2069 12:52:41.343403 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2070 12:52:41.348103 tftpboot 192.168.201.1 11602057/tftp-deploy-ac4sq2uh/kernel/bzIploy-ac4sq2uh/kernel/cmdline 11602057/tftp-deploy-ac4sq2uh/ramdisk/ramdisk.cpio.gz
2071 12:52:41.348191
2072 12:52:41.348256 Waiting for link
2073 12:52:41.548966
2074 12:52:41.549107 done.
2075 12:52:41.549177
2076 12:52:41.549239 MAC: 00:24:32:50:19:be
2077 12:52:41.549298
2078 12:52:41.552063 Sending DHCP discover... done.
2079 12:52:41.552147
2080 12:52:41.555097 Waiting for reply... done.
2081 12:52:41.555179
2082 12:52:41.558673 Sending DHCP request... done.
2083 12:52:41.558757
2084 12:52:41.566179 Waiting for reply... done.
2085 12:52:41.566260
2086 12:52:41.566323 My ip is 192.168.201.15
2087 12:52:41.566383
2088 12:52:41.569610 The DHCP server ip is 192.168.201.1
2089 12:52:41.572573
2090 12:52:41.576514 TFTP server IP predefined by user: 192.168.201.1
2091 12:52:41.576596
2092 12:52:41.582947 Bootfile predefined by user: 11602057/tftp-deploy-ac4sq2uh/kernel/bzImage
2093 12:52:41.583028
2094 12:52:41.586292 Sending tftp read request... done.
2095 12:52:41.586373
2096 12:52:41.589682 Waiting for the transfer...
2097 12:52:41.589767
2098 12:52:42.139019 00000000 ################################################################
2099 12:52:42.139163
2100 12:52:42.674521 00080000 ################################################################
2101 12:52:42.674663
2102 12:52:43.207091 00100000 ################################################################
2103 12:52:43.207274
2104 12:52:43.752273 00180000 ################################################################
2105 12:52:43.752415
2106 12:52:44.300979 00200000 ################################################################
2107 12:52:44.301127
2108 12:52:44.826628 00280000 ################################################################
2109 12:52:44.826795
2110 12:52:45.349617 00300000 ################################################################
2111 12:52:45.349842
2112 12:52:45.895763 00380000 ################################################################
2113 12:52:45.895938
2114 12:52:46.436546 00400000 ################################################################
2115 12:52:46.436684
2116 12:52:46.970807 00480000 ################################################################
2117 12:52:46.970951
2118 12:52:47.516625 00500000 ################################################################
2119 12:52:47.516773
2120 12:52:48.056945 00580000 ################################################################
2121 12:52:48.057101
2122 12:52:48.596872 00600000 ################################################################
2123 12:52:48.597059
2124 12:52:49.117901 00680000 ################################################################
2125 12:52:49.118075
2126 12:52:49.643036 00700000 ################################################################
2127 12:52:49.643180
2128 12:52:50.177428 00780000 ################################################################
2129 12:52:50.177587
2130 12:52:50.703557 00800000 ################################################################
2131 12:52:50.703717
2132 12:52:51.219226 00880000 ################################################################
2133 12:52:51.219390
2134 12:52:51.737207 00900000 ################################################################
2135 12:52:51.737387
2136 12:52:52.256598 00980000 ################################################################
2137 12:52:52.256738
2138 12:52:52.778814 00a00000 ################################################################
2139 12:52:52.778952
2140 12:52:53.242383 00a80000 ######################################################### done.
2141 12:52:53.242516
2142 12:52:53.245454 The bootfile was 11473408 bytes long.
2143 12:52:53.245532
2144 12:52:53.248531 Sending tftp read request... done.
2145 12:52:53.248612
2146 12:52:53.251811 Waiting for the transfer...
2147 12:52:53.251914
2148 12:52:53.775079 00000000 ################################################################
2149 12:52:53.775211
2150 12:52:54.291317 00080000 ################################################################
2151 12:52:54.291458
2152 12:52:54.814998 00100000 ################################################################
2153 12:52:54.815180
2154 12:52:55.334165 00180000 ################################################################
2155 12:52:55.334324
2156 12:52:55.851171 00200000 ################################################################
2157 12:52:55.851341
2158 12:52:56.382066 00280000 ################################################################
2159 12:52:56.382204
2160 12:52:56.919095 00300000 ################################################################
2161 12:52:56.919243
2162 12:52:57.435531 00380000 ################################################################
2163 12:52:57.435712
2164 12:52:57.939418 00400000 ################################################################
2165 12:52:57.939583
2166 12:52:58.458803 00480000 ################################################################
2167 12:52:58.458938
2168 12:52:58.979123 00500000 ################################################################
2169 12:52:58.979275
2170 12:52:59.360635 00580000 ################################################ done.
2171 12:52:59.360783
2172 12:52:59.363659 Sending tftp read request... done.
2173 12:52:59.363747
2174 12:52:59.366738 Waiting for the transfer...
2175 12:52:59.366852
2176 12:52:59.370225 00000000 # done.
2177 12:52:59.370332
2178 12:52:59.376814 Command line loaded dynamically from TFTP file: 11602057/tftp-deploy-ac4sq2uh/kernel/cmdline
2179 12:52:59.376951
2180 12:52:59.406275 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11602057/extract-nfsrootfs-94n83t61,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2181 12:52:59.406400
2182 12:52:59.412876 ec_init(0): CrosEC protocol v3 supported (256, 256)
2183 12:52:59.417849
2184 12:52:59.420856 Shutting down all USB controllers.
2185 12:52:59.420961
2186 12:52:59.421067 Removing current net device
2187 12:52:59.424989
2188 12:52:59.425106 Finalizing coreboot
2189 12:52:59.425202
2190 12:52:59.431602 Exiting depthcharge with code 4 at timestamp: 27704136
2191 12:52:59.431756
2192 12:52:59.431873
2193 12:52:59.431989 Starting kernel ...
2194 12:52:59.432103
2195 12:52:59.432214
2196 12:52:59.432764 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2197 12:52:59.432924 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
2198 12:52:59.433045 Setting prompt string to ['Linux version [0-9]']
2199 12:52:59.433173 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2200 12:52:59.433294 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2202 12:57:21.433199 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
2204 12:57:21.433404 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
2206 12:57:21.433566 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2209 12:57:21.433815 end: 2 depthcharge-action (duration 00:05:00) [common]
2211 12:57:21.434079 Cleaning after the job
2212 12:57:21.434175 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11602057/tftp-deploy-ac4sq2uh/ramdisk
2213 12:57:21.435229 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11602057/tftp-deploy-ac4sq2uh/kernel
2214 12:57:21.436986 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11602057/tftp-deploy-ac4sq2uh/nfsrootfs
2215 12:57:21.514215 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11602057/tftp-deploy-ac4sq2uh/modules
2216 12:57:21.515190 start: 5.1 power-off (timeout 00:00:30) [common]
2217 12:57:21.515368 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2218 12:57:21.591009 >> Command sent successfully.
2219 12:57:21.594402 Returned 0 in 0 seconds
2220 12:57:21.694795 end: 5.1 power-off (duration 00:00:00) [common]
2222 12:57:21.695128 start: 5.2 read-feedback (timeout 00:10:00) [common]
2223 12:57:21.695395 Listened to connection for namespace 'common' for up to 1s
2225 12:57:21.695769 Listened to connection for namespace 'common' for up to 1s
2226 12:57:22.695762 Finalising connection for namespace 'common'
2227 12:57:22.695939 Disconnecting from shell: Finalise
2228 12:57:22.696012