Boot log: asus-cx9400-volteer
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 12:50:56.622498 lava-dispatcher, installed at version: 2023.06
2 12:50:56.622766 start: 0 validate
3 12:50:56.622937 Start time: 2023-09-23 12:50:56.622930+00:00 (UTC)
4 12:50:56.623101 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:50:56.623274 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230623.0%2Famd64%2Frootfs.cpio.gz exists
6 12:50:56.891423 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:50:56.891640 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.292-cip102-406-g9efaa60a8cb4%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:50:57.159996 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:50:57.160179 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.292-cip102-406-g9efaa60a8cb4%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:50:57.428168 validate duration: 0.81
12 12:50:57.428430 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:50:57.428525 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:50:57.428613 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:50:57.428738 Not decompressing ramdisk as can be used compressed.
16 12:50:57.428821 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230623.0/amd64/rootfs.cpio.gz
17 12:50:57.428889 saving as /var/lib/lava/dispatcher/tmp/11602095/tftp-deploy-n3qavt_a/ramdisk/rootfs.cpio.gz
18 12:50:57.428952 total size: 35760064 (34 MB)
19 12:50:57.430089 progress 0 % (0 MB)
20 12:50:57.439989 progress 5 % (1 MB)
21 12:50:57.449539 progress 10 % (3 MB)
22 12:50:57.459008 progress 15 % (5 MB)
23 12:50:57.468705 progress 20 % (6 MB)
24 12:50:57.478609 progress 25 % (8 MB)
25 12:50:57.488282 progress 30 % (10 MB)
26 12:50:57.497781 progress 35 % (11 MB)
27 12:50:57.507093 progress 40 % (13 MB)
28 12:50:57.516503 progress 45 % (15 MB)
29 12:50:57.525856 progress 50 % (17 MB)
30 12:50:57.535338 progress 55 % (18 MB)
31 12:50:57.544743 progress 60 % (20 MB)
32 12:50:57.554213 progress 65 % (22 MB)
33 12:50:57.563589 progress 70 % (23 MB)
34 12:50:57.573278 progress 75 % (25 MB)
35 12:50:57.582745 progress 80 % (27 MB)
36 12:50:57.592077 progress 85 % (29 MB)
37 12:50:57.601313 progress 90 % (30 MB)
38 12:50:57.611715 progress 95 % (32 MB)
39 12:50:57.622204 progress 100 % (34 MB)
40 12:50:57.622411 34 MB downloaded in 0.19 s (176.28 MB/s)
41 12:50:57.622598 end: 1.1.1 http-download (duration 00:00:00) [common]
43 12:50:57.622865 end: 1.1 download-retry (duration 00:00:00) [common]
44 12:50:57.622951 start: 1.2 download-retry (timeout 00:10:00) [common]
45 12:50:57.623062 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 12:50:57.623195 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.292-cip102-406-g9efaa60a8cb4/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:50:57.623286 saving as /var/lib/lava/dispatcher/tmp/11602095/tftp-deploy-n3qavt_a/kernel/bzImage
48 12:50:57.623437 total size: 11473408 (10 MB)
49 12:50:57.623533 No compression specified
50 12:50:57.624747 progress 0 % (0 MB)
51 12:50:57.627981 progress 5 % (0 MB)
52 12:50:57.631184 progress 10 % (1 MB)
53 12:50:57.634468 progress 15 % (1 MB)
54 12:50:57.637719 progress 20 % (2 MB)
55 12:50:57.640784 progress 25 % (2 MB)
56 12:50:57.643960 progress 30 % (3 MB)
57 12:50:57.646982 progress 35 % (3 MB)
58 12:50:57.650217 progress 40 % (4 MB)
59 12:50:57.653350 progress 45 % (4 MB)
60 12:50:57.656560 progress 50 % (5 MB)
61 12:50:57.659869 progress 55 % (6 MB)
62 12:50:57.663019 progress 60 % (6 MB)
63 12:50:57.666272 progress 65 % (7 MB)
64 12:50:57.669652 progress 70 % (7 MB)
65 12:50:57.672987 progress 75 % (8 MB)
66 12:50:57.676202 progress 80 % (8 MB)
67 12:50:57.679163 progress 85 % (9 MB)
68 12:50:57.682328 progress 90 % (9 MB)
69 12:50:57.685586 progress 95 % (10 MB)
70 12:50:57.688793 progress 100 % (10 MB)
71 12:50:57.688918 10 MB downloaded in 0.07 s (167.07 MB/s)
72 12:50:57.689063 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:50:57.689317 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:50:57.689406 start: 1.3 download-retry (timeout 00:10:00) [common]
76 12:50:57.689494 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 12:50:57.689632 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.292-cip102-406-g9efaa60a8cb4/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:50:57.689700 saving as /var/lib/lava/dispatcher/tmp/11602095/tftp-deploy-n3qavt_a/modules/modules.tar
79 12:50:57.689760 total size: 484692 (0 MB)
80 12:50:57.689848 Using unxz to decompress xz
81 12:50:57.694438 progress 6 % (0 MB)
82 12:50:57.694871 progress 13 % (0 MB)
83 12:50:57.695138 progress 20 % (0 MB)
84 12:50:57.696909 progress 27 % (0 MB)
85 12:50:57.699127 progress 33 % (0 MB)
86 12:50:57.701067 progress 40 % (0 MB)
87 12:50:57.703353 progress 47 % (0 MB)
88 12:50:57.705431 progress 54 % (0 MB)
89 12:50:57.707526 progress 60 % (0 MB)
90 12:50:57.710058 progress 67 % (0 MB)
91 12:50:57.712180 progress 74 % (0 MB)
92 12:50:57.714236 progress 81 % (0 MB)
93 12:50:57.716564 progress 87 % (0 MB)
94 12:50:57.718335 progress 94 % (0 MB)
95 12:50:57.720583 progress 100 % (0 MB)
96 12:50:57.727194 0 MB downloaded in 0.04 s (12.35 MB/s)
97 12:50:57.727519 end: 1.3.1 http-download (duration 00:00:00) [common]
99 12:50:57.727792 end: 1.3 download-retry (duration 00:00:00) [common]
100 12:50:57.727889 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
101 12:50:57.727986 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
102 12:50:57.728074 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 12:50:57.728161 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
104 12:50:57.728386 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11602095/lava-overlay-et651o85
105 12:50:57.728522 makedir: /var/lib/lava/dispatcher/tmp/11602095/lava-overlay-et651o85/lava-11602095/bin
106 12:50:57.728630 makedir: /var/lib/lava/dispatcher/tmp/11602095/lava-overlay-et651o85/lava-11602095/tests
107 12:50:57.728731 makedir: /var/lib/lava/dispatcher/tmp/11602095/lava-overlay-et651o85/lava-11602095/results
108 12:50:57.728845 Creating /var/lib/lava/dispatcher/tmp/11602095/lava-overlay-et651o85/lava-11602095/bin/lava-add-keys
109 12:50:57.728999 Creating /var/lib/lava/dispatcher/tmp/11602095/lava-overlay-et651o85/lava-11602095/bin/lava-add-sources
110 12:50:57.729133 Creating /var/lib/lava/dispatcher/tmp/11602095/lava-overlay-et651o85/lava-11602095/bin/lava-background-process-start
111 12:50:57.729267 Creating /var/lib/lava/dispatcher/tmp/11602095/lava-overlay-et651o85/lava-11602095/bin/lava-background-process-stop
112 12:50:57.729399 Creating /var/lib/lava/dispatcher/tmp/11602095/lava-overlay-et651o85/lava-11602095/bin/lava-common-functions
113 12:50:57.729528 Creating /var/lib/lava/dispatcher/tmp/11602095/lava-overlay-et651o85/lava-11602095/bin/lava-echo-ipv4
114 12:50:57.729658 Creating /var/lib/lava/dispatcher/tmp/11602095/lava-overlay-et651o85/lava-11602095/bin/lava-install-packages
115 12:50:57.729788 Creating /var/lib/lava/dispatcher/tmp/11602095/lava-overlay-et651o85/lava-11602095/bin/lava-installed-packages
116 12:50:57.729917 Creating /var/lib/lava/dispatcher/tmp/11602095/lava-overlay-et651o85/lava-11602095/bin/lava-os-build
117 12:50:57.730047 Creating /var/lib/lava/dispatcher/tmp/11602095/lava-overlay-et651o85/lava-11602095/bin/lava-probe-channel
118 12:50:57.730204 Creating /var/lib/lava/dispatcher/tmp/11602095/lava-overlay-et651o85/lava-11602095/bin/lava-probe-ip
119 12:50:57.730333 Creating /var/lib/lava/dispatcher/tmp/11602095/lava-overlay-et651o85/lava-11602095/bin/lava-target-ip
120 12:50:57.730464 Creating /var/lib/lava/dispatcher/tmp/11602095/lava-overlay-et651o85/lava-11602095/bin/lava-target-mac
121 12:50:57.730591 Creating /var/lib/lava/dispatcher/tmp/11602095/lava-overlay-et651o85/lava-11602095/bin/lava-target-storage
122 12:50:57.730724 Creating /var/lib/lava/dispatcher/tmp/11602095/lava-overlay-et651o85/lava-11602095/bin/lava-test-case
123 12:50:57.730852 Creating /var/lib/lava/dispatcher/tmp/11602095/lava-overlay-et651o85/lava-11602095/bin/lava-test-event
124 12:50:57.730979 Creating /var/lib/lava/dispatcher/tmp/11602095/lava-overlay-et651o85/lava-11602095/bin/lava-test-feedback
125 12:50:57.731106 Creating /var/lib/lava/dispatcher/tmp/11602095/lava-overlay-et651o85/lava-11602095/bin/lava-test-raise
126 12:50:57.731233 Creating /var/lib/lava/dispatcher/tmp/11602095/lava-overlay-et651o85/lava-11602095/bin/lava-test-reference
127 12:50:57.731381 Creating /var/lib/lava/dispatcher/tmp/11602095/lava-overlay-et651o85/lava-11602095/bin/lava-test-runner
128 12:50:57.731532 Creating /var/lib/lava/dispatcher/tmp/11602095/lava-overlay-et651o85/lava-11602095/bin/lava-test-set
129 12:50:57.731666 Creating /var/lib/lava/dispatcher/tmp/11602095/lava-overlay-et651o85/lava-11602095/bin/lava-test-shell
130 12:50:57.731799 Updating /var/lib/lava/dispatcher/tmp/11602095/lava-overlay-et651o85/lava-11602095/bin/lava-install-packages (oe)
131 12:50:57.731957 Updating /var/lib/lava/dispatcher/tmp/11602095/lava-overlay-et651o85/lava-11602095/bin/lava-installed-packages (oe)
132 12:50:57.732095 Creating /var/lib/lava/dispatcher/tmp/11602095/lava-overlay-et651o85/lava-11602095/environment
133 12:50:57.732200 LAVA metadata
134 12:50:57.732274 - LAVA_JOB_ID=11602095
135 12:50:57.732339 - LAVA_DISPATCHER_IP=192.168.201.1
136 12:50:57.732448 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
137 12:50:57.732518 skipped lava-vland-overlay
138 12:50:57.732597 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 12:50:57.732683 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
140 12:50:57.732748 skipped lava-multinode-overlay
141 12:50:57.732821 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 12:50:57.732901 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
143 12:50:57.732979 Loading test definitions
144 12:50:57.733078 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
145 12:50:57.733153 Using /lava-11602095 at stage 0
146 12:50:57.733492 uuid=11602095_1.4.2.3.1 testdef=None
147 12:50:57.733581 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 12:50:57.733666 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
149 12:50:57.734197 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 12:50:57.734419 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
152 12:50:57.735120 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 12:50:57.735482 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
155 12:50:57.736141 runner path: /var/lib/lava/dispatcher/tmp/11602095/lava-overlay-et651o85/lava-11602095/0/tests/0_cros-ec test_uuid 11602095_1.4.2.3.1
156 12:50:57.736334 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 12:50:57.736679 Creating lava-test-runner.conf files
159 12:50:57.736772 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11602095/lava-overlay-et651o85/lava-11602095/0 for stage 0
160 12:50:57.736892 - 0_cros-ec
161 12:50:57.737024 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
162 12:50:57.737158 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
163 12:50:57.744351 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
164 12:50:57.744469 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
165 12:50:57.744557 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
166 12:50:57.744645 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
167 12:50:57.744732 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
168 12:50:58.849297 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
169 12:50:58.849755 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
170 12:50:58.849877 extracting modules file /var/lib/lava/dispatcher/tmp/11602095/tftp-deploy-n3qavt_a/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11602095/extract-overlay-ramdisk-og76v__l/ramdisk
171 12:50:58.875098 end: 1.4.4 extract-modules (duration 00:00:00) [common]
172 12:50:58.875279 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
173 12:50:58.875455 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11602095/compress-overlay-psjtr0pz/overlay-1.4.2.4.tar.gz to ramdisk
174 12:50:58.875529 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11602095/compress-overlay-psjtr0pz/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11602095/extract-overlay-ramdisk-og76v__l/ramdisk
175 12:50:58.882737 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
176 12:50:58.882850 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
177 12:50:58.882940 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
178 12:50:58.883026 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
179 12:50:58.883103 Building ramdisk /var/lib/lava/dispatcher/tmp/11602095/extract-overlay-ramdisk-og76v__l/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11602095/extract-overlay-ramdisk-og76v__l/ramdisk
180 12:50:59.400365 >> 188276 blocks
181 12:51:03.014368 rename /var/lib/lava/dispatcher/tmp/11602095/extract-overlay-ramdisk-og76v__l/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11602095/tftp-deploy-n3qavt_a/ramdisk/ramdisk.cpio.gz
182 12:51:03.014917 end: 1.4.7 compress-ramdisk (duration 00:00:04) [common]
183 12:51:03.015069 start: 1.4.8 prepare-kernel (timeout 00:09:54) [common]
184 12:51:03.015168 start: 1.4.8.1 prepare-fit (timeout 00:09:54) [common]
185 12:51:03.015448 No mkimage arch provided, not using FIT.
186 12:51:03.015541 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
187 12:51:03.015673 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
188 12:51:03.015786 end: 1.4 prepare-tftp-overlay (duration 00:00:05) [common]
189 12:51:03.015877 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:54) [common]
190 12:51:03.015957 No LXC device requested
191 12:51:03.016031 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
192 12:51:03.016112 start: 1.6 deploy-device-env (timeout 00:09:54) [common]
193 12:51:03.016188 end: 1.6 deploy-device-env (duration 00:00:00) [common]
194 12:51:03.016255 Checking files for TFTP limit of 4294967296 bytes.
195 12:51:03.016651 end: 1 tftp-deploy (duration 00:00:06) [common]
196 12:51:03.016753 start: 2 depthcharge-action (timeout 00:05:00) [common]
197 12:51:03.016840 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
198 12:51:03.016959 substitutions:
199 12:51:03.017023 - {DTB}: None
200 12:51:03.017084 - {INITRD}: 11602095/tftp-deploy-n3qavt_a/ramdisk/ramdisk.cpio.gz
201 12:51:03.017141 - {KERNEL}: 11602095/tftp-deploy-n3qavt_a/kernel/bzImage
202 12:51:03.017197 - {LAVA_MAC}: None
203 12:51:03.017252 - {PRESEED_CONFIG}: None
204 12:51:03.017305 - {PRESEED_LOCAL}: None
205 12:51:03.017359 - {RAMDISK}: 11602095/tftp-deploy-n3qavt_a/ramdisk/ramdisk.cpio.gz
206 12:51:03.017412 - {ROOT_PART}: None
207 12:51:03.017466 - {ROOT}: None
208 12:51:03.017519 - {SERVER_IP}: 192.168.201.1
209 12:51:03.017571 - {TEE}: None
210 12:51:03.017623 Parsed boot commands:
211 12:51:03.017675 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
212 12:51:03.017843 Parsed boot commands: tftpboot 192.168.201.1 11602095/tftp-deploy-n3qavt_a/kernel/bzImage 11602095/tftp-deploy-n3qavt_a/kernel/cmdline 11602095/tftp-deploy-n3qavt_a/ramdisk/ramdisk.cpio.gz
213 12:51:03.017927 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
214 12:51:03.018009 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
215 12:51:03.018101 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
216 12:51:03.018201 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
217 12:51:03.018284 Not connected, no need to disconnect.
218 12:51:03.018356 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
219 12:51:03.018437 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
220 12:51:03.018532 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-3'
221 12:51:03.022860 Setting prompt string to ['lava-test: # ']
222 12:51:03.023261 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
223 12:51:03.023402 end: 2.2.1 reset-connection (duration 00:00:00) [common]
224 12:51:03.023519 start: 2.2.2 reset-device (timeout 00:05:00) [common]
225 12:51:03.023638 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
226 12:51:03.023938 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-3' '--port=1' '--command=reboot'
227 12:51:08.170827 >> Command sent successfully.
228 12:51:08.181746 Returned 0 in 5 seconds
229 12:51:08.282931 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
231 12:51:08.284806 end: 2.2.2 reset-device (duration 00:00:05) [common]
232 12:51:08.285312 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
233 12:51:08.285834 Setting prompt string to 'Starting depthcharge on Voema...'
234 12:51:08.286388 Changing prompt to 'Starting depthcharge on Voema...'
235 12:51:08.286755 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
236 12:51:08.288161 [Enter `^Ec?' for help]
237 12:51:09.876311
238 12:51:09.876897
239 12:51:09.886388 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
240 12:51:09.892500 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
241 12:51:09.896232 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
242 12:51:09.899128 CPU: AES supported, TXT NOT supported, VT supported
243 12:51:09.905902 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
244 12:51:09.912989 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
245 12:51:09.915931 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
246 12:51:09.919498 VBOOT: Loading verstage.
247 12:51:09.925679 FMAP: Found "FLASH" version 1.1 at 0x1804000.
248 12:51:09.929252 FMAP: base = 0x0 size = 0x2000000 #areas = 32
249 12:51:09.932193 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
250 12:51:09.943212 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
251 12:51:09.949957 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
252 12:51:09.950400
253 12:51:09.950736
254 12:51:09.962720 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
255 12:51:09.976639 Probing TPM: . done!
256 12:51:09.980211 TPM ready after 0 ms
257 12:51:09.984055 Connected to device vid:did:rid of 1ae0:0028:00
258 12:51:09.994639 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
259 12:51:10.001215 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
260 12:51:10.005160 Initialized TPM device CR50 revision 0
261 12:51:10.054203 tlcl_send_startup: Startup return code is 0
262 12:51:10.054701 TPM: setup succeeded
263 12:51:10.068715 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
264 12:51:10.082412 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
265 12:51:10.095767 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
266 12:51:10.105253 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
267 12:51:10.108884 Chrome EC: UHEPI supported
268 12:51:10.112523 Phase 1
269 12:51:10.115569 FMAP: area GBB found @ 1805000 (458752 bytes)
270 12:51:10.125686 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
271 12:51:10.132454 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
272 12:51:10.138708 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
273 12:51:10.145454 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
274 12:51:10.148863 Recovery requested (1009000e)
275 12:51:10.151907 TPM: Extending digest for VBOOT: boot mode into PCR 0
276 12:51:10.163730 tlcl_extend: response is 0
277 12:51:10.170432 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
278 12:51:10.180386 tlcl_extend: response is 0
279 12:51:10.186957 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
280 12:51:10.193260 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
281 12:51:10.200492 BS: verstage times (exec / console): total (unknown) / 142 ms
282 12:51:10.200974
283 12:51:10.201382
284 12:51:10.213257 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
285 12:51:10.220078 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
286 12:51:10.223729 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
287 12:51:10.227126 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
288 12:51:10.233962 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
289 12:51:10.236838 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
290 12:51:10.240112 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
291 12:51:10.244117 TCO_STS: 0000 0000
292 12:51:10.246934 GEN_PMCON: d0015038 00002200
293 12:51:10.250361 GBLRST_CAUSE: 00000000 00000000
294 12:51:10.250958 HPR_CAUSE0: 00000000
295 12:51:10.253469 prev_sleep_state 5
296 12:51:10.257111 Boot Count incremented to 23703
297 12:51:10.263731 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
298 12:51:10.270024 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
299 12:51:10.276899 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
300 12:51:10.283624 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
301 12:51:10.287876 Chrome EC: UHEPI supported
302 12:51:10.294648 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
303 12:51:10.307189 Probing TPM: done!
304 12:51:10.314794 Connected to device vid:did:rid of 1ae0:0028:00
305 12:51:10.325242 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
306 12:51:10.332001 Initialized TPM device CR50 revision 0
307 12:51:10.342517 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
308 12:51:10.349058 MRC: Hash idx 0x100b comparison successful.
309 12:51:10.351877 MRC cache found, size faa8
310 12:51:10.352311 bootmode is set to: 2
311 12:51:10.355438 SPD index = 0
312 12:51:10.361799 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
313 12:51:10.365335 SPD: module type is LPDDR4X
314 12:51:10.368479 SPD: module part number is MT53E512M64D4NW-046
315 12:51:10.375261 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
316 12:51:10.378472 SPD: device width 16 bits, bus width 16 bits
317 12:51:10.385673 SPD: module size is 1024 MB (per channel)
318 12:51:10.818274 CBMEM:
319 12:51:10.821546 IMD: root @ 0x76fff000 254 entries.
320 12:51:10.824632 IMD: root @ 0x76ffec00 62 entries.
321 12:51:10.828200 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
322 12:51:10.834714 FMAP: area RW_VPD found @ f35000 (8192 bytes)
323 12:51:10.838050 External stage cache:
324 12:51:10.841406 IMD: root @ 0x7b3ff000 254 entries.
325 12:51:10.844921 IMD: root @ 0x7b3fec00 62 entries.
326 12:51:10.859893 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
327 12:51:10.866433 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
328 12:51:10.873183 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
329 12:51:10.887629 MRC: 'RECOVERY_MRC_CACHE' does not need update.
330 12:51:10.894306 cse_lite: Skip switching to RW in the recovery path
331 12:51:10.894907 8 DIMMs found
332 12:51:10.895526 SMM Memory Map
333 12:51:10.898480 SMRAM : 0x7b000000 0x800000
334 12:51:10.902028 Subregion 0: 0x7b000000 0x200000
335 12:51:10.905146 Subregion 1: 0x7b200000 0x200000
336 12:51:10.908760 Subregion 2: 0x7b400000 0x400000
337 12:51:10.911621 top_of_ram = 0x77000000
338 12:51:10.918276 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
339 12:51:10.921839 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
340 12:51:10.928258 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
341 12:51:10.932023 MTRR Range: Start=ff000000 End=0 (Size 1000000)
342 12:51:10.941462 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
343 12:51:10.944853 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
344 12:51:10.956994 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
345 12:51:10.963290 Processing 211 relocs. Offset value of 0x74c0b000
346 12:51:10.970003 BS: romstage times (exec / console): total (unknown) / 277 ms
347 12:51:10.976562
348 12:51:10.976959
349 12:51:10.986256 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
350 12:51:10.989857 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
351 12:51:10.999212 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
352 12:51:11.005949 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
353 12:51:11.012761 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
354 12:51:11.019328 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
355 12:51:11.066600 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
356 12:51:11.072914 Processing 5008 relocs. Offset value of 0x75d98000
357 12:51:11.076413 BS: postcar times (exec / console): total (unknown) / 59 ms
358 12:51:11.079487
359 12:51:11.080041
360 12:51:11.090126 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
361 12:51:11.090562 Normal boot
362 12:51:11.093207 FW_CONFIG value is 0x804c02
363 12:51:11.096349 PCI: 00:07.0 disabled by fw_config
364 12:51:11.099484 PCI: 00:07.1 disabled by fw_config
365 12:51:11.103017 PCI: 00:0d.2 disabled by fw_config
366 12:51:11.106264 PCI: 00:1c.7 disabled by fw_config
367 12:51:11.113527 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
368 12:51:11.119913 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
369 12:51:11.123523 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
370 12:51:11.126787 GENERIC: 0.0 disabled by fw_config
371 12:51:11.129981 GENERIC: 1.0 disabled by fw_config
372 12:51:11.136253 fw_config match found: DB_USB=USB3_ACTIVE
373 12:51:11.139770 fw_config match found: DB_USB=USB3_ACTIVE
374 12:51:11.143352 fw_config match found: DB_USB=USB3_ACTIVE
375 12:51:11.146597 fw_config match found: DB_USB=USB3_ACTIVE
376 12:51:11.153080 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
377 12:51:11.159589 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
378 12:51:11.169438 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
379 12:51:11.176108 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
380 12:51:11.179448 microcode: sig=0x806c1 pf=0x80 revision=0x86
381 12:51:11.186243 microcode: Update skipped, already up-to-date
382 12:51:11.192492 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
383 12:51:11.220270 Detected 4 core, 8 thread CPU.
384 12:51:11.223572 Setting up SMI for CPU
385 12:51:11.226535 IED base = 0x7b400000
386 12:51:11.227022 IED size = 0x00400000
387 12:51:11.230256 Will perform SMM setup.
388 12:51:11.236677 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
389 12:51:11.243105 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
390 12:51:11.249609 Processing 16 relocs. Offset value of 0x00030000
391 12:51:11.253386 Attempting to start 7 APs
392 12:51:11.256375 Waiting for 10ms after sending INIT.
393 12:51:11.272142 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
394 12:51:11.275177 AP: slot 6 apic_id 2.
395 12:51:11.278869 AP: slot 2 apic_id 3.
396 12:51:11.279482 AP: slot 3 apic_id 5.
397 12:51:11.282046 AP: slot 7 apic_id 4.
398 12:51:11.282621 done.
399 12:51:11.285253 AP: slot 5 apic_id 6.
400 12:51:11.285822 AP: slot 4 apic_id 7.
401 12:51:11.292074 Waiting for 2nd SIPI to complete...done.
402 12:51:11.298568 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
403 12:51:11.305215 Processing 13 relocs. Offset value of 0x00038000
404 12:51:11.305765 Unable to locate Global NVS
405 12:51:11.315662 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
406 12:51:11.319024 Installing permanent SMM handler to 0x7b000000
407 12:51:11.328629 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
408 12:51:11.331784 Processing 794 relocs. Offset value of 0x7b010000
409 12:51:11.342185 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
410 12:51:11.345516 Processing 13 relocs. Offset value of 0x7b008000
411 12:51:11.351972 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
412 12:51:11.358214 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
413 12:51:11.361523 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
414 12:51:11.368253 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
415 12:51:11.374817 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
416 12:51:11.381833 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
417 12:51:11.387998 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
418 12:51:11.388442 Unable to locate Global NVS
419 12:51:11.398740 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
420 12:51:11.401501 Clearing SMI status registers
421 12:51:11.402057 SMI_STS: PM1
422 12:51:11.404873 PM1_STS: PWRBTN
423 12:51:11.411377 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
424 12:51:11.414914 In relocation handler: CPU 0
425 12:51:11.418347 New SMBASE=0x7b000000 IEDBASE=0x7b400000
426 12:51:11.425394 Writing SMRR. base = 0x7b000006, mask=0xff800c00
427 12:51:11.425987 Relocation complete.
428 12:51:11.431671 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
429 12:51:11.434779 In relocation handler: CPU 1
430 12:51:11.441977 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
431 12:51:11.442676 Relocation complete.
432 12:51:11.447958 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
433 12:51:11.451900 In relocation handler: CPU 5
434 12:51:11.458699 New SMBASE=0x7affec00 IEDBASE=0x7b400000
435 12:51:11.461831 Writing SMRR. base = 0x7b000006, mask=0xff800c00
436 12:51:11.465058 Relocation complete.
437 12:51:11.471775 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
438 12:51:11.475043 In relocation handler: CPU 4
439 12:51:11.478573 New SMBASE=0x7afff000 IEDBASE=0x7b400000
440 12:51:11.481354 Relocation complete.
441 12:51:11.488158 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
442 12:51:11.491649 In relocation handler: CPU 3
443 12:51:11.494843 New SMBASE=0x7afff400 IEDBASE=0x7b400000
444 12:51:11.498544 Relocation complete.
445 12:51:11.505089 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
446 12:51:11.508050 In relocation handler: CPU 7
447 12:51:11.511776 New SMBASE=0x7affe400 IEDBASE=0x7b400000
448 12:51:11.514882 Writing SMRR. base = 0x7b000006, mask=0xff800c00
449 12:51:11.518325 Relocation complete.
450 12:51:11.524903 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
451 12:51:11.528324 In relocation handler: CPU 6
452 12:51:11.531544 New SMBASE=0x7affe800 IEDBASE=0x7b400000
453 12:51:11.537949 Writing SMRR. base = 0x7b000006, mask=0xff800c00
454 12:51:11.538502 Relocation complete.
455 12:51:11.548234 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
456 12:51:11.548820 In relocation handler: CPU 2
457 12:51:11.554684 New SMBASE=0x7afff800 IEDBASE=0x7b400000
458 12:51:11.555227 Relocation complete.
459 12:51:11.558534 Initializing CPU #0
460 12:51:11.561894 CPU: vendor Intel device 806c1
461 12:51:11.566156 CPU: family 06, model 8c, stepping 01
462 12:51:11.568980 Clearing out pending MCEs
463 12:51:11.569668 Setting up local APIC...
464 12:51:11.572709 apic_id: 0x00 done.
465 12:51:11.576117 Turbo is available but hidden
466 12:51:11.579365 Turbo is available and visible
467 12:51:11.582468 microcode: Update skipped, already up-to-date
468 12:51:11.586138 CPU #0 initialized
469 12:51:11.589635 Initializing CPU #4
470 12:51:11.590115 Initializing CPU #5
471 12:51:11.592445 CPU: vendor Intel device 806c1
472 12:51:11.596063 CPU: family 06, model 8c, stepping 01
473 12:51:11.599426 CPU: vendor Intel device 806c1
474 12:51:11.602289 CPU: family 06, model 8c, stepping 01
475 12:51:11.605958 Initializing CPU #1
476 12:51:11.609037 Initializing CPU #7
477 12:51:11.609595 Initializing CPU #3
478 12:51:11.612466 CPU: vendor Intel device 806c1
479 12:51:11.615669 CPU: family 06, model 8c, stepping 01
480 12:51:11.618856 CPU: vendor Intel device 806c1
481 12:51:11.622165 CPU: family 06, model 8c, stepping 01
482 12:51:11.625884 Clearing out pending MCEs
483 12:51:11.628845 Clearing out pending MCEs
484 12:51:11.632418 Setting up local APIC...
485 12:51:11.635712 Clearing out pending MCEs
486 12:51:11.636221 Clearing out pending MCEs
487 12:51:11.638561 Setting up local APIC...
488 12:51:11.642056 Initializing CPU #6
489 12:51:11.642525 Initializing CPU #2
490 12:51:11.645576 CPU: vendor Intel device 806c1
491 12:51:11.648697 CPU: family 06, model 8c, stepping 01
492 12:51:11.651925 CPU: vendor Intel device 806c1
493 12:51:11.655449 CPU: family 06, model 8c, stepping 01
494 12:51:11.658958 Clearing out pending MCEs
495 12:51:11.662217 Clearing out pending MCEs
496 12:51:11.665129 Setting up local APIC...
497 12:51:11.668819 CPU: vendor Intel device 806c1
498 12:51:11.671811 CPU: family 06, model 8c, stepping 01
499 12:51:11.675183 Setting up local APIC...
500 12:51:11.675742 apic_id: 0x06 done.
501 12:51:11.678691 apic_id: 0x07 done.
502 12:51:11.682069 microcode: Update skipped, already up-to-date
503 12:51:11.688544 microcode: Update skipped, already up-to-date
504 12:51:11.688969 CPU #5 initialized
505 12:51:11.691752 CPU #4 initialized
506 12:51:11.695233 apic_id: 0x02 done.
507 12:51:11.695743 Setting up local APIC...
508 12:51:11.698400 Clearing out pending MCEs
509 12:51:11.702001 apic_id: 0x04 done.
510 12:51:11.705040 Setting up local APIC...
511 12:51:11.705543 Setting up local APIC...
512 12:51:11.711859 microcode: Update skipped, already up-to-date
513 12:51:11.712418 apic_id: 0x05 done.
514 12:51:11.715212 CPU #7 initialized
515 12:51:11.718658 microcode: Update skipped, already up-to-date
516 12:51:11.721579 apic_id: 0x01 done.
517 12:51:11.725291 apic_id: 0x03 done.
518 12:51:11.728516 microcode: Update skipped, already up-to-date
519 12:51:11.732083 microcode: Update skipped, already up-to-date
520 12:51:11.735051 CPU #6 initialized
521 12:51:11.738440 CPU #2 initialized
522 12:51:11.741631 microcode: Update skipped, already up-to-date
523 12:51:11.745219 CPU #3 initialized
524 12:51:11.745916 CPU #1 initialized
525 12:51:11.748645 bsp_do_flight_plan done after 454 msecs.
526 12:51:11.751564 CPU: frequency set to 4000 MHz
527 12:51:11.754949 Enabling SMIs.
528 12:51:11.761784 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
529 12:51:11.776837 SATAXPCIE1 indicates PCIe NVMe is present
530 12:51:11.780276 Probing TPM: done!
531 12:51:11.784183 Connected to device vid:did:rid of 1ae0:0028:00
532 12:51:11.794216 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
533 12:51:11.797193 Initialized TPM device CR50 revision 0
534 12:51:11.800667 Enabling S0i3.4
535 12:51:11.807353 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
536 12:51:11.810712 Found a VBT of 8704 bytes after decompression
537 12:51:11.817310 cse_lite: CSE RO boot. HybridStorageMode disabled
538 12:51:11.823969 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
539 12:51:11.899600 FSPS returned 0
540 12:51:11.903016 Executing Phase 1 of FspMultiPhaseSiInit
541 12:51:11.913434 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
542 12:51:11.916340 port C0 DISC req: usage 1 usb3 1 usb2 5
543 12:51:11.919770 Raw Buffer output 0 00000511
544 12:51:11.923181 Raw Buffer output 1 00000000
545 12:51:11.927072 pmc_send_ipc_cmd succeeded
546 12:51:11.933795 port C1 DISC req: usage 1 usb3 2 usb2 3
547 12:51:11.934366 Raw Buffer output 0 00000321
548 12:51:11.936814 Raw Buffer output 1 00000000
549 12:51:11.941437 pmc_send_ipc_cmd succeeded
550 12:51:11.946238 Detected 4 core, 8 thread CPU.
551 12:51:11.949688 Detected 4 core, 8 thread CPU.
552 12:51:12.183126 Display FSP Version Info HOB
553 12:51:12.186597 Reference Code - CPU = a.0.4c.31
554 12:51:12.189611 uCode Version = 0.0.0.86
555 12:51:12.192989 TXT ACM version = ff.ff.ff.ffff
556 12:51:12.196125 Reference Code - ME = a.0.4c.31
557 12:51:12.199515 MEBx version = 0.0.0.0
558 12:51:12.202909 ME Firmware Version = Consumer SKU
559 12:51:12.206172 Reference Code - PCH = a.0.4c.31
560 12:51:12.209526 PCH-CRID Status = Disabled
561 12:51:12.213342 PCH-CRID Original Value = ff.ff.ff.ffff
562 12:51:12.216779 PCH-CRID New Value = ff.ff.ff.ffff
563 12:51:12.219703 OPROM - RST - RAID = ff.ff.ff.ffff
564 12:51:12.222700 PCH Hsio Version = 4.0.0.0
565 12:51:12.226481 Reference Code - SA - System Agent = a.0.4c.31
566 12:51:12.229588 Reference Code - MRC = 2.0.0.1
567 12:51:12.232783 SA - PCIe Version = a.0.4c.31
568 12:51:12.236227 SA-CRID Status = Disabled
569 12:51:12.239405 SA-CRID Original Value = 0.0.0.1
570 12:51:12.242920 SA-CRID New Value = 0.0.0.1
571 12:51:12.246432 OPROM - VBIOS = ff.ff.ff.ffff
572 12:51:12.249658 IO Manageability Engine FW Version = 11.1.4.0
573 12:51:12.252975 PHY Build Version = 0.0.0.e0
574 12:51:12.256331 Thunderbolt(TM) FW Version = 0.0.0.0
575 12:51:12.262833 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
576 12:51:12.266401 ITSS IRQ Polarities Before:
577 12:51:12.266606 IPC0: 0xffffffff
578 12:51:12.269373 IPC1: 0xffffffff
579 12:51:12.269618 IPC2: 0xffffffff
580 12:51:12.272958 IPC3: 0xffffffff
581 12:51:12.276044 ITSS IRQ Polarities After:
582 12:51:12.276291 IPC0: 0xffffffff
583 12:51:12.279830 IPC1: 0xffffffff
584 12:51:12.280073 IPC2: 0xffffffff
585 12:51:12.282750 IPC3: 0xffffffff
586 12:51:12.286324 Found PCIe Root Port #9 at PCI: 00:1d.0.
587 12:51:12.299572 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
588 12:51:12.309145 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
589 12:51:12.322479 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
590 12:51:12.329147 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
591 12:51:12.329255 Enumerating buses...
592 12:51:12.335723 Show all devs... Before device enumeration.
593 12:51:12.335810 Root Device: enabled 1
594 12:51:12.339122 DOMAIN: 0000: enabled 1
595 12:51:12.342314 CPU_CLUSTER: 0: enabled 1
596 12:51:12.345743 PCI: 00:00.0: enabled 1
597 12:51:12.345828 PCI: 00:02.0: enabled 1
598 12:51:12.348901 PCI: 00:04.0: enabled 1
599 12:51:12.352528 PCI: 00:05.0: enabled 1
600 12:51:12.355754 PCI: 00:06.0: enabled 0
601 12:51:12.355842 PCI: 00:07.0: enabled 0
602 12:51:12.358806 PCI: 00:07.1: enabled 0
603 12:51:12.362008 PCI: 00:07.2: enabled 0
604 12:51:12.365481 PCI: 00:07.3: enabled 0
605 12:51:12.365623 PCI: 00:08.0: enabled 1
606 12:51:12.369018 PCI: 00:09.0: enabled 0
607 12:51:12.372109 PCI: 00:0a.0: enabled 0
608 12:51:12.375533 PCI: 00:0d.0: enabled 1
609 12:51:12.375668 PCI: 00:0d.1: enabled 0
610 12:51:12.378631 PCI: 00:0d.2: enabled 0
611 12:51:12.382343 PCI: 00:0d.3: enabled 0
612 12:51:12.385250 PCI: 00:0e.0: enabled 0
613 12:51:12.385364 PCI: 00:10.2: enabled 1
614 12:51:12.389266 PCI: 00:10.6: enabled 0
615 12:51:12.392723 PCI: 00:10.7: enabled 0
616 12:51:12.393344 PCI: 00:12.0: enabled 0
617 12:51:12.395942 PCI: 00:12.6: enabled 0
618 12:51:12.399503 PCI: 00:13.0: enabled 0
619 12:51:12.402620 PCI: 00:14.0: enabled 1
620 12:51:12.403091 PCI: 00:14.1: enabled 0
621 12:51:12.405578 PCI: 00:14.2: enabled 1
622 12:51:12.409241 PCI: 00:14.3: enabled 1
623 12:51:12.412472 PCI: 00:15.0: enabled 1
624 12:51:12.412971 PCI: 00:15.1: enabled 1
625 12:51:12.415990 PCI: 00:15.2: enabled 1
626 12:51:12.419514 PCI: 00:15.3: enabled 1
627 12:51:12.422632 PCI: 00:16.0: enabled 1
628 12:51:12.423129 PCI: 00:16.1: enabled 0
629 12:51:12.425709 PCI: 00:16.2: enabled 0
630 12:51:12.429321 PCI: 00:16.3: enabled 0
631 12:51:12.432568 PCI: 00:16.4: enabled 0
632 12:51:12.433047 PCI: 00:16.5: enabled 0
633 12:51:12.435687 PCI: 00:17.0: enabled 1
634 12:51:12.439323 PCI: 00:19.0: enabled 0
635 12:51:12.439666 PCI: 00:19.1: enabled 1
636 12:51:12.442583 PCI: 00:19.2: enabled 0
637 12:51:12.445503 PCI: 00:1c.0: enabled 1
638 12:51:12.448748 PCI: 00:1c.1: enabled 0
639 12:51:12.448944 PCI: 00:1c.2: enabled 0
640 12:51:12.451791 PCI: 00:1c.3: enabled 0
641 12:51:12.455378 PCI: 00:1c.4: enabled 0
642 12:51:12.458650 PCI: 00:1c.5: enabled 0
643 12:51:12.458864 PCI: 00:1c.6: enabled 1
644 12:51:12.462026 PCI: 00:1c.7: enabled 0
645 12:51:12.465594 PCI: 00:1d.0: enabled 1
646 12:51:12.468645 PCI: 00:1d.1: enabled 0
647 12:51:12.468806 PCI: 00:1d.2: enabled 1
648 12:51:12.471718 PCI: 00:1d.3: enabled 0
649 12:51:12.475170 PCI: 00:1e.0: enabled 1
650 12:51:12.475319 PCI: 00:1e.1: enabled 0
651 12:51:12.478518 PCI: 00:1e.2: enabled 1
652 12:51:12.482116 PCI: 00:1e.3: enabled 1
653 12:51:12.485222 PCI: 00:1f.0: enabled 1
654 12:51:12.485356 PCI: 00:1f.1: enabled 0
655 12:51:12.488371 PCI: 00:1f.2: enabled 1
656 12:51:12.491764 PCI: 00:1f.3: enabled 1
657 12:51:12.495146 PCI: 00:1f.4: enabled 0
658 12:51:12.495255 PCI: 00:1f.5: enabled 1
659 12:51:12.498434 PCI: 00:1f.6: enabled 0
660 12:51:12.501938 PCI: 00:1f.7: enabled 0
661 12:51:12.502352 APIC: 00: enabled 1
662 12:51:12.505380 GENERIC: 0.0: enabled 1
663 12:51:12.508355 GENERIC: 0.0: enabled 1
664 12:51:12.511952 GENERIC: 1.0: enabled 1
665 12:51:12.512210 GENERIC: 0.0: enabled 1
666 12:51:12.515258 GENERIC: 1.0: enabled 1
667 12:51:12.518602 USB0 port 0: enabled 1
668 12:51:12.521832 GENERIC: 0.0: enabled 1
669 12:51:12.522092 USB0 port 0: enabled 1
670 12:51:12.525177 GENERIC: 0.0: enabled 1
671 12:51:12.528553 I2C: 00:1a: enabled 1
672 12:51:12.528816 I2C: 00:31: enabled 1
673 12:51:12.531653 I2C: 00:32: enabled 1
674 12:51:12.535225 I2C: 00:10: enabled 1
675 12:51:12.535467 I2C: 00:15: enabled 1
676 12:51:12.538196 GENERIC: 0.0: enabled 0
677 12:51:12.541913 GENERIC: 1.0: enabled 0
678 12:51:12.545608 GENERIC: 0.0: enabled 1
679 12:51:12.545869 SPI: 00: enabled 1
680 12:51:12.548511 SPI: 00: enabled 1
681 12:51:12.548752 PNP: 0c09.0: enabled 1
682 12:51:12.551927 GENERIC: 0.0: enabled 1
683 12:51:12.555278 USB3 port 0: enabled 1
684 12:51:12.558686 USB3 port 1: enabled 1
685 12:51:12.558968 USB3 port 2: enabled 0
686 12:51:12.561682 USB3 port 3: enabled 0
687 12:51:12.565159 USB2 port 0: enabled 0
688 12:51:12.565469 USB2 port 1: enabled 1
689 12:51:12.568642 USB2 port 2: enabled 1
690 12:51:12.571855 USB2 port 3: enabled 0
691 12:51:12.574896 USB2 port 4: enabled 1
692 12:51:12.575260 USB2 port 5: enabled 0
693 12:51:12.578540 USB2 port 6: enabled 0
694 12:51:12.581707 USB2 port 7: enabled 0
695 12:51:12.582059 USB2 port 8: enabled 0
696 12:51:12.584814 USB2 port 9: enabled 0
697 12:51:12.588232 USB3 port 0: enabled 0
698 12:51:12.591575 USB3 port 1: enabled 1
699 12:51:12.591932 USB3 port 2: enabled 0
700 12:51:12.594875 USB3 port 3: enabled 0
701 12:51:12.598637 GENERIC: 0.0: enabled 1
702 12:51:12.598823 GENERIC: 1.0: enabled 1
703 12:51:12.601683 APIC: 01: enabled 1
704 12:51:12.604770 APIC: 03: enabled 1
705 12:51:12.605006 APIC: 05: enabled 1
706 12:51:12.608252 APIC: 07: enabled 1
707 12:51:12.608452 APIC: 06: enabled 1
708 12:51:12.611448 APIC: 02: enabled 1
709 12:51:12.614930 APIC: 04: enabled 1
710 12:51:12.615108 Compare with tree...
711 12:51:12.618070 Root Device: enabled 1
712 12:51:12.621580 DOMAIN: 0000: enabled 1
713 12:51:12.624551 PCI: 00:00.0: enabled 1
714 12:51:12.624697 PCI: 00:02.0: enabled 1
715 12:51:12.627834 PCI: 00:04.0: enabled 1
716 12:51:12.631622 GENERIC: 0.0: enabled 1
717 12:51:12.634721 PCI: 00:05.0: enabled 1
718 12:51:12.638168 PCI: 00:06.0: enabled 0
719 12:51:12.638277 PCI: 00:07.0: enabled 0
720 12:51:12.641349 GENERIC: 0.0: enabled 1
721 12:51:12.645060 PCI: 00:07.1: enabled 0
722 12:51:12.647970 GENERIC: 1.0: enabled 1
723 12:51:12.651468 PCI: 00:07.2: enabled 0
724 12:51:12.651552 GENERIC: 0.0: enabled 1
725 12:51:12.654557 PCI: 00:07.3: enabled 0
726 12:51:12.658268 GENERIC: 1.0: enabled 1
727 12:51:12.661420 PCI: 00:08.0: enabled 1
728 12:51:12.664776 PCI: 00:09.0: enabled 0
729 12:51:12.664859 PCI: 00:0a.0: enabled 0
730 12:51:12.668342 PCI: 00:0d.0: enabled 1
731 12:51:12.671033 USB0 port 0: enabled 1
732 12:51:12.674909 USB3 port 0: enabled 1
733 12:51:12.677790 USB3 port 1: enabled 1
734 12:51:12.680967 USB3 port 2: enabled 0
735 12:51:12.681051 USB3 port 3: enabled 0
736 12:51:12.684509 PCI: 00:0d.1: enabled 0
737 12:51:12.688628 PCI: 00:0d.2: enabled 0
738 12:51:12.691560 GENERIC: 0.0: enabled 1
739 12:51:12.695035 PCI: 00:0d.3: enabled 0
740 12:51:12.695516 PCI: 00:0e.0: enabled 0
741 12:51:12.698083 PCI: 00:10.2: enabled 1
742 12:51:12.701581 PCI: 00:10.6: enabled 0
743 12:51:12.705023 PCI: 00:10.7: enabled 0
744 12:51:12.708535 PCI: 00:12.0: enabled 0
745 12:51:12.709085 PCI: 00:12.6: enabled 0
746 12:51:12.711283 PCI: 00:13.0: enabled 0
747 12:51:12.714724 PCI: 00:14.0: enabled 1
748 12:51:12.718356 USB0 port 0: enabled 1
749 12:51:12.721700 USB2 port 0: enabled 0
750 12:51:12.722282 USB2 port 1: enabled 1
751 12:51:12.725255 USB2 port 2: enabled 1
752 12:51:12.728142 USB2 port 3: enabled 0
753 12:51:12.732100 USB2 port 4: enabled 1
754 12:51:12.734831 USB2 port 5: enabled 0
755 12:51:12.735482 USB2 port 6: enabled 0
756 12:51:12.737936 USB2 port 7: enabled 0
757 12:51:12.741468 USB2 port 8: enabled 0
758 12:51:12.744676 USB2 port 9: enabled 0
759 12:51:12.748047 USB3 port 0: enabled 0
760 12:51:12.751755 USB3 port 1: enabled 1
761 12:51:12.752356 USB3 port 2: enabled 0
762 12:51:12.754836 USB3 port 3: enabled 0
763 12:51:12.757996 PCI: 00:14.1: enabled 0
764 12:51:12.761522 PCI: 00:14.2: enabled 1
765 12:51:12.764847 PCI: 00:14.3: enabled 1
766 12:51:12.765431 GENERIC: 0.0: enabled 1
767 12:51:12.768160 PCI: 00:15.0: enabled 1
768 12:51:12.771628 I2C: 00:1a: enabled 1
769 12:51:12.774798 I2C: 00:31: enabled 1
770 12:51:12.778188 I2C: 00:32: enabled 1
771 12:51:12.778692 PCI: 00:15.1: enabled 1
772 12:51:12.781552 I2C: 00:10: enabled 1
773 12:51:12.784749 PCI: 00:15.2: enabled 1
774 12:51:12.787944 PCI: 00:15.3: enabled 1
775 12:51:12.788447 PCI: 00:16.0: enabled 1
776 12:51:12.790898 PCI: 00:16.1: enabled 0
777 12:51:12.794487 PCI: 00:16.2: enabled 0
778 12:51:12.798246 PCI: 00:16.3: enabled 0
779 12:51:12.801004 PCI: 00:16.4: enabled 0
780 12:51:12.801482 PCI: 00:16.5: enabled 0
781 12:51:12.804701 PCI: 00:17.0: enabled 1
782 12:51:12.808643 PCI: 00:19.0: enabled 0
783 12:51:12.812457 PCI: 00:19.1: enabled 1
784 12:51:12.812939 I2C: 00:15: enabled 1
785 12:51:12.815563 PCI: 00:19.2: enabled 0
786 12:51:12.818650 PCI: 00:1d.0: enabled 1
787 12:51:12.822040 GENERIC: 0.0: enabled 1
788 12:51:12.822509 PCI: 00:1e.0: enabled 1
789 12:51:12.825785 PCI: 00:1e.1: enabled 0
790 12:51:12.828823 PCI: 00:1e.2: enabled 1
791 12:51:12.832668 SPI: 00: enabled 1
792 12:51:12.835617 PCI: 00:1e.3: enabled 1
793 12:51:12.836090 SPI: 00: enabled 1
794 12:51:12.839480 PCI: 00:1f.0: enabled 1
795 12:51:12.842251 PNP: 0c09.0: enabled 1
796 12:51:12.893621 PCI: 00:1f.1: enabled 0
797 12:51:12.894249 PCI: 00:1f.2: enabled 1
798 12:51:12.894796 GENERIC: 0.0: enabled 1
799 12:51:12.895646 GENERIC: 0.0: enabled 1
800 12:51:12.896066 GENERIC: 1.0: enabled 1
801 12:51:12.896527 PCI: 00:1f.3: enabled 1
802 12:51:12.896974 PCI: 00:1f.4: enabled 0
803 12:51:12.897412 PCI: 00:1f.5: enabled 1
804 12:51:12.897846 PCI: 00:1f.6: enabled 0
805 12:51:12.898275 PCI: 00:1f.7: enabled 0
806 12:51:12.898842 CPU_CLUSTER: 0: enabled 1
807 12:51:12.899442 APIC: 00: enabled 1
808 12:51:12.900044 APIC: 01: enabled 1
809 12:51:12.900551 APIC: 03: enabled 1
810 12:51:12.901039 APIC: 05: enabled 1
811 12:51:12.901522 APIC: 07: enabled 1
812 12:51:12.902027 APIC: 06: enabled 1
813 12:51:12.902511 APIC: 02: enabled 1
814 12:51:12.902986 APIC: 04: enabled 1
815 12:51:12.903515 Root Device scanning...
816 12:51:12.934771 scan_static_bus for Root Device
817 12:51:12.935580 DOMAIN: 0000 enabled
818 12:51:12.936162 CPU_CLUSTER: 0 enabled
819 12:51:12.936870 DOMAIN: 0000 scanning...
820 12:51:12.937250 PCI: pci_scan_bus for bus 00
821 12:51:12.937592 PCI: 00:00.0 [8086/0000] ops
822 12:51:12.937918 PCI: 00:00.0 [8086/9a12] enabled
823 12:51:12.938242 PCI: 00:02.0 [8086/0000] bus ops
824 12:51:12.938556 PCI: 00:02.0 [8086/9a40] enabled
825 12:51:12.938868 PCI: 00:04.0 [8086/0000] bus ops
826 12:51:12.939176 PCI: 00:04.0 [8086/9a03] enabled
827 12:51:12.939529 PCI: 00:05.0 [8086/9a19] enabled
828 12:51:12.939842 PCI: 00:07.0 [0000/0000] hidden
829 12:51:12.940217 PCI: 00:08.0 [8086/9a11] enabled
830 12:51:12.940538 PCI: 00:0a.0 [8086/9a0d] disabled
831 12:51:12.942318 PCI: 00:0d.0 [8086/0000] bus ops
832 12:51:12.946171 PCI: 00:0d.0 [8086/9a13] enabled
833 12:51:12.949190 PCI: 00:14.0 [8086/0000] bus ops
834 12:51:12.952877 PCI: 00:14.0 [8086/a0ed] enabled
835 12:51:12.955867 PCI: 00:14.2 [8086/a0ef] enabled
836 12:51:12.959430 PCI: 00:14.3 [8086/0000] bus ops
837 12:51:12.962642 PCI: 00:14.3 [8086/a0f0] enabled
838 12:51:12.966102 PCI: 00:15.0 [8086/0000] bus ops
839 12:51:12.969215 PCI: 00:15.0 [8086/a0e8] enabled
840 12:51:12.972016 PCI: 00:15.1 [8086/0000] bus ops
841 12:51:12.975582 PCI: 00:15.1 [8086/a0e9] enabled
842 12:51:12.978918 PCI: 00:15.2 [8086/0000] bus ops
843 12:51:12.982244 PCI: 00:15.2 [8086/a0ea] enabled
844 12:51:12.985870 PCI: 00:15.3 [8086/0000] bus ops
845 12:51:12.988881 PCI: 00:15.3 [8086/a0eb] enabled
846 12:51:12.992401 PCI: 00:16.0 [8086/0000] ops
847 12:51:12.995564 PCI: 00:16.0 [8086/a0e0] enabled
848 12:51:13.002434 PCI: Static device PCI: 00:17.0 not found, disabling it.
849 12:51:13.006235 PCI: 00:19.0 [8086/0000] bus ops
850 12:51:13.008896 PCI: 00:19.0 [8086/a0c5] disabled
851 12:51:13.012596 PCI: 00:19.1 [8086/0000] bus ops
852 12:51:13.015575 PCI: 00:19.1 [8086/a0c6] enabled
853 12:51:13.019098 PCI: 00:1d.0 [8086/0000] bus ops
854 12:51:13.022691 PCI: 00:1d.0 [8086/a0b0] enabled
855 12:51:13.026223 PCI: 00:1e.0 [8086/0000] ops
856 12:51:13.029040 PCI: 00:1e.0 [8086/a0a8] enabled
857 12:51:13.032027 PCI: 00:1e.2 [8086/0000] bus ops
858 12:51:13.035661 PCI: 00:1e.2 [8086/a0aa] enabled
859 12:51:13.039227 PCI: 00:1e.3 [8086/0000] bus ops
860 12:51:13.042236 PCI: 00:1e.3 [8086/a0ab] enabled
861 12:51:13.046033 PCI: 00:1f.0 [8086/0000] bus ops
862 12:51:13.049180 PCI: 00:1f.0 [8086/a087] enabled
863 12:51:13.049746 RTC Init
864 12:51:13.052345 Set power on after power failure.
865 12:51:13.055555 Disabling Deep S3
866 12:51:13.056031 Disabling Deep S3
867 12:51:13.059146 Disabling Deep S4
868 12:51:13.059752 Disabling Deep S4
869 12:51:13.062622 Disabling Deep S5
870 12:51:13.065862 Disabling Deep S5
871 12:51:13.068870 PCI: 00:1f.2 [0000/0000] hidden
872 12:51:13.072201 PCI: 00:1f.3 [8086/0000] bus ops
873 12:51:13.075933 PCI: 00:1f.3 [8086/a0c8] enabled
874 12:51:13.078940 PCI: 00:1f.5 [8086/0000] bus ops
875 12:51:13.082356 PCI: 00:1f.5 [8086/a0a4] enabled
876 12:51:13.082831 PCI: Leftover static devices:
877 12:51:13.085708 PCI: 00:10.2
878 12:51:13.086184 PCI: 00:10.6
879 12:51:13.088940 PCI: 00:10.7
880 12:51:13.089416 PCI: 00:06.0
881 12:51:13.092046 PCI: 00:07.1
882 12:51:13.092515 PCI: 00:07.2
883 12:51:13.092890 PCI: 00:07.3
884 12:51:13.095628 PCI: 00:09.0
885 12:51:13.096104 PCI: 00:0d.1
886 12:51:13.099270 PCI: 00:0d.2
887 12:51:13.099793 PCI: 00:0d.3
888 12:51:13.100171 PCI: 00:0e.0
889 12:51:13.102310 PCI: 00:12.0
890 12:51:13.102798 PCI: 00:12.6
891 12:51:13.105946 PCI: 00:13.0
892 12:51:13.106426 PCI: 00:14.1
893 12:51:13.106798 PCI: 00:16.1
894 12:51:13.109094 PCI: 00:16.2
895 12:51:13.109668 PCI: 00:16.3
896 12:51:13.112570 PCI: 00:16.4
897 12:51:13.113137 PCI: 00:16.5
898 12:51:13.113512 PCI: 00:17.0
899 12:51:13.115625 PCI: 00:19.2
900 12:51:13.116247 PCI: 00:1e.1
901 12:51:13.119059 PCI: 00:1f.1
902 12:51:13.119574 PCI: 00:1f.4
903 12:51:13.122458 PCI: 00:1f.6
904 12:51:13.123046 PCI: 00:1f.7
905 12:51:13.125709 PCI: Check your devicetree.cb.
906 12:51:13.129192 PCI: 00:02.0 scanning...
907 12:51:13.132225 scan_generic_bus for PCI: 00:02.0
908 12:51:13.135545 scan_generic_bus for PCI: 00:02.0 done
909 12:51:13.139272 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
910 12:51:13.142146 PCI: 00:04.0 scanning...
911 12:51:13.146037 scan_generic_bus for PCI: 00:04.0
912 12:51:13.148975 GENERIC: 0.0 enabled
913 12:51:13.155748 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
914 12:51:13.158716 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
915 12:51:13.162071 PCI: 00:0d.0 scanning...
916 12:51:13.165453 scan_static_bus for PCI: 00:0d.0
917 12:51:13.168704 USB0 port 0 enabled
918 12:51:13.169173 USB0 port 0 scanning...
919 12:51:13.172167 scan_static_bus for USB0 port 0
920 12:51:13.175075 USB3 port 0 enabled
921 12:51:13.178667 USB3 port 1 enabled
922 12:51:13.179137 USB3 port 2 disabled
923 12:51:13.182361 USB3 port 3 disabled
924 12:51:13.185487 USB3 port 0 scanning...
925 12:51:13.188518 scan_static_bus for USB3 port 0
926 12:51:13.192150 scan_static_bus for USB3 port 0 done
927 12:51:13.194967 scan_bus: bus USB3 port 0 finished in 6 msecs
928 12:51:13.198595 USB3 port 1 scanning...
929 12:51:13.202301 scan_static_bus for USB3 port 1
930 12:51:13.205152 scan_static_bus for USB3 port 1 done
931 12:51:13.208329 scan_bus: bus USB3 port 1 finished in 6 msecs
932 12:51:13.215280 scan_static_bus for USB0 port 0 done
933 12:51:13.218321 scan_bus: bus USB0 port 0 finished in 43 msecs
934 12:51:13.221671 scan_static_bus for PCI: 00:0d.0 done
935 12:51:13.228553 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
936 12:51:13.229029 PCI: 00:14.0 scanning...
937 12:51:13.231688 scan_static_bus for PCI: 00:14.0
938 12:51:13.235276 USB0 port 0 enabled
939 12:51:13.238085 USB0 port 0 scanning...
940 12:51:13.241565 scan_static_bus for USB0 port 0
941 12:51:13.242038 USB2 port 0 disabled
942 12:51:13.245269 USB2 port 1 enabled
943 12:51:13.248308 USB2 port 2 enabled
944 12:51:13.248784 USB2 port 3 disabled
945 12:51:13.251980 USB2 port 4 enabled
946 12:51:13.255107 USB2 port 5 disabled
947 12:51:13.255926 USB2 port 6 disabled
948 12:51:13.258399 USB2 port 7 disabled
949 12:51:13.261973 USB2 port 8 disabled
950 12:51:13.262544 USB2 port 9 disabled
951 12:51:13.265378 USB3 port 0 disabled
952 12:51:13.265940 USB3 port 1 enabled
953 12:51:13.268089 USB3 port 2 disabled
954 12:51:13.271979 USB3 port 3 disabled
955 12:51:13.272553 USB2 port 1 scanning...
956 12:51:13.275373 scan_static_bus for USB2 port 1
957 12:51:13.281718 scan_static_bus for USB2 port 1 done
958 12:51:13.285093 scan_bus: bus USB2 port 1 finished in 6 msecs
959 12:51:13.288376 USB2 port 2 scanning...
960 12:51:13.292222 scan_static_bus for USB2 port 2
961 12:51:13.295323 scan_static_bus for USB2 port 2 done
962 12:51:13.298986 scan_bus: bus USB2 port 2 finished in 6 msecs
963 12:51:13.301804 USB2 port 4 scanning...
964 12:51:13.305558 scan_static_bus for USB2 port 4
965 12:51:13.308278 scan_static_bus for USB2 port 4 done
966 12:51:13.311770 scan_bus: bus USB2 port 4 finished in 6 msecs
967 12:51:13.314997 USB3 port 1 scanning...
968 12:51:13.318803 scan_static_bus for USB3 port 1
969 12:51:13.322063 scan_static_bus for USB3 port 1 done
970 12:51:13.328767 scan_bus: bus USB3 port 1 finished in 6 msecs
971 12:51:13.331699 scan_static_bus for USB0 port 0 done
972 12:51:13.335312 scan_bus: bus USB0 port 0 finished in 93 msecs
973 12:51:13.338424 scan_static_bus for PCI: 00:14.0 done
974 12:51:13.345101 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
975 12:51:13.348270 PCI: 00:14.3 scanning...
976 12:51:13.351876 scan_static_bus for PCI: 00:14.3
977 12:51:13.352368 GENERIC: 0.0 enabled
978 12:51:13.355312 scan_static_bus for PCI: 00:14.3 done
979 12:51:13.361550 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
980 12:51:13.364932 PCI: 00:15.0 scanning...
981 12:51:13.368675 scan_static_bus for PCI: 00:15.0
982 12:51:13.369351 I2C: 00:1a enabled
983 12:51:13.371559 I2C: 00:31 enabled
984 12:51:13.372049 I2C: 00:32 enabled
985 12:51:13.378395 scan_static_bus for PCI: 00:15.0 done
986 12:51:13.382013 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
987 12:51:13.386321 PCI: 00:15.1 scanning...
988 12:51:13.389219 scan_static_bus for PCI: 00:15.1
989 12:51:13.389714 I2C: 00:10 enabled
990 12:51:13.392721 scan_static_bus for PCI: 00:15.1 done
991 12:51:13.399212 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
992 12:51:13.402726 PCI: 00:15.2 scanning...
993 12:51:13.405678 scan_static_bus for PCI: 00:15.2
994 12:51:13.409032 scan_static_bus for PCI: 00:15.2 done
995 12:51:13.412271 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
996 12:51:13.415734 PCI: 00:15.3 scanning...
997 12:51:13.419455 scan_static_bus for PCI: 00:15.3
998 12:51:13.422313 scan_static_bus for PCI: 00:15.3 done
999 12:51:13.429149 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1000 12:51:13.429622 PCI: 00:19.1 scanning...
1001 12:51:13.432705 scan_static_bus for PCI: 00:19.1
1002 12:51:13.435861 I2C: 00:15 enabled
1003 12:51:13.438988 scan_static_bus for PCI: 00:19.1 done
1004 12:51:13.446068 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1005 12:51:13.446644 PCI: 00:1d.0 scanning...
1006 12:51:13.449156 do_pci_scan_bridge for PCI: 00:1d.0
1007 12:51:13.452529 PCI: pci_scan_bus for bus 01
1008 12:51:13.455736 PCI: 01:00.0 [1c5c/174a] enabled
1009 12:51:13.459266 GENERIC: 0.0 enabled
1010 12:51:13.462750 Enabling Common Clock Configuration
1011 12:51:13.465668 L1 Sub-State supported from root port 29
1012 12:51:13.468778 L1 Sub-State Support = 0xf
1013 12:51:13.472125 CommonModeRestoreTime = 0x28
1014 12:51:13.475772 Power On Value = 0x16, Power On Scale = 0x0
1015 12:51:13.478905 ASPM: Enabled L1
1016 12:51:13.482202 PCIe: Max_Payload_Size adjusted to 128
1017 12:51:13.488717 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1018 12:51:13.489191 PCI: 00:1e.2 scanning...
1019 12:51:13.495522 scan_generic_bus for PCI: 00:1e.2
1020 12:51:13.496051 SPI: 00 enabled
1021 12:51:13.502025 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1022 12:51:13.505711 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1023 12:51:13.509051 PCI: 00:1e.3 scanning...
1024 12:51:13.512487 scan_generic_bus for PCI: 00:1e.3
1025 12:51:13.515335 SPI: 00 enabled
1026 12:51:13.518681 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1027 12:51:13.525604 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1028 12:51:13.529068 PCI: 00:1f.0 scanning...
1029 12:51:13.532041 scan_static_bus for PCI: 00:1f.0
1030 12:51:13.532505 PNP: 0c09.0 enabled
1031 12:51:13.535506 PNP: 0c09.0 scanning...
1032 12:51:13.539243 scan_static_bus for PNP: 0c09.0
1033 12:51:13.542547 scan_static_bus for PNP: 0c09.0 done
1034 12:51:13.548988 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1035 12:51:13.552463 scan_static_bus for PCI: 00:1f.0 done
1036 12:51:13.555600 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1037 12:51:13.559125 PCI: 00:1f.2 scanning...
1038 12:51:13.562396 scan_static_bus for PCI: 00:1f.2
1039 12:51:13.565735 GENERIC: 0.0 enabled
1040 12:51:13.566301 GENERIC: 0.0 scanning...
1041 12:51:13.569194 scan_static_bus for GENERIC: 0.0
1042 12:51:13.571917 GENERIC: 0.0 enabled
1043 12:51:13.575679 GENERIC: 1.0 enabled
1044 12:51:13.578601 scan_static_bus for GENERIC: 0.0 done
1045 12:51:13.582184 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1046 12:51:13.588693 scan_static_bus for PCI: 00:1f.2 done
1047 12:51:13.591905 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1048 12:51:13.595354 PCI: 00:1f.3 scanning...
1049 12:51:13.598787 scan_static_bus for PCI: 00:1f.3
1050 12:51:13.601755 scan_static_bus for PCI: 00:1f.3 done
1051 12:51:13.605398 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1052 12:51:13.608551 PCI: 00:1f.5 scanning...
1053 12:51:13.612049 scan_generic_bus for PCI: 00:1f.5
1054 12:51:13.615645 scan_generic_bus for PCI: 00:1f.5 done
1055 12:51:13.622445 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1056 12:51:13.625512 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1057 12:51:13.631796 scan_static_bus for Root Device done
1058 12:51:13.635035 scan_bus: bus Root Device finished in 736 msecs
1059 12:51:13.635548 done
1060 12:51:13.641832 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1061 12:51:13.644646 Chrome EC: UHEPI supported
1062 12:51:13.651485 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1063 12:51:13.658172 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1064 12:51:13.661680 SPI flash protection: WPSW=0 SRP0=0
1065 12:51:13.664531 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1066 12:51:13.671741 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1067 12:51:13.674592 found VGA at PCI: 00:02.0
1068 12:51:13.678208 Setting up VGA for PCI: 00:02.0
1069 12:51:13.681143 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1070 12:51:13.687788 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1071 12:51:13.691442 Allocating resources...
1072 12:51:13.691928 Reading resources...
1073 12:51:13.697547 Root Device read_resources bus 0 link: 0
1074 12:51:13.701019 DOMAIN: 0000 read_resources bus 0 link: 0
1075 12:51:13.704178 PCI: 00:04.0 read_resources bus 1 link: 0
1076 12:51:13.712005 PCI: 00:04.0 read_resources bus 1 link: 0 done
1077 12:51:13.714849 PCI: 00:0d.0 read_resources bus 0 link: 0
1078 12:51:13.721306 USB0 port 0 read_resources bus 0 link: 0
1079 12:51:13.724971 USB0 port 0 read_resources bus 0 link: 0 done
1080 12:51:13.731799 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1081 12:51:13.734731 PCI: 00:14.0 read_resources bus 0 link: 0
1082 12:51:13.737961 USB0 port 0 read_resources bus 0 link: 0
1083 12:51:13.746079 USB0 port 0 read_resources bus 0 link: 0 done
1084 12:51:13.748863 PCI: 00:14.0 read_resources bus 0 link: 0 done
1085 12:51:13.755976 PCI: 00:14.3 read_resources bus 0 link: 0
1086 12:51:13.759471 PCI: 00:14.3 read_resources bus 0 link: 0 done
1087 12:51:13.765916 PCI: 00:15.0 read_resources bus 0 link: 0
1088 12:51:13.769566 PCI: 00:15.0 read_resources bus 0 link: 0 done
1089 12:51:13.776083 PCI: 00:15.1 read_resources bus 0 link: 0
1090 12:51:13.779060 PCI: 00:15.1 read_resources bus 0 link: 0 done
1091 12:51:13.786232 PCI: 00:19.1 read_resources bus 0 link: 0
1092 12:51:13.789888 PCI: 00:19.1 read_resources bus 0 link: 0 done
1093 12:51:13.796584 PCI: 00:1d.0 read_resources bus 1 link: 0
1094 12:51:13.799874 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1095 12:51:13.806898 PCI: 00:1e.2 read_resources bus 2 link: 0
1096 12:51:13.809741 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1097 12:51:13.816415 PCI: 00:1e.3 read_resources bus 3 link: 0
1098 12:51:13.820021 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1099 12:51:13.826377 PCI: 00:1f.0 read_resources bus 0 link: 0
1100 12:51:13.830045 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1101 12:51:13.832910 PCI: 00:1f.2 read_resources bus 0 link: 0
1102 12:51:13.840094 GENERIC: 0.0 read_resources bus 0 link: 0
1103 12:51:13.843314 GENERIC: 0.0 read_resources bus 0 link: 0 done
1104 12:51:13.850238 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1105 12:51:13.856921 DOMAIN: 0000 read_resources bus 0 link: 0 done
1106 12:51:13.860205 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1107 12:51:13.863204 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1108 12:51:13.870180 Root Device read_resources bus 0 link: 0 done
1109 12:51:13.873238 Done reading resources.
1110 12:51:13.876540 Show resources in subtree (Root Device)...After reading.
1111 12:51:13.883490 Root Device child on link 0 DOMAIN: 0000
1112 12:51:13.886279 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1113 12:51:13.896512 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1114 12:51:13.906603 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1115 12:51:13.907161 PCI: 00:00.0
1116 12:51:13.916777 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1117 12:51:13.926292 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1118 12:51:13.936276 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1119 12:51:13.946304 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1120 12:51:13.952988 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1121 12:51:13.962499 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1122 12:51:13.972682 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1123 12:51:13.982498 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1124 12:51:13.992401 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1125 12:51:14.002539 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1126 12:51:14.009070 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1127 12:51:14.018734 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1128 12:51:14.028424 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1129 12:51:14.038892 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1130 12:51:14.048359 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1131 12:51:14.058366 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1132 12:51:14.068345 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1133 12:51:14.075017 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1134 12:51:14.084968 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1135 12:51:14.095095 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1136 12:51:14.098764 PCI: 00:02.0
1137 12:51:14.108265 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1138 12:51:14.118456 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1139 12:51:14.125137 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1140 12:51:14.131957 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1141 12:51:14.141596 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1142 12:51:14.142174 GENERIC: 0.0
1143 12:51:14.145029 PCI: 00:05.0
1144 12:51:14.154906 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1145 12:51:14.158523 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1146 12:51:14.161531 GENERIC: 0.0
1147 12:51:14.162104 PCI: 00:08.0
1148 12:51:14.171801 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1149 12:51:14.174534 PCI: 00:0a.0
1150 12:51:14.178184 PCI: 00:0d.0 child on link 0 USB0 port 0
1151 12:51:14.188015 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1152 12:51:14.191330 USB0 port 0 child on link 0 USB3 port 0
1153 12:51:14.194644 USB3 port 0
1154 12:51:14.195124 USB3 port 1
1155 12:51:14.197934 USB3 port 2
1156 12:51:14.201646 USB3 port 3
1157 12:51:14.204688 PCI: 00:14.0 child on link 0 USB0 port 0
1158 12:51:14.214958 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1159 12:51:14.217953 USB0 port 0 child on link 0 USB2 port 0
1160 12:51:14.221503 USB2 port 0
1161 12:51:14.221983 USB2 port 1
1162 12:51:14.224549 USB2 port 2
1163 12:51:14.225028 USB2 port 3
1164 12:51:14.228262 USB2 port 4
1165 12:51:14.228816 USB2 port 5
1166 12:51:14.231175 USB2 port 6
1167 12:51:14.231696 USB2 port 7
1168 12:51:14.234696 USB2 port 8
1169 12:51:14.238243 USB2 port 9
1170 12:51:14.238989 USB3 port 0
1171 12:51:14.241647 USB3 port 1
1172 12:51:14.242130 USB3 port 2
1173 12:51:14.244671 USB3 port 3
1174 12:51:14.245151 PCI: 00:14.2
1175 12:51:14.255031 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1176 12:51:14.264470 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1177 12:51:14.268087 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1178 12:51:14.278344 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1179 12:51:14.281203 GENERIC: 0.0
1180 12:51:14.284596 PCI: 00:15.0 child on link 0 I2C: 00:1a
1181 12:51:14.294345 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1182 12:51:14.298025 I2C: 00:1a
1183 12:51:14.298536 I2C: 00:31
1184 12:51:14.300910 I2C: 00:32
1185 12:51:14.304327 PCI: 00:15.1 child on link 0 I2C: 00:10
1186 12:51:14.314276 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 12:51:14.314857 I2C: 00:10
1188 12:51:14.317426 PCI: 00:15.2
1189 12:51:14.327675 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 12:51:14.328160 PCI: 00:15.3
1191 12:51:14.337413 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1192 12:51:14.341192 PCI: 00:16.0
1193 12:51:14.351455 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 12:51:14.352038 PCI: 00:19.0
1195 12:51:14.358092 PCI: 00:19.1 child on link 0 I2C: 00:15
1196 12:51:14.367810 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 12:51:14.368369 I2C: 00:15
1198 12:51:14.374694 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1199 12:51:14.380730 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1200 12:51:14.390994 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1201 12:51:14.400665 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1202 12:51:14.401195 GENERIC: 0.0
1203 12:51:14.404150 PCI: 01:00.0
1204 12:51:14.414234 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1205 12:51:14.424060 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1206 12:51:14.433963 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1207 12:51:14.434492 PCI: 00:1e.0
1208 12:51:14.444036 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1209 12:51:14.450326 PCI: 00:1e.2 child on link 0 SPI: 00
1210 12:51:14.460892 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1211 12:51:14.461441 SPI: 00
1212 12:51:14.463863 PCI: 00:1e.3 child on link 0 SPI: 00
1213 12:51:14.473955 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 12:51:14.477085 SPI: 00
1215 12:51:14.480655 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1216 12:51:14.490761 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1217 12:51:14.491548 PNP: 0c09.0
1218 12:51:14.500810 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1219 12:51:14.503499 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1220 12:51:14.514085 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1221 12:51:14.523615 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1222 12:51:14.526886 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1223 12:51:14.530398 GENERIC: 0.0
1224 12:51:14.530882 GENERIC: 1.0
1225 12:51:14.533729 PCI: 00:1f.3
1226 12:51:14.543596 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1227 12:51:14.553631 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1228 12:51:14.554246 PCI: 00:1f.5
1229 12:51:14.563536 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1230 12:51:14.566852 CPU_CLUSTER: 0 child on link 0 APIC: 00
1231 12:51:14.570134 APIC: 00
1232 12:51:14.570595 APIC: 01
1233 12:51:14.570956 APIC: 03
1234 12:51:14.574253 APIC: 05
1235 12:51:14.574979 APIC: 07
1236 12:51:14.576993 APIC: 06
1237 12:51:14.577646 APIC: 02
1238 12:51:14.578043 APIC: 04
1239 12:51:14.587042 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1240 12:51:14.590070 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1241 12:51:14.596676 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1242 12:51:14.603359 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1243 12:51:14.606985 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1244 12:51:14.613115 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1245 12:51:14.616964 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1246 12:51:14.623671 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1247 12:51:14.629786 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1248 12:51:14.639930 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1249 12:51:14.646463 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1250 12:51:14.653208 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1251 12:51:14.659988 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1252 12:51:14.666585 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1253 12:51:14.673156 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1254 12:51:14.676521 DOMAIN: 0000: Resource ranges:
1255 12:51:14.679843 * Base: 1000, Size: 800, Tag: 100
1256 12:51:14.686654 * Base: 1900, Size: e700, Tag: 100
1257 12:51:14.689474 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1258 12:51:14.696200 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1259 12:51:14.702861 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1260 12:51:14.713395 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1261 12:51:14.719597 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1262 12:51:14.726073 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1263 12:51:14.733260 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1264 12:51:14.742682 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1265 12:51:14.749278 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1266 12:51:14.756178 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1267 12:51:14.765777 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1268 12:51:14.772751 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1269 12:51:14.779066 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1270 12:51:14.789296 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1271 12:51:14.796114 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1272 12:51:14.802830 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1273 12:51:14.812962 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1274 12:51:14.818915 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1275 12:51:14.826001 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1276 12:51:14.835721 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1277 12:51:14.842293 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1278 12:51:14.848759 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1279 12:51:14.859126 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1280 12:51:14.865978 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1281 12:51:14.872838 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1282 12:51:14.875379 DOMAIN: 0000: Resource ranges:
1283 12:51:14.882226 * Base: 7fc00000, Size: 40400000, Tag: 200
1284 12:51:14.885834 * Base: d0000000, Size: 28000000, Tag: 200
1285 12:51:14.888552 * Base: fa000000, Size: 1000000, Tag: 200
1286 12:51:14.895375 * Base: fb001000, Size: 2fff000, Tag: 200
1287 12:51:14.898598 * Base: fe010000, Size: 2e000, Tag: 200
1288 12:51:14.901741 * Base: fe03f000, Size: d41000, Tag: 200
1289 12:51:14.904914 * Base: fed88000, Size: 8000, Tag: 200
1290 12:51:14.912011 * Base: fed93000, Size: d000, Tag: 200
1291 12:51:14.915195 * Base: feda2000, Size: 1e000, Tag: 200
1292 12:51:14.918585 * Base: fede0000, Size: 1220000, Tag: 200
1293 12:51:14.924857 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1294 12:51:14.932083 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1295 12:51:14.938612 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1296 12:51:14.944792 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1297 12:51:14.951935 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1298 12:51:14.958266 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1299 12:51:14.965155 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1300 12:51:14.971080 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1301 12:51:14.978491 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1302 12:51:14.984661 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1303 12:51:14.993809 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1304 12:51:14.998268 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1305 12:51:15.004662 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1306 12:51:15.011124 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1307 12:51:15.017599 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1308 12:51:15.024346 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1309 12:51:15.030683 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1310 12:51:15.038069 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1311 12:51:15.044546 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1312 12:51:15.051291 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1313 12:51:15.057396 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1314 12:51:15.064309 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1315 12:51:15.070740 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1316 12:51:15.077942 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1317 12:51:15.084401 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1318 12:51:15.087338 PCI: 00:1d.0: Resource ranges:
1319 12:51:15.093731 * Base: 7fc00000, Size: 100000, Tag: 200
1320 12:51:15.100621 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1321 12:51:15.107502 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1322 12:51:15.113862 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1323 12:51:15.120455 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1324 12:51:15.127256 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1325 12:51:15.134090 Root Device assign_resources, bus 0 link: 0
1326 12:51:15.136994 DOMAIN: 0000 assign_resources, bus 0 link: 0
1327 12:51:15.146937 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1328 12:51:15.153802 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1329 12:51:15.163464 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1330 12:51:15.169919 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1331 12:51:15.173189 PCI: 00:04.0 assign_resources, bus 1 link: 0
1332 12:51:15.180167 PCI: 00:04.0 assign_resources, bus 1 link: 0
1333 12:51:15.186291 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1334 12:51:15.196469 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1335 12:51:15.203569 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1336 12:51:15.209602 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1337 12:51:15.213617 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1338 12:51:15.220036 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1339 12:51:15.226272 PCI: 00:14.0 assign_resources, bus 0 link: 0
1340 12:51:15.229904 PCI: 00:14.0 assign_resources, bus 0 link: 0
1341 12:51:15.239593 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1342 12:51:15.246301 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1343 12:51:15.256233 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1344 12:51:15.259975 PCI: 00:14.3 assign_resources, bus 0 link: 0
1345 12:51:15.262947 PCI: 00:14.3 assign_resources, bus 0 link: 0
1346 12:51:15.273042 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1347 12:51:15.276448 PCI: 00:15.0 assign_resources, bus 0 link: 0
1348 12:51:15.282839 PCI: 00:15.0 assign_resources, bus 0 link: 0
1349 12:51:15.289704 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1350 12:51:15.296231 PCI: 00:15.1 assign_resources, bus 0 link: 0
1351 12:51:15.299694 PCI: 00:15.1 assign_resources, bus 0 link: 0
1352 12:51:15.305951 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1353 12:51:15.315959 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1354 12:51:15.322966 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1355 12:51:15.332628 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1356 12:51:15.335828 PCI: 00:19.1 assign_resources, bus 0 link: 0
1357 12:51:15.342393 PCI: 00:19.1 assign_resources, bus 0 link: 0
1358 12:51:15.348961 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1359 12:51:15.359351 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1360 12:51:15.371069 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1361 12:51:15.372574 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1362 12:51:15.382294 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1363 12:51:15.389026 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1364 12:51:15.395698 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1365 12:51:15.402474 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1366 12:51:15.408782 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1367 12:51:15.415683 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1368 12:51:15.419024 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1369 12:51:15.429027 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1370 12:51:15.431992 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1371 12:51:15.435618 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1372 12:51:15.441977 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1373 12:51:15.445578 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1374 12:51:15.452210 LPC: Trying to open IO window from 800 size 1ff
1375 12:51:15.458661 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1376 12:51:15.468681 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1377 12:51:15.475321 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1378 12:51:15.482015 DOMAIN: 0000 assign_resources, bus 0 link: 0
1379 12:51:15.484981 Root Device assign_resources, bus 0 link: 0
1380 12:51:15.488625 Done setting resources.
1381 12:51:15.495413 Show resources in subtree (Root Device)...After assigning values.
1382 12:51:15.498369 Root Device child on link 0 DOMAIN: 0000
1383 12:51:15.501880 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1384 12:51:15.511892 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1385 12:51:15.522237 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1386 12:51:15.525019 PCI: 00:00.0
1387 12:51:15.532226 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1388 12:51:15.541483 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1389 12:51:15.551677 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1390 12:51:15.561502 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1391 12:51:15.571666 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1392 12:51:15.582018 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1393 12:51:15.588580 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1394 12:51:15.598223 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1395 12:51:15.608069 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1396 12:51:15.617983 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1397 12:51:15.627902 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1398 12:51:15.638224 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1399 12:51:15.645084 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1400 12:51:15.655014 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1401 12:51:15.664639 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1402 12:51:15.674899 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1403 12:51:15.684647 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1404 12:51:15.694788 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1405 12:51:15.700915 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1406 12:51:15.711117 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1407 12:51:15.714589 PCI: 00:02.0
1408 12:51:15.724254 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1409 12:51:15.734248 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1410 12:51:15.744401 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1411 12:51:15.747134 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1412 12:51:15.760600 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1413 12:51:15.761092 GENERIC: 0.0
1414 12:51:15.764326 PCI: 00:05.0
1415 12:51:15.774315 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1416 12:51:15.777448 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1417 12:51:15.780766 GENERIC: 0.0
1418 12:51:15.781182 PCI: 00:08.0
1419 12:51:15.790731 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1420 12:51:15.794016 PCI: 00:0a.0
1421 12:51:15.797145 PCI: 00:0d.0 child on link 0 USB0 port 0
1422 12:51:15.807315 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1423 12:51:15.813793 USB0 port 0 child on link 0 USB3 port 0
1424 12:51:15.813992 USB3 port 0
1425 12:51:15.816791 USB3 port 1
1426 12:51:15.816970 USB3 port 2
1427 12:51:15.820515 USB3 port 3
1428 12:51:15.823412 PCI: 00:14.0 child on link 0 USB0 port 0
1429 12:51:15.833460 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1430 12:51:15.837052 USB0 port 0 child on link 0 USB2 port 0
1431 12:51:15.839887 USB2 port 0
1432 12:51:15.843347 USB2 port 1
1433 12:51:15.843589 USB2 port 2
1434 12:51:15.847178 USB2 port 3
1435 12:51:15.847355 USB2 port 4
1436 12:51:15.850578 USB2 port 5
1437 12:51:15.850787 USB2 port 6
1438 12:51:15.853490 USB2 port 7
1439 12:51:15.853698 USB2 port 8
1440 12:51:15.856695 USB2 port 9
1441 12:51:15.857046 USB3 port 0
1442 12:51:15.860529 USB3 port 1
1443 12:51:15.860846 USB3 port 2
1444 12:51:15.863368 USB3 port 3
1445 12:51:15.863822 PCI: 00:14.2
1446 12:51:15.877218 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1447 12:51:15.887155 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1448 12:51:15.890159 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1449 12:51:15.900434 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1450 12:51:15.903867 GENERIC: 0.0
1451 12:51:15.906809 PCI: 00:15.0 child on link 0 I2C: 00:1a
1452 12:51:15.916983 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1453 12:51:15.920052 I2C: 00:1a
1454 12:51:15.920476 I2C: 00:31
1455 12:51:15.920831 I2C: 00:32
1456 12:51:15.926799 PCI: 00:15.1 child on link 0 I2C: 00:10
1457 12:51:15.936510 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1458 12:51:15.936939 I2C: 00:10
1459 12:51:15.940034 PCI: 00:15.2
1460 12:51:15.950055 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1461 12:51:15.950415 PCI: 00:15.3
1462 12:51:15.963247 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1463 12:51:15.963645 PCI: 00:16.0
1464 12:51:15.973296 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1465 12:51:15.976228 PCI: 00:19.0
1466 12:51:15.980019 PCI: 00:19.1 child on link 0 I2C: 00:15
1467 12:51:15.989885 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1468 12:51:15.992986 I2C: 00:15
1469 12:51:15.996686 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1470 12:51:16.006205 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1471 12:51:16.016335 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1472 12:51:16.026713 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1473 12:51:16.029795 GENERIC: 0.0
1474 12:51:16.030023 PCI: 01:00.0
1475 12:51:16.043134 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1476 12:51:16.053456 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1477 12:51:16.063307 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1478 12:51:16.063893 PCI: 00:1e.0
1479 12:51:16.076595 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1480 12:51:16.079844 PCI: 00:1e.2 child on link 0 SPI: 00
1481 12:51:16.089535 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1482 12:51:16.089977 SPI: 00
1483 12:51:16.096466 PCI: 00:1e.3 child on link 0 SPI: 00
1484 12:51:16.106047 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1485 12:51:16.106475 SPI: 00
1486 12:51:16.109827 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1487 12:51:16.119584 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1488 12:51:16.122610 PNP: 0c09.0
1489 12:51:16.129741 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1490 12:51:16.136369 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1491 12:51:16.142668 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1492 12:51:16.152601 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1493 12:51:16.159195 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1494 12:51:16.159667 GENERIC: 0.0
1495 12:51:16.162335 GENERIC: 1.0
1496 12:51:16.162802 PCI: 00:1f.3
1497 12:51:16.172561 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1498 12:51:16.185500 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1499 12:51:16.185932 PCI: 00:1f.5
1500 12:51:16.195848 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1501 12:51:16.199015 CPU_CLUSTER: 0 child on link 0 APIC: 00
1502 12:51:16.202151 APIC: 00
1503 12:51:16.202569 APIC: 01
1504 12:51:16.205456 APIC: 03
1505 12:51:16.205875 APIC: 05
1506 12:51:16.206205 APIC: 07
1507 12:51:16.208932 APIC: 06
1508 12:51:16.209351 APIC: 02
1509 12:51:16.209681 APIC: 04
1510 12:51:16.211995 Done allocating resources.
1511 12:51:16.219121 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1512 12:51:16.225508 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1513 12:51:16.229221 Configure GPIOs for I2S audio on UP4.
1514 12:51:16.235739 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1515 12:51:16.239098 Enabling resources...
1516 12:51:16.242099 PCI: 00:00.0 subsystem <- 8086/9a12
1517 12:51:16.245845 PCI: 00:00.0 cmd <- 06
1518 12:51:16.248994 PCI: 00:02.0 subsystem <- 8086/9a40
1519 12:51:16.252612 PCI: 00:02.0 cmd <- 03
1520 12:51:16.255434 PCI: 00:04.0 subsystem <- 8086/9a03
1521 12:51:16.258876 PCI: 00:04.0 cmd <- 02
1522 12:51:16.262170 PCI: 00:05.0 subsystem <- 8086/9a19
1523 12:51:16.262598 PCI: 00:05.0 cmd <- 02
1524 12:51:16.268935 PCI: 00:08.0 subsystem <- 8086/9a11
1525 12:51:16.269358 PCI: 00:08.0 cmd <- 06
1526 12:51:16.272358 PCI: 00:0d.0 subsystem <- 8086/9a13
1527 12:51:16.275281 PCI: 00:0d.0 cmd <- 02
1528 12:51:16.278413 PCI: 00:14.0 subsystem <- 8086/a0ed
1529 12:51:16.282270 PCI: 00:14.0 cmd <- 02
1530 12:51:16.285632 PCI: 00:14.2 subsystem <- 8086/a0ef
1531 12:51:16.288629 PCI: 00:14.2 cmd <- 02
1532 12:51:16.291888 PCI: 00:14.3 subsystem <- 8086/a0f0
1533 12:51:16.295279 PCI: 00:14.3 cmd <- 02
1534 12:51:16.298676 PCI: 00:15.0 subsystem <- 8086/a0e8
1535 12:51:16.301649 PCI: 00:15.0 cmd <- 02
1536 12:51:16.305479 PCI: 00:15.1 subsystem <- 8086/a0e9
1537 12:51:16.308994 PCI: 00:15.1 cmd <- 02
1538 12:51:16.311880 PCI: 00:15.2 subsystem <- 8086/a0ea
1539 12:51:16.312328 PCI: 00:15.2 cmd <- 02
1540 12:51:16.318708 PCI: 00:15.3 subsystem <- 8086/a0eb
1541 12:51:16.319244 PCI: 00:15.3 cmd <- 02
1542 12:51:16.321515 PCI: 00:16.0 subsystem <- 8086/a0e0
1543 12:51:16.325390 PCI: 00:16.0 cmd <- 02
1544 12:51:16.328452 PCI: 00:19.1 subsystem <- 8086/a0c6
1545 12:51:16.331717 PCI: 00:19.1 cmd <- 02
1546 12:51:16.334805 PCI: 00:1d.0 bridge ctrl <- 0013
1547 12:51:16.338311 PCI: 00:1d.0 subsystem <- 8086/a0b0
1548 12:51:16.342028 PCI: 00:1d.0 cmd <- 06
1549 12:51:16.345338 PCI: 00:1e.0 subsystem <- 8086/a0a8
1550 12:51:16.348644 PCI: 00:1e.0 cmd <- 06
1551 12:51:16.351729 PCI: 00:1e.2 subsystem <- 8086/a0aa
1552 12:51:16.354747 PCI: 00:1e.2 cmd <- 06
1553 12:51:16.358368 PCI: 00:1e.3 subsystem <- 8086/a0ab
1554 12:51:16.358879 PCI: 00:1e.3 cmd <- 02
1555 12:51:16.365402 PCI: 00:1f.0 subsystem <- 8086/a087
1556 12:51:16.365881 PCI: 00:1f.0 cmd <- 407
1557 12:51:16.368605 PCI: 00:1f.3 subsystem <- 8086/a0c8
1558 12:51:16.371731 PCI: 00:1f.3 cmd <- 02
1559 12:51:16.375105 PCI: 00:1f.5 subsystem <- 8086/a0a4
1560 12:51:16.378487 PCI: 00:1f.5 cmd <- 406
1561 12:51:16.382837 PCI: 01:00.0 cmd <- 02
1562 12:51:16.387921 done.
1563 12:51:16.390881 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1564 12:51:16.394319 Initializing devices...
1565 12:51:16.397340 Root Device init
1566 12:51:16.400799 Chrome EC: Set SMI mask to 0x0000000000000000
1567 12:51:16.407440 Chrome EC: clear events_b mask to 0x0000000000000000
1568 12:51:16.414068 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1569 12:51:16.417719 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1570 12:51:16.423942 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1571 12:51:16.431214 Chrome EC: Set WAKE mask to 0x0000000000000000
1572 12:51:16.434172 fw_config match found: DB_USB=USB3_ACTIVE
1573 12:51:16.440806 Configure Right Type-C port orientation for retimer
1574 12:51:16.444017 Root Device init finished in 42 msecs
1575 12:51:16.447015 PCI: 00:00.0 init
1576 12:51:16.447595 CPU TDP = 9 Watts
1577 12:51:16.450766 CPU PL1 = 9 Watts
1578 12:51:16.454009 CPU PL2 = 40 Watts
1579 12:51:16.454562 CPU PL4 = 83 Watts
1580 12:51:16.457188 PCI: 00:00.0 init finished in 8 msecs
1581 12:51:16.460864 PCI: 00:02.0 init
1582 12:51:16.463520 GMA: Found VBT in CBFS
1583 12:51:16.467323 GMA: Found valid VBT in CBFS
1584 12:51:16.470283 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1585 12:51:16.480329 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1586 12:51:16.483726 PCI: 00:02.0 init finished in 18 msecs
1587 12:51:16.486709 PCI: 00:05.0 init
1588 12:51:16.489711 PCI: 00:05.0 init finished in 0 msecs
1589 12:51:16.492975 PCI: 00:08.0 init
1590 12:51:16.496272 PCI: 00:08.0 init finished in 0 msecs
1591 12:51:16.499993 PCI: 00:14.0 init
1592 12:51:16.503126 PCI: 00:14.0 init finished in 0 msecs
1593 12:51:16.503643 PCI: 00:14.2 init
1594 12:51:16.506621 PCI: 00:14.2 init finished in 0 msecs
1595 12:51:16.511067 PCI: 00:15.0 init
1596 12:51:16.513722 I2C bus 0 version 0x3230302a
1597 12:51:16.517060 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1598 12:51:16.520195 PCI: 00:15.0 init finished in 6 msecs
1599 12:51:16.523979 PCI: 00:15.1 init
1600 12:51:16.527109 I2C bus 1 version 0x3230302a
1601 12:51:16.530774 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1602 12:51:16.533923 PCI: 00:15.1 init finished in 6 msecs
1603 12:51:16.537410 PCI: 00:15.2 init
1604 12:51:16.540385 I2C bus 2 version 0x3230302a
1605 12:51:16.543951 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1606 12:51:16.547522 PCI: 00:15.2 init finished in 6 msecs
1607 12:51:16.548006 PCI: 00:15.3 init
1608 12:51:16.550624 I2C bus 3 version 0x3230302a
1609 12:51:16.553777 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1610 12:51:16.560157 PCI: 00:15.3 init finished in 6 msecs
1611 12:51:16.560693 PCI: 00:16.0 init
1612 12:51:16.563902 PCI: 00:16.0 init finished in 0 msecs
1613 12:51:16.567474 PCI: 00:19.1 init
1614 12:51:16.570561 I2C bus 5 version 0x3230302a
1615 12:51:16.574223 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1616 12:51:16.577545 PCI: 00:19.1 init finished in 6 msecs
1617 12:51:16.580779 PCI: 00:1d.0 init
1618 12:51:16.583837 Initializing PCH PCIe bridge.
1619 12:51:16.587480 PCI: 00:1d.0 init finished in 3 msecs
1620 12:51:16.590479 PCI: 00:1f.0 init
1621 12:51:16.593908 IOAPIC: Initializing IOAPIC at 0xfec00000
1622 12:51:16.597030 IOAPIC: Bootstrap Processor Local APIC = 0x00
1623 12:51:16.600628 IOAPIC: ID = 0x02
1624 12:51:16.603943 IOAPIC: Dumping registers
1625 12:51:16.607339 reg 0x0000: 0x02000000
1626 12:51:16.607859 reg 0x0001: 0x00770020
1627 12:51:16.610371 reg 0x0002: 0x00000000
1628 12:51:16.613897 PCI: 00:1f.0 init finished in 21 msecs
1629 12:51:16.617395 PCI: 00:1f.2 init
1630 12:51:16.620891 Disabling ACPI via APMC.
1631 12:51:16.623784 APMC done.
1632 12:51:16.626978 PCI: 00:1f.2 init finished in 5 msecs
1633 12:51:16.639089 PCI: 01:00.0 init
1634 12:51:16.642153 PCI: 01:00.0 init finished in 0 msecs
1635 12:51:16.645904 PNP: 0c09.0 init
1636 12:51:16.649013 Google Chrome EC uptime: 8.406 seconds
1637 12:51:16.655480 Google Chrome AP resets since EC boot: 1
1638 12:51:16.658872 Google Chrome most recent AP reset causes:
1639 12:51:16.662348 0.347: 32775 shutdown: entering G3
1640 12:51:16.669026 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1641 12:51:16.671709 PNP: 0c09.0 init finished in 22 msecs
1642 12:51:16.678211 Devices initialized
1643 12:51:16.681407 Show all devs... After init.
1644 12:51:16.684689 Root Device: enabled 1
1645 12:51:16.685109 DOMAIN: 0000: enabled 1
1646 12:51:16.688123 CPU_CLUSTER: 0: enabled 1
1647 12:51:16.691266 PCI: 00:00.0: enabled 1
1648 12:51:16.694201 PCI: 00:02.0: enabled 1
1649 12:51:16.694620 PCI: 00:04.0: enabled 1
1650 12:51:16.697924 PCI: 00:05.0: enabled 1
1651 12:51:16.700882 PCI: 00:06.0: enabled 0
1652 12:51:16.704639 PCI: 00:07.0: enabled 0
1653 12:51:16.705060 PCI: 00:07.1: enabled 0
1654 12:51:16.707491 PCI: 00:07.2: enabled 0
1655 12:51:16.711057 PCI: 00:07.3: enabled 0
1656 12:51:16.714121 PCI: 00:08.0: enabled 1
1657 12:51:16.714538 PCI: 00:09.0: enabled 0
1658 12:51:16.717489 PCI: 00:0a.0: enabled 0
1659 12:51:16.720823 PCI: 00:0d.0: enabled 1
1660 12:51:16.721247 PCI: 00:0d.1: enabled 0
1661 12:51:16.724325 PCI: 00:0d.2: enabled 0
1662 12:51:16.728061 PCI: 00:0d.3: enabled 0
1663 12:51:16.730995 PCI: 00:0e.0: enabled 0
1664 12:51:16.731445 PCI: 00:10.2: enabled 1
1665 12:51:16.734388 PCI: 00:10.6: enabled 0
1666 12:51:16.737516 PCI: 00:10.7: enabled 0
1667 12:51:16.741173 PCI: 00:12.0: enabled 0
1668 12:51:16.741719 PCI: 00:12.6: enabled 0
1669 12:51:16.744853 PCI: 00:13.0: enabled 0
1670 12:51:16.747445 PCI: 00:14.0: enabled 1
1671 12:51:16.751540 PCI: 00:14.1: enabled 0
1672 12:51:16.752086 PCI: 00:14.2: enabled 1
1673 12:51:16.754177 PCI: 00:14.3: enabled 1
1674 12:51:16.757981 PCI: 00:15.0: enabled 1
1675 12:51:16.760950 PCI: 00:15.1: enabled 1
1676 12:51:16.761362 PCI: 00:15.2: enabled 1
1677 12:51:16.764552 PCI: 00:15.3: enabled 1
1678 12:51:16.767257 PCI: 00:16.0: enabled 1
1679 12:51:16.767729 PCI: 00:16.1: enabled 0
1680 12:51:16.770888 PCI: 00:16.2: enabled 0
1681 12:51:16.774550 PCI: 00:16.3: enabled 0
1682 12:51:16.777481 PCI: 00:16.4: enabled 0
1683 12:51:16.777894 PCI: 00:16.5: enabled 0
1684 12:51:16.781068 PCI: 00:17.0: enabled 0
1685 12:51:16.784093 PCI: 00:19.0: enabled 0
1686 12:51:16.787871 PCI: 00:19.1: enabled 1
1687 12:51:16.788283 PCI: 00:19.2: enabled 0
1688 12:51:16.791131 PCI: 00:1c.0: enabled 1
1689 12:51:16.794464 PCI: 00:1c.1: enabled 0
1690 12:51:16.797854 PCI: 00:1c.2: enabled 0
1691 12:51:16.798323 PCI: 00:1c.3: enabled 0
1692 12:51:16.800956 PCI: 00:1c.4: enabled 0
1693 12:51:16.804582 PCI: 00:1c.5: enabled 0
1694 12:51:16.805010 PCI: 00:1c.6: enabled 1
1695 12:51:16.807405 PCI: 00:1c.7: enabled 0
1696 12:51:16.811175 PCI: 00:1d.0: enabled 1
1697 12:51:16.814343 PCI: 00:1d.1: enabled 0
1698 12:51:16.814845 PCI: 00:1d.2: enabled 1
1699 12:51:16.817796 PCI: 00:1d.3: enabled 0
1700 12:51:16.820640 PCI: 00:1e.0: enabled 1
1701 12:51:16.824115 PCI: 00:1e.1: enabled 0
1702 12:51:16.824564 PCI: 00:1e.2: enabled 1
1703 12:51:16.827445 PCI: 00:1e.3: enabled 1
1704 12:51:16.830607 PCI: 00:1f.0: enabled 1
1705 12:51:16.834224 PCI: 00:1f.1: enabled 0
1706 12:51:16.834640 PCI: 00:1f.2: enabled 1
1707 12:51:16.837489 PCI: 00:1f.3: enabled 1
1708 12:51:16.840700 PCI: 00:1f.4: enabled 0
1709 12:51:16.841115 PCI: 00:1f.5: enabled 1
1710 12:51:16.844122 PCI: 00:1f.6: enabled 0
1711 12:51:16.847382 PCI: 00:1f.7: enabled 0
1712 12:51:16.850769 APIC: 00: enabled 1
1713 12:51:16.851186 GENERIC: 0.0: enabled 1
1714 12:51:16.853980 GENERIC: 0.0: enabled 1
1715 12:51:16.857073 GENERIC: 1.0: enabled 1
1716 12:51:16.860799 GENERIC: 0.0: enabled 1
1717 12:51:16.861236 GENERIC: 1.0: enabled 1
1718 12:51:16.864156 USB0 port 0: enabled 1
1719 12:51:16.867483 GENERIC: 0.0: enabled 1
1720 12:51:16.867902 USB0 port 0: enabled 1
1721 12:51:16.870797 GENERIC: 0.0: enabled 1
1722 12:51:16.873573 I2C: 00:1a: enabled 1
1723 12:51:16.876935 I2C: 00:31: enabled 1
1724 12:51:16.877352 I2C: 00:32: enabled 1
1725 12:51:16.880649 I2C: 00:10: enabled 1
1726 12:51:16.883690 I2C: 00:15: enabled 1
1727 12:51:16.884100 GENERIC: 0.0: enabled 0
1728 12:51:16.887439 GENERIC: 1.0: enabled 0
1729 12:51:16.890483 GENERIC: 0.0: enabled 1
1730 12:51:16.890893 SPI: 00: enabled 1
1731 12:51:16.893589 SPI: 00: enabled 1
1732 12:51:16.897056 PNP: 0c09.0: enabled 1
1733 12:51:16.897483 GENERIC: 0.0: enabled 1
1734 12:51:16.900603 USB3 port 0: enabled 1
1735 12:51:16.903718 USB3 port 1: enabled 1
1736 12:51:16.906727 USB3 port 2: enabled 0
1737 12:51:16.907144 USB3 port 3: enabled 0
1738 12:51:16.910482 USB2 port 0: enabled 0
1739 12:51:16.913755 USB2 port 1: enabled 1
1740 12:51:16.914253 USB2 port 2: enabled 1
1741 12:51:16.916698 USB2 port 3: enabled 0
1742 12:51:16.920360 USB2 port 4: enabled 1
1743 12:51:16.920880 USB2 port 5: enabled 0
1744 12:51:16.923256 USB2 port 6: enabled 0
1745 12:51:16.926927 USB2 port 7: enabled 0
1746 12:51:16.930509 USB2 port 8: enabled 0
1747 12:51:16.930920 USB2 port 9: enabled 0
1748 12:51:16.933491 USB3 port 0: enabled 0
1749 12:51:16.936864 USB3 port 1: enabled 1
1750 12:51:16.937408 USB3 port 2: enabled 0
1751 12:51:16.939867 USB3 port 3: enabled 0
1752 12:51:16.943447 GENERIC: 0.0: enabled 1
1753 12:51:16.946576 GENERIC: 1.0: enabled 1
1754 12:51:16.947110 APIC: 01: enabled 1
1755 12:51:16.950037 APIC: 03: enabled 1
1756 12:51:16.950448 APIC: 05: enabled 1
1757 12:51:16.953322 APIC: 07: enabled 1
1758 12:51:16.956655 APIC: 06: enabled 1
1759 12:51:16.957132 APIC: 02: enabled 1
1760 12:51:16.959908 APIC: 04: enabled 1
1761 12:51:16.963109 PCI: 01:00.0: enabled 1
1762 12:51:16.966780 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1763 12:51:16.973050 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1764 12:51:16.976752 ELOG: NV offset 0xf30000 size 0x1000
1765 12:51:16.983317 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1766 12:51:16.989844 ELOG: Event(17) added with size 13 at 2023-09-23 12:51:17 UTC
1767 12:51:16.996729 ELOG: Event(92) added with size 9 at 2023-09-23 12:51:17 UTC
1768 12:51:17.003209 ELOG: Event(93) added with size 9 at 2023-09-23 12:51:17 UTC
1769 12:51:17.009843 ELOG: Event(9E) added with size 10 at 2023-09-23 12:51:17 UTC
1770 12:51:17.016358 ELOG: Event(9F) added with size 14 at 2023-09-23 12:51:17 UTC
1771 12:51:17.022837 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1772 12:51:17.026072 ELOG: Event(A1) added with size 10 at 2023-09-23 12:51:17 UTC
1773 12:51:17.033237 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1774 12:51:17.039556 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1775 12:51:17.042586 Finalize devices...
1776 12:51:17.042999 Devices finalized
1777 12:51:17.049301 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1778 12:51:17.055847 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1779 12:51:17.059461 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1780 12:51:17.066278 ME: HFSTS1 : 0x80030055
1781 12:51:17.069032 ME: HFSTS2 : 0x30280116
1782 12:51:17.072264 ME: HFSTS3 : 0x00000050
1783 12:51:17.079054 ME: HFSTS4 : 0x00004000
1784 12:51:17.082314 ME: HFSTS5 : 0x00000000
1785 12:51:17.085584 ME: HFSTS6 : 0x00400006
1786 12:51:17.091961 ME: Manufacturing Mode : YES
1787 12:51:17.095571 ME: SPI Protection Mode Enabled : NO
1788 12:51:17.099338 ME: FW Partition Table : OK
1789 12:51:17.102364 ME: Bringup Loader Failure : NO
1790 12:51:17.105123 ME: Firmware Init Complete : NO
1791 12:51:17.108948 ME: Boot Options Present : NO
1792 12:51:17.111899 ME: Update In Progress : NO
1793 12:51:17.115556 ME: D0i3 Support : YES
1794 12:51:17.122192 ME: Low Power State Enabled : NO
1795 12:51:17.125223 ME: CPU Replaced : YES
1796 12:51:17.128477 ME: CPU Replacement Valid : YES
1797 12:51:17.131834 ME: Current Working State : 5
1798 12:51:17.135454 ME: Current Operation State : 1
1799 12:51:17.138828 ME: Current Operation Mode : 3
1800 12:51:17.142317 ME: Error Code : 0
1801 12:51:17.145197 ME: Enhanced Debug Mode : NO
1802 12:51:17.151824 ME: CPU Debug Disabled : YES
1803 12:51:17.155590 ME: TXT Support : NO
1804 12:51:17.158441 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1805 12:51:17.168753 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1806 12:51:17.171681 CBFS: 'fallback/slic' not found.
1807 12:51:17.175452 ACPI: Writing ACPI tables at 76b01000.
1808 12:51:17.176021 ACPI: * FACS
1809 12:51:17.178288 ACPI: * DSDT
1810 12:51:17.182167 Ramoops buffer: 0x100000@0x76a00000.
1811 12:51:17.188099 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1812 12:51:17.191764 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1813 12:51:17.195179 Google Chrome EC: version:
1814 12:51:17.198527 ro: voema_v2.0.7540-147f8d37d1
1815 12:51:17.201604 rw: voema_v2.0.7540-147f8d37d1
1816 12:51:17.205261 running image: 2
1817 12:51:17.211634 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1818 12:51:17.214792 ACPI: * FADT
1819 12:51:17.215341 SCI is IRQ9
1820 12:51:17.218388 ACPI: added table 1/32, length now 40
1821 12:51:17.221846 ACPI: * SSDT
1822 12:51:17.224805 Found 1 CPU(s) with 8 core(s) each.
1823 12:51:17.228175 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1824 12:51:17.231746 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1825 12:51:17.238208 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1826 12:51:17.241362 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1827 12:51:17.248326 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1828 12:51:17.254417 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1829 12:51:17.258040 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1830 12:51:17.264896 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1831 12:51:17.271184 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1832 12:51:17.274351 \_SB.PCI0.RP09: Added StorageD3Enable property
1833 12:51:17.277884 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1834 12:51:17.284358 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1835 12:51:17.290909 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1836 12:51:17.294509 PS2K: Passing 80 keymaps to kernel
1837 12:51:17.301179 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1838 12:51:17.307750 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1839 12:51:17.314332 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1840 12:51:17.321319 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1841 12:51:17.327895 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1842 12:51:17.334188 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1843 12:51:17.340757 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1844 12:51:17.347221 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1845 12:51:17.351141 ACPI: added table 2/32, length now 44
1846 12:51:17.351651 ACPI: * MCFG
1847 12:51:17.354387 ACPI: added table 3/32, length now 48
1848 12:51:17.357670 ACPI: * TPM2
1849 12:51:17.360718 TPM2 log created at 0x769f0000
1850 12:51:17.364306 ACPI: added table 4/32, length now 52
1851 12:51:17.364731 ACPI: * MADT
1852 12:51:17.367469 SCI is IRQ9
1853 12:51:17.371025 ACPI: added table 5/32, length now 56
1854 12:51:17.374004 current = 76b09850
1855 12:51:17.374425 ACPI: * DMAR
1856 12:51:17.377535 ACPI: added table 6/32, length now 60
1857 12:51:17.380376 ACPI: added table 7/32, length now 64
1858 12:51:17.383881 ACPI: * HPET
1859 12:51:17.387495 ACPI: added table 8/32, length now 68
1860 12:51:17.387920 ACPI: done.
1861 12:51:17.391065 ACPI tables: 35216 bytes.
1862 12:51:17.393787 smbios_write_tables: 769ef000
1863 12:51:17.397626 EC returned error result code 3
1864 12:51:17.400812 Couldn't obtain OEM name from CBI
1865 12:51:17.403887 Create SMBIOS type 16
1866 12:51:17.407459 Create SMBIOS type 17
1867 12:51:17.408033 GENERIC: 0.0 (WIFI Device)
1868 12:51:17.410467 SMBIOS tables: 1750 bytes.
1869 12:51:17.417015 Writing table forward entry at 0x00000500
1870 12:51:17.420503 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1871 12:51:17.427342 Writing coreboot table at 0x76b25000
1872 12:51:17.430142 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1873 12:51:17.437221 1. 0000000000001000-000000000009ffff: RAM
1874 12:51:17.439999 2. 00000000000a0000-00000000000fffff: RESERVED
1875 12:51:17.443673 3. 0000000000100000-00000000769eefff: RAM
1876 12:51:17.450389 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1877 12:51:17.456827 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1878 12:51:17.459965 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1879 12:51:17.466943 7. 0000000077000000-000000007fbfffff: RESERVED
1880 12:51:17.470655 8. 00000000c0000000-00000000cfffffff: RESERVED
1881 12:51:17.477306 9. 00000000f8000000-00000000f9ffffff: RESERVED
1882 12:51:17.480317 10. 00000000fb000000-00000000fb000fff: RESERVED
1883 12:51:17.486699 11. 00000000fe000000-00000000fe00ffff: RESERVED
1884 12:51:17.490272 12. 00000000fed80000-00000000fed87fff: RESERVED
1885 12:51:17.497030 13. 00000000fed90000-00000000fed92fff: RESERVED
1886 12:51:17.499982 14. 00000000feda0000-00000000feda1fff: RESERVED
1887 12:51:17.503989 15. 00000000fedc0000-00000000feddffff: RESERVED
1888 12:51:17.510428 16. 0000000100000000-00000002803fffff: RAM
1889 12:51:17.513563 Passing 4 GPIOs to payload:
1890 12:51:17.516603 NAME | PORT | POLARITY | VALUE
1891 12:51:17.523614 lid | undefined | high | high
1892 12:51:17.526734 power | undefined | high | low
1893 12:51:17.533161 oprom | undefined | high | low
1894 12:51:17.536794 EC in RW | 0x000000e5 | high | high
1895 12:51:17.543474 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum cf7e
1896 12:51:17.546929 coreboot table: 1576 bytes.
1897 12:51:17.550095 IMD ROOT 0. 0x76fff000 0x00001000
1898 12:51:17.553387 IMD SMALL 1. 0x76ffe000 0x00001000
1899 12:51:17.560053 FSP MEMORY 2. 0x76c4e000 0x003b0000
1900 12:51:17.563289 VPD 3. 0x76c4d000 0x00000367
1901 12:51:17.567057 RO MCACHE 4. 0x76c4c000 0x00000fdc
1902 12:51:17.570428 CONSOLE 5. 0x76c2c000 0x00020000
1903 12:51:17.573433 FMAP 6. 0x76c2b000 0x00000578
1904 12:51:17.576666 TIME STAMP 7. 0x76c2a000 0x00000910
1905 12:51:17.579987 VBOOT WORK 8. 0x76c16000 0x00014000
1906 12:51:17.583110 ROMSTG STCK 9. 0x76c15000 0x00001000
1907 12:51:17.590501 AFTER CAR 10. 0x76c0a000 0x0000b000
1908 12:51:17.593492 RAMSTAGE 11. 0x76b97000 0x00073000
1909 12:51:17.596536 REFCODE 12. 0x76b42000 0x00055000
1910 12:51:17.599965 SMM BACKUP 13. 0x76b32000 0x00010000
1911 12:51:17.603561 4f444749 14. 0x76b30000 0x00002000
1912 12:51:17.606982 EXT VBT15. 0x76b2d000 0x0000219f
1913 12:51:17.610375 COREBOOT 16. 0x76b25000 0x00008000
1914 12:51:17.613377 ACPI 17. 0x76b01000 0x00024000
1915 12:51:17.616540 ACPI GNVS 18. 0x76b00000 0x00001000
1916 12:51:17.620046 RAMOOPS 19. 0x76a00000 0x00100000
1917 12:51:17.626451 TPM2 TCGLOG20. 0x769f0000 0x00010000
1918 12:51:17.630184 SMBIOS 21. 0x769ef000 0x00000800
1919 12:51:17.630669 IMD small region:
1920 12:51:17.633111 IMD ROOT 0. 0x76ffec00 0x00000400
1921 12:51:17.640073 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1922 12:51:17.643508 POWER STATE 2. 0x76ffeb80 0x00000044
1923 12:51:17.646585 ROMSTAGE 3. 0x76ffeb60 0x00000004
1924 12:51:17.650327 MEM INFO 4. 0x76ffe980 0x000001e0
1925 12:51:17.656265 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1926 12:51:17.659640 MTRR: Physical address space:
1927 12:51:17.666590 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1928 12:51:17.673111 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1929 12:51:17.676144 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1930 12:51:17.682974 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1931 12:51:17.689840 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1932 12:51:17.696609 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1933 12:51:17.702824 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1934 12:51:17.706666 MTRR: Fixed MSR 0x250 0x0606060606060606
1935 12:51:17.713118 MTRR: Fixed MSR 0x258 0x0606060606060606
1936 12:51:17.716506 MTRR: Fixed MSR 0x259 0x0000000000000000
1937 12:51:17.719887 MTRR: Fixed MSR 0x268 0x0606060606060606
1938 12:51:17.722945 MTRR: Fixed MSR 0x269 0x0606060606060606
1939 12:51:17.726348 MTRR: Fixed MSR 0x26a 0x0606060606060606
1940 12:51:17.733120 MTRR: Fixed MSR 0x26b 0x0606060606060606
1941 12:51:17.736350 MTRR: Fixed MSR 0x26c 0x0606060606060606
1942 12:51:17.739467 MTRR: Fixed MSR 0x26d 0x0606060606060606
1943 12:51:17.742894 MTRR: Fixed MSR 0x26e 0x0606060606060606
1944 12:51:17.749480 MTRR: Fixed MSR 0x26f 0x0606060606060606
1945 12:51:17.753052 call enable_fixed_mtrr()
1946 12:51:17.756067 CPU physical address size: 39 bits
1947 12:51:17.759368 MTRR: default type WB/UC MTRR counts: 6/6.
1948 12:51:17.762697 MTRR: UC selected as default type.
1949 12:51:17.769674 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1950 12:51:17.776381 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1951 12:51:17.782694 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1952 12:51:17.789488 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1953 12:51:17.795911 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1954 12:51:17.799430 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1955 12:51:17.803772
1956 12:51:17.804189 MTRR check
1957 12:51:17.807143 Fixed MTRRs : Enabled
1958 12:51:17.807853 Variable MTRRs: Enabled
1959 12:51:17.808394
1960 12:51:17.813824 MTRR: Fixed MSR 0x250 0x0606060606060606
1961 12:51:17.817185 MTRR: Fixed MSR 0x258 0x0606060606060606
1962 12:51:17.820644 MTRR: Fixed MSR 0x259 0x0000000000000000
1963 12:51:17.823761 MTRR: Fixed MSR 0x268 0x0606060606060606
1964 12:51:17.830835 MTRR: Fixed MSR 0x269 0x0606060606060606
1965 12:51:17.833666 MTRR: Fixed MSR 0x26a 0x0606060606060606
1966 12:51:17.837244 MTRR: Fixed MSR 0x26b 0x0606060606060606
1967 12:51:17.840527 MTRR: Fixed MSR 0x26c 0x0606060606060606
1968 12:51:17.846994 MTRR: Fixed MSR 0x26d 0x0606060606060606
1969 12:51:17.850229 MTRR: Fixed MSR 0x26e 0x0606060606060606
1970 12:51:17.853783 MTRR: Fixed MSR 0x26f 0x0606060606060606
1971 12:51:17.860455 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1972 12:51:17.864122 call enable_fixed_mtrr()
1973 12:51:17.867277 Checking cr50 for pending updates
1974 12:51:17.870803 CPU physical address size: 39 bits
1975 12:51:17.874418 MTRR: Fixed MSR 0x250 0x0606060606060606
1976 12:51:17.877975 MTRR: Fixed MSR 0x250 0x0606060606060606
1977 12:51:17.880886 MTRR: Fixed MSR 0x258 0x0606060606060606
1978 12:51:17.887421 MTRR: Fixed MSR 0x259 0x0000000000000000
1979 12:51:17.890696 MTRR: Fixed MSR 0x268 0x0606060606060606
1980 12:51:17.894515 MTRR: Fixed MSR 0x269 0x0606060606060606
1981 12:51:17.897687 MTRR: Fixed MSR 0x26a 0x0606060606060606
1982 12:51:17.903869 MTRR: Fixed MSR 0x26b 0x0606060606060606
1983 12:51:17.907436 MTRR: Fixed MSR 0x26c 0x0606060606060606
1984 12:51:17.910726 MTRR: Fixed MSR 0x26d 0x0606060606060606
1985 12:51:17.914018 MTRR: Fixed MSR 0x26e 0x0606060606060606
1986 12:51:17.920729 MTRR: Fixed MSR 0x26f 0x0606060606060606
1987 12:51:17.923768 MTRR: Fixed MSR 0x258 0x0606060606060606
1988 12:51:17.927292 call enable_fixed_mtrr()
1989 12:51:17.930804 MTRR: Fixed MSR 0x259 0x0000000000000000
1990 12:51:17.933968 MTRR: Fixed MSR 0x268 0x0606060606060606
1991 12:51:17.940799 MTRR: Fixed MSR 0x269 0x0606060606060606
1992 12:51:17.944161 MTRR: Fixed MSR 0x26a 0x0606060606060606
1993 12:51:17.947240 MTRR: Fixed MSR 0x26b 0x0606060606060606
1994 12:51:17.950544 MTRR: Fixed MSR 0x26c 0x0606060606060606
1995 12:51:17.957049 MTRR: Fixed MSR 0x26d 0x0606060606060606
1996 12:51:17.960166 MTRR: Fixed MSR 0x26e 0x0606060606060606
1997 12:51:17.963819 MTRR: Fixed MSR 0x26f 0x0606060606060606
1998 12:51:17.966834 CPU physical address size: 39 bits
1999 12:51:17.971290 call enable_fixed_mtrr()
2000 12:51:17.974634 MTRR: Fixed MSR 0x250 0x0606060606060606
2001 12:51:17.981578 MTRR: Fixed MSR 0x250 0x0606060606060606
2002 12:51:17.984547 MTRR: Fixed MSR 0x258 0x0606060606060606
2003 12:51:17.988067 MTRR: Fixed MSR 0x259 0x0000000000000000
2004 12:51:17.991326 MTRR: Fixed MSR 0x268 0x0606060606060606
2005 12:51:17.997835 MTRR: Fixed MSR 0x269 0x0606060606060606
2006 12:51:18.001608 MTRR: Fixed MSR 0x26a 0x0606060606060606
2007 12:51:18.004893 MTRR: Fixed MSR 0x26b 0x0606060606060606
2008 12:51:18.007707 MTRR: Fixed MSR 0x26c 0x0606060606060606
2009 12:51:18.014823 MTRR: Fixed MSR 0x26d 0x0606060606060606
2010 12:51:18.017611 MTRR: Fixed MSR 0x26e 0x0606060606060606
2011 12:51:18.021316 MTRR: Fixed MSR 0x26f 0x0606060606060606
2012 12:51:18.028036 MTRR: Fixed MSR 0x258 0x0606060606060606
2013 12:51:18.028351 call enable_fixed_mtrr()
2014 12:51:18.034451 MTRR: Fixed MSR 0x259 0x0000000000000000
2015 12:51:18.037636 MTRR: Fixed MSR 0x268 0x0606060606060606
2016 12:51:18.041250 MTRR: Fixed MSR 0x269 0x0606060606060606
2017 12:51:18.044208 MTRR: Fixed MSR 0x26a 0x0606060606060606
2018 12:51:18.051334 MTRR: Fixed MSR 0x26b 0x0606060606060606
2019 12:51:18.054231 MTRR: Fixed MSR 0x26c 0x0606060606060606
2020 12:51:18.057567 MTRR: Fixed MSR 0x26d 0x0606060606060606
2021 12:51:18.061220 MTRR: Fixed MSR 0x26e 0x0606060606060606
2022 12:51:18.064368 MTRR: Fixed MSR 0x26f 0x0606060606060606
2023 12:51:18.071123 CPU physical address size: 39 bits
2024 12:51:18.074247 call enable_fixed_mtrr()
2025 12:51:18.079281 Reading cr50 TPM mode
2026 12:51:18.079713 CPU physical address size: 39 bits
2027 12:51:18.082320 MTRR: Fixed MSR 0x250 0x0606060606060606
2028 12:51:18.089100 MTRR: Fixed MSR 0x250 0x0606060606060606
2029 12:51:18.092166 MTRR: Fixed MSR 0x258 0x0606060606060606
2030 12:51:18.095634 MTRR: Fixed MSR 0x259 0x0000000000000000
2031 12:51:18.099349 MTRR: Fixed MSR 0x268 0x0606060606060606
2032 12:51:18.105890 MTRR: Fixed MSR 0x269 0x0606060606060606
2033 12:51:18.109164 MTRR: Fixed MSR 0x26a 0x0606060606060606
2034 12:51:18.112026 MTRR: Fixed MSR 0x26b 0x0606060606060606
2035 12:51:18.115761 MTRR: Fixed MSR 0x26c 0x0606060606060606
2036 12:51:18.121880 MTRR: Fixed MSR 0x26d 0x0606060606060606
2037 12:51:18.125592 MTRR: Fixed MSR 0x26e 0x0606060606060606
2038 12:51:18.128569 MTRR: Fixed MSR 0x26f 0x0606060606060606
2039 12:51:18.135248 MTRR: Fixed MSR 0x258 0x0606060606060606
2040 12:51:18.135585 call enable_fixed_mtrr()
2041 12:51:18.142454 MTRR: Fixed MSR 0x259 0x0000000000000000
2042 12:51:18.145793 MTRR: Fixed MSR 0x268 0x0606060606060606
2043 12:51:18.149064 MTRR: Fixed MSR 0x269 0x0606060606060606
2044 12:51:18.152255 MTRR: Fixed MSR 0x26a 0x0606060606060606
2045 12:51:18.155482 MTRR: Fixed MSR 0x26b 0x0606060606060606
2046 12:51:18.161933 MTRR: Fixed MSR 0x26c 0x0606060606060606
2047 12:51:18.165345 MTRR: Fixed MSR 0x26d 0x0606060606060606
2048 12:51:18.168448 MTRR: Fixed MSR 0x26e 0x0606060606060606
2049 12:51:18.171860 MTRR: Fixed MSR 0x26f 0x0606060606060606
2050 12:51:18.176091 CPU physical address size: 39 bits
2051 12:51:18.182830 call enable_fixed_mtrr()
2052 12:51:18.186390 CPU physical address size: 39 bits
2053 12:51:18.189378 CPU physical address size: 39 bits
2054 12:51:18.196095 BS: BS_PAYLOAD_LOAD entry times (exec / console): 214 / 6 ms
2055 12:51:18.202631 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2056 12:51:18.206422 Checking segment from ROM address 0xffc02b38
2057 12:51:18.212945 Checking segment from ROM address 0xffc02b54
2058 12:51:18.216376 Loading segment from ROM address 0xffc02b38
2059 12:51:18.219460 code (compression=0)
2060 12:51:18.226128 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2061 12:51:18.236021 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2062 12:51:18.236325 it's not compressed!
2063 12:51:18.376256 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2064 12:51:18.383146 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2065 12:51:18.389566 Loading segment from ROM address 0xffc02b54
2066 12:51:18.389996 Entry Point 0x30000000
2067 12:51:18.393077 Loaded segments
2068 12:51:18.399764 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2069 12:51:18.442259 Finalizing chipset.
2070 12:51:18.445901 Finalizing SMM.
2071 12:51:18.446214 APMC done.
2072 12:51:18.452462 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2073 12:51:18.455850 mp_park_aps done after 0 msecs.
2074 12:51:18.458819 Jumping to boot code at 0x30000000(0x76b25000)
2075 12:51:18.468680 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2076 12:51:18.468985
2077 12:51:18.469221
2078 12:51:18.469442
2079 12:51:18.472403 Starting depthcharge on Voema...
2080 12:51:18.472706
2081 12:51:18.473504 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2082 12:51:18.473837 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2083 12:51:18.474125 Setting prompt string to ['volteer:']
2084 12:51:18.474418 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2085 12:51:18.481962 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2086 12:51:18.482266
2087 12:51:18.489133 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2088 12:51:18.489439
2089 12:51:18.495448 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2090 12:51:18.495755
2091 12:51:18.498451 Failed to find eMMC card reader
2092 12:51:18.498751
2093 12:51:18.498987 Wipe memory regions:
2094 12:51:18.499208
2095 12:51:18.505379 [0x00000000001000, 0x000000000a0000)
2096 12:51:18.505710
2097 12:51:18.508272 [0x00000000100000, 0x00000030000000)
2098 12:51:18.534256
2099 12:51:18.537893 [0x00000032662db0, 0x000000769ef000)
2100 12:51:18.573498
2101 12:51:18.576979 [0x00000100000000, 0x00000280400000)
2102 12:51:18.778573
2103 12:51:18.782139 ec_init: CrosEC protocol v3 supported (256, 256)
2104 12:51:18.782269
2105 12:51:18.788621 update_port_state: port C0 state: usb enable 1 mux conn 0
2106 12:51:18.788803
2107 12:51:18.798638 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2108 12:51:18.798775
2109 12:51:18.805369 pmc_check_ipc_sts: STS_BUSY done after 1512 us
2110 12:51:18.805505
2111 12:51:18.808752 send_conn_disc_msg: pmc_send_cmd succeeded
2112 12:51:19.240645
2113 12:51:19.240939 R8152: Initializing
2114 12:51:19.241132
2115 12:51:19.243995 Version 6 (ocp_data = 5c30)
2116 12:51:19.244232
2117 12:51:19.247354 R8152: Done initializing
2118 12:51:19.247618
2119 12:51:19.250674 Adding net device
2120 12:51:19.553936
2121 12:51:19.556549 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2122 12:51:19.557024
2123 12:51:19.557387
2124 12:51:19.557730
2125 12:51:19.560622 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2127 12:51:19.662215 volteer: tftpboot 192.168.201.1 11602095/tftp-deploy-n3qavt_a/kernel/bzImage 11602095/tftp-deploy-n3qavt_a/kernel/cmdline 11602095/tftp-deploy-n3qavt_a/ramdisk/ramdisk.cpio.gz
2128 12:51:19.662776 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2129 12:51:19.663165 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2130 12:51:19.668089 tftpboot 192.168.201.1 11602095/tftp-deploy-n3qavt_a/kernel/bzImploy-n3qavt_a/kernel/cmdline 11602095/tftp-deploy-n3qavt_a/ramdisk/ramdisk.cpio.gz
2131 12:51:19.668495
2132 12:51:19.668894 Waiting for link
2133 12:51:19.872366
2134 12:51:19.872948 done.
2135 12:51:19.873365
2136 12:51:19.873918 MAC: 00:24:32:30:7c:e4
2137 12:51:19.874445
2138 12:51:19.875238 Sending DHCP discover... done.
2139 12:51:19.875740
2140 12:51:19.878465 Waiting for reply... done.
2141 12:51:19.879003
2142 12:51:19.882052 Sending DHCP request... done.
2143 12:51:19.882614
2144 12:51:19.885026 Waiting for reply... done.
2145 12:51:19.885616
2146 12:51:19.888857 My ip is 192.168.201.23
2147 12:51:19.889447
2148 12:51:19.891883 The DHCP server ip is 192.168.201.1
2149 12:51:19.892433
2150 12:51:19.895488 TFTP server IP predefined by user: 192.168.201.1
2151 12:51:19.895994
2152 12:51:19.902104 Bootfile predefined by user: 11602095/tftp-deploy-n3qavt_a/kernel/bzImage
2153 12:51:19.902529
2154 12:51:19.904972 Sending tftp read request... done.
2155 12:51:19.905390
2156 12:51:19.915362 Waiting for the transfer...
2157 12:51:19.915914
2158 12:51:20.471134 00000000 ################################################################
2159 12:51:20.471267
2160 12:51:21.026570 00080000 ################################################################
2161 12:51:21.026729
2162 12:51:21.578402 00100000 ################################################################
2163 12:51:21.578537
2164 12:51:22.144381 00180000 ################################################################
2165 12:51:22.144538
2166 12:51:22.715417 00200000 ################################################################
2167 12:51:22.715589
2168 12:51:23.245042 00280000 ################################################################
2169 12:51:23.245177
2170 12:51:23.786162 00300000 ################################################################
2171 12:51:23.786308
2172 12:51:24.337140 00380000 ################################################################
2173 12:51:24.337278
2174 12:51:24.890925 00400000 ################################################################
2175 12:51:24.891070
2176 12:51:25.435295 00480000 ################################################################
2177 12:51:25.435484
2178 12:51:25.985686 00500000 ################################################################
2179 12:51:25.985836
2180 12:51:26.531894 00580000 ################################################################
2181 12:51:26.532031
2182 12:51:27.067752 00600000 ################################################################
2183 12:51:27.067899
2184 12:51:27.596788 00680000 ################################################################
2185 12:51:27.596927
2186 12:51:28.125618 00700000 ################################################################
2187 12:51:28.125788
2188 12:51:28.667730 00780000 ################################################################
2189 12:51:28.667879
2190 12:51:29.198190 00800000 ################################################################
2191 12:51:29.198370
2192 12:51:29.744753 00880000 ################################################################
2193 12:51:29.744899
2194 12:51:30.301513 00900000 ################################################################
2195 12:51:30.301661
2196 12:51:30.841563 00980000 ################################################################
2197 12:51:30.841709
2198 12:51:31.386053 00a00000 ################################################################
2199 12:51:31.386185
2200 12:51:31.861876 00a80000 ######################################################### done.
2201 12:51:31.862017
2202 12:51:31.865084 The bootfile was 11473408 bytes long.
2203 12:51:31.865168
2204 12:51:31.868308 Sending tftp read request... done.
2205 12:51:31.868397
2206 12:51:31.871851 Waiting for the transfer...
2207 12:51:31.871933
2208 12:51:32.394212 00000000 ################################################################
2209 12:51:32.394347
2210 12:51:32.916862 00080000 ################################################################
2211 12:51:32.917006
2212 12:51:33.448525 00100000 ################################################################
2213 12:51:33.448658
2214 12:51:33.980236 00180000 ################################################################
2215 12:51:33.980377
2216 12:51:34.498469 00200000 ################################################################
2217 12:51:34.498602
2218 12:51:35.025465 00280000 ################################################################
2219 12:51:35.025602
2220 12:51:35.565574 00300000 ################################################################
2221 12:51:35.565711
2222 12:51:36.103179 00380000 ################################################################
2223 12:51:36.103354
2224 12:51:36.623128 00400000 ################################################################
2225 12:51:36.623306
2226 12:51:37.155207 00480000 ################################################################
2227 12:51:37.155372
2228 12:51:37.694972 00500000 ################################################################
2229 12:51:37.695131
2230 12:51:38.235211 00580000 ################################################################
2231 12:51:38.235357
2232 12:51:38.776042 00600000 ################################################################
2233 12:51:38.776193
2234 12:51:39.310632 00680000 ################################################################
2235 12:51:39.310792
2236 12:51:39.828359 00700000 ################################################################
2237 12:51:39.828521
2238 12:51:40.353033 00780000 ################################################################
2239 12:51:40.353172
2240 12:51:40.881271 00800000 ################################################################
2241 12:51:40.881419
2242 12:51:41.411909 00880000 ################################################################
2243 12:51:41.412049
2244 12:51:41.934017 00900000 ################################################################
2245 12:51:41.934160
2246 12:51:42.459513 00980000 ################################################################
2247 12:51:42.459660
2248 12:51:42.995727 00a00000 ################################################################
2249 12:51:42.995877
2250 12:51:43.523653 00a80000 ################################################################
2251 12:51:43.523798
2252 12:51:44.061429 00b00000 ################################################################
2253 12:51:44.061572
2254 12:51:44.598721 00b80000 ################################################################
2255 12:51:44.598858
2256 12:51:45.141862 00c00000 ################################################################
2257 12:51:45.142008
2258 12:51:45.696057 00c80000 ################################################################
2259 12:51:45.696197
2260 12:51:46.252677 00d00000 ################################################################
2261 12:51:46.252820
2262 12:51:46.806814 00d80000 ################################################################
2263 12:51:46.806957
2264 12:51:47.346689 00e00000 ################################################################
2265 12:51:47.346820
2266 12:51:47.896547 00e80000 ################################################################
2267 12:51:47.896688
2268 12:51:48.440316 00f00000 ################################################################
2269 12:51:48.440462
2270 12:51:48.992203 00f80000 ################################################################
2271 12:51:48.992352
2272 12:51:49.526682 01000000 ################################################################
2273 12:51:49.526836
2274 12:51:50.053520 01080000 ################################################################
2275 12:51:50.053679
2276 12:51:50.583104 01100000 ################################################################
2277 12:51:50.583276
2278 12:51:51.114811 01180000 ################################################################
2279 12:51:51.114955
2280 12:51:51.651036 01200000 ################################################################
2281 12:51:51.651201
2282 12:51:52.202070 01280000 ################################################################
2283 12:51:52.202267
2284 12:51:52.739480 01300000 ################################################################
2285 12:51:52.739622
2286 12:51:53.259704 01380000 ################################################################
2287 12:51:53.259857
2288 12:51:53.799246 01400000 ################################################################
2289 12:51:53.799397
2290 12:51:54.327116 01480000 ################################################################
2291 12:51:54.327258
2292 12:51:54.843921 01500000 ################################################################
2293 12:51:54.844057
2294 12:51:55.385646 01580000 ################################################################
2295 12:51:55.385780
2296 12:51:55.935248 01600000 ################################################################
2297 12:51:55.935393
2298 12:51:56.479137 01680000 ################################################################
2299 12:51:56.479280
2300 12:51:57.013196 01700000 ################################################################
2301 12:51:57.013334
2302 12:51:57.535830 01780000 ################################################################
2303 12:51:57.535971
2304 12:51:58.071546 01800000 ################################################################
2305 12:51:58.071688
2306 12:51:58.618103 01880000 ################################################################
2307 12:51:58.618245
2308 12:51:59.157203 01900000 ################################################################
2309 12:51:59.157346
2310 12:51:59.720824 01980000 ################################################################
2311 12:51:59.721044
2312 12:52:00.282446 01a00000 ################################################################
2313 12:52:00.282589
2314 12:52:00.808881 01a80000 ################################################################
2315 12:52:00.809057
2316 12:52:01.345361 01b00000 ################################################################
2317 12:52:01.345505
2318 12:52:01.891664 01b80000 ################################################################
2319 12:52:01.891810
2320 12:52:02.435887 01c00000 ################################################################
2321 12:52:02.436035
2322 12:52:02.990507 01c80000 ################################################################
2323 12:52:02.990655
2324 12:52:03.535170 01d00000 ################################################################
2325 12:52:03.535320
2326 12:52:04.081743 01d80000 ################################################################
2327 12:52:04.081919
2328 12:52:04.613067 01e00000 ################################################################
2329 12:52:04.613213
2330 12:52:05.165870 01e80000 ################################################################
2331 12:52:05.166020
2332 12:52:05.710464 01f00000 ################################################################
2333 12:52:05.710614
2334 12:52:06.238455 01f80000 ################################################################
2335 12:52:06.238604
2336 12:52:06.770594 02000000 ################################################################
2337 12:52:06.770740
2338 12:52:07.316819 02080000 ################################################################
2339 12:52:07.316955
2340 12:52:07.869157 02100000 ################################################################
2341 12:52:07.869311
2342 12:52:08.440626 02180000 ################################################################
2343 12:52:08.440777
2344 12:52:09.016683 02200000 ################################################################
2345 12:52:09.016835
2346 12:52:09.333908 02280000 ###################################### done.
2347 12:52:09.334055
2348 12:52:09.336869 Sending tftp read request... done.
2349 12:52:09.336953
2350 12:52:09.340241 Waiting for the transfer...
2351 12:52:09.340324
2352 12:52:09.340388 00000000 # done.
2353 12:52:09.340449
2354 12:52:09.350386 Command line loaded dynamically from TFTP file: 11602095/tftp-deploy-n3qavt_a/kernel/cmdline
2355 12:52:09.350471
2356 12:52:09.366734 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2357 12:52:09.372700
2358 12:52:09.375886 Shutting down all USB controllers.
2359 12:52:09.375968
2360 12:52:09.376033 Removing current net device
2361 12:52:09.376093
2362 12:52:09.379364 Finalizing coreboot
2363 12:52:09.379453
2364 12:52:09.385867 Exiting depthcharge with code 4 at timestamp: 59562433
2365 12:52:09.385949
2366 12:52:09.386013
2367 12:52:09.386073 Starting kernel ...
2368 12:52:09.386130
2369 12:52:09.386185
2370 12:52:09.386580 end: 2.2.4 bootloader-commands (duration 00:00:51) [common]
2371 12:52:09.386673 start: 2.2.5 auto-login-action (timeout 00:03:54) [common]
2372 12:52:09.386747 Setting prompt string to ['Linux version [0-9]']
2373 12:52:09.386813 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2374 12:52:09.386881 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2376 12:56:03.387833 end: 2.2.5 auto-login-action (duration 00:03:54) [common]
2378 12:56:03.388909 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 234 seconds'
2380 12:56:03.389793 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2383 12:56:03.391222 end: 2 depthcharge-action (duration 00:05:00) [common]
2385 12:56:03.392499 Cleaning after the job
2386 12:56:03.392979 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11602095/tftp-deploy-n3qavt_a/ramdisk
2387 12:56:03.411086 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11602095/tftp-deploy-n3qavt_a/kernel
2388 12:56:03.412913 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11602095/tftp-deploy-n3qavt_a/modules
2389 12:56:03.413554 start: 4.1 power-off (timeout 00:00:30) [common]
2390 12:56:03.413821 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-3' '--port=1' '--command=off'
2391 12:56:03.498259 >> Command sent successfully.
2392 12:56:03.510843 Returned 0 in 0 seconds
2393 12:56:03.612214 end: 4.1 power-off (duration 00:00:00) [common]
2395 12:56:03.613841 start: 4.2 read-feedback (timeout 00:10:00) [common]
2396 12:56:03.615290 Listened to connection for namespace 'common' for up to 1s
2397 12:56:04.615655 Finalising connection for namespace 'common'
2398 12:56:04.616357 Disconnecting from shell: Finalise
2399 12:56:04.616777
2400 12:56:04.717779 end: 4.2 read-feedback (duration 00:00:01) [common]
2401 12:56:04.718378 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11602095
2402 12:56:04.851136 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11602095
2403 12:56:04.851318 JobError: Your job cannot terminate cleanly.