Boot log: asus-C436FA-Flip-hatch

    1 12:58:04.828478  lava-dispatcher, installed at version: 2023.06
    2 12:58:04.828698  start: 0 validate
    3 12:58:04.828832  Start time: 2023-09-23 12:58:04.828824+00:00 (UTC)
    4 12:58:04.828962  Using caching service: 'http://localhost/cache/?uri=%s'
    5 12:58:04.829108  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
    6 12:58:05.112084  Using caching service: 'http://localhost/cache/?uri=%s'
    7 12:58:05.112276  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.292-cip102-406-g9efaa60a8cb4%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 12:58:05.377222  Using caching service: 'http://localhost/cache/?uri=%s'
    9 12:58:05.377400  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 12:58:05.642304  Using caching service: 'http://localhost/cache/?uri=%s'
   11 12:58:05.642471  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.292-cip102-406-g9efaa60a8cb4%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 12:58:05.901616  validate duration: 1.07
   14 12:58:05.901890  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 12:58:05.901987  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 12:58:05.902073  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 12:58:05.902203  Not decompressing ramdisk as can be used compressed.
   18 12:58:05.902288  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/initrd.cpio.gz
   19 12:58:05.902353  saving as /var/lib/lava/dispatcher/tmp/11602089/tftp-deploy-8464ef71/ramdisk/initrd.cpio.gz
   20 12:58:05.902420  total size: 5432480 (5 MB)
   21 12:58:05.903532  progress   0 % (0 MB)
   22 12:58:05.905278  progress   5 % (0 MB)
   23 12:58:05.906709  progress  10 % (0 MB)
   24 12:58:05.908177  progress  15 % (0 MB)
   25 12:58:05.909814  progress  20 % (1 MB)
   26 12:58:05.911266  progress  25 % (1 MB)
   27 12:58:05.912726  progress  30 % (1 MB)
   28 12:58:05.914291  progress  35 % (1 MB)
   29 12:58:05.915815  progress  40 % (2 MB)
   30 12:58:05.917259  progress  45 % (2 MB)
   31 12:58:05.918671  progress  50 % (2 MB)
   32 12:58:05.920274  progress  55 % (2 MB)
   33 12:58:05.921677  progress  60 % (3 MB)
   34 12:58:05.923170  progress  65 % (3 MB)
   35 12:58:05.924838  progress  70 % (3 MB)
   36 12:58:05.926403  progress  75 % (3 MB)
   37 12:58:05.927842  progress  80 % (4 MB)
   38 12:58:05.929231  progress  85 % (4 MB)
   39 12:58:05.930781  progress  90 % (4 MB)
   40 12:58:05.932231  progress  95 % (4 MB)
   41 12:58:05.933660  progress 100 % (5 MB)
   42 12:58:05.933870  5 MB downloaded in 0.03 s (164.72 MB/s)
   43 12:58:05.934020  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 12:58:05.934258  end: 1.1 download-retry (duration 00:00:00) [common]
   46 12:58:05.934343  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 12:58:05.934432  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 12:58:05.934567  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.292-cip102-406-g9efaa60a8cb4/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 12:58:05.934652  saving as /var/lib/lava/dispatcher/tmp/11602089/tftp-deploy-8464ef71/kernel/bzImage
   50 12:58:05.934713  total size: 11473408 (10 MB)
   51 12:58:05.934774  No compression specified
   52 12:58:05.935902  progress   0 % (0 MB)
   53 12:58:05.938948  progress   5 % (0 MB)
   54 12:58:05.942115  progress  10 % (1 MB)
   55 12:58:05.945298  progress  15 % (1 MB)
   56 12:58:05.948473  progress  20 % (2 MB)
   57 12:58:05.951419  progress  25 % (2 MB)
   58 12:58:05.954576  progress  30 % (3 MB)
   59 12:58:05.957548  progress  35 % (3 MB)
   60 12:58:05.960689  progress  40 % (4 MB)
   61 12:58:05.963613  progress  45 % (4 MB)
   62 12:58:05.966759  progress  50 % (5 MB)
   63 12:58:05.969738  progress  55 % (6 MB)
   64 12:58:05.972896  progress  60 % (6 MB)
   65 12:58:05.975830  progress  65 % (7 MB)
   66 12:58:05.978873  progress  70 % (7 MB)
   67 12:58:05.981744  progress  75 % (8 MB)
   68 12:58:05.984843  progress  80 % (8 MB)
   69 12:58:05.987775  progress  85 % (9 MB)
   70 12:58:05.990818  progress  90 % (9 MB)
   71 12:58:05.993739  progress  95 % (10 MB)
   72 12:58:05.997058  progress 100 % (10 MB)
   73 12:58:05.997184  10 MB downloaded in 0.06 s (175.16 MB/s)
   74 12:58:05.997330  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 12:58:05.997558  end: 1.2 download-retry (duration 00:00:00) [common]
   77 12:58:05.997644  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 12:58:05.997728  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 12:58:05.997868  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/full.rootfs.tar.xz
   80 12:58:05.997938  saving as /var/lib/lava/dispatcher/tmp/11602089/tftp-deploy-8464ef71/nfsrootfs/full.rootfs.tar
   81 12:58:05.997999  total size: 207157356 (197 MB)
   82 12:58:05.998061  Using unxz to decompress xz
   83 12:58:06.002297  progress   0 % (0 MB)
   84 12:58:06.561079  progress   5 % (9 MB)
   85 12:58:07.091338  progress  10 % (19 MB)
   86 12:58:07.716868  progress  15 % (29 MB)
   87 12:58:08.082339  progress  20 % (39 MB)
   88 12:58:08.445937  progress  25 % (49 MB)
   89 12:58:09.091409  progress  30 % (59 MB)
   90 12:58:09.646139  progress  35 % (69 MB)
   91 12:58:10.260042  progress  40 % (79 MB)
   92 12:58:10.849979  progress  45 % (88 MB)
   93 12:58:11.454954  progress  50 % (98 MB)
   94 12:58:12.098186  progress  55 % (108 MB)
   95 12:58:12.800493  progress  60 % (118 MB)
   96 12:58:12.938702  progress  65 % (128 MB)
   97 12:58:13.077609  progress  70 % (138 MB)
   98 12:58:13.170981  progress  75 % (148 MB)
   99 12:58:13.250037  progress  80 % (158 MB)
  100 12:58:13.332946  progress  85 % (167 MB)
  101 12:58:13.435958  progress  90 % (177 MB)
  102 12:58:13.715512  progress  95 % (187 MB)
  103 12:58:14.347432  progress 100 % (197 MB)
  104 12:58:14.353778  197 MB downloaded in 8.36 s (23.64 MB/s)
  105 12:58:14.354040  end: 1.3.1 http-download (duration 00:00:08) [common]
  107 12:58:14.354445  end: 1.3 download-retry (duration 00:00:08) [common]
  108 12:58:14.354552  start: 1.4 download-retry (timeout 00:09:52) [common]
  109 12:58:14.354658  start: 1.4.1 http-download (timeout 00:09:52) [common]
  110 12:58:14.354829  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.292-cip102-406-g9efaa60a8cb4/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 12:58:14.354909  saving as /var/lib/lava/dispatcher/tmp/11602089/tftp-deploy-8464ef71/modules/modules.tar
  112 12:58:14.354992  total size: 484692 (0 MB)
  113 12:58:14.355078  Using unxz to decompress xz
  114 12:58:14.359892  progress   6 % (0 MB)
  115 12:58:14.360302  progress  13 % (0 MB)
  116 12:58:14.360548  progress  20 % (0 MB)
  117 12:58:14.362159  progress  27 % (0 MB)
  118 12:58:14.364244  progress  33 % (0 MB)
  119 12:58:14.366069  progress  40 % (0 MB)
  120 12:58:14.368136  progress  47 % (0 MB)
  121 12:58:14.370098  progress  54 % (0 MB)
  122 12:58:14.372147  progress  60 % (0 MB)
  123 12:58:14.374538  progress  67 % (0 MB)
  124 12:58:14.376597  progress  74 % (0 MB)
  125 12:58:14.378682  progress  81 % (0 MB)
  126 12:58:14.380963  progress  87 % (0 MB)
  127 12:58:14.382659  progress  94 % (0 MB)
  128 12:58:14.384869  progress 100 % (0 MB)
  129 12:58:14.391044  0 MB downloaded in 0.04 s (12.82 MB/s)
  130 12:58:14.391273  end: 1.4.1 http-download (duration 00:00:00) [common]
  132 12:58:14.391529  end: 1.4 download-retry (duration 00:00:00) [common]
  133 12:58:14.391620  start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
  134 12:58:14.391755  start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
  135 12:58:18.031951  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11602089/extract-nfsrootfs-a6eq8f53
  136 12:58:18.032169  end: 1.5.1 extract-nfsrootfs (duration 00:00:04) [common]
  137 12:58:18.032315  start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
  138 12:58:18.032545  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11602089/lava-overlay-37uakt5u
  139 12:58:18.032737  makedir: /var/lib/lava/dispatcher/tmp/11602089/lava-overlay-37uakt5u/lava-11602089/bin
  140 12:58:18.032886  makedir: /var/lib/lava/dispatcher/tmp/11602089/lava-overlay-37uakt5u/lava-11602089/tests
  141 12:58:18.033031  makedir: /var/lib/lava/dispatcher/tmp/11602089/lava-overlay-37uakt5u/lava-11602089/results
  142 12:58:18.033181  Creating /var/lib/lava/dispatcher/tmp/11602089/lava-overlay-37uakt5u/lava-11602089/bin/lava-add-keys
  143 12:58:18.033395  Creating /var/lib/lava/dispatcher/tmp/11602089/lava-overlay-37uakt5u/lava-11602089/bin/lava-add-sources
  144 12:58:18.033594  Creating /var/lib/lava/dispatcher/tmp/11602089/lava-overlay-37uakt5u/lava-11602089/bin/lava-background-process-start
  145 12:58:18.033770  Creating /var/lib/lava/dispatcher/tmp/11602089/lava-overlay-37uakt5u/lava-11602089/bin/lava-background-process-stop
  146 12:58:18.033903  Creating /var/lib/lava/dispatcher/tmp/11602089/lava-overlay-37uakt5u/lava-11602089/bin/lava-common-functions
  147 12:58:18.034032  Creating /var/lib/lava/dispatcher/tmp/11602089/lava-overlay-37uakt5u/lava-11602089/bin/lava-echo-ipv4
  148 12:58:18.034161  Creating /var/lib/lava/dispatcher/tmp/11602089/lava-overlay-37uakt5u/lava-11602089/bin/lava-install-packages
  149 12:58:18.034289  Creating /var/lib/lava/dispatcher/tmp/11602089/lava-overlay-37uakt5u/lava-11602089/bin/lava-installed-packages
  150 12:58:18.034414  Creating /var/lib/lava/dispatcher/tmp/11602089/lava-overlay-37uakt5u/lava-11602089/bin/lava-os-build
  151 12:58:18.034541  Creating /var/lib/lava/dispatcher/tmp/11602089/lava-overlay-37uakt5u/lava-11602089/bin/lava-probe-channel
  152 12:58:18.034668  Creating /var/lib/lava/dispatcher/tmp/11602089/lava-overlay-37uakt5u/lava-11602089/bin/lava-probe-ip
  153 12:58:18.034793  Creating /var/lib/lava/dispatcher/tmp/11602089/lava-overlay-37uakt5u/lava-11602089/bin/lava-target-ip
  154 12:58:18.034918  Creating /var/lib/lava/dispatcher/tmp/11602089/lava-overlay-37uakt5u/lava-11602089/bin/lava-target-mac
  155 12:58:18.035043  Creating /var/lib/lava/dispatcher/tmp/11602089/lava-overlay-37uakt5u/lava-11602089/bin/lava-target-storage
  156 12:58:18.035172  Creating /var/lib/lava/dispatcher/tmp/11602089/lava-overlay-37uakt5u/lava-11602089/bin/lava-test-case
  157 12:58:18.035300  Creating /var/lib/lava/dispatcher/tmp/11602089/lava-overlay-37uakt5u/lava-11602089/bin/lava-test-event
  158 12:58:18.035424  Creating /var/lib/lava/dispatcher/tmp/11602089/lava-overlay-37uakt5u/lava-11602089/bin/lava-test-feedback
  159 12:58:18.035551  Creating /var/lib/lava/dispatcher/tmp/11602089/lava-overlay-37uakt5u/lava-11602089/bin/lava-test-raise
  160 12:58:18.035721  Creating /var/lib/lava/dispatcher/tmp/11602089/lava-overlay-37uakt5u/lava-11602089/bin/lava-test-reference
  161 12:58:18.035849  Creating /var/lib/lava/dispatcher/tmp/11602089/lava-overlay-37uakt5u/lava-11602089/bin/lava-test-runner
  162 12:58:18.035975  Creating /var/lib/lava/dispatcher/tmp/11602089/lava-overlay-37uakt5u/lava-11602089/bin/lava-test-set
  163 12:58:18.036103  Creating /var/lib/lava/dispatcher/tmp/11602089/lava-overlay-37uakt5u/lava-11602089/bin/lava-test-shell
  164 12:58:18.036230  Updating /var/lib/lava/dispatcher/tmp/11602089/lava-overlay-37uakt5u/lava-11602089/bin/lava-add-keys (debian)
  165 12:58:18.036384  Updating /var/lib/lava/dispatcher/tmp/11602089/lava-overlay-37uakt5u/lava-11602089/bin/lava-add-sources (debian)
  166 12:58:18.036526  Updating /var/lib/lava/dispatcher/tmp/11602089/lava-overlay-37uakt5u/lava-11602089/bin/lava-install-packages (debian)
  167 12:58:18.036667  Updating /var/lib/lava/dispatcher/tmp/11602089/lava-overlay-37uakt5u/lava-11602089/bin/lava-installed-packages (debian)
  168 12:58:18.036806  Updating /var/lib/lava/dispatcher/tmp/11602089/lava-overlay-37uakt5u/lava-11602089/bin/lava-os-build (debian)
  169 12:58:18.036928  Creating /var/lib/lava/dispatcher/tmp/11602089/lava-overlay-37uakt5u/lava-11602089/environment
  170 12:58:18.037023  LAVA metadata
  171 12:58:18.037092  - LAVA_JOB_ID=11602089
  172 12:58:18.037156  - LAVA_DISPATCHER_IP=192.168.201.1
  173 12:58:18.037257  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
  174 12:58:18.037323  skipped lava-vland-overlay
  175 12:58:18.037398  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  176 12:58:18.037489  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
  177 12:58:18.037550  skipped lava-multinode-overlay
  178 12:58:18.037622  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  179 12:58:18.037699  start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
  180 12:58:18.037773  Loading test definitions
  181 12:58:18.037859  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:48) [common]
  182 12:58:18.037929  Using /lava-11602089 at stage 0
  183 12:58:18.038214  uuid=11602089_1.5.2.3.1 testdef=None
  184 12:58:18.038302  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  185 12:58:18.038386  start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
  186 12:58:18.038845  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  188 12:58:18.039062  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
  189 12:58:18.039632  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  191 12:58:18.040017  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
  192 12:58:18.040569  runner path: /var/lib/lava/dispatcher/tmp/11602089/lava-overlay-37uakt5u/lava-11602089/0/tests/0_timesync-off test_uuid 11602089_1.5.2.3.1
  193 12:58:18.040724  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  195 12:58:18.040947  start: 1.5.2.3.5 git-repo-action (timeout 00:09:48) [common]
  196 12:58:18.041019  Using /lava-11602089 at stage 0
  197 12:58:18.041118  Fetching tests from https://github.com/kernelci/test-definitions.git
  198 12:58:18.041196  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/11602089/lava-overlay-37uakt5u/lava-11602089/0/tests/1_kselftest-filesystems'
  199 12:58:21.221775  Running '/usr/bin/git checkout kernelci.org
  200 12:58:21.363851  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/11602089/lava-overlay-37uakt5u/lava-11602089/0/tests/1_kselftest-filesystems/automated/linux/kselftest/kselftest.yaml
  201 12:58:21.364611  uuid=11602089_1.5.2.3.5 testdef=None
  202 12:58:21.364775  end: 1.5.2.3.5 git-repo-action (duration 00:00:03) [common]
  204 12:58:21.365021  start: 1.5.2.3.6 test-overlay (timeout 00:09:45) [common]
  205 12:58:21.365778  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  207 12:58:21.366112  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:45) [common]
  208 12:58:21.367074  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  210 12:58:21.367306  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:45) [common]
  211 12:58:21.368317  runner path: /var/lib/lava/dispatcher/tmp/11602089/lava-overlay-37uakt5u/lava-11602089/0/tests/1_kselftest-filesystems test_uuid 11602089_1.5.2.3.5
  212 12:58:21.368409  BOARD='asus-C436FA-Flip-hatch'
  213 12:58:21.368473  BRANCH='cip-gitlab'
  214 12:58:21.368531  SKIPFILE='/dev/null'
  215 12:58:21.368590  SKIP_INSTALL='True'
  216 12:58:21.368645  TESTPROG_URL='None'
  217 12:58:21.368700  TST_CASENAME=''
  218 12:58:21.368754  TST_CMDFILES='filesystems'
  219 12:58:21.368894  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  221 12:58:21.369095  Creating lava-test-runner.conf files
  222 12:58:21.369160  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11602089/lava-overlay-37uakt5u/lava-11602089/0 for stage 0
  223 12:58:21.369252  - 0_timesync-off
  224 12:58:21.369323  - 1_kselftest-filesystems
  225 12:58:21.369421  end: 1.5.2.3 test-definition (duration 00:00:03) [common]
  226 12:58:21.369510  start: 1.5.2.4 compress-overlay (timeout 00:09:45) [common]
  227 12:58:29.151630  end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
  228 12:58:29.151826  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:37) [common]
  229 12:58:29.151977  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  230 12:58:29.152122  end: 1.5.2 lava-overlay (duration 00:00:11) [common]
  231 12:58:29.152217  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:37) [common]
  232 12:58:29.291105  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  233 12:58:29.291523  start: 1.5.4 extract-modules (timeout 00:09:37) [common]
  234 12:58:29.291723  extracting modules file /var/lib/lava/dispatcher/tmp/11602089/tftp-deploy-8464ef71/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11602089/extract-nfsrootfs-a6eq8f53
  235 12:58:29.312622  extracting modules file /var/lib/lava/dispatcher/tmp/11602089/tftp-deploy-8464ef71/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11602089/extract-overlay-ramdisk-pqrbweup/ramdisk
  236 12:58:29.333613  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  237 12:58:29.333761  start: 1.5.5 apply-overlay-tftp (timeout 00:09:37) [common]
  238 12:58:29.333866  [common] Applying overlay to NFS
  239 12:58:29.333954  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11602089/compress-overlay-kdbsjx6o/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11602089/extract-nfsrootfs-a6eq8f53
  240 12:58:30.348044  end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
  241 12:58:30.348219  start: 1.5.6 configure-preseed-file (timeout 00:09:36) [common]
  242 12:58:30.348319  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  243 12:58:30.348404  start: 1.5.7 compress-ramdisk (timeout 00:09:36) [common]
  244 12:58:30.348482  Building ramdisk /var/lib/lava/dispatcher/tmp/11602089/extract-overlay-ramdisk-pqrbweup/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11602089/extract-overlay-ramdisk-pqrbweup/ramdisk
  245 12:58:30.445332  >> 30353 blocks

  246 12:58:31.101171  rename /var/lib/lava/dispatcher/tmp/11602089/extract-overlay-ramdisk-pqrbweup/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11602089/tftp-deploy-8464ef71/ramdisk/ramdisk.cpio.gz
  247 12:58:31.101632  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  248 12:58:31.101755  start: 1.5.8 prepare-kernel (timeout 00:09:35) [common]
  249 12:58:31.101861  start: 1.5.8.1 prepare-fit (timeout 00:09:35) [common]
  250 12:58:31.101958  No mkimage arch provided, not using FIT.
  251 12:58:31.102047  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  252 12:58:31.102132  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  253 12:58:31.102244  end: 1.5 prepare-tftp-overlay (duration 00:00:17) [common]
  254 12:58:31.102335  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:35) [common]
  255 12:58:31.102413  No LXC device requested
  256 12:58:31.102493  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  257 12:58:31.102577  start: 1.7 deploy-device-env (timeout 00:09:35) [common]
  258 12:58:31.102654  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  259 12:58:31.102727  Checking files for TFTP limit of 4294967296 bytes.
  260 12:58:31.103154  end: 1 tftp-deploy (duration 00:00:25) [common]
  261 12:58:31.103258  start: 2 depthcharge-action (timeout 00:05:00) [common]
  262 12:58:31.103348  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  263 12:58:31.103466  substitutions:
  264 12:58:31.103536  - {DTB}: None
  265 12:58:31.103600  - {INITRD}: 11602089/tftp-deploy-8464ef71/ramdisk/ramdisk.cpio.gz
  266 12:58:31.103699  - {KERNEL}: 11602089/tftp-deploy-8464ef71/kernel/bzImage
  267 12:58:31.103757  - {LAVA_MAC}: None
  268 12:58:31.103814  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11602089/extract-nfsrootfs-a6eq8f53
  269 12:58:31.103872  - {NFS_SERVER_IP}: 192.168.201.1
  270 12:58:31.103927  - {PRESEED_CONFIG}: None
  271 12:58:31.103982  - {PRESEED_LOCAL}: None
  272 12:58:31.104036  - {RAMDISK}: 11602089/tftp-deploy-8464ef71/ramdisk/ramdisk.cpio.gz
  273 12:58:31.104090  - {ROOT_PART}: None
  274 12:58:31.104144  - {ROOT}: None
  275 12:58:31.104198  - {SERVER_IP}: 192.168.201.1
  276 12:58:31.104251  - {TEE}: None
  277 12:58:31.104305  Parsed boot commands:
  278 12:58:31.104359  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  279 12:58:31.104534  Parsed boot commands: tftpboot 192.168.201.1 11602089/tftp-deploy-8464ef71/kernel/bzImage 11602089/tftp-deploy-8464ef71/kernel/cmdline 11602089/tftp-deploy-8464ef71/ramdisk/ramdisk.cpio.gz
  280 12:58:31.104625  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  281 12:58:31.104710  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  282 12:58:31.104838  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  283 12:58:31.104924  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  284 12:58:31.104994  Not connected, no need to disconnect.
  285 12:58:31.105067  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  286 12:58:31.105149  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  287 12:58:31.105215  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-3'
  288 12:58:31.109388  Setting prompt string to ['lava-test: # ']
  289 12:58:31.109757  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  290 12:58:31.109867  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  291 12:58:31.109983  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  292 12:58:31.110104  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  293 12:58:31.110383  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
  294 12:58:36.247942  >> Command sent successfully.

  295 12:58:36.250807  Returned 0 in 5 seconds
  296 12:58:36.351205  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  298 12:58:36.351535  end: 2.2.2 reset-device (duration 00:00:05) [common]
  299 12:58:36.351650  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  300 12:58:36.351773  Setting prompt string to 'Starting depthcharge on Helios...'
  301 12:58:36.351843  Changing prompt to 'Starting depthcharge on Helios...'
  302 12:58:36.351911  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  303 12:58:36.352180  [Enter `^Ec?' for help]

  304 12:58:36.971176  

  305 12:58:36.971335  

  306 12:58:36.981764  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  307 12:58:36.984874  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  308 12:58:36.992068  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  309 12:58:36.995407  CPU: AES supported, TXT NOT supported, VT supported

  310 12:58:37.002042  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  311 12:58:37.005001  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  312 12:58:37.011900  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  313 12:58:37.015149  VBOOT: Loading verstage.

  314 12:58:37.018494  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  315 12:58:37.025316  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  316 12:58:37.028830  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  317 12:58:37.031829  CBFS @ c08000 size 3f8000

  318 12:58:37.038603  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  319 12:58:37.041754  CBFS: Locating 'fallback/verstage'

  320 12:58:37.045361  CBFS: Found @ offset 10fb80 size 1072c

  321 12:58:37.045445  

  322 12:58:37.048400  

  323 12:58:37.058384  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  324 12:58:37.072176  Probing TPM: . done!

  325 12:58:37.076034  TPM ready after 0 ms

  326 12:58:37.079256  Connected to device vid:did:rid of 1ae0:0028:00

  327 12:58:37.089579  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7

  328 12:58:37.092794  Initialized TPM device CR50 revision 0

  329 12:58:37.137489  tlcl_send_startup: Startup return code is 0

  330 12:58:37.137578  TPM: setup succeeded

  331 12:58:37.150173  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  332 12:58:37.153842  Chrome EC: UHEPI supported

  333 12:58:37.157143  Phase 1

  334 12:58:37.160557  FMAP: area GBB found @ c05000 (12288 bytes)

  335 12:58:37.167117  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  336 12:58:37.167227  Phase 2

  337 12:58:37.170594  Phase 3

  338 12:58:37.173896  FMAP: area GBB found @ c05000 (12288 bytes)

  339 12:58:37.180393  VB2:vb2_report_dev_firmware() This is developer signed firmware

  340 12:58:37.187301  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  341 12:58:37.190865  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  342 12:58:37.197316  VB2:vb2_verify_keyblock() Checking keyblock signature...

  343 12:58:37.213077  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  344 12:58:37.215846  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  345 12:58:37.222359  VB2:vb2_verify_fw_preamble() Verifying preamble.

  346 12:58:37.227092  Phase 4

  347 12:58:37.230124  FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)

  348 12:58:37.236657  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  349 12:58:37.416250  VB2:vb2_rsa_verify_digest() Digest check failed!

  350 12:58:37.422879  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7

  351 12:58:37.422969  Saving nvdata

  352 12:58:37.426211  Reboot requested (10020007)

  353 12:58:37.429653  board_reset() called!

  354 12:58:37.429736  full_reset() called!

  355 12:58:41.950163  dl�7l�ock starting (log level: 8)...

  356 12:58:41.954064  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  357 12:58:41.957688  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  358 12:58:41.961804  CPU: AES supported, TXT NOT supported, VT supported

  359 12:58:41.969577  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  360 12:58:41.973515  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  361 12:58:41.976825  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  362 12:58:41.981235  VBOOT: Loading verstage.

  363 12:58:41.984782  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  364 12:58:41.992636  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  365 12:58:41.996618  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  366 12:58:41.999901  CBFS @ c08000 size 3f8000

  367 12:58:42.003761  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  368 12:58:42.007056  CBFS: Locating 'fallback/verstage'

  369 12:58:42.014370  CBFS: Found @ offset 10fb80 size 1072c

  370 12:58:42.014458  

  371 12:58:42.014524  

  372 12:58:42.025841  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  373 12:58:42.040903  Probing TPM: . done!

  374 12:58:42.040989  TPM ready after 0 ms

  375 12:58:42.048558  Connected to device vid:did:rid of 1ae0:0028:00

  376 12:58:42.056040  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7

  377 12:58:42.059482  Initialized TPM device CR50 revision 0

  378 12:58:42.119800  tlcl_send_startup: Startup return code is 0

  379 12:58:42.119894  TPM: setup succeeded

  380 12:58:42.132786  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  381 12:58:42.136090  Chrome EC: UHEPI supported

  382 12:58:42.139416  Phase 1

  383 12:58:42.142731  FMAP: area GBB found @ c05000 (12288 bytes)

  384 12:58:42.149839  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  385 12:58:42.156258  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  386 12:58:42.159927  Recovery requested (1009000e)

  387 12:58:42.164993  Saving nvdata

  388 12:58:42.171445  tlcl_extend: response is 0

  389 12:58:42.180149  tlcl_extend: response is 0

  390 12:58:42.187231  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  391 12:58:42.190422  CBFS @ c08000 size 3f8000

  392 12:58:42.197163  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  393 12:58:42.200535  CBFS: Locating 'fallback/romstage'

  394 12:58:42.203810  CBFS: Found @ offset 80 size 145fc

  395 12:58:42.207256  Accumulated console time in verstage 98 ms

  396 12:58:42.207340  

  397 12:58:42.207405  

  398 12:58:42.220568  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...

  399 12:58:42.226792  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  400 12:58:42.230407  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  401 12:58:42.233701  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  402 12:58:42.240074  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000

  403 12:58:42.243516  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  404 12:58:42.246698  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000

  405 12:58:42.249903  TCO_STS:   0000 0000

  406 12:58:42.253275  GEN_PMCON: e0015238 00000200

  407 12:58:42.256525  GBLRST_CAUSE: 00000000 00000000

  408 12:58:42.256608  prev_sleep_state 5

  409 12:58:42.259946  Boot Count incremented to 64807

  410 12:58:42.266642  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  411 12:58:42.270132  CBFS @ c08000 size 3f8000

  412 12:58:42.276539  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  413 12:58:42.276624  CBFS: Locating 'fspm.bin'

  414 12:58:42.280099  CBFS: Found @ offset 5ffc0 size 71000

  415 12:58:42.284056  Chrome EC: UHEPI supported

  416 12:58:42.291697  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

  417 12:58:42.296352  Probing TPM:  done!

  418 12:58:42.303131  Connected to device vid:did:rid of 1ae0:0028:00

  419 12:58:42.313233  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7

  420 12:58:42.318697  Initialized TPM device CR50 revision 0

  421 12:58:42.328004  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  422 12:58:42.334743  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  423 12:58:42.337795  MRC cache found, size 1948

  424 12:58:42.341590  bootmode is set to: 2

  425 12:58:42.345189  PRMRR disabled by config.

  426 12:58:42.348226  SPD INDEX = 1

  427 12:58:42.351322  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  428 12:58:42.354421  CBFS @ c08000 size 3f8000

  429 12:58:42.361332  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  430 12:58:42.361415  CBFS: Locating 'spd.bin'

  431 12:58:42.364667  CBFS: Found @ offset 5fb80 size 400

  432 12:58:42.367614  SPD: module type is LPDDR3

  433 12:58:42.371217  SPD: module part is 

  434 12:58:42.378004  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb

  435 12:58:42.380970  SPD: device width 4 bits, bus width 8 bits

  436 12:58:42.384546  SPD: module size is 4096 MB (per channel)

  437 12:58:42.387563  memory slot: 0 configuration done.

  438 12:58:42.391278  memory slot: 2 configuration done.

  439 12:58:42.443116  CBMEM:

  440 12:58:42.446420  IMD: root @ 99fff000 254 entries.

  441 12:58:42.449334  IMD: root @ 99ffec00 62 entries.

  442 12:58:42.452548  External stage cache:

  443 12:58:42.455849  IMD: root @ 9abff000 254 entries.

  444 12:58:42.459248  IMD: root @ 9abfec00 62 entries.

  445 12:58:42.462557  Chrome EC: clear events_b mask to 0x0000000020004000

  446 12:58:42.478898  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  447 12:58:42.491979  tlcl_write: response is 0

  448 12:58:42.501416  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  449 12:58:42.508089  MRC: TPM MRC hash updated successfully.

  450 12:58:42.508213  2 DIMMs found

  451 12:58:42.511388  SMM Memory Map

  452 12:58:42.514394  SMRAM       : 0x9a000000 0x1000000

  453 12:58:42.517609   Subregion 0: 0x9a000000 0xa00000

  454 12:58:42.521468   Subregion 1: 0x9aa00000 0x200000

  455 12:58:42.524559   Subregion 2: 0x9ac00000 0x400000

  456 12:58:42.527619  top_of_ram = 0x9a000000

  457 12:58:42.531110  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)

  458 12:58:42.537832  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)

  459 12:58:42.541311  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  460 12:58:42.547543  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  461 12:58:42.550973  CBFS @ c08000 size 3f8000

  462 12:58:42.554330  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  463 12:58:42.557464  CBFS: Locating 'fallback/postcar'

  464 12:58:42.564076  CBFS: Found @ offset 107000 size 4b44

  465 12:58:42.567294  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)

  466 12:58:42.580463  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8

  467 12:58:42.583045  Processing 180 relocs. Offset value of 0x97c0c000

  468 12:58:42.592098  Accumulated console time in romstage 285 ms

  469 12:58:42.592223  

  470 12:58:42.592337  

  471 12:58:42.601941  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...

  472 12:58:42.608335  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  473 12:58:42.611548  CBFS @ c08000 size 3f8000

  474 12:58:42.615226  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  475 12:58:42.621480  CBFS: Locating 'fallback/ramstage'

  476 12:58:42.625267  CBFS: Found @ offset 43380 size 1b9e8

  477 12:58:42.631572  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)

  478 12:58:42.663592  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38

  479 12:58:42.666777  Processing 3976 relocs. Offset value of 0x98db0000

  480 12:58:42.673840  Accumulated console time in postcar 52 ms

  481 12:58:42.673924  

  482 12:58:42.673988  

  483 12:58:42.683830  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...

  484 12:58:42.690131  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  485 12:58:42.693567  WARNING: RO_VPD is uninitialized or empty.

  486 12:58:42.696753  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  487 12:58:42.703983  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  488 12:58:42.704116  Normal boot.

  489 12:58:42.710580  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

  490 12:58:42.713505  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  491 12:58:42.716965  CBFS @ c08000 size 3f8000

  492 12:58:42.723463  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  493 12:58:42.726809  CBFS: Locating 'cpu_microcode_blob.bin'

  494 12:58:42.730152  CBFS: Found @ offset 14700 size 2ec00

  495 12:58:42.733564  microcode: sig=0x806ec pf=0x4 revision=0xc9

  496 12:58:42.736734  Skip microcode update

  497 12:58:42.740179  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  498 12:58:42.743659  CBFS @ c08000 size 3f8000

  499 12:58:42.750151  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  500 12:58:42.753151  CBFS: Locating 'fsps.bin'

  501 12:58:42.756580  CBFS: Found @ offset d1fc0 size 35000

  502 12:58:42.781576  Detected 4 core, 8 thread CPU.

  503 12:58:42.785173  Setting up SMI for CPU

  504 12:58:42.788485  IED base = 0x9ac00000

  505 12:58:42.788593  IED size = 0x00400000

  506 12:58:42.792188  Will perform SMM setup.

  507 12:58:42.798394  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.

  508 12:58:42.805176  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  509 12:58:42.808371  Processing 16 relocs. Offset value of 0x00030000

  510 12:58:42.812116  Attempting to start 7 APs

  511 12:58:42.815277  Waiting for 10ms after sending INIT.

  512 12:58:42.831907  Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.

  513 12:58:42.831990  done.

  514 12:58:42.834768  AP: slot 2 apic_id 7.

  515 12:58:42.838178  AP: slot 5 apic_id 6.

  516 12:58:42.841637  Waiting for 2nd SIPI to complete...done.

  517 12:58:42.844969  AP: slot 7 apic_id 5.

  518 12:58:42.845092  AP: slot 6 apic_id 4.

  519 12:58:42.848177  AP: slot 4 apic_id 3.

  520 12:58:42.851246  AP: slot 1 apic_id 2.

  521 12:58:42.858268  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  522 12:58:42.864326  Processing 13 relocs. Offset value of 0x00038000

  523 12:58:42.868251  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)

  524 12:58:42.874445  Installing SMM handler to 0x9a000000

  525 12:58:42.881051  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58

  526 12:58:42.887890  Processing 658 relocs. Offset value of 0x9a010000

  527 12:58:42.894154  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8

  528 12:58:42.897916  Processing 13 relocs. Offset value of 0x9a008000

  529 12:58:42.904090  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd

  530 12:58:42.910836  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd

  531 12:58:42.917417  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd

  532 12:58:42.920636  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd

  533 12:58:42.927214  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd

  534 12:58:42.934231  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd

  535 12:58:42.937474  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd

  536 12:58:42.943793  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)

  537 12:58:42.947296  Clearing SMI status registers

  538 12:58:42.950767  SMI_STS: PM1 

  539 12:58:42.950890  PM1_STS: PWRBTN 

  540 12:58:42.953980  TCO_STS: SECOND_TO 

  541 12:58:42.957702  New SMBASE 0x9a000000

  542 12:58:42.961286  In relocation handler: CPU 0

  543 12:58:42.964486  New SMBASE=0x9a000000 IEDBASE=0x9ac00000

  544 12:58:42.967362  Writing SMRR. base = 0x9a000006, mask=0xff000800

  545 12:58:42.970766  Relocation complete.

  546 12:58:42.973994  New SMBASE 0x99fff400

  547 12:58:42.974118  In relocation handler: CPU 3

  548 12:58:42.980668  New SMBASE=0x99fff400 IEDBASE=0x9ac00000

  549 12:58:42.984072  Writing SMRR. base = 0x9a000006, mask=0xff000800

  550 12:58:42.987675  Relocation complete.

  551 12:58:42.987814  New SMBASE 0x99ffe400

  552 12:58:42.991428  In relocation handler: CPU 7

  553 12:58:42.997475  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000

  554 12:58:43.000648  Writing SMRR. base = 0x9a000006, mask=0xff000800

  555 12:58:43.004634  Relocation complete.

  556 12:58:43.004718  New SMBASE 0x99ffe800

  557 12:58:43.007364  In relocation handler: CPU 6

  558 12:58:43.014145  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000

  559 12:58:43.017841  Writing SMRR. base = 0x9a000006, mask=0xff000800

  560 12:58:43.020675  Relocation complete.

  561 12:58:43.020758  New SMBASE 0x99fff000

  562 12:58:43.024111  In relocation handler: CPU 4

  563 12:58:43.027350  New SMBASE=0x99fff000 IEDBASE=0x9ac00000

  564 12:58:43.034124  Writing SMRR. base = 0x9a000006, mask=0xff000800

  565 12:58:43.037191  Relocation complete.

  566 12:58:43.037275  New SMBASE 0x99fffc00

  567 12:58:43.040761  In relocation handler: CPU 1

  568 12:58:43.044193  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000

  569 12:58:43.051132  Writing SMRR. base = 0x9a000006, mask=0xff000800

  570 12:58:43.051216  Relocation complete.

  571 12:58:43.054467  New SMBASE 0x99ffec00

  572 12:58:43.057753  In relocation handler: CPU 5

  573 12:58:43.061068  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000

  574 12:58:43.067518  Writing SMRR. base = 0x9a000006, mask=0xff000800

  575 12:58:43.067628  Relocation complete.

  576 12:58:43.070846  New SMBASE 0x99fff800

  577 12:58:43.074354  In relocation handler: CPU 2

  578 12:58:43.077343  New SMBASE=0x99fff800 IEDBASE=0x9ac00000

  579 12:58:43.084081  Writing SMRR. base = 0x9a000006, mask=0xff000800

  580 12:58:43.084165  Relocation complete.

  581 12:58:43.087526  Initializing CPU #0

  582 12:58:43.091046  CPU: vendor Intel device 806ec

  583 12:58:43.094312  CPU: family 06, model 8e, stepping 0c

  584 12:58:43.097647  Clearing out pending MCEs

  585 12:58:43.101050  Setting up local APIC...

  586 12:58:43.101159   apic_id: 0x00 done.

  587 12:58:43.103783  Turbo is available but hidden

  588 12:58:43.107090  Turbo is available and visible

  589 12:58:43.110704  VMX status: enabled

  590 12:58:43.113717  IA32_FEATURE_CONTROL status: locked

  591 12:58:43.117298  Skip microcode update

  592 12:58:43.117382  CPU #0 initialized

  593 12:58:43.120674  Initializing CPU #3

  594 12:58:43.120757  Initializing CPU #2

  595 12:58:43.123888  Initializing CPU #5

  596 12:58:43.127481  CPU: vendor Intel device 806ec

  597 12:58:43.130429  CPU: family 06, model 8e, stepping 0c

  598 12:58:43.133730  CPU: vendor Intel device 806ec

  599 12:58:43.137255  CPU: family 06, model 8e, stepping 0c

  600 12:58:43.140229  Clearing out pending MCEs

  601 12:58:43.143779  Clearing out pending MCEs

  602 12:58:43.147470  Setting up local APIC...

  603 12:58:43.147578  Initializing CPU #4

  604 12:58:43.150182  Initializing CPU #1

  605 12:58:43.153455  CPU: vendor Intel device 806ec

  606 12:58:43.157128  CPU: family 06, model 8e, stepping 0c

  607 12:58:43.160455  CPU: vendor Intel device 806ec

  608 12:58:43.163607  CPU: family 06, model 8e, stepping 0c

  609 12:58:43.166879  Clearing out pending MCEs

  610 12:58:43.170444  Clearing out pending MCEs

  611 12:58:43.170525  Setting up local APIC...

  612 12:58:43.173681  CPU: vendor Intel device 806ec

  613 12:58:43.177212  CPU: family 06, model 8e, stepping 0c

  614 12:58:43.180173  Clearing out pending MCEs

  615 12:58:43.183550  Initializing CPU #7

  616 12:58:43.183694  Initializing CPU #6

  617 12:58:43.186972  CPU: vendor Intel device 806ec

  618 12:58:43.190199  CPU: family 06, model 8e, stepping 0c

  619 12:58:43.193555  CPU: vendor Intel device 806ec

  620 12:58:43.200329  CPU: family 06, model 8e, stepping 0c

  621 12:58:43.200454  Clearing out pending MCEs

  622 12:58:43.203875  Clearing out pending MCEs

  623 12:58:43.206672  Setting up local APIC...

  624 12:58:43.210274   apic_id: 0x06 done.

  625 12:58:43.210401  Setting up local APIC...

  626 12:58:43.213090  Setting up local APIC...

  627 12:58:43.216463   apic_id: 0x03 done.

  628 12:58:43.216567  Setting up local APIC...

  629 12:58:43.219901   apic_id: 0x05 done.

  630 12:58:43.223849   apic_id: 0x04 done.

  631 12:58:43.223930  VMX status: enabled

  632 12:58:43.226557   apic_id: 0x07 done.

  633 12:58:43.229916  VMX status: enabled

  634 12:58:43.229997  VMX status: enabled

  635 12:58:43.233134  IA32_FEATURE_CONTROL status: locked

  636 12:58:43.236393  IA32_FEATURE_CONTROL status: locked

  637 12:58:43.239687  Skip microcode update

  638 12:58:43.243079  Skip microcode update

  639 12:58:43.243161  CPU #5 initialized

  640 12:58:43.246943  CPU #2 initialized

  641 12:58:43.249755  Setting up local APIC...

  642 12:58:43.252922  IA32_FEATURE_CONTROL status: locked

  643 12:58:43.253004  VMX status: enabled

  644 12:58:43.256284  Skip microcode update

  645 12:58:43.259731  IA32_FEATURE_CONTROL status: locked

  646 12:58:43.262974  CPU #7 initialized

  647 12:58:43.263055  Skip microcode update

  648 12:58:43.266141   apic_id: 0x01 done.

  649 12:58:43.269453   apic_id: 0x02 done.

  650 12:58:43.269560  VMX status: enabled

  651 12:58:43.272641  VMX status: enabled

  652 12:58:43.276475  IA32_FEATURE_CONTROL status: locked

  653 12:58:43.279321  IA32_FEATURE_CONTROL status: locked

  654 12:58:43.282789  Skip microcode update

  655 12:58:43.286492  Skip microcode update

  656 12:58:43.286574  CPU #4 initialized

  657 12:58:43.289856  CPU #1 initialized

  658 12:58:43.289938  CPU #6 initialized

  659 12:58:43.292616  VMX status: enabled

  660 12:58:43.295937  IA32_FEATURE_CONTROL status: locked

  661 12:58:43.299552  Skip microcode update

  662 12:58:43.299634  CPU #3 initialized

  663 12:58:43.306165  bsp_do_flight_plan done after 461 msecs.

  664 12:58:43.309280  CPU: frequency set to 4200 MHz

  665 12:58:43.309361  Enabling SMIs.

  666 12:58:43.309426  Locking SMM.

  667 12:58:43.325773  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  668 12:58:43.329245  CBFS @ c08000 size 3f8000

  669 12:58:43.335262  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  670 12:58:43.335345  CBFS: Locating 'vbt.bin'

  671 12:58:43.338690  CBFS: Found @ offset 5f5c0 size 499

  672 12:58:43.345589  Found a VBT of 4608 bytes after decompression

  673 12:58:43.530046  Display FSP Version Info HOB

  674 12:58:43.533195  Reference Code - CPU = 9.0.1e.30

  675 12:58:43.536585  uCode Version = 0.0.0.ca

  676 12:58:43.539766  TXT ACM version = ff.ff.ff.ffff

  677 12:58:43.543321  Display FSP Version Info HOB

  678 12:58:43.546701  Reference Code - ME = 9.0.1e.30

  679 12:58:43.549852  MEBx version = 0.0.0.0

  680 12:58:43.553189  ME Firmware Version = Consumer SKU

  681 12:58:43.557036  Display FSP Version Info HOB

  682 12:58:43.559641  Reference Code - CML PCH = 9.0.1e.30

  683 12:58:43.563169  PCH-CRID Status = Disabled

  684 12:58:43.566541  PCH-CRID Original Value = ff.ff.ff.ffff

  685 12:58:43.569790  PCH-CRID New Value = ff.ff.ff.ffff

  686 12:58:43.573100  OPROM - RST - RAID = ff.ff.ff.ffff

  687 12:58:43.576446  ChipsetInit Base Version = ff.ff.ff.ffff

  688 12:58:43.579873  ChipsetInit Oem Version = ff.ff.ff.ffff

  689 12:58:43.583263  Display FSP Version Info HOB

  690 12:58:43.589761  Reference Code - SA - System Agent = 9.0.1e.30

  691 12:58:43.593184  Reference Code - MRC = 0.7.1.6c

  692 12:58:43.596258  SA - PCIe Version = 9.0.1e.30

  693 12:58:43.596340  SA-CRID Status = Disabled

  694 12:58:43.599845  SA-CRID Original Value = 0.0.0.c

  695 12:58:43.603160  SA-CRID New Value = 0.0.0.c

  696 12:58:43.606390  OPROM - VBIOS = ff.ff.ff.ffff

  697 12:58:43.609976  RTC Init

  698 12:58:43.612929  Set power on after power failure.

  699 12:58:43.613036  Disabling Deep S3

  700 12:58:43.616206  Disabling Deep S3

  701 12:58:43.616288  Disabling Deep S4

  702 12:58:43.619621  Disabling Deep S4

  703 12:58:43.623052  Disabling Deep S5

  704 12:58:43.623134  Disabling Deep S5

  705 12:58:43.629667  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 195 exit 1

  706 12:58:43.629750  Enumerating buses...

  707 12:58:43.636104  Show all devs... Before device enumeration.

  708 12:58:43.639475  Root Device: enabled 1

  709 12:58:43.639558  CPU_CLUSTER: 0: enabled 1

  710 12:58:43.642584  DOMAIN: 0000: enabled 1

  711 12:58:43.645859  APIC: 00: enabled 1

  712 12:58:43.645941  PCI: 00:00.0: enabled 1

  713 12:58:43.649267  PCI: 00:02.0: enabled 1

  714 12:58:43.652677  PCI: 00:04.0: enabled 0

  715 12:58:43.655800  PCI: 00:05.0: enabled 0

  716 12:58:43.655883  PCI: 00:12.0: enabled 1

  717 12:58:43.659453  PCI: 00:12.5: enabled 0

  718 12:58:43.662291  PCI: 00:12.6: enabled 0

  719 12:58:43.665824  PCI: 00:14.0: enabled 1

  720 12:58:43.665906  PCI: 00:14.1: enabled 0

  721 12:58:43.669189  PCI: 00:14.3: enabled 1

  722 12:58:43.672513  PCI: 00:14.5: enabled 0

  723 12:58:43.672594  PCI: 00:15.0: enabled 1

  724 12:58:43.675813  PCI: 00:15.1: enabled 1

  725 12:58:43.679060  PCI: 00:15.2: enabled 0

  726 12:58:43.682576  PCI: 00:15.3: enabled 0

  727 12:58:43.682658  PCI: 00:16.0: enabled 1

  728 12:58:43.685807  PCI: 00:16.1: enabled 0

  729 12:58:43.689061  PCI: 00:16.2: enabled 0

  730 12:58:43.692393  PCI: 00:16.3: enabled 0

  731 12:58:43.692475  PCI: 00:16.4: enabled 0

  732 12:58:43.695965  PCI: 00:16.5: enabled 0

  733 12:58:43.699245  PCI: 00:17.0: enabled 1

  734 12:58:43.702475  PCI: 00:19.0: enabled 1

  735 12:58:43.702557  PCI: 00:19.1: enabled 0

  736 12:58:43.705502  PCI: 00:19.2: enabled 0

  737 12:58:43.708806  PCI: 00:1a.0: enabled 0

  738 12:58:43.712206  PCI: 00:1c.0: enabled 0

  739 12:58:43.712288  PCI: 00:1c.1: enabled 0

  740 12:58:43.715540  PCI: 00:1c.2: enabled 0

  741 12:58:43.718719  PCI: 00:1c.3: enabled 0

  742 12:58:43.718801  PCI: 00:1c.4: enabled 0

  743 12:58:43.722236  PCI: 00:1c.5: enabled 0

  744 12:58:43.725349  PCI: 00:1c.6: enabled 0

  745 12:58:43.728692  PCI: 00:1c.7: enabled 0

  746 12:58:43.728774  PCI: 00:1d.0: enabled 1

  747 12:58:43.732543  PCI: 00:1d.1: enabled 0

  748 12:58:43.735575  PCI: 00:1d.2: enabled 0

  749 12:58:43.739057  PCI: 00:1d.3: enabled 0

  750 12:58:43.739140  PCI: 00:1d.4: enabled 0

  751 12:58:43.742171  PCI: 00:1d.5: enabled 1

  752 12:58:43.745249  PCI: 00:1e.0: enabled 1

  753 12:58:43.748558  PCI: 00:1e.1: enabled 0

  754 12:58:43.748641  PCI: 00:1e.2: enabled 1

  755 12:58:43.751855  PCI: 00:1e.3: enabled 1

  756 12:58:43.755393  PCI: 00:1f.0: enabled 1

  757 12:58:43.755521  PCI: 00:1f.1: enabled 1

  758 12:58:43.758935  PCI: 00:1f.2: enabled 1

  759 12:58:43.762027  PCI: 00:1f.3: enabled 1

  760 12:58:43.765539  PCI: 00:1f.4: enabled 1

  761 12:58:43.765662  PCI: 00:1f.5: enabled 1

  762 12:58:43.768639  PCI: 00:1f.6: enabled 0

  763 12:58:43.771768  USB0 port 0: enabled 1

  764 12:58:43.774928  I2C: 00:15: enabled 1

  765 12:58:43.775052  I2C: 00:5d: enabled 1

  766 12:58:43.778438  GENERIC: 0.0: enabled 1

  767 12:58:43.781730  I2C: 00:1a: enabled 1

  768 12:58:43.781851  I2C: 00:38: enabled 1

  769 12:58:43.784793  I2C: 00:39: enabled 1

  770 12:58:43.788289  I2C: 00:3a: enabled 1

  771 12:58:43.788410  I2C: 00:3b: enabled 1

  772 12:58:43.791410  PCI: 00:00.0: enabled 1

  773 12:58:43.795434  SPI: 00: enabled 1

  774 12:58:43.795553  SPI: 01: enabled 1

  775 12:58:43.798636  PNP: 0c09.0: enabled 1

  776 12:58:43.801488  USB2 port 0: enabled 1

  777 12:58:43.801612  USB2 port 1: enabled 1

  778 12:58:43.805052  USB2 port 2: enabled 0

  779 12:58:43.808085  USB2 port 3: enabled 0

  780 12:58:43.808209  USB2 port 5: enabled 0

  781 12:58:43.811674  USB2 port 6: enabled 1

  782 12:58:43.814947  USB2 port 9: enabled 1

  783 12:58:43.818255  USB3 port 0: enabled 1

  784 12:58:43.818337  USB3 port 1: enabled 1

  785 12:58:43.821703  USB3 port 2: enabled 1

  786 12:58:43.825150  USB3 port 3: enabled 1

  787 12:58:43.825246  USB3 port 4: enabled 0

  788 12:58:43.828307  APIC: 02: enabled 1

  789 12:58:43.831630  APIC: 07: enabled 1

  790 12:58:43.831735  APIC: 01: enabled 1

  791 12:58:43.834832  APIC: 03: enabled 1

  792 12:58:43.834914  APIC: 06: enabled 1

  793 12:58:43.838079  APIC: 04: enabled 1

  794 12:58:43.841449  APIC: 05: enabled 1

  795 12:58:43.841531  Compare with tree...

  796 12:58:43.844466  Root Device: enabled 1

  797 12:58:43.847909   CPU_CLUSTER: 0: enabled 1

  798 12:58:43.851199    APIC: 00: enabled 1

  799 12:58:43.851345    APIC: 02: enabled 1

  800 12:58:43.854837    APIC: 07: enabled 1

  801 12:58:43.857864    APIC: 01: enabled 1

  802 12:58:43.857946    APIC: 03: enabled 1

  803 12:58:43.861253    APIC: 06: enabled 1

  804 12:58:43.864623    APIC: 04: enabled 1

  805 12:58:43.864706    APIC: 05: enabled 1

  806 12:58:43.867998   DOMAIN: 0000: enabled 1

  807 12:58:43.871075    PCI: 00:00.0: enabled 1

  808 12:58:43.874361    PCI: 00:02.0: enabled 1

  809 12:58:43.874484    PCI: 00:04.0: enabled 0

  810 12:58:43.878024    PCI: 00:05.0: enabled 0

  811 12:58:43.881230    PCI: 00:12.0: enabled 1

  812 12:58:43.884638    PCI: 00:12.5: enabled 0

  813 12:58:43.887809    PCI: 00:12.6: enabled 0

  814 12:58:43.887933    PCI: 00:14.0: enabled 1

  815 12:58:43.891154     USB0 port 0: enabled 1

  816 12:58:43.894621      USB2 port 0: enabled 1

  817 12:58:43.898232      USB2 port 1: enabled 1

  818 12:58:43.900984      USB2 port 2: enabled 0

  819 12:58:43.901105      USB2 port 3: enabled 0

  820 12:58:43.904393      USB2 port 5: enabled 0

  821 12:58:43.907830      USB2 port 6: enabled 1

  822 12:58:43.910950      USB2 port 9: enabled 1

  823 12:58:43.914584      USB3 port 0: enabled 1

  824 12:58:43.917395      USB3 port 1: enabled 1

  825 12:58:43.917522      USB3 port 2: enabled 1

  826 12:58:43.921328      USB3 port 3: enabled 1

  827 12:58:43.923893      USB3 port 4: enabled 0

  828 12:58:43.927451    PCI: 00:14.1: enabled 0

  829 12:58:43.931056    PCI: 00:14.3: enabled 1

  830 12:58:43.931178    PCI: 00:14.5: enabled 0

  831 12:58:43.934552    PCI: 00:15.0: enabled 1

  832 12:58:43.937202     I2C: 00:15: enabled 1

  833 12:58:43.940980    PCI: 00:15.1: enabled 1

  834 12:58:43.944019     I2C: 00:5d: enabled 1

  835 12:58:43.944153     GENERIC: 0.0: enabled 1

  836 12:58:43.947352    PCI: 00:15.2: enabled 0

  837 12:58:43.950724    PCI: 00:15.3: enabled 0

  838 12:58:43.954154    PCI: 00:16.0: enabled 1

  839 12:58:43.957548    PCI: 00:16.1: enabled 0

  840 12:58:43.957679    PCI: 00:16.2: enabled 0

  841 12:58:43.960542    PCI: 00:16.3: enabled 0

  842 12:58:43.963829    PCI: 00:16.4: enabled 0

  843 12:58:43.967195    PCI: 00:16.5: enabled 0

  844 12:58:43.967327    PCI: 00:17.0: enabled 1

  845 12:58:43.970543    PCI: 00:19.0: enabled 1

  846 12:58:43.973903     I2C: 00:1a: enabled 1

  847 12:58:43.977145     I2C: 00:38: enabled 1

  848 12:58:43.980399     I2C: 00:39: enabled 1

  849 12:58:43.980533     I2C: 00:3a: enabled 1

  850 12:58:43.984129     I2C: 00:3b: enabled 1

  851 12:58:43.987185    PCI: 00:19.1: enabled 0

  852 12:58:43.990769    PCI: 00:19.2: enabled 0

  853 12:58:43.990904    PCI: 00:1a.0: enabled 0

  854 12:58:43.994018    PCI: 00:1c.0: enabled 0

  855 12:58:43.997419    PCI: 00:1c.1: enabled 0

  856 12:58:44.000878    PCI: 00:1c.2: enabled 0

  857 12:58:44.003761    PCI: 00:1c.3: enabled 0

  858 12:58:44.003892    PCI: 00:1c.4: enabled 0

  859 12:58:44.007157    PCI: 00:1c.5: enabled 0

  860 12:58:44.010708    PCI: 00:1c.6: enabled 0

  861 12:58:44.014112    PCI: 00:1c.7: enabled 0

  862 12:58:44.016856    PCI: 00:1d.0: enabled 1

  863 12:58:44.016990    PCI: 00:1d.1: enabled 0

  864 12:58:44.020193    PCI: 00:1d.2: enabled 0

  865 12:58:44.023552    PCI: 00:1d.3: enabled 0

  866 12:58:44.027473    PCI: 00:1d.4: enabled 0

  867 12:58:44.030353    PCI: 00:1d.5: enabled 1

  868 12:58:44.030488     PCI: 00:00.0: enabled 1

  869 12:58:44.033439    PCI: 00:1e.0: enabled 1

  870 12:58:44.036755    PCI: 00:1e.1: enabled 0

  871 12:58:44.040065    PCI: 00:1e.2: enabled 1

  872 12:58:44.040200     SPI: 00: enabled 1

  873 12:58:44.043544    PCI: 00:1e.3: enabled 1

  874 12:58:44.046930     SPI: 01: enabled 1

  875 12:58:44.050268    PCI: 00:1f.0: enabled 1

  876 12:58:44.053651     PNP: 0c09.0: enabled 1

  877 12:58:44.053728    PCI: 00:1f.1: enabled 1

  878 12:58:44.056875    PCI: 00:1f.2: enabled 1

  879 12:58:44.060390    PCI: 00:1f.3: enabled 1

  880 12:58:44.063224    PCI: 00:1f.4: enabled 1

  881 12:58:44.063306    PCI: 00:1f.5: enabled 1

  882 12:58:44.066839    PCI: 00:1f.6: enabled 0

  883 12:58:44.069915  Root Device scanning...

  884 12:58:44.073678  scan_static_bus for Root Device

  885 12:58:44.076921  CPU_CLUSTER: 0 enabled

  886 12:58:44.077004  DOMAIN: 0000 enabled

  887 12:58:44.080267  DOMAIN: 0000 scanning...

  888 12:58:44.083502  PCI: pci_scan_bus for bus 00

  889 12:58:44.086379  PCI: 00:00.0 [8086/0000] ops

  890 12:58:44.089996  PCI: 00:00.0 [8086/9b61] enabled

  891 12:58:44.093417  PCI: 00:02.0 [8086/0000] bus ops

  892 12:58:44.096518  PCI: 00:02.0 [8086/9b41] enabled

  893 12:58:44.099904  PCI: 00:04.0 [8086/1903] disabled

  894 12:58:44.103317  PCI: 00:08.0 [8086/1911] enabled

  895 12:58:44.106726  PCI: 00:12.0 [8086/02f9] enabled

  896 12:58:44.110143  PCI: 00:14.0 [8086/0000] bus ops

  897 12:58:44.113544  PCI: 00:14.0 [8086/02ed] enabled

  898 12:58:44.116354  PCI: 00:14.2 [8086/02ef] enabled

  899 12:58:44.119731  PCI: 00:14.3 [8086/02f0] enabled

  900 12:58:44.123015  PCI: 00:15.0 [8086/0000] bus ops

  901 12:58:44.127463  PCI: 00:15.0 [8086/02e8] enabled

  902 12:58:44.130280  PCI: 00:15.1 [8086/0000] bus ops

  903 12:58:44.133482  PCI: 00:15.1 [8086/02e9] enabled

  904 12:58:44.136650  PCI: 00:16.0 [8086/0000] ops

  905 12:58:44.139961  PCI: 00:16.0 [8086/02e0] enabled

  906 12:58:44.143052  PCI: 00:17.0 [8086/0000] ops

  907 12:58:44.146534  PCI: 00:17.0 [8086/02d3] enabled

  908 12:58:44.149876  PCI: 00:19.0 [8086/0000] bus ops

  909 12:58:44.153522  PCI: 00:19.0 [8086/02c5] enabled

  910 12:58:44.156426  PCI: 00:1d.0 [8086/0000] bus ops

  911 12:58:44.159827  PCI: 00:1d.0 [8086/02b0] enabled

  912 12:58:44.166680  PCI: Static device PCI: 00:1d.5 not found, disabling it.

  913 12:58:44.166780  PCI: 00:1e.0 [8086/0000] ops

  914 12:58:44.169879  PCI: 00:1e.0 [8086/02a8] enabled

  915 12:58:44.173397  PCI: 00:1e.2 [8086/0000] bus ops

  916 12:58:44.176645  PCI: 00:1e.2 [8086/02aa] enabled

  917 12:58:44.179796  PCI: 00:1e.3 [8086/0000] bus ops

  918 12:58:44.183398  PCI: 00:1e.3 [8086/02ab] enabled

  919 12:58:44.186284  PCI: 00:1f.0 [8086/0000] bus ops

  920 12:58:44.189549  PCI: 00:1f.0 [8086/0284] enabled

  921 12:58:44.196119  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  922 12:58:44.203129  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  923 12:58:44.206082  PCI: 00:1f.3 [8086/0000] bus ops

  924 12:58:44.209394  PCI: 00:1f.3 [8086/02c8] enabled

  925 12:58:44.212884  PCI: 00:1f.4 [8086/0000] bus ops

  926 12:58:44.215992  PCI: 00:1f.4 [8086/02a3] enabled

  927 12:58:44.219298  PCI: 00:1f.5 [8086/0000] bus ops

  928 12:58:44.222520  PCI: 00:1f.5 [8086/02a4] enabled

  929 12:58:44.226012  PCI: Leftover static devices:

  930 12:58:44.226130  PCI: 00:05.0

  931 12:58:44.229239  PCI: 00:12.5

  932 12:58:44.229322  PCI: 00:12.6

  933 12:58:44.229388  PCI: 00:14.1

  934 12:58:44.232677  PCI: 00:14.5

  935 12:58:44.232761  PCI: 00:15.2

  936 12:58:44.235631  PCI: 00:15.3

  937 12:58:44.235720  PCI: 00:16.1

  938 12:58:44.239469  PCI: 00:16.2

  939 12:58:44.239552  PCI: 00:16.3

  940 12:58:44.239617  PCI: 00:16.4

  941 12:58:44.242826  PCI: 00:16.5

  942 12:58:44.242907  PCI: 00:19.1

  943 12:58:44.246004  PCI: 00:19.2

  944 12:58:44.246085  PCI: 00:1a.0

  945 12:58:44.246150  PCI: 00:1c.0

  946 12:58:44.249188  PCI: 00:1c.1

  947 12:58:44.249268  PCI: 00:1c.2

  948 12:58:44.252639  PCI: 00:1c.3

  949 12:58:44.252723  PCI: 00:1c.4

  950 12:58:44.252787  PCI: 00:1c.5

  951 12:58:44.255775  PCI: 00:1c.6

  952 12:58:44.255856  PCI: 00:1c.7

  953 12:58:44.259027  PCI: 00:1d.1

  954 12:58:44.259108  PCI: 00:1d.2

  955 12:58:44.262358  PCI: 00:1d.3

  956 12:58:44.262440  PCI: 00:1d.4

  957 12:58:44.262504  PCI: 00:1d.5

  958 12:58:44.265969  PCI: 00:1e.1

  959 12:58:44.266051  PCI: 00:1f.1

  960 12:58:44.268926  PCI: 00:1f.2

  961 12:58:44.269007  PCI: 00:1f.6

  962 12:58:44.272661  PCI: Check your devicetree.cb.

  963 12:58:44.276057  PCI: 00:02.0 scanning...

  964 12:58:44.278974  scan_generic_bus for PCI: 00:02.0

  965 12:58:44.282532  scan_generic_bus for PCI: 00:02.0 done

  966 12:58:44.289115  scan_bus: scanning of bus PCI: 00:02.0 took 10185 usecs

  967 12:58:44.289199  PCI: 00:14.0 scanning...

  968 12:58:44.292798  scan_static_bus for PCI: 00:14.0

  969 12:58:44.295513  USB0 port 0 enabled

  970 12:58:44.298852  USB0 port 0 scanning...

  971 12:58:44.302109  scan_static_bus for USB0 port 0

  972 12:58:44.305920  USB2 port 0 enabled

  973 12:58:44.306059  USB2 port 1 enabled

  974 12:58:44.309053  USB2 port 2 disabled

  975 12:58:44.309135  USB2 port 3 disabled

  976 12:58:44.312613  USB2 port 5 disabled

  977 12:58:44.315589  USB2 port 6 enabled

  978 12:58:44.315695  USB2 port 9 enabled

  979 12:58:44.318866  USB3 port 0 enabled

  980 12:58:44.322178  USB3 port 1 enabled

  981 12:58:44.322260  USB3 port 2 enabled

  982 12:58:44.325592  USB3 port 3 enabled

  983 12:58:44.325674  USB3 port 4 disabled

  984 12:58:44.328825  USB2 port 0 scanning...

  985 12:58:44.332547  scan_static_bus for USB2 port 0

  986 12:58:44.335529  scan_static_bus for USB2 port 0 done

  987 12:58:44.342252  scan_bus: scanning of bus USB2 port 0 took 9703 usecs

  988 12:58:44.345668  USB2 port 1 scanning...

  989 12:58:44.348946  scan_static_bus for USB2 port 1

  990 12:58:44.352411  scan_static_bus for USB2 port 1 done

  991 12:58:44.355445  scan_bus: scanning of bus USB2 port 1 took 9706 usecs

  992 12:58:44.358691  USB2 port 6 scanning...

  993 12:58:44.362437  scan_static_bus for USB2 port 6

  994 12:58:44.365661  scan_static_bus for USB2 port 6 done

  995 12:58:44.372309  scan_bus: scanning of bus USB2 port 6 took 9697 usecs

  996 12:58:44.375467  USB2 port 9 scanning...

  997 12:58:44.378825  scan_static_bus for USB2 port 9

  998 12:58:44.382190  scan_static_bus for USB2 port 9 done

  999 12:58:44.385307  scan_bus: scanning of bus USB2 port 9 took 9696 usecs

 1000 12:58:44.388916  USB3 port 0 scanning...

 1001 12:58:44.392280  scan_static_bus for USB3 port 0

 1002 12:58:44.395548  scan_static_bus for USB3 port 0 done

 1003 12:58:44.402462  scan_bus: scanning of bus USB3 port 0 took 9704 usecs

 1004 12:58:44.405584  USB3 port 1 scanning...

 1005 12:58:44.408755  scan_static_bus for USB3 port 1

 1006 12:58:44.411969  scan_static_bus for USB3 port 1 done

 1007 12:58:44.418730  scan_bus: scanning of bus USB3 port 1 took 9695 usecs

 1008 12:58:44.418812  USB3 port 2 scanning...

 1009 12:58:44.421739  scan_static_bus for USB3 port 2

 1010 12:58:44.425209  scan_static_bus for USB3 port 2 done

 1011 12:58:44.432068  scan_bus: scanning of bus USB3 port 2 took 9705 usecs

 1012 12:58:44.435207  USB3 port 3 scanning...

 1013 12:58:44.438649  scan_static_bus for USB3 port 3

 1014 12:58:44.441882  scan_static_bus for USB3 port 3 done

 1015 12:58:44.448597  scan_bus: scanning of bus USB3 port 3 took 9698 usecs

 1016 12:58:44.451849  scan_static_bus for USB0 port 0 done

 1017 12:58:44.455230  scan_bus: scanning of bus USB0 port 0 took 155383 usecs

 1018 12:58:44.458534  scan_static_bus for PCI: 00:14.0 done

 1019 12:58:44.465850  scan_bus: scanning of bus PCI: 00:14.0 took 173009 usecs

 1020 12:58:44.468724  PCI: 00:15.0 scanning...

 1021 12:58:44.472123  scan_generic_bus for PCI: 00:15.0

 1022 12:58:44.475387  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled

 1023 12:58:44.478296  scan_generic_bus for PCI: 00:15.0 done

 1024 12:58:44.484712  scan_bus: scanning of bus PCI: 00:15.0 took 14306 usecs

 1025 12:58:44.488440  PCI: 00:15.1 scanning...

 1026 12:58:44.491875  scan_generic_bus for PCI: 00:15.1

 1027 12:58:44.495235  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled

 1028 12:58:44.501619  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled

 1029 12:58:44.504780  scan_generic_bus for PCI: 00:15.1 done

 1030 12:58:44.508240  scan_bus: scanning of bus PCI: 00:15.1 took 18587 usecs

 1031 12:58:44.512043  PCI: 00:19.0 scanning...

 1032 12:58:44.514592  scan_generic_bus for PCI: 00:19.0

 1033 12:58:44.521069  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled

 1034 12:58:44.524566  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled

 1035 12:58:44.528374  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled

 1036 12:58:44.531253  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled

 1037 12:58:44.534999  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled

 1038 12:58:44.541063  scan_generic_bus for PCI: 00:19.0 done

 1039 12:58:44.544205  scan_bus: scanning of bus PCI: 00:19.0 took 30738 usecs

 1040 12:58:44.548206  PCI: 00:1d.0 scanning...

 1041 12:58:44.550825  do_pci_scan_bridge for PCI: 00:1d.0

 1042 12:58:44.554499  PCI: pci_scan_bus for bus 01

 1043 12:58:44.558071  PCI: 01:00.0 [1c5c/1327] enabled

 1044 12:58:44.561325  Enabling Common Clock Configuration

 1045 12:58:44.567513  L1 Sub-State supported from root port 29

 1046 12:58:44.567620  L1 Sub-State Support = 0xf

 1047 12:58:44.570875  CommonModeRestoreTime = 0x28

 1048 12:58:44.577628  Power On Value = 0x16, Power On Scale = 0x0

 1049 12:58:44.577709  ASPM: Enabled L1

 1050 12:58:44.584470  scan_bus: scanning of bus PCI: 00:1d.0 took 32766 usecs

 1051 12:58:44.587337  PCI: 00:1e.2 scanning...

 1052 12:58:44.591151  scan_generic_bus for PCI: 00:1e.2

 1053 12:58:44.594732  bus: PCI: 00:1e.2[0]->SPI: 00 enabled

 1054 12:58:44.598096  scan_generic_bus for PCI: 00:1e.2 done

 1055 12:58:44.604001  scan_bus: scanning of bus PCI: 00:1e.2 took 13983 usecs

 1056 12:58:44.604083  PCI: 00:1e.3 scanning...

 1057 12:58:44.610901  scan_generic_bus for PCI: 00:1e.3

 1058 12:58:44.614637  bus: PCI: 00:1e.3[0]->SPI: 01 enabled

 1059 12:58:44.618120  scan_generic_bus for PCI: 00:1e.3 done

 1060 12:58:44.624318  scan_bus: scanning of bus PCI: 00:1e.3 took 14044 usecs

 1061 12:58:44.624400  PCI: 00:1f.0 scanning...

 1062 12:58:44.627844  scan_static_bus for PCI: 00:1f.0

 1063 12:58:44.631293  PNP: 0c09.0 enabled

 1064 12:58:44.634162  scan_static_bus for PCI: 00:1f.0 done

 1065 12:58:44.641109  scan_bus: scanning of bus PCI: 00:1f.0 took 12039 usecs

 1066 12:58:44.644449  PCI: 00:1f.3 scanning...

 1067 12:58:44.647160  scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs

 1068 12:58:44.650582  PCI: 00:1f.4 scanning...

 1069 12:58:44.653987  scan_generic_bus for PCI: 00:1f.4

 1070 12:58:44.657572  scan_generic_bus for PCI: 00:1f.4 done

 1071 12:58:44.664253  scan_bus: scanning of bus PCI: 00:1f.4 took 10195 usecs

 1072 12:58:44.667265  PCI: 00:1f.5 scanning...

 1073 12:58:44.670666  scan_generic_bus for PCI: 00:1f.5

 1074 12:58:44.674035  scan_generic_bus for PCI: 00:1f.5 done

 1075 12:58:44.680551  scan_bus: scanning of bus PCI: 00:1f.5 took 10204 usecs

 1076 12:58:44.687127  scan_bus: scanning of bus DOMAIN: 0000 took 605026 usecs

 1077 12:58:44.690548  scan_static_bus for Root Device done

 1078 12:58:44.693844  scan_bus: scanning of bus Root Device took 624896 usecs

 1079 12:58:44.697030  done

 1080 12:58:44.697111  Chrome EC: UHEPI supported

 1081 12:58:44.703884  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

 1082 12:58:44.710591  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1083 12:58:44.717458  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

 1084 12:58:44.724715  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)

 1085 12:58:44.727193  SPI flash protection: WPSW=0 SRP0=0

 1086 12:58:44.733830  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1087 12:58:44.737270  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2

 1088 12:58:44.740490  found VGA at PCI: 00:02.0

 1089 12:58:44.743749  Setting up VGA for PCI: 00:02.0

 1090 12:58:44.746844  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1091 12:58:44.753878  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1092 12:58:44.756979  Allocating resources...

 1093 12:58:44.757064  Reading resources...

 1094 12:58:44.763662  Root Device read_resources bus 0 link: 0

 1095 12:58:44.766875  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1096 12:58:44.773612  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1097 12:58:44.777099  DOMAIN: 0000 read_resources bus 0 link: 0

 1098 12:58:44.783611  PCI: 00:14.0 read_resources bus 0 link: 0

 1099 12:58:44.787045  USB0 port 0 read_resources bus 0 link: 0

 1100 12:58:44.795240  USB0 port 0 read_resources bus 0 link: 0 done

 1101 12:58:44.797886  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1102 12:58:44.805552  PCI: 00:15.0 read_resources bus 1 link: 0

 1103 12:58:44.808837  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1104 12:58:44.815751  PCI: 00:15.1 read_resources bus 2 link: 0

 1105 12:58:44.818607  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1106 12:58:44.826092  PCI: 00:19.0 read_resources bus 3 link: 0

 1107 12:58:44.832610  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1108 12:58:44.836391  PCI: 00:1d.0 read_resources bus 1 link: 0

 1109 12:58:44.842870  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1110 12:58:44.846377  PCI: 00:1e.2 read_resources bus 4 link: 0

 1111 12:58:44.852508  PCI: 00:1e.2 read_resources bus 4 link: 0 done

 1112 12:58:44.856059  PCI: 00:1e.3 read_resources bus 5 link: 0

 1113 12:58:44.862994  PCI: 00:1e.3 read_resources bus 5 link: 0 done

 1114 12:58:44.865841  PCI: 00:1f.0 read_resources bus 0 link: 0

 1115 12:58:44.872436  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1116 12:58:44.879365  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1117 12:58:44.882678  Root Device read_resources bus 0 link: 0 done

 1118 12:58:44.885624  Done reading resources.

 1119 12:58:44.888932  Show resources in subtree (Root Device)...After reading.

 1120 12:58:44.895596   Root Device child on link 0 CPU_CLUSTER: 0

 1121 12:58:44.898919    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1122 12:58:44.899002     APIC: 00

 1123 12:58:44.902603     APIC: 02

 1124 12:58:44.902685     APIC: 07

 1125 12:58:44.905954     APIC: 01

 1126 12:58:44.906037     APIC: 03

 1127 12:58:44.906121     APIC: 06

 1128 12:58:44.909298     APIC: 04

 1129 12:58:44.909381     APIC: 05

 1130 12:58:44.912620    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1131 12:58:44.962595    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1132 12:58:44.962921    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1133 12:58:44.963373     PCI: 00:00.0

 1134 12:58:44.963635     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1135 12:58:44.964424     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1136 12:58:44.964688     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1137 12:58:45.012073     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1138 12:58:45.012343     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1139 12:58:45.012618     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1140 12:58:45.013318     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1141 12:58:45.013610     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1142 12:58:45.030162     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1143 12:58:45.033409     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1144 12:58:45.036709     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1145 12:58:45.047206     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1146 12:58:45.057165     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1147 12:58:45.066250     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1148 12:58:45.076378     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1149 12:58:45.083780     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1150 12:58:45.086549     PCI: 00:02.0

 1151 12:58:45.096232     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1152 12:58:45.106057     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1153 12:58:45.115782     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1154 12:58:45.115865     PCI: 00:04.0

 1155 12:58:45.119552     PCI: 00:08.0

 1156 12:58:45.129363     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1157 12:58:45.129447     PCI: 00:12.0

 1158 12:58:45.139190     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1159 12:58:45.145862     PCI: 00:14.0 child on link 0 USB0 port 0

 1160 12:58:45.155542     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1161 12:58:45.158863      USB0 port 0 child on link 0 USB2 port 0

 1162 12:58:45.158995       USB2 port 0

 1163 12:58:45.161942       USB2 port 1

 1164 12:58:45.162024       USB2 port 2

 1165 12:58:45.165663       USB2 port 3

 1166 12:58:45.168968       USB2 port 5

 1167 12:58:45.169049       USB2 port 6

 1168 12:58:45.172065       USB2 port 9

 1169 12:58:45.172146       USB3 port 0

 1170 12:58:45.175829       USB3 port 1

 1171 12:58:45.175911       USB3 port 2

 1172 12:58:45.179171       USB3 port 3

 1173 12:58:45.179253       USB3 port 4

 1174 12:58:45.182187     PCI: 00:14.2

 1175 12:58:45.191716     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1176 12:58:45.201750     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1177 12:58:45.201834     PCI: 00:14.3

 1178 12:58:45.212164     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1179 12:58:45.218266     PCI: 00:15.0 child on link 0 I2C: 01:15

 1180 12:58:45.228254     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1181 12:58:45.228338      I2C: 01:15

 1182 12:58:45.231509     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1183 12:58:45.241756     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1184 12:58:45.244752      I2C: 02:5d

 1185 12:58:45.244834      GENERIC: 0.0

 1186 12:58:45.248334     PCI: 00:16.0

 1187 12:58:45.257873     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1188 12:58:45.257956     PCI: 00:17.0

 1189 12:58:45.267590     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1190 12:58:45.277831     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1191 12:58:45.284373     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1192 12:58:45.294408     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1193 12:58:45.301025     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1194 12:58:45.310976     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1195 12:58:45.314013     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1196 12:58:45.324308     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1197 12:58:45.327598      I2C: 03:1a

 1198 12:58:45.327727      I2C: 03:38

 1199 12:58:45.330627      I2C: 03:39

 1200 12:58:45.330709      I2C: 03:3a

 1201 12:58:45.334132      I2C: 03:3b

 1202 12:58:45.337535     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1203 12:58:45.347269     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1204 12:58:45.357306     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1205 12:58:45.363781     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1206 12:58:45.366978      PCI: 01:00.0

 1207 12:58:45.376823      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1208 12:58:45.376906     PCI: 00:1e.0

 1209 12:58:45.390251     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1210 12:58:45.400316     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1211 12:58:45.403566     PCI: 00:1e.2 child on link 0 SPI: 00

 1212 12:58:45.413592     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1213 12:58:45.413717      SPI: 00

 1214 12:58:45.420443     PCI: 00:1e.3 child on link 0 SPI: 01

 1215 12:58:45.430126     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1216 12:58:45.430252      SPI: 01

 1217 12:58:45.433212     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1218 12:58:45.443363     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1219 12:58:45.453035     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1220 12:58:45.453153      PNP: 0c09.0

 1221 12:58:45.463171      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1222 12:58:45.463254     PCI: 00:1f.3

 1223 12:58:45.472798     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1224 12:58:45.483128     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1225 12:58:45.486347     PCI: 00:1f.4

 1226 12:58:45.496570     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1227 12:58:45.502920     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1228 12:58:45.506215     PCI: 00:1f.5

 1229 12:58:45.515998     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1230 12:58:45.522718  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1231 12:58:45.529133  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1232 12:58:45.535810  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1233 12:58:45.539127  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1234 12:58:45.542802  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1235 12:58:45.545514  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1236 12:58:45.549207  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1237 12:58:45.555677  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1238 12:58:45.562600  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1239 12:58:45.568633  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1240 12:58:45.578816  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1241 12:58:45.585455  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1242 12:58:45.589051  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1243 12:58:45.598796  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1244 12:58:45.601847  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1245 12:58:45.605387  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1246 12:58:45.611986  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem

 1247 12:58:45.615537  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem

 1248 12:58:45.621842  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem

 1249 12:58:45.625087  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem

 1250 12:58:45.631602  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem

 1251 12:58:45.635202  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem

 1252 12:58:45.642016  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem

 1253 12:58:45.645342  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem

 1254 12:58:45.651658  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem

 1255 12:58:45.654844  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem

 1256 12:58:45.661663  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem

 1257 12:58:45.664798  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem

 1258 12:58:45.668113  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem

 1259 12:58:45.675178  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem

 1260 12:58:45.678431  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem

 1261 12:58:45.684670  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem

 1262 12:58:45.688435  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem

 1263 12:58:45.694976  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem

 1264 12:58:45.698190  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem

 1265 12:58:45.704842  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem

 1266 12:58:45.708241  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem

 1267 12:58:45.717920  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done

 1268 12:58:45.721566  avoid_fixed_resources: DOMAIN: 0000

 1269 12:58:45.728257  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1270 12:58:45.731189  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1271 12:58:45.741493  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1272 12:58:45.747571  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)

 1273 12:58:45.754377  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)

 1274 12:58:45.764852  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)

 1275 12:58:45.770763  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)

 1276 12:58:45.777660  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1277 12:58:45.787383  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1278 12:58:45.794315  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1279 12:58:45.800782  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1280 12:58:45.807332  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1281 12:58:45.811042  Setting resources...

 1282 12:58:45.817272  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1283 12:58:45.820791  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1284 12:58:45.823719  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1285 12:58:45.830301  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1286 12:58:45.833897  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1287 12:58:45.840253  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1288 12:58:45.843679  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1289 12:58:45.850380  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1290 12:58:45.860190  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff

 1291 12:58:45.863368  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1292 12:58:45.870022  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1293 12:58:45.873669  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1294 12:58:45.880014  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem

 1295 12:58:45.883487  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem

 1296 12:58:45.889918  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem

 1297 12:58:45.893086  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem

 1298 12:58:45.900184  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem

 1299 12:58:45.903595  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem

 1300 12:58:45.910101  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem

 1301 12:58:45.913395  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem

 1302 12:58:45.916505  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem

 1303 12:58:45.923035  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem

 1304 12:58:45.926380  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem

 1305 12:58:45.932846  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem

 1306 12:58:45.936014  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem

 1307 12:58:45.942931  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem

 1308 12:58:45.946014  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem

 1309 12:58:45.952607  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem

 1310 12:58:45.956139  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem

 1311 12:58:45.963064  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem

 1312 12:58:45.966201  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem

 1313 12:58:45.972654  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem

 1314 12:58:45.979599  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done

 1315 12:58:45.985814  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1316 12:58:45.993047  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1317 12:58:46.002615  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1318 12:58:46.006006  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem

 1319 12:58:46.012673  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done

 1320 12:58:46.019244  Root Device assign_resources, bus 0 link: 0

 1321 12:58:46.022399  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1322 12:58:46.032420  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1323 12:58:46.038943  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1324 12:58:46.045578  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1325 12:58:46.055954  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64

 1326 12:58:46.062428  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64

 1327 12:58:46.072152  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64

 1328 12:58:46.075245  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1329 12:58:46.082424  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1330 12:58:46.088861  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64

 1331 12:58:46.098500  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64

 1332 12:58:46.105655  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64

 1333 12:58:46.115120  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64

 1334 12:58:46.118927  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1335 12:58:46.122084  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1336 12:58:46.132112  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64

 1337 12:58:46.135197  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1338 12:58:46.141577  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1339 12:58:46.148764  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64

 1340 12:58:46.158387  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem

 1341 12:58:46.165180  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem

 1342 12:58:46.171897  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1343 12:58:46.181482  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1344 12:58:46.188245  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1345 12:58:46.195392  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem

 1346 12:58:46.204888  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64

 1347 12:58:46.207995  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1348 12:58:46.214866  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1349 12:58:46.221356  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1350 12:58:46.231121  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1351 12:58:46.237927  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1352 12:58:46.244197  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1353 12:58:46.251055  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64

 1354 12:58:46.257603  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1355 12:58:46.264362  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64

 1356 12:58:46.274055  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64

 1357 12:58:46.277443  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1358 12:58:46.284344  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1359 12:58:46.290739  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64

 1360 12:58:46.293807  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1361 12:58:46.300717  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1362 12:58:46.303676  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1363 12:58:46.310363  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1364 12:58:46.314007  LPC: Trying to open IO window from 800 size 1ff

 1365 12:58:46.323483  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64

 1366 12:58:46.330650  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64

 1367 12:58:46.340643  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64

 1368 12:58:46.346679  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem

 1369 12:58:46.353857  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1370 12:58:46.356921  Root Device assign_resources, bus 0 link: 0

 1371 12:58:46.360177  Done setting resources.

 1372 12:58:46.366750  Show resources in subtree (Root Device)...After assigning values.

 1373 12:58:46.369933   Root Device child on link 0 CPU_CLUSTER: 0

 1374 12:58:46.373163    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1375 12:58:46.377103     APIC: 00

 1376 12:58:46.377182     APIC: 02

 1377 12:58:46.377245     APIC: 07

 1378 12:58:46.380179     APIC: 01

 1379 12:58:46.380258     APIC: 03

 1380 12:58:46.383391     APIC: 06

 1381 12:58:46.383470     APIC: 04

 1382 12:58:46.383533     APIC: 05

 1383 12:58:46.389660    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1384 12:58:46.399997    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1385 12:58:46.410039    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1386 12:58:46.413170     PCI: 00:00.0

 1387 12:58:46.419519     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1388 12:58:46.429314     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1389 12:58:46.439286     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1390 12:58:46.449307     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1391 12:58:46.458972     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1392 12:58:46.468676     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1393 12:58:46.475864     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1394 12:58:46.485570     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1395 12:58:46.495401     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1396 12:58:46.505220     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1397 12:58:46.515076     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1398 12:58:46.525155     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1399 12:58:46.531895     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1400 12:58:46.541987     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1401 12:58:46.551522     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1402 12:58:46.561272     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1403 12:58:46.561356     PCI: 00:02.0

 1404 12:58:46.574639     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1405 12:58:46.584537     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1406 12:58:46.594922     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1407 12:58:46.595005     PCI: 00:04.0

 1408 12:58:46.598000     PCI: 00:08.0

 1409 12:58:46.607783     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10

 1410 12:58:46.607866     PCI: 00:12.0

 1411 12:58:46.617668     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10

 1412 12:58:46.623886     PCI: 00:14.0 child on link 0 USB0 port 0

 1413 12:58:46.634062     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10

 1414 12:58:46.637416      USB0 port 0 child on link 0 USB2 port 0

 1415 12:58:46.640734       USB2 port 0

 1416 12:58:46.640815       USB2 port 1

 1417 12:58:46.643827       USB2 port 2

 1418 12:58:46.643908       USB2 port 3

 1419 12:58:46.647027       USB2 port 5

 1420 12:58:46.647107       USB2 port 6

 1421 12:58:46.650988       USB2 port 9

 1422 12:58:46.651070       USB3 port 0

 1423 12:58:46.653835       USB3 port 1

 1424 12:58:46.657446       USB3 port 2

 1425 12:58:46.657527       USB3 port 3

 1426 12:58:46.660854       USB3 port 4

 1427 12:58:46.660935     PCI: 00:14.2

 1428 12:58:46.670896     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10

 1429 12:58:46.680120     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18

 1430 12:58:46.683676     PCI: 00:14.3

 1431 12:58:46.693536     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10

 1432 12:58:46.696547     PCI: 00:15.0 child on link 0 I2C: 01:15

 1433 12:58:46.706564     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10

 1434 12:58:46.710115      I2C: 01:15

 1435 12:58:46.713210     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1436 12:58:46.722997     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10

 1437 12:58:46.726651      I2C: 02:5d

 1438 12:58:46.726733      GENERIC: 0.0

 1439 12:58:46.729940     PCI: 00:16.0

 1440 12:58:46.740154     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10

 1441 12:58:46.740237     PCI: 00:17.0

 1442 12:58:46.752846     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10

 1443 12:58:46.763114     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14

 1444 12:58:46.769131     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1445 12:58:46.779118     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1446 12:58:46.789305     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1447 12:58:46.798992     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24

 1448 12:58:46.802347     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1449 12:58:46.812412     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10

 1450 12:58:46.815865      I2C: 03:1a

 1451 12:58:46.815948      I2C: 03:38

 1452 12:58:46.819059      I2C: 03:39

 1453 12:58:46.819165      I2C: 03:3a

 1454 12:58:46.822061      I2C: 03:3b

 1455 12:58:46.825717     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1456 12:58:46.835555     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1457 12:58:46.845698     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1458 12:58:46.855494     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1459 12:58:46.858957      PCI: 01:00.0

 1460 12:58:46.868891      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10

 1461 12:58:46.868976     PCI: 00:1e.0

 1462 12:58:46.881799     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1463 12:58:46.892065     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18

 1464 12:58:46.895152     PCI: 00:1e.2 child on link 0 SPI: 00

 1465 12:58:46.904852     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10

 1466 12:58:46.904936      SPI: 00

 1467 12:58:46.911286     PCI: 00:1e.3 child on link 0 SPI: 01

 1468 12:58:46.921282     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10

 1469 12:58:46.921408      SPI: 01

 1470 12:58:46.924811     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1471 12:58:46.934638     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1472 12:58:46.944419     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1473 12:58:46.944546      PNP: 0c09.0

 1474 12:58:46.954790      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1475 12:58:46.954917     PCI: 00:1f.3

 1476 12:58:46.964515     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10

 1477 12:58:46.977698     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20

 1478 12:58:46.977826     PCI: 00:1f.4

 1479 12:58:46.987394     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1480 12:58:46.997861     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10

 1481 12:58:46.997989     PCI: 00:1f.5

 1482 12:58:47.010819     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10

 1483 12:58:47.010946  Done allocating resources.

 1484 12:58:47.017117  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0

 1485 12:58:47.020668  Enabling resources...

 1486 12:58:47.023749  PCI: 00:00.0 subsystem <- 8086/9b61

 1487 12:58:47.027278  PCI: 00:00.0 cmd <- 06

 1488 12:58:47.030508  PCI: 00:02.0 subsystem <- 8086/9b41

 1489 12:58:47.034184  PCI: 00:02.0 cmd <- 03

 1490 12:58:47.037247  PCI: 00:08.0 cmd <- 06

 1491 12:58:47.040531  PCI: 00:12.0 subsystem <- 8086/02f9

 1492 12:58:47.043873  PCI: 00:12.0 cmd <- 02

 1493 12:58:47.047207  PCI: 00:14.0 subsystem <- 8086/02ed

 1494 12:58:47.047328  PCI: 00:14.0 cmd <- 02

 1495 12:58:47.050380  PCI: 00:14.2 cmd <- 02

 1496 12:58:47.053974  PCI: 00:14.3 subsystem <- 8086/02f0

 1497 12:58:47.057557  PCI: 00:14.3 cmd <- 02

 1498 12:58:47.060706  PCI: 00:15.0 subsystem <- 8086/02e8

 1499 12:58:47.064070  PCI: 00:15.0 cmd <- 02

 1500 12:58:47.067262  PCI: 00:15.1 subsystem <- 8086/02e9

 1501 12:58:47.070569  PCI: 00:15.1 cmd <- 02

 1502 12:58:47.073554  PCI: 00:16.0 subsystem <- 8086/02e0

 1503 12:58:47.077035  PCI: 00:16.0 cmd <- 02

 1504 12:58:47.080270  PCI: 00:17.0 subsystem <- 8086/02d3

 1505 12:58:47.083987  PCI: 00:17.0 cmd <- 03

 1506 12:58:47.087046  PCI: 00:19.0 subsystem <- 8086/02c5

 1507 12:58:47.090568  PCI: 00:19.0 cmd <- 02

 1508 12:58:47.093611  PCI: 00:1d.0 bridge ctrl <- 0013

 1509 12:58:47.096921  PCI: 00:1d.0 subsystem <- 8086/02b0

 1510 12:58:47.097046  PCI: 00:1d.0 cmd <- 06

 1511 12:58:47.103808  PCI: 00:1e.0 subsystem <- 8086/02a8

 1512 12:58:47.103931  PCI: 00:1e.0 cmd <- 06

 1513 12:58:47.107168  PCI: 00:1e.2 subsystem <- 8086/02aa

 1514 12:58:47.110627  PCI: 00:1e.2 cmd <- 06

 1515 12:58:47.114018  PCI: 00:1e.3 subsystem <- 8086/02ab

 1516 12:58:47.116858  PCI: 00:1e.3 cmd <- 02

 1517 12:58:47.120158  PCI: 00:1f.0 subsystem <- 8086/0284

 1518 12:58:47.123544  PCI: 00:1f.0 cmd <- 407

 1519 12:58:47.126836  PCI: 00:1f.3 subsystem <- 8086/02c8

 1520 12:58:47.130392  PCI: 00:1f.3 cmd <- 02

 1521 12:58:47.133771  PCI: 00:1f.4 subsystem <- 8086/02a3

 1522 12:58:47.137136  PCI: 00:1f.4 cmd <- 03

 1523 12:58:47.140623  PCI: 00:1f.5 subsystem <- 8086/02a4

 1524 12:58:47.143607  PCI: 00:1f.5 cmd <- 406

 1525 12:58:47.151623  PCI: 01:00.0 cmd <- 02

 1526 12:58:47.156381  done.

 1527 12:58:47.164854  ME: Version: 14.0.39.1367

 1528 12:58:47.171488  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 8

 1529 12:58:47.174918  Initializing devices...

 1530 12:58:47.175041  Root Device init ...

 1531 12:58:47.181642  Chrome EC: Set SMI mask to 0x0000000000000000

 1532 12:58:47.184471  Chrome EC: clear events_b mask to 0x0000000000000000

 1533 12:58:47.191809  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1534 12:58:47.198127  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006

 1535 12:58:47.204721  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006

 1536 12:58:47.207980  Chrome EC: Set WAKE mask to 0x0000000000000000

 1537 12:58:47.211195  Root Device init finished in 35205 usecs

 1538 12:58:47.215083  CPU_CLUSTER: 0 init ...

 1539 12:58:47.221524  CPU_CLUSTER: 0 init finished in 2449 usecs

 1540 12:58:47.225916  PCI: 00:00.0 init ...

 1541 12:58:47.229156  CPU TDP: 15 Watts

 1542 12:58:47.232399  CPU PL2 = 64 Watts

 1543 12:58:47.235565  PCI: 00:00.0 init finished in 7082 usecs

 1544 12:58:47.238799  PCI: 00:02.0 init ...

 1545 12:58:47.242491  PCI: 00:02.0 init finished in 2254 usecs

 1546 12:58:47.245810  PCI: 00:08.0 init ...

 1547 12:58:47.248677  PCI: 00:08.0 init finished in 2253 usecs

 1548 12:58:47.251965  PCI: 00:12.0 init ...

 1549 12:58:47.255532  PCI: 00:12.0 init finished in 2253 usecs

 1550 12:58:47.259065  PCI: 00:14.0 init ...

 1551 12:58:47.262010  PCI: 00:14.0 init finished in 2243 usecs

 1552 12:58:47.265344  PCI: 00:14.2 init ...

 1553 12:58:47.268905  PCI: 00:14.2 init finished in 2252 usecs

 1554 12:58:47.272192  PCI: 00:14.3 init ...

 1555 12:58:47.275340  PCI: 00:14.3 init finished in 2272 usecs

 1556 12:58:47.278844  PCI: 00:15.0 init ...

 1557 12:58:47.282378  DW I2C bus 0 at 0xd121f000 (400 KHz)

 1558 12:58:47.285156  PCI: 00:15.0 init finished in 5978 usecs

 1559 12:58:47.288647  PCI: 00:15.1 init ...

 1560 12:58:47.291920  DW I2C bus 1 at 0xd1220000 (400 KHz)

 1561 12:58:47.298136  PCI: 00:15.1 init finished in 5978 usecs

 1562 12:58:47.298259  PCI: 00:16.0 init ...

 1563 12:58:47.305193  PCI: 00:16.0 init finished in 2244 usecs

 1564 12:58:47.308044  PCI: 00:19.0 init ...

 1565 12:58:47.311364  DW I2C bus 4 at 0xd1222000 (400 KHz)

 1566 12:58:47.314837  PCI: 00:19.0 init finished in 5980 usecs

 1567 12:58:47.318297  PCI: 00:1d.0 init ...

 1568 12:58:47.321731  Initializing PCH PCIe bridge.

 1569 12:58:47.324882  PCI: 00:1d.0 init finished in 5287 usecs

 1570 12:58:47.328019  PCI: 00:1f.0 init ...

 1571 12:58:47.331265  IOAPIC: Initializing IOAPIC at 0xfec00000

 1572 12:58:47.337782  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1573 12:58:47.337906  IOAPIC: ID = 0x02

 1574 12:58:47.341437  IOAPIC: Dumping registers

 1575 12:58:47.344613    reg 0x0000: 0x02000000

 1576 12:58:47.348077    reg 0x0001: 0x00770020

 1577 12:58:47.348201    reg 0x0002: 0x00000000

 1578 12:58:47.354669  PCI: 00:1f.0 init finished in 23547 usecs

 1579 12:58:47.358015  PCI: 00:1f.4 init ...

 1580 12:58:47.361121  PCI: 00:1f.4 init finished in 2262 usecs

 1581 12:58:47.371881  PCI: 01:00.0 init ...

 1582 12:58:47.374875  PCI: 01:00.0 init finished in 2254 usecs

 1583 12:58:47.379180  PNP: 0c09.0 init ...

 1584 12:58:47.383004  Google Chrome EC uptime: 11.098 seconds

 1585 12:58:47.389176  Google Chrome AP resets since EC boot: 0

 1586 12:58:47.392515  Google Chrome most recent AP reset causes:

 1587 12:58:47.400011  Google Chrome EC reset flags at last EC boot: reset-pin

 1588 12:58:47.402377  PNP: 0c09.0 init finished in 20579 usecs

 1589 12:58:47.405880  Devices initialized

 1590 12:58:47.406001  Show all devs... After init.

 1591 12:58:47.409619  Root Device: enabled 1

 1592 12:58:47.412520  CPU_CLUSTER: 0: enabled 1

 1593 12:58:47.415725  DOMAIN: 0000: enabled 1

 1594 12:58:47.415843  APIC: 00: enabled 1

 1595 12:58:47.419198  PCI: 00:00.0: enabled 1

 1596 12:58:47.422526  PCI: 00:02.0: enabled 1

 1597 12:58:47.426035  PCI: 00:04.0: enabled 0

 1598 12:58:47.426158  PCI: 00:05.0: enabled 0

 1599 12:58:47.428964  PCI: 00:12.0: enabled 1

 1600 12:58:47.432272  PCI: 00:12.5: enabled 0

 1601 12:58:47.432394  PCI: 00:12.6: enabled 0

 1602 12:58:47.435921  PCI: 00:14.0: enabled 1

 1603 12:58:47.438928  PCI: 00:14.1: enabled 0

 1604 12:58:47.442598  PCI: 00:14.3: enabled 1

 1605 12:58:47.442720  PCI: 00:14.5: enabled 0

 1606 12:58:47.445444  PCI: 00:15.0: enabled 1

 1607 12:58:47.448780  PCI: 00:15.1: enabled 1

 1608 12:58:47.452294  PCI: 00:15.2: enabled 0

 1609 12:58:47.452416  PCI: 00:15.3: enabled 0

 1610 12:58:47.455618  PCI: 00:16.0: enabled 1

 1611 12:58:47.458667  PCI: 00:16.1: enabled 0

 1612 12:58:47.462271  PCI: 00:16.2: enabled 0

 1613 12:58:47.462391  PCI: 00:16.3: enabled 0

 1614 12:58:47.465366  PCI: 00:16.4: enabled 0

 1615 12:58:47.468846  PCI: 00:16.5: enabled 0

 1616 12:58:47.471979  PCI: 00:17.0: enabled 1

 1617 12:58:47.472102  PCI: 00:19.0: enabled 1

 1618 12:58:47.475314  PCI: 00:19.1: enabled 0

 1619 12:58:47.478541  PCI: 00:19.2: enabled 0

 1620 12:58:47.478663  PCI: 00:1a.0: enabled 0

 1621 12:58:47.481930  PCI: 00:1c.0: enabled 0

 1622 12:58:47.485125  PCI: 00:1c.1: enabled 0

 1623 12:58:47.488922  PCI: 00:1c.2: enabled 0

 1624 12:58:47.489047  PCI: 00:1c.3: enabled 0

 1625 12:58:47.492076  PCI: 00:1c.4: enabled 0

 1626 12:58:47.495094  PCI: 00:1c.5: enabled 0

 1627 12:58:47.498927  PCI: 00:1c.6: enabled 0

 1628 12:58:47.499054  PCI: 00:1c.7: enabled 0

 1629 12:58:47.501649  PCI: 00:1d.0: enabled 1

 1630 12:58:47.504917  PCI: 00:1d.1: enabled 0

 1631 12:58:47.508757  PCI: 00:1d.2: enabled 0

 1632 12:58:47.508882  PCI: 00:1d.3: enabled 0

 1633 12:58:47.512205  PCI: 00:1d.4: enabled 0

 1634 12:58:47.515357  PCI: 00:1d.5: enabled 0

 1635 12:58:47.518177  PCI: 00:1e.0: enabled 1

 1636 12:58:47.518306  PCI: 00:1e.1: enabled 0

 1637 12:58:47.521692  PCI: 00:1e.2: enabled 1

 1638 12:58:47.524822  PCI: 00:1e.3: enabled 1

 1639 12:58:47.524975  PCI: 00:1f.0: enabled 1

 1640 12:58:47.528870  PCI: 00:1f.1: enabled 0

 1641 12:58:47.531340  PCI: 00:1f.2: enabled 0

 1642 12:58:47.534813  PCI: 00:1f.3: enabled 1

 1643 12:58:47.534952  PCI: 00:1f.4: enabled 1

 1644 12:58:47.537882  PCI: 00:1f.5: enabled 1

 1645 12:58:47.541304  PCI: 00:1f.6: enabled 0

 1646 12:58:47.544585  USB0 port 0: enabled 1

 1647 12:58:47.544732  I2C: 01:15: enabled 1

 1648 12:58:47.547775  I2C: 02:5d: enabled 1

 1649 12:58:47.551152  GENERIC: 0.0: enabled 1

 1650 12:58:47.551278  I2C: 03:1a: enabled 1

 1651 12:58:47.554618  I2C: 03:38: enabled 1

 1652 12:58:47.558098  I2C: 03:39: enabled 1

 1653 12:58:47.558229  I2C: 03:3a: enabled 1

 1654 12:58:47.561466  I2C: 03:3b: enabled 1

 1655 12:58:47.564661  PCI: 00:00.0: enabled 1

 1656 12:58:47.564795  SPI: 00: enabled 1

 1657 12:58:47.567565  SPI: 01: enabled 1

 1658 12:58:47.570957  PNP: 0c09.0: enabled 1

 1659 12:58:47.571073  USB2 port 0: enabled 1

 1660 12:58:47.574160  USB2 port 1: enabled 1

 1661 12:58:47.577675  USB2 port 2: enabled 0

 1662 12:58:47.580927  USB2 port 3: enabled 0

 1663 12:58:47.581010  USB2 port 5: enabled 0

 1664 12:58:47.584368  USB2 port 6: enabled 1

 1665 12:58:47.587559  USB2 port 9: enabled 1

 1666 12:58:47.587657  USB3 port 0: enabled 1

 1667 12:58:47.590529  USB3 port 1: enabled 1

 1668 12:58:47.594588  USB3 port 2: enabled 1

 1669 12:58:47.597546  USB3 port 3: enabled 1

 1670 12:58:47.597660  USB3 port 4: enabled 0

 1671 12:58:47.600613  APIC: 02: enabled 1

 1672 12:58:47.600714  APIC: 07: enabled 1

 1673 12:58:47.604044  APIC: 01: enabled 1

 1674 12:58:47.607327  APIC: 03: enabled 1

 1675 12:58:47.607457  APIC: 06: enabled 1

 1676 12:58:47.610615  APIC: 04: enabled 1

 1677 12:58:47.613588  APIC: 05: enabled 1

 1678 12:58:47.613746  PCI: 00:08.0: enabled 1

 1679 12:58:47.617153  PCI: 00:14.2: enabled 1

 1680 12:58:47.620272  PCI: 01:00.0: enabled 1

 1681 12:58:47.624475  Disabling ACPI via APMC:

 1682 12:58:47.627394  done.

 1683 12:58:47.630718  FMAP: area RW_ELOG found @ af0000 (16384 bytes)

 1684 12:58:47.633897  ELOG: NV offset 0xaf0000 size 0x4000

 1685 12:58:47.640651  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1686 12:58:47.647483  ELOG: Event(17) added with size 13 at 2023-09-23 12:57:18 UTC

 1687 12:58:47.654335  POST: Unexpected post code in previous boot: 0x73

 1688 12:58:47.660838  ELOG: Event(A3) added with size 11 at 2023-09-23 12:57:18 UTC

 1689 12:58:47.668140  ELOG: Event(A6) added with size 13 at 2023-09-23 12:57:18 UTC

 1690 12:58:47.674328  ELOG: Event(92) added with size 9 at 2023-09-23 12:57:18 UTC

 1691 12:58:47.677793  ELOG: Event(93) added with size 9 at 2023-09-23 12:57:18 UTC

 1692 12:58:47.684097  ELOG: Event(9A) added with size 9 at 2023-09-23 12:57:18 UTC

 1693 12:58:47.690861  ELOG: Event(9E) added with size 10 at 2023-09-23 12:57:18 UTC

 1694 12:58:47.697788  ELOG: Event(9F) added with size 14 at 2023-09-23 12:57:18 UTC

 1695 12:58:47.703967  BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6

 1696 12:58:47.710579  ELOG: Event(A1) added with size 10 at 2023-09-23 12:57:18 UTC

 1697 12:58:47.717628  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1698 12:58:47.723752  ELOG: Event(A0) added with size 9 at 2023-09-23 12:57:18 UTC

 1699 12:58:47.727311  elog_add_boot_reason: Logged dev mode boot

 1700 12:58:47.730133  Finalize devices...

 1701 12:58:47.733549  PCI: 00:17.0 final

 1702 12:58:47.733634  Devices finalized

 1703 12:58:47.740350  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)

 1704 12:58:47.743390  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0

 1705 12:58:47.750233  ME: HFSTS1                  : 0x90000245

 1706 12:58:47.753724  ME: HFSTS2                  : 0x3B850126

 1707 12:58:47.756762  ME: HFSTS3                  : 0x00000020

 1708 12:58:47.760034  ME: HFSTS4                  : 0x00004800

 1709 12:58:47.766607  ME: HFSTS5                  : 0x00000000

 1710 12:58:47.770473  ME: HFSTS6                  : 0x40400006

 1711 12:58:47.773614  ME: Manufacturing Mode      : NO

 1712 12:58:47.776508  ME: FW Partition Table      : OK

 1713 12:58:47.779960  ME: Bringup Loader Failure  : NO

 1714 12:58:47.783216  ME: Firmware Init Complete  : YES

 1715 12:58:47.786821  ME: Boot Options Present    : NO

 1716 12:58:47.790272  ME: Update In Progress      : NO

 1717 12:58:47.793054  ME: D0i3 Support            : YES

 1718 12:58:47.796641  ME: Low Power State Enabled : NO

 1719 12:58:47.799886  ME: CPU Replaced            : NO

 1720 12:58:47.803053  ME: CPU Replacement Valid   : YES

 1721 12:58:47.806975  ME: Current Working State   : 5

 1722 12:58:47.809596  ME: Current Operation State : 1

 1723 12:58:47.812919  ME: Current Operation Mode  : 0

 1724 12:58:47.816718  ME: Error Code              : 0

 1725 12:58:47.819711  ME: CPU Debug Disabled      : YES

 1726 12:58:47.822752  ME: TXT Support             : NO

 1727 12:58:47.826311  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 1728 12:58:47.833300  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1729 12:58:47.836701  CBFS @ c08000 size 3f8000

 1730 12:58:47.843311  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1731 12:58:47.845973  CBFS: Locating 'fallback/dsdt.aml'

 1732 12:58:47.849375  CBFS: Found @ offset 10bb80 size 3fa5

 1733 12:58:47.852831  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1734 12:58:47.856290  CBFS @ c08000 size 3f8000

 1735 12:58:47.862968  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1736 12:58:47.866323  CBFS: Locating 'fallback/slic'

 1737 12:58:47.869635  CBFS: 'fallback/slic' not found.

 1738 12:58:47.876358  ACPI: Writing ACPI tables at 99b3e000.

 1739 12:58:47.876474  ACPI:    * FACS

 1740 12:58:47.879519  ACPI:    * DSDT

 1741 12:58:47.882812  Ramoops buffer: 0x100000@0x99a3d000.

 1742 12:58:47.886599  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1743 12:58:47.892660  FMAP: area RW_VPD found @ af8000 (8192 bytes)

 1744 12:58:47.896190  Google Chrome EC: version:

 1745 12:58:47.899302  	ro: helios_v2.0.2659-56403530b

 1746 12:58:47.902660  	rw: helios_v2.0.2849-c41de27e7d

 1747 12:58:47.902742    running image: 1

 1748 12:58:47.906902  ACPI:    * FADT

 1749 12:58:47.906983  SCI is IRQ9

 1750 12:58:47.913556  ACPI: added table 1/32, length now 40

 1751 12:58:47.913683  ACPI:     * SSDT

 1752 12:58:47.916784  Found 1 CPU(s) with 8 core(s) each.

 1753 12:58:47.920208  Error: Could not locate 'wifi_sar' in VPD.

 1754 12:58:47.926701  Checking CBFS for default SAR values

 1755 12:58:47.929830  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1756 12:58:47.933897  CBFS @ c08000 size 3f8000

 1757 12:58:47.940138  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1758 12:58:47.943428  CBFS: Locating 'wifi_sar_defaults.hex'

 1759 12:58:47.946428  CBFS: Found @ offset 5fac0 size 77

 1760 12:58:47.949877  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3

 1761 12:58:47.956469  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15

 1762 12:58:47.960355  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d

 1763 12:58:47.966532  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a

 1764 12:58:47.969993  failed to find key in VPD: dsm_calib_r0_0

 1765 12:58:47.979623  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0

 1766 12:58:47.983068  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h

 1767 12:58:47.986325  failed to find key in VPD: dsm_calib_r0_1

 1768 12:58:47.996161  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0

 1769 12:58:48.002783  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h

 1770 12:58:48.006157  failed to find key in VPD: dsm_calib_r0_2

 1771 12:58:48.016088  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0

 1772 12:58:48.019484  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah

 1773 12:58:48.026317  failed to find key in VPD: dsm_calib_r0_3

 1774 12:58:48.032750  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0

 1775 12:58:48.039212  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh

 1776 12:58:48.042952  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1777 12:58:48.046064  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01

 1778 12:58:48.049763  EC returned error result code 1

 1779 12:58:48.053531  EC returned error result code 1

 1780 12:58:48.057702  EC returned error result code 1

 1781 12:58:48.063966  PS2K: Bad resp from EC. Vivaldi disabled!

 1782 12:58:48.067280  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1783 12:58:48.073925  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1

 1784 12:58:48.080583  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6

 1785 12:58:48.083859  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1786 12:58:48.090515  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1787 12:58:48.097242  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1

 1788 12:58:48.103978  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1789 12:58:48.106717  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3

 1790 12:58:48.113709  ACPI: added table 2/32, length now 44

 1791 12:58:48.113792  ACPI:    * MCFG

 1792 12:58:48.116636  ACPI: added table 3/32, length now 48

 1793 12:58:48.120225  ACPI:    * TPM2

 1794 12:58:48.123847  TPM2 log created at 99a2d000

 1795 12:58:48.127233  ACPI: added table 4/32, length now 52

 1796 12:58:48.127314  ACPI:    * MADT

 1797 12:58:48.129993  SCI is IRQ9

 1798 12:58:48.133356  ACPI: added table 5/32, length now 56

 1799 12:58:48.133438  current = 99b43ac0

 1800 12:58:48.136624  ACPI:    * DMAR

 1801 12:58:48.140189  ACPI: added table 6/32, length now 60

 1802 12:58:48.143676  ACPI:    * IGD OpRegion

 1803 12:58:48.143771  GMA: Found VBT in CBFS

 1804 12:58:48.146804  GMA: Found valid VBT in CBFS

 1805 12:58:48.150380  ACPI: added table 7/32, length now 64

 1806 12:58:48.153707  ACPI:    * HPET

 1807 12:58:48.156741  ACPI: added table 8/32, length now 68

 1808 12:58:48.156863  ACPI: done.

 1809 12:58:48.160307  ACPI tables: 31744 bytes.

 1810 12:58:48.164258  smbios_write_tables: 99a2c000

 1811 12:58:48.167447  EC returned error result code 3

 1812 12:58:48.170412  Couldn't obtain OEM name from CBI

 1813 12:58:48.173636  Create SMBIOS type 17

 1814 12:58:48.176633  PCI: 00:00.0 (Intel Cannonlake)

 1815 12:58:48.180454  PCI: 00:14.3 (Intel WiFi)

 1816 12:58:48.183643  SMBIOS tables: 939 bytes.

 1817 12:58:48.186604  Writing table forward entry at 0x00000500

 1818 12:58:48.193573  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628

 1819 12:58:48.196926  Writing coreboot table at 0x99b62000

 1820 12:58:48.203519   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1821 12:58:48.206948   1. 0000000000001000-000000000009ffff: RAM

 1822 12:58:48.209957   2. 00000000000a0000-00000000000fffff: RESERVED

 1823 12:58:48.216507   3. 0000000000100000-0000000099a2bfff: RAM

 1824 12:58:48.219911   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES

 1825 12:58:48.226881   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE

 1826 12:58:48.233197   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES

 1827 12:58:48.236566   7. 000000009a000000-000000009f7fffff: RESERVED

 1828 12:58:48.242917   8. 00000000e0000000-00000000efffffff: RESERVED

 1829 12:58:48.246536   9. 00000000fc000000-00000000fc000fff: RESERVED

 1830 12:58:48.249451  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1831 12:58:48.256371  11. 00000000fed10000-00000000fed17fff: RESERVED

 1832 12:58:48.259367  12. 00000000fed80000-00000000fed83fff: RESERVED

 1833 12:58:48.266218  13. 00000000fed90000-00000000fed91fff: RESERVED

 1834 12:58:48.269473  14. 00000000feda0000-00000000feda1fff: RESERVED

 1835 12:58:48.275877  15. 0000000100000000-000000045e7fffff: RAM

 1836 12:58:48.279561  Graphics framebuffer located at 0xc0000000

 1837 12:58:48.282700  Passing 5 GPIOs to payload:

 1838 12:58:48.286348              NAME |       PORT | POLARITY |     VALUE

 1839 12:58:48.292396     write protect |  undefined |     high |       low

 1840 12:58:48.295911               lid |  undefined |     high |      high

 1841 12:58:48.302574             power |  undefined |     high |       low

 1842 12:58:48.309267             oprom |  undefined |     high |       low

 1843 12:58:48.312592          EC in RW | 0x000000cb |     high |       low

 1844 12:58:48.315594  Board ID: 4

 1845 12:58:48.319583  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1846 12:58:48.322609  CBFS @ c08000 size 3f8000

 1847 12:58:48.329160  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1848 12:58:48.332453  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87

 1849 12:58:48.335824  coreboot table: 1492 bytes.

 1850 12:58:48.339316  IMD ROOT    0. 99fff000 00001000

 1851 12:58:48.342659  IMD SMALL   1. 99ffe000 00001000

 1852 12:58:48.345740  FSP MEMORY  2. 99c4e000 003b0000

 1853 12:58:48.349115  CONSOLE     3. 99c2e000 00020000

 1854 12:58:48.352530  FMAP        4. 99c2d000 0000054e

 1855 12:58:48.355600  TIME STAMP  5. 99c2c000 00000910

 1856 12:58:48.358906  VBOOT WORK  6. 99c18000 00014000

 1857 12:58:48.362316  MRC DATA    7. 99c16000 00001958

 1858 12:58:48.365729  ROMSTG STCK 8. 99c15000 00001000

 1859 12:58:48.369343  AFTER CAR   9. 99c0b000 0000a000

 1860 12:58:48.372475  RAMSTAGE   10. 99baf000 0005c000

 1861 12:58:48.375830  REFCODE    11. 99b7a000 00035000

 1862 12:58:48.379045  SMM BACKUP 12. 99b6a000 00010000

 1863 12:58:48.382135  COREBOOT   13. 99b62000 00008000

 1864 12:58:48.385851  ACPI       14. 99b3e000 00024000

 1865 12:58:48.389403  ACPI GNVS  15. 99b3d000 00001000

 1866 12:58:48.392191  RAMOOPS    16. 99a3d000 00100000

 1867 12:58:48.395588  TPM2 TCGLOG17. 99a2d000 00010000

 1868 12:58:48.399051  SMBIOS     18. 99a2c000 00000800

 1869 12:58:48.402352  IMD small region:

 1870 12:58:48.406395    IMD ROOT    0. 99ffec00 00000400

 1871 12:58:48.409009    FSP RUNTIME 1. 99ffebe0 00000004

 1872 12:58:48.412468    EC HOSTEVENT 2. 99ffebc0 00000008

 1873 12:58:48.415670    POWER STATE 3. 99ffeb80 00000040

 1874 12:58:48.418973    ROMSTAGE    4. 99ffeb60 00000004

 1875 12:58:48.422767    MEM INFO    5. 99ffe9a0 000001b9

 1876 12:58:48.426040    VPD         6. 99ffe920 0000006c

 1877 12:58:48.429080  MTRR: Physical address space:

 1878 12:58:48.435388  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1879 12:58:48.442261  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1880 12:58:48.448563  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6

 1881 12:58:48.455278  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0

 1882 12:58:48.462064  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1883 12:58:48.468557  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1884 12:58:48.471880  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6

 1885 12:58:48.478899  MTRR: Fixed MSR 0x250 0x0606060606060606

 1886 12:58:48.482700  MTRR: Fixed MSR 0x258 0x0606060606060606

 1887 12:58:48.485444  MTRR: Fixed MSR 0x259 0x0000000000000000

 1888 12:58:48.488502  MTRR: Fixed MSR 0x268 0x0606060606060606

 1889 12:58:48.495426  MTRR: Fixed MSR 0x269 0x0606060606060606

 1890 12:58:48.498590  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1891 12:58:48.501752  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1892 12:58:48.505152  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1893 12:58:48.511543  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1894 12:58:48.514651  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1895 12:58:48.518831  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1896 12:58:48.521406  call enable_fixed_mtrr()

 1897 12:58:48.524680  CPU physical address size: 39 bits

 1898 12:58:48.528054  MTRR: default type WB/UC MTRR counts: 6/8.

 1899 12:58:48.534840  MTRR: WB selected as default type.

 1900 12:58:48.537892  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0

 1901 12:58:48.544690  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0

 1902 12:58:48.551411  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 1903 12:58:48.557997  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1904 12:58:48.564657  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0

 1905 12:58:48.571100  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0

 1906 12:58:48.574358  MTRR: Fixed MSR 0x250 0x0606060606060606

 1907 12:58:48.580705  MTRR: Fixed MSR 0x258 0x0606060606060606

 1908 12:58:48.584170  MTRR: Fixed MSR 0x259 0x0000000000000000

 1909 12:58:48.588103  MTRR: Fixed MSR 0x268 0x0606060606060606

 1910 12:58:48.590860  MTRR: Fixed MSR 0x269 0x0606060606060606

 1911 12:58:48.597768  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1912 12:58:48.600811  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1913 12:58:48.604291  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1914 12:58:48.607308  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1915 12:58:48.610716  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1916 12:58:48.617155  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1917 12:58:48.617237  

 1918 12:58:48.617303  MTRR check

 1919 12:58:48.620602  Fixed MTRRs   : Enabled

 1920 12:58:48.623906  Variable MTRRs: Enabled

 1921 12:58:48.623988  

 1922 12:58:48.627581  call enable_fixed_mtrr()

 1923 12:58:48.630521  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2

 1924 12:58:48.633882  CPU physical address size: 39 bits

 1925 12:58:48.640410  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1926 12:58:48.643587  MTRR: Fixed MSR 0x250 0x0606060606060606

 1927 12:58:48.647225  MTRR: Fixed MSR 0x250 0x0606060606060606

 1928 12:58:48.653506  MTRR: Fixed MSR 0x258 0x0606060606060606

 1929 12:58:48.657047  MTRR: Fixed MSR 0x259 0x0000000000000000

 1930 12:58:48.660284  MTRR: Fixed MSR 0x268 0x0606060606060606

 1931 12:58:48.663519  MTRR: Fixed MSR 0x269 0x0606060606060606

 1932 12:58:48.670142  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1933 12:58:48.673360  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1934 12:58:48.676583  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1935 12:58:48.680178  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1936 12:58:48.683176  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1937 12:58:48.689937  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1938 12:58:48.693580  MTRR: Fixed MSR 0x258 0x0606060606060606

 1939 12:58:48.696328  call enable_fixed_mtrr()

 1940 12:58:48.699554  MTRR: Fixed MSR 0x259 0x0000000000000000

 1941 12:58:48.703100  MTRR: Fixed MSR 0x268 0x0606060606060606

 1942 12:58:48.709482  MTRR: Fixed MSR 0x269 0x0606060606060606

 1943 12:58:48.713139  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1944 12:58:48.716302  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1945 12:58:48.720002  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1946 12:58:48.726257  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1947 12:58:48.729389  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1948 12:58:48.732698  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1949 12:58:48.736488  CPU physical address size: 39 bits

 1950 12:58:48.739625  call enable_fixed_mtrr()

 1951 12:58:48.742862  MTRR: Fixed MSR 0x250 0x0606060606060606

 1952 12:58:48.745858  MTRR: Fixed MSR 0x250 0x0606060606060606

 1953 12:58:48.752842  MTRR: Fixed MSR 0x258 0x0606060606060606

 1954 12:58:48.755925  MTRR: Fixed MSR 0x259 0x0000000000000000

 1955 12:58:48.759363  MTRR: Fixed MSR 0x268 0x0606060606060606

 1956 12:58:48.762659  MTRR: Fixed MSR 0x269 0x0606060606060606

 1957 12:58:48.769579  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1958 12:58:48.772837  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1959 12:58:48.775847  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1960 12:58:48.779326  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1961 12:58:48.785625  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1962 12:58:48.789146  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1963 12:58:48.792532  MTRR: Fixed MSR 0x258 0x0606060606060606

 1964 12:58:48.795909  call enable_fixed_mtrr()

 1965 12:58:48.798660  MTRR: Fixed MSR 0x259 0x0000000000000000

 1966 12:58:48.802828  MTRR: Fixed MSR 0x268 0x0606060606060606

 1967 12:58:48.809022  MTRR: Fixed MSR 0x269 0x0606060606060606

 1968 12:58:48.812323  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1969 12:58:48.815310  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1970 12:58:48.819208  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1971 12:58:48.825242  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1972 12:58:48.828871  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1973 12:58:48.831676  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1974 12:58:48.835145  CPU physical address size: 39 bits

 1975 12:58:48.838405  call enable_fixed_mtrr()

 1976 12:58:48.841729  CPU physical address size: 39 bits

 1977 12:58:48.845122  MTRR: Fixed MSR 0x250 0x0606060606060606

 1978 12:58:48.851973  MTRR: Fixed MSR 0x250 0x0606060606060606

 1979 12:58:48.855175  MTRR: Fixed MSR 0x258 0x0606060606060606

 1980 12:58:48.859047  MTRR: Fixed MSR 0x259 0x0000000000000000

 1981 12:58:48.861752  MTRR: Fixed MSR 0x268 0x0606060606060606

 1982 12:58:48.868175  MTRR: Fixed MSR 0x269 0x0606060606060606

 1983 12:58:48.871860  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1984 12:58:48.875255  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1985 12:58:48.878519  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1986 12:58:48.884918  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1987 12:58:48.888185  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1988 12:58:48.891926  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1989 12:58:48.894858  MTRR: Fixed MSR 0x258 0x0606060606060606

 1990 12:58:48.898153  call enable_fixed_mtrr()

 1991 12:58:48.901260  MTRR: Fixed MSR 0x259 0x0000000000000000

 1992 12:58:48.907837  MTRR: Fixed MSR 0x268 0x0606060606060606

 1993 12:58:48.911259  MTRR: Fixed MSR 0x269 0x0606060606060606

 1994 12:58:48.914489  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1995 12:58:48.917979  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1996 12:58:48.924552  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1997 12:58:48.928074  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1998 12:58:48.931435  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1999 12:58:48.934716  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2000 12:58:48.938421  CPU physical address size: 39 bits

 2001 12:58:48.940925  call enable_fixed_mtrr()

 2002 12:58:48.944352  CPU physical address size: 39 bits

 2003 12:58:48.947941  CBFS @ c08000 size 3f8000

 2004 12:58:48.954370  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 2005 12:58:48.957793  CBFS: Locating 'fallback/payload'

 2006 12:58:48.961096  CPU physical address size: 39 bits

 2007 12:58:48.964283  CBFS: Found @ offset 1c96c0 size 3f798

 2008 12:58:48.968062  Checking segment from ROM address 0xffdd16f8

 2009 12:58:48.974792  Checking segment from ROM address 0xffdd1714

 2010 12:58:48.977871  Loading segment from ROM address 0xffdd16f8

 2011 12:58:48.980735    code (compression=0)

 2012 12:58:48.987603    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760

 2013 12:58:48.997383  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760

 2014 12:58:49.000980  it's not compressed!

 2015 12:58:49.091967  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730

 2016 12:58:49.098645  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0

 2017 12:58:49.101746  Loading segment from ROM address 0xffdd1714

 2018 12:58:49.105001    Entry Point 0x30000000

 2019 12:58:49.108551  Loaded segments

 2020 12:58:49.114202  Finalizing chipset.

 2021 12:58:49.117124  Finalizing SMM.

 2022 12:58:49.120680  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5

 2023 12:58:49.123824  mp_park_aps done after 0 msecs.

 2024 12:58:49.130301  Jumping to boot code at 30000000(99b62000)

 2025 12:58:49.137121  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes

 2026 12:58:49.137204  

 2027 12:58:49.137269  

 2028 12:58:49.137329  

 2029 12:58:49.140224  Starting depthcharge on Helios...

 2030 12:58:49.140306  

 2031 12:58:49.140724  end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
 2032 12:58:49.140825  start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
 2033 12:58:49.140911  Setting prompt string to ['hatch:']
 2034 12:58:49.140991  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
 2035 12:58:49.150215  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2036 12:58:49.150298  

 2037 12:58:49.157167  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2038 12:58:49.157249  

 2039 12:58:49.163825  board_setup: Info: eMMC controller not present; skipping

 2040 12:58:49.163907  

 2041 12:58:49.166654  New NVMe Controller 0x30053ac0 @ 00:1d:00

 2042 12:58:49.166753  

 2043 12:58:49.173632  board_setup: Info: SDHCI controller not present; skipping

 2044 12:58:49.173714  

 2045 12:58:49.176674  vboot_create_vbsd: creating legacy VbSharedDataHeader structure

 2046 12:58:49.180350  

 2047 12:58:49.180430  Wipe memory regions:

 2048 12:58:49.180495  

 2049 12:58:49.183049  	[0x00000000001000, 0x000000000a0000)

 2050 12:58:49.183130  

 2051 12:58:49.186413  	[0x00000000100000, 0x00000030000000)

 2052 12:58:49.253199  

 2053 12:58:49.256170  	[0x00000030657430, 0x00000099a2c000)

 2054 12:58:49.393482  

 2055 12:58:49.396376  	[0x00000100000000, 0x0000045e800000)

 2056 12:58:50.779372  

 2057 12:58:50.779526  R8152: Initializing

 2058 12:58:50.779594  

 2059 12:58:50.782606  Version 9 (ocp_data = 6010)

 2060 12:58:50.787113  

 2061 12:58:50.787194  R8152: Done initializing

 2062 12:58:50.787259  

 2063 12:58:50.790406  Adding net device

 2064 12:58:51.272981  

 2065 12:58:51.273129  R8152: Initializing

 2066 12:58:51.273195  

 2067 12:58:51.277554  Version 6 (ocp_data = 5c30)

 2068 12:58:51.277636  

 2069 12:58:51.280051  R8152: Done initializing

 2070 12:58:51.280133  

 2071 12:58:51.283281  net_add_device: Attemp to include the same device

 2072 12:58:51.286573  

 2073 12:58:51.293280  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58

 2074 12:58:51.293363  

 2075 12:58:51.293427  

 2076 12:58:51.293485  

 2077 12:58:51.293763  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2079 12:58:51.394103  hatch: tftpboot 192.168.201.1 11602089/tftp-deploy-8464ef71/kernel/bzImage 11602089/tftp-deploy-8464ef71/kernel/cmdline 11602089/tftp-deploy-8464ef71/ramdisk/ramdisk.cpio.gz

 2080 12:58:51.394241  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2081 12:58:51.394319  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
 2082 12:58:51.398992  tftpboot 192.168.201.1 11602089/tftp-deploy-8464ef71/kernel/bzImploy-8464ef71/kernel/cmdline 11602089/tftp-deploy-8464ef71/ramdisk/ramdisk.cpio.gz

 2083 12:58:51.399078  

 2084 12:58:51.399142  Waiting for link

 2085 12:58:51.599690  

 2086 12:58:51.599820  done.

 2087 12:58:51.599890  

 2088 12:58:51.599950  MAC: 00:24:32:50:19:be

 2089 12:58:51.600010  

 2090 12:58:51.602834  Sending DHCP discover... done.

 2091 12:58:51.602922  

 2092 12:58:51.606388  Waiting for reply... done.

 2093 12:58:51.606471  

 2094 12:58:51.609702  Sending DHCP request... done.

 2095 12:58:51.609788  

 2096 12:58:51.612656  Waiting for reply... done.

 2097 12:58:51.612763  

 2098 12:58:51.616556  My ip is 192.168.201.15

 2099 12:58:51.616638  

 2100 12:58:51.619345  The DHCP server ip is 192.168.201.1

 2101 12:58:51.619456  

 2102 12:58:51.622725  TFTP server IP predefined by user: 192.168.201.1

 2103 12:58:51.622807  

 2104 12:58:51.629318  Bootfile predefined by user: 11602089/tftp-deploy-8464ef71/kernel/bzImage

 2105 12:58:51.629400  

 2106 12:58:51.632523  Sending tftp read request... done.

 2107 12:58:51.632605  

 2108 12:58:51.639667  Waiting for the transfer... 

 2109 12:58:51.639764  

 2110 12:58:52.219593  00000000 ################################################################

 2111 12:58:52.219760  

 2112 12:58:52.806948  00080000 ################################################################

 2113 12:58:52.807095  

 2114 12:58:53.381908  00100000 ################################################################

 2115 12:58:53.382057  

 2116 12:58:53.969542  00180000 ################################################################

 2117 12:58:53.969691  

 2118 12:58:54.550313  00200000 ################################################################

 2119 12:58:54.550460  

 2120 12:58:55.123412  00280000 ################################################################

 2121 12:58:55.123560  

 2122 12:58:55.708396  00300000 ################################################################

 2123 12:58:55.708561  

 2124 12:58:56.250410  00380000 ################################################################

 2125 12:58:56.250556  

 2126 12:58:56.796822  00400000 ################################################################

 2127 12:58:56.796970  

 2128 12:58:57.380521  00480000 ################################################################

 2129 12:58:57.380668  

 2130 12:58:57.955356  00500000 ################################################################

 2131 12:58:57.955507  

 2132 12:58:58.513091  00580000 ################################################################

 2133 12:58:58.513304  

 2134 12:58:59.092385  00600000 ################################################################

 2135 12:58:59.092595  

 2136 12:58:59.650338  00680000 ################################################################

 2137 12:58:59.650488  

 2138 12:59:00.216602  00700000 ################################################################

 2139 12:59:00.216755  

 2140 12:59:00.812328  00780000 ################################################################

 2141 12:59:00.812478  

 2142 12:59:01.402908  00800000 ################################################################

 2143 12:59:01.403083  

 2144 12:59:01.979015  00880000 ################################################################

 2145 12:59:01.979166  

 2146 12:59:02.567201  00900000 ################################################################

 2147 12:59:02.567377  

 2148 12:59:03.152850  00980000 ################################################################

 2149 12:59:03.152994  

 2150 12:59:03.708965  00a00000 ################################################################

 2151 12:59:03.709140  

 2152 12:59:04.225284  00a80000 ######################################################### done.

 2153 12:59:04.225434  

 2154 12:59:04.228376  The bootfile was 11473408 bytes long.

 2155 12:59:04.228460  

 2156 12:59:04.231566  Sending tftp read request... done.

 2157 12:59:04.231715  

 2158 12:59:04.234828  Waiting for the transfer... 

 2159 12:59:04.234930  

 2160 12:59:04.798209  00000000 ################################################################

 2161 12:59:04.798358  

 2162 12:59:05.379737  00080000 ################################################################

 2163 12:59:05.379879  

 2164 12:59:05.942733  00100000 ################################################################

 2165 12:59:05.942881  

 2166 12:59:06.508883  00180000 ################################################################

 2167 12:59:06.509031  

 2168 12:59:07.081607  00200000 ################################################################

 2169 12:59:07.081757  

 2170 12:59:07.663168  00280000 ################################################################

 2171 12:59:07.663317  

 2172 12:59:08.232432  00300000 ################################################################

 2173 12:59:08.232576  

 2174 12:59:08.803189  00380000 ################################################################

 2175 12:59:08.803347  

 2176 12:59:09.385589  00400000 ################################################################

 2177 12:59:09.385732  

 2178 12:59:09.952098  00480000 ################################################################

 2179 12:59:09.952243  

 2180 12:59:10.491549  00500000 ################################################################

 2181 12:59:10.491736  

 2182 12:59:10.913670  00580000 ################################################ done.

 2183 12:59:10.913816  

 2184 12:59:10.916631  Sending tftp read request... done.

 2185 12:59:10.916718  

 2186 12:59:10.920268  Waiting for the transfer... 

 2187 12:59:10.920350  

 2188 12:59:10.923445  00000000 # done.

 2189 12:59:10.923528  

 2190 12:59:10.930423  Command line loaded dynamically from TFTP file: 11602089/tftp-deploy-8464ef71/kernel/cmdline

 2191 12:59:10.930507  

 2192 12:59:10.959801  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11602089/extract-nfsrootfs-a6eq8f53,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2193 12:59:10.959893  

 2194 12:59:10.966015  ec_init(0): CrosEC protocol v3 supported (256, 256)

 2195 12:59:10.970795  

 2196 12:59:10.974005  Shutting down all USB controllers.

 2197 12:59:10.974087  

 2198 12:59:10.974152  Removing current net device

 2199 12:59:10.977885  

 2200 12:59:10.977966  Finalizing coreboot

 2201 12:59:10.978031  

 2202 12:59:10.984453  Exiting depthcharge with code 4 at timestamp: 29225092

 2203 12:59:10.984537  

 2204 12:59:10.984601  

 2205 12:59:10.984661  Starting kernel ...

 2206 12:59:10.984719  

 2207 12:59:10.984775  

 2208 12:59:10.985147  end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
 2209 12:59:10.985242  start: 2.2.5 auto-login-action (timeout 00:04:20) [common]
 2210 12:59:10.985318  Setting prompt string to ['Linux version [0-9]']
 2211 12:59:10.985384  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2212 12:59:10.985451  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2214 13:03:30.985580  end: 2.2.5 auto-login-action (duration 00:04:20) [common]
 2216 13:03:30.985957  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 260 seconds'
 2218 13:03:30.986235  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2221 13:03:30.986710  end: 2 depthcharge-action (duration 00:05:00) [common]
 2223 13:03:30.987116  Cleaning after the job
 2224 13:03:30.987272  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11602089/tftp-deploy-8464ef71/ramdisk
 2225 13:03:30.988754  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11602089/tftp-deploy-8464ef71/kernel
 2226 13:03:30.991225  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11602089/tftp-deploy-8464ef71/nfsrootfs
 2227 13:03:31.101300  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11602089/tftp-deploy-8464ef71/modules
 2228 13:03:31.102026  start: 4.1 power-off (timeout 00:00:30) [common]
 2229 13:03:31.102201  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
 2230 13:03:31.179317  >> Command sent successfully.

 2231 13:03:31.181749  Returned 0 in 0 seconds
 2232 13:03:31.282151  end: 4.1 power-off (duration 00:00:00) [common]
 2234 13:03:31.282482  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2235 13:03:31.282749  Listened to connection for namespace 'common' for up to 1s
 2237 13:03:31.283116  Listened to connection for namespace 'common' for up to 1s
 2238 13:03:32.283744  Finalising connection for namespace 'common'
 2239 13:03:32.283929  Disconnecting from shell: Finalise
 2240 13:03:32.284005  
 2241 13:03:32.384332  end: 4.2 read-feedback (duration 00:00:01) [common]
 2242 13:03:32.384464  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11602089
 2243 13:03:32.951224  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11602089
 2244 13:03:32.951418  JobError: Your job cannot terminate cleanly.