Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 18:14:58.783159 lava-dispatcher, installed at version: 2023.08
2 18:14:58.783361 start: 0 validate
3 18:14:58.783493 Start time: 2023-10-25 18:14:58.783485+00:00 (UTC)
4 18:14:58.783609 Using caching service: 'http://localhost/cache/?uri=%s'
5 18:14:58.783740 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 18:14:59.047656 Using caching service: 'http://localhost/cache/?uri=%s'
7 18:14:59.048332 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.295-cip103-193-g33550555e507c%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 18:14:59.310873 Using caching service: 'http://localhost/cache/?uri=%s'
9 18:14:59.311542 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 18:15:02.066886 Using caching service: 'http://localhost/cache/?uri=%s'
11 18:15:02.067964 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.295-cip103-193-g33550555e507c%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 18:15:02.334726 validate duration: 3.55
14 18:15:02.336058 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 18:15:02.336572 start: 1.1 download-retry (timeout 00:10:00) [common]
16 18:15:02.337016 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 18:15:02.337630 Not decompressing ramdisk as can be used compressed.
18 18:15:02.338068 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/initrd.cpio.gz
19 18:15:02.338419 saving as /var/lib/lava/dispatcher/tmp/11876197/tftp-deploy-gz7la1ve/ramdisk/initrd.cpio.gz
20 18:15:02.338829 total size: 5671549 (5 MB)
21 18:15:02.952917 progress 0 % (0 MB)
22 18:15:02.961708 progress 5 % (0 MB)
23 18:15:02.969878 progress 10 % (0 MB)
24 18:15:02.976660 progress 15 % (0 MB)
25 18:15:02.981849 progress 20 % (1 MB)
26 18:15:02.986138 progress 25 % (1 MB)
27 18:15:02.989292 progress 30 % (1 MB)
28 18:15:02.992414 progress 35 % (1 MB)
29 18:15:02.995266 progress 40 % (2 MB)
30 18:15:02.997508 progress 45 % (2 MB)
31 18:15:02.999991 progress 50 % (2 MB)
32 18:15:03.002151 progress 55 % (3 MB)
33 18:15:03.004096 progress 60 % (3 MB)
34 18:15:03.006126 progress 65 % (3 MB)
35 18:15:03.008091 progress 70 % (3 MB)
36 18:15:03.009819 progress 75 % (4 MB)
37 18:15:03.011586 progress 80 % (4 MB)
38 18:15:03.013332 progress 85 % (4 MB)
39 18:15:03.014946 progress 90 % (4 MB)
40 18:15:03.016537 progress 95 % (5 MB)
41 18:15:03.018135 progress 100 % (5 MB)
42 18:15:03.018247 5 MB downloaded in 0.68 s (7.96 MB/s)
43 18:15:03.018412 end: 1.1.1 http-download (duration 00:00:01) [common]
45 18:15:03.018671 end: 1.1 download-retry (duration 00:00:01) [common]
46 18:15:03.018759 start: 1.2 download-retry (timeout 00:09:59) [common]
47 18:15:03.018844 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 18:15:03.018990 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.295-cip103-193-g33550555e507c/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 18:15:03.019062 saving as /var/lib/lava/dispatcher/tmp/11876197/tftp-deploy-gz7la1ve/kernel/bzImage
50 18:15:03.019124 total size: 11571200 (11 MB)
51 18:15:03.019187 No compression specified
52 18:15:03.020344 progress 0 % (0 MB)
53 18:15:03.023401 progress 5 % (0 MB)
54 18:15:03.026706 progress 10 % (1 MB)
55 18:15:03.030140 progress 15 % (1 MB)
56 18:15:03.033322 progress 20 % (2 MB)
57 18:15:03.036421 progress 25 % (2 MB)
58 18:15:03.039404 progress 30 % (3 MB)
59 18:15:03.042488 progress 35 % (3 MB)
60 18:15:03.045677 progress 40 % (4 MB)
61 18:15:03.048653 progress 45 % (4 MB)
62 18:15:03.051828 progress 50 % (5 MB)
63 18:15:03.054957 progress 55 % (6 MB)
64 18:15:03.057904 progress 60 % (6 MB)
65 18:15:03.061010 progress 65 % (7 MB)
66 18:15:03.064108 progress 70 % (7 MB)
67 18:15:03.067010 progress 75 % (8 MB)
68 18:15:03.070053 progress 80 % (8 MB)
69 18:15:03.073110 progress 85 % (9 MB)
70 18:15:03.076026 progress 90 % (9 MB)
71 18:15:03.079091 progress 95 % (10 MB)
72 18:15:03.082134 progress 100 % (11 MB)
73 18:15:03.082250 11 MB downloaded in 0.06 s (174.82 MB/s)
74 18:15:03.082396 end: 1.2.1 http-download (duration 00:00:00) [common]
76 18:15:03.082686 end: 1.2 download-retry (duration 00:00:00) [common]
77 18:15:03.082778 start: 1.3 download-retry (timeout 00:09:59) [common]
78 18:15:03.082864 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 18:15:03.083005 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/full.rootfs.tar.xz
80 18:15:03.083074 saving as /var/lib/lava/dispatcher/tmp/11876197/tftp-deploy-gz7la1ve/nfsrootfs/full.rootfs.tar
81 18:15:03.083134 total size: 126031368 (120 MB)
82 18:15:03.083197 Using unxz to decompress xz
83 18:15:03.087634 progress 0 % (0 MB)
84 18:15:03.594455 progress 5 % (6 MB)
85 18:15:04.088743 progress 10 % (12 MB)
86 18:15:04.602155 progress 15 % (18 MB)
87 18:15:05.132673 progress 20 % (24 MB)
88 18:15:05.487031 progress 25 % (30 MB)
89 18:15:05.836674 progress 30 % (36 MB)
90 18:15:06.104860 progress 35 % (42 MB)
91 18:15:06.288842 progress 40 % (48 MB)
92 18:15:06.658415 progress 45 % (54 MB)
93 18:15:07.037887 progress 50 % (60 MB)
94 18:15:07.380327 progress 55 % (66 MB)
95 18:15:07.740411 progress 60 % (72 MB)
96 18:15:08.082075 progress 65 % (78 MB)
97 18:15:08.499912 progress 70 % (84 MB)
98 18:15:08.941036 progress 75 % (90 MB)
99 18:15:09.391653 progress 80 % (96 MB)
100 18:15:09.494201 progress 85 % (102 MB)
101 18:15:09.655285 progress 90 % (108 MB)
102 18:15:10.002889 progress 95 % (114 MB)
103 18:15:10.388568 progress 100 % (120 MB)
104 18:15:10.393642 120 MB downloaded in 7.31 s (16.44 MB/s)
105 18:15:10.393890 end: 1.3.1 http-download (duration 00:00:07) [common]
107 18:15:10.394148 end: 1.3 download-retry (duration 00:00:07) [common]
108 18:15:10.394236 start: 1.4 download-retry (timeout 00:09:52) [common]
109 18:15:10.394323 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 18:15:10.394479 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.295-cip103-193-g33550555e507c/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 18:15:10.394590 saving as /var/lib/lava/dispatcher/tmp/11876197/tftp-deploy-gz7la1ve/modules/modules.tar
112 18:15:10.394652 total size: 484856 (0 MB)
113 18:15:10.394716 Using unxz to decompress xz
114 18:15:10.398754 progress 6 % (0 MB)
115 18:15:10.399160 progress 13 % (0 MB)
116 18:15:10.399399 progress 20 % (0 MB)
117 18:15:10.401035 progress 27 % (0 MB)
118 18:15:10.403145 progress 33 % (0 MB)
119 18:15:10.404969 progress 40 % (0 MB)
120 18:15:10.407062 progress 47 % (0 MB)
121 18:15:10.409051 progress 54 % (0 MB)
122 18:15:10.411123 progress 60 % (0 MB)
123 18:15:10.413590 progress 67 % (0 MB)
124 18:15:10.415695 progress 74 % (0 MB)
125 18:15:10.417821 progress 81 % (0 MB)
126 18:15:10.419993 progress 87 % (0 MB)
127 18:15:10.421722 progress 94 % (0 MB)
128 18:15:10.423950 progress 100 % (0 MB)
129 18:15:10.430152 0 MB downloaded in 0.04 s (13.03 MB/s)
130 18:15:10.430395 end: 1.4.1 http-download (duration 00:00:00) [common]
132 18:15:10.430695 end: 1.4 download-retry (duration 00:00:00) [common]
133 18:15:10.430788 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
134 18:15:10.430885 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
135 18:15:13.382275 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11876197/extract-nfsrootfs-uqsruscf
136 18:15:13.382471 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
137 18:15:13.382807 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
138 18:15:13.382980 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11876197/lava-overlay-r07om3pb
139 18:15:13.383115 makedir: /var/lib/lava/dispatcher/tmp/11876197/lava-overlay-r07om3pb/lava-11876197/bin
140 18:15:13.383219 makedir: /var/lib/lava/dispatcher/tmp/11876197/lava-overlay-r07om3pb/lava-11876197/tests
141 18:15:13.383324 makedir: /var/lib/lava/dispatcher/tmp/11876197/lava-overlay-r07om3pb/lava-11876197/results
142 18:15:13.383441 Creating /var/lib/lava/dispatcher/tmp/11876197/lava-overlay-r07om3pb/lava-11876197/bin/lava-add-keys
143 18:15:13.383628 Creating /var/lib/lava/dispatcher/tmp/11876197/lava-overlay-r07om3pb/lava-11876197/bin/lava-add-sources
144 18:15:13.383833 Creating /var/lib/lava/dispatcher/tmp/11876197/lava-overlay-r07om3pb/lava-11876197/bin/lava-background-process-start
145 18:15:13.383976 Creating /var/lib/lava/dispatcher/tmp/11876197/lava-overlay-r07om3pb/lava-11876197/bin/lava-background-process-stop
146 18:15:13.384133 Creating /var/lib/lava/dispatcher/tmp/11876197/lava-overlay-r07om3pb/lava-11876197/bin/lava-common-functions
147 18:15:13.384259 Creating /var/lib/lava/dispatcher/tmp/11876197/lava-overlay-r07om3pb/lava-11876197/bin/lava-echo-ipv4
148 18:15:13.384388 Creating /var/lib/lava/dispatcher/tmp/11876197/lava-overlay-r07om3pb/lava-11876197/bin/lava-install-packages
149 18:15:13.384514 Creating /var/lib/lava/dispatcher/tmp/11876197/lava-overlay-r07om3pb/lava-11876197/bin/lava-installed-packages
150 18:15:13.384672 Creating /var/lib/lava/dispatcher/tmp/11876197/lava-overlay-r07om3pb/lava-11876197/bin/lava-os-build
151 18:15:13.384818 Creating /var/lib/lava/dispatcher/tmp/11876197/lava-overlay-r07om3pb/lava-11876197/bin/lava-probe-channel
152 18:15:13.384958 Creating /var/lib/lava/dispatcher/tmp/11876197/lava-overlay-r07om3pb/lava-11876197/bin/lava-probe-ip
153 18:15:13.385083 Creating /var/lib/lava/dispatcher/tmp/11876197/lava-overlay-r07om3pb/lava-11876197/bin/lava-target-ip
154 18:15:13.385240 Creating /var/lib/lava/dispatcher/tmp/11876197/lava-overlay-r07om3pb/lava-11876197/bin/lava-target-mac
155 18:15:13.385364 Creating /var/lib/lava/dispatcher/tmp/11876197/lava-overlay-r07om3pb/lava-11876197/bin/lava-target-storage
156 18:15:13.385491 Creating /var/lib/lava/dispatcher/tmp/11876197/lava-overlay-r07om3pb/lava-11876197/bin/lava-test-case
157 18:15:13.385648 Creating /var/lib/lava/dispatcher/tmp/11876197/lava-overlay-r07om3pb/lava-11876197/bin/lava-test-event
158 18:15:13.385808 Creating /var/lib/lava/dispatcher/tmp/11876197/lava-overlay-r07om3pb/lava-11876197/bin/lava-test-feedback
159 18:15:13.385953 Creating /var/lib/lava/dispatcher/tmp/11876197/lava-overlay-r07om3pb/lava-11876197/bin/lava-test-raise
160 18:15:13.386090 Creating /var/lib/lava/dispatcher/tmp/11876197/lava-overlay-r07om3pb/lava-11876197/bin/lava-test-reference
161 18:15:13.386216 Creating /var/lib/lava/dispatcher/tmp/11876197/lava-overlay-r07om3pb/lava-11876197/bin/lava-test-runner
162 18:15:13.386342 Creating /var/lib/lava/dispatcher/tmp/11876197/lava-overlay-r07om3pb/lava-11876197/bin/lava-test-set
163 18:15:13.386466 Creating /var/lib/lava/dispatcher/tmp/11876197/lava-overlay-r07om3pb/lava-11876197/bin/lava-test-shell
164 18:15:13.386632 Updating /var/lib/lava/dispatcher/tmp/11876197/lava-overlay-r07om3pb/lava-11876197/bin/lava-install-packages (oe)
165 18:15:13.386785 Updating /var/lib/lava/dispatcher/tmp/11876197/lava-overlay-r07om3pb/lava-11876197/bin/lava-installed-packages (oe)
166 18:15:13.386910 Creating /var/lib/lava/dispatcher/tmp/11876197/lava-overlay-r07om3pb/lava-11876197/environment
167 18:15:13.387044 LAVA metadata
168 18:15:13.387115 - LAVA_JOB_ID=11876197
169 18:15:13.387178 - LAVA_DISPATCHER_IP=192.168.201.1
170 18:15:13.387276 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
171 18:15:13.387341 skipped lava-vland-overlay
172 18:15:13.387414 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 18:15:13.387493 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
174 18:15:13.387553 skipped lava-multinode-overlay
175 18:15:13.387622 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 18:15:13.387701 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
177 18:15:13.387791 Loading test definitions
178 18:15:13.387894 start: 1.5.2.3.1 git-repo-action (timeout 00:09:49) [common]
179 18:15:13.387964 Using /lava-11876197 at stage 0
180 18:15:13.388056 Fetching tests from https://github.com/kernelci/test-definitions
181 18:15:13.388133 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/11876197/lava-overlay-r07om3pb/lava-11876197/0/tests/0_ltp-ipc'
182 18:15:17.837266 Running '/usr/bin/git checkout kernelci.org
183 18:15:17.983679 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/11876197/lava-overlay-r07om3pb/lava-11876197/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
184 18:15:17.984491 uuid=11876197_1.5.2.3.1 testdef=None
185 18:15:17.984655 end: 1.5.2.3.1 git-repo-action (duration 00:00:05) [common]
187 18:15:17.984905 start: 1.5.2.3.2 test-overlay (timeout 00:09:44) [common]
188 18:15:17.985701 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
190 18:15:17.985930 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:44) [common]
191 18:15:17.987021 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
193 18:15:17.987265 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:44) [common]
194 18:15:17.988286 runner path: /var/lib/lava/dispatcher/tmp/11876197/lava-overlay-r07om3pb/lava-11876197/0/tests/0_ltp-ipc test_uuid 11876197_1.5.2.3.1
195 18:15:17.988376 SKIPFILE='skipfile-lkft.yaml'
196 18:15:17.988439 SKIP_INSTALL='true'
197 18:15:17.988497 TST_CMDFILES='ipc'
198 18:15:17.988639 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
200 18:15:17.988845 Creating lava-test-runner.conf files
201 18:15:17.988907 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11876197/lava-overlay-r07om3pb/lava-11876197/0 for stage 0
202 18:15:17.988998 - 0_ltp-ipc
203 18:15:17.989102 end: 1.5.2.3 test-definition (duration 00:00:05) [common]
204 18:15:17.989194 start: 1.5.2.4 compress-overlay (timeout 00:09:44) [common]
205 18:15:25.618676 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
206 18:15:25.618889 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:37) [common]
207 18:15:25.619008 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
208 18:15:25.619129 end: 1.5.2 lava-overlay (duration 00:00:12) [common]
209 18:15:25.619236 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:37) [common]
210 18:15:25.762296 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
211 18:15:25.762721 start: 1.5.4 extract-modules (timeout 00:09:37) [common]
212 18:15:25.762864 extracting modules file /var/lib/lava/dispatcher/tmp/11876197/tftp-deploy-gz7la1ve/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11876197/extract-nfsrootfs-uqsruscf
213 18:15:25.783660 extracting modules file /var/lib/lava/dispatcher/tmp/11876197/tftp-deploy-gz7la1ve/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11876197/extract-overlay-ramdisk-twgc53cy/ramdisk
214 18:15:25.804355 end: 1.5.4 extract-modules (duration 00:00:00) [common]
215 18:15:25.804512 start: 1.5.5 apply-overlay-tftp (timeout 00:09:37) [common]
216 18:15:25.804623 [common] Applying overlay to NFS
217 18:15:25.804702 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11876197/compress-overlay-zxoy25o5/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11876197/extract-nfsrootfs-uqsruscf
218 18:15:26.763983 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
219 18:15:26.764159 start: 1.5.6 configure-preseed-file (timeout 00:09:36) [common]
220 18:15:26.764281 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
221 18:15:26.764387 start: 1.5.7 compress-ramdisk (timeout 00:09:36) [common]
222 18:15:26.764486 Building ramdisk /var/lib/lava/dispatcher/tmp/11876197/extract-overlay-ramdisk-twgc53cy/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11876197/extract-overlay-ramdisk-twgc53cy/ramdisk
223 18:15:27.015464 >> 31372 blocks
224 18:15:27.638039 rename /var/lib/lava/dispatcher/tmp/11876197/extract-overlay-ramdisk-twgc53cy/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11876197/tftp-deploy-gz7la1ve/ramdisk/ramdisk.cpio.gz
225 18:15:27.638572 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
226 18:15:27.638723 start: 1.5.8 prepare-kernel (timeout 00:09:35) [common]
227 18:15:27.638844 start: 1.5.8.1 prepare-fit (timeout 00:09:35) [common]
228 18:15:27.638954 No mkimage arch provided, not using FIT.
229 18:15:27.639061 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
230 18:15:27.639162 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
231 18:15:27.639282 end: 1.5 prepare-tftp-overlay (duration 00:00:17) [common]
232 18:15:27.639415 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:35) [common]
233 18:15:27.639530 No LXC device requested
234 18:15:27.639654 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
235 18:15:27.639787 start: 1.7 deploy-device-env (timeout 00:09:35) [common]
236 18:15:27.639907 end: 1.7 deploy-device-env (duration 00:00:00) [common]
237 18:15:27.640017 Checking files for TFTP limit of 4294967296 bytes.
238 18:15:27.640553 end: 1 tftp-deploy (duration 00:00:25) [common]
239 18:15:27.640694 start: 2 depthcharge-action (timeout 00:05:00) [common]
240 18:15:27.640823 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
241 18:15:27.641001 substitutions:
242 18:15:27.641103 - {DTB}: None
243 18:15:27.641220 - {INITRD}: 11876197/tftp-deploy-gz7la1ve/ramdisk/ramdisk.cpio.gz
244 18:15:27.641333 - {KERNEL}: 11876197/tftp-deploy-gz7la1ve/kernel/bzImage
245 18:15:27.641443 - {LAVA_MAC}: None
246 18:15:27.641543 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11876197/extract-nfsrootfs-uqsruscf
247 18:15:27.641632 - {NFS_SERVER_IP}: 192.168.201.1
248 18:15:27.641717 - {PRESEED_CONFIG}: None
249 18:15:27.641801 - {PRESEED_LOCAL}: None
250 18:15:27.641887 - {RAMDISK}: 11876197/tftp-deploy-gz7la1ve/ramdisk/ramdisk.cpio.gz
251 18:15:27.641970 - {ROOT_PART}: None
252 18:15:27.642057 - {ROOT}: None
253 18:15:27.642141 - {SERVER_IP}: 192.168.201.1
254 18:15:27.642223 - {TEE}: None
255 18:15:27.642308 Parsed boot commands:
256 18:15:27.642392 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
257 18:15:27.642647 Parsed boot commands: tftpboot 192.168.201.1 11876197/tftp-deploy-gz7la1ve/kernel/bzImage 11876197/tftp-deploy-gz7la1ve/kernel/cmdline 11876197/tftp-deploy-gz7la1ve/ramdisk/ramdisk.cpio.gz
258 18:15:27.642736 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
259 18:15:27.642825 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
260 18:15:27.642920 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
261 18:15:27.643005 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
262 18:15:27.643076 Not connected, no need to disconnect.
263 18:15:27.643150 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
264 18:15:27.643229 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
265 18:15:27.643298 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-0'
266 18:15:27.647300 Setting prompt string to ['lava-test: # ']
267 18:15:27.647677 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
268 18:15:27.647784 end: 2.2.1 reset-connection (duration 00:00:00) [common]
269 18:15:27.647879 start: 2.2.2 reset-device (timeout 00:05:00) [common]
270 18:15:27.647969 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
271 18:15:27.648208 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
272 18:15:32.775904 >> Command sent successfully.
273 18:15:32.779477 Returned 0 in 5 seconds
274 18:15:32.879904 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
276 18:15:32.880283 end: 2.2.2 reset-device (duration 00:00:05) [common]
277 18:15:32.880403 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
278 18:15:32.880504 Setting prompt string to 'Starting depthcharge on Helios...'
279 18:15:32.880581 Changing prompt to 'Starting depthcharge on Helios...'
280 18:15:32.880691 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
281 18:15:32.881069 [Enter `^Ec?' for help]
282 18:15:33.501737
283 18:15:33.501900
284 18:15:33.511169 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
285 18:15:33.514411 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
286 18:15:33.520980 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
287 18:15:33.524916 CPU: AES supported, TXT NOT supported, VT supported
288 18:15:33.531217 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
289 18:15:33.534840 PCH: device id 0284 (rev 00) is Cometlake-U Premium
290 18:15:33.541621 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
291 18:15:33.544887 VBOOT: Loading verstage.
292 18:15:33.548357 FMAP: Found "FLASH" version 1.1 at 0xc04000.
293 18:15:33.554851 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
294 18:15:33.558136 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
295 18:15:33.561324 CBFS @ c08000 size 3f8000
296 18:15:33.567942 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
297 18:15:33.571617 CBFS: Locating 'fallback/verstage'
298 18:15:33.574804 CBFS: Found @ offset 10fb80 size 1072c
299 18:15:33.578304
300 18:15:33.578411
301 18:15:33.588409 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
302 18:15:33.602795 Probing TPM: . done!
303 18:15:33.606196 TPM ready after 0 ms
304 18:15:33.609459 Connected to device vid:did:rid of 1ae0:0028:00
305 18:15:33.619914 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
306 18:15:33.623272 Initialized TPM device CR50 revision 0
307 18:15:33.670070 tlcl_send_startup: Startup return code is 0
308 18:15:33.670242 TPM: setup succeeded
309 18:15:33.682551 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
310 18:15:33.686581 Chrome EC: UHEPI supported
311 18:15:33.689795 Phase 1
312 18:15:33.693155 FMAP: area GBB found @ c05000 (12288 bytes)
313 18:15:33.699782 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
314 18:15:33.703077 Phase 2
315 18:15:33.703164 Phase 3
316 18:15:33.706453 FMAP: area GBB found @ c05000 (12288 bytes)
317 18:15:33.713347 VB2:vb2_report_dev_firmware() This is developer signed firmware
318 18:15:33.719966 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
319 18:15:33.723277 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
320 18:15:33.729673 VB2:vb2_verify_keyblock() Checking keyblock signature...
321 18:15:33.745327 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
322 18:15:33.748862 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
323 18:15:33.755383 VB2:vb2_verify_fw_preamble() Verifying preamble.
324 18:15:33.759776 Phase 4
325 18:15:33.762927 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
326 18:15:33.769518 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
327 18:15:33.948446 VB2:vb2_rsa_verify_digest() Digest check failed!
328 18:15:33.955016 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
329 18:15:33.955136 Saving nvdata
330 18:15:33.958365 Reboot requested (10020007)
331 18:15:33.961946 board_reset() called!
332 18:15:33.962031 full_reset() called!
333 18:15:38.468912
334 18:15:38.469083
335 18:15:38.479068 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
336 18:15:38.482379 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
337 18:15:38.489203 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
338 18:15:38.492352 CPU: AES supported, TXT NOT supported, VT supported
339 18:15:38.499144 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
340 18:15:38.502313 PCH: device id 0284 (rev 00) is Cometlake-U Premium
341 18:15:38.508931 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
342 18:15:38.512238 VBOOT: Loading verstage.
343 18:15:38.515614 FMAP: Found "FLASH" version 1.1 at 0xc04000.
344 18:15:38.522034 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
345 18:15:38.525360 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
346 18:15:38.528721 CBFS @ c08000 size 3f8000
347 18:15:38.535739 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
348 18:15:38.538942 CBFS: Locating 'fallback/verstage'
349 18:15:38.542239 CBFS: Found @ offset 10fb80 size 1072c
350 18:15:38.545765
351 18:15:38.546088
352 18:15:38.555493 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
353 18:15:38.570034 Probing TPM: . done!
354 18:15:38.573243 TPM ready after 0 ms
355 18:15:38.577022 Connected to device vid:did:rid of 1ae0:0028:00
356 18:15:38.587052 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
357 18:15:38.590472 Initialized TPM device CR50 revision 0
358 18:15:38.637346 tlcl_send_startup: Startup return code is 0
359 18:15:38.637565 TPM: setup succeeded
360 18:15:38.880231 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
361 18:15:38.881036 Chrome EC: UHEPI supported
362 18:15:38.881722 Phase 1
363 18:15:38.882385 FMAP: area GBB found @ c05000 (12288 bytes)
364 18:15:38.883114 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
365 18:15:38.883741 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
366 18:15:38.884347 Recovery requested (1009000e)
367 18:15:38.884946 Saving nvdata
368 18:15:38.885592 tlcl_extend: response is 0
369 18:15:38.886207 tlcl_extend: response is 0
370 18:15:38.886895 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
371 18:15:38.887102 CBFS @ c08000 size 3f8000
372 18:15:38.887262 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
373 18:15:38.887430 CBFS: Locating 'fallback/romstage'
374 18:15:38.887564 CBFS: Found @ offset 80 size 145fc
375 18:15:38.887714 Accumulated console time in verstage 98 ms
376 18:15:38.887840
377 18:15:38.887966
378 18:15:38.888086 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
379 18:15:38.888216 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
380 18:15:38.888351 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
381 18:15:38.888475 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
382 18:15:38.888596 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
383 18:15:38.888715 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
384 18:15:38.888833 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
385 18:15:38.888950 TCO_STS: 0000 0000
386 18:15:38.889085 GEN_PMCON: e0015238 00000200
387 18:15:38.889216 GBLRST_CAUSE: 00000000 00000000
388 18:15:38.889342 prev_sleep_state 5
389 18:15:38.889464 Boot Count incremented to 72216
390 18:15:38.889557 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
391 18:15:38.889649 CBFS @ c08000 size 3f8000
392 18:15:38.889739 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
393 18:15:38.889826 CBFS: Locating 'fspm.bin'
394 18:15:38.889912 CBFS: Found @ offset 5ffc0 size 71000
395 18:15:38.890000 Chrome EC: UHEPI supported
396 18:15:38.890123 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
397 18:15:38.890251 Probing TPM: done!
398 18:15:38.890377 Connected to device vid:did:rid of 1ae0:0028:00
399 18:15:38.890503 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
400 18:15:38.890641 Initialized TPM device CR50 revision 0
401 18:15:38.890769 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
402 18:15:38.890897 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
403 18:15:38.891023 MRC cache found, size 1948
404 18:15:38.891149 bootmode is set to: 2
405 18:15:38.891273 PRMRR disabled by config.
406 18:15:38.891398 SPD INDEX = 1
407 18:15:38.891512 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
408 18:15:38.891630 CBFS @ c08000 size 3f8000
409 18:15:38.891755 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
410 18:15:38.891876 CBFS: Locating 'spd.bin'
411 18:15:38.892018 CBFS: Found @ offset 5fb80 size 400
412 18:15:38.892147 SPD: module type is LPDDR3
413 18:15:38.892269 SPD: module part is
414 18:15:38.895720 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
415 18:15:38.898906 SPD: device width 4 bits, bus width 8 bits
416 18:15:38.902012 SPD: module size is 4096 MB (per channel)
417 18:15:38.905887 memory slot: 0 configuration done.
418 18:15:38.909137 memory slot: 2 configuration done.
419 18:15:38.960761 CBMEM:
420 18:15:38.963982 IMD: root @ 99fff000 254 entries.
421 18:15:38.967351 IMD: root @ 99ffec00 62 entries.
422 18:15:38.970666 External stage cache:
423 18:15:38.973720 IMD: root @ 9abff000 254 entries.
424 18:15:38.977435 IMD: root @ 9abfec00 62 entries.
425 18:15:38.980749 Chrome EC: clear events_b mask to 0x0000000020004000
426 18:15:38.996879 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
427 18:15:39.010435 tlcl_write: response is 0
428 18:15:39.019028 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
429 18:15:39.025860 MRC: TPM MRC hash updated successfully.
430 18:15:39.026010 2 DIMMs found
431 18:15:39.028920 SMM Memory Map
432 18:15:39.032552 SMRAM : 0x9a000000 0x1000000
433 18:15:39.035915 Subregion 0: 0x9a000000 0xa00000
434 18:15:39.039240 Subregion 1: 0x9aa00000 0x200000
435 18:15:39.042492 Subregion 2: 0x9ac00000 0x400000
436 18:15:39.045888 top_of_ram = 0x9a000000
437 18:15:39.049221 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
438 18:15:39.055744 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
439 18:15:39.059003 MTRR Range: Start=ff000000 End=0 (Size 1000000)
440 18:15:39.065582 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
441 18:15:39.068898 CBFS @ c08000 size 3f8000
442 18:15:39.072090 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
443 18:15:39.075497 CBFS: Locating 'fallback/postcar'
444 18:15:39.081930 CBFS: Found @ offset 107000 size 4b44
445 18:15:39.085281 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
446 18:15:39.097884 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
447 18:15:39.101567 Processing 180 relocs. Offset value of 0x97c0c000
448 18:15:39.110079 Accumulated console time in romstage 286 ms
449 18:15:39.110227
450 18:15:39.110354
451 18:15:39.119876 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
452 18:15:39.126503 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
453 18:15:39.129912 CBFS @ c08000 size 3f8000
454 18:15:39.133304 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
455 18:15:39.139290 CBFS: Locating 'fallback/ramstage'
456 18:15:39.142699 CBFS: Found @ offset 43380 size 1b9e8
457 18:15:39.149261 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
458 18:15:39.181652 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
459 18:15:39.184837 Processing 3976 relocs. Offset value of 0x98db0000
460 18:15:39.191873 Accumulated console time in postcar 52 ms
461 18:15:39.192110
462 18:15:39.192241
463 18:15:39.201551 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
464 18:15:39.208362 FMAP: area RO_VPD found @ c00000 (16384 bytes)
465 18:15:39.211366 WARNING: RO_VPD is uninitialized or empty.
466 18:15:39.214952 FMAP: area RW_VPD found @ af8000 (8192 bytes)
467 18:15:39.221168 FMAP: area RW_VPD found @ af8000 (8192 bytes)
468 18:15:39.221352 Normal boot.
469 18:15:39.228101 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
470 18:15:39.231380 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
471 18:15:39.234623 CBFS @ c08000 size 3f8000
472 18:15:39.242948 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
473 18:15:39.244755 CBFS: Locating 'cpu_microcode_blob.bin'
474 18:15:39.247929 CBFS: Found @ offset 14700 size 2ec00
475 18:15:39.251456 microcode: sig=0x806ec pf=0x4 revision=0xc9
476 18:15:39.254588 Skip microcode update
477 18:15:39.262417 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
478 18:15:39.262633 CBFS @ c08000 size 3f8000
479 18:15:39.267637 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
480 18:15:39.271568 CBFS: Locating 'fsps.bin'
481 18:15:39.274339 CBFS: Found @ offset d1fc0 size 35000
482 18:15:39.299708 Detected 4 core, 8 thread CPU.
483 18:15:39.303049 Setting up SMI for CPU
484 18:15:39.306312 IED base = 0x9ac00000
485 18:15:39.306431 IED size = 0x00400000
486 18:15:39.310160 Will perform SMM setup.
487 18:15:39.316497 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
488 18:15:39.322765 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
489 18:15:39.329462 Processing 16 relocs. Offset value of 0x00030000
490 18:15:39.329623 Attempting to start 7 APs
491 18:15:39.336008 Waiting for 10ms after sending INIT.
492 18:15:39.349667 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
493 18:15:39.349828 done.
494 18:15:39.352874 AP: slot 4 apic_id 6.
495 18:15:39.356043 AP: slot 3 apic_id 7.
496 18:15:39.356172 AP: slot 7 apic_id 2.
497 18:15:39.359524 AP: slot 1 apic_id 3.
498 18:15:39.362641 Waiting for 2nd SIPI to complete...done.
499 18:15:39.366023 AP: slot 5 apic_id 5.
500 18:15:39.369375 AP: slot 6 apic_id 4.
501 18:15:39.376205 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
502 18:15:39.382712 Processing 13 relocs. Offset value of 0x00038000
503 18:15:39.389279 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
504 18:15:39.392720 Installing SMM handler to 0x9a000000
505 18:15:39.399171 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
506 18:15:39.405966 Processing 658 relocs. Offset value of 0x9a010000
507 18:15:39.412477 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
508 18:15:39.415738 Processing 13 relocs. Offset value of 0x9a008000
509 18:15:39.422273 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
510 18:15:39.428880 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
511 18:15:39.435732 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
512 18:15:39.438878 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
513 18:15:39.445506 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
514 18:15:39.451888 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
515 18:15:39.458442 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
516 18:15:39.465248 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
517 18:15:39.468460 Clearing SMI status registers
518 18:15:39.468573 SMI_STS: PM1
519 18:15:39.472288 PM1_STS: PWRBTN
520 18:15:39.472407 TCO_STS: SECOND_TO
521 18:15:39.475353 New SMBASE 0x9a000000
522 18:15:39.478626 In relocation handler: CPU 0
523 18:15:39.481886 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
524 18:15:39.485194 Writing SMRR. base = 0x9a000006, mask=0xff000800
525 18:15:39.488411 Relocation complete.
526 18:15:39.491605 New SMBASE 0x99fff800
527 18:15:39.495055 In relocation handler: CPU 2
528 18:15:39.498237 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
529 18:15:39.501609 Writing SMRR. base = 0x9a000006, mask=0xff000800
530 18:15:39.504891 Relocation complete.
531 18:15:39.508837 New SMBASE 0x99ffe800
532 18:15:39.511578 In relocation handler: CPU 6
533 18:15:39.514951 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
534 18:15:39.518238 Writing SMRR. base = 0x9a000006, mask=0xff000800
535 18:15:39.521571 Relocation complete.
536 18:15:39.524874 New SMBASE 0x99ffec00
537 18:15:39.528302 In relocation handler: CPU 5
538 18:15:39.531356 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
539 18:15:39.534903 Writing SMRR. base = 0x9a000006, mask=0xff000800
540 18:15:39.538095 Relocation complete.
541 18:15:39.541679 New SMBASE 0x99fff000
542 18:15:39.541798 In relocation handler: CPU 4
543 18:15:39.548261 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
544 18:15:39.551361 Writing SMRR. base = 0x9a000006, mask=0xff000800
545 18:15:39.555042 Relocation complete.
546 18:15:39.558257 New SMBASE 0x99fff400
547 18:15:39.558380 In relocation handler: CPU 3
548 18:15:39.564771 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
549 18:15:39.568133 Writing SMRR. base = 0x9a000006, mask=0xff000800
550 18:15:39.571201 Relocation complete.
551 18:15:39.571299 New SMBASE 0x99fffc00
552 18:15:39.574884 In relocation handler: CPU 1
553 18:15:39.581740 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
554 18:15:39.584987 Writing SMRR. base = 0x9a000006, mask=0xff000800
555 18:15:39.588202 Relocation complete.
556 18:15:39.588301 New SMBASE 0x99ffe400
557 18:15:39.591473 In relocation handler: CPU 7
558 18:15:39.598086 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
559 18:15:39.601252 Writing SMRR. base = 0x9a000006, mask=0xff000800
560 18:15:39.604822 Relocation complete.
561 18:15:39.604922 Initializing CPU #0
562 18:15:39.608092 CPU: vendor Intel device 806ec
563 18:15:39.611498 CPU: family 06, model 8e, stepping 0c
564 18:15:39.614894 Clearing out pending MCEs
565 18:15:39.618171 Setting up local APIC...
566 18:15:39.620960 apic_id: 0x00 done.
567 18:15:39.624239 Turbo is available but hidden
568 18:15:39.627548 Turbo is available and visible
569 18:15:39.627645 VMX status: enabled
570 18:15:39.630834 IA32_FEATURE_CONTROL status: locked
571 18:15:39.634206 Skip microcode update
572 18:15:39.637441 CPU #0 initialized
573 18:15:39.637547 Initializing CPU #2
574 18:15:39.641087 Initializing CPU #6
575 18:15:39.641180 Initializing CPU #5
576 18:15:39.644132 CPU: vendor Intel device 806ec
577 18:15:39.647766 CPU: family 06, model 8e, stepping 0c
578 18:15:39.650971 CPU: vendor Intel device 806ec
579 18:15:39.657655 CPU: family 06, model 8e, stepping 0c
580 18:15:39.657744 Clearing out pending MCEs
581 18:15:39.660824 CPU: vendor Intel device 806ec
582 18:15:39.664465 CPU: family 06, model 8e, stepping 0c
583 18:15:39.667253 Clearing out pending MCEs
584 18:15:39.671051 Initializing CPU #7
585 18:15:39.671149 Initializing CPU #1
586 18:15:39.674337 CPU: vendor Intel device 806ec
587 18:15:39.680840 CPU: family 06, model 8e, stepping 0c
588 18:15:39.683837 CPU: vendor Intel device 806ec
589 18:15:39.687213 CPU: family 06, model 8e, stepping 0c
590 18:15:39.687316 Clearing out pending MCEs
591 18:15:39.690778 Clearing out pending MCEs
592 18:15:39.694005 Setting up local APIC...
593 18:15:39.697371 Setting up local APIC...
594 18:15:39.700576 Setting up local APIC...
595 18:15:39.700676 Setting up local APIC...
596 18:15:39.703745 Initializing CPU #3
597 18:15:39.707110 Initializing CPU #4
598 18:15:39.707208 CPU: vendor Intel device 806ec
599 18:15:39.714101 CPU: family 06, model 8e, stepping 0c
600 18:15:39.717394 CPU: vendor Intel device 806ec
601 18:15:39.720710 CPU: family 06, model 8e, stepping 0c
602 18:15:39.720794 apic_id: 0x04 done.
603 18:15:39.724119 Clearing out pending MCEs
604 18:15:39.726859 VMX status: enabled
605 18:15:39.730769 Setting up local APIC...
606 18:15:39.730854 apic_id: 0x01 done.
607 18:15:39.734010 Clearing out pending MCEs
608 18:15:39.737225 Clearing out pending MCEs
609 18:15:39.740531 Setting up local APIC...
610 18:15:39.740619 VMX status: enabled
611 18:15:39.743859 apic_id: 0x06 done.
612 18:15:39.747166 Setting up local APIC...
613 18:15:39.750398 IA32_FEATURE_CONTROL status: locked
614 18:15:39.750505 apic_id: 0x05 done.
615 18:15:39.753537 Skip microcode update
616 18:15:39.757135 apic_id: 0x03 done.
617 18:15:39.757219 apic_id: 0x02 done.
618 18:15:39.760160 VMX status: enabled
619 18:15:39.763873 VMX status: enabled
620 18:15:39.766868 IA32_FEATURE_CONTROL status: locked
621 18:15:39.769991 IA32_FEATURE_CONTROL status: locked
622 18:15:39.770074 Skip microcode update
623 18:15:39.773353 Skip microcode update
624 18:15:39.776968 IA32_FEATURE_CONTROL status: locked
625 18:15:39.780334 CPU #6 initialized
626 18:15:39.780418 VMX status: enabled
627 18:15:39.783699 CPU #1 initialized
628 18:15:39.786941 CPU #7 initialized
629 18:15:39.787024 apic_id: 0x07 done.
630 18:15:39.790121 VMX status: enabled
631 18:15:39.790203 VMX status: enabled
632 18:15:39.793351 IA32_FEATURE_CONTROL status: locked
633 18:15:39.799960 IA32_FEATURE_CONTROL status: locked
634 18:15:39.800044 Skip microcode update
635 18:15:39.803308 Skip microcode update
636 18:15:39.806701 CPU #4 initialized
637 18:15:39.806785 CPU #3 initialized
638 18:15:39.809884 Skip microcode update
639 18:15:39.813157 IA32_FEATURE_CONTROL status: locked
640 18:15:39.813240 CPU #2 initialized
641 18:15:39.816429 Skip microcode update
642 18:15:39.819680 CPU #5 initialized
643 18:15:39.823020 bsp_do_flight_plan done after 457 msecs.
644 18:15:39.826414 CPU: frequency set to 4200 MHz
645 18:15:39.826582 Enabling SMIs.
646 18:15:39.829798 Locking SMM.
647 18:15:39.844179 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
648 18:15:39.847324 CBFS @ c08000 size 3f8000
649 18:15:39.853927 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
650 18:15:39.854066 CBFS: Locating 'vbt.bin'
651 18:15:39.857701 CBFS: Found @ offset 5f5c0 size 499
652 18:15:39.864032 Found a VBT of 4608 bytes after decompression
653 18:15:40.048850 Display FSP Version Info HOB
654 18:15:40.051986 Reference Code - CPU = 9.0.1e.30
655 18:15:40.055255 uCode Version = 0.0.0.ca
656 18:15:40.058372 TXT ACM version = ff.ff.ff.ffff
657 18:15:40.062155 Display FSP Version Info HOB
658 18:15:40.065432 Reference Code - ME = 9.0.1e.30
659 18:15:40.068676 MEBx version = 0.0.0.0
660 18:15:40.072039 ME Firmware Version = Consumer SKU
661 18:15:40.075289 Display FSP Version Info HOB
662 18:15:40.078687 Reference Code - CML PCH = 9.0.1e.30
663 18:15:40.081693 PCH-CRID Status = Disabled
664 18:15:40.085282 PCH-CRID Original Value = ff.ff.ff.ffff
665 18:15:40.088593 PCH-CRID New Value = ff.ff.ff.ffff
666 18:15:40.091794 OPROM - RST - RAID = ff.ff.ff.ffff
667 18:15:40.094900 ChipsetInit Base Version = ff.ff.ff.ffff
668 18:15:40.098186 ChipsetInit Oem Version = ff.ff.ff.ffff
669 18:15:40.101861 Display FSP Version Info HOB
670 18:15:40.108384 Reference Code - SA - System Agent = 9.0.1e.30
671 18:15:40.111602 Reference Code - MRC = 0.7.1.6c
672 18:15:40.111701 SA - PCIe Version = 9.0.1e.30
673 18:15:40.114836 SA-CRID Status = Disabled
674 18:15:40.118099 SA-CRID Original Value = 0.0.0.c
675 18:15:40.121719 SA-CRID New Value = 0.0.0.c
676 18:15:40.124950 OPROM - VBIOS = ff.ff.ff.ffff
677 18:15:40.127873 RTC Init
678 18:15:40.131406 Set power on after power failure.
679 18:15:40.131491 Disabling Deep S3
680 18:15:40.134785 Disabling Deep S3
681 18:15:40.134872 Disabling Deep S4
682 18:15:40.138034 Disabling Deep S4
683 18:15:40.138119 Disabling Deep S5
684 18:15:40.141479 Disabling Deep S5
685 18:15:40.148142 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 195 exit 1
686 18:15:40.148228 Enumerating buses...
687 18:15:40.154833 Show all devs... Before device enumeration.
688 18:15:40.154917 Root Device: enabled 1
689 18:15:40.158150 CPU_CLUSTER: 0: enabled 1
690 18:15:40.161408 DOMAIN: 0000: enabled 1
691 18:15:40.164612 APIC: 00: enabled 1
692 18:15:40.164696 PCI: 00:00.0: enabled 1
693 18:15:40.167918 PCI: 00:02.0: enabled 1
694 18:15:40.171140 PCI: 00:04.0: enabled 0
695 18:15:40.174346 PCI: 00:05.0: enabled 0
696 18:15:40.174430 PCI: 00:12.0: enabled 1
697 18:15:40.177709 PCI: 00:12.5: enabled 0
698 18:15:40.180978 PCI: 00:12.6: enabled 0
699 18:15:40.181061 PCI: 00:14.0: enabled 1
700 18:15:40.184600 PCI: 00:14.1: enabled 0
701 18:15:40.187797 PCI: 00:14.3: enabled 1
702 18:15:40.190856 PCI: 00:14.5: enabled 0
703 18:15:40.190940 PCI: 00:15.0: enabled 1
704 18:15:40.194545 PCI: 00:15.1: enabled 1
705 18:15:40.197826 PCI: 00:15.2: enabled 0
706 18:15:40.201046 PCI: 00:15.3: enabled 0
707 18:15:40.201129 PCI: 00:16.0: enabled 1
708 18:15:40.204142 PCI: 00:16.1: enabled 0
709 18:15:40.207570 PCI: 00:16.2: enabled 0
710 18:15:40.210834 PCI: 00:16.3: enabled 0
711 18:15:40.210918 PCI: 00:16.4: enabled 0
712 18:15:40.214110 PCI: 00:16.5: enabled 0
713 18:15:40.217457 PCI: 00:17.0: enabled 1
714 18:15:40.220790 PCI: 00:19.0: enabled 1
715 18:15:40.220873 PCI: 00:19.1: enabled 0
716 18:15:40.223886 PCI: 00:19.2: enabled 0
717 18:15:40.227239 PCI: 00:1a.0: enabled 0
718 18:15:40.227324 PCI: 00:1c.0: enabled 0
719 18:15:40.230964 PCI: 00:1c.1: enabled 0
720 18:15:40.234279 PCI: 00:1c.2: enabled 0
721 18:15:40.237318 PCI: 00:1c.3: enabled 0
722 18:15:40.237402 PCI: 00:1c.4: enabled 0
723 18:15:40.240627 PCI: 00:1c.5: enabled 0
724 18:15:40.243875 PCI: 00:1c.6: enabled 0
725 18:15:40.247470 PCI: 00:1c.7: enabled 0
726 18:15:40.247555 PCI: 00:1d.0: enabled 1
727 18:15:40.250868 PCI: 00:1d.1: enabled 0
728 18:15:40.254123 PCI: 00:1d.2: enabled 0
729 18:15:40.257507 PCI: 00:1d.3: enabled 0
730 18:15:40.257591 PCI: 00:1d.4: enabled 0
731 18:15:40.260756 PCI: 00:1d.5: enabled 1
732 18:15:40.264000 PCI: 00:1e.0: enabled 1
733 18:15:40.264083 PCI: 00:1e.1: enabled 0
734 18:15:40.267280 PCI: 00:1e.2: enabled 1
735 18:15:40.270450 PCI: 00:1e.3: enabled 1
736 18:15:40.273753 PCI: 00:1f.0: enabled 1
737 18:15:40.273837 PCI: 00:1f.1: enabled 1
738 18:15:40.277477 PCI: 00:1f.2: enabled 1
739 18:15:40.280813 PCI: 00:1f.3: enabled 1
740 18:15:40.284130 PCI: 00:1f.4: enabled 1
741 18:15:40.284227 PCI: 00:1f.5: enabled 1
742 18:15:40.287542 PCI: 00:1f.6: enabled 0
743 18:15:40.290429 USB0 port 0: enabled 1
744 18:15:40.290513 I2C: 00:15: enabled 1
745 18:15:40.293731 I2C: 00:5d: enabled 1
746 18:15:40.297080 GENERIC: 0.0: enabled 1
747 18:15:40.297164 I2C: 00:1a: enabled 1
748 18:15:40.300297 I2C: 00:38: enabled 1
749 18:15:40.303471 I2C: 00:39: enabled 1
750 18:15:40.307158 I2C: 00:3a: enabled 1
751 18:15:40.307241 I2C: 00:3b: enabled 1
752 18:15:40.310437 PCI: 00:00.0: enabled 1
753 18:15:40.313494 SPI: 00: enabled 1
754 18:15:40.313648 SPI: 01: enabled 1
755 18:15:40.316723 PNP: 0c09.0: enabled 1
756 18:15:40.320109 USB2 port 0: enabled 1
757 18:15:40.320193 USB2 port 1: enabled 1
758 18:15:40.323447 USB2 port 2: enabled 0
759 18:15:40.326699 USB2 port 3: enabled 0
760 18:15:40.326782 USB2 port 5: enabled 0
761 18:15:40.330446 USB2 port 6: enabled 1
762 18:15:40.333417 USB2 port 9: enabled 1
763 18:15:40.333501 USB3 port 0: enabled 1
764 18:15:40.336715 USB3 port 1: enabled 1
765 18:15:40.340421 USB3 port 2: enabled 1
766 18:15:40.343224 USB3 port 3: enabled 1
767 18:15:40.343308 USB3 port 4: enabled 0
768 18:15:40.346559 APIC: 03: enabled 1
769 18:15:40.350575 APIC: 01: enabled 1
770 18:15:40.350971 APIC: 07: enabled 1
771 18:15:40.353745 APIC: 06: enabled 1
772 18:15:40.354150 APIC: 05: enabled 1
773 18:15:40.357052 APIC: 04: enabled 1
774 18:15:40.360827 APIC: 02: enabled 1
775 18:15:40.361328 Compare with tree...
776 18:15:40.364237 Root Device: enabled 1
777 18:15:40.367318 CPU_CLUSTER: 0: enabled 1
778 18:15:40.367710 APIC: 00: enabled 1
779 18:15:40.370657 APIC: 03: enabled 1
780 18:15:40.373861 APIC: 01: enabled 1
781 18:15:40.374254 APIC: 07: enabled 1
782 18:15:40.376716 APIC: 06: enabled 1
783 18:15:40.379862 APIC: 05: enabled 1
784 18:15:40.379988 APIC: 04: enabled 1
785 18:15:40.383407 APIC: 02: enabled 1
786 18:15:40.386692 DOMAIN: 0000: enabled 1
787 18:15:40.390140 PCI: 00:00.0: enabled 1
788 18:15:40.390243 PCI: 00:02.0: enabled 1
789 18:15:40.393499 PCI: 00:04.0: enabled 0
790 18:15:40.396515 PCI: 00:05.0: enabled 0
791 18:15:40.399821 PCI: 00:12.0: enabled 1
792 18:15:40.403094 PCI: 00:12.5: enabled 0
793 18:15:40.403217 PCI: 00:12.6: enabled 0
794 18:15:40.406345 PCI: 00:14.0: enabled 1
795 18:15:40.409673 USB0 port 0: enabled 1
796 18:15:40.413448 USB2 port 0: enabled 1
797 18:15:40.416708 USB2 port 1: enabled 1
798 18:15:40.419913 USB2 port 2: enabled 0
799 18:15:40.420134 USB2 port 3: enabled 0
800 18:15:40.423042 USB2 port 5: enabled 0
801 18:15:40.426486 USB2 port 6: enabled 1
802 18:15:40.429906 USB2 port 9: enabled 1
803 18:15:40.433200 USB3 port 0: enabled 1
804 18:15:40.433505 USB3 port 1: enabled 1
805 18:15:40.436625 USB3 port 2: enabled 1
806 18:15:40.439857 USB3 port 3: enabled 1
807 18:15:40.443201 USB3 port 4: enabled 0
808 18:15:40.446668 PCI: 00:14.1: enabled 0
809 18:15:40.449934 PCI: 00:14.3: enabled 1
810 18:15:40.450323 PCI: 00:14.5: enabled 0
811 18:15:40.453163 PCI: 00:15.0: enabled 1
812 18:15:40.456459 I2C: 00:15: enabled 1
813 18:15:40.459790 PCI: 00:15.1: enabled 1
814 18:15:40.460179 I2C: 00:5d: enabled 1
815 18:15:40.463288 GENERIC: 0.0: enabled 1
816 18:15:40.466493 PCI: 00:15.2: enabled 0
817 18:15:40.469694 PCI: 00:15.3: enabled 0
818 18:15:40.472965 PCI: 00:16.0: enabled 1
819 18:15:40.473490 PCI: 00:16.1: enabled 0
820 18:15:40.476813 PCI: 00:16.2: enabled 0
821 18:15:40.479700 PCI: 00:16.3: enabled 0
822 18:15:40.483073 PCI: 00:16.4: enabled 0
823 18:15:40.486308 PCI: 00:16.5: enabled 0
824 18:15:40.486769 PCI: 00:17.0: enabled 1
825 18:15:40.489749 PCI: 00:19.0: enabled 1
826 18:15:40.492908 I2C: 00:1a: enabled 1
827 18:15:40.496090 I2C: 00:38: enabled 1
828 18:15:40.496521 I2C: 00:39: enabled 1
829 18:15:40.499691 I2C: 00:3a: enabled 1
830 18:15:40.502791 I2C: 00:3b: enabled 1
831 18:15:40.506195 PCI: 00:19.1: enabled 0
832 18:15:40.509429 PCI: 00:19.2: enabled 0
833 18:15:40.509731 PCI: 00:1a.0: enabled 0
834 18:15:40.512560 PCI: 00:1c.0: enabled 0
835 18:15:40.516057 PCI: 00:1c.1: enabled 0
836 18:15:40.518911 PCI: 00:1c.2: enabled 0
837 18:15:40.522154 PCI: 00:1c.3: enabled 0
838 18:15:40.522337 PCI: 00:1c.4: enabled 0
839 18:15:40.525314 PCI: 00:1c.5: enabled 0
840 18:15:40.529073 PCI: 00:1c.6: enabled 0
841 18:15:40.532352 PCI: 00:1c.7: enabled 0
842 18:15:40.535472 PCI: 00:1d.0: enabled 1
843 18:15:40.535590 PCI: 00:1d.1: enabled 0
844 18:15:40.538774 PCI: 00:1d.2: enabled 0
845 18:15:40.542158 PCI: 00:1d.3: enabled 0
846 18:15:40.545390 PCI: 00:1d.4: enabled 0
847 18:15:40.548618 PCI: 00:1d.5: enabled 1
848 18:15:40.548748 PCI: 00:00.0: enabled 1
849 18:15:40.551859 PCI: 00:1e.0: enabled 1
850 18:15:40.555264 PCI: 00:1e.1: enabled 0
851 18:15:40.558738 PCI: 00:1e.2: enabled 1
852 18:15:40.558824 SPI: 00: enabled 1
853 18:15:40.562229 PCI: 00:1e.3: enabled 1
854 18:15:40.565549 SPI: 01: enabled 1
855 18:15:40.569008 PCI: 00:1f.0: enabled 1
856 18:15:40.569102 PNP: 0c09.0: enabled 1
857 18:15:40.572438 PCI: 00:1f.1: enabled 1
858 18:15:40.575709 PCI: 00:1f.2: enabled 1
859 18:15:40.578903 PCI: 00:1f.3: enabled 1
860 18:15:40.582075 PCI: 00:1f.4: enabled 1
861 18:15:40.582467 PCI: 00:1f.5: enabled 1
862 18:15:40.585566 PCI: 00:1f.6: enabled 0
863 18:15:40.588818 Root Device scanning...
864 18:15:40.592154 scan_static_bus for Root Device
865 18:15:40.595538 CPU_CLUSTER: 0 enabled
866 18:15:40.595978 DOMAIN: 0000 enabled
867 18:15:40.598771 DOMAIN: 0000 scanning...
868 18:15:40.602331 PCI: pci_scan_bus for bus 00
869 18:15:40.605285 PCI: 00:00.0 [8086/0000] ops
870 18:15:40.608451 PCI: 00:00.0 [8086/9b61] enabled
871 18:15:40.611868 PCI: 00:02.0 [8086/0000] bus ops
872 18:15:40.615335 PCI: 00:02.0 [8086/9b41] enabled
873 18:15:40.618392 PCI: 00:04.0 [8086/1903] disabled
874 18:15:40.622305 PCI: 00:08.0 [8086/1911] enabled
875 18:15:40.625231 PCI: 00:12.0 [8086/02f9] enabled
876 18:15:40.628712 PCI: 00:14.0 [8086/0000] bus ops
877 18:15:40.631882 PCI: 00:14.0 [8086/02ed] enabled
878 18:15:40.635101 PCI: 00:14.2 [8086/02ef] enabled
879 18:15:40.638329 PCI: 00:14.3 [8086/02f0] enabled
880 18:15:40.641629 PCI: 00:15.0 [8086/0000] bus ops
881 18:15:40.645606 PCI: 00:15.0 [8086/02e8] enabled
882 18:15:40.648352 PCI: 00:15.1 [8086/0000] bus ops
883 18:15:40.651803 PCI: 00:15.1 [8086/02e9] enabled
884 18:15:40.655220 PCI: 00:16.0 [8086/0000] ops
885 18:15:40.658548 PCI: 00:16.0 [8086/02e0] enabled
886 18:15:40.662019 PCI: 00:17.0 [8086/0000] ops
887 18:15:40.665325 PCI: 00:17.0 [8086/02d3] enabled
888 18:15:40.668164 PCI: 00:19.0 [8086/0000] bus ops
889 18:15:40.671474 PCI: 00:19.0 [8086/02c5] enabled
890 18:15:40.675070 PCI: 00:1d.0 [8086/0000] bus ops
891 18:15:40.678422 PCI: 00:1d.0 [8086/02b0] enabled
892 18:15:40.685220 PCI: Static device PCI: 00:1d.5 not found, disabling it.
893 18:15:40.685648 PCI: 00:1e.0 [8086/0000] ops
894 18:15:40.688645 PCI: 00:1e.0 [8086/02a8] enabled
895 18:15:40.691948 PCI: 00:1e.2 [8086/0000] bus ops
896 18:15:40.694904 PCI: 00:1e.2 [8086/02aa] enabled
897 18:15:40.698357 PCI: 00:1e.3 [8086/0000] bus ops
898 18:15:40.701979 PCI: 00:1e.3 [8086/02ab] enabled
899 18:15:40.704896 PCI: 00:1f.0 [8086/0000] bus ops
900 18:15:40.708079 PCI: 00:1f.0 [8086/0284] enabled
901 18:15:40.714993 PCI: Static device PCI: 00:1f.1 not found, disabling it.
902 18:15:40.721195 PCI: Static device PCI: 00:1f.2 not found, disabling it.
903 18:15:40.724957 PCI: 00:1f.3 [8086/0000] bus ops
904 18:15:40.728264 PCI: 00:1f.3 [8086/02c8] enabled
905 18:15:40.731699 PCI: 00:1f.4 [8086/0000] bus ops
906 18:15:40.734662 PCI: 00:1f.4 [8086/02a3] enabled
907 18:15:40.737909 PCI: 00:1f.5 [8086/0000] bus ops
908 18:15:40.741609 PCI: 00:1f.5 [8086/02a4] enabled
909 18:15:40.744584 PCI: Leftover static devices:
910 18:15:40.745011 PCI: 00:05.0
911 18:15:40.748297 PCI: 00:12.5
912 18:15:40.748720 PCI: 00:12.6
913 18:15:40.749051 PCI: 00:14.1
914 18:15:40.751709 PCI: 00:14.5
915 18:15:40.752132 PCI: 00:15.2
916 18:15:40.754474 PCI: 00:15.3
917 18:15:40.754963 PCI: 00:16.1
918 18:15:40.755298 PCI: 00:16.2
919 18:15:40.757809 PCI: 00:16.3
920 18:15:40.758231 PCI: 00:16.4
921 18:15:40.761363 PCI: 00:16.5
922 18:15:40.761785 PCI: 00:19.1
923 18:15:40.764824 PCI: 00:19.2
924 18:15:40.765244 PCI: 00:1a.0
925 18:15:40.765576 PCI: 00:1c.0
926 18:15:40.767701 PCI: 00:1c.1
927 18:15:40.768124 PCI: 00:1c.2
928 18:15:40.771670 PCI: 00:1c.3
929 18:15:40.772091 PCI: 00:1c.4
930 18:15:40.772421 PCI: 00:1c.5
931 18:15:40.774338 PCI: 00:1c.6
932 18:15:40.774821 PCI: 00:1c.7
933 18:15:40.777668 PCI: 00:1d.1
934 18:15:40.778091 PCI: 00:1d.2
935 18:15:40.778421 PCI: 00:1d.3
936 18:15:40.781307 PCI: 00:1d.4
937 18:15:40.781728 PCI: 00:1d.5
938 18:15:40.784689 PCI: 00:1e.1
939 18:15:40.785114 PCI: 00:1f.1
940 18:15:40.787982 PCI: 00:1f.2
941 18:15:40.788413 PCI: 00:1f.6
942 18:15:40.791282 PCI: Check your devicetree.cb.
943 18:15:40.794153 PCI: 00:02.0 scanning...
944 18:15:40.797630 scan_generic_bus for PCI: 00:02.0
945 18:15:40.800923 scan_generic_bus for PCI: 00:02.0 done
946 18:15:40.807672 scan_bus: scanning of bus PCI: 00:02.0 took 10185 usecs
947 18:15:40.808156 PCI: 00:14.0 scanning...
948 18:15:40.810795 scan_static_bus for PCI: 00:14.0
949 18:15:40.814245 USB0 port 0 enabled
950 18:15:40.817773 USB0 port 0 scanning...
951 18:15:40.821101 scan_static_bus for USB0 port 0
952 18:15:40.821524 USB2 port 0 enabled
953 18:15:40.824105 USB2 port 1 enabled
954 18:15:40.827697 USB2 port 2 disabled
955 18:15:40.828120 USB2 port 3 disabled
956 18:15:40.830985 USB2 port 5 disabled
957 18:15:40.834398 USB2 port 6 enabled
958 18:15:40.834856 USB2 port 9 enabled
959 18:15:40.837721 USB3 port 0 enabled
960 18:15:40.841045 USB3 port 1 enabled
961 18:15:40.841471 USB3 port 2 enabled
962 18:15:40.844767 USB3 port 3 enabled
963 18:15:40.845188 USB3 port 4 disabled
964 18:15:40.847328 USB2 port 0 scanning...
965 18:15:40.850747 scan_static_bus for USB2 port 0
966 18:15:40.853915 scan_static_bus for USB2 port 0 done
967 18:15:40.860735 scan_bus: scanning of bus USB2 port 0 took 9703 usecs
968 18:15:40.864277 USB2 port 1 scanning...
969 18:15:40.867698 scan_static_bus for USB2 port 1
970 18:15:40.870569 scan_static_bus for USB2 port 1 done
971 18:15:40.873830 scan_bus: scanning of bus USB2 port 1 took 9704 usecs
972 18:15:40.877264 USB2 port 6 scanning...
973 18:15:40.880631 scan_static_bus for USB2 port 6
974 18:15:40.883644 scan_static_bus for USB2 port 6 done
975 18:15:40.890689 scan_bus: scanning of bus USB2 port 6 took 9703 usecs
976 18:15:40.894016 USB2 port 9 scanning...
977 18:15:40.896947 scan_static_bus for USB2 port 9
978 18:15:40.900308 scan_static_bus for USB2 port 9 done
979 18:15:40.903780 scan_bus: scanning of bus USB2 port 9 took 9708 usecs
980 18:15:40.906984 USB3 port 0 scanning...
981 18:15:40.910247 scan_static_bus for USB3 port 0
982 18:15:40.914062 scan_static_bus for USB3 port 0 done
983 18:15:40.920175 scan_bus: scanning of bus USB3 port 0 took 9696 usecs
984 18:15:40.923523 USB3 port 1 scanning...
985 18:15:40.927175 scan_static_bus for USB3 port 1
986 18:15:40.930239 scan_static_bus for USB3 port 1 done
987 18:15:40.936745 scan_bus: scanning of bus USB3 port 1 took 9703 usecs
988 18:15:40.937179 USB3 port 2 scanning...
989 18:15:40.940284 scan_static_bus for USB3 port 2
990 18:15:40.943785 scan_static_bus for USB3 port 2 done
991 18:15:40.949981 scan_bus: scanning of bus USB3 port 2 took 9694 usecs
992 18:15:40.953254 USB3 port 3 scanning...
993 18:15:40.956746 scan_static_bus for USB3 port 3
994 18:15:40.959906 scan_static_bus for USB3 port 3 done
995 18:15:40.966842 scan_bus: scanning of bus USB3 port 3 took 9704 usecs
996 18:15:40.969772 scan_static_bus for USB0 port 0 done
997 18:15:40.973317 scan_bus: scanning of bus USB0 port 0 took 155325 usecs
998 18:15:40.980242 scan_static_bus for PCI: 00:14.0 done
999 18:15:40.983309 scan_bus: scanning of bus PCI: 00:14.0 took 172944 usecs
1000 18:15:40.986828 PCI: 00:15.0 scanning...
1001 18:15:40.989806 scan_generic_bus for PCI: 00:15.0
1002 18:15:40.993411 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1003 18:15:40.999704 scan_generic_bus for PCI: 00:15.0 done
1004 18:15:41.003370 scan_bus: scanning of bus PCI: 00:15.0 took 14309 usecs
1005 18:15:41.006638 PCI: 00:15.1 scanning...
1006 18:15:41.009559 scan_generic_bus for PCI: 00:15.1
1007 18:15:41.012903 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1008 18:15:41.019872 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1009 18:15:41.022982 scan_generic_bus for PCI: 00:15.1 done
1010 18:15:41.029478 scan_bus: scanning of bus PCI: 00:15.1 took 18625 usecs
1011 18:15:41.029904 PCI: 00:19.0 scanning...
1012 18:15:41.032788 scan_generic_bus for PCI: 00:19.0
1013 18:15:41.039370 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1014 18:15:41.042429 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1015 18:15:41.046047 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1016 18:15:41.049533 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1017 18:15:41.055922 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1018 18:15:41.059370 scan_generic_bus for PCI: 00:19.0 done
1019 18:15:41.062508 scan_bus: scanning of bus PCI: 00:19.0 took 30735 usecs
1020 18:15:41.065672 PCI: 00:1d.0 scanning...
1021 18:15:41.069434 do_pci_scan_bridge for PCI: 00:1d.0
1022 18:15:41.072797 PCI: pci_scan_bus for bus 01
1023 18:15:41.076446 PCI: 01:00.0 [1c5c/1327] enabled
1024 18:15:41.079222 Enabling Common Clock Configuration
1025 18:15:41.085759 L1 Sub-State supported from root port 29
1026 18:15:41.089314 L1 Sub-State Support = 0xf
1027 18:15:41.089755 CommonModeRestoreTime = 0x28
1028 18:15:41.095816 Power On Value = 0x16, Power On Scale = 0x0
1029 18:15:41.096252 ASPM: Enabled L1
1030 18:15:41.102359 scan_bus: scanning of bus PCI: 00:1d.0 took 32780 usecs
1031 18:15:41.105706 PCI: 00:1e.2 scanning...
1032 18:15:41.109131 scan_generic_bus for PCI: 00:1e.2
1033 18:15:41.112626 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1034 18:15:41.115489 scan_generic_bus for PCI: 00:1e.2 done
1035 18:15:41.122088 scan_bus: scanning of bus PCI: 00:1e.2 took 13998 usecs
1036 18:15:41.125754 PCI: 00:1e.3 scanning...
1037 18:15:41.128639 scan_generic_bus for PCI: 00:1e.3
1038 18:15:41.132010 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1039 18:15:41.135440 scan_generic_bus for PCI: 00:1e.3 done
1040 18:15:41.141898 scan_bus: scanning of bus PCI: 00:1e.3 took 14002 usecs
1041 18:15:41.142612 PCI: 00:1f.0 scanning...
1042 18:15:41.145737 scan_static_bus for PCI: 00:1f.0
1043 18:15:41.149099 PNP: 0c09.0 enabled
1044 18:15:41.152044 scan_static_bus for PCI: 00:1f.0 done
1045 18:15:41.159013 scan_bus: scanning of bus PCI: 00:1f.0 took 12056 usecs
1046 18:15:41.162230 PCI: 00:1f.3 scanning...
1047 18:15:41.165250 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1048 18:15:41.168601 PCI: 00:1f.4 scanning...
1049 18:15:41.172061 scan_generic_bus for PCI: 00:1f.4
1050 18:15:41.175765 scan_generic_bus for PCI: 00:1f.4 done
1051 18:15:41.182112 scan_bus: scanning of bus PCI: 00:1f.4 took 10185 usecs
1052 18:15:41.185225 PCI: 00:1f.5 scanning...
1053 18:15:41.188288 scan_generic_bus for PCI: 00:1f.5
1054 18:15:41.191642 scan_generic_bus for PCI: 00:1f.5 done
1055 18:15:41.198638 scan_bus: scanning of bus PCI: 00:1f.5 took 10190 usecs
1056 18:15:41.205660 scan_bus: scanning of bus DOMAIN: 0000 took 604911 usecs
1057 18:15:41.208443 scan_static_bus for Root Device done
1058 18:15:41.211997 scan_bus: scanning of bus Root Device took 624779 usecs
1059 18:15:41.215142 done
1060 18:15:41.218600 Chrome EC: UHEPI supported
1061 18:15:41.222407 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1062 18:15:41.228332 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1063 18:15:41.235334 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1064 18:15:41.241354 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1065 18:15:41.244721 SPI flash protection: WPSW=0 SRP0=0
1066 18:15:41.251519 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1067 18:15:41.254956 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1068 18:15:41.258443 found VGA at PCI: 00:02.0
1069 18:15:41.261985 Setting up VGA for PCI: 00:02.0
1070 18:15:41.268402 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1071 18:15:41.271653 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1072 18:15:41.275006 Allocating resources...
1073 18:15:41.277788 Reading resources...
1074 18:15:41.281126 Root Device read_resources bus 0 link: 0
1075 18:15:41.284834 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1076 18:15:41.291343 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1077 18:15:41.294599 DOMAIN: 0000 read_resources bus 0 link: 0
1078 18:15:41.301692 PCI: 00:14.0 read_resources bus 0 link: 0
1079 18:15:41.305236 USB0 port 0 read_resources bus 0 link: 0
1080 18:15:41.313215 USB0 port 0 read_resources bus 0 link: 0 done
1081 18:15:41.316666 PCI: 00:14.0 read_resources bus 0 link: 0 done
1082 18:15:41.323705 PCI: 00:15.0 read_resources bus 1 link: 0
1083 18:15:41.327041 PCI: 00:15.0 read_resources bus 1 link: 0 done
1084 18:15:41.333551 PCI: 00:15.1 read_resources bus 2 link: 0
1085 18:15:41.336691 PCI: 00:15.1 read_resources bus 2 link: 0 done
1086 18:15:41.344542 PCI: 00:19.0 read_resources bus 3 link: 0
1087 18:15:41.351282 PCI: 00:19.0 read_resources bus 3 link: 0 done
1088 18:15:41.354741 PCI: 00:1d.0 read_resources bus 1 link: 0
1089 18:15:41.361363 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1090 18:15:41.364528 PCI: 00:1e.2 read_resources bus 4 link: 0
1091 18:15:41.371171 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1092 18:15:41.374408 PCI: 00:1e.3 read_resources bus 5 link: 0
1093 18:15:41.381137 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1094 18:15:41.384710 PCI: 00:1f.0 read_resources bus 0 link: 0
1095 18:15:41.390795 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1096 18:15:41.397577 DOMAIN: 0000 read_resources bus 0 link: 0 done
1097 18:15:41.400818 Root Device read_resources bus 0 link: 0 done
1098 18:15:41.403920 Done reading resources.
1099 18:15:41.407620 Show resources in subtree (Root Device)...After reading.
1100 18:15:41.414241 Root Device child on link 0 CPU_CLUSTER: 0
1101 18:15:41.417599 CPU_CLUSTER: 0 child on link 0 APIC: 00
1102 18:15:41.418085 APIC: 00
1103 18:15:41.420993 APIC: 03
1104 18:15:41.421423 APIC: 01
1105 18:15:41.424368 APIC: 07
1106 18:15:41.424820 APIC: 06
1107 18:15:41.425159 APIC: 05
1108 18:15:41.427291 APIC: 04
1109 18:15:41.427785 APIC: 02
1110 18:15:41.430681 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1111 18:15:41.483880 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1112 18:15:41.484718 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1113 18:15:41.485080 PCI: 00:00.0
1114 18:15:41.485393 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1115 18:15:41.485697 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1116 18:15:41.485986 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1117 18:15:41.533895 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1118 18:15:41.534814 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1119 18:15:41.535185 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1120 18:15:41.535507 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1121 18:15:41.535812 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1122 18:15:41.542695 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1123 18:15:41.546095 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1124 18:15:41.555587 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1125 18:15:41.565550 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1126 18:15:41.575631 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1127 18:15:41.585411 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1128 18:15:41.591968 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1129 18:15:41.602061 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1130 18:15:41.605377 PCI: 00:02.0
1131 18:15:41.615122 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1132 18:15:41.625139 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1133 18:15:41.635013 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1134 18:15:41.635515 PCI: 00:04.0
1135 18:15:41.638555 PCI: 00:08.0
1136 18:15:41.648250 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1137 18:15:41.648675 PCI: 00:12.0
1138 18:15:41.657920 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1139 18:15:41.661328 PCI: 00:14.0 child on link 0 USB0 port 0
1140 18:15:41.671547 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1141 18:15:41.678000 USB0 port 0 child on link 0 USB2 port 0
1142 18:15:41.678424 USB2 port 0
1143 18:15:41.681416 USB2 port 1
1144 18:15:41.681833 USB2 port 2
1145 18:15:41.685147 USB2 port 3
1146 18:15:41.685662 USB2 port 5
1147 18:15:41.688298 USB2 port 6
1148 18:15:41.688719 USB2 port 9
1149 18:15:41.691718 USB3 port 0
1150 18:15:41.692251 USB3 port 1
1151 18:15:41.694664 USB3 port 2
1152 18:15:41.695086 USB3 port 3
1153 18:15:41.698375 USB3 port 4
1154 18:15:41.701773 PCI: 00:14.2
1155 18:15:41.711104 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1156 18:15:41.721404 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1157 18:15:41.721924 PCI: 00:14.3
1158 18:15:41.731301 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1159 18:15:41.734439 PCI: 00:15.0 child on link 0 I2C: 01:15
1160 18:15:41.744252 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1161 18:15:41.747685 I2C: 01:15
1162 18:15:41.750693 PCI: 00:15.1 child on link 0 I2C: 02:5d
1163 18:15:41.760817 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 18:15:41.761248 I2C: 02:5d
1165 18:15:41.764510 GENERIC: 0.0
1166 18:15:41.767643 PCI: 00:16.0
1167 18:15:41.777452 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1168 18:15:41.777760 PCI: 00:17.0
1169 18:15:41.786849 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1170 18:15:41.796613 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1171 18:15:41.803309 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1172 18:15:41.813480 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1173 18:15:41.820042 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1174 18:15:41.829722 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1175 18:15:41.833059 PCI: 00:19.0 child on link 0 I2C: 03:1a
1176 18:15:41.843062 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1177 18:15:41.846478 I2C: 03:1a
1178 18:15:41.846626 I2C: 03:38
1179 18:15:41.846740 I2C: 03:39
1180 18:15:41.849921 I2C: 03:3a
1181 18:15:41.850023 I2C: 03:3b
1182 18:15:41.856594 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1183 18:15:41.863403 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1184 18:15:41.872737 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1185 18:15:41.882775 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1186 18:15:41.885908 PCI: 01:00.0
1187 18:15:41.896048 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1188 18:15:41.896217 PCI: 00:1e.0
1189 18:15:41.906392 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1190 18:15:41.916359 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1191 18:15:41.923181 PCI: 00:1e.2 child on link 0 SPI: 00
1192 18:15:41.932677 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1193 18:15:41.933241 SPI: 00
1194 18:15:41.936247 PCI: 00:1e.3 child on link 0 SPI: 01
1195 18:15:41.946294 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 18:15:41.949484 SPI: 01
1197 18:15:41.952854 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1198 18:15:41.962452 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1199 18:15:41.969279 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1200 18:15:41.972554 PNP: 0c09.0
1201 18:15:41.979142 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1202 18:15:41.982389 PCI: 00:1f.3
1203 18:15:41.992073 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1204 18:15:42.001974 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1205 18:15:42.002061 PCI: 00:1f.4
1206 18:15:42.012059 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1207 18:15:42.021693 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1208 18:15:42.025103 PCI: 00:1f.5
1209 18:15:42.031638 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1210 18:15:42.038352 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1211 18:15:42.044837 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1212 18:15:42.051681 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1213 18:15:42.054779 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1214 18:15:42.058329 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1215 18:15:42.065169 PCI: 00:17.0 18 * [0x60 - 0x67] io
1216 18:15:42.068131 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1217 18:15:42.075026 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1218 18:15:42.081413 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1219 18:15:42.088402 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1220 18:15:42.098179 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1221 18:15:42.104490 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1222 18:15:42.107672 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1223 18:15:42.114341 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1224 18:15:42.121011 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1225 18:15:42.124566 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1226 18:15:42.131063 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1227 18:15:42.134406 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1228 18:15:42.141145 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1229 18:15:42.144366 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1230 18:15:42.147816 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1231 18:15:42.154352 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1232 18:15:42.157391 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1233 18:15:42.164491 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1234 18:15:42.167832 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1235 18:15:42.174206 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1236 18:15:42.177661 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1237 18:15:42.184202 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1238 18:15:42.187523 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1239 18:15:42.194201 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1240 18:15:42.197490 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1241 18:15:42.203646 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1242 18:15:42.206874 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1243 18:15:42.213687 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1244 18:15:42.216864 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1245 18:15:42.220313 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1246 18:15:42.227270 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1247 18:15:42.236960 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1248 18:15:42.240248 avoid_fixed_resources: DOMAIN: 0000
1249 18:15:42.243787 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1250 18:15:42.250139 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1251 18:15:42.260054 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1252 18:15:42.266670 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1253 18:15:42.273203 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1254 18:15:42.280199 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1255 18:15:42.289731 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1256 18:15:42.296789 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1257 18:15:42.303295 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1258 18:15:42.312897 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1259 18:15:42.319720 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1260 18:15:42.326423 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1261 18:15:42.329776 Setting resources...
1262 18:15:42.336217 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1263 18:15:42.339537 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1264 18:15:42.342813 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1265 18:15:42.346169 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1266 18:15:42.349590 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1267 18:15:42.356461 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1268 18:15:42.362675 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1269 18:15:42.369488 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1270 18:15:42.376233 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1271 18:15:42.382480 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1272 18:15:42.385930 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1273 18:15:42.392359 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1274 18:15:42.395669 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1275 18:15:42.402731 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1276 18:15:42.405871 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1277 18:15:42.412569 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1278 18:15:42.415902 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1279 18:15:42.422687 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1280 18:15:42.426028 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1281 18:15:42.432374 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1282 18:15:42.435853 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1283 18:15:42.442100 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1284 18:15:42.445380 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1285 18:15:42.451976 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1286 18:15:42.455410 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1287 18:15:42.458848 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1288 18:15:42.465579 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1289 18:15:42.468434 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1290 18:15:42.475303 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1291 18:15:42.478781 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1292 18:15:42.485447 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1293 18:15:42.488854 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1294 18:15:42.498432 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1295 18:15:42.505030 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1296 18:15:42.511904 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1297 18:15:42.518313 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1298 18:15:42.524797 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1299 18:15:42.531909 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1300 18:15:42.534936 Root Device assign_resources, bus 0 link: 0
1301 18:15:42.541707 DOMAIN: 0000 assign_resources, bus 0 link: 0
1302 18:15:42.548191 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1303 18:15:42.557976 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1304 18:15:42.564822 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1305 18:15:42.575056 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1306 18:15:42.581186 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1307 18:15:42.591145 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1308 18:15:42.594643 PCI: 00:14.0 assign_resources, bus 0 link: 0
1309 18:15:42.597635 PCI: 00:14.0 assign_resources, bus 0 link: 0
1310 18:15:42.608007 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1311 18:15:42.614479 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1312 18:15:42.624359 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1313 18:15:42.631358 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1314 18:15:42.637578 PCI: 00:15.0 assign_resources, bus 1 link: 0
1315 18:15:42.641083 PCI: 00:15.0 assign_resources, bus 1 link: 0
1316 18:15:42.650898 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1317 18:15:42.654264 PCI: 00:15.1 assign_resources, bus 2 link: 0
1318 18:15:42.657519 PCI: 00:15.1 assign_resources, bus 2 link: 0
1319 18:15:42.667383 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1320 18:15:42.674134 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1321 18:15:42.684226 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1322 18:15:42.690558 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1323 18:15:42.697291 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1324 18:15:42.707348 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1325 18:15:42.713937 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1326 18:15:42.723691 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1327 18:15:42.727084 PCI: 00:19.0 assign_resources, bus 3 link: 0
1328 18:15:42.730073 PCI: 00:19.0 assign_resources, bus 3 link: 0
1329 18:15:42.740207 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1330 18:15:42.749847 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1331 18:15:42.756566 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1332 18:15:42.762975 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1333 18:15:42.769774 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1334 18:15:42.776534 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1335 18:15:42.782782 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1336 18:15:42.792823 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1337 18:15:42.796247 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1338 18:15:42.799704 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1339 18:15:42.809219 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1340 18:15:42.812682 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1341 18:15:42.819356 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1342 18:15:42.822603 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1343 18:15:42.829275 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1344 18:15:42.832648 LPC: Trying to open IO window from 800 size 1ff
1345 18:15:42.842504 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1346 18:15:42.849103 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1347 18:15:42.858824 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1348 18:15:42.865279 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1349 18:15:42.871952 DOMAIN: 0000 assign_resources, bus 0 link: 0
1350 18:15:42.875374 Root Device assign_resources, bus 0 link: 0
1351 18:15:42.878616 Done setting resources.
1352 18:15:42.885244 Show resources in subtree (Root Device)...After assigning values.
1353 18:15:42.888566 Root Device child on link 0 CPU_CLUSTER: 0
1354 18:15:42.892137 CPU_CLUSTER: 0 child on link 0 APIC: 00
1355 18:15:42.894951 APIC: 00
1356 18:15:42.895027 APIC: 03
1357 18:15:42.895132 APIC: 01
1358 18:15:42.898301 APIC: 07
1359 18:15:42.898409 APIC: 06
1360 18:15:42.901820 APIC: 05
1361 18:15:42.901930 APIC: 04
1362 18:15:42.902033 APIC: 02
1363 18:15:42.908136 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1364 18:15:42.918289 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1365 18:15:42.928140 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1366 18:15:42.928246 PCI: 00:00.0
1367 18:15:42.938150 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1368 18:15:42.947691 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1369 18:15:42.957822 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1370 18:15:42.967603 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1371 18:15:42.977443 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1372 18:15:42.984365 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1373 18:15:42.994909 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1374 18:15:43.004220 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1375 18:15:43.014087 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1376 18:15:43.023896 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1377 18:15:43.034437 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1378 18:15:43.041000 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1379 18:15:43.050703 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1380 18:15:43.060729 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1381 18:15:43.070515 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1382 18:15:43.080767 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1383 18:15:43.081188 PCI: 00:02.0
1384 18:15:43.093696 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1385 18:15:43.103434 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1386 18:15:43.113451 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1387 18:15:43.113892 PCI: 00:04.0
1388 18:15:43.117036 PCI: 00:08.0
1389 18:15:43.126470 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1390 18:15:43.126935 PCI: 00:12.0
1391 18:15:43.136554 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1392 18:15:43.143182 PCI: 00:14.0 child on link 0 USB0 port 0
1393 18:15:43.152954 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1394 18:15:43.156623 USB0 port 0 child on link 0 USB2 port 0
1395 18:15:43.159948 USB2 port 0
1396 18:15:43.160361 USB2 port 1
1397 18:15:43.163274 USB2 port 2
1398 18:15:43.163685 USB2 port 3
1399 18:15:43.166108 USB2 port 5
1400 18:15:43.166656 USB2 port 6
1401 18:15:43.169758 USB2 port 9
1402 18:15:43.170167 USB3 port 0
1403 18:15:43.172908 USB3 port 1
1404 18:15:43.173372 USB3 port 2
1405 18:15:43.176073 USB3 port 3
1406 18:15:43.176483 USB3 port 4
1407 18:15:43.179503 PCI: 00:14.2
1408 18:15:43.189591 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1409 18:15:43.199237 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1410 18:15:43.202891 PCI: 00:14.3
1411 18:15:43.212799 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1412 18:15:43.215632 PCI: 00:15.0 child on link 0 I2C: 01:15
1413 18:15:43.225770 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1414 18:15:43.229187 I2C: 01:15
1415 18:15:43.232225 PCI: 00:15.1 child on link 0 I2C: 02:5d
1416 18:15:43.242282 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1417 18:15:43.245436 I2C: 02:5d
1418 18:15:43.245854 GENERIC: 0.0
1419 18:15:43.248665 PCI: 00:16.0
1420 18:15:43.258744 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1421 18:15:43.259172 PCI: 00:17.0
1422 18:15:43.268940 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1423 18:15:43.278827 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1424 18:15:43.288354 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1425 18:15:43.298507 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1426 18:15:43.308597 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1427 18:15:43.318340 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1428 18:15:43.321813 PCI: 00:19.0 child on link 0 I2C: 03:1a
1429 18:15:43.331388 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1430 18:15:43.334853 I2C: 03:1a
1431 18:15:43.335280 I2C: 03:38
1432 18:15:43.338016 I2C: 03:39
1433 18:15:43.338429 I2C: 03:3a
1434 18:15:43.341425 I2C: 03:3b
1435 18:15:43.344941 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1436 18:15:43.354656 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1437 18:15:43.364359 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1438 18:15:43.374414 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1439 18:15:43.374883 PCI: 01:00.0
1440 18:15:43.387635 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1441 18:15:43.388058 PCI: 00:1e.0
1442 18:15:43.397987 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1443 18:15:43.411053 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1444 18:15:43.413892 PCI: 00:1e.2 child on link 0 SPI: 00
1445 18:15:43.424322 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1446 18:15:43.424851 SPI: 00
1447 18:15:43.427730 PCI: 00:1e.3 child on link 0 SPI: 01
1448 18:15:43.440932 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1449 18:15:43.441482 SPI: 01
1450 18:15:43.443958 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1451 18:15:43.453738 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1452 18:15:43.463785 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1453 18:15:43.464285 PNP: 0c09.0
1454 18:15:43.473813 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1455 18:15:43.474383 PCI: 00:1f.3
1456 18:15:43.483474 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1457 18:15:43.496704 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1458 18:15:43.497148 PCI: 00:1f.4
1459 18:15:43.506789 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1460 18:15:43.516470 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1461 18:15:43.516896 PCI: 00:1f.5
1462 18:15:43.529618 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1463 18:15:43.530041 Done allocating resources.
1464 18:15:43.536331 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1465 18:15:43.539273 Enabling resources...
1466 18:15:43.542685 PCI: 00:00.0 subsystem <- 8086/9b61
1467 18:15:43.545812 PCI: 00:00.0 cmd <- 06
1468 18:15:43.549600 PCI: 00:02.0 subsystem <- 8086/9b41
1469 18:15:43.552858 PCI: 00:02.0 cmd <- 03
1470 18:15:43.556056 PCI: 00:08.0 cmd <- 06
1471 18:15:43.559442 PCI: 00:12.0 subsystem <- 8086/02f9
1472 18:15:43.562917 PCI: 00:12.0 cmd <- 02
1473 18:15:43.565602 PCI: 00:14.0 subsystem <- 8086/02ed
1474 18:15:43.566293 PCI: 00:14.0 cmd <- 02
1475 18:15:43.569249 PCI: 00:14.2 cmd <- 02
1476 18:15:43.572487 PCI: 00:14.3 subsystem <- 8086/02f0
1477 18:15:43.575848 PCI: 00:14.3 cmd <- 02
1478 18:15:43.579115 PCI: 00:15.0 subsystem <- 8086/02e8
1479 18:15:43.582374 PCI: 00:15.0 cmd <- 02
1480 18:15:43.585580 PCI: 00:15.1 subsystem <- 8086/02e9
1481 18:15:43.588928 PCI: 00:15.1 cmd <- 02
1482 18:15:43.592418 PCI: 00:16.0 subsystem <- 8086/02e0
1483 18:15:43.595438 PCI: 00:16.0 cmd <- 02
1484 18:15:43.598452 PCI: 00:17.0 subsystem <- 8086/02d3
1485 18:15:43.601817 PCI: 00:17.0 cmd <- 03
1486 18:15:43.605175 PCI: 00:19.0 subsystem <- 8086/02c5
1487 18:15:43.608515 PCI: 00:19.0 cmd <- 02
1488 18:15:43.611919 PCI: 00:1d.0 bridge ctrl <- 0013
1489 18:15:43.614778 PCI: 00:1d.0 subsystem <- 8086/02b0
1490 18:15:43.618203 PCI: 00:1d.0 cmd <- 06
1491 18:15:43.621574 PCI: 00:1e.0 subsystem <- 8086/02a8
1492 18:15:43.621666 PCI: 00:1e.0 cmd <- 06
1493 18:15:43.628493 PCI: 00:1e.2 subsystem <- 8086/02aa
1494 18:15:43.628584 PCI: 00:1e.2 cmd <- 06
1495 18:15:43.631859 PCI: 00:1e.3 subsystem <- 8086/02ab
1496 18:15:43.635216 PCI: 00:1e.3 cmd <- 02
1497 18:15:43.638403 PCI: 00:1f.0 subsystem <- 8086/0284
1498 18:15:43.641237 PCI: 00:1f.0 cmd <- 407
1499 18:15:43.644647 PCI: 00:1f.3 subsystem <- 8086/02c8
1500 18:15:43.647908 PCI: 00:1f.3 cmd <- 02
1501 18:15:43.651314 PCI: 00:1f.4 subsystem <- 8086/02a3
1502 18:15:43.654554 PCI: 00:1f.4 cmd <- 03
1503 18:15:43.657810 PCI: 00:1f.5 subsystem <- 8086/02a4
1504 18:15:43.661362 PCI: 00:1f.5 cmd <- 406
1505 18:15:43.669499 PCI: 01:00.0 cmd <- 02
1506 18:15:43.674918 done.
1507 18:15:43.687728 ME: Version: 14.0.39.1367
1508 18:15:43.694853 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1509 18:15:43.698226 Initializing devices...
1510 18:15:43.698684 Root Device init ...
1511 18:15:43.704604 Chrome EC: Set SMI mask to 0x0000000000000000
1512 18:15:43.707742 Chrome EC: clear events_b mask to 0x0000000000000000
1513 18:15:43.714588 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1514 18:15:43.721274 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1515 18:15:43.727623 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1516 18:15:43.731048 Chrome EC: Set WAKE mask to 0x0000000000000000
1517 18:15:43.734440 Root Device init finished in 35197 usecs
1518 18:15:43.738260 CPU_CLUSTER: 0 init ...
1519 18:15:43.744415 CPU_CLUSTER: 0 init finished in 2440 usecs
1520 18:15:43.749072 PCI: 00:00.0 init ...
1521 18:15:43.752380 CPU TDP: 15 Watts
1522 18:15:43.755362 CPU PL2 = 64 Watts
1523 18:15:43.758704 PCI: 00:00.0 init finished in 7077 usecs
1524 18:15:43.761898 PCI: 00:02.0 init ...
1525 18:15:43.765689 PCI: 00:02.0 init finished in 2252 usecs
1526 18:15:43.768993 PCI: 00:08.0 init ...
1527 18:15:43.771662 PCI: 00:08.0 init finished in 2252 usecs
1528 18:15:43.775073 PCI: 00:12.0 init ...
1529 18:15:43.778363 PCI: 00:12.0 init finished in 2246 usecs
1530 18:15:43.782227 PCI: 00:14.0 init ...
1531 18:15:43.785166 PCI: 00:14.0 init finished in 2254 usecs
1532 18:15:43.788442 PCI: 00:14.2 init ...
1533 18:15:43.791962 PCI: 00:14.2 init finished in 2254 usecs
1534 18:15:43.794733 PCI: 00:14.3 init ...
1535 18:15:43.798227 PCI: 00:14.3 init finished in 2270 usecs
1536 18:15:43.801715 PCI: 00:15.0 init ...
1537 18:15:43.805216 DW I2C bus 0 at 0xd121f000 (400 KHz)
1538 18:15:43.807960 PCI: 00:15.0 init finished in 5981 usecs
1539 18:15:43.812155 PCI: 00:15.1 init ...
1540 18:15:43.815399 DW I2C bus 1 at 0xd1220000 (400 KHz)
1541 18:15:43.821411 PCI: 00:15.1 init finished in 5972 usecs
1542 18:15:43.821940 PCI: 00:16.0 init ...
1543 18:15:43.828083 PCI: 00:16.0 init finished in 2254 usecs
1544 18:15:43.831825 PCI: 00:19.0 init ...
1545 18:15:43.834505 DW I2C bus 4 at 0xd1222000 (400 KHz)
1546 18:15:43.838017 PCI: 00:19.0 init finished in 5982 usecs
1547 18:15:43.841251 PCI: 00:1d.0 init ...
1548 18:15:43.845029 Initializing PCH PCIe bridge.
1549 18:15:43.847922 PCI: 00:1d.0 init finished in 5287 usecs
1550 18:15:43.851352 PCI: 00:1f.0 init ...
1551 18:15:43.854800 IOAPIC: Initializing IOAPIC at 0xfec00000
1552 18:15:43.861391 IOAPIC: Bootstrap Processor Local APIC = 0x00
1553 18:15:43.861868 IOAPIC: ID = 0x02
1554 18:15:43.864678 IOAPIC: Dumping registers
1555 18:15:43.868099 reg 0x0000: 0x02000000
1556 18:15:43.871160 reg 0x0001: 0x00770020
1557 18:15:43.871593 reg 0x0002: 0x00000000
1558 18:15:43.877735 PCI: 00:1f.0 init finished in 23563 usecs
1559 18:15:43.881437 PCI: 00:1f.4 init ...
1560 18:15:43.884563 PCI: 00:1f.4 init finished in 2264 usecs
1561 18:15:43.895182 PCI: 01:00.0 init ...
1562 18:15:43.898083 PCI: 01:00.0 init finished in 2244 usecs
1563 18:15:43.902625 PNP: 0c09.0 init ...
1564 18:15:43.905965 Google Chrome EC uptime: 11.090 seconds
1565 18:15:43.912804 Google Chrome AP resets since EC boot: 0
1566 18:15:43.915986 Google Chrome most recent AP reset causes:
1567 18:15:43.922609 Google Chrome EC reset flags at last EC boot: reset-pin
1568 18:15:43.926093 PNP: 0c09.0 init finished in 20648 usecs
1569 18:15:43.929279 Devices initialized
1570 18:15:43.932730 Show all devs... After init.
1571 18:15:43.933251 Root Device: enabled 1
1572 18:15:43.935882 CPU_CLUSTER: 0: enabled 1
1573 18:15:43.939249 DOMAIN: 0000: enabled 1
1574 18:15:43.939681 APIC: 00: enabled 1
1575 18:15:43.942416 PCI: 00:00.0: enabled 1
1576 18:15:43.945926 PCI: 00:02.0: enabled 1
1577 18:15:43.949609 PCI: 00:04.0: enabled 0
1578 18:15:43.950153 PCI: 00:05.0: enabled 0
1579 18:15:43.952514 PCI: 00:12.0: enabled 1
1580 18:15:43.955908 PCI: 00:12.5: enabled 0
1581 18:15:43.958611 PCI: 00:12.6: enabled 0
1582 18:15:43.959028 PCI: 00:14.0: enabled 1
1583 18:15:43.962015 PCI: 00:14.1: enabled 0
1584 18:15:43.965488 PCI: 00:14.3: enabled 1
1585 18:15:43.965906 PCI: 00:14.5: enabled 0
1586 18:15:43.968817 PCI: 00:15.0: enabled 1
1587 18:15:43.972217 PCI: 00:15.1: enabled 1
1588 18:15:43.975636 PCI: 00:15.2: enabled 0
1589 18:15:43.976059 PCI: 00:15.3: enabled 0
1590 18:15:43.979027 PCI: 00:16.0: enabled 1
1591 18:15:43.982173 PCI: 00:16.1: enabled 0
1592 18:15:43.986037 PCI: 00:16.2: enabled 0
1593 18:15:43.986606 PCI: 00:16.3: enabled 0
1594 18:15:43.989176 PCI: 00:16.4: enabled 0
1595 18:15:43.992030 PCI: 00:16.5: enabled 0
1596 18:15:43.995727 PCI: 00:17.0: enabled 1
1597 18:15:43.996247 PCI: 00:19.0: enabled 1
1598 18:15:43.998913 PCI: 00:19.1: enabled 0
1599 18:15:44.001681 PCI: 00:19.2: enabled 0
1600 18:15:44.002100 PCI: 00:1a.0: enabled 0
1601 18:15:44.005294 PCI: 00:1c.0: enabled 0
1602 18:15:44.008700 PCI: 00:1c.1: enabled 0
1603 18:15:44.011729 PCI: 00:1c.2: enabled 0
1604 18:15:44.012027 PCI: 00:1c.3: enabled 0
1605 18:15:44.014664 PCI: 00:1c.4: enabled 0
1606 18:15:44.018016 PCI: 00:1c.5: enabled 0
1607 18:15:44.021394 PCI: 00:1c.6: enabled 0
1608 18:15:44.021505 PCI: 00:1c.7: enabled 0
1609 18:15:44.024828 PCI: 00:1d.0: enabled 1
1610 18:15:44.028032 PCI: 00:1d.1: enabled 0
1611 18:15:44.031441 PCI: 00:1d.2: enabled 0
1612 18:15:44.031542 PCI: 00:1d.3: enabled 0
1613 18:15:44.034818 PCI: 00:1d.4: enabled 0
1614 18:15:44.038125 PCI: 00:1d.5: enabled 0
1615 18:15:44.041317 PCI: 00:1e.0: enabled 1
1616 18:15:44.041414 PCI: 00:1e.1: enabled 0
1617 18:15:44.044379 PCI: 00:1e.2: enabled 1
1618 18:15:44.048025 PCI: 00:1e.3: enabled 1
1619 18:15:44.048107 PCI: 00:1f.0: enabled 1
1620 18:15:44.051291 PCI: 00:1f.1: enabled 0
1621 18:15:44.054503 PCI: 00:1f.2: enabled 0
1622 18:15:44.057788 PCI: 00:1f.3: enabled 1
1623 18:15:44.057888 PCI: 00:1f.4: enabled 1
1624 18:15:44.061046 PCI: 00:1f.5: enabled 1
1625 18:15:44.064369 PCI: 00:1f.6: enabled 0
1626 18:15:44.067787 USB0 port 0: enabled 1
1627 18:15:44.067885 I2C: 01:15: enabled 1
1628 18:15:44.071265 I2C: 02:5d: enabled 1
1629 18:15:44.074445 GENERIC: 0.0: enabled 1
1630 18:15:44.074583 I2C: 03:1a: enabled 1
1631 18:15:44.077383 I2C: 03:38: enabled 1
1632 18:15:44.080800 I2C: 03:39: enabled 1
1633 18:15:44.080905 I2C: 03:3a: enabled 1
1634 18:15:44.084174 I2C: 03:3b: enabled 1
1635 18:15:44.087297 PCI: 00:00.0: enabled 1
1636 18:15:44.087405 SPI: 00: enabled 1
1637 18:15:44.090883 SPI: 01: enabled 1
1638 18:15:44.094223 PNP: 0c09.0: enabled 1
1639 18:15:44.094326 USB2 port 0: enabled 1
1640 18:15:44.097697 USB2 port 1: enabled 1
1641 18:15:44.100560 USB2 port 2: enabled 0
1642 18:15:44.104064 USB2 port 3: enabled 0
1643 18:15:44.104169 USB2 port 5: enabled 0
1644 18:15:44.107514 USB2 port 6: enabled 1
1645 18:15:44.110335 USB2 port 9: enabled 1
1646 18:15:44.110432 USB3 port 0: enabled 1
1647 18:15:44.113614 USB3 port 1: enabled 1
1648 18:15:44.117042 USB3 port 2: enabled 1
1649 18:15:44.117139 USB3 port 3: enabled 1
1650 18:15:44.120347 USB3 port 4: enabled 0
1651 18:15:44.124035 APIC: 03: enabled 1
1652 18:15:44.124141 APIC: 01: enabled 1
1653 18:15:44.127476 APIC: 07: enabled 1
1654 18:15:44.130291 APIC: 06: enabled 1
1655 18:15:44.130389 APIC: 05: enabled 1
1656 18:15:44.133677 APIC: 04: enabled 1
1657 18:15:44.133776 APIC: 02: enabled 1
1658 18:15:44.137076 PCI: 00:08.0: enabled 1
1659 18:15:44.140371 PCI: 00:14.2: enabled 1
1660 18:15:44.143715 PCI: 01:00.0: enabled 1
1661 18:15:44.146998 Disabling ACPI via APMC:
1662 18:15:44.150341 done.
1663 18:15:44.153620 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1664 18:15:44.156901 ELOG: NV offset 0xaf0000 size 0x4000
1665 18:15:44.163608 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1666 18:15:44.170666 ELOG: Event(17) added with size 13 at 2023-10-25 18:15:44 UTC
1667 18:15:44.177237 ELOG: Event(92) added with size 9 at 2023-10-25 18:15:44 UTC
1668 18:15:44.183526 ELOG: Event(93) added with size 9 at 2023-10-25 18:15:44 UTC
1669 18:15:44.190376 ELOG: Event(9A) added with size 9 at 2023-10-25 18:15:44 UTC
1670 18:15:44.197229 ELOG: Event(9E) added with size 10 at 2023-10-25 18:15:44 UTC
1671 18:15:44.203489 ELOG: Event(9F) added with size 14 at 2023-10-25 18:15:44 UTC
1672 18:15:44.206877 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1673 18:15:44.214230 ELOG: Event(A1) added with size 10 at 2023-10-25 18:15:44 UTC
1674 18:15:44.224269 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1675 18:15:44.231037 ELOG: Event(A0) added with size 9 at 2023-10-25 18:15:44 UTC
1676 18:15:44.234417 elog_add_boot_reason: Logged dev mode boot
1677 18:15:44.237749 Finalize devices...
1678 18:15:44.237849 PCI: 00:17.0 final
1679 18:15:44.240722 Devices finalized
1680 18:15:44.244266 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1681 18:15:44.250779 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1682 18:15:44.254149 ME: HFSTS1 : 0x90000245
1683 18:15:44.257216 ME: HFSTS2 : 0x3B850126
1684 18:15:44.263923 ME: HFSTS3 : 0x00000020
1685 18:15:44.267024 ME: HFSTS4 : 0x00004800
1686 18:15:44.270801 ME: HFSTS5 : 0x00000000
1687 18:15:44.274008 ME: HFSTS6 : 0x40400006
1688 18:15:44.277361 ME: Manufacturing Mode : NO
1689 18:15:44.280553 ME: FW Partition Table : OK
1690 18:15:44.284054 ME: Bringup Loader Failure : NO
1691 18:15:44.287036 ME: Firmware Init Complete : YES
1692 18:15:44.290472 ME: Boot Options Present : NO
1693 18:15:44.293797 ME: Update In Progress : NO
1694 18:15:44.297062 ME: D0i3 Support : YES
1695 18:15:44.300619 ME: Low Power State Enabled : NO
1696 18:15:44.303907 ME: CPU Replaced : NO
1697 18:15:44.307055 ME: CPU Replacement Valid : YES
1698 18:15:44.310202 ME: Current Working State : 5
1699 18:15:44.313832 ME: Current Operation State : 1
1700 18:15:44.317091 ME: Current Operation Mode : 0
1701 18:15:44.320550 ME: Error Code : 0
1702 18:15:44.323746 ME: CPU Debug Disabled : YES
1703 18:15:44.327212 ME: TXT Support : NO
1704 18:15:44.333712 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1705 18:15:44.340416 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1706 18:15:44.340516 CBFS @ c08000 size 3f8000
1707 18:15:44.346919 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1708 18:15:44.350202 CBFS: Locating 'fallback/dsdt.aml'
1709 18:15:44.353515 CBFS: Found @ offset 10bb80 size 3fa5
1710 18:15:44.359751 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1711 18:15:44.363505 CBFS @ c08000 size 3f8000
1712 18:15:44.366884 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1713 18:15:44.370199 CBFS: Locating 'fallback/slic'
1714 18:15:44.375141 CBFS: 'fallback/slic' not found.
1715 18:15:44.381592 ACPI: Writing ACPI tables at 99b3e000.
1716 18:15:44.381706 ACPI: * FACS
1717 18:15:44.385317 ACPI: * DSDT
1718 18:15:44.388386 Ramoops buffer: 0x100000@0x99a3d000.
1719 18:15:44.391820 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1720 18:15:44.398822 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1721 18:15:44.401892 Google Chrome EC: version:
1722 18:15:44.405148 ro: helios_v2.0.2659-56403530b
1723 18:15:44.408694 rw: helios_v2.0.2849-c41de27e7d
1724 18:15:44.409137 running image: 1
1725 18:15:44.413136 ACPI: * FADT
1726 18:15:44.413608 SCI is IRQ9
1727 18:15:44.419614 ACPI: added table 1/32, length now 40
1728 18:15:44.420030 ACPI: * SSDT
1729 18:15:44.422622 Found 1 CPU(s) with 8 core(s) each.
1730 18:15:44.425794 Error: Could not locate 'wifi_sar' in VPD.
1731 18:15:44.432698 Checking CBFS for default SAR values
1732 18:15:44.436041 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1733 18:15:44.439177 CBFS @ c08000 size 3f8000
1734 18:15:44.446037 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1735 18:15:44.449318 CBFS: Locating 'wifi_sar_defaults.hex'
1736 18:15:44.452212 CBFS: Found @ offset 5fac0 size 77
1737 18:15:44.455656 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1738 18:15:44.462348 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1739 18:15:44.465734 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1740 18:15:44.472325 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1741 18:15:44.475615 failed to find key in VPD: dsm_calib_r0_0
1742 18:15:44.485853 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1743 18:15:44.488659 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1744 18:15:44.495881 failed to find key in VPD: dsm_calib_r0_1
1745 18:15:44.501918 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1746 18:15:44.508472 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1747 18:15:44.511878 failed to find key in VPD: dsm_calib_r0_2
1748 18:15:44.521618 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1749 18:15:44.524973 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1750 18:15:44.531572 failed to find key in VPD: dsm_calib_r0_3
1751 18:15:44.538641 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1752 18:15:44.545362 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1753 18:15:44.548605 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1754 18:15:44.554909 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1755 18:15:44.558240 EC returned error result code 1
1756 18:15:44.562497 EC returned error result code 1
1757 18:15:44.565669 EC returned error result code 1
1758 18:15:44.569162 PS2K: Bad resp from EC. Vivaldi disabled!
1759 18:15:44.575591 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1760 18:15:44.581913 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1761 18:15:44.585414 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1762 18:15:44.592161 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1763 18:15:44.595345 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1764 18:15:44.602013 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1765 18:15:44.608502 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1766 18:15:44.615164 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1767 18:15:44.618380 ACPI: added table 2/32, length now 44
1768 18:15:44.619048 ACPI: * MCFG
1769 18:15:44.625207 ACPI: added table 3/32, length now 48
1770 18:15:44.625618 ACPI: * TPM2
1771 18:15:44.628509 TPM2 log created at 99a2d000
1772 18:15:44.631788 ACPI: added table 4/32, length now 52
1773 18:15:44.634795 ACPI: * MADT
1774 18:15:44.635255 SCI is IRQ9
1775 18:15:44.638206 ACPI: added table 5/32, length now 56
1776 18:15:44.641701 current = 99b43ac0
1777 18:15:44.642144 ACPI: * DMAR
1778 18:15:44.644863 ACPI: added table 6/32, length now 60
1779 18:15:44.648208 ACPI: * IGD OpRegion
1780 18:15:44.651542 GMA: Found VBT in CBFS
1781 18:15:44.654766 GMA: Found valid VBT in CBFS
1782 18:15:44.658319 ACPI: added table 7/32, length now 64
1783 18:15:44.658782 ACPI: * HPET
1784 18:15:44.661302 ACPI: added table 8/32, length now 68
1785 18:15:44.664691 ACPI: done.
1786 18:15:44.667946 ACPI tables: 31744 bytes.
1787 18:15:44.670905 smbios_write_tables: 99a2c000
1788 18:15:44.674370 EC returned error result code 3
1789 18:15:44.677689 Couldn't obtain OEM name from CBI
1790 18:15:44.680837 Create SMBIOS type 17
1791 18:15:44.684147 PCI: 00:00.0 (Intel Cannonlake)
1792 18:15:44.684559 PCI: 00:14.3 (Intel WiFi)
1793 18:15:44.687706 SMBIOS tables: 939 bytes.
1794 18:15:44.691177 Writing table forward entry at 0x00000500
1795 18:15:44.697947 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1796 18:15:44.700869 Writing coreboot table at 0x99b62000
1797 18:15:44.707536 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1798 18:15:44.714402 1. 0000000000001000-000000000009ffff: RAM
1799 18:15:44.717476 2. 00000000000a0000-00000000000fffff: RESERVED
1800 18:15:44.720933 3. 0000000000100000-0000000099a2bfff: RAM
1801 18:15:44.727551 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1802 18:15:44.730666 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1803 18:15:44.737436 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1804 18:15:44.744009 7. 000000009a000000-000000009f7fffff: RESERVED
1805 18:15:44.747228 8. 00000000e0000000-00000000efffffff: RESERVED
1806 18:15:44.753680 9. 00000000fc000000-00000000fc000fff: RESERVED
1807 18:15:44.756841 10. 00000000fe000000-00000000fe00ffff: RESERVED
1808 18:15:44.760310 11. 00000000fed10000-00000000fed17fff: RESERVED
1809 18:15:44.767497 12. 00000000fed80000-00000000fed83fff: RESERVED
1810 18:15:44.770488 13. 00000000fed90000-00000000fed91fff: RESERVED
1811 18:15:44.776727 14. 00000000feda0000-00000000feda1fff: RESERVED
1812 18:15:44.780109 15. 0000000100000000-000000045e7fffff: RAM
1813 18:15:44.783439 Graphics framebuffer located at 0xc0000000
1814 18:15:44.786828 Passing 5 GPIOs to payload:
1815 18:15:44.793562 NAME | PORT | POLARITY | VALUE
1816 18:15:44.796599 write protect | undefined | high | low
1817 18:15:44.803605 lid | undefined | high | high
1818 18:15:44.809945 power | undefined | high | low
1819 18:15:44.813312 oprom | undefined | high | low
1820 18:15:44.820145 EC in RW | 0x000000cb | high | low
1821 18:15:44.820679 Board ID: 4
1822 18:15:44.826922 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1823 18:15:44.827494 CBFS @ c08000 size 3f8000
1824 18:15:44.833511 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1825 18:15:44.840083 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1826 18:15:44.843149 coreboot table: 1492 bytes.
1827 18:15:44.846378 IMD ROOT 0. 99fff000 00001000
1828 18:15:44.849802 IMD SMALL 1. 99ffe000 00001000
1829 18:15:44.853037 FSP MEMORY 2. 99c4e000 003b0000
1830 18:15:44.856572 CONSOLE 3. 99c2e000 00020000
1831 18:15:44.859802 FMAP 4. 99c2d000 0000054e
1832 18:15:44.863205 TIME STAMP 5. 99c2c000 00000910
1833 18:15:44.866156 VBOOT WORK 6. 99c18000 00014000
1834 18:15:44.869449 MRC DATA 7. 99c16000 00001958
1835 18:15:44.872881 ROMSTG STCK 8. 99c15000 00001000
1836 18:15:44.876198 AFTER CAR 9. 99c0b000 0000a000
1837 18:15:44.879513 RAMSTAGE 10. 99baf000 0005c000
1838 18:15:44.882811 REFCODE 11. 99b7a000 00035000
1839 18:15:44.886032 SMM BACKUP 12. 99b6a000 00010000
1840 18:15:44.889286 COREBOOT 13. 99b62000 00008000
1841 18:15:44.892489 ACPI 14. 99b3e000 00024000
1842 18:15:44.895817 ACPI GNVS 15. 99b3d000 00001000
1843 18:15:44.899371 RAMOOPS 16. 99a3d000 00100000
1844 18:15:44.902343 TPM2 TCGLOG17. 99a2d000 00010000
1845 18:15:44.905731 SMBIOS 18. 99a2c000 00000800
1846 18:15:44.909018 IMD small region:
1847 18:15:44.912134 IMD ROOT 0. 99ffec00 00000400
1848 18:15:44.915735 FSP RUNTIME 1. 99ffebe0 00000004
1849 18:15:44.919114 EC HOSTEVENT 2. 99ffebc0 00000008
1850 18:15:44.922355 POWER STATE 3. 99ffeb80 00000040
1851 18:15:44.925625 ROMSTAGE 4. 99ffeb60 00000004
1852 18:15:44.928392 MEM INFO 5. 99ffe9a0 000001b9
1853 18:15:44.931767 VPD 6. 99ffe920 0000006c
1854 18:15:44.935011 MTRR: Physical address space:
1855 18:15:44.941633 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1856 18:15:44.948607 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1857 18:15:44.955209 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1858 18:15:44.961953 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1859 18:15:44.965064 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1860 18:15:44.971552 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1861 18:15:44.978369 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1862 18:15:44.981592 MTRR: Fixed MSR 0x250 0x0606060606060606
1863 18:15:44.988368 MTRR: Fixed MSR 0x258 0x0606060606060606
1864 18:15:44.991545 MTRR: Fixed MSR 0x259 0x0000000000000000
1865 18:15:44.994862 MTRR: Fixed MSR 0x268 0x0606060606060606
1866 18:15:44.998190 MTRR: Fixed MSR 0x269 0x0606060606060606
1867 18:15:45.004693 MTRR: Fixed MSR 0x26a 0x0606060606060606
1868 18:15:45.007828 MTRR: Fixed MSR 0x26b 0x0606060606060606
1869 18:15:45.011560 MTRR: Fixed MSR 0x26c 0x0606060606060606
1870 18:15:45.014625 MTRR: Fixed MSR 0x26d 0x0606060606060606
1871 18:15:45.020979 MTRR: Fixed MSR 0x26e 0x0606060606060606
1872 18:15:45.024497 MTRR: Fixed MSR 0x26f 0x0606060606060606
1873 18:15:45.027705 call enable_fixed_mtrr()
1874 18:15:45.031022 CPU physical address size: 39 bits
1875 18:15:45.034339 MTRR: default type WB/UC MTRR counts: 6/8.
1876 18:15:45.037699 MTRR: WB selected as default type.
1877 18:15:45.044355 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1878 18:15:45.050945 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1879 18:15:45.057535 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1880 18:15:45.064226 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1881 18:15:45.070918 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1882 18:15:45.077087 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1883 18:15:45.080412 MTRR: Fixed MSR 0x250 0x0606060606060606
1884 18:15:45.083894 MTRR: Fixed MSR 0x258 0x0606060606060606
1885 18:15:45.090725 MTRR: Fixed MSR 0x259 0x0000000000000000
1886 18:15:45.094022 MTRR: Fixed MSR 0x268 0x0606060606060606
1887 18:15:45.097521 MTRR: Fixed MSR 0x269 0x0606060606060606
1888 18:15:45.100565 MTRR: Fixed MSR 0x26a 0x0606060606060606
1889 18:15:45.107129 MTRR: Fixed MSR 0x26b 0x0606060606060606
1890 18:15:45.110375 MTRR: Fixed MSR 0x26c 0x0606060606060606
1891 18:15:45.113546 MTRR: Fixed MSR 0x26d 0x0606060606060606
1892 18:15:45.116804 MTRR: Fixed MSR 0x26e 0x0606060606060606
1893 18:15:45.123315 MTRR: Fixed MSR 0x26f 0x0606060606060606
1894 18:15:45.123396
1895 18:15:45.123459 MTRR check
1896 18:15:45.127082 call enable_fixed_mtrr()
1897 18:15:45.130137 Fixed MTRRs : Enabled
1898 18:15:45.130217 Variable MTRRs: Enabled
1899 18:15:45.130280
1900 18:15:45.136797 MTRR: Fixed MSR 0x250 0x0606060606060606
1901 18:15:45.140121 MTRR: Fixed MSR 0x250 0x0606060606060606
1902 18:15:45.143510 MTRR: Fixed MSR 0x258 0x0606060606060606
1903 18:15:45.146419 MTRR: Fixed MSR 0x259 0x0000000000000000
1904 18:15:45.153036 MTRR: Fixed MSR 0x268 0x0606060606060606
1905 18:15:45.156816 MTRR: Fixed MSR 0x269 0x0606060606060606
1906 18:15:45.159699 MTRR: Fixed MSR 0x26a 0x0606060606060606
1907 18:15:45.163049 MTRR: Fixed MSR 0x26b 0x0606060606060606
1908 18:15:45.166324 MTRR: Fixed MSR 0x26c 0x0606060606060606
1909 18:15:45.172979 MTRR: Fixed MSR 0x26d 0x0606060606060606
1910 18:15:45.176269 MTRR: Fixed MSR 0x26e 0x0606060606060606
1911 18:15:45.179583 MTRR: Fixed MSR 0x26f 0x0606060606060606
1912 18:15:45.186550 MTRR: Fixed MSR 0x258 0x0606060606060606
1913 18:15:54.669423 call enable_fixed_mtrr()
1914 18:15:54.670372 MTRR: Fixed MSR 0x259 0x0000000000000000
1915 18:15:54.670837 MTRR: Fixed MSR 0x268 0x0606060606060606
1916 18:15:54.671178 MTRR: Fixed MSR 0x269 0x0606060606060606
1917 18:15:54.671498 MTRR: Fixed MSR 0x26a 0x0606060606060606
1918 18:15:54.671807 MTRR: Fixed MSR 0x26b 0x0606060606060606
1919 18:15:54.672111 MTRR: Fixed MSR 0x26c 0x0606060606060606
1920 18:15:54.672461 MTRR: Fixed MSR 0x26d 0x0606060606060606
1921 18:15:54.672774 MTRR: Fixed MSR 0x26e 0x0606060606060606
1922 18:15:54.673070 MTRR: Fixed MSR 0x26f 0x0606060606060606
1923 18:15:54.673363 CPU physical address size: 39 bits
1924 18:15:54.673654 call enable_fixed_mtrr()
1925 18:15:54.673947 MTRR: Fixed MSR 0x250 0x0606060606060606
1926 18:15:54.674238 MTRR: Fixed MSR 0x258 0x0606060606060606
1927 18:15:54.674565 MTRR: Fixed MSR 0x259 0x0000000000000000
1928 18:15:54.674883 MTRR: Fixed MSR 0x268 0x0606060606060606
1929 18:15:54.675174 MTRR: Fixed MSR 0x269 0x0606060606060606
1930 18:15:54.675463 MTRR: Fixed MSR 0x26a 0x0606060606060606
1931 18:15:54.675785 MTRR: Fixed MSR 0x26b 0x0606060606060606
1932 18:15:54.676108 MTRR: Fixed MSR 0x26c 0x0606060606060606
1933 18:15:54.676399 MTRR: Fixed MSR 0x26d 0x0606060606060606
1934 18:15:54.676687 MTRR: Fixed MSR 0x26e 0x0606060606060606
1935 18:15:54.676974 MTRR: Fixed MSR 0x26f 0x0606060606060606
1936 18:15:54.677263 MTRR: Fixed MSR 0x250 0x0606060606060606
1937 18:15:54.677548 call enable_fixed_mtrr()
1938 18:15:54.677831 MTRR: Fixed MSR 0x258 0x0606060606060606
1939 18:15:54.678119 MTRR: Fixed MSR 0x259 0x0000000000000000
1940 18:15:54.678407 MTRR: Fixed MSR 0x268 0x0606060606060606
1941 18:15:54.678865 MTRR: Fixed MSR 0x269 0x0606060606060606
1942 18:15:54.679283 MTRR: Fixed MSR 0x26a 0x0606060606060606
1943 18:15:54.679628 MTRR: Fixed MSR 0x26b 0x0606060606060606
1944 18:15:54.679924 MTRR: Fixed MSR 0x26c 0x0606060606060606
1945 18:15:54.680290 MTRR: Fixed MSR 0x26d 0x0606060606060606
1946 18:15:54.680588 MTRR: Fixed MSR 0x26e 0x0606060606060606
1947 18:15:54.680940 MTRR: Fixed MSR 0x26f 0x0606060606060606
1948 18:15:54.681231 CPU physical address size: 39 bits
1949 18:15:54.681522 call enable_fixed_mtrr()
1950 18:15:54.681813 MTRR: Fixed MSR 0x250 0x0606060606060606
1951 18:15:54.682104 MTRR: Fixed MSR 0x250 0x0606060606060606
1952 18:15:54.682436 MTRR: Fixed MSR 0x258 0x0606060606060606
1953 18:15:54.682802 MTRR: Fixed MSR 0x259 0x0000000000000000
1954 18:15:54.683098 MTRR: Fixed MSR 0x268 0x0606060606060606
1955 18:15:54.683389 MTRR: Fixed MSR 0x269 0x0606060606060606
1956 18:15:54.683673 MTRR: Fixed MSR 0x26a 0x0606060606060606
1957 18:15:54.683961 MTRR: Fixed MSR 0x26b 0x0606060606060606
1958 18:15:54.684309 MTRR: Fixed MSR 0x26c 0x0606060606060606
1959 18:15:54.684614 MTRR: Fixed MSR 0x26d 0x0606060606060606
1960 18:15:54.684903 MTRR: Fixed MSR 0x26e 0x0606060606060606
1961 18:15:54.685192 MTRR: Fixed MSR 0x26f 0x0606060606060606
1962 18:15:54.685499 MTRR: Fixed MSR 0x258 0x0606060606060606
1963 18:15:54.685812 call enable_fixed_mtrr()
1964 18:15:54.686110 MTRR: Fixed MSR 0x259 0x0000000000000000
1965 18:15:54.686399 MTRR: Fixed MSR 0x268 0x0606060606060606
1966 18:15:54.686739 MTRR: Fixed MSR 0x269 0x0606060606060606
1967 18:15:54.687032 MTRR: Fixed MSR 0x26a 0x0606060606060606
1968 18:15:54.687319 MTRR: Fixed MSR 0x26b 0x0606060606060606
1969 18:15:54.687606 MTRR: Fixed MSR 0x26c 0x0606060606060606
1970 18:15:54.687892 MTRR: Fixed MSR 0x26d 0x0606060606060606
1971 18:15:54.688181 MTRR: Fixed MSR 0x26e 0x0606060606060606
1972 18:15:54.688629 MTRR: Fixed MSR 0x26f 0x0606060606060606
1973 18:15:54.689046 CPU physical address size: 39 bits
1974 18:15:54.689349 call enable_fixed_mtrr()
1975 18:15:54.689638 CPU physical address size: 39 bits
1976 18:15:54.689945 CPU physical address size: 39 bits
1977 18:15:54.690235 CPU physical address size: 39 bits
1978 18:15:54.690556 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1979 18:15:54.690872 CPU physical address size: 39 bits
1980 18:15:54.691164 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1981 18:15:54.691453 CBFS @ c08000 size 3f8000
1982 18:15:54.691740 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1983 18:15:54.691963 CBFS: Locating 'fallback/payload'
1984 18:15:54.692164 CBFS: Found @ offset 1c96c0 size 3f798
1985 18:15:54.692367 Checking segment from ROM address 0xffdd16f8
1986 18:15:54.692572 Checking segment from ROM address 0xffdd1714
1987 18:15:54.692777 Loading segment from ROM address 0xffdd16f8
1988 18:15:54.692979 code (compression=0)
1989 18:15:54.693181 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1990 18:15:54.693386 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1991 18:15:54.693590 it's not compressed!
1992 18:15:54.693793 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1993 18:15:54.693998 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1994 18:15:54.694203 Loading segment from ROM address 0xffdd1714
1995 18:15:54.694408 Entry Point 0x30000000
1996 18:15:54.694645 Loaded segments
1997 18:15:54.694856 Finalizing chipset.
1998 18:15:54.695063 Finalizing SMM.
1999 18:15:54.695266 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
2000 18:15:54.695468 mp_park_aps done after 0 msecs.
2001 18:15:54.695670 Jumping to boot code at 30000000(99b62000)
2002 18:15:54.695874 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2003 18:15:54.696083
2004 18:15:54.696288
2005 18:15:54.696491
2006 18:15:54.696750 Starting depthcharge on Helios...
2007 18:15:54.696942
2008 18:15:54.697106 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2009 18:15:54.697394
2010 18:15:54.697567 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2011 18:15:54.697724
2012 18:15:54.697876 board_setup: Info: eMMC controller not present; skipping
2013 18:15:54.698029
2014 18:15:54.698179 New NVMe Controller 0x30053ac0 @ 00:1d:00
2015 18:15:54.698331
2016 18:15:54.698479 board_setup: Info: SDHCI controller not present; skipping
2017 18:15:54.698668
2018 18:15:54.699321 end: 2.2.3 depthcharge-start (duration 00:00:22) [common]
2019 18:15:54.699580 start: 2.2.4 bootloader-commands (timeout 00:04:33) [common]
2020 18:15:54.699808 Setting prompt string to ['hatch:']
2021 18:15:54.700028 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:33)
2022 18:15:54.700391 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2023 18:15:54.700588
2024 18:15:54.700781 Wipe memory regions:
2025 18:15:54.700951
2026 18:15:54.701109 [0x00000000001000, 0x000000000a0000)
2027 18:15:54.701266
2028 18:15:54.701420 [0x00000000100000, 0x00000030000000)
2029 18:15:54.701573
2030 18:15:54.701737 [0x00000030657430, 0x00000099a2c000)
2031 18:15:54.701858
2032 18:15:54.701978 [0x00000100000000, 0x0000045e800000)
2033 18:15:54.702097
2034 18:15:54.702216 R8152: Initializing
2035 18:15:54.702335
2036 18:15:54.702453 Version 9 (ocp_data = 6010)
2037 18:15:54.702617
2038 18:15:54.702743 R8152: Done initializing
2039 18:15:54.702863
2040 18:15:54.702984 Adding net device
2041 18:15:54.703103
2042 18:15:54.703222 R8152: Initializing
2043 18:15:54.703341
2044 18:15:54.703460 Version 6 (ocp_data = 5c30)
2045 18:15:54.703580
2046 18:15:54.703698 R8152: Done initializing
2047 18:15:54.703817
2048 18:15:54.703937 net_add_device: Attemp to include the same device
2049 18:15:54.704060
2050 18:15:54.704180 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2051 18:15:54.704301
2052 18:15:54.704420
2053 18:15:54.704574
2054 18:15:54.704980 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2056 18:15:54.805749 hatch: tftpboot 192.168.201.1 11876197/tftp-deploy-gz7la1ve/kernel/bzImage 11876197/tftp-deploy-gz7la1ve/kernel/cmdline 11876197/tftp-deploy-gz7la1ve/ramdisk/ramdisk.cpio.gz
2057 18:15:54.806484 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2058 18:15:54.807221 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:33)
2059 18:15:54.811366 tftpboot 192.168.201.1 11876197/tftp-deploy-gz7la1ve/kernel/bzImloy-gz7la1ve/kernel/cmdline 11876197/tftp-deploy-gz7la1ve/ramdisk/ramdisk.cpio.gz
2060 18:15:54.811843
2061 18:15:54.812199 Waiting for link
2062 18:15:55.012079
2063 18:15:55.012649 done.
2064 18:15:55.013028
2065 18:15:55.013357 MAC: 00:24:32:50:1a:5f
2066 18:15:55.013679
2067 18:15:55.015485 Sending DHCP discover... done.
2068 18:15:55.015983
2069 18:15:55.018460 Waiting for reply... done.
2070 18:15:55.018968
2071 18:15:55.021883 Sending DHCP request... done.
2072 18:15:55.022480
2073 18:15:55.029942 Waiting for reply... done.
2074 18:15:55.030394
2075 18:15:55.030830 My ip is 192.168.201.21
2076 18:15:55.031168
2077 18:15:55.036680 The DHCP server ip is 192.168.201.1
2078 18:15:55.037304
2079 18:15:55.039951 TFTP server IP predefined by user: 192.168.201.1
2080 18:15:55.040418
2081 18:15:55.046742 Bootfile predefined by user: 11876197/tftp-deploy-gz7la1ve/kernel/bzImage
2082 18:15:55.047226
2083 18:15:55.050099 Sending tftp read request... done.
2084 18:15:55.050582
2085 18:15:55.059302 Waiting for the transfer...
2086 18:15:55.059755
2087 18:15:55.728524 00000000 ################################################################
2088 18:15:55.729068
2089 18:15:56.395488 00080000 ################################################################
2090 18:15:56.396075
2091 18:15:57.053719 00100000 ################################################################
2092 18:15:57.053854
2093 18:15:57.662919 00180000 ################################################################
2094 18:15:57.663090
2095 18:15:58.322860 00200000 ################################################################
2096 18:15:58.323003
2097 18:15:58.901941 00280000 ################################################################
2098 18:15:58.902088
2099 18:15:59.457356 00300000 ################################################################
2100 18:15:59.457521
2101 18:15:59.982769 00380000 ################################################################
2102 18:15:59.982921
2103 18:16:00.503491 00400000 ################################################################
2104 18:16:00.503628
2105 18:16:01.053997 00480000 ################################################################
2106 18:16:01.054141
2107 18:16:01.586937 00500000 ################################################################
2108 18:16:01.587071
2109 18:16:02.140373 00580000 ################################################################
2110 18:16:02.140503
2111 18:16:02.701263 00600000 ################################################################
2112 18:16:02.701408
2113 18:16:03.248538 00680000 ################################################################
2114 18:16:03.248671
2115 18:16:03.901100 00700000 ################################################################
2116 18:16:03.901286
2117 18:16:04.452744 00780000 ################################################################
2118 18:16:04.452892
2119 18:16:05.000389 00800000 ################################################################
2120 18:16:05.000536
2121 18:16:05.527551 00880000 ################################################################
2122 18:16:05.527722
2123 18:16:06.059956 00900000 ################################################################
2124 18:16:06.060099
2125 18:16:06.622076 00980000 ################################################################
2126 18:16:06.622253
2127 18:16:07.154341 00a00000 ################################################################
2128 18:16:07.154515
2129 18:16:07.687515 00a80000 ################################################################
2130 18:16:07.687662
2131 18:16:07.726311 00b00000 ##### done.
2132 18:16:07.726408
2133 18:16:07.729647 The bootfile was 11571200 bytes long.
2134 18:16:07.729730
2135 18:16:07.732922 Sending tftp read request... done.
2136 18:16:07.733003
2137 18:16:07.736198 Waiting for the transfer...
2138 18:16:07.736280
2139 18:16:08.275601 00000000 ################################################################
2140 18:16:08.275748
2141 18:16:08.846516 00080000 ################################################################
2142 18:16:08.846688
2143 18:16:09.382944 00100000 ################################################################
2144 18:16:09.383152
2145 18:16:09.949538 00180000 ################################################################
2146 18:16:09.949837
2147 18:16:10.498756 00200000 ################################################################
2148 18:16:10.498903
2149 18:16:11.034564 00280000 ################################################################
2150 18:16:11.034766
2151 18:16:11.587516 00300000 ################################################################
2152 18:16:11.587661
2153 18:16:12.157350 00380000 ################################################################
2154 18:16:12.157517
2155 18:16:12.695726 00400000 ################################################################
2156 18:16:12.695869
2157 18:16:13.263681 00480000 ################################################################
2158 18:16:13.263859
2159 18:16:13.827484 00500000 ################################################################
2160 18:16:13.827618
2161 18:16:14.433950 00580000 ################################################################
2162 18:16:14.434079
2163 18:16:14.549291 00600000 ############## done.
2164 18:16:14.549421
2165 18:16:14.553015 Sending tftp read request... done.
2166 18:16:14.553431
2167 18:16:14.556263 Waiting for the transfer...
2168 18:16:14.556696
2169 18:16:14.557159 00000000 # done.
2170 18:16:14.557582
2171 18:16:14.566094 Command line loaded dynamically from TFTP file: 11876197/tftp-deploy-gz7la1ve/kernel/cmdline
2172 18:16:14.566557
2173 18:16:14.596073 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11876197/extract-nfsrootfs-uqsruscf,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2174 18:16:14.596515
2175 18:16:14.599349 ec_init(0): CrosEC protocol v3 supported (256, 256)
2176 18:16:14.606105
2177 18:16:14.609601 Shutting down all USB controllers.
2178 18:16:14.610031
2179 18:16:14.610577 Removing current net device
2180 18:16:14.616868
2181 18:16:14.617416 Finalizing coreboot
2182 18:16:14.617754
2183 18:16:14.623557 Exiting depthcharge with code 4 at timestamp: 36374555
2184 18:16:14.623968
2185 18:16:14.624286
2186 18:16:14.624584 Starting kernel ...
2187 18:16:14.624872
2188 18:16:14.626110 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2189 18:16:14.626636 start: 2.2.5 auto-login-action (timeout 00:04:13) [common]
2190 18:16:14.627101 Setting prompt string to ['Linux version [0-9]']
2191 18:16:14.627601 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2192 18:16:14.627959 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2193 18:16:14.628757
2195 18:20:27.627488 end: 2.2.5 auto-login-action (duration 00:04:13) [common]
2197 18:20:27.628517 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 253 seconds'
2199 18:20:27.629354 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2202 18:20:27.630731 end: 2 depthcharge-action (duration 00:05:00) [common]
2204 18:20:27.631900 Cleaning after the job
2205 18:20:27.632417 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11876197/tftp-deploy-gz7la1ve/ramdisk
2206 18:20:27.637240 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11876197/tftp-deploy-gz7la1ve/kernel
2207 18:20:27.645578 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11876197/tftp-deploy-gz7la1ve/nfsrootfs
2208 18:20:27.784167 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11876197/tftp-deploy-gz7la1ve/modules
2209 18:20:27.784883 start: 4.1 power-off (timeout 00:00:30) [common]
2210 18:20:27.785055 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2211 18:20:27.864079 >> Command sent successfully.
2212 18:20:27.867885 Returned 0 in 0 seconds
2213 18:20:27.968419 end: 4.1 power-off (duration 00:00:00) [common]
2215 18:20:27.968890 start: 4.2 read-feedback (timeout 00:10:00) [common]
2216 18:20:27.969267 Listened to connection for namespace 'common' for up to 1s
2218 18:20:27.969704 Listened to connection for namespace 'common' for up to 1s
2219 18:20:28.970329 Finalising connection for namespace 'common'
2220 18:20:28.970957 Disconnecting from shell: Finalise
2221 18:20:28.971376
2222 18:20:29.072321 end: 4.2 read-feedback (duration 00:00:01) [common]
2223 18:20:29.072865 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11876197
2224 18:20:29.621823 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11876197
2225 18:20:29.621997 JobError: Your job cannot terminate cleanly.