Boot log: acer-cb317-1h-c3z6-dedede
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 01:48:32.060581 lava-dispatcher, installed at version: 2023.08
2 01:48:32.060796 start: 0 validate
3 01:48:32.060921 Start time: 2023-10-11 01:48:32.060913+00:00 (UTC)
4 01:48:32.061039 Using caching service: 'http://localhost/cache/?uri=%s'
5 01:48:32.061167 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 01:48:32.316725 Using caching service: 'http://localhost/cache/?uri=%s'
7 01:48:32.317446 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.295-cip103-95-ge42cfc8bb88b7%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 01:48:35.825165 Using caching service: 'http://localhost/cache/?uri=%s'
9 01:48:35.825919 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.295-cip103-95-ge42cfc8bb88b7%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 01:48:36.330400 validate duration: 4.27
12 01:48:36.330737 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 01:48:36.330861 start: 1.1 download-retry (timeout 00:10:00) [common]
14 01:48:36.330978 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 01:48:36.331125 Not decompressing ramdisk as can be used compressed.
16 01:48:36.331226 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 01:48:36.331304 saving as /var/lib/lava/dispatcher/tmp/11733037/tftp-deploy-lr7dh_4l/ramdisk/rootfs.cpio.gz
18 01:48:36.331380 total size: 8418130 (8 MB)
19 01:48:36.332593 progress 0 % (0 MB)
20 01:48:36.335111 progress 5 % (0 MB)
21 01:48:36.337472 progress 10 % (0 MB)
22 01:48:36.339922 progress 15 % (1 MB)
23 01:48:36.342146 progress 20 % (1 MB)
24 01:48:36.344395 progress 25 % (2 MB)
25 01:48:36.346696 progress 30 % (2 MB)
26 01:48:36.348732 progress 35 % (2 MB)
27 01:48:36.351012 progress 40 % (3 MB)
28 01:48:36.353389 progress 45 % (3 MB)
29 01:48:36.355689 progress 50 % (4 MB)
30 01:48:36.357910 progress 55 % (4 MB)
31 01:48:36.360149 progress 60 % (4 MB)
32 01:48:36.362147 progress 65 % (5 MB)
33 01:48:36.364339 progress 70 % (5 MB)
34 01:48:36.366500 progress 75 % (6 MB)
35 01:48:36.368721 progress 80 % (6 MB)
36 01:48:36.370914 progress 85 % (6 MB)
37 01:48:36.373107 progress 90 % (7 MB)
38 01:48:36.375346 progress 95 % (7 MB)
39 01:48:36.377364 progress 100 % (8 MB)
40 01:48:36.377586 8 MB downloaded in 0.05 s (173.75 MB/s)
41 01:48:36.377736 end: 1.1.1 http-download (duration 00:00:00) [common]
43 01:48:36.377966 end: 1.1 download-retry (duration 00:00:00) [common]
44 01:48:36.378054 start: 1.2 download-retry (timeout 00:10:00) [common]
45 01:48:36.378138 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 01:48:36.378277 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.295-cip103-95-ge42cfc8bb88b7/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 01:48:36.378345 saving as /var/lib/lava/dispatcher/tmp/11733037/tftp-deploy-lr7dh_4l/kernel/bzImage
48 01:48:36.378413 total size: 11473408 (10 MB)
49 01:48:36.378473 No compression specified
50 01:48:36.379657 progress 0 % (0 MB)
51 01:48:36.382743 progress 5 % (0 MB)
52 01:48:36.385884 progress 10 % (1 MB)
53 01:48:36.388862 progress 15 % (1 MB)
54 01:48:36.391967 progress 20 % (2 MB)
55 01:48:36.394930 progress 25 % (2 MB)
56 01:48:36.398027 progress 30 % (3 MB)
57 01:48:36.400981 progress 35 % (3 MB)
58 01:48:36.404200 progress 40 % (4 MB)
59 01:48:36.407245 progress 45 % (4 MB)
60 01:48:36.410333 progress 50 % (5 MB)
61 01:48:36.413354 progress 55 % (6 MB)
62 01:48:36.416485 progress 60 % (6 MB)
63 01:48:36.419487 progress 65 % (7 MB)
64 01:48:36.422581 progress 70 % (7 MB)
65 01:48:36.425497 progress 75 % (8 MB)
66 01:48:36.428562 progress 80 % (8 MB)
67 01:48:36.431469 progress 85 % (9 MB)
68 01:48:36.434510 progress 90 % (9 MB)
69 01:48:36.437391 progress 95 % (10 MB)
70 01:48:36.440436 progress 100 % (10 MB)
71 01:48:36.440558 10 MB downloaded in 0.06 s (176.08 MB/s)
72 01:48:36.440704 end: 1.2.1 http-download (duration 00:00:00) [common]
74 01:48:36.440931 end: 1.2 download-retry (duration 00:00:00) [common]
75 01:48:36.441017 start: 1.3 download-retry (timeout 00:10:00) [common]
76 01:48:36.441104 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 01:48:36.441245 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.295-cip103-95-ge42cfc8bb88b7/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 01:48:36.441313 saving as /var/lib/lava/dispatcher/tmp/11733037/tftp-deploy-lr7dh_4l/modules/modules.tar
79 01:48:36.441378 total size: 484192 (0 MB)
80 01:48:36.441440 Using unxz to decompress xz
81 01:48:36.445713 progress 6 % (0 MB)
82 01:48:36.446125 progress 13 % (0 MB)
83 01:48:36.446366 progress 20 % (0 MB)
84 01:48:36.447999 progress 27 % (0 MB)
85 01:48:36.449985 progress 33 % (0 MB)
86 01:48:36.451903 progress 40 % (0 MB)
87 01:48:36.453831 progress 47 % (0 MB)
88 01:48:36.455726 progress 54 % (0 MB)
89 01:48:36.457731 progress 60 % (0 MB)
90 01:48:36.459771 progress 67 % (0 MB)
91 01:48:36.461777 progress 74 % (0 MB)
92 01:48:36.463867 progress 81 % (0 MB)
93 01:48:36.465760 progress 87 % (0 MB)
94 01:48:36.467720 progress 94 % (0 MB)
95 01:48:36.470099 progress 100 % (0 MB)
96 01:48:36.476647 0 MB downloaded in 0.04 s (13.10 MB/s)
97 01:48:36.476911 end: 1.3.1 http-download (duration 00:00:00) [common]
99 01:48:36.477178 end: 1.3 download-retry (duration 00:00:00) [common]
100 01:48:36.477271 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
101 01:48:36.477366 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
102 01:48:36.477444 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 01:48:36.477528 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
104 01:48:36.477742 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11733037/lava-overlay-zzr3lyg2
105 01:48:36.477875 makedir: /var/lib/lava/dispatcher/tmp/11733037/lava-overlay-zzr3lyg2/lava-11733037/bin
106 01:48:36.477979 makedir: /var/lib/lava/dispatcher/tmp/11733037/lava-overlay-zzr3lyg2/lava-11733037/tests
107 01:48:36.478077 makedir: /var/lib/lava/dispatcher/tmp/11733037/lava-overlay-zzr3lyg2/lava-11733037/results
108 01:48:36.478190 Creating /var/lib/lava/dispatcher/tmp/11733037/lava-overlay-zzr3lyg2/lava-11733037/bin/lava-add-keys
109 01:48:36.478337 Creating /var/lib/lava/dispatcher/tmp/11733037/lava-overlay-zzr3lyg2/lava-11733037/bin/lava-add-sources
110 01:48:36.478466 Creating /var/lib/lava/dispatcher/tmp/11733037/lava-overlay-zzr3lyg2/lava-11733037/bin/lava-background-process-start
111 01:48:36.478664 Creating /var/lib/lava/dispatcher/tmp/11733037/lava-overlay-zzr3lyg2/lava-11733037/bin/lava-background-process-stop
112 01:48:36.478789 Creating /var/lib/lava/dispatcher/tmp/11733037/lava-overlay-zzr3lyg2/lava-11733037/bin/lava-common-functions
113 01:48:36.478913 Creating /var/lib/lava/dispatcher/tmp/11733037/lava-overlay-zzr3lyg2/lava-11733037/bin/lava-echo-ipv4
114 01:48:36.479037 Creating /var/lib/lava/dispatcher/tmp/11733037/lava-overlay-zzr3lyg2/lava-11733037/bin/lava-install-packages
115 01:48:36.479161 Creating /var/lib/lava/dispatcher/tmp/11733037/lava-overlay-zzr3lyg2/lava-11733037/bin/lava-installed-packages
116 01:48:36.479286 Creating /var/lib/lava/dispatcher/tmp/11733037/lava-overlay-zzr3lyg2/lava-11733037/bin/lava-os-build
117 01:48:36.479409 Creating /var/lib/lava/dispatcher/tmp/11733037/lava-overlay-zzr3lyg2/lava-11733037/bin/lava-probe-channel
118 01:48:36.479531 Creating /var/lib/lava/dispatcher/tmp/11733037/lava-overlay-zzr3lyg2/lava-11733037/bin/lava-probe-ip
119 01:48:36.479654 Creating /var/lib/lava/dispatcher/tmp/11733037/lava-overlay-zzr3lyg2/lava-11733037/bin/lava-target-ip
120 01:48:36.479776 Creating /var/lib/lava/dispatcher/tmp/11733037/lava-overlay-zzr3lyg2/lava-11733037/bin/lava-target-mac
121 01:48:36.479897 Creating /var/lib/lava/dispatcher/tmp/11733037/lava-overlay-zzr3lyg2/lava-11733037/bin/lava-target-storage
122 01:48:36.480023 Creating /var/lib/lava/dispatcher/tmp/11733037/lava-overlay-zzr3lyg2/lava-11733037/bin/lava-test-case
123 01:48:36.480148 Creating /var/lib/lava/dispatcher/tmp/11733037/lava-overlay-zzr3lyg2/lava-11733037/bin/lava-test-event
124 01:48:36.480270 Creating /var/lib/lava/dispatcher/tmp/11733037/lava-overlay-zzr3lyg2/lava-11733037/bin/lava-test-feedback
125 01:48:36.480392 Creating /var/lib/lava/dispatcher/tmp/11733037/lava-overlay-zzr3lyg2/lava-11733037/bin/lava-test-raise
126 01:48:36.480515 Creating /var/lib/lava/dispatcher/tmp/11733037/lava-overlay-zzr3lyg2/lava-11733037/bin/lava-test-reference
127 01:48:36.480636 Creating /var/lib/lava/dispatcher/tmp/11733037/lava-overlay-zzr3lyg2/lava-11733037/bin/lava-test-runner
128 01:48:36.480758 Creating /var/lib/lava/dispatcher/tmp/11733037/lava-overlay-zzr3lyg2/lava-11733037/bin/lava-test-set
129 01:48:36.480881 Creating /var/lib/lava/dispatcher/tmp/11733037/lava-overlay-zzr3lyg2/lava-11733037/bin/lava-test-shell
130 01:48:36.481007 Updating /var/lib/lava/dispatcher/tmp/11733037/lava-overlay-zzr3lyg2/lava-11733037/bin/lava-install-packages (oe)
131 01:48:36.481160 Updating /var/lib/lava/dispatcher/tmp/11733037/lava-overlay-zzr3lyg2/lava-11733037/bin/lava-installed-packages (oe)
132 01:48:36.481288 Creating /var/lib/lava/dispatcher/tmp/11733037/lava-overlay-zzr3lyg2/lava-11733037/environment
133 01:48:36.481392 LAVA metadata
134 01:48:36.481466 - LAVA_JOB_ID=11733037
135 01:48:36.481529 - LAVA_DISPATCHER_IP=192.168.201.1
136 01:48:36.481631 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
137 01:48:36.481698 skipped lava-vland-overlay
138 01:48:36.481773 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 01:48:36.481850 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
140 01:48:36.481911 skipped lava-multinode-overlay
141 01:48:36.481985 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 01:48:36.482065 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
143 01:48:36.482137 Loading test definitions
144 01:48:36.482227 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
145 01:48:36.482302 Using /lava-11733037 at stage 0
146 01:48:36.482656 uuid=11733037_1.4.2.3.1 testdef=None
147 01:48:36.482742 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 01:48:36.482827 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
149 01:48:36.483365 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 01:48:36.483659 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
152 01:48:36.484308 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 01:48:36.484534 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
155 01:48:36.485156 runner path: /var/lib/lava/dispatcher/tmp/11733037/lava-overlay-zzr3lyg2/lava-11733037/0/tests/0_dmesg test_uuid 11733037_1.4.2.3.1
156 01:48:36.485309 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 01:48:36.485532 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
159 01:48:36.485601 Using /lava-11733037 at stage 1
160 01:48:36.485891 uuid=11733037_1.4.2.3.5 testdef=None
161 01:48:36.485977 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 01:48:36.486058 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
163 01:48:36.486528 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 01:48:36.486774 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
166 01:48:36.487430 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 01:48:36.487651 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
169 01:48:36.488325 runner path: /var/lib/lava/dispatcher/tmp/11733037/lava-overlay-zzr3lyg2/lava-11733037/1/tests/1_bootrr test_uuid 11733037_1.4.2.3.5
170 01:48:36.488475 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 01:48:36.488676 Creating lava-test-runner.conf files
173 01:48:36.488737 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11733037/lava-overlay-zzr3lyg2/lava-11733037/0 for stage 0
174 01:48:36.488829 - 0_dmesg
175 01:48:36.488926 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11733037/lava-overlay-zzr3lyg2/lava-11733037/1 for stage 1
176 01:48:36.489015 - 1_bootrr
177 01:48:36.489107 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 01:48:36.489186 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
179 01:48:36.497660 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 01:48:36.497770 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
181 01:48:36.497854 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 01:48:36.497935 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 01:48:36.498016 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
184 01:48:36.752448 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 01:48:36.752828 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
186 01:48:36.752940 extracting modules file /var/lib/lava/dispatcher/tmp/11733037/tftp-deploy-lr7dh_4l/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11733037/extract-overlay-ramdisk-_3_doul9/ramdisk
187 01:48:36.774199 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 01:48:36.774366 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
189 01:48:36.774468 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11733037/compress-overlay-aatru1xb/overlay-1.4.2.4.tar.gz to ramdisk
190 01:48:36.774550 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11733037/compress-overlay-aatru1xb/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11733037/extract-overlay-ramdisk-_3_doul9/ramdisk
191 01:48:36.783099 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 01:48:36.783211 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
193 01:48:36.783305 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 01:48:36.783391 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
195 01:48:36.783472 Building ramdisk /var/lib/lava/dispatcher/tmp/11733037/extract-overlay-ramdisk-_3_doul9/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11733037/extract-overlay-ramdisk-_3_doul9/ramdisk
196 01:48:36.941786 >> 53982 blocks
197 01:48:37.825532 rename /var/lib/lava/dispatcher/tmp/11733037/extract-overlay-ramdisk-_3_doul9/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11733037/tftp-deploy-lr7dh_4l/ramdisk/ramdisk.cpio.gz
198 01:48:37.825986 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 01:48:37.826121 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
200 01:48:37.826225 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
201 01:48:37.826323 No mkimage arch provided, not using FIT.
202 01:48:37.826411 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 01:48:37.826491 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 01:48:37.826647 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 01:48:37.826742 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
206 01:48:37.826820 No LXC device requested
207 01:48:37.826895 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 01:48:37.826980 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
209 01:48:37.827058 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 01:48:37.827127 Checking files for TFTP limit of 4294967296 bytes.
211 01:48:37.827533 end: 1 tftp-deploy (duration 00:00:01) [common]
212 01:48:37.827639 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 01:48:37.827727 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 01:48:37.827840 substitutions:
215 01:48:37.827902 - {DTB}: None
216 01:48:37.827962 - {INITRD}: 11733037/tftp-deploy-lr7dh_4l/ramdisk/ramdisk.cpio.gz
217 01:48:37.828038 - {KERNEL}: 11733037/tftp-deploy-lr7dh_4l/kernel/bzImage
218 01:48:37.828096 - {LAVA_MAC}: None
219 01:48:37.828150 - {PRESEED_CONFIG}: None
220 01:48:37.828203 - {PRESEED_LOCAL}: None
221 01:48:37.828255 - {RAMDISK}: 11733037/tftp-deploy-lr7dh_4l/ramdisk/ramdisk.cpio.gz
222 01:48:37.828308 - {ROOT_PART}: None
223 01:48:37.828359 - {ROOT}: None
224 01:48:37.828411 - {SERVER_IP}: 192.168.201.1
225 01:48:37.828462 - {TEE}: None
226 01:48:37.828514 Parsed boot commands:
227 01:48:37.828565 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 01:48:37.828741 Parsed boot commands: tftpboot 192.168.201.1 11733037/tftp-deploy-lr7dh_4l/kernel/bzImage 11733037/tftp-deploy-lr7dh_4l/kernel/cmdline 11733037/tftp-deploy-lr7dh_4l/ramdisk/ramdisk.cpio.gz
229 01:48:37.828827 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 01:48:37.828909 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 01:48:37.828998 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 01:48:37.829081 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 01:48:37.829146 Not connected, no need to disconnect.
234 01:48:37.829218 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 01:48:37.829298 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 01:48:37.829362 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cb317-1h-c3z6-dedede-cbg-1'
237 01:48:37.833377 Setting prompt string to ['lava-test: # ']
238 01:48:37.833751 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 01:48:37.833854 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 01:48:37.833949 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 01:48:37.834037 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 01:48:37.834229 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-1' '--port=1' '--command=reboot'
243 01:48:42.982625 >> Command sent successfully.
244 01:48:42.994206 Returned 0 in 5 seconds
245 01:48:43.095648 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 01:48:43.097170 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 01:48:43.097834 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 01:48:43.098320 Setting prompt string to 'Starting depthcharge on Magolor...'
250 01:48:43.098745 Changing prompt to 'Starting depthcharge on Magolor...'
251 01:48:43.099119 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
252 01:48:43.100323 [Enter `^Ec?' for help]
253 01:48:44.226005
254 01:48:44.226623
255 01:48:44.236456 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
256 01:48:44.239836 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
257 01:48:44.243049 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
258 01:48:44.249727 CPU: AES supported, TXT NOT supported, VT supported
259 01:48:44.253370 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
260 01:48:44.259814 PCH: device id 4d87 (rev 01) is Jasperlake Super
261 01:48:44.262934 IGD: device id 4e55 (rev 01) is Jasperlake GT4
262 01:48:44.266370 VBOOT: Loading verstage.
263 01:48:44.269666 FMAP: Found "FLASH" version 1.1 at 0xc04000.
264 01:48:44.276595 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
265 01:48:44.280641 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
266 01:48:44.286812 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
267 01:48:44.287290
268 01:48:44.287655
269 01:48:44.300652 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
270 01:48:44.313749 Probing TPM: . done!
271 01:48:44.317225 TPM ready after 0 ms
272 01:48:44.320705 Connected to device vid:did:rid of 1ae0:0028:00
273 01:48:44.332640 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
274 01:48:44.338791 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
275 01:48:44.394328 Initialized TPM device CR50 revision 0
276 01:48:44.405111 tlcl_send_startup: Startup return code is 0
277 01:48:44.405680 TPM: setup succeeded
278 01:48:44.418665 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
279 01:48:44.432500 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
280 01:48:44.440123 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
281 01:48:44.455829 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
282 01:48:44.459763 Chrome EC: UHEPI supported
283 01:48:44.462434 Phase 1
284 01:48:44.466274 FMAP: area GBB found @ c05000 (12288 bytes)
285 01:48:44.472770 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
286 01:48:44.479502 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
287 01:48:44.482773 Recovery requested (1009000e)
288 01:48:44.492301 TPM: Extending digest for VBOOT: boot mode into PCR 0
289 01:48:44.499079 tlcl_extend: response is 0
290 01:48:44.505337 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
291 01:48:44.515155 tlcl_extend: response is 0
292 01:48:44.521613 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
293 01:48:44.524775 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
294 01:48:44.531130 BS: verstage times (exec / console): total (unknown) / 124 ms
295 01:48:44.531691
296 01:48:44.534903
297 01:48:44.544418 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
298 01:48:44.550985 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
299 01:48:44.554944 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
300 01:48:44.558017 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
301 01:48:44.564234 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
302 01:48:44.567805 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
303 01:48:44.571638 gpe0_sts[3]: 00080000 gpe0_en[3]: 00010000
304 01:48:44.574262 TCO_STS: 0000 0001
305 01:48:44.577950 GEN_PMCON: d0015038 00002200
306 01:48:44.580887 GBLRST_CAUSE: 00000000 00000000
307 01:48:44.581379 prev_sleep_state 5
308 01:48:44.584544 Boot Count incremented to 5518
309 01:48:44.591376 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
310 01:48:44.595308 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
311 01:48:44.599295 Chrome EC: UHEPI supported
312 01:48:44.605532 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
313 01:48:44.612018 Probing TPM: done!
314 01:48:44.619419 Connected to device vid:did:rid of 1ae0:0028:00
315 01:48:44.629567 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
316 01:48:44.635915 Initialized TPM device CR50 revision 0
317 01:48:44.646449 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
318 01:48:44.653127 MRC: Hash idx 0x100b comparison successful.
319 01:48:44.656190 MRC cache found, size 5458
320 01:48:44.656781 bootmode is set to: 2
321 01:48:44.659472 SPD INDEX = 0
322 01:48:44.662700 CBFS: Found 'spd.bin' @0x40c40 size 0x600
323 01:48:44.666115 SPD: module type is LPDDR4X
324 01:48:44.673123 SPD: module part number is MT53E512M32D2NP-046 WT:E
325 01:48:44.679448 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
326 01:48:44.682639 SPD: device width 16 bits, bus width 32 bits
327 01:48:44.686027 SPD: module size is 4096 MB (per channel)
328 01:48:44.689735 meminit_channels: DRAM half-populated
329 01:48:44.773021 CBMEM:
330 01:48:44.776554 IMD: root @ 0x76fff000 254 entries.
331 01:48:44.779773 IMD: root @ 0x76ffec00 62 entries.
332 01:48:44.783129 FMAP: area RO_VPD found @ c00000 (16384 bytes)
333 01:48:44.789794 WARNING: RO_VPD is uninitialized or empty.
334 01:48:44.793459 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
335 01:48:44.796386 External stage cache:
336 01:48:44.799651 IMD: root @ 0x7b3ff000 254 entries.
337 01:48:44.802896 IMD: root @ 0x7b3fec00 62 entries.
338 01:48:44.812852 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
339 01:48:44.819799 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
340 01:48:44.826484 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
341 01:48:44.834923 MRC: 'RECOVERY_MRC_CACHE' does not need update.
342 01:48:44.841851 cse_lite: Skip switching to RW in the recovery path
343 01:48:44.842464 1 DIMMs found
344 01:48:44.843023 SMM Memory Map
345 01:48:44.844448 SMRAM : 0x7b000000 0x800000
346 01:48:44.848232 Subregion 0: 0x7b000000 0x200000
347 01:48:44.855013 Subregion 1: 0x7b200000 0x200000
348 01:48:44.857959 Subregion 2: 0x7b400000 0x400000
349 01:48:44.858565 top_of_ram = 0x77000000
350 01:48:44.864651 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
351 01:48:44.871243 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
352 01:48:44.875093 MTRR Range: Start=ff000000 End=0 (Size 1000000)
353 01:48:44.881316 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
354 01:48:44.884506 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
355 01:48:44.896584 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
356 01:48:44.903120 Processing 188 relocs. Offset value of 0x74c0e000
357 01:48:44.910569 BS: romstage times (exec / console): total (unknown) / 255 ms
358 01:48:44.914700
359 01:48:44.915280
360 01:48:44.924653 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
361 01:48:44.931121 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
362 01:48:44.934347 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
363 01:48:44.941158 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
364 01:48:44.998468 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
365 01:48:45.004705 Processing 4805 relocs. Offset value of 0x75da8000
366 01:48:45.008075 BS: postcar times (exec / console): total (unknown) / 42 ms
367 01:48:45.011544
368 01:48:45.012111
369 01:48:45.021584 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
370 01:48:45.022155 Normal boot
371 01:48:45.025214 EC returned error result code 3
372 01:48:45.028813 FW_CONFIG value is 0x204
373 01:48:45.032184 GENERIC: 0.0 disabled by fw_config
374 01:48:45.038795 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
375 01:48:45.041868 I2C: 00:10 disabled by fw_config
376 01:48:45.045884 I2C: 00:10 disabled by fw_config
377 01:48:45.049223 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
378 01:48:45.056228 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
379 01:48:45.059658 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
380 01:48:45.063141 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
381 01:48:45.069802 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
382 01:48:45.072960 I2C: 00:10 disabled by fw_config
383 01:48:45.079564 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
384 01:48:45.086677 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
385 01:48:45.089830 I2C: 00:1a disabled by fw_config
386 01:48:45.093113 I2C: 00:1a disabled by fw_config
387 01:48:45.096028 fw_config match found: AUDIO_AMP=UNPROVISIONED
388 01:48:45.103094 fw_config match found: AUDIO_AMP=UNPROVISIONED
389 01:48:45.106162 GENERIC: 0.0 disabled by fw_config
390 01:48:45.109735 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
391 01:48:45.116433 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
392 01:48:45.119493 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
393 01:48:45.126465 microcode: Update skipped, already up-to-date
394 01:48:45.129753 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
395 01:48:45.157186 Detected 2 core, 2 thread CPU.
396 01:48:45.160782 Setting up SMI for CPU
397 01:48:45.164202 IED base = 0x7b400000
398 01:48:45.164798 IED size = 0x00400000
399 01:48:45.167208 Will perform SMM setup.
400 01:48:45.170758 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
401 01:48:45.180721 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
402 01:48:45.183794 Processing 16 relocs. Offset value of 0x00030000
403 01:48:45.187486 Attempting to start 1 APs
404 01:48:45.190999 Waiting for 10ms after sending INIT.
405 01:48:45.206922 Waiting for 1st SIPI to complete...done.
406 01:48:45.207480 AP: slot 1 apic_id 2.
407 01:48:45.213777 Waiting for 2nd SIPI to complete...done.
408 01:48:45.220458 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
409 01:48:45.227419 Processing 13 relocs. Offset value of 0x00038000
410 01:48:45.227990 Unable to locate Global NVS
411 01:48:45.237388 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
412 01:48:45.240332 Installing permanent SMM handler to 0x7b000000
413 01:48:45.246949 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
414 01:48:45.253683 Processing 704 relocs. Offset value of 0x7b010000
415 01:48:45.260415 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
416 01:48:45.266937 Processing 13 relocs. Offset value of 0x7b008000
417 01:48:45.273812 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
418 01:48:45.277194 Unable to locate Global NVS
419 01:48:45.283920 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
420 01:48:45.287497 Clearing SMI status registers
421 01:48:45.288060 SMI_STS: PM1
422 01:48:45.290883 PM1_STS: PWRBTN
423 01:48:45.291442 TCO_STS: INTRD_DET
424 01:48:45.294260 GPE0 STD STS:
425 01:48:45.300416 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
426 01:48:45.303998 In relocation handler: CPU 0
427 01:48:45.307220 New SMBASE=0x7b000000 IEDBASE=0x7b400000
428 01:48:45.313842 Writing SMRR. base = 0x7b000006, mask=0xff800800
429 01:48:45.314480 Relocation complete.
430 01:48:45.320443 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
431 01:48:45.323702 In relocation handler: CPU 1
432 01:48:45.327512 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
433 01:48:45.333837 Writing SMRR. base = 0x7b000006, mask=0xff800800
434 01:48:45.337445 Relocation complete.
435 01:48:45.338004 Initializing CPU #0
436 01:48:45.340402 CPU: vendor Intel device 906c0
437 01:48:45.344033 CPU: family 06, model 9c, stepping 00
438 01:48:45.346760 Clearing out pending MCEs
439 01:48:45.350772 Setting up local APIC...
440 01:48:45.353664 apic_id: 0x00 done.
441 01:48:45.354128 Turbo is available but hidden
442 01:48:45.357671 Turbo is available and visible
443 01:48:45.363841 microcode: Update skipped, already up-to-date
444 01:48:45.364408 CPU #0 initialized
445 01:48:45.366764 Initializing CPU #1
446 01:48:45.370120 CPU: vendor Intel device 906c0
447 01:48:45.373542 CPU: family 06, model 9c, stepping 00
448 01:48:45.377215 Clearing out pending MCEs
449 01:48:45.379872 Setting up local APIC...
450 01:48:45.380338 apic_id: 0x02 done.
451 01:48:45.386982 microcode: Update skipped, already up-to-date
452 01:48:45.387548 CPU #1 initialized
453 01:48:45.393478 bsp_do_flight_plan done after 175 msecs.
454 01:48:45.397040 CPU: frequency set to 2800 MHz
455 01:48:45.397506 Enabling SMIs.
456 01:48:45.403677 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 86 / 289 ms
457 01:48:45.413673 Probing TPM: done!
458 01:48:45.420386 Connected to device vid:did:rid of 1ae0:0028:00
459 01:48:45.430197 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
460 01:48:45.433280 Initialized TPM device CR50 revision 0
461 01:48:45.436749 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
462 01:48:45.443316 Found a VBT of 7680 bytes after decompression
463 01:48:45.450148 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
464 01:48:45.485143 Detected 2 core, 2 thread CPU.
465 01:48:45.488555 Detected 2 core, 2 thread CPU.
466 01:48:45.852084 Display FSP Version Info HOB
467 01:48:45.855141 Reference Code - CPU = 8.7.22.30
468 01:48:45.858560 uCode Version = 24.0.0.1f
469 01:48:45.861818 TXT ACM version = ff.ff.ff.ffff
470 01:48:45.865316 Reference Code - ME = 8.7.22.30
471 01:48:45.869127 MEBx version = 0.0.0.0
472 01:48:45.871966 ME Firmware Version = Consumer SKU
473 01:48:45.875000 Reference Code - PCH = 8.7.22.30
474 01:48:45.878357 PCH-CRID Status = Disabled
475 01:48:45.881759 PCH-CRID Original Value = ff.ff.ff.ffff
476 01:48:45.885380 PCH-CRID New Value = ff.ff.ff.ffff
477 01:48:45.888402 OPROM - RST - RAID = ff.ff.ff.ffff
478 01:48:45.892130 PCH Hsio Version = 4.0.0.0
479 01:48:45.894872 Reference Code - SA - System Agent = 8.7.22.30
480 01:48:45.898160 Reference Code - MRC = 0.0.4.68
481 01:48:45.901757 SA - PCIe Version = 8.7.22.30
482 01:48:45.905013 SA-CRID Status = Disabled
483 01:48:45.908387 SA-CRID Original Value = 0.0.0.0
484 01:48:45.912194 SA-CRID New Value = 0.0.0.0
485 01:48:45.914889 OPROM - VBIOS = ff.ff.ff.ffff
486 01:48:45.918013 IO Manageability Engine FW Version = ff.ff.ff.ffff
487 01:48:45.921724 PHY Build Version = ff.ff.ff.ffff
488 01:48:45.925015 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
489 01:48:45.931636 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
490 01:48:45.935184 ITSS IRQ Polarities Before:
491 01:48:45.938220 IPC0: 0xffffffff
492 01:48:45.938855 IPC1: 0xffffffff
493 01:48:45.941764 IPC2: 0xffffffff
494 01:48:45.942223 IPC3: 0xffffffff
495 01:48:45.945418 ITSS IRQ Polarities After:
496 01:48:45.948164 IPC0: 0xffffffff
497 01:48:45.948624 IPC1: 0xffffffff
498 01:48:45.951858 IPC2: 0xffffffff
499 01:48:45.952424 IPC3: 0xffffffff
500 01:48:45.965602 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
501 01:48:45.971503 BS: BS_DEV_INIT_CHIPS run times (exec / console): 405 / 156 ms
502 01:48:45.972129 Enumerating buses...
503 01:48:45.978398 Show all devs... Before device enumeration.
504 01:48:45.979017 Root Device: enabled 1
505 01:48:45.981327 CPU_CLUSTER: 0: enabled 1
506 01:48:45.984887 DOMAIN: 0000: enabled 1
507 01:48:45.988431 PCI: 00:00.0: enabled 1
508 01:48:45.988993 PCI: 00:02.0: enabled 1
509 01:48:45.991675 PCI: 00:04.0: enabled 1
510 01:48:45.995140 PCI: 00:05.0: enabled 1
511 01:48:45.998210 PCI: 00:09.0: enabled 0
512 01:48:45.998830 PCI: 00:12.6: enabled 0
513 01:48:46.001774 PCI: 00:14.0: enabled 1
514 01:48:46.005054 PCI: 00:14.1: enabled 0
515 01:48:46.005522 PCI: 00:14.2: enabled 0
516 01:48:46.008450 PCI: 00:14.3: enabled 1
517 01:48:46.011345 PCI: 00:14.5: enabled 1
518 01:48:46.014669 PCI: 00:15.0: enabled 1
519 01:48:46.015141 PCI: 00:15.1: enabled 1
520 01:48:46.018396 PCI: 00:15.2: enabled 1
521 01:48:46.021880 PCI: 00:15.3: enabled 1
522 01:48:46.025057 PCI: 00:16.0: enabled 1
523 01:48:46.025624 PCI: 00:16.1: enabled 0
524 01:48:46.028348 PCI: 00:16.4: enabled 0
525 01:48:46.031378 PCI: 00:16.5: enabled 0
526 01:48:46.034515 PCI: 00:17.0: enabled 0
527 01:48:46.035132 PCI: 00:19.0: enabled 1
528 01:48:46.037956 PCI: 00:19.1: enabled 0
529 01:48:46.041734 PCI: 00:19.2: enabled 1
530 01:48:46.042297 PCI: 00:1a.0: enabled 1
531 01:48:46.044502 PCI: 00:1c.0: enabled 0
532 01:48:46.047966 PCI: 00:1c.1: enabled 0
533 01:48:46.051222 PCI: 00:1c.2: enabled 0
534 01:48:46.051685 PCI: 00:1c.3: enabled 0
535 01:48:46.054900 PCI: 00:1c.4: enabled 0
536 01:48:46.057896 PCI: 00:1c.5: enabled 0
537 01:48:46.061326 PCI: 00:1c.6: enabled 0
538 01:48:46.061743 PCI: 00:1c.7: enabled 1
539 01:48:46.064599 PCI: 00:1e.0: enabled 0
540 01:48:46.068030 PCI: 00:1e.1: enabled 0
541 01:48:46.068589 PCI: 00:1e.2: enabled 1
542 01:48:46.071641 PCI: 00:1e.3: enabled 0
543 01:48:46.074936 PCI: 00:1f.0: enabled 1
544 01:48:46.078380 PCI: 00:1f.1: enabled 1
545 01:48:46.078986 PCI: 00:1f.2: enabled 1
546 01:48:46.082387 PCI: 00:1f.3: enabled 1
547 01:48:46.084907 PCI: 00:1f.4: enabled 0
548 01:48:46.087865 PCI: 00:1f.5: enabled 1
549 01:48:46.088384 PCI: 00:1f.7: enabled 0
550 01:48:46.091261 GENERIC: 0.0: enabled 1
551 01:48:46.094686 GENERIC: 0.0: enabled 1
552 01:48:46.095244 USB0 port 0: enabled 1
553 01:48:46.098146 GENERIC: 0.0: enabled 1
554 01:48:46.101749 I2C: 00:2c: enabled 1
555 01:48:46.104403 I2C: 00:15: enabled 1
556 01:48:46.105034 GENERIC: 0.0: enabled 0
557 01:48:46.107752 I2C: 00:15: enabled 1
558 01:48:46.111110 I2C: 00:10: enabled 0
559 01:48:46.111574 I2C: 00:10: enabled 0
560 01:48:46.114378 I2C: 00:2c: enabled 1
561 01:48:46.118300 I2C: 00:40: enabled 1
562 01:48:46.118904 I2C: 00:10: enabled 1
563 01:48:46.121241 I2C: 00:39: enabled 1
564 01:48:46.124829 I2C: 00:36: enabled 1
565 01:48:46.125397 I2C: 00:10: enabled 0
566 01:48:46.127697 I2C: 00:0c: enabled 1
567 01:48:46.131402 I2C: 00:50: enabled 1
568 01:48:46.131962 I2C: 00:1a: enabled 1
569 01:48:46.134416 I2C: 00:1a: enabled 0
570 01:48:46.137458 I2C: 00:1a: enabled 0
571 01:48:46.138127 I2C: 00:28: enabled 1
572 01:48:46.141267 I2C: 00:29: enabled 1
573 01:48:46.144421 PCI: 00:00.0: enabled 1
574 01:48:46.144981 SPI: 00: enabled 1
575 01:48:46.147592 PNP: 0c09.0: enabled 1
576 01:48:46.151074 GENERIC: 0.0: enabled 0
577 01:48:46.154157 USB2 port 0: enabled 1
578 01:48:46.154809 USB2 port 1: enabled 1
579 01:48:46.157382 USB2 port 2: enabled 1
580 01:48:46.161444 USB2 port 3: enabled 1
581 01:48:46.162001 USB2 port 4: enabled 0
582 01:48:46.164621 USB2 port 5: enabled 1
583 01:48:46.167368 USB2 port 6: enabled 0
584 01:48:46.171691 USB2 port 7: enabled 1
585 01:48:46.172249 USB3 port 0: enabled 1
586 01:48:46.174270 USB3 port 1: enabled 1
587 01:48:46.177634 USB3 port 2: enabled 1
588 01:48:46.178197 USB3 port 3: enabled 1
589 01:48:46.181405 APIC: 00: enabled 1
590 01:48:46.184593 APIC: 02: enabled 1
591 01:48:46.185154 Compare with tree...
592 01:48:46.187479 Root Device: enabled 1
593 01:48:46.191047 CPU_CLUSTER: 0: enabled 1
594 01:48:46.191551 APIC: 00: enabled 1
595 01:48:46.194501 APIC: 02: enabled 1
596 01:48:46.197365 DOMAIN: 0000: enabled 1
597 01:48:46.200666 PCI: 00:00.0: enabled 1
598 01:48:46.201128 PCI: 00:02.0: enabled 1
599 01:48:46.204341 PCI: 00:04.0: enabled 1
600 01:48:46.207322 GENERIC: 0.0: enabled 1
601 01:48:46.210836 PCI: 00:05.0: enabled 1
602 01:48:46.214077 GENERIC: 0.0: enabled 1
603 01:48:46.214557 PCI: 00:09.0: enabled 0
604 01:48:46.217412 PCI: 00:12.6: enabled 0
605 01:48:46.220609 PCI: 00:14.0: enabled 1
606 01:48:46.224599 USB0 port 0: enabled 1
607 01:48:46.227543 USB2 port 0: enabled 1
608 01:48:46.228097 USB2 port 1: enabled 1
609 01:48:46.230885 USB2 port 2: enabled 1
610 01:48:46.234551 USB2 port 3: enabled 1
611 01:48:46.237776 USB2 port 4: enabled 0
612 01:48:46.240794 USB2 port 5: enabled 1
613 01:48:46.243910 USB2 port 6: enabled 0
614 01:48:46.244552 USB2 port 7: enabled 1
615 01:48:46.247255 USB3 port 0: enabled 1
616 01:48:46.250314 USB3 port 1: enabled 1
617 01:48:46.254273 USB3 port 2: enabled 1
618 01:48:46.257035 USB3 port 3: enabled 1
619 01:48:46.257704 PCI: 00:14.1: enabled 0
620 01:48:46.260419 PCI: 00:14.2: enabled 0
621 01:48:46.263967 PCI: 00:14.3: enabled 1
622 01:48:46.267288 GENERIC: 0.0: enabled 1
623 01:48:46.270251 PCI: 00:14.5: enabled 1
624 01:48:46.270751 PCI: 00:15.0: enabled 1
625 01:48:46.274210 I2C: 00:2c: enabled 1
626 01:48:46.277987 I2C: 00:15: enabled 1
627 01:48:46.280387 PCI: 00:15.1: enabled 1
628 01:48:46.283471 PCI: 00:15.2: enabled 1
629 01:48:46.283937 GENERIC: 0.0: enabled 0
630 01:48:46.287118 I2C: 00:15: enabled 1
631 01:48:46.290267 I2C: 00:10: enabled 0
632 01:48:46.293697 I2C: 00:10: enabled 0
633 01:48:46.294295 I2C: 00:2c: enabled 1
634 01:48:46.297124 I2C: 00:40: enabled 1
635 01:48:46.299977 I2C: 00:10: enabled 1
636 01:48:46.304077 I2C: 00:39: enabled 1
637 01:48:46.308318 PCI: 00:15.3: enabled 1
638 01:48:46.308957 I2C: 00:36: enabled 1
639 01:48:46.311476 I2C: 00:10: enabled 0
640 01:48:46.311939 I2C: 00:0c: enabled 1
641 01:48:46.315142 I2C: 00:50: enabled 1
642 01:48:46.318296 PCI: 00:16.0: enabled 1
643 01:48:46.321351 PCI: 00:16.1: enabled 0
644 01:48:46.324835 PCI: 00:16.4: enabled 0
645 01:48:46.325397 PCI: 00:16.5: enabled 0
646 01:48:46.328075 PCI: 00:17.0: enabled 0
647 01:48:46.331693 PCI: 00:19.0: enabled 1
648 01:48:46.334579 I2C: 00:1a: enabled 1
649 01:48:46.335132 I2C: 00:1a: enabled 0
650 01:48:46.337697 I2C: 00:1a: enabled 0
651 01:48:46.341206 I2C: 00:28: enabled 1
652 01:48:46.344759 I2C: 00:29: enabled 1
653 01:48:46.348703 PCI: 00:19.1: enabled 0
654 01:48:46.349298 PCI: 00:19.2: enabled 1
655 01:48:46.351038 PCI: 00:1a.0: enabled 1
656 01:48:46.354434 PCI: 00:1e.0: enabled 0
657 01:48:46.358059 PCI: 00:1e.1: enabled 0
658 01:48:46.361398 PCI: 00:1e.2: enabled 1
659 01:48:46.361956 SPI: 00: enabled 1
660 01:48:46.364859 PCI: 00:1e.3: enabled 0
661 01:48:46.368492 PCI: 00:1f.0: enabled 1
662 01:48:46.371218 PNP: 0c09.0: enabled 1
663 01:48:46.371687 PCI: 00:1f.1: enabled 1
664 01:48:46.374653 PCI: 00:1f.2: enabled 1
665 01:48:46.378237 PCI: 00:1f.3: enabled 1
666 01:48:46.381842 GENERIC: 0.0: enabled 0
667 01:48:46.382401 PCI: 00:1f.4: enabled 0
668 01:48:46.384664 PCI: 00:1f.5: enabled 1
669 01:48:46.387933 PCI: 00:1f.7: enabled 0
670 01:48:46.391538 Root Device scanning...
671 01:48:46.395139 scan_static_bus for Root Device
672 01:48:46.397988 CPU_CLUSTER: 0 enabled
673 01:48:46.398580 DOMAIN: 0000 enabled
674 01:48:46.401608 DOMAIN: 0000 scanning...
675 01:48:46.405124 PCI: pci_scan_bus for bus 00
676 01:48:46.407757 PCI: 00:00.0 [8086/0000] ops
677 01:48:46.411430 PCI: 00:00.0 [8086/4e22] enabled
678 01:48:46.414768 PCI: 00:02.0 [8086/0000] bus ops
679 01:48:46.417938 PCI: 00:02.0 [8086/4e55] enabled
680 01:48:46.421129 PCI: 00:04.0 [8086/0000] bus ops
681 01:48:46.424705 PCI: 00:04.0 [8086/4e03] enabled
682 01:48:46.427961 PCI: 00:05.0 [8086/0000] bus ops
683 01:48:46.431353 PCI: 00:05.0 [8086/4e19] enabled
684 01:48:46.434277 PCI: 00:08.0 [8086/4e11] enabled
685 01:48:46.437901 PCI: 00:14.0 [8086/0000] bus ops
686 01:48:46.441294 PCI: 00:14.0 [8086/4ded] enabled
687 01:48:46.444583 PCI: 00:14.2 [8086/4def] disabled
688 01:48:46.448124 PCI: 00:14.3 [8086/0000] bus ops
689 01:48:46.451516 PCI: 00:14.3 [8086/4df0] enabled
690 01:48:46.454323 PCI: 00:14.5 [8086/0000] ops
691 01:48:46.457286 PCI: 00:14.5 [8086/4df8] enabled
692 01:48:46.461085 PCI: 00:15.0 [8086/0000] bus ops
693 01:48:46.464686 PCI: 00:15.0 [8086/4de8] enabled
694 01:48:46.467983 PCI: 00:15.1 [8086/0000] bus ops
695 01:48:46.471188 PCI: 00:15.1 [8086/4de9] enabled
696 01:48:46.474378 PCI: 00:15.2 [8086/0000] bus ops
697 01:48:46.478292 PCI: 00:15.2 [8086/4dea] enabled
698 01:48:46.481525 PCI: 00:15.3 [8086/0000] bus ops
699 01:48:46.484525 PCI: 00:15.3 [8086/4deb] enabled
700 01:48:46.487903 PCI: 00:16.0 [8086/0000] ops
701 01:48:46.491525 PCI: 00:16.0 [8086/4de0] enabled
702 01:48:46.494451 PCI: 00:19.0 [8086/0000] bus ops
703 01:48:46.497796 PCI: 00:19.0 [8086/4dc5] enabled
704 01:48:46.498261 PCI: 00:19.2 [8086/0000] ops
705 01:48:46.501254 PCI: 00:19.2 [8086/4dc7] enabled
706 01:48:46.504452 PCI: 00:1a.0 [8086/0000] ops
707 01:48:46.508027 PCI: 00:1a.0 [8086/4dc4] enabled
708 01:48:46.511400 PCI: 00:1e.0 [8086/0000] ops
709 01:48:46.514550 PCI: 00:1e.0 [8086/4da8] disabled
710 01:48:46.517401 PCI: 00:1e.2 [8086/0000] bus ops
711 01:48:46.521425 PCI: 00:1e.2 [8086/4daa] enabled
712 01:48:46.524200 PCI: 00:1f.0 [8086/0000] bus ops
713 01:48:46.527271 PCI: 00:1f.0 [8086/4d87] enabled
714 01:48:46.534374 PCI: Static device PCI: 00:1f.1 not found, disabling it.
715 01:48:46.534978 RTC Init
716 01:48:46.537657 Set power on after power failure.
717 01:48:46.540845 Disabling Deep S3
718 01:48:46.541306 Disabling Deep S3
719 01:48:46.544432 Disabling Deep S4
720 01:48:46.547593 Disabling Deep S4
721 01:48:46.548149 Disabling Deep S5
722 01:48:46.550744 Disabling Deep S5
723 01:48:46.554033 PCI: 00:1f.2 [0000/0000] hidden
724 01:48:46.557579 PCI: 00:1f.3 [8086/0000] bus ops
725 01:48:46.561069 PCI: 00:1f.3 [8086/4dc8] enabled
726 01:48:46.564995 PCI: 00:1f.5 [8086/0000] bus ops
727 01:48:46.567798 PCI: 00:1f.5 [8086/4da4] enabled
728 01:48:46.570641 PCI: Leftover static devices:
729 01:48:46.571109 PCI: 00:12.6
730 01:48:46.571481 PCI: 00:09.0
731 01:48:46.574147 PCI: 00:14.1
732 01:48:46.574757 PCI: 00:16.1
733 01:48:46.577347 PCI: 00:16.4
734 01:48:46.577904 PCI: 00:16.5
735 01:48:46.578271 PCI: 00:17.0
736 01:48:46.580854 PCI: 00:19.1
737 01:48:46.581423 PCI: 00:1e.1
738 01:48:46.584005 PCI: 00:1e.3
739 01:48:46.584472 PCI: 00:1f.1
740 01:48:46.584838 PCI: 00:1f.4
741 01:48:46.587874 PCI: 00:1f.7
742 01:48:46.590675 PCI: Check your devicetree.cb.
743 01:48:46.594114 PCI: 00:02.0 scanning...
744 01:48:46.597365 scan_generic_bus for PCI: 00:02.0
745 01:48:46.600703 scan_generic_bus for PCI: 00:02.0 done
746 01:48:46.604114 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
747 01:48:46.607285 PCI: 00:04.0 scanning...
748 01:48:46.611266 scan_generic_bus for PCI: 00:04.0
749 01:48:46.613974 GENERIC: 0.0 enabled
750 01:48:46.620936 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
751 01:48:46.624003 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
752 01:48:46.627289 PCI: 00:05.0 scanning...
753 01:48:46.630580 scan_generic_bus for PCI: 00:05.0
754 01:48:46.631143 GENERIC: 0.0 enabled
755 01:48:46.637441 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
756 01:48:46.644089 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
757 01:48:46.644651 PCI: 00:14.0 scanning...
758 01:48:46.647308 scan_static_bus for PCI: 00:14.0
759 01:48:46.651400 USB0 port 0 enabled
760 01:48:46.654025 USB0 port 0 scanning...
761 01:48:46.657434 scan_static_bus for USB0 port 0
762 01:48:46.657898 USB2 port 0 enabled
763 01:48:46.660606 USB2 port 1 enabled
764 01:48:46.664881 USB2 port 2 enabled
765 01:48:46.665448 USB2 port 3 enabled
766 01:48:46.667953 USB2 port 4 disabled
767 01:48:46.671256 USB2 port 5 enabled
768 01:48:46.671815 USB2 port 6 disabled
769 01:48:46.674332 USB2 port 7 enabled
770 01:48:46.674942 USB3 port 0 enabled
771 01:48:46.677487 USB3 port 1 enabled
772 01:48:46.680528 USB3 port 2 enabled
773 01:48:46.681090 USB3 port 3 enabled
774 01:48:46.683785 USB2 port 0 scanning...
775 01:48:46.687382 scan_static_bus for USB2 port 0
776 01:48:46.691149 scan_static_bus for USB2 port 0 done
777 01:48:46.697294 scan_bus: bus USB2 port 0 finished in 6 msecs
778 01:48:46.697856 USB2 port 1 scanning...
779 01:48:46.700610 scan_static_bus for USB2 port 1
780 01:48:46.704591 scan_static_bus for USB2 port 1 done
781 01:48:46.710596 scan_bus: bus USB2 port 1 finished in 6 msecs
782 01:48:46.714396 USB2 port 2 scanning...
783 01:48:46.716984 scan_static_bus for USB2 port 2
784 01:48:46.720712 scan_static_bus for USB2 port 2 done
785 01:48:46.723892 scan_bus: bus USB2 port 2 finished in 6 msecs
786 01:48:46.727169 USB2 port 3 scanning...
787 01:48:46.730728 scan_static_bus for USB2 port 3
788 01:48:46.733986 scan_static_bus for USB2 port 3 done
789 01:48:46.737249 scan_bus: bus USB2 port 3 finished in 6 msecs
790 01:48:46.740341 USB2 port 5 scanning...
791 01:48:46.744149 scan_static_bus for USB2 port 5
792 01:48:46.747292 scan_static_bus for USB2 port 5 done
793 01:48:46.753805 scan_bus: bus USB2 port 5 finished in 6 msecs
794 01:48:46.754370 USB2 port 7 scanning...
795 01:48:46.756933 scan_static_bus for USB2 port 7
796 01:48:46.760449 scan_static_bus for USB2 port 7 done
797 01:48:46.767102 scan_bus: bus USB2 port 7 finished in 6 msecs
798 01:48:46.767664 USB3 port 0 scanning...
799 01:48:46.770216 scan_static_bus for USB3 port 0
800 01:48:46.777540 scan_static_bus for USB3 port 0 done
801 01:48:46.780406 scan_bus: bus USB3 port 0 finished in 6 msecs
802 01:48:46.783717 USB3 port 1 scanning...
803 01:48:46.787198 scan_static_bus for USB3 port 1
804 01:48:46.791044 scan_static_bus for USB3 port 1 done
805 01:48:46.793704 scan_bus: bus USB3 port 1 finished in 6 msecs
806 01:48:46.797085 USB3 port 2 scanning...
807 01:48:46.800176 scan_static_bus for USB3 port 2
808 01:48:46.803619 scan_static_bus for USB3 port 2 done
809 01:48:46.807171 scan_bus: bus USB3 port 2 finished in 6 msecs
810 01:48:46.810163 USB3 port 3 scanning...
811 01:48:46.813702 scan_static_bus for USB3 port 3
812 01:48:46.817218 scan_static_bus for USB3 port 3 done
813 01:48:46.823605 scan_bus: bus USB3 port 3 finished in 6 msecs
814 01:48:46.826997 scan_static_bus for USB0 port 0 done
815 01:48:46.830554 scan_bus: bus USB0 port 0 finished in 172 msecs
816 01:48:46.833565 scan_static_bus for PCI: 00:14.0 done
817 01:48:46.840046 scan_bus: bus PCI: 00:14.0 finished in 189 msecs
818 01:48:46.843667 PCI: 00:14.3 scanning...
819 01:48:46.846886 scan_static_bus for PCI: 00:14.3
820 01:48:46.847400 GENERIC: 0.0 enabled
821 01:48:46.850356 scan_static_bus for PCI: 00:14.3 done
822 01:48:46.856676 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
823 01:48:46.860098 PCI: 00:15.0 scanning...
824 01:48:46.863718 scan_static_bus for PCI: 00:15.0
825 01:48:46.864223 I2C: 00:2c enabled
826 01:48:46.866706 I2C: 00:15 enabled
827 01:48:46.870048 scan_static_bus for PCI: 00:15.0 done
828 01:48:46.873366 scan_bus: bus PCI: 00:15.0 finished in 10 msecs
829 01:48:46.876821 PCI: 00:15.1 scanning...
830 01:48:46.880195 scan_static_bus for PCI: 00:15.1
831 01:48:46.884009 scan_static_bus for PCI: 00:15.1 done
832 01:48:46.888666 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
833 01:48:46.892110 PCI: 00:15.2 scanning...
834 01:48:46.894626 scan_static_bus for PCI: 00:15.2
835 01:48:46.898280 GENERIC: 0.0 disabled
836 01:48:46.898888 I2C: 00:15 enabled
837 01:48:46.902031 I2C: 00:10 disabled
838 01:48:46.902493 I2C: 00:10 disabled
839 01:48:46.905793 I2C: 00:2c enabled
840 01:48:46.908568 I2C: 00:40 enabled
841 01:48:46.909029 I2C: 00:10 enabled
842 01:48:46.912528 I2C: 00:39 enabled
843 01:48:46.915744 scan_static_bus for PCI: 00:15.2 done
844 01:48:46.918602 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
845 01:48:46.922460 PCI: 00:15.3 scanning...
846 01:48:46.925260 scan_static_bus for PCI: 00:15.3
847 01:48:46.929185 I2C: 00:36 enabled
848 01:48:46.929750 I2C: 00:10 disabled
849 01:48:46.932713 I2C: 00:0c enabled
850 01:48:46.935454 I2C: 00:50 enabled
851 01:48:46.938784 scan_static_bus for PCI: 00:15.3 done
852 01:48:46.941853 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
853 01:48:46.945269 PCI: 00:19.0 scanning...
854 01:48:46.949061 scan_static_bus for PCI: 00:19.0
855 01:48:46.951852 I2C: 00:1a enabled
856 01:48:46.952409 I2C: 00:1a disabled
857 01:48:46.955715 I2C: 00:1a disabled
858 01:48:46.956176 I2C: 00:28 enabled
859 01:48:46.958591 I2C: 00:29 enabled
860 01:48:46.961884 scan_static_bus for PCI: 00:19.0 done
861 01:48:46.968490 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
862 01:48:46.969057 PCI: 00:1e.2 scanning...
863 01:48:46.971843 scan_generic_bus for PCI: 00:1e.2
864 01:48:46.975180 SPI: 00 enabled
865 01:48:46.982135 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
866 01:48:46.985328 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
867 01:48:46.988415 PCI: 00:1f.0 scanning...
868 01:48:46.992125 scan_static_bus for PCI: 00:1f.0
869 01:48:46.995471 PNP: 0c09.0 enabled
870 01:48:46.996034 PNP: 0c09.0 scanning...
871 01:48:46.998376 scan_static_bus for PNP: 0c09.0
872 01:48:47.001661 scan_static_bus for PNP: 0c09.0 done
873 01:48:47.008214 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
874 01:48:47.011980 scan_static_bus for PCI: 00:1f.0 done
875 01:48:47.014970 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
876 01:48:47.018007 PCI: 00:1f.3 scanning...
877 01:48:47.021552 scan_static_bus for PCI: 00:1f.3
878 01:48:47.024734 GENERIC: 0.0 disabled
879 01:48:47.028483 scan_static_bus for PCI: 00:1f.3 done
880 01:48:47.031961 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
881 01:48:47.034729 PCI: 00:1f.5 scanning...
882 01:48:47.038302 scan_generic_bus for PCI: 00:1f.5
883 01:48:47.044935 scan_generic_bus for PCI: 00:1f.5 done
884 01:48:47.048207 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
885 01:48:47.051191 scan_bus: bus DOMAIN: 0000 finished in 646 msecs
886 01:48:47.058143 scan_static_bus for Root Device done
887 01:48:47.061577 scan_bus: bus Root Device finished in 665 msecs
888 01:48:47.062049 done
889 01:48:47.068624 BS: BS_DEV_ENUMERATE run times (exec / console): 7 / 1085 ms
890 01:48:47.071159 Chrome EC: UHEPI supported
891 01:48:47.078052 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
892 01:48:47.084720 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
893 01:48:47.088110 SPI flash protection: WPSW=1 SRP0=0
894 01:48:47.091792 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
895 01:48:47.098251 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
896 01:48:47.101483 found VGA at PCI: 00:02.0
897 01:48:47.104338 Setting up VGA for PCI: 00:02.0
898 01:48:47.108169 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
899 01:48:47.114821 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
900 01:48:47.118375 Allocating resources...
901 01:48:47.119003 Reading resources...
902 01:48:47.121140 Root Device read_resources bus 0 link: 0
903 01:48:47.128015 CPU_CLUSTER: 0 read_resources bus 0 link: 0
904 01:48:47.131376 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
905 01:48:47.138618 DOMAIN: 0000 read_resources bus 0 link: 0
906 01:48:47.141063 PCI: 00:04.0 read_resources bus 1 link: 0
907 01:48:47.147551 PCI: 00:04.0 read_resources bus 1 link: 0 done
908 01:48:47.150903 PCI: 00:05.0 read_resources bus 2 link: 0
909 01:48:47.157673 PCI: 00:05.0 read_resources bus 2 link: 0 done
910 01:48:47.161069 PCI: 00:14.0 read_resources bus 0 link: 0
911 01:48:47.164239 USB0 port 0 read_resources bus 0 link: 0
912 01:48:47.172297 USB0 port 0 read_resources bus 0 link: 0 done
913 01:48:47.175777 PCI: 00:14.0 read_resources bus 0 link: 0 done
914 01:48:47.182251 PCI: 00:14.3 read_resources bus 0 link: 0
915 01:48:47.185899 PCI: 00:14.3 read_resources bus 0 link: 0 done
916 01:48:47.241344 PCI: 00:15.0 read_resources bus 0 link: 0
917 01:48:47.241920 PCI: 00:15.0 read_resources bus 0 link: 0 done
918 01:48:47.242300 PCI: 00:15.2 read_resources bus 0 link: 0
919 01:48:47.243066 PCI: 00:15.2 read_resources bus 0 link: 0 done
920 01:48:47.243465 PCI: 00:15.3 read_resources bus 0 link: 0
921 01:48:47.243807 PCI: 00:15.3 read_resources bus 0 link: 0 done
922 01:48:47.244139 PCI: 00:19.0 read_resources bus 0 link: 0
923 01:48:47.244456 PCI: 00:19.0 read_resources bus 0 link: 0 done
924 01:48:47.244769 PCI: 00:1e.2 read_resources bus 3 link: 0
925 01:48:47.245146 PCI: 00:1e.2 read_resources bus 3 link: 0 done
926 01:48:47.245470 PCI: 00:1f.0 read_resources bus 0 link: 0
927 01:48:47.280034 PCI: 00:1f.0 read_resources bus 0 link: 0 done
928 01:48:47.281059 PCI: 00:1f.3 read_resources bus 0 link: 0
929 01:48:47.281468 PCI: 00:1f.3 read_resources bus 0 link: 0 done
930 01:48:47.281824 DOMAIN: 0000 read_resources bus 0 link: 0 done
931 01:48:47.282162 Root Device read_resources bus 0 link: 0 done
932 01:48:47.282483 Done reading resources.
933 01:48:47.282876 Show resources in subtree (Root Device)...After reading.
934 01:48:47.283202 Root Device child on link 0 CPU_CLUSTER: 0
935 01:48:47.283948 CPU_CLUSTER: 0 child on link 0 APIC: 00
936 01:48:47.284313 APIC: 00
937 01:48:47.284628 APIC: 02
938 01:48:47.287372 DOMAIN: 0000 child on link 0 PCI: 00:00.0
939 01:48:47.297833 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
940 01:48:47.307815 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
941 01:48:47.310934 PCI: 00:00.0
942 01:48:47.317512 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
943 01:48:47.327349 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
944 01:48:47.337275 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
945 01:48:47.347363 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
946 01:48:47.357304 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
947 01:48:47.364102 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
948 01:48:47.374498 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
949 01:48:47.384192 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
950 01:48:47.394101 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
951 01:48:47.404103 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
952 01:48:47.410861 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
953 01:48:47.420547 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
954 01:48:47.430979 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
955 01:48:47.440491 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
956 01:48:47.450374 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
957 01:48:47.460410 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
958 01:48:47.470721 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
959 01:48:47.477049 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
960 01:48:47.486755 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
961 01:48:47.490429 PCI: 00:02.0
962 01:48:47.500493 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
963 01:48:47.510192 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
964 01:48:47.517268 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
965 01:48:47.523269 PCI: 00:04.0 child on link 0 GENERIC: 0.0
966 01:48:47.533830 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
967 01:48:47.534403 GENERIC: 0.0
968 01:48:47.537435 PCI: 00:05.0 child on link 0 GENERIC: 0.0
969 01:48:47.550359 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
970 01:48:47.550955 GENERIC: 0.0
971 01:48:47.553616 PCI: 00:08.0
972 01:48:47.560908 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
973 01:48:47.567755 PCI: 00:14.0 child on link 0 USB0 port 0
974 01:48:47.577871 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
975 01:48:47.581280 USB0 port 0 child on link 0 USB2 port 0
976 01:48:47.581847 USB2 port 0
977 01:48:47.584735 USB2 port 1
978 01:48:47.585302 USB2 port 2
979 01:48:47.587748 USB2 port 3
980 01:48:47.591088 USB2 port 4
981 01:48:47.591554 USB2 port 5
982 01:48:47.594506 USB2 port 6
983 01:48:47.595108 USB2 port 7
984 01:48:47.597686 USB3 port 0
985 01:48:47.598260 USB3 port 1
986 01:48:47.601467 USB3 port 2
987 01:48:47.602034 USB3 port 3
988 01:48:47.604656 PCI: 00:14.2
989 01:48:47.609102 PCI: 00:14.3 child on link 0 GENERIC: 0.0
990 01:48:47.617862 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
991 01:48:47.620974 GENERIC: 0.0
992 01:48:47.621440 PCI: 00:14.5
993 01:48:47.631307 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
994 01:48:47.634280 PCI: 00:15.0 child on link 0 I2C: 00:2c
995 01:48:47.644456 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
996 01:48:47.647552 I2C: 00:2c
997 01:48:47.648121 I2C: 00:15
998 01:48:47.650959 PCI: 00:15.1
999 01:48:47.661115 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1000 01:48:47.664310 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1001 01:48:47.674005 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1002 01:48:47.677319 GENERIC: 0.0
1003 01:48:47.677889 I2C: 00:15
1004 01:48:47.681148 I2C: 00:10
1005 01:48:47.681723 I2C: 00:10
1006 01:48:47.684160 I2C: 00:2c
1007 01:48:47.684728 I2C: 00:40
1008 01:48:47.687166 I2C: 00:10
1009 01:48:47.687821 I2C: 00:39
1010 01:48:47.690502 PCI: 00:15.3 child on link 0 I2C: 00:36
1011 01:48:47.700946 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1012 01:48:47.703915 I2C: 00:36
1013 01:48:47.704386 I2C: 00:10
1014 01:48:47.707431 I2C: 00:0c
1015 01:48:47.708005 I2C: 00:50
1016 01:48:47.710742 PCI: 00:16.0
1017 01:48:47.720919 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1018 01:48:47.724605 PCI: 00:19.0 child on link 0 I2C: 00:1a
1019 01:48:47.733994 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1020 01:48:47.734621 I2C: 00:1a
1021 01:48:47.737460 I2C: 00:1a
1022 01:48:47.738027 I2C: 00:1a
1023 01:48:47.740593 I2C: 00:28
1024 01:48:47.741212 I2C: 00:29
1025 01:48:47.744232 PCI: 00:19.2
1026 01:48:47.754279 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1027 01:48:47.763880 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1028 01:48:47.767120 PCI: 00:1a.0
1029 01:48:47.773820 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1030 01:48:47.777613 PCI: 00:1e.0
1031 01:48:47.781007 PCI: 00:1e.2 child on link 0 SPI: 00
1032 01:48:47.790405 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1033 01:48:47.794034 SPI: 00
1034 01:48:47.797469 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1035 01:48:47.803852 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1036 01:48:47.807276 PNP: 0c09.0
1037 01:48:47.817291 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1038 01:48:47.817862 PCI: 00:1f.2
1039 01:48:47.827446 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1040 01:48:47.837006 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1041 01:48:47.840332 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1042 01:48:47.850276 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1043 01:48:47.861109 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1044 01:48:47.863392 GENERIC: 0.0
1045 01:48:47.863853 PCI: 00:1f.5
1046 01:48:47.873319 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1047 01:48:47.880066 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1048 01:48:47.886880 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1049 01:48:47.893246 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1050 01:48:47.903525 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1051 01:48:47.909842 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1052 01:48:47.916728 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1053 01:48:47.919475 DOMAIN: 0000: Resource ranges:
1054 01:48:47.922858 * Base: 1000, Size: 800, Tag: 100
1055 01:48:47.926636 * Base: 1900, Size: e700, Tag: 100
1056 01:48:47.933659 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1057 01:48:47.940376 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1058 01:48:47.947205 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1059 01:48:47.953028 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1060 01:48:47.959584 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1061 01:48:47.969843 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1062 01:48:47.976843 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1063 01:48:47.983044 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1064 01:48:47.993243 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1065 01:48:47.999525 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1066 01:48:48.006342 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1067 01:48:48.016117 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1068 01:48:48.022583 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1069 01:48:48.029489 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1070 01:48:48.039142 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1071 01:48:48.046227 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1072 01:48:48.052688 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1073 01:48:48.062917 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1074 01:48:48.069321 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1075 01:48:48.075842 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1076 01:48:48.082701 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1077 01:48:48.092629 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1078 01:48:48.099303 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1079 01:48:48.105973 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1080 01:48:48.109294 DOMAIN: 0000: Resource ranges:
1081 01:48:48.115525 * Base: 7fc00000, Size: 40400000, Tag: 200
1082 01:48:48.119120 * Base: d0000000, Size: 2b000000, Tag: 200
1083 01:48:48.122349 * Base: fb001000, Size: 2fff000, Tag: 200
1084 01:48:48.129477 * Base: fe010000, Size: 22000, Tag: 200
1085 01:48:48.132398 * Base: fe033000, Size: a4d000, Tag: 200
1086 01:48:48.135436 * Base: fea88000, Size: 2f8000, Tag: 200
1087 01:48:48.139309 * Base: fed88000, Size: 8000, Tag: 200
1088 01:48:48.143125 * Base: fed93000, Size: d000, Tag: 200
1089 01:48:48.149959 * Base: feda2000, Size: 125e000, Tag: 200
1090 01:48:48.153257 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1091 01:48:48.160456 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1092 01:48:48.166377 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1093 01:48:48.172965 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1094 01:48:48.179442 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1095 01:48:48.186172 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1096 01:48:48.193322 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1097 01:48:48.199967 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1098 01:48:48.206495 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1099 01:48:48.212882 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1100 01:48:48.219372 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1101 01:48:48.226076 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1102 01:48:48.232919 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1103 01:48:48.239486 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1104 01:48:48.246046 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1105 01:48:48.252279 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1106 01:48:48.259093 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1107 01:48:48.265637 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1108 01:48:48.272537 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1109 01:48:48.279408 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1110 01:48:48.286218 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1111 01:48:48.292822 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1112 01:48:48.299259 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1113 01:48:48.305837 Root Device assign_resources, bus 0 link: 0
1114 01:48:48.309557 DOMAIN: 0000 assign_resources, bus 0 link: 0
1115 01:48:48.318951 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1116 01:48:48.325696 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1117 01:48:48.332406 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1118 01:48:48.342616 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1119 01:48:48.345850 PCI: 00:04.0 assign_resources, bus 1 link: 0
1120 01:48:48.352366 PCI: 00:04.0 assign_resources, bus 1 link: 0
1121 01:48:48.358679 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1122 01:48:48.362271 PCI: 00:05.0 assign_resources, bus 2 link: 0
1123 01:48:48.368802 PCI: 00:05.0 assign_resources, bus 2 link: 0
1124 01:48:48.375458 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1125 01:48:48.385836 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1126 01:48:48.388702 PCI: 00:14.0 assign_resources, bus 0 link: 0
1127 01:48:48.391951 PCI: 00:14.0 assign_resources, bus 0 link: 0
1128 01:48:48.402058 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1129 01:48:48.405266 PCI: 00:14.3 assign_resources, bus 0 link: 0
1130 01:48:48.412100 PCI: 00:14.3 assign_resources, bus 0 link: 0
1131 01:48:48.418759 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1132 01:48:48.428609 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1133 01:48:48.432164 PCI: 00:15.0 assign_resources, bus 0 link: 0
1134 01:48:48.434985 PCI: 00:15.0 assign_resources, bus 0 link: 0
1135 01:48:48.445188 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1136 01:48:48.452580 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1137 01:48:48.458127 PCI: 00:15.2 assign_resources, bus 0 link: 0
1138 01:48:48.461720 PCI: 00:15.2 assign_resources, bus 0 link: 0
1139 01:48:48.468184 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1140 01:48:48.474841 PCI: 00:15.3 assign_resources, bus 0 link: 0
1141 01:48:48.478445 PCI: 00:15.3 assign_resources, bus 0 link: 0
1142 01:48:48.488632 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1143 01:48:48.494988 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1144 01:48:48.498287 PCI: 00:19.0 assign_resources, bus 0 link: 0
1145 01:48:48.505204 PCI: 00:19.0 assign_resources, bus 0 link: 0
1146 01:48:48.511361 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1147 01:48:48.521779 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1148 01:48:48.528280 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1149 01:48:48.535250 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1150 01:48:48.538128 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1151 01:48:48.541440 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1152 01:48:48.548091 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1153 01:48:48.551450 LPC: Trying to open IO window from 800 size 1ff
1154 01:48:48.561962 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1155 01:48:48.567804 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1156 01:48:48.574456 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1157 01:48:48.577648 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1158 01:48:48.584411 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1159 01:48:48.590931 DOMAIN: 0000 assign_resources, bus 0 link: 0
1160 01:48:48.594920 Root Device assign_resources, bus 0 link: 0
1161 01:48:48.598624 Done setting resources.
1162 01:48:48.604261 Show resources in subtree (Root Device)...After assigning values.
1163 01:48:48.607886 Root Device child on link 0 CPU_CLUSTER: 0
1164 01:48:48.611205 CPU_CLUSTER: 0 child on link 0 APIC: 00
1165 01:48:48.614222 APIC: 00
1166 01:48:48.614711 APIC: 02
1167 01:48:48.620887 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1168 01:48:48.627702 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1169 01:48:48.637539 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1170 01:48:48.640955 PCI: 00:00.0
1171 01:48:48.651146 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1172 01:48:48.657824 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1173 01:48:48.667282 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1174 01:48:48.677541 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1175 01:48:48.687250 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1176 01:48:48.697360 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1177 01:48:48.706935 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1178 01:48:48.713485 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1179 01:48:48.723585 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1180 01:48:48.734225 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1181 01:48:48.743471 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1182 01:48:48.753384 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1183 01:48:48.760101 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1184 01:48:48.769793 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1185 01:48:48.780143 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1186 01:48:48.790320 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1187 01:48:48.800290 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1188 01:48:48.810105 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1189 01:48:48.816556 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1190 01:48:48.820040 PCI: 00:02.0
1191 01:48:48.830045 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1192 01:48:48.839587 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1193 01:48:48.850469 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1194 01:48:48.852696 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1195 01:48:48.866048 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1196 01:48:48.866604 GENERIC: 0.0
1197 01:48:48.869560 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1198 01:48:48.882874 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1199 01:48:48.883395 GENERIC: 0.0
1200 01:48:48.885942 PCI: 00:08.0
1201 01:48:48.895911 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1202 01:48:48.899344 PCI: 00:14.0 child on link 0 USB0 port 0
1203 01:48:48.909504 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1204 01:48:48.916198 USB0 port 0 child on link 0 USB2 port 0
1205 01:48:48.916670 USB2 port 0
1206 01:48:48.919494 USB2 port 1
1207 01:48:48.920055 USB2 port 2
1208 01:48:48.922810 USB2 port 3
1209 01:48:48.923278 USB2 port 4
1210 01:48:48.925919 USB2 port 5
1211 01:48:48.926384 USB2 port 6
1212 01:48:48.929278 USB2 port 7
1213 01:48:48.929744 USB3 port 0
1214 01:48:48.932500 USB3 port 1
1215 01:48:48.933060 USB3 port 2
1216 01:48:48.935888 USB3 port 3
1217 01:48:48.936350 PCI: 00:14.2
1218 01:48:48.942705 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1219 01:48:48.952446 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1220 01:48:48.952914 GENERIC: 0.0
1221 01:48:48.955717 PCI: 00:14.5
1222 01:48:48.965720 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1223 01:48:48.968819 PCI: 00:15.0 child on link 0 I2C: 00:2c
1224 01:48:48.979250 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1225 01:48:48.982135 I2C: 00:2c
1226 01:48:48.982905 I2C: 00:15
1227 01:48:48.985288 PCI: 00:15.1
1228 01:48:48.995191 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1229 01:48:48.998555 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1230 01:48:49.011794 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1231 01:48:49.012351 GENERIC: 0.0
1232 01:48:49.015271 I2C: 00:15
1233 01:48:49.015765 I2C: 00:10
1234 01:48:49.016131 I2C: 00:10
1235 01:48:49.019176 I2C: 00:2c
1236 01:48:49.019772 I2C: 00:40
1237 01:48:49.022023 I2C: 00:10
1238 01:48:49.022727 I2C: 00:39
1239 01:48:49.028653 PCI: 00:15.3 child on link 0 I2C: 00:36
1240 01:48:49.038686 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1241 01:48:49.039358 I2C: 00:36
1242 01:48:49.041674 I2C: 00:10
1243 01:48:49.042226 I2C: 00:0c
1244 01:48:49.044880 I2C: 00:50
1245 01:48:49.045336 PCI: 00:16.0
1246 01:48:49.055227 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1247 01:48:49.061563 PCI: 00:19.0 child on link 0 I2C: 00:1a
1248 01:48:49.071667 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1249 01:48:49.072219 I2C: 00:1a
1250 01:48:49.074470 I2C: 00:1a
1251 01:48:49.074948 I2C: 00:1a
1252 01:48:49.078615 I2C: 00:28
1253 01:48:49.079070 I2C: 00:29
1254 01:48:49.082449 PCI: 00:19.2
1255 01:48:49.091269 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1256 01:48:49.101322 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1257 01:48:49.102034 PCI: 00:1a.0
1258 01:48:49.114701 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1259 01:48:49.115244 PCI: 00:1e.0
1260 01:48:49.118290 PCI: 00:1e.2 child on link 0 SPI: 00
1261 01:48:49.127998 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1262 01:48:49.131094 SPI: 00
1263 01:48:49.134752 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1264 01:48:49.144487 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1265 01:48:49.144988 PNP: 0c09.0
1266 01:48:49.154231 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1267 01:48:49.154870 PCI: 00:1f.2
1268 01:48:49.165077 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1269 01:48:49.174075 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1270 01:48:49.177344 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1271 01:48:49.187035 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1272 01:48:49.200900 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1273 01:48:49.201470 GENERIC: 0.0
1274 01:48:49.203713 PCI: 00:1f.5
1275 01:48:49.213696 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1276 01:48:49.216897 Done allocating resources.
1277 01:48:49.220857 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2098 ms
1278 01:48:49.224419 Enabling resources...
1279 01:48:49.227229 PCI: 00:00.0 subsystem <- 8086/4e22
1280 01:48:49.230969 PCI: 00:00.0 cmd <- 06
1281 01:48:49.233857 PCI: 00:02.0 subsystem <- 8086/4e55
1282 01:48:49.237456 PCI: 00:02.0 cmd <- 03
1283 01:48:49.241303 PCI: 00:04.0 subsystem <- 8086/4e03
1284 01:48:49.244041 PCI: 00:04.0 cmd <- 02
1285 01:48:49.247202 PCI: 00:05.0 bridge ctrl <- 0003
1286 01:48:49.250733 PCI: 00:05.0 subsystem <- 8086/4e19
1287 01:48:49.253981 PCI: 00:05.0 cmd <- 02
1288 01:48:49.254440 PCI: 00:08.0 cmd <- 06
1289 01:48:49.260629 PCI: 00:14.0 subsystem <- 8086/4ded
1290 01:48:49.261084 PCI: 00:14.0 cmd <- 02
1291 01:48:49.264288 PCI: 00:14.3 subsystem <- 8086/4df0
1292 01:48:49.267205 PCI: 00:14.3 cmd <- 02
1293 01:48:49.270892 PCI: 00:14.5 subsystem <- 8086/4df8
1294 01:48:49.273920 PCI: 00:14.5 cmd <- 06
1295 01:48:49.277118 PCI: 00:15.0 subsystem <- 8086/4de8
1296 01:48:49.280507 PCI: 00:15.0 cmd <- 02
1297 01:48:49.284237 PCI: 00:15.1 subsystem <- 8086/4de9
1298 01:48:49.287242 PCI: 00:15.1 cmd <- 02
1299 01:48:49.290439 PCI: 00:15.2 subsystem <- 8086/4dea
1300 01:48:49.290955 PCI: 00:15.2 cmd <- 02
1301 01:48:49.297055 PCI: 00:15.3 subsystem <- 8086/4deb
1302 01:48:49.297569 PCI: 00:15.3 cmd <- 02
1303 01:48:49.300796 PCI: 00:16.0 subsystem <- 8086/4de0
1304 01:48:49.303597 PCI: 00:16.0 cmd <- 02
1305 01:48:49.307126 PCI: 00:19.0 subsystem <- 8086/4dc5
1306 01:48:49.310608 PCI: 00:19.0 cmd <- 02
1307 01:48:49.313701 PCI: 00:19.2 subsystem <- 8086/4dc7
1308 01:48:49.316763 PCI: 00:19.2 cmd <- 06
1309 01:48:49.320127 PCI: 00:1a.0 subsystem <- 8086/4dc4
1310 01:48:49.323776 PCI: 00:1a.0 cmd <- 06
1311 01:48:49.327279 PCI: 00:1e.2 subsystem <- 8086/4daa
1312 01:48:49.327738 PCI: 00:1e.2 cmd <- 06
1313 01:48:49.334212 PCI: 00:1f.0 subsystem <- 8086/4d87
1314 01:48:49.334807 PCI: 00:1f.0 cmd <- 407
1315 01:48:49.337474 PCI: 00:1f.3 subsystem <- 8086/4dc8
1316 01:48:49.340708 PCI: 00:1f.3 cmd <- 02
1317 01:48:49.344085 PCI: 00:1f.5 subsystem <- 8086/4da4
1318 01:48:49.347191 PCI: 00:1f.5 cmd <- 406
1319 01:48:49.351610 done.
1320 01:48:49.355053 BS: BS_DEV_ENABLE run times (exec / console): 6 / 122 ms
1321 01:48:49.357992 Initializing devices...
1322 01:48:49.361379 Root Device init
1323 01:48:49.361963 mainboard: EC init
1324 01:48:49.367979 Chrome EC: Set SMI mask to 0x0000000000000000
1325 01:48:49.371889 Chrome EC: clear events_b mask to 0x0000000000000000
1326 01:48:49.378166 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1327 01:48:49.384915 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1328 01:48:49.391252 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1329 01:48:49.394609 Chrome EC: Set WAKE mask to 0x0000000000000000
1330 01:48:49.397991 Root Device init finished in 35 msecs
1331 01:48:49.402956 PCI: 00:00.0 init
1332 01:48:49.406126 CPU TDP = 6 Watts
1333 01:48:49.406634 CPU PL1 = 7 Watts
1334 01:48:49.409077 CPU PL2 = 12 Watts
1335 01:48:49.412548 PCI: 00:00.0 init finished in 6 msecs
1336 01:48:49.416053 PCI: 00:02.0 init
1337 01:48:49.419157 GMA: Found VBT in CBFS
1338 01:48:49.419615 GMA: Found valid VBT in CBFS
1339 01:48:49.425686 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1340 01:48:49.432253 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1341 01:48:49.439076 PCI: 00:02.0 init finished in 18 msecs
1342 01:48:49.439600 PCI: 00:08.0 init
1343 01:48:49.445951 PCI: 00:08.0 init finished in 0 msecs
1344 01:48:49.446488 PCI: 00:14.0 init
1345 01:48:49.452466 XHCI: Updated LFPS sampling OFF time to 9 ms
1346 01:48:49.455592 PCI: 00:14.0 init finished in 4 msecs
1347 01:48:49.459251 PCI: 00:15.0 init
1348 01:48:49.459796 I2C bus 0 version 0x3230302a
1349 01:48:49.462490 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1350 01:48:49.469147 PCI: 00:15.0 init finished in 6 msecs
1351 01:48:49.469701 PCI: 00:15.1 init
1352 01:48:49.472337 I2C bus 1 version 0x3230302a
1353 01:48:49.475694 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1354 01:48:49.479059 PCI: 00:15.1 init finished in 6 msecs
1355 01:48:49.482509 PCI: 00:15.2 init
1356 01:48:49.485730 I2C bus 2 version 0x3230302a
1357 01:48:49.489078 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1358 01:48:49.492679 PCI: 00:15.2 init finished in 6 msecs
1359 01:48:49.495544 PCI: 00:15.3 init
1360 01:48:49.498997 I2C bus 3 version 0x3230302a
1361 01:48:49.502256 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1362 01:48:49.505760 PCI: 00:15.3 init finished in 6 msecs
1363 01:48:49.508995 PCI: 00:16.0 init
1364 01:48:49.512211 PCI: 00:16.0 init finished in 0 msecs
1365 01:48:49.512671 PCI: 00:19.0 init
1366 01:48:49.515545 I2C bus 4 version 0x3230302a
1367 01:48:49.519220 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1368 01:48:49.522510 PCI: 00:19.0 init finished in 6 msecs
1369 01:48:49.525836 PCI: 00:1a.0 init
1370 01:48:49.529597 PCI: 00:1a.0 init finished in 0 msecs
1371 01:48:49.532724 PCI: 00:1f.0 init
1372 01:48:49.535884 IOAPIC: Initializing IOAPIC at 0xfec00000
1373 01:48:49.542331 IOAPIC: Bootstrap Processor Local APIC = 0x00
1374 01:48:49.542934 IOAPIC: ID = 0x02
1375 01:48:49.545886 IOAPIC: Dumping registers
1376 01:48:49.549080 reg 0x0000: 0x02000000
1377 01:48:49.552437 reg 0x0001: 0x00770020
1378 01:48:49.552966 reg 0x0002: 0x00000000
1379 01:48:49.559019 PCI: 00:1f.0 init finished in 21 msecs
1380 01:48:49.559499 PCI: 00:1f.2 init
1381 01:48:49.562407 Disabling ACPI via APMC.
1382 01:48:49.565942 APMC done.
1383 01:48:49.569438 PCI: 00:1f.2 init finished in 5 msecs
1384 01:48:49.580595 PNP: 0c09.0 init
1385 01:48:49.584215 Google Chrome EC uptime: 6.568 seconds
1386 01:48:49.590314 Google Chrome AP resets since EC boot: 0
1387 01:48:49.593382 Google Chrome most recent AP reset causes:
1388 01:48:49.600289 Google Chrome EC reset flags at last EC boot: reset-pin
1389 01:48:49.603648 PNP: 0c09.0 init finished in 18 msecs
1390 01:48:49.604206 Devices initialized
1391 01:48:49.607084 Show all devs... After init.
1392 01:48:49.610703 Root Device: enabled 1
1393 01:48:49.613485 CPU_CLUSTER: 0: enabled 1
1394 01:48:49.613961 DOMAIN: 0000: enabled 1
1395 01:48:49.616832 PCI: 00:00.0: enabled 1
1396 01:48:49.620584 PCI: 00:02.0: enabled 1
1397 01:48:49.623658 PCI: 00:04.0: enabled 1
1398 01:48:49.624116 PCI: 00:05.0: enabled 1
1399 01:48:49.626907 PCI: 00:09.0: enabled 0
1400 01:48:49.630350 PCI: 00:12.6: enabled 0
1401 01:48:49.634130 PCI: 00:14.0: enabled 1
1402 01:48:49.634724 PCI: 00:14.1: enabled 0
1403 01:48:49.637348 PCI: 00:14.2: enabled 0
1404 01:48:49.640373 PCI: 00:14.3: enabled 1
1405 01:48:49.644142 PCI: 00:14.5: enabled 1
1406 01:48:49.644707 PCI: 00:15.0: enabled 1
1407 01:48:49.646722 PCI: 00:15.1: enabled 1
1408 01:48:49.650371 PCI: 00:15.2: enabled 1
1409 01:48:49.650974 PCI: 00:15.3: enabled 1
1410 01:48:49.653934 PCI: 00:16.0: enabled 1
1411 01:48:49.656757 PCI: 00:16.1: enabled 0
1412 01:48:49.660152 PCI: 00:16.4: enabled 0
1413 01:48:49.660645 PCI: 00:16.5: enabled 0
1414 01:48:49.663558 PCI: 00:17.0: enabled 0
1415 01:48:49.667274 PCI: 00:19.0: enabled 1
1416 01:48:49.670036 PCI: 00:19.1: enabled 0
1417 01:48:49.670493 PCI: 00:19.2: enabled 1
1418 01:48:49.673709 PCI: 00:1a.0: enabled 1
1419 01:48:49.676702 PCI: 00:1c.0: enabled 0
1420 01:48:49.679862 PCI: 00:1c.1: enabled 0
1421 01:48:49.680319 PCI: 00:1c.2: enabled 0
1422 01:48:49.683292 PCI: 00:1c.3: enabled 0
1423 01:48:49.687000 PCI: 00:1c.4: enabled 0
1424 01:48:49.687459 PCI: 00:1c.5: enabled 0
1425 01:48:49.689924 PCI: 00:1c.6: enabled 0
1426 01:48:49.693807 PCI: 00:1c.7: enabled 1
1427 01:48:49.697026 PCI: 00:1e.0: enabled 0
1428 01:48:49.697586 PCI: 00:1e.1: enabled 0
1429 01:48:49.699872 PCI: 00:1e.2: enabled 1
1430 01:48:49.703227 PCI: 00:1e.3: enabled 0
1431 01:48:49.706779 PCI: 00:1f.0: enabled 1
1432 01:48:49.707234 PCI: 00:1f.1: enabled 0
1433 01:48:49.710477 PCI: 00:1f.2: enabled 1
1434 01:48:49.713347 PCI: 00:1f.3: enabled 1
1435 01:48:49.716770 PCI: 00:1f.4: enabled 0
1436 01:48:49.717231 PCI: 00:1f.5: enabled 1
1437 01:48:49.720061 PCI: 00:1f.7: enabled 0
1438 01:48:49.723294 GENERIC: 0.0: enabled 1
1439 01:48:49.723752 GENERIC: 0.0: enabled 1
1440 01:48:49.726292 USB0 port 0: enabled 1
1441 01:48:49.729724 GENERIC: 0.0: enabled 1
1442 01:48:49.733615 I2C: 00:2c: enabled 1
1443 01:48:49.734169 I2C: 00:15: enabled 1
1444 01:48:49.736239 GENERIC: 0.0: enabled 0
1445 01:48:49.739599 I2C: 00:15: enabled 1
1446 01:48:49.740134 I2C: 00:10: enabled 0
1447 01:48:49.742849 I2C: 00:10: enabled 0
1448 01:48:49.746399 I2C: 00:2c: enabled 1
1449 01:48:49.746995 I2C: 00:40: enabled 1
1450 01:48:49.749549 I2C: 00:10: enabled 1
1451 01:48:49.752716 I2C: 00:39: enabled 1
1452 01:48:49.753170 I2C: 00:36: enabled 1
1453 01:48:49.756560 I2C: 00:10: enabled 0
1454 01:48:49.759207 I2C: 00:0c: enabled 1
1455 01:48:49.762836 I2C: 00:50: enabled 1
1456 01:48:49.763297 I2C: 00:1a: enabled 1
1457 01:48:49.766389 I2C: 00:1a: enabled 0
1458 01:48:49.769488 I2C: 00:1a: enabled 0
1459 01:48:49.769943 I2C: 00:28: enabled 1
1460 01:48:49.773002 I2C: 00:29: enabled 1
1461 01:48:49.775933 PCI: 00:00.0: enabled 1
1462 01:48:49.776422 SPI: 00: enabled 1
1463 01:48:49.779865 PNP: 0c09.0: enabled 1
1464 01:48:49.782446 GENERIC: 0.0: enabled 0
1465 01:48:49.782931 USB2 port 0: enabled 1
1466 01:48:49.785722 USB2 port 1: enabled 1
1467 01:48:49.789408 USB2 port 2: enabled 1
1468 01:48:49.789865 USB2 port 3: enabled 1
1469 01:48:49.792442 USB2 port 4: enabled 0
1470 01:48:49.796066 USB2 port 5: enabled 1
1471 01:48:49.799054 USB2 port 6: enabled 0
1472 01:48:49.799515 USB2 port 7: enabled 1
1473 01:48:49.803025 USB3 port 0: enabled 1
1474 01:48:49.805713 USB3 port 1: enabled 1
1475 01:48:49.806171 USB3 port 2: enabled 1
1476 01:48:49.809364 USB3 port 3: enabled 1
1477 01:48:49.812434 APIC: 00: enabled 1
1478 01:48:49.812892 APIC: 02: enabled 1
1479 01:48:49.816055 PCI: 00:08.0: enabled 1
1480 01:48:49.822517 BS: BS_DEV_INIT run times (exec / console): 23 / 437 ms
1481 01:48:49.825887 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1482 01:48:49.828735 ELOG: NV offset 0xbfa000 size 0x1000
1483 01:48:49.837044 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1484 01:48:49.843833 ELOG: Event(17) added with size 13 at 2023-10-11 01:48:49 UTC
1485 01:48:49.850338 ELOG: Event(92) added with size 9 at 2023-10-11 01:48:49 UTC
1486 01:48:49.857070 ELOG: Event(16) added with size 11 at 2023-10-11 01:48:49 UTC
1487 01:48:49.860083 Erasing flash addr bfa000 + 4 KiB
1488 01:48:49.911801 ELOG: Event(93) added with size 9 at 2023-10-11 01:48:49 UTC
1489 01:48:49.917822 ELOG: Event(9E) added with size 10 at 2023-10-11 01:48:49 UTC
1490 01:48:49.924564 ELOG: Event(9F) added with size 14 at 2023-10-11 01:48:49 UTC
1491 01:48:49.931762 BS: BS_DEV_INIT exit times (exec / console): 28 / 55 ms
1492 01:48:49.937901 ELOG: Event(A1) added with size 10 at 2023-10-11 01:48:49 UTC
1493 01:48:49.944751 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1494 01:48:49.951292 ELOG: Event(A0) added with size 9 at 2023-10-11 01:48:49 UTC
1495 01:48:49.954602 elog_add_boot_reason: Logged dev mode boot
1496 01:48:49.961081 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1497 01:48:49.964274 Finalize devices...
1498 01:48:49.964740 Devices finalized
1499 01:48:49.971397 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1500 01:48:49.974497 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1501 01:48:49.981197 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1502 01:48:49.984608 ME: HFSTS1 : 0x80030045
1503 01:48:49.988154 ME: HFSTS2 : 0x30280136
1504 01:48:49.994766 ME: HFSTS3 : 0x00000050
1505 01:48:49.997510 ME: HFSTS4 : 0x00004000
1506 01:48:50.001081 ME: HFSTS5 : 0x00000000
1507 01:48:50.004343 ME: HFSTS6 : 0x40400006
1508 01:48:50.007593 ME: Manufacturing Mode : NO
1509 01:48:50.010999 ME: FW Partition Table : OK
1510 01:48:50.015007 ME: Bringup Loader Failure : NO
1511 01:48:50.017408 ME: Firmware Init Complete : NO
1512 01:48:50.021039 ME: Boot Options Present : NO
1513 01:48:50.025050 ME: Update In Progress : NO
1514 01:48:50.027669 ME: D0i3 Support : YES
1515 01:48:50.030972 ME: Low Power State Enabled : NO
1516 01:48:50.034103 ME: CPU Replaced : YES
1517 01:48:50.037570 ME: CPU Replacement Valid : YES
1518 01:48:50.040832 ME: Current Working State : 5
1519 01:48:50.044377 ME: Current Operation State : 1
1520 01:48:50.047909 ME: Current Operation Mode : 3
1521 01:48:50.050638 ME: Error Code : 0
1522 01:48:50.054130 ME: CPU Debug Disabled : YES
1523 01:48:50.057311 ME: TXT Support : NO
1524 01:48:50.064217 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1525 01:48:50.070830 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1526 01:48:50.074279 ACPI: Writing ACPI tables at 76b27000.
1527 01:48:50.077563 ACPI: * FACS
1528 01:48:50.078019 ACPI: * DSDT
1529 01:48:50.080849 Ramoops buffer: 0x100000@0x76a26000.
1530 01:48:50.087568 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1531 01:48:50.091029 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1532 01:48:50.094329 Google Chrome EC: version:
1533 01:48:50.097790 ro: magolor_1.1.9999-103b6f9
1534 01:48:50.100871 rw: magolor_1.1.9999-103b6f9
1535 01:48:50.104326 running image: 1
1536 01:48:50.107253 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1537 01:48:50.112189 ACPI: * FADT
1538 01:48:50.112737 SCI is IRQ9
1539 01:48:50.119030 ACPI: added table 1/32, length now 40
1540 01:48:50.119580 ACPI: * SSDT
1541 01:48:50.121705 Found 1 CPU(s) with 2 core(s) each.
1542 01:48:50.125368 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1543 01:48:50.132355 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1544 01:48:50.135301 Could not locate 'wifi_sar' in VPD.
1545 01:48:50.138706 Checking CBFS for default SAR values
1546 01:48:50.145606 wifi_sar_defaults.hex has bad len in CBFS
1547 01:48:50.148578 failed from getting SAR limits!
1548 01:48:50.152340 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1549 01:48:50.158643 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1550 01:48:50.161775 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1551 01:48:50.168642 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1552 01:48:50.171966 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1553 01:48:50.178299 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1554 01:48:50.182015 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1555 01:48:50.188540 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1556 01:48:50.195245 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1557 01:48:50.201510 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1558 01:48:50.205059 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1559 01:48:50.211507 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1560 01:48:50.215016 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1561 01:48:50.221934 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1562 01:48:50.224839 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1563 01:48:50.233252 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1564 01:48:50.236087 PS2K: Passing 101 keymaps to kernel
1565 01:48:50.242441 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1566 01:48:50.249054 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1567 01:48:50.252952 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1568 01:48:50.258993 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1569 01:48:50.265638 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1570 01:48:50.268924 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1571 01:48:50.275586 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1572 01:48:50.282178 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1573 01:48:50.285764 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1574 01:48:50.292387 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1575 01:48:50.295715 ACPI: added table 2/32, length now 44
1576 01:48:50.298728 ACPI: * MCFG
1577 01:48:50.301900 ACPI: added table 3/32, length now 48
1578 01:48:50.302362 ACPI: * TPM2
1579 01:48:50.305211 TPM2 log created at 0x76a16000
1580 01:48:50.308672 ACPI: added table 4/32, length now 52
1581 01:48:50.311961 ACPI: * MADT
1582 01:48:50.312421 SCI is IRQ9
1583 01:48:50.318732 ACPI: added table 5/32, length now 56
1584 01:48:50.319196 current = 76b2d580
1585 01:48:50.322432 ACPI: * DMAR
1586 01:48:50.325514 ACPI: added table 6/32, length now 60
1587 01:48:50.328768 ACPI: added table 7/32, length now 64
1588 01:48:50.329230 ACPI: * HPET
1589 01:48:50.335123 ACPI: added table 8/32, length now 68
1590 01:48:50.335582 ACPI: done.
1591 01:48:50.338424 ACPI tables: 26304 bytes.
1592 01:48:50.341815 smbios_write_tables: 76a15000
1593 01:48:50.345588 EC returned error result code 3
1594 01:48:50.348481 Couldn't obtain OEM name from CBI
1595 01:48:50.352109 Create SMBIOS type 16
1596 01:48:50.352619 Create SMBIOS type 17
1597 01:48:50.355126 GENERIC: 0.0 (WIFI Device)
1598 01:48:50.358708 SMBIOS tables: 913 bytes.
1599 01:48:50.362069 Writing table forward entry at 0x00000500
1600 01:48:50.368401 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1601 01:48:50.372112 Writing coreboot table at 0x76b4b000
1602 01:48:50.378203 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1603 01:48:50.381634 1. 0000000000001000-000000000009ffff: RAM
1604 01:48:50.388513 2. 00000000000a0000-00000000000fffff: RESERVED
1605 01:48:50.392013 3. 0000000000100000-0000000076a14fff: RAM
1606 01:48:50.398147 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1607 01:48:50.401442 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1608 01:48:50.408042 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1609 01:48:50.411963 7. 0000000077000000-000000007fbfffff: RESERVED
1610 01:48:50.418143 8. 00000000c0000000-00000000cfffffff: RESERVED
1611 01:48:50.421435 9. 00000000fb000000-00000000fb000fff: RESERVED
1612 01:48:50.428269 10. 00000000fe000000-00000000fe00ffff: RESERVED
1613 01:48:50.431246 11. 00000000fea80000-00000000fea87fff: RESERVED
1614 01:48:50.437924 12. 00000000fed80000-00000000fed87fff: RESERVED
1615 01:48:50.441202 13. 00000000fed90000-00000000fed92fff: RESERVED
1616 01:48:50.447937 14. 00000000feda0000-00000000feda1fff: RESERVED
1617 01:48:50.451452 15. 0000000100000000-00000001803fffff: RAM
1618 01:48:50.454595 Passing 4 GPIOs to payload:
1619 01:48:50.458455 NAME | PORT | POLARITY | VALUE
1620 01:48:50.464674 lid | undefined | high | high
1621 01:48:50.467656 power | undefined | high | low
1622 01:48:50.474427 oprom | undefined | high | low
1623 01:48:50.481204 EC in RW | 0x000000b9 | high | low
1624 01:48:50.484658 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum 5af
1625 01:48:50.488215 coreboot table: 1504 bytes.
1626 01:48:50.490987 IMD ROOT 0. 0x76fff000 0x00001000
1627 01:48:50.498012 IMD SMALL 1. 0x76ffe000 0x00001000
1628 01:48:50.501235 FSP MEMORY 2. 0x76c4e000 0x003b0000
1629 01:48:50.504758 CONSOLE 3. 0x76c2e000 0x00020000
1630 01:48:50.507655 FMAP 4. 0x76c2d000 0x00000578
1631 01:48:50.511079 TIME STAMP 5. 0x76c2c000 0x00000910
1632 01:48:50.514905 VBOOT WORK 6. 0x76c18000 0x00014000
1633 01:48:50.517902 ROMSTG STCK 7. 0x76c17000 0x00001000
1634 01:48:50.521376 AFTER CAR 8. 0x76c0d000 0x0000a000
1635 01:48:50.524328 RAMSTAGE 9. 0x76ba7000 0x00066000
1636 01:48:50.531339 REFCODE 10. 0x76b67000 0x00040000
1637 01:48:50.535239 SMM BACKUP 11. 0x76b57000 0x00010000
1638 01:48:50.537691 4f444749 12. 0x76b55000 0x00002000
1639 01:48:50.541086 EXT VBT13. 0x76b53000 0x00001c43
1640 01:48:50.544875 COREBOOT 14. 0x76b4b000 0x00008000
1641 01:48:50.548126 ACPI 15. 0x76b27000 0x00024000
1642 01:48:50.551139 ACPI GNVS 16. 0x76b26000 0x00001000
1643 01:48:50.554889 RAMOOPS 17. 0x76a26000 0x00100000
1644 01:48:50.557866 TPM2 TCGLOG18. 0x76a16000 0x00010000
1645 01:48:50.561235 SMBIOS 19. 0x76a15000 0x00000800
1646 01:48:50.564721 IMD small region:
1647 01:48:50.567651 IMD ROOT 0. 0x76ffec00 0x00000400
1648 01:48:50.571380 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1649 01:48:50.577943 VPD 2. 0x76ffeb60 0x0000006c
1650 01:48:50.581240 POWER STATE 3. 0x76ffeb20 0x00000040
1651 01:48:50.584298 ROMSTAGE 4. 0x76ffeb00 0x00000004
1652 01:48:50.587827 MEM INFO 5. 0x76ffe920 0x000001e0
1653 01:48:50.594241 BS: BS_WRITE_TABLES run times (exec / console): 6 / 517 ms
1654 01:48:50.598019 MTRR: Physical address space:
1655 01:48:50.604622 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1656 01:48:50.607647 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1657 01:48:50.614682 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1658 01:48:50.620733 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1659 01:48:50.627257 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1660 01:48:50.633995 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1661 01:48:50.641131 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1662 01:48:50.644038 MTRR: Fixed MSR 0x250 0x0606060606060606
1663 01:48:50.647524 MTRR: Fixed MSR 0x258 0x0606060606060606
1664 01:48:50.654076 MTRR: Fixed MSR 0x259 0x0000000000000000
1665 01:48:50.657733 MTRR: Fixed MSR 0x268 0x0606060606060606
1666 01:48:50.660886 MTRR: Fixed MSR 0x269 0x0606060606060606
1667 01:48:50.664361 MTRR: Fixed MSR 0x26a 0x0606060606060606
1668 01:48:50.667752 MTRR: Fixed MSR 0x26b 0x0606060606060606
1669 01:48:50.674074 MTRR: Fixed MSR 0x26c 0x0606060606060606
1670 01:48:50.677444 MTRR: Fixed MSR 0x26d 0x0606060606060606
1671 01:48:50.680861 MTRR: Fixed MSR 0x26e 0x0606060606060606
1672 01:48:50.683853 MTRR: Fixed MSR 0x26f 0x0606060606060606
1673 01:48:50.687601 call enable_fixed_mtrr()
1674 01:48:50.690634 CPU physical address size: 39 bits
1675 01:48:50.698197 MTRR: default type WB/UC MTRR counts: 6/5.
1676 01:48:50.700682 MTRR: UC selected as default type.
1677 01:48:50.707119 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1678 01:48:50.710446 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1679 01:48:50.717505 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1680 01:48:50.724271 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1681 01:48:50.730313 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1682 01:48:50.730799
1683 01:48:50.733750 MTRR check
1684 01:48:50.734204 Fixed MTRRs : Enabled
1685 01:48:50.737065 Variable MTRRs: Enabled
1686 01:48:50.737522
1687 01:48:50.740754 MTRR: Fixed MSR 0x250 0x0606060606060606
1688 01:48:50.747224 MTRR: Fixed MSR 0x258 0x0606060606060606
1689 01:48:50.750663 MTRR: Fixed MSR 0x259 0x0000000000000000
1690 01:48:50.754204 MTRR: Fixed MSR 0x268 0x0606060606060606
1691 01:48:50.757033 MTRR: Fixed MSR 0x269 0x0606060606060606
1692 01:48:50.763610 MTRR: Fixed MSR 0x26a 0x0606060606060606
1693 01:48:50.767003 MTRR: Fixed MSR 0x26b 0x0606060606060606
1694 01:48:50.770268 MTRR: Fixed MSR 0x26c 0x0606060606060606
1695 01:48:50.773690 MTRR: Fixed MSR 0x26d 0x0606060606060606
1696 01:48:50.777165 MTRR: Fixed MSR 0x26e 0x0606060606060606
1697 01:48:50.783350 MTRR: Fixed MSR 0x26f 0x0606060606060606
1698 01:48:50.786725 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1699 01:48:50.790426 call enable_fixed_mtrr()
1700 01:48:50.795127 Checking cr50 for pending updates
1701 01:48:50.798246 CPU physical address size: 39 bits
1702 01:48:50.801955 Reading cr50 TPM mode
1703 01:48:50.811506 BS: BS_PAYLOAD_LOAD entry times (exec / console): 12 / 6 ms
1704 01:48:50.819149 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1705 01:48:50.822459 Checking segment from ROM address 0xfff9d5b8
1706 01:48:50.829215 Checking segment from ROM address 0xfff9d5d4
1707 01:48:50.832751 Loading segment from ROM address 0xfff9d5b8
1708 01:48:50.835579 code (compression=0)
1709 01:48:50.842323 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1710 01:48:50.851850 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1711 01:48:50.855266 it's not compressed!
1712 01:48:50.980060 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1713 01:48:50.986642 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1714 01:48:50.994251 Loading segment from ROM address 0xfff9d5d4
1715 01:48:50.997889 Entry Point 0x30000000
1716 01:48:50.998434 Loaded segments
1717 01:48:51.004251 BS: BS_PAYLOAD_LOAD run times (exec / console): 125 / 60 ms
1718 01:48:51.020631 Finalizing chipset.
1719 01:48:51.023559 Finalizing SMM.
1720 01:48:51.024106 APMC done.
1721 01:48:51.030434 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1722 01:48:51.033777 mp_park_aps done after 0 msecs.
1723 01:48:51.036965 Jumping to boot code at 0x30000000(0x76b4b000)
1724 01:48:51.047368 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1725 01:48:51.047989
1726 01:48:51.048362
1727 01:48:51.048699
1728 01:48:51.050602 Starting depthcharge on Magolor...
1729 01:48:51.051134
1730 01:48:51.052223 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1731 01:48:51.052760 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1732 01:48:51.053185 Setting prompt string to ['dedede:']
1733 01:48:51.053633 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1734 01:48:51.060273 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1735 01:48:51.061059
1736 01:48:51.066976 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1737 01:48:51.067523
1738 01:48:51.070111 fw_config match found: AUDIO_AMP=UNPROVISIONED
1739 01:48:51.070641
1740 01:48:51.073599 Wipe memory regions:
1741 01:48:51.074152
1742 01:48:51.077011 [0x00000000001000, 0x000000000a0000)
1743 01:48:51.077562
1744 01:48:51.080457 [0x00000000100000, 0x00000030000000)
1745 01:48:51.208337
1746 01:48:51.211594 [0x00000031062170, 0x00000076a15000)
1747 01:48:51.380722
1748 01:48:51.384058 [0x00000100000000, 0x00000180400000)
1749 01:48:52.446973
1750 01:48:52.447549 R8152: Initializing
1751 01:48:52.447921
1752 01:48:52.449972 Version 6 (ocp_data = 5c30)
1753 01:48:52.453412
1754 01:48:52.453970 R8152: Done initializing
1755 01:48:52.454343
1756 01:48:52.456579 Adding net device
1757 01:48:52.457055
1758 01:48:52.460264 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1759 01:48:52.463181
1760 01:48:52.463646
1761 01:48:52.464013
1762 01:48:52.464824 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1764 01:48:52.566110 dedede: tftpboot 192.168.201.1 11733037/tftp-deploy-lr7dh_4l/kernel/bzImage 11733037/tftp-deploy-lr7dh_4l/kernel/cmdline 11733037/tftp-deploy-lr7dh_4l/ramdisk/ramdisk.cpio.gz
1765 01:48:52.566868 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1766 01:48:52.567361 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1767 01:48:52.572291 tftpboot 192.168.201.1 11733037/tftp-deploy-lr7dh_4l/kernel/bzIploy-lr7dh_4l/kernel/cmdline 11733037/tftp-deploy-lr7dh_4l/ramdisk/ramdisk.cpio.gz
1768 01:48:52.573037
1769 01:48:52.573421 Waiting for link
1770 01:48:52.774360
1771 01:48:52.774984 done.
1772 01:48:52.775361
1773 01:48:52.775705 MAC: 00:24:32:30:7a:67
1774 01:48:52.776039
1775 01:48:52.776816 Sending DHCP discover... done.
1776 01:48:52.777336
1777 01:48:52.780662 Waiting for reply... done.
1778 01:48:52.781168
1779 01:48:52.784213 Sending DHCP request... done.
1780 01:48:52.784671
1781 01:48:52.790364 Waiting for reply... done.
1782 01:48:52.790882
1783 01:48:52.791249 My ip is 192.168.201.15
1784 01:48:52.791769
1785 01:48:52.793933 The DHCP server ip is 192.168.201.1
1786 01:48:52.794395
1787 01:48:52.800487 TFTP server IP predefined by user: 192.168.201.1
1788 01:48:52.800971
1789 01:48:52.806940 Bootfile predefined by user: 11733037/tftp-deploy-lr7dh_4l/kernel/bzImage
1790 01:48:52.807470
1791 01:48:52.810440 Sending tftp read request... done.
1792 01:48:52.810938
1793 01:48:52.819466 Waiting for the transfer...
1794 01:48:52.819923
1795 01:48:53.457597 00000000 ################################################################
1796 01:48:53.457732
1797 01:48:54.052379 00080000 ################################################################
1798 01:48:54.052517
1799 01:48:54.639959 00100000 ################################################################
1800 01:48:54.640095
1801 01:48:55.228810 00180000 ################################################################
1802 01:48:55.228945
1803 01:48:55.824721 00200000 ################################################################
1804 01:48:55.824858
1805 01:48:56.411605 00280000 ################################################################
1806 01:48:56.411754
1807 01:48:57.021133 00300000 ################################################################
1808 01:48:57.021280
1809 01:48:57.623159 00380000 ################################################################
1810 01:48:57.623306
1811 01:48:58.216951 00400000 ################################################################
1812 01:48:58.217082
1813 01:48:58.788622 00480000 ################################################################
1814 01:48:58.788768
1815 01:48:59.349413 00500000 ################################################################
1816 01:48:59.349560
1817 01:48:59.897492 00580000 ################################################################
1818 01:48:59.897637
1819 01:49:00.456819 00600000 ################################################################
1820 01:49:00.456961
1821 01:49:01.015526 00680000 ################################################################
1822 01:49:01.015669
1823 01:49:01.570873 00700000 ################################################################
1824 01:49:01.571020
1825 01:49:02.126217 00780000 ################################################################
1826 01:49:02.126370
1827 01:49:02.680988 00800000 ################################################################
1828 01:49:02.681137
1829 01:49:03.228392 00880000 ################################################################
1830 01:49:03.228539
1831 01:49:03.822799 00900000 ################################################################
1832 01:49:03.822944
1833 01:49:04.418192 00980000 ################################################################
1834 01:49:04.418371
1835 01:49:05.033049 00a00000 ################################################################
1836 01:49:05.033197
1837 01:49:05.564846 00a80000 ######################################################### done.
1838 01:49:05.564990
1839 01:49:05.568264 The bootfile was 11473408 bytes long.
1840 01:49:05.568347
1841 01:49:05.571397 Sending tftp read request... done.
1842 01:49:05.571478
1843 01:49:05.574300 Waiting for the transfer...
1844 01:49:05.574382
1845 01:49:06.173444 00000000 ################################################################
1846 01:49:06.173594
1847 01:49:06.732338 00080000 ################################################################
1848 01:49:06.732480
1849 01:49:07.287440 00100000 ################################################################
1850 01:49:07.287585
1851 01:49:07.854974 00180000 ################################################################
1852 01:49:07.855117
1853 01:49:08.435669 00200000 ################################################################
1854 01:49:08.435804
1855 01:49:09.007260 00280000 ################################################################
1856 01:49:09.007408
1857 01:49:09.600801 00300000 ################################################################
1858 01:49:09.600934
1859 01:49:10.200377 00380000 ################################################################
1860 01:49:10.200512
1861 01:49:10.780386 00400000 ################################################################
1862 01:49:10.780530
1863 01:49:11.346500 00480000 ################################################################
1864 01:49:11.346670
1865 01:49:11.907805 00500000 ################################################################
1866 01:49:11.907939
1867 01:49:12.509194 00580000 ################################################################
1868 01:49:12.509680
1869 01:49:13.097045 00600000 ################################################################
1870 01:49:13.097180
1871 01:49:13.652757 00680000 ################################################################
1872 01:49:13.652892
1873 01:49:14.229701 00700000 ################################################################
1874 01:49:14.229835
1875 01:49:14.785989 00780000 ################################################################
1876 01:49:14.786125
1877 01:49:15.378210 00800000 ################################################################
1878 01:49:15.378343
1879 01:49:15.700859 00880000 ##################################### done.
1880 01:49:15.700994
1881 01:49:15.704116 Sending tftp read request... done.
1882 01:49:15.704199
1883 01:49:15.707487 Waiting for the transfer...
1884 01:49:15.707569
1885 01:49:15.707633 00000000 # done.
1886 01:49:15.707694
1887 01:49:15.717605 Command line loaded dynamically from TFTP file: 11733037/tftp-deploy-lr7dh_4l/kernel/cmdline
1888 01:49:15.717723
1889 01:49:15.730724 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1890 01:49:15.734212
1891 01:49:15.737557 ec_init: CrosEC protocol v3 supported (256, 256)
1892 01:49:15.744662
1893 01:49:15.748640 Shutting down all USB controllers.
1894 01:49:15.748721
1895 01:49:15.748798 Removing current net device
1896 01:49:15.748862
1897 01:49:15.751710 Finalizing coreboot
1898 01:49:15.751796
1899 01:49:15.758144 Exiting depthcharge with code 4 at timestamp: 31578161
1900 01:49:15.758237
1901 01:49:15.758311
1902 01:49:15.758379 Starting kernel ...
1903 01:49:15.758445
1904 01:49:15.758509
1905 01:49:15.758946 end: 2.2.4 bootloader-commands (duration 00:00:25) [common]
1906 01:49:15.759059 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
1907 01:49:15.759152 Setting prompt string to ['Linux version [0-9]']
1908 01:49:15.759234 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1909 01:49:15.759317 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1911 01:53:37.760045 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
1913 01:53:37.761136 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
1915 01:53:37.761958 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1918 01:53:37.763446 end: 2 depthcharge-action (duration 00:05:00) [common]
1920 01:53:37.764619 Cleaning after the job
1921 01:53:37.764839 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11733037/tftp-deploy-lr7dh_4l/ramdisk
1922 01:53:37.766181 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11733037/tftp-deploy-lr7dh_4l/kernel
1923 01:53:37.767914 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11733037/tftp-deploy-lr7dh_4l/modules
1924 01:53:37.768509 start: 5.1 power-off (timeout 00:00:30) [common]
1925 01:53:37.768667 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-1' '--port=1' '--command=off'
1926 01:53:37.845711 >> Command sent successfully.
1927 01:53:37.848604 Returned 0 in 0 seconds
1928 01:53:37.949465 end: 5.1 power-off (duration 00:00:00) [common]
1930 01:53:37.951084 start: 5.2 read-feedback (timeout 00:10:00) [common]
1931 01:53:37.952381 Listened to connection for namespace 'common' for up to 1s
1932 01:53:38.953030 Finalising connection for namespace 'common'
1933 01:53:38.953695 Disconnecting from shell: Finalise
1934 01:53:38.954114
1935 01:53:39.055114 end: 5.2 read-feedback (duration 00:00:01) [common]
1936 01:53:39.055764 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11733037
1937 01:53:39.111734 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11733037
1938 01:53:39.111965 JobError: Your job cannot terminate cleanly.