Boot log: acer-cbv514-1h-34uz-brya
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 01:48:49.561461 lava-dispatcher, installed at version: 2023.08
2 01:48:49.561630 start: 0 validate
3 01:48:49.561740 Start time: 2023-10-11 01:48:49.561733+00:00 (UTC)
4 01:48:49.561857 Using caching service: 'http://localhost/cache/?uri=%s'
5 01:48:49.561973 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 01:48:49.816867 Using caching service: 'http://localhost/cache/?uri=%s'
7 01:48:49.817537 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.295-cip103-95-ge42cfc8bb88b7%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 01:48:50.071904 Using caching service: 'http://localhost/cache/?uri=%s'
9 01:48:50.072569 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.295-cip103-95-ge42cfc8bb88b7%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 01:48:53.418834 validate duration: 3.86
12 01:48:53.419372 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 01:48:53.419466 start: 1.1 download-retry (timeout 00:10:00) [common]
14 01:48:53.419539 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 01:48:53.419646 Not decompressing ramdisk as can be used compressed.
16 01:48:53.419728 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 01:48:53.419787 saving as /var/lib/lava/dispatcher/tmp/11733094/tftp-deploy-agl5mrco/ramdisk/rootfs.cpio.gz
18 01:48:53.419844 total size: 8418130 (8 MB)
19 01:48:54.045592 progress 0 % (0 MB)
20 01:48:54.050432 progress 5 % (0 MB)
21 01:48:54.051976 progress 10 % (0 MB)
22 01:48:54.053614 progress 15 % (1 MB)
23 01:48:54.055145 progress 20 % (1 MB)
24 01:48:54.056742 progress 25 % (2 MB)
25 01:48:54.059069 progress 30 % (2 MB)
26 01:48:54.060884 progress 35 % (2 MB)
27 01:48:54.062598 progress 40 % (3 MB)
28 01:48:54.064153 progress 45 % (3 MB)
29 01:48:54.065688 progress 50 % (4 MB)
30 01:48:54.067209 progress 55 % (4 MB)
31 01:48:54.068723 progress 60 % (4 MB)
32 01:48:54.070114 progress 65 % (5 MB)
33 01:48:54.071612 progress 70 % (5 MB)
34 01:48:54.073211 progress 75 % (6 MB)
35 01:48:54.074721 progress 80 % (6 MB)
36 01:48:54.076221 progress 85 % (6 MB)
37 01:48:54.077719 progress 90 % (7 MB)
38 01:48:54.079217 progress 95 % (7 MB)
39 01:48:54.080614 progress 100 % (8 MB)
40 01:48:54.080783 8 MB downloaded in 0.66 s (12.15 MB/s)
41 01:48:54.080917 end: 1.1.1 http-download (duration 00:00:01) [common]
43 01:48:54.081110 end: 1.1 download-retry (duration 00:00:01) [common]
44 01:48:54.081178 start: 1.2 download-retry (timeout 00:09:59) [common]
45 01:48:54.081244 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 01:48:54.081360 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.295-cip103-95-ge42cfc8bb88b7/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 01:48:54.081426 saving as /var/lib/lava/dispatcher/tmp/11733094/tftp-deploy-agl5mrco/kernel/bzImage
48 01:48:54.081479 total size: 11473408 (10 MB)
49 01:48:54.081540 No compression specified
50 01:48:54.082470 progress 0 % (0 MB)
51 01:48:54.084650 progress 5 % (0 MB)
52 01:48:54.086811 progress 10 % (1 MB)
53 01:48:54.088807 progress 15 % (1 MB)
54 01:48:54.090963 progress 20 % (2 MB)
55 01:48:54.092952 progress 25 % (2 MB)
56 01:48:54.095144 progress 30 % (3 MB)
57 01:48:54.097136 progress 35 % (3 MB)
58 01:48:54.099298 progress 40 % (4 MB)
59 01:48:54.101296 progress 45 % (4 MB)
60 01:48:54.103436 progress 50 % (5 MB)
61 01:48:54.105451 progress 55 % (6 MB)
62 01:48:54.107573 progress 60 % (6 MB)
63 01:48:54.109601 progress 65 % (7 MB)
64 01:48:54.111695 progress 70 % (7 MB)
65 01:48:54.113681 progress 75 % (8 MB)
66 01:48:54.115728 progress 80 % (8 MB)
67 01:48:54.117712 progress 85 % (9 MB)
68 01:48:54.119768 progress 90 % (9 MB)
69 01:48:54.121735 progress 95 % (10 MB)
70 01:48:54.123852 progress 100 % (10 MB)
71 01:48:54.123943 10 MB downloaded in 0.04 s (257.70 MB/s)
72 01:48:54.124065 end: 1.2.1 http-download (duration 00:00:00) [common]
74 01:48:54.124249 end: 1.2 download-retry (duration 00:00:00) [common]
75 01:48:54.124314 start: 1.3 download-retry (timeout 00:09:59) [common]
76 01:48:54.124382 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 01:48:54.124496 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.295-cip103-95-ge42cfc8bb88b7/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 01:48:54.124556 saving as /var/lib/lava/dispatcher/tmp/11733094/tftp-deploy-agl5mrco/modules/modules.tar
79 01:48:54.124607 total size: 484192 (0 MB)
80 01:48:54.124674 Using unxz to decompress xz
81 01:48:54.128233 progress 6 % (0 MB)
82 01:48:54.128535 progress 13 % (0 MB)
83 01:48:54.128722 progress 20 % (0 MB)
84 01:48:54.130501 progress 27 % (0 MB)
85 01:48:54.132290 progress 33 % (0 MB)
86 01:48:54.133980 progress 40 % (0 MB)
87 01:48:54.135619 progress 47 % (0 MB)
88 01:48:54.137218 progress 54 % (0 MB)
89 01:48:54.138984 progress 60 % (0 MB)
90 01:48:54.140775 progress 67 % (0 MB)
91 01:48:54.142506 progress 74 % (0 MB)
92 01:48:54.144239 progress 81 % (0 MB)
93 01:48:54.145917 progress 87 % (0 MB)
94 01:48:54.147648 progress 94 % (0 MB)
95 01:48:54.149684 progress 100 % (0 MB)
96 01:48:54.155181 0 MB downloaded in 0.03 s (15.11 MB/s)
97 01:48:54.155389 end: 1.3.1 http-download (duration 00:00:00) [common]
99 01:48:54.155627 end: 1.3 download-retry (duration 00:00:00) [common]
100 01:48:54.155715 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
101 01:48:54.155794 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
102 01:48:54.155863 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 01:48:54.155934 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
104 01:48:54.156138 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11733094/lava-overlay-hiqr9jzk
105 01:48:54.156260 makedir: /var/lib/lava/dispatcher/tmp/11733094/lava-overlay-hiqr9jzk/lava-11733094/bin
106 01:48:54.156358 makedir: /var/lib/lava/dispatcher/tmp/11733094/lava-overlay-hiqr9jzk/lava-11733094/tests
107 01:48:54.156443 makedir: /var/lib/lava/dispatcher/tmp/11733094/lava-overlay-hiqr9jzk/lava-11733094/results
108 01:48:54.156534 Creating /var/lib/lava/dispatcher/tmp/11733094/lava-overlay-hiqr9jzk/lava-11733094/bin/lava-add-keys
109 01:48:54.156651 Creating /var/lib/lava/dispatcher/tmp/11733094/lava-overlay-hiqr9jzk/lava-11733094/bin/lava-add-sources
110 01:48:54.156752 Creating /var/lib/lava/dispatcher/tmp/11733094/lava-overlay-hiqr9jzk/lava-11733094/bin/lava-background-process-start
111 01:48:54.156848 Creating /var/lib/lava/dispatcher/tmp/11733094/lava-overlay-hiqr9jzk/lava-11733094/bin/lava-background-process-stop
112 01:48:54.156943 Creating /var/lib/lava/dispatcher/tmp/11733094/lava-overlay-hiqr9jzk/lava-11733094/bin/lava-common-functions
113 01:48:54.157038 Creating /var/lib/lava/dispatcher/tmp/11733094/lava-overlay-hiqr9jzk/lava-11733094/bin/lava-echo-ipv4
114 01:48:54.157135 Creating /var/lib/lava/dispatcher/tmp/11733094/lava-overlay-hiqr9jzk/lava-11733094/bin/lava-install-packages
115 01:48:54.157228 Creating /var/lib/lava/dispatcher/tmp/11733094/lava-overlay-hiqr9jzk/lava-11733094/bin/lava-installed-packages
116 01:48:54.157322 Creating /var/lib/lava/dispatcher/tmp/11733094/lava-overlay-hiqr9jzk/lava-11733094/bin/lava-os-build
117 01:48:54.157452 Creating /var/lib/lava/dispatcher/tmp/11733094/lava-overlay-hiqr9jzk/lava-11733094/bin/lava-probe-channel
118 01:48:54.157560 Creating /var/lib/lava/dispatcher/tmp/11733094/lava-overlay-hiqr9jzk/lava-11733094/bin/lava-probe-ip
119 01:48:54.157651 Creating /var/lib/lava/dispatcher/tmp/11733094/lava-overlay-hiqr9jzk/lava-11733094/bin/lava-target-ip
120 01:48:54.157742 Creating /var/lib/lava/dispatcher/tmp/11733094/lava-overlay-hiqr9jzk/lava-11733094/bin/lava-target-mac
121 01:48:54.157836 Creating /var/lib/lava/dispatcher/tmp/11733094/lava-overlay-hiqr9jzk/lava-11733094/bin/lava-target-storage
122 01:48:54.157933 Creating /var/lib/lava/dispatcher/tmp/11733094/lava-overlay-hiqr9jzk/lava-11733094/bin/lava-test-case
123 01:48:54.158024 Creating /var/lib/lava/dispatcher/tmp/11733094/lava-overlay-hiqr9jzk/lava-11733094/bin/lava-test-event
124 01:48:54.158115 Creating /var/lib/lava/dispatcher/tmp/11733094/lava-overlay-hiqr9jzk/lava-11733094/bin/lava-test-feedback
125 01:48:54.158207 Creating /var/lib/lava/dispatcher/tmp/11733094/lava-overlay-hiqr9jzk/lava-11733094/bin/lava-test-raise
126 01:48:54.158298 Creating /var/lib/lava/dispatcher/tmp/11733094/lava-overlay-hiqr9jzk/lava-11733094/bin/lava-test-reference
127 01:48:54.158392 Creating /var/lib/lava/dispatcher/tmp/11733094/lava-overlay-hiqr9jzk/lava-11733094/bin/lava-test-runner
128 01:48:54.158485 Creating /var/lib/lava/dispatcher/tmp/11733094/lava-overlay-hiqr9jzk/lava-11733094/bin/lava-test-set
129 01:48:54.158579 Creating /var/lib/lava/dispatcher/tmp/11733094/lava-overlay-hiqr9jzk/lava-11733094/bin/lava-test-shell
130 01:48:54.158673 Updating /var/lib/lava/dispatcher/tmp/11733094/lava-overlay-hiqr9jzk/lava-11733094/bin/lava-install-packages (oe)
131 01:48:54.158793 Updating /var/lib/lava/dispatcher/tmp/11733094/lava-overlay-hiqr9jzk/lava-11733094/bin/lava-installed-packages (oe)
132 01:48:54.158884 Creating /var/lib/lava/dispatcher/tmp/11733094/lava-overlay-hiqr9jzk/lava-11733094/environment
133 01:48:54.158962 LAVA metadata
134 01:48:54.159021 - LAVA_JOB_ID=11733094
135 01:48:54.159072 - LAVA_DISPATCHER_IP=192.168.201.1
136 01:48:54.159153 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
137 01:48:54.159209 skipped lava-vland-overlay
138 01:48:54.159269 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 01:48:54.159332 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
140 01:48:54.159382 skipped lava-multinode-overlay
141 01:48:54.159440 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 01:48:54.159502 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
143 01:48:54.159560 Loading test definitions
144 01:48:54.159631 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
145 01:48:54.159692 Using /lava-11733094 at stage 0
146 01:48:54.159926 uuid=11733094_1.4.2.3.1 testdef=None
147 01:48:54.159997 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 01:48:54.160064 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
149 01:48:54.160484 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 01:48:54.160658 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
152 01:48:54.161149 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 01:48:54.161325 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
155 01:48:54.161822 runner path: /var/lib/lava/dispatcher/tmp/11733094/lava-overlay-hiqr9jzk/lava-11733094/0/tests/0_dmesg test_uuid 11733094_1.4.2.3.1
156 01:48:54.161943 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 01:48:54.162124 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
159 01:48:54.162179 Using /lava-11733094 at stage 1
160 01:48:54.162399 uuid=11733094_1.4.2.3.5 testdef=None
161 01:48:54.162466 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 01:48:54.162527 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
163 01:48:54.162883 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 01:48:54.163047 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
166 01:48:54.163539 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 01:48:54.163727 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
169 01:48:54.164204 runner path: /var/lib/lava/dispatcher/tmp/11733094/lava-overlay-hiqr9jzk/lava-11733094/1/tests/1_bootrr test_uuid 11733094_1.4.2.3.5
170 01:48:54.164324 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 01:48:54.164485 Creating lava-test-runner.conf files
173 01:48:54.164533 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11733094/lava-overlay-hiqr9jzk/lava-11733094/0 for stage 0
174 01:48:54.164598 - 0_dmesg
175 01:48:54.164661 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11733094/lava-overlay-hiqr9jzk/lava-11733094/1 for stage 1
176 01:48:54.164730 - 1_bootrr
177 01:48:54.164803 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 01:48:54.164869 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
179 01:48:54.171450 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 01:48:54.171545 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
181 01:48:54.171614 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 01:48:54.171679 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 01:48:54.171745 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
184 01:48:54.338850 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 01:48:54.339163 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
186 01:48:54.339283 extracting modules file /var/lib/lava/dispatcher/tmp/11733094/tftp-deploy-agl5mrco/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11733094/extract-overlay-ramdisk-uux1oets/ramdisk
187 01:48:54.352940 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 01:48:54.353066 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
189 01:48:54.353144 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11733094/compress-overlay-kr5yuv8g/overlay-1.4.2.4.tar.gz to ramdisk
190 01:48:54.353203 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11733094/compress-overlay-kr5yuv8g/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11733094/extract-overlay-ramdisk-uux1oets/ramdisk
191 01:48:54.359154 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 01:48:54.359246 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
193 01:48:54.359317 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 01:48:54.359387 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
195 01:48:54.359448 Building ramdisk /var/lib/lava/dispatcher/tmp/11733094/extract-overlay-ramdisk-uux1oets/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11733094/extract-overlay-ramdisk-uux1oets/ramdisk
196 01:48:54.424180 >> 53982 blocks
197 01:48:55.198617 rename /var/lib/lava/dispatcher/tmp/11733094/extract-overlay-ramdisk-uux1oets/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11733094/tftp-deploy-agl5mrco/ramdisk/ramdisk.cpio.gz
198 01:48:55.198940 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 01:48:55.199045 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 01:48:55.199121 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 01:48:55.199194 No mkimage arch provided, not using FIT.
202 01:48:55.199263 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 01:48:55.199326 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 01:48:55.199400 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 01:48:55.199483 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 01:48:55.199548 No LXC device requested
207 01:48:55.199611 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 01:48:55.199681 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 01:48:55.199759 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 01:48:55.199824 Checking files for TFTP limit of 4294967296 bytes.
211 01:48:55.200133 end: 1 tftp-deploy (duration 00:00:02) [common]
212 01:48:55.200213 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 01:48:55.200282 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 01:48:55.200378 substitutions:
215 01:48:55.200444 - {DTB}: None
216 01:48:55.200491 - {INITRD}: 11733094/tftp-deploy-agl5mrco/ramdisk/ramdisk.cpio.gz
217 01:48:55.200536 - {KERNEL}: 11733094/tftp-deploy-agl5mrco/kernel/bzImage
218 01:48:55.200579 - {LAVA_MAC}: None
219 01:48:55.200622 - {PRESEED_CONFIG}: None
220 01:48:55.200666 - {PRESEED_LOCAL}: None
221 01:48:55.200708 - {RAMDISK}: 11733094/tftp-deploy-agl5mrco/ramdisk/ramdisk.cpio.gz
222 01:48:55.200752 - {ROOT_PART}: None
223 01:48:55.200796 - {ROOT}: None
224 01:48:55.200839 - {SERVER_IP}: 192.168.201.1
225 01:48:55.200881 - {TEE}: None
226 01:48:55.200924 Parsed boot commands:
227 01:48:55.200967 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 01:48:55.201109 Parsed boot commands: tftpboot 192.168.201.1 11733094/tftp-deploy-agl5mrco/kernel/bzImage 11733094/tftp-deploy-agl5mrco/kernel/cmdline 11733094/tftp-deploy-agl5mrco/ramdisk/ramdisk.cpio.gz
229 01:48:55.201182 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 01:48:55.201250 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 01:48:55.201323 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 01:48:55.201398 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 01:48:55.201469 Not connected, no need to disconnect.
234 01:48:55.201529 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 01:48:55.201591 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 01:48:55.201643 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-1'
237 01:48:55.204575 Setting prompt string to ['lava-test: # ']
238 01:48:55.204837 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 01:48:55.204928 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 01:48:55.205010 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 01:48:55.205088 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 01:48:55.205245 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-1' '--port=1' '--command=reboot'
243 01:49:00.350851 >> Command sent successfully.
244 01:49:00.357127 Returned 0 in 5 seconds
245 01:49:00.457814 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 01:49:00.458993 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 01:49:00.459382 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 01:49:00.459705 Setting prompt string to 'Starting depthcharge on Volmar...'
250 01:49:00.459957 Changing prompt to 'Starting depthcharge on Volmar...'
251 01:49:00.460174 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
252 01:49:00.460378 [Enter `^Ec?' for help]
253 01:49:01.827922
254 01:49:01.828449
255 01:49:01.835140 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
256 01:49:01.839421 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
257 01:49:01.842785 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
258 01:49:01.849869 CPU: AES supported, TXT NOT supported, VT supported
259 01:49:01.857489 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
260 01:49:01.858125 Cache size = 10 MiB
261 01:49:01.865159 MCH: device id 4609 (rev 04) is Alderlake-P
262 01:49:01.868821 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
263 01:49:01.871951 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
264 01:49:01.875694 VBOOT: Loading verstage.
265 01:49:01.879849 FMAP: Found "FLASH" version 1.1 at 0x1804000.
266 01:49:01.886825 FMAP: base = 0x0 size = 0x2000000 #areas = 37
267 01:49:01.889709 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
268 01:49:01.900106 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
269 01:49:01.906713 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
270 01:49:01.907247
271 01:49:01.907536
272 01:49:01.916211 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
273 01:49:01.924097 Probing TPM I2C: I2C bus 1 version 0x3230302a
274 01:49:01.927198 DW I2C bus 1 at 0xfe022000 (400 KHz)
275 01:49:01.927592 done! DID_VID 0x00281ae0
276 01:49:01.931844 TPM ready after 0 ms
277 01:49:01.935079 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
278 01:49:01.948006 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
279 01:49:01.955042 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
280 01:49:02.007485 tlcl_send_startup: Startup return code is 0
281 01:49:02.007991 TPM: setup succeeded
282 01:49:02.028298 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
283 01:49:02.050596 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
284 01:49:02.054192 Chrome EC: UHEPI supported
285 01:49:02.057362 Reading cr50 boot mode
286 01:49:02.072506 Cr50 says boot_mode is VERIFIED_RW(0x00).
287 01:49:02.073012 Phase 1
288 01:49:02.079313 FMAP: area GBB found @ 1805000 (458752 bytes)
289 01:49:02.085781 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
290 01:49:02.093810 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
291 01:49:02.100786 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
292 01:49:02.101283 Phase 2
293 01:49:02.101637 Phase 3
294 01:49:02.107595 FMAP: area GBB found @ 1805000 (458752 bytes)
295 01:49:02.111397 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
296 01:49:02.117680 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
297 01:49:02.121149 VB2:vb2_verify_keyblock() Checking keyblock signature...
298 01:49:02.131426 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
299 01:49:02.137687 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
300 01:49:02.144200 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
301 01:49:02.158126 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
302 01:49:02.161755 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
303 01:49:02.169533 VB2:vb2_verify_fw_preamble() Verifying preamble.
304 01:49:02.172567 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
305 01:49:02.179683 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
306 01:49:02.186159 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
307 01:49:02.191610 Phase 4
308 01:49:02.195025 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
309 01:49:02.201565 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
310 01:49:02.414346 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
311 01:49:02.420614 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
312 01:49:02.423901 Saving vboot hash.
313 01:49:02.430750 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
314 01:49:02.446228 tlcl_extend: response is 0
315 01:49:02.453223 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
316 01:49:02.459748 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
317 01:49:02.474390 tlcl_extend: response is 0
318 01:49:02.480853 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
319 01:49:02.501263 tlcl_lock_nv_write: response is 0
320 01:49:02.521446 tlcl_lock_nv_write: response is 0
321 01:49:02.521938 Slot A is selected
322 01:49:02.527730 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
323 01:49:02.534506 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
324 01:49:02.541610 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
325 01:49:02.547636 BS: verstage times (exec / console): total (unknown) / 257 ms
326 01:49:02.548117
327 01:49:02.548387
328 01:49:02.554524 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
329 01:49:02.558765 Google Chrome EC: version:
330 01:49:02.562088 ro: volmar_v2.0.14126-e605144e9c
331 01:49:02.565516 rw: volmar_v0.0.55-22d1557
332 01:49:02.568610 running image: 2
333 01:49:02.572137 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
334 01:49:02.581941 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
335 01:49:02.588272 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
336 01:49:02.595316 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
337 01:49:02.605333 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
338 01:49:02.615244 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
339 01:49:02.618345 EC took 1056us to calculate image hash
340 01:49:02.628046 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
341 01:49:02.634885 VB2:sync_ec() select_rw=RW(active)
342 01:49:02.644835 Waited 275us to clear limit power flag.
343 01:49:02.648473 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
344 01:49:02.651709 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
345 01:49:02.654975 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
346 01:49:02.661743 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
347 01:49:02.665088 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
348 01:49:02.667954 TCO_STS: 0000 0000
349 01:49:02.671609 GEN_PMCON: d0015038 00002200
350 01:49:02.674729 GBLRST_CAUSE: 00000000 00000000
351 01:49:02.675131 HPR_CAUSE0: 00000000
352 01:49:02.677988 prev_sleep_state 5
353 01:49:02.681417 Abort disabling TXT, as CPU is not TXT capable.
354 01:49:02.689584 cse_lite: Number of partitions = 3
355 01:49:02.692787 cse_lite: Current partition = RO
356 01:49:02.693274 cse_lite: Next partition = RO
357 01:49:02.696084 cse_lite: Flags = 0x7
358 01:49:02.703526 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
359 01:49:02.712649 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
360 01:49:02.715971 FMAP: area SI_ME found @ 1000 (5238784 bytes)
361 01:49:02.722337 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
362 01:49:02.729322 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
363 01:49:02.735868 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
364 01:49:02.739184 cse_lite: CSE CBFS RW version : 16.1.25.2049
365 01:49:02.745761 cse_lite: Set Boot Partition Info Command (RW)
366 01:49:02.749337 HECI: Global Reset(Type:1) Command
367 01:49:04.191476 ��n�= 1 Line Size = 64 Sets = 16384
368 01:49:04.192099 Cache size = 10 MiB
369 01:49:04.194902 MCH: device id 4609 (rev 04) is Alderlake-P
370 01:49:04.202048 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
371 01:49:04.204973 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
372 01:49:04.209130 VBOOT: Loading verstage.
373 01:49:04.212344 FMAP: Found "FLASH" version 1.1 at 0x1804000.
374 01:49:04.219370 FMAP: base = 0x0 size = 0x2000000 #areas = 37
375 01:49:04.222770 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
376 01:49:04.230140 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
377 01:49:04.240737 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
378 01:49:04.241468
379 01:49:04.241877
380 01:49:04.249796 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
381 01:49:04.253022 Probing TPM I2C: I2C bus 1 version 0x3230302a
382 01:49:04.259869 DW I2C bus 1 at 0xfe022000 (400 KHz)
383 01:49:04.260218 done! DID_VID 0x00281ae0
384 01:49:04.263361 TPM ready after 0 ms
385 01:49:04.267458 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
386 01:49:04.278229 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
387 01:49:04.285087 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
388 01:49:04.340051 tlcl_send_startup: Startup return code is 0
389 01:49:04.340554 TPM: setup succeeded
390 01:49:04.360683 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
391 01:49:04.382924 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
392 01:49:04.387002 Chrome EC: UHEPI supported
393 01:49:04.389938 Reading cr50 boot mode
394 01:49:04.405084 Cr50 says boot_mode is VERIFIED_RW(0x00).
395 01:49:04.405650 Phase 1
396 01:49:04.411802 FMAP: area GBB found @ 1805000 (458752 bytes)
397 01:49:04.418236 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
398 01:49:04.424932 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
399 01:49:04.431756 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
400 01:49:04.435317 Phase 2
401 01:49:04.435814 Phase 3
402 01:49:04.438108 FMAP: area GBB found @ 1805000 (458752 bytes)
403 01:49:04.445053 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
404 01:49:04.448148 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
405 01:49:04.454819 VB2:vb2_verify_keyblock() Checking keyblock signature...
406 01:49:04.461711 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
407 01:49:04.468170 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
408 01:49:04.478075 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
409 01:49:04.490004 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
410 01:49:04.493092 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
411 01:49:04.499976 VB2:vb2_verify_fw_preamble() Verifying preamble.
412 01:49:04.507071 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
413 01:49:04.513263 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
414 01:49:04.519937 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
415 01:49:04.524376 Phase 4
416 01:49:04.527390 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
417 01:49:04.533894 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
418 01:49:04.746217 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
419 01:49:04.752671 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
420 01:49:04.756269 Saving vboot hash.
421 01:49:04.762907 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
422 01:49:04.779404 tlcl_extend: response is 0
423 01:49:04.785949 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
424 01:49:04.792095 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
425 01:49:04.807308 tlcl_extend: response is 0
426 01:49:04.813827 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
427 01:49:04.833238 tlcl_lock_nv_write: response is 0
428 01:49:04.852769 tlcl_lock_nv_write: response is 0
429 01:49:04.853246 Slot A is selected
430 01:49:04.859406 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
431 01:49:04.866080 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
432 01:49:04.872346 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
433 01:49:04.879290 BS: verstage times (exec / console): total (unknown) / 256 ms
434 01:49:04.879795
435 01:49:04.880163
436 01:49:04.885980 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
437 01:49:04.890249 Google Chrome EC: version:
438 01:49:04.893674 ro: volmar_v2.0.14126-e605144e9c
439 01:49:04.897167 rw: volmar_v0.0.55-22d1557
440 01:49:04.900410 running image: 2
441 01:49:04.903905 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
442 01:49:04.913773 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
443 01:49:04.920274 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
444 01:49:04.926789 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
445 01:49:04.936908 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
446 01:49:04.946741 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
447 01:49:04.950042 EC took 967us to calculate image hash
448 01:49:04.963321 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
449 01:49:04.966659 VB2:sync_ec() select_rw=RW(active)
450 01:49:04.975829 Waited 905us to clear limit power flag.
451 01:49:04.978521 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
452 01:49:04.982787 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
453 01:49:04.986386 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
454 01:49:04.990316 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
455 01:49:04.996329 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
456 01:49:04.996682 TCO_STS: 0000 0000
457 01:49:05.000364 GEN_PMCON: d1001038 00002200
458 01:49:05.003807 GBLRST_CAUSE: 00000040 00000000
459 01:49:05.006796 HPR_CAUSE0: 00000000
460 01:49:05.007268 prev_sleep_state 5
461 01:49:05.013633 Abort disabling TXT, as CPU is not TXT capable.
462 01:49:05.020571 cse_lite: Number of partitions = 3
463 01:49:05.023449 cse_lite: Current partition = RW
464 01:49:05.023942 cse_lite: Next partition = RW
465 01:49:05.026827 cse_lite: Flags = 0x7
466 01:49:05.033361 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
467 01:49:05.043727 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
468 01:49:05.046732 FMAP: area SI_ME found @ 1000 (5238784 bytes)
469 01:49:05.053247 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
470 01:49:05.059774 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
471 01:49:05.066681 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
472 01:49:05.071264 cse_lite: CSE CBFS RW version : 16.1.25.2049
473 01:49:05.072856 Boot Count incremented to 2703
474 01:49:05.079740 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
475 01:49:05.086579 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
476 01:49:05.099729 Probing TPM I2C: done! DID_VID 0x00281ae0
477 01:49:05.103002 Locality already claimed
478 01:49:05.106162 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
479 01:49:05.125542 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
480 01:49:05.132402 MRC: Hash idx 0x100d comparison successful.
481 01:49:05.135271 MRC cache found, size f6c8
482 01:49:05.135669 bootmode is set to: 2
483 01:49:05.139238 EC returned error result code 3
484 01:49:05.142217 FW_CONFIG value from CBI is 0x131
485 01:49:05.149085 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
486 01:49:05.152248 SPD index = 0
487 01:49:05.159187 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
488 01:49:05.159673 SPD: module type is LPDDR4X
489 01:49:05.165950 SPD: module part number is K4U6E3S4AB-MGCL
490 01:49:05.172540 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
491 01:49:05.175965 SPD: device width 16 bits, bus width 16 bits
492 01:49:05.179260 SPD: module size is 1024 MB (per channel)
493 01:49:05.248641 CBMEM:
494 01:49:05.251747 IMD: root @ 0x76fff000 254 entries.
495 01:49:05.255338 IMD: root @ 0x76ffec00 62 entries.
496 01:49:05.262697 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
497 01:49:05.266021 RO_VPD is uninitialized or empty.
498 01:49:05.269109 FMAP: area RW_VPD found @ f29000 (8192 bytes)
499 01:49:05.276374 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
500 01:49:05.279827 External stage cache:
501 01:49:05.283375 IMD: root @ 0x7bbff000 254 entries.
502 01:49:05.286216 IMD: root @ 0x7bbfec00 62 entries.
503 01:49:05.292922 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
504 01:49:05.299695 MRC: Checking cached data update for 'RW_MRC_CACHE'.
505 01:49:05.303156 MRC: 'RW_MRC_CACHE' does not need update.
506 01:49:05.303623 8 DIMMs found
507 01:49:05.306514 SMM Memory Map
508 01:49:05.310472 SMRAM : 0x7b800000 0x800000
509 01:49:05.312906 Subregion 0: 0x7b800000 0x200000
510 01:49:05.316433 Subregion 1: 0x7ba00000 0x200000
511 01:49:05.319568 Subregion 2: 0x7bc00000 0x400000
512 01:49:05.322921 top_of_ram = 0x77000000
513 01:49:05.326111 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
514 01:49:05.333117 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
515 01:49:05.339818 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
516 01:49:05.342735 MTRR Range: Start=ff000000 End=0 (Size 1000000)
517 01:49:05.343132 Normal boot
518 01:49:05.352699 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
519 01:49:05.359906 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
520 01:49:05.366017 Processing 237 relocs. Offset value of 0x74ab9000
521 01:49:05.374194 BS: romstage times (exec / console): total (unknown) / 377 ms
522 01:49:05.381701
523 01:49:05.382148
524 01:49:05.388444 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
525 01:49:05.388900 Normal boot
526 01:49:05.395074 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
527 01:49:05.401510 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
528 01:49:05.408154 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
529 01:49:05.417657 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
530 01:49:05.465779 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
531 01:49:05.472185 Processing 5931 relocs. Offset value of 0x72a2f000
532 01:49:05.475712 BS: postcar times (exec / console): total (unknown) / 51 ms
533 01:49:05.479208
534 01:49:05.479700
535 01:49:05.485789 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
536 01:49:05.489247 Reserving BERT start 76a1e000, size 10000
537 01:49:05.492614 Normal boot
538 01:49:05.495851 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
539 01:49:05.502484 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
540 01:49:05.512340 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
541 01:49:05.515171 FMAP: area RW_VPD found @ f29000 (8192 bytes)
542 01:49:05.518691 Google Chrome EC: version:
543 01:49:05.522081 ro: volmar_v2.0.14126-e605144e9c
544 01:49:05.525193 rw: volmar_v0.0.55-22d1557
545 01:49:05.528640 running image: 2
546 01:49:05.531982 ACPI _SWS is PM1 Index 8 GPE Index -1
547 01:49:05.535577 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
548 01:49:05.539348 EC returned error result code 3
549 01:49:05.542620 FW_CONFIG value from CBI is 0x131
550 01:49:05.549497 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
551 01:49:05.552264 PCI: 00:1c.2 disabled by fw_config
552 01:49:05.559734 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
553 01:49:05.563488 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
554 01:49:05.570231 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
555 01:49:05.573866 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
556 01:49:05.580108 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
557 01:49:05.587092 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
558 01:49:05.590429 microcode: sig=0x906a4 pf=0x80 revision=0x423
559 01:49:05.596646 microcode: Update skipped, already up-to-date
560 01:49:05.603400 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
561 01:49:05.635080 Detected 6 core, 8 thread CPU.
562 01:49:05.638415 Setting up SMI for CPU
563 01:49:05.641422 IED base = 0x7bc00000
564 01:49:05.641810 IED size = 0x00400000
565 01:49:05.645293 Will perform SMM setup.
566 01:49:05.648318 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
567 01:49:05.651588 LAPIC 0x0 in XAPIC mode.
568 01:49:05.662241 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
569 01:49:05.665350 Processing 18 relocs. Offset value of 0x00030000
570 01:49:05.669835 Attempting to start 7 APs
571 01:49:05.673000 Waiting for 10ms after sending INIT.
572 01:49:05.686252 Waiting for SIPI to complete...
573 01:49:05.689603 LAPIC 0x1 in XAPIC mode.
574 01:49:05.692621 LAPIC 0x12 in XAPIC mode.
575 01:49:05.696168 AP: slot 5 apic_id 1, MCU rev: 0x00000423
576 01:49:05.696662 done.
577 01:49:05.699418 LAPIC 0x10 in XAPIC mode.
578 01:49:05.706217 AP: slot 4 apic_id 12, MCU rev: 0x00000423
579 01:49:05.706717 LAPIC 0x16 in XAPIC mode.
580 01:49:05.712996 AP: slot 3 apic_id 10, MCU rev: 0x00000423
581 01:49:05.716003 Waiting for SIPI to complete...
582 01:49:05.716499 done.
583 01:49:05.719310 LAPIC 0x14 in XAPIC mode.
584 01:49:05.722709 AP: slot 2 apic_id 16, MCU rev: 0x00000423
585 01:49:05.726046 AP: slot 1 apic_id 14, MCU rev: 0x00000423
586 01:49:05.729190 LAPIC 0x8 in XAPIC mode.
587 01:49:05.732601 LAPIC 0x9 in XAPIC mode.
588 01:49:05.735897 AP: slot 6 apic_id 8, MCU rev: 0x00000423
589 01:49:05.739201 AP: slot 7 apic_id 9, MCU rev: 0x00000423
590 01:49:05.742311 smm_setup_relocation_handler: enter
591 01:49:05.745716 smm_setup_relocation_handler: exit
592 01:49:05.755940 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
593 01:49:05.759130 Processing 11 relocs. Offset value of 0x00038000
594 01:49:05.765600 smm_module_setup_stub: stack_top = 0x7b804000
595 01:49:05.768915 smm_module_setup_stub: per cpu stack_size = 0x800
596 01:49:05.775834 smm_module_setup_stub: runtime.start32_offset = 0x4c
597 01:49:05.779373 smm_module_setup_stub: runtime.smm_size = 0x10000
598 01:49:05.786231 SMM Module: stub loaded at 38000. Will call 0x76a52094
599 01:49:05.788910 Installing permanent SMM handler to 0x7b800000
600 01:49:05.795490 smm_load_module: total_smm_space_needed e468, available -> 200000
601 01:49:05.805240 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
602 01:49:05.808977 Processing 255 relocs. Offset value of 0x7b9f6000
603 01:49:05.815574 smm_load_module: smram_start: 0x7b800000
604 01:49:05.818378 smm_load_module: smram_end: 7ba00000
605 01:49:05.821879 smm_load_module: handler start 0x7b9f6d5f
606 01:49:05.824937 smm_load_module: handler_size 98d0
607 01:49:05.829033 smm_load_module: fxsave_area 0x7b9ff000
608 01:49:05.831849 smm_load_module: fxsave_size 1000
609 01:49:05.838201 smm_load_module: CONFIG_MSEG_SIZE 0x0
610 01:49:05.841723 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
611 01:49:05.848558 smm_load_module: handler_mod_params.smbase = 0x7b800000
612 01:49:05.851356 smm_load_module: per_cpu_save_state_size = 0x400
613 01:49:05.854870 smm_load_module: num_cpus = 0x8
614 01:49:05.861100 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
615 01:49:05.865161 smm_load_module: total_save_state_size = 0x2000
616 01:49:05.871461 smm_load_module: cpu0 entry: 7b9e6000
617 01:49:05.874625 smm_create_map: cpus allowed in one segment 30
618 01:49:05.878184 smm_create_map: min # of segments needed 1
619 01:49:05.881442 CPU 0x0
620 01:49:05.884809 smbase 7b9e6000 entry 7b9ee000
621 01:49:05.888228 ss_start 7b9f5c00 code_end 7b9ee208
622 01:49:05.888733 CPU 0x1
623 01:49:05.891306 smbase 7b9e5c00 entry 7b9edc00
624 01:49:05.897872 ss_start 7b9f5800 code_end 7b9ede08
625 01:49:05.898319 CPU 0x2
626 01:49:05.901545 smbase 7b9e5800 entry 7b9ed800
627 01:49:05.908197 ss_start 7b9f5400 code_end 7b9eda08
628 01:49:05.908724 CPU 0x3
629 01:49:05.911836 smbase 7b9e5400 entry 7b9ed400
630 01:49:05.914840 ss_start 7b9f5000 code_end 7b9ed608
631 01:49:05.918015 CPU 0x4
632 01:49:05.921824 smbase 7b9e5000 entry 7b9ed000
633 01:49:05.924562 ss_start 7b9f4c00 code_end 7b9ed208
634 01:49:05.928144 CPU 0x5
635 01:49:05.931556 smbase 7b9e4c00 entry 7b9ecc00
636 01:49:05.934699 ss_start 7b9f4800 code_end 7b9ece08
637 01:49:05.935205 CPU 0x6
638 01:49:05.938063 smbase 7b9e4800 entry 7b9ec800
639 01:49:05.944885 ss_start 7b9f4400 code_end 7b9eca08
640 01:49:05.945432 CPU 0x7
641 01:49:05.948106 smbase 7b9e4400 entry 7b9ec400
642 01:49:05.954587 ss_start 7b9f4000 code_end 7b9ec608
643 01:49:05.961473 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
644 01:49:05.967575 Processing 11 relocs. Offset value of 0x7b9ee000
645 01:49:05.971106 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
646 01:49:05.977542 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
647 01:49:05.984394 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
648 01:49:05.991314 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
649 01:49:05.997676 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
650 01:49:06.004433 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
651 01:49:06.010997 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
652 01:49:06.014617 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
653 01:49:06.021642 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
654 01:49:06.027675 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
655 01:49:06.034550 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
656 01:49:06.040770 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
657 01:49:06.047929 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
658 01:49:06.054216 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
659 01:49:06.060971 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
660 01:49:06.064058 smm_module_setup_stub: stack_top = 0x7b804000
661 01:49:06.070963 smm_module_setup_stub: per cpu stack_size = 0x800
662 01:49:06.074485 smm_module_setup_stub: runtime.start32_offset = 0x4c
663 01:49:06.080829 smm_module_setup_stub: runtime.smm_size = 0x200000
664 01:49:06.087411 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
665 01:49:06.090785 Clearing SMI status registers
666 01:49:06.093941 SMI_STS: PM1
667 01:49:06.094444 PM1_STS: WAK PWRBTN
668 01:49:06.100564 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
669 01:49:06.104614 In relocation handler: CPU 0
670 01:49:06.107457 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
671 01:49:06.113999 Writing SMRR. base = 0x7b800006, mask=0xff800c00
672 01:49:06.117151 Relocation complete.
673 01:49:06.124356 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
674 01:49:06.127274 In relocation handler: CPU 5
675 01:49:06.130542 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
676 01:49:06.133798 Relocation complete.
677 01:49:06.140727 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
678 01:49:06.143951 In relocation handler: CPU 4
679 01:49:06.147766 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
680 01:49:06.150310 Writing SMRR. base = 0x7b800006, mask=0xff800c00
681 01:49:06.153655 Relocation complete.
682 01:49:06.160608 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
683 01:49:06.164162 In relocation handler: CPU 3
684 01:49:06.167228 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
685 01:49:06.173917 Writing SMRR. base = 0x7b800006, mask=0xff800c00
686 01:49:06.174421 Relocation complete.
687 01:49:06.183731 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
688 01:49:06.184231 In relocation handler: CPU 2
689 01:49:06.190135 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
690 01:49:06.193479 Writing SMRR. base = 0x7b800006, mask=0xff800c00
691 01:49:06.197103 Relocation complete.
692 01:49:06.203910 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
693 01:49:06.207302 In relocation handler: CPU 1
694 01:49:06.210082 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
695 01:49:06.216792 Writing SMRR. base = 0x7b800006, mask=0xff800c00
696 01:49:06.217295 Relocation complete.
697 01:49:06.223467 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
698 01:49:06.226632 In relocation handler: CPU 7
699 01:49:06.230015 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
700 01:49:06.233550 Relocation complete.
701 01:49:06.239994 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
702 01:49:06.243328 In relocation handler: CPU 6
703 01:49:06.246660 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
704 01:49:06.253489 Writing SMRR. base = 0x7b800006, mask=0xff800c00
705 01:49:06.256768 Relocation complete.
706 01:49:06.257257 Initializing CPU #0
707 01:49:06.259992 CPU: vendor Intel device 906a4
708 01:49:06.263474 CPU: family 06, model 9a, stepping 04
709 01:49:06.266292 Clearing out pending MCEs
710 01:49:06.269987 cpu: energy policy set to 7
711 01:49:06.273231 Turbo is available but hidden
712 01:49:06.276520 Turbo is available and visible
713 01:49:06.280240 microcode: Update skipped, already up-to-date
714 01:49:06.283484 CPU #0 initialized
715 01:49:06.283985 Initializing CPU #5
716 01:49:06.286412 Initializing CPU #1
717 01:49:06.289311 Initializing CPU #4
718 01:49:06.289672 Initializing CPU #6
719 01:49:06.292974 Initializing CPU #2
720 01:49:06.296478 CPU: vendor Intel device 906a4
721 01:49:06.299627 CPU: family 06, model 9a, stepping 04
722 01:49:06.303080 CPU: vendor Intel device 906a4
723 01:49:06.306368 CPU: family 06, model 9a, stepping 04
724 01:49:06.309786 CPU: vendor Intel device 906a4
725 01:49:06.313184 CPU: family 06, model 9a, stepping 04
726 01:49:06.316388 Initializing CPU #3
727 01:49:06.319497 CPU: vendor Intel device 906a4
728 01:49:06.323062 CPU: family 06, model 9a, stepping 04
729 01:49:06.326111 Clearing out pending MCEs
730 01:49:06.326560 Clearing out pending MCEs
731 01:49:06.329729 CPU: vendor Intel device 906a4
732 01:49:06.333014 CPU: family 06, model 9a, stepping 04
733 01:49:06.336132 Clearing out pending MCEs
734 01:49:06.339517 Clearing out pending MCEs
735 01:49:06.342961 cpu: energy policy set to 7
736 01:49:06.346205 cpu: energy policy set to 7
737 01:49:06.349797 cpu: energy policy set to 7
738 01:49:06.350299 cpu: energy policy set to 7
739 01:49:06.356228 microcode: Update skipped, already up-to-date
740 01:49:06.356683 CPU #2 initialized
741 01:49:06.362955 microcode: Update skipped, already up-to-date
742 01:49:06.363353 CPU #1 initialized
743 01:49:06.368962 microcode: Update skipped, already up-to-date
744 01:49:06.369410 CPU #4 initialized
745 01:49:06.376273 microcode: Update skipped, already up-to-date
746 01:49:06.376771 CPU #3 initialized
747 01:49:06.379559 Clearing out pending MCEs
748 01:49:06.382552 Initializing CPU #7
749 01:49:06.386679 cpu: energy policy set to 7
750 01:49:06.389160 CPU: vendor Intel device 906a4
751 01:49:06.392795 CPU: family 06, model 9a, stepping 04
752 01:49:06.395769 microcode: Update skipped, already up-to-date
753 01:49:06.399339 CPU #6 initialized
754 01:49:06.399803 Clearing out pending MCEs
755 01:49:06.402524 CPU: vendor Intel device 906a4
756 01:49:06.409511 CPU: family 06, model 9a, stepping 04
757 01:49:06.410009 cpu: energy policy set to 7
758 01:49:06.412728 Clearing out pending MCEs
759 01:49:06.419056 microcode: Update skipped, already up-to-date
760 01:49:06.419555 CPU #7 initialized
761 01:49:06.422227 cpu: energy policy set to 7
762 01:49:06.425921 microcode: Update skipped, already up-to-date
763 01:49:06.429002 CPU #5 initialized
764 01:49:06.432357 bsp_do_flight_plan done after 713 msecs.
765 01:49:06.436173 CPU: frequency set to 4400 MHz
766 01:49:06.438993 Enabling SMIs.
767 01:49:06.445841 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms
768 01:49:06.460848 Probing TPM I2C: done! DID_VID 0x00281ae0
769 01:49:06.464140 Locality already claimed
770 01:49:06.466907 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
771 01:49:06.478446 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
772 01:49:06.482047 Enabling GPIO PM b/c CR50 has long IRQ pulse support
773 01:49:06.488376 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
774 01:49:06.495339 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
775 01:49:06.498077 Found a VBT of 9216 bytes after decompression
776 01:49:06.501528 PCI 1.0, PIN A, using IRQ #16
777 01:49:06.504978 PCI 2.0, PIN A, using IRQ #17
778 01:49:06.508697 PCI 4.0, PIN A, using IRQ #18
779 01:49:06.511815 PCI 5.0, PIN A, using IRQ #16
780 01:49:06.515177 PCI 6.0, PIN A, using IRQ #16
781 01:49:06.518100 PCI 6.2, PIN C, using IRQ #18
782 01:49:06.522065 PCI 7.0, PIN A, using IRQ #19
783 01:49:06.525125 PCI 7.1, PIN B, using IRQ #20
784 01:49:06.528754 PCI 7.2, PIN C, using IRQ #21
785 01:49:06.531602 PCI 7.3, PIN D, using IRQ #22
786 01:49:06.534803 PCI 8.0, PIN A, using IRQ #23
787 01:49:06.538269 PCI D.0, PIN A, using IRQ #17
788 01:49:06.541760 PCI D.1, PIN B, using IRQ #19
789 01:49:06.542262 PCI 10.0, PIN A, using IRQ #24
790 01:49:06.544713 PCI 10.1, PIN B, using IRQ #25
791 01:49:06.548305 PCI 10.6, PIN C, using IRQ #20
792 01:49:06.551726 PCI 10.7, PIN D, using IRQ #21
793 01:49:06.554639 PCI 11.0, PIN A, using IRQ #26
794 01:49:06.557891 PCI 11.1, PIN B, using IRQ #27
795 01:49:06.561085 PCI 11.2, PIN C, using IRQ #28
796 01:49:06.564744 PCI 11.3, PIN D, using IRQ #29
797 01:49:06.568183 PCI 12.0, PIN A, using IRQ #30
798 01:49:06.571431 PCI 12.6, PIN B, using IRQ #31
799 01:49:06.574747 PCI 12.7, PIN C, using IRQ #22
800 01:49:06.577922 PCI 13.0, PIN A, using IRQ #32
801 01:49:06.581357 PCI 13.1, PIN B, using IRQ #33
802 01:49:06.584685 PCI 13.2, PIN C, using IRQ #34
803 01:49:06.588086 PCI 13.3, PIN D, using IRQ #35
804 01:49:06.591325 PCI 14.0, PIN B, using IRQ #23
805 01:49:06.594921 PCI 14.1, PIN A, using IRQ #36
806 01:49:06.595489 PCI 14.3, PIN C, using IRQ #17
807 01:49:06.598100 PCI 15.0, PIN A, using IRQ #37
808 01:49:06.601443 PCI 15.1, PIN B, using IRQ #38
809 01:49:06.604670 PCI 15.2, PIN C, using IRQ #39
810 01:49:06.608219 PCI 15.3, PIN D, using IRQ #40
811 01:49:06.611359 PCI 16.0, PIN A, using IRQ #18
812 01:49:06.614527 PCI 16.1, PIN B, using IRQ #19
813 01:49:06.618301 PCI 16.2, PIN C, using IRQ #20
814 01:49:06.621354 PCI 16.3, PIN D, using IRQ #21
815 01:49:06.624904 PCI 16.4, PIN A, using IRQ #18
816 01:49:06.628168 PCI 16.5, PIN B, using IRQ #19
817 01:49:06.631256 PCI 17.0, PIN A, using IRQ #22
818 01:49:06.634360 PCI 19.0, PIN A, using IRQ #41
819 01:49:06.638052 PCI 19.1, PIN B, using IRQ #42
820 01:49:06.641116 PCI 19.2, PIN C, using IRQ #43
821 01:49:06.644351 PCI 1C.0, PIN A, using IRQ #16
822 01:49:06.648254 PCI 1C.1, PIN B, using IRQ #17
823 01:49:06.648757 PCI 1C.2, PIN C, using IRQ #18
824 01:49:06.651255 PCI 1C.3, PIN D, using IRQ #19
825 01:49:06.653826 PCI 1C.4, PIN A, using IRQ #16
826 01:49:06.657583 PCI 1C.5, PIN B, using IRQ #17
827 01:49:06.661088 PCI 1C.6, PIN C, using IRQ #18
828 01:49:06.664148 PCI 1C.7, PIN D, using IRQ #19
829 01:49:06.667566 PCI 1D.0, PIN A, using IRQ #16
830 01:49:06.671135 PCI 1D.1, PIN B, using IRQ #17
831 01:49:06.674239 PCI 1D.2, PIN C, using IRQ #18
832 01:49:06.677872 PCI 1D.3, PIN D, using IRQ #19
833 01:49:06.680911 PCI 1E.0, PIN A, using IRQ #23
834 01:49:06.684285 PCI 1E.1, PIN B, using IRQ #20
835 01:49:06.687729 PCI 1E.2, PIN C, using IRQ #44
836 01:49:06.690937 PCI 1E.3, PIN D, using IRQ #45
837 01:49:06.694537 PCI 1F.3, PIN B, using IRQ #22
838 01:49:06.697474 PCI 1F.4, PIN C, using IRQ #23
839 01:49:06.701415 PCI 1F.6, PIN D, using IRQ #20
840 01:49:06.704616 PCI 1F.7, PIN A, using IRQ #21
841 01:49:06.707461 IRQ: Using dynamically assigned PCI IO-APIC IRQs
842 01:49:06.713964 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
843 01:49:06.895327 FSPS returned 0
844 01:49:06.898413 Executing Phase 1 of FspMultiPhaseSiInit
845 01:49:06.908586 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
846 01:49:06.912136 port C0 DISC req: usage 1 usb3 1 usb2 1
847 01:49:06.915669 Raw Buffer output 0 00000111
848 01:49:06.918636 Raw Buffer output 1 00000000
849 01:49:06.922815 pmc_send_ipc_cmd succeeded
850 01:49:06.929257 port C1 DISC req: usage 1 usb3 3 usb2 3
851 01:49:06.929789 Raw Buffer output 0 00000331
852 01:49:06.932143 Raw Buffer output 1 00000000
853 01:49:06.936752 pmc_send_ipc_cmd succeeded
854 01:49:06.940977 Detected 6 core, 8 thread CPU.
855 01:49:06.943468 Detected 6 core, 8 thread CPU.
856 01:49:06.948724 Detected 6 core, 8 thread CPU.
857 01:49:06.952239 Detected 6 core, 8 thread CPU.
858 01:49:06.955112 Detected 6 core, 8 thread CPU.
859 01:49:06.958611 Detected 6 core, 8 thread CPU.
860 01:49:06.962060 Detected 6 core, 8 thread CPU.
861 01:49:06.965464 Detected 6 core, 8 thread CPU.
862 01:49:06.968848 Detected 6 core, 8 thread CPU.
863 01:49:06.972187 Detected 6 core, 8 thread CPU.
864 01:49:06.975424 Detected 6 core, 8 thread CPU.
865 01:49:06.978757 Detected 6 core, 8 thread CPU.
866 01:49:06.981765 Detected 6 core, 8 thread CPU.
867 01:49:06.985515 Detected 6 core, 8 thread CPU.
868 01:49:06.988802 Detected 6 core, 8 thread CPU.
869 01:49:06.992236 Detected 6 core, 8 thread CPU.
870 01:49:06.994845 Detected 6 core, 8 thread CPU.
871 01:49:06.999338 Detected 6 core, 8 thread CPU.
872 01:49:07.001944 Detected 6 core, 8 thread CPU.
873 01:49:07.005319 Detected 6 core, 8 thread CPU.
874 01:49:07.008360 Detected 6 core, 8 thread CPU.
875 01:49:07.011685 Detected 6 core, 8 thread CPU.
876 01:49:07.292698 Detected 6 core, 8 thread CPU.
877 01:49:07.295713 Detected 6 core, 8 thread CPU.
878 01:49:07.299075 Detected 6 core, 8 thread CPU.
879 01:49:07.302332 Detected 6 core, 8 thread CPU.
880 01:49:07.305829 Detected 6 core, 8 thread CPU.
881 01:49:07.309012 Detected 6 core, 8 thread CPU.
882 01:49:07.312295 Detected 6 core, 8 thread CPU.
883 01:49:07.315952 Detected 6 core, 8 thread CPU.
884 01:49:07.319369 Detected 6 core, 8 thread CPU.
885 01:49:07.322474 Detected 6 core, 8 thread CPU.
886 01:49:07.325704 Detected 6 core, 8 thread CPU.
887 01:49:07.328914 Detected 6 core, 8 thread CPU.
888 01:49:07.332392 Detected 6 core, 8 thread CPU.
889 01:49:07.336319 Detected 6 core, 8 thread CPU.
890 01:49:07.338690 Detected 6 core, 8 thread CPU.
891 01:49:07.341941 Detected 6 core, 8 thread CPU.
892 01:49:07.345866 Detected 6 core, 8 thread CPU.
893 01:49:07.348592 Detected 6 core, 8 thread CPU.
894 01:49:07.352202 Detected 6 core, 8 thread CPU.
895 01:49:07.354992 Detected 6 core, 8 thread CPU.
896 01:49:07.358746 Display FSP Version Info HOB
897 01:49:07.361951 Reference Code - CPU = c.0.65.70
898 01:49:07.362453 uCode Version = 0.0.4.23
899 01:49:07.365576 TXT ACM version = ff.ff.ff.ffff
900 01:49:07.368859 Reference Code - ME = c.0.65.70
901 01:49:07.372235 MEBx version = 0.0.0.0
902 01:49:07.375807 ME Firmware Version = Lite SKU
903 01:49:07.378716 Reference Code - PCH = c.0.65.70
904 01:49:07.382289 PCH-CRID Status = Disabled
905 01:49:07.385421 PCH-CRID Original Value = ff.ff.ff.ffff
906 01:49:07.388787 PCH-CRID New Value = ff.ff.ff.ffff
907 01:49:07.392379 OPROM - RST - RAID = ff.ff.ff.ffff
908 01:49:07.395410 PCH Hsio Version = 4.0.0.0
909 01:49:07.398754 Reference Code - SA - System Agent = c.0.65.70
910 01:49:07.402219 Reference Code - MRC = 0.0.3.80
911 01:49:07.405508 SA - PCIe Version = c.0.65.70
912 01:49:07.408848 SA-CRID Status = Disabled
913 01:49:07.412179 SA-CRID Original Value = 0.0.0.4
914 01:49:07.415321 SA-CRID New Value = 0.0.0.4
915 01:49:07.418767 OPROM - VBIOS = ff.ff.ff.ffff
916 01:49:07.422335 IO Manageability Engine FW Version = 24.0.4.0
917 01:49:07.425204 PHY Build Version = 0.0.0.2016
918 01:49:07.428646 Thunderbolt(TM) FW Version = 0.0.0.0
919 01:49:07.435496 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
920 01:49:07.441930 BS: BS_DEV_INIT_CHIPS run times (exec / console): 483 / 507 ms
921 01:49:07.445325 Enumerating buses...
922 01:49:07.448418 Show all devs... Before device enumeration.
923 01:49:07.452114 Root Device: enabled 1
924 01:49:07.452603 CPU_CLUSTER: 0: enabled 1
925 01:49:07.454926 DOMAIN: 0000: enabled 1
926 01:49:07.458585 GPIO: 0: enabled 1
927 01:49:07.461811 PCI: 00:00.0: enabled 1
928 01:49:07.462203 PCI: 00:01.0: enabled 0
929 01:49:07.465175 PCI: 00:01.1: enabled 0
930 01:49:07.468822 PCI: 00:02.0: enabled 1
931 01:49:07.469314 PCI: 00:04.0: enabled 1
932 01:49:07.472161 PCI: 00:05.0: enabled 0
933 01:49:07.475511 PCI: 00:06.0: enabled 1
934 01:49:07.478769 PCI: 00:06.2: enabled 0
935 01:49:07.479256 PCI: 00:07.0: enabled 0
936 01:49:07.482024 PCI: 00:07.1: enabled 0
937 01:49:07.485159 PCI: 00:07.2: enabled 0
938 01:49:07.488763 PCI: 00:07.3: enabled 0
939 01:49:07.489248 PCI: 00:08.0: enabled 0
940 01:49:07.492038 PCI: 00:09.0: enabled 0
941 01:49:07.495083 PCI: 00:0a.0: enabled 1
942 01:49:07.498681 PCI: 00:0d.0: enabled 1
943 01:49:07.499156 PCI: 00:0d.1: enabled 0
944 01:49:07.501990 PCI: 00:0d.2: enabled 0
945 01:49:07.505181 PCI: 00:0d.3: enabled 0
946 01:49:07.508245 PCI: 00:0e.0: enabled 0
947 01:49:07.508730 PCI: 00:10.0: enabled 0
948 01:49:07.512002 PCI: 00:10.1: enabled 0
949 01:49:07.515151 PCI: 00:10.6: enabled 0
950 01:49:07.515619 PCI: 00:10.7: enabled 0
951 01:49:07.518388 PCI: 00:12.0: enabled 0
952 01:49:07.521892 PCI: 00:12.6: enabled 0
953 01:49:07.524932 PCI: 00:12.7: enabled 0
954 01:49:07.525432 PCI: 00:13.0: enabled 0
955 01:49:07.528616 PCI: 00:14.0: enabled 1
956 01:49:07.531729 PCI: 00:14.1: enabled 0
957 01:49:07.535353 PCI: 00:14.2: enabled 1
958 01:49:07.535838 PCI: 00:14.3: enabled 1
959 01:49:07.538263 PCI: 00:15.0: enabled 1
960 01:49:07.541796 PCI: 00:15.1: enabled 1
961 01:49:07.544970 PCI: 00:15.2: enabled 0
962 01:49:07.545497 PCI: 00:15.3: enabled 1
963 01:49:07.548015 PCI: 00:16.0: enabled 1
964 01:49:07.551545 PCI: 00:16.1: enabled 0
965 01:49:07.555031 PCI: 00:16.2: enabled 0
966 01:49:07.555419 PCI: 00:16.3: enabled 0
967 01:49:07.557820 PCI: 00:16.4: enabled 0
968 01:49:07.561792 PCI: 00:16.5: enabled 0
969 01:49:07.562280 PCI: 00:17.0: enabled 1
970 01:49:07.565484 PCI: 00:19.0: enabled 0
971 01:49:07.568075 PCI: 00:19.1: enabled 1
972 01:49:07.571795 PCI: 00:19.2: enabled 0
973 01:49:07.572286 PCI: 00:1a.0: enabled 0
974 01:49:07.575120 PCI: 00:1c.0: enabled 0
975 01:49:07.577819 PCI: 00:1c.1: enabled 0
976 01:49:07.581519 PCI: 00:1c.2: enabled 0
977 01:49:07.582138 PCI: 00:1c.3: enabled 0
978 01:49:07.584537 PCI: 00:1c.4: enabled 0
979 01:49:07.587984 PCI: 00:1c.5: enabled 0
980 01:49:07.591297 PCI: 00:1c.6: enabled 0
981 01:49:07.591739 PCI: 00:1c.7: enabled 0
982 01:49:07.594972 PCI: 00:1d.0: enabled 0
983 01:49:07.598023 PCI: 00:1d.1: enabled 0
984 01:49:07.598510 PCI: 00:1d.2: enabled 0
985 01:49:07.601486 PCI: 00:1d.3: enabled 0
986 01:49:07.604706 PCI: 00:1e.0: enabled 1
987 01:49:07.608495 PCI: 00:1e.1: enabled 0
988 01:49:07.608987 PCI: 00:1e.2: enabled 0
989 01:49:07.611427 PCI: 00:1e.3: enabled 1
990 01:49:07.614854 PCI: 00:1f.0: enabled 1
991 01:49:07.618130 PCI: 00:1f.1: enabled 0
992 01:49:07.618620 PCI: 00:1f.2: enabled 1
993 01:49:07.621234 PCI: 00:1f.3: enabled 1
994 01:49:07.624578 PCI: 00:1f.4: enabled 0
995 01:49:07.627888 PCI: 00:1f.5: enabled 1
996 01:49:07.628381 PCI: 00:1f.6: enabled 0
997 01:49:07.632200 PCI: 00:1f.7: enabled 0
998 01:49:07.634512 GENERIC: 0.0: enabled 1
999 01:49:07.634986 GENERIC: 0.0: enabled 1
1000 01:49:07.637694 GENERIC: 1.0: enabled 1
1001 01:49:07.641156 GENERIC: 0.0: enabled 1
1002 01:49:07.645112 GENERIC: 1.0: enabled 1
1003 01:49:07.645643 USB0 port 0: enabled 1
1004 01:49:07.648014 USB0 port 0: enabled 1
1005 01:49:07.650927 GENERIC: 0.0: enabled 1
1006 01:49:07.654226 I2C: 00:1a: enabled 1
1007 01:49:07.654714 I2C: 00:31: enabled 1
1008 01:49:07.657223 I2C: 00:32: enabled 1
1009 01:49:07.661018 I2C: 00:50: enabled 1
1010 01:49:07.661554 I2C: 00:10: enabled 1
1011 01:49:07.664192 I2C: 00:15: enabled 1
1012 01:49:07.667588 I2C: 00:2c: enabled 1
1013 01:49:07.668077 GENERIC: 0.0: enabled 1
1014 01:49:07.671063 SPI: 00: enabled 1
1015 01:49:07.674222 PNP: 0c09.0: enabled 1
1016 01:49:07.674712 GENERIC: 0.0: enabled 1
1017 01:49:07.677972 USB3 port 0: enabled 1
1018 01:49:07.680769 USB3 port 1: enabled 0
1019 01:49:07.684217 USB3 port 2: enabled 1
1020 01:49:07.684749 USB3 port 3: enabled 0
1021 01:49:07.687573 USB2 port 0: enabled 1
1022 01:49:07.690624 USB2 port 1: enabled 0
1023 01:49:07.691018 USB2 port 2: enabled 1
1024 01:49:07.693983 USB2 port 3: enabled 0
1025 01:49:07.697547 USB2 port 4: enabled 0
1026 01:49:07.698132 USB2 port 5: enabled 1
1027 01:49:07.701329 USB2 port 6: enabled 0
1028 01:49:07.704044 USB2 port 7: enabled 0
1029 01:49:07.707713 USB2 port 8: enabled 1
1030 01:49:07.708183 USB2 port 9: enabled 1
1031 01:49:07.711065 USB3 port 0: enabled 1
1032 01:49:07.714334 USB3 port 1: enabled 0
1033 01:49:07.714814 USB3 port 2: enabled 0
1034 01:49:07.717904 USB3 port 3: enabled 0
1035 01:49:07.720985 GENERIC: 0.0: enabled 1
1036 01:49:07.724581 GENERIC: 1.0: enabled 1
1037 01:49:07.725061 APIC: 00: enabled 1
1038 01:49:07.727558 APIC: 14: enabled 1
1039 01:49:07.728040 APIC: 16: enabled 1
1040 01:49:07.731018 APIC: 10: enabled 1
1041 01:49:07.734095 APIC: 12: enabled 1
1042 01:49:07.734486 APIC: 01: enabled 1
1043 01:49:07.737718 APIC: 08: enabled 1
1044 01:49:07.738201 APIC: 09: enabled 1
1045 01:49:07.740579 Compare with tree...
1046 01:49:07.744182 Root Device: enabled 1
1047 01:49:07.747595 CPU_CLUSTER: 0: enabled 1
1048 01:49:07.748074 APIC: 00: enabled 1
1049 01:49:07.751201 APIC: 14: enabled 1
1050 01:49:07.754093 APIC: 16: enabled 1
1051 01:49:07.754476 APIC: 10: enabled 1
1052 01:49:07.757639 APIC: 12: enabled 1
1053 01:49:07.760994 APIC: 01: enabled 1
1054 01:49:07.761521 APIC: 08: enabled 1
1055 01:49:07.764115 APIC: 09: enabled 1
1056 01:49:07.767581 DOMAIN: 0000: enabled 1
1057 01:49:07.768082 GPIO: 0: enabled 1
1058 01:49:07.770622 PCI: 00:00.0: enabled 1
1059 01:49:07.774616 PCI: 00:01.0: enabled 0
1060 01:49:07.777675 PCI: 00:01.1: enabled 0
1061 01:49:07.781418 PCI: 00:02.0: enabled 1
1062 01:49:07.781906 PCI: 00:04.0: enabled 1
1063 01:49:07.784028 GENERIC: 0.0: enabled 1
1064 01:49:07.787431 PCI: 00:05.0: enabled 0
1065 01:49:07.791051 PCI: 00:06.0: enabled 1
1066 01:49:07.794241 PCI: 00:06.2: enabled 0
1067 01:49:07.794722 PCI: 00:08.0: enabled 0
1068 01:49:07.797887 PCI: 00:09.0: enabled 0
1069 01:49:07.800676 PCI: 00:0a.0: enabled 1
1070 01:49:07.804243 PCI: 00:0d.0: enabled 1
1071 01:49:07.807799 USB0 port 0: enabled 1
1072 01:49:07.808269 USB3 port 0: enabled 1
1073 01:49:07.810754 USB3 port 1: enabled 0
1074 01:49:07.813900 USB3 port 2: enabled 1
1075 01:49:07.817480 USB3 port 3: enabled 0
1076 01:49:07.820997 PCI: 00:0d.1: enabled 0
1077 01:49:07.821511 PCI: 00:0d.2: enabled 0
1078 01:49:07.824246 PCI: 00:0d.3: enabled 0
1079 01:49:07.827766 PCI: 00:0e.0: enabled 0
1080 01:49:07.830799 PCI: 00:10.0: enabled 0
1081 01:49:07.834540 PCI: 00:10.1: enabled 0
1082 01:49:07.835026 PCI: 00:10.6: enabled 0
1083 01:49:07.837213 PCI: 00:10.7: enabled 0
1084 01:49:07.841079 PCI: 00:12.0: enabled 0
1085 01:49:07.844306 PCI: 00:12.6: enabled 0
1086 01:49:07.847318 PCI: 00:12.7: enabled 0
1087 01:49:07.847803 PCI: 00:13.0: enabled 0
1088 01:49:07.850917 PCI: 00:14.0: enabled 1
1089 01:49:07.854057 USB0 port 0: enabled 1
1090 01:49:07.856872 USB2 port 0: enabled 1
1091 01:49:07.860424 USB2 port 1: enabled 0
1092 01:49:07.860916 USB2 port 2: enabled 1
1093 01:49:07.863753 USB2 port 3: enabled 0
1094 01:49:07.867163 USB2 port 4: enabled 0
1095 01:49:07.870517 USB2 port 5: enabled 1
1096 01:49:07.873873 USB2 port 6: enabled 0
1097 01:49:07.877335 USB2 port 7: enabled 0
1098 01:49:07.877851 USB2 port 8: enabled 1
1099 01:49:07.880650 USB2 port 9: enabled 1
1100 01:49:07.883843 USB3 port 0: enabled 1
1101 01:49:07.887038 USB3 port 1: enabled 0
1102 01:49:07.890596 USB3 port 2: enabled 0
1103 01:49:07.894100 USB3 port 3: enabled 0
1104 01:49:07.894581 PCI: 00:14.1: enabled 0
1105 01:49:07.897207 PCI: 00:14.2: enabled 1
1106 01:49:07.900508 PCI: 00:14.3: enabled 1
1107 01:49:07.903669 GENERIC: 0.0: enabled 1
1108 01:49:07.907021 PCI: 00:15.0: enabled 1
1109 01:49:07.907501 I2C: 00:1a: enabled 1
1110 01:49:07.910459 I2C: 00:31: enabled 1
1111 01:49:07.913902 I2C: 00:32: enabled 1
1112 01:49:07.917068 PCI: 00:15.1: enabled 1
1113 01:49:07.917614 I2C: 00:50: enabled 1
1114 01:49:07.920283 PCI: 00:15.2: enabled 0
1115 01:49:07.923468 PCI: 00:15.3: enabled 1
1116 01:49:07.927081 I2C: 00:10: enabled 1
1117 01:49:07.930694 PCI: 00:16.0: enabled 1
1118 01:49:07.931093 PCI: 00:16.1: enabled 0
1119 01:49:07.933490 PCI: 00:16.2: enabled 0
1120 01:49:07.937064 PCI: 00:16.3: enabled 0
1121 01:49:07.940244 PCI: 00:16.4: enabled 0
1122 01:49:07.943435 PCI: 00:16.5: enabled 0
1123 01:49:07.943778 PCI: 00:17.0: enabled 1
1124 01:49:07.946787 PCI: 00:19.0: enabled 0
1125 01:49:07.949960 PCI: 00:19.1: enabled 1
1126 01:49:07.953090 I2C: 00:15: enabled 1
1127 01:49:07.953491 I2C: 00:2c: enabled 1
1128 01:49:07.956560 PCI: 00:19.2: enabled 0
1129 01:49:07.959940 PCI: 00:1a.0: enabled 0
1130 01:49:07.963584 PCI: 00:1e.0: enabled 1
1131 01:49:07.967199 PCI: 00:1e.1: enabled 0
1132 01:49:07.967648 PCI: 00:1e.2: enabled 0
1133 01:49:07.969985 PCI: 00:1e.3: enabled 1
1134 01:49:07.973423 SPI: 00: enabled 1
1135 01:49:07.976719 PCI: 00:1f.0: enabled 1
1136 01:49:07.977143 PNP: 0c09.0: enabled 1
1137 01:49:07.980015 PCI: 00:1f.1: enabled 0
1138 01:49:07.983343 PCI: 00:1f.2: enabled 1
1139 01:49:07.986650 GENERIC: 0.0: enabled 1
1140 01:49:07.990015 GENERIC: 0.0: enabled 1
1141 01:49:07.993185 GENERIC: 1.0: enabled 1
1142 01:49:07.993687 PCI: 00:1f.3: enabled 1
1143 01:49:07.996563 PCI: 00:1f.4: enabled 0
1144 01:49:08.000090 PCI: 00:1f.5: enabled 1
1145 01:49:08.003228 PCI: 00:1f.6: enabled 0
1146 01:49:08.006870 PCI: 00:1f.7: enabled 0
1147 01:49:08.007350 Root Device scanning...
1148 01:49:08.010091 scan_static_bus for Root Device
1149 01:49:08.013492 CPU_CLUSTER: 0 enabled
1150 01:49:08.016601 DOMAIN: 0000 enabled
1151 01:49:08.017060 DOMAIN: 0000 scanning...
1152 01:49:08.020119 PCI: pci_scan_bus for bus 00
1153 01:49:08.022895 PCI: 00:00.0 [8086/0000] ops
1154 01:49:08.026705 PCI: 00:00.0 [8086/4609] enabled
1155 01:49:08.029934 PCI: 00:02.0 [8086/0000] bus ops
1156 01:49:08.033063 PCI: 00:02.0 [8086/46b3] enabled
1157 01:49:08.036406 PCI: 00:04.0 [8086/0000] bus ops
1158 01:49:08.039986 PCI: 00:04.0 [8086/461d] enabled
1159 01:49:08.043614 PCI: 00:06.0 [8086/0000] bus ops
1160 01:49:08.046669 PCI: 00:06.0 [8086/464d] enabled
1161 01:49:08.050001 PCI: 00:08.0 [8086/464f] disabled
1162 01:49:08.053269 PCI: 00:0a.0 [8086/467d] enabled
1163 01:49:08.056603 PCI: 00:0d.0 [8086/0000] bus ops
1164 01:49:08.059506 PCI: 00:0d.0 [8086/461e] enabled
1165 01:49:08.063313 PCI: 00:14.0 [8086/0000] bus ops
1166 01:49:08.066611 PCI: 00:14.0 [8086/51ed] enabled
1167 01:49:08.069920 PCI: 00:14.2 [8086/51ef] enabled
1168 01:49:08.073317 PCI: 00:14.3 [8086/0000] bus ops
1169 01:49:08.076756 PCI: 00:14.3 [8086/51f0] enabled
1170 01:49:08.080109 PCI: 00:15.0 [8086/0000] bus ops
1171 01:49:08.083224 PCI: 00:15.0 [8086/51e8] enabled
1172 01:49:08.086591 PCI: 00:15.1 [8086/0000] bus ops
1173 01:49:08.090067 PCI: 00:15.1 [8086/51e9] enabled
1174 01:49:08.093210 PCI: 00:15.2 [8086/0000] bus ops
1175 01:49:08.100312 PCI: 00:15.2 [8086/51ea] disabled
1176 01:49:08.103056 PCI: 00:15.3 [8086/0000] bus ops
1177 01:49:08.106608 PCI: 00:15.3 [8086/51eb] enabled
1178 01:49:08.107087 PCI: 00:16.0 [8086/0000] ops
1179 01:49:08.109477 PCI: 00:16.0 [8086/51e0] enabled
1180 01:49:08.117259 PCI: Static device PCI: 00:17.0 not found, disabling it.
1181 01:49:08.119749 PCI: 00:19.0 [8086/0000] bus ops
1182 01:49:08.123103 PCI: 00:19.0 [8086/51c5] disabled
1183 01:49:08.126521 PCI: 00:19.1 [8086/0000] bus ops
1184 01:49:08.129538 PCI: 00:19.1 [8086/51c6] enabled
1185 01:49:08.133209 PCI: 00:1e.0 [8086/0000] ops
1186 01:49:08.135661 PCI: 00:1e.0 [8086/51a8] enabled
1187 01:49:08.139320 PCI: 00:1e.3 [8086/0000] bus ops
1188 01:49:08.142986 PCI: 00:1e.3 [8086/51ab] enabled
1189 01:49:08.145656 PCI: 00:1f.0 [8086/0000] bus ops
1190 01:49:08.149229 PCI: 00:1f.0 [8086/5182] enabled
1191 01:49:08.152686 RTC Init
1192 01:49:08.156034 Set power on after power failure.
1193 01:49:08.159241 Disabling Deep S3
1194 01:49:08.159621 Disabling Deep S3
1195 01:49:08.162591 Disabling Deep S4
1196 01:49:08.162947 Disabling Deep S4
1197 01:49:08.166129 Disabling Deep S5
1198 01:49:08.166614 Disabling Deep S5
1199 01:49:08.169848 PCI: 00:1f.2 [0000/0000] hidden
1200 01:49:08.173647 PCI: 00:1f.3 [8086/0000] bus ops
1201 01:49:08.176304 PCI: 00:1f.3 [8086/51c8] enabled
1202 01:49:08.179281 PCI: 00:1f.5 [8086/0000] bus ops
1203 01:49:08.183380 PCI: 00:1f.5 [8086/51a4] enabled
1204 01:49:08.186249 GPIO: 0 enabled
1205 01:49:08.189984 PCI: Leftover static devices:
1206 01:49:08.190469 PCI: 00:01.0
1207 01:49:08.192928 PCI: 00:01.1
1208 01:49:08.193309 PCI: 00:05.0
1209 01:49:08.193686 PCI: 00:06.2
1210 01:49:08.195779 PCI: 00:09.0
1211 01:49:08.196137 PCI: 00:0d.1
1212 01:49:08.199575 PCI: 00:0d.2
1213 01:49:08.200013 PCI: 00:0d.3
1214 01:49:08.200381 PCI: 00:0e.0
1215 01:49:08.202981 PCI: 00:10.0
1216 01:49:08.203326 PCI: 00:10.1
1217 01:49:08.206823 PCI: 00:10.6
1218 01:49:08.207324 PCI: 00:10.7
1219 01:49:08.207684 PCI: 00:12.0
1220 01:49:08.209473 PCI: 00:12.6
1221 01:49:08.209854 PCI: 00:12.7
1222 01:49:08.212823 PCI: 00:13.0
1223 01:49:08.213228 PCI: 00:14.1
1224 01:49:08.216473 PCI: 00:16.1
1225 01:49:08.216933 PCI: 00:16.2
1226 01:49:08.217299 PCI: 00:16.3
1227 01:49:08.219364 PCI: 00:16.4
1228 01:49:08.219746 PCI: 00:16.5
1229 01:49:08.222892 PCI: 00:17.0
1230 01:49:08.223321 PCI: 00:19.2
1231 01:49:08.223662 PCI: 00:1a.0
1232 01:49:08.225810 PCI: 00:1e.1
1233 01:49:08.226154 PCI: 00:1e.2
1234 01:49:08.229590 PCI: 00:1f.1
1235 01:49:08.230047 PCI: 00:1f.4
1236 01:49:08.230389 PCI: 00:1f.6
1237 01:49:08.232877 PCI: 00:1f.7
1238 01:49:08.236603 PCI: Check your devicetree.cb.
1239 01:49:08.239530 PCI: 00:02.0 scanning...
1240 01:49:08.242710 scan_generic_bus for PCI: 00:02.0
1241 01:49:08.246224 scan_generic_bus for PCI: 00:02.0 done
1242 01:49:08.249718 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1243 01:49:08.252603 PCI: 00:04.0 scanning...
1244 01:49:08.255869 scan_generic_bus for PCI: 00:04.0
1245 01:49:08.259168 GENERIC: 0.0 enabled
1246 01:49:08.262758 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1247 01:49:08.269240 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1248 01:49:08.272634 PCI: 00:06.0 scanning...
1249 01:49:08.276097 do_pci_scan_bridge for PCI: 00:06.0
1250 01:49:08.279209 PCI: pci_scan_bus for bus 01
1251 01:49:08.282919 PCI: 01:00.0 [15b7/5009] enabled
1252 01:49:08.285972 Enabling Common Clock Configuration
1253 01:49:08.289432 L1 Sub-State supported from root port 6
1254 01:49:08.292965 L1 Sub-State Support = 0x5
1255 01:49:08.296034 CommonModeRestoreTime = 0x6e
1256 01:49:08.299327 Power On Value = 0x5, Power On Scale = 0x2
1257 01:49:08.302586 ASPM: Enabled L1
1258 01:49:08.306097 PCIe: Max_Payload_Size adjusted to 256
1259 01:49:08.306585 PCI: 01:00.0: Enabled LTR
1260 01:49:08.312620 PCI: 01:00.0: Programmed LTR max latencies
1261 01:49:08.316066 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1262 01:49:08.319234 PCI: 00:0d.0 scanning...
1263 01:49:08.322775 scan_static_bus for PCI: 00:0d.0
1264 01:49:08.326099 USB0 port 0 enabled
1265 01:49:08.326576 USB0 port 0 scanning...
1266 01:49:08.329219 scan_static_bus for USB0 port 0
1267 01:49:08.332947 USB3 port 0 enabled
1268 01:49:08.335844 USB3 port 1 disabled
1269 01:49:08.336237 USB3 port 2 enabled
1270 01:49:08.339588 USB3 port 3 disabled
1271 01:49:08.342398 USB3 port 0 scanning...
1272 01:49:08.346259 scan_static_bus for USB3 port 0
1273 01:49:08.349407 scan_static_bus for USB3 port 0 done
1274 01:49:08.352511 scan_bus: bus USB3 port 0 finished in 6 msecs
1275 01:49:08.356033 USB3 port 2 scanning...
1276 01:49:08.359028 scan_static_bus for USB3 port 2
1277 01:49:08.362385 scan_static_bus for USB3 port 2 done
1278 01:49:08.365908 scan_bus: bus USB3 port 2 finished in 6 msecs
1279 01:49:08.369207 scan_static_bus for USB0 port 0 done
1280 01:49:08.375768 scan_bus: bus USB0 port 0 finished in 43 msecs
1281 01:49:08.378959 scan_static_bus for PCI: 00:0d.0 done
1282 01:49:08.382795 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1283 01:49:08.385654 PCI: 00:14.0 scanning...
1284 01:49:08.388874 scan_static_bus for PCI: 00:14.0
1285 01:49:08.392465 USB0 port 0 enabled
1286 01:49:08.393009 USB0 port 0 scanning...
1287 01:49:08.396068 scan_static_bus for USB0 port 0
1288 01:49:08.399601 USB2 port 0 enabled
1289 01:49:08.402508 USB2 port 1 disabled
1290 01:49:08.402996 USB2 port 2 enabled
1291 01:49:08.405729 USB2 port 3 disabled
1292 01:49:08.409116 USB2 port 4 disabled
1293 01:49:08.409636 USB2 port 5 enabled
1294 01:49:08.412448 USB2 port 6 disabled
1295 01:49:08.412928 USB2 port 7 disabled
1296 01:49:08.415914 USB2 port 8 enabled
1297 01:49:08.419009 USB2 port 9 enabled
1298 01:49:08.419494 USB3 port 0 enabled
1299 01:49:08.422373 USB3 port 1 disabled
1300 01:49:08.425836 USB3 port 2 disabled
1301 01:49:08.426348 USB3 port 3 disabled
1302 01:49:08.429182 USB2 port 0 scanning...
1303 01:49:08.432693 scan_static_bus for USB2 port 0
1304 01:49:08.435441 scan_static_bus for USB2 port 0 done
1305 01:49:08.442489 scan_bus: bus USB2 port 0 finished in 6 msecs
1306 01:49:08.442970 USB2 port 2 scanning...
1307 01:49:08.445799 scan_static_bus for USB2 port 2
1308 01:49:08.448723 scan_static_bus for USB2 port 2 done
1309 01:49:08.455474 scan_bus: bus USB2 port 2 finished in 6 msecs
1310 01:49:08.455959 USB2 port 5 scanning...
1311 01:49:08.458363 scan_static_bus for USB2 port 5
1312 01:49:08.465707 scan_static_bus for USB2 port 5 done
1313 01:49:08.468720 scan_bus: bus USB2 port 5 finished in 6 msecs
1314 01:49:08.472252 USB2 port 8 scanning...
1315 01:49:08.475369 scan_static_bus for USB2 port 8
1316 01:49:08.478836 scan_static_bus for USB2 port 8 done
1317 01:49:08.481879 scan_bus: bus USB2 port 8 finished in 6 msecs
1318 01:49:08.485071 USB2 port 9 scanning...
1319 01:49:08.488594 scan_static_bus for USB2 port 9
1320 01:49:08.492103 scan_static_bus for USB2 port 9 done
1321 01:49:08.495561 scan_bus: bus USB2 port 9 finished in 6 msecs
1322 01:49:08.498563 USB3 port 0 scanning...
1323 01:49:08.502372 scan_static_bus for USB3 port 0
1324 01:49:08.505122 scan_static_bus for USB3 port 0 done
1325 01:49:08.512163 scan_bus: bus USB3 port 0 finished in 6 msecs
1326 01:49:08.515459 scan_static_bus for USB0 port 0 done
1327 01:49:08.518682 scan_bus: bus USB0 port 0 finished in 120 msecs
1328 01:49:08.522369 scan_static_bus for PCI: 00:14.0 done
1329 01:49:08.528974 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1330 01:49:08.529493 PCI: 00:14.3 scanning...
1331 01:49:08.532038 scan_static_bus for PCI: 00:14.3
1332 01:49:08.535433 GENERIC: 0.0 enabled
1333 01:49:08.538473 scan_static_bus for PCI: 00:14.3 done
1334 01:49:08.545804 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1335 01:49:08.546287 PCI: 00:15.0 scanning...
1336 01:49:08.548528 scan_static_bus for PCI: 00:15.0
1337 01:49:08.552499 I2C: 00:1a enabled
1338 01:49:08.555181 I2C: 00:31 enabled
1339 01:49:08.555557 I2C: 00:32 enabled
1340 01:49:08.558157 scan_static_bus for PCI: 00:15.0 done
1341 01:49:08.565050 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1342 01:49:08.568589 PCI: 00:15.1 scanning...
1343 01:49:08.571911 scan_static_bus for PCI: 00:15.1
1344 01:49:08.572395 I2C: 00:50 enabled
1345 01:49:08.575358 scan_static_bus for PCI: 00:15.1 done
1346 01:49:08.581767 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1347 01:49:08.582266 PCI: 00:15.3 scanning...
1348 01:49:08.585017 scan_static_bus for PCI: 00:15.3
1349 01:49:08.588517 I2C: 00:10 enabled
1350 01:49:08.591669 scan_static_bus for PCI: 00:15.3 done
1351 01:49:08.598194 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1352 01:49:08.598693 PCI: 00:19.1 scanning...
1353 01:49:08.601783 scan_static_bus for PCI: 00:19.1
1354 01:49:08.604976 I2C: 00:15 enabled
1355 01:49:08.608269 I2C: 00:2c enabled
1356 01:49:08.611681 scan_static_bus for PCI: 00:19.1 done
1357 01:49:08.615058 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1358 01:49:08.618319 PCI: 00:1e.3 scanning...
1359 01:49:08.621690 scan_generic_bus for PCI: 00:1e.3
1360 01:49:08.622175 SPI: 00 enabled
1361 01:49:08.628079 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1362 01:49:08.635056 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1363 01:49:08.635535 PCI: 00:1f.0 scanning...
1364 01:49:08.638096 scan_static_bus for PCI: 00:1f.0
1365 01:49:08.641301 PNP: 0c09.0 enabled
1366 01:49:08.644751 PNP: 0c09.0 scanning...
1367 01:49:08.648387 scan_static_bus for PNP: 0c09.0
1368 01:49:08.652005 scan_static_bus for PNP: 0c09.0 done
1369 01:49:08.654763 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1370 01:49:08.658120 scan_static_bus for PCI: 00:1f.0 done
1371 01:49:08.664912 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1372 01:49:08.668196 PCI: 00:1f.2 scanning...
1373 01:49:08.671389 scan_static_bus for PCI: 00:1f.2
1374 01:49:08.671880 GENERIC: 0.0 enabled
1375 01:49:08.674863 GENERIC: 0.0 scanning...
1376 01:49:08.677699 scan_static_bus for GENERIC: 0.0
1377 01:49:08.681316 GENERIC: 0.0 enabled
1378 01:49:08.681831 GENERIC: 1.0 enabled
1379 01:49:08.688861 scan_static_bus for GENERIC: 0.0 done
1380 01:49:08.691329 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1381 01:49:08.694415 scan_static_bus for PCI: 00:1f.2 done
1382 01:49:08.701472 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1383 01:49:08.701955 PCI: 00:1f.3 scanning...
1384 01:49:08.704453 scan_static_bus for PCI: 00:1f.3
1385 01:49:08.708210 scan_static_bus for PCI: 00:1f.3 done
1386 01:49:08.714480 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1387 01:49:08.717596 PCI: 00:1f.5 scanning...
1388 01:49:08.721166 scan_generic_bus for PCI: 00:1f.5
1389 01:49:08.724494 scan_generic_bus for PCI: 00:1f.5 done
1390 01:49:08.727725 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1391 01:49:08.734328 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1392 01:49:08.737835 scan_static_bus for Root Device done
1393 01:49:08.741039 scan_bus: bus Root Device finished in 729 msecs
1394 01:49:08.741553 done
1395 01:49:08.747519 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1396 01:49:08.754419 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1397 01:49:08.761559 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1398 01:49:08.764539 SPI flash protection: WPSW=0 SRP0=0
1399 01:49:08.767904 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1400 01:49:08.774204 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1401 01:49:08.777998 found VGA at PCI: 00:02.0
1402 01:49:08.782049 Setting up VGA for PCI: 00:02.0
1403 01:49:08.784650 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1404 01:49:08.790987 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1405 01:49:08.794450 Allocating resources...
1406 01:49:08.794930 Reading resources...
1407 01:49:08.800861 Root Device read_resources bus 0 link: 0
1408 01:49:08.804530 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1409 01:49:08.807722 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1410 01:49:08.814031 DOMAIN: 0000 read_resources bus 0 link: 0
1411 01:49:08.820920 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1412 01:49:08.824157 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1413 01:49:08.830423 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1414 01:49:08.837534 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1415 01:49:08.843813 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1416 01:49:08.850527 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1417 01:49:08.856718 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1418 01:49:08.863752 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1419 01:49:08.870181 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1420 01:49:08.877361 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1421 01:49:08.883730 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1422 01:49:08.890730 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1423 01:49:08.897011 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1424 01:49:08.900219 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1425 01:49:08.907017 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1426 01:49:08.913829 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1427 01:49:08.920358 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1428 01:49:08.926927 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1429 01:49:08.933483 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1430 01:49:08.940053 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1431 01:49:08.946724 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1432 01:49:08.950003 PCI: 00:04.0 read_resources bus 1 link: 0
1433 01:49:08.953737 PCI: 00:04.0 read_resources bus 1 link: 0 done
1434 01:49:08.959884 PCI: 00:06.0 read_resources bus 1 link: 0
1435 01:49:08.963561 PCI: 00:06.0 read_resources bus 1 link: 0 done
1436 01:49:08.966434 PCI: 00:0d.0 read_resources bus 0 link: 0
1437 01:49:08.973686 USB0 port 0 read_resources bus 0 link: 0
1438 01:49:08.976338 USB0 port 0 read_resources bus 0 link: 0 done
1439 01:49:08.980069 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1440 01:49:08.986771 PCI: 00:14.0 read_resources bus 0 link: 0
1441 01:49:08.990135 USB0 port 0 read_resources bus 0 link: 0
1442 01:49:08.993320 USB0 port 0 read_resources bus 0 link: 0 done
1443 01:49:09.000159 PCI: 00:14.0 read_resources bus 0 link: 0 done
1444 01:49:09.003099 PCI: 00:14.3 read_resources bus 0 link: 0
1445 01:49:09.006470 PCI: 00:14.3 read_resources bus 0 link: 0 done
1446 01:49:09.014169 PCI: 00:15.0 read_resources bus 0 link: 0
1447 01:49:09.017057 PCI: 00:15.0 read_resources bus 0 link: 0 done
1448 01:49:09.019884 PCI: 00:15.1 read_resources bus 0 link: 0
1449 01:49:09.026305 PCI: 00:15.1 read_resources bus 0 link: 0 done
1450 01:49:09.029801 PCI: 00:15.3 read_resources bus 0 link: 0
1451 01:49:09.032975 PCI: 00:15.3 read_resources bus 0 link: 0 done
1452 01:49:09.039724 PCI: 00:19.1 read_resources bus 0 link: 0
1453 01:49:09.042875 PCI: 00:19.1 read_resources bus 0 link: 0 done
1454 01:49:09.050299 PCI: 00:1e.3 read_resources bus 2 link: 0
1455 01:49:09.052832 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1456 01:49:09.056258 PCI: 00:1f.0 read_resources bus 0 link: 0
1457 01:49:09.062963 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1458 01:49:09.066425 PCI: 00:1f.2 read_resources bus 0 link: 0
1459 01:49:09.069181 GENERIC: 0.0 read_resources bus 0 link: 0
1460 01:49:09.075793 GENERIC: 0.0 read_resources bus 0 link: 0 done
1461 01:49:09.079350 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1462 01:49:09.086615 DOMAIN: 0000 read_resources bus 0 link: 0 done
1463 01:49:09.089780 Root Device read_resources bus 0 link: 0 done
1464 01:49:09.092628 Done reading resources.
1465 01:49:09.096632 Show resources in subtree (Root Device)...After reading.
1466 01:49:09.102960 Root Device child on link 0 CPU_CLUSTER: 0
1467 01:49:09.106326 CPU_CLUSTER: 0 child on link 0 APIC: 00
1468 01:49:09.106811 APIC: 00
1469 01:49:09.109881 APIC: 14
1470 01:49:09.110358 APIC: 16
1471 01:49:09.110628 APIC: 10
1472 01:49:09.112656 APIC: 12
1473 01:49:09.112994 APIC: 01
1474 01:49:09.116362 APIC: 08
1475 01:49:09.116839 APIC: 09
1476 01:49:09.119576 DOMAIN: 0000 child on link 0 GPIO: 0
1477 01:49:09.129459 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1478 01:49:09.139492 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1479 01:49:09.139988 GPIO: 0
1480 01:49:09.142803 PCI: 00:00.0
1481 01:49:09.152675 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1482 01:49:09.162585 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1483 01:49:09.169508 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1484 01:49:09.179084 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1485 01:49:09.189424 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1486 01:49:09.199303 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1487 01:49:09.209184 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1488 01:49:09.219076 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1489 01:49:09.225625 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1490 01:49:09.235545 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1491 01:49:09.245940 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1492 01:49:09.255176 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1493 01:49:09.265353 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1494 01:49:09.275829 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1495 01:49:09.284891 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1496 01:49:09.291878 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1497 01:49:09.301406 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1498 01:49:09.312332 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1499 01:49:09.321451 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1500 01:49:09.331741 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1501 01:49:09.341776 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1502 01:49:09.351237 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1503 01:49:09.357971 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1504 01:49:09.368028 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1505 01:49:09.378047 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1506 01:49:09.388237 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1507 01:49:09.398202 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1508 01:49:09.407926 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1509 01:49:09.408399 PCI: 00:02.0
1510 01:49:09.420912 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1511 01:49:09.430780 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1512 01:49:09.437964 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1513 01:49:09.444065 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1514 01:49:09.454979 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1515 01:49:09.455442 GENERIC: 0.0
1516 01:49:09.457510 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1517 01:49:09.467626 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1518 01:49:09.477972 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1519 01:49:09.486925 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1520 01:49:09.487019 PCI: 01:00.0
1521 01:49:09.497989 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1522 01:49:09.507656 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1523 01:49:09.510695 PCI: 00:08.0
1524 01:49:09.511145 PCI: 00:0a.0
1525 01:49:09.520727 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1526 01:49:09.527619 PCI: 00:0d.0 child on link 0 USB0 port 0
1527 01:49:09.537215 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1528 01:49:09.540940 USB0 port 0 child on link 0 USB3 port 0
1529 01:49:09.543571 USB3 port 0
1530 01:49:09.543849 USB3 port 1
1531 01:49:09.547359 USB3 port 2
1532 01:49:09.547835 USB3 port 3
1533 01:49:09.551005 PCI: 00:14.0 child on link 0 USB0 port 0
1534 01:49:09.560942 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1535 01:49:09.567338 USB0 port 0 child on link 0 USB2 port 0
1536 01:49:09.567827 USB2 port 0
1537 01:49:09.570524 USB2 port 1
1538 01:49:09.571010 USB2 port 2
1539 01:49:09.574055 USB2 port 3
1540 01:49:09.574544 USB2 port 4
1541 01:49:09.576839 USB2 port 5
1542 01:49:09.580323 USB2 port 6
1543 01:49:09.580721 USB2 port 7
1544 01:49:09.583915 USB2 port 8
1545 01:49:09.584274 USB2 port 9
1546 01:49:09.587163 USB3 port 0
1547 01:49:09.587743 USB3 port 1
1548 01:49:09.590391 USB3 port 2
1549 01:49:09.590847 USB3 port 3
1550 01:49:09.593769 PCI: 00:14.2
1551 01:49:09.603788 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1552 01:49:09.613951 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1553 01:49:09.617467 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1554 01:49:09.627195 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1555 01:49:09.630828 GENERIC: 0.0
1556 01:49:09.634059 PCI: 00:15.0 child on link 0 I2C: 00:1a
1557 01:49:09.644154 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1558 01:49:09.644643 I2C: 00:1a
1559 01:49:09.646848 I2C: 00:31
1560 01:49:09.647222 I2C: 00:32
1561 01:49:09.653913 PCI: 00:15.1 child on link 0 I2C: 00:50
1562 01:49:09.663319 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1563 01:49:09.663845 I2C: 00:50
1564 01:49:09.666647 PCI: 00:15.2
1565 01:49:09.670277 PCI: 00:15.3 child on link 0 I2C: 00:10
1566 01:49:09.680239 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1567 01:49:09.680731 I2C: 00:10
1568 01:49:09.683234 PCI: 00:16.0
1569 01:49:09.693438 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1570 01:49:09.693930 PCI: 00:19.0
1571 01:49:09.700349 PCI: 00:19.1 child on link 0 I2C: 00:15
1572 01:49:09.710265 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1573 01:49:09.710752 I2C: 00:15
1574 01:49:09.713536 I2C: 00:2c
1575 01:49:09.714028 PCI: 00:1e.0
1576 01:49:09.723137 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1577 01:49:09.730077 PCI: 00:1e.3 child on link 0 SPI: 00
1578 01:49:09.740264 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1579 01:49:09.740758 SPI: 00
1580 01:49:09.743367 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1581 01:49:09.753274 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1582 01:49:09.756360 PNP: 0c09.0
1583 01:49:09.762944 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1584 01:49:09.769864 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1585 01:49:09.776414 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1586 01:49:09.786244 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1587 01:49:09.793242 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1588 01:49:09.793675 GENERIC: 0.0
1589 01:49:09.796121 GENERIC: 1.0
1590 01:49:09.796541 PCI: 00:1f.3
1591 01:49:09.806063 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1592 01:49:09.816136 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1593 01:49:09.819714 PCI: 00:1f.5
1594 01:49:09.826262 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1595 01:49:09.836454 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1596 01:49:09.839701 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1597 01:49:09.846510 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1598 01:49:09.853170 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1599 01:49:09.856459 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1600 01:49:09.863362 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1601 01:49:09.869321 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1602 01:49:09.875914 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1603 01:49:09.882713 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1604 01:49:09.889433 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1605 01:49:09.895776 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1606 01:49:09.905585 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1607 01:49:09.912896 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1608 01:49:09.919279 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1609 01:49:09.922494 DOMAIN: 0000: Resource ranges:
1610 01:49:09.925763 * Base: 1000, Size: 800, Tag: 100
1611 01:49:09.929213 * Base: 1900, Size: e700, Tag: 100
1612 01:49:09.935619 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1613 01:49:09.942796 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1614 01:49:09.948954 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1615 01:49:09.955672 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1616 01:49:09.965761 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1617 01:49:09.972346 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1618 01:49:09.978762 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1619 01:49:09.988889 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1620 01:49:09.995512 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1621 01:49:10.002010 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1622 01:49:10.012173 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1623 01:49:10.018574 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1624 01:49:10.025452 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1625 01:49:10.035439 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1626 01:49:10.041557 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1627 01:49:10.048548 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1628 01:49:10.058389 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1629 01:49:10.064871 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1630 01:49:10.072095 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1631 01:49:10.081373 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1632 01:49:10.088087 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1633 01:49:10.095109 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1634 01:49:10.101554 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1635 01:49:10.111387 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1636 01:49:10.117742 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1637 01:49:10.124255 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1638 01:49:10.134289 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1639 01:49:10.140739 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1640 01:49:10.150734 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1641 01:49:10.157261 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1642 01:49:10.164117 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1643 01:49:10.174299 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1644 01:49:10.180260 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1645 01:49:10.184168 DOMAIN: 0000: Resource ranges:
1646 01:49:10.187333 * Base: 80400000, Size: 3fc00000, Tag: 200
1647 01:49:10.190698 * Base: d0000000, Size: 28000000, Tag: 200
1648 01:49:10.197309 * Base: fa000000, Size: 1000000, Tag: 200
1649 01:49:10.200382 * Base: fb001000, Size: 17ff000, Tag: 200
1650 01:49:10.204513 * Base: fe800000, Size: 300000, Tag: 200
1651 01:49:10.210589 * Base: feb80000, Size: 80000, Tag: 200
1652 01:49:10.213928 * Base: fed00000, Size: 40000, Tag: 200
1653 01:49:10.217173 * Base: fed70000, Size: 10000, Tag: 200
1654 01:49:10.220702 * Base: fed88000, Size: 8000, Tag: 200
1655 01:49:10.224189 * Base: fed93000, Size: d000, Tag: 200
1656 01:49:10.230757 * Base: feda2000, Size: 1e000, Tag: 200
1657 01:49:10.233853 * Base: fede0000, Size: 1220000, Tag: 200
1658 01:49:10.237074 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1659 01:49:10.247102 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1660 01:49:10.253756 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1661 01:49:10.259752 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1662 01:49:10.267255 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1663 01:49:10.274104 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1664 01:49:10.281540 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1665 01:49:10.286798 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1666 01:49:10.293359 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1667 01:49:10.300369 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1668 01:49:10.306739 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1669 01:49:10.313074 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1670 01:49:10.319872 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1671 01:49:10.326720 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1672 01:49:10.333337 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1673 01:49:10.340186 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1674 01:49:10.346613 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1675 01:49:10.353275 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1676 01:49:10.359514 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1677 01:49:10.366427 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1678 01:49:10.373076 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1679 01:49:10.379934 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1680 01:49:10.383186 PCI: 00:06.0: Resource ranges:
1681 01:49:10.386444 * Base: 80400000, Size: 100000, Tag: 200
1682 01:49:10.393362 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1683 01:49:10.400258 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1684 01:49:10.409527 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1685 01:49:10.416507 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1686 01:49:10.419850 Root Device assign_resources, bus 0 link: 0
1687 01:49:10.426426 DOMAIN: 0000 assign_resources, bus 0 link: 0
1688 01:49:10.433160 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1689 01:49:10.442981 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1690 01:49:10.449448 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1691 01:49:10.456544 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1692 01:49:10.462434 PCI: 00:04.0 assign_resources, bus 1 link: 0
1693 01:49:10.466022 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1694 01:49:10.475969 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1695 01:49:10.485833 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1696 01:49:10.493009 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1697 01:49:10.499319 PCI: 00:06.0 assign_resources, bus 1 link: 0
1698 01:49:10.506236 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1699 01:49:10.515626 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1700 01:49:10.519163 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1701 01:49:10.529204 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1702 01:49:10.535662 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1703 01:49:10.538854 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1704 01:49:10.545769 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1705 01:49:10.552372 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1706 01:49:10.558838 PCI: 00:14.0 assign_resources, bus 0 link: 0
1707 01:49:10.561879 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1708 01:49:10.572124 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1709 01:49:10.578386 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1710 01:49:10.584978 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1711 01:49:10.591777 PCI: 00:14.3 assign_resources, bus 0 link: 0
1712 01:49:10.595403 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1713 01:49:10.605420 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1714 01:49:10.608422 PCI: 00:15.0 assign_resources, bus 0 link: 0
1715 01:49:10.614986 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1716 01:49:10.621511 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1717 01:49:10.624721 PCI: 00:15.1 assign_resources, bus 0 link: 0
1718 01:49:10.631785 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1719 01:49:10.638395 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1720 01:49:10.645256 PCI: 00:15.3 assign_resources, bus 0 link: 0
1721 01:49:10.647988 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1722 01:49:10.658226 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1723 01:49:10.664717 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1724 01:49:10.668120 PCI: 00:19.1 assign_resources, bus 0 link: 0
1725 01:49:10.674809 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1726 01:49:10.681725 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1727 01:49:10.688378 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1728 01:49:10.691157 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1729 01:49:10.694546 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1730 01:49:10.701000 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1731 01:49:10.704938 LPC: Trying to open IO window from 800 size 1ff
1732 01:49:10.714369 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1733 01:49:10.721237 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1734 01:49:10.731392 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1735 01:49:10.734541 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1736 01:49:10.741117 Root Device assign_resources, bus 0 link: 0 done
1737 01:49:10.741636 Done setting resources.
1738 01:49:10.747968 Show resources in subtree (Root Device)...After assigning values.
1739 01:49:10.754219 Root Device child on link 0 CPU_CLUSTER: 0
1740 01:49:10.757493 CPU_CLUSTER: 0 child on link 0 APIC: 00
1741 01:49:10.757822 APIC: 00
1742 01:49:10.760858 APIC: 14
1743 01:49:10.761149 APIC: 16
1744 01:49:10.761458 APIC: 10
1745 01:49:10.764281 APIC: 12
1746 01:49:10.764658 APIC: 01
1747 01:49:10.764925 APIC: 08
1748 01:49:10.767854 APIC: 09
1749 01:49:10.771028 DOMAIN: 0000 child on link 0 GPIO: 0
1750 01:49:10.781053 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1751 01:49:10.791182 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1752 01:49:10.791678 GPIO: 0
1753 01:49:10.794489 PCI: 00:00.0
1754 01:49:10.803902 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1755 01:49:10.810582 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1756 01:49:10.821198 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1757 01:49:10.831130 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1758 01:49:10.841074 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1759 01:49:10.850640 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1760 01:49:10.861100 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1761 01:49:10.867032 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1762 01:49:10.877525 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1763 01:49:10.887183 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1764 01:49:10.896854 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1765 01:49:10.907016 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1766 01:49:10.916891 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1767 01:49:10.923967 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1768 01:49:10.933650 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1769 01:49:10.943872 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1770 01:49:10.954022 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1771 01:49:10.963060 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1772 01:49:10.973170 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1773 01:49:10.983002 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1774 01:49:10.993152 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1775 01:49:10.999586 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1776 01:49:11.010196 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1777 01:49:11.019913 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1778 01:49:11.029759 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1779 01:49:11.039740 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1780 01:49:11.049788 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1781 01:49:11.059615 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1782 01:49:11.060123 PCI: 00:02.0
1783 01:49:11.069148 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1784 01:49:11.082661 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1785 01:49:11.089529 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1786 01:49:11.095927 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1787 01:49:11.106196 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1788 01:49:11.106693 GENERIC: 0.0
1789 01:49:11.112557 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1790 01:49:11.122548 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1791 01:49:11.132565 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1792 01:49:11.142583 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1793 01:49:11.146160 PCI: 01:00.0
1794 01:49:11.155846 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1795 01:49:11.165249 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1796 01:49:11.168584 PCI: 00:08.0
1797 01:49:11.168934 PCI: 00:0a.0
1798 01:49:11.179442 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1799 01:49:11.185302 PCI: 00:0d.0 child on link 0 USB0 port 0
1800 01:49:11.195108 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1801 01:49:11.198407 USB0 port 0 child on link 0 USB3 port 0
1802 01:49:11.201701 USB3 port 0
1803 01:49:11.202104 USB3 port 1
1804 01:49:11.205279 USB3 port 2
1805 01:49:11.205665 USB3 port 3
1806 01:49:11.208755 PCI: 00:14.0 child on link 0 USB0 port 0
1807 01:49:11.221664 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1808 01:49:11.225142 USB0 port 0 child on link 0 USB2 port 0
1809 01:49:11.225681 USB2 port 0
1810 01:49:11.228618 USB2 port 1
1811 01:49:11.231704 USB2 port 2
1812 01:49:11.232140 USB2 port 3
1813 01:49:11.235267 USB2 port 4
1814 01:49:11.235760 USB2 port 5
1815 01:49:11.238613 USB2 port 6
1816 01:49:11.239096 USB2 port 7
1817 01:49:11.241965 USB2 port 8
1818 01:49:11.242452 USB2 port 9
1819 01:49:11.245006 USB3 port 0
1820 01:49:11.245301 USB3 port 1
1821 01:49:11.248071 USB3 port 2
1822 01:49:11.248419 USB3 port 3
1823 01:49:11.251629 PCI: 00:14.2
1824 01:49:11.261852 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1825 01:49:11.271689 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1826 01:49:11.277818 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1827 01:49:11.288363 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1828 01:49:11.288856 GENERIC: 0.0
1829 01:49:11.291597 PCI: 00:15.0 child on link 0 I2C: 00:1a
1830 01:49:11.304640 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1831 01:49:11.305137 I2C: 00:1a
1832 01:49:11.308191 I2C: 00:31
1833 01:49:11.308677 I2C: 00:32
1834 01:49:11.311165 PCI: 00:15.1 child on link 0 I2C: 00:50
1835 01:49:11.321237 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1836 01:49:11.324978 I2C: 00:50
1837 01:49:11.325507 PCI: 00:15.2
1838 01:49:11.331107 PCI: 00:15.3 child on link 0 I2C: 00:10
1839 01:49:11.341214 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1840 01:49:11.341750 I2C: 00:10
1841 01:49:11.344465 PCI: 00:16.0
1842 01:49:11.354482 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1843 01:49:11.354978 PCI: 00:19.0
1844 01:49:11.361739 PCI: 00:19.1 child on link 0 I2C: 00:15
1845 01:49:11.371414 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1846 01:49:11.371910 I2C: 00:15
1847 01:49:11.374851 I2C: 00:2c
1848 01:49:11.375341 PCI: 00:1e.0
1849 01:49:11.387955 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1850 01:49:11.391206 PCI: 00:1e.3 child on link 0 SPI: 00
1851 01:49:11.401347 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1852 01:49:11.401877 SPI: 00
1853 01:49:11.407927 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1854 01:49:11.414050 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1855 01:49:11.417881 PNP: 0c09.0
1856 01:49:11.423888 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1857 01:49:11.431065 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1858 01:49:11.441012 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1859 01:49:11.447252 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1860 01:49:11.453860 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1861 01:49:11.454330 GENERIC: 0.0
1862 01:49:11.457438 GENERIC: 1.0
1863 01:49:11.457837 PCI: 00:1f.3
1864 01:49:11.470455 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1865 01:49:11.480570 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1866 01:49:11.481055 PCI: 00:1f.5
1867 01:49:11.491086 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1868 01:49:11.493816 Done allocating resources.
1869 01:49:11.500624 BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2717 ms
1870 01:49:11.507232 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1871 01:49:11.510014 Configure audio over I2S with MAX98373 NAU88L25B.
1872 01:49:11.515488 Enabling BT offload
1873 01:49:11.522639 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1874 01:49:11.526074 Enabling resources...
1875 01:49:11.529134 PCI: 00:00.0 subsystem <- 8086/4609
1876 01:49:11.532731 PCI: 00:00.0 cmd <- 06
1877 01:49:11.535612 PCI: 00:02.0 subsystem <- 8086/46b3
1878 01:49:11.539307 PCI: 00:02.0 cmd <- 03
1879 01:49:11.542483 PCI: 00:04.0 subsystem <- 8086/461d
1880 01:49:11.542960 PCI: 00:04.0 cmd <- 02
1881 01:49:11.545511 PCI: 00:06.0 bridge ctrl <- 0013
1882 01:49:11.548974 PCI: 00:06.0 subsystem <- 8086/464d
1883 01:49:11.552381 PCI: 00:06.0 cmd <- 106
1884 01:49:11.555480 PCI: 00:0a.0 subsystem <- 8086/467d
1885 01:49:11.559146 PCI: 00:0a.0 cmd <- 02
1886 01:49:11.562044 PCI: 00:0d.0 subsystem <- 8086/461e
1887 01:49:11.565208 PCI: 00:0d.0 cmd <- 02
1888 01:49:11.568580 PCI: 00:14.0 subsystem <- 8086/51ed
1889 01:49:11.572165 PCI: 00:14.0 cmd <- 02
1890 01:49:11.575555 PCI: 00:14.2 subsystem <- 8086/51ef
1891 01:49:11.576092 PCI: 00:14.2 cmd <- 02
1892 01:49:11.581880 PCI: 00:14.3 subsystem <- 8086/51f0
1893 01:49:11.582307 PCI: 00:14.3 cmd <- 02
1894 01:49:11.585406 PCI: 00:15.0 subsystem <- 8086/51e8
1895 01:49:11.589141 PCI: 00:15.0 cmd <- 02
1896 01:49:11.591829 PCI: 00:15.1 subsystem <- 8086/51e9
1897 01:49:11.595180 PCI: 00:15.1 cmd <- 06
1898 01:49:11.598945 PCI: 00:15.3 subsystem <- 8086/51eb
1899 01:49:11.602130 PCI: 00:15.3 cmd <- 02
1900 01:49:11.605098 PCI: 00:16.0 subsystem <- 8086/51e0
1901 01:49:11.608405 PCI: 00:16.0 cmd <- 02
1902 01:49:11.611655 PCI: 00:19.1 subsystem <- 8086/51c6
1903 01:49:11.612037 PCI: 00:19.1 cmd <- 02
1904 01:49:11.614918 PCI: 00:1e.0 subsystem <- 8086/51a8
1905 01:49:11.618366 PCI: 00:1e.0 cmd <- 06
1906 01:49:11.622004 PCI: 00:1e.3 subsystem <- 8086/51ab
1907 01:49:11.624969 PCI: 00:1e.3 cmd <- 02
1908 01:49:11.628695 PCI: 00:1f.0 subsystem <- 8086/5182
1909 01:49:11.631742 PCI: 00:1f.0 cmd <- 407
1910 01:49:11.634835 PCI: 00:1f.3 subsystem <- 8086/51c8
1911 01:49:11.638567 PCI: 00:1f.3 cmd <- 02
1912 01:49:11.641698 PCI: 00:1f.5 subsystem <- 8086/51a4
1913 01:49:11.642178 PCI: 00:1f.5 cmd <- 406
1914 01:49:11.644720 PCI: 01:00.0 cmd <- 02
1915 01:49:11.645250 done.
1916 01:49:11.651938 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1917 01:49:11.654922 ME: Version: Unavailable
1918 01:49:11.661683 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1919 01:49:11.662159 Initializing devices...
1920 01:49:11.664314 Root Device init
1921 01:49:11.664657 mainboard: EC init
1922 01:49:11.671328 Chrome EC: Set SMI mask to 0x0000000000000000
1923 01:49:11.674673 Chrome EC: UHEPI supported
1924 01:49:11.681087 Chrome EC: clear events_b mask to 0x0000000000000000
1925 01:49:11.684530 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1926 01:49:11.691327 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1927 01:49:11.698222 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1928 01:49:11.704681 Chrome EC: Set WAKE mask to 0x0000000000000000
1929 01:49:11.707886 Root Device init finished in 40 msecs
1930 01:49:11.711441 PCI: 00:00.0 init
1931 01:49:11.714259 CPU TDP = 15 Watts
1932 01:49:11.714739 CPU PL1 = 15 Watts
1933 01:49:11.718002 CPU PL2 = 55 Watts
1934 01:49:11.718478 CPU PL4 = 123 Watts
1935 01:49:11.724499 PCI: 00:00.0 init finished in 8 msecs
1936 01:49:11.724986 PCI: 00:02.0 init
1937 01:49:11.727760 GMA: Found VBT in CBFS
1938 01:49:11.731113 GMA: Found valid VBT in CBFS
1939 01:49:11.737926 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1940 01:49:11.743860 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1941 01:49:11.747533 PCI: 00:02.0 init finished in 18 msecs
1942 01:49:11.750581 PCI: 00:06.0 init
1943 01:49:11.750963 Initializing PCH PCIe bridge.
1944 01:49:11.757225 PCI: 00:06.0 init finished in 3 msecs
1945 01:49:11.757754 PCI: 00:0a.0 init
1946 01:49:11.761341 PCI: 00:0a.0 init finished in 0 msecs
1947 01:49:11.763801 PCI: 00:14.0 init
1948 01:49:11.767145 PCI: 00:14.0 init finished in 0 msecs
1949 01:49:11.770440 PCI: 00:14.2 init
1950 01:49:11.774114 PCI: 00:14.2 init finished in 0 msecs
1951 01:49:11.774593 PCI: 00:15.0 init
1952 01:49:11.777707 I2C bus 0 version 0x3230302a
1953 01:49:11.780232 DW I2C bus 0 at 0x80655000 (400 KHz)
1954 01:49:11.787282 PCI: 00:15.0 init finished in 6 msecs
1955 01:49:11.787762 PCI: 00:15.1 init
1956 01:49:11.790545 I2C bus 1 version 0x3230302a
1957 01:49:11.793708 DW I2C bus 1 at 0x80656000 (400 KHz)
1958 01:49:11.796961 PCI: 00:15.1 init finished in 6 msecs
1959 01:49:11.800084 PCI: 00:15.3 init
1960 01:49:11.803451 I2C bus 3 version 0x3230302a
1961 01:49:11.807029 DW I2C bus 3 at 0x80657000 (400 KHz)
1962 01:49:11.810446 PCI: 00:15.3 init finished in 6 msecs
1963 01:49:11.813338 PCI: 00:16.0 init
1964 01:49:11.816824 PCI: 00:16.0 init finished in 0 msecs
1965 01:49:11.817200 PCI: 00:19.1 init
1966 01:49:11.820426 I2C bus 5 version 0x3230302a
1967 01:49:11.823608 DW I2C bus 5 at 0x80659000 (400 KHz)
1968 01:49:11.827231 PCI: 00:19.1 init finished in 6 msecs
1969 01:49:11.830427 PCI: 00:1f.0 init
1970 01:49:11.834080 IOAPIC: Initializing IOAPIC at 0xfec00000
1971 01:49:11.837029 IOAPIC: ID = 0x02
1972 01:49:11.840273 IOAPIC: Dumping registers
1973 01:49:11.840752 reg 0x0000: 0x02000000
1974 01:49:11.843530 reg 0x0001: 0x00770020
1975 01:49:11.847251 reg 0x0002: 0x00000000
1976 01:49:11.850138 IOAPIC: 120 interrupts
1977 01:49:11.853823 IOAPIC: Clearing IOAPIC at 0xfec00000
1978 01:49:11.856614 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1979 01:49:11.863002 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1980 01:49:11.866822 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1981 01:49:11.873459 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1982 01:49:11.876613 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1983 01:49:11.880300 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1984 01:49:11.886739 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1985 01:49:11.889789 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1986 01:49:11.896667 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1987 01:49:11.899887 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1988 01:49:11.906771 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1989 01:49:11.910251 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1990 01:49:11.916283 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1991 01:49:11.920451 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1992 01:49:11.923365 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1993 01:49:11.930397 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1994 01:49:11.932931 IOAPIC: vector 0x10 value 0x00000000 0x00010000
1995 01:49:11.939929 IOAPIC: vector 0x11 value 0x00000000 0x00010000
1996 01:49:11.943106 IOAPIC: vector 0x12 value 0x00000000 0x00010000
1997 01:49:11.949754 IOAPIC: vector 0x13 value 0x00000000 0x00010000
1998 01:49:11.953128 IOAPIC: vector 0x14 value 0x00000000 0x00010000
1999 01:49:11.959501 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2000 01:49:11.963152 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2001 01:49:11.966080 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2002 01:49:11.973074 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2003 01:49:11.976296 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2004 01:49:11.983053 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2005 01:49:11.986757 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2006 01:49:11.993339 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2007 01:49:11.996352 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2008 01:49:11.999719 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2009 01:49:12.006211 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2010 01:49:12.009819 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2011 01:49:12.017700 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2012 01:49:12.020047 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2013 01:49:12.026094 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2014 01:49:12.029548 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2015 01:49:12.036316 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2016 01:49:12.039886 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2017 01:49:12.042723 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2018 01:49:12.049876 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2019 01:49:12.052763 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2020 01:49:12.059629 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2021 01:49:12.062542 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2022 01:49:12.069094 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2023 01:49:12.072841 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2024 01:49:12.079466 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2025 01:49:12.083015 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2026 01:49:12.085938 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2027 01:49:12.092795 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2028 01:49:12.096085 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2029 01:49:12.102526 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2030 01:49:12.106144 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2031 01:49:12.112557 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2032 01:49:12.116208 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2033 01:49:12.122645 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2034 01:49:12.125316 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2035 01:49:12.130205 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2036 01:49:12.135821 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2037 01:49:12.138999 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2038 01:49:12.145954 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2039 01:49:12.149172 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2040 01:49:12.155636 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2041 01:49:12.159352 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2042 01:49:12.165239 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2043 01:49:12.168734 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2044 01:49:12.172375 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2045 01:49:12.179131 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2046 01:49:12.182033 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2047 01:49:12.188717 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2048 01:49:12.192234 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2049 01:49:12.198878 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2050 01:49:12.201763 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2051 01:49:12.208602 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2052 01:49:12.212060 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2053 01:49:12.215297 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2054 01:49:12.222260 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2055 01:49:12.225010 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2056 01:49:12.231963 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2057 01:49:12.235303 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2058 01:49:12.241640 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2059 01:49:12.245345 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2060 01:49:12.252351 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2061 01:49:12.255224 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2062 01:49:12.258513 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2063 01:49:12.265340 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2064 01:49:12.268120 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2065 01:49:12.275269 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2066 01:49:12.278580 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2067 01:49:12.285636 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2068 01:49:12.288201 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2069 01:49:12.294702 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2070 01:49:12.298450 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2071 01:49:12.302079 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2072 01:49:12.308465 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2073 01:49:12.311761 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2074 01:49:12.318339 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2075 01:49:12.321174 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2076 01:49:12.328469 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2077 01:49:12.331705 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2078 01:49:12.335357 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2079 01:49:12.341863 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2080 01:49:12.344906 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2081 01:49:12.351514 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2082 01:49:12.355187 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2083 01:49:12.361462 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2084 01:49:12.365044 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2085 01:49:12.371302 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2086 01:49:12.374831 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2087 01:49:12.378332 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2088 01:49:12.385147 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2089 01:49:12.388104 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2090 01:49:12.395078 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2091 01:49:12.398145 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2092 01:49:12.405059 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2093 01:49:12.408035 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2094 01:49:12.415016 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2095 01:49:12.418200 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2096 01:49:12.421445 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2097 01:49:12.428497 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2098 01:49:12.431279 IOAPIC: Bootstrap Processor Local APIC = 0x00
2099 01:49:12.438229 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2100 01:49:12.441411 PCI: 00:1f.0 init finished in 607 msecs
2101 01:49:12.444388 PCI: 00:1f.2 init
2102 01:49:12.448429 apm_control: Disabling ACPI.
2103 01:49:12.448903 APMC done.
2104 01:49:12.454761 PCI: 00:1f.2 init finished in 6 msecs
2105 01:49:12.455245 PCI: 00:1f.3 init
2106 01:49:12.458334 PCI: 00:1f.3 init finished in 0 msecs
2107 01:49:12.461376 PCI: 01:00.0 init
2108 01:49:12.464447 PCI: 01:00.0 init finished in 0 msecs
2109 01:49:12.468175 PNP: 0c09.0 init
2110 01:49:12.471173 Google Chrome EC uptime: 12.113 seconds
2111 01:49:12.474708 Google Chrome AP resets since EC boot: 1
2112 01:49:12.481471 Google Chrome most recent AP reset causes:
2113 01:49:12.484125 0.341: 32775 shutdown: entering G3
2114 01:49:12.491103 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2115 01:49:12.494292 PNP: 0c09.0 init finished in 23 msecs
2116 01:49:12.494659 GENERIC: 0.0 init
2117 01:49:12.497354 GENERIC: 0.0 init finished in 0 msecs
2118 01:49:12.501086 GENERIC: 1.0 init
2119 01:49:12.504146 GENERIC: 1.0 init finished in 0 msecs
2120 01:49:12.507791 Devices initialized
2121 01:49:12.511185 Show all devs... After init.
2122 01:49:12.511676 Root Device: enabled 1
2123 01:49:12.514318 CPU_CLUSTER: 0: enabled 1
2124 01:49:12.518238 DOMAIN: 0000: enabled 1
2125 01:49:12.520756 GPIO: 0: enabled 1
2126 01:49:12.521229 PCI: 00:00.0: enabled 1
2127 01:49:12.524501 PCI: 00:01.0: enabled 0
2128 01:49:12.527209 PCI: 00:01.1: enabled 0
2129 01:49:12.527596 PCI: 00:02.0: enabled 1
2130 01:49:12.531145 PCI: 00:04.0: enabled 1
2131 01:49:12.534604 PCI: 00:05.0: enabled 0
2132 01:49:12.537086 PCI: 00:06.0: enabled 1
2133 01:49:12.537406 PCI: 00:06.2: enabled 0
2134 01:49:12.541013 PCI: 00:07.0: enabled 0
2135 01:49:12.544042 PCI: 00:07.1: enabled 0
2136 01:49:12.547549 PCI: 00:07.2: enabled 0
2137 01:49:12.548031 PCI: 00:07.3: enabled 0
2138 01:49:12.550886 PCI: 00:08.0: enabled 0
2139 01:49:12.555014 PCI: 00:09.0: enabled 0
2140 01:49:12.557481 PCI: 00:0a.0: enabled 1
2141 01:49:12.557955 PCI: 00:0d.0: enabled 1
2142 01:49:12.560704 PCI: 00:0d.1: enabled 0
2143 01:49:12.564157 PCI: 00:0d.2: enabled 0
2144 01:49:12.567386 PCI: 00:0d.3: enabled 0
2145 01:49:12.567862 PCI: 00:0e.0: enabled 0
2146 01:49:12.570377 PCI: 00:10.0: enabled 0
2147 01:49:12.574030 PCI: 00:10.1: enabled 0
2148 01:49:12.574519 PCI: 00:10.6: enabled 0
2149 01:49:12.577487 PCI: 00:10.7: enabled 0
2150 01:49:12.580558 PCI: 00:12.0: enabled 0
2151 01:49:12.584209 PCI: 00:12.6: enabled 0
2152 01:49:12.584708 PCI: 00:12.7: enabled 0
2153 01:49:12.587338 PCI: 00:13.0: enabled 0
2154 01:49:12.590790 PCI: 00:14.0: enabled 1
2155 01:49:12.593814 PCI: 00:14.1: enabled 0
2156 01:49:12.594134 PCI: 00:14.2: enabled 1
2157 01:49:12.597163 PCI: 00:14.3: enabled 1
2158 01:49:12.600572 PCI: 00:15.0: enabled 1
2159 01:49:12.603874 PCI: 00:15.1: enabled 1
2160 01:49:12.604265 PCI: 00:15.2: enabled 0
2161 01:49:12.607337 PCI: 00:15.3: enabled 1
2162 01:49:12.610752 PCI: 00:16.0: enabled 1
2163 01:49:12.611251 PCI: 00:16.1: enabled 0
2164 01:49:12.614004 PCI: 00:16.2: enabled 0
2165 01:49:12.617294 PCI: 00:16.3: enabled 0
2166 01:49:12.620383 PCI: 00:16.4: enabled 0
2167 01:49:12.620769 PCI: 00:16.5: enabled 0
2168 01:49:12.623831 PCI: 00:17.0: enabled 0
2169 01:49:12.627163 PCI: 00:19.0: enabled 0
2170 01:49:12.630335 PCI: 00:19.1: enabled 1
2171 01:49:12.630839 PCI: 00:19.2: enabled 0
2172 01:49:12.633626 PCI: 00:1a.0: enabled 0
2173 01:49:12.637371 PCI: 00:1c.0: enabled 0
2174 01:49:12.640700 PCI: 00:1c.1: enabled 0
2175 01:49:12.641179 PCI: 00:1c.2: enabled 0
2176 01:49:12.643767 PCI: 00:1c.3: enabled 0
2177 01:49:12.647208 PCI: 00:1c.4: enabled 0
2178 01:49:12.650107 PCI: 00:1c.5: enabled 0
2179 01:49:12.650494 PCI: 00:1c.6: enabled 0
2180 01:49:12.653521 PCI: 00:1c.7: enabled 0
2181 01:49:12.657135 PCI: 00:1d.0: enabled 0
2182 01:49:12.657651 PCI: 00:1d.1: enabled 0
2183 01:49:12.660190 PCI: 00:1d.2: enabled 0
2184 01:49:12.664091 PCI: 00:1d.3: enabled 0
2185 01:49:12.666772 PCI: 00:1e.0: enabled 1
2186 01:49:12.667171 PCI: 00:1e.1: enabled 0
2187 01:49:12.670051 PCI: 00:1e.2: enabled 0
2188 01:49:12.673686 PCI: 00:1e.3: enabled 1
2189 01:49:12.676759 PCI: 00:1f.0: enabled 1
2190 01:49:12.677231 PCI: 00:1f.1: enabled 0
2191 01:49:12.680539 PCI: 00:1f.2: enabled 1
2192 01:49:12.683724 PCI: 00:1f.3: enabled 1
2193 01:49:12.686628 PCI: 00:1f.4: enabled 0
2194 01:49:12.687026 PCI: 00:1f.5: enabled 1
2195 01:49:12.689785 PCI: 00:1f.6: enabled 0
2196 01:49:12.693994 PCI: 00:1f.7: enabled 0
2197 01:49:12.696875 GENERIC: 0.0: enabled 1
2198 01:49:12.697351 GENERIC: 0.0: enabled 1
2199 01:49:12.700623 GENERIC: 1.0: enabled 1
2200 01:49:12.703227 GENERIC: 0.0: enabled 1
2201 01:49:12.703607 GENERIC: 1.0: enabled 1
2202 01:49:12.706717 USB0 port 0: enabled 1
2203 01:49:12.710077 USB0 port 0: enabled 1
2204 01:49:12.713453 GENERIC: 0.0: enabled 1
2205 01:49:12.713931 I2C: 00:1a: enabled 1
2206 01:49:12.716725 I2C: 00:31: enabled 1
2207 01:49:12.720189 I2C: 00:32: enabled 1
2208 01:49:12.720666 I2C: 00:50: enabled 1
2209 01:49:12.723389 I2C: 00:10: enabled 1
2210 01:49:12.727068 I2C: 00:15: enabled 1
2211 01:49:12.727532 I2C: 00:2c: enabled 1
2212 01:49:12.729924 GENERIC: 0.0: enabled 1
2213 01:49:12.733407 SPI: 00: enabled 1
2214 01:49:12.733892 PNP: 0c09.0: enabled 1
2215 01:49:12.736494 GENERIC: 0.0: enabled 1
2216 01:49:12.740035 USB3 port 0: enabled 1
2217 01:49:12.743697 USB3 port 1: enabled 0
2218 01:49:12.744096 USB3 port 2: enabled 1
2219 01:49:12.746513 USB3 port 3: enabled 0
2220 01:49:12.750056 USB2 port 0: enabled 1
2221 01:49:12.750528 USB2 port 1: enabled 0
2222 01:49:12.753659 USB2 port 2: enabled 1
2223 01:49:12.756567 USB2 port 3: enabled 0
2224 01:49:12.757042 USB2 port 4: enabled 0
2225 01:49:12.759703 USB2 port 5: enabled 1
2226 01:49:12.763086 USB2 port 6: enabled 0
2227 01:49:12.766412 USB2 port 7: enabled 0
2228 01:49:12.766720 USB2 port 8: enabled 1
2229 01:49:12.770115 USB2 port 9: enabled 1
2230 01:49:12.773172 USB3 port 0: enabled 1
2231 01:49:12.773609 USB3 port 1: enabled 0
2232 01:49:12.776574 USB3 port 2: enabled 0
2233 01:49:12.780025 USB3 port 3: enabled 0
2234 01:49:12.783190 GENERIC: 0.0: enabled 1
2235 01:49:12.783685 GENERIC: 1.0: enabled 1
2236 01:49:12.786791 APIC: 00: enabled 1
2237 01:49:12.790065 APIC: 14: enabled 1
2238 01:49:12.790558 APIC: 16: enabled 1
2239 01:49:12.793568 APIC: 10: enabled 1
2240 01:49:12.794059 APIC: 12: enabled 1
2241 01:49:12.796680 APIC: 01: enabled 1
2242 01:49:12.799804 APIC: 08: enabled 1
2243 01:49:12.800297 APIC: 09: enabled 1
2244 01:49:12.802939 PCI: 01:00.0: enabled 1
2245 01:49:12.809953 BS: BS_DEV_INIT run times (exec / console): 10 / 1133 ms
2246 01:49:12.813453 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2247 01:49:12.816498 ELOG: NV offset 0xf20000 size 0x4000
2248 01:49:12.824469 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2249 01:49:12.830698 ELOG: Event(17) added with size 13 at 2023-10-11 01:49:12 UTC
2250 01:49:12.837119 ELOG: Event(9E) added with size 10 at 2023-10-11 01:49:12 UTC
2251 01:49:12.844026 ELOG: Event(9F) added with size 14 at 2023-10-11 01:49:12 UTC
2252 01:49:12.850544 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2253 01:49:12.857254 ELOG: Event(A0) added with size 9 at 2023-10-11 01:49:12 UTC
2254 01:49:12.860618 elog_add_boot_reason: Logged dev mode boot
2255 01:49:12.867244 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2256 01:49:12.870337 Finalize devices...
2257 01:49:12.870824 PCI: 00:16.0 final
2258 01:49:12.873721 PCI: 00:1f.2 final
2259 01:49:12.874098 GENERIC: 0.0 final
2260 01:49:12.880845 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2261 01:49:12.883551 GENERIC: 1.0 final
2262 01:49:12.890416 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2263 01:49:12.890905 Devices finalized
2264 01:49:12.897697 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2265 01:49:12.900529 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2266 01:49:12.907016 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2267 01:49:12.913646 ME: HFSTS1 : 0x90000245
2268 01:49:12.917067 ME: HFSTS2 : 0x82100116
2269 01:49:12.920427 ME: HFSTS3 : 0x00000050
2270 01:49:12.927044 ME: HFSTS4 : 0x00004000
2271 01:49:12.930155 ME: HFSTS5 : 0x00000000
2272 01:49:12.933724 ME: HFSTS6 : 0x40600006
2273 01:49:12.936777 ME: Manufacturing Mode : NO
2274 01:49:12.943920 ME: SPI Protection Mode Enabled : YES
2275 01:49:12.947077 ME: FPFs Committed : YES
2276 01:49:12.949739 ME: Manufacturing Vars Locked : YES
2277 01:49:12.953307 ME: FW Partition Table : OK
2278 01:49:12.956722 ME: Bringup Loader Failure : NO
2279 01:49:12.960107 ME: Firmware Init Complete : YES
2280 01:49:12.963116 ME: Boot Options Present : NO
2281 01:49:12.970327 ME: Update In Progress : NO
2282 01:49:12.973050 ME: D0i3 Support : YES
2283 01:49:12.976287 ME: Low Power State Enabled : NO
2284 01:49:12.979939 ME: CPU Replaced : YES
2285 01:49:12.983308 ME: CPU Replacement Valid : YES
2286 01:49:12.986814 ME: Current Working State : 5
2287 01:49:12.990141 ME: Current Operation State : 1
2288 01:49:12.993440 ME: Current Operation Mode : 0
2289 01:49:12.996471 ME: Error Code : 0
2290 01:49:13.003528 ME: Enhanced Debug Mode : NO
2291 01:49:13.006845 ME: CPU Debug Disabled : YES
2292 01:49:13.009875 ME: TXT Support : NO
2293 01:49:13.013062 ME: WP for RO is enabled : YES
2294 01:49:13.019838 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2295 01:49:13.026457 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2296 01:49:13.029724 Ramoops buffer: 0x100000@0x76899000.
2297 01:49:13.033177 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2298 01:49:13.043179 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2299 01:49:13.046297 CBFS: 'fallback/slic' not found.
2300 01:49:13.050003 ACPI: Writing ACPI tables at 7686d000.
2301 01:49:13.050490 ACPI: * FACS
2302 01:49:13.053205 ACPI: * DSDT
2303 01:49:13.059351 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2304 01:49:13.062646 ACPI: * FADT
2305 01:49:13.063140 SCI is IRQ9
2306 01:49:13.069161 ACPI: added table 1/32, length now 40
2307 01:49:13.069684 ACPI: * SSDT
2308 01:49:13.076036 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2309 01:49:13.080215 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2310 01:49:13.085854 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2311 01:49:13.089246 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2312 01:49:13.096324 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2313 01:49:13.099637 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2314 01:49:13.106278 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2315 01:49:13.112661 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2316 01:49:13.116181 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2317 01:49:13.122804 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2318 01:49:13.125955 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2319 01:49:13.133187 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2320 01:49:13.135909 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2321 01:49:13.142473 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2322 01:49:13.148900 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2323 01:49:13.152171 PS2K: Passing 80 keymaps to kernel
2324 01:49:13.159014 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2325 01:49:13.165670 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2326 01:49:13.172609 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2327 01:49:13.178927 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2328 01:49:13.181951 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2329 01:49:13.188624 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2330 01:49:13.195398 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2331 01:49:13.201862 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2332 01:49:13.209373 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2333 01:49:13.215274 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2334 01:49:13.218666 ACPI: added table 2/32, length now 44
2335 01:49:13.221878 ACPI: * MCFG
2336 01:49:13.225167 ACPI: added table 3/32, length now 48
2337 01:49:13.225681 ACPI: * TPM2
2338 01:49:13.228463 TPM2 log created at 0x7685d000
2339 01:49:13.231812 ACPI: added table 4/32, length now 52
2340 01:49:13.235358 ACPI: * LPIT
2341 01:49:13.238644 ACPI: added table 5/32, length now 56
2342 01:49:13.241536 ACPI: * MADT
2343 01:49:13.242006 SCI is IRQ9
2344 01:49:13.244866 ACPI: added table 6/32, length now 60
2345 01:49:13.249268 cmd_reg from pmc_make_ipc_cmd 1052838
2346 01:49:13.254815 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2347 01:49:13.261713 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2348 01:49:13.267805 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2349 01:49:13.271796 PMC CrashLog size in discovery mode: 0xC00
2350 01:49:13.275282 cpu crashlog bar addr: 0x80640000
2351 01:49:13.277822 cpu discovery table offset: 0x6030
2352 01:49:13.284576 cpu_crashlog_discovery_table buffer count: 0x3
2353 01:49:13.291284 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2354 01:49:13.297972 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2355 01:49:13.304245 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2356 01:49:13.307865 PMC crashLog size in discovery mode : 0xC00
2357 01:49:13.314438 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2358 01:49:13.321862 discover mode PMC crashlog size adjusted to: 0x200
2359 01:49:13.327963 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2360 01:49:13.331718 discover mode PMC crashlog size adjusted to: 0x0
2361 01:49:13.335290 m_cpu_crashLog_size : 0x3480 bytes
2362 01:49:13.337419 CPU crashLog present.
2363 01:49:13.341765 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2364 01:49:13.347969 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2365 01:49:13.350747 current = 76876550
2366 01:49:13.354218 ACPI: * DMAR
2367 01:49:13.357855 ACPI: added table 7/32, length now 64
2368 01:49:13.361065 ACPI: added table 8/32, length now 68
2369 01:49:13.361564 ACPI: * HPET
2370 01:49:13.367033 ACPI: added table 9/32, length now 72
2371 01:49:13.367490 ACPI: done.
2372 01:49:13.371277 ACPI tables: 38528 bytes.
2373 01:49:13.374420 smbios_write_tables: 76857000
2374 01:49:13.377573 EC returned error result code 3
2375 01:49:13.381238 Couldn't obtain OEM name from CBI
2376 01:49:13.384316 Create SMBIOS type 16
2377 01:49:13.388179 Create SMBIOS type 17
2378 01:49:13.388660 Create SMBIOS type 20
2379 01:49:13.391138 GENERIC: 0.0 (WIFI Device)
2380 01:49:13.394111 SMBIOS tables: 2156 bytes.
2381 01:49:13.397846 Writing table forward entry at 0x00000500
2382 01:49:13.404133 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2383 01:49:13.407777 Writing coreboot table at 0x76891000
2384 01:49:13.414104 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2385 01:49:13.417267 1. 0000000000001000-000000000009ffff: RAM
2386 01:49:13.424423 2. 00000000000a0000-00000000000fffff: RESERVED
2387 01:49:13.427853 3. 0000000000100000-0000000076856fff: RAM
2388 01:49:13.433980 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2389 01:49:13.437272 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2390 01:49:13.444203 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2391 01:49:13.450723 7. 0000000077000000-00000000803fffff: RESERVED
2392 01:49:13.454054 8. 00000000c0000000-00000000cfffffff: RESERVED
2393 01:49:13.457440 9. 00000000f8000000-00000000f9ffffff: RESERVED
2394 01:49:13.463810 10. 00000000fb000000-00000000fb000fff: RESERVED
2395 01:49:13.466946 11. 00000000fc800000-00000000fe7fffff: RESERVED
2396 01:49:13.474009 12. 00000000feb00000-00000000feb7ffff: RESERVED
2397 01:49:13.477430 13. 00000000fec00000-00000000fecfffff: RESERVED
2398 01:49:13.484134 14. 00000000fed40000-00000000fed6ffff: RESERVED
2399 01:49:13.487616 15. 00000000fed80000-00000000fed87fff: RESERVED
2400 01:49:13.494018 16. 00000000fed90000-00000000fed92fff: RESERVED
2401 01:49:13.497534 17. 00000000feda0000-00000000feda1fff: RESERVED
2402 01:49:13.500501 18. 00000000fedc0000-00000000feddffff: RESERVED
2403 01:49:13.507208 19. 0000000100000000-000000027fbfffff: RAM
2404 01:49:13.510345 Passing 4 GPIOs to payload:
2405 01:49:13.513618 NAME | PORT | POLARITY | VALUE
2406 01:49:13.520554 lid | undefined | high | high
2407 01:49:13.524047 power | undefined | high | low
2408 01:49:13.530054 oprom | undefined | high | low
2409 01:49:13.533788 EC in RW | 0x00000151 | high | high
2410 01:49:13.536626 Board ID: 3
2411 01:49:13.537003 FW config: 0x131
2412 01:49:13.543509 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum 63fa
2413 01:49:13.547205 coreboot table: 1788 bytes.
2414 01:49:13.550415 IMD ROOT 0. 0x76fff000 0x00001000
2415 01:49:13.553505 IMD SMALL 1. 0x76ffe000 0x00001000
2416 01:49:13.560122 FSP MEMORY 2. 0x76afe000 0x00500000
2417 01:49:13.563826 CONSOLE 3. 0x76ade000 0x00020000
2418 01:49:13.566549 RW MCACHE 4. 0x76add000 0x0000043c
2419 01:49:13.570444 RO MCACHE 5. 0x76adc000 0x00000fd8
2420 01:49:13.573431 FMAP 6. 0x76adb000 0x0000064a
2421 01:49:13.576759 TIME STAMP 7. 0x76ada000 0x00000910
2422 01:49:13.580314 VBOOT WORK 8. 0x76ac6000 0x00014000
2423 01:49:13.583685 MEM INFO 9. 0x76ac5000 0x000003b8
2424 01:49:13.586988 ROMSTG STCK10. 0x76ac4000 0x00001000
2425 01:49:13.593700 AFTER CAR 11. 0x76ab8000 0x0000c000
2426 01:49:13.596773 RAMSTAGE 12. 0x76a2e000 0x0008a000
2427 01:49:13.600052 ACPI BERT 13. 0x76a1e000 0x00010000
2428 01:49:13.603389 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2429 01:49:13.606700 REFCODE 15. 0x769ae000 0x0006f000
2430 01:49:13.610229 SMM BACKUP 16. 0x7699e000 0x00010000
2431 01:49:13.613279 IGD OPREGION17. 0x76999000 0x00004203
2432 01:49:13.620041 RAMOOPS 18. 0x76899000 0x00100000
2433 01:49:13.623201 COREBOOT 19. 0x76891000 0x00008000
2434 01:49:13.626836 ACPI 20. 0x7686d000 0x00024000
2435 01:49:13.629983 TPM2 TCGLOG21. 0x7685d000 0x00010000
2436 01:49:13.633451 PMC CRASHLOG22. 0x7685c000 0x00000c00
2437 01:49:13.636732 CPU CRASHLOG23. 0x76858000 0x00003480
2438 01:49:13.640069 SMBIOS 24. 0x76857000 0x00001000
2439 01:49:13.643111 IMD small region:
2440 01:49:13.647637 IMD ROOT 0. 0x76ffec00 0x00000400
2441 01:49:13.649923 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2442 01:49:13.652742 VPD 2. 0x76ffeb60 0x0000006c
2443 01:49:13.659921 POWER STATE 3. 0x76ffeb00 0x00000044
2444 01:49:13.663104 ROMSTAGE 4. 0x76ffeae0 0x00000004
2445 01:49:13.666298 ACPI GNVS 5. 0x76ffea80 0x00000048
2446 01:49:13.669721 TYPE_C INFO 6. 0x76ffea60 0x0000000c
2447 01:49:13.676155 BS: BS_WRITE_TABLES run times (exec / console): 7 / 628 ms
2448 01:49:13.679446 MTRR: Physical address space:
2449 01:49:13.686928 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2450 01:49:13.693117 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2451 01:49:13.699654 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2452 01:49:13.703221 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2453 01:49:13.709896 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2454 01:49:13.716796 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2455 01:49:13.722857 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2456 01:49:13.726337 MTRR: Fixed MSR 0x250 0x0606060606060606
2457 01:49:13.732660 MTRR: Fixed MSR 0x258 0x0606060606060606
2458 01:49:13.736338 MTRR: Fixed MSR 0x259 0x0000000000000000
2459 01:49:13.739197 MTRR: Fixed MSR 0x268 0x0606060606060606
2460 01:49:13.742970 MTRR: Fixed MSR 0x269 0x0606060606060606
2461 01:49:13.749411 MTRR: Fixed MSR 0x26a 0x0606060606060606
2462 01:49:13.752648 MTRR: Fixed MSR 0x26b 0x0606060606060606
2463 01:49:13.756167 MTRR: Fixed MSR 0x26c 0x0606060606060606
2464 01:49:13.759370 MTRR: Fixed MSR 0x26d 0x0606060606060606
2465 01:49:13.762636 MTRR: Fixed MSR 0x26e 0x0606060606060606
2466 01:49:13.769009 MTRR: Fixed MSR 0x26f 0x0606060606060606
2467 01:49:13.772796 call enable_fixed_mtrr()
2468 01:49:13.776078 CPU physical address size: 39 bits
2469 01:49:13.779492 MTRR: default type WB/UC MTRR counts: 6/6.
2470 01:49:13.782210 MTRR: UC selected as default type.
2471 01:49:13.789039 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2472 01:49:13.795874 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2473 01:49:13.802533 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2474 01:49:13.809406 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2475 01:49:13.815949 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2476 01:49:13.822021 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2477 01:49:13.825912 MTRR: Fixed MSR 0x250 0x0606060606060606
2478 01:49:13.832260 MTRR: Fixed MSR 0x258 0x0606060606060606
2479 01:49:13.835555 MTRR: Fixed MSR 0x259 0x0000000000000000
2480 01:49:13.838799 MTRR: Fixed MSR 0x268 0x0606060606060606
2481 01:49:13.841967 MTRR: Fixed MSR 0x269 0x0606060606060606
2482 01:49:13.848733 MTRR: Fixed MSR 0x26a 0x0606060606060606
2483 01:49:13.852544 MTRR: Fixed MSR 0x26b 0x0606060606060606
2484 01:49:13.855343 MTRR: Fixed MSR 0x26c 0x0606060606060606
2485 01:49:13.858795 MTRR: Fixed MSR 0x26d 0x0606060606060606
2486 01:49:13.862162 MTRR: Fixed MSR 0x26e 0x0606060606060606
2487 01:49:13.868172 MTRR: Fixed MSR 0x26f 0x0606060606060606
2488 01:49:13.872074 MTRR: Fixed MSR 0x250 0x0606060606060606
2489 01:49:13.875505 MTRR: Fixed MSR 0x250 0x0606060606060606
2490 01:49:13.878335 MTRR: Fixed MSR 0x250 0x0606060606060606
2491 01:49:13.885092 MTRR: Fixed MSR 0x258 0x0606060606060606
2492 01:49:13.888306 MTRR: Fixed MSR 0x259 0x0000000000000000
2493 01:49:13.891689 MTRR: Fixed MSR 0x268 0x0606060606060606
2494 01:49:13.895289 MTRR: Fixed MSR 0x269 0x0606060606060606
2495 01:49:13.902046 MTRR: Fixed MSR 0x26a 0x0606060606060606
2496 01:49:13.905183 MTRR: Fixed MSR 0x26b 0x0606060606060606
2497 01:49:13.908403 MTRR: Fixed MSR 0x26c 0x0606060606060606
2498 01:49:13.911483 MTRR: Fixed MSR 0x26d 0x0606060606060606
2499 01:49:13.918602 MTRR: Fixed MSR 0x26e 0x0606060606060606
2500 01:49:13.921950 MTRR: Fixed MSR 0x26f 0x0606060606060606
2501 01:49:13.925283 call enable_fixed_mtrr()
2502 01:49:13.928497 MTRR: Fixed MSR 0x258 0x0606060606060606
2503 01:49:13.931662 MTRR: Fixed MSR 0x250 0x0606060606060606
2504 01:49:13.935289 call enable_fixed_mtrr()
2505 01:49:13.938226 MTRR: Fixed MSR 0x258 0x0606060606060606
2506 01:49:13.941644 MTRR: Fixed MSR 0x259 0x0000000000000000
2507 01:49:13.945239 MTRR: Fixed MSR 0x268 0x0606060606060606
2508 01:49:13.951615 MTRR: Fixed MSR 0x269 0x0606060606060606
2509 01:49:13.955142 MTRR: Fixed MSR 0x26a 0x0606060606060606
2510 01:49:13.958208 MTRR: Fixed MSR 0x26b 0x0606060606060606
2511 01:49:13.961776 MTRR: Fixed MSR 0x26c 0x0606060606060606
2512 01:49:13.968191 MTRR: Fixed MSR 0x26d 0x0606060606060606
2513 01:49:13.972442 MTRR: Fixed MSR 0x26e 0x0606060606060606
2514 01:49:13.974953 MTRR: Fixed MSR 0x26f 0x0606060606060606
2515 01:49:13.978182 MTRR: Fixed MSR 0x250 0x0606060606060606
2516 01:49:13.981569 CPU physical address size: 39 bits
2517 01:49:13.988075 MTRR: Fixed MSR 0x250 0x0606060606060606
2518 01:49:13.991662 MTRR: Fixed MSR 0x259 0x0000000000000000
2519 01:49:13.994642 MTRR: Fixed MSR 0x268 0x0606060606060606
2520 01:49:13.998257 MTRR: Fixed MSR 0x269 0x0606060606060606
2521 01:49:14.004471 MTRR: Fixed MSR 0x26a 0x0606060606060606
2522 01:49:14.008063 MTRR: Fixed MSR 0x26b 0x0606060606060606
2523 01:49:14.011394 MTRR: Fixed MSR 0x26c 0x0606060606060606
2524 01:49:14.014912 MTRR: Fixed MSR 0x26d 0x0606060606060606
2525 01:49:14.018160 MTRR: Fixed MSR 0x26e 0x0606060606060606
2526 01:49:14.024407 MTRR: Fixed MSR 0x26f 0x0606060606060606
2527 01:49:14.028362 MTRR: Fixed MSR 0x258 0x0606060606060606
2528 01:49:14.031387 call enable_fixed_mtrr()
2529 01:49:14.034626 call enable_fixed_mtrr()
2530 01:49:14.038379 MTRR: Fixed MSR 0x258 0x0606060606060606
2531 01:49:14.040919 MTRR: Fixed MSR 0x258 0x0606060606060606
2532 01:49:14.044159 MTRR: Fixed MSR 0x259 0x0000000000000000
2533 01:49:14.047683 MTRR: Fixed MSR 0x268 0x0606060606060606
2534 01:49:14.054269 MTRR: Fixed MSR 0x269 0x0606060606060606
2535 01:49:14.057749 CPU physical address size: 39 bits
2536 01:49:14.060894 CPU physical address size: 39 bits
2537 01:49:14.063906 MTRR: Fixed MSR 0x26a 0x0606060606060606
2538 01:49:14.067310 CPU physical address size: 39 bits
2539 01:49:14.070987 MTRR: Fixed MSR 0x26b 0x0606060606060606
2540 01:49:14.077479 MTRR: Fixed MSR 0x259 0x0000000000000000
2541 01:49:14.081125 MTRR: Fixed MSR 0x26c 0x0606060606060606
2542 01:49:14.084093 MTRR: Fixed MSR 0x26d 0x0606060606060606
2543 01:49:14.087579 MTRR: Fixed MSR 0x26e 0x0606060606060606
2544 01:49:14.094559 MTRR: Fixed MSR 0x26f 0x0606060606060606
2545 01:49:14.097028 MTRR: Fixed MSR 0x268 0x0606060606060606
2546 01:49:14.100815 call enable_fixed_mtrr()
2547 01:49:14.103799 MTRR: Fixed MSR 0x269 0x0606060606060606
2548 01:49:14.107362 CPU physical address size: 39 bits
2549 01:49:14.110578 MTRR: Fixed MSR 0x26a 0x0606060606060606
2550 01:49:14.114238 MTRR: Fixed MSR 0x259 0x0000000000000000
2551 01:49:14.121013 MTRR: Fixed MSR 0x26b 0x0606060606060606
2552 01:49:14.124027 MTRR: Fixed MSR 0x26c 0x0606060606060606
2553 01:49:14.127124 MTRR: Fixed MSR 0x26d 0x0606060606060606
2554 01:49:14.130404 MTRR: Fixed MSR 0x26e 0x0606060606060606
2555 01:49:14.137338 MTRR: Fixed MSR 0x26f 0x0606060606060606
2556 01:49:14.140519 MTRR: Fixed MSR 0x268 0x0606060606060606
2557 01:49:14.143945 call enable_fixed_mtrr()
2558 01:49:14.147136 MTRR: Fixed MSR 0x269 0x0606060606060606
2559 01:49:14.150481 CPU physical address size: 39 bits
2560 01:49:14.153732 MTRR: Fixed MSR 0x26a 0x0606060606060606
2561 01:49:14.160527 MTRR: Fixed MSR 0x26b 0x0606060606060606
2562 01:49:14.163730 MTRR: Fixed MSR 0x26c 0x0606060606060606
2563 01:49:14.166695 MTRR: Fixed MSR 0x26d 0x0606060606060606
2564 01:49:14.170395 MTRR: Fixed MSR 0x26e 0x0606060606060606
2565 01:49:14.176798 MTRR: Fixed MSR 0x26f 0x0606060606060606
2566 01:49:14.180214 call enable_fixed_mtrr()
2567 01:49:14.183493 CPU physical address size: 39 bits
2568 01:49:14.183970
2569 01:49:14.186999 MTRR check
2570 01:49:14.190434 Fixed MTRRs : Enabled
2571 01:49:14.190924 Variable MTRRs: Enabled
2572 01:49:14.191212
2573 01:49:14.196821 BS: BS_WRITE_TABLES exit times (exec / console): 253 / 150 ms
2574 01:49:14.200375 Checking cr50 for pending updates
2575 01:49:14.212064 Reading cr50 TPM mode
2576 01:49:14.227334 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2577 01:49:14.237250 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2578 01:49:14.240665 Checking segment from ROM address 0xf96cbe6c
2579 01:49:14.244075 Checking segment from ROM address 0xf96cbe88
2580 01:49:14.250279 Loading segment from ROM address 0xf96cbe6c
2581 01:49:14.250785 code (compression=1)
2582 01:49:14.260158 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2583 01:49:14.270063 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2584 01:49:14.270520 using LZMA
2585 01:49:14.292725 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2586 01:49:14.299117 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2587 01:49:14.307070 Loading segment from ROM address 0xf96cbe88
2588 01:49:14.310731 Entry Point 0x30000000
2589 01:49:14.311211 Loaded segments
2590 01:49:14.316923 BS: BS_PAYLOAD_LOAD run times (exec / console): 20 / 62 ms
2591 01:49:14.323571 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2592 01:49:14.326727 Finalizing chipset.
2593 01:49:14.330358 apm_control: Finalizing SMM.
2594 01:49:14.330792 APMC done.
2595 01:49:14.333682 HECI: CSE device 16.1 is disabled
2596 01:49:14.336659 HECI: CSE device 16.2 is disabled
2597 01:49:14.340885 HECI: CSE device 16.3 is disabled
2598 01:49:14.343703 HECI: CSE device 16.4 is disabled
2599 01:49:14.346843 HECI: CSE device 16.5 is disabled
2600 01:49:14.350469 HECI: Sending End-of-Post
2601 01:49:14.359137 CSE: EOP requested action: continue boot
2602 01:49:14.362318 CSE EOP successful, continuing boot
2603 01:49:14.368370 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2604 01:49:14.371850 mp_park_aps done after 0 msecs.
2605 01:49:14.375174 Jumping to boot code at 0x30000000(0x76891000)
2606 01:49:14.385174 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2607 01:49:14.389522
2608 01:49:14.389950
2609 01:49:14.390191
2610 01:49:14.392967 Starting depthcharge on Volmar...
2611 01:49:14.393441
2612 01:49:14.394638 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2613 01:49:14.394992 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2614 01:49:14.395279 Setting prompt string to ['brya:']
2615 01:49:14.395613 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2616 01:49:14.399724 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2617 01:49:14.400169
2618 01:49:14.406232 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2619 01:49:14.406684
2620 01:49:14.413105 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2621 01:49:14.413644
2622 01:49:14.415812 configure_storage: Failed to remap 1C:2
2623 01:49:14.416188
2624 01:49:14.418945 Wipe memory regions:
2625 01:49:14.419319
2626 01:49:14.422706 [0x00000000001000, 0x000000000a0000)
2627 01:49:14.423166
2628 01:49:14.425797 [0x00000000100000, 0x00000030000000)
2629 01:49:14.530784
2630 01:49:14.533744 [0x00000032668e60, 0x00000076857000)
2631 01:49:14.682288
2632 01:49:14.685215 [0x00000100000000, 0x0000027fc00000)
2633 01:49:15.519140
2634 01:49:15.522181 ec_init: CrosEC protocol v3 supported (256, 256)
2635 01:49:16.131638
2636 01:49:16.132116 R8152: Initializing
2637 01:49:16.132389
2638 01:49:16.135053 Version 9 (ocp_data = 6010)
2639 01:49:16.135529
2640 01:49:16.138332 R8152: Done initializing
2641 01:49:16.138812
2642 01:49:16.141095 Adding net device
2643 01:49:16.442404
2644 01:49:16.446032 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2645 01:49:16.446526
2646 01:49:16.446814
2647 01:49:16.447181
2648 01:49:16.447829 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2650 01:49:16.548961 brya: tftpboot 192.168.201.1 11733094/tftp-deploy-agl5mrco/kernel/bzImage 11733094/tftp-deploy-agl5mrco/kernel/cmdline 11733094/tftp-deploy-agl5mrco/ramdisk/ramdisk.cpio.gz
2651 01:49:16.549582 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2652 01:49:16.549919 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2653 01:49:16.554771 tftpboot 192.168.201.1 11733094/tftp-deploy-agl5mrco/kernel/bzImploy-agl5mrco/kernel/cmdline 11733094/tftp-deploy-agl5mrco/ramdisk/ramdisk.cpio.gz
2654 01:49:16.555281
2655 01:49:16.555562 Waiting for link
2656 01:49:16.757667
2657 01:49:16.758158 done.
2658 01:49:16.758441
2659 01:49:16.758678 MAC: 00:e0:4c:68:03:d9
2660 01:49:16.758931
2661 01:49:16.760358 Sending DHCP discover... done.
2662 01:49:16.760738
2663 01:49:16.764133 Waiting for reply... done.
2664 01:49:16.764660
2665 01:49:16.766932 Sending DHCP request... done.
2666 01:49:16.767329
2667 01:49:16.773548 Waiting for reply... done.
2668 01:49:16.773930
2669 01:49:16.774206 My ip is 192.168.201.14
2670 01:49:16.774451
2671 01:49:16.777435 The DHCP server ip is 192.168.201.1
2672 01:49:16.780778
2673 01:49:16.784000 TFTP server IP predefined by user: 192.168.201.1
2674 01:49:16.784493
2675 01:49:16.790546 Bootfile predefined by user: 11733094/tftp-deploy-agl5mrco/kernel/bzImage
2676 01:49:16.791045
2677 01:49:16.793816 Sending tftp read request... done.
2678 01:49:16.794166
2679 01:49:16.801175 Waiting for the transfer...
2680 01:49:16.801671
2681 01:49:17.029806 00000000 ################################################################
2682 01:49:17.029932
2683 01:49:17.257245 00080000 ################################################################
2684 01:49:17.257374
2685 01:49:17.483456 00100000 ################################################################
2686 01:49:17.483585
2687 01:49:17.711467 00180000 ################################################################
2688 01:49:17.711610
2689 01:49:17.939872 00200000 ################################################################
2690 01:49:17.940000
2691 01:49:18.167927 00280000 ################################################################
2692 01:49:18.168058
2693 01:49:18.395771 00300000 ################################################################
2694 01:49:18.395909
2695 01:49:18.623498 00380000 ################################################################
2696 01:49:18.623634
2697 01:49:18.850820 00400000 ################################################################
2698 01:49:18.850953
2699 01:49:19.078717 00480000 ################################################################
2700 01:49:19.078848
2701 01:49:19.307014 00500000 ################################################################
2702 01:49:19.307152
2703 01:49:19.534815 00580000 ################################################################
2704 01:49:19.534954
2705 01:49:19.763385 00600000 ################################################################
2706 01:49:19.763514
2707 01:49:19.990666 00680000 ################################################################
2708 01:49:19.990817
2709 01:49:20.220786 00700000 ################################################################
2710 01:49:20.220912
2711 01:49:20.449061 00780000 ################################################################
2712 01:49:20.449188
2713 01:49:20.677804 00800000 ################################################################
2714 01:49:20.677930
2715 01:49:20.904787 00880000 ################################################################
2716 01:49:20.904929
2717 01:49:21.129382 00900000 ################################################################
2718 01:49:21.129506
2719 01:49:21.359501 00980000 ################################################################
2720 01:49:21.359636
2721 01:49:21.589305 00a00000 ################################################################
2722 01:49:21.589456
2723 01:49:21.786468 00a80000 ######################################################### done.
2724 01:49:21.786609
2725 01:49:21.790003 The bootfile was 11473408 bytes long.
2726 01:49:21.790083
2727 01:49:21.792921 Sending tftp read request... done.
2728 01:49:21.796399
2729 01:49:21.796478 Waiting for the transfer...
2730 01:49:21.796534
2731 01:49:22.027568 00000000 ################################################################
2732 01:49:22.027710
2733 01:49:22.256790 00080000 ################################################################
2734 01:49:22.256920
2735 01:49:22.485445 00100000 ################################################################
2736 01:49:22.485593
2737 01:49:22.715477 00180000 ################################################################
2738 01:49:22.715625
2739 01:49:22.943711 00200000 ################################################################
2740 01:49:22.943868
2741 01:49:23.172392 00280000 ################################################################
2742 01:49:23.172538
2743 01:49:23.401062 00300000 ################################################################
2744 01:49:23.401212
2745 01:49:23.629732 00380000 ################################################################
2746 01:49:23.629863
2747 01:49:23.859887 00400000 ################################################################
2748 01:49:23.860019
2749 01:49:24.090462 00480000 ################################################################
2750 01:49:24.090600
2751 01:49:24.320011 00500000 ################################################################
2752 01:49:24.320146
2753 01:49:24.550439 00580000 ################################################################
2754 01:49:24.550569
2755 01:49:24.779109 00600000 ################################################################
2756 01:49:24.779238
2757 01:49:25.007394 00680000 ################################################################
2758 01:49:25.007528
2759 01:49:25.237458 00700000 ################################################################
2760 01:49:25.237598
2761 01:49:25.465181 00780000 ################################################################
2762 01:49:25.465312
2763 01:49:25.693273 00800000 ################################################################
2764 01:49:25.693406
2765 01:49:25.824367 00880000 ###################################### done.
2766 01:49:25.824488
2767 01:49:25.827659 Sending tftp read request... done.
2768 01:49:25.827745
2769 01:49:25.830951 Waiting for the transfer...
2770 01:49:25.831027
2771 01:49:25.831089 00000000 # done.
2772 01:49:25.831153
2773 01:49:25.840533 Command line loaded dynamically from TFTP file: 11733094/tftp-deploy-agl5mrco/kernel/cmdline
2774 01:49:25.840608
2775 01:49:25.857134 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2776 01:49:25.863028
2777 01:49:25.866101 Shutting down all USB controllers.
2778 01:49:25.866445
2779 01:49:25.866686 Removing current net device
2780 01:49:25.866898
2781 01:49:25.869566 Finalizing coreboot
2782 01:49:25.870019
2783 01:49:25.876278 Exiting depthcharge with code 4 at timestamp: 21725827
2784 01:49:25.876732
2785 01:49:25.876993
2786 01:49:25.877206 Starting kernel ...
2787 01:49:25.877440
2788 01:49:25.877650
2789 01:49:25.878583 end: 2.2.4 bootloader-commands (duration 00:00:11) [common]
2790 01:49:25.878925 start: 2.2.5 auto-login-action (timeout 00:04:29) [common]
2791 01:49:25.879182 Setting prompt string to ['Linux version [0-9]']
2792 01:49:25.879421 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2793 01:49:25.879666 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2795 01:53:54.879752 end: 2.2.5 auto-login-action (duration 00:04:29) [common]
2797 01:53:54.880525 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 269 seconds'
2799 01:53:54.881076 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2802 01:53:54.882038 end: 2 depthcharge-action (duration 00:05:00) [common]
2804 01:53:54.882820 Cleaning after the job
2805 01:53:54.883113 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11733094/tftp-deploy-agl5mrco/ramdisk
2806 01:53:54.887944 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11733094/tftp-deploy-agl5mrco/kernel
2807 01:53:54.891130 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11733094/tftp-deploy-agl5mrco/modules
2808 01:53:54.891575 start: 5.1 power-off (timeout 00:00:30) [common]
2809 01:53:54.891715 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-1' '--port=1' '--command=off'
2810 01:53:54.971558 >> Command sent successfully.
2811 01:53:54.979601 Returned 0 in 0 seconds
2812 01:53:55.080695 end: 5.1 power-off (duration 00:00:00) [common]
2814 01:53:55.081960 start: 5.2 read-feedback (timeout 00:10:00) [common]
2815 01:53:55.082839 Listened to connection for namespace 'common' for up to 1s
2817 01:53:55.083832 Listened to connection for namespace 'common' for up to 1s
2818 01:53:56.083679 Finalising connection for namespace 'common'
2819 01:53:56.084223 Disconnecting from shell: Finalise
2820 01:53:56.084537
2821 01:53:56.185454 end: 5.2 read-feedback (duration 00:00:01) [common]
2822 01:53:56.185972 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11733094
2823 01:53:56.199437 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11733094
2824 01:53:56.199580 JobError: Your job cannot terminate cleanly.