Boot log: asus-cx9400-volteer

    1 01:48:52.012092  lava-dispatcher, installed at version: 2023.08
    2 01:48:52.012299  start: 0 validate
    3 01:48:52.012426  Start time: 2023-10-11 01:48:52.012418+00:00 (UTC)
    4 01:48:52.012545  Using caching service: 'http://localhost/cache/?uri=%s'
    5 01:48:52.012671  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
    6 01:48:52.269050  Using caching service: 'http://localhost/cache/?uri=%s'
    7 01:48:52.269781  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.295-cip103-95-ge42cfc8bb88b7%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 01:48:52.527947  Using caching service: 'http://localhost/cache/?uri=%s'
    9 01:48:52.528639  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 01:48:52.787798  Using caching service: 'http://localhost/cache/?uri=%s'
   11 01:48:52.788572  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.295-cip103-95-ge42cfc8bb88b7%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 01:48:53.061166  validate duration: 1.05
   14 01:48:53.062458  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 01:48:53.063018  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 01:48:53.063475  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 01:48:53.064282  Not decompressing ramdisk as can be used compressed.
   18 01:48:53.064812  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
   19 01:48:53.065171  saving as /var/lib/lava/dispatcher/tmp/11733100/tftp-deploy-nusk7q_d/ramdisk/initrd.cpio.gz
   20 01:48:53.065509  total size: 5432690 (5 MB)
   21 01:48:53.070305  progress   0 % (0 MB)
   22 01:48:53.078963  progress   5 % (0 MB)
   23 01:48:53.084212  progress  10 % (0 MB)
   24 01:48:53.088254  progress  15 % (0 MB)
   25 01:48:53.091908  progress  20 % (1 MB)
   26 01:48:53.095039  progress  25 % (1 MB)
   27 01:48:53.097743  progress  30 % (1 MB)
   28 01:48:53.100463  progress  35 % (1 MB)
   29 01:48:53.102706  progress  40 % (2 MB)
   30 01:48:53.104796  progress  45 % (2 MB)
   31 01:48:53.106823  progress  50 % (2 MB)
   32 01:48:53.108990  progress  55 % (2 MB)
   33 01:48:53.110728  progress  60 % (3 MB)
   34 01:48:53.112455  progress  65 % (3 MB)
   35 01:48:53.114357  progress  70 % (3 MB)
   36 01:48:53.115997  progress  75 % (3 MB)
   37 01:48:53.117560  progress  80 % (4 MB)
   38 01:48:53.119131  progress  85 % (4 MB)
   39 01:48:53.120714  progress  90 % (4 MB)
   40 01:48:53.122143  progress  95 % (4 MB)
   41 01:48:53.123604  progress 100 % (5 MB)
   42 01:48:53.123822  5 MB downloaded in 0.06 s (88.82 MB/s)
   43 01:48:53.124000  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 01:48:53.124248  end: 1.1 download-retry (duration 00:00:00) [common]
   46 01:48:53.124334  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 01:48:53.124417  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 01:48:53.124553  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.295-cip103-95-ge42cfc8bb88b7/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 01:48:53.124623  saving as /var/lib/lava/dispatcher/tmp/11733100/tftp-deploy-nusk7q_d/kernel/bzImage
   50 01:48:53.124687  total size: 11473408 (10 MB)
   51 01:48:53.124748  No compression specified
   52 01:48:53.125970  progress   0 % (0 MB)
   53 01:48:53.129047  progress   5 % (0 MB)
   54 01:48:53.132222  progress  10 % (1 MB)
   55 01:48:53.135257  progress  15 % (1 MB)
   56 01:48:53.138380  progress  20 % (2 MB)
   57 01:48:53.141343  progress  25 % (2 MB)
   58 01:48:53.144551  progress  30 % (3 MB)
   59 01:48:53.147520  progress  35 % (3 MB)
   60 01:48:53.150660  progress  40 % (4 MB)
   61 01:48:53.153649  progress  45 % (4 MB)
   62 01:48:53.156810  progress  50 % (5 MB)
   63 01:48:53.159789  progress  55 % (6 MB)
   64 01:48:53.163001  progress  60 % (6 MB)
   65 01:48:53.165935  progress  65 % (7 MB)
   66 01:48:53.169043  progress  70 % (7 MB)
   67 01:48:53.171946  progress  75 % (8 MB)
   68 01:48:53.175081  progress  80 % (8 MB)
   69 01:48:53.177944  progress  85 % (9 MB)
   70 01:48:53.181026  progress  90 % (9 MB)
   71 01:48:53.184048  progress  95 % (10 MB)
   72 01:48:53.187140  progress 100 % (10 MB)
   73 01:48:53.187263  10 MB downloaded in 0.06 s (174.87 MB/s)
   74 01:48:53.187410  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 01:48:53.187641  end: 1.2 download-retry (duration 00:00:00) [common]
   77 01:48:53.187727  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 01:48:53.187816  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 01:48:53.187956  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
   80 01:48:53.188025  saving as /var/lib/lava/dispatcher/tmp/11733100/tftp-deploy-nusk7q_d/nfsrootfs/full.rootfs.tar
   81 01:48:53.188086  total size: 133380384 (127 MB)
   82 01:48:53.188149  Using unxz to decompress xz
   83 01:48:53.192436  progress   0 % (0 MB)
   84 01:48:53.534737  progress   5 % (6 MB)
   85 01:48:53.887596  progress  10 % (12 MB)
   86 01:48:54.174781  progress  15 % (19 MB)
   87 01:48:54.360475  progress  20 % (25 MB)
   88 01:48:54.603743  progress  25 % (31 MB)
   89 01:48:54.949791  progress  30 % (38 MB)
   90 01:48:55.296187  progress  35 % (44 MB)
   91 01:48:55.701560  progress  40 % (50 MB)
   92 01:48:56.087689  progress  45 % (57 MB)
   93 01:48:56.446614  progress  50 % (63 MB)
   94 01:48:56.821488  progress  55 % (69 MB)
   95 01:48:57.183976  progress  60 % (76 MB)
   96 01:48:57.548182  progress  65 % (82 MB)
   97 01:48:57.913076  progress  70 % (89 MB)
   98 01:48:58.280088  progress  75 % (95 MB)
   99 01:48:58.720322  progress  80 % (101 MB)
  100 01:48:59.154586  progress  85 % (108 MB)
  101 01:48:59.420756  progress  90 % (114 MB)
  102 01:48:59.768370  progress  95 % (120 MB)
  103 01:49:00.163195  progress 100 % (127 MB)
  104 01:49:00.168573  127 MB downloaded in 6.98 s (18.22 MB/s)
  105 01:49:00.168840  end: 1.3.1 http-download (duration 00:00:07) [common]
  107 01:49:00.169102  end: 1.3 download-retry (duration 00:00:07) [common]
  108 01:49:00.169193  start: 1.4 download-retry (timeout 00:09:53) [common]
  109 01:49:00.169280  start: 1.4.1 http-download (timeout 00:09:53) [common]
  110 01:49:00.169434  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.295-cip103-95-ge42cfc8bb88b7/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 01:49:00.169505  saving as /var/lib/lava/dispatcher/tmp/11733100/tftp-deploy-nusk7q_d/modules/modules.tar
  112 01:49:00.169566  total size: 484192 (0 MB)
  113 01:49:00.169629  Using unxz to decompress xz
  114 01:49:00.173952  progress   6 % (0 MB)
  115 01:49:00.174366  progress  13 % (0 MB)
  116 01:49:00.174653  progress  20 % (0 MB)
  117 01:49:00.176266  progress  27 % (0 MB)
  118 01:49:00.178266  progress  33 % (0 MB)
  119 01:49:00.180200  progress  40 % (0 MB)
  120 01:49:00.182120  progress  47 % (0 MB)
  121 01:49:00.184047  progress  54 % (0 MB)
  122 01:49:00.186008  progress  60 % (0 MB)
  123 01:49:00.188052  progress  67 % (0 MB)
  124 01:49:00.190036  progress  74 % (0 MB)
  125 01:49:00.192140  progress  81 % (0 MB)
  126 01:49:00.194032  progress  87 % (0 MB)
  127 01:49:00.196008  progress  94 % (0 MB)
  128 01:49:00.198378  progress 100 % (0 MB)
  129 01:49:00.204910  0 MB downloaded in 0.04 s (13.07 MB/s)
  130 01:49:00.205153  end: 1.4.1 http-download (duration 00:00:00) [common]
  132 01:49:00.205415  end: 1.4 download-retry (duration 00:00:00) [common]
  133 01:49:00.205513  start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
  134 01:49:00.205609  start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
  135 01:49:02.393566  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11733100/extract-nfsrootfs-kbpru9ew
  136 01:49:02.393764  end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
  137 01:49:02.393870  start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
  138 01:49:02.394038  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11733100/lava-overlay-gnlwuj8l
  139 01:49:02.394169  makedir: /var/lib/lava/dispatcher/tmp/11733100/lava-overlay-gnlwuj8l/lava-11733100/bin
  140 01:49:02.394272  makedir: /var/lib/lava/dispatcher/tmp/11733100/lava-overlay-gnlwuj8l/lava-11733100/tests
  141 01:49:02.394369  makedir: /var/lib/lava/dispatcher/tmp/11733100/lava-overlay-gnlwuj8l/lava-11733100/results
  142 01:49:02.394471  Creating /var/lib/lava/dispatcher/tmp/11733100/lava-overlay-gnlwuj8l/lava-11733100/bin/lava-add-keys
  143 01:49:02.394693  Creating /var/lib/lava/dispatcher/tmp/11733100/lava-overlay-gnlwuj8l/lava-11733100/bin/lava-add-sources
  144 01:49:02.394824  Creating /var/lib/lava/dispatcher/tmp/11733100/lava-overlay-gnlwuj8l/lava-11733100/bin/lava-background-process-start
  145 01:49:02.394953  Creating /var/lib/lava/dispatcher/tmp/11733100/lava-overlay-gnlwuj8l/lava-11733100/bin/lava-background-process-stop
  146 01:49:02.395081  Creating /var/lib/lava/dispatcher/tmp/11733100/lava-overlay-gnlwuj8l/lava-11733100/bin/lava-common-functions
  147 01:49:02.395207  Creating /var/lib/lava/dispatcher/tmp/11733100/lava-overlay-gnlwuj8l/lava-11733100/bin/lava-echo-ipv4
  148 01:49:02.395333  Creating /var/lib/lava/dispatcher/tmp/11733100/lava-overlay-gnlwuj8l/lava-11733100/bin/lava-install-packages
  149 01:49:02.395459  Creating /var/lib/lava/dispatcher/tmp/11733100/lava-overlay-gnlwuj8l/lava-11733100/bin/lava-installed-packages
  150 01:49:02.395582  Creating /var/lib/lava/dispatcher/tmp/11733100/lava-overlay-gnlwuj8l/lava-11733100/bin/lava-os-build
  151 01:49:02.395708  Creating /var/lib/lava/dispatcher/tmp/11733100/lava-overlay-gnlwuj8l/lava-11733100/bin/lava-probe-channel
  152 01:49:02.395834  Creating /var/lib/lava/dispatcher/tmp/11733100/lava-overlay-gnlwuj8l/lava-11733100/bin/lava-probe-ip
  153 01:49:02.395958  Creating /var/lib/lava/dispatcher/tmp/11733100/lava-overlay-gnlwuj8l/lava-11733100/bin/lava-target-ip
  154 01:49:02.396083  Creating /var/lib/lava/dispatcher/tmp/11733100/lava-overlay-gnlwuj8l/lava-11733100/bin/lava-target-mac
  155 01:49:02.396207  Creating /var/lib/lava/dispatcher/tmp/11733100/lava-overlay-gnlwuj8l/lava-11733100/bin/lava-target-storage
  156 01:49:02.396334  Creating /var/lib/lava/dispatcher/tmp/11733100/lava-overlay-gnlwuj8l/lava-11733100/bin/lava-test-case
  157 01:49:02.396461  Creating /var/lib/lava/dispatcher/tmp/11733100/lava-overlay-gnlwuj8l/lava-11733100/bin/lava-test-event
  158 01:49:02.396585  Creating /var/lib/lava/dispatcher/tmp/11733100/lava-overlay-gnlwuj8l/lava-11733100/bin/lava-test-feedback
  159 01:49:02.396709  Creating /var/lib/lava/dispatcher/tmp/11733100/lava-overlay-gnlwuj8l/lava-11733100/bin/lava-test-raise
  160 01:49:02.396833  Creating /var/lib/lava/dispatcher/tmp/11733100/lava-overlay-gnlwuj8l/lava-11733100/bin/lava-test-reference
  161 01:49:02.396959  Creating /var/lib/lava/dispatcher/tmp/11733100/lava-overlay-gnlwuj8l/lava-11733100/bin/lava-test-runner
  162 01:49:02.397087  Creating /var/lib/lava/dispatcher/tmp/11733100/lava-overlay-gnlwuj8l/lava-11733100/bin/lava-test-set
  163 01:49:02.397212  Creating /var/lib/lava/dispatcher/tmp/11733100/lava-overlay-gnlwuj8l/lava-11733100/bin/lava-test-shell
  164 01:49:02.397340  Updating /var/lib/lava/dispatcher/tmp/11733100/lava-overlay-gnlwuj8l/lava-11733100/bin/lava-install-packages (oe)
  165 01:49:02.397494  Updating /var/lib/lava/dispatcher/tmp/11733100/lava-overlay-gnlwuj8l/lava-11733100/bin/lava-installed-packages (oe)
  166 01:49:02.397617  Creating /var/lib/lava/dispatcher/tmp/11733100/lava-overlay-gnlwuj8l/lava-11733100/environment
  167 01:49:02.397712  LAVA metadata
  168 01:49:02.397783  - LAVA_JOB_ID=11733100
  169 01:49:02.397846  - LAVA_DISPATCHER_IP=192.168.201.1
  170 01:49:02.397946  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
  171 01:49:02.398011  skipped lava-vland-overlay
  172 01:49:02.398084  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  173 01:49:02.398164  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
  174 01:49:02.398224  skipped lava-multinode-overlay
  175 01:49:02.398295  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  176 01:49:02.398372  start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
  177 01:49:02.398445  Loading test definitions
  178 01:49:02.398539  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
  179 01:49:02.398607  Using /lava-11733100 at stage 0
  180 01:49:02.398919  uuid=11733100_1.5.2.3.1 testdef=None
  181 01:49:02.399005  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  182 01:49:02.399088  start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
  183 01:49:02.399590  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  185 01:49:02.399804  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
  186 01:49:02.400437  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  188 01:49:02.400661  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
  189 01:49:02.401288  runner path: /var/lib/lava/dispatcher/tmp/11733100/lava-overlay-gnlwuj8l/lava-11733100/0/tests/0_dmesg test_uuid 11733100_1.5.2.3.1
  190 01:49:02.401444  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  192 01:49:02.401667  start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
  193 01:49:02.401737  Using /lava-11733100 at stage 1
  194 01:49:02.402037  uuid=11733100_1.5.2.3.5 testdef=None
  195 01:49:02.402123  end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
  196 01:49:02.402207  start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
  197 01:49:02.402862  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  199 01:49:02.403073  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
  200 01:49:02.403715  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  202 01:49:02.403939  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
  203 01:49:02.404564  runner path: /var/lib/lava/dispatcher/tmp/11733100/lava-overlay-gnlwuj8l/lava-11733100/1/tests/1_bootrr test_uuid 11733100_1.5.2.3.5
  204 01:49:02.404715  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  206 01:49:02.404915  Creating lava-test-runner.conf files
  207 01:49:02.404977  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11733100/lava-overlay-gnlwuj8l/lava-11733100/0 for stage 0
  208 01:49:02.405066  - 0_dmesg
  209 01:49:02.405144  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11733100/lava-overlay-gnlwuj8l/lava-11733100/1 for stage 1
  210 01:49:02.405234  - 1_bootrr
  211 01:49:02.405327  end: 1.5.2.3 test-definition (duration 00:00:00) [common]
  212 01:49:02.405410  start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
  213 01:49:02.412684  end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
  214 01:49:02.412787  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
  215 01:49:02.412871  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  216 01:49:02.412953  end: 1.5.2 lava-overlay (duration 00:00:00) [common]
  217 01:49:02.413036  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
  218 01:49:02.550335  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  219 01:49:02.550731  start: 1.5.4 extract-modules (timeout 00:09:51) [common]
  220 01:49:02.550850  extracting modules file /var/lib/lava/dispatcher/tmp/11733100/tftp-deploy-nusk7q_d/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11733100/extract-nfsrootfs-kbpru9ew
  221 01:49:02.571384  extracting modules file /var/lib/lava/dispatcher/tmp/11733100/tftp-deploy-nusk7q_d/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11733100/extract-overlay-ramdisk-9jpsecs1/ramdisk
  222 01:49:02.591989  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  223 01:49:02.592126  start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
  224 01:49:02.592217  [common] Applying overlay to NFS
  225 01:49:02.592286  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11733100/compress-overlay-sxebv_w6/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11733100/extract-nfsrootfs-kbpru9ew
  226 01:49:02.600241  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  227 01:49:02.600355  start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
  228 01:49:02.600448  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  229 01:49:02.600542  start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
  230 01:49:02.600623  Building ramdisk /var/lib/lava/dispatcher/tmp/11733100/extract-overlay-ramdisk-9jpsecs1/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11733100/extract-overlay-ramdisk-9jpsecs1/ramdisk
  231 01:49:02.686547  >> 30353 blocks

  232 01:49:03.274885  rename /var/lib/lava/dispatcher/tmp/11733100/extract-overlay-ramdisk-9jpsecs1/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11733100/tftp-deploy-nusk7q_d/ramdisk/ramdisk.cpio.gz
  233 01:49:03.275341  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  234 01:49:03.275461  start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
  235 01:49:03.275568  start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
  236 01:49:03.275659  No mkimage arch provided, not using FIT.
  237 01:49:03.275748  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  238 01:49:03.275832  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  239 01:49:03.275934  end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
  240 01:49:03.276023  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
  241 01:49:03.276101  No LXC device requested
  242 01:49:03.276179  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  243 01:49:03.276266  start: 1.7 deploy-device-env (timeout 00:09:50) [common]
  244 01:49:03.276353  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  245 01:49:03.276425  Checking files for TFTP limit of 4294967296 bytes.
  246 01:49:03.276844  end: 1 tftp-deploy (duration 00:00:10) [common]
  247 01:49:03.276953  start: 2 depthcharge-action (timeout 00:05:00) [common]
  248 01:49:03.277052  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  249 01:49:03.277178  substitutions:
  250 01:49:03.277249  - {DTB}: None
  251 01:49:03.277311  - {INITRD}: 11733100/tftp-deploy-nusk7q_d/ramdisk/ramdisk.cpio.gz
  252 01:49:03.277371  - {KERNEL}: 11733100/tftp-deploy-nusk7q_d/kernel/bzImage
  253 01:49:03.277429  - {LAVA_MAC}: None
  254 01:49:03.277486  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11733100/extract-nfsrootfs-kbpru9ew
  255 01:49:03.277542  - {NFS_SERVER_IP}: 192.168.201.1
  256 01:49:03.277597  - {PRESEED_CONFIG}: None
  257 01:49:03.277652  - {PRESEED_LOCAL}: None
  258 01:49:03.277706  - {RAMDISK}: 11733100/tftp-deploy-nusk7q_d/ramdisk/ramdisk.cpio.gz
  259 01:49:03.277760  - {ROOT_PART}: None
  260 01:49:03.277813  - {ROOT}: None
  261 01:49:03.277868  - {SERVER_IP}: 192.168.201.1
  262 01:49:03.277921  - {TEE}: None
  263 01:49:03.277975  Parsed boot commands:
  264 01:49:03.278028  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  265 01:49:03.278206  Parsed boot commands: tftpboot 192.168.201.1 11733100/tftp-deploy-nusk7q_d/kernel/bzImage 11733100/tftp-deploy-nusk7q_d/kernel/cmdline 11733100/tftp-deploy-nusk7q_d/ramdisk/ramdisk.cpio.gz
  266 01:49:03.278295  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  267 01:49:03.278376  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  268 01:49:03.278469  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  269 01:49:03.278593  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  270 01:49:03.278661  Not connected, no need to disconnect.
  271 01:49:03.278734  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  272 01:49:03.278818  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  273 01:49:03.278886  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-10'
  274 01:49:03.282905  Setting prompt string to ['lava-test: # ']
  275 01:49:03.283275  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  276 01:49:03.283378  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  277 01:49:03.283479  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  278 01:49:03.283573  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  279 01:49:03.283991  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=reboot'
  280 01:49:08.420842  >> Command sent successfully.

  281 01:49:08.423445  Returned 0 in 5 seconds
  282 01:49:08.523818  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  284 01:49:08.524194  end: 2.2.2 reset-device (duration 00:00:05) [common]
  285 01:49:08.524292  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  286 01:49:08.524381  Setting prompt string to 'Starting depthcharge on Voema...'
  287 01:49:08.524449  Changing prompt to 'Starting depthcharge on Voema...'
  288 01:49:08.524516  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  289 01:49:08.524780  [Enter `^Ec?' for help]

  290 01:49:10.186149  

  291 01:49:10.186301  

  292 01:49:10.196362  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...

  293 01:49:10.203068  CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz

  294 01:49:10.205962  CPU: ID 806c1, Tigerlake B0, ucode: 00000086

  295 01:49:10.209633  CPU: AES supported, TXT NOT supported, VT supported

  296 01:49:10.215918  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2

  297 01:49:10.222848  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU

  298 01:49:10.226042  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2

  299 01:49:10.229637  VBOOT: Loading verstage.

  300 01:49:10.236321  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  301 01:49:10.239957  FMAP: base = 0x0 size = 0x2000000 #areas = 32

  302 01:49:10.243508  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  303 01:49:10.253354  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes

  304 01:49:10.259782  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984

  305 01:49:10.259868  

  306 01:49:10.259935  

  307 01:49:10.273131  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...

  308 01:49:10.286781  Probing TPM: . done!

  309 01:49:10.290090  TPM ready after 0 ms

  310 01:49:10.293459  Connected to device vid:did:rid of 1ae0:0028:00

  311 01:49:10.304569  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e

  312 01:49:10.311491  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  313 01:49:10.314484  Initialized TPM device CR50 revision 0

  314 01:49:10.365011  tlcl_send_startup: Startup return code is 0

  315 01:49:10.365126  TPM: setup succeeded

  316 01:49:10.380618  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  317 01:49:10.394747  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  318 01:49:10.407853  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

  319 01:49:10.417357  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  320 01:49:10.421042  Chrome EC: UHEPI supported

  321 01:49:10.424758  Phase 1

  322 01:49:10.427783  FMAP: area GBB found @ 1805000 (458752 bytes)

  323 01:49:10.438060  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  324 01:49:10.444367  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  325 01:49:10.451151  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  326 01:49:10.457873  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7

  327 01:49:10.461110  Recovery requested (1009000e)

  328 01:49:10.470009  TPM: Extending digest for VBOOT: boot mode into PCR 0

  329 01:49:10.476565  tlcl_extend: response is 0

  330 01:49:10.482807  TPM: Extending digest for VBOOT: GBB HWID into PCR 1

  331 01:49:10.492972  tlcl_extend: response is 0

  332 01:49:10.499725  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  333 01:49:10.505931  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638

  334 01:49:10.512538  BS: verstage times (exec / console): total (unknown) / 142 ms

  335 01:49:10.512623  

  336 01:49:10.512688  

  337 01:49:10.525874  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...

  338 01:49:10.532905  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  339 01:49:10.535732  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  340 01:49:10.539009  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000

  341 01:49:10.545819  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  342 01:49:10.548788  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000

  343 01:49:10.552165  gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000

  344 01:49:10.555769  TCO_STS:   0000 0000

  345 01:49:10.558891  GEN_PMCON: d0015038 00002200

  346 01:49:10.562588  GBLRST_CAUSE: 00000000 00000000

  347 01:49:10.565508  HPR_CAUSE0: 00000000

  348 01:49:10.565591  prev_sleep_state 5

  349 01:49:10.568941  Boot Count incremented to 21725

  350 01:49:10.575861  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  351 01:49:10.582209  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  352 01:49:10.591962  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  353 01:49:10.598963  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c

  354 01:49:10.602665  Chrome EC: UHEPI supported

  355 01:49:10.606290  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  356 01:49:10.619819  Probing TPM:  done!

  357 01:49:10.626225  Connected to device vid:did:rid of 1ae0:0028:00

  358 01:49:10.636121  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e

  359 01:49:10.639474  Initialized TPM device CR50 revision 0

  360 01:49:10.654782  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  361 01:49:10.661066  MRC: Hash idx 0x100b comparison successful.

  362 01:49:10.664456  MRC cache found, size faa8

  363 01:49:10.664538  bootmode is set to: 2

  364 01:49:10.667616  SPD index = 2

  365 01:49:10.674476  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c

  366 01:49:10.677992  SPD: module type is LPDDR4X

  367 01:49:10.681161  SPD: module part number is MT53D1G64D4NW-046

  368 01:49:10.688173  SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb

  369 01:49:10.691001  SPD: device width 16 bits, bus width 16 bits

  370 01:49:10.697625  SPD: module size is 2048 MB (per channel)

  371 01:49:11.125672  CBMEM:

  372 01:49:11.129050  IMD: root @ 0x76fff000 254 entries.

  373 01:49:11.132477  IMD: root @ 0x76ffec00 62 entries.

  374 01:49:11.135944  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  375 01:49:11.142393  FMAP: area RW_VPD found @ f35000 (8192 bytes)

  376 01:49:11.145806  External stage cache:

  377 01:49:11.148835  IMD: root @ 0x7b3ff000 254 entries.

  378 01:49:11.152298  IMD: root @ 0x7b3fec00 62 entries.

  379 01:49:11.167537  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  380 01:49:11.173582  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  381 01:49:11.179959  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  382 01:49:11.193890  MRC: 'RECOVERY_MRC_CACHE' does not need update.

  383 01:49:11.200894  cse_lite: Skip switching to RW in the recovery path

  384 01:49:11.200980  8 DIMMs found

  385 01:49:11.203701  SMM Memory Map

  386 01:49:11.207029  SMRAM       : 0x7b000000 0x800000

  387 01:49:11.210651   Subregion 0: 0x7b000000 0x200000

  388 01:49:11.213584   Subregion 1: 0x7b200000 0x200000

  389 01:49:11.217023   Subregion 2: 0x7b400000 0x400000

  390 01:49:11.217106  top_of_ram = 0x77000000

  391 01:49:11.223595  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  392 01:49:11.230240  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)

  393 01:49:11.233727  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  394 01:49:11.240507  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  395 01:49:11.246497  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c

  396 01:49:11.253414  Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)

  397 01:49:11.263817  Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500

  398 01:49:11.270396  Processing 211 relocs. Offset value of 0x74c0b000

  399 01:49:11.276614  BS: romstage times (exec / console): total (unknown) / 277 ms

  400 01:49:11.282434  

  401 01:49:11.282517  

  402 01:49:11.292490  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...

  403 01:49:11.295689  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  404 01:49:11.305716  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  405 01:49:11.312149  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  406 01:49:11.318822  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec

  407 01:49:11.325387  Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)

  408 01:49:11.369118  Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270

  409 01:49:11.376302  Processing 5008 relocs. Offset value of 0x75d98000

  410 01:49:11.379349  BS: postcar times (exec / console): total (unknown) / 59 ms

  411 01:49:11.382469  

  412 01:49:11.382576  

  413 01:49:11.392464  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...

  414 01:49:11.392575  Normal boot

  415 01:49:11.395950  FW_CONFIG value is 0x804c02

  416 01:49:11.399849  PCI: 00:07.0 disabled by fw_config

  417 01:49:11.402879  PCI: 00:07.1 disabled by fw_config

  418 01:49:11.406090  PCI: 00:0d.2 disabled by fw_config

  419 01:49:11.409282  PCI: 00:1c.7 disabled by fw_config

  420 01:49:11.416166  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  421 01:49:11.422438  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  422 01:49:11.426475  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  423 01:49:11.429625  GENERIC: 0.0 disabled by fw_config

  424 01:49:11.432599  GENERIC: 1.0 disabled by fw_config

  425 01:49:11.439163  fw_config match found: DB_USB=USB3_ACTIVE

  426 01:49:11.442276  fw_config match found: DB_USB=USB3_ACTIVE

  427 01:49:11.446322  fw_config match found: DB_USB=USB3_ACTIVE

  428 01:49:11.449407  fw_config match found: DB_USB=USB3_ACTIVE

  429 01:49:11.456046  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  430 01:49:11.462453  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  431 01:49:11.471988  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  432 01:49:11.478925  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c

  433 01:49:11.482002  microcode: sig=0x806c1 pf=0x80 revision=0x86

  434 01:49:11.488865  microcode: Update skipped, already up-to-date

  435 01:49:11.495354  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c

  436 01:49:11.522800  Detected 4 core, 8 thread CPU.

  437 01:49:11.525948  Setting up SMI for CPU

  438 01:49:11.529154  IED base = 0x7b400000

  439 01:49:11.533017  IED size = 0x00400000

  440 01:49:11.533101  Will perform SMM setup.

  441 01:49:11.539348  CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.

  442 01:49:11.545639  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

  443 01:49:11.552425  Processing 16 relocs. Offset value of 0x00030000

  444 01:49:11.555852  Attempting to start 7 APs

  445 01:49:11.558759  Waiting for 10ms after sending INIT.

  446 01:49:11.574298  Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.

  447 01:49:11.574381  done.

  448 01:49:11.577801  AP: slot 3 apic_id 5.

  449 01:49:11.581147  AP: slot 7 apic_id 4.

  450 01:49:11.584101  AP: slot 6 apic_id 2.

  451 01:49:11.584184  AP: slot 2 apic_id 3.

  452 01:49:11.587784  AP: slot 5 apic_id 6.

  453 01:49:11.590845  AP: slot 4 apic_id 7.

  454 01:49:11.594517  Waiting for 2nd SIPI to complete...done.

  455 01:49:11.600757  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

  456 01:49:11.607371  Processing 13 relocs. Offset value of 0x00038000

  457 01:49:11.610732  Unable to locate Global NVS

  458 01:49:11.617347  SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)

  459 01:49:11.620682  Installing permanent SMM handler to 0x7b000000

  460 01:49:11.630487  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908

  461 01:49:11.633587  Processing 794 relocs. Offset value of 0x7b010000

  462 01:49:11.643489  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8

  463 01:49:11.646997  Processing 13 relocs. Offset value of 0x7b008000

  464 01:49:11.653488  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd

  465 01:49:11.660186  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd

  466 01:49:11.666618  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd

  467 01:49:11.669720  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd

  468 01:49:11.677067  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd

  469 01:49:11.683298  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd

  470 01:49:11.689758  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd

  471 01:49:11.693301  Unable to locate Global NVS

  472 01:49:11.699702  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)

  473 01:49:11.702882  Clearing SMI status registers

  474 01:49:11.706290  SMI_STS: PM1 

  475 01:49:11.706372  PM1_STS: PWRBTN 

  476 01:49:11.713282  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0

  477 01:49:11.716817  In relocation handler: CPU 0

  478 01:49:11.723137  New SMBASE=0x7b000000 IEDBASE=0x7b400000

  479 01:49:11.726170  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  480 01:49:11.729400  Relocation complete.

  481 01:49:11.736292  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1

  482 01:49:11.739482  In relocation handler: CPU 1

  483 01:49:11.742831  New SMBASE=0x7afffc00 IEDBASE=0x7b400000

  484 01:49:11.745973  Relocation complete.

  485 01:49:11.752770  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2

  486 01:49:11.755656  In relocation handler: CPU 2

  487 01:49:11.758932  New SMBASE=0x7afff800 IEDBASE=0x7b400000

  488 01:49:11.762379  Relocation complete.

  489 01:49:11.769027  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6

  490 01:49:11.772574  In relocation handler: CPU 6

  491 01:49:11.775406  New SMBASE=0x7affe800 IEDBASE=0x7b400000

  492 01:49:11.782313  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  493 01:49:11.782396  Relocation complete.

  494 01:49:11.788758  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7

  495 01:49:11.792358  In relocation handler: CPU 7

  496 01:49:11.795179  New SMBASE=0x7affe400 IEDBASE=0x7b400000

  497 01:49:11.802240  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  498 01:49:11.805259  Relocation complete.

  499 01:49:11.812013  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3

  500 01:49:11.815171  In relocation handler: CPU 3

  501 01:49:11.818571  New SMBASE=0x7afff400 IEDBASE=0x7b400000

  502 01:49:11.821840  Relocation complete.

  503 01:49:11.828170  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5

  504 01:49:11.831866  In relocation handler: CPU 5

  505 01:49:11.834931  New SMBASE=0x7affec00 IEDBASE=0x7b400000

  506 01:49:11.838517  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  507 01:49:11.841664  Relocation complete.

  508 01:49:11.848671  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4

  509 01:49:11.852233  In relocation handler: CPU 4

  510 01:49:11.856070  New SMBASE=0x7afff000 IEDBASE=0x7b400000

  511 01:49:11.859670  Relocation complete.

  512 01:49:11.859753  Initializing CPU #0

  513 01:49:11.862730  CPU: vendor Intel device 806c1

  514 01:49:11.866181  CPU: family 06, model 8c, stepping 01

  515 01:49:11.869428  Clearing out pending MCEs

  516 01:49:11.872714  Setting up local APIC...

  517 01:49:11.876129   apic_id: 0x00 done.

  518 01:49:11.879701  Turbo is available but hidden

  519 01:49:11.882866  Turbo is available and visible

  520 01:49:11.886003  microcode: Update skipped, already up-to-date

  521 01:49:11.889352  CPU #0 initialized

  522 01:49:11.889435  Initializing CPU #5

  523 01:49:11.892780  Initializing CPU #4

  524 01:49:11.892863  Initializing CPU #3

  525 01:49:11.895966  Initializing CPU #6

  526 01:49:11.899059  Initializing CPU #2

  527 01:49:11.902631  CPU: vendor Intel device 806c1

  528 01:49:11.905857  CPU: family 06, model 8c, stepping 01

  529 01:49:11.905940  Initializing CPU #1

  530 01:49:11.909151  CPU: vendor Intel device 806c1

  531 01:49:11.912386  Initializing CPU #7

  532 01:49:11.915725  CPU: family 06, model 8c, stepping 01

  533 01:49:11.919183  CPU: vendor Intel device 806c1

  534 01:49:11.922460  CPU: family 06, model 8c, stepping 01

  535 01:49:11.925423  Clearing out pending MCEs

  536 01:49:11.929449  Clearing out pending MCEs

  537 01:49:11.932496  Setting up local APIC...

  538 01:49:11.935910  CPU: vendor Intel device 806c1

  539 01:49:11.938827  CPU: family 06, model 8c, stepping 01

  540 01:49:11.942436  CPU: vendor Intel device 806c1

  541 01:49:11.945704  CPU: family 06, model 8c, stepping 01

  542 01:49:11.949131  Clearing out pending MCEs

  543 01:49:11.949214  Clearing out pending MCEs

  544 01:49:11.952411  Setting up local APIC...

  545 01:49:11.955445  Clearing out pending MCEs

  546 01:49:11.958942  CPU: vendor Intel device 806c1

  547 01:49:11.962385  CPU: family 06, model 8c, stepping 01

  548 01:49:11.965699  Setting up local APIC...

  549 01:49:11.968635  CPU: vendor Intel device 806c1

  550 01:49:11.972015  CPU: family 06, model 8c, stepping 01

  551 01:49:11.975400  Setting up local APIC...

  552 01:49:11.975483  Clearing out pending MCEs

  553 01:49:11.979055  Clearing out pending MCEs

  554 01:49:11.982153   apic_id: 0x02 done.

  555 01:49:11.985377  Setting up local APIC...

  556 01:49:11.985459  Setting up local APIC...

  557 01:49:11.988684   apic_id: 0x04 done.

  558 01:49:11.991926   apic_id: 0x05 done.

  559 01:49:11.995058  microcode: Update skipped, already up-to-date

  560 01:49:12.001690  microcode: Update skipped, already up-to-date

  561 01:49:12.001773  CPU #7 initialized

  562 01:49:12.004908   apic_id: 0x01 done.

  563 01:49:12.004991   apic_id: 0x06 done.

  564 01:49:12.008392  Setting up local APIC...

  565 01:49:12.014898  microcode: Update skipped, already up-to-date

  566 01:49:12.018234  microcode: Update skipped, already up-to-date

  567 01:49:12.022076  CPU #1 initialized

  568 01:49:12.022158  CPU #6 initialized

  569 01:49:12.025224  CPU #3 initialized

  570 01:49:12.025307   apic_id: 0x03 done.

  571 01:49:12.028289   apic_id: 0x07 done.

  572 01:49:12.031191  microcode: Update skipped, already up-to-date

  573 01:49:12.037844  microcode: Update skipped, already up-to-date

  574 01:49:12.041449  microcode: Update skipped, already up-to-date

  575 01:49:12.044664  CPU #4 initialized

  576 01:49:12.044746  CPU #5 initialized

  577 01:49:12.047891  CPU #2 initialized

  578 01:49:12.051433  bsp_do_flight_plan done after 454 msecs.

  579 01:49:12.055261  CPU: frequency set to 4400 MHz

  580 01:49:12.057717  Enabling SMIs.

  581 01:49:12.064090  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 346 / 317 ms

  582 01:49:12.078895  SATAXPCIE1 indicates PCIe NVMe is present

  583 01:49:12.082531  Probing TPM:  done!

  584 01:49:12.085653  Connected to device vid:did:rid of 1ae0:0028:00

  585 01:49:12.096421  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e

  586 01:49:12.099703  Initialized TPM device CR50 revision 0

  587 01:49:12.103226  Enabling S0i3.4

  588 01:49:12.110102  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc

  589 01:49:12.112755  Found a VBT of 8704 bytes after decompression

  590 01:49:12.119801  cse_lite: CSE RO boot. HybridStorageMode disabled

  591 01:49:12.126197  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called

  592 01:49:12.201872  FSPS returned 0

  593 01:49:12.204925  Executing Phase 1 of FspMultiPhaseSiInit

  594 01:49:12.214814  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  595 01:49:12.218315  port C0 DISC req: usage 1 usb3 1 usb2 5

  596 01:49:12.221493  Raw Buffer output 0 00000511

  597 01:49:12.224841  Raw Buffer output 1 00000000

  598 01:49:12.228370  pmc_send_ipc_cmd succeeded

  599 01:49:12.234955  port C1 DISC req: usage 1 usb3 2 usb2 3

  600 01:49:12.235040  Raw Buffer output 0 00000321

  601 01:49:12.238395  Raw Buffer output 1 00000000

  602 01:49:12.242808  pmc_send_ipc_cmd succeeded

  603 01:49:12.247999  Detected 4 core, 8 thread CPU.

  604 01:49:12.250939  Detected 4 core, 8 thread CPU.

  605 01:49:12.451890  Display FSP Version Info HOB

  606 01:49:12.455163  Reference Code - CPU = a.0.4c.31

  607 01:49:12.458376  uCode Version = 0.0.0.86

  608 01:49:12.462015  TXT ACM version = ff.ff.ff.ffff

  609 01:49:12.464717  Reference Code - ME = a.0.4c.31

  610 01:49:12.468203  MEBx version = 0.0.0.0

  611 01:49:12.471379  ME Firmware Version = Consumer SKU

  612 01:49:12.474779  Reference Code - PCH = a.0.4c.31

  613 01:49:12.478172  PCH-CRID Status = Disabled

  614 01:49:12.481327  PCH-CRID Original Value = ff.ff.ff.ffff

  615 01:49:12.485091  PCH-CRID New Value = ff.ff.ff.ffff

  616 01:49:12.487850  OPROM - RST - RAID = ff.ff.ff.ffff

  617 01:49:12.491401  PCH Hsio Version = 4.0.0.0

  618 01:49:12.494394  Reference Code - SA - System Agent = a.0.4c.31

  619 01:49:12.497966  Reference Code - MRC = 2.0.0.1

  620 01:49:12.501072  SA - PCIe Version = a.0.4c.31

  621 01:49:12.504756  SA-CRID Status = Disabled

  622 01:49:12.507764  SA-CRID Original Value = 0.0.0.1

  623 01:49:12.511090  SA-CRID New Value = 0.0.0.1

  624 01:49:12.514638  OPROM - VBIOS = ff.ff.ff.ffff

  625 01:49:12.517471  IO Manageability Engine FW Version = 11.1.4.0

  626 01:49:12.521294  PHY Build Version = 0.0.0.e0

  627 01:49:12.524075  Thunderbolt(TM) FW Version = 0.0.0.0

  628 01:49:12.531045  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  629 01:49:12.534293  ITSS IRQ Polarities Before:

  630 01:49:12.534785  IPC0: 0xffffffff

  631 01:49:12.537671  IPC1: 0xffffffff

  632 01:49:12.540990  IPC2: 0xffffffff

  633 01:49:12.541413  IPC3: 0xffffffff

  634 01:49:12.544024  ITSS IRQ Polarities After:

  635 01:49:12.544447  IPC0: 0xffffffff

  636 01:49:12.547504  IPC1: 0xffffffff

  637 01:49:12.547937  IPC2: 0xffffffff

  638 01:49:12.550669  IPC3: 0xffffffff

  639 01:49:12.553990  Found PCIe Root Port #9 at PCI: 00:1d.0.

  640 01:49:12.567100  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.

  641 01:49:12.580329  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.

  642 01:49:12.590861  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.

  643 01:49:12.596937  BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms

  644 01:49:12.600164  Enumerating buses...

  645 01:49:12.603488  Show all devs... Before device enumeration.

  646 01:49:12.606963  Root Device: enabled 1

  647 01:49:12.610158  DOMAIN: 0000: enabled 1

  648 01:49:12.610665  CPU_CLUSTER: 0: enabled 1

  649 01:49:12.613447  PCI: 00:00.0: enabled 1

  650 01:49:12.616483  PCI: 00:02.0: enabled 1

  651 01:49:12.619858  PCI: 00:04.0: enabled 1

  652 01:49:12.620284  PCI: 00:05.0: enabled 1

  653 01:49:12.623061  PCI: 00:06.0: enabled 0

  654 01:49:12.626177  PCI: 00:07.0: enabled 0

  655 01:49:12.629590  PCI: 00:07.1: enabled 0

  656 01:49:12.630062  PCI: 00:07.2: enabled 0

  657 01:49:12.633473  PCI: 00:07.3: enabled 0

  658 01:49:12.636384  PCI: 00:08.0: enabled 1

  659 01:49:12.639911  PCI: 00:09.0: enabled 0

  660 01:49:12.640379  PCI: 00:0a.0: enabled 0

  661 01:49:12.642762  PCI: 00:0d.0: enabled 1

  662 01:49:12.646652  PCI: 00:0d.1: enabled 0

  663 01:49:12.647135  PCI: 00:0d.2: enabled 0

  664 01:49:12.649875  PCI: 00:0d.3: enabled 0

  665 01:49:12.653072  PCI: 00:0e.0: enabled 0

  666 01:49:12.655953  PCI: 00:10.2: enabled 1

  667 01:49:12.656382  PCI: 00:10.6: enabled 0

  668 01:49:12.659275  PCI: 00:10.7: enabled 0

  669 01:49:12.662682  PCI: 00:12.0: enabled 0

  670 01:49:12.665714  PCI: 00:12.6: enabled 0

  671 01:49:12.666141  PCI: 00:13.0: enabled 0

  672 01:49:12.668967  PCI: 00:14.0: enabled 1

  673 01:49:12.672639  PCI: 00:14.1: enabled 0

  674 01:49:12.676120  PCI: 00:14.2: enabled 1

  675 01:49:12.676585  PCI: 00:14.3: enabled 1

  676 01:49:12.679071  PCI: 00:15.0: enabled 1

  677 01:49:12.682667  PCI: 00:15.1: enabled 1

  678 01:49:12.686053  PCI: 00:15.2: enabled 1

  679 01:49:12.686477  PCI: 00:15.3: enabled 1

  680 01:49:12.689011  PCI: 00:16.0: enabled 1

  681 01:49:12.692456  PCI: 00:16.1: enabled 0

  682 01:49:12.695789  PCI: 00:16.2: enabled 0

  683 01:49:12.696245  PCI: 00:16.3: enabled 0

  684 01:49:12.698808  PCI: 00:16.4: enabled 0

  685 01:49:12.702083  PCI: 00:16.5: enabled 0

  686 01:49:12.705730  PCI: 00:17.0: enabled 1

  687 01:49:12.706159  PCI: 00:19.0: enabled 0

  688 01:49:12.708646  PCI: 00:19.1: enabled 1

  689 01:49:12.712124  PCI: 00:19.2: enabled 0

  690 01:49:12.712552  PCI: 00:1c.0: enabled 1

  691 01:49:12.715365  PCI: 00:1c.1: enabled 0

  692 01:49:12.718642  PCI: 00:1c.2: enabled 0

  693 01:49:12.721830  PCI: 00:1c.3: enabled 0

  694 01:49:12.722257  PCI: 00:1c.4: enabled 0

  695 01:49:12.725383  PCI: 00:1c.5: enabled 0

  696 01:49:12.728309  PCI: 00:1c.6: enabled 1

  697 01:49:12.731971  PCI: 00:1c.7: enabled 0

  698 01:49:12.732457  PCI: 00:1d.0: enabled 1

  699 01:49:12.735343  PCI: 00:1d.1: enabled 0

  700 01:49:12.738964  PCI: 00:1d.2: enabled 1

  701 01:49:12.741883  PCI: 00:1d.3: enabled 0

  702 01:49:12.742351  PCI: 00:1e.0: enabled 1

  703 01:49:12.745164  PCI: 00:1e.1: enabled 0

  704 01:49:12.748600  PCI: 00:1e.2: enabled 1

  705 01:49:12.751936  PCI: 00:1e.3: enabled 1

  706 01:49:12.752453  PCI: 00:1f.0: enabled 1

  707 01:49:12.755097  PCI: 00:1f.1: enabled 0

  708 01:49:12.758047  PCI: 00:1f.2: enabled 1

  709 01:49:12.761425  PCI: 00:1f.3: enabled 1

  710 01:49:12.761508  PCI: 00:1f.4: enabled 0

  711 01:49:12.764638  PCI: 00:1f.5: enabled 1

  712 01:49:12.769080  PCI: 00:1f.6: enabled 0

  713 01:49:12.771425  PCI: 00:1f.7: enabled 0

  714 01:49:12.771507  APIC: 00: enabled 1

  715 01:49:12.774418  GENERIC: 0.0: enabled 1

  716 01:49:12.777764  GENERIC: 0.0: enabled 1

  717 01:49:12.777852  GENERIC: 1.0: enabled 1

  718 01:49:12.781067  GENERIC: 0.0: enabled 1

  719 01:49:12.784503  GENERIC: 1.0: enabled 1

  720 01:49:12.787507  USB0 port 0: enabled 1

  721 01:49:12.787590  GENERIC: 0.0: enabled 1

  722 01:49:12.791119  USB0 port 0: enabled 1

  723 01:49:12.794225  GENERIC: 0.0: enabled 1

  724 01:49:12.794307  I2C: 00:1a: enabled 1

  725 01:49:12.797407  I2C: 00:31: enabled 1

  726 01:49:12.800842  I2C: 00:32: enabled 1

  727 01:49:12.800924  I2C: 00:10: enabled 1

  728 01:49:12.804206  I2C: 00:15: enabled 1

  729 01:49:12.807787  GENERIC: 0.0: enabled 0

  730 01:49:12.810973  GENERIC: 1.0: enabled 0

  731 01:49:12.811068  GENERIC: 0.0: enabled 1

  732 01:49:12.814070  SPI: 00: enabled 1

  733 01:49:12.817608  SPI: 00: enabled 1

  734 01:49:12.817690  PNP: 0c09.0: enabled 1

  735 01:49:12.820646  GENERIC: 0.0: enabled 1

  736 01:49:12.823964  USB3 port 0: enabled 1

  737 01:49:12.824047  USB3 port 1: enabled 1

  738 01:49:12.827264  USB3 port 2: enabled 0

  739 01:49:12.830448  USB3 port 3: enabled 0

  740 01:49:12.834228  USB2 port 0: enabled 0

  741 01:49:12.834311  USB2 port 1: enabled 1

  742 01:49:12.837644  USB2 port 2: enabled 1

  743 01:49:12.840480  USB2 port 3: enabled 0

  744 01:49:12.840563  USB2 port 4: enabled 1

  745 01:49:12.844087  USB2 port 5: enabled 0

  746 01:49:12.847098  USB2 port 6: enabled 0

  747 01:49:12.850346  USB2 port 7: enabled 0

  748 01:49:12.850429  USB2 port 8: enabled 0

  749 01:49:12.853909  USB2 port 9: enabled 0

  750 01:49:12.857540  USB3 port 0: enabled 0

  751 01:49:12.857622  USB3 port 1: enabled 1

  752 01:49:12.860654  USB3 port 2: enabled 0

  753 01:49:12.863593  USB3 port 3: enabled 0

  754 01:49:12.867046  GENERIC: 0.0: enabled 1

  755 01:49:12.867129  GENERIC: 1.0: enabled 1

  756 01:49:12.870415  APIC: 01: enabled 1

  757 01:49:12.873769  APIC: 03: enabled 1

  758 01:49:12.873850  APIC: 05: enabled 1

  759 01:49:12.876722  APIC: 07: enabled 1

  760 01:49:12.876804  APIC: 06: enabled 1

  761 01:49:12.880491  APIC: 02: enabled 1

  762 01:49:12.883414  APIC: 04: enabled 1

  763 01:49:12.883496  Compare with tree...

  764 01:49:12.886796  Root Device: enabled 1

  765 01:49:12.889865   DOMAIN: 0000: enabled 1

  766 01:49:12.893168    PCI: 00:00.0: enabled 1

  767 01:49:12.893253    PCI: 00:02.0: enabled 1

  768 01:49:12.896305    PCI: 00:04.0: enabled 1

  769 01:49:12.900042     GENERIC: 0.0: enabled 1

  770 01:49:12.902946    PCI: 00:05.0: enabled 1

  771 01:49:12.906744    PCI: 00:06.0: enabled 0

  772 01:49:12.906826    PCI: 00:07.0: enabled 0

  773 01:49:12.909942     GENERIC: 0.0: enabled 1

  774 01:49:12.913330    PCI: 00:07.1: enabled 0

  775 01:49:12.916224     GENERIC: 1.0: enabled 1

  776 01:49:12.919515    PCI: 00:07.2: enabled 0

  777 01:49:12.919597     GENERIC: 0.0: enabled 1

  778 01:49:12.923066    PCI: 00:07.3: enabled 0

  779 01:49:12.926345     GENERIC: 1.0: enabled 1

  780 01:49:12.929499    PCI: 00:08.0: enabled 1

  781 01:49:12.932591    PCI: 00:09.0: enabled 0

  782 01:49:12.932673    PCI: 00:0a.0: enabled 0

  783 01:49:12.936128    PCI: 00:0d.0: enabled 1

  784 01:49:12.939163     USB0 port 0: enabled 1

  785 01:49:12.942573      USB3 port 0: enabled 1

  786 01:49:12.945996      USB3 port 1: enabled 1

  787 01:49:12.949210      USB3 port 2: enabled 0

  788 01:49:12.949292      USB3 port 3: enabled 0

  789 01:49:12.952675    PCI: 00:0d.1: enabled 0

  790 01:49:12.955831    PCI: 00:0d.2: enabled 0

  791 01:49:12.959357     GENERIC: 0.0: enabled 1

  792 01:49:12.962496    PCI: 00:0d.3: enabled 0

  793 01:49:12.962590    PCI: 00:0e.0: enabled 0

  794 01:49:12.966630    PCI: 00:10.2: enabled 1

  795 01:49:12.969155    PCI: 00:10.6: enabled 0

  796 01:49:12.972228    PCI: 00:10.7: enabled 0

  797 01:49:12.975755    PCI: 00:12.0: enabled 0

  798 01:49:12.975837    PCI: 00:12.6: enabled 0

  799 01:49:12.979114    PCI: 00:13.0: enabled 0

  800 01:49:12.982111    PCI: 00:14.0: enabled 1

  801 01:49:12.985306     USB0 port 0: enabled 1

  802 01:49:12.989137      USB2 port 0: enabled 0

  803 01:49:12.989219      USB2 port 1: enabled 1

  804 01:49:12.992204      USB2 port 2: enabled 1

  805 01:49:12.995567      USB2 port 3: enabled 0

  806 01:49:12.998819      USB2 port 4: enabled 1

  807 01:49:13.002220      USB2 port 5: enabled 0

  808 01:49:13.005782      USB2 port 6: enabled 0

  809 01:49:13.005865      USB2 port 7: enabled 0

  810 01:49:13.008764      USB2 port 8: enabled 0

  811 01:49:13.012468      USB2 port 9: enabled 0

  812 01:49:13.015800      USB3 port 0: enabled 0

  813 01:49:13.018491      USB3 port 1: enabled 1

  814 01:49:13.021827      USB3 port 2: enabled 0

  815 01:49:13.021909      USB3 port 3: enabled 0

  816 01:49:13.025168    PCI: 00:14.1: enabled 0

  817 01:49:13.028392    PCI: 00:14.2: enabled 1

  818 01:49:13.031822    PCI: 00:14.3: enabled 1

  819 01:49:13.035167     GENERIC: 0.0: enabled 1

  820 01:49:13.035249    PCI: 00:15.0: enabled 1

  821 01:49:13.038743     I2C: 00:1a: enabled 1

  822 01:49:13.041623     I2C: 00:31: enabled 1

  823 01:49:13.045322     I2C: 00:32: enabled 1

  824 01:49:13.048553    PCI: 00:15.1: enabled 1

  825 01:49:13.048635     I2C: 00:10: enabled 1

  826 01:49:13.051453    PCI: 00:15.2: enabled 1

  827 01:49:13.054898    PCI: 00:15.3: enabled 1

  828 01:49:13.058020    PCI: 00:16.0: enabled 1

  829 01:49:13.061687    PCI: 00:16.1: enabled 0

  830 01:49:13.061770    PCI: 00:16.2: enabled 0

  831 01:49:13.064845    PCI: 00:16.3: enabled 0

  832 01:49:13.068107    PCI: 00:16.4: enabled 0

  833 01:49:13.072265    PCI: 00:16.5: enabled 0

  834 01:49:13.074496    PCI: 00:17.0: enabled 1

  835 01:49:13.074621    PCI: 00:19.0: enabled 0

  836 01:49:13.077958    PCI: 00:19.1: enabled 1

  837 01:49:13.081299     I2C: 00:15: enabled 1

  838 01:49:13.084535    PCI: 00:19.2: enabled 0

  839 01:49:13.087826    PCI: 00:1d.0: enabled 1

  840 01:49:13.087908     GENERIC: 0.0: enabled 1

  841 01:49:13.090841    PCI: 00:1e.0: enabled 1

  842 01:49:13.094549    PCI: 00:1e.1: enabled 0

  843 01:49:13.098783    PCI: 00:1e.2: enabled 1

  844 01:49:13.098866     SPI: 00: enabled 1

  845 01:49:13.102008    PCI: 00:1e.3: enabled 1

  846 01:49:13.105298     SPI: 00: enabled 1

  847 01:49:13.105379    PCI: 00:1f.0: enabled 1

  848 01:49:13.109213     PNP: 0c09.0: enabled 1

  849 01:49:13.111906    PCI: 00:1f.1: enabled 0

  850 01:49:13.115195    PCI: 00:1f.2: enabled 1

  851 01:49:13.118783     GENERIC: 0.0: enabled 1

  852 01:49:13.118865      GENERIC: 0.0: enabled 1

  853 01:49:13.121820      GENERIC: 1.0: enabled 1

  854 01:49:13.125164    PCI: 00:1f.3: enabled 1

  855 01:49:13.128640    PCI: 00:1f.4: enabled 0

  856 01:49:13.180454    PCI: 00:1f.5: enabled 1

  857 01:49:13.180548    PCI: 00:1f.6: enabled 0

  858 01:49:13.180616    PCI: 00:1f.7: enabled 0

  859 01:49:13.180875   CPU_CLUSTER: 0: enabled 1

  860 01:49:13.180942    APIC: 00: enabled 1

  861 01:49:13.182095    APIC: 01: enabled 1

  862 01:49:13.182177    APIC: 03: enabled 1

  863 01:49:13.182241    APIC: 05: enabled 1

  864 01:49:13.182511    APIC: 07: enabled 1

  865 01:49:13.182615    APIC: 06: enabled 1

  866 01:49:13.182700    APIC: 02: enabled 1

  867 01:49:13.182773    APIC: 04: enabled 1

  868 01:49:13.182832  Root Device scanning...

  869 01:49:13.183271  scan_static_bus for Root Device

  870 01:49:13.183352  DOMAIN: 0000 enabled

  871 01:49:13.183417  CPU_CLUSTER: 0 enabled

  872 01:49:13.183777  DOMAIN: 0000 scanning...

  873 01:49:13.183866  PCI: pci_scan_bus for bus 00

  874 01:49:13.184114  PCI: 00:00.0 [8086/0000] ops

  875 01:49:13.184180  PCI: 00:00.0 [8086/9a12] enabled

  876 01:49:13.230489  PCI: 00:02.0 [8086/0000] bus ops

  877 01:49:13.230612  PCI: 00:02.0 [8086/9a40] enabled

  878 01:49:13.230873  PCI: 00:04.0 [8086/0000] bus ops

  879 01:49:13.230944  PCI: 00:04.0 [8086/9a03] enabled

  880 01:49:13.231588  PCI: 00:05.0 [8086/9a19] enabled

  881 01:49:13.231670  PCI: 00:07.0 [0000/0000] hidden

  882 01:49:13.232163  PCI: 00:08.0 [8086/9a11] enabled

  883 01:49:13.232266  PCI: 00:0a.0 [8086/9a0d] disabled

  884 01:49:13.232521  PCI: 00:0d.0 [8086/0000] bus ops

  885 01:49:13.232602  PCI: 00:0d.0 [8086/9a13] enabled

  886 01:49:13.232666  PCI: 00:14.0 [8086/0000] bus ops

  887 01:49:13.233030  PCI: 00:14.0 [8086/a0ed] enabled

  888 01:49:13.233118  PCI: 00:14.2 [8086/a0ef] enabled

  889 01:49:13.233365  PCI: 00:14.3 [8086/0000] bus ops

  890 01:49:13.233430  PCI: 00:14.3 [8086/a0f0] enabled

  891 01:49:13.245752  PCI: 00:15.0 [8086/0000] bus ops

  892 01:49:13.245835  PCI: 00:15.0 [8086/a0e8] enabled

  893 01:49:13.246267  PCI: 00:15.1 [8086/0000] bus ops

  894 01:49:13.246350  PCI: 00:15.1 [8086/a0e9] enabled

  895 01:49:13.249286  PCI: 00:15.2 [8086/0000] bus ops

  896 01:49:13.249368  PCI: 00:15.2 [8086/a0ea] enabled

  897 01:49:13.252728  PCI: 00:15.3 [8086/0000] bus ops

  898 01:49:13.255856  PCI: 00:15.3 [8086/a0eb] enabled

  899 01:49:13.258921  PCI: 00:16.0 [8086/0000] ops

  900 01:49:13.262426  PCI: 00:16.0 [8086/a0e0] enabled

  901 01:49:13.268949  PCI: Static device PCI: 00:17.0 not found, disabling it.

  902 01:49:13.272472  PCI: 00:19.0 [8086/0000] bus ops

  903 01:49:13.275891  PCI: 00:19.0 [8086/a0c5] disabled

  904 01:49:13.278707  PCI: 00:19.1 [8086/0000] bus ops

  905 01:49:13.282221  PCI: 00:19.1 [8086/a0c6] enabled

  906 01:49:13.285908  PCI: 00:1d.0 [8086/0000] bus ops

  907 01:49:13.289092  PCI: 00:1d.0 [8086/a0b0] enabled

  908 01:49:13.292107  PCI: 00:1e.0 [8086/0000] ops

  909 01:49:13.295238  PCI: 00:1e.0 [8086/a0a8] enabled

  910 01:49:13.298837  PCI: 00:1e.2 [8086/0000] bus ops

  911 01:49:13.302195  PCI: 00:1e.2 [8086/a0aa] enabled

  912 01:49:13.305516  PCI: 00:1e.3 [8086/0000] bus ops

  913 01:49:13.308943  PCI: 00:1e.3 [8086/a0ab] enabled

  914 01:49:13.312102  PCI: 00:1f.0 [8086/0000] bus ops

  915 01:49:13.315067  PCI: 00:1f.0 [8086/a087] enabled

  916 01:49:13.315172  RTC Init

  917 01:49:13.318772  Set power on after power failure.

  918 01:49:13.322096  Disabling Deep S3

  919 01:49:13.325558  Disabling Deep S3

  920 01:49:13.325653  Disabling Deep S4

  921 01:49:13.328613  Disabling Deep S4

  922 01:49:13.328722  Disabling Deep S5

  923 01:49:13.331751  Disabling Deep S5

  924 01:49:13.335229  PCI: 00:1f.2 [0000/0000] hidden

  925 01:49:13.338450  PCI: 00:1f.3 [8086/0000] bus ops

  926 01:49:13.342198  PCI: 00:1f.3 [8086/a0c8] enabled

  927 01:49:13.345038  PCI: 00:1f.5 [8086/0000] bus ops

  928 01:49:13.348351  PCI: 00:1f.5 [8086/a0a4] enabled

  929 01:49:13.351629  PCI: Leftover static devices:

  930 01:49:13.351702  PCI: 00:10.2

  931 01:49:13.354728  PCI: 00:10.6

  932 01:49:13.354823  PCI: 00:10.7

  933 01:49:13.354913  PCI: 00:06.0

  934 01:49:13.358086  PCI: 00:07.1

  935 01:49:13.358185  PCI: 00:07.2

  936 01:49:13.361439  PCI: 00:07.3

  937 01:49:13.361534  PCI: 00:09.0

  938 01:49:13.364739  PCI: 00:0d.1

  939 01:49:13.364810  PCI: 00:0d.2

  940 01:49:13.364883  PCI: 00:0d.3

  941 01:49:13.368341  PCI: 00:0e.0

  942 01:49:13.368427  PCI: 00:12.0

  943 01:49:13.371307  PCI: 00:12.6

  944 01:49:13.371378  PCI: 00:13.0

  945 01:49:13.371438  PCI: 00:14.1

  946 01:49:13.374366  PCI: 00:16.1

  947 01:49:13.374465  PCI: 00:16.2

  948 01:49:13.378038  PCI: 00:16.3

  949 01:49:13.378135  PCI: 00:16.4

  950 01:49:13.380989  PCI: 00:16.5

  951 01:49:13.381095  PCI: 00:17.0

  952 01:49:13.381184  PCI: 00:19.2

  953 01:49:13.384644  PCI: 00:1e.1

  954 01:49:13.384744  PCI: 00:1f.1

  955 01:49:13.387712  PCI: 00:1f.4

  956 01:49:13.387808  PCI: 00:1f.6

  957 01:49:13.387896  PCI: 00:1f.7

  958 01:49:13.390920  PCI: Check your devicetree.cb.

  959 01:49:13.395110  PCI: 00:02.0 scanning...

  960 01:49:13.397547  scan_generic_bus for PCI: 00:02.0

  961 01:49:13.400879  scan_generic_bus for PCI: 00:02.0 done

  962 01:49:13.407502  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

  963 01:49:13.411258  PCI: 00:04.0 scanning...

  964 01:49:13.414509  scan_generic_bus for PCI: 00:04.0

  965 01:49:13.414612  GENERIC: 0.0 enabled

  966 01:49:13.420765  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

  967 01:49:13.427150  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

  968 01:49:13.430633  PCI: 00:0d.0 scanning...

  969 01:49:13.433542  scan_static_bus for PCI: 00:0d.0

  970 01:49:13.433624  USB0 port 0 enabled

  971 01:49:13.437209  USB0 port 0 scanning...

  972 01:49:13.440290  scan_static_bus for USB0 port 0

  973 01:49:13.443811  USB3 port 0 enabled

  974 01:49:13.443892  USB3 port 1 enabled

  975 01:49:13.446835  USB3 port 2 disabled

  976 01:49:13.450109  USB3 port 3 disabled

  977 01:49:13.450192  USB3 port 0 scanning...

  978 01:49:13.453700  scan_static_bus for USB3 port 0

  979 01:49:13.456664  scan_static_bus for USB3 port 0 done

  980 01:49:13.463548  scan_bus: bus USB3 port 0 finished in 6 msecs

  981 01:49:13.466798  USB3 port 1 scanning...

  982 01:49:13.470212  scan_static_bus for USB3 port 1

  983 01:49:13.473312  scan_static_bus for USB3 port 1 done

  984 01:49:13.476716  scan_bus: bus USB3 port 1 finished in 6 msecs

  985 01:49:13.480087  scan_static_bus for USB0 port 0 done

  986 01:49:13.486458  scan_bus: bus USB0 port 0 finished in 43 msecs

  987 01:49:13.489919  scan_static_bus for PCI: 00:0d.0 done

  988 01:49:13.493009  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs

  989 01:49:13.496515  PCI: 00:14.0 scanning...

  990 01:49:13.499828  scan_static_bus for PCI: 00:14.0

  991 01:49:13.502926  USB0 port 0 enabled

  992 01:49:13.506288  USB0 port 0 scanning...

  993 01:49:13.509504  scan_static_bus for USB0 port 0

  994 01:49:13.509587  USB2 port 0 disabled

  995 01:49:13.512933  USB2 port 1 enabled

  996 01:49:13.513016  USB2 port 2 enabled

  997 01:49:13.516089  USB2 port 3 disabled

  998 01:49:13.519830  USB2 port 4 enabled

  999 01:49:13.519912  USB2 port 5 disabled

 1000 01:49:13.523192  USB2 port 6 disabled

 1001 01:49:13.526014  USB2 port 7 disabled

 1002 01:49:13.526095  USB2 port 8 disabled

 1003 01:49:13.529327  USB2 port 9 disabled

 1004 01:49:13.532793  USB3 port 0 disabled

 1005 01:49:13.532876  USB3 port 1 enabled

 1006 01:49:13.536289  USB3 port 2 disabled

 1007 01:49:13.539324  USB3 port 3 disabled

 1008 01:49:13.539406  USB2 port 1 scanning...

 1009 01:49:13.542670  scan_static_bus for USB2 port 1

 1010 01:49:13.549265  scan_static_bus for USB2 port 1 done

 1011 01:49:13.552376  scan_bus: bus USB2 port 1 finished in 6 msecs

 1012 01:49:13.555632  USB2 port 2 scanning...

 1013 01:49:13.559500  scan_static_bus for USB2 port 2

 1014 01:49:13.562235  scan_static_bus for USB2 port 2 done

 1015 01:49:13.565381  scan_bus: bus USB2 port 2 finished in 6 msecs

 1016 01:49:13.568693  USB2 port 4 scanning...

 1017 01:49:13.572267  scan_static_bus for USB2 port 4

 1018 01:49:13.575422  scan_static_bus for USB2 port 4 done

 1019 01:49:13.582551  scan_bus: bus USB2 port 4 finished in 6 msecs

 1020 01:49:13.582647  USB3 port 1 scanning...

 1021 01:49:13.585323  scan_static_bus for USB3 port 1

 1022 01:49:13.588897  scan_static_bus for USB3 port 1 done

 1023 01:49:13.595568  scan_bus: bus USB3 port 1 finished in 6 msecs

 1024 01:49:13.598449  scan_static_bus for USB0 port 0 done

 1025 01:49:13.601737  scan_bus: bus USB0 port 0 finished in 93 msecs

 1026 01:49:13.608413  scan_static_bus for PCI: 00:14.0 done

 1027 01:49:13.612064  scan_bus: bus PCI: 00:14.0 finished in 109 msecs

 1028 01:49:13.615416  PCI: 00:14.3 scanning...

 1029 01:49:13.618442  scan_static_bus for PCI: 00:14.3

 1030 01:49:13.621833  GENERIC: 0.0 enabled

 1031 01:49:13.625604  scan_static_bus for PCI: 00:14.3 done

 1032 01:49:13.628707  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

 1033 01:49:13.631411  PCI: 00:15.0 scanning...

 1034 01:49:13.635076  scan_static_bus for PCI: 00:15.0

 1035 01:49:13.638560  I2C: 00:1a enabled

 1036 01:49:13.638674  I2C: 00:31 enabled

 1037 01:49:13.641499  I2C: 00:32 enabled

 1038 01:49:13.644604  scan_static_bus for PCI: 00:15.0 done

 1039 01:49:13.647974  scan_bus: bus PCI: 00:15.0 finished in 12 msecs

 1040 01:49:13.651418  PCI: 00:15.1 scanning...

 1041 01:49:13.654729  scan_static_bus for PCI: 00:15.1

 1042 01:49:13.658255  I2C: 00:10 enabled

 1043 01:49:13.661441  scan_static_bus for PCI: 00:15.1 done

 1044 01:49:13.664537  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

 1045 01:49:13.668034  PCI: 00:15.2 scanning...

 1046 01:49:13.671011  scan_static_bus for PCI: 00:15.2

 1047 01:49:13.674776  scan_static_bus for PCI: 00:15.2 done

 1048 01:49:13.681758  scan_bus: bus PCI: 00:15.2 finished in 7 msecs

 1049 01:49:13.681860  PCI: 00:15.3 scanning...

 1050 01:49:13.684922  scan_static_bus for PCI: 00:15.3

 1051 01:49:13.691262  scan_static_bus for PCI: 00:15.3 done

 1052 01:49:13.695361  scan_bus: bus PCI: 00:15.3 finished in 7 msecs

 1053 01:49:13.697868  PCI: 00:19.1 scanning...

 1054 01:49:13.701581  scan_static_bus for PCI: 00:19.1

 1055 01:49:13.701684  I2C: 00:15 enabled

 1056 01:49:13.707717  scan_static_bus for PCI: 00:19.1 done

 1057 01:49:13.710964  scan_bus: bus PCI: 00:19.1 finished in 9 msecs

 1058 01:49:13.714625  PCI: 00:1d.0 scanning...

 1059 01:49:13.717553  do_pci_scan_bridge for PCI: 00:1d.0

 1060 01:49:13.720828  PCI: pci_scan_bus for bus 01

 1061 01:49:13.724391  PCI: 01:00.0 [15b7/5009] enabled

 1062 01:49:13.727917  GENERIC: 0.0 enabled

 1063 01:49:13.730775  Enabling Common Clock Configuration

 1064 01:49:13.734007  L1 Sub-State supported from root port 29

 1065 01:49:13.737632  L1 Sub-State Support = 0x5

 1066 01:49:13.741397  CommonModeRestoreTime = 0x28

 1067 01:49:13.744536  Power On Value = 0x16, Power On Scale = 0x0

 1068 01:49:13.747420  ASPM: Enabled L1

 1069 01:49:13.750756  PCIe: Max_Payload_Size adjusted to 128

 1070 01:49:13.753921  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs

 1071 01:49:13.757186  PCI: 00:1e.2 scanning...

 1072 01:49:13.760300  scan_generic_bus for PCI: 00:1e.2

 1073 01:49:13.763838  SPI: 00 enabled

 1074 01:49:13.767197  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done

 1075 01:49:13.773856  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs

 1076 01:49:13.777063  PCI: 00:1e.3 scanning...

 1077 01:49:13.780221  scan_generic_bus for PCI: 00:1e.3

 1078 01:49:13.780301  SPI: 00 enabled

 1079 01:49:13.787360  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1080 01:49:13.793279  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1081 01:49:13.793360  PCI: 00:1f.0 scanning...

 1082 01:49:13.796942  scan_static_bus for PCI: 00:1f.0

 1083 01:49:13.799988  PNP: 0c09.0 enabled

 1084 01:49:13.803387  PNP: 0c09.0 scanning...

 1085 01:49:13.806649  scan_static_bus for PNP: 0c09.0

 1086 01:49:13.810155  scan_static_bus for PNP: 0c09.0 done

 1087 01:49:13.813339  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1088 01:49:13.816786  scan_static_bus for PCI: 00:1f.0 done

 1089 01:49:13.823098  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1090 01:49:13.826883  PCI: 00:1f.2 scanning...

 1091 01:49:13.829898  scan_static_bus for PCI: 00:1f.2

 1092 01:49:13.829978  GENERIC: 0.0 enabled

 1093 01:49:13.833354  GENERIC: 0.0 scanning...

 1094 01:49:13.836372  scan_static_bus for GENERIC: 0.0

 1095 01:49:13.839331  GENERIC: 0.0 enabled

 1096 01:49:13.842631  GENERIC: 1.0 enabled

 1097 01:49:13.846080  scan_static_bus for GENERIC: 0.0 done

 1098 01:49:13.849889  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1099 01:49:13.852804  scan_static_bus for PCI: 00:1f.2 done

 1100 01:49:13.859578  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1101 01:49:13.862928  PCI: 00:1f.3 scanning...

 1102 01:49:13.866129  scan_static_bus for PCI: 00:1f.3

 1103 01:49:13.869349  scan_static_bus for PCI: 00:1f.3 done

 1104 01:49:13.872614  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1105 01:49:13.875873  PCI: 00:1f.5 scanning...

 1106 01:49:13.879092  scan_generic_bus for PCI: 00:1f.5

 1107 01:49:13.883371  scan_generic_bus for PCI: 00:1f.5 done

 1108 01:49:13.889051  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1109 01:49:13.892471  scan_bus: bus DOMAIN: 0000 finished in 716 msecs

 1110 01:49:13.895671  scan_static_bus for Root Device done

 1111 01:49:13.902328  scan_bus: bus Root Device finished in 736 msecs

 1112 01:49:13.902438  done

 1113 01:49:13.909040  BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms

 1114 01:49:13.912376  Chrome EC: UHEPI supported

 1115 01:49:13.918720  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)

 1116 01:49:13.925588  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1117 01:49:13.928574  SPI flash protection: WPSW=0 SRP0=0

 1118 01:49:13.931889  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1119 01:49:13.938498  BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms

 1120 01:49:13.942050  found VGA at PCI: 00:02.0

 1121 01:49:13.944949  Setting up VGA for PCI: 00:02.0

 1122 01:49:13.948177  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1123 01:49:13.954998  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1124 01:49:13.955079  Allocating resources...

 1125 01:49:13.958658  Reading resources...

 1126 01:49:13.961352  Root Device read_resources bus 0 link: 0

 1127 01:49:13.968399  DOMAIN: 0000 read_resources bus 0 link: 0

 1128 01:49:13.971573  PCI: 00:04.0 read_resources bus 1 link: 0

 1129 01:49:13.978535  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1130 01:49:13.981316  PCI: 00:0d.0 read_resources bus 0 link: 0

 1131 01:49:13.988020  USB0 port 0 read_resources bus 0 link: 0

 1132 01:49:13.991569  USB0 port 0 read_resources bus 0 link: 0 done

 1133 01:49:13.997938  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1134 01:49:14.001325  PCI: 00:14.0 read_resources bus 0 link: 0

 1135 01:49:14.004396  USB0 port 0 read_resources bus 0 link: 0

 1136 01:49:14.012119  USB0 port 0 read_resources bus 0 link: 0 done

 1137 01:49:14.015294  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1138 01:49:14.021983  PCI: 00:14.3 read_resources bus 0 link: 0

 1139 01:49:14.025534  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1140 01:49:14.032057  PCI: 00:15.0 read_resources bus 0 link: 0

 1141 01:49:14.034958  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1142 01:49:14.042377  PCI: 00:15.1 read_resources bus 0 link: 0

 1143 01:49:14.045511  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1144 01:49:14.052555  PCI: 00:19.1 read_resources bus 0 link: 0

 1145 01:49:14.056059  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1146 01:49:14.062110  PCI: 00:1d.0 read_resources bus 1 link: 0

 1147 01:49:14.065741  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1148 01:49:14.072503  PCI: 00:1e.2 read_resources bus 2 link: 0

 1149 01:49:14.075682  PCI: 00:1e.2 read_resources bus 2 link: 0 done

 1150 01:49:14.082153  PCI: 00:1e.3 read_resources bus 3 link: 0

 1151 01:49:14.085582  PCI: 00:1e.3 read_resources bus 3 link: 0 done

 1152 01:49:14.092416  PCI: 00:1f.0 read_resources bus 0 link: 0

 1153 01:49:14.095368  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1154 01:49:14.102451  PCI: 00:1f.2 read_resources bus 0 link: 0

 1155 01:49:14.105509  GENERIC: 0.0 read_resources bus 0 link: 0

 1156 01:49:14.111736  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1157 01:49:14.114987  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1158 01:49:14.121536  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1159 01:49:14.124796  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1160 01:49:14.131511  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1161 01:49:14.134739  Root Device read_resources bus 0 link: 0 done

 1162 01:49:14.138039  Done reading resources.

 1163 01:49:14.144511  Show resources in subtree (Root Device)...After reading.

 1164 01:49:14.147740   Root Device child on link 0 DOMAIN: 0000

 1165 01:49:14.151032    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1166 01:49:14.161340    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1167 01:49:14.171287    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1168 01:49:14.174275     PCI: 00:00.0

 1169 01:49:14.180951     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1170 01:49:14.190773     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1171 01:49:14.201045     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1172 01:49:14.210647     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1173 01:49:14.220751     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1174 01:49:14.230921     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1175 01:49:14.237214     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1176 01:49:14.247128     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1177 01:49:14.256930     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1178 01:49:14.267184     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1179 01:49:14.276773     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1180 01:49:14.286824     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1181 01:49:14.293641     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1182 01:49:14.303389     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1183 01:49:14.313614     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1184 01:49:14.322801     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1185 01:49:14.332839     PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1186 01:49:14.343021     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1187 01:49:14.353032     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1188 01:49:14.362424     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1189 01:49:14.362557     PCI: 00:02.0

 1190 01:49:14.372541     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1191 01:49:14.382623     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1192 01:49:14.392743     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1193 01:49:14.395526     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1194 01:49:14.405593     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1195 01:49:14.408850      GENERIC: 0.0

 1196 01:49:14.408931     PCI: 00:05.0

 1197 01:49:14.418646     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1198 01:49:14.425047     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1199 01:49:14.425129      GENERIC: 0.0

 1200 01:49:14.428718     PCI: 00:08.0

 1201 01:49:14.438310     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1202 01:49:14.438392     PCI: 00:0a.0

 1203 01:49:14.445041     PCI: 00:0d.0 child on link 0 USB0 port 0

 1204 01:49:14.454876     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1205 01:49:14.458328      USB0 port 0 child on link 0 USB3 port 0

 1206 01:49:14.461574       USB3 port 0

 1207 01:49:14.461654       USB3 port 1

 1208 01:49:14.464672       USB3 port 2

 1209 01:49:14.464753       USB3 port 3

 1210 01:49:14.471023     PCI: 00:14.0 child on link 0 USB0 port 0

 1211 01:49:14.481402     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1212 01:49:14.484237      USB0 port 0 child on link 0 USB2 port 0

 1213 01:49:14.487701       USB2 port 0

 1214 01:49:14.487782       USB2 port 1

 1215 01:49:14.491235       USB2 port 2

 1216 01:49:14.491316       USB2 port 3

 1217 01:49:14.494444       USB2 port 4

 1218 01:49:14.494582       USB2 port 5

 1219 01:49:14.497504       USB2 port 6

 1220 01:49:14.497584       USB2 port 7

 1221 01:49:14.500794       USB2 port 8

 1222 01:49:14.500879       USB2 port 9

 1223 01:49:14.504279       USB3 port 0

 1224 01:49:14.504359       USB3 port 1

 1225 01:49:14.507330       USB3 port 2

 1226 01:49:14.507411       USB3 port 3

 1227 01:49:14.510897     PCI: 00:14.2

 1228 01:49:14.520751     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1229 01:49:14.530462     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1230 01:49:14.533899     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1231 01:49:14.543899     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1232 01:49:14.547356      GENERIC: 0.0

 1233 01:49:14.550394     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1234 01:49:14.560364     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1235 01:49:14.563588      I2C: 00:1a

 1236 01:49:14.563658      I2C: 00:31

 1237 01:49:14.567067      I2C: 00:32

 1238 01:49:14.570048     PCI: 00:15.1 child on link 0 I2C: 00:10

 1239 01:49:14.580160     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1240 01:49:14.580237      I2C: 00:10

 1241 01:49:14.583149     PCI: 00:15.2

 1242 01:49:14.593153     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1243 01:49:14.593260     PCI: 00:15.3

 1244 01:49:14.606548     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1245 01:49:14.606626     PCI: 00:16.0

 1246 01:49:14.616327     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1247 01:49:14.620016     PCI: 00:19.0

 1248 01:49:14.623124     PCI: 00:19.1 child on link 0 I2C: 00:15

 1249 01:49:14.633271     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1250 01:49:14.633376      I2C: 00:15

 1251 01:49:14.639410     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1252 01:49:14.646099     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1253 01:49:14.655985     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1254 01:49:14.665675     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1255 01:49:14.669252      GENERIC: 0.0

 1256 01:49:14.669332      PCI: 01:00.0

 1257 01:49:14.678952      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1258 01:49:14.689181      PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20

 1259 01:49:14.692191     PCI: 00:1e.0

 1260 01:49:14.702368     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1261 01:49:14.705463     PCI: 00:1e.2 child on link 0 SPI: 00

 1262 01:49:14.715231     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1263 01:49:14.718836      SPI: 00

 1264 01:49:14.721699     PCI: 00:1e.3 child on link 0 SPI: 00

 1265 01:49:14.731769     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1266 01:49:14.731861      SPI: 00

 1267 01:49:14.738524     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1268 01:49:14.745216     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1269 01:49:14.748121      PNP: 0c09.0

 1270 01:49:14.754917      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1271 01:49:14.761345     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1272 01:49:14.771226     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1273 01:49:14.778025     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1274 01:49:14.784570      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1275 01:49:14.784651       GENERIC: 0.0

 1276 01:49:14.787883       GENERIC: 1.0

 1277 01:49:14.787964     PCI: 00:1f.3

 1278 01:49:14.800995     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1279 01:49:14.811090     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1280 01:49:14.811172     PCI: 00:1f.5

 1281 01:49:14.820459     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1282 01:49:14.824175    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1283 01:49:14.827278     APIC: 00

 1284 01:49:14.827359     APIC: 01

 1285 01:49:14.827422     APIC: 03

 1286 01:49:14.830320     APIC: 05

 1287 01:49:14.830400     APIC: 07

 1288 01:49:14.830463     APIC: 06

 1289 01:49:14.833807     APIC: 02

 1290 01:49:14.833888     APIC: 04

 1291 01:49:14.843651  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1292 01:49:14.847335   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1293 01:49:14.853628   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1294 01:49:14.860400   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1295 01:49:14.864026    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1296 01:49:14.870174    PCI: 01:00.0 20 *  [0x4000 - 0x40ff] mem

 1297 01:49:14.876924   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1298 01:49:14.883621   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1299 01:49:14.889908   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1300 01:49:14.896711  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1301 01:49:14.903324  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1302 01:49:14.912828   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1303 01:49:14.919433   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1304 01:49:14.926156   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1305 01:49:14.929665   DOMAIN: 0000: Resource ranges:

 1306 01:49:14.932628   * Base: 1000, Size: 800, Tag: 100

 1307 01:49:14.936031   * Base: 1900, Size: e700, Tag: 100

 1308 01:49:14.942842    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1309 01:49:14.949245  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1310 01:49:14.956143  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1311 01:49:14.962802   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)

 1312 01:49:14.972215   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)

 1313 01:49:14.978926   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)

 1314 01:49:14.985423   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)

 1315 01:49:14.995534   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)

 1316 01:49:15.001949   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)

 1317 01:49:15.008624   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)

 1318 01:49:15.018337   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)

 1319 01:49:15.025055   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)

 1320 01:49:15.031784   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)

 1321 01:49:15.041732   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)

 1322 01:49:15.048722   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)

 1323 01:49:15.054807   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)

 1324 01:49:15.064382   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)

 1325 01:49:15.071011   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)

 1326 01:49:15.077834   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)

 1327 01:49:15.087829   update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)

 1328 01:49:15.094241   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)

 1329 01:49:15.104315   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)

 1330 01:49:15.110808   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)

 1331 01:49:15.117360   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1332 01:49:15.127215   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1333 01:49:15.130701   DOMAIN: 0000: Resource ranges:

 1334 01:49:15.133821   * Base: 7fc00000, Size: 40400000, Tag: 200

 1335 01:49:15.137333   * Base: d0000000, Size: 28000000, Tag: 200

 1336 01:49:15.140897   * Base: fa000000, Size: 1000000, Tag: 200

 1337 01:49:15.147206   * Base: fb001000, Size: 2fff000, Tag: 200

 1338 01:49:15.150418   * Base: fe010000, Size: 2e000, Tag: 200

 1339 01:49:15.153903   * Base: fe03f000, Size: d41000, Tag: 200

 1340 01:49:15.160015   * Base: fed88000, Size: 8000, Tag: 200

 1341 01:49:15.163161   * Base: fed93000, Size: d000, Tag: 200

 1342 01:49:15.166809   * Base: feda2000, Size: 1e000, Tag: 200

 1343 01:49:15.169770   * Base: fede0000, Size: 1220000, Tag: 200

 1344 01:49:15.176544   * Base: 480400000, Size: 7b7fc00000, Tag: 100200

 1345 01:49:15.183339    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem

 1346 01:49:15.189668    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem

 1347 01:49:15.196411    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem

 1348 01:49:15.203212    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem

 1349 01:49:15.209518    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem

 1350 01:49:15.216172    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem

 1351 01:49:15.222884    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem

 1352 01:49:15.229603    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem

 1353 01:49:15.236123    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem

 1354 01:49:15.243099    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem

 1355 01:49:15.249727    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem

 1356 01:49:15.256163    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem

 1357 01:49:15.262336    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem

 1358 01:49:15.269079    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem

 1359 01:49:15.275635    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem

 1360 01:49:15.281873    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem

 1361 01:49:15.288352    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem

 1362 01:49:15.294916    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem

 1363 01:49:15.301816    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem

 1364 01:49:15.308632    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem

 1365 01:49:15.315159    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem

 1366 01:49:15.321610    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem

 1367 01:49:15.328033  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1368 01:49:15.338076  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff

 1369 01:49:15.341168   PCI: 00:1d.0: Resource ranges:

 1370 01:49:15.344884   * Base: 7fc00000, Size: 100000, Tag: 200

 1371 01:49:15.351277    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem

 1372 01:49:15.358044    PCI: 01:00.0 20 *  [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem

 1373 01:49:15.367712  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done

 1374 01:49:15.374227  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1375 01:49:15.377736  Root Device assign_resources, bus 0 link: 0

 1376 01:49:15.384199  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1377 01:49:15.390912  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64

 1378 01:49:15.400965  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64

 1379 01:49:15.407243  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1380 01:49:15.417151  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64

 1381 01:49:15.420346  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1382 01:49:15.424010  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1383 01:49:15.433836  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64

 1384 01:49:15.440054  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64

 1385 01:49:15.449996  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64

 1386 01:49:15.453622  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1387 01:49:15.459833  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1388 01:49:15.466996  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64

 1389 01:49:15.469641  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1390 01:49:15.476541  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1391 01:49:15.483427  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64

 1392 01:49:15.493236  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64

 1393 01:49:15.500110  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64

 1394 01:49:15.506249  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1395 01:49:15.509405  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1396 01:49:15.519701  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64

 1397 01:49:15.522833  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1398 01:49:15.525887  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1399 01:49:15.535774  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64

 1400 01:49:15.539393  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1401 01:49:15.545890  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1402 01:49:15.552747  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64

 1403 01:49:15.562172  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64

 1404 01:49:15.569054  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64

 1405 01:49:15.578713  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64

 1406 01:49:15.582156  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1407 01:49:15.585327  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1408 01:49:15.595042  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1409 01:49:15.605084  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1410 01:49:15.615211  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem

 1411 01:49:15.618712  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1412 01:49:15.624885  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64

 1413 01:49:15.635138  PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64

 1414 01:49:15.638448  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1415 01:49:15.648117  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64

 1416 01:49:15.651270  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1417 01:49:15.657736  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1418 01:49:15.664359  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64

 1419 01:49:15.671202  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1420 01:49:15.674506  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1421 01:49:15.677370  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1422 01:49:15.684325  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1423 01:49:15.688110  LPC: Trying to open IO window from 800 size 1ff

 1424 01:49:15.697600  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64

 1425 01:49:15.704401  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64

 1426 01:49:15.714236  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem

 1427 01:49:15.717667  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1428 01:49:15.724047  Root Device assign_resources, bus 0 link: 0

 1429 01:49:15.724121  Done setting resources.

 1430 01:49:15.730698  Show resources in subtree (Root Device)...After assigning values.

 1431 01:49:15.737049   Root Device child on link 0 DOMAIN: 0000

 1432 01:49:15.740717    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1433 01:49:15.750461    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1434 01:49:15.760404    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1435 01:49:15.760535     PCI: 00:00.0

 1436 01:49:15.770286     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1437 01:49:15.780651     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1438 01:49:15.790266     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1439 01:49:15.800225     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1440 01:49:15.810454     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1441 01:49:15.817251     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1442 01:49:15.826995     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1443 01:49:15.837350     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1444 01:49:15.846872     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1445 01:49:15.856424     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1446 01:49:15.863255     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1447 01:49:15.873548     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1448 01:49:15.883482     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1449 01:49:15.893379     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1450 01:49:15.902888     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1451 01:49:15.912851     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1452 01:49:15.922908     PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1453 01:49:15.929836     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1454 01:49:15.939180     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1455 01:49:15.949386     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1456 01:49:15.952285     PCI: 00:02.0

 1457 01:49:15.962196     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10

 1458 01:49:15.972647     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18

 1459 01:49:15.982405     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1460 01:49:15.985278     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1461 01:49:15.995520     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10

 1462 01:49:15.998831      GENERIC: 0.0

 1463 01:49:16.001925     PCI: 00:05.0

 1464 01:49:16.011880     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10

 1465 01:49:16.014921     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1466 01:49:16.018795      GENERIC: 0.0

 1467 01:49:16.019271     PCI: 00:08.0

 1468 01:49:16.028446     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10

 1469 01:49:16.031645     PCI: 00:0a.0

 1470 01:49:16.035122     PCI: 00:0d.0 child on link 0 USB0 port 0

 1471 01:49:16.045162     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10

 1472 01:49:16.051391      USB0 port 0 child on link 0 USB3 port 0

 1473 01:49:16.051852       USB3 port 0

 1474 01:49:16.054825       USB3 port 1

 1475 01:49:16.055286       USB3 port 2

 1476 01:49:16.057969       USB3 port 3

 1477 01:49:16.061509     PCI: 00:14.0 child on link 0 USB0 port 0

 1478 01:49:16.071130     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10

 1479 01:49:16.078029      USB0 port 0 child on link 0 USB2 port 0

 1480 01:49:16.078554       USB2 port 0

 1481 01:49:16.081178       USB2 port 1

 1482 01:49:16.081634       USB2 port 2

 1483 01:49:16.084507       USB2 port 3

 1484 01:49:16.084921       USB2 port 4

 1485 01:49:16.087671       USB2 port 5

 1486 01:49:16.088132       USB2 port 6

 1487 01:49:16.090956       USB2 port 7

 1488 01:49:16.091467       USB2 port 8

 1489 01:49:16.094113       USB2 port 9

 1490 01:49:16.097633       USB3 port 0

 1491 01:49:16.098130       USB3 port 1

 1492 01:49:16.100829       USB3 port 2

 1493 01:49:16.101288       USB3 port 3

 1494 01:49:16.104128     PCI: 00:14.2

 1495 01:49:16.114008     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10

 1496 01:49:16.123917     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18

 1497 01:49:16.127100     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1498 01:49:16.137217     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10

 1499 01:49:16.140311      GENERIC: 0.0

 1500 01:49:16.144055     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1501 01:49:16.153587     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10

 1502 01:49:16.156922      I2C: 00:1a

 1503 01:49:16.157386      I2C: 00:31

 1504 01:49:16.160182      I2C: 00:32

 1505 01:49:16.163543     PCI: 00:15.1 child on link 0 I2C: 00:10

 1506 01:49:16.173472     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10

 1507 01:49:16.176527      I2C: 00:10

 1508 01:49:16.177105     PCI: 00:15.2

 1509 01:49:16.186587     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10

 1510 01:49:16.189732     PCI: 00:15.3

 1511 01:49:16.199837     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10

 1512 01:49:16.203082     PCI: 00:16.0

 1513 01:49:16.213011     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10

 1514 01:49:16.213478     PCI: 00:19.0

 1515 01:49:16.216311     PCI: 00:19.1 child on link 0 I2C: 00:15

 1516 01:49:16.229345     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10

 1517 01:49:16.229836      I2C: 00:15

 1518 01:49:16.232620     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1519 01:49:16.242491     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1520 01:49:16.256170     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1521 01:49:16.266191     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20

 1522 01:49:16.266826      GENERIC: 0.0

 1523 01:49:16.268775      PCI: 01:00.0

 1524 01:49:16.278952      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10

 1525 01:49:16.288576      PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20

 1526 01:49:16.291986     PCI: 00:1e.0

 1527 01:49:16.302141     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1528 01:49:16.305303     PCI: 00:1e.2 child on link 0 SPI: 00

 1529 01:49:16.317990     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10

 1530 01:49:16.318593      SPI: 00

 1531 01:49:16.321263     PCI: 00:1e.3 child on link 0 SPI: 00

 1532 01:49:16.331475     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10

 1533 01:49:16.334721      SPI: 00

 1534 01:49:16.337775     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1535 01:49:16.347860     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1536 01:49:16.348325      PNP: 0c09.0

 1537 01:49:16.357782      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1538 01:49:16.360970     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1539 01:49:16.371215     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1540 01:49:16.381021     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1541 01:49:16.384002      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1542 01:49:16.388172       GENERIC: 0.0

 1543 01:49:16.388627       GENERIC: 1.0

 1544 01:49:16.391044     PCI: 00:1f.3

 1545 01:49:16.400839     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10

 1546 01:49:16.410664     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20

 1547 01:49:16.413791     PCI: 00:1f.5

 1548 01:49:16.423632     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10

 1549 01:49:16.426722    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1550 01:49:16.430114     APIC: 00

 1551 01:49:16.430632     APIC: 01

 1552 01:49:16.431006     APIC: 03

 1553 01:49:16.433875     APIC: 05

 1554 01:49:16.434332     APIC: 07

 1555 01:49:16.434751     APIC: 06

 1556 01:49:16.436637     APIC: 02

 1557 01:49:16.437096     APIC: 04

 1558 01:49:16.439822  Done allocating resources.

 1559 01:49:16.446656  BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms

 1560 01:49:16.453431  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

 1561 01:49:16.456426  Configure GPIOs for I2S audio on UP4.

 1562 01:49:16.463115  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms

 1563 01:49:16.466327  Enabling resources...

 1564 01:49:16.469645  PCI: 00:00.0 subsystem <- 8086/9a12

 1565 01:49:16.472836  PCI: 00:00.0 cmd <- 06

 1566 01:49:16.476046  PCI: 00:02.0 subsystem <- 8086/9a40

 1567 01:49:16.476640  PCI: 00:02.0 cmd <- 03

 1568 01:49:16.483127  PCI: 00:04.0 subsystem <- 8086/9a03

 1569 01:49:16.483724  PCI: 00:04.0 cmd <- 02

 1570 01:49:16.486152  PCI: 00:05.0 subsystem <- 8086/9a19

 1571 01:49:16.489687  PCI: 00:05.0 cmd <- 02

 1572 01:49:16.493141  PCI: 00:08.0 subsystem <- 8086/9a11

 1573 01:49:16.496070  PCI: 00:08.0 cmd <- 06

 1574 01:49:16.499309  PCI: 00:0d.0 subsystem <- 8086/9a13

 1575 01:49:16.502978  PCI: 00:0d.0 cmd <- 02

 1576 01:49:16.505859  PCI: 00:14.0 subsystem <- 8086/a0ed

 1577 01:49:16.509300  PCI: 00:14.0 cmd <- 02

 1578 01:49:16.512183  PCI: 00:14.2 subsystem <- 8086/a0ef

 1579 01:49:16.515997  PCI: 00:14.2 cmd <- 02

 1580 01:49:16.518895  PCI: 00:14.3 subsystem <- 8086/a0f0

 1581 01:49:16.522442  PCI: 00:14.3 cmd <- 02

 1582 01:49:16.525629  PCI: 00:15.0 subsystem <- 8086/a0e8

 1583 01:49:16.528644  PCI: 00:15.0 cmd <- 02

 1584 01:49:16.532261  PCI: 00:15.1 subsystem <- 8086/a0e9

 1585 01:49:16.532674  PCI: 00:15.1 cmd <- 02

 1586 01:49:16.539498  PCI: 00:15.2 subsystem <- 8086/a0ea

 1587 01:49:16.539915  PCI: 00:15.2 cmd <- 02

 1588 01:49:16.542201  PCI: 00:15.3 subsystem <- 8086/a0eb

 1589 01:49:16.545592  PCI: 00:15.3 cmd <- 02

 1590 01:49:16.549399  PCI: 00:16.0 subsystem <- 8086/a0e0

 1591 01:49:16.552165  PCI: 00:16.0 cmd <- 02

 1592 01:49:16.555621  PCI: 00:19.1 subsystem <- 8086/a0c6

 1593 01:49:16.558421  PCI: 00:19.1 cmd <- 02

 1594 01:49:16.561921  PCI: 00:1d.0 bridge ctrl <- 0013

 1595 01:49:16.565973  PCI: 00:1d.0 subsystem <- 8086/a0b0

 1596 01:49:16.568428  PCI: 00:1d.0 cmd <- 06

 1597 01:49:16.571879  PCI: 00:1e.0 subsystem <- 8086/a0a8

 1598 01:49:16.574932  PCI: 00:1e.0 cmd <- 06

 1599 01:49:16.578111  PCI: 00:1e.2 subsystem <- 8086/a0aa

 1600 01:49:16.581608  PCI: 00:1e.2 cmd <- 06

 1601 01:49:16.585076  PCI: 00:1e.3 subsystem <- 8086/a0ab

 1602 01:49:16.588632  PCI: 00:1e.3 cmd <- 02

 1603 01:49:16.591419  PCI: 00:1f.0 subsystem <- 8086/a087

 1604 01:49:16.591889  PCI: 00:1f.0 cmd <- 407

 1605 01:49:16.598506  PCI: 00:1f.3 subsystem <- 8086/a0c8

 1606 01:49:16.599023  PCI: 00:1f.3 cmd <- 02

 1607 01:49:16.601729  PCI: 00:1f.5 subsystem <- 8086/a0a4

 1608 01:49:16.604897  PCI: 00:1f.5 cmd <- 406

 1609 01:49:16.609516  PCI: 01:00.0 cmd <- 02

 1610 01:49:16.614066  done.

 1611 01:49:16.617571  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms

 1612 01:49:16.620821  Initializing devices...

 1613 01:49:16.624115  Root Device init

 1614 01:49:16.627419  Chrome EC: Set SMI mask to 0x0000000000000000

 1615 01:49:16.633782  Chrome EC: clear events_b mask to 0x0000000000000000

 1616 01:49:16.640758  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1617 01:49:16.646958  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e

 1618 01:49:16.653742  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e

 1619 01:49:16.656827  Chrome EC: Set WAKE mask to 0x0000000000000000

 1620 01:49:16.664236  fw_config match found: DB_USB=USB3_ACTIVE

 1621 01:49:16.667650  Configure Right Type-C port orientation for retimer

 1622 01:49:16.673572  Root Device init finished in 45 msecs

 1623 01:49:16.673990  PCI: 00:00.0 init

 1624 01:49:16.677918  CPU TDP = 9 Watts

 1625 01:49:16.681040  CPU PL1 = 9 Watts

 1626 01:49:16.681556  CPU PL2 = 40 Watts

 1627 01:49:16.684703  CPU PL4 = 83 Watts

 1628 01:49:16.687785  PCI: 00:00.0 init finished in 8 msecs

 1629 01:49:16.691283  PCI: 00:02.0 init

 1630 01:49:16.691746  GMA: Found VBT in CBFS

 1631 01:49:16.694361  GMA: Found valid VBT in CBFS

 1632 01:49:16.701125  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1633 01:49:16.707728                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000

 1634 01:49:16.711283  PCI: 00:02.0 init finished in 18 msecs

 1635 01:49:16.714881  PCI: 00:05.0 init

 1636 01:49:16.718159  PCI: 00:05.0 init finished in 0 msecs

 1637 01:49:16.721335  PCI: 00:08.0 init

 1638 01:49:16.724370  PCI: 00:08.0 init finished in 0 msecs

 1639 01:49:16.728193  PCI: 00:14.0 init

 1640 01:49:16.731132  PCI: 00:14.0 init finished in 0 msecs

 1641 01:49:16.734921  PCI: 00:14.2 init

 1642 01:49:16.738152  PCI: 00:14.2 init finished in 0 msecs

 1643 01:49:16.741176  PCI: 00:15.0 init

 1644 01:49:16.744454  I2C bus 0 version 0x3230302a

 1645 01:49:16.747728  DW I2C bus 0 at 0x7fe4e000 (400 KHz)

 1646 01:49:16.750793  PCI: 00:15.0 init finished in 6 msecs

 1647 01:49:16.751248  PCI: 00:15.1 init

 1648 01:49:16.754101  I2C bus 1 version 0x3230302a

 1649 01:49:16.757600  DW I2C bus 1 at 0x7fe4f000 (400 KHz)

 1650 01:49:16.764218  PCI: 00:15.1 init finished in 6 msecs

 1651 01:49:16.764639  PCI: 00:15.2 init

 1652 01:49:16.767740  I2C bus 2 version 0x3230302a

 1653 01:49:16.771008  DW I2C bus 2 at 0x7fe50000 (400 KHz)

 1654 01:49:16.774105  PCI: 00:15.2 init finished in 6 msecs

 1655 01:49:16.778084  PCI: 00:15.3 init

 1656 01:49:16.781188  I2C bus 3 version 0x3230302a

 1657 01:49:16.784940  DW I2C bus 3 at 0x7fe51000 (400 KHz)

 1658 01:49:16.787797  PCI: 00:15.3 init finished in 6 msecs

 1659 01:49:16.790876  PCI: 00:16.0 init

 1660 01:49:16.794362  PCI: 00:16.0 init finished in 0 msecs

 1661 01:49:16.797343  PCI: 00:19.1 init

 1662 01:49:16.801020  I2C bus 5 version 0x3230302a

 1663 01:49:16.803870  DW I2C bus 5 at 0x7fe53000 (400 KHz)

 1664 01:49:16.807908  PCI: 00:19.1 init finished in 6 msecs

 1665 01:49:16.810915  PCI: 00:1d.0 init

 1666 01:49:16.814343  Initializing PCH PCIe bridge.

 1667 01:49:16.817887  PCI: 00:1d.0 init finished in 3 msecs

 1668 01:49:16.820482  PCI: 00:1f.0 init

 1669 01:49:16.823569  IOAPIC: Initializing IOAPIC at 0xfec00000

 1670 01:49:16.827265  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1671 01:49:16.830411  IOAPIC: ID = 0x02

 1672 01:49:16.833773  IOAPIC: Dumping registers

 1673 01:49:16.834234    reg 0x0000: 0x02000000

 1674 01:49:16.836961    reg 0x0001: 0x00770020

 1675 01:49:16.840597    reg 0x0002: 0x00000000

 1676 01:49:16.843445  PCI: 00:1f.0 init finished in 21 msecs

 1677 01:49:16.846935  PCI: 00:1f.2 init

 1678 01:49:16.849903  Disabling ACPI via APMC.

 1679 01:49:16.853919  APMC done.

 1680 01:49:16.857304  PCI: 00:1f.2 init finished in 6 msecs

 1681 01:49:16.869281  PCI: 01:00.0 init

 1682 01:49:16.871894  PCI: 01:00.0 init finished in 0 msecs

 1683 01:49:16.875247  PNP: 0c09.0 init

 1684 01:49:16.882561  Google Chrome EC uptime: 8.378 seconds

 1685 01:49:16.885389  Google Chrome AP resets since EC boot: 1

 1686 01:49:16.888566  Google Chrome most recent AP reset causes:

 1687 01:49:16.891873  	0.454: 32775 shutdown: entering G3

 1688 01:49:16.898377  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

 1689 01:49:16.901931  PNP: 0c09.0 init finished in 24 msecs

 1690 01:49:16.908651  Devices initialized

 1691 01:49:16.912167  Show all devs... After init.

 1692 01:49:16.915330  Root Device: enabled 1

 1693 01:49:16.915793  DOMAIN: 0000: enabled 1

 1694 01:49:16.918679  CPU_CLUSTER: 0: enabled 1

 1695 01:49:16.922252  PCI: 00:00.0: enabled 1

 1696 01:49:16.925488  PCI: 00:02.0: enabled 1

 1697 01:49:16.926055  PCI: 00:04.0: enabled 1

 1698 01:49:16.928698  PCI: 00:05.0: enabled 1

 1699 01:49:16.931610  PCI: 00:06.0: enabled 0

 1700 01:49:16.935236  PCI: 00:07.0: enabled 0

 1701 01:49:16.935700  PCI: 00:07.1: enabled 0

 1702 01:49:16.938335  PCI: 00:07.2: enabled 0

 1703 01:49:16.941783  PCI: 00:07.3: enabled 0

 1704 01:49:16.944786  PCI: 00:08.0: enabled 1

 1705 01:49:16.945248  PCI: 00:09.0: enabled 0

 1706 01:49:16.948218  PCI: 00:0a.0: enabled 0

 1707 01:49:16.952034  PCI: 00:0d.0: enabled 1

 1708 01:49:16.955031  PCI: 00:0d.1: enabled 0

 1709 01:49:16.955496  PCI: 00:0d.2: enabled 0

 1710 01:49:16.958282  PCI: 00:0d.3: enabled 0

 1711 01:49:16.961624  PCI: 00:0e.0: enabled 0

 1712 01:49:16.964748  PCI: 00:10.2: enabled 1

 1713 01:49:16.965170  PCI: 00:10.6: enabled 0

 1714 01:49:16.968223  PCI: 00:10.7: enabled 0

 1715 01:49:16.971276  PCI: 00:12.0: enabled 0

 1716 01:49:16.971696  PCI: 00:12.6: enabled 0

 1717 01:49:16.974586  PCI: 00:13.0: enabled 0

 1718 01:49:16.978008  PCI: 00:14.0: enabled 1

 1719 01:49:16.981208  PCI: 00:14.1: enabled 0

 1720 01:49:16.981629  PCI: 00:14.2: enabled 1

 1721 01:49:16.984672  PCI: 00:14.3: enabled 1

 1722 01:49:16.987852  PCI: 00:15.0: enabled 1

 1723 01:49:16.991054  PCI: 00:15.1: enabled 1

 1724 01:49:16.991471  PCI: 00:15.2: enabled 1

 1725 01:49:16.994477  PCI: 00:15.3: enabled 1

 1726 01:49:16.997902  PCI: 00:16.0: enabled 1

 1727 01:49:17.001063  PCI: 00:16.1: enabled 0

 1728 01:49:17.001476  PCI: 00:16.2: enabled 0

 1729 01:49:17.004188  PCI: 00:16.3: enabled 0

 1730 01:49:17.007514  PCI: 00:16.4: enabled 0

 1731 01:49:17.011037  PCI: 00:16.5: enabled 0

 1732 01:49:17.011457  PCI: 00:17.0: enabled 0

 1733 01:49:17.014402  PCI: 00:19.0: enabled 0

 1734 01:49:17.017583  PCI: 00:19.1: enabled 1

 1735 01:49:17.018000  PCI: 00:19.2: enabled 0

 1736 01:49:17.021113  PCI: 00:1c.0: enabled 1

 1737 01:49:17.024352  PCI: 00:1c.1: enabled 0

 1738 01:49:17.027580  PCI: 00:1c.2: enabled 0

 1739 01:49:17.028001  PCI: 00:1c.3: enabled 0

 1740 01:49:17.030797  PCI: 00:1c.4: enabled 0

 1741 01:49:17.034110  PCI: 00:1c.5: enabled 0

 1742 01:49:17.037291  PCI: 00:1c.6: enabled 1

 1743 01:49:17.037867  PCI: 00:1c.7: enabled 0

 1744 01:49:17.040493  PCI: 00:1d.0: enabled 1

 1745 01:49:17.043992  PCI: 00:1d.1: enabled 0

 1746 01:49:17.047151  PCI: 00:1d.2: enabled 1

 1747 01:49:17.047614  PCI: 00:1d.3: enabled 0

 1748 01:49:17.050600  PCI: 00:1e.0: enabled 1

 1749 01:49:17.054268  PCI: 00:1e.1: enabled 0

 1750 01:49:17.057262  PCI: 00:1e.2: enabled 1

 1751 01:49:17.057684  PCI: 00:1e.3: enabled 1

 1752 01:49:17.060458  PCI: 00:1f.0: enabled 1

 1753 01:49:17.063834  PCI: 00:1f.1: enabled 0

 1754 01:49:17.067023  PCI: 00:1f.2: enabled 1

 1755 01:49:17.067443  PCI: 00:1f.3: enabled 1

 1756 01:49:17.070515  PCI: 00:1f.4: enabled 0

 1757 01:49:17.073775  PCI: 00:1f.5: enabled 1

 1758 01:49:17.076713  PCI: 00:1f.6: enabled 0

 1759 01:49:17.077150  PCI: 00:1f.7: enabled 0

 1760 01:49:17.080908  APIC: 00: enabled 1

 1761 01:49:17.084147  GENERIC: 0.0: enabled 1

 1762 01:49:17.084672  GENERIC: 0.0: enabled 1

 1763 01:49:17.087108  GENERIC: 1.0: enabled 1

 1764 01:49:17.090425  GENERIC: 0.0: enabled 1

 1765 01:49:17.093668  GENERIC: 1.0: enabled 1

 1766 01:49:17.094088  USB0 port 0: enabled 1

 1767 01:49:17.097025  GENERIC: 0.0: enabled 1

 1768 01:49:17.100197  USB0 port 0: enabled 1

 1769 01:49:17.100617  GENERIC: 0.0: enabled 1

 1770 01:49:17.103634  I2C: 00:1a: enabled 1

 1771 01:49:17.106564  I2C: 00:31: enabled 1

 1772 01:49:17.110081  I2C: 00:32: enabled 1

 1773 01:49:17.110500  I2C: 00:10: enabled 1

 1774 01:49:17.113207  I2C: 00:15: enabled 1

 1775 01:49:17.116932  GENERIC: 0.0: enabled 0

 1776 01:49:17.117456  GENERIC: 1.0: enabled 0

 1777 01:49:17.120029  GENERIC: 0.0: enabled 1

 1778 01:49:17.123567  SPI: 00: enabled 1

 1779 01:49:17.124086  SPI: 00: enabled 1

 1780 01:49:17.126421  PNP: 0c09.0: enabled 1

 1781 01:49:17.130185  GENERIC: 0.0: enabled 1

 1782 01:49:17.130660  USB3 port 0: enabled 1

 1783 01:49:17.133145  USB3 port 1: enabled 1

 1784 01:49:17.136981  USB3 port 2: enabled 0

 1785 01:49:17.139559  USB3 port 3: enabled 0

 1786 01:49:17.139985  USB2 port 0: enabled 0

 1787 01:49:17.142797  USB2 port 1: enabled 1

 1788 01:49:17.146303  USB2 port 2: enabled 1

 1789 01:49:17.146758  USB2 port 3: enabled 0

 1790 01:49:17.149625  USB2 port 4: enabled 1

 1791 01:49:17.152899  USB2 port 5: enabled 0

 1792 01:49:17.156286  USB2 port 6: enabled 0

 1793 01:49:17.156703  USB2 port 7: enabled 0

 1794 01:49:17.159595  USB2 port 8: enabled 0

 1795 01:49:17.162737  USB2 port 9: enabled 0

 1796 01:49:17.163157  USB3 port 0: enabled 0

 1797 01:49:17.165930  USB3 port 1: enabled 1

 1798 01:49:17.169447  USB3 port 2: enabled 0

 1799 01:49:17.173003  USB3 port 3: enabled 0

 1800 01:49:17.173440  GENERIC: 0.0: enabled 1

 1801 01:49:17.176157  GENERIC: 1.0: enabled 1

 1802 01:49:17.179211  APIC: 01: enabled 1

 1803 01:49:17.179628  APIC: 03: enabled 1

 1804 01:49:17.182432  APIC: 05: enabled 1

 1805 01:49:17.182997  APIC: 07: enabled 1

 1806 01:49:17.186312  APIC: 06: enabled 1

 1807 01:49:17.189306  APIC: 02: enabled 1

 1808 01:49:17.189815  APIC: 04: enabled 1

 1809 01:49:17.192705  PCI: 01:00.0: enabled 1

 1810 01:49:17.199102  BS: BS_DEV_INIT run times (exec / console): 34 / 540 ms

 1811 01:49:17.202398  FMAP: area RW_ELOG found @ f30000 (4096 bytes)

 1812 01:49:17.205749  ELOG: NV offset 0xf30000 size 0x1000

 1813 01:49:17.213973  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1814 01:49:17.220374  ELOG: Event(17) added with size 13 at 2023-10-11 01:49:16 UTC

 1815 01:49:17.227062  ELOG: Event(92) added with size 9 at 2023-10-11 01:49:16 UTC

 1816 01:49:17.233677  ELOG: Event(93) added with size 9 at 2023-10-11 01:49:16 UTC

 1817 01:49:17.240142  ELOG: Event(9E) added with size 10 at 2023-10-11 01:49:16 UTC

 1818 01:49:17.246388  ELOG: Event(9F) added with size 14 at 2023-10-11 01:49:16 UTC

 1819 01:49:17.253204  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms

 1820 01:49:17.260092  ELOG: Event(A1) added with size 10 at 2023-10-11 01:49:16 UTC

 1821 01:49:17.266511  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1822 01:49:17.273147  ELOG: Event(A0) added with size 9 at 2023-10-11 01:49:16 UTC

 1823 01:49:17.276554  elog_add_boot_reason: Logged dev mode boot

 1824 01:49:17.282765  BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms

 1825 01:49:17.286713  Finalize devices...

 1826 01:49:17.287266  Devices finalized

 1827 01:49:17.293042  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms

 1828 01:49:17.296090  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)

 1829 01:49:17.302496  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 1830 01:49:17.306142  ME: HFSTS1                      : 0x80030055

 1831 01:49:17.312556  ME: HFSTS2                      : 0x30280116

 1832 01:49:17.315975  ME: HFSTS3                      : 0x00000050

 1833 01:49:17.322771  ME: HFSTS4                      : 0x00004000

 1834 01:49:17.325660  ME: HFSTS5                      : 0x00000000

 1835 01:49:17.328867  ME: HFSTS6                      : 0x40400006

 1836 01:49:17.332428  ME: Manufacturing Mode          : YES

 1837 01:49:17.338613  ME: SPI Protection Mode Enabled : NO

 1838 01:49:17.342369  ME: FW Partition Table          : OK

 1839 01:49:17.345755  ME: Bringup Loader Failure      : NO

 1840 01:49:17.349091  ME: Firmware Init Complete      : NO

 1841 01:49:17.352746  ME: Boot Options Present        : NO

 1842 01:49:17.355328  ME: Update In Progress          : NO

 1843 01:49:17.358884  ME: D0i3 Support                : YES

 1844 01:49:17.362474  ME: Low Power State Enabled     : NO

 1845 01:49:17.368837  ME: CPU Replaced                : YES

 1846 01:49:17.372205  ME: CPU Replacement Valid       : YES

 1847 01:49:17.375414  ME: Current Working State       : 5

 1848 01:49:17.378704  ME: Current Operation State     : 1

 1849 01:49:17.382182  ME: Current Operation Mode      : 3

 1850 01:49:17.385201  ME: Error Code                  : 0

 1851 01:49:17.388634  ME: Enhanced Debug Mode         : NO

 1852 01:49:17.391809  ME: CPU Debug Disabled          : YES

 1853 01:49:17.394880  ME: TXT Support                 : NO

 1854 01:49:17.401923  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms

 1855 01:49:17.411774  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4

 1856 01:49:17.414897  CBFS: 'fallback/slic' not found.

 1857 01:49:17.418199  ACPI: Writing ACPI tables at 76b01000.

 1858 01:49:17.418739  ACPI:    * FACS

 1859 01:49:17.421408  ACPI:    * DSDT

 1860 01:49:17.424588  Ramoops buffer: 0x100000@0x76a00000.

 1861 01:49:17.428571  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

 1862 01:49:17.434813  FMAP: area RW_VPD found @ f35000 (8192 bytes)

 1863 01:49:17.437912  Google Chrome EC: version:

 1864 01:49:17.441432  	ro: voema_v2.0.10114-a447f03e46

 1865 01:49:17.444733  	rw: voema_v2.0.10114-a447f03e46

 1866 01:49:17.448194    running image: 2

 1867 01:49:17.454447  PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000

 1868 01:49:17.458219  ACPI:    * FADT

 1869 01:49:17.458777  SCI is IRQ9

 1870 01:49:17.464762  ACPI: added table 1/32, length now 40

 1871 01:49:17.465183  ACPI:     * SSDT

 1872 01:49:17.467385  Found 1 CPU(s) with 8 core(s) each.

 1873 01:49:17.474475  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2

 1874 01:49:17.477755  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 1875 01:49:17.481158  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 1876 01:49:17.487233  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a

 1877 01:49:17.490665  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 1878 01:49:17.497103  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 1879 01:49:17.500854  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10

 1880 01:49:17.507229  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 1881 01:49:17.514043  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)

 1882 01:49:17.517034  \_SB.PCI0.RP09: Added StorageD3Enable property

 1883 01:49:17.523937  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1884 01:49:17.526968  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 1885 01:49:17.533880  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 1886 01:49:17.537485  PS2K: Passing 80 keymaps to kernel

 1887 01:49:17.544103  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 1888 01:49:17.550308  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1

 1889 01:49:17.557304  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1

 1890 01:49:17.563421  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 1891 01:49:17.570244  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4

 1892 01:49:17.576816  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1

 1893 01:49:17.583530  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 1894 01:49:17.589923  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 1895 01:49:17.593525  ACPI: added table 2/32, length now 44

 1896 01:49:17.596809  ACPI:    * MCFG

 1897 01:49:17.600223  ACPI: added table 3/32, length now 48

 1898 01:49:17.600725  ACPI:    * TPM2

 1899 01:49:17.603552  TPM2 log created at 0x769f0000

 1900 01:49:17.606568  ACPI: added table 4/32, length now 52

 1901 01:49:17.609898  ACPI:    * MADT

 1902 01:49:17.610342  SCI is IRQ9

 1903 01:49:17.613052  ACPI: added table 5/32, length now 56

 1904 01:49:17.616485  current = 76b09850

 1905 01:49:17.619812  ACPI:    * DMAR

 1906 01:49:17.623181  ACPI: added table 6/32, length now 60

 1907 01:49:17.626435  ACPI: added table 7/32, length now 64

 1908 01:49:17.627057  ACPI:    * HPET

 1909 01:49:17.632684  ACPI: added table 8/32, length now 68

 1910 01:49:17.633202  ACPI: done.

 1911 01:49:17.636113  ACPI tables: 35216 bytes.

 1912 01:49:17.639570  smbios_write_tables: 769ef000

 1913 01:49:17.642868  EC returned error result code 3

 1914 01:49:17.646200  Couldn't obtain OEM name from CBI

 1915 01:49:17.649335  Create SMBIOS type 16

 1916 01:49:17.652840  Create SMBIOS type 17

 1917 01:49:17.655828  GENERIC: 0.0 (WIFI Device)

 1918 01:49:17.656254  SMBIOS tables: 1734 bytes.

 1919 01:49:17.662460  Writing table forward entry at 0x00000500

 1920 01:49:17.668979  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c

 1921 01:49:17.671971  Writing coreboot table at 0x76b25000

 1922 01:49:17.675540   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1923 01:49:17.682378   1. 0000000000001000-000000000009ffff: RAM

 1924 01:49:17.685894   2. 00000000000a0000-00000000000fffff: RESERVED

 1925 01:49:17.691835   3. 0000000000100000-00000000769eefff: RAM

 1926 01:49:17.695249   4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES

 1927 01:49:17.701947   5. 0000000076b98000-0000000076c09fff: RAMSTAGE

 1928 01:49:17.708820   6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES

 1929 01:49:17.711743   7. 0000000077000000-000000007fbfffff: RESERVED

 1930 01:49:17.715390   8. 00000000c0000000-00000000cfffffff: RESERVED

 1931 01:49:17.721974   9. 00000000f8000000-00000000f9ffffff: RESERVED

 1932 01:49:17.725346  10. 00000000fb000000-00000000fb000fff: RESERVED

 1933 01:49:17.731737  11. 00000000fe000000-00000000fe00ffff: RESERVED

 1934 01:49:17.735031  12. 00000000fed80000-00000000fed87fff: RESERVED

 1935 01:49:17.741478  13. 00000000fed90000-00000000fed92fff: RESERVED

 1936 01:49:17.744928  14. 00000000feda0000-00000000feda1fff: RESERVED

 1937 01:49:17.751917  15. 00000000fedc0000-00000000feddffff: RESERVED

 1938 01:49:17.754966  16. 0000000100000000-00000004803fffff: RAM

 1939 01:49:17.758125  Passing 4 GPIOs to payload:

 1940 01:49:17.761590              NAME |       PORT | POLARITY |     VALUE

 1941 01:49:17.768027               lid |  undefined |     high |      high

 1942 01:49:17.774606             power |  undefined |     high |       low

 1943 01:49:17.777743             oprom |  undefined |     high |       low

 1944 01:49:17.784749          EC in RW | 0x000000e5 |     high |      high

 1945 01:49:17.791313  Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f865

 1946 01:49:17.794407  coreboot table: 1576 bytes.

 1947 01:49:17.797803  IMD ROOT    0. 0x76fff000 0x00001000

 1948 01:49:17.800795  IMD SMALL   1. 0x76ffe000 0x00001000

 1949 01:49:17.803902  FSP MEMORY  2. 0x76c4e000 0x003b0000

 1950 01:49:17.807254  VPD         3. 0x76c4d000 0x00000367

 1951 01:49:17.810885  RO MCACHE   4. 0x76c4c000 0x00000fdc

 1952 01:49:17.814607  CONSOLE     5. 0x76c2c000 0x00020000

 1953 01:49:17.820719  FMAP        6. 0x76c2b000 0x00000578

 1954 01:49:17.823762  TIME STAMP  7. 0x76c2a000 0x00000910

 1955 01:49:17.827080  VBOOT WORK  8. 0x76c16000 0x00014000

 1956 01:49:17.830455  ROMSTG STCK 9. 0x76c15000 0x00001000

 1957 01:49:17.833760  AFTER CAR  10. 0x76c0a000 0x0000b000

 1958 01:49:17.837005  RAMSTAGE   11. 0x76b97000 0x00073000

 1959 01:49:17.840368  REFCODE    12. 0x76b42000 0x00055000

 1960 01:49:17.844021  SMM BACKUP 13. 0x76b32000 0x00010000

 1961 01:49:17.850509  4f444749   14. 0x76b30000 0x00002000

 1962 01:49:17.853429  EXT VBT15. 0x76b2d000 0x0000219f

 1963 01:49:17.857006  COREBOOT   16. 0x76b25000 0x00008000

 1964 01:49:17.860204  ACPI       17. 0x76b01000 0x00024000

 1965 01:49:17.863441  ACPI GNVS  18. 0x76b00000 0x00001000

 1966 01:49:17.866891  RAMOOPS    19. 0x76a00000 0x00100000

 1967 01:49:17.869958  TPM2 TCGLOG20. 0x769f0000 0x00010000

 1968 01:49:17.873414  SMBIOS     21. 0x769ef000 0x00000800

 1969 01:49:17.876739  IMD small region:

 1970 01:49:17.879851    IMD ROOT    0. 0x76ffec00 0x00000400

 1971 01:49:17.883335    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 1972 01:49:17.889928    POWER STATE 2. 0x76ffeb80 0x00000044

 1973 01:49:17.892957    ROMSTAGE    3. 0x76ffeb60 0x00000004

 1974 01:49:17.896253    MEM INFO    4. 0x76ffe980 0x000001e0

 1975 01:49:17.902767  BS: BS_WRITE_TABLES run times (exec / console): 9 / 484 ms

 1976 01:49:17.906418  MTRR: Physical address space:

 1977 01:49:17.909753  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1978 01:49:17.916945  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1979 01:49:17.922558  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 1980 01:49:17.929265  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0

 1981 01:49:17.935708  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1

 1982 01:49:17.942243  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0

 1983 01:49:17.949430  0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6

 1984 01:49:17.952668  MTRR: Fixed MSR 0x250 0x0606060606060606

 1985 01:49:17.955478  MTRR: Fixed MSR 0x258 0x0606060606060606

 1986 01:49:17.962331  MTRR: Fixed MSR 0x259 0x0000000000000000

 1987 01:49:17.965567  MTRR: Fixed MSR 0x268 0x0606060606060606

 1988 01:49:17.968701  MTRR: Fixed MSR 0x269 0x0606060606060606

 1989 01:49:17.971919  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1990 01:49:17.978627  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1991 01:49:17.981889  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1992 01:49:17.985260  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1993 01:49:17.988354  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1994 01:49:17.995378  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1995 01:49:17.998186  call enable_fixed_mtrr()

 1996 01:49:18.001252  CPU physical address size: 39 bits

 1997 01:49:18.004751  MTRR: default type WB/UC MTRR counts: 6/7.

 1998 01:49:18.008277  MTRR: WB selected as default type.

 1999 01:49:18.014872  MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 2000 01:49:18.020880  MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 2001 01:49:18.027826  MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1

 2002 01:49:18.034232  MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0

 2003 01:49:18.040945  MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 2004 01:49:18.047473  MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0

 2005 01:49:18.054028  MTRR: Fixed MSR 0x250 0x0606060606060606

 2006 01:49:18.057581  MTRR: Fixed MSR 0x258 0x0606060606060606

 2007 01:49:18.060787  MTRR: Fixed MSR 0x259 0x0000000000000000

 2008 01:49:18.064227  MTRR: Fixed MSR 0x268 0x0606060606060606

 2009 01:49:18.070381  MTRR: Fixed MSR 0x269 0x0606060606060606

 2010 01:49:18.073768  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2011 01:49:18.077028  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2012 01:49:18.080795  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2013 01:49:18.087219  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2014 01:49:18.090259  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2015 01:49:18.093572  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2016 01:49:18.093653  

 2017 01:49:18.097760  MTRR check

 2018 01:49:18.100907  call enable_fixed_mtrr()

 2019 01:49:18.100989  Fixed MTRRs   : Enabled

 2020 01:49:18.104358  Variable MTRRs: Enabled

 2021 01:49:18.104440  

 2022 01:49:18.107691  CPU physical address size: 39 bits

 2023 01:49:18.110918  MTRR: Fixed MSR 0x250 0x0606060606060606

 2024 01:49:18.117752  MTRR: Fixed MSR 0x250 0x0606060606060606

 2025 01:49:18.121546  MTRR: Fixed MSR 0x258 0x0606060606060606

 2026 01:49:18.124161  MTRR: Fixed MSR 0x259 0x0000000000000000

 2027 01:49:18.127716  MTRR: Fixed MSR 0x268 0x0606060606060606

 2028 01:49:18.134222  MTRR: Fixed MSR 0x269 0x0606060606060606

 2029 01:49:18.137474  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2030 01:49:18.140785  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2031 01:49:18.144194  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2032 01:49:18.150647  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2033 01:49:18.153836  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2034 01:49:18.157344  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2035 01:49:18.165224  MTRR: Fixed MSR 0x258 0x0606060606060606

 2036 01:49:18.168454  MTRR: Fixed MSR 0x259 0x0000000000000000

 2037 01:49:18.171437  MTRR: Fixed MSR 0x268 0x0606060606060606

 2038 01:49:18.174478  MTRR: Fixed MSR 0x269 0x0606060606060606

 2039 01:49:18.181319  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2040 01:49:18.184906  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2041 01:49:18.188053  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2042 01:49:18.191726  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2043 01:49:18.198131  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2044 01:49:18.201796  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2045 01:49:18.205102  call enable_fixed_mtrr()

 2046 01:49:18.209028  call enable_fixed_mtrr()

 2047 01:49:18.211358  MTRR: Fixed MSR 0x250 0x0606060606060606

 2048 01:49:18.214466  MTRR: Fixed MSR 0x250 0x0606060606060606

 2049 01:49:18.222007  MTRR: Fixed MSR 0x258 0x0606060606060606

 2050 01:49:18.224496  MTRR: Fixed MSR 0x259 0x0000000000000000

 2051 01:49:18.227984  MTRR: Fixed MSR 0x268 0x0606060606060606

 2052 01:49:18.231311  MTRR: Fixed MSR 0x269 0x0606060606060606

 2053 01:49:18.237821  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2054 01:49:18.241654  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2055 01:49:18.244293  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2056 01:49:18.247636  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2057 01:49:18.254226  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2058 01:49:18.257765  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2059 01:49:18.264441  MTRR: Fixed MSR 0x258 0x0606060606060606

 2060 01:49:18.264905  call enable_fixed_mtrr()

 2061 01:49:18.270816  MTRR: Fixed MSR 0x259 0x0000000000000000

 2062 01:49:18.274372  MTRR: Fixed MSR 0x268 0x0606060606060606

 2063 01:49:18.277734  MTRR: Fixed MSR 0x269 0x0606060606060606

 2064 01:49:18.280941  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2065 01:49:18.287707  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2066 01:49:18.290901  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2067 01:49:18.294177  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2068 01:49:18.297390  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2069 01:49:18.303579  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2070 01:49:18.307077  CPU physical address size: 39 bits

 2071 01:49:18.311252  call enable_fixed_mtrr()

 2072 01:49:18.314157  CPU physical address size: 39 bits

 2073 01:49:18.322931  CPU physical address size: 39 bits

 2074 01:49:18.326157  MTRR: Fixed MSR 0x250 0x0606060606060606

 2075 01:49:18.328781  MTRR: Fixed MSR 0x250 0x0606060606060606

 2076 01:49:18.332035  MTRR: Fixed MSR 0x258 0x0606060606060606

 2077 01:49:18.338959  MTRR: Fixed MSR 0x259 0x0000000000000000

 2078 01:49:18.342178  MTRR: Fixed MSR 0x268 0x0606060606060606

 2079 01:49:18.345544  MTRR: Fixed MSR 0x269 0x0606060606060606

 2080 01:49:18.348586  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2081 01:49:18.355522  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2082 01:49:18.358438  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2083 01:49:18.361850  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2084 01:49:18.365107  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2085 01:49:18.371699  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2086 01:49:18.374617  MTRR: Fixed MSR 0x258 0x0606060606060606

 2087 01:49:18.381750  MTRR: Fixed MSR 0x259 0x0000000000000000

 2088 01:49:18.384766  MTRR: Fixed MSR 0x268 0x0606060606060606

 2089 01:49:18.387953  MTRR: Fixed MSR 0x269 0x0606060606060606

 2090 01:49:18.391113  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2091 01:49:18.397448  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2092 01:49:18.400892  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2093 01:49:18.404450  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2094 01:49:18.407793  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2095 01:49:18.414427  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2096 01:49:18.416868  call enable_fixed_mtrr()

 2097 01:49:18.421199  call enable_fixed_mtrr()

 2098 01:49:18.424293  CPU physical address size: 39 bits

 2099 01:49:18.430278  BS: BS_WRITE_TABLES exit times (exec / console): 51 / 152 ms

 2100 01:49:18.433489  CPU physical address size: 39 bits

 2101 01:49:18.436681  CPU physical address size: 39 bits

 2102 01:49:18.440406  Checking cr50 for pending updates

 2103 01:49:18.448494  Reading cr50 TPM mode

 2104 01:49:18.459017  BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms

 2105 01:49:18.468615  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60

 2106 01:49:18.472344  Checking segment from ROM address 0xffc02b38

 2107 01:49:18.475280  Checking segment from ROM address 0xffc02b54

 2108 01:49:18.482010  Loading segment from ROM address 0xffc02b38

 2109 01:49:18.482595    code (compression=0)

 2110 01:49:18.491555    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64

 2111 01:49:18.501520  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64

 2112 01:49:18.502009  it's not compressed!

 2113 01:49:18.642617  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70

 2114 01:49:18.649286  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c

 2115 01:49:18.656152  Loading segment from ROM address 0xffc02b54

 2116 01:49:18.659826    Entry Point 0x30000000

 2117 01:49:18.660248  Loaded segments

 2118 01:49:18.665950  BS: BS_PAYLOAD_LOAD run times (exec / console): 137 / 63 ms

 2119 01:49:18.711185  Finalizing chipset.

 2120 01:49:18.714379  Finalizing SMM.

 2121 01:49:18.714983  APMC done.

 2122 01:49:18.720837  BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms

 2123 01:49:18.724459  mp_park_aps done after 0 msecs.

 2124 01:49:18.727626  Jumping to boot code at 0x30000000(0x76b25000)

 2125 01:49:18.737093  CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes

 2126 01:49:18.737558  

 2127 01:49:18.740556  

 2128 01:49:18.741030  

 2129 01:49:18.742191  end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
 2130 01:49:18.742773  start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
 2131 01:49:18.743251  Setting prompt string to ['volteer:']
 2132 01:49:18.743685  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
 2133 01:49:18.744407  Starting depthcharge on Voema...

 2134 01:49:18.744792  

 2135 01:49:18.751483  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2136 01:49:18.751952  

 2137 01:49:18.757642  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2138 01:49:18.758111  

 2139 01:49:18.764261  Looking for NVMe Controller 0x3005f220 @ 00:1d:00

 2140 01:49:18.764826  

 2141 01:49:18.767164  Failed to find eMMC card reader

 2142 01:49:18.767631  

 2143 01:49:18.770733  Wipe memory regions:

 2144 01:49:18.771199  

 2145 01:49:18.773848  	[0x00000000001000, 0x000000000a0000)

 2146 01:49:18.774311  

 2147 01:49:18.776988  	[0x00000000100000, 0x00000030000000)

 2148 01:49:18.812658  

 2149 01:49:18.815998  	[0x00000032662db0, 0x000000769ef000)

 2150 01:49:18.865911  

 2151 01:49:18.869521  	[0x00000100000000, 0x00000480400000)

 2152 01:49:19.496747  

 2153 01:49:19.500032  ec_init: CrosEC protocol v3 supported (256, 256)

 2154 01:49:19.932202  

 2155 01:49:19.932800  R8152: Initializing

 2156 01:49:19.933178  

 2157 01:49:19.935010  Version 6 (ocp_data = 5c30)

 2158 01:49:19.935476  

 2159 01:49:19.938490  R8152: Done initializing

 2160 01:49:19.938988  

 2161 01:49:19.941963  Adding net device

 2162 01:49:20.243603  

 2163 01:49:20.246655  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35

 2164 01:49:20.247123  

 2165 01:49:20.247494  

 2166 01:49:20.247839  

 2167 01:49:20.250274  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2169 01:49:20.351679  volteer: tftpboot 192.168.201.1 11733100/tftp-deploy-nusk7q_d/kernel/bzImage 11733100/tftp-deploy-nusk7q_d/kernel/cmdline 11733100/tftp-deploy-nusk7q_d/ramdisk/ramdisk.cpio.gz

 2170 01:49:20.352379  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2171 01:49:20.352874  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
 2172 01:49:20.357052  tftpboot 192.168.201.1 11733100/tftp-deploy-nusk7q_d/kernel/bzIploy-nusk7q_d/kernel/cmdline 11733100/tftp-deploy-nusk7q_d/ramdisk/ramdisk.cpio.gz

 2173 01:49:20.357526  

 2174 01:49:20.357895  Waiting for link

 2175 01:49:20.561609  

 2176 01:49:20.562159  done.

 2177 01:49:20.562588  

 2178 01:49:20.563231  MAC: 00:24:32:30:7a:04

 2179 01:49:20.563600  

 2180 01:49:20.564730  Sending DHCP discover... done.

 2181 01:49:20.565192  

 2182 01:49:20.567679  Waiting for reply... done.

 2183 01:49:20.568142  

 2184 01:49:20.571260  Sending DHCP request... done.

 2185 01:49:20.571720  

 2186 01:49:20.578265  Waiting for reply... done.

 2187 01:49:20.578771  

 2188 01:49:20.579141  My ip is 192.168.201.22

 2189 01:49:20.579482  

 2190 01:49:20.584890  The DHCP server ip is 192.168.201.1

 2191 01:49:20.585520  

 2192 01:49:20.588665  TFTP server IP predefined by user: 192.168.201.1

 2193 01:49:20.589130  

 2194 01:49:20.594864  Bootfile predefined by user: 11733100/tftp-deploy-nusk7q_d/kernel/bzImage

 2195 01:49:20.595412  

 2196 01:49:20.597952  Sending tftp read request... done.

 2197 01:49:20.598411  

 2198 01:49:20.608047  Waiting for the transfer... 

 2199 01:49:20.608529  

 2200 01:49:21.297960  00000000 ################################################################

 2201 01:49:21.298464  

 2202 01:49:22.005009  00080000 ################################################################

 2203 01:49:22.005579  

 2204 01:49:22.733997  00100000 ################################################################

 2205 01:49:22.734570  

 2206 01:49:23.441564  00180000 ################################################################

 2207 01:49:23.441741  

 2208 01:49:24.111483  00200000 ################################################################

 2209 01:49:24.112046  

 2210 01:49:24.838866  00280000 ################################################################

 2211 01:49:24.839470  

 2212 01:49:25.546673  00300000 ################################################################

 2213 01:49:25.547246  

 2214 01:49:26.250509  00380000 ################################################################

 2215 01:49:26.251157  

 2216 01:49:26.973483  00400000 ################################################################

 2217 01:49:26.974084  

 2218 01:49:27.692065  00480000 ################################################################

 2219 01:49:27.692705  

 2220 01:49:28.393785  00500000 ################################################################

 2221 01:49:28.394353  

 2222 01:49:29.128210  00580000 ################################################################

 2223 01:49:29.128788  

 2224 01:49:29.874834  00600000 ################################################################

 2225 01:49:29.875439  

 2226 01:49:30.593134  00680000 ################################################################

 2227 01:49:30.593778  

 2228 01:49:31.316731  00700000 ################################################################

 2229 01:49:31.317272  

 2230 01:49:32.035477  00780000 ################################################################

 2231 01:49:32.036013  

 2232 01:49:32.753923  00800000 ################################################################

 2233 01:49:32.754489  

 2234 01:49:33.486763  00880000 ################################################################

 2235 01:49:33.487321  

 2236 01:49:34.127031  00900000 ################################################################

 2237 01:49:34.127194  

 2238 01:49:34.817422  00980000 ################################################################

 2239 01:49:34.818005  

 2240 01:49:35.561944  00a00000 ################################################################

 2241 01:49:35.562515  

 2242 01:49:36.201581  00a80000 ######################################################### done.

 2243 01:49:36.202099  

 2244 01:49:36.204897  The bootfile was 11473408 bytes long.

 2245 01:49:36.205365  

 2246 01:49:36.208180  Sending tftp read request... done.

 2247 01:49:36.208642  

 2248 01:49:36.211546  Waiting for the transfer... 

 2249 01:49:36.212007  

 2250 01:49:36.939226  00000000 ################################################################

 2251 01:49:36.939790  

 2252 01:49:37.648022  00080000 ################################################################

 2253 01:49:37.648542  

 2254 01:49:38.357388  00100000 ################################################################

 2255 01:49:38.358079  

 2256 01:49:39.080338  00180000 ################################################################

 2257 01:49:39.080913  

 2258 01:49:39.803311  00200000 ################################################################

 2259 01:49:39.803889  

 2260 01:49:40.531873  00280000 ################################################################

 2261 01:49:40.532434  

 2262 01:49:41.264980  00300000 ################################################################

 2263 01:49:41.265533  

 2264 01:49:41.990336  00380000 ################################################################

 2265 01:49:41.990898  

 2266 01:49:42.723750  00400000 ################################################################

 2267 01:49:42.724275  

 2268 01:49:43.448067  00480000 ################################################################

 2269 01:49:43.448679  

 2270 01:49:44.181614  00500000 ################################################################

 2271 01:49:44.182172  

 2272 01:49:44.686050  00580000 ################################################ done.

 2273 01:49:44.686590  

 2274 01:49:44.689015  Sending tftp read request... done.

 2275 01:49:44.689437  

 2276 01:49:44.692212  Waiting for the transfer... 

 2277 01:49:44.692651  

 2278 01:49:44.692990  00000000 # done.

 2279 01:49:44.693303  

 2280 01:49:44.702095  Command line loaded dynamically from TFTP file: 11733100/tftp-deploy-nusk7q_d/kernel/cmdline

 2281 01:49:44.702664  

 2282 01:49:44.728428  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11733100/extract-nfsrootfs-kbpru9ew,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2283 01:49:44.733610  

 2284 01:49:44.736805  Shutting down all USB controllers.

 2285 01:49:44.737464  

 2286 01:49:44.737846  Removing current net device

 2287 01:49:44.738190  

 2288 01:49:44.739863  Finalizing coreboot

 2289 01:49:44.740325  

 2290 01:49:44.746492  Exiting depthcharge with code 4 at timestamp: 34586296

 2291 01:49:44.747093  

 2292 01:49:44.747461  

 2293 01:49:44.747800  Starting kernel ...

 2294 01:49:44.748125  

 2295 01:49:44.748439  

 2296 01:49:44.749739  end: 2.2.4 bootloader-commands (duration 00:00:26) [common]
 2297 01:49:44.750243  start: 2.2.5 auto-login-action (timeout 00:04:19) [common]
 2298 01:49:44.750689  Setting prompt string to ['Linux version [0-9]']
 2299 01:49:44.751096  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2300 01:49:44.751531  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2302 01:54:03.751139  end: 2.2.5 auto-login-action (duration 00:04:19) [common]
 2304 01:54:03.752226  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 259 seconds'
 2306 01:54:03.753069  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2309 01:54:03.754446  end: 2 depthcharge-action (duration 00:05:00) [common]
 2311 01:54:03.755658  Cleaning after the job
 2312 01:54:03.756026  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11733100/tftp-deploy-nusk7q_d/ramdisk
 2313 01:54:03.756948  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11733100/tftp-deploy-nusk7q_d/kernel
 2314 01:54:03.758704  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11733100/tftp-deploy-nusk7q_d/nfsrootfs
 2315 01:54:03.834643  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11733100/tftp-deploy-nusk7q_d/modules
 2316 01:54:03.835331  start: 5.1 power-off (timeout 00:00:30) [common]
 2317 01:54:03.835499  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=off'
 2318 01:54:03.913645  >> Command sent successfully.

 2319 01:54:03.918617  Returned 0 in 0 seconds
 2320 01:54:04.019651  end: 5.1 power-off (duration 00:00:00) [common]
 2322 01:54:04.021174  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2323 01:54:04.022581  Listened to connection for namespace 'common' for up to 1s
 2324 01:54:05.022960  Finalising connection for namespace 'common'
 2325 01:54:05.023627  Disconnecting from shell: Finalise
 2326 01:54:05.024051  

 2327 01:54:05.125185  end: 5.2 read-feedback (duration 00:00:01) [common]
 2328 01:54:05.125805  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11733100
 2329 01:54:05.439879  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11733100
 2330 01:54:05.440075  JobError: Your job cannot terminate cleanly.