Boot log: asus-cx9400-volteer

    1 01:48:42.617131  lava-dispatcher, installed at version: 2023.08
    2 01:48:42.617365  start: 0 validate
    3 01:48:42.617502  Start time: 2023-10-11 01:48:42.617493+00:00 (UTC)
    4 01:48:42.617638  Using caching service: 'http://localhost/cache/?uri=%s'
    5 01:48:42.617775  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230623.0%2Famd64%2Frootfs.cpio.gz exists
    6 01:48:42.871528  Using caching service: 'http://localhost/cache/?uri=%s'
    7 01:48:42.871715  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.295-cip103-95-ge42cfc8bb88b7%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 01:48:48.375501  Using caching service: 'http://localhost/cache/?uri=%s'
    9 01:48:48.375750  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.295-cip103-95-ge42cfc8bb88b7%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 01:48:48.637159  validate duration: 6.02
   12 01:48:48.637616  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 01:48:48.637802  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 01:48:48.637960  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 01:48:48.638170  Not decompressing ramdisk as can be used compressed.
   16 01:48:48.638328  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230623.0/amd64/rootfs.cpio.gz
   17 01:48:48.638441  saving as /var/lib/lava/dispatcher/tmp/11733090/tftp-deploy-vbt9fbv3/ramdisk/rootfs.cpio.gz
   18 01:48:48.638561  total size: 35760064 (34 MB)
   19 01:48:49.283414  progress   0 % (0 MB)
   20 01:48:49.319823  progress   5 % (1 MB)
   21 01:48:49.329316  progress  10 % (3 MB)
   22 01:48:49.338884  progress  15 % (5 MB)
   23 01:48:49.347960  progress  20 % (6 MB)
   24 01:48:49.356951  progress  25 % (8 MB)
   25 01:48:49.369841  progress  30 % (10 MB)
   26 01:48:49.384551  progress  35 % (11 MB)
   27 01:48:49.397761  progress  40 % (13 MB)
   28 01:48:49.407201  progress  45 % (15 MB)
   29 01:48:49.416610  progress  50 % (17 MB)
   30 01:48:49.425991  progress  55 % (18 MB)
   31 01:48:49.435283  progress  60 % (20 MB)
   32 01:48:49.444911  progress  65 % (22 MB)
   33 01:48:49.454318  progress  70 % (23 MB)
   34 01:48:49.464024  progress  75 % (25 MB)
   35 01:48:49.473530  progress  80 % (27 MB)
   36 01:48:49.483270  progress  85 % (29 MB)
   37 01:48:49.492798  progress  90 % (30 MB)
   38 01:48:49.502032  progress  95 % (32 MB)
   39 01:48:49.511392  progress 100 % (34 MB)
   40 01:48:49.511594  34 MB downloaded in 0.87 s (39.06 MB/s)
   41 01:48:49.511767  end: 1.1.1 http-download (duration 00:00:01) [common]
   43 01:48:49.512031  end: 1.1 download-retry (duration 00:00:01) [common]
   44 01:48:49.512150  start: 1.2 download-retry (timeout 00:09:59) [common]
   45 01:48:49.512248  start: 1.2.1 http-download (timeout 00:09:59) [common]
   46 01:48:49.512424  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.295-cip103-95-ge42cfc8bb88b7/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 01:48:49.512511  saving as /var/lib/lava/dispatcher/tmp/11733090/tftp-deploy-vbt9fbv3/kernel/bzImage
   48 01:48:49.512591  total size: 11473408 (10 MB)
   49 01:48:49.512654  No compression specified
   50 01:48:49.513885  progress   0 % (0 MB)
   51 01:48:49.517012  progress   5 % (0 MB)
   52 01:48:49.520210  progress  10 % (1 MB)
   53 01:48:49.523302  progress  15 % (1 MB)
   54 01:48:49.526434  progress  20 % (2 MB)
   55 01:48:49.529522  progress  25 % (2 MB)
   56 01:48:49.532810  progress  30 % (3 MB)
   57 01:48:49.535883  progress  35 % (3 MB)
   58 01:48:49.539212  progress  40 % (4 MB)
   59 01:48:49.542209  progress  45 % (4 MB)
   60 01:48:49.545390  progress  50 % (5 MB)
   61 01:48:49.548367  progress  55 % (6 MB)
   62 01:48:49.551566  progress  60 % (6 MB)
   63 01:48:49.554552  progress  65 % (7 MB)
   64 01:48:49.557786  progress  70 % (7 MB)
   65 01:48:49.560858  progress  75 % (8 MB)
   66 01:48:49.564222  progress  80 % (8 MB)
   67 01:48:49.567281  progress  85 % (9 MB)
   68 01:48:49.570491  progress  90 % (9 MB)
   69 01:48:49.573475  progress  95 % (10 MB)
   70 01:48:49.576644  progress 100 % (10 MB)
   71 01:48:49.576787  10 MB downloaded in 0.06 s (170.46 MB/s)
   72 01:48:49.576946  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 01:48:49.577198  end: 1.2 download-retry (duration 00:00:00) [common]
   75 01:48:49.577288  start: 1.3 download-retry (timeout 00:09:59) [common]
   76 01:48:49.577383  start: 1.3.1 http-download (timeout 00:09:59) [common]
   77 01:48:49.577529  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.295-cip103-95-ge42cfc8bb88b7/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 01:48:49.577603  saving as /var/lib/lava/dispatcher/tmp/11733090/tftp-deploy-vbt9fbv3/modules/modules.tar
   79 01:48:49.577671  total size: 484192 (0 MB)
   80 01:48:49.577736  Using unxz to decompress xz
   81 01:48:49.582211  progress   6 % (0 MB)
   82 01:48:49.582658  progress  13 % (0 MB)
   83 01:48:49.582928  progress  20 % (0 MB)
   84 01:48:49.584609  progress  27 % (0 MB)
   85 01:48:49.586658  progress  33 % (0 MB)
   86 01:48:49.588731  progress  40 % (0 MB)
   87 01:48:49.590945  progress  47 % (0 MB)
   88 01:48:49.593064  progress  54 % (0 MB)
   89 01:48:49.595301  progress  60 % (0 MB)
   90 01:48:49.597482  progress  67 % (0 MB)
   91 01:48:49.599714  progress  74 % (0 MB)
   92 01:48:49.602009  progress  81 % (0 MB)
   93 01:48:49.604112  progress  87 % (0 MB)
   94 01:48:49.606273  progress  94 % (0 MB)
   95 01:48:49.609101  progress 100 % (0 MB)
   96 01:48:49.616035  0 MB downloaded in 0.04 s (12.04 MB/s)
   97 01:48:49.616342  end: 1.3.1 http-download (duration 00:00:00) [common]
   99 01:48:49.616626  end: 1.3 download-retry (duration 00:00:00) [common]
  100 01:48:49.616730  start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
  101 01:48:49.616830  start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
  102 01:48:49.616913  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
  103 01:48:49.617001  start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
  104 01:48:49.617235  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11733090/lava-overlay-j_evkkwx
  105 01:48:49.617375  makedir: /var/lib/lava/dispatcher/tmp/11733090/lava-overlay-j_evkkwx/lava-11733090/bin
  106 01:48:49.617484  makedir: /var/lib/lava/dispatcher/tmp/11733090/lava-overlay-j_evkkwx/lava-11733090/tests
  107 01:48:49.617586  makedir: /var/lib/lava/dispatcher/tmp/11733090/lava-overlay-j_evkkwx/lava-11733090/results
  108 01:48:49.617706  Creating /var/lib/lava/dispatcher/tmp/11733090/lava-overlay-j_evkkwx/lava-11733090/bin/lava-add-keys
  109 01:48:49.617858  Creating /var/lib/lava/dispatcher/tmp/11733090/lava-overlay-j_evkkwx/lava-11733090/bin/lava-add-sources
  110 01:48:49.617994  Creating /var/lib/lava/dispatcher/tmp/11733090/lava-overlay-j_evkkwx/lava-11733090/bin/lava-background-process-start
  111 01:48:49.618130  Creating /var/lib/lava/dispatcher/tmp/11733090/lava-overlay-j_evkkwx/lava-11733090/bin/lava-background-process-stop
  112 01:48:49.618260  Creating /var/lib/lava/dispatcher/tmp/11733090/lava-overlay-j_evkkwx/lava-11733090/bin/lava-common-functions
  113 01:48:49.618391  Creating /var/lib/lava/dispatcher/tmp/11733090/lava-overlay-j_evkkwx/lava-11733090/bin/lava-echo-ipv4
  114 01:48:49.618521  Creating /var/lib/lava/dispatcher/tmp/11733090/lava-overlay-j_evkkwx/lava-11733090/bin/lava-install-packages
  115 01:48:49.618648  Creating /var/lib/lava/dispatcher/tmp/11733090/lava-overlay-j_evkkwx/lava-11733090/bin/lava-installed-packages
  116 01:48:49.618791  Creating /var/lib/lava/dispatcher/tmp/11733090/lava-overlay-j_evkkwx/lava-11733090/bin/lava-os-build
  117 01:48:49.618922  Creating /var/lib/lava/dispatcher/tmp/11733090/lava-overlay-j_evkkwx/lava-11733090/bin/lava-probe-channel
  118 01:48:49.619053  Creating /var/lib/lava/dispatcher/tmp/11733090/lava-overlay-j_evkkwx/lava-11733090/bin/lava-probe-ip
  119 01:48:49.619182  Creating /var/lib/lava/dispatcher/tmp/11733090/lava-overlay-j_evkkwx/lava-11733090/bin/lava-target-ip
  120 01:48:49.619309  Creating /var/lib/lava/dispatcher/tmp/11733090/lava-overlay-j_evkkwx/lava-11733090/bin/lava-target-mac
  121 01:48:49.619437  Creating /var/lib/lava/dispatcher/tmp/11733090/lava-overlay-j_evkkwx/lava-11733090/bin/lava-target-storage
  122 01:48:49.619572  Creating /var/lib/lava/dispatcher/tmp/11733090/lava-overlay-j_evkkwx/lava-11733090/bin/lava-test-case
  123 01:48:49.619701  Creating /var/lib/lava/dispatcher/tmp/11733090/lava-overlay-j_evkkwx/lava-11733090/bin/lava-test-event
  124 01:48:49.619830  Creating /var/lib/lava/dispatcher/tmp/11733090/lava-overlay-j_evkkwx/lava-11733090/bin/lava-test-feedback
  125 01:48:49.619960  Creating /var/lib/lava/dispatcher/tmp/11733090/lava-overlay-j_evkkwx/lava-11733090/bin/lava-test-raise
  126 01:48:49.620097  Creating /var/lib/lava/dispatcher/tmp/11733090/lava-overlay-j_evkkwx/lava-11733090/bin/lava-test-reference
  127 01:48:49.620284  Creating /var/lib/lava/dispatcher/tmp/11733090/lava-overlay-j_evkkwx/lava-11733090/bin/lava-test-runner
  128 01:48:49.620419  Creating /var/lib/lava/dispatcher/tmp/11733090/lava-overlay-j_evkkwx/lava-11733090/bin/lava-test-set
  129 01:48:49.620551  Creating /var/lib/lava/dispatcher/tmp/11733090/lava-overlay-j_evkkwx/lava-11733090/bin/lava-test-shell
  130 01:48:49.620683  Updating /var/lib/lava/dispatcher/tmp/11733090/lava-overlay-j_evkkwx/lava-11733090/bin/lava-install-packages (oe)
  131 01:48:49.620848  Updating /var/lib/lava/dispatcher/tmp/11733090/lava-overlay-j_evkkwx/lava-11733090/bin/lava-installed-packages (oe)
  132 01:48:49.620977  Creating /var/lib/lava/dispatcher/tmp/11733090/lava-overlay-j_evkkwx/lava-11733090/environment
  133 01:48:49.621081  LAVA metadata
  134 01:48:49.621159  - LAVA_JOB_ID=11733090
  135 01:48:49.621225  - LAVA_DISPATCHER_IP=192.168.201.1
  136 01:48:49.621339  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
  137 01:48:49.621410  skipped lava-vland-overlay
  138 01:48:49.621491  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  139 01:48:49.621577  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
  140 01:48:49.621641  skipped lava-multinode-overlay
  141 01:48:49.621714  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  142 01:48:49.621798  start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
  143 01:48:49.621877  Loading test definitions
  144 01:48:49.621976  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
  145 01:48:49.622054  Using /lava-11733090 at stage 0
  146 01:48:49.622390  uuid=11733090_1.4.2.3.1 testdef=None
  147 01:48:49.622481  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  148 01:48:49.622570  start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
  149 01:48:49.623117  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  151 01:48:49.623351  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
  152 01:48:49.623989  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  154 01:48:49.624222  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
  155 01:48:49.624831  runner path: /var/lib/lava/dispatcher/tmp/11733090/lava-overlay-j_evkkwx/lava-11733090/0/tests/0_cros-ec test_uuid 11733090_1.4.2.3.1
  156 01:48:49.624992  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  158 01:48:49.625201  Creating lava-test-runner.conf files
  159 01:48:49.625266  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11733090/lava-overlay-j_evkkwx/lava-11733090/0 for stage 0
  160 01:48:49.625357  - 0_cros-ec
  161 01:48:49.625457  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  162 01:48:49.625547  start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
  163 01:48:49.632428  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  164 01:48:49.632570  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
  165 01:48:49.632662  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  166 01:48:49.632751  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  167 01:48:49.632844  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
  168 01:48:50.807976  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
  169 01:48:50.808382  start: 1.4.4 extract-modules (timeout 00:09:58) [common]
  170 01:48:50.808507  extracting modules file /var/lib/lava/dispatcher/tmp/11733090/tftp-deploy-vbt9fbv3/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11733090/extract-overlay-ramdisk-nq18mirh/ramdisk
  171 01:48:50.831709  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  172 01:48:50.831871  start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
  173 01:48:50.831973  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11733090/compress-overlay-o8jb2pwo/overlay-1.4.2.4.tar.gz to ramdisk
  174 01:48:50.832045  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11733090/compress-overlay-o8jb2pwo/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11733090/extract-overlay-ramdisk-nq18mirh/ramdisk
  175 01:48:50.839446  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  176 01:48:50.839606  start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
  177 01:48:50.839757  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  178 01:48:50.839871  start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
  179 01:48:50.839974  Building ramdisk /var/lib/lava/dispatcher/tmp/11733090/extract-overlay-ramdisk-nq18mirh/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11733090/extract-overlay-ramdisk-nq18mirh/ramdisk
  180 01:48:51.438434  >> 188276 blocks

  181 01:48:55.381314  rename /var/lib/lava/dispatcher/tmp/11733090/extract-overlay-ramdisk-nq18mirh/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11733090/tftp-deploy-vbt9fbv3/ramdisk/ramdisk.cpio.gz
  182 01:48:55.382093  end: 1.4.7 compress-ramdisk (duration 00:00:05) [common]
  183 01:48:55.382276  start: 1.4.8 prepare-kernel (timeout 00:09:53) [common]
  184 01:48:55.382482  start: 1.4.8.1 prepare-fit (timeout 00:09:53) [common]
  185 01:48:55.382875  No mkimage arch provided, not using FIT.
  186 01:48:55.383025  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  187 01:48:55.383148  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  188 01:48:55.383294  end: 1.4 prepare-tftp-overlay (duration 00:00:06) [common]
  189 01:48:55.383430  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:53) [common]
  190 01:48:55.383573  No LXC device requested
  191 01:48:55.383719  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  192 01:48:55.383869  start: 1.6 deploy-device-env (timeout 00:09:53) [common]
  193 01:48:55.383991  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  194 01:48:55.384118  Checking files for TFTP limit of 4294967296 bytes.
  195 01:48:55.384721  end: 1 tftp-deploy (duration 00:00:07) [common]
  196 01:48:55.384872  start: 2 depthcharge-action (timeout 00:05:00) [common]
  197 01:48:55.385019  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  198 01:48:55.385192  substitutions:
  199 01:48:55.385368  - {DTB}: None
  200 01:48:55.385477  - {INITRD}: 11733090/tftp-deploy-vbt9fbv3/ramdisk/ramdisk.cpio.gz
  201 01:48:55.385569  - {KERNEL}: 11733090/tftp-deploy-vbt9fbv3/kernel/bzImage
  202 01:48:55.385706  - {LAVA_MAC}: None
  203 01:48:55.385799  - {PRESEED_CONFIG}: None
  204 01:48:55.385896  - {PRESEED_LOCAL}: None
  205 01:48:55.385989  - {RAMDISK}: 11733090/tftp-deploy-vbt9fbv3/ramdisk/ramdisk.cpio.gz
  206 01:48:55.386097  - {ROOT_PART}: None
  207 01:48:55.386189  - {ROOT}: None
  208 01:48:55.386282  - {SERVER_IP}: 192.168.201.1
  209 01:48:55.386392  - {TEE}: None
  210 01:48:55.386527  Parsed boot commands:
  211 01:48:55.386623  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  212 01:48:55.386913  Parsed boot commands: tftpboot 192.168.201.1 11733090/tftp-deploy-vbt9fbv3/kernel/bzImage 11733090/tftp-deploy-vbt9fbv3/kernel/cmdline 11733090/tftp-deploy-vbt9fbv3/ramdisk/ramdisk.cpio.gz
  213 01:48:55.387063  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  214 01:48:55.387203  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  215 01:48:55.387387  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  216 01:48:55.387537  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  217 01:48:55.387661  Not connected, no need to disconnect.
  218 01:48:55.387780  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  219 01:48:55.387921  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  220 01:48:55.388025  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-2'
  221 01:48:55.393210  Setting prompt string to ['lava-test: # ']
  222 01:48:55.393717  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  223 01:48:55.393883  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  224 01:48:55.394026  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  225 01:48:55.394166  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  226 01:48:55.394475  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=reboot'
  227 01:49:00.547735  >> Command sent successfully.

  228 01:49:00.551753  Returned 0 in 5 seconds
  229 01:49:00.652252  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  231 01:49:00.652741  end: 2.2.2 reset-device (duration 00:00:05) [common]
  232 01:49:00.652886  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  233 01:49:00.653020  Setting prompt string to 'Starting depthcharge on Voema...'
  234 01:49:00.653123  Changing prompt to 'Starting depthcharge on Voema...'
  235 01:49:00.653229  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  236 01:49:00.653598  [Enter `^Ec?' for help]

  237 01:49:02.254855  

  238 01:49:02.255036  

  239 01:49:02.264464  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...

  240 01:49:02.267905  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz

  241 01:49:02.274919  CPU: ID 806c1, Tigerlake B0, ucode: 00000086

  242 01:49:02.277638  CPU: AES supported, TXT NOT supported, VT supported

  243 01:49:02.284130  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2

  244 01:49:02.291203  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU

  245 01:49:02.294588  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2

  246 01:49:02.297450  VBOOT: Loading verstage.

  247 01:49:02.303981  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  248 01:49:02.307210  FMAP: base = 0x0 size = 0x2000000 #areas = 32

  249 01:49:02.314082  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  250 01:49:02.320694  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes

  251 01:49:02.326979  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984

  252 01:49:02.330909  

  253 01:49:02.331066  

  254 01:49:02.340649  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...

  255 01:49:02.355505  Probing TPM: . done!

  256 01:49:02.358468  TPM ready after 0 ms

  257 01:49:02.362002  Connected to device vid:did:rid of 1ae0:0028:00

  258 01:49:02.373527  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6

  259 01:49:02.380065  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  260 01:49:02.383213  Initialized TPM device CR50 revision 0

  261 01:49:02.434442  tlcl_send_startup: Startup return code is 0

  262 01:49:02.434600  TPM: setup succeeded

  263 01:49:02.450204  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  264 01:49:02.464362  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  265 01:49:02.477667  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

  266 01:49:02.487331  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  267 01:49:02.490851  Chrome EC: UHEPI supported

  268 01:49:02.493700  Phase 1

  269 01:49:02.497223  FMAP: area GBB found @ 1805000 (458752 bytes)

  270 01:49:02.507372  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  271 01:49:02.514247  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  272 01:49:02.520364  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  273 01:49:02.527446  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7

  274 01:49:02.530150  Recovery requested (1009000e)

  275 01:49:02.533515  TPM: Extending digest for VBOOT: boot mode into PCR 0

  276 01:49:02.545223  tlcl_extend: response is 0

  277 01:49:02.551855  TPM: Extending digest for VBOOT: GBB HWID into PCR 1

  278 01:49:02.561797  tlcl_extend: response is 0

  279 01:49:02.568299  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  280 01:49:02.575536  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638

  281 01:49:02.581442  BS: verstage times (exec / console): total (unknown) / 142 ms

  282 01:49:02.581569  

  283 01:49:02.581648  

  284 01:49:02.594691  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...

  285 01:49:02.601258  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  286 01:49:02.605044  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  287 01:49:02.608275  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000

  288 01:49:02.614842  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  289 01:49:02.618512  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000

  290 01:49:02.621407  gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000

  291 01:49:02.625137  TCO_STS:   0000 0000

  292 01:49:02.627724  GEN_PMCON: d0015038 00002200

  293 01:49:02.631228  GBLRST_CAUSE: 00000000 00000000

  294 01:49:02.634517  HPR_CAUSE0: 00000000

  295 01:49:02.634657  prev_sleep_state 5

  296 01:49:02.637870  Boot Count incremented to 24376

  297 01:49:02.645022  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  298 01:49:02.651395  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  299 01:49:02.661067  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  300 01:49:02.667656  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c

  301 01:49:02.670850  Chrome EC: UHEPI supported

  302 01:49:02.677583  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  303 01:49:02.688709  Probing TPM:  done!

  304 01:49:02.695505  Connected to device vid:did:rid of 1ae0:0028:00

  305 01:49:02.706130  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6

  306 01:49:02.716287  Initialized TPM device CR50 revision 0

  307 01:49:02.725494  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  308 01:49:02.731802  MRC: Hash idx 0x100b comparison successful.

  309 01:49:02.735212  MRC cache found, size faa8

  310 01:49:02.735333  bootmode is set to: 2

  311 01:49:02.738347  SPD index = 0

  312 01:49:02.745212  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c

  313 01:49:02.748379  SPD: module type is LPDDR4X

  314 01:49:02.752161  SPD: module part number is MT53E512M64D4NW-046

  315 01:49:02.758037  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  316 01:49:02.761686  SPD: device width 16 bits, bus width 16 bits

  317 01:49:02.768160  SPD: module size is 1024 MB (per channel)

  318 01:49:03.201200  CBMEM:

  319 01:49:03.204390  IMD: root @ 0x76fff000 254 entries.

  320 01:49:03.208169  IMD: root @ 0x76ffec00 62 entries.

  321 01:49:03.211084  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  322 01:49:03.218124  FMAP: area RW_VPD found @ f35000 (8192 bytes)

  323 01:49:03.221084  External stage cache:

  324 01:49:03.224700  IMD: root @ 0x7b3ff000 254 entries.

  325 01:49:03.227376  IMD: root @ 0x7b3fec00 62 entries.

  326 01:49:03.243046  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  327 01:49:03.249658  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  328 01:49:03.256183  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  329 01:49:03.275567  MRC: 'RECOVERY_MRC_CACHE' does not need update.

  330 01:49:03.277119  cse_lite: Skip switching to RW in the recovery path

  331 01:49:03.277264  8 DIMMs found

  332 01:49:03.277393  SMM Memory Map

  333 01:49:03.283319  SMRAM       : 0x7b000000 0x800000

  334 01:49:03.287130   Subregion 0: 0x7b000000 0x200000

  335 01:49:03.287286   Subregion 1: 0x7b200000 0x200000

  336 01:49:03.293653   Subregion 2: 0x7b400000 0x400000

  337 01:49:03.293779  top_of_ram = 0x77000000

  338 01:49:03.300583  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  339 01:49:03.303868  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)

  340 01:49:03.310537  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  341 01:49:03.317124  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  342 01:49:03.323714  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c

  343 01:49:03.330163  Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)

  344 01:49:03.340409  Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500

  345 01:49:03.343556  Processing 211 relocs. Offset value of 0x74c0b000

  346 01:49:03.353489  BS: romstage times (exec / console): total (unknown) / 277 ms

  347 01:49:03.359283  

  348 01:49:03.359403  

  349 01:49:03.369410  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...

  350 01:49:03.372497  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  351 01:49:03.382600  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  352 01:49:03.389040  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  353 01:49:03.395721  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec

  354 01:49:03.401970  Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)

  355 01:49:03.449543  Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270

  356 01:49:03.456369  Processing 5008 relocs. Offset value of 0x75d98000

  357 01:49:03.459335  BS: postcar times (exec / console): total (unknown) / 59 ms

  358 01:49:03.462357  

  359 01:49:03.462473  

  360 01:49:03.472621  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...

  361 01:49:03.472795  Normal boot

  362 01:49:03.475611  FW_CONFIG value is 0x804c02

  363 01:49:03.479132  PCI: 00:07.0 disabled by fw_config

  364 01:49:03.482072  PCI: 00:07.1 disabled by fw_config

  365 01:49:03.485833  PCI: 00:0d.2 disabled by fw_config

  366 01:49:03.489439  PCI: 00:1c.7 disabled by fw_config

  367 01:49:03.495906  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  368 01:49:03.503041  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  369 01:49:03.505787  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  370 01:49:03.509645  GENERIC: 0.0 disabled by fw_config

  371 01:49:03.512391  GENERIC: 1.0 disabled by fw_config

  372 01:49:03.519394  fw_config match found: DB_USB=USB3_ACTIVE

  373 01:49:03.522590  fw_config match found: DB_USB=USB3_ACTIVE

  374 01:49:03.525711  fw_config match found: DB_USB=USB3_ACTIVE

  375 01:49:03.532366  fw_config match found: DB_USB=USB3_ACTIVE

  376 01:49:03.535732  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  377 01:49:03.542498  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  378 01:49:03.552347  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  379 01:49:03.558635  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c

  380 01:49:03.562238  microcode: sig=0x806c1 pf=0x80 revision=0x86

  381 01:49:03.568953  microcode: Update skipped, already up-to-date

  382 01:49:03.575169  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c

  383 01:49:03.602828  Detected 4 core, 8 thread CPU.

  384 01:49:03.606446  Setting up SMI for CPU

  385 01:49:03.609636  IED base = 0x7b400000

  386 01:49:03.609751  IED size = 0x00400000

  387 01:49:03.612642  Will perform SMM setup.

  388 01:49:03.619392  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.

  389 01:49:03.626179  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

  390 01:49:03.632709  Processing 16 relocs. Offset value of 0x00030000

  391 01:49:03.636853  Attempting to start 7 APs

  392 01:49:03.639488  Waiting for 10ms after sending INIT.

  393 01:49:03.655218  Waiting for 1st SIPI to complete...done.

  394 01:49:03.655386  AP: slot 1 apic_id 1.

  395 01:49:03.661410  Waiting for 2nd SIPI to complete...done.

  396 01:49:03.661508  AP: slot 7 apic_id 7.

  397 01:49:03.665106  AP: slot 3 apic_id 6.

  398 01:49:03.668457  AP: slot 4 apic_id 5.

  399 01:49:03.668553  AP: slot 5 apic_id 4.

  400 01:49:03.671910  AP: slot 6 apic_id 2.

  401 01:49:03.675157  AP: slot 2 apic_id 3.

  402 01:49:03.681188  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

  403 01:49:03.688176  Processing 13 relocs. Offset value of 0x00038000

  404 01:49:03.691739  Unable to locate Global NVS

  405 01:49:03.697977  SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)

  406 01:49:03.701319  Installing permanent SMM handler to 0x7b000000

  407 01:49:03.711065  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908

  408 01:49:03.714478  Processing 794 relocs. Offset value of 0x7b010000

  409 01:49:03.724796  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8

  410 01:49:03.728283  Processing 13 relocs. Offset value of 0x7b008000

  411 01:49:03.734342  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd

  412 01:49:03.741370  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd

  413 01:49:03.744440  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd

  414 01:49:03.751012  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd

  415 01:49:03.757614  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd

  416 01:49:03.764443  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd

  417 01:49:03.770760  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd

  418 01:49:03.770940  Unable to locate Global NVS

  419 01:49:03.780954  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)

  420 01:49:03.784263  Clearing SMI status registers

  421 01:49:03.784394  SMI_STS: PM1 

  422 01:49:03.787446  PM1_STS: PWRBTN 

  423 01:49:03.794007  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0

  424 01:49:03.797764  In relocation handler: CPU 0

  425 01:49:03.800531  New SMBASE=0x7b000000 IEDBASE=0x7b400000

  426 01:49:03.807418  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  427 01:49:03.807586  Relocation complete.

  428 01:49:03.817238  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1

  429 01:49:03.820400  In relocation handler: CPU 1

  430 01:49:03.823721  New SMBASE=0x7afffc00 IEDBASE=0x7b400000

  431 01:49:03.823844  Relocation complete.

  432 01:49:03.833667  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2

  433 01:49:03.833848  In relocation handler: CPU 2

  434 01:49:03.840367  New SMBASE=0x7afff800 IEDBASE=0x7b400000

  435 01:49:03.840495  Relocation complete.

  436 01:49:03.850367  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6

  437 01:49:03.850556  In relocation handler: CPU 6

  438 01:49:03.857105  New SMBASE=0x7affe800 IEDBASE=0x7b400000

  439 01:49:03.860545  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  440 01:49:03.863397  Relocation complete.

  441 01:49:03.870059  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4

  442 01:49:03.873557  In relocation handler: CPU 4

  443 01:49:03.876988  New SMBASE=0x7afff000 IEDBASE=0x7b400000

  444 01:49:03.880334  Relocation complete.

  445 01:49:03.887216  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5

  446 01:49:03.890242  In relocation handler: CPU 5

  447 01:49:03.893549  New SMBASE=0x7affec00 IEDBASE=0x7b400000

  448 01:49:03.900243  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  449 01:49:03.900384  Relocation complete.

  450 01:49:03.906718  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3

  451 01:49:03.910224  In relocation handler: CPU 3

  452 01:49:03.917061  New SMBASE=0x7afff400 IEDBASE=0x7b400000

  453 01:49:03.919977  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  454 01:49:03.923285  Relocation complete.

  455 01:49:03.930342  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7

  456 01:49:03.933681  In relocation handler: CPU 7

  457 01:49:03.936543  New SMBASE=0x7affe400 IEDBASE=0x7b400000

  458 01:49:03.940051  Relocation complete.

  459 01:49:03.940142  Initializing CPU #0

  460 01:49:03.943286  CPU: vendor Intel device 806c1

  461 01:49:03.946779  CPU: family 06, model 8c, stepping 01

  462 01:49:03.950047  Clearing out pending MCEs

  463 01:49:03.953009  Setting up local APIC...

  464 01:49:03.956880   apic_id: 0x00 done.

  465 01:49:03.960468  Turbo is available but hidden

  466 01:49:03.960602  Turbo is available and visible

  467 01:49:03.967345  microcode: Update skipped, already up-to-date

  468 01:49:03.967515  CPU #0 initialized

  469 01:49:03.970620  Initializing CPU #1

  470 01:49:03.973950  Initializing CPU #5

  471 01:49:03.974069  Initializing CPU #4

  472 01:49:03.977396  CPU: vendor Intel device 806c1

  473 01:49:03.980828  CPU: family 06, model 8c, stepping 01

  474 01:49:03.983860  CPU: vendor Intel device 806c1

  475 01:49:03.987418  CPU: family 06, model 8c, stepping 01

  476 01:49:03.990832  Clearing out pending MCEs

  477 01:49:03.993778  Clearing out pending MCEs

  478 01:49:03.997190  Setting up local APIC...

  479 01:49:03.997292  Initializing CPU #7

  480 01:49:04.000965  Initializing CPU #3

  481 01:49:04.004135  CPU: vendor Intel device 806c1

  482 01:49:04.007472  CPU: family 06, model 8c, stepping 01

  483 01:49:04.010812  CPU: vendor Intel device 806c1

  484 01:49:04.013862  CPU: family 06, model 8c, stepping 01

  485 01:49:04.017241  Clearing out pending MCEs

  486 01:49:04.020291  Clearing out pending MCEs

  487 01:49:04.023641  Setting up local APIC...

  488 01:49:04.023747  Initializing CPU #6

  489 01:49:04.027281  CPU: vendor Intel device 806c1

  490 01:49:04.030345  CPU: family 06, model 8c, stepping 01

  491 01:49:04.034088   apic_id: 0x04 done.

  492 01:49:04.037096  Setting up local APIC...

  493 01:49:04.037224  Initializing CPU #2

  494 01:49:04.040141  CPU: vendor Intel device 806c1

  495 01:49:04.043747  CPU: family 06, model 8c, stepping 01

  496 01:49:04.047088  CPU: vendor Intel device 806c1

  497 01:49:04.049839  CPU: family 06, model 8c, stepping 01

  498 01:49:04.053177  Clearing out pending MCEs

  499 01:49:04.056775  Clearing out pending MCEs

  500 01:49:04.060071  Setting up local APIC...

  501 01:49:04.063902  microcode: Update skipped, already up-to-date

  502 01:49:04.066901   apic_id: 0x05 done.

  503 01:49:04.066989  CPU #5 initialized

  504 01:49:04.073623  microcode: Update skipped, already up-to-date

  505 01:49:04.073712   apic_id: 0x02 done.

  506 01:49:04.077074  Setting up local APIC...

  507 01:49:04.080525  Clearing out pending MCEs

  508 01:49:04.083321  CPU #4 initialized

  509 01:49:04.083408  Setting up local APIC...

  510 01:49:04.089839  microcode: Update skipped, already up-to-date

  511 01:49:04.089959   apic_id: 0x03 done.

  512 01:49:04.093400  CPU #6 initialized

  513 01:49:04.096545  microcode: Update skipped, already up-to-date

  514 01:49:04.100239   apic_id: 0x06 done.

  515 01:49:04.103682   apic_id: 0x07 done.

  516 01:49:04.106525  microcode: Update skipped, already up-to-date

  517 01:49:04.109667  microcode: Update skipped, already up-to-date

  518 01:49:04.113412  Setting up local APIC...

  519 01:49:04.116270  CPU #7 initialized

  520 01:49:04.116389  CPU #3 initialized

  521 01:49:04.119739  CPU #2 initialized

  522 01:49:04.123363   apic_id: 0x01 done.

  523 01:49:04.126534  microcode: Update skipped, already up-to-date

  524 01:49:04.129980  CPU #1 initialized

  525 01:49:04.133410  bsp_do_flight_plan done after 468 msecs.

  526 01:49:04.136335  CPU: frequency set to 4000 MHz

  527 01:49:04.136436  Enabling SMIs.

  528 01:49:04.143157  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms

  529 01:49:04.160360  SATAXPCIE1 indicates PCIe NVMe is present

  530 01:49:04.163213  Probing TPM:  done!

  531 01:49:04.166927  Connected to device vid:did:rid of 1ae0:0028:00

  532 01:49:04.177419  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6

  533 01:49:04.180689  Initialized TPM device CR50 revision 0

  534 01:49:04.184029  Enabling S0i3.4

  535 01:49:04.190159  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc

  536 01:49:04.193712  Found a VBT of 8704 bytes after decompression

  537 01:49:04.200128  cse_lite: CSE RO boot. HybridStorageMode disabled

  538 01:49:04.206864  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called

  539 01:49:04.283591  FSPS returned 0

  540 01:49:04.286692  Executing Phase 1 of FspMultiPhaseSiInit

  541 01:49:04.296074  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  542 01:49:04.299508  port C0 DISC req: usage 1 usb3 1 usb2 5

  543 01:49:04.302779  Raw Buffer output 0 00000511

  544 01:49:04.306681  Raw Buffer output 1 00000000

  545 01:49:04.310051  pmc_send_ipc_cmd succeeded

  546 01:49:04.317052  port C1 DISC req: usage 1 usb3 2 usb2 3

  547 01:49:04.317141  Raw Buffer output 0 00000321

  548 01:49:04.320451  Raw Buffer output 1 00000000

  549 01:49:04.324249  pmc_send_ipc_cmd succeeded

  550 01:49:04.329494  Detected 4 core, 8 thread CPU.

  551 01:49:04.332317  Detected 4 core, 8 thread CPU.

  552 01:49:04.566739  Display FSP Version Info HOB

  553 01:49:04.569842  Reference Code - CPU = a.0.4c.31

  554 01:49:04.573505  uCode Version = 0.0.0.86

  555 01:49:04.576433  TXT ACM version = ff.ff.ff.ffff

  556 01:49:04.579759  Reference Code - ME = a.0.4c.31

  557 01:49:04.583478  MEBx version = 0.0.0.0

  558 01:49:04.586397  ME Firmware Version = Consumer SKU

  559 01:49:04.589684  Reference Code - PCH = a.0.4c.31

  560 01:49:04.593254  PCH-CRID Status = Disabled

  561 01:49:04.596432  PCH-CRID Original Value = ff.ff.ff.ffff

  562 01:49:04.600142  PCH-CRID New Value = ff.ff.ff.ffff

  563 01:49:04.603282  OPROM - RST - RAID = ff.ff.ff.ffff

  564 01:49:04.606717  PCH Hsio Version = 4.0.0.0

  565 01:49:04.609729  Reference Code - SA - System Agent = a.0.4c.31

  566 01:49:04.613496  Reference Code - MRC = 2.0.0.1

  567 01:49:04.616412  SA - PCIe Version = a.0.4c.31

  568 01:49:04.620073  SA-CRID Status = Disabled

  569 01:49:04.623168  SA-CRID Original Value = 0.0.0.1

  570 01:49:04.626306  SA-CRID New Value = 0.0.0.1

  571 01:49:04.629775  OPROM - VBIOS = ff.ff.ff.ffff

  572 01:49:04.633088  IO Manageability Engine FW Version = 11.1.4.0

  573 01:49:04.636947  PHY Build Version = 0.0.0.e0

  574 01:49:04.639847  Thunderbolt(TM) FW Version = 0.0.0.0

  575 01:49:04.646120  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  576 01:49:04.649706  ITSS IRQ Polarities Before:

  577 01:49:04.649791  IPC0: 0xffffffff

  578 01:49:04.652873  IPC1: 0xffffffff

  579 01:49:04.652985  IPC2: 0xffffffff

  580 01:49:04.656061  IPC3: 0xffffffff

  581 01:49:04.659649  ITSS IRQ Polarities After:

  582 01:49:04.659734  IPC0: 0xffffffff

  583 01:49:04.662989  IPC1: 0xffffffff

  584 01:49:04.663101  IPC2: 0xffffffff

  585 01:49:04.666529  IPC3: 0xffffffff

  586 01:49:04.669562  Found PCIe Root Port #9 at PCI: 00:1d.0.

  587 01:49:04.682626  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.

  588 01:49:04.692816  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.

  589 01:49:04.705974  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.

  590 01:49:04.712690  BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms

  591 01:49:04.715803  Enumerating buses...

  592 01:49:04.719129  Show all devs... Before device enumeration.

  593 01:49:04.722406  Root Device: enabled 1

  594 01:49:04.722492  DOMAIN: 0000: enabled 1

  595 01:49:04.726021  CPU_CLUSTER: 0: enabled 1

  596 01:49:04.729044  PCI: 00:00.0: enabled 1

  597 01:49:04.732523  PCI: 00:02.0: enabled 1

  598 01:49:04.732639  PCI: 00:04.0: enabled 1

  599 01:49:04.735648  PCI: 00:05.0: enabled 1

  600 01:49:04.739023  PCI: 00:06.0: enabled 0

  601 01:49:04.739108  PCI: 00:07.0: enabled 0

  602 01:49:04.742341  PCI: 00:07.1: enabled 0

  603 01:49:04.745760  PCI: 00:07.2: enabled 0

  604 01:49:04.749391  PCI: 00:07.3: enabled 0

  605 01:49:04.749479  PCI: 00:08.0: enabled 1

  606 01:49:04.752683  PCI: 00:09.0: enabled 0

  607 01:49:04.755816  PCI: 00:0a.0: enabled 0

  608 01:49:04.759470  PCI: 00:0d.0: enabled 1

  609 01:49:04.759561  PCI: 00:0d.1: enabled 0

  610 01:49:04.762498  PCI: 00:0d.2: enabled 0

  611 01:49:04.765932  PCI: 00:0d.3: enabled 0

  612 01:49:04.769289  PCI: 00:0e.0: enabled 0

  613 01:49:04.769390  PCI: 00:10.2: enabled 1

  614 01:49:04.772252  PCI: 00:10.6: enabled 0

  615 01:49:04.775665  PCI: 00:10.7: enabled 0

  616 01:49:04.779858  PCI: 00:12.0: enabled 0

  617 01:49:04.779975  PCI: 00:12.6: enabled 0

  618 01:49:04.782213  PCI: 00:13.0: enabled 0

  619 01:49:04.785484  PCI: 00:14.0: enabled 1

  620 01:49:04.785615  PCI: 00:14.1: enabled 0

  621 01:49:04.788931  PCI: 00:14.2: enabled 1

  622 01:49:04.792140  PCI: 00:14.3: enabled 1

  623 01:49:04.795420  PCI: 00:15.0: enabled 1

  624 01:49:04.795504  PCI: 00:15.1: enabled 1

  625 01:49:04.798538  PCI: 00:15.2: enabled 1

  626 01:49:04.801958  PCI: 00:15.3: enabled 1

  627 01:49:04.805365  PCI: 00:16.0: enabled 1

  628 01:49:04.805491  PCI: 00:16.1: enabled 0

  629 01:49:04.808576  PCI: 00:16.2: enabled 0

  630 01:49:04.811735  PCI: 00:16.3: enabled 0

  631 01:49:04.815149  PCI: 00:16.4: enabled 0

  632 01:49:04.815227  PCI: 00:16.5: enabled 0

  633 01:49:04.818928  PCI: 00:17.0: enabled 1

  634 01:49:04.821978  PCI: 00:19.0: enabled 0

  635 01:49:04.825484  PCI: 00:19.1: enabled 1

  636 01:49:04.825627  PCI: 00:19.2: enabled 0

  637 01:49:04.828754  PCI: 00:1c.0: enabled 1

  638 01:49:04.831965  PCI: 00:1c.1: enabled 0

  639 01:49:04.835283  PCI: 00:1c.2: enabled 0

  640 01:49:04.835358  PCI: 00:1c.3: enabled 0

  641 01:49:04.838534  PCI: 00:1c.4: enabled 0

  642 01:49:04.842103  PCI: 00:1c.5: enabled 0

  643 01:49:04.842213  PCI: 00:1c.6: enabled 1

  644 01:49:04.845319  PCI: 00:1c.7: enabled 0

  645 01:49:04.848677  PCI: 00:1d.0: enabled 1

  646 01:49:04.851996  PCI: 00:1d.1: enabled 0

  647 01:49:04.852092  PCI: 00:1d.2: enabled 1

  648 01:49:04.855166  PCI: 00:1d.3: enabled 0

  649 01:49:04.858622  PCI: 00:1e.0: enabled 1

  650 01:49:04.861902  PCI: 00:1e.1: enabled 0

  651 01:49:04.862019  PCI: 00:1e.2: enabled 1

  652 01:49:04.864944  PCI: 00:1e.3: enabled 1

  653 01:49:04.868151  PCI: 00:1f.0: enabled 1

  654 01:49:04.871748  PCI: 00:1f.1: enabled 0

  655 01:49:04.871871  PCI: 00:1f.2: enabled 1

  656 01:49:04.875118  PCI: 00:1f.3: enabled 1

  657 01:49:04.878259  PCI: 00:1f.4: enabled 0

  658 01:49:04.881666  PCI: 00:1f.5: enabled 1

  659 01:49:04.881744  PCI: 00:1f.6: enabled 0

  660 01:49:04.885174  PCI: 00:1f.7: enabled 0

  661 01:49:04.888367  APIC: 00: enabled 1

  662 01:49:04.888460  GENERIC: 0.0: enabled 1

  663 01:49:04.891928  GENERIC: 0.0: enabled 1

  664 01:49:04.895361  GENERIC: 1.0: enabled 1

  665 01:49:04.898358  GENERIC: 0.0: enabled 1

  666 01:49:04.898496  GENERIC: 1.0: enabled 1

  667 01:49:04.901260  USB0 port 0: enabled 1

  668 01:49:04.904703  GENERIC: 0.0: enabled 1

  669 01:49:04.904814  USB0 port 0: enabled 1

  670 01:49:04.907816  GENERIC: 0.0: enabled 1

  671 01:49:04.911192  I2C: 00:1a: enabled 1

  672 01:49:04.914565  I2C: 00:31: enabled 1

  673 01:49:04.914727  I2C: 00:32: enabled 1

  674 01:49:04.917724  I2C: 00:10: enabled 1

  675 01:49:04.921613  I2C: 00:15: enabled 1

  676 01:49:04.921721  GENERIC: 0.0: enabled 0

  677 01:49:04.924720  GENERIC: 1.0: enabled 0

  678 01:49:04.927963  GENERIC: 0.0: enabled 1

  679 01:49:04.928140  SPI: 00: enabled 1

  680 01:49:04.931167  SPI: 00: enabled 1

  681 01:49:04.934446  PNP: 0c09.0: enabled 1

  682 01:49:04.934621  GENERIC: 0.0: enabled 1

  683 01:49:04.938004  USB3 port 0: enabled 1

  684 01:49:04.941282  USB3 port 1: enabled 1

  685 01:49:04.944355  USB3 port 2: enabled 0

  686 01:49:04.944524  USB3 port 3: enabled 0

  687 01:49:04.947893  USB2 port 0: enabled 0

  688 01:49:04.951476  USB2 port 1: enabled 1

  689 01:49:04.951609  USB2 port 2: enabled 1

  690 01:49:04.954269  USB2 port 3: enabled 0

  691 01:49:04.958042  USB2 port 4: enabled 1

  692 01:49:04.961076  USB2 port 5: enabled 0

  693 01:49:04.961179  USB2 port 6: enabled 0

  694 01:49:04.964373  USB2 port 7: enabled 0

  695 01:49:04.967618  USB2 port 8: enabled 0

  696 01:49:04.967719  USB2 port 9: enabled 0

  697 01:49:04.971249  USB3 port 0: enabled 0

  698 01:49:04.974393  USB3 port 1: enabled 1

  699 01:49:04.974507  USB3 port 2: enabled 0

  700 01:49:04.977551  USB3 port 3: enabled 0

  701 01:49:04.981253  GENERIC: 0.0: enabled 1

  702 01:49:04.984638  GENERIC: 1.0: enabled 1

  703 01:49:04.984725  APIC: 01: enabled 1

  704 01:49:04.987957  APIC: 03: enabled 1

  705 01:49:04.990903  APIC: 06: enabled 1

  706 01:49:04.990987  APIC: 05: enabled 1

  707 01:49:04.994173  APIC: 04: enabled 1

  708 01:49:04.994256  APIC: 02: enabled 1

  709 01:49:04.997160  APIC: 07: enabled 1

  710 01:49:05.000815  Compare with tree...

  711 01:49:05.000929  Root Device: enabled 1

  712 01:49:05.003794   DOMAIN: 0000: enabled 1

  713 01:49:05.007879    PCI: 00:00.0: enabled 1

  714 01:49:05.010513    PCI: 00:02.0: enabled 1

  715 01:49:05.014051    PCI: 00:04.0: enabled 1

  716 01:49:05.014158     GENERIC: 0.0: enabled 1

  717 01:49:05.017279    PCI: 00:05.0: enabled 1

  718 01:49:05.020657    PCI: 00:06.0: enabled 0

  719 01:49:05.024399    PCI: 00:07.0: enabled 0

  720 01:49:05.027559     GENERIC: 0.0: enabled 1

  721 01:49:05.027646    PCI: 00:07.1: enabled 0

  722 01:49:05.030755     GENERIC: 1.0: enabled 1

  723 01:49:05.033794    PCI: 00:07.2: enabled 0

  724 01:49:05.037267     GENERIC: 0.0: enabled 1

  725 01:49:05.040750    PCI: 00:07.3: enabled 0

  726 01:49:05.040838     GENERIC: 1.0: enabled 1

  727 01:49:05.043771    PCI: 00:08.0: enabled 1

  728 01:49:05.047489    PCI: 00:09.0: enabled 0

  729 01:49:05.050310    PCI: 00:0a.0: enabled 0

  730 01:49:05.053870    PCI: 00:0d.0: enabled 1

  731 01:49:05.053957     USB0 port 0: enabled 1

  732 01:49:05.057401      USB3 port 0: enabled 1

  733 01:49:05.060267      USB3 port 1: enabled 1

  734 01:49:05.064107      USB3 port 2: enabled 0

  735 01:49:05.067235      USB3 port 3: enabled 0

  736 01:49:05.069993    PCI: 00:0d.1: enabled 0

  737 01:49:05.070079    PCI: 00:0d.2: enabled 0

  738 01:49:05.073461     GENERIC: 0.0: enabled 1

  739 01:49:05.076740    PCI: 00:0d.3: enabled 0

  740 01:49:05.080311    PCI: 00:0e.0: enabled 0

  741 01:49:05.083661    PCI: 00:10.2: enabled 1

  742 01:49:05.083749    PCI: 00:10.6: enabled 0

  743 01:49:05.086924    PCI: 00:10.7: enabled 0

  744 01:49:05.089879    PCI: 00:12.0: enabled 0

  745 01:49:05.093665    PCI: 00:12.6: enabled 0

  746 01:49:05.096961    PCI: 00:13.0: enabled 0

  747 01:49:05.097049    PCI: 00:14.0: enabled 1

  748 01:49:05.099801     USB0 port 0: enabled 1

  749 01:49:05.103175      USB2 port 0: enabled 0

  750 01:49:05.106738      USB2 port 1: enabled 1

  751 01:49:05.109662      USB2 port 2: enabled 1

  752 01:49:05.109760      USB2 port 3: enabled 0

  753 01:49:05.113361      USB2 port 4: enabled 1

  754 01:49:05.116474      USB2 port 5: enabled 0

  755 01:49:05.120458      USB2 port 6: enabled 0

  756 01:49:05.123615      USB2 port 7: enabled 0

  757 01:49:05.126658      USB2 port 8: enabled 0

  758 01:49:05.126736      USB2 port 9: enabled 0

  759 01:49:05.129986      USB3 port 0: enabled 0

  760 01:49:05.132854      USB3 port 1: enabled 1

  761 01:49:05.136685      USB3 port 2: enabled 0

  762 01:49:05.139955      USB3 port 3: enabled 0

  763 01:49:05.142787    PCI: 00:14.1: enabled 0

  764 01:49:05.142902    PCI: 00:14.2: enabled 1

  765 01:49:05.146781    PCI: 00:14.3: enabled 1

  766 01:49:05.149585     GENERIC: 0.0: enabled 1

  767 01:49:05.153281    PCI: 00:15.0: enabled 1

  768 01:49:05.153366     I2C: 00:1a: enabled 1

  769 01:49:05.156520     I2C: 00:31: enabled 1

  770 01:49:05.159715     I2C: 00:32: enabled 1

  771 01:49:05.162926    PCI: 00:15.1: enabled 1

  772 01:49:05.166129     I2C: 00:10: enabled 1

  773 01:49:05.166227    PCI: 00:15.2: enabled 1

  774 01:49:05.169404    PCI: 00:15.3: enabled 1

  775 01:49:05.173001    PCI: 00:16.0: enabled 1

  776 01:49:05.175912    PCI: 00:16.1: enabled 0

  777 01:49:05.179468    PCI: 00:16.2: enabled 0

  778 01:49:05.179590    PCI: 00:16.3: enabled 0

  779 01:49:05.183292    PCI: 00:16.4: enabled 0

  780 01:49:05.186214    PCI: 00:16.5: enabled 0

  781 01:49:05.189604    PCI: 00:17.0: enabled 1

  782 01:49:05.192609    PCI: 00:19.0: enabled 0

  783 01:49:05.192686    PCI: 00:19.1: enabled 1

  784 01:49:05.195891     I2C: 00:15: enabled 1

  785 01:49:05.199213    PCI: 00:19.2: enabled 0

  786 01:49:05.202497    PCI: 00:1d.0: enabled 1

  787 01:49:05.205897     GENERIC: 0.0: enabled 1

  788 01:49:05.205986    PCI: 00:1e.0: enabled 1

  789 01:49:05.256089    PCI: 00:1e.1: enabled 0

  790 01:49:05.256246    PCI: 00:1e.2: enabled 1

  791 01:49:05.256510     SPI: 00: enabled 1

  792 01:49:05.256581    PCI: 00:1e.3: enabled 1

  793 01:49:05.256645     SPI: 00: enabled 1

  794 01:49:05.256707    PCI: 00:1f.0: enabled 1

  795 01:49:05.256777     PNP: 0c09.0: enabled 1

  796 01:49:05.256855    PCI: 00:1f.1: enabled 0

  797 01:49:05.256917    PCI: 00:1f.2: enabled 1

  798 01:49:05.257704     GENERIC: 0.0: enabled 1

  799 01:49:05.257818      GENERIC: 0.0: enabled 1

  800 01:49:05.257917      GENERIC: 1.0: enabled 1

  801 01:49:05.258197    PCI: 00:1f.3: enabled 1

  802 01:49:05.258270    PCI: 00:1f.4: enabled 0

  803 01:49:05.258332    PCI: 00:1f.5: enabled 1

  804 01:49:05.258392    PCI: 00:1f.6: enabled 0

  805 01:49:05.258463    PCI: 00:1f.7: enabled 0

  806 01:49:05.258526   CPU_CLUSTER: 0: enabled 1

  807 01:49:05.258585    APIC: 00: enabled 1

  808 01:49:05.261451    APIC: 01: enabled 1

  809 01:49:05.261538    APIC: 03: enabled 1

  810 01:49:05.264636    APIC: 06: enabled 1

  811 01:49:05.264723    APIC: 05: enabled 1

  812 01:49:05.268316    APIC: 04: enabled 1

  813 01:49:05.271755    APIC: 02: enabled 1

  814 01:49:05.271864    APIC: 07: enabled 1

  815 01:49:05.275185  Root Device scanning...

  816 01:49:05.278665  scan_static_bus for Root Device

  817 01:49:05.281763  DOMAIN: 0000 enabled

  818 01:49:05.285268  CPU_CLUSTER: 0 enabled

  819 01:49:05.285356  DOMAIN: 0000 scanning...

  820 01:49:05.288801  PCI: pci_scan_bus for bus 00

  821 01:49:05.292192  PCI: 00:00.0 [8086/0000] ops

  822 01:49:05.295463  PCI: 00:00.0 [8086/9a12] enabled

  823 01:49:05.298563  PCI: 00:02.0 [8086/0000] bus ops

  824 01:49:05.301841  PCI: 00:02.0 [8086/9a40] enabled

  825 01:49:05.305068  PCI: 00:04.0 [8086/0000] bus ops

  826 01:49:05.308487  PCI: 00:04.0 [8086/9a03] enabled

  827 01:49:05.311871  PCI: 00:05.0 [8086/9a19] enabled

  828 01:49:05.315039  PCI: 00:07.0 [0000/0000] hidden

  829 01:49:05.318333  PCI: 00:08.0 [8086/9a11] enabled

  830 01:49:05.321775  PCI: 00:0a.0 [8086/9a0d] disabled

  831 01:49:05.324841  PCI: 00:0d.0 [8086/0000] bus ops

  832 01:49:05.328466  PCI: 00:0d.0 [8086/9a13] enabled

  833 01:49:05.332248  PCI: 00:14.0 [8086/0000] bus ops

  834 01:49:05.335070  PCI: 00:14.0 [8086/a0ed] enabled

  835 01:49:05.338411  PCI: 00:14.2 [8086/a0ef] enabled

  836 01:49:05.341639  PCI: 00:14.3 [8086/0000] bus ops

  837 01:49:05.345233  PCI: 00:14.3 [8086/a0f0] enabled

  838 01:49:05.348595  PCI: 00:15.0 [8086/0000] bus ops

  839 01:49:05.351375  PCI: 00:15.0 [8086/a0e8] enabled

  840 01:49:05.355258  PCI: 00:15.1 [8086/0000] bus ops

  841 01:49:05.358138  PCI: 00:15.1 [8086/a0e9] enabled

  842 01:49:05.361698  PCI: 00:15.2 [8086/0000] bus ops

  843 01:49:05.364711  PCI: 00:15.2 [8086/a0ea] enabled

  844 01:49:05.368226  PCI: 00:15.3 [8086/0000] bus ops

  845 01:49:05.371856  PCI: 00:15.3 [8086/a0eb] enabled

  846 01:49:05.374774  PCI: 00:16.0 [8086/0000] ops

  847 01:49:05.378043  PCI: 00:16.0 [8086/a0e0] enabled

  848 01:49:05.385215  PCI: Static device PCI: 00:17.0 not found, disabling it.

  849 01:49:05.388435  PCI: 00:19.0 [8086/0000] bus ops

  850 01:49:05.391435  PCI: 00:19.0 [8086/a0c5] disabled

  851 01:49:05.395095  PCI: 00:19.1 [8086/0000] bus ops

  852 01:49:05.398346  PCI: 00:19.1 [8086/a0c6] enabled

  853 01:49:05.401386  PCI: 00:1d.0 [8086/0000] bus ops

  854 01:49:05.404785  PCI: 00:1d.0 [8086/a0b0] enabled

  855 01:49:05.408569  PCI: 00:1e.0 [8086/0000] ops

  856 01:49:05.411765  PCI: 00:1e.0 [8086/a0a8] enabled

  857 01:49:05.414700  PCI: 00:1e.2 [8086/0000] bus ops

  858 01:49:05.418423  PCI: 00:1e.2 [8086/a0aa] enabled

  859 01:49:05.421144  PCI: 00:1e.3 [8086/0000] bus ops

  860 01:49:05.424394  PCI: 00:1e.3 [8086/a0ab] enabled

  861 01:49:05.427901  PCI: 00:1f.0 [8086/0000] bus ops

  862 01:49:05.431218  PCI: 00:1f.0 [8086/a087] enabled

  863 01:49:05.431410  RTC Init

  864 01:49:05.438142  Set power on after power failure.

  865 01:49:05.438360  Disabling Deep S3

  866 01:49:05.440825  Disabling Deep S3

  867 01:49:05.440984  Disabling Deep S4

  868 01:49:05.444091  Disabling Deep S4

  869 01:49:05.444241  Disabling Deep S5

  870 01:49:05.447672  Disabling Deep S5

  871 01:49:05.450750  PCI: 00:1f.2 [0000/0000] hidden

  872 01:49:05.454456  PCI: 00:1f.3 [8086/0000] bus ops

  873 01:49:05.457419  PCI: 00:1f.3 [8086/a0c8] enabled

  874 01:49:05.460908  PCI: 00:1f.5 [8086/0000] bus ops

  875 01:49:05.464233  PCI: 00:1f.5 [8086/a0a4] enabled

  876 01:49:05.467520  PCI: Leftover static devices:

  877 01:49:05.467612  PCI: 00:10.2

  878 01:49:05.470471  PCI: 00:10.6

  879 01:49:05.470586  PCI: 00:10.7

  880 01:49:05.473728  PCI: 00:06.0

  881 01:49:05.473815  PCI: 00:07.1

  882 01:49:05.473883  PCI: 00:07.2

  883 01:49:05.477043  PCI: 00:07.3

  884 01:49:05.477132  PCI: 00:09.0

  885 01:49:05.480618  PCI: 00:0d.1

  886 01:49:05.480705  PCI: 00:0d.2

  887 01:49:05.480773  PCI: 00:0d.3

  888 01:49:05.484117  PCI: 00:0e.0

  889 01:49:05.484220  PCI: 00:12.0

  890 01:49:05.487340  PCI: 00:12.6

  891 01:49:05.487426  PCI: 00:13.0

  892 01:49:05.487494  PCI: 00:14.1

  893 01:49:05.490965  PCI: 00:16.1

  894 01:49:05.491054  PCI: 00:16.2

  895 01:49:05.493940  PCI: 00:16.3

  896 01:49:05.494062  PCI: 00:16.4

  897 01:49:05.497054  PCI: 00:16.5

  898 01:49:05.497144  PCI: 00:17.0

  899 01:49:05.497213  PCI: 00:19.2

  900 01:49:05.500740  PCI: 00:1e.1

  901 01:49:05.500826  PCI: 00:1f.1

  902 01:49:05.503670  PCI: 00:1f.4

  903 01:49:05.503760  PCI: 00:1f.6

  904 01:49:05.503828  PCI: 00:1f.7

  905 01:49:05.507229  PCI: Check your devicetree.cb.

  906 01:49:05.510328  PCI: 00:02.0 scanning...

  907 01:49:05.513886  scan_generic_bus for PCI: 00:02.0

  908 01:49:05.517243  scan_generic_bus for PCI: 00:02.0 done

  909 01:49:05.523463  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

  910 01:49:05.527218  PCI: 00:04.0 scanning...

  911 01:49:05.530136  scan_generic_bus for PCI: 00:04.0

  912 01:49:05.530224  GENERIC: 0.0 enabled

  913 01:49:05.537185  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

  914 01:49:05.543489  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

  915 01:49:05.543630  PCI: 00:0d.0 scanning...

  916 01:49:05.546775  scan_static_bus for PCI: 00:0d.0

  917 01:49:05.550157  USB0 port 0 enabled

  918 01:49:05.553290  USB0 port 0 scanning...

  919 01:49:05.556614  scan_static_bus for USB0 port 0

  920 01:49:05.560161  USB3 port 0 enabled

  921 01:49:05.560253  USB3 port 1 enabled

  922 01:49:05.563594  USB3 port 2 disabled

  923 01:49:05.563677  USB3 port 3 disabled

  924 01:49:05.566745  USB3 port 0 scanning...

  925 01:49:05.569693  scan_static_bus for USB3 port 0

  926 01:49:05.573117  scan_static_bus for USB3 port 0 done

  927 01:49:05.580061  scan_bus: bus USB3 port 0 finished in 6 msecs

  928 01:49:05.583189  USB3 port 1 scanning...

  929 01:49:05.586203  scan_static_bus for USB3 port 1

  930 01:49:05.589523  scan_static_bus for USB3 port 1 done

  931 01:49:05.593107  scan_bus: bus USB3 port 1 finished in 6 msecs

  932 01:49:05.596540  scan_static_bus for USB0 port 0 done

  933 01:49:05.603152  scan_bus: bus USB0 port 0 finished in 43 msecs

  934 01:49:05.606612  scan_static_bus for PCI: 00:0d.0 done

  935 01:49:05.609651  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs

  936 01:49:05.612763  PCI: 00:14.0 scanning...

  937 01:49:05.616703  scan_static_bus for PCI: 00:14.0

  938 01:49:05.619722  USB0 port 0 enabled

  939 01:49:05.619811  USB0 port 0 scanning...

  940 01:49:05.623518  scan_static_bus for USB0 port 0

  941 01:49:05.626063  USB2 port 0 disabled

  942 01:49:05.629390  USB2 port 1 enabled

  943 01:49:05.629479  USB2 port 2 enabled

  944 01:49:05.633032  USB2 port 3 disabled

  945 01:49:05.636321  USB2 port 4 enabled

  946 01:49:05.636401  USB2 port 5 disabled

  947 01:49:05.639723  USB2 port 6 disabled

  948 01:49:05.642944  USB2 port 7 disabled

  949 01:49:05.643037  USB2 port 8 disabled

  950 01:49:05.646239  USB2 port 9 disabled

  951 01:49:05.646342  USB3 port 0 disabled

  952 01:49:05.649671  USB3 port 1 enabled

  953 01:49:05.652630  USB3 port 2 disabled

  954 01:49:05.652717  USB3 port 3 disabled

  955 01:49:05.656014  USB2 port 1 scanning...

  956 01:49:05.659054  scan_static_bus for USB2 port 1

  957 01:49:05.662583  scan_static_bus for USB2 port 1 done

  958 01:49:05.669335  scan_bus: bus USB2 port 1 finished in 6 msecs

  959 01:49:05.669437  USB2 port 2 scanning...

  960 01:49:05.672566  scan_static_bus for USB2 port 2

  961 01:49:05.679341  scan_static_bus for USB2 port 2 done

  962 01:49:05.682979  scan_bus: bus USB2 port 2 finished in 6 msecs

  963 01:49:05.685755  USB2 port 4 scanning...

  964 01:49:05.689410  scan_static_bus for USB2 port 4

  965 01:49:05.692790  scan_static_bus for USB2 port 4 done

  966 01:49:05.695714  scan_bus: bus USB2 port 4 finished in 6 msecs

  967 01:49:05.699173  USB3 port 1 scanning...

  968 01:49:05.702352  scan_static_bus for USB3 port 1

  969 01:49:05.705316  scan_static_bus for USB3 port 1 done

  970 01:49:05.712111  scan_bus: bus USB3 port 1 finished in 6 msecs

  971 01:49:05.715922  scan_static_bus for USB0 port 0 done

  972 01:49:05.718558  scan_bus: bus USB0 port 0 finished in 93 msecs

  973 01:49:05.721919  scan_static_bus for PCI: 00:14.0 done

  974 01:49:05.728868  scan_bus: bus PCI: 00:14.0 finished in 110 msecs

  975 01:49:05.732348  PCI: 00:14.3 scanning...

  976 01:49:05.735500  scan_static_bus for PCI: 00:14.3

  977 01:49:05.735602  GENERIC: 0.0 enabled

  978 01:49:05.738691  scan_static_bus for PCI: 00:14.3 done

  979 01:49:05.745479  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

  980 01:49:05.748663  PCI: 00:15.0 scanning...

  981 01:49:05.751851  scan_static_bus for PCI: 00:15.0

  982 01:49:05.751996  I2C: 00:1a enabled

  983 01:49:05.755535  I2C: 00:31 enabled

  984 01:49:05.755654  I2C: 00:32 enabled

  985 01:49:05.761672  scan_static_bus for PCI: 00:15.0 done

  986 01:49:05.765109  scan_bus: bus PCI: 00:15.0 finished in 12 msecs

  987 01:49:05.768612  PCI: 00:15.1 scanning...

  988 01:49:05.771972  scan_static_bus for PCI: 00:15.1

  989 01:49:05.772110  I2C: 00:10 enabled

  990 01:49:05.778229  scan_static_bus for PCI: 00:15.1 done

  991 01:49:05.781823  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

  992 01:49:05.784925  PCI: 00:15.2 scanning...

  993 01:49:05.788094  scan_static_bus for PCI: 00:15.2

  994 01:49:05.791889  scan_static_bus for PCI: 00:15.2 done

  995 01:49:05.795408  scan_bus: bus PCI: 00:15.2 finished in 7 msecs

  996 01:49:05.799411  PCI: 00:15.3 scanning...

  997 01:49:05.802710  scan_static_bus for PCI: 00:15.3

  998 01:49:05.805821  scan_static_bus for PCI: 00:15.3 done

  999 01:49:05.812370  scan_bus: bus PCI: 00:15.3 finished in 7 msecs

 1000 01:49:05.812495  PCI: 00:19.1 scanning...

 1001 01:49:05.815766  scan_static_bus for PCI: 00:19.1

 1002 01:49:05.818897  I2C: 00:15 enabled

 1003 01:49:05.821759  scan_static_bus for PCI: 00:19.1 done

 1004 01:49:05.828765  scan_bus: bus PCI: 00:19.1 finished in 9 msecs

 1005 01:49:05.828936  PCI: 00:1d.0 scanning...

 1006 01:49:05.835492  do_pci_scan_bridge for PCI: 00:1d.0

 1007 01:49:05.835636  PCI: pci_scan_bus for bus 01

 1008 01:49:05.838482  PCI: 01:00.0 [1c5c/174a] enabled

 1009 01:49:05.842254  GENERIC: 0.0 enabled

 1010 01:49:05.845692  Enabling Common Clock Configuration

 1011 01:49:05.852399  L1 Sub-State supported from root port 29

 1012 01:49:05.852523  L1 Sub-State Support = 0xf

 1013 01:49:05.855424  CommonModeRestoreTime = 0x28

 1014 01:49:05.861872  Power On Value = 0x16, Power On Scale = 0x0

 1015 01:49:05.862002  ASPM: Enabled L1

 1016 01:49:05.865377  PCIe: Max_Payload_Size adjusted to 128

 1017 01:49:05.872093  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs

 1018 01:49:05.872250  PCI: 00:1e.2 scanning...

 1019 01:49:05.878950  scan_generic_bus for PCI: 00:1e.2

 1020 01:49:05.879130  SPI: 00 enabled

 1021 01:49:05.886087  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done

 1022 01:49:05.888917  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs

 1023 01:49:05.892483  PCI: 00:1e.3 scanning...

 1024 01:49:05.895484  scan_generic_bus for PCI: 00:1e.3

 1025 01:49:05.898641  SPI: 00 enabled

 1026 01:49:05.902051  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1027 01:49:05.908494  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1028 01:49:05.911936  PCI: 00:1f.0 scanning...

 1029 01:49:05.915642  scan_static_bus for PCI: 00:1f.0

 1030 01:49:05.915758  PNP: 0c09.0 enabled

 1031 01:49:05.918925  PNP: 0c09.0 scanning...

 1032 01:49:05.921850  scan_static_bus for PNP: 0c09.0

 1033 01:49:05.925104  scan_static_bus for PNP: 0c09.0 done

 1034 01:49:05.932115  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1035 01:49:05.935242  scan_static_bus for PCI: 00:1f.0 done

 1036 01:49:05.938677  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1037 01:49:05.941738  PCI: 00:1f.2 scanning...

 1038 01:49:05.945200  scan_static_bus for PCI: 00:1f.2

 1039 01:49:05.948281  GENERIC: 0.0 enabled

 1040 01:49:05.952006  GENERIC: 0.0 scanning...

 1041 01:49:05.955073  scan_static_bus for GENERIC: 0.0

 1042 01:49:05.955228  GENERIC: 0.0 enabled

 1043 01:49:05.958302  GENERIC: 1.0 enabled

 1044 01:49:05.961764  scan_static_bus for GENERIC: 0.0 done

 1045 01:49:05.968663  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1046 01:49:05.971550  scan_static_bus for PCI: 00:1f.2 done

 1047 01:49:05.974666  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1048 01:49:05.978411  PCI: 00:1f.3 scanning...

 1049 01:49:05.981942  scan_static_bus for PCI: 00:1f.3

 1050 01:49:05.984901  scan_static_bus for PCI: 00:1f.3 done

 1051 01:49:05.991540  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1052 01:49:05.991671  PCI: 00:1f.5 scanning...

 1053 01:49:05.994608  scan_generic_bus for PCI: 00:1f.5

 1054 01:49:06.001153  scan_generic_bus for PCI: 00:1f.5 done

 1055 01:49:06.004950  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1056 01:49:06.007832  scan_bus: bus DOMAIN: 0000 finished in 717 msecs

 1057 01:49:06.014738  scan_static_bus for Root Device done

 1058 01:49:06.017729  scan_bus: bus Root Device finished in 737 msecs

 1059 01:49:06.017893  done

 1060 01:49:06.024814  BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms

 1061 01:49:06.027630  Chrome EC: UHEPI supported

 1062 01:49:06.034558  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)

 1063 01:49:06.041056  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1064 01:49:06.044363  SPI flash protection: WPSW=1 SRP0=0

 1065 01:49:06.048020  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1066 01:49:06.054433  BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms

 1067 01:49:06.057364  found VGA at PCI: 00:02.0

 1068 01:49:06.060744  Setting up VGA for PCI: 00:02.0

 1069 01:49:06.064286  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1070 01:49:06.070858  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1071 01:49:06.073981  Allocating resources...

 1072 01:49:06.074126  Reading resources...

 1073 01:49:06.080934  Root Device read_resources bus 0 link: 0

 1074 01:49:06.084037  DOMAIN: 0000 read_resources bus 0 link: 0

 1075 01:49:06.087100  PCI: 00:04.0 read_resources bus 1 link: 0

 1076 01:49:06.094056  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1077 01:49:06.097745  PCI: 00:0d.0 read_resources bus 0 link: 0

 1078 01:49:06.104660  USB0 port 0 read_resources bus 0 link: 0

 1079 01:49:06.107833  USB0 port 0 read_resources bus 0 link: 0 done

 1080 01:49:06.113872  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1081 01:49:06.117331  PCI: 00:14.0 read_resources bus 0 link: 0

 1082 01:49:06.123894  USB0 port 0 read_resources bus 0 link: 0

 1083 01:49:06.127340  USB0 port 0 read_resources bus 0 link: 0 done

 1084 01:49:06.133747  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1085 01:49:06.137119  PCI: 00:14.3 read_resources bus 0 link: 0

 1086 01:49:06.143587  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1087 01:49:06.147165  PCI: 00:15.0 read_resources bus 0 link: 0

 1088 01:49:06.154004  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1089 01:49:06.157064  PCI: 00:15.1 read_resources bus 0 link: 0

 1090 01:49:06.163651  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1091 01:49:06.166840  PCI: 00:19.1 read_resources bus 0 link: 0

 1092 01:49:06.173757  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1093 01:49:06.177468  PCI: 00:1d.0 read_resources bus 1 link: 0

 1094 01:49:06.183747  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1095 01:49:06.187006  PCI: 00:1e.2 read_resources bus 2 link: 0

 1096 01:49:06.193803  PCI: 00:1e.2 read_resources bus 2 link: 0 done

 1097 01:49:06.197557  PCI: 00:1e.3 read_resources bus 3 link: 0

 1098 01:49:06.203743  PCI: 00:1e.3 read_resources bus 3 link: 0 done

 1099 01:49:06.207285  PCI: 00:1f.0 read_resources bus 0 link: 0

 1100 01:49:06.213670  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1101 01:49:06.217133  PCI: 00:1f.2 read_resources bus 0 link: 0

 1102 01:49:06.220150  GENERIC: 0.0 read_resources bus 0 link: 0

 1103 01:49:06.227207  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1104 01:49:06.230778  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1105 01:49:06.237912  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1106 01:49:06.241175  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1107 01:49:06.248020  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1108 01:49:06.251572  Root Device read_resources bus 0 link: 0 done

 1109 01:49:06.254490  Done reading resources.

 1110 01:49:06.261198  Show resources in subtree (Root Device)...After reading.

 1111 01:49:06.264866   Root Device child on link 0 DOMAIN: 0000

 1112 01:49:06.267620    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1113 01:49:06.277866    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1114 01:49:06.287637    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1115 01:49:06.290985     PCI: 00:00.0

 1116 01:49:06.301065     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1117 01:49:06.307496     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1118 01:49:06.317969     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1119 01:49:06.327701     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1120 01:49:06.338277     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1121 01:49:06.347359     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1122 01:49:06.357358     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1123 01:49:06.364192     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1124 01:49:06.373705     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1125 01:49:06.383574     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1126 01:49:06.393907     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1127 01:49:06.403712     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1128 01:49:06.413846     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1129 01:49:06.420190     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1130 01:49:06.430373     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1131 01:49:06.440649     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1132 01:49:06.449895     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1133 01:49:06.460083     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1134 01:49:06.469940     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1135 01:49:06.476612     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1136 01:49:06.479897     PCI: 00:02.0

 1137 01:49:06.490313     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1138 01:49:06.500064     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1139 01:49:06.509568     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1140 01:49:06.513241     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1141 01:49:06.523029     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1142 01:49:06.526489      GENERIC: 0.0

 1143 01:49:06.526622     PCI: 00:05.0

 1144 01:49:06.536157     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1145 01:49:06.542663     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1146 01:49:06.542752      GENERIC: 0.0

 1147 01:49:06.546165     PCI: 00:08.0

 1148 01:49:06.556293     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1149 01:49:06.556461     PCI: 00:0a.0

 1150 01:49:06.559445     PCI: 00:0d.0 child on link 0 USB0 port 0

 1151 01:49:06.569824     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1152 01:49:06.576301      USB0 port 0 child on link 0 USB3 port 0

 1153 01:49:06.576392       USB3 port 0

 1154 01:49:06.579409       USB3 port 1

 1155 01:49:06.579494       USB3 port 2

 1156 01:49:06.582754       USB3 port 3

 1157 01:49:06.586286     PCI: 00:14.0 child on link 0 USB0 port 0

 1158 01:49:06.595903     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1159 01:49:06.602877      USB0 port 0 child on link 0 USB2 port 0

 1160 01:49:06.602963       USB2 port 0

 1161 01:49:06.605915       USB2 port 1

 1162 01:49:06.606003       USB2 port 2

 1163 01:49:06.609063       USB2 port 3

 1164 01:49:06.609165       USB2 port 4

 1165 01:49:06.612664       USB2 port 5

 1166 01:49:06.612791       USB2 port 6

 1167 01:49:06.616031       USB2 port 7

 1168 01:49:06.616115       USB2 port 8

 1169 01:49:06.619511       USB2 port 9

 1170 01:49:06.619594       USB3 port 0

 1171 01:49:06.623242       USB3 port 1

 1172 01:49:06.625944       USB3 port 2

 1173 01:49:06.626030       USB3 port 3

 1174 01:49:06.629081     PCI: 00:14.2

 1175 01:49:06.639840     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1176 01:49:06.649348     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1177 01:49:06.652271     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1178 01:49:06.662283     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1179 01:49:06.662376      GENERIC: 0.0

 1180 01:49:06.668736     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1181 01:49:06.679115     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1182 01:49:06.679207      I2C: 00:1a

 1183 01:49:06.682381      I2C: 00:31

 1184 01:49:06.682466      I2C: 00:32

 1185 01:49:06.685637     PCI: 00:15.1 child on link 0 I2C: 00:10

 1186 01:49:06.695734     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1187 01:49:06.698643      I2C: 00:10

 1188 01:49:06.698772     PCI: 00:15.2

 1189 01:49:06.708953     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1190 01:49:06.712268     PCI: 00:15.3

 1191 01:49:06.722067     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1192 01:49:06.722165     PCI: 00:16.0

 1193 01:49:06.732005     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1194 01:49:06.735147     PCI: 00:19.0

 1195 01:49:06.738333     PCI: 00:19.1 child on link 0 I2C: 00:15

 1196 01:49:06.748114     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1197 01:49:06.751995      I2C: 00:15

 1198 01:49:06.755112     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1199 01:49:06.765109     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1200 01:49:06.775147     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1201 01:49:06.781488     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1202 01:49:06.784711      GENERIC: 0.0

 1203 01:49:06.788338      PCI: 01:00.0

 1204 01:49:06.798484      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1205 01:49:06.804895      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18

 1206 01:49:06.814928      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c

 1207 01:49:06.817768     PCI: 00:1e.0

 1208 01:49:06.827753     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1209 01:49:06.831550     PCI: 00:1e.2 child on link 0 SPI: 00

 1210 01:49:06.841148     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1211 01:49:06.845173      SPI: 00

 1212 01:49:06.847709     PCI: 00:1e.3 child on link 0 SPI: 00

 1213 01:49:06.857662     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1214 01:49:06.857759      SPI: 00

 1215 01:49:06.864323     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1216 01:49:06.870645     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1217 01:49:06.874548      PNP: 0c09.0

 1218 01:49:06.880998      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1219 01:49:06.888032     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1220 01:49:06.897628     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1221 01:49:06.904244     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1222 01:49:06.910909      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1223 01:49:06.911010       GENERIC: 0.0

 1224 01:49:06.914085       GENERIC: 1.0

 1225 01:49:06.914170     PCI: 00:1f.3

 1226 01:49:06.923994     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1227 01:49:06.933892     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1228 01:49:06.937281     PCI: 00:1f.5

 1229 01:49:06.947395     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1230 01:49:06.950659    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1231 01:49:06.950812     APIC: 00

 1232 01:49:06.953932     APIC: 01

 1233 01:49:06.954019     APIC: 03

 1234 01:49:06.954086     APIC: 06

 1235 01:49:06.956898     APIC: 05

 1236 01:49:06.957032     APIC: 04

 1237 01:49:06.960392     APIC: 02

 1238 01:49:06.960505     APIC: 07

 1239 01:49:06.967360  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1240 01:49:06.973538   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1241 01:49:06.980271   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1242 01:49:06.987072   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1243 01:49:06.990345    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1244 01:49:06.993604    PCI: 01:00.0 18 *  [0x4000 - 0x4fff] mem

 1245 01:49:07.000581    PCI: 01:00.0 1c *  [0x5000 - 0x5fff] mem

 1246 01:49:07.007025   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1247 01:49:07.013650   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1248 01:49:07.020395   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1249 01:49:07.026578  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1250 01:49:07.033386  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1251 01:49:07.042960   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1252 01:49:07.049715   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1253 01:49:07.056699   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1254 01:49:07.059826   DOMAIN: 0000: Resource ranges:

 1255 01:49:07.063492   * Base: 1000, Size: 800, Tag: 100

 1256 01:49:07.066147   * Base: 1900, Size: e700, Tag: 100

 1257 01:49:07.073175    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1258 01:49:07.079421  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1259 01:49:07.086197  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1260 01:49:07.092967   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)

 1261 01:49:07.102712   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)

 1262 01:49:07.109745   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)

 1263 01:49:07.116071   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)

 1264 01:49:07.125945   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)

 1265 01:49:07.132878   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)

 1266 01:49:07.139591   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)

 1267 01:49:07.149138   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)

 1268 01:49:07.155907   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)

 1269 01:49:07.162465   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)

 1270 01:49:07.172617   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)

 1271 01:49:07.178988   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)

 1272 01:49:07.185602   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)

 1273 01:49:07.195300   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)

 1274 01:49:07.202010   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)

 1275 01:49:07.208803   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)

 1276 01:49:07.218629   update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)

 1277 01:49:07.225112   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)

 1278 01:49:07.231836   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)

 1279 01:49:07.241948   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)

 1280 01:49:07.248680   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1281 01:49:07.254959   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1282 01:49:07.258473   DOMAIN: 0000: Resource ranges:

 1283 01:49:07.264889   * Base: 7fc00000, Size: 40400000, Tag: 200

 1284 01:49:07.268211   * Base: d0000000, Size: 28000000, Tag: 200

 1285 01:49:07.271668   * Base: fa000000, Size: 1000000, Tag: 200

 1286 01:49:07.274692   * Base: fb001000, Size: 2fff000, Tag: 200

 1287 01:49:07.281860   * Base: fe010000, Size: 2e000, Tag: 200

 1288 01:49:07.285154   * Base: fe03f000, Size: d41000, Tag: 200

 1289 01:49:07.287952   * Base: fed88000, Size: 8000, Tag: 200

 1290 01:49:07.291785   * Base: fed93000, Size: d000, Tag: 200

 1291 01:49:07.298142   * Base: feda2000, Size: 1e000, Tag: 200

 1292 01:49:07.301576   * Base: fede0000, Size: 1220000, Tag: 200

 1293 01:49:07.305076   * Base: 280400000, Size: 7d7fc00000, Tag: 100200

 1294 01:49:07.314624    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem

 1295 01:49:07.321018    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem

 1296 01:49:07.327924    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem

 1297 01:49:07.334193    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem

 1298 01:49:07.341239    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem

 1299 01:49:07.347797    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem

 1300 01:49:07.354422    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem

 1301 01:49:07.361473    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem

 1302 01:49:07.367723    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem

 1303 01:49:07.374020    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem

 1304 01:49:07.380603    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem

 1305 01:49:07.387498    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem

 1306 01:49:07.393718    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem

 1307 01:49:07.400375    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem

 1308 01:49:07.407100    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem

 1309 01:49:07.413605    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem

 1310 01:49:07.420417    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem

 1311 01:49:07.427338    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem

 1312 01:49:07.433507    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem

 1313 01:49:07.440441    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem

 1314 01:49:07.446774    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem

 1315 01:49:07.453350    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem

 1316 01:49:07.460113  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1317 01:49:07.467182  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff

 1318 01:49:07.470259   PCI: 00:1d.0: Resource ranges:

 1319 01:49:07.476451   * Base: 7fc00000, Size: 100000, Tag: 200

 1320 01:49:07.483179    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem

 1321 01:49:07.489633    PCI: 01:00.0 18 *  [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem

 1322 01:49:07.496805    PCI: 01:00.0 1c *  [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem

 1323 01:49:07.502916  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done

 1324 01:49:07.509681  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1325 01:49:07.516451  Root Device assign_resources, bus 0 link: 0

 1326 01:49:07.519703  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1327 01:49:07.529886  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64

 1328 01:49:07.536498  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64

 1329 01:49:07.542911  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1330 01:49:07.552872  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64

 1331 01:49:07.556132  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1332 01:49:07.563029  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1333 01:49:07.569318  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64

 1334 01:49:07.579178  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64

 1335 01:49:07.585906  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64

 1336 01:49:07.592617  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1337 01:49:07.595883  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1338 01:49:07.602479  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64

 1339 01:49:07.608716  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1340 01:49:07.612255  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1341 01:49:07.622132  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64

 1342 01:49:07.628790  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64

 1343 01:49:07.638891  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64

 1344 01:49:07.642120  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1345 01:49:07.645725  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1346 01:49:07.655457  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64

 1347 01:49:07.659012  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1348 01:49:07.665233  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1349 01:49:07.672259  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64

 1350 01:49:07.678604  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1351 01:49:07.681663  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1352 01:49:07.691569  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64

 1353 01:49:07.698102  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64

 1354 01:49:07.708043  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64

 1355 01:49:07.714890  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64

 1356 01:49:07.718192  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1357 01:49:07.725150  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1358 01:49:07.731218  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1359 01:49:07.741348  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1360 01:49:07.751230  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem

 1361 01:49:07.754454  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1362 01:49:07.764668  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64

 1363 01:49:07.770600  PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem

 1364 01:49:07.781056  PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem

 1365 01:49:07.784338  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1366 01:49:07.794291  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64

 1367 01:49:07.797561  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1368 01:49:07.800795  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1369 01:49:07.810790  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64

 1370 01:49:07.813887  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1371 01:49:07.820469  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1372 01:49:07.824093  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1373 01:49:07.830371  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1374 01:49:07.833789  LPC: Trying to open IO window from 800 size 1ff

 1375 01:49:07.843971  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64

 1376 01:49:07.850201  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64

 1377 01:49:07.856844  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem

 1378 01:49:07.863712  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1379 01:49:07.867110  Root Device assign_resources, bus 0 link: 0

 1380 01:49:07.870335  Done setting resources.

 1381 01:49:07.877055  Show resources in subtree (Root Device)...After assigning values.

 1382 01:49:07.880450   Root Device child on link 0 DOMAIN: 0000

 1383 01:49:07.886738    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1384 01:49:07.893466    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1385 01:49:07.903395    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1386 01:49:07.906756     PCI: 00:00.0

 1387 01:49:07.916889     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1388 01:49:07.926458     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1389 01:49:07.936095     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1390 01:49:07.943264     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1391 01:49:07.952950     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1392 01:49:07.963324     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1393 01:49:07.972997     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1394 01:49:07.982900     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1395 01:49:07.992647     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1396 01:49:07.999341     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1397 01:49:08.008928     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1398 01:49:08.019278     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1399 01:49:08.029007     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1400 01:49:08.039070     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1401 01:49:08.045522     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1402 01:49:08.055678     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1403 01:49:08.065895     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1404 01:49:08.075102     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1405 01:49:08.084870     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1406 01:49:08.094879     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1407 01:49:08.095002     PCI: 00:02.0

 1408 01:49:08.108316     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10

 1409 01:49:08.118273     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18

 1410 01:49:08.128318     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1411 01:49:08.131186     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1412 01:49:08.140849     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10

 1413 01:49:08.144396      GENERIC: 0.0

 1414 01:49:08.144482     PCI: 00:05.0

 1415 01:49:08.154208     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10

 1416 01:49:08.160737     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1417 01:49:08.160859      GENERIC: 0.0

 1418 01:49:08.164491     PCI: 00:08.0

 1419 01:49:08.173896     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10

 1420 01:49:08.174014     PCI: 00:0a.0

 1421 01:49:08.180714     PCI: 00:0d.0 child on link 0 USB0 port 0

 1422 01:49:08.190725     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10

 1423 01:49:08.193920      USB0 port 0 child on link 0 USB3 port 0

 1424 01:49:08.197397       USB3 port 0

 1425 01:49:08.197507       USB3 port 1

 1426 01:49:08.200485       USB3 port 2

 1427 01:49:08.200595       USB3 port 3

 1428 01:49:08.207132     PCI: 00:14.0 child on link 0 USB0 port 0

 1429 01:49:08.216897     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10

 1430 01:49:08.220865      USB0 port 0 child on link 0 USB2 port 0

 1431 01:49:08.224083       USB2 port 0

 1432 01:49:08.224191       USB2 port 1

 1433 01:49:08.226727       USB2 port 2

 1434 01:49:08.226872       USB2 port 3

 1435 01:49:08.230175       USB2 port 4

 1436 01:49:08.230283       USB2 port 5

 1437 01:49:08.233729       USB2 port 6

 1438 01:49:08.236595       USB2 port 7

 1439 01:49:08.236707       USB2 port 8

 1440 01:49:08.239990       USB2 port 9

 1441 01:49:08.240101       USB3 port 0

 1442 01:49:08.243332       USB3 port 1

 1443 01:49:08.243442       USB3 port 2

 1444 01:49:08.246920       USB3 port 3

 1445 01:49:08.247033     PCI: 00:14.2

 1446 01:49:08.257157     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10

 1447 01:49:08.270094     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18

 1448 01:49:08.273634     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1449 01:49:08.283320     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10

 1450 01:49:08.286910      GENERIC: 0.0

 1451 01:49:08.289925     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1452 01:49:08.300153     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10

 1453 01:49:08.300270      I2C: 00:1a

 1454 01:49:08.302727      I2C: 00:31

 1455 01:49:08.302873      I2C: 00:32

 1456 01:49:08.310038     PCI: 00:15.1 child on link 0 I2C: 00:10

 1457 01:49:08.319566     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10

 1458 01:49:08.319690      I2C: 00:10

 1459 01:49:08.322771     PCI: 00:15.2

 1460 01:49:08.332935     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10

 1461 01:49:08.333054     PCI: 00:15.3

 1462 01:49:08.346010     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10

 1463 01:49:08.346131     PCI: 00:16.0

 1464 01:49:08.356166     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10

 1465 01:49:08.359608     PCI: 00:19.0

 1466 01:49:08.362487     PCI: 00:19.1 child on link 0 I2C: 00:15

 1467 01:49:08.372473     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10

 1468 01:49:08.375902      I2C: 00:15

 1469 01:49:08.378955     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1470 01:49:08.388832     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1471 01:49:08.398733     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1472 01:49:08.408863     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20

 1473 01:49:08.412488      GENERIC: 0.0

 1474 01:49:08.415748      PCI: 01:00.0

 1475 01:49:08.425565      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10

 1476 01:49:08.435175      PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18

 1477 01:49:08.445055      PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c

 1478 01:49:08.448074     PCI: 00:1e.0

 1479 01:49:08.458477     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1480 01:49:08.461540     PCI: 00:1e.2 child on link 0 SPI: 00

 1481 01:49:08.471690     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10

 1482 01:49:08.475299      SPI: 00

 1483 01:49:08.478046     PCI: 00:1e.3 child on link 0 SPI: 00

 1484 01:49:08.488505     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10

 1485 01:49:08.488628      SPI: 00

 1486 01:49:08.494534     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1487 01:49:08.501136     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1488 01:49:08.504710      PNP: 0c09.0

 1489 01:49:08.511968      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1490 01:49:08.518246     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1491 01:49:08.528014     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1492 01:49:08.537413     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1493 01:49:08.541000      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1494 01:49:08.541114       GENERIC: 0.0

 1495 01:49:08.543879       GENERIC: 1.0

 1496 01:49:08.547539     PCI: 00:1f.3

 1497 01:49:08.557301     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10

 1498 01:49:08.567614     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20

 1499 01:49:08.567729     PCI: 00:1f.5

 1500 01:49:08.577493     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10

 1501 01:49:08.583920    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1502 01:49:08.584037     APIC: 00

 1503 01:49:08.584137     APIC: 01

 1504 01:49:08.587060     APIC: 03

 1505 01:49:08.587171     APIC: 06

 1506 01:49:08.590240     APIC: 05

 1507 01:49:08.590349     APIC: 04

 1508 01:49:08.590444     APIC: 02

 1509 01:49:08.593926     APIC: 07

 1510 01:49:08.597007  Done allocating resources.

 1511 01:49:08.603748  BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms

 1512 01:49:08.607011  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

 1513 01:49:08.609981  Configure GPIOs for I2S audio on UP4.

 1514 01:49:08.618384  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms

 1515 01:49:08.621837  Enabling resources...

 1516 01:49:08.624977  PCI: 00:00.0 subsystem <- 8086/9a12

 1517 01:49:08.628243  PCI: 00:00.0 cmd <- 06

 1518 01:49:08.631525  PCI: 00:02.0 subsystem <- 8086/9a40

 1519 01:49:08.634962  PCI: 00:02.0 cmd <- 03

 1520 01:49:08.638144  PCI: 00:04.0 subsystem <- 8086/9a03

 1521 01:49:08.641074  PCI: 00:04.0 cmd <- 02

 1522 01:49:08.644518  PCI: 00:05.0 subsystem <- 8086/9a19

 1523 01:49:08.644627  PCI: 00:05.0 cmd <- 02

 1524 01:49:08.651152  PCI: 00:08.0 subsystem <- 8086/9a11

 1525 01:49:08.651267  PCI: 00:08.0 cmd <- 06

 1526 01:49:08.654646  PCI: 00:0d.0 subsystem <- 8086/9a13

 1527 01:49:08.657889  PCI: 00:0d.0 cmd <- 02

 1528 01:49:08.661455  PCI: 00:14.0 subsystem <- 8086/a0ed

 1529 01:49:08.664744  PCI: 00:14.0 cmd <- 02

 1530 01:49:08.667933  PCI: 00:14.2 subsystem <- 8086/a0ef

 1531 01:49:08.671042  PCI: 00:14.2 cmd <- 02

 1532 01:49:08.674341  PCI: 00:14.3 subsystem <- 8086/a0f0

 1533 01:49:08.677493  PCI: 00:14.3 cmd <- 02

 1534 01:49:08.681185  PCI: 00:15.0 subsystem <- 8086/a0e8

 1535 01:49:08.684635  PCI: 00:15.0 cmd <- 02

 1536 01:49:08.688009  PCI: 00:15.1 subsystem <- 8086/a0e9

 1537 01:49:08.690654  PCI: 00:15.1 cmd <- 02

 1538 01:49:08.694024  PCI: 00:15.2 subsystem <- 8086/a0ea

 1539 01:49:08.694136  PCI: 00:15.2 cmd <- 02

 1540 01:49:08.701122  PCI: 00:15.3 subsystem <- 8086/a0eb

 1541 01:49:08.701240  PCI: 00:15.3 cmd <- 02

 1542 01:49:08.704313  PCI: 00:16.0 subsystem <- 8086/a0e0

 1543 01:49:08.707520  PCI: 00:16.0 cmd <- 02

 1544 01:49:08.711006  PCI: 00:19.1 subsystem <- 8086/a0c6

 1545 01:49:08.713969  PCI: 00:19.1 cmd <- 02

 1546 01:49:08.717343  PCI: 00:1d.0 bridge ctrl <- 0013

 1547 01:49:08.720744  PCI: 00:1d.0 subsystem <- 8086/a0b0

 1548 01:49:08.724348  PCI: 00:1d.0 cmd <- 06

 1549 01:49:08.727736  PCI: 00:1e.0 subsystem <- 8086/a0a8

 1550 01:49:08.731351  PCI: 00:1e.0 cmd <- 06

 1551 01:49:08.734323  PCI: 00:1e.2 subsystem <- 8086/a0aa

 1552 01:49:08.737183  PCI: 00:1e.2 cmd <- 06

 1553 01:49:08.740900  PCI: 00:1e.3 subsystem <- 8086/a0ab

 1554 01:49:08.743975  PCI: 00:1e.3 cmd <- 02

 1555 01:49:08.747388  PCI: 00:1f.0 subsystem <- 8086/a087

 1556 01:49:08.747487  PCI: 00:1f.0 cmd <- 407

 1557 01:49:08.754401  PCI: 00:1f.3 subsystem <- 8086/a0c8

 1558 01:49:08.754485  PCI: 00:1f.3 cmd <- 02

 1559 01:49:08.757532  PCI: 00:1f.5 subsystem <- 8086/a0a4

 1560 01:49:08.760759  PCI: 00:1f.5 cmd <- 406

 1561 01:49:08.765546  PCI: 01:00.0 cmd <- 02

 1562 01:49:08.770415  done.

 1563 01:49:08.773226  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms

 1564 01:49:08.777203  Initializing devices...

 1565 01:49:08.780127  Root Device init

 1566 01:49:08.783263  Chrome EC: Set SMI mask to 0x0000000000000000

 1567 01:49:08.790027  Chrome EC: clear events_b mask to 0x0000000000000000

 1568 01:49:08.796532  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1569 01:49:08.803281  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e

 1570 01:49:08.809706  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e

 1571 01:49:08.812855  Chrome EC: Set WAKE mask to 0x0000000000000000

 1572 01:49:08.820538  fw_config match found: DB_USB=USB3_ACTIVE

 1573 01:49:08.824251  Configure Right Type-C port orientation for retimer

 1574 01:49:08.827494  Root Device init finished in 45 msecs

 1575 01:49:08.831666  PCI: 00:00.0 init

 1576 01:49:08.834716  CPU TDP = 9 Watts

 1577 01:49:08.834826  CPU PL1 = 9 Watts

 1578 01:49:08.838303  CPU PL2 = 40 Watts

 1579 01:49:08.841846  CPU PL4 = 83 Watts

 1580 01:49:08.845114  PCI: 00:00.0 init finished in 8 msecs

 1581 01:49:08.845198  PCI: 00:02.0 init

 1582 01:49:08.847862  GMA: Found VBT in CBFS

 1583 01:49:08.851475  GMA: Found valid VBT in CBFS

 1584 01:49:08.857987  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1585 01:49:08.864743                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000

 1586 01:49:08.867812  PCI: 00:02.0 init finished in 18 msecs

 1587 01:49:08.871615  PCI: 00:05.0 init

 1588 01:49:08.874665  PCI: 00:05.0 init finished in 0 msecs

 1589 01:49:08.877839  PCI: 00:08.0 init

 1590 01:49:08.881326  PCI: 00:08.0 init finished in 0 msecs

 1591 01:49:08.884506  PCI: 00:14.0 init

 1592 01:49:08.888333  PCI: 00:14.0 init finished in 0 msecs

 1593 01:49:08.890756  PCI: 00:14.2 init

 1594 01:49:08.894351  PCI: 00:14.2 init finished in 0 msecs

 1595 01:49:08.898040  PCI: 00:15.0 init

 1596 01:49:08.900805  I2C bus 0 version 0x3230302a

 1597 01:49:08.904284  DW I2C bus 0 at 0x7fe4e000 (400 KHz)

 1598 01:49:08.907486  PCI: 00:15.0 init finished in 6 msecs

 1599 01:49:08.907591  PCI: 00:15.1 init

 1600 01:49:08.910942  I2C bus 1 version 0x3230302a

 1601 01:49:08.913851  DW I2C bus 1 at 0x7fe4f000 (400 KHz)

 1602 01:49:08.921116  PCI: 00:15.1 init finished in 6 msecs

 1603 01:49:08.921232  PCI: 00:15.2 init

 1604 01:49:08.924494  I2C bus 2 version 0x3230302a

 1605 01:49:08.927366  DW I2C bus 2 at 0x7fe50000 (400 KHz)

 1606 01:49:08.930642  PCI: 00:15.2 init finished in 6 msecs

 1607 01:49:08.934472  PCI: 00:15.3 init

 1608 01:49:08.937472  I2C bus 3 version 0x3230302a

 1609 01:49:08.940685  DW I2C bus 3 at 0x7fe51000 (400 KHz)

 1610 01:49:08.944813  PCI: 00:15.3 init finished in 6 msecs

 1611 01:49:08.947822  PCI: 00:16.0 init

 1612 01:49:08.951049  PCI: 00:16.0 init finished in 0 msecs

 1613 01:49:08.954270  PCI: 00:19.1 init

 1614 01:49:08.957501  I2C bus 5 version 0x3230302a

 1615 01:49:08.960702  DW I2C bus 5 at 0x7fe53000 (400 KHz)

 1616 01:49:08.963786  PCI: 00:19.1 init finished in 6 msecs

 1617 01:49:08.967804  PCI: 00:1d.0 init

 1618 01:49:08.967902  Initializing PCH PCIe bridge.

 1619 01:49:08.974246  PCI: 00:1d.0 init finished in 3 msecs

 1620 01:49:08.977186  PCI: 00:1f.0 init

 1621 01:49:08.981145  IOAPIC: Initializing IOAPIC at 0xfec00000

 1622 01:49:08.984073  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1623 01:49:08.986993  IOAPIC: ID = 0x02

 1624 01:49:08.990473  IOAPIC: Dumping registers

 1625 01:49:08.990586    reg 0x0000: 0x02000000

 1626 01:49:08.993801    reg 0x0001: 0x00770020

 1627 01:49:08.996920    reg 0x0002: 0x00000000

 1628 01:49:09.000685  PCI: 00:1f.0 init finished in 21 msecs

 1629 01:49:09.003894  PCI: 00:1f.2 init

 1630 01:49:09.007336  Disabling ACPI via APMC.

 1631 01:49:09.007431  APMC done.

 1632 01:49:09.013592  PCI: 00:1f.2 init finished in 5 msecs

 1633 01:49:09.024426  PCI: 01:00.0 init

 1634 01:49:09.027790  PCI: 01:00.0 init finished in 0 msecs

 1635 01:49:09.031036  PNP: 0c09.0 init

 1636 01:49:09.034474  Google Chrome EC uptime: 8.353 seconds

 1637 01:49:09.040988  Google Chrome AP resets since EC boot: 1

 1638 01:49:09.044423  Google Chrome most recent AP reset causes:

 1639 01:49:09.047451  	0.346: 32775 shutdown: entering G3

 1640 01:49:09.054155  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

 1641 01:49:09.057346  PNP: 0c09.0 init finished in 22 msecs

 1642 01:49:09.063161  Devices initialized

 1643 01:49:09.066268  Show all devs... After init.

 1644 01:49:09.069652  Root Device: enabled 1

 1645 01:49:09.069739  DOMAIN: 0000: enabled 1

 1646 01:49:09.073323  CPU_CLUSTER: 0: enabled 1

 1647 01:49:09.076391  PCI: 00:00.0: enabled 1

 1648 01:49:09.079838  PCI: 00:02.0: enabled 1

 1649 01:49:09.079938  PCI: 00:04.0: enabled 1

 1650 01:49:09.083211  PCI: 00:05.0: enabled 1

 1651 01:49:09.086493  PCI: 00:06.0: enabled 0

 1652 01:49:09.089592  PCI: 00:07.0: enabled 0

 1653 01:49:09.089705  PCI: 00:07.1: enabled 0

 1654 01:49:09.093184  PCI: 00:07.2: enabled 0

 1655 01:49:09.096219  PCI: 00:07.3: enabled 0

 1656 01:49:09.099423  PCI: 00:08.0: enabled 1

 1657 01:49:09.099511  PCI: 00:09.0: enabled 0

 1658 01:49:09.103227  PCI: 00:0a.0: enabled 0

 1659 01:49:09.106405  PCI: 00:0d.0: enabled 1

 1660 01:49:09.109395  PCI: 00:0d.1: enabled 0

 1661 01:49:09.109483  PCI: 00:0d.2: enabled 0

 1662 01:49:09.112970  PCI: 00:0d.3: enabled 0

 1663 01:49:09.116009  PCI: 00:0e.0: enabled 0

 1664 01:49:09.116097  PCI: 00:10.2: enabled 1

 1665 01:49:09.119349  PCI: 00:10.6: enabled 0

 1666 01:49:09.123007  PCI: 00:10.7: enabled 0

 1667 01:49:09.126010  PCI: 00:12.0: enabled 0

 1668 01:49:09.126093  PCI: 00:12.6: enabled 0

 1669 01:49:09.129703  PCI: 00:13.0: enabled 0

 1670 01:49:09.132756  PCI: 00:14.0: enabled 1

 1671 01:49:09.135993  PCI: 00:14.1: enabled 0

 1672 01:49:09.136086  PCI: 00:14.2: enabled 1

 1673 01:49:09.139710  PCI: 00:14.3: enabled 1

 1674 01:49:09.142729  PCI: 00:15.0: enabled 1

 1675 01:49:09.146331  PCI: 00:15.1: enabled 1

 1676 01:49:09.146414  PCI: 00:15.2: enabled 1

 1677 01:49:09.149174  PCI: 00:15.3: enabled 1

 1678 01:49:09.153196  PCI: 00:16.0: enabled 1

 1679 01:49:09.153279  PCI: 00:16.1: enabled 0

 1680 01:49:09.155948  PCI: 00:16.2: enabled 0

 1681 01:49:09.159701  PCI: 00:16.3: enabled 0

 1682 01:49:09.163261  PCI: 00:16.4: enabled 0

 1683 01:49:09.163345  PCI: 00:16.5: enabled 0

 1684 01:49:09.166299  PCI: 00:17.0: enabled 0

 1685 01:49:09.169380  PCI: 00:19.0: enabled 0

 1686 01:49:09.172478  PCI: 00:19.1: enabled 1

 1687 01:49:09.172563  PCI: 00:19.2: enabled 0

 1688 01:49:09.175996  PCI: 00:1c.0: enabled 1

 1689 01:49:09.179136  PCI: 00:1c.1: enabled 0

 1690 01:49:09.182949  PCI: 00:1c.2: enabled 0

 1691 01:49:09.183039  PCI: 00:1c.3: enabled 0

 1692 01:49:09.186212  PCI: 00:1c.4: enabled 0

 1693 01:49:09.189242  PCI: 00:1c.5: enabled 0

 1694 01:49:09.193005  PCI: 00:1c.6: enabled 1

 1695 01:49:09.193093  PCI: 00:1c.7: enabled 0

 1696 01:49:09.196432  PCI: 00:1d.0: enabled 1

 1697 01:49:09.199233  PCI: 00:1d.1: enabled 0

 1698 01:49:09.199321  PCI: 00:1d.2: enabled 1

 1699 01:49:09.202364  PCI: 00:1d.3: enabled 0

 1700 01:49:09.205592  PCI: 00:1e.0: enabled 1

 1701 01:49:09.209237  PCI: 00:1e.1: enabled 0

 1702 01:49:09.209325  PCI: 00:1e.2: enabled 1

 1703 01:49:09.212372  PCI: 00:1e.3: enabled 1

 1704 01:49:09.215848  PCI: 00:1f.0: enabled 1

 1705 01:49:09.219052  PCI: 00:1f.1: enabled 0

 1706 01:49:09.219167  PCI: 00:1f.2: enabled 1

 1707 01:49:09.222357  PCI: 00:1f.3: enabled 1

 1708 01:49:09.225556  PCI: 00:1f.4: enabled 0

 1709 01:49:09.229216  PCI: 00:1f.5: enabled 1

 1710 01:49:09.229305  PCI: 00:1f.6: enabled 0

 1711 01:49:09.232189  PCI: 00:1f.7: enabled 0

 1712 01:49:09.235751  APIC: 00: enabled 1

 1713 01:49:09.235840  GENERIC: 0.0: enabled 1

 1714 01:49:09.239265  GENERIC: 0.0: enabled 1

 1715 01:49:09.242315  GENERIC: 1.0: enabled 1

 1716 01:49:09.245792  GENERIC: 0.0: enabled 1

 1717 01:49:09.245881  GENERIC: 1.0: enabled 1

 1718 01:49:09.248930  USB0 port 0: enabled 1

 1719 01:49:09.252336  GENERIC: 0.0: enabled 1

 1720 01:49:09.252425  USB0 port 0: enabled 1

 1721 01:49:09.255852  GENERIC: 0.0: enabled 1

 1722 01:49:09.259070  I2C: 00:1a: enabled 1

 1723 01:49:09.262253  I2C: 00:31: enabled 1

 1724 01:49:09.262342  I2C: 00:32: enabled 1

 1725 01:49:09.265381  I2C: 00:10: enabled 1

 1726 01:49:09.268591  I2C: 00:15: enabled 1

 1727 01:49:09.268677  GENERIC: 0.0: enabled 0

 1728 01:49:09.271973  GENERIC: 1.0: enabled 0

 1729 01:49:09.275963  GENERIC: 0.0: enabled 1

 1730 01:49:09.276050  SPI: 00: enabled 1

 1731 01:49:09.278700  SPI: 00: enabled 1

 1732 01:49:09.282479  PNP: 0c09.0: enabled 1

 1733 01:49:09.282566  GENERIC: 0.0: enabled 1

 1734 01:49:09.285216  USB3 port 0: enabled 1

 1735 01:49:09.288920  USB3 port 1: enabled 1

 1736 01:49:09.292294  USB3 port 2: enabled 0

 1737 01:49:09.292380  USB3 port 3: enabled 0

 1738 01:49:09.295696  USB2 port 0: enabled 0

 1739 01:49:09.298741  USB2 port 1: enabled 1

 1740 01:49:09.298869  USB2 port 2: enabled 1

 1741 01:49:09.302269  USB2 port 3: enabled 0

 1742 01:49:09.306030  USB2 port 4: enabled 1

 1743 01:49:09.306111  USB2 port 5: enabled 0

 1744 01:49:09.308432  USB2 port 6: enabled 0

 1745 01:49:09.311733  USB2 port 7: enabled 0

 1746 01:49:09.315435  USB2 port 8: enabled 0

 1747 01:49:09.315522  USB2 port 9: enabled 0

 1748 01:49:09.318558  USB3 port 0: enabled 0

 1749 01:49:09.321789  USB3 port 1: enabled 1

 1750 01:49:09.321892  USB3 port 2: enabled 0

 1751 01:49:09.325222  USB3 port 3: enabled 0

 1752 01:49:09.328590  GENERIC: 0.0: enabled 1

 1753 01:49:09.332149  GENERIC: 1.0: enabled 1

 1754 01:49:09.332240  APIC: 01: enabled 1

 1755 01:49:09.335766  APIC: 03: enabled 1

 1756 01:49:09.335852  APIC: 06: enabled 1

 1757 01:49:09.338627  APIC: 05: enabled 1

 1758 01:49:09.342037  APIC: 04: enabled 1

 1759 01:49:09.342123  APIC: 02: enabled 1

 1760 01:49:09.345499  APIC: 07: enabled 1

 1761 01:49:09.348679  PCI: 01:00.0: enabled 1

 1762 01:49:09.352032  BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms

 1763 01:49:09.358410  FMAP: area RW_ELOG found @ f30000 (4096 bytes)

 1764 01:49:09.361590  ELOG: NV offset 0xf30000 size 0x1000

 1765 01:49:09.368104  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1766 01:49:09.374901  ELOG: Event(17) added with size 13 at 2023-10-11 01:49:09 UTC

 1767 01:49:09.381568  ELOG: Event(92) added with size 9 at 2023-10-11 01:49:09 UTC

 1768 01:49:09.388025  ELOG: Event(93) added with size 9 at 2023-10-11 01:49:09 UTC

 1769 01:49:09.394423  ELOG: Event(9E) added with size 10 at 2023-10-11 01:49:09 UTC

 1770 01:49:09.401062  ELOG: Event(9F) added with size 14 at 2023-10-11 01:49:09 UTC

 1771 01:49:09.407853  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms

 1772 01:49:09.414406  ELOG: Event(A1) added with size 10 at 2023-10-11 01:49:09 UTC

 1773 01:49:09.421143  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1774 01:49:09.427498  ELOG: Event(A0) added with size 9 at 2023-10-11 01:49:09 UTC

 1775 01:49:09.431421  elog_add_boot_reason: Logged dev mode boot

 1776 01:49:09.437868  BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms

 1777 01:49:09.437952  Finalize devices...

 1778 01:49:09.441192  Devices finalized

 1779 01:49:09.447884  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms

 1780 01:49:09.450805  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)

 1781 01:49:09.457808  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 1782 01:49:09.460808  ME: HFSTS1                      : 0x80030055

 1783 01:49:09.467774  ME: HFSTS2                      : 0x30280116

 1784 01:49:09.471144  ME: HFSTS3                      : 0x00000050

 1785 01:49:09.473930  ME: HFSTS4                      : 0x00004000

 1786 01:49:09.480796  ME: HFSTS5                      : 0x00000000

 1787 01:49:09.484020  ME: HFSTS6                      : 0x00400006

 1788 01:49:09.487330  ME: Manufacturing Mode          : YES

 1789 01:49:09.490715  ME: SPI Protection Mode Enabled : NO

 1790 01:49:09.497251  ME: FW Partition Table          : OK

 1791 01:49:09.500860  ME: Bringup Loader Failure      : NO

 1792 01:49:09.504329  ME: Firmware Init Complete      : NO

 1793 01:49:09.507634  ME: Boot Options Present        : NO

 1794 01:49:09.510348  ME: Update In Progress          : NO

 1795 01:49:09.514303  ME: D0i3 Support                : YES

 1796 01:49:09.517061  ME: Low Power State Enabled     : NO

 1797 01:49:09.520656  ME: CPU Replaced                : YES

 1798 01:49:09.526697  ME: CPU Replacement Valid       : YES

 1799 01:49:09.530309  ME: Current Working State       : 5

 1800 01:49:09.533729  ME: Current Operation State     : 1

 1801 01:49:09.536679  ME: Current Operation Mode      : 3

 1802 01:49:09.540263  ME: Error Code                  : 0

 1803 01:49:09.543873  ME: Enhanced Debug Mode         : NO

 1804 01:49:09.546778  ME: CPU Debug Disabled          : YES

 1805 01:49:09.550224  ME: TXT Support                 : NO

 1806 01:49:09.557327  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms

 1807 01:49:09.566712  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4

 1808 01:49:09.569893  CBFS: 'fallback/slic' not found.

 1809 01:49:09.573744  ACPI: Writing ACPI tables at 76b01000.

 1810 01:49:09.573830  ACPI:    * FACS

 1811 01:49:09.576463  ACPI:    * DSDT

 1812 01:49:09.579830  Ramoops buffer: 0x100000@0x76a00000.

 1813 01:49:09.583473  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

 1814 01:49:09.590140  FMAP: area RW_VPD found @ f35000 (8192 bytes)

 1815 01:49:09.593112  Google Chrome EC: version:

 1816 01:49:09.596442  	ro: voema_v2.0.7540-147f8d37d1

 1817 01:49:09.599566  	rw: voema_v2.0.7540-147f8d37d1

 1818 01:49:09.599651    running image: 2

 1819 01:49:09.606350  PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000

 1820 01:49:09.611116  ACPI:    * FADT

 1821 01:49:09.611217  SCI is IRQ9

 1822 01:49:09.617616  ACPI: added table 1/32, length now 40

 1823 01:49:09.617704  ACPI:     * SSDT

 1824 01:49:09.620856  Found 1 CPU(s) with 8 core(s) each.

 1825 01:49:09.627568  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2

 1826 01:49:09.630739  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 1827 01:49:09.634464  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 1828 01:49:09.637779  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a

 1829 01:49:09.643947  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 1830 01:49:09.651049  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 1831 01:49:09.654319  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10

 1832 01:49:09.661109  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 1833 01:49:09.667563  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)

 1834 01:49:09.670515  \_SB.PCI0.RP09: Added StorageD3Enable property

 1835 01:49:09.677932  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1836 01:49:09.680891  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 1837 01:49:09.687199  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 1838 01:49:09.690384  PS2K: Passing 80 keymaps to kernel

 1839 01:49:09.697163  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 1840 01:49:09.704179  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1

 1841 01:49:09.710251  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1

 1842 01:49:09.717239  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 1843 01:49:09.723780  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4

 1844 01:49:09.730135  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1

 1845 01:49:09.737771  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 1846 01:49:09.743940  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 1847 01:49:09.747086  ACPI: added table 2/32, length now 44

 1848 01:49:09.747171  ACPI:    * MCFG

 1849 01:49:09.753884  ACPI: added table 3/32, length now 48

 1850 01:49:09.753968  ACPI:    * TPM2

 1851 01:49:09.757179  TPM2 log created at 0x769f0000

 1852 01:49:09.760621  ACPI: added table 4/32, length now 52

 1853 01:49:09.763799  ACPI:    * MADT

 1854 01:49:09.763956  SCI is IRQ9

 1855 01:49:09.766948  ACPI: added table 5/32, length now 56

 1856 01:49:09.770143  current = 76b09850

 1857 01:49:09.770227  ACPI:    * DMAR

 1858 01:49:09.773741  ACPI: added table 6/32, length now 60

 1859 01:49:09.780265  ACPI: added table 7/32, length now 64

 1860 01:49:09.780350  ACPI:    * HPET

 1861 01:49:09.783320  ACPI: added table 8/32, length now 68

 1862 01:49:09.786891  ACPI: done.

 1863 01:49:09.786975  ACPI tables: 35216 bytes.

 1864 01:49:09.790070  smbios_write_tables: 769ef000

 1865 01:49:09.793360  EC returned error result code 3

 1866 01:49:09.796791  Couldn't obtain OEM name from CBI

 1867 01:49:09.800749  Create SMBIOS type 16

 1868 01:49:09.803864  Create SMBIOS type 17

 1869 01:49:09.807754  GENERIC: 0.0 (WIFI Device)

 1870 01:49:09.807838  SMBIOS tables: 1750 bytes.

 1871 01:49:09.814096  Writing table forward entry at 0x00000500

 1872 01:49:09.820628  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c

 1873 01:49:09.823839  Writing coreboot table at 0x76b25000

 1874 01:49:09.830719   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1875 01:49:09.833933   1. 0000000000001000-000000000009ffff: RAM

 1876 01:49:09.837224   2. 00000000000a0000-00000000000fffff: RESERVED

 1877 01:49:09.844143   3. 0000000000100000-00000000769eefff: RAM

 1878 01:49:09.847408   4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES

 1879 01:49:09.854211   5. 0000000076b98000-0000000076c09fff: RAMSTAGE

 1880 01:49:09.860846   6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES

 1881 01:49:09.863668   7. 0000000077000000-000000007fbfffff: RESERVED

 1882 01:49:09.867032   8. 00000000c0000000-00000000cfffffff: RESERVED

 1883 01:49:09.873462   9. 00000000f8000000-00000000f9ffffff: RESERVED

 1884 01:49:09.877145  10. 00000000fb000000-00000000fb000fff: RESERVED

 1885 01:49:09.883624  11. 00000000fe000000-00000000fe00ffff: RESERVED

 1886 01:49:09.886737  12. 00000000fed80000-00000000fed87fff: RESERVED

 1887 01:49:09.893685  13. 00000000fed90000-00000000fed92fff: RESERVED

 1888 01:49:09.897158  14. 00000000feda0000-00000000feda1fff: RESERVED

 1889 01:49:09.903427  15. 00000000fedc0000-00000000feddffff: RESERVED

 1890 01:49:09.907041  16. 0000000100000000-00000002803fffff: RAM

 1891 01:49:09.910312  Passing 4 GPIOs to payload:

 1892 01:49:09.913506              NAME |       PORT | POLARITY |     VALUE

 1893 01:49:09.920246               lid |  undefined |     high |      high

 1894 01:49:09.926719             power |  undefined |     high |       low

 1895 01:49:09.930335             oprom |  undefined |     high |       low

 1896 01:49:09.936388          EC in RW | 0x000000e5 |     high |      high

 1897 01:49:09.943439  Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 7db6

 1898 01:49:09.943528  coreboot table: 1576 bytes.

 1899 01:49:09.949749  IMD ROOT    0. 0x76fff000 0x00001000

 1900 01:49:09.953143  IMD SMALL   1. 0x76ffe000 0x00001000

 1901 01:49:09.956325  FSP MEMORY  2. 0x76c4e000 0x003b0000

 1902 01:49:09.959619  VPD         3. 0x76c4d000 0x00000367

 1903 01:49:09.963084  RO MCACHE   4. 0x76c4c000 0x00000fdc

 1904 01:49:09.966701  CONSOLE     5. 0x76c2c000 0x00020000

 1905 01:49:09.969561  FMAP        6. 0x76c2b000 0x00000578

 1906 01:49:09.976247  TIME STAMP  7. 0x76c2a000 0x00000910

 1907 01:49:09.979670  VBOOT WORK  8. 0x76c16000 0x00014000

 1908 01:49:09.982883  ROMSTG STCK 9. 0x76c15000 0x00001000

 1909 01:49:09.986111  AFTER CAR  10. 0x76c0a000 0x0000b000

 1910 01:49:09.989527  RAMSTAGE   11. 0x76b97000 0x00073000

 1911 01:49:09.992911  REFCODE    12. 0x76b42000 0x00055000

 1912 01:49:09.996044  SMM BACKUP 13. 0x76b32000 0x00010000

 1913 01:49:09.999374  4f444749   14. 0x76b30000 0x00002000

 1914 01:49:10.002923  EXT VBT15. 0x76b2d000 0x0000219f

 1915 01:49:10.009428  COREBOOT   16. 0x76b25000 0x00008000

 1916 01:49:10.012785  ACPI       17. 0x76b01000 0x00024000

 1917 01:49:10.015964  ACPI GNVS  18. 0x76b00000 0x00001000

 1918 01:49:10.019016  RAMOOPS    19. 0x76a00000 0x00100000

 1919 01:49:10.022404  TPM2 TCGLOG20. 0x769f0000 0x00010000

 1920 01:49:10.026311  SMBIOS     21. 0x769ef000 0x00000800

 1921 01:49:10.029218  IMD small region:

 1922 01:49:10.032353    IMD ROOT    0. 0x76ffec00 0x00000400

 1923 01:49:10.035666    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 1924 01:49:10.038801    POWER STATE 2. 0x76ffeb80 0x00000044

 1925 01:49:10.042619    ROMSTAGE    3. 0x76ffeb60 0x00000004

 1926 01:49:10.049240    MEM INFO    4. 0x76ffe980 0x000001e0

 1927 01:49:10.052183  BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms

 1928 01:49:10.055482  MTRR: Physical address space:

 1929 01:49:10.062044  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1930 01:49:10.068817  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1931 01:49:10.075519  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 1932 01:49:10.082236  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0

 1933 01:49:10.088592  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1

 1934 01:49:10.095107  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0

 1935 01:49:10.102117  0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6

 1936 01:49:10.105334  MTRR: Fixed MSR 0x250 0x0606060606060606

 1937 01:49:10.108751  MTRR: Fixed MSR 0x258 0x0606060606060606

 1938 01:49:10.112139  MTRR: Fixed MSR 0x259 0x0000000000000000

 1939 01:49:10.118458  MTRR: Fixed MSR 0x268 0x0606060606060606

 1940 01:49:10.121690  MTRR: Fixed MSR 0x269 0x0606060606060606

 1941 01:49:10.125352  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1942 01:49:10.128262  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1943 01:49:10.131668  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1944 01:49:10.138876  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1945 01:49:10.141552  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1946 01:49:10.145196  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1947 01:49:10.148324  call enable_fixed_mtrr()

 1948 01:49:10.152197  CPU physical address size: 39 bits

 1949 01:49:10.158675  MTRR: default type WB/UC MTRR counts: 6/6.

 1950 01:49:10.161844  MTRR: UC selected as default type.

 1951 01:49:10.168690  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 1952 01:49:10.171615  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 1953 01:49:10.178374  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 1954 01:49:10.185196  MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1

 1955 01:49:10.191976  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 1956 01:49:10.198143  MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6

 1957 01:49:10.204553  MTRR: Fixed MSR 0x250 0x0606060606060606

 1958 01:49:10.207907  MTRR: Fixed MSR 0x258 0x0606060606060606

 1959 01:49:10.211284  MTRR: Fixed MSR 0x259 0x0000000000000000

 1960 01:49:10.214628  MTRR: Fixed MSR 0x268 0x0606060606060606

 1961 01:49:10.221101  MTRR: Fixed MSR 0x269 0x0606060606060606

 1962 01:49:10.224564  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1963 01:49:10.227676  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1964 01:49:10.231101  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1965 01:49:10.238079  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1966 01:49:10.240934  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1967 01:49:10.244575  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1968 01:49:10.244662  

 1969 01:49:10.247587  MTRR check

 1970 01:49:10.250801  call enable_fixed_mtrr()

 1971 01:49:10.250903  Fixed MTRRs   : Enabled

 1972 01:49:10.253998  Variable MTRRs: Enabled

 1973 01:49:10.254115  

 1974 01:49:10.257494  CPU physical address size: 39 bits

 1975 01:49:10.264486  BS: BS_WRITE_TABLES exit times (exec / console): 50 / 151 ms

 1976 01:49:10.267672  MTRR: Fixed MSR 0x250 0x0606060606060606

 1977 01:49:10.275250  MTRR: Fixed MSR 0x250 0x0606060606060606

 1978 01:49:10.277828  MTRR: Fixed MSR 0x258 0x0606060606060606

 1979 01:49:10.281208  MTRR: Fixed MSR 0x259 0x0000000000000000

 1980 01:49:10.284360  MTRR: Fixed MSR 0x268 0x0606060606060606

 1981 01:49:10.290843  MTRR: Fixed MSR 0x269 0x0606060606060606

 1982 01:49:10.294022  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1983 01:49:10.297455  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1984 01:49:10.300741  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1985 01:49:10.307560  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1986 01:49:10.310901  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1987 01:49:10.313822  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1988 01:49:10.321102  MTRR: Fixed MSR 0x258 0x0606060606060606

 1989 01:49:10.321228  call enable_fixed_mtrr()

 1990 01:49:10.327533  MTRR: Fixed MSR 0x259 0x0000000000000000

 1991 01:49:10.330696  MTRR: Fixed MSR 0x268 0x0606060606060606

 1992 01:49:10.334040  MTRR: Fixed MSR 0x269 0x0606060606060606

 1993 01:49:10.337279  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1994 01:49:10.344173  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1995 01:49:10.347472  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1996 01:49:10.350808  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1997 01:49:10.353880  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1998 01:49:10.360497  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1999 01:49:10.363780  CPU physical address size: 39 bits

 2000 01:49:10.366930  call enable_fixed_mtrr()

 2001 01:49:10.370551  MTRR: Fixed MSR 0x250 0x0606060606060606

 2002 01:49:10.376988  MTRR: Fixed MSR 0x250 0x0606060606060606

 2003 01:49:10.380550  MTRR: Fixed MSR 0x258 0x0606060606060606

 2004 01:49:10.383940  MTRR: Fixed MSR 0x259 0x0000000000000000

 2005 01:49:10.386948  MTRR: Fixed MSR 0x268 0x0606060606060606

 2006 01:49:10.390718  MTRR: Fixed MSR 0x269 0x0606060606060606

 2007 01:49:10.397398  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2008 01:49:10.400568  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2009 01:49:10.403934  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2010 01:49:10.406786  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2011 01:49:10.413942  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2012 01:49:10.416885  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2013 01:49:10.420229  MTRR: Fixed MSR 0x258 0x0606060606060606

 2014 01:49:10.423438  call enable_fixed_mtrr()

 2015 01:49:10.427015  MTRR: Fixed MSR 0x259 0x0000000000000000

 2016 01:49:10.433314  MTRR: Fixed MSR 0x268 0x0606060606060606

 2017 01:49:10.436600  MTRR: Fixed MSR 0x269 0x0606060606060606

 2018 01:49:10.440136  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2019 01:49:10.443414  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2020 01:49:10.450175  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2021 01:49:10.453251  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2022 01:49:10.456640  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2023 01:49:10.459756  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2024 01:49:10.467435  CPU physical address size: 39 bits

 2025 01:49:10.470245  call enable_fixed_mtrr()

 2026 01:49:10.473713  MTRR: Fixed MSR 0x250 0x0606060606060606

 2027 01:49:10.477301  MTRR: Fixed MSR 0x250 0x0606060606060606

 2028 01:49:10.480607  MTRR: Fixed MSR 0x258 0x0606060606060606

 2029 01:49:10.486949  MTRR: Fixed MSR 0x259 0x0000000000000000

 2030 01:49:10.490671  MTRR: Fixed MSR 0x268 0x0606060606060606

 2031 01:49:10.493473  MTRR: Fixed MSR 0x269 0x0606060606060606

 2032 01:49:10.497038  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2033 01:49:10.503500  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2034 01:49:10.506942  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2035 01:49:10.509952  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2036 01:49:10.513596  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2037 01:49:10.516631  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2038 01:49:10.523536  MTRR: Fixed MSR 0x258 0x0606060606060606

 2039 01:49:10.526961  MTRR: Fixed MSR 0x259 0x0000000000000000

 2040 01:49:10.533579  MTRR: Fixed MSR 0x268 0x0606060606060606

 2041 01:49:10.537186  MTRR: Fixed MSR 0x269 0x0606060606060606

 2042 01:49:10.539643  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2043 01:49:10.543245  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2044 01:49:10.546714  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2045 01:49:10.553582  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2046 01:49:10.556661  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2047 01:49:10.559475  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2048 01:49:10.563314  call enable_fixed_mtrr()

 2049 01:49:10.566407  call enable_fixed_mtrr()

 2050 01:49:10.569672  CPU physical address size: 39 bits

 2051 01:49:10.573109  CPU physical address size: 39 bits

 2052 01:49:10.576273  CPU physical address size: 39 bits

 2053 01:49:10.579953  CPU physical address size: 39 bits

 2054 01:49:10.586947  Checking cr50 for pending updates

 2055 01:49:10.591783  Reading cr50 TPM mode

 2056 01:49:10.602082  BS: BS_PAYLOAD_LOAD entry times (exec / console): 325 / 6 ms

 2057 01:49:10.612257  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60

 2058 01:49:10.616050  Checking segment from ROM address 0xffc02b38

 2059 01:49:10.618927  Checking segment from ROM address 0xffc02b54

 2060 01:49:10.625350  Loading segment from ROM address 0xffc02b38

 2061 01:49:10.625437    code (compression=0)

 2062 01:49:10.635609    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64

 2063 01:49:10.645393  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64

 2064 01:49:10.645524  it's not compressed!

 2065 01:49:10.784715  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70

 2066 01:49:10.791559  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c

 2067 01:49:10.798124  Loading segment from ROM address 0xffc02b54

 2068 01:49:10.798240    Entry Point 0x30000000

 2069 01:49:10.801337  Loaded segments

 2070 01:49:10.807782  BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms

 2071 01:49:10.851051  Finalizing chipset.

 2072 01:49:10.854220  Finalizing SMM.

 2073 01:49:10.854333  APMC done.

 2074 01:49:10.860835  BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms

 2075 01:49:10.864251  mp_park_aps done after 0 msecs.

 2076 01:49:10.867904  Jumping to boot code at 0x30000000(0x76b25000)

 2077 01:49:10.877034  CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes

 2078 01:49:10.877148  

 2079 01:49:10.877244  

 2080 01:49:10.880674  

 2081 01:49:10.880792  Starting depthcharge on Voema...

 2082 01:49:10.881254  end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
 2083 01:49:10.881398  start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
 2084 01:49:10.881511  Setting prompt string to ['volteer:']
 2085 01:49:10.881624  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
 2086 01:49:10.883888  

 2087 01:49:10.890405  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2088 01:49:10.890520  

 2089 01:49:10.897167  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2090 01:49:10.897279  

 2091 01:49:10.903523  Looking for NVMe Controller 0x3005f220 @ 00:1d:00

 2092 01:49:10.903683  

 2093 01:49:10.906829  Failed to find eMMC card reader

 2094 01:49:10.906943  

 2095 01:49:10.910050  Wipe memory regions:

 2096 01:49:10.910157  

 2097 01:49:10.913657  	[0x00000000001000, 0x000000000a0000)

 2098 01:49:10.913774  

 2099 01:49:10.916742  	[0x00000000100000, 0x00000030000000)

 2100 01:49:10.942458  

 2101 01:49:10.945745  	[0x00000032662db0, 0x000000769ef000)

 2102 01:49:10.981498  

 2103 01:49:10.984983  	[0x00000100000000, 0x00000280400000)

 2104 01:49:11.183010  

 2105 01:49:11.186624  ec_init: CrosEC protocol v3 supported (256, 256)

 2106 01:49:11.186759  

 2107 01:49:11.193075  update_port_state: port C0 state: usb enable 1 mux conn 0

 2108 01:49:11.193215  

 2109 01:49:11.203627  update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1

 2110 01:49:11.203757  

 2111 01:49:11.209842  pmc_check_ipc_sts: STS_BUSY done after 1611 us

 2112 01:49:11.209964  

 2113 01:49:11.212497  send_conn_disc_msg: pmc_send_cmd succeeded

 2114 01:49:11.646493  

 2115 01:49:11.646663  R8152: Initializing

 2116 01:49:11.646789  

 2117 01:49:11.649915  Version 6 (ocp_data = 5c30)

 2118 01:49:11.650033  

 2119 01:49:11.653092  R8152: Done initializing

 2120 01:49:11.653203  

 2121 01:49:11.656483  Adding net device

 2122 01:49:11.958028  

 2123 01:49:11.961505  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35

 2124 01:49:11.961630  

 2125 01:49:11.961728  

 2126 01:49:11.961821  

 2127 01:49:11.965023  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2129 01:49:12.065430  volteer: tftpboot 192.168.201.1 11733090/tftp-deploy-vbt9fbv3/kernel/bzImage 11733090/tftp-deploy-vbt9fbv3/kernel/cmdline 11733090/tftp-deploy-vbt9fbv3/ramdisk/ramdisk.cpio.gz

 2130 01:49:12.065659  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2131 01:49:12.065911  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
 2132 01:49:12.070002  tftpboot 192.168.201.1 11733090/tftp-deploy-vbt9fbv3/kernel/bzIploy-vbt9fbv3/kernel/cmdline 11733090/tftp-deploy-vbt9fbv3/ramdisk/ramdisk.cpio.gz

 2133 01:49:12.070125  

 2134 01:49:12.070225  Waiting for link

 2135 01:49:12.273260  

 2136 01:49:12.273404  done.

 2137 01:49:12.273473  

 2138 01:49:12.273535  MAC: 00:24:32:30:79:06

 2139 01:49:12.273595  

 2140 01:49:12.276828  Sending DHCP discover... done.

 2141 01:49:12.276915  

 2142 01:49:12.279711  Waiting for reply... done.

 2143 01:49:12.279797  

 2144 01:49:12.284158  Sending DHCP request... done.

 2145 01:49:12.284247  

 2146 01:49:12.290153  Waiting for reply... done.

 2147 01:49:12.290242  

 2148 01:49:12.290309  My ip is 192.168.201.23

 2149 01:49:12.290370  

 2150 01:49:12.293194  The DHCP server ip is 192.168.201.1

 2151 01:49:12.296632  

 2152 01:49:12.299914  TFTP server IP predefined by user: 192.168.201.1

 2153 01:49:12.299999  

 2154 01:49:12.306423  Bootfile predefined by user: 11733090/tftp-deploy-vbt9fbv3/kernel/bzImage

 2155 01:49:12.306509  

 2156 01:49:12.309746  Sending tftp read request... done.

 2157 01:49:12.309831  

 2158 01:49:12.316355  Waiting for the transfer... 

 2159 01:49:12.316489  

 2160 01:49:12.879751  00000000 ################################################################

 2161 01:49:12.879905  

 2162 01:49:13.446447  00080000 ################################################################

 2163 01:49:13.446588  

 2164 01:49:14.000090  00100000 ################################################################

 2165 01:49:14.000275  

 2166 01:49:14.559997  00180000 ################################################################

 2167 01:49:14.560172  

 2168 01:49:15.100775  00200000 ################################################################

 2169 01:49:15.101019  

 2170 01:49:15.659540  00280000 ################################################################

 2171 01:49:15.659682  

 2172 01:49:16.204597  00300000 ################################################################

 2173 01:49:16.204732  

 2174 01:49:16.743123  00380000 ################################################################

 2175 01:49:16.743266  

 2176 01:49:17.272863  00400000 ################################################################

 2177 01:49:17.273001  

 2178 01:49:17.801909  00480000 ################################################################

 2179 01:49:17.802056  

 2180 01:49:18.324737  00500000 ################################################################

 2181 01:49:18.324906  

 2182 01:49:18.865516  00580000 ################################################################

 2183 01:49:18.865665  

 2184 01:49:19.401301  00600000 ################################################################

 2185 01:49:19.401486  

 2186 01:49:19.947152  00680000 ################################################################

 2187 01:49:19.947289  

 2188 01:49:20.480861  00700000 ################################################################

 2189 01:49:20.480998  

 2190 01:49:21.017249  00780000 ################################################################

 2191 01:49:21.017389  

 2192 01:49:21.564907  00800000 ################################################################

 2193 01:49:21.565080  

 2194 01:49:22.100029  00880000 ################################################################

 2195 01:49:22.100192  

 2196 01:49:22.624081  00900000 ################################################################

 2197 01:49:22.624219  

 2198 01:49:23.146044  00980000 ################################################################

 2199 01:49:23.146207  

 2200 01:49:23.666759  00a00000 ################################################################

 2201 01:49:23.666959  

 2202 01:49:24.123637  00a80000 ######################################################### done.

 2203 01:49:24.123801  

 2204 01:49:24.127296  The bootfile was 11473408 bytes long.

 2205 01:49:24.127437  

 2206 01:49:24.130487  Sending tftp read request... done.

 2207 01:49:24.130623  

 2208 01:49:24.133514  Waiting for the transfer... 

 2209 01:49:24.133620  

 2210 01:49:24.650199  00000000 ################################################################

 2211 01:49:24.650343  

 2212 01:49:25.168204  00080000 ################################################################

 2213 01:49:25.168370  

 2214 01:49:25.689673  00100000 ################################################################

 2215 01:49:25.689818  

 2216 01:49:26.211074  00180000 ################################################################

 2217 01:49:26.211239  

 2218 01:49:26.724933  00200000 ################################################################

 2219 01:49:26.725068  

 2220 01:49:27.237439  00280000 ################################################################

 2221 01:49:27.237600  

 2222 01:49:27.767930  00300000 ################################################################

 2223 01:49:27.768094  

 2224 01:49:28.291189  00380000 ################################################################

 2225 01:49:28.291335  

 2226 01:49:28.811892  00400000 ################################################################

 2227 01:49:28.812061  

 2228 01:49:29.323467  00480000 ################################################################

 2229 01:49:29.323608  

 2230 01:49:29.834571  00500000 ################################################################

 2231 01:49:29.834741  

 2232 01:49:30.347958  00580000 ################################################################

 2233 01:49:30.348096  

 2234 01:49:30.868462  00600000 ################################################################

 2235 01:49:30.868633  

 2236 01:49:31.383796  00680000 ################################################################

 2237 01:49:31.383939  

 2238 01:49:31.903390  00700000 ################################################################

 2239 01:49:31.903531  

 2240 01:49:32.421742  00780000 ################################################################

 2241 01:49:32.421884  

 2242 01:49:32.941493  00800000 ################################################################

 2243 01:49:32.941640  

 2244 01:49:33.465698  00880000 ################################################################

 2245 01:49:33.465841  

 2246 01:49:33.995419  00900000 ################################################################

 2247 01:49:33.995560  

 2248 01:49:34.523825  00980000 ################################################################

 2249 01:49:34.523996  

 2250 01:49:35.035546  00a00000 ################################################################

 2251 01:49:35.035692  

 2252 01:49:35.550590  00a80000 ################################################################

 2253 01:49:35.550758  

 2254 01:49:36.063579  00b00000 ################################################################

 2255 01:49:36.063732  

 2256 01:49:36.581244  00b80000 ################################################################

 2257 01:49:36.581409  

 2258 01:49:37.092979  00c00000 ################################################################

 2259 01:49:37.093125  

 2260 01:49:37.624829  00c80000 ################################################################

 2261 01:49:37.624967  

 2262 01:49:38.141995  00d00000 ################################################################

 2263 01:49:38.142130  

 2264 01:49:38.652139  00d80000 ################################################################

 2265 01:49:38.652282  

 2266 01:49:39.222172  00e00000 ################################################################

 2267 01:49:39.222316  

 2268 01:49:39.890598  00e80000 ################################################################

 2269 01:49:39.890742  

 2270 01:49:40.498042  00f00000 ################################################################

 2271 01:49:40.498183  

 2272 01:49:41.011221  00f80000 ################################################################

 2273 01:49:41.011354  

 2274 01:49:41.549159  01000000 ################################################################

 2275 01:49:41.549296  

 2276 01:49:42.089736  01080000 ################################################################

 2277 01:49:42.089904  

 2278 01:49:42.614952  01100000 ################################################################

 2279 01:49:42.615121  

 2280 01:49:43.149195  01180000 ################################################################

 2281 01:49:43.149371  

 2282 01:49:43.671216  01200000 ################################################################

 2283 01:49:43.671386  

 2284 01:49:44.191642  01280000 ################################################################

 2285 01:49:44.191796  

 2286 01:49:44.711995  01300000 ################################################################

 2287 01:49:44.712145  

 2288 01:49:45.229765  01380000 ################################################################

 2289 01:49:45.229915  

 2290 01:49:45.745597  01400000 ################################################################

 2291 01:49:45.745739  

 2292 01:49:46.253595  01480000 ################################################################

 2293 01:49:46.253827  

 2294 01:49:46.771888  01500000 ################################################################

 2295 01:49:46.772102  

 2296 01:49:47.306718  01580000 ################################################################

 2297 01:49:47.306871  

 2298 01:49:47.849541  01600000 ################################################################

 2299 01:49:47.849681  

 2300 01:49:48.388926  01680000 ################################################################

 2301 01:49:48.389069  

 2302 01:49:48.910761  01700000 ################################################################

 2303 01:49:48.910933  

 2304 01:49:49.432089  01780000 ################################################################

 2305 01:49:49.432261  

 2306 01:49:49.957160  01800000 ################################################################

 2307 01:49:49.957344  

 2308 01:49:50.490100  01880000 ################################################################

 2309 01:49:50.490294  

 2310 01:49:51.026333  01900000 ################################################################

 2311 01:49:51.026479  

 2312 01:49:51.575225  01980000 ################################################################

 2313 01:49:51.575366  

 2314 01:49:52.147362  01a00000 ################################################################

 2315 01:49:52.147502  

 2316 01:49:52.726142  01a80000 ################################################################

 2317 01:49:52.726288  

 2318 01:49:53.299480  01b00000 ################################################################

 2319 01:49:53.299642  

 2320 01:49:53.838257  01b80000 ################################################################

 2321 01:49:53.838400  

 2322 01:49:54.375771  01c00000 ################################################################

 2323 01:49:54.375904  

 2324 01:49:54.918679  01c80000 ################################################################

 2325 01:49:54.918857  

 2326 01:49:55.469407  01d00000 ################################################################

 2327 01:49:55.469546  

 2328 01:49:56.033212  01d80000 ################################################################

 2329 01:49:56.033465  

 2330 01:49:56.608962  01e00000 ################################################################

 2331 01:49:56.609234  

 2332 01:49:57.167346  01e80000 ################################################################

 2333 01:49:57.167516  

 2334 01:49:57.706804  01f00000 ################################################################

 2335 01:49:57.707002  

 2336 01:49:58.238053  01f80000 ################################################################

 2337 01:49:58.238195  

 2338 01:49:58.781423  02000000 ################################################################

 2339 01:49:58.781564  

 2340 01:49:59.336832  02080000 ################################################################

 2341 01:49:59.336976  

 2342 01:49:59.860560  02100000 ################################################################

 2343 01:49:59.860718  

 2344 01:50:00.416136  02180000 ################################################################

 2345 01:50:00.416290  

 2346 01:50:00.967648  02200000 ################################################################

 2347 01:50:00.967797  

 2348 01:50:01.306753  02280000 ##################################### done.

 2349 01:50:01.306941  

 2350 01:50:01.310118  Sending tftp read request... done.

 2351 01:50:01.310197  

 2352 01:50:01.313095  Waiting for the transfer... 

 2353 01:50:01.313181  

 2354 01:50:01.313248  00000000 # done.

 2355 01:50:01.313311  

 2356 01:50:01.323432  Command line loaded dynamically from TFTP file: 11733090/tftp-deploy-vbt9fbv3/kernel/cmdline

 2357 01:50:01.323516  

 2358 01:50:01.339607  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2359 01:50:01.345935  

 2360 01:50:01.349339  Shutting down all USB controllers.

 2361 01:50:01.349424  

 2362 01:50:01.349490  Removing current net device

 2363 01:50:01.349551  

 2364 01:50:01.352339  Finalizing coreboot

 2365 01:50:01.352423  

 2366 01:50:01.358852  Exiting depthcharge with code 4 at timestamp: 59157036

 2367 01:50:01.358949  

 2368 01:50:01.359016  

 2369 01:50:01.359078  Starting kernel ...

 2370 01:50:01.359137  

 2371 01:50:01.359194  

 2372 01:50:01.359689  end: 2.2.4 bootloader-commands (duration 00:00:50) [common]
 2373 01:50:01.359802  start: 2.2.5 auto-login-action (timeout 00:03:54) [common]
 2374 01:50:01.359879  Setting prompt string to ['Linux version [0-9]']
 2375 01:50:01.359946  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2376 01:50:01.360015  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2378 01:53:55.360032  end: 2.2.5 auto-login-action (duration 00:03:54) [common]
 2380 01:53:55.360351  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 234 seconds'
 2382 01:53:55.360535  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2385 01:53:55.360812  end: 2 depthcharge-action (duration 00:05:00) [common]
 2387 01:53:55.361042  Cleaning after the job
 2388 01:53:55.361141  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11733090/tftp-deploy-vbt9fbv3/ramdisk
 2389 01:53:55.366616  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11733090/tftp-deploy-vbt9fbv3/kernel
 2390 01:53:55.368448  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11733090/tftp-deploy-vbt9fbv3/modules
 2391 01:53:55.369086  start: 4.1 power-off (timeout 00:00:30) [common]
 2392 01:53:55.369341  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=off'
 2393 01:53:55.445629  >> Command sent successfully.

 2394 01:53:55.448212  Returned 0 in 0 seconds
 2395 01:53:55.548573  end: 4.1 power-off (duration 00:00:00) [common]
 2397 01:53:55.548897  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2398 01:53:55.549168  Listened to connection for namespace 'common' for up to 1s
 2399 01:53:56.550082  Finalising connection for namespace 'common'
 2400 01:53:56.550243  Disconnecting from shell: Finalise
 2401 01:53:56.550331  

 2402 01:53:56.650631  end: 4.2 read-feedback (duration 00:00:01) [common]
 2403 01:53:56.650781  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11733090
 2404 01:53:56.750252  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11733090
 2405 01:53:56.750471  JobError: Your job cannot terminate cleanly.