Boot log: asus-C436FA-Flip-hatch

    1 01:50:10.737995  lava-dispatcher, installed at version: 2023.08
    2 01:50:10.738214  start: 0 validate
    3 01:50:10.738341  Start time: 2023-10-11 01:50:10.738333+00:00 (UTC)
    4 01:50:10.738458  Using caching service: 'http://localhost/cache/?uri=%s'
    5 01:50:10.738601  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
    6 01:50:10.993774  Using caching service: 'http://localhost/cache/?uri=%s'
    7 01:50:10.994458  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.295-cip103-95-ge42cfc8bb88b7%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 01:50:15.501020  Using caching service: 'http://localhost/cache/?uri=%s'
    9 01:50:15.501245  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 01:50:15.761265  Using caching service: 'http://localhost/cache/?uri=%s'
   11 01:50:15.761989  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.295-cip103-95-ge42cfc8bb88b7%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 01:50:16.266906  validate duration: 5.53
   14 01:50:16.267300  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 01:50:16.267443  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 01:50:16.267578  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 01:50:16.267809  Not decompressing ramdisk as can be used compressed.
   18 01:50:16.267951  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/initrd.cpio.gz
   19 01:50:16.268053  saving as /var/lib/lava/dispatcher/tmp/11733039/tftp-deploy-7yd4tg8e/ramdisk/initrd.cpio.gz
   20 01:50:16.268153  total size: 5432480 (5 MB)
   21 01:50:16.269794  progress   0 % (0 MB)
   22 01:50:16.272455  progress   5 % (0 MB)
   23 01:50:16.274846  progress  10 % (0 MB)
   24 01:50:16.277182  progress  15 % (0 MB)
   25 01:50:16.280001  progress  20 % (1 MB)
   26 01:50:16.282407  progress  25 % (1 MB)
   27 01:50:16.284699  progress  30 % (1 MB)
   28 01:50:16.287294  progress  35 % (1 MB)
   29 01:50:16.289578  progress  40 % (2 MB)
   30 01:50:16.291975  progress  45 % (2 MB)
   31 01:50:16.294326  progress  50 % (2 MB)
   32 01:50:16.296862  progress  55 % (2 MB)
   33 01:50:16.299167  progress  60 % (3 MB)
   34 01:50:16.301517  progress  65 % (3 MB)
   35 01:50:16.304107  progress  70 % (3 MB)
   36 01:50:16.306293  progress  75 % (3 MB)
   37 01:50:16.308598  progress  80 % (4 MB)
   38 01:50:16.311044  progress  85 % (4 MB)
   39 01:50:16.313826  progress  90 % (4 MB)
   40 01:50:16.316131  progress  95 % (4 MB)
   41 01:50:16.318559  progress 100 % (5 MB)
   42 01:50:16.318894  5 MB downloaded in 0.05 s (102.11 MB/s)
   43 01:50:16.319136  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 01:50:16.319518  end: 1.1 download-retry (duration 00:00:00) [common]
   46 01:50:16.319670  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 01:50:16.319819  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 01:50:16.320026  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.295-cip103-95-ge42cfc8bb88b7/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 01:50:16.320138  saving as /var/lib/lava/dispatcher/tmp/11733039/tftp-deploy-7yd4tg8e/kernel/bzImage
   50 01:50:16.320243  total size: 11473408 (10 MB)
   51 01:50:16.320336  No compression specified
   52 01:50:16.322030  progress   0 % (0 MB)
   53 01:50:16.326927  progress   5 % (0 MB)
   54 01:50:16.330553  progress  10 % (1 MB)
   55 01:50:16.333942  progress  15 % (1 MB)
   56 01:50:16.337560  progress  20 % (2 MB)
   57 01:50:16.340700  progress  25 % (2 MB)
   58 01:50:16.345019  progress  30 % (3 MB)
   59 01:50:16.348194  progress  35 % (3 MB)
   60 01:50:16.351855  progress  40 % (4 MB)
   61 01:50:16.355136  progress  45 % (4 MB)
   62 01:50:16.358774  progress  50 % (5 MB)
   63 01:50:16.362103  progress  55 % (6 MB)
   64 01:50:16.365455  progress  60 % (6 MB)
   65 01:50:16.368459  progress  65 % (7 MB)
   66 01:50:16.371606  progress  70 % (7 MB)
   67 01:50:16.374635  progress  75 % (8 MB)
   68 01:50:16.377861  progress  80 % (8 MB)
   69 01:50:16.380847  progress  85 % (9 MB)
   70 01:50:16.384035  progress  90 % (9 MB)
   71 01:50:16.386927  progress  95 % (10 MB)
   72 01:50:16.390143  progress 100 % (10 MB)
   73 01:50:16.390287  10 MB downloaded in 0.07 s (156.22 MB/s)
   74 01:50:16.390439  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 01:50:16.390670  end: 1.2 download-retry (duration 00:00:00) [common]
   77 01:50:16.390757  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 01:50:16.390841  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 01:50:16.390997  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/full.rootfs.tar.xz
   80 01:50:16.391067  saving as /var/lib/lava/dispatcher/tmp/11733039/tftp-deploy-7yd4tg8e/nfsrootfs/full.rootfs.tar
   81 01:50:16.391139  total size: 207157356 (197 MB)
   82 01:50:16.391216  Using unxz to decompress xz
   83 01:50:16.395783  progress   0 % (0 MB)
   84 01:50:16.996467  progress   5 % (9 MB)
   85 01:50:17.558054  progress  10 % (19 MB)
   86 01:50:18.186713  progress  15 % (29 MB)
   87 01:50:18.566964  progress  20 % (39 MB)
   88 01:50:18.950456  progress  25 % (49 MB)
   89 01:50:19.601621  progress  30 % (59 MB)
   90 01:50:20.178384  progress  35 % (69 MB)
   91 01:50:20.832219  progress  40 % (79 MB)
   92 01:50:21.423766  progress  45 % (88 MB)
   93 01:50:22.050084  progress  50 % (98 MB)
   94 01:50:22.723402  progress  55 % (108 MB)
   95 01:50:23.460840  progress  60 % (118 MB)
   96 01:50:23.609813  progress  65 % (128 MB)
   97 01:50:23.761933  progress  70 % (138 MB)
   98 01:50:23.861753  progress  75 % (148 MB)
   99 01:50:23.940541  progress  80 % (158 MB)
  100 01:50:24.017102  progress  85 % (167 MB)
  101 01:50:24.130833  progress  90 % (177 MB)
  102 01:50:24.409404  progress  95 % (187 MB)
  103 01:50:25.013125  progress 100 % (197 MB)
  104 01:50:25.019680  197 MB downloaded in 8.63 s (22.90 MB/s)
  105 01:50:25.019959  end: 1.3.1 http-download (duration 00:00:09) [common]
  107 01:50:25.020224  end: 1.3 download-retry (duration 00:00:09) [common]
  108 01:50:25.020315  start: 1.4 download-retry (timeout 00:09:51) [common]
  109 01:50:25.020404  start: 1.4.1 http-download (timeout 00:09:51) [common]
  110 01:50:25.020539  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.295-cip103-95-ge42cfc8bb88b7/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 01:50:25.020610  saving as /var/lib/lava/dispatcher/tmp/11733039/tftp-deploy-7yd4tg8e/modules/modules.tar
  112 01:50:25.020671  total size: 484192 (0 MB)
  113 01:50:25.020735  Using unxz to decompress xz
  114 01:50:25.024883  progress   6 % (0 MB)
  115 01:50:25.025291  progress  13 % (0 MB)
  116 01:50:25.025564  progress  20 % (0 MB)
  117 01:50:25.027235  progress  27 % (0 MB)
  118 01:50:25.029491  progress  33 % (0 MB)
  119 01:50:25.031505  progress  40 % (0 MB)
  120 01:50:25.033574  progress  47 % (0 MB)
  121 01:50:25.035627  progress  54 % (0 MB)
  122 01:50:25.037779  progress  60 % (0 MB)
  123 01:50:25.039964  progress  67 % (0 MB)
  124 01:50:25.042035  progress  74 % (0 MB)
  125 01:50:25.044193  progress  81 % (0 MB)
  126 01:50:25.046158  progress  87 % (0 MB)
  127 01:50:25.048213  progress  94 % (0 MB)
  128 01:50:25.050650  progress 100 % (0 MB)
  129 01:50:25.057242  0 MB downloaded in 0.04 s (12.63 MB/s)
  130 01:50:25.057521  end: 1.4.1 http-download (duration 00:00:00) [common]
  132 01:50:25.057822  end: 1.4 download-retry (duration 00:00:00) [common]
  133 01:50:25.057933  start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
  134 01:50:25.058047  start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
  135 01:50:28.682532  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11733039/extract-nfsrootfs-w3uruwxc
  136 01:50:28.682751  end: 1.5.1 extract-nfsrootfs (duration 00:00:04) [common]
  137 01:50:28.682896  start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
  138 01:50:28.683127  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11733039/lava-overlay-f9hb1ybk
  139 01:50:28.683313  makedir: /var/lib/lava/dispatcher/tmp/11733039/lava-overlay-f9hb1ybk/lava-11733039/bin
  140 01:50:28.683460  makedir: /var/lib/lava/dispatcher/tmp/11733039/lava-overlay-f9hb1ybk/lava-11733039/tests
  141 01:50:28.683610  makedir: /var/lib/lava/dispatcher/tmp/11733039/lava-overlay-f9hb1ybk/lava-11733039/results
  142 01:50:28.683990  Creating /var/lib/lava/dispatcher/tmp/11733039/lava-overlay-f9hb1ybk/lava-11733039/bin/lava-add-keys
  143 01:50:28.684200  Creating /var/lib/lava/dispatcher/tmp/11733039/lava-overlay-f9hb1ybk/lava-11733039/bin/lava-add-sources
  144 01:50:28.684371  Creating /var/lib/lava/dispatcher/tmp/11733039/lava-overlay-f9hb1ybk/lava-11733039/bin/lava-background-process-start
  145 01:50:28.684506  Creating /var/lib/lava/dispatcher/tmp/11733039/lava-overlay-f9hb1ybk/lava-11733039/bin/lava-background-process-stop
  146 01:50:28.684636  Creating /var/lib/lava/dispatcher/tmp/11733039/lava-overlay-f9hb1ybk/lava-11733039/bin/lava-common-functions
  147 01:50:28.684765  Creating /var/lib/lava/dispatcher/tmp/11733039/lava-overlay-f9hb1ybk/lava-11733039/bin/lava-echo-ipv4
  148 01:50:28.684893  Creating /var/lib/lava/dispatcher/tmp/11733039/lava-overlay-f9hb1ybk/lava-11733039/bin/lava-install-packages
  149 01:50:28.685019  Creating /var/lib/lava/dispatcher/tmp/11733039/lava-overlay-f9hb1ybk/lava-11733039/bin/lava-installed-packages
  150 01:50:28.685146  Creating /var/lib/lava/dispatcher/tmp/11733039/lava-overlay-f9hb1ybk/lava-11733039/bin/lava-os-build
  151 01:50:28.685274  Creating /var/lib/lava/dispatcher/tmp/11733039/lava-overlay-f9hb1ybk/lava-11733039/bin/lava-probe-channel
  152 01:50:28.685402  Creating /var/lib/lava/dispatcher/tmp/11733039/lava-overlay-f9hb1ybk/lava-11733039/bin/lava-probe-ip
  153 01:50:28.685529  Creating /var/lib/lava/dispatcher/tmp/11733039/lava-overlay-f9hb1ybk/lava-11733039/bin/lava-target-ip
  154 01:50:28.685655  Creating /var/lib/lava/dispatcher/tmp/11733039/lava-overlay-f9hb1ybk/lava-11733039/bin/lava-target-mac
  155 01:50:28.685781  Creating /var/lib/lava/dispatcher/tmp/11733039/lava-overlay-f9hb1ybk/lava-11733039/bin/lava-target-storage
  156 01:50:28.685912  Creating /var/lib/lava/dispatcher/tmp/11733039/lava-overlay-f9hb1ybk/lava-11733039/bin/lava-test-case
  157 01:50:28.686043  Creating /var/lib/lava/dispatcher/tmp/11733039/lava-overlay-f9hb1ybk/lava-11733039/bin/lava-test-event
  158 01:50:28.686169  Creating /var/lib/lava/dispatcher/tmp/11733039/lava-overlay-f9hb1ybk/lava-11733039/bin/lava-test-feedback
  159 01:50:28.686296  Creating /var/lib/lava/dispatcher/tmp/11733039/lava-overlay-f9hb1ybk/lava-11733039/bin/lava-test-raise
  160 01:50:28.686422  Creating /var/lib/lava/dispatcher/tmp/11733039/lava-overlay-f9hb1ybk/lava-11733039/bin/lava-test-reference
  161 01:50:28.686549  Creating /var/lib/lava/dispatcher/tmp/11733039/lava-overlay-f9hb1ybk/lava-11733039/bin/lava-test-runner
  162 01:50:28.686675  Creating /var/lib/lava/dispatcher/tmp/11733039/lava-overlay-f9hb1ybk/lava-11733039/bin/lava-test-set
  163 01:50:28.686803  Creating /var/lib/lava/dispatcher/tmp/11733039/lava-overlay-f9hb1ybk/lava-11733039/bin/lava-test-shell
  164 01:50:28.686931  Updating /var/lib/lava/dispatcher/tmp/11733039/lava-overlay-f9hb1ybk/lava-11733039/bin/lava-add-keys (debian)
  165 01:50:28.687085  Updating /var/lib/lava/dispatcher/tmp/11733039/lava-overlay-f9hb1ybk/lava-11733039/bin/lava-add-sources (debian)
  166 01:50:28.687229  Updating /var/lib/lava/dispatcher/tmp/11733039/lava-overlay-f9hb1ybk/lava-11733039/bin/lava-install-packages (debian)
  167 01:50:28.687371  Updating /var/lib/lava/dispatcher/tmp/11733039/lava-overlay-f9hb1ybk/lava-11733039/bin/lava-installed-packages (debian)
  168 01:50:28.687531  Updating /var/lib/lava/dispatcher/tmp/11733039/lava-overlay-f9hb1ybk/lava-11733039/bin/lava-os-build (debian)
  169 01:50:28.687678  Creating /var/lib/lava/dispatcher/tmp/11733039/lava-overlay-f9hb1ybk/lava-11733039/environment
  170 01:50:28.687777  LAVA metadata
  171 01:50:28.687848  - LAVA_JOB_ID=11733039
  172 01:50:28.687913  - LAVA_DISPATCHER_IP=192.168.201.1
  173 01:50:28.688039  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
  174 01:50:28.688109  skipped lava-vland-overlay
  175 01:50:28.688185  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  176 01:50:28.688266  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
  177 01:50:28.688327  skipped lava-multinode-overlay
  178 01:50:28.688400  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  179 01:50:28.688478  start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
  180 01:50:28.688552  Loading test definitions
  181 01:50:28.688643  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:48) [common]
  182 01:50:28.688714  Using /lava-11733039 at stage 0
  183 01:50:28.689003  uuid=11733039_1.5.2.3.1 testdef=None
  184 01:50:28.689098  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  185 01:50:28.689191  start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
  186 01:50:28.689713  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  188 01:50:28.689943  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
  189 01:50:28.690516  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  191 01:50:28.690751  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
  192 01:50:28.691305  runner path: /var/lib/lava/dispatcher/tmp/11733039/lava-overlay-f9hb1ybk/lava-11733039/0/tests/0_timesync-off test_uuid 11733039_1.5.2.3.1
  193 01:50:28.691463  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  195 01:50:28.691700  start: 1.5.2.3.5 git-repo-action (timeout 00:09:48) [common]
  196 01:50:28.691776  Using /lava-11733039 at stage 0
  197 01:50:28.691874  Fetching tests from https://github.com/kernelci/test-definitions.git
  198 01:50:28.691955  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/11733039/lava-overlay-f9hb1ybk/lava-11733039/0/tests/1_kselftest-futex'
  199 01:50:31.113361  Running '/usr/bin/git checkout kernelci.org
  200 01:50:31.202067  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/11733039/lava-overlay-f9hb1ybk/lava-11733039/0/tests/1_kselftest-futex/automated/linux/kselftest/kselftest.yaml
  201 01:50:31.202849  uuid=11733039_1.5.2.3.5 testdef=None
  202 01:50:31.203028  end: 1.5.2.3.5 git-repo-action (duration 00:00:03) [common]
  204 01:50:31.203287  start: 1.5.2.3.6 test-overlay (timeout 00:09:45) [common]
  205 01:50:31.204089  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  207 01:50:31.204338  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:45) [common]
  208 01:50:31.205391  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  210 01:50:31.205636  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:45) [common]
  211 01:50:31.206628  runner path: /var/lib/lava/dispatcher/tmp/11733039/lava-overlay-f9hb1ybk/lava-11733039/0/tests/1_kselftest-futex test_uuid 11733039_1.5.2.3.5
  212 01:50:31.206725  BOARD='asus-C436FA-Flip-hatch'
  213 01:50:31.206793  BRANCH='cip-gitlab'
  214 01:50:31.206854  SKIPFILE='/dev/null'
  215 01:50:31.206914  SKIP_INSTALL='True'
  216 01:50:31.206973  TESTPROG_URL='None'
  217 01:50:31.207030  TST_CASENAME=''
  218 01:50:31.207087  TST_CMDFILES='futex'
  219 01:50:31.207237  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  221 01:50:31.207453  Creating lava-test-runner.conf files
  222 01:50:31.207521  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11733039/lava-overlay-f9hb1ybk/lava-11733039/0 for stage 0
  223 01:50:31.207618  - 0_timesync-off
  224 01:50:31.207705  - 1_kselftest-futex
  225 01:50:31.207812  end: 1.5.2.3 test-definition (duration 00:00:03) [common]
  226 01:50:31.207917  start: 1.5.2.4 compress-overlay (timeout 00:09:45) [common]
  227 01:50:38.954980  end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
  228 01:50:38.955162  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:37) [common]
  229 01:50:38.955372  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  230 01:50:38.955489  end: 1.5.2 lava-overlay (duration 00:00:10) [common]
  231 01:50:38.955584  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:37) [common]
  232 01:50:39.108998  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  233 01:50:39.109500  start: 1.5.4 extract-modules (timeout 00:09:37) [common]
  234 01:50:39.109666  extracting modules file /var/lib/lava/dispatcher/tmp/11733039/tftp-deploy-7yd4tg8e/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11733039/extract-nfsrootfs-w3uruwxc
  235 01:50:39.137373  extracting modules file /var/lib/lava/dispatcher/tmp/11733039/tftp-deploy-7yd4tg8e/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11733039/extract-overlay-ramdisk-dm4tvfk3/ramdisk
  236 01:50:39.159007  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  237 01:50:39.159163  start: 1.5.5 apply-overlay-tftp (timeout 00:09:37) [common]
  238 01:50:39.159263  [common] Applying overlay to NFS
  239 01:50:39.159344  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11733039/compress-overlay-tqjv0mqs/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11733039/extract-nfsrootfs-w3uruwxc
  240 01:50:40.155602  end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
  241 01:50:40.155786  start: 1.5.6 configure-preseed-file (timeout 00:09:36) [common]
  242 01:50:40.155921  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  243 01:50:40.156050  start: 1.5.7 compress-ramdisk (timeout 00:09:36) [common]
  244 01:50:40.156175  Building ramdisk /var/lib/lava/dispatcher/tmp/11733039/extract-overlay-ramdisk-dm4tvfk3/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11733039/extract-overlay-ramdisk-dm4tvfk3/ramdisk
  245 01:50:40.241450  >> 30353 blocks

  246 01:50:40.871184  rename /var/lib/lava/dispatcher/tmp/11733039/extract-overlay-ramdisk-dm4tvfk3/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11733039/tftp-deploy-7yd4tg8e/ramdisk/ramdisk.cpio.gz
  247 01:50:40.871745  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  248 01:50:40.871919  start: 1.5.8 prepare-kernel (timeout 00:09:35) [common]
  249 01:50:40.872070  start: 1.5.8.1 prepare-fit (timeout 00:09:35) [common]
  250 01:50:40.872207  No mkimage arch provided, not using FIT.
  251 01:50:40.872343  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  252 01:50:40.872471  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  253 01:50:40.872622  end: 1.5 prepare-tftp-overlay (duration 00:00:16) [common]
  254 01:50:40.872758  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:35) [common]
  255 01:50:40.872877  No LXC device requested
  256 01:50:40.873003  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  257 01:50:40.873138  start: 1.7 deploy-device-env (timeout 00:09:35) [common]
  258 01:50:40.873261  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  259 01:50:40.873378  Checking files for TFTP limit of 4294967296 bytes.
  260 01:50:40.873939  end: 1 tftp-deploy (duration 00:00:25) [common]
  261 01:50:40.874088  start: 2 depthcharge-action (timeout 00:05:00) [common]
  262 01:50:40.874218  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  263 01:50:40.874391  substitutions:
  264 01:50:40.874493  - {DTB}: None
  265 01:50:40.874591  - {INITRD}: 11733039/tftp-deploy-7yd4tg8e/ramdisk/ramdisk.cpio.gz
  266 01:50:40.874685  - {KERNEL}: 11733039/tftp-deploy-7yd4tg8e/kernel/bzImage
  267 01:50:40.874778  - {LAVA_MAC}: None
  268 01:50:40.874868  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11733039/extract-nfsrootfs-w3uruwxc
  269 01:50:40.874960  - {NFS_SERVER_IP}: 192.168.201.1
  270 01:50:40.875052  - {PRESEED_CONFIG}: None
  271 01:50:40.875143  - {PRESEED_LOCAL}: None
  272 01:50:40.875234  - {RAMDISK}: 11733039/tftp-deploy-7yd4tg8e/ramdisk/ramdisk.cpio.gz
  273 01:50:40.875326  - {ROOT_PART}: None
  274 01:50:40.875416  - {ROOT}: None
  275 01:50:40.875508  - {SERVER_IP}: 192.168.201.1
  276 01:50:40.875598  - {TEE}: None
  277 01:50:40.875695  Parsed boot commands:
  278 01:50:40.875782  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  279 01:50:40.876033  Parsed boot commands: tftpboot 192.168.201.1 11733039/tftp-deploy-7yd4tg8e/kernel/bzImage 11733039/tftp-deploy-7yd4tg8e/kernel/cmdline 11733039/tftp-deploy-7yd4tg8e/ramdisk/ramdisk.cpio.gz
  280 01:50:40.876168  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  281 01:50:40.876297  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  282 01:50:40.876435  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  283 01:50:40.876565  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  284 01:50:40.876677  Not connected, no need to disconnect.
  285 01:50:40.876794  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  286 01:50:40.876917  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  287 01:50:40.877023  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-3'
  288 01:50:40.881849  Setting prompt string to ['lava-test: # ']
  289 01:50:40.882325  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  290 01:50:40.882479  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  291 01:50:40.882624  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  292 01:50:40.882759  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  293 01:50:40.883063  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
  294 01:50:46.024630  >> Command sent successfully.

  295 01:50:46.027105  Returned 0 in 5 seconds
  296 01:50:46.127484  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  298 01:50:46.127835  end: 2.2.2 reset-device (duration 00:00:05) [common]
  299 01:50:46.127942  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  300 01:50:46.128045  Setting prompt string to 'Starting depthcharge on Helios...'
  301 01:50:46.128115  Changing prompt to 'Starting depthcharge on Helios...'
  302 01:50:46.128183  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  303 01:50:46.128486  [Enter `^Ec?' for help]

  304 01:50:46.748713  

  305 01:50:46.748911  

  306 01:50:46.758632  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  307 01:50:46.762033  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  308 01:50:46.769008  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  309 01:50:46.772386  CPU: AES supported, TXT NOT supported, VT supported

  310 01:50:46.779194  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  311 01:50:46.782405  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  312 01:50:46.789037  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  313 01:50:46.792177  VBOOT: Loading verstage.

  314 01:50:46.795389  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  315 01:50:46.802322  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  316 01:50:46.805547  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  317 01:50:46.808923  CBFS @ c08000 size 3f8000

  318 01:50:46.815602  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  319 01:50:46.819023  CBFS: Locating 'fallback/verstage'

  320 01:50:46.822423  CBFS: Found @ offset 10fb80 size 1072c

  321 01:50:46.825866  

  322 01:50:46.825947  

  323 01:50:46.835873  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  324 01:50:46.849667  Probing TPM: . done!

  325 01:50:46.853437  TPM ready after 0 ms

  326 01:50:46.856784  Connected to device vid:did:rid of 1ae0:0028:00

  327 01:50:46.866708  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7

  328 01:50:46.870304  Initialized TPM device CR50 revision 0

  329 01:50:46.914597  tlcl_send_startup: Startup return code is 0

  330 01:50:46.914721  TPM: setup succeeded

  331 01:50:46.927724  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  332 01:50:46.931067  Chrome EC: UHEPI supported

  333 01:50:46.934472  Phase 1

  334 01:50:46.937870  FMAP: area GBB found @ c05000 (12288 bytes)

  335 01:50:46.944560  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  336 01:50:46.944692  Phase 2

  337 01:50:46.947875  Phase 3

  338 01:50:46.951242  FMAP: area GBB found @ c05000 (12288 bytes)

  339 01:50:46.957782  VB2:vb2_report_dev_firmware() This is developer signed firmware

  340 01:50:46.964378  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  341 01:50:46.967627  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  342 01:50:46.974549  VB2:vb2_verify_keyblock() Checking keyblock signature...

  343 01:50:46.989996  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  344 01:50:46.993025  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  345 01:50:46.999785  VB2:vb2_verify_fw_preamble() Verifying preamble.

  346 01:50:47.004047  Phase 4

  347 01:50:47.007621  FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)

  348 01:50:47.014029  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  349 01:50:47.193569  VB2:vb2_rsa_verify_digest() Digest check failed!

  350 01:50:47.200207  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7

  351 01:50:47.200327  Saving nvdata

  352 01:50:47.204066  Reboot requested (10020007)

  353 01:50:47.206780  board_reset() called!

  354 01:50:47.206865  full_reset() called!

  355 01:50:51.716508  

  356 01:50:51.716647  

  357 01:50:51.726468  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  358 01:50:51.729280  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  359 01:50:51.735782  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  360 01:50:51.739050  CPU: AES supported, TXT NOT supported, VT supported

  361 01:50:51.745781  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  362 01:50:51.749591  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  363 01:50:51.755978  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  364 01:50:51.759382  VBOOT: Loading verstage.

  365 01:50:51.762797  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  366 01:50:51.769009  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  367 01:50:51.772488  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  368 01:50:51.776139  CBFS @ c08000 size 3f8000

  369 01:50:51.782776  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  370 01:50:51.785434  CBFS: Locating 'fallback/verstage'

  371 01:50:51.788778  CBFS: Found @ offset 10fb80 size 1072c

  372 01:50:51.792809  

  373 01:50:51.792892  

  374 01:50:51.802898  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  375 01:50:51.816671  Probing TPM: . done!

  376 01:50:51.820437  TPM ready after 0 ms

  377 01:50:51.823576  Connected to device vid:did:rid of 1ae0:0028:00

  378 01:50:51.833919  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7

  379 01:50:51.837311  Initialized TPM device CR50 revision 0

  380 01:50:51.883075  tlcl_send_startup: Startup return code is 0

  381 01:50:51.883189  TPM: setup succeeded

  382 01:50:51.896072  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  383 01:50:51.899395  Chrome EC: UHEPI supported

  384 01:50:51.902936  Phase 1

  385 01:50:51.906126  FMAP: area GBB found @ c05000 (12288 bytes)

  386 01:50:51.912676  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  387 01:50:51.919206  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  388 01:50:51.922973  Recovery requested (1009000e)

  389 01:50:51.928540  Saving nvdata

  390 01:50:51.934460  tlcl_extend: response is 0

  391 01:50:51.943105  tlcl_extend: response is 0

  392 01:50:51.950306  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  393 01:50:51.953787  CBFS @ c08000 size 3f8000

  394 01:50:51.960433  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  395 01:50:51.963856  CBFS: Locating 'fallback/romstage'

  396 01:50:51.967067  CBFS: Found @ offset 80 size 145fc

  397 01:50:51.970147  Accumulated console time in verstage 98 ms

  398 01:50:51.970238  

  399 01:50:51.970344  

  400 01:50:51.983197  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...

  401 01:50:51.989842  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  402 01:50:51.993107  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  403 01:50:51.997119  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  404 01:50:52.003221  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000

  405 01:50:52.006808  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  406 01:50:52.010182  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000

  407 01:50:52.013313  TCO_STS:   0000 0000

  408 01:50:52.016525  GEN_PMCON: e0015238 00000200

  409 01:50:52.019854  GBLRST_CAUSE: 00000000 00000000

  410 01:50:52.019934  prev_sleep_state 5

  411 01:50:52.023561  Boot Count incremented to 66109

  412 01:50:52.029930  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  413 01:50:52.033579  CBFS @ c08000 size 3f8000

  414 01:50:52.039613  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  415 01:50:52.039736  CBFS: Locating 'fspm.bin'

  416 01:50:52.043530  CBFS: Found @ offset 5ffc0 size 71000

  417 01:50:52.047406  Chrome EC: UHEPI supported

  418 01:50:52.054920  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

  419 01:50:52.060107  Probing TPM:  done!

  420 01:50:52.066871  Connected to device vid:did:rid of 1ae0:0028:00

  421 01:50:52.076818  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7

  422 01:50:52.082406  Initialized TPM device CR50 revision 0

  423 01:50:52.091206  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  424 01:50:52.098228  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  425 01:50:52.101500  MRC cache found, size 1948

  426 01:50:52.104813  bootmode is set to: 2

  427 01:50:52.108097  PRMRR disabled by config.

  428 01:50:52.111298  SPD INDEX = 1

  429 01:50:52.114249  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  430 01:50:52.117708  CBFS @ c08000 size 3f8000

  431 01:50:52.124621  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  432 01:50:52.124707  CBFS: Locating 'spd.bin'

  433 01:50:52.127878  CBFS: Found @ offset 5fb80 size 400

  434 01:50:52.131026  SPD: module type is LPDDR3

  435 01:50:52.134389  SPD: module part is 

  436 01:50:52.141322  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb

  437 01:50:52.144293  SPD: device width 4 bits, bus width 8 bits

  438 01:50:52.147879  SPD: module size is 4096 MB (per channel)

  439 01:50:52.151233  memory slot: 0 configuration done.

  440 01:50:52.154754  memory slot: 2 configuration done.

  441 01:50:52.206027  CBMEM:

  442 01:50:52.209689  IMD: root @ 99fff000 254 entries.

  443 01:50:52.212664  IMD: root @ 99ffec00 62 entries.

  444 01:50:52.216261  External stage cache:

  445 01:50:52.219557  IMD: root @ 9abff000 254 entries.

  446 01:50:52.222843  IMD: root @ 9abfec00 62 entries.

  447 01:50:52.226049  Chrome EC: clear events_b mask to 0x0000000020004000

  448 01:50:52.241871  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  449 01:50:52.255440  tlcl_write: response is 0

  450 01:50:52.264434  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  451 01:50:52.270927  MRC: TPM MRC hash updated successfully.

  452 01:50:52.271013  2 DIMMs found

  453 01:50:52.274225  SMM Memory Map

  454 01:50:52.277597  SMRAM       : 0x9a000000 0x1000000

  455 01:50:52.281006   Subregion 0: 0x9a000000 0xa00000

  456 01:50:52.284382   Subregion 1: 0x9aa00000 0x200000

  457 01:50:52.287633   Subregion 2: 0x9ac00000 0x400000

  458 01:50:52.290877  top_of_ram = 0x9a000000

  459 01:50:52.294223  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)

  460 01:50:52.300717  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)

  461 01:50:52.304120  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  462 01:50:52.310932  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  463 01:50:52.314176  CBFS @ c08000 size 3f8000

  464 01:50:52.317491  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  465 01:50:52.320725  CBFS: Locating 'fallback/postcar'

  466 01:50:52.327461  CBFS: Found @ offset 107000 size 4b44

  467 01:50:52.330672  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)

  468 01:50:52.343442  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8

  469 01:50:52.346590  Processing 180 relocs. Offset value of 0x97c0c000

  470 01:50:52.355523  Accumulated console time in romstage 285 ms

  471 01:50:52.355646  

  472 01:50:52.355756  

  473 01:50:52.365608  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...

  474 01:50:52.371593  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  475 01:50:52.374946  CBFS @ c08000 size 3f8000

  476 01:50:52.378594  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  477 01:50:52.385046  CBFS: Locating 'fallback/ramstage'

  478 01:50:52.388447  CBFS: Found @ offset 43380 size 1b9e8

  479 01:50:52.395211  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)

  480 01:50:52.427271  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38

  481 01:50:52.430325  Processing 3976 relocs. Offset value of 0x98db0000

  482 01:50:52.437096  Accumulated console time in postcar 52 ms

  483 01:50:52.437224  

  484 01:50:52.437364  

  485 01:50:52.446908  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...

  486 01:50:52.453422  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  487 01:50:52.456519  WARNING: RO_VPD is uninitialized or empty.

  488 01:50:52.459831  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  489 01:50:52.466988  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  490 01:50:52.467076  Normal boot.

  491 01:50:52.473481  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

  492 01:50:52.476844  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  493 01:50:52.480096  CBFS @ c08000 size 3f8000

  494 01:50:52.486585  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  495 01:50:52.490042  CBFS: Locating 'cpu_microcode_blob.bin'

  496 01:50:52.493362  CBFS: Found @ offset 14700 size 2ec00

  497 01:50:52.496691  microcode: sig=0x806ec pf=0x4 revision=0xc9

  498 01:50:52.499967  Skip microcode update

  499 01:50:52.503132  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  500 01:50:52.506523  CBFS @ c08000 size 3f8000

  501 01:50:52.513111  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  502 01:50:52.516446  CBFS: Locating 'fsps.bin'

  503 01:50:52.519819  CBFS: Found @ offset d1fc0 size 35000

  504 01:50:52.544852  Detected 4 core, 8 thread CPU.

  505 01:50:52.548532  Setting up SMI for CPU

  506 01:50:52.551699  IED base = 0x9ac00000

  507 01:50:52.551792  IED size = 0x00400000

  508 01:50:52.555048  Will perform SMM setup.

  509 01:50:52.561649  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.

  510 01:50:52.568260  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  511 01:50:52.571504  Processing 16 relocs. Offset value of 0x00030000

  512 01:50:52.575414  Attempting to start 7 APs

  513 01:50:52.578635  Waiting for 10ms after sending INIT.

  514 01:50:52.594646  Waiting for 1st SIPI to complete...done.

  515 01:50:52.594756  AP: slot 1 apic_id 2.

  516 01:50:52.597955  AP: slot 4 apic_id 3.

  517 01:50:52.600956  AP: slot 3 apic_id 1.

  518 01:50:52.604710  Waiting for 2nd SIPI to complete...done.

  519 01:50:52.607734  AP: slot 7 apic_id 4.

  520 01:50:52.607824  AP: slot 6 apic_id 5.

  521 01:50:52.611220  AP: slot 5 apic_id 7.

  522 01:50:52.614624  AP: slot 2 apic_id 6.

  523 01:50:52.620895  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  524 01:50:52.627784  Processing 13 relocs. Offset value of 0x00038000

  525 01:50:52.634443  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)

  526 01:50:52.637751  Installing SMM handler to 0x9a000000

  527 01:50:52.644429  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58

  528 01:50:52.650943  Processing 658 relocs. Offset value of 0x9a010000

  529 01:50:52.657706  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8

  530 01:50:52.660748  Processing 13 relocs. Offset value of 0x9a008000

  531 01:50:52.667524  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd

  532 01:50:52.674042  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd

  533 01:50:52.681201  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd

  534 01:50:52.684122  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd

  535 01:50:52.690776  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd

  536 01:50:52.697342  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd

  537 01:50:52.700601  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd

  538 01:50:52.707019  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)

  539 01:50:52.710494  Clearing SMI status registers

  540 01:50:52.713823  SMI_STS: PM1 

  541 01:50:52.713925  PM1_STS: PWRBTN 

  542 01:50:52.717214  TCO_STS: SECOND_TO 

  543 01:50:52.720508  New SMBASE 0x9a000000

  544 01:50:52.724107  In relocation handler: CPU 0

  545 01:50:52.727134  New SMBASE=0x9a000000 IEDBASE=0x9ac00000

  546 01:50:52.730502  Writing SMRR. base = 0x9a000006, mask=0xff000800

  547 01:50:52.733978  Relocation complete.

  548 01:50:52.737152  New SMBASE 0x99fff400

  549 01:50:52.737229  In relocation handler: CPU 3

  550 01:50:52.744299  New SMBASE=0x99fff400 IEDBASE=0x9ac00000

  551 01:50:52.747081  Writing SMRR. base = 0x9a000006, mask=0xff000800

  552 01:50:52.750500  Relocation complete.

  553 01:50:52.750580  New SMBASE 0x99fffc00

  554 01:50:52.754475  In relocation handler: CPU 1

  555 01:50:52.760954  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000

  556 01:50:52.764179  Writing SMRR. base = 0x9a000006, mask=0xff000800

  557 01:50:52.767195  Relocation complete.

  558 01:50:52.767282  New SMBASE 0x99fff000

  559 01:50:52.770968  In relocation handler: CPU 4

  560 01:50:52.774180  New SMBASE=0x99fff000 IEDBASE=0x9ac00000

  561 01:50:52.780983  Writing SMRR. base = 0x9a000006, mask=0xff000800

  562 01:50:52.784456  Relocation complete.

  563 01:50:52.784534  New SMBASE 0x99ffe800

  564 01:50:52.787381  In relocation handler: CPU 6

  565 01:50:52.790595  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000

  566 01:50:52.797283  Writing SMRR. base = 0x9a000006, mask=0xff000800

  567 01:50:52.800606  Relocation complete.

  568 01:50:52.800688  New SMBASE 0x99ffe400

  569 01:50:52.804327  In relocation handler: CPU 7

  570 01:50:52.807078  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000

  571 01:50:52.814242  Writing SMRR. base = 0x9a000006, mask=0xff000800

  572 01:50:52.814323  Relocation complete.

  573 01:50:52.817552  New SMBASE 0x99ffec00

  574 01:50:52.820983  In relocation handler: CPU 5

  575 01:50:52.824179  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000

  576 01:50:52.830728  Writing SMRR. base = 0x9a000006, mask=0xff000800

  577 01:50:52.830808  Relocation complete.

  578 01:50:52.834122  New SMBASE 0x99fff800

  579 01:50:52.837194  In relocation handler: CPU 2

  580 01:50:52.840250  New SMBASE=0x99fff800 IEDBASE=0x9ac00000

  581 01:50:52.847253  Writing SMRR. base = 0x9a000006, mask=0xff000800

  582 01:50:52.847336  Relocation complete.

  583 01:50:52.850211  Initializing CPU #0

  584 01:50:52.853796  CPU: vendor Intel device 806ec

  585 01:50:52.856938  CPU: family 06, model 8e, stepping 0c

  586 01:50:52.860410  Clearing out pending MCEs

  587 01:50:52.863766  Setting up local APIC...

  588 01:50:52.863846   apic_id: 0x00 done.

  589 01:50:52.866932  Turbo is available but hidden

  590 01:50:52.870700  Turbo is available and visible

  591 01:50:52.873861  VMX status: enabled

  592 01:50:52.877253  IA32_FEATURE_CONTROL status: locked

  593 01:50:52.880594  Skip microcode update

  594 01:50:52.880675  CPU #0 initialized

  595 01:50:52.883695  Initializing CPU #5

  596 01:50:52.883777  Initializing CPU #2

  597 01:50:52.886890  CPU: vendor Intel device 806ec

  598 01:50:52.890663  CPU: family 06, model 8e, stepping 0c

  599 01:50:52.893707  CPU: vendor Intel device 806ec

  600 01:50:52.900141  CPU: family 06, model 8e, stepping 0c

  601 01:50:52.900225  Clearing out pending MCEs

  602 01:50:52.903492  Clearing out pending MCEs

  603 01:50:52.906729  Setting up local APIC...

  604 01:50:52.906808  Initializing CPU #3

  605 01:50:52.910063  Initializing CPU #1

  606 01:50:52.913456  Initializing CPU #4

  607 01:50:52.916705  CPU: vendor Intel device 806ec

  608 01:50:52.920329  CPU: family 06, model 8e, stepping 0c

  609 01:50:52.923914  CPU: vendor Intel device 806ec

  610 01:50:52.927027  CPU: family 06, model 8e, stepping 0c

  611 01:50:52.930467  Clearing out pending MCEs

  612 01:50:52.930553  Clearing out pending MCEs

  613 01:50:52.933921  Setting up local APIC...

  614 01:50:52.936716  Setting up local APIC...

  615 01:50:52.940197  Initializing CPU #6

  616 01:50:52.940312  Initializing CPU #7

  617 01:50:52.943438  CPU: vendor Intel device 806ec

  618 01:50:52.946630  CPU: family 06, model 8e, stepping 0c

  619 01:50:52.950594  CPU: vendor Intel device 806ec

  620 01:50:52.953257  CPU: family 06, model 8e, stepping 0c

  621 01:50:52.956609  Clearing out pending MCEs

  622 01:50:52.960476  Clearing out pending MCEs

  623 01:50:52.963606  Setting up local APIC...

  624 01:50:52.963706   apic_id: 0x07 done.

  625 01:50:52.966658   apic_id: 0x06 done.

  626 01:50:52.969973  VMX status: enabled

  627 01:50:52.970059  VMX status: enabled

  628 01:50:52.973157  IA32_FEATURE_CONTROL status: locked

  629 01:50:52.977004  IA32_FEATURE_CONTROL status: locked

  630 01:50:52.980160  Skip microcode update

  631 01:50:52.983317  Skip microcode update

  632 01:50:52.983402  CPU #5 initialized

  633 01:50:52.986779  CPU #2 initialized

  634 01:50:52.989826  Setting up local APIC...

  635 01:50:52.989911  Setting up local APIC...

  636 01:50:52.992941  CPU: vendor Intel device 806ec

  637 01:50:53.000127  CPU: family 06, model 8e, stepping 0c

  638 01:50:53.000213  Clearing out pending MCEs

  639 01:50:53.003180   apic_id: 0x05 done.

  640 01:50:53.006730   apic_id: 0x04 done.

  641 01:50:53.006816  VMX status: enabled

  642 01:50:53.009770  VMX status: enabled

  643 01:50:53.012974  IA32_FEATURE_CONTROL status: locked

  644 01:50:53.016367  IA32_FEATURE_CONTROL status: locked

  645 01:50:53.019520  Skip microcode update

  646 01:50:53.019605  Skip microcode update

  647 01:50:53.023377  CPU #6 initialized

  648 01:50:53.026931  CPU #7 initialized

  649 01:50:53.027014   apic_id: 0x02 done.

  650 01:50:53.029593   apic_id: 0x03 done.

  651 01:50:53.029676  VMX status: enabled

  652 01:50:53.032970  VMX status: enabled

  653 01:50:53.036430  IA32_FEATURE_CONTROL status: locked

  654 01:50:53.039817  IA32_FEATURE_CONTROL status: locked

  655 01:50:53.043240  Skip microcode update

  656 01:50:53.046643  Skip microcode update

  657 01:50:53.046727  Setting up local APIC...

  658 01:50:53.049426  CPU #1 initialized

  659 01:50:53.053330  CPU #4 initialized

  660 01:50:53.053413   apic_id: 0x01 done.

  661 01:50:53.056238  VMX status: enabled

  662 01:50:53.059841  IA32_FEATURE_CONTROL status: locked

  663 01:50:53.063131  Skip microcode update

  664 01:50:53.063214  CPU #3 initialized

  665 01:50:53.066396  bsp_do_flight_plan done after 461 msecs.

  666 01:50:53.069780  CPU: frequency set to 4200 MHz

  667 01:50:53.072828  Enabling SMIs.

  668 01:50:53.072912  Locking SMM.

  669 01:50:53.088844  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  670 01:50:53.091890  CBFS @ c08000 size 3f8000

  671 01:50:53.098298  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  672 01:50:53.098380  CBFS: Locating 'vbt.bin'

  673 01:50:53.102141  CBFS: Found @ offset 5f5c0 size 499

  674 01:50:53.108834  Found a VBT of 4608 bytes after decompression

  675 01:50:53.288534  Display FSP Version Info HOB

  676 01:50:53.292335  Reference Code - CPU = 9.0.1e.30

  677 01:50:53.295523  uCode Version = 0.0.0.ca

  678 01:50:53.298959  TXT ACM version = ff.ff.ff.ffff

  679 01:50:53.302241  Display FSP Version Info HOB

  680 01:50:53.305532  Reference Code - ME = 9.0.1e.30

  681 01:50:53.308845  MEBx version = 0.0.0.0

  682 01:50:53.311996  ME Firmware Version = Consumer SKU

  683 01:50:53.315140  Display FSP Version Info HOB

  684 01:50:53.318305  Reference Code - CML PCH = 9.0.1e.30

  685 01:50:53.321696  PCH-CRID Status = Disabled

  686 01:50:53.325262  PCH-CRID Original Value = ff.ff.ff.ffff

  687 01:50:53.328223  PCH-CRID New Value = ff.ff.ff.ffff

  688 01:50:53.331549  OPROM - RST - RAID = ff.ff.ff.ffff

  689 01:50:53.334851  ChipsetInit Base Version = ff.ff.ff.ffff

  690 01:50:53.338190  ChipsetInit Oem Version = ff.ff.ff.ffff

  691 01:50:53.341432  Display FSP Version Info HOB

  692 01:50:53.348073  Reference Code - SA - System Agent = 9.0.1e.30

  693 01:50:53.351526  Reference Code - MRC = 0.7.1.6c

  694 01:50:53.351611  SA - PCIe Version = 9.0.1e.30

  695 01:50:53.355108  SA-CRID Status = Disabled

  696 01:50:53.358092  SA-CRID Original Value = 0.0.0.c

  697 01:50:53.361360  SA-CRID New Value = 0.0.0.c

  698 01:50:53.364740  OPROM - VBIOS = ff.ff.ff.ffff

  699 01:50:53.367934  RTC Init

  700 01:50:53.371218  Set power on after power failure.

  701 01:50:53.371301  Disabling Deep S3

  702 01:50:53.374519  Disabling Deep S3

  703 01:50:53.374603  Disabling Deep S4

  704 01:50:53.377816  Disabling Deep S4

  705 01:50:53.377899  Disabling Deep S5

  706 01:50:53.381790  Disabling Deep S5

  707 01:50:53.387767  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 191 exit 1

  708 01:50:53.387852  Enumerating buses...

  709 01:50:53.394817  Show all devs... Before device enumeration.

  710 01:50:53.394902  Root Device: enabled 1

  711 01:50:53.397978  CPU_CLUSTER: 0: enabled 1

  712 01:50:53.401111  DOMAIN: 0000: enabled 1

  713 01:50:53.404487  APIC: 00: enabled 1

  714 01:50:53.404571  PCI: 00:00.0: enabled 1

  715 01:50:53.407811  PCI: 00:02.0: enabled 1

  716 01:50:53.411092  PCI: 00:04.0: enabled 0

  717 01:50:53.414929  PCI: 00:05.0: enabled 0

  718 01:50:53.415014  PCI: 00:12.0: enabled 1

  719 01:50:53.417789  PCI: 00:12.5: enabled 0

  720 01:50:53.421137  PCI: 00:12.6: enabled 0

  721 01:50:53.421221  PCI: 00:14.0: enabled 1

  722 01:50:53.424376  PCI: 00:14.1: enabled 0

  723 01:50:53.427752  PCI: 00:14.3: enabled 1

  724 01:50:53.431007  PCI: 00:14.5: enabled 0

  725 01:50:53.431112  PCI: 00:15.0: enabled 1

  726 01:50:53.434852  PCI: 00:15.1: enabled 1

  727 01:50:53.437746  PCI: 00:15.2: enabled 0

  728 01:50:53.441242  PCI: 00:15.3: enabled 0

  729 01:50:53.441366  PCI: 00:16.0: enabled 1

  730 01:50:53.444512  PCI: 00:16.1: enabled 0

  731 01:50:53.447806  PCI: 00:16.2: enabled 0

  732 01:50:53.451144  PCI: 00:16.3: enabled 0

  733 01:50:53.451257  PCI: 00:16.4: enabled 0

  734 01:50:53.454377  PCI: 00:16.5: enabled 0

  735 01:50:53.457413  PCI: 00:17.0: enabled 1

  736 01:50:53.461182  PCI: 00:19.0: enabled 1

  737 01:50:53.461266  PCI: 00:19.1: enabled 0

  738 01:50:53.464274  PCI: 00:19.2: enabled 0

  739 01:50:53.467303  PCI: 00:1a.0: enabled 0

  740 01:50:53.467408  PCI: 00:1c.0: enabled 0

  741 01:50:53.470746  PCI: 00:1c.1: enabled 0

  742 01:50:53.474390  PCI: 00:1c.2: enabled 0

  743 01:50:53.477408  PCI: 00:1c.3: enabled 0

  744 01:50:53.477540  PCI: 00:1c.4: enabled 0

  745 01:50:53.480856  PCI: 00:1c.5: enabled 0

  746 01:50:53.484417  PCI: 00:1c.6: enabled 0

  747 01:50:53.487159  PCI: 00:1c.7: enabled 0

  748 01:50:53.487298  PCI: 00:1d.0: enabled 1

  749 01:50:53.490534  PCI: 00:1d.1: enabled 0

  750 01:50:53.494379  PCI: 00:1d.2: enabled 0

  751 01:50:53.497483  PCI: 00:1d.3: enabled 0

  752 01:50:53.497616  PCI: 00:1d.4: enabled 0

  753 01:50:53.500632  PCI: 00:1d.5: enabled 1

  754 01:50:53.504067  PCI: 00:1e.0: enabled 1

  755 01:50:53.504155  PCI: 00:1e.1: enabled 0

  756 01:50:53.507315  PCI: 00:1e.2: enabled 1

  757 01:50:53.510830  PCI: 00:1e.3: enabled 1

  758 01:50:53.514250  PCI: 00:1f.0: enabled 1

  759 01:50:53.514337  PCI: 00:1f.1: enabled 1

  760 01:50:53.517153  PCI: 00:1f.2: enabled 1

  761 01:50:53.520386  PCI: 00:1f.3: enabled 1

  762 01:50:53.523866  PCI: 00:1f.4: enabled 1

  763 01:50:53.523975  PCI: 00:1f.5: enabled 1

  764 01:50:53.527268  PCI: 00:1f.6: enabled 0

  765 01:50:53.530550  USB0 port 0: enabled 1

  766 01:50:53.530637  I2C: 00:15: enabled 1

  767 01:50:53.533976  I2C: 00:5d: enabled 1

  768 01:50:53.537272  GENERIC: 0.0: enabled 1

  769 01:50:53.540665  I2C: 00:1a: enabled 1

  770 01:50:53.540754  I2C: 00:38: enabled 1

  771 01:50:53.543741  I2C: 00:39: enabled 1

  772 01:50:53.546860  I2C: 00:3a: enabled 1

  773 01:50:53.546972  I2C: 00:3b: enabled 1

  774 01:50:53.550527  PCI: 00:00.0: enabled 1

  775 01:50:53.553615  SPI: 00: enabled 1

  776 01:50:53.553702  SPI: 01: enabled 1

  777 01:50:53.556916  PNP: 0c09.0: enabled 1

  778 01:50:53.560298  USB2 port 0: enabled 1

  779 01:50:53.560384  USB2 port 1: enabled 1

  780 01:50:53.563853  USB2 port 2: enabled 0

  781 01:50:53.567005  USB2 port 3: enabled 0

  782 01:50:53.567120  USB2 port 5: enabled 0

  783 01:50:53.570358  USB2 port 6: enabled 1

  784 01:50:53.573720  USB2 port 9: enabled 1

  785 01:50:53.576789  USB3 port 0: enabled 1

  786 01:50:53.576901  USB3 port 1: enabled 1

  787 01:50:53.580344  USB3 port 2: enabled 1

  788 01:50:53.583147  USB3 port 3: enabled 1

  789 01:50:53.583234  USB3 port 4: enabled 0

  790 01:50:53.586719  APIC: 02: enabled 1

  791 01:50:53.589869  APIC: 06: enabled 1

  792 01:50:53.589956  APIC: 01: enabled 1

  793 01:50:53.593697  APIC: 03: enabled 1

  794 01:50:53.593783  APIC: 07: enabled 1

  795 01:50:53.597114  APIC: 05: enabled 1

  796 01:50:53.600131  APIC: 04: enabled 1

  797 01:50:53.600217  Compare with tree...

  798 01:50:53.603765  Root Device: enabled 1

  799 01:50:53.606641   CPU_CLUSTER: 0: enabled 1

  800 01:50:53.610113    APIC: 00: enabled 1

  801 01:50:53.610227    APIC: 02: enabled 1

  802 01:50:53.613310    APIC: 06: enabled 1

  803 01:50:53.616471    APIC: 01: enabled 1

  804 01:50:53.616557    APIC: 03: enabled 1

  805 01:50:53.619814    APIC: 07: enabled 1

  806 01:50:53.623083    APIC: 05: enabled 1

  807 01:50:53.623169    APIC: 04: enabled 1

  808 01:50:53.626535   DOMAIN: 0000: enabled 1

  809 01:50:53.629796    PCI: 00:00.0: enabled 1

  810 01:50:53.632944    PCI: 00:02.0: enabled 1

  811 01:50:53.633027    PCI: 00:04.0: enabled 0

  812 01:50:53.636302    PCI: 00:05.0: enabled 0

  813 01:50:53.639570    PCI: 00:12.0: enabled 1

  814 01:50:53.643042    PCI: 00:12.5: enabled 0

  815 01:50:53.646422    PCI: 00:12.6: enabled 0

  816 01:50:53.646502    PCI: 00:14.0: enabled 1

  817 01:50:53.649870     USB0 port 0: enabled 1

  818 01:50:53.652898      USB2 port 0: enabled 1

  819 01:50:53.656113      USB2 port 1: enabled 1

  820 01:50:53.659943      USB2 port 2: enabled 0

  821 01:50:53.660048      USB2 port 3: enabled 0

  822 01:50:53.662732      USB2 port 5: enabled 0

  823 01:50:53.666403      USB2 port 6: enabled 1

  824 01:50:53.669751      USB2 port 9: enabled 1

  825 01:50:53.672775      USB3 port 0: enabled 1

  826 01:50:53.676233      USB3 port 1: enabled 1

  827 01:50:53.676325      USB3 port 2: enabled 1

  828 01:50:53.679752      USB3 port 3: enabled 1

  829 01:50:53.682570      USB3 port 4: enabled 0

  830 01:50:53.686072    PCI: 00:14.1: enabled 0

  831 01:50:53.689489    PCI: 00:14.3: enabled 1

  832 01:50:53.689574    PCI: 00:14.5: enabled 0

  833 01:50:53.692782    PCI: 00:15.0: enabled 1

  834 01:50:53.696010     I2C: 00:15: enabled 1

  835 01:50:53.699785    PCI: 00:15.1: enabled 1

  836 01:50:53.699870     I2C: 00:5d: enabled 1

  837 01:50:53.702925     GENERIC: 0.0: enabled 1

  838 01:50:53.706403    PCI: 00:15.2: enabled 0

  839 01:50:53.709609    PCI: 00:15.3: enabled 0

  840 01:50:53.712815    PCI: 00:16.0: enabled 1

  841 01:50:53.712900    PCI: 00:16.1: enabled 0

  842 01:50:53.715876    PCI: 00:16.2: enabled 0

  843 01:50:53.719609    PCI: 00:16.3: enabled 0

  844 01:50:53.722875    PCI: 00:16.4: enabled 0

  845 01:50:53.725887    PCI: 00:16.5: enabled 0

  846 01:50:53.725972    PCI: 00:17.0: enabled 1

  847 01:50:53.729101    PCI: 00:19.0: enabled 1

  848 01:50:53.732668     I2C: 00:1a: enabled 1

  849 01:50:53.735959     I2C: 00:38: enabled 1

  850 01:50:53.739122     I2C: 00:39: enabled 1

  851 01:50:53.739234     I2C: 00:3a: enabled 1

  852 01:50:53.742603     I2C: 00:3b: enabled 1

  853 01:50:53.746197    PCI: 00:19.1: enabled 0

  854 01:50:53.749001    PCI: 00:19.2: enabled 0

  855 01:50:53.749128    PCI: 00:1a.0: enabled 0

  856 01:50:53.752382    PCI: 00:1c.0: enabled 0

  857 01:50:53.755763    PCI: 00:1c.1: enabled 0

  858 01:50:53.759017    PCI: 00:1c.2: enabled 0

  859 01:50:53.762573    PCI: 00:1c.3: enabled 0

  860 01:50:53.762658    PCI: 00:1c.4: enabled 0

  861 01:50:53.766004    PCI: 00:1c.5: enabled 0

  862 01:50:53.769019    PCI: 00:1c.6: enabled 0

  863 01:50:53.772060    PCI: 00:1c.7: enabled 0

  864 01:50:53.775858    PCI: 00:1d.0: enabled 1

  865 01:50:53.775942    PCI: 00:1d.1: enabled 0

  866 01:50:53.778806    PCI: 00:1d.2: enabled 0

  867 01:50:53.781998    PCI: 00:1d.3: enabled 0

  868 01:50:53.785870    PCI: 00:1d.4: enabled 0

  869 01:50:53.789261    PCI: 00:1d.5: enabled 1

  870 01:50:53.789347     PCI: 00:00.0: enabled 1

  871 01:50:53.792026    PCI: 00:1e.0: enabled 1

  872 01:50:53.795447    PCI: 00:1e.1: enabled 0

  873 01:50:53.798843    PCI: 00:1e.2: enabled 1

  874 01:50:53.798927     SPI: 00: enabled 1

  875 01:50:53.802270    PCI: 00:1e.3: enabled 1

  876 01:50:53.805504     SPI: 01: enabled 1

  877 01:50:53.808608    PCI: 00:1f.0: enabled 1

  878 01:50:53.808693     PNP: 0c09.0: enabled 1

  879 01:50:53.812197    PCI: 00:1f.1: enabled 1

  880 01:50:53.815502    PCI: 00:1f.2: enabled 1

  881 01:50:53.818742    PCI: 00:1f.3: enabled 1

  882 01:50:53.821691    PCI: 00:1f.4: enabled 1

  883 01:50:53.821776    PCI: 00:1f.5: enabled 1

  884 01:50:53.825330    PCI: 00:1f.6: enabled 0

  885 01:50:53.828738  Root Device scanning...

  886 01:50:53.831941  scan_static_bus for Root Device

  887 01:50:53.835118  CPU_CLUSTER: 0 enabled

  888 01:50:53.835202  DOMAIN: 0000 enabled

  889 01:50:53.838632  DOMAIN: 0000 scanning...

  890 01:50:53.841768  PCI: pci_scan_bus for bus 00

  891 01:50:53.845192  PCI: 00:00.0 [8086/0000] ops

  892 01:50:53.848519  PCI: 00:00.0 [8086/9b61] enabled

  893 01:50:53.851866  PCI: 00:02.0 [8086/0000] bus ops

  894 01:50:53.855241  PCI: 00:02.0 [8086/9b41] enabled

  895 01:50:53.858705  PCI: 00:04.0 [8086/1903] disabled

  896 01:50:53.862182  PCI: 00:08.0 [8086/1911] enabled

  897 01:50:53.865031  PCI: 00:12.0 [8086/02f9] enabled

  898 01:50:53.868625  PCI: 00:14.0 [8086/0000] bus ops

  899 01:50:53.872219  PCI: 00:14.0 [8086/02ed] enabled

  900 01:50:53.874951  PCI: 00:14.2 [8086/02ef] enabled

  901 01:50:53.878643  PCI: 00:14.3 [8086/02f0] enabled

  902 01:50:53.881968  PCI: 00:15.0 [8086/0000] bus ops

  903 01:50:53.885066  PCI: 00:15.0 [8086/02e8] enabled

  904 01:50:53.888215  PCI: 00:15.1 [8086/0000] bus ops

  905 01:50:53.891879  PCI: 00:15.1 [8086/02e9] enabled

  906 01:50:53.895022  PCI: 00:16.0 [8086/0000] ops

  907 01:50:53.898365  PCI: 00:16.0 [8086/02e0] enabled

  908 01:50:53.901720  PCI: 00:17.0 [8086/0000] ops

  909 01:50:53.905032  PCI: 00:17.0 [8086/02d3] enabled

  910 01:50:53.908652  PCI: 00:19.0 [8086/0000] bus ops

  911 01:50:53.911784  PCI: 00:19.0 [8086/02c5] enabled

  912 01:50:53.915028  PCI: 00:1d.0 [8086/0000] bus ops

  913 01:50:53.918111  PCI: 00:1d.0 [8086/02b0] enabled

  914 01:50:53.924957  PCI: Static device PCI: 00:1d.5 not found, disabling it.

  915 01:50:53.925053  PCI: 00:1e.0 [8086/0000] ops

  916 01:50:53.928362  PCI: 00:1e.0 [8086/02a8] enabled

  917 01:50:53.931819  PCI: 00:1e.2 [8086/0000] bus ops

  918 01:50:53.934847  PCI: 00:1e.2 [8086/02aa] enabled

  919 01:50:53.938327  PCI: 00:1e.3 [8086/0000] bus ops

  920 01:50:53.941827  PCI: 00:1e.3 [8086/02ab] enabled

  921 01:50:53.945111  PCI: 00:1f.0 [8086/0000] bus ops

  922 01:50:53.948414  PCI: 00:1f.0 [8086/0284] enabled

  923 01:50:53.954745  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  924 01:50:53.961389  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  925 01:50:53.964745  PCI: 00:1f.3 [8086/0000] bus ops

  926 01:50:53.967705  PCI: 00:1f.3 [8086/02c8] enabled

  927 01:50:53.971182  PCI: 00:1f.4 [8086/0000] bus ops

  928 01:50:53.974461  PCI: 00:1f.4 [8086/02a3] enabled

  929 01:50:53.977889  PCI: 00:1f.5 [8086/0000] bus ops

  930 01:50:53.981291  PCI: 00:1f.5 [8086/02a4] enabled

  931 01:50:53.984740  PCI: Leftover static devices:

  932 01:50:53.984825  PCI: 00:05.0

  933 01:50:53.988014  PCI: 00:12.5

  934 01:50:53.988096  PCI: 00:12.6

  935 01:50:53.988162  PCI: 00:14.1

  936 01:50:53.991500  PCI: 00:14.5

  937 01:50:53.991575  PCI: 00:15.2

  938 01:50:53.994874  PCI: 00:15.3

  939 01:50:53.994958  PCI: 00:16.1

  940 01:50:53.995024  PCI: 00:16.2

  941 01:50:53.998036  PCI: 00:16.3

  942 01:50:53.998149  PCI: 00:16.4

  943 01:50:54.001053  PCI: 00:16.5

  944 01:50:54.001137  PCI: 00:19.1

  945 01:50:54.004893  PCI: 00:19.2

  946 01:50:54.004976  PCI: 00:1a.0

  947 01:50:54.005043  PCI: 00:1c.0

  948 01:50:54.008080  PCI: 00:1c.1

  949 01:50:54.008258  PCI: 00:1c.2

  950 01:50:54.011485  PCI: 00:1c.3

  951 01:50:54.011594  PCI: 00:1c.4

  952 01:50:54.011700  PCI: 00:1c.5

  953 01:50:54.014237  PCI: 00:1c.6

  954 01:50:54.014358  PCI: 00:1c.7

  955 01:50:54.017605  PCI: 00:1d.1

  956 01:50:54.017689  PCI: 00:1d.2

  957 01:50:54.017755  PCI: 00:1d.3

  958 01:50:54.021595  PCI: 00:1d.4

  959 01:50:54.021678  PCI: 00:1d.5

  960 01:50:54.024856  PCI: 00:1e.1

  961 01:50:54.024970  PCI: 00:1f.1

  962 01:50:54.028038  PCI: 00:1f.2

  963 01:50:54.028123  PCI: 00:1f.6

  964 01:50:54.031091  PCI: Check your devicetree.cb.

  965 01:50:54.034313  PCI: 00:02.0 scanning...

  966 01:50:54.037736  scan_generic_bus for PCI: 00:02.0

  967 01:50:54.040979  scan_generic_bus for PCI: 00:02.0 done

  968 01:50:54.047977  scan_bus: scanning of bus PCI: 00:02.0 took 10196 usecs

  969 01:50:54.048072  PCI: 00:14.0 scanning...

  970 01:50:54.050695  scan_static_bus for PCI: 00:14.0

  971 01:50:54.054036  USB0 port 0 enabled

  972 01:50:54.057222  USB0 port 0 scanning...

  973 01:50:54.061012  scan_static_bus for USB0 port 0

  974 01:50:54.064059  USB2 port 0 enabled

  975 01:50:54.064148  USB2 port 1 enabled

  976 01:50:54.067451  USB2 port 2 disabled

  977 01:50:54.067538  USB2 port 3 disabled

  978 01:50:54.070955  USB2 port 5 disabled

  979 01:50:54.074304  USB2 port 6 enabled

  980 01:50:54.074391  USB2 port 9 enabled

  981 01:50:54.077709  USB3 port 0 enabled

  982 01:50:54.081092  USB3 port 1 enabled

  983 01:50:54.081179  USB3 port 2 enabled

  984 01:50:54.084426  USB3 port 3 enabled

  985 01:50:54.084511  USB3 port 4 disabled

  986 01:50:54.087254  USB2 port 0 scanning...

  987 01:50:54.090441  scan_static_bus for USB2 port 0

  988 01:50:54.093761  scan_static_bus for USB2 port 0 done

  989 01:50:54.100534  scan_bus: scanning of bus USB2 port 0 took 9692 usecs

  990 01:50:54.103763  USB2 port 1 scanning...

  991 01:50:54.107018  scan_static_bus for USB2 port 1

  992 01:50:54.110712  scan_static_bus for USB2 port 1 done

  993 01:50:54.114097  scan_bus: scanning of bus USB2 port 1 took 9689 usecs

  994 01:50:54.117685  USB2 port 6 scanning...

  995 01:50:54.120896  scan_static_bus for USB2 port 6

  996 01:50:54.124195  scan_static_bus for USB2 port 6 done

  997 01:50:54.130454  scan_bus: scanning of bus USB2 port 6 took 9699 usecs

  998 01:50:54.133831  USB2 port 9 scanning...

  999 01:50:54.137031  scan_static_bus for USB2 port 9

 1000 01:50:54.140930  scan_static_bus for USB2 port 9 done

 1001 01:50:54.144129  scan_bus: scanning of bus USB2 port 9 took 9698 usecs

 1002 01:50:54.147302  USB3 port 0 scanning...

 1003 01:50:54.150405  scan_static_bus for USB3 port 0

 1004 01:50:54.154189  scan_static_bus for USB3 port 0 done

 1005 01:50:54.160334  scan_bus: scanning of bus USB3 port 0 took 9700 usecs

 1006 01:50:54.164082  USB3 port 1 scanning...

 1007 01:50:54.167173  scan_static_bus for USB3 port 1

 1008 01:50:54.170307  scan_static_bus for USB3 port 1 done

 1009 01:50:54.176966  scan_bus: scanning of bus USB3 port 1 took 9699 usecs

 1010 01:50:54.177053  USB3 port 2 scanning...

 1011 01:50:54.180178  scan_static_bus for USB3 port 2

 1012 01:50:54.183741  scan_static_bus for USB3 port 2 done

 1013 01:50:54.190310  scan_bus: scanning of bus USB3 port 2 took 9705 usecs

 1014 01:50:54.193709  USB3 port 3 scanning...

 1015 01:50:54.196964  scan_static_bus for USB3 port 3

 1016 01:50:54.200500  scan_static_bus for USB3 port 3 done

 1017 01:50:54.207211  scan_bus: scanning of bus USB3 port 3 took 9696 usecs

 1018 01:50:54.210472  scan_static_bus for USB0 port 0 done

 1019 01:50:54.213620  scan_bus: scanning of bus USB0 port 0 took 155349 usecs

 1020 01:50:54.220263  scan_static_bus for PCI: 00:14.0 done

 1021 01:50:54.223544  scan_bus: scanning of bus PCI: 00:14.0 took 172973 usecs

 1022 01:50:54.226982  PCI: 00:15.0 scanning...

 1023 01:50:54.230403  scan_generic_bus for PCI: 00:15.0

 1024 01:50:54.233107  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled

 1025 01:50:54.239995  scan_generic_bus for PCI: 00:15.0 done

 1026 01:50:54.243226  scan_bus: scanning of bus PCI: 00:15.0 took 14291 usecs

 1027 01:50:54.246526  PCI: 00:15.1 scanning...

 1028 01:50:54.249663  scan_generic_bus for PCI: 00:15.1

 1029 01:50:54.253054  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled

 1030 01:50:54.259955  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled

 1031 01:50:54.263265  scan_generic_bus for PCI: 00:15.1 done

 1032 01:50:54.266731  scan_bus: scanning of bus PCI: 00:15.1 took 18602 usecs

 1033 01:50:54.269870  PCI: 00:19.0 scanning...

 1034 01:50:54.273173  scan_generic_bus for PCI: 00:19.0

 1035 01:50:54.279883  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled

 1036 01:50:54.282994  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled

 1037 01:50:54.286141  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled

 1038 01:50:54.289771  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled

 1039 01:50:54.296036  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled

 1040 01:50:54.299283  scan_generic_bus for PCI: 00:19.0 done

 1041 01:50:54.302617  scan_bus: scanning of bus PCI: 00:19.0 took 30736 usecs

 1042 01:50:54.305986  PCI: 00:1d.0 scanning...

 1043 01:50:54.309378  do_pci_scan_bridge for PCI: 00:1d.0

 1044 01:50:54.312911  PCI: pci_scan_bus for bus 01

 1045 01:50:54.316305  PCI: 01:00.0 [1c5c/1327] enabled

 1046 01:50:54.319732  Enabling Common Clock Configuration

 1047 01:50:54.326327  L1 Sub-State supported from root port 29

 1048 01:50:54.326413  L1 Sub-State Support = 0xf

 1049 01:50:54.329620  CommonModeRestoreTime = 0x28

 1050 01:50:54.335896  Power On Value = 0x16, Power On Scale = 0x0

 1051 01:50:54.335984  ASPM: Enabled L1

 1052 01:50:54.342915  scan_bus: scanning of bus PCI: 00:1d.0 took 32783 usecs

 1053 01:50:54.346257  PCI: 00:1e.2 scanning...

 1054 01:50:54.349726  scan_generic_bus for PCI: 00:1e.2

 1055 01:50:54.352429  bus: PCI: 00:1e.2[0]->SPI: 00 enabled

 1056 01:50:54.355646  scan_generic_bus for PCI: 00:1e.2 done

 1057 01:50:54.362853  scan_bus: scanning of bus PCI: 00:1e.2 took 13992 usecs

 1058 01:50:54.362940  PCI: 00:1e.3 scanning...

 1059 01:50:54.369799  scan_generic_bus for PCI: 00:1e.3

 1060 01:50:54.373261  bus: PCI: 00:1e.3[0]->SPI: 01 enabled

 1061 01:50:54.376158  scan_generic_bus for PCI: 00:1e.3 done

 1062 01:50:54.382817  scan_bus: scanning of bus PCI: 00:1e.3 took 14008 usecs

 1063 01:50:54.382932  PCI: 00:1f.0 scanning...

 1064 01:50:54.386372  scan_static_bus for PCI: 00:1f.0

 1065 01:50:54.390107  PNP: 0c09.0 enabled

 1066 01:50:54.392498  scan_static_bus for PCI: 00:1f.0 done

 1067 01:50:54.399593  scan_bus: scanning of bus PCI: 00:1f.0 took 12050 usecs

 1068 01:50:54.402944  PCI: 00:1f.3 scanning...

 1069 01:50:54.405863  scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs

 1070 01:50:54.409459  PCI: 00:1f.4 scanning...

 1071 01:50:54.412711  scan_generic_bus for PCI: 00:1f.4

 1072 01:50:54.416219  scan_generic_bus for PCI: 00:1f.4 done

 1073 01:50:54.422481  scan_bus: scanning of bus PCI: 00:1f.4 took 10191 usecs

 1074 01:50:54.425997  PCI: 00:1f.5 scanning...

 1075 01:50:54.429216  scan_generic_bus for PCI: 00:1f.5

 1076 01:50:54.432876  scan_generic_bus for PCI: 00:1f.5 done

 1077 01:50:54.439229  scan_bus: scanning of bus PCI: 00:1f.5 took 10196 usecs

 1078 01:50:54.445840  scan_bus: scanning of bus DOMAIN: 0000 took 605071 usecs

 1079 01:50:54.449222  scan_static_bus for Root Device done

 1080 01:50:54.452758  scan_bus: scanning of bus Root Device took 624945 usecs

 1081 01:50:54.455587  done

 1082 01:50:54.455709  Chrome EC: UHEPI supported

 1083 01:50:54.462307  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

 1084 01:50:54.469302  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1085 01:50:54.475532  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

 1086 01:50:54.482943  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)

 1087 01:50:54.485541  SPI flash protection: WPSW=0 SRP0=0

 1088 01:50:54.492447  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1089 01:50:54.495854  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2

 1090 01:50:54.499327  found VGA at PCI: 00:02.0

 1091 01:50:54.502623  Setting up VGA for PCI: 00:02.0

 1092 01:50:54.505976  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1093 01:50:54.512627  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1094 01:50:54.515836  Allocating resources...

 1095 01:50:54.515949  Reading resources...

 1096 01:50:54.522221  Root Device read_resources bus 0 link: 0

 1097 01:50:54.525701  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1098 01:50:54.531897  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1099 01:50:54.535260  DOMAIN: 0000 read_resources bus 0 link: 0

 1100 01:50:54.542419  PCI: 00:14.0 read_resources bus 0 link: 0

 1101 01:50:54.545133  USB0 port 0 read_resources bus 0 link: 0

 1102 01:50:54.553076  USB0 port 0 read_resources bus 0 link: 0 done

 1103 01:50:54.556435  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1104 01:50:54.563809  PCI: 00:15.0 read_resources bus 1 link: 0

 1105 01:50:54.567175  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1106 01:50:54.573685  PCI: 00:15.1 read_resources bus 2 link: 0

 1107 01:50:54.576871  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1108 01:50:54.584760  PCI: 00:19.0 read_resources bus 3 link: 0

 1109 01:50:54.591358  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1110 01:50:54.594400  PCI: 00:1d.0 read_resources bus 1 link: 0

 1111 01:50:54.600972  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1112 01:50:54.604349  PCI: 00:1e.2 read_resources bus 4 link: 0

 1113 01:50:54.611570  PCI: 00:1e.2 read_resources bus 4 link: 0 done

 1114 01:50:54.614675  PCI: 00:1e.3 read_resources bus 5 link: 0

 1115 01:50:54.621968  PCI: 00:1e.3 read_resources bus 5 link: 0 done

 1116 01:50:54.624420  PCI: 00:1f.0 read_resources bus 0 link: 0

 1117 01:50:54.631334  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1118 01:50:54.637666  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1119 01:50:54.641354  Root Device read_resources bus 0 link: 0 done

 1120 01:50:54.644639  Done reading resources.

 1121 01:50:54.648047  Show resources in subtree (Root Device)...After reading.

 1122 01:50:54.654475   Root Device child on link 0 CPU_CLUSTER: 0

 1123 01:50:54.657784    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1124 01:50:54.657869     APIC: 00

 1125 01:50:54.661161     APIC: 02

 1126 01:50:54.661244     APIC: 06

 1127 01:50:54.664497     APIC: 01

 1128 01:50:54.664608     APIC: 03

 1129 01:50:54.664702     APIC: 07

 1130 01:50:54.667966     APIC: 05

 1131 01:50:54.668050     APIC: 04

 1132 01:50:54.671271    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1133 01:50:54.681028    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1134 01:50:54.734081    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1135 01:50:54.734755     PCI: 00:00.0

 1136 01:50:54.735056     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1137 01:50:54.735348     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1138 01:50:54.735461     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1139 01:50:54.736119     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1140 01:50:54.783435     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1141 01:50:54.783936     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1142 01:50:54.784029     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1143 01:50:54.784957     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1144 01:50:54.785249     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1145 01:50:54.796451     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1146 01:50:54.796779     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1147 01:50:54.806503     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1148 01:50:54.815848     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1149 01:50:54.825700     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1150 01:50:54.832638     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1151 01:50:54.842448     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1152 01:50:54.845540     PCI: 00:02.0

 1153 01:50:54.856020     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1154 01:50:54.865957     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1155 01:50:54.872498     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1156 01:50:54.875773     PCI: 00:04.0

 1157 01:50:54.875846     PCI: 00:08.0

 1158 01:50:54.885738     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1159 01:50:54.889004     PCI: 00:12.0

 1160 01:50:54.898979     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1161 01:50:54.902082     PCI: 00:14.0 child on link 0 USB0 port 0

 1162 01:50:54.912169     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1163 01:50:54.918815      USB0 port 0 child on link 0 USB2 port 0

 1164 01:50:54.918919       USB2 port 0

 1165 01:50:54.922063       USB2 port 1

 1166 01:50:54.922138       USB2 port 2

 1167 01:50:54.925358       USB2 port 3

 1168 01:50:54.925434       USB2 port 5

 1169 01:50:54.928892       USB2 port 6

 1170 01:50:54.928988       USB2 port 9

 1171 01:50:54.931705       USB3 port 0

 1172 01:50:54.931776       USB3 port 1

 1173 01:50:54.934909       USB3 port 2

 1174 01:50:54.935007       USB3 port 3

 1175 01:50:54.938902       USB3 port 4

 1176 01:50:54.938997     PCI: 00:14.2

 1177 01:50:54.948620     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1178 01:50:54.958544     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1179 01:50:54.961342     PCI: 00:14.3

 1180 01:50:54.971529     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1181 01:50:54.974693     PCI: 00:15.0 child on link 0 I2C: 01:15

 1182 01:50:54.984593     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1183 01:50:54.987962      I2C: 01:15

 1184 01:50:54.991452     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1185 01:50:55.001657     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1186 01:50:55.001763      I2C: 02:5d

 1187 01:50:55.004960      GENERIC: 0.0

 1188 01:50:55.005037     PCI: 00:16.0

 1189 01:50:55.014652     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1190 01:50:55.018101     PCI: 00:17.0

 1191 01:50:55.028354     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1192 01:50:55.034856     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1193 01:50:55.044370     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1194 01:50:55.051219     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1195 01:50:55.061018     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1196 01:50:55.071394     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1197 01:50:55.074715     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1198 01:50:55.084485     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1199 01:50:55.084598      I2C: 03:1a

 1200 01:50:55.087999      I2C: 03:38

 1201 01:50:55.088105      I2C: 03:39

 1202 01:50:55.090695      I2C: 03:3a

 1203 01:50:55.090799      I2C: 03:3b

 1204 01:50:55.097631     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1205 01:50:55.104188     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1206 01:50:55.113838     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1207 01:50:55.124313     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1208 01:50:55.124427      PCI: 01:00.0

 1209 01:50:55.133984      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1210 01:50:55.137077     PCI: 00:1e.0

 1211 01:50:55.147032     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1212 01:50:55.157011     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1213 01:50:55.163817     PCI: 00:1e.2 child on link 0 SPI: 00

 1214 01:50:55.173715     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1215 01:50:55.173839      SPI: 00

 1216 01:50:55.176731     PCI: 00:1e.3 child on link 0 SPI: 01

 1217 01:50:55.187197     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1218 01:50:55.187286      SPI: 01

 1219 01:50:55.193662     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1220 01:50:55.199846     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1221 01:50:55.210277     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1222 01:50:55.213534      PNP: 0c09.0

 1223 01:50:55.219790      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1224 01:50:55.223105     PCI: 00:1f.3

 1225 01:50:55.233386     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1226 01:50:55.243006     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1227 01:50:55.243124     PCI: 00:1f.4

 1228 01:50:55.253425     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1229 01:50:55.262819     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1230 01:50:55.262935     PCI: 00:1f.5

 1231 01:50:55.272936     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1232 01:50:55.279838  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1233 01:50:55.286755  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1234 01:50:55.293155  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1235 01:50:55.296353  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1236 01:50:55.299658  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1237 01:50:55.302832  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1238 01:50:55.307066  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1239 01:50:55.312801  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1240 01:50:55.319676  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1241 01:50:55.329310  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1242 01:50:55.335932  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1243 01:50:55.343018  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1244 01:50:55.349187  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1245 01:50:55.355716  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1246 01:50:55.359421  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1247 01:50:55.365834  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1248 01:50:55.369412  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem

 1249 01:50:55.375734  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem

 1250 01:50:55.379015  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem

 1251 01:50:55.385897  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem

 1252 01:50:55.389250  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem

 1253 01:50:55.395732  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem

 1254 01:50:55.398756  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem

 1255 01:50:55.405243  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem

 1256 01:50:55.409063  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem

 1257 01:50:55.415344  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem

 1258 01:50:55.418476  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem

 1259 01:50:55.425326  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem

 1260 01:50:55.428671  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem

 1261 01:50:55.432028  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem

 1262 01:50:55.438753  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem

 1263 01:50:55.441987  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem

 1264 01:50:55.448264  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem

 1265 01:50:55.451766  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem

 1266 01:50:55.458764  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem

 1267 01:50:55.462041  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem

 1268 01:50:55.468277  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem

 1269 01:50:55.475134  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done

 1270 01:50:55.478364  avoid_fixed_resources: DOMAIN: 0000

 1271 01:50:55.485180  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1272 01:50:55.491246  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1273 01:50:55.498337  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1274 01:50:55.508052  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)

 1275 01:50:55.515016  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)

 1276 01:50:55.521060  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)

 1277 01:50:55.531124  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)

 1278 01:50:55.537678  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1279 01:50:55.544411  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1280 01:50:55.554434  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1281 01:50:55.560745  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1282 01:50:55.567723  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1283 01:50:55.571107  Setting resources...

 1284 01:50:55.574342  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1285 01:50:55.580527  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1286 01:50:55.583976  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1287 01:50:55.587213  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1288 01:50:55.590822  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1289 01:50:55.597535  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1290 01:50:55.603670  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1291 01:50:55.610440  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1292 01:50:55.617234  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff

 1293 01:50:55.624234  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1294 01:50:55.627212  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1295 01:50:55.633881  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1296 01:50:55.637049  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem

 1297 01:50:55.643896  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem

 1298 01:50:55.647047  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem

 1299 01:50:55.653481  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem

 1300 01:50:55.656767  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem

 1301 01:50:55.663997  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem

 1302 01:50:55.666813  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem

 1303 01:50:55.673743  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem

 1304 01:50:55.677166  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem

 1305 01:50:55.679923  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem

 1306 01:50:55.687117  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem

 1307 01:50:55.690377  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem

 1308 01:50:55.696463  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem

 1309 01:50:55.699890  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem

 1310 01:50:55.706458  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem

 1311 01:50:55.709837  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem

 1312 01:50:55.716582  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem

 1313 01:50:55.719961  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem

 1314 01:50:55.726202  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem

 1315 01:50:55.730162  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem

 1316 01:50:55.736077  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done

 1317 01:50:55.746199  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1318 01:50:55.752777  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1319 01:50:55.759238  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1320 01:50:55.766514  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem

 1321 01:50:55.772744  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done

 1322 01:50:55.776094  Root Device assign_resources, bus 0 link: 0

 1323 01:50:55.782953  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1324 01:50:55.789202  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1325 01:50:55.799738  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1326 01:50:55.806279  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1327 01:50:55.813042  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64

 1328 01:50:55.822562  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64

 1329 01:50:55.829738  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64

 1330 01:50:55.835702  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1331 01:50:55.839036  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1332 01:50:55.848994  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64

 1333 01:50:55.855991  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64

 1334 01:50:55.865900  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64

 1335 01:50:55.872613  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64

 1336 01:50:55.879260  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1337 01:50:55.882026  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1338 01:50:55.891766  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64

 1339 01:50:55.895090  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1340 01:50:55.898474  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1341 01:50:55.908691  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64

 1342 01:50:55.915369  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem

 1343 01:50:55.924987  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem

 1344 01:50:55.931590  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1345 01:50:55.938172  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1346 01:50:55.948180  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1347 01:50:55.954953  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem

 1348 01:50:55.961708  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64

 1349 01:50:55.968366  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1350 01:50:55.971089  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1351 01:50:55.981145  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1352 01:50:55.991245  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1353 01:50:55.997513  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1354 01:50:56.004463  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1355 01:50:56.010562  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64

 1356 01:50:56.014022  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1357 01:50:56.024287  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64

 1358 01:50:56.031170  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64

 1359 01:50:56.037766  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1360 01:50:56.041152  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1361 01:50:56.051031  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64

 1362 01:50:56.053882  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1363 01:50:56.060871  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1364 01:50:56.063875  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1365 01:50:56.070630  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1366 01:50:56.073820  LPC: Trying to open IO window from 800 size 1ff

 1367 01:50:56.080389  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64

 1368 01:50:56.090304  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64

 1369 01:50:56.097036  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64

 1370 01:50:56.107251  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem

 1371 01:50:56.110044  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1372 01:50:56.116830  Root Device assign_resources, bus 0 link: 0

 1373 01:50:56.116914  Done setting resources.

 1374 01:50:56.123480  Show resources in subtree (Root Device)...After assigning values.

 1375 01:50:56.130177   Root Device child on link 0 CPU_CLUSTER: 0

 1376 01:50:56.133411    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1377 01:50:56.133491     APIC: 00

 1378 01:50:56.136787     APIC: 02

 1379 01:50:56.136859     APIC: 06

 1380 01:50:56.140263     APIC: 01

 1381 01:50:56.140341     APIC: 03

 1382 01:50:56.140404     APIC: 07

 1383 01:50:56.143659     APIC: 05

 1384 01:50:56.143731     APIC: 04

 1385 01:50:56.147171    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1386 01:50:56.156555    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1387 01:50:56.169655    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1388 01:50:56.169769     PCI: 00:00.0

 1389 01:50:56.179594     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1390 01:50:56.189493     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1391 01:50:56.199634     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1392 01:50:56.209383     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1393 01:50:56.215815     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1394 01:50:56.225834     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1395 01:50:56.235861     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1396 01:50:56.245848     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1397 01:50:56.255476     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1398 01:50:56.262188     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1399 01:50:56.272112     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1400 01:50:56.281667     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1401 01:50:56.292155     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1402 01:50:56.301774     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1403 01:50:56.311382     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1404 01:50:56.321414     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1405 01:50:56.321521     PCI: 00:02.0

 1406 01:50:56.331792     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1407 01:50:56.344824     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1408 01:50:56.351320     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1409 01:50:56.354797     PCI: 00:04.0

 1410 01:50:56.354877     PCI: 00:08.0

 1411 01:50:56.364210     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10

 1412 01:50:56.367789     PCI: 00:12.0

 1413 01:50:56.377780     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10

 1414 01:50:56.380905     PCI: 00:14.0 child on link 0 USB0 port 0

 1415 01:50:56.394466     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10

 1416 01:50:56.397653      USB0 port 0 child on link 0 USB2 port 0

 1417 01:50:56.397738       USB2 port 0

 1418 01:50:56.400593       USB2 port 1

 1419 01:50:56.400670       USB2 port 2

 1420 01:50:56.404394       USB2 port 3

 1421 01:50:56.407417       USB2 port 5

 1422 01:50:56.407492       USB2 port 6

 1423 01:50:56.411029       USB2 port 9

 1424 01:50:56.411108       USB3 port 0

 1425 01:50:56.413954       USB3 port 1

 1426 01:50:56.414034       USB3 port 2

 1427 01:50:56.417202       USB3 port 3

 1428 01:50:56.417282       USB3 port 4

 1429 01:50:56.420925     PCI: 00:14.2

 1430 01:50:56.430327     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10

 1431 01:50:56.440416     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18

 1432 01:50:56.440510     PCI: 00:14.3

 1433 01:50:56.453654     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10

 1434 01:50:56.456948     PCI: 00:15.0 child on link 0 I2C: 01:15

 1435 01:50:56.467356     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10

 1436 01:50:56.467438      I2C: 01:15

 1437 01:50:56.473682     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1438 01:50:56.483329     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10

 1439 01:50:56.483440      I2C: 02:5d

 1440 01:50:56.486627      GENERIC: 0.0

 1441 01:50:56.486705     PCI: 00:16.0

 1442 01:50:56.500079     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10

 1443 01:50:56.500173     PCI: 00:17.0

 1444 01:50:56.510205     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10

 1445 01:50:56.519788     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14

 1446 01:50:56.529855     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1447 01:50:56.539506     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1448 01:50:56.546320     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1449 01:50:56.559494     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24

 1450 01:50:56.562743     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1451 01:50:56.573022     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10

 1452 01:50:56.573144      I2C: 03:1a

 1453 01:50:56.576424      I2C: 03:38

 1454 01:50:56.576534      I2C: 03:39

 1455 01:50:56.579281      I2C: 03:3a

 1456 01:50:56.579393      I2C: 03:3b

 1457 01:50:56.585541     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1458 01:50:56.592496     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1459 01:50:56.602732     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1460 01:50:56.615568     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1461 01:50:56.615688      PCI: 01:00.0

 1462 01:50:56.625629      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10

 1463 01:50:56.628937     PCI: 00:1e.0

 1464 01:50:56.639084     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1465 01:50:56.649033     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18

 1466 01:50:56.655266     PCI: 00:1e.2 child on link 0 SPI: 00

 1467 01:50:56.665373     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10

 1468 01:50:56.665463      SPI: 00

 1469 01:50:56.668485     PCI: 00:1e.3 child on link 0 SPI: 01

 1470 01:50:56.678490     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10

 1471 01:50:56.681886      SPI: 01

 1472 01:50:56.685357     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1473 01:50:56.694857     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1474 01:50:56.701935     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1475 01:50:56.704666      PNP: 0c09.0

 1476 01:50:56.714329      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1477 01:50:56.714433     PCI: 00:1f.3

 1478 01:50:56.724188     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10

 1479 01:50:56.734447     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20

 1480 01:50:56.737641     PCI: 00:1f.4

 1481 01:50:56.747392     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1482 01:50:56.757789     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10

 1483 01:50:56.757909     PCI: 00:1f.5

 1484 01:50:56.767578     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10

 1485 01:50:56.770723  Done allocating resources.

 1486 01:50:56.777333  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0

 1487 01:50:56.780195  Enabling resources...

 1488 01:50:56.783705  PCI: 00:00.0 subsystem <- 8086/9b61

 1489 01:50:56.787378  PCI: 00:00.0 cmd <- 06

 1490 01:50:56.790813  PCI: 00:02.0 subsystem <- 8086/9b41

 1491 01:50:56.793713  PCI: 00:02.0 cmd <- 03

 1492 01:50:56.793788  PCI: 00:08.0 cmd <- 06

 1493 01:50:56.800566  PCI: 00:12.0 subsystem <- 8086/02f9

 1494 01:50:56.800644  PCI: 00:12.0 cmd <- 02

 1495 01:50:56.803958  PCI: 00:14.0 subsystem <- 8086/02ed

 1496 01:50:56.806756  PCI: 00:14.0 cmd <- 02

 1497 01:50:56.810191  PCI: 00:14.2 cmd <- 02

 1498 01:50:56.813638  PCI: 00:14.3 subsystem <- 8086/02f0

 1499 01:50:56.817128  PCI: 00:14.3 cmd <- 02

 1500 01:50:56.820599  PCI: 00:15.0 subsystem <- 8086/02e8

 1501 01:50:56.823269  PCI: 00:15.0 cmd <- 02

 1502 01:50:56.827234  PCI: 00:15.1 subsystem <- 8086/02e9

 1503 01:50:56.829950  PCI: 00:15.1 cmd <- 02

 1504 01:50:56.833542  PCI: 00:16.0 subsystem <- 8086/02e0

 1505 01:50:56.836722  PCI: 00:16.0 cmd <- 02

 1506 01:50:56.839956  PCI: 00:17.0 subsystem <- 8086/02d3

 1507 01:50:56.840032  PCI: 00:17.0 cmd <- 03

 1508 01:50:56.846718  PCI: 00:19.0 subsystem <- 8086/02c5

 1509 01:50:56.846804  PCI: 00:19.0 cmd <- 02

 1510 01:50:56.850223  PCI: 00:1d.0 bridge ctrl <- 0013

 1511 01:50:56.856667  PCI: 00:1d.0 subsystem <- 8086/02b0

 1512 01:50:56.856749  PCI: 00:1d.0 cmd <- 06

 1513 01:50:56.859847  PCI: 00:1e.0 subsystem <- 8086/02a8

 1514 01:50:56.863076  PCI: 00:1e.0 cmd <- 06

 1515 01:50:56.866521  PCI: 00:1e.2 subsystem <- 8086/02aa

 1516 01:50:56.869940  PCI: 00:1e.2 cmd <- 06

 1517 01:50:56.873200  PCI: 00:1e.3 subsystem <- 8086/02ab

 1518 01:50:56.876544  PCI: 00:1e.3 cmd <- 02

 1519 01:50:56.880041  PCI: 00:1f.0 subsystem <- 8086/0284

 1520 01:50:56.883329  PCI: 00:1f.0 cmd <- 407

 1521 01:50:56.886722  PCI: 00:1f.3 subsystem <- 8086/02c8

 1522 01:50:56.889680  PCI: 00:1f.3 cmd <- 02

 1523 01:50:56.893265  PCI: 00:1f.4 subsystem <- 8086/02a3

 1524 01:50:56.896334  PCI: 00:1f.4 cmd <- 03

 1525 01:50:56.899458  PCI: 00:1f.5 subsystem <- 8086/02a4

 1526 01:50:56.902706  PCI: 00:1f.5 cmd <- 406

 1527 01:50:56.910461  PCI: 01:00.0 cmd <- 02

 1528 01:50:56.915238  done.

 1529 01:50:56.928987  ME: Version: 14.0.39.1367

 1530 01:50:56.935811  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13

 1531 01:50:56.938645  Initializing devices...

 1532 01:50:56.938747  Root Device init ...

 1533 01:50:56.945525  Chrome EC: Set SMI mask to 0x0000000000000000

 1534 01:50:56.948960  Chrome EC: clear events_b mask to 0x0000000000000000

 1535 01:50:56.955551  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1536 01:50:56.961897  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006

 1537 01:50:56.969131  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006

 1538 01:50:56.972102  Chrome EC: Set WAKE mask to 0x0000000000000000

 1539 01:50:56.975441  Root Device init finished in 35158 usecs

 1540 01:50:56.978548  CPU_CLUSTER: 0 init ...

 1541 01:50:56.985293  CPU_CLUSTER: 0 init finished in 2447 usecs

 1542 01:50:56.989324  PCI: 00:00.0 init ...

 1543 01:50:56.992909  CPU TDP: 15 Watts

 1544 01:50:56.996040  CPU PL2 = 64 Watts

 1545 01:50:56.999748  PCI: 00:00.0 init finished in 7079 usecs

 1546 01:50:57.003005  PCI: 00:02.0 init ...

 1547 01:50:57.006212  PCI: 00:02.0 init finished in 2253 usecs

 1548 01:50:57.009279  PCI: 00:08.0 init ...

 1549 01:50:57.012928  PCI: 00:08.0 init finished in 2251 usecs

 1550 01:50:57.016115  PCI: 00:12.0 init ...

 1551 01:50:57.019617  PCI: 00:12.0 init finished in 2251 usecs

 1552 01:50:57.023082  PCI: 00:14.0 init ...

 1553 01:50:57.025813  PCI: 00:14.0 init finished in 2251 usecs

 1554 01:50:57.029261  PCI: 00:14.2 init ...

 1555 01:50:57.032594  PCI: 00:14.2 init finished in 2241 usecs

 1556 01:50:57.036119  PCI: 00:14.3 init ...

 1557 01:50:57.039596  PCI: 00:14.3 init finished in 2270 usecs

 1558 01:50:57.043005  PCI: 00:15.0 init ...

 1559 01:50:57.045691  DW I2C bus 0 at 0xd121f000 (400 KHz)

 1560 01:50:57.049219  PCI: 00:15.0 init finished in 5975 usecs

 1561 01:50:57.052719  PCI: 00:15.1 init ...

 1562 01:50:57.056140  DW I2C bus 1 at 0xd1220000 (400 KHz)

 1563 01:50:57.059464  PCI: 00:15.1 init finished in 5975 usecs

 1564 01:50:57.062793  PCI: 00:16.0 init ...

 1565 01:50:57.066223  PCI: 00:16.0 init finished in 2251 usecs

 1566 01:50:57.070712  PCI: 00:19.0 init ...

 1567 01:50:57.073145  DW I2C bus 4 at 0xd1222000 (400 KHz)

 1568 01:50:57.079700  PCI: 00:19.0 init finished in 5976 usecs

 1569 01:50:57.079792  PCI: 00:1d.0 init ...

 1570 01:50:57.083155  Initializing PCH PCIe bridge.

 1571 01:50:57.086219  PCI: 00:1d.0 init finished in 5283 usecs

 1572 01:50:57.091246  PCI: 00:1f.0 init ...

 1573 01:50:57.094759  IOAPIC: Initializing IOAPIC at 0xfec00000

 1574 01:50:57.101049  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1575 01:50:57.101129  IOAPIC: ID = 0x02

 1576 01:50:57.104404  IOAPIC: Dumping registers

 1577 01:50:57.107932    reg 0x0000: 0x02000000

 1578 01:50:57.111374    reg 0x0001: 0x00770020

 1579 01:50:57.111458    reg 0x0002: 0x00000000

 1580 01:50:57.118514  PCI: 00:1f.0 init finished in 23522 usecs

 1581 01:50:57.121541  PCI: 00:1f.4 init ...

 1582 01:50:57.124653  PCI: 00:1f.4 init finished in 2262 usecs

 1583 01:50:57.135580  PCI: 01:00.0 init ...

 1584 01:50:57.138936  PCI: 01:00.0 init finished in 2253 usecs

 1585 01:50:57.142972  PNP: 0c09.0 init ...

 1586 01:50:57.146363  Google Chrome EC uptime: 11.092 seconds

 1587 01:50:57.153214  Google Chrome AP resets since EC boot: 0

 1588 01:50:57.156475  Google Chrome most recent AP reset causes:

 1589 01:50:57.162735  Google Chrome EC reset flags at last EC boot: reset-pin

 1590 01:50:57.166112  PNP: 0c09.0 init finished in 20595 usecs

 1591 01:50:57.169612  Devices initialized

 1592 01:50:57.173078  Show all devs... After init.

 1593 01:50:57.173193  Root Device: enabled 1

 1594 01:50:57.176545  CPU_CLUSTER: 0: enabled 1

 1595 01:50:57.179927  DOMAIN: 0000: enabled 1

 1596 01:50:57.180042  APIC: 00: enabled 1

 1597 01:50:57.182673  PCI: 00:00.0: enabled 1

 1598 01:50:57.186037  PCI: 00:02.0: enabled 1

 1599 01:50:57.189233  PCI: 00:04.0: enabled 0

 1600 01:50:57.189314  PCI: 00:05.0: enabled 0

 1601 01:50:57.192895  PCI: 00:12.0: enabled 1

 1602 01:50:57.195907  PCI: 00:12.5: enabled 0

 1603 01:50:57.196011  PCI: 00:12.6: enabled 0

 1604 01:50:57.199535  PCI: 00:14.0: enabled 1

 1605 01:50:57.202609  PCI: 00:14.1: enabled 0

 1606 01:50:57.206153  PCI: 00:14.3: enabled 1

 1607 01:50:57.206237  PCI: 00:14.5: enabled 0

 1608 01:50:57.209201  PCI: 00:15.0: enabled 1

 1609 01:50:57.212835  PCI: 00:15.1: enabled 1

 1610 01:50:57.215828  PCI: 00:15.2: enabled 0

 1611 01:50:57.215941  PCI: 00:15.3: enabled 0

 1612 01:50:57.219415  PCI: 00:16.0: enabled 1

 1613 01:50:57.222827  PCI: 00:16.1: enabled 0

 1614 01:50:57.226228  PCI: 00:16.2: enabled 0

 1615 01:50:57.226312  PCI: 00:16.3: enabled 0

 1616 01:50:57.228857  PCI: 00:16.4: enabled 0

 1617 01:50:57.232780  PCI: 00:16.5: enabled 0

 1618 01:50:57.235917  PCI: 00:17.0: enabled 1

 1619 01:50:57.236001  PCI: 00:19.0: enabled 1

 1620 01:50:57.239142  PCI: 00:19.1: enabled 0

 1621 01:50:57.242286  PCI: 00:19.2: enabled 0

 1622 01:50:57.242373  PCI: 00:1a.0: enabled 0

 1623 01:50:57.246383  PCI: 00:1c.0: enabled 0

 1624 01:50:57.248821  PCI: 00:1c.1: enabled 0

 1625 01:50:57.252112  PCI: 00:1c.2: enabled 0

 1626 01:50:57.252202  PCI: 00:1c.3: enabled 0

 1627 01:50:57.255515  PCI: 00:1c.4: enabled 0

 1628 01:50:57.258953  PCI: 00:1c.5: enabled 0

 1629 01:50:57.262617  PCI: 00:1c.6: enabled 0

 1630 01:50:57.262701  PCI: 00:1c.7: enabled 0

 1631 01:50:57.265422  PCI: 00:1d.0: enabled 1

 1632 01:50:57.268802  PCI: 00:1d.1: enabled 0

 1633 01:50:57.272220  PCI: 00:1d.2: enabled 0

 1634 01:50:57.272328  PCI: 00:1d.3: enabled 0

 1635 01:50:57.275754  PCI: 00:1d.4: enabled 0

 1636 01:50:57.278601  PCI: 00:1d.5: enabled 0

 1637 01:50:57.281974  PCI: 00:1e.0: enabled 1

 1638 01:50:57.282053  PCI: 00:1e.1: enabled 0

 1639 01:50:57.285445  PCI: 00:1e.2: enabled 1

 1640 01:50:57.288980  PCI: 00:1e.3: enabled 1

 1641 01:50:57.289088  PCI: 00:1f.0: enabled 1

 1642 01:50:57.292220  PCI: 00:1f.1: enabled 0

 1643 01:50:57.295498  PCI: 00:1f.2: enabled 0

 1644 01:50:57.298688  PCI: 00:1f.3: enabled 1

 1645 01:50:57.298771  PCI: 00:1f.4: enabled 1

 1646 01:50:57.301772  PCI: 00:1f.5: enabled 1

 1647 01:50:57.305381  PCI: 00:1f.6: enabled 0

 1648 01:50:57.308592  USB0 port 0: enabled 1

 1649 01:50:57.308703  I2C: 01:15: enabled 1

 1650 01:50:57.312080  I2C: 02:5d: enabled 1

 1651 01:50:57.314886  GENERIC: 0.0: enabled 1

 1652 01:50:57.314959  I2C: 03:1a: enabled 1

 1653 01:50:57.318658  I2C: 03:38: enabled 1

 1654 01:50:57.321714  I2C: 03:39: enabled 1

 1655 01:50:57.321793  I2C: 03:3a: enabled 1

 1656 01:50:57.324901  I2C: 03:3b: enabled 1

 1657 01:50:57.328597  PCI: 00:00.0: enabled 1

 1658 01:50:57.328681  SPI: 00: enabled 1

 1659 01:50:57.331964  SPI: 01: enabled 1

 1660 01:50:57.335085  PNP: 0c09.0: enabled 1

 1661 01:50:57.335169  USB2 port 0: enabled 1

 1662 01:50:57.338810  USB2 port 1: enabled 1

 1663 01:50:57.341939  USB2 port 2: enabled 0

 1664 01:50:57.342023  USB2 port 3: enabled 0

 1665 01:50:57.344670  USB2 port 5: enabled 0

 1666 01:50:57.348026  USB2 port 6: enabled 1

 1667 01:50:57.351730  USB2 port 9: enabled 1

 1668 01:50:57.351838  USB3 port 0: enabled 1

 1669 01:50:57.355019  USB3 port 1: enabled 1

 1670 01:50:57.358154  USB3 port 2: enabled 1

 1671 01:50:57.358238  USB3 port 3: enabled 1

 1672 01:50:57.361796  USB3 port 4: enabled 0

 1673 01:50:57.364734  APIC: 02: enabled 1

 1674 01:50:57.364819  APIC: 06: enabled 1

 1675 01:50:57.368105  APIC: 01: enabled 1

 1676 01:50:57.371456  APIC: 03: enabled 1

 1677 01:50:57.371541  APIC: 07: enabled 1

 1678 01:50:57.374848  APIC: 05: enabled 1

 1679 01:50:57.374932  APIC: 04: enabled 1

 1680 01:50:57.378279  PCI: 00:08.0: enabled 1

 1681 01:50:57.381129  PCI: 00:14.2: enabled 1

 1682 01:50:57.384470  PCI: 01:00.0: enabled 1

 1683 01:50:57.387880  Disabling ACPI via APMC:

 1684 01:50:57.387965  done.

 1685 01:50:57.394858  FMAP: area RW_ELOG found @ af0000 (16384 bytes)

 1686 01:50:57.398255  ELOG: NV offset 0xaf0000 size 0x4000

 1687 01:50:57.404615  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1688 01:50:57.411429  ELOG: Event(17) added with size 13 at 2023-10-11 01:49:24 UTC

 1689 01:50:57.418008  POST: Unexpected post code in previous boot: 0x73

 1690 01:50:57.424939  ELOG: Event(A3) added with size 11 at 2023-10-11 01:49:24 UTC

 1691 01:50:57.431031  ELOG: Event(A6) added with size 13 at 2023-10-11 01:49:24 UTC

 1692 01:50:57.437957  ELOG: Event(92) added with size 9 at 2023-10-11 01:49:24 UTC

 1693 01:50:57.444202  ELOG: Event(93) added with size 9 at 2023-10-11 01:49:24 UTC

 1694 01:50:57.447889  ELOG: Event(9A) added with size 9 at 2023-10-11 01:49:24 UTC

 1695 01:50:57.454074  ELOG: Event(9E) added with size 10 at 2023-10-11 01:49:24 UTC

 1696 01:50:57.460673  ELOG: Event(9F) added with size 14 at 2023-10-11 01:49:24 UTC

 1697 01:50:57.467579  BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6

 1698 01:50:57.473768  ELOG: Event(A1) added with size 10 at 2023-10-11 01:49:24 UTC

 1699 01:50:57.480578  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1700 01:50:57.487382  ELOG: Event(A0) added with size 9 at 2023-10-11 01:49:24 UTC

 1701 01:50:57.493636  elog_add_boot_reason: Logged dev mode boot

 1702 01:50:57.493721  Finalize devices...

 1703 01:50:57.497003  PCI: 00:17.0 final

 1704 01:50:57.497088  Devices finalized

 1705 01:50:57.503880  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)

 1706 01:50:57.510413  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0

 1707 01:50:57.513572  ME: HFSTS1                  : 0x90000245

 1708 01:50:57.516940  ME: HFSTS2                  : 0x3B850126

 1709 01:50:57.520262  ME: HFSTS3                  : 0x00000020

 1710 01:50:57.523471  ME: HFSTS4                  : 0x00004800

 1711 01:50:57.530048  ME: HFSTS5                  : 0x00000000

 1712 01:50:57.533160  ME: HFSTS6                  : 0x40400006

 1713 01:50:57.536384  ME: Manufacturing Mode      : NO

 1714 01:50:57.539539  ME: FW Partition Table      : OK

 1715 01:50:57.543288  ME: Bringup Loader Failure  : NO

 1716 01:50:57.546704  ME: Firmware Init Complete  : YES

 1717 01:50:57.550034  ME: Boot Options Present    : NO

 1718 01:50:57.553256  ME: Update In Progress      : NO

 1719 01:50:57.556284  ME: D0i3 Support            : YES

 1720 01:50:57.559422  ME: Low Power State Enabled : NO

 1721 01:50:57.562810  ME: CPU Replaced            : NO

 1722 01:50:57.566037  ME: CPU Replacement Valid   : YES

 1723 01:50:57.569447  ME: Current Working State   : 5

 1724 01:50:57.572865  ME: Current Operation State : 1

 1725 01:50:57.576144  ME: Current Operation Mode  : 0

 1726 01:50:57.579467  ME: Error Code              : 0

 1727 01:50:57.582633  ME: CPU Debug Disabled      : YES

 1728 01:50:57.585921  ME: TXT Support             : NO

 1729 01:50:57.592431  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 1730 01:50:57.595830  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1731 01:50:57.599336  CBFS @ c08000 size 3f8000

 1732 01:50:57.606113  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1733 01:50:57.609615  CBFS: Locating 'fallback/dsdt.aml'

 1734 01:50:57.612503  CBFS: Found @ offset 10bb80 size 3fa5

 1735 01:50:57.619404  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1736 01:50:57.619490  CBFS @ c08000 size 3f8000

 1737 01:50:57.626171  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1738 01:50:57.628761  CBFS: Locating 'fallback/slic'

 1739 01:50:57.633365  CBFS: 'fallback/slic' not found.

 1740 01:50:57.639721  ACPI: Writing ACPI tables at 99b3e000.

 1741 01:50:57.639806  ACPI:    * FACS

 1742 01:50:57.643279  ACPI:    * DSDT

 1743 01:50:57.646598  Ramoops buffer: 0x100000@0x99a3d000.

 1744 01:50:57.649796  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1745 01:50:57.656080  FMAP: area RW_VPD found @ af8000 (8192 bytes)

 1746 01:50:57.659492  Google Chrome EC: version:

 1747 01:50:57.662785  	ro: helios_v2.0.2659-56403530b

 1748 01:50:57.666030  	rw: helios_v2.0.2849-c41de27e7d

 1749 01:50:57.666114    running image: 1

 1750 01:50:57.670662  ACPI:    * FADT

 1751 01:50:57.670748  SCI is IRQ9

 1752 01:50:57.677333  ACPI: added table 1/32, length now 40

 1753 01:50:57.677417  ACPI:     * SSDT

 1754 01:50:57.680582  Found 1 CPU(s) with 8 core(s) each.

 1755 01:50:57.683771  Error: Could not locate 'wifi_sar' in VPD.

 1756 01:50:57.690310  Checking CBFS for default SAR values

 1757 01:50:57.693754  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1758 01:50:57.697020  CBFS @ c08000 size 3f8000

 1759 01:50:57.703370  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1760 01:50:57.706773  CBFS: Locating 'wifi_sar_defaults.hex'

 1761 01:50:57.710293  CBFS: Found @ offset 5fac0 size 77

 1762 01:50:57.713665  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3

 1763 01:50:57.719821  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15

 1764 01:50:57.723822  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d

 1765 01:50:57.729956  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a

 1766 01:50:57.733372  failed to find key in VPD: dsm_calib_r0_0

 1767 01:50:57.743470  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0

 1768 01:50:57.746926  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h

 1769 01:50:57.749783  failed to find key in VPD: dsm_calib_r0_1

 1770 01:50:57.760024  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0

 1771 01:50:57.766334  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h

 1772 01:50:57.769447  failed to find key in VPD: dsm_calib_r0_2

 1773 01:50:57.779376  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0

 1774 01:50:57.783267  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah

 1775 01:50:57.789328  failed to find key in VPD: dsm_calib_r0_3

 1776 01:50:57.796514  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0

 1777 01:50:57.802942  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh

 1778 01:50:57.806352  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1779 01:50:57.809121  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01

 1780 01:50:57.813296  EC returned error result code 1

 1781 01:50:57.816928  EC returned error result code 1

 1782 01:50:57.821014  EC returned error result code 1

 1783 01:50:57.827322  PS2K: Bad resp from EC. Vivaldi disabled!

 1784 01:50:57.830646  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1785 01:50:57.837730  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1

 1786 01:50:57.844281  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6

 1787 01:50:57.847172  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1788 01:50:57.853882  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1789 01:50:57.860470  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1

 1790 01:50:57.867244  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1791 01:50:57.870558  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3

 1792 01:50:57.877247  ACPI: added table 2/32, length now 44

 1793 01:50:57.877357  ACPI:    * MCFG

 1794 01:50:57.880671  ACPI: added table 3/32, length now 48

 1795 01:50:57.883580  ACPI:    * TPM2

 1796 01:50:57.887204  TPM2 log created at 99a2d000

 1797 01:50:57.890428  ACPI: added table 4/32, length now 52

 1798 01:50:57.890507  ACPI:    * MADT

 1799 01:50:57.893565  SCI is IRQ9

 1800 01:50:57.896841  ACPI: added table 5/32, length now 56

 1801 01:50:57.896944  current = 99b43ac0

 1802 01:50:57.900362  ACPI:    * DMAR

 1803 01:50:57.903511  ACPI: added table 6/32, length now 60

 1804 01:50:57.906498  ACPI:    * IGD OpRegion

 1805 01:50:57.906577  GMA: Found VBT in CBFS

 1806 01:50:57.909772  GMA: Found valid VBT in CBFS

 1807 01:50:57.912994  ACPI: added table 7/32, length now 64

 1808 01:50:57.916420  ACPI:    * HPET

 1809 01:50:57.919870  ACPI: added table 8/32, length now 68

 1810 01:50:57.919948  ACPI: done.

 1811 01:50:57.923247  ACPI tables: 31744 bytes.

 1812 01:50:57.926807  smbios_write_tables: 99a2c000

 1813 01:50:57.930289  EC returned error result code 3

 1814 01:50:57.933695  Couldn't obtain OEM name from CBI

 1815 01:50:57.937021  Create SMBIOS type 17

 1816 01:50:57.940523  PCI: 00:00.0 (Intel Cannonlake)

 1817 01:50:57.943306  PCI: 00:14.3 (Intel WiFi)

 1818 01:50:57.946830  SMBIOS tables: 939 bytes.

 1819 01:50:57.950209  Writing table forward entry at 0x00000500

 1820 01:50:57.956933  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628

 1821 01:50:57.960282  Writing coreboot table at 0x99b62000

 1822 01:50:57.966652   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1823 01:50:57.970062   1. 0000000000001000-000000000009ffff: RAM

 1824 01:50:57.973299   2. 00000000000a0000-00000000000fffff: RESERVED

 1825 01:50:57.979796   3. 0000000000100000-0000000099a2bfff: RAM

 1826 01:50:57.983172   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES

 1827 01:50:57.989627   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE

 1828 01:50:57.996136   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES

 1829 01:50:57.999963   7. 000000009a000000-000000009f7fffff: RESERVED

 1830 01:50:58.006336   8. 00000000e0000000-00000000efffffff: RESERVED

 1831 01:50:58.009562   9. 00000000fc000000-00000000fc000fff: RESERVED

 1832 01:50:58.012882  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1833 01:50:58.019257  11. 00000000fed10000-00000000fed17fff: RESERVED

 1834 01:50:58.022594  12. 00000000fed80000-00000000fed83fff: RESERVED

 1835 01:50:58.029443  13. 00000000fed90000-00000000fed91fff: RESERVED

 1836 01:50:58.032814  14. 00000000feda0000-00000000feda1fff: RESERVED

 1837 01:50:58.039365  15. 0000000100000000-000000045e7fffff: RAM

 1838 01:50:58.042547  Graphics framebuffer located at 0xc0000000

 1839 01:50:58.045998  Passing 5 GPIOs to payload:

 1840 01:50:58.049529              NAME |       PORT | POLARITY |     VALUE

 1841 01:50:58.055841     write protect |  undefined |     high |       low

 1842 01:50:58.059215               lid |  undefined |     high |      high

 1843 01:50:58.065596             power |  undefined |     high |       low

 1844 01:50:58.072555             oprom |  undefined |     high |       low

 1845 01:50:58.075433          EC in RW | 0x000000cb |     high |       low

 1846 01:50:58.079070  Board ID: 4

 1847 01:50:58.082141  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1848 01:50:58.085931  CBFS @ c08000 size 3f8000

 1849 01:50:58.092284  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1850 01:50:58.098886  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87

 1851 01:50:58.098999  coreboot table: 1492 bytes.

 1852 01:50:58.102231  IMD ROOT    0. 99fff000 00001000

 1853 01:50:58.105502  IMD SMALL   1. 99ffe000 00001000

 1854 01:50:58.108782  FSP MEMORY  2. 99c4e000 003b0000

 1855 01:50:58.112556  CONSOLE     3. 99c2e000 00020000

 1856 01:50:58.115850  FMAP        4. 99c2d000 0000054e

 1857 01:50:58.118528  TIME STAMP  5. 99c2c000 00000910

 1858 01:50:58.121967  VBOOT WORK  6. 99c18000 00014000

 1859 01:50:58.125435  MRC DATA    7. 99c16000 00001958

 1860 01:50:58.128646  ROMSTG STCK 8. 99c15000 00001000

 1861 01:50:58.132103  AFTER CAR   9. 99c0b000 0000a000

 1862 01:50:58.135272  RAMSTAGE   10. 99baf000 0005c000

 1863 01:50:58.138721  REFCODE    11. 99b7a000 00035000

 1864 01:50:58.142293  SMM BACKUP 12. 99b6a000 00010000

 1865 01:50:58.145612  COREBOOT   13. 99b62000 00008000

 1866 01:50:58.149062  ACPI       14. 99b3e000 00024000

 1867 01:50:58.152011  ACPI GNVS  15. 99b3d000 00001000

 1868 01:50:58.155304  RAMOOPS    16. 99a3d000 00100000

 1869 01:50:58.158748  TPM2 TCGLOG17. 99a2d000 00010000

 1870 01:50:58.162110  SMBIOS     18. 99a2c000 00000800

 1871 01:50:58.165378  IMD small region:

 1872 01:50:58.168538    IMD ROOT    0. 99ffec00 00000400

 1873 01:50:58.171852    FSP RUNTIME 1. 99ffebe0 00000004

 1874 01:50:58.175251    EC HOSTEVENT 2. 99ffebc0 00000008

 1875 01:50:58.178710    POWER STATE 3. 99ffeb80 00000040

 1876 01:50:58.182148    ROMSTAGE    4. 99ffeb60 00000004

 1877 01:50:58.185535    MEM INFO    5. 99ffe9a0 000001b9

 1878 01:50:58.188898    VPD         6. 99ffe920 0000006c

 1879 01:50:58.191906  MTRR: Physical address space:

 1880 01:50:58.198249  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1881 01:50:58.204985  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1882 01:50:58.211763  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6

 1883 01:50:58.218606  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0

 1884 01:50:58.225189  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1885 01:50:58.231877  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1886 01:50:58.238465  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6

 1887 01:50:58.241327  MTRR: Fixed MSR 0x250 0x0606060606060606

 1888 01:50:58.244497  MTRR: Fixed MSR 0x258 0x0606060606060606

 1889 01:50:58.247927  MTRR: Fixed MSR 0x259 0x0000000000000000

 1890 01:50:58.251905  MTRR: Fixed MSR 0x268 0x0606060606060606

 1891 01:50:58.257925  MTRR: Fixed MSR 0x269 0x0606060606060606

 1892 01:50:58.261514  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1893 01:50:58.264919  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1894 01:50:58.267707  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1895 01:50:58.275017  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1896 01:50:58.277678  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1897 01:50:58.281174  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1898 01:50:58.284647  call enable_fixed_mtrr()

 1899 01:50:58.288098  CPU physical address size: 39 bits

 1900 01:50:58.291498  MTRR: default type WB/UC MTRR counts: 6/8.

 1901 01:50:58.297483  MTRR: WB selected as default type.

 1902 01:50:58.300767  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0

 1903 01:50:58.307614  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0

 1904 01:50:58.314152  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 1905 01:50:58.320831  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1906 01:50:58.327400  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0

 1907 01:50:58.334217  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0

 1908 01:50:58.334302  

 1909 01:50:58.337188  MTRR check

 1910 01:50:58.337263  Fixed MTRRs   : Enabled

 1911 01:50:58.340627  Variable MTRRs: Enabled

 1912 01:50:58.340703  

 1913 01:50:58.344296  MTRR: Fixed MSR 0x250 0x0606060606060606

 1914 01:50:58.350596  MTRR: Fixed MSR 0x258 0x0606060606060606

 1915 01:50:58.353774  MTRR: Fixed MSR 0x259 0x0000000000000000

 1916 01:50:58.357044  MTRR: Fixed MSR 0x268 0x0606060606060606

 1917 01:50:58.360633  MTRR: Fixed MSR 0x269 0x0606060606060606

 1918 01:50:58.364183  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1919 01:50:58.370223  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1920 01:50:58.373783  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1921 01:50:58.377063  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1922 01:50:58.380396  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1923 01:50:58.387166  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1924 01:50:58.390569  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2

 1925 01:50:58.394038  call enable_fixed_mtrr()

 1926 01:50:58.400559  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1927 01:50:58.403859  CPU physical address size: 39 bits

 1928 01:50:58.406559  CBFS @ c08000 size 3f8000

 1929 01:50:58.409930  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1930 01:50:58.416754  MTRR: Fixed MSR 0x250 0x0606060606060606

 1931 01:50:58.420076  MTRR: Fixed MSR 0x250 0x0606060606060606

 1932 01:50:58.423357  MTRR: Fixed MSR 0x258 0x0606060606060606

 1933 01:50:58.426756  MTRR: Fixed MSR 0x259 0x0000000000000000

 1934 01:50:58.433360  MTRR: Fixed MSR 0x268 0x0606060606060606

 1935 01:50:58.437025  MTRR: Fixed MSR 0x269 0x0606060606060606

 1936 01:50:58.439648  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1937 01:50:58.443008  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1938 01:50:58.446265  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1939 01:50:58.453183  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1940 01:50:58.456720  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1941 01:50:58.459592  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1942 01:50:58.466668  MTRR: Fixed MSR 0x258 0x0606060606060606

 1943 01:50:58.469564  MTRR: Fixed MSR 0x259 0x0000000000000000

 1944 01:50:58.472885  MTRR: Fixed MSR 0x268 0x0606060606060606

 1945 01:50:58.475971  MTRR: Fixed MSR 0x269 0x0606060606060606

 1946 01:50:58.479376  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1947 01:50:58.486321  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1948 01:50:58.489761  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1949 01:50:58.492697  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1950 01:50:58.495897  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1951 01:50:58.502549  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1952 01:50:58.505812  call enable_fixed_mtrr()

 1953 01:50:58.505917  call enable_fixed_mtrr()

 1954 01:50:58.509608  CPU physical address size: 39 bits

 1955 01:50:58.515574  CPU physical address size: 39 bits

 1956 01:50:58.518925  CBFS: Locating 'fallback/payload'

 1957 01:50:58.522182  MTRR: Fixed MSR 0x250 0x0606060606060606

 1958 01:50:58.525740  MTRR: Fixed MSR 0x250 0x0606060606060606

 1959 01:50:58.529089  MTRR: Fixed MSR 0x258 0x0606060606060606

 1960 01:50:58.532579  MTRR: Fixed MSR 0x259 0x0000000000000000

 1961 01:50:58.539257  MTRR: Fixed MSR 0x268 0x0606060606060606

 1962 01:50:58.542292  MTRR: Fixed MSR 0x269 0x0606060606060606

 1963 01:50:58.545587  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1964 01:50:58.548808  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1965 01:50:58.555633  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1966 01:50:58.558755  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1967 01:50:58.562038  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1968 01:50:58.565172  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1969 01:50:58.571851  MTRR: Fixed MSR 0x258 0x0606060606060606

 1970 01:50:58.575129  call enable_fixed_mtrr()

 1971 01:50:58.578328  MTRR: Fixed MSR 0x259 0x0000000000000000

 1972 01:50:58.581980  MTRR: Fixed MSR 0x268 0x0606060606060606

 1973 01:50:58.584971  MTRR: Fixed MSR 0x269 0x0606060606060606

 1974 01:50:58.588429  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1975 01:50:58.595396  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1976 01:50:58.598784  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1977 01:50:58.601991  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1978 01:50:58.605418  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1979 01:50:58.611494  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1980 01:50:58.614781  CPU physical address size: 39 bits

 1981 01:50:58.617982  call enable_fixed_mtrr()

 1982 01:50:58.621599  MTRR: Fixed MSR 0x250 0x0606060606060606

 1983 01:50:58.624787  MTRR: Fixed MSR 0x258 0x0606060606060606

 1984 01:50:58.628276  MTRR: Fixed MSR 0x259 0x0000000000000000

 1985 01:50:58.634950  MTRR: Fixed MSR 0x268 0x0606060606060606

 1986 01:50:58.638635  MTRR: Fixed MSR 0x269 0x0606060606060606

 1987 01:50:58.641108  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1988 01:50:58.644759  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1989 01:50:58.668825  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1990 01:50:58.668945  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1991 01:50:58.669014  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1992 01:50:58.669096  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1993 01:50:58.669158  MTRR: Fixed MSR 0x250 0x0606060606060606

 1994 01:50:58.669217  call enable_fixed_mtrr()

 1995 01:50:58.674670  MTRR: Fixed MSR 0x258 0x0606060606060606

 1996 01:50:58.677828  MTRR: Fixed MSR 0x259 0x0000000000000000

 1997 01:50:58.681222  MTRR: Fixed MSR 0x268 0x0606060606060606

 1998 01:50:58.684581  MTRR: Fixed MSR 0x269 0x0606060606060606

 1999 01:50:58.687909  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2000 01:50:58.694421  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2001 01:50:58.697490  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2002 01:50:58.700766  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2003 01:50:58.704515  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2004 01:50:58.710797  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2005 01:50:58.714165  CPU physical address size: 39 bits

 2006 01:50:58.717490  call enable_fixed_mtrr()

 2007 01:50:58.720855  CBFS: Found @ offset 1c96c0 size 3f798

 2008 01:50:58.724051  CPU physical address size: 39 bits

 2009 01:50:58.727309  Checking segment from ROM address 0xffdd16f8

 2010 01:50:58.730788  CPU physical address size: 39 bits

 2011 01:50:58.737642  Checking segment from ROM address 0xffdd1714

 2012 01:50:58.741084  Loading segment from ROM address 0xffdd16f8

 2013 01:50:58.744473    code (compression=0)

 2014 01:50:58.750577    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760

 2015 01:50:58.760668  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760

 2016 01:50:58.760814  it's not compressed!

 2017 01:50:58.854485  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730

 2018 01:50:58.861179  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0

 2019 01:50:58.864654  Loading segment from ROM address 0xffdd1714

 2020 01:50:58.868034    Entry Point 0x30000000

 2021 01:50:58.870853  Loaded segments

 2022 01:50:58.876858  Finalizing chipset.

 2023 01:50:58.880015  Finalizing SMM.

 2024 01:50:58.883655  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5

 2025 01:50:58.886382  mp_park_aps done after 0 msecs.

 2026 01:50:58.893385  Jumping to boot code at 30000000(99b62000)

 2027 01:50:58.899998  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes

 2028 01:50:58.900115  

 2029 01:50:58.900214  

 2030 01:50:58.900310  

 2031 01:50:58.903368  Starting depthcharge on Helios...

 2032 01:50:58.903483  

 2033 01:50:58.903898  end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
 2034 01:50:58.904011  start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
 2035 01:50:58.904107  Setting prompt string to ['hatch:']
 2036 01:50:58.904220  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
 2037 01:50:58.912808  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2038 01:50:58.912920  

 2039 01:50:58.919524  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2040 01:50:58.919642  

 2041 01:50:58.926323  board_setup: Info: eMMC controller not present; skipping

 2042 01:50:58.926428  

 2043 01:50:58.929692  New NVMe Controller 0x30053ac0 @ 00:1d:00

 2044 01:50:58.929800  

 2045 01:50:58.936432  board_setup: Info: SDHCI controller not present; skipping

 2046 01:50:58.936542  

 2047 01:50:58.942741  vboot_create_vbsd: creating legacy VbSharedDataHeader structure

 2048 01:50:58.942858  

 2049 01:50:58.942955  Wipe memory regions:

 2050 01:50:58.943046  

 2051 01:50:58.945895  	[0x00000000001000, 0x000000000a0000)

 2052 01:50:58.945984  

 2053 01:50:58.949470  	[0x00000000100000, 0x00000030000000)

 2054 01:50:59.015681  

 2055 01:50:59.019049  	[0x00000030657430, 0x00000099a2c000)

 2056 01:50:59.156741  

 2057 01:50:59.159996  	[0x00000100000000, 0x0000045e800000)

 2058 01:51:00.543154  

 2059 01:51:00.543295  R8152: Initializing

 2060 01:51:00.543363  

 2061 01:51:00.546243  Version 9 (ocp_data = 6010)

 2062 01:51:00.550100  

 2063 01:51:00.550181  R8152: Done initializing

 2064 01:51:00.550246  

 2065 01:51:00.553980  Adding net device

 2066 01:51:01.036670  

 2067 01:51:01.036814  R8152: Initializing

 2068 01:51:01.036883  

 2069 01:51:01.039595  Version 6 (ocp_data = 5c30)

 2070 01:51:01.039713  

 2071 01:51:01.043195  R8152: Done initializing

 2072 01:51:01.043291  

 2073 01:51:01.046126  net_add_device: Attemp to include the same device

 2074 01:51:01.049758  

 2075 01:51:01.057168  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58

 2076 01:51:01.057357  

 2077 01:51:01.057504  

 2078 01:51:01.057649  

 2079 01:51:01.058173  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2081 01:51:01.158689  hatch: tftpboot 192.168.201.1 11733039/tftp-deploy-7yd4tg8e/kernel/bzImage 11733039/tftp-deploy-7yd4tg8e/kernel/cmdline 11733039/tftp-deploy-7yd4tg8e/ramdisk/ramdisk.cpio.gz

 2082 01:51:01.158844  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2083 01:51:01.158929  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
 2084 01:51:01.163968  tftpboot 192.168.201.1 11733039/tftp-deploy-7yd4tg8e/kernel/bzImploy-7yd4tg8e/kernel/cmdline 11733039/tftp-deploy-7yd4tg8e/ramdisk/ramdisk.cpio.gz

 2085 01:51:01.164083  

 2086 01:51:01.164151  Waiting for link

 2087 01:51:01.364794  

 2088 01:51:01.364937  done.

 2089 01:51:01.365011  

 2090 01:51:01.365076  MAC: 00:24:32:50:19:be

 2091 01:51:01.365137  

 2092 01:51:01.368052  Sending DHCP discover... done.

 2093 01:51:01.368203  

 2094 01:51:01.371250  Waiting for reply... done.

 2095 01:51:01.371370  

 2096 01:51:01.374410  Sending DHCP request... done.

 2097 01:51:01.374521  

 2098 01:51:01.377574  Waiting for reply... done.

 2099 01:51:01.377675  

 2100 01:51:01.380830  My ip is 192.168.201.15

 2101 01:51:01.380928  

 2102 01:51:01.384546  The DHCP server ip is 192.168.201.1

 2103 01:51:01.384637  

 2104 01:51:01.387774  TFTP server IP predefined by user: 192.168.201.1

 2105 01:51:01.387862  

 2106 01:51:01.397135  Bootfile predefined by user: 11733039/tftp-deploy-7yd4tg8e/kernel/bzImage

 2107 01:51:01.397235  

 2108 01:51:01.401007  Sending tftp read request... done.

 2109 01:51:01.401142  

 2110 01:51:01.405304  Waiting for the transfer... 

 2111 01:51:01.405420  

 2112 01:51:01.961874  00000000 ################################################################

 2113 01:51:01.962082  

 2114 01:51:02.641230  00080000 ################################################################

 2115 01:51:02.641419  

 2116 01:51:03.174225  00100000 ################################################################

 2117 01:51:03.174387  

 2118 01:51:03.771528  00180000 ################################################################

 2119 01:51:03.771725  

 2120 01:51:04.416484  00200000 ################################################################

 2121 01:51:04.416622  

 2122 01:51:05.021527  00280000 ################################################################

 2123 01:51:05.021670  

 2124 01:51:05.559947  00300000 ################################################################

 2125 01:51:05.560086  

 2126 01:51:06.085103  00380000 ################################################################

 2127 01:51:06.085240  

 2128 01:51:06.617506  00400000 ################################################################

 2129 01:51:06.617642  

 2130 01:51:07.154087  00480000 ################################################################

 2131 01:51:07.154221  

 2132 01:51:07.698047  00500000 ################################################################

 2133 01:51:07.698188  

 2134 01:51:08.236424  00580000 ################################################################

 2135 01:51:08.236561  

 2136 01:51:08.770916  00600000 ################################################################

 2137 01:51:08.771062  

 2138 01:51:09.294930  00680000 ################################################################

 2139 01:51:09.295078  

 2140 01:51:09.816000  00700000 ################################################################

 2141 01:51:09.816138  

 2142 01:51:10.332867  00780000 ################################################################

 2143 01:51:10.332999  

 2144 01:51:10.870903  00800000 ################################################################

 2145 01:51:10.871038  

 2146 01:51:11.399977  00880000 ################################################################

 2147 01:51:11.400113  

 2148 01:51:11.931882  00900000 ################################################################

 2149 01:51:11.932022  

 2150 01:51:12.453750  00980000 ################################################################

 2151 01:51:12.453887  

 2152 01:51:13.004301  00a00000 ################################################################

 2153 01:51:13.004451  

 2154 01:51:13.479496  00a80000 ######################################################### done.

 2155 01:51:13.479650  

 2156 01:51:13.482685  The bootfile was 11473408 bytes long.

 2157 01:51:13.482768  

 2158 01:51:13.485735  Sending tftp read request... done.

 2159 01:51:13.485818  

 2160 01:51:13.489433  Waiting for the transfer... 

 2161 01:51:13.489514  

 2162 01:51:14.012680  00000000 ################################################################

 2163 01:51:14.012843  

 2164 01:51:14.529539  00080000 ################################################################

 2165 01:51:14.529701  

 2166 01:51:15.050342  00100000 ################################################################

 2167 01:51:15.050481  

 2168 01:51:15.571822  00180000 ################################################################

 2169 01:51:15.571981  

 2170 01:51:16.099731  00200000 ################################################################

 2171 01:51:16.099878  

 2172 01:51:16.624808  00280000 ################################################################

 2173 01:51:16.624942  

 2174 01:51:17.138848  00300000 ################################################################

 2175 01:51:17.138984  

 2176 01:51:17.646826  00380000 ################################################################

 2177 01:51:17.646997  

 2178 01:51:18.161688  00400000 ################################################################

 2179 01:51:18.161819  

 2180 01:51:18.705472  00480000 ################################################################

 2181 01:51:18.705625  

 2182 01:51:19.263844  00500000 ################################################################

 2183 01:51:19.263985  

 2184 01:51:19.663455  00580000 ################################################ done.

 2185 01:51:19.663623  

 2186 01:51:19.666898  Sending tftp read request... done.

 2187 01:51:19.667001  

 2188 01:51:19.669957  Waiting for the transfer... 

 2189 01:51:19.670060  

 2190 01:51:19.670150  00000000 # done.

 2191 01:51:19.670240  

 2192 01:51:19.680168  Command line loaded dynamically from TFTP file: 11733039/tftp-deploy-7yd4tg8e/kernel/cmdline

 2193 01:51:19.680255  

 2194 01:51:19.710184  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11733039/extract-nfsrootfs-w3uruwxc,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2195 01:51:19.710308  

 2196 01:51:19.716343  ec_init(0): CrosEC protocol v3 supported (256, 256)

 2197 01:51:19.720423  

 2198 01:51:19.723295  Shutting down all USB controllers.

 2199 01:51:19.723394  

 2200 01:51:19.723487  Removing current net device

 2201 01:51:19.727801  

 2202 01:51:19.727901  Finalizing coreboot

 2203 01:51:19.727997  

 2204 01:51:19.733941  Exiting depthcharge with code 4 at timestamp: 28191571

 2205 01:51:19.734031  

 2206 01:51:19.734096  

 2207 01:51:19.734158  Starting kernel ...

 2208 01:51:19.734217  

 2209 01:51:19.734273  

 2210 01:51:19.734645  end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
 2211 01:51:19.734741  start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
 2212 01:51:19.734815  Setting prompt string to ['Linux version [0-9]']
 2213 01:51:19.734883  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2214 01:51:19.734950  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2216 01:55:40.735284  end: 2.2.5 auto-login-action (duration 00:04:21) [common]
 2218 01:55:40.735803  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
 2220 01:55:40.736189  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2223 01:55:40.736810  end: 2 depthcharge-action (duration 00:05:00) [common]
 2225 01:55:40.737336  Cleaning after the job
 2226 01:55:40.737553  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11733039/tftp-deploy-7yd4tg8e/ramdisk
 2227 01:55:40.739714  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11733039/tftp-deploy-7yd4tg8e/kernel
 2228 01:55:40.741619  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11733039/tftp-deploy-7yd4tg8e/nfsrootfs
 2229 01:55:40.834802  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11733039/tftp-deploy-7yd4tg8e/modules
 2230 01:55:40.835558  start: 4.1 power-off (timeout 00:00:30) [common]
 2231 01:55:40.835766  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
 2232 01:55:40.913033  >> Command sent successfully.

 2233 01:55:40.915524  Returned 0 in 0 seconds
 2234 01:55:41.015969  end: 4.1 power-off (duration 00:00:00) [common]
 2236 01:55:41.016313  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2237 01:55:41.016582  Listened to connection for namespace 'common' for up to 1s
 2239 01:55:41.016960  Listened to connection for namespace 'common' for up to 1s
 2240 01:55:42.017657  Finalising connection for namespace 'common'
 2241 01:55:42.018318  Disconnecting from shell: Finalise
 2242 01:55:42.018742  
 2243 01:55:42.119963  end: 4.2 read-feedback (duration 00:00:01) [common]
 2244 01:55:42.120570  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11733039
 2245 01:55:42.742786  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11733039
 2246 01:55:42.742995  JobError: Your job cannot terminate cleanly.