Boot log: asus-C436FA-Flip-hatch

    1 01:48:41.865317  lava-dispatcher, installed at version: 2023.08
    2 01:48:41.865530  start: 0 validate
    3 01:48:41.865663  Start time: 2023-10-11 01:48:41.865655+00:00 (UTC)
    4 01:48:41.865778  Using caching service: 'http://localhost/cache/?uri=%s'
    5 01:48:41.865914  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
    6 01:48:42.120962  Using caching service: 'http://localhost/cache/?uri=%s'
    7 01:48:42.121166  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.295-cip103-95-ge42cfc8bb88b7%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 01:48:42.373271  Using caching service: 'http://localhost/cache/?uri=%s'
    9 01:48:42.373473  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 01:48:48.553188  Using caching service: 'http://localhost/cache/?uri=%s'
   11 01:48:48.553927  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.295-cip103-95-ge42cfc8bb88b7%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 01:48:49.560700  validate duration: 7.70
   14 01:48:49.561045  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 01:48:49.561177  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 01:48:49.561298  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 01:48:49.561479  Not decompressing ramdisk as can be used compressed.
   18 01:48:49.561584  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/initrd.cpio.gz
   19 01:48:49.561682  saving as /var/lib/lava/dispatcher/tmp/11733040/tftp-deploy-u_7uk3tp/ramdisk/initrd.cpio.gz
   20 01:48:49.561748  total size: 5432480 (5 MB)
   21 01:48:49.562985  progress   0 % (0 MB)
   22 01:48:49.564793  progress   5 % (0 MB)
   23 01:48:49.566380  progress  10 % (0 MB)
   24 01:48:49.568073  progress  15 % (0 MB)
   25 01:48:49.569858  progress  20 % (1 MB)
   26 01:48:49.571408  progress  25 % (1 MB)
   27 01:48:49.572953  progress  30 % (1 MB)
   28 01:48:49.574726  progress  35 % (1 MB)
   29 01:48:49.576323  progress  40 % (2 MB)
   30 01:48:49.577920  progress  45 % (2 MB)
   31 01:48:49.579512  progress  50 % (2 MB)
   32 01:48:49.581257  progress  55 % (2 MB)
   33 01:48:49.582833  progress  60 % (3 MB)
   34 01:48:49.584360  progress  65 % (3 MB)
   35 01:48:49.586149  progress  70 % (3 MB)
   36 01:48:49.587617  progress  75 % (3 MB)
   37 01:48:49.589052  progress  80 % (4 MB)
   38 01:48:49.590525  progress  85 % (4 MB)
   39 01:48:49.592214  progress  90 % (4 MB)
   40 01:48:49.593673  progress  95 % (4 MB)
   41 01:48:49.595141  progress 100 % (5 MB)
   42 01:48:49.595366  5 MB downloaded in 0.03 s (154.11 MB/s)
   43 01:48:49.595525  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 01:48:49.595772  end: 1.1 download-retry (duration 00:00:00) [common]
   46 01:48:49.595861  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 01:48:49.595953  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 01:48:49.596100  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.295-cip103-95-ge42cfc8bb88b7/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 01:48:49.596171  saving as /var/lib/lava/dispatcher/tmp/11733040/tftp-deploy-u_7uk3tp/kernel/bzImage
   50 01:48:49.596239  total size: 11473408 (10 MB)
   51 01:48:49.596302  No compression specified
   52 01:48:49.597528  progress   0 % (0 MB)
   53 01:48:49.600777  progress   5 % (0 MB)
   54 01:48:49.604272  progress  10 % (1 MB)
   55 01:48:49.607479  progress  15 % (1 MB)
   56 01:48:49.611059  progress  20 % (2 MB)
   57 01:48:49.614230  progress  25 % (2 MB)
   58 01:48:49.617597  progress  30 % (3 MB)
   59 01:48:49.620831  progress  35 % (3 MB)
   60 01:48:49.624233  progress  40 % (4 MB)
   61 01:48:49.627580  progress  45 % (4 MB)
   62 01:48:49.630991  progress  50 % (5 MB)
   63 01:48:49.634344  progress  55 % (6 MB)
   64 01:48:49.637681  progress  60 % (6 MB)
   65 01:48:49.640836  progress  65 % (7 MB)
   66 01:48:49.644028  progress  70 % (7 MB)
   67 01:48:49.647036  progress  75 % (8 MB)
   68 01:48:49.650183  progress  80 % (8 MB)
   69 01:48:49.653185  progress  85 % (9 MB)
   70 01:48:49.656341  progress  90 % (9 MB)
   71 01:48:49.659309  progress  95 % (10 MB)
   72 01:48:49.662475  progress 100 % (10 MB)
   73 01:48:49.662641  10 MB downloaded in 0.07 s (164.80 MB/s)
   74 01:48:49.662874  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 01:48:49.663133  end: 1.2 download-retry (duration 00:00:00) [common]
   77 01:48:49.663222  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 01:48:49.663310  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 01:48:49.663455  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/full.rootfs.tar.xz
   80 01:48:49.663524  saving as /var/lib/lava/dispatcher/tmp/11733040/tftp-deploy-u_7uk3tp/nfsrootfs/full.rootfs.tar
   81 01:48:49.663594  total size: 207157356 (197 MB)
   82 01:48:49.663666  Using unxz to decompress xz
   83 01:48:49.668207  progress   0 % (0 MB)
   84 01:48:50.257935  progress   5 % (9 MB)
   85 01:48:50.825198  progress  10 % (19 MB)
   86 01:48:51.501032  progress  15 % (29 MB)
   87 01:48:51.910222  progress  20 % (39 MB)
   88 01:48:52.410646  progress  25 % (49 MB)
   89 01:48:53.233321  progress  30 % (59 MB)
   90 01:48:53.846182  progress  35 % (69 MB)
   91 01:48:54.506591  progress  40 % (79 MB)
   92 01:48:55.112276  progress  45 % (88 MB)
   93 01:48:55.753980  progress  50 % (98 MB)
   94 01:48:56.447620  progress  55 % (108 MB)
   95 01:48:57.223966  progress  60 % (118 MB)
   96 01:48:57.393221  progress  65 % (128 MB)
   97 01:48:57.575361  progress  70 % (138 MB)
   98 01:48:57.693027  progress  75 % (148 MB)
   99 01:48:57.774591  progress  80 % (158 MB)
  100 01:48:57.857453  progress  85 % (167 MB)
  101 01:48:57.997178  progress  90 % (177 MB)
  102 01:48:58.343486  progress  95 % (187 MB)
  103 01:48:58.973145  progress 100 % (197 MB)
  104 01:48:58.979763  197 MB downloaded in 9.32 s (21.21 MB/s)
  105 01:48:58.980103  end: 1.3.1 http-download (duration 00:00:09) [common]
  107 01:48:58.980517  end: 1.3 download-retry (duration 00:00:09) [common]
  108 01:48:58.980641  start: 1.4 download-retry (timeout 00:09:51) [common]
  109 01:48:58.980763  start: 1.4.1 http-download (timeout 00:09:51) [common]
  110 01:48:58.980937  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.295-cip103-95-ge42cfc8bb88b7/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 01:48:58.981035  saving as /var/lib/lava/dispatcher/tmp/11733040/tftp-deploy-u_7uk3tp/modules/modules.tar
  112 01:48:58.981127  total size: 484192 (0 MB)
  113 01:48:58.981222  Using unxz to decompress xz
  114 01:48:58.986460  progress   6 % (0 MB)
  115 01:48:58.986958  progress  13 % (0 MB)
  116 01:48:58.987334  progress  20 % (0 MB)
  117 01:48:58.988993  progress  27 % (0 MB)
  118 01:48:58.991181  progress  33 % (0 MB)
  119 01:48:58.993223  progress  40 % (0 MB)
  120 01:48:58.995350  progress  47 % (0 MB)
  121 01:48:58.997422  progress  54 % (0 MB)
  122 01:48:58.999651  progress  60 % (0 MB)
  123 01:48:59.001914  progress  67 % (0 MB)
  124 01:48:59.004153  progress  74 % (0 MB)
  125 01:48:59.006438  progress  81 % (0 MB)
  126 01:48:59.008545  progress  87 % (0 MB)
  127 01:48:59.010701  progress  94 % (0 MB)
  128 01:48:59.013314  progress 100 % (0 MB)
  129 01:48:59.020171  0 MB downloaded in 0.04 s (11.83 MB/s)
  130 01:48:59.020467  end: 1.4.1 http-download (duration 00:00:00) [common]
  132 01:48:59.020746  end: 1.4 download-retry (duration 00:00:00) [common]
  133 01:48:59.020844  start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
  134 01:48:59.020941  start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
  135 01:49:03.289756  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11733040/extract-nfsrootfs-4_m8g7lz
  136 01:49:03.289955  end: 1.5.1 extract-nfsrootfs (duration 00:00:04) [common]
  137 01:49:03.290062  start: 1.5.2 lava-overlay (timeout 00:09:46) [common]
  138 01:49:03.290238  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11733040/lava-overlay-ocyqgqxo
  139 01:49:03.290385  makedir: /var/lib/lava/dispatcher/tmp/11733040/lava-overlay-ocyqgqxo/lava-11733040/bin
  140 01:49:03.290493  makedir: /var/lib/lava/dispatcher/tmp/11733040/lava-overlay-ocyqgqxo/lava-11733040/tests
  141 01:49:03.290599  makedir: /var/lib/lava/dispatcher/tmp/11733040/lava-overlay-ocyqgqxo/lava-11733040/results
  142 01:49:03.290703  Creating /var/lib/lava/dispatcher/tmp/11733040/lava-overlay-ocyqgqxo/lava-11733040/bin/lava-add-keys
  143 01:49:03.290872  Creating /var/lib/lava/dispatcher/tmp/11733040/lava-overlay-ocyqgqxo/lava-11733040/bin/lava-add-sources
  144 01:49:03.291010  Creating /var/lib/lava/dispatcher/tmp/11733040/lava-overlay-ocyqgqxo/lava-11733040/bin/lava-background-process-start
  145 01:49:03.291142  Creating /var/lib/lava/dispatcher/tmp/11733040/lava-overlay-ocyqgqxo/lava-11733040/bin/lava-background-process-stop
  146 01:49:03.291270  Creating /var/lib/lava/dispatcher/tmp/11733040/lava-overlay-ocyqgqxo/lava-11733040/bin/lava-common-functions
  147 01:49:03.291400  Creating /var/lib/lava/dispatcher/tmp/11733040/lava-overlay-ocyqgqxo/lava-11733040/bin/lava-echo-ipv4
  148 01:49:03.291530  Creating /var/lib/lava/dispatcher/tmp/11733040/lava-overlay-ocyqgqxo/lava-11733040/bin/lava-install-packages
  149 01:49:03.291659  Creating /var/lib/lava/dispatcher/tmp/11733040/lava-overlay-ocyqgqxo/lava-11733040/bin/lava-installed-packages
  150 01:49:03.291785  Creating /var/lib/lava/dispatcher/tmp/11733040/lava-overlay-ocyqgqxo/lava-11733040/bin/lava-os-build
  151 01:49:03.291962  Creating /var/lib/lava/dispatcher/tmp/11733040/lava-overlay-ocyqgqxo/lava-11733040/bin/lava-probe-channel
  152 01:49:03.292101  Creating /var/lib/lava/dispatcher/tmp/11733040/lava-overlay-ocyqgqxo/lava-11733040/bin/lava-probe-ip
  153 01:49:03.292248  Creating /var/lib/lava/dispatcher/tmp/11733040/lava-overlay-ocyqgqxo/lava-11733040/bin/lava-target-ip
  154 01:49:03.292413  Creating /var/lib/lava/dispatcher/tmp/11733040/lava-overlay-ocyqgqxo/lava-11733040/bin/lava-target-mac
  155 01:49:03.292545  Creating /var/lib/lava/dispatcher/tmp/11733040/lava-overlay-ocyqgqxo/lava-11733040/bin/lava-target-storage
  156 01:49:03.292678  Creating /var/lib/lava/dispatcher/tmp/11733040/lava-overlay-ocyqgqxo/lava-11733040/bin/lava-test-case
  157 01:49:03.292808  Creating /var/lib/lava/dispatcher/tmp/11733040/lava-overlay-ocyqgqxo/lava-11733040/bin/lava-test-event
  158 01:49:03.292936  Creating /var/lib/lava/dispatcher/tmp/11733040/lava-overlay-ocyqgqxo/lava-11733040/bin/lava-test-feedback
  159 01:49:03.293066  Creating /var/lib/lava/dispatcher/tmp/11733040/lava-overlay-ocyqgqxo/lava-11733040/bin/lava-test-raise
  160 01:49:03.293194  Creating /var/lib/lava/dispatcher/tmp/11733040/lava-overlay-ocyqgqxo/lava-11733040/bin/lava-test-reference
  161 01:49:03.293323  Creating /var/lib/lava/dispatcher/tmp/11733040/lava-overlay-ocyqgqxo/lava-11733040/bin/lava-test-runner
  162 01:49:03.293452  Creating /var/lib/lava/dispatcher/tmp/11733040/lava-overlay-ocyqgqxo/lava-11733040/bin/lava-test-set
  163 01:49:03.293603  Creating /var/lib/lava/dispatcher/tmp/11733040/lava-overlay-ocyqgqxo/lava-11733040/bin/lava-test-shell
  164 01:49:03.293746  Updating /var/lib/lava/dispatcher/tmp/11733040/lava-overlay-ocyqgqxo/lava-11733040/bin/lava-add-keys (debian)
  165 01:49:03.294339  Updating /var/lib/lava/dispatcher/tmp/11733040/lava-overlay-ocyqgqxo/lava-11733040/bin/lava-add-sources (debian)
  166 01:49:03.294550  Updating /var/lib/lava/dispatcher/tmp/11733040/lava-overlay-ocyqgqxo/lava-11733040/bin/lava-install-packages (debian)
  167 01:49:03.294758  Updating /var/lib/lava/dispatcher/tmp/11733040/lava-overlay-ocyqgqxo/lava-11733040/bin/lava-installed-packages (debian)
  168 01:49:03.294974  Updating /var/lib/lava/dispatcher/tmp/11733040/lava-overlay-ocyqgqxo/lava-11733040/bin/lava-os-build (debian)
  169 01:49:03.295158  Creating /var/lib/lava/dispatcher/tmp/11733040/lava-overlay-ocyqgqxo/lava-11733040/environment
  170 01:49:03.295294  LAVA metadata
  171 01:49:03.295371  - LAVA_JOB_ID=11733040
  172 01:49:03.295452  - LAVA_DISPATCHER_IP=192.168.201.1
  173 01:49:03.295570  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:46) [common]
  174 01:49:03.295642  skipped lava-vland-overlay
  175 01:49:03.295722  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  176 01:49:03.295820  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:46) [common]
  177 01:49:03.295885  skipped lava-multinode-overlay
  178 01:49:03.295959  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  179 01:49:03.296041  start: 1.5.2.3 test-definition (timeout 00:09:46) [common]
  180 01:49:03.296119  Loading test definitions
  181 01:49:03.296211  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:46) [common]
  182 01:49:03.296285  Using /lava-11733040 at stage 0
  183 01:49:03.296589  uuid=11733040_1.5.2.3.1 testdef=None
  184 01:49:03.296679  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  185 01:49:03.296772  start: 1.5.2.3.2 test-overlay (timeout 00:09:46) [common]
  186 01:49:03.297289  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  188 01:49:03.297516  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:46) [common]
  189 01:49:03.302495  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  191 01:49:03.302855  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:46) [common]
  192 01:49:03.303430  runner path: /var/lib/lava/dispatcher/tmp/11733040/lava-overlay-ocyqgqxo/lava-11733040/0/tests/0_timesync-off test_uuid 11733040_1.5.2.3.1
  193 01:49:03.303595  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  195 01:49:03.303932  start: 1.5.2.3.5 git-repo-action (timeout 00:09:46) [common]
  196 01:49:03.304041  Using /lava-11733040 at stage 0
  197 01:49:03.304192  Fetching tests from https://github.com/kernelci/test-definitions.git
  198 01:49:03.304310  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/11733040/lava-overlay-ocyqgqxo/lava-11733040/0/tests/1_kselftest-rtc'
  199 01:49:12.794715  Running '/usr/bin/git checkout kernelci.org
  200 01:49:12.945681  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/11733040/lava-overlay-ocyqgqxo/lava-11733040/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
  201 01:49:12.946744  uuid=11733040_1.5.2.3.5 testdef=None
  202 01:49:12.946981  end: 1.5.2.3.5 git-repo-action (duration 00:00:10) [common]
  204 01:49:12.947364  start: 1.5.2.3.6 test-overlay (timeout 00:09:37) [common]
  205 01:49:12.948598  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  207 01:49:12.948971  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:37) [common]
  208 01:49:12.950603  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  210 01:49:12.950986  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:37) [common]
  211 01:49:12.952557  runner path: /var/lib/lava/dispatcher/tmp/11733040/lava-overlay-ocyqgqxo/lava-11733040/0/tests/1_kselftest-rtc test_uuid 11733040_1.5.2.3.5
  212 01:49:12.952690  BOARD='asus-C436FA-Flip-hatch'
  213 01:49:12.952791  BRANCH='cip-gitlab'
  214 01:49:12.952883  SKIPFILE='/dev/null'
  215 01:49:12.952973  SKIP_INSTALL='True'
  216 01:49:12.953063  TESTPROG_URL='None'
  217 01:49:12.953152  TST_CASENAME=''
  218 01:49:12.953245  TST_CMDFILES='rtc'
  219 01:49:12.953442  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  221 01:49:12.953793  Creating lava-test-runner.conf files
  222 01:49:12.953893  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11733040/lava-overlay-ocyqgqxo/lava-11733040/0 for stage 0
  223 01:49:12.954036  - 0_timesync-off
  224 01:49:12.954143  - 1_kselftest-rtc
  225 01:49:12.954290  end: 1.5.2.3 test-definition (duration 00:00:10) [common]
  226 01:49:12.954427  start: 1.5.2.4 compress-overlay (timeout 00:09:37) [common]
  227 01:49:20.859728  end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
  228 01:49:20.859883  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:29) [common]
  229 01:49:20.860026  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  230 01:49:20.860130  end: 1.5.2 lava-overlay (duration 00:00:18) [common]
  231 01:49:20.860227  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:29) [common]
  232 01:49:21.002241  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  233 01:49:21.002665  start: 1.5.4 extract-modules (timeout 00:09:29) [common]
  234 01:49:21.002833  extracting modules file /var/lib/lava/dispatcher/tmp/11733040/tftp-deploy-u_7uk3tp/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11733040/extract-nfsrootfs-4_m8g7lz
  235 01:49:21.024724  extracting modules file /var/lib/lava/dispatcher/tmp/11733040/tftp-deploy-u_7uk3tp/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11733040/extract-overlay-ramdisk-3otihvyl/ramdisk
  236 01:49:21.047073  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  237 01:49:21.047235  start: 1.5.5 apply-overlay-tftp (timeout 00:09:29) [common]
  238 01:49:21.047332  [common] Applying overlay to NFS
  239 01:49:21.047403  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11733040/compress-overlay-tf0chzs1/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11733040/extract-nfsrootfs-4_m8g7lz
  240 01:49:22.045078  end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
  241 01:49:22.045276  start: 1.5.6 configure-preseed-file (timeout 00:09:28) [common]
  242 01:49:22.045417  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  243 01:49:22.045548  start: 1.5.7 compress-ramdisk (timeout 00:09:28) [common]
  244 01:49:22.045694  Building ramdisk /var/lib/lava/dispatcher/tmp/11733040/extract-overlay-ramdisk-3otihvyl/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11733040/extract-overlay-ramdisk-3otihvyl/ramdisk
  245 01:49:22.128165  >> 30353 blocks

  246 01:49:22.724314  rename /var/lib/lava/dispatcher/tmp/11733040/extract-overlay-ramdisk-3otihvyl/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11733040/tftp-deploy-u_7uk3tp/ramdisk/ramdisk.cpio.gz
  247 01:49:22.724808  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  248 01:49:22.724965  start: 1.5.8 prepare-kernel (timeout 00:09:27) [common]
  249 01:49:22.725111  start: 1.5.8.1 prepare-fit (timeout 00:09:27) [common]
  250 01:49:22.725240  No mkimage arch provided, not using FIT.
  251 01:49:22.725334  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  252 01:49:22.725424  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  253 01:49:22.725546  end: 1.5 prepare-tftp-overlay (duration 00:00:24) [common]
  254 01:49:22.725688  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:27) [common]
  255 01:49:22.725798  No LXC device requested
  256 01:49:22.725923  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  257 01:49:22.726056  start: 1.7 deploy-device-env (timeout 00:09:27) [common]
  258 01:49:22.726181  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  259 01:49:22.726294  Checking files for TFTP limit of 4294967296 bytes.
  260 01:49:22.726853  end: 1 tftp-deploy (duration 00:00:33) [common]
  261 01:49:22.726963  start: 2 depthcharge-action (timeout 00:05:00) [common]
  262 01:49:22.727076  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  263 01:49:22.727224  substitutions:
  264 01:49:22.727326  - {DTB}: None
  265 01:49:22.727423  - {INITRD}: 11733040/tftp-deploy-u_7uk3tp/ramdisk/ramdisk.cpio.gz
  266 01:49:22.727516  - {KERNEL}: 11733040/tftp-deploy-u_7uk3tp/kernel/bzImage
  267 01:49:22.727620  - {LAVA_MAC}: None
  268 01:49:22.727714  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11733040/extract-nfsrootfs-4_m8g7lz
  269 01:49:22.727805  - {NFS_SERVER_IP}: 192.168.201.1
  270 01:49:22.727903  - {PRESEED_CONFIG}: None
  271 01:49:22.728002  - {PRESEED_LOCAL}: None
  272 01:49:22.728104  - {RAMDISK}: 11733040/tftp-deploy-u_7uk3tp/ramdisk/ramdisk.cpio.gz
  273 01:49:22.728197  - {ROOT_PART}: None
  274 01:49:22.728288  - {ROOT}: None
  275 01:49:22.728377  - {SERVER_IP}: 192.168.201.1
  276 01:49:22.728465  - {TEE}: None
  277 01:49:22.728555  Parsed boot commands:
  278 01:49:22.728653  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  279 01:49:22.728902  Parsed boot commands: tftpboot 192.168.201.1 11733040/tftp-deploy-u_7uk3tp/kernel/bzImage 11733040/tftp-deploy-u_7uk3tp/kernel/cmdline 11733040/tftp-deploy-u_7uk3tp/ramdisk/ramdisk.cpio.gz
  280 01:49:22.729026  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  281 01:49:22.729159  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  282 01:49:22.729288  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  283 01:49:22.729413  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  284 01:49:22.729519  Not connected, no need to disconnect.
  285 01:49:22.729633  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  286 01:49:22.729762  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  287 01:49:22.729865  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-2'
  288 01:49:22.734129  Setting prompt string to ['lava-test: # ']
  289 01:49:22.734549  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  290 01:49:22.734702  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  291 01:49:22.734866  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  292 01:49:22.734990  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  293 01:49:22.735355  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-2' '--port=1' '--command=reboot'
  294 01:49:27.859915  >> Command sent successfully.

  295 01:49:27.862915  Returned 0 in 5 seconds
  296 01:49:27.963319  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  298 01:49:27.963648  end: 2.2.2 reset-device (duration 00:00:05) [common]
  299 01:49:27.963773  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  300 01:49:27.963868  Setting prompt string to 'Starting depthcharge on Helios...'
  301 01:49:27.963955  Changing prompt to 'Starting depthcharge on Helios...'
  302 01:49:27.964055  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  303 01:49:27.964363  [Enter `^Ec?' for help]

  304 01:49:28.585419  1: execution: FAILED 

  305 01:49:28.585572  *********

  306 01:49:28.585686  

  307 01:49:28.595299  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  308 01:49:28.598848  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  309 01:49:28.605321  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  310 01:49:28.608515  CPU: AES supported, TXT NOT supported, VT supported

  311 01:49:28.615201  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  312 01:49:28.618200  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  313 01:49:28.625046  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  314 01:49:28.627961  VBOOT: Loading verstage.

  315 01:49:28.631447  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  316 01:49:28.638276  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  317 01:49:28.644370  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  318 01:49:28.644475  CBFS @ c08000 size 3f8000

  319 01:49:28.651427  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  320 01:49:28.654435  CBFS: Locating 'fallback/verstage'

  321 01:49:28.657595  CBFS: Found @ offset 10fb80 size 1072c

  322 01:49:28.662037  

  323 01:49:28.662117  

  324 01:49:28.671906  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  325 01:49:28.686116  Probing TPM: . done!

  326 01:49:28.689760  TPM ready after 0 ms

  327 01:49:28.692960  Connected to device vid:did:rid of 1ae0:0028:00

  328 01:49:28.703377  Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98

  329 01:49:28.706374  Initialized TPM device CR50 revision 0

  330 01:49:28.752267  tlcl_send_startup: Startup return code is 0

  331 01:49:28.752384  TPM: setup succeeded

  332 01:49:28.765234  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  333 01:49:28.768958  Chrome EC: UHEPI supported

  334 01:49:28.772129  Phase 1

  335 01:49:28.775215  FMAP: area GBB found @ c05000 (12288 bytes)

  336 01:49:28.781944  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  337 01:49:28.784968  Phase 2

  338 01:49:28.785047  Phase 3

  339 01:49:28.788828  FMAP: area GBB found @ c05000 (12288 bytes)

  340 01:49:28.795045  VB2:vb2_report_dev_firmware() This is developer signed firmware

  341 01:49:28.801762  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  342 01:49:28.804663  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  343 01:49:28.811434  VB2:vb2_verify_keyblock() Checking keyblock signature...

  344 01:49:28.827559  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  345 01:49:28.830686  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  346 01:49:28.837464  VB2:vb2_verify_fw_preamble() Verifying preamble.

  347 01:49:28.841692  Phase 4

  348 01:49:28.844745  FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)

  349 01:49:28.854565  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  350 01:49:29.031665  VB2:vb2_rsa_verify_digest() Digest check failed!

  351 01:49:29.037860  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7

  352 01:49:29.037958  Saving nvdata

  353 01:49:29.041604  Reboot requested (10020007)

  354 01:49:29.044599  board_reset() called!

  355 01:49:29.044683  full_reset() called!

  356 01:49:33.552575  

  357 01:49:33.552763  

  358 01:49:33.562477  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  359 01:49:33.565517  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  360 01:49:33.572476  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  361 01:49:33.575619  CPU: AES supported, TXT NOT supported, VT supported

  362 01:49:33.582422  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  363 01:49:33.588748  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  364 01:49:33.591901  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  365 01:49:33.595252  VBOOT: Loading verstage.

  366 01:49:33.601608  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  367 01:49:33.605104  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  368 01:49:33.612004  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  369 01:49:33.612094  CBFS @ c08000 size 3f8000

  370 01:49:33.618555  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  371 01:49:33.621921  CBFS: Locating 'fallback/verstage'

  372 01:49:33.628619  CBFS: Found @ offset 10fb80 size 1072c

  373 01:49:33.628706  

  374 01:49:33.628772  

  375 01:49:33.638252  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  376 01:49:33.653729  Probing TPM: . done!

  377 01:49:33.657046  TPM ready after 0 ms

  378 01:49:33.660680  Connected to device vid:did:rid of 1ae0:0028:00

  379 01:49:33.670485  Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98

  380 01:49:33.674469  Initialized TPM device CR50 revision 0

  381 01:49:33.720181  tlcl_send_startup: Startup return code is 0

  382 01:49:33.720302  TPM: setup succeeded

  383 01:49:33.732378  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  384 01:49:33.735984  Chrome EC: UHEPI supported

  385 01:49:33.739576  Phase 1

  386 01:49:33.742842  FMAP: area GBB found @ c05000 (12288 bytes)

  387 01:49:33.749639  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  388 01:49:33.755957  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  389 01:49:33.759558  Recovery requested (1009000e)

  390 01:49:33.765415  Saving nvdata

  391 01:49:33.771620  tlcl_extend: response is 0

  392 01:49:33.780432  tlcl_extend: response is 0

  393 01:49:33.787246  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  394 01:49:33.790409  CBFS @ c08000 size 3f8000

  395 01:49:33.796733  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  396 01:49:33.800520  CBFS: Locating 'fallback/romstage'

  397 01:49:33.803613  CBFS: Found @ offset 80 size 145fc

  398 01:49:33.806614  Accumulated console time in verstage 98 ms

  399 01:49:33.806701  

  400 01:49:33.806776  

  401 01:49:33.820232  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...

  402 01:49:33.826590  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  403 01:49:33.829765  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  404 01:49:33.833332  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  405 01:49:33.839726  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000

  406 01:49:33.843434  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  407 01:49:33.846335  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000

  408 01:49:33.850056  TCO_STS:   0000 0000

  409 01:49:33.853179  GEN_PMCON: e0015238 00000200

  410 01:49:33.856293  GBLRST_CAUSE: 00000000 00000000

  411 01:49:33.856381  prev_sleep_state 5

  412 01:49:33.859693  Boot Count incremented to 61730

  413 01:49:33.866973  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  414 01:49:33.869937  CBFS @ c08000 size 3f8000

  415 01:49:33.876875  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  416 01:49:33.876987  CBFS: Locating 'fspm.bin'

  417 01:49:33.883118  CBFS: Found @ offset 5ffc0 size 71000

  418 01:49:33.886320  Chrome EC: UHEPI supported

  419 01:49:33.893173  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

  420 01:49:33.896720  Probing TPM:  done!

  421 01:49:33.903622  Connected to device vid:did:rid of 1ae0:0028:00

  422 01:49:33.913114  Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98

  423 01:49:33.919377  Initialized TPM device CR50 revision 0

  424 01:49:33.928551  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  425 01:49:33.938230  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  426 01:49:33.938317  MRC cache found, size 1948

  427 01:49:33.941434  bootmode is set to: 2

  428 01:49:33.944499  PRMRR disabled by config.

  429 01:49:33.947974  SPD INDEX = 1

  430 01:49:33.951363  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  431 01:49:33.954858  CBFS @ c08000 size 3f8000

  432 01:49:33.961269  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  433 01:49:33.961386  CBFS: Locating 'spd.bin'

  434 01:49:33.964405  CBFS: Found @ offset 5fb80 size 400

  435 01:49:33.968107  SPD: module type is LPDDR3

  436 01:49:33.971145  SPD: module part is 

  437 01:49:33.977701  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb

  438 01:49:33.981208  SPD: device width 4 bits, bus width 8 bits

  439 01:49:33.984096  SPD: module size is 4096 MB (per channel)

  440 01:49:33.987295  memory slot: 0 configuration done.

  441 01:49:33.990504  memory slot: 2 configuration done.

  442 01:49:34.042814  CBMEM:

  443 01:49:34.045787  IMD: root @ 99fff000 254 entries.

  444 01:49:34.049306  IMD: root @ 99ffec00 62 entries.

  445 01:49:34.052721  External stage cache:

  446 01:49:34.056129  IMD: root @ 9abff000 254 entries.

  447 01:49:34.059079  IMD: root @ 9abfec00 62 entries.

  448 01:49:34.065967  Chrome EC: clear events_b mask to 0x0000000020004000

  449 01:49:34.078572  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  450 01:49:34.091845  tlcl_write: response is 0

  451 01:49:34.100590  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  452 01:49:34.107719  MRC: TPM MRC hash updated successfully.

  453 01:49:34.107842  2 DIMMs found

  454 01:49:34.110919  SMM Memory Map

  455 01:49:34.114003  SMRAM       : 0x9a000000 0x1000000

  456 01:49:34.117201   Subregion 0: 0x9a000000 0xa00000

  457 01:49:34.120283   Subregion 1: 0x9aa00000 0x200000

  458 01:49:34.123952   Subregion 2: 0x9ac00000 0x400000

  459 01:49:34.127235  top_of_ram = 0x9a000000

  460 01:49:34.130262  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)

  461 01:49:34.136745  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)

  462 01:49:34.140552  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  463 01:49:34.146845  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  464 01:49:34.150581  CBFS @ c08000 size 3f8000

  465 01:49:34.153670  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  466 01:49:34.156800  CBFS: Locating 'fallback/postcar'

  467 01:49:34.163488  CBFS: Found @ offset 107000 size 4b44

  468 01:49:34.169862  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)

  469 01:49:34.179598  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8

  470 01:49:34.183310  Processing 180 relocs. Offset value of 0x97c0c000

  471 01:49:34.190953  Accumulated console time in romstage 286 ms

  472 01:49:34.191045  

  473 01:49:34.191111  

  474 01:49:34.200646  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...

  475 01:49:34.207059  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  476 01:49:34.210375  CBFS @ c08000 size 3f8000

  477 01:49:34.216956  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  478 01:49:34.220050  CBFS: Locating 'fallback/ramstage'

  479 01:49:34.223845  CBFS: Found @ offset 43380 size 1b9e8

  480 01:49:34.230046  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)

  481 01:49:34.262719  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38

  482 01:49:34.265852  Processing 3976 relocs. Offset value of 0x98db0000

  483 01:49:34.272769  Accumulated console time in postcar 52 ms

  484 01:49:34.272857  

  485 01:49:34.272923  

  486 01:49:34.282128  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...

  487 01:49:34.289050  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  488 01:49:34.292247  WARNING: RO_VPD is uninitialized or empty.

  489 01:49:34.295202  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  490 01:49:34.302013  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  491 01:49:34.302123  Normal boot.

  492 01:49:34.308929  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

  493 01:49:34.311810  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  494 01:49:34.315349  CBFS @ c08000 size 3f8000

  495 01:49:34.321987  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  496 01:49:34.324937  CBFS: Locating 'cpu_microcode_blob.bin'

  497 01:49:34.328174  CBFS: Found @ offset 14700 size 2ec00

  498 01:49:34.331428  microcode: sig=0x806ec pf=0x4 revision=0xc9

  499 01:49:34.335299  Skip microcode update

  500 01:49:34.341598  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  501 01:49:34.341688  CBFS @ c08000 size 3f8000

  502 01:49:34.348452  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  503 01:49:34.351653  CBFS: Locating 'fsps.bin'

  504 01:49:34.354900  CBFS: Found @ offset d1fc0 size 35000

  505 01:49:34.380381  Detected 4 core, 8 thread CPU.

  506 01:49:34.383901  Setting up SMI for CPU

  507 01:49:34.387481  IED base = 0x9ac00000

  508 01:49:34.390308  IED size = 0x00400000

  509 01:49:34.390422  Will perform SMM setup.

  510 01:49:34.397296  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.

  511 01:49:34.403593  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  512 01:49:34.410366  Processing 16 relocs. Offset value of 0x00030000

  513 01:49:34.410471  Attempting to start 7 APs

  514 01:49:34.416563  Waiting for 10ms after sending INIT.

  515 01:49:34.430598  Waiting for 1st SIPI to complete...done.

  516 01:49:34.430713  AP: slot 4 apic_id 3.

  517 01:49:34.433573  AP: slot 1 apic_id 2.

  518 01:49:34.437075  Waiting for 2nd SIPI to complete...done.

  519 01:49:34.440170  AP: slot 2 apic_id 1.

  520 01:49:34.443723  AP: slot 5 apic_id 5.

  521 01:49:34.443827  AP: slot 6 apic_id 4.

  522 01:49:34.446882  AP: slot 7 apic_id 7.

  523 01:49:34.450093  AP: slot 3 apic_id 6.

  524 01:49:34.457049  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  525 01:49:34.463411  Processing 13 relocs. Offset value of 0x00038000

  526 01:49:34.470115  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)

  527 01:49:34.473137  Installing SMM handler to 0x9a000000

  528 01:49:34.479493  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58

  529 01:49:34.486200  Processing 658 relocs. Offset value of 0x9a010000

  530 01:49:34.493007  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8

  531 01:49:34.496132  Processing 13 relocs. Offset value of 0x9a008000

  532 01:49:34.502978  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd

  533 01:49:34.509525  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd

  534 01:49:34.515972  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd

  535 01:49:34.518889  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd

  536 01:49:34.525837  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd

  537 01:49:34.532879  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd

  538 01:49:34.538999  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd

  539 01:49:34.545341  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)

  540 01:49:34.548849  Clearing SMI status registers

  541 01:49:34.548938  SMI_STS: PM1 

  542 01:49:34.552097  PM1_STS: PWRBTN 

  543 01:49:34.552182  TCO_STS: SECOND_TO 

  544 01:49:34.555236  New SMBASE 0x9a000000

  545 01:49:34.558939  In relocation handler: CPU 0

  546 01:49:34.562217  New SMBASE=0x9a000000 IEDBASE=0x9ac00000

  547 01:49:34.568372  Writing SMRR. base = 0x9a000006, mask=0xff000800

  548 01:49:34.568491  Relocation complete.

  549 01:49:34.572110  New SMBASE 0x99fff800

  550 01:49:34.575102  In relocation handler: CPU 2

  551 01:49:34.578217  New SMBASE=0x99fff800 IEDBASE=0x9ac00000

  552 01:49:34.585011  Writing SMRR. base = 0x9a000006, mask=0xff000800

  553 01:49:34.585120  Relocation complete.

  554 01:49:34.588101  New SMBASE 0x99ffe400

  555 01:49:34.591480  In relocation handler: CPU 7

  556 01:49:34.594673  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000

  557 01:49:34.601649  Writing SMRR. base = 0x9a000006, mask=0xff000800

  558 01:49:34.601824  Relocation complete.

  559 01:49:34.604813  New SMBASE 0x99fff400

  560 01:49:34.607894  In relocation handler: CPU 3

  561 01:49:34.611258  New SMBASE=0x99fff400 IEDBASE=0x9ac00000

  562 01:49:34.617583  Writing SMRR. base = 0x9a000006, mask=0xff000800

  563 01:49:34.617760  Relocation complete.

  564 01:49:34.620817  New SMBASE 0x99fff000

  565 01:49:34.624537  In relocation handler: CPU 4

  566 01:49:34.627647  New SMBASE=0x99fff000 IEDBASE=0x9ac00000

  567 01:49:34.634750  Writing SMRR. base = 0x9a000006, mask=0xff000800

  568 01:49:34.634947  Relocation complete.

  569 01:49:34.637381  New SMBASE 0x99ffec00

  570 01:49:34.641233  In relocation handler: CPU 5

  571 01:49:34.644468  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000

  572 01:49:34.647314  Writing SMRR. base = 0x9a000006, mask=0xff000800

  573 01:49:34.650968  Relocation complete.

  574 01:49:34.653853  New SMBASE 0x99ffe800

  575 01:49:34.657456  In relocation handler: CPU 6

  576 01:49:34.660819  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000

  577 01:49:34.664025  Writing SMRR. base = 0x9a000006, mask=0xff000800

  578 01:49:34.667000  Relocation complete.

  579 01:49:34.670731  New SMBASE 0x99fffc00

  580 01:49:34.673941  In relocation handler: CPU 1

  581 01:49:34.676853  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000

  582 01:49:34.680436  Writing SMRR. base = 0x9a000006, mask=0xff000800

  583 01:49:34.683634  Relocation complete.

  584 01:49:34.686733  Initializing CPU #0

  585 01:49:34.689800  CPU: vendor Intel device 806ec

  586 01:49:34.693558  CPU: family 06, model 8e, stepping 0c

  587 01:49:34.696533  Clearing out pending MCEs

  588 01:49:34.696620  Setting up local APIC...

  589 01:49:34.699716   apic_id: 0x00 done.

  590 01:49:34.703509  Turbo is available but hidden

  591 01:49:34.706595  Turbo is available and visible

  592 01:49:34.709703  VMX status: enabled

  593 01:49:34.713008  IA32_FEATURE_CONTROL status: locked

  594 01:49:34.713142  Skip microcode update

  595 01:49:34.716355  CPU #0 initialized

  596 01:49:34.720064  Initializing CPU #2

  597 01:49:34.720183  Initializing CPU #4

  598 01:49:34.723262  Initializing CPU #1

  599 01:49:34.726474  CPU: vendor Intel device 806ec

  600 01:49:34.729317  CPU: family 06, model 8e, stepping 0c

  601 01:49:34.732767  CPU: vendor Intel device 806ec

  602 01:49:34.736194  CPU: family 06, model 8e, stepping 0c

  603 01:49:34.739603  Clearing out pending MCEs

  604 01:49:34.743101  Clearing out pending MCEs

  605 01:49:34.743209  Setting up local APIC...

  606 01:49:34.746392  Initializing CPU #3

  607 01:49:34.749659  Initializing CPU #7

  608 01:49:34.752898  CPU: vendor Intel device 806ec

  609 01:49:34.755663  CPU: family 06, model 8e, stepping 0c

  610 01:49:34.759336  CPU: vendor Intel device 806ec

  611 01:49:34.762339  CPU: family 06, model 8e, stepping 0c

  612 01:49:34.765968  Clearing out pending MCEs

  613 01:49:34.768926  CPU: vendor Intel device 806ec

  614 01:49:34.772110  CPU: family 06, model 8e, stepping 0c

  615 01:49:34.775879  Clearing out pending MCEs

  616 01:49:34.775975  Clearing out pending MCEs

  617 01:49:34.779148  Setting up local APIC...

  618 01:49:34.782122  Setting up local APIC...

  619 01:49:34.786051  Setting up local APIC...

  620 01:49:34.786159   apic_id: 0x02 done.

  621 01:49:34.788820   apic_id: 0x03 done.

  622 01:49:34.792098  VMX status: enabled

  623 01:49:34.792184  VMX status: enabled

  624 01:49:34.795483  IA32_FEATURE_CONTROL status: locked

  625 01:49:34.798482  IA32_FEATURE_CONTROL status: locked

  626 01:49:34.802425  Skip microcode update

  627 01:49:34.805384  Skip microcode update

  628 01:49:34.805493  CPU #1 initialized

  629 01:49:34.808506  CPU #4 initialized

  630 01:49:34.811647   apic_id: 0x01 done.

  631 01:49:34.811756  Setting up local APIC...

  632 01:49:34.815391  VMX status: enabled

  633 01:49:34.818328   apic_id: 0x06 done.

  634 01:49:34.818465   apic_id: 0x07 done.

  635 01:49:34.822073  VMX status: enabled

  636 01:49:34.825175  VMX status: enabled

  637 01:49:34.828594  IA32_FEATURE_CONTROL status: locked

  638 01:49:34.831380  IA32_FEATURE_CONTROL status: locked

  639 01:49:34.831465  Skip microcode update

  640 01:49:34.834922  Skip microcode update

  641 01:49:34.837997  CPU #3 initialized

  642 01:49:34.838107  CPU #7 initialized

  643 01:49:34.841608  IA32_FEATURE_CONTROL status: locked

  644 01:49:34.844732  Initializing CPU #5

  645 01:49:34.848500  Initializing CPU #6

  646 01:49:34.851606  CPU: vendor Intel device 806ec

  647 01:49:34.854830  CPU: family 06, model 8e, stepping 0c

  648 01:49:34.854945  Skip microcode update

  649 01:49:34.857918  Clearing out pending MCEs

  650 01:49:34.861278  CPU: vendor Intel device 806ec

  651 01:49:34.864641  CPU: family 06, model 8e, stepping 0c

  652 01:49:34.867599  Setting up local APIC...

  653 01:49:34.871088  CPU #2 initialized

  654 01:49:34.871208   apic_id: 0x05 done.

  655 01:49:34.874620  Clearing out pending MCEs

  656 01:49:34.877654  VMX status: enabled

  657 01:49:34.880898  Setting up local APIC...

  658 01:49:34.884194  IA32_FEATURE_CONTROL status: locked

  659 01:49:34.884321   apic_id: 0x04 done.

  660 01:49:34.887529  Skip microcode update

  661 01:49:34.891113  VMX status: enabled

  662 01:49:34.891203  CPU #5 initialized

  663 01:49:34.894306  IA32_FEATURE_CONTROL status: locked

  664 01:49:34.897412  Skip microcode update

  665 01:49:34.900637  CPU #6 initialized

  666 01:49:34.904494  bsp_do_flight_plan done after 463 msecs.

  667 01:49:34.907286  CPU: frequency set to 4200 MHz

  668 01:49:34.907378  Enabling SMIs.

  669 01:49:34.910475  Locking SMM.

  670 01:49:34.924495  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  671 01:49:34.927565  CBFS @ c08000 size 3f8000

  672 01:49:34.934517  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  673 01:49:34.934633  CBFS: Locating 'vbt.bin'

  674 01:49:34.940782  CBFS: Found @ offset 5f5c0 size 499

  675 01:49:34.944220  Found a VBT of 4608 bytes after decompression

  676 01:49:35.128151  Display FSP Version Info HOB

  677 01:49:35.131194  Reference Code - CPU = 9.0.1e.30

  678 01:49:35.134286  uCode Version = 0.0.0.ca

  679 01:49:35.137862  TXT ACM version = ff.ff.ff.ffff

  680 01:49:35.141031  Display FSP Version Info HOB

  681 01:49:35.144155  Reference Code - ME = 9.0.1e.30

  682 01:49:35.147320  MEBx version = 0.0.0.0

  683 01:49:35.150851  ME Firmware Version = Consumer SKU

  684 01:49:35.153787  Display FSP Version Info HOB

  685 01:49:35.157525  Reference Code - CML PCH = 9.0.1e.30

  686 01:49:35.160800  PCH-CRID Status = Disabled

  687 01:49:35.163725  PCH-CRID Original Value = ff.ff.ff.ffff

  688 01:49:35.166901  PCH-CRID New Value = ff.ff.ff.ffff

  689 01:49:35.170471  OPROM - RST - RAID = ff.ff.ff.ffff

  690 01:49:35.173466  ChipsetInit Base Version = ff.ff.ff.ffff

  691 01:49:35.180305  ChipsetInit Oem Version = ff.ff.ff.ffff

  692 01:49:35.180497  Display FSP Version Info HOB

  693 01:49:35.186586  Reference Code - SA - System Agent = 9.0.1e.30

  694 01:49:35.190104  Reference Code - MRC = 0.7.1.6c

  695 01:49:35.193006  SA - PCIe Version = 9.0.1e.30

  696 01:49:35.196501  SA-CRID Status = Disabled

  697 01:49:35.199918  SA-CRID Original Value = 0.0.0.c

  698 01:49:35.200078  SA-CRID New Value = 0.0.0.c

  699 01:49:35.202911  OPROM - VBIOS = ff.ff.ff.ffff

  700 01:49:35.206396  RTC Init

  701 01:49:35.209698  Set power on after power failure.

  702 01:49:35.209919  Disabling Deep S3

  703 01:49:35.213477  Disabling Deep S3

  704 01:49:35.216421  Disabling Deep S4

  705 01:49:35.216599  Disabling Deep S4

  706 01:49:35.220051  Disabling Deep S5

  707 01:49:35.220199  Disabling Deep S5

  708 01:49:35.226303  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 194 exit 1

  709 01:49:35.229402  Enumerating buses...

  710 01:49:35.232643  Show all devs... Before device enumeration.

  711 01:49:35.236307  Root Device: enabled 1

  712 01:49:35.239385  CPU_CLUSTER: 0: enabled 1

  713 01:49:35.239540  DOMAIN: 0000: enabled 1

  714 01:49:35.243086  APIC: 00: enabled 1

  715 01:49:35.246330  PCI: 00:00.0: enabled 1

  716 01:49:35.246478  PCI: 00:02.0: enabled 1

  717 01:49:35.249346  PCI: 00:04.0: enabled 0

  718 01:49:35.252997  PCI: 00:05.0: enabled 0

  719 01:49:35.256097  PCI: 00:12.0: enabled 1

  720 01:49:35.256259  PCI: 00:12.5: enabled 0

  721 01:49:35.259165  PCI: 00:12.6: enabled 0

  722 01:49:35.262290  PCI: 00:14.0: enabled 1

  723 01:49:35.266141  PCI: 00:14.1: enabled 0

  724 01:49:35.266301  PCI: 00:14.3: enabled 1

  725 01:49:35.268924  PCI: 00:14.5: enabled 0

  726 01:49:35.272122  PCI: 00:15.0: enabled 1

  727 01:49:35.275818  PCI: 00:15.1: enabled 1

  728 01:49:35.275986  PCI: 00:15.2: enabled 0

  729 01:49:35.278873  PCI: 00:15.3: enabled 0

  730 01:49:35.282220  PCI: 00:16.0: enabled 1

  731 01:49:35.285071  PCI: 00:16.1: enabled 0

  732 01:49:35.285197  PCI: 00:16.2: enabled 0

  733 01:49:35.288840  PCI: 00:16.3: enabled 0

  734 01:49:35.291934  PCI: 00:16.4: enabled 0

  735 01:49:35.294872  PCI: 00:16.5: enabled 0

  736 01:49:35.295000  PCI: 00:17.0: enabled 1

  737 01:49:35.298479  PCI: 00:19.0: enabled 1

  738 01:49:35.301505  PCI: 00:19.1: enabled 0

  739 01:49:35.305133  PCI: 00:19.2: enabled 0

  740 01:49:35.305260  PCI: 00:1a.0: enabled 0

  741 01:49:35.308123  PCI: 00:1c.0: enabled 0

  742 01:49:35.311148  PCI: 00:1c.1: enabled 0

  743 01:49:35.314634  PCI: 00:1c.2: enabled 0

  744 01:49:35.314759  PCI: 00:1c.3: enabled 0

  745 01:49:35.317572  PCI: 00:1c.4: enabled 0

  746 01:49:35.321177  PCI: 00:1c.5: enabled 0

  747 01:49:35.324611  PCI: 00:1c.6: enabled 0

  748 01:49:35.324740  PCI: 00:1c.7: enabled 0

  749 01:49:35.327713  PCI: 00:1d.0: enabled 1

  750 01:49:35.330925  PCI: 00:1d.1: enabled 0

  751 01:49:35.334153  PCI: 00:1d.2: enabled 0

  752 01:49:35.334274  PCI: 00:1d.3: enabled 0

  753 01:49:35.337342  PCI: 00:1d.4: enabled 0

  754 01:49:35.341086  PCI: 00:1d.5: enabled 1

  755 01:49:35.341191  PCI: 00:1e.0: enabled 1

  756 01:49:35.344297  PCI: 00:1e.1: enabled 0

  757 01:49:35.347211  PCI: 00:1e.2: enabled 1

  758 01:49:35.350388  PCI: 00:1e.3: enabled 1

  759 01:49:35.350494  PCI: 00:1f.0: enabled 1

  760 01:49:35.354213  PCI: 00:1f.1: enabled 1

  761 01:49:35.357361  PCI: 00:1f.2: enabled 1

  762 01:49:35.360862  PCI: 00:1f.3: enabled 1

  763 01:49:35.360982  PCI: 00:1f.4: enabled 1

  764 01:49:35.363848  PCI: 00:1f.5: enabled 1

  765 01:49:35.367017  PCI: 00:1f.6: enabled 0

  766 01:49:35.370218  USB0 port 0: enabled 1

  767 01:49:35.370327  I2C: 00:15: enabled 1

  768 01:49:35.373749  I2C: 00:5d: enabled 1

  769 01:49:35.377184  GENERIC: 0.0: enabled 1

  770 01:49:35.377296  I2C: 00:1a: enabled 1

  771 01:49:35.379962  I2C: 00:38: enabled 1

  772 01:49:35.383727  I2C: 00:39: enabled 1

  773 01:49:35.383849  I2C: 00:3a: enabled 1

  774 01:49:35.386816  I2C: 00:3b: enabled 1

  775 01:49:35.390036  PCI: 00:00.0: enabled 1

  776 01:49:35.390161  SPI: 00: enabled 1

  777 01:49:35.393122  SPI: 01: enabled 1

  778 01:49:35.396239  PNP: 0c09.0: enabled 1

  779 01:49:35.399747  USB2 port 0: enabled 1

  780 01:49:35.399854  USB2 port 1: enabled 1

  781 01:49:35.403437  USB2 port 2: enabled 0

  782 01:49:35.406539  USB2 port 3: enabled 0

  783 01:49:35.406645  USB2 port 5: enabled 0

  784 01:49:35.409650  USB2 port 6: enabled 1

  785 01:49:35.413169  USB2 port 9: enabled 1

  786 01:49:35.413262  USB3 port 0: enabled 1

  787 01:49:35.416282  USB3 port 1: enabled 1

  788 01:49:35.419435  USB3 port 2: enabled 1

  789 01:49:35.422502  USB3 port 3: enabled 1

  790 01:49:35.422598  USB3 port 4: enabled 0

  791 01:49:35.426147  APIC: 02: enabled 1

  792 01:49:35.429234  APIC: 01: enabled 1

  793 01:49:35.429332  APIC: 06: enabled 1

  794 01:49:35.432523  APIC: 03: enabled 1

  795 01:49:35.432622  APIC: 05: enabled 1

  796 01:49:35.435688  APIC: 04: enabled 1

  797 01:49:35.439254  APIC: 07: enabled 1

  798 01:49:35.439370  Compare with tree...

  799 01:49:35.442371  Root Device: enabled 1

  800 01:49:35.445880   CPU_CLUSTER: 0: enabled 1

  801 01:49:35.449127    APIC: 00: enabled 1

  802 01:49:35.449250    APIC: 02: enabled 1

  803 01:49:35.452295    APIC: 01: enabled 1

  804 01:49:35.455470    APIC: 06: enabled 1

  805 01:49:35.455558    APIC: 03: enabled 1

  806 01:49:35.458454    APIC: 05: enabled 1

  807 01:49:35.462359    APIC: 04: enabled 1

  808 01:49:35.462447    APIC: 07: enabled 1

  809 01:49:35.465234   DOMAIN: 0000: enabled 1

  810 01:49:35.468414    PCI: 00:00.0: enabled 1

  811 01:49:35.472101    PCI: 00:02.0: enabled 1

  812 01:49:35.475247    PCI: 00:04.0: enabled 0

  813 01:49:35.475330    PCI: 00:05.0: enabled 0

  814 01:49:35.478137    PCI: 00:12.0: enabled 1

  815 01:49:35.481259    PCI: 00:12.5: enabled 0

  816 01:49:35.484759    PCI: 00:12.6: enabled 0

  817 01:49:35.487900    PCI: 00:14.0: enabled 1

  818 01:49:35.487980     USB0 port 0: enabled 1

  819 01:49:35.491698      USB2 port 0: enabled 1

  820 01:49:35.494755      USB2 port 1: enabled 1

  821 01:49:35.497891      USB2 port 2: enabled 0

  822 01:49:35.501095      USB2 port 3: enabled 0

  823 01:49:35.504803      USB2 port 5: enabled 0

  824 01:49:35.504883      USB2 port 6: enabled 1

  825 01:49:35.507807      USB2 port 9: enabled 1

  826 01:49:35.510799      USB3 port 0: enabled 1

  827 01:49:35.514426      USB3 port 1: enabled 1

  828 01:49:35.517597      USB3 port 2: enabled 1

  829 01:49:35.520839      USB3 port 3: enabled 1

  830 01:49:35.520921      USB3 port 4: enabled 0

  831 01:49:35.523967    PCI: 00:14.1: enabled 0

  832 01:49:35.527457    PCI: 00:14.3: enabled 1

  833 01:49:35.530687    PCI: 00:14.5: enabled 0

  834 01:49:35.533716    PCI: 00:15.0: enabled 1

  835 01:49:35.533797     I2C: 00:15: enabled 1

  836 01:49:35.537174    PCI: 00:15.1: enabled 1

  837 01:49:35.540364     I2C: 00:5d: enabled 1

  838 01:49:35.543803     GENERIC: 0.0: enabled 1

  839 01:49:35.546726    PCI: 00:15.2: enabled 0

  840 01:49:35.546830    PCI: 00:15.3: enabled 0

  841 01:49:35.550284    PCI: 00:16.0: enabled 1

  842 01:49:35.553837    PCI: 00:16.1: enabled 0

  843 01:49:35.556880    PCI: 00:16.2: enabled 0

  844 01:49:35.560112    PCI: 00:16.3: enabled 0

  845 01:49:35.560194    PCI: 00:16.4: enabled 0

  846 01:49:35.563254    PCI: 00:16.5: enabled 0

  847 01:49:35.566882    PCI: 00:17.0: enabled 1

  848 01:49:35.569948    PCI: 00:19.0: enabled 1

  849 01:49:35.572925     I2C: 00:1a: enabled 1

  850 01:49:35.573004     I2C: 00:38: enabled 1

  851 01:49:35.576777     I2C: 00:39: enabled 1

  852 01:49:35.579984     I2C: 00:3a: enabled 1

  853 01:49:35.582921     I2C: 00:3b: enabled 1

  854 01:49:35.586035    PCI: 00:19.1: enabled 0

  855 01:49:35.586132    PCI: 00:19.2: enabled 0

  856 01:49:35.589041    PCI: 00:1a.0: enabled 0

  857 01:49:35.592311    PCI: 00:1c.0: enabled 0

  858 01:49:35.595796    PCI: 00:1c.1: enabled 0

  859 01:49:35.599074    PCI: 00:1c.2: enabled 0

  860 01:49:35.599207    PCI: 00:1c.3: enabled 0

  861 01:49:35.602176    PCI: 00:1c.4: enabled 0

  862 01:49:35.605877    PCI: 00:1c.5: enabled 0

  863 01:49:35.608721    PCI: 00:1c.6: enabled 0

  864 01:49:35.612528    PCI: 00:1c.7: enabled 0

  865 01:49:35.612655    PCI: 00:1d.0: enabled 1

  866 01:49:35.615494    PCI: 00:1d.1: enabled 0

  867 01:49:35.618528    PCI: 00:1d.2: enabled 0

  868 01:49:35.622293    PCI: 00:1d.3: enabled 0

  869 01:49:35.625554    PCI: 00:1d.4: enabled 0

  870 01:49:35.625651    PCI: 00:1d.5: enabled 1

  871 01:49:35.628602     PCI: 00:00.0: enabled 1

  872 01:49:35.632191    PCI: 00:1e.0: enabled 1

  873 01:49:35.635277    PCI: 00:1e.1: enabled 0

  874 01:49:35.638280    PCI: 00:1e.2: enabled 1

  875 01:49:35.638364     SPI: 00: enabled 1

  876 01:49:35.642034    PCI: 00:1e.3: enabled 1

  877 01:49:35.645217     SPI: 01: enabled 1

  878 01:49:35.648281    PCI: 00:1f.0: enabled 1

  879 01:49:35.648393     PNP: 0c09.0: enabled 1

  880 01:49:35.651848    PCI: 00:1f.1: enabled 1

  881 01:49:35.654842    PCI: 00:1f.2: enabled 1

  882 01:49:35.658255    PCI: 00:1f.3: enabled 1

  883 01:49:35.661070    PCI: 00:1f.4: enabled 1

  884 01:49:35.661182    PCI: 00:1f.5: enabled 1

  885 01:49:35.664903    PCI: 00:1f.6: enabled 0

  886 01:49:35.667899  Root Device scanning...

  887 01:49:35.671081  scan_static_bus for Root Device

  888 01:49:35.674946  CPU_CLUSTER: 0 enabled

  889 01:49:35.675052  DOMAIN: 0000 enabled

  890 01:49:35.677692  DOMAIN: 0000 scanning...

  891 01:49:35.680839  PCI: pci_scan_bus for bus 00

  892 01:49:35.684544  PCI: 00:00.0 [8086/0000] ops

  893 01:49:35.687828  PCI: 00:00.0 [8086/9b61] enabled

  894 01:49:35.690822  PCI: 00:02.0 [8086/0000] bus ops

  895 01:49:35.693924  PCI: 00:02.0 [8086/9b41] enabled

  896 01:49:35.699268  PCI: 00:04.0 [8086/1903] disabled

  897 01:49:35.700696  PCI: 00:08.0 [8086/1911] enabled

  898 01:49:35.703797  PCI: 00:12.0 [8086/02f9] enabled

  899 01:49:35.707072  PCI: 00:14.0 [8086/0000] bus ops

  900 01:49:35.709995  PCI: 00:14.0 [8086/02ed] enabled

  901 01:49:35.713572  PCI: 00:14.2 [8086/02ef] enabled

  902 01:49:35.717301  PCI: 00:14.3 [8086/02f0] enabled

  903 01:49:35.720652  PCI: 00:15.0 [8086/0000] bus ops

  904 01:49:35.723474  PCI: 00:15.0 [8086/02e8] enabled

  905 01:49:35.726502  PCI: 00:15.1 [8086/0000] bus ops

  906 01:49:35.729732  PCI: 00:15.1 [8086/02e9] enabled

  907 01:49:35.733593  PCI: 00:16.0 [8086/0000] ops

  908 01:49:35.736694  PCI: 00:16.0 [8086/02e0] enabled

  909 01:49:35.739675  PCI: 00:17.0 [8086/0000] ops

  910 01:49:35.743351  PCI: 00:17.0 [8086/02d3] enabled

  911 01:49:35.746284  PCI: 00:19.0 [8086/0000] bus ops

  912 01:49:35.749492  PCI: 00:19.0 [8086/02c5] enabled

  913 01:49:35.752502  PCI: 00:1d.0 [8086/0000] bus ops

  914 01:49:35.755742  PCI: 00:1d.0 [8086/02b0] enabled

  915 01:49:35.762385  PCI: Static device PCI: 00:1d.5 not found, disabling it.

  916 01:49:35.765990  PCI: 00:1e.0 [8086/0000] ops

  917 01:49:35.768903  PCI: 00:1e.0 [8086/02a8] enabled

  918 01:49:35.772270  PCI: 00:1e.2 [8086/0000] bus ops

  919 01:49:35.775927  PCI: 00:1e.2 [8086/02aa] enabled

  920 01:49:35.779012  PCI: 00:1e.3 [8086/0000] bus ops

  921 01:49:35.782525  PCI: 00:1e.3 [8086/02ab] enabled

  922 01:49:35.785711  PCI: 00:1f.0 [8086/0000] bus ops

  923 01:49:35.788629  PCI: 00:1f.0 [8086/0284] enabled

  924 01:49:35.795538  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  925 01:49:35.801767  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  926 01:49:35.805521  PCI: 00:1f.3 [8086/0000] bus ops

  927 01:49:35.808234  PCI: 00:1f.3 [8086/02c8] enabled

  928 01:49:35.811941  PCI: 00:1f.4 [8086/0000] bus ops

  929 01:49:35.814956  PCI: 00:1f.4 [8086/02a3] enabled

  930 01:49:35.818040  PCI: 00:1f.5 [8086/0000] bus ops

  931 01:49:35.821532  PCI: 00:1f.5 [8086/02a4] enabled

  932 01:49:35.824701  PCI: Leftover static devices:

  933 01:49:35.824785  PCI: 00:05.0

  934 01:49:35.824871  PCI: 00:12.5

  935 01:49:35.830746  PCI: 00:12.6

  936 01:49:35.830839  PCI: 00:14.1

  937 01:49:35.831286  PCI: 00:14.5

  938 01:49:35.831387  PCI: 00:15.2

  939 01:49:35.834422  PCI: 00:15.3

  940 01:49:35.834537  PCI: 00:16.1

  941 01:49:35.834640  PCI: 00:16.2

  942 01:49:35.837649  PCI: 00:16.3

  943 01:49:35.837737  PCI: 00:16.4

  944 01:49:35.841329  PCI: 00:16.5

  945 01:49:35.841466  PCI: 00:19.1

  946 01:49:35.841571  PCI: 00:19.2

  947 01:49:35.844490  PCI: 00:1a.0

  948 01:49:35.844579  PCI: 00:1c.0

  949 01:49:35.847286  PCI: 00:1c.1

  950 01:49:35.847376  PCI: 00:1c.2

  951 01:49:35.850912  PCI: 00:1c.3

  952 01:49:35.850993  PCI: 00:1c.4

  953 01:49:35.851066  PCI: 00:1c.5

  954 01:49:35.853939  PCI: 00:1c.6

  955 01:49:35.854016  PCI: 00:1c.7

  956 01:49:35.857671  PCI: 00:1d.1

  957 01:49:35.857787  PCI: 00:1d.2

  958 01:49:35.857877  PCI: 00:1d.3

  959 01:49:35.861027  PCI: 00:1d.4

  960 01:49:35.861115  PCI: 00:1d.5

  961 01:49:35.864041  PCI: 00:1e.1

  962 01:49:35.864133  PCI: 00:1f.1

  963 01:49:35.864222  PCI: 00:1f.2

  964 01:49:35.867208  PCI: 00:1f.6

  965 01:49:35.870404  PCI: Check your devicetree.cb.

  966 01:49:35.873946  PCI: 00:02.0 scanning...

  967 01:49:35.877103  scan_generic_bus for PCI: 00:02.0

  968 01:49:35.880178  scan_generic_bus for PCI: 00:02.0 done

  969 01:49:35.887169  scan_bus: scanning of bus PCI: 00:02.0 took 10188 usecs

  970 01:49:35.887340  PCI: 00:14.0 scanning...

  971 01:49:35.890534  scan_static_bus for PCI: 00:14.0

  972 01:49:35.893618  USB0 port 0 enabled

  973 01:49:35.896715  USB0 port 0 scanning...

  974 01:49:35.900604  scan_static_bus for USB0 port 0

  975 01:49:35.903229  USB2 port 0 enabled

  976 01:49:35.903306  USB2 port 1 enabled

  977 01:49:35.906585  USB2 port 2 disabled

  978 01:49:35.910214  USB2 port 3 disabled

  979 01:49:35.910289  USB2 port 5 disabled

  980 01:49:35.913239  USB2 port 6 enabled

  981 01:49:35.913314  USB2 port 9 enabled

  982 01:49:35.916268  USB3 port 0 enabled

  983 01:49:35.919535  USB3 port 1 enabled

  984 01:49:35.919615  USB3 port 2 enabled

  985 01:49:35.923263  USB3 port 3 enabled

  986 01:49:35.926093  USB3 port 4 disabled

  987 01:49:35.926192  USB2 port 0 scanning...

  988 01:49:35.929738  scan_static_bus for USB2 port 0

  989 01:49:35.936483  scan_static_bus for USB2 port 0 done

  990 01:49:35.939545  scan_bus: scanning of bus USB2 port 0 took 9711 usecs

  991 01:49:35.942632  USB2 port 1 scanning...

  992 01:49:35.945871  scan_static_bus for USB2 port 1

  993 01:49:35.949557  scan_static_bus for USB2 port 1 done

  994 01:49:35.955582  scan_bus: scanning of bus USB2 port 1 took 9707 usecs

  995 01:49:35.958713  USB2 port 6 scanning...

  996 01:49:35.962378  scan_static_bus for USB2 port 6

  997 01:49:35.965474  scan_static_bus for USB2 port 6 done

  998 01:49:35.968773  scan_bus: scanning of bus USB2 port 6 took 9707 usecs

  999 01:49:35.971763  USB2 port 9 scanning...

 1000 01:49:35.975414  scan_static_bus for USB2 port 9

 1001 01:49:35.978533  scan_static_bus for USB2 port 9 done

 1002 01:49:35.984724  scan_bus: scanning of bus USB2 port 9 took 9710 usecs

 1003 01:49:35.988431  USB3 port 0 scanning...

 1004 01:49:35.991492  scan_static_bus for USB3 port 0

 1005 01:49:35.995123  scan_static_bus for USB3 port 0 done

 1006 01:49:36.001246  scan_bus: scanning of bus USB3 port 0 took 9710 usecs

 1007 01:49:36.001346  USB3 port 1 scanning...

 1008 01:49:36.004591  scan_static_bus for USB3 port 1

 1009 01:49:36.010873  scan_static_bus for USB3 port 1 done

 1010 01:49:36.014383  scan_bus: scanning of bus USB3 port 1 took 9709 usecs

 1011 01:49:36.017401  USB3 port 2 scanning...

 1012 01:49:36.020603  scan_static_bus for USB3 port 2

 1013 01:49:36.023653  scan_static_bus for USB3 port 2 done

 1014 01:49:36.030618  scan_bus: scanning of bus USB3 port 2 took 9711 usecs

 1015 01:49:36.033609  USB3 port 3 scanning...

 1016 01:49:36.037231  scan_static_bus for USB3 port 3

 1017 01:49:36.040337  scan_static_bus for USB3 port 3 done

 1018 01:49:36.043408  scan_bus: scanning of bus USB3 port 3 took 9698 usecs

 1019 01:49:36.049928  scan_static_bus for USB0 port 0 done

 1020 01:49:36.053458  scan_bus: scanning of bus USB0 port 0 took 155447 usecs

 1021 01:49:36.056566  scan_static_bus for PCI: 00:14.0 done

 1022 01:49:36.063340  scan_bus: scanning of bus PCI: 00:14.0 took 173077 usecs

 1023 01:49:36.066260  PCI: 00:15.0 scanning...

 1024 01:49:36.069810  scan_generic_bus for PCI: 00:15.0

 1025 01:49:36.072961  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled

 1026 01:49:36.076161  scan_generic_bus for PCI: 00:15.0 done

 1027 01:49:36.082777  scan_bus: scanning of bus PCI: 00:15.0 took 14295 usecs

 1028 01:49:36.086018  PCI: 00:15.1 scanning...

 1029 01:49:36.089805  scan_generic_bus for PCI: 00:15.1

 1030 01:49:36.092815  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled

 1031 01:49:36.099202  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled

 1032 01:49:36.102786  scan_generic_bus for PCI: 00:15.1 done

 1033 01:49:36.108815  scan_bus: scanning of bus PCI: 00:15.1 took 18594 usecs

 1034 01:49:36.108901  PCI: 00:19.0 scanning...

 1035 01:49:36.112280  scan_generic_bus for PCI: 00:19.0

 1036 01:49:36.118930  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled

 1037 01:49:36.122448  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled

 1038 01:49:36.125770  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled

 1039 01:49:36.128740  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled

 1040 01:49:36.135545  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled

 1041 01:49:36.138547  scan_generic_bus for PCI: 00:19.0 done

 1042 01:49:36.145259  scan_bus: scanning of bus PCI: 00:19.0 took 30737 usecs

 1043 01:49:36.145347  PCI: 00:1d.0 scanning...

 1044 01:49:36.148326  do_pci_scan_bridge for PCI: 00:1d.0

 1045 01:49:36.152187  PCI: pci_scan_bus for bus 01

 1046 01:49:36.155170  PCI: 01:00.0 [1c5c/1327] enabled

 1047 01:49:36.161378  Enabling Common Clock Configuration

 1048 01:49:36.165157  L1 Sub-State supported from root port 29

 1049 01:49:36.168294  L1 Sub-State Support = 0xf

 1050 01:49:36.171327  CommonModeRestoreTime = 0x28

 1051 01:49:36.174403  Power On Value = 0x16, Power On Scale = 0x0

 1052 01:49:36.174484  ASPM: Enabled L1

 1053 01:49:36.181251  scan_bus: scanning of bus PCI: 00:1d.0 took 32790 usecs

 1054 01:49:36.184328  PCI: 00:1e.2 scanning...

 1055 01:49:36.187580  scan_generic_bus for PCI: 00:1e.2

 1056 01:49:36.191218  bus: PCI: 00:1e.2[0]->SPI: 00 enabled

 1057 01:49:36.194360  scan_generic_bus for PCI: 00:1e.2 done

 1058 01:49:36.200501  scan_bus: scanning of bus PCI: 00:1e.2 took 14020 usecs

 1059 01:49:36.204285  PCI: 00:1e.3 scanning...

 1060 01:49:36.207492  scan_generic_bus for PCI: 00:1e.3

 1061 01:49:36.210913  bus: PCI: 00:1e.3[0]->SPI: 01 enabled

 1062 01:49:36.214149  scan_generic_bus for PCI: 00:1e.3 done

 1063 01:49:36.220843  scan_bus: scanning of bus PCI: 00:1e.3 took 14010 usecs

 1064 01:49:36.223312  PCI: 00:1f.0 scanning...

 1065 01:49:36.226834  scan_static_bus for PCI: 00:1f.0

 1066 01:49:36.229970  PNP: 0c09.0 enabled

 1067 01:49:36.233576  scan_static_bus for PCI: 00:1f.0 done

 1068 01:49:36.236314  scan_bus: scanning of bus PCI: 00:1f.0 took 12063 usecs

 1069 01:49:36.239878  PCI: 00:1f.3 scanning...

 1070 01:49:36.246190  scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs

 1071 01:49:36.249642  PCI: 00:1f.4 scanning...

 1072 01:49:36.252740  scan_generic_bus for PCI: 00:1f.4

 1073 01:49:36.256479  scan_generic_bus for PCI: 00:1f.4 done

 1074 01:49:36.262726  scan_bus: scanning of bus PCI: 00:1f.4 took 10198 usecs

 1075 01:49:36.265785  PCI: 00:1f.5 scanning...

 1076 01:49:36.269494  scan_generic_bus for PCI: 00:1f.5

 1077 01:49:36.272876  scan_generic_bus for PCI: 00:1f.5 done

 1078 01:49:36.279080  scan_bus: scanning of bus PCI: 00:1f.5 took 10189 usecs

 1079 01:49:36.282103  scan_bus: scanning of bus DOMAIN: 0000 took 605310 usecs

 1080 01:49:36.289128  scan_static_bus for Root Device done

 1081 01:49:36.291959  scan_bus: scanning of bus Root Device took 625181 usecs

 1082 01:49:36.292048  done

 1083 01:49:36.295704  Chrome EC: UHEPI supported

 1084 01:49:36.302175  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

 1085 01:49:36.309079  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1086 01:49:36.315271  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

 1087 01:49:36.321856  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)

 1088 01:49:36.325429  SPI flash protection: WPSW=0 SRP0=0

 1089 01:49:36.331641  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1090 01:49:36.335299  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2

 1091 01:49:36.338275  found VGA at PCI: 00:02.0

 1092 01:49:36.341934  Setting up VGA for PCI: 00:02.0

 1093 01:49:36.347966  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1094 01:49:36.351567  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1095 01:49:36.354463  Allocating resources...

 1096 01:49:36.354547  Reading resources...

 1097 01:49:36.361052  Root Device read_resources bus 0 link: 0

 1098 01:49:36.364341  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1099 01:49:36.370725  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1100 01:49:36.374069  DOMAIN: 0000 read_resources bus 0 link: 0

 1101 01:49:36.381280  PCI: 00:14.0 read_resources bus 0 link: 0

 1102 01:49:36.384381  USB0 port 0 read_resources bus 0 link: 0

 1103 01:49:36.392933  USB0 port 0 read_resources bus 0 link: 0 done

 1104 01:49:36.395900  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1105 01:49:36.403440  PCI: 00:15.0 read_resources bus 1 link: 0

 1106 01:49:36.407120  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1107 01:49:36.413257  PCI: 00:15.1 read_resources bus 2 link: 0

 1108 01:49:36.416328  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1109 01:49:36.424487  PCI: 00:19.0 read_resources bus 3 link: 0

 1110 01:49:36.430938  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1111 01:49:36.433919  PCI: 00:1d.0 read_resources bus 1 link: 0

 1112 01:49:36.440825  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1113 01:49:36.443806  PCI: 00:1e.2 read_resources bus 4 link: 0

 1114 01:49:36.450197  PCI: 00:1e.2 read_resources bus 4 link: 0 done

 1115 01:49:36.453778  PCI: 00:1e.3 read_resources bus 5 link: 0

 1116 01:49:36.460045  PCI: 00:1e.3 read_resources bus 5 link: 0 done

 1117 01:49:36.463573  PCI: 00:1f.0 read_resources bus 0 link: 0

 1118 01:49:36.470172  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1119 01:49:36.476515  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1120 01:49:36.480030  Root Device read_resources bus 0 link: 0 done

 1121 01:49:36.483091  Done reading resources.

 1122 01:49:36.489990  Show resources in subtree (Root Device)...After reading.

 1123 01:49:36.493052   Root Device child on link 0 CPU_CLUSTER: 0

 1124 01:49:36.496140    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1125 01:49:36.499814     APIC: 00

 1126 01:49:36.499898     APIC: 02

 1127 01:49:36.502613     APIC: 01

 1128 01:49:36.502696     APIC: 06

 1129 01:49:36.502770     APIC: 03

 1130 01:49:36.505909     APIC: 05

 1131 01:49:36.505993     APIC: 04

 1132 01:49:36.506058     APIC: 07

 1133 01:49:36.512881    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1134 01:49:36.562744    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1135 01:49:36.562895    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1136 01:49:36.562968     PCI: 00:00.0

 1137 01:49:36.563246     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1138 01:49:36.563514     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1139 01:49:36.563876     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1140 01:49:36.584616     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1141 01:49:36.584901     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1142 01:49:36.588251     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1143 01:49:36.597731     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1144 01:49:36.607496     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1145 01:49:36.617512     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1146 01:49:36.627144     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1147 01:49:36.633852     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1148 01:49:36.643645     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1149 01:49:36.653531     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1150 01:49:36.663379     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1151 01:49:36.672765     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1152 01:49:36.682638     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1153 01:49:36.682746     PCI: 00:02.0

 1154 01:49:36.695605     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1155 01:49:36.706194     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1156 01:49:36.712158     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1157 01:49:36.715227     PCI: 00:04.0

 1158 01:49:36.715321     PCI: 00:08.0

 1159 01:49:36.725575     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1160 01:49:36.728607     PCI: 00:12.0

 1161 01:49:36.738594     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1162 01:49:36.741706     PCI: 00:14.0 child on link 0 USB0 port 0

 1163 01:49:36.751638     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1164 01:49:36.758091      USB0 port 0 child on link 0 USB2 port 0

 1165 01:49:36.758186       USB2 port 0

 1166 01:49:36.761550       USB2 port 1

 1167 01:49:36.761663       USB2 port 2

 1168 01:49:36.764260       USB2 port 3

 1169 01:49:36.764347       USB2 port 5

 1170 01:49:36.767793       USB2 port 6

 1171 01:49:36.767876       USB2 port 9

 1172 01:49:36.770869       USB3 port 0

 1173 01:49:36.773916       USB3 port 1

 1174 01:49:36.774044       USB3 port 2

 1175 01:49:36.777827       USB3 port 3

 1176 01:49:36.777905       USB3 port 4

 1177 01:49:36.780950     PCI: 00:14.2

 1178 01:49:36.790479     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1179 01:49:36.800229     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1180 01:49:36.800315     PCI: 00:14.3

 1181 01:49:36.810309     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1182 01:49:36.817080     PCI: 00:15.0 child on link 0 I2C: 01:15

 1183 01:49:36.826143     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1184 01:49:36.826250      I2C: 01:15

 1185 01:49:36.829636     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1186 01:49:36.839206     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1187 01:49:36.843028      I2C: 02:5d

 1188 01:49:36.843113      GENERIC: 0.0

 1189 01:49:36.846067     PCI: 00:16.0

 1190 01:49:36.855483     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1191 01:49:36.859244     PCI: 00:17.0

 1192 01:49:36.865434     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1193 01:49:36.875356     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1194 01:49:36.885633     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1195 01:49:36.891825     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1196 01:49:36.901874     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1197 01:49:36.908319     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1198 01:49:36.914735     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1199 01:49:36.924693     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1200 01:49:36.924779      I2C: 03:1a

 1201 01:49:36.927685      I2C: 03:38

 1202 01:49:36.927769      I2C: 03:39

 1203 01:49:36.931293      I2C: 03:3a

 1204 01:49:36.931376      I2C: 03:3b

 1205 01:49:36.937307     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1206 01:49:36.943959     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1207 01:49:36.953782     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1208 01:49:36.963660     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1209 01:49:36.963745      PCI: 01:00.0

 1210 01:49:36.976664      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1211 01:49:36.976750     PCI: 00:1e.0

 1212 01:49:36.986417     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1213 01:49:36.999555     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1214 01:49:37.002648     PCI: 00:1e.2 child on link 0 SPI: 00

 1215 01:49:37.013039     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1216 01:49:37.013124      SPI: 00

 1217 01:49:37.016019     PCI: 00:1e.3 child on link 0 SPI: 01

 1218 01:49:37.025656     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1219 01:49:37.028880      SPI: 01

 1220 01:49:37.032113     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1221 01:49:37.041949     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1222 01:49:37.051692     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1223 01:49:37.051777      PNP: 0c09.0

 1224 01:49:37.061631      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1225 01:49:37.061715     PCI: 00:1f.3

 1226 01:49:37.071864     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1227 01:49:37.081051     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1228 01:49:37.084792     PCI: 00:1f.4

 1229 01:49:37.094381     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1230 01:49:37.103629     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1231 01:49:37.103722     PCI: 00:1f.5

 1232 01:49:37.113756     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1233 01:49:37.120104  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1234 01:49:37.126915  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1235 01:49:37.133532  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1236 01:49:37.136341  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1237 01:49:37.139882  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1238 01:49:37.143126  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1239 01:49:37.146254  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1240 01:49:37.152598  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1241 01:49:37.162398  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1242 01:49:37.169050  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1243 01:49:37.179161  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1244 01:49:37.185579  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1245 01:49:37.188600  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1246 01:49:37.195290  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1247 01:49:37.201669  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1248 01:49:37.205055  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1249 01:49:37.211866  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem

 1250 01:49:37.214957  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem

 1251 01:49:37.221257  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem

 1252 01:49:37.224436  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem

 1253 01:49:37.231345  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem

 1254 01:49:37.234563  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem

 1255 01:49:37.240733  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem

 1256 01:49:37.244210  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem

 1257 01:49:37.247311  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem

 1258 01:49:37.254146  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem

 1259 01:49:37.257347  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem

 1260 01:49:37.264172  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem

 1261 01:49:37.267154  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem

 1262 01:49:37.273720  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem

 1263 01:49:37.276827  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem

 1264 01:49:37.283379  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem

 1265 01:49:37.286922  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem

 1266 01:49:37.293166  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem

 1267 01:49:37.296306  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem

 1268 01:49:37.303136  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem

 1269 01:49:37.306498  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem

 1270 01:49:37.316321  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done

 1271 01:49:37.319279  avoid_fixed_resources: DOMAIN: 0000

 1272 01:49:37.326098  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1273 01:49:37.332348  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1274 01:49:37.338992  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1275 01:49:37.345245  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)

 1276 01:49:37.355393  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)

 1277 01:49:37.362193  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)

 1278 01:49:37.368904  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)

 1279 01:49:37.378386  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1280 01:49:37.384692  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1281 01:49:37.391534  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1282 01:49:37.401162  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1283 01:49:37.407662  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1284 01:49:37.410684  Setting resources...

 1285 01:49:37.414178  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1286 01:49:37.420715  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1287 01:49:37.423975  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1288 01:49:37.426981  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1289 01:49:37.430642  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1290 01:49:37.437077  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1291 01:49:37.443595  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1292 01:49:37.450315  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1293 01:49:37.456487  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff

 1294 01:49:37.463134  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1295 01:49:37.469373  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1296 01:49:37.473114  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1297 01:49:37.479338  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem

 1298 01:49:37.482264  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem

 1299 01:49:37.489147  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem

 1300 01:49:37.492698  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem

 1301 01:49:37.498899  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem

 1302 01:49:37.502061  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem

 1303 01:49:37.508661  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem

 1304 01:49:37.511707  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem

 1305 01:49:37.515421  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem

 1306 01:49:37.521857  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem

 1307 01:49:37.524878  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem

 1308 01:49:37.531708  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem

 1309 01:49:37.534827  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem

 1310 01:49:37.541481  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem

 1311 01:49:37.544716  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem

 1312 01:49:37.550956  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem

 1313 01:49:37.554204  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem

 1314 01:49:37.561258  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem

 1315 01:49:37.564484  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem

 1316 01:49:37.570645  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem

 1317 01:49:37.577595  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done

 1318 01:49:37.583699  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1319 01:49:37.593795  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1320 01:49:37.600422  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1321 01:49:37.603552  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem

 1322 01:49:37.613367  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done

 1323 01:49:37.616515  Root Device assign_resources, bus 0 link: 0

 1324 01:49:37.619592  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1325 01:49:37.630040  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1326 01:49:37.637113  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1327 01:49:37.646386  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1328 01:49:37.653353  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64

 1329 01:49:37.662677  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64

 1330 01:49:37.669465  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64

 1331 01:49:37.675768  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1332 01:49:37.678794  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1333 01:49:37.688716  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64

 1334 01:49:37.695173  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64

 1335 01:49:37.705415  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64

 1336 01:49:37.711593  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64

 1337 01:49:37.718280  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1338 01:49:37.721320  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1339 01:49:37.731226  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64

 1340 01:49:37.734548  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1341 01:49:37.741123  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1342 01:49:37.748077  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64

 1343 01:49:37.757333  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem

 1344 01:49:37.764243  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem

 1345 01:49:37.770359  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1346 01:49:37.780431  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1347 01:49:37.786740  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1348 01:49:37.793179  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem

 1349 01:49:37.803069  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64

 1350 01:49:37.806631  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1351 01:49:37.813527  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1352 01:49:37.819936  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1353 01:49:37.829181  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1354 01:49:37.839517  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1355 01:49:37.842863  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1356 01:49:37.852176  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64

 1357 01:49:37.855349  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1358 01:49:37.865230  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64

 1359 01:49:37.871775  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64

 1360 01:49:37.878526  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1361 01:49:37.881700  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1362 01:49:37.891848  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64

 1363 01:49:37.894956  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1364 01:49:37.898424  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1365 01:49:37.904551  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1366 01:49:37.908146  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1367 01:49:37.914375  LPC: Trying to open IO window from 800 size 1ff

 1368 01:49:37.920983  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64

 1369 01:49:37.930594  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64

 1370 01:49:37.937408  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64

 1371 01:49:37.947563  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem

 1372 01:49:37.950464  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1373 01:49:37.956802  Root Device assign_resources, bus 0 link: 0

 1374 01:49:37.959913  Done setting resources.

 1375 01:49:37.966754  Show resources in subtree (Root Device)...After assigning values.

 1376 01:49:37.970086   Root Device child on link 0 CPU_CLUSTER: 0

 1377 01:49:37.972882    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1378 01:49:37.976329     APIC: 00

 1379 01:49:37.976444     APIC: 02

 1380 01:49:37.976533     APIC: 01

 1381 01:49:37.979639     APIC: 06

 1382 01:49:37.979718     APIC: 03

 1383 01:49:37.982914     APIC: 05

 1384 01:49:37.983018     APIC: 04

 1385 01:49:37.983108     APIC: 07

 1386 01:49:37.989404    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1387 01:49:37.999217    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1388 01:49:38.009399    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1389 01:49:38.009477     PCI: 00:00.0

 1390 01:49:38.018936     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1391 01:49:38.029150     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1392 01:49:38.038705     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1393 01:49:38.048650     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1394 01:49:38.058641     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1395 01:49:38.068138     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1396 01:49:38.078123     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1397 01:49:38.084462     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1398 01:49:38.095001     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1399 01:49:38.104141     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1400 01:49:38.113889     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1401 01:49:38.123526     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1402 01:49:38.133773     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1403 01:49:38.143236     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1404 01:49:38.153422     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1405 01:49:38.159619     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1406 01:49:38.163309     PCI: 00:02.0

 1407 01:49:38.172704     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1408 01:49:38.182650     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1409 01:49:38.192724     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1410 01:49:38.195771     PCI: 00:04.0

 1411 01:49:38.195855     PCI: 00:08.0

 1412 01:49:38.205316     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10

 1413 01:49:38.208583     PCI: 00:12.0

 1414 01:49:38.218683     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10

 1415 01:49:38.221719     PCI: 00:14.0 child on link 0 USB0 port 0

 1416 01:49:38.231322     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10

 1417 01:49:38.238240      USB0 port 0 child on link 0 USB2 port 0

 1418 01:49:38.238322       USB2 port 0

 1419 01:49:38.241231       USB2 port 1

 1420 01:49:38.241304       USB2 port 2

 1421 01:49:38.244674       USB2 port 3

 1422 01:49:38.247940       USB2 port 5

 1423 01:49:38.248040       USB2 port 6

 1424 01:49:38.251528       USB2 port 9

 1425 01:49:38.251625       USB3 port 0

 1426 01:49:38.254254       USB3 port 1

 1427 01:49:38.254365       USB3 port 2

 1428 01:49:38.257552       USB3 port 3

 1429 01:49:38.257677       USB3 port 4

 1430 01:49:38.260714     PCI: 00:14.2

 1431 01:49:38.271068     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10

 1432 01:49:38.280919     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18

 1433 01:49:38.284040     PCI: 00:14.3

 1434 01:49:38.293466     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10

 1435 01:49:38.296596     PCI: 00:15.0 child on link 0 I2C: 01:15

 1436 01:49:38.306696     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10

 1437 01:49:38.309809      I2C: 01:15

 1438 01:49:38.313378     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1439 01:49:38.322867     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10

 1440 01:49:38.326265      I2C: 02:5d

 1441 01:49:38.326351      GENERIC: 0.0

 1442 01:49:38.329237     PCI: 00:16.0

 1443 01:49:38.339509     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10

 1444 01:49:38.339596     PCI: 00:17.0

 1445 01:49:38.352389     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10

 1446 01:49:38.362251     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14

 1447 01:49:38.368843     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1448 01:49:38.378598     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1449 01:49:38.388624     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1450 01:49:38.398112     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24

 1451 01:49:38.401424     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1452 01:49:38.414525     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10

 1453 01:49:38.414641      I2C: 03:1a

 1454 01:49:38.414736      I2C: 03:38

 1455 01:49:38.417609      I2C: 03:39

 1456 01:49:38.417692      I2C: 03:3a

 1457 01:49:38.421247      I2C: 03:3b

 1458 01:49:38.424313     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1459 01:49:38.434037     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1460 01:49:38.444134     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1461 01:49:38.453811     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1462 01:49:38.457482      PCI: 01:00.0

 1463 01:49:38.467310      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10

 1464 01:49:38.470252     PCI: 00:1e.0

 1465 01:49:38.479809     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1466 01:49:38.489728     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18

 1467 01:49:38.492896     PCI: 00:1e.2 child on link 0 SPI: 00

 1468 01:49:38.506010     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10

 1469 01:49:38.506119      SPI: 00

 1470 01:49:38.509105     PCI: 00:1e.3 child on link 0 SPI: 01

 1471 01:49:38.519145     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10

 1472 01:49:38.522281      SPI: 01

 1473 01:49:38.525637     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1474 01:49:38.535515     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1475 01:49:38.542076     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1476 01:49:38.545040      PNP: 0c09.0

 1477 01:49:38.555075      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1478 01:49:38.555159     PCI: 00:1f.3

 1479 01:49:38.564812     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10

 1480 01:49:38.574937     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20

 1481 01:49:38.577731     PCI: 00:1f.4

 1482 01:49:38.587652     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1483 01:49:38.597421     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10

 1484 01:49:38.597513     PCI: 00:1f.5

 1485 01:49:38.610738     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10

 1486 01:49:38.610838  Done allocating resources.

 1487 01:49:38.617407  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0

 1488 01:49:38.620456  Enabling resources...

 1489 01:49:38.623565  PCI: 00:00.0 subsystem <- 8086/9b61

 1490 01:49:38.626598  PCI: 00:00.0 cmd <- 06

 1491 01:49:38.630109  PCI: 00:02.0 subsystem <- 8086/9b41

 1492 01:49:38.633688  PCI: 00:02.0 cmd <- 03

 1493 01:49:38.637104  PCI: 00:08.0 cmd <- 06

 1494 01:49:38.640003  PCI: 00:12.0 subsystem <- 8086/02f9

 1495 01:49:38.643182  PCI: 00:12.0 cmd <- 02

 1496 01:49:38.646382  PCI: 00:14.0 subsystem <- 8086/02ed

 1497 01:49:38.649541  PCI: 00:14.0 cmd <- 02

 1498 01:49:38.649624  PCI: 00:14.2 cmd <- 02

 1499 01:49:38.656168  PCI: 00:14.3 subsystem <- 8086/02f0

 1500 01:49:38.656253  PCI: 00:14.3 cmd <- 02

 1501 01:49:38.659403  PCI: 00:15.0 subsystem <- 8086/02e8

 1502 01:49:38.663072  PCI: 00:15.0 cmd <- 02

 1503 01:49:38.666145  PCI: 00:15.1 subsystem <- 8086/02e9

 1504 01:49:38.669220  PCI: 00:15.1 cmd <- 02

 1505 01:49:38.672553  PCI: 00:16.0 subsystem <- 8086/02e0

 1506 01:49:38.675740  PCI: 00:16.0 cmd <- 02

 1507 01:49:38.679233  PCI: 00:17.0 subsystem <- 8086/02d3

 1508 01:49:38.682228  PCI: 00:17.0 cmd <- 03

 1509 01:49:38.685697  PCI: 00:19.0 subsystem <- 8086/02c5

 1510 01:49:38.688961  PCI: 00:19.0 cmd <- 02

 1511 01:49:38.691978  PCI: 00:1d.0 bridge ctrl <- 0013

 1512 01:49:38.695353  PCI: 00:1d.0 subsystem <- 8086/02b0

 1513 01:49:38.698864  PCI: 00:1d.0 cmd <- 06

 1514 01:49:38.701690  PCI: 00:1e.0 subsystem <- 8086/02a8

 1515 01:49:38.705223  PCI: 00:1e.0 cmd <- 06

 1516 01:49:38.708277  PCI: 00:1e.2 subsystem <- 8086/02aa

 1517 01:49:38.712147  PCI: 00:1e.2 cmd <- 06

 1518 01:49:38.715453  PCI: 00:1e.3 subsystem <- 8086/02ab

 1519 01:49:38.718355  PCI: 00:1e.3 cmd <- 02

 1520 01:49:38.721476  PCI: 00:1f.0 subsystem <- 8086/0284

 1521 01:49:38.724549  PCI: 00:1f.0 cmd <- 407

 1522 01:49:38.728501  PCI: 00:1f.3 subsystem <- 8086/02c8

 1523 01:49:38.728579  PCI: 00:1f.3 cmd <- 02

 1524 01:49:38.735046  PCI: 00:1f.4 subsystem <- 8086/02a3

 1525 01:49:38.735123  PCI: 00:1f.4 cmd <- 03

 1526 01:49:38.741128  PCI: 00:1f.5 subsystem <- 8086/02a4

 1527 01:49:38.741211  PCI: 00:1f.5 cmd <- 406

 1528 01:49:38.750972  PCI: 01:00.0 cmd <- 02

 1529 01:49:38.756372  done.

 1530 01:49:38.766957  ME: Version: 14.0.39.1367

 1531 01:49:38.773099  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 10

 1532 01:49:38.776181  Initializing devices...

 1533 01:49:38.776262  Root Device init ...

 1534 01:49:38.782677  Chrome EC: Set SMI mask to 0x0000000000000000

 1535 01:49:38.789449  Chrome EC: clear events_b mask to 0x0000000000000000

 1536 01:49:38.792922  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1537 01:49:38.799296  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006

 1538 01:49:38.805850  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006

 1539 01:49:38.809005  Chrome EC: Set WAKE mask to 0x0000000000000000

 1540 01:49:38.815782  Root Device init finished in 35270 usecs

 1541 01:49:38.818992  CPU_CLUSTER: 0 init ...

 1542 01:49:38.822495  CPU_CLUSTER: 0 init finished in 2447 usecs

 1543 01:49:38.827604  PCI: 00:00.0 init ...

 1544 01:49:38.830703  CPU TDP: 15 Watts

 1545 01:49:38.833803  CPU PL2 = 64 Watts

 1546 01:49:38.837038  PCI: 00:00.0 init finished in 7081 usecs

 1547 01:49:38.840848  PCI: 00:02.0 init ...

 1548 01:49:38.843770  PCI: 00:02.0 init finished in 2254 usecs

 1549 01:49:38.846863  PCI: 00:08.0 init ...

 1550 01:49:38.850509  PCI: 00:08.0 init finished in 2252 usecs

 1551 01:49:38.853486  PCI: 00:12.0 init ...

 1552 01:49:38.857211  PCI: 00:12.0 init finished in 2253 usecs

 1553 01:49:38.860211  PCI: 00:14.0 init ...

 1554 01:49:38.863414  PCI: 00:14.0 init finished in 2252 usecs

 1555 01:49:38.866605  PCI: 00:14.2 init ...

 1556 01:49:38.870293  PCI: 00:14.2 init finished in 2252 usecs

 1557 01:49:38.873625  PCI: 00:14.3 init ...

 1558 01:49:38.876826  PCI: 00:14.3 init finished in 2269 usecs

 1559 01:49:38.880000  PCI: 00:15.0 init ...

 1560 01:49:38.883350  DW I2C bus 0 at 0xd121f000 (400 KHz)

 1561 01:49:38.889830  PCI: 00:15.0 init finished in 5978 usecs

 1562 01:49:38.889920  PCI: 00:15.1 init ...

 1563 01:49:38.895982  DW I2C bus 1 at 0xd1220000 (400 KHz)

 1564 01:49:38.899587  PCI: 00:15.1 init finished in 5978 usecs

 1565 01:49:38.902986  PCI: 00:16.0 init ...

 1566 01:49:38.906047  PCI: 00:16.0 init finished in 2243 usecs

 1567 01:49:38.909413  PCI: 00:19.0 init ...

 1568 01:49:38.912550  DW I2C bus 4 at 0xd1222000 (400 KHz)

 1569 01:49:38.915711  PCI: 00:19.0 init finished in 5978 usecs

 1570 01:49:38.918949  PCI: 00:1d.0 init ...

 1571 01:49:38.922177  Initializing PCH PCIe bridge.

 1572 01:49:38.925286  PCI: 00:1d.0 init finished in 5284 usecs

 1573 01:49:38.929379  PCI: 00:1f.0 init ...

 1574 01:49:38.932969  IOAPIC: Initializing IOAPIC at 0xfec00000

 1575 01:49:38.938953  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1576 01:49:38.939072  IOAPIC: ID = 0x02

 1577 01:49:38.942308  IOAPIC: Dumping registers

 1578 01:49:38.945942    reg 0x0000: 0x02000000

 1579 01:49:38.948956    reg 0x0001: 0x00770020

 1580 01:49:38.952624    reg 0x0002: 0x00000000

 1581 01:49:38.955690  PCI: 00:1f.0 init finished in 23547 usecs

 1582 01:49:38.958728  PCI: 00:1f.4 init ...

 1583 01:49:38.961686  PCI: 00:1f.4 init finished in 2262 usecs

 1584 01:49:38.973602  PCI: 01:00.0 init ...

 1585 01:49:38.976709  PCI: 01:00.0 init finished in 2252 usecs

 1586 01:49:38.981078  PNP: 0c09.0 init ...

 1587 01:49:38.987893  Google Chrome EC uptime: 11.041 seconds

 1588 01:49:38.991083  Google Chrome AP resets since EC boot: 0

 1589 01:49:38.994058  Google Chrome most recent AP reset causes:

 1590 01:49:39.000689  Google Chrome EC reset flags at last EC boot: reset-pin

 1591 01:49:39.003937  PNP: 0c09.0 init finished in 20556 usecs

 1592 01:49:39.007276  Devices initialized

 1593 01:49:39.010863  Show all devs... After init.

 1594 01:49:39.010946  Root Device: enabled 1

 1595 01:49:39.013606  CPU_CLUSTER: 0: enabled 1

 1596 01:49:39.017195  DOMAIN: 0000: enabled 1

 1597 01:49:39.017279  APIC: 00: enabled 1

 1598 01:49:39.020599  PCI: 00:00.0: enabled 1

 1599 01:49:39.023517  PCI: 00:02.0: enabled 1

 1600 01:49:39.027051  PCI: 00:04.0: enabled 0

 1601 01:49:39.027138  PCI: 00:05.0: enabled 0

 1602 01:49:39.030063  PCI: 00:12.0: enabled 1

 1603 01:49:39.033310  PCI: 00:12.5: enabled 0

 1604 01:49:39.037265  PCI: 00:12.6: enabled 0

 1605 01:49:39.037348  PCI: 00:14.0: enabled 1

 1606 01:49:39.039723  PCI: 00:14.1: enabled 0

 1607 01:49:39.043200  PCI: 00:14.3: enabled 1

 1608 01:49:39.046722  PCI: 00:14.5: enabled 0

 1609 01:49:39.046824  PCI: 00:15.0: enabled 1

 1610 01:49:39.049468  PCI: 00:15.1: enabled 1

 1611 01:49:39.053054  PCI: 00:15.2: enabled 0

 1612 01:49:39.056035  PCI: 00:15.3: enabled 0

 1613 01:49:39.056120  PCI: 00:16.0: enabled 1

 1614 01:49:39.059396  PCI: 00:16.1: enabled 0

 1615 01:49:39.062758  PCI: 00:16.2: enabled 0

 1616 01:49:39.066079  PCI: 00:16.3: enabled 0

 1617 01:49:39.066159  PCI: 00:16.4: enabled 0

 1618 01:49:39.069223  PCI: 00:16.5: enabled 0

 1619 01:49:39.072763  PCI: 00:17.0: enabled 1

 1620 01:49:39.075944  PCI: 00:19.0: enabled 1

 1621 01:49:39.076052  PCI: 00:19.1: enabled 0

 1622 01:49:39.079117  PCI: 00:19.2: enabled 0

 1623 01:49:39.082151  PCI: 00:1a.0: enabled 0

 1624 01:49:39.085599  PCI: 00:1c.0: enabled 0

 1625 01:49:39.085698  PCI: 00:1c.1: enabled 0

 1626 01:49:39.089301  PCI: 00:1c.2: enabled 0

 1627 01:49:39.092260  PCI: 00:1c.3: enabled 0

 1628 01:49:39.095460  PCI: 00:1c.4: enabled 0

 1629 01:49:39.095536  PCI: 00:1c.5: enabled 0

 1630 01:49:39.098595  PCI: 00:1c.6: enabled 0

 1631 01:49:39.102199  PCI: 00:1c.7: enabled 0

 1632 01:49:39.105307  PCI: 00:1d.0: enabled 1

 1633 01:49:39.105392  PCI: 00:1d.1: enabled 0

 1634 01:49:39.108837  PCI: 00:1d.2: enabled 0

 1635 01:49:39.111870  PCI: 00:1d.3: enabled 0

 1636 01:49:39.114981  PCI: 00:1d.4: enabled 0

 1637 01:49:39.115065  PCI: 00:1d.5: enabled 0

 1638 01:49:39.118603  PCI: 00:1e.0: enabled 1

 1639 01:49:39.121827  PCI: 00:1e.1: enabled 0

 1640 01:49:39.121911  PCI: 00:1e.2: enabled 1

 1641 01:49:39.125110  PCI: 00:1e.3: enabled 1

 1642 01:49:39.128114  PCI: 00:1f.0: enabled 1

 1643 01:49:39.131596  PCI: 00:1f.1: enabled 0

 1644 01:49:39.131675  PCI: 00:1f.2: enabled 0

 1645 01:49:39.134645  PCI: 00:1f.3: enabled 1

 1646 01:49:39.138108  PCI: 00:1f.4: enabled 1

 1647 01:49:39.141356  PCI: 00:1f.5: enabled 1

 1648 01:49:39.141461  PCI: 00:1f.6: enabled 0

 1649 01:49:39.144584  USB0 port 0: enabled 1

 1650 01:49:39.147543  I2C: 01:15: enabled 1

 1651 01:49:39.150719  I2C: 02:5d: enabled 1

 1652 01:49:39.150822  GENERIC: 0.0: enabled 1

 1653 01:49:39.154469  I2C: 03:1a: enabled 1

 1654 01:49:39.157479  I2C: 03:38: enabled 1

 1655 01:49:39.157582  I2C: 03:39: enabled 1

 1656 01:49:39.160528  I2C: 03:3a: enabled 1

 1657 01:49:39.163921  I2C: 03:3b: enabled 1

 1658 01:49:39.164006  PCI: 00:00.0: enabled 1

 1659 01:49:39.167327  SPI: 00: enabled 1

 1660 01:49:39.170716  SPI: 01: enabled 1

 1661 01:49:39.170820  PNP: 0c09.0: enabled 1

 1662 01:49:39.173672  USB2 port 0: enabled 1

 1663 01:49:39.177277  USB2 port 1: enabled 1

 1664 01:49:39.180279  USB2 port 2: enabled 0

 1665 01:49:39.180390  USB2 port 3: enabled 0

 1666 01:49:39.183575  USB2 port 5: enabled 0

 1667 01:49:39.186873  USB2 port 6: enabled 1

 1668 01:49:39.186950  USB2 port 9: enabled 1

 1669 01:49:39.189956  USB3 port 0: enabled 1

 1670 01:49:39.193172  USB3 port 1: enabled 1

 1671 01:49:39.196959  USB3 port 2: enabled 1

 1672 01:49:39.197059  USB3 port 3: enabled 1

 1673 01:49:39.200076  USB3 port 4: enabled 0

 1674 01:49:39.203246  APIC: 02: enabled 1

 1675 01:49:39.203349  APIC: 01: enabled 1

 1676 01:49:39.206822  APIC: 06: enabled 1

 1677 01:49:39.206900  APIC: 03: enabled 1

 1678 01:49:39.209745  APIC: 05: enabled 1

 1679 01:49:39.213023  APIC: 04: enabled 1

 1680 01:49:39.213127  APIC: 07: enabled 1

 1681 01:49:39.216140  PCI: 00:08.0: enabled 1

 1682 01:49:39.219335  PCI: 00:14.2: enabled 1

 1683 01:49:39.222425  PCI: 01:00.0: enabled 1

 1684 01:49:39.226036  Disabling ACPI via APMC:

 1685 01:49:39.226141  done.

 1686 01:49:39.232682  FMAP: area RW_ELOG found @ af0000 (16384 bytes)

 1687 01:49:39.235675  ELOG: NV offset 0xaf0000 size 0x4000

 1688 01:49:39.242672  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1689 01:49:39.249633  ELOG: Event(17) added with size 13 at 2023-10-11 01:49:39 UTC

 1690 01:49:39.255836  ELOG: Event(92) added with size 9 at 2023-10-11 01:49:39 UTC

 1691 01:49:39.262107  ELOG: Event(93) added with size 9 at 2023-10-11 01:49:39 UTC

 1692 01:49:39.268924  ELOG: Event(9A) added with size 9 at 2023-10-11 01:49:39 UTC

 1693 01:49:39.275153  ELOG: Event(9E) added with size 10 at 2023-10-11 01:49:39 UTC

 1694 01:49:39.281901  ELOG: Event(9F) added with size 14 at 2023-10-11 01:49:39 UTC

 1695 01:49:39.288303  BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6

 1696 01:49:39.295154  ELOG: Event(A1) added with size 10 at 2023-10-11 01:49:39 UTC

 1697 01:49:39.301365  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1698 01:49:39.307719  ELOG: Event(A0) added with size 9 at 2023-10-11 01:49:39 UTC

 1699 01:49:39.311462  elog_add_boot_reason: Logged dev mode boot

 1700 01:49:39.314451  Finalize devices...

 1701 01:49:39.317458  PCI: 00:17.0 final

 1702 01:49:39.317558  Devices finalized

 1703 01:49:39.324030  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)

 1704 01:49:39.327737  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0

 1705 01:49:39.334471  ME: HFSTS1                  : 0x90000245

 1706 01:49:39.337428  ME: HFSTS2                  : 0x3B850126

 1707 01:49:39.340362  ME: HFSTS3                  : 0x00000020

 1708 01:49:39.343865  ME: HFSTS4                  : 0x00004800

 1709 01:49:39.350445  ME: HFSTS5                  : 0x00000000

 1710 01:49:39.353691  ME: HFSTS6                  : 0x40400006

 1711 01:49:39.356818  ME: Manufacturing Mode      : NO

 1712 01:49:39.360547  ME: FW Partition Table      : OK

 1713 01:49:39.363777  ME: Bringup Loader Failure  : NO

 1714 01:49:39.366754  ME: Firmware Init Complete  : YES

 1715 01:49:39.369825  ME: Boot Options Present    : NO

 1716 01:49:39.373454  ME: Update In Progress      : NO

 1717 01:49:39.376714  ME: D0i3 Support            : YES

 1718 01:49:39.379849  ME: Low Power State Enabled : NO

 1719 01:49:39.382929  ME: CPU Replaced            : NO

 1720 01:49:39.386752  ME: CPU Replacement Valid   : YES

 1721 01:49:39.389708  ME: Current Working State   : 5

 1722 01:49:39.392886  ME: Current Operation State : 1

 1723 01:49:39.395952  ME: Current Operation Mode  : 0

 1724 01:49:39.399767  ME: Error Code              : 0

 1725 01:49:39.402660  ME: CPU Debug Disabled      : YES

 1726 01:49:39.406152  ME: TXT Support             : NO

 1727 01:49:39.412234  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 1728 01:49:39.415716  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1729 01:49:39.419133  CBFS @ c08000 size 3f8000

 1730 01:49:39.425357  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1731 01:49:39.428748  CBFS: Locating 'fallback/dsdt.aml'

 1732 01:49:39.432234  CBFS: Found @ offset 10bb80 size 3fa5

 1733 01:49:39.438927  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1734 01:49:39.442010  CBFS @ c08000 size 3f8000

 1735 01:49:39.445177  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1736 01:49:39.448549  CBFS: Locating 'fallback/slic'

 1737 01:49:39.456868  CBFS: 'fallback/slic' not found.

 1738 01:49:39.460026  ACPI: Writing ACPI tables at 99b3e000.

 1739 01:49:39.460113  ACPI:    * FACS

 1740 01:49:39.463116  ACPI:    * DSDT

 1741 01:49:39.466461  Ramoops buffer: 0x100000@0x99a3d000.

 1742 01:49:39.470026  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1743 01:49:39.476096  FMAP: area RW_VPD found @ af8000 (8192 bytes)

 1744 01:49:39.479878  Google Chrome EC: version:

 1745 01:49:39.482969  	ro: helios_v2.0.2659-56403530b

 1746 01:49:39.486049  	rw: helios_v2.0.2849-c41de27e7d

 1747 01:49:39.486151    running image: 1

 1748 01:49:39.490523  ACPI:    * FADT

 1749 01:49:39.490622  SCI is IRQ9

 1750 01:49:39.497222  ACPI: added table 1/32, length now 40

 1751 01:49:39.497302  ACPI:     * SSDT

 1752 01:49:39.500360  Found 1 CPU(s) with 8 core(s) each.

 1753 01:49:39.504110  Error: Could not locate 'wifi_sar' in VPD.

 1754 01:49:39.510166  Checking CBFS for default SAR values

 1755 01:49:39.513916  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1756 01:49:39.517157  CBFS @ c08000 size 3f8000

 1757 01:49:39.523432  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1758 01:49:39.526557  CBFS: Locating 'wifi_sar_defaults.hex'

 1759 01:49:39.530018  CBFS: Found @ offset 5fac0 size 77

 1760 01:49:39.533224  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3

 1761 01:49:39.540120  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15

 1762 01:49:39.543281  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d

 1763 01:49:39.549455  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a

 1764 01:49:39.553162  failed to find key in VPD: dsm_calib_r0_0

 1765 01:49:39.562834  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0

 1766 01:49:39.569305  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h

 1767 01:49:39.572224  failed to find key in VPD: dsm_calib_r0_1

 1768 01:49:39.582393  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0

 1769 01:49:39.585538  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h

 1770 01:49:39.588670  failed to find key in VPD: dsm_calib_r0_2

 1771 01:49:39.598735  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0

 1772 01:49:39.604861  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah

 1773 01:49:39.607941  failed to find key in VPD: dsm_calib_r0_3

 1774 01:49:39.617738  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0

 1775 01:49:39.621390  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh

 1776 01:49:39.627470  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1777 01:49:39.631084  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01

 1778 01:49:39.634677  EC returned error result code 1

 1779 01:49:39.637543  EC returned error result code 1

 1780 01:49:39.644249  EC returned error result code 1

 1781 01:49:39.647643  PS2K: Bad resp from EC. Vivaldi disabled!

 1782 01:49:39.654184  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1783 01:49:39.657866  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1

 1784 01:49:39.664187  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6

 1785 01:49:39.666973  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1786 01:49:39.673794  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1787 01:49:39.680762  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1

 1788 01:49:39.686981  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1789 01:49:39.693380  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3

 1790 01:49:39.696434  ACPI: added table 2/32, length now 44

 1791 01:49:39.696538  ACPI:    * MCFG

 1792 01:49:39.700222  ACPI: added table 3/32, length now 48

 1793 01:49:39.703421  ACPI:    * TPM2

 1794 01:49:39.706531  TPM2 log created at 99a2d000

 1795 01:49:39.709673  ACPI: added table 4/32, length now 52

 1796 01:49:39.709748  ACPI:    * MADT

 1797 01:49:39.712899  SCI is IRQ9

 1798 01:49:39.716357  ACPI: added table 5/32, length now 56

 1799 01:49:39.719455  current = 99b43ac0

 1800 01:49:39.719529  ACPI:    * DMAR

 1801 01:49:39.722583  ACPI: added table 6/32, length now 60

 1802 01:49:39.726613  ACPI:    * IGD OpRegion

 1803 01:49:39.729369  GMA: Found VBT in CBFS

 1804 01:49:39.732929  GMA: Found valid VBT in CBFS

 1805 01:49:39.735932  ACPI: added table 7/32, length now 64

 1806 01:49:39.736004  ACPI:    * HPET

 1807 01:49:39.739029  ACPI: added table 8/32, length now 68

 1808 01:49:39.742377  ACPI: done.

 1809 01:49:39.745695  ACPI tables: 31744 bytes.

 1810 01:49:39.748736  smbios_write_tables: 99a2c000

 1811 01:49:39.752125  EC returned error result code 3

 1812 01:49:39.755310  Couldn't obtain OEM name from CBI

 1813 01:49:39.758627  Create SMBIOS type 17

 1814 01:49:39.762154  PCI: 00:00.0 (Intel Cannonlake)

 1815 01:49:39.762268  PCI: 00:14.3 (Intel WiFi)

 1816 01:49:39.765078  SMBIOS tables: 939 bytes.

 1817 01:49:39.771894  Writing table forward entry at 0x00000500

 1818 01:49:39.775048  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628

 1819 01:49:39.781708  Writing coreboot table at 0x99b62000

 1820 01:49:39.784663   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1821 01:49:39.791408   1. 0000000000001000-000000000009ffff: RAM

 1822 01:49:39.794383   2. 00000000000a0000-00000000000fffff: RESERVED

 1823 01:49:39.798264   3. 0000000000100000-0000000099a2bfff: RAM

 1824 01:49:39.804352   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES

 1825 01:49:39.810831   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE

 1826 01:49:39.814647   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES

 1827 01:49:39.820741   7. 000000009a000000-000000009f7fffff: RESERVED

 1828 01:49:39.824381   8. 00000000e0000000-00000000efffffff: RESERVED

 1829 01:49:39.830597   9. 00000000fc000000-00000000fc000fff: RESERVED

 1830 01:49:39.833753  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1831 01:49:39.840303  11. 00000000fed10000-00000000fed17fff: RESERVED

 1832 01:49:39.843525  12. 00000000fed80000-00000000fed83fff: RESERVED

 1833 01:49:39.850342  13. 00000000fed90000-00000000fed91fff: RESERVED

 1834 01:49:39.853518  14. 00000000feda0000-00000000feda1fff: RESERVED

 1835 01:49:39.856771  15. 0000000100000000-000000045e7fffff: RAM

 1836 01:49:39.863482  Graphics framebuffer located at 0xc0000000

 1837 01:49:39.866447  Passing 5 GPIOs to payload:

 1838 01:49:39.870191              NAME |       PORT | POLARITY |     VALUE

 1839 01:49:39.875973     write protect |  undefined |     high |       low

 1840 01:49:39.882686               lid |  undefined |     high |      high

 1841 01:49:39.886049             power |  undefined |     high |       low

 1842 01:49:39.892409             oprom |  undefined |     high |       low

 1843 01:49:39.895999          EC in RW | 0x000000cb |     high |       low

 1844 01:49:39.898823  Board ID: 4

 1845 01:49:39.902427  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1846 01:49:39.905489  CBFS @ c08000 size 3f8000

 1847 01:49:39.912161  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1848 01:49:39.918361  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum f861

 1849 01:49:39.922214  coreboot table: 1492 bytes.

 1850 01:49:39.925031  IMD ROOT    0. 99fff000 00001000

 1851 01:49:39.928125  IMD SMALL   1. 99ffe000 00001000

 1852 01:49:39.931359  FSP MEMORY  2. 99c4e000 003b0000

 1853 01:49:39.935104  CONSOLE     3. 99c2e000 00020000

 1854 01:49:39.938355  FMAP        4. 99c2d000 0000054e

 1855 01:49:39.941306  TIME STAMP  5. 99c2c000 00000910

 1856 01:49:39.944869  VBOOT WORK  6. 99c18000 00014000

 1857 01:49:39.948005  MRC DATA    7. 99c16000 00001958

 1858 01:49:39.951175  ROMSTG STCK 8. 99c15000 00001000

 1859 01:49:39.954761  AFTER CAR   9. 99c0b000 0000a000

 1860 01:49:39.957901  RAMSTAGE   10. 99baf000 0005c000

 1861 01:49:39.961139  REFCODE    11. 99b7a000 00035000

 1862 01:49:39.964390  SMM BACKUP 12. 99b6a000 00010000

 1863 01:49:39.967913  COREBOOT   13. 99b62000 00008000

 1864 01:49:39.970976  ACPI       14. 99b3e000 00024000

 1865 01:49:39.973984  ACPI GNVS  15. 99b3d000 00001000

 1866 01:49:39.977232  RAMOOPS    16. 99a3d000 00100000

 1867 01:49:39.980707  TPM2 TCGLOG17. 99a2d000 00010000

 1868 01:49:39.983752  SMBIOS     18. 99a2c000 00000800

 1869 01:49:39.987164  IMD small region:

 1870 01:49:39.990537    IMD ROOT    0. 99ffec00 00000400

 1871 01:49:39.993625    FSP RUNTIME 1. 99ffebe0 00000004

 1872 01:49:39.997132    EC HOSTEVENT 2. 99ffebc0 00000008

 1873 01:49:40.000106    POWER STATE 3. 99ffeb80 00000040

 1874 01:49:40.003648    ROMSTAGE    4. 99ffeb60 00000004

 1875 01:49:40.007041    MEM INFO    5. 99ffe9a0 000001b9

 1876 01:49:40.009751    VPD         6. 99ffe920 0000006c

 1877 01:49:40.013102  MTRR: Physical address space:

 1878 01:49:40.020345  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1879 01:49:40.026257  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1880 01:49:40.033063  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6

 1881 01:49:40.039511  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0

 1882 01:49:40.045975  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1883 01:49:40.049307  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1884 01:49:40.056068  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6

 1885 01:49:40.062304  MTRR: Fixed MSR 0x250 0x0606060606060606

 1886 01:49:40.065455  MTRR: Fixed MSR 0x258 0x0606060606060606

 1887 01:49:40.068658  MTRR: Fixed MSR 0x259 0x0000000000000000

 1888 01:49:40.072404  MTRR: Fixed MSR 0x268 0x0606060606060606

 1889 01:49:40.078625  MTRR: Fixed MSR 0x269 0x0606060606060606

 1890 01:49:40.082164  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1891 01:49:40.085329  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1892 01:49:40.088537  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1893 01:49:40.094969  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1894 01:49:40.098290  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1895 01:49:40.101723  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1896 01:49:40.104845  call enable_fixed_mtrr()

 1897 01:49:40.108071  CPU physical address size: 39 bits

 1898 01:49:40.114888  MTRR: default type WB/UC MTRR counts: 6/8.

 1899 01:49:40.117799  MTRR: WB selected as default type.

 1900 01:49:40.124199  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0

 1901 01:49:40.127477  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0

 1902 01:49:40.134279  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 1903 01:49:40.140926  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1904 01:49:40.147791  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0

 1905 01:49:40.153948  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0

 1906 01:49:40.154029  

 1907 01:49:40.157487  MTRR check

 1908 01:49:40.157588  Fixed MTRRs   : Enabled

 1909 01:49:40.160643  Variable MTRRs: Enabled

 1910 01:49:40.160722  

 1911 01:49:40.166849  MTRR: Fixed MSR 0x250 0x0606060606060606

 1912 01:49:40.170702  MTRR: Fixed MSR 0x258 0x0606060606060606

 1913 01:49:40.173835  MTRR: Fixed MSR 0x259 0x0000000000000000

 1914 01:49:40.177119  MTRR: Fixed MSR 0x268 0x0606060606060606

 1915 01:49:40.183728  MTRR: Fixed MSR 0x269 0x0606060606060606

 1916 01:49:40.187062  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1917 01:49:40.190207  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1918 01:49:40.193802  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1919 01:49:40.196807  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1920 01:49:40.203484  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1921 01:49:40.206662  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1922 01:49:40.212954  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2

 1923 01:49:40.213038  call enable_fixed_mtrr()

 1924 01:49:40.219728  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1925 01:49:40.222677  CPU physical address size: 39 bits

 1926 01:49:40.226373  CBFS @ c08000 size 3f8000

 1927 01:49:40.232972  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1928 01:49:40.235785  CBFS: Locating 'fallback/payload'

 1929 01:49:40.238941  MTRR: Fixed MSR 0x250 0x0606060606060606

 1930 01:49:40.242293  MTRR: Fixed MSR 0x258 0x0606060606060606

 1931 01:49:40.248872  MTRR: Fixed MSR 0x259 0x0000000000000000

 1932 01:49:40.252492  MTRR: Fixed MSR 0x268 0x0606060606060606

 1933 01:49:40.255459  MTRR: Fixed MSR 0x269 0x0606060606060606

 1934 01:49:40.259202  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1935 01:49:40.265306  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1936 01:49:40.268503  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1937 01:49:40.272200  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1938 01:49:40.275360  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1939 01:49:40.281988  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1940 01:49:40.285112  MTRR: Fixed MSR 0x250 0x0606060606060606

 1941 01:49:40.288154  call enable_fixed_mtrr()

 1942 01:49:40.291898  MTRR: Fixed MSR 0x258 0x0606060606060606

 1943 01:49:40.295052  MTRR: Fixed MSR 0x259 0x0000000000000000

 1944 01:49:40.297950  MTRR: Fixed MSR 0x268 0x0606060606060606

 1945 01:49:40.304703  MTRR: Fixed MSR 0x269 0x0606060606060606

 1946 01:49:40.308253  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1947 01:49:40.311211  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1948 01:49:40.314590  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1949 01:49:40.321116  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1950 01:49:40.324210  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1951 01:49:40.327961  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1952 01:49:40.330898  CPU physical address size: 39 bits

 1953 01:49:40.334706  call enable_fixed_mtrr()

 1954 01:49:40.337742  CBFS: Found @ offset 1c96c0 size 3f798

 1955 01:49:40.344565  MTRR: Fixed MSR 0x250 0x0606060606060606

 1956 01:49:40.347688  MTRR: Fixed MSR 0x250 0x0606060606060606

 1957 01:49:40.350710  MTRR: Fixed MSR 0x258 0x0606060606060606

 1958 01:49:40.354119  MTRR: Fixed MSR 0x259 0x0000000000000000

 1959 01:49:40.360887  MTRR: Fixed MSR 0x268 0x0606060606060606

 1960 01:49:40.364039  MTRR: Fixed MSR 0x269 0x0606060606060606

 1961 01:49:40.367079  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1962 01:49:40.370361  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1963 01:49:40.377037  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1964 01:49:40.380124  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1965 01:49:40.383897  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1966 01:49:40.387087  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1967 01:49:40.393822  MTRR: Fixed MSR 0x258 0x0606060606060606

 1968 01:49:40.393915  call enable_fixed_mtrr()

 1969 01:49:40.400090  MTRR: Fixed MSR 0x259 0x0000000000000000

 1970 01:49:40.403109  MTRR: Fixed MSR 0x268 0x0606060606060606

 1971 01:49:40.406937  MTRR: Fixed MSR 0x269 0x0606060606060606

 1972 01:49:40.410026  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1973 01:49:40.416368  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1974 01:49:40.419504  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1975 01:49:40.423163  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1976 01:49:40.426436  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1977 01:49:40.432997  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1978 01:49:40.436735  CPU physical address size: 39 bits

 1979 01:49:40.439186  call enable_fixed_mtrr()

 1980 01:49:40.442845  MTRR: Fixed MSR 0x250 0x0606060606060606

 1981 01:49:40.445862  MTRR: Fixed MSR 0x258 0x0606060606060606

 1982 01:49:40.449473  MTRR: Fixed MSR 0x259 0x0000000000000000

 1983 01:49:40.455855  MTRR: Fixed MSR 0x268 0x0606060606060606

 1984 01:49:40.458822  MTRR: Fixed MSR 0x269 0x0606060606060606

 1985 01:49:40.462311  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1986 01:49:40.465592  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1987 01:49:40.472001  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1988 01:49:40.474998  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1989 01:49:40.478187  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1990 01:49:40.481936  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1991 01:49:40.488211  MTRR: Fixed MSR 0x250 0x0606060606060606

 1992 01:49:40.491403  call enable_fixed_mtrr()

 1993 01:49:40.495323  MTRR: Fixed MSR 0x258 0x0606060606060606

 1994 01:49:40.498410  MTRR: Fixed MSR 0x259 0x0000000000000000

 1995 01:49:40.501546  MTRR: Fixed MSR 0x268 0x0606060606060606

 1996 01:49:40.507664  MTRR: Fixed MSR 0x269 0x0606060606060606

 1997 01:49:40.510845  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1998 01:49:40.514610  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1999 01:49:40.517617  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2000 01:49:40.523902  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2001 01:49:40.527003  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2002 01:49:40.530589  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2003 01:49:40.533653  CPU physical address size: 39 bits

 2004 01:49:40.537627  call enable_fixed_mtrr()

 2005 01:49:40.541046  CPU physical address size: 39 bits

 2006 01:49:40.547250  Checking segment from ROM address 0xffdd16f8

 2007 01:49:40.550805  CPU physical address size: 39 bits

 2008 01:49:40.553683  Checking segment from ROM address 0xffdd1714

 2009 01:49:40.557099  CPU physical address size: 39 bits

 2010 01:49:40.560442  Loading segment from ROM address 0xffdd16f8

 2011 01:49:40.563811    code (compression=0)

 2012 01:49:40.573876    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760

 2013 01:49:40.580118  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760

 2014 01:49:40.583047  it's not compressed!

 2015 01:49:40.675646  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730

 2016 01:49:40.682149  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0

 2017 01:49:40.688645  Loading segment from ROM address 0xffdd1714

 2018 01:49:40.688775    Entry Point 0x30000000

 2019 01:49:40.691812  Loaded segments

 2020 01:49:40.697275  Finalizing chipset.

 2021 01:49:40.700972  Finalizing SMM.

 2022 01:49:40.704141  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5

 2023 01:49:40.707231  mp_park_aps done after 0 msecs.

 2024 01:49:40.714055  Jumping to boot code at 30000000(99b62000)

 2025 01:49:40.720297  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes

 2026 01:49:40.720389  

 2027 01:49:40.720457  

 2028 01:49:40.720523  

 2029 01:49:40.723504  Starting depthcharge on Helios...

 2030 01:49:40.723584  

 2031 01:49:40.723929  end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
 2032 01:49:40.724040  start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
 2033 01:49:40.724124  Setting prompt string to ['hatch:']
 2034 01:49:40.724213  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
 2035 01:49:40.733821  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2036 01:49:40.733930  

 2037 01:49:40.739805  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2038 01:49:40.739886  

 2039 01:49:40.746569  board_setup: Info: eMMC controller not present; skipping

 2040 01:49:40.746678  

 2041 01:49:40.749480  New NVMe Controller 0x30053ac0 @ 00:1d:00

 2042 01:49:40.749581  

 2043 01:49:40.756319  board_setup: Info: SDHCI controller not present; skipping

 2044 01:49:40.756426  

 2045 01:49:40.762675  vboot_create_vbsd: creating legacy VbSharedDataHeader structure

 2046 01:49:40.762788  

 2047 01:49:40.762886  Wipe memory regions:

 2048 01:49:40.762976  

 2049 01:49:40.769205  	[0x00000000001000, 0x000000000a0000)

 2050 01:49:40.769316  

 2051 01:49:40.772286  	[0x00000000100000, 0x00000030000000)

 2052 01:49:40.835556  

 2053 01:49:40.838734  	[0x00000030657430, 0x00000099a2c000)

 2054 01:49:40.976377  

 2055 01:49:40.979287  	[0x00000100000000, 0x0000045e800000)

 2056 01:49:42.361866  

 2057 01:49:42.362036  R8152: Initializing

 2058 01:49:42.362136  

 2059 01:49:42.365046  Version 9 (ocp_data = 6010)

 2060 01:49:42.369412  

 2061 01:49:42.369497  R8152: Done initializing

 2062 01:49:42.369564  

 2063 01:49:42.372674  Adding net device

 2064 01:49:42.977100  

 2065 01:49:42.977263  R8152: Initializing

 2066 01:49:42.977362  

 2067 01:49:42.980054  Version 6 (ocp_data = 5c30)

 2068 01:49:42.980159  

 2069 01:49:42.983260  R8152: Done initializing

 2070 01:49:42.983362  

 2071 01:49:42.990330  net_add_device: Attemp to include the same device

 2072 01:49:42.990421  

 2073 01:49:42.996980  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58

 2074 01:49:42.997066  

 2075 01:49:42.997168  

 2076 01:49:42.997264  

 2077 01:49:42.997573  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2079 01:49:43.097947  hatch: tftpboot 192.168.201.1 11733040/tftp-deploy-u_7uk3tp/kernel/bzImage 11733040/tftp-deploy-u_7uk3tp/kernel/cmdline 11733040/tftp-deploy-u_7uk3tp/ramdisk/ramdisk.cpio.gz

 2080 01:49:43.098111  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2081 01:49:43.098199  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
 2082 01:49:43.102472  tftpboot 192.168.201.1 11733040/tftp-deploy-u_7uk3tp/kernel/bzIloy-u_7uk3tp/kernel/cmdline 11733040/tftp-deploy-u_7uk3tp/ramdisk/ramdisk.cpio.gz

 2083 01:49:43.102562  

 2084 01:49:43.102627  Waiting for link

 2085 01:49:43.302934  

 2086 01:49:43.303070  done.

 2087 01:49:43.303139  

 2088 01:49:43.303202  MAC: 00:24:32:30:7f:7f

 2089 01:49:43.303263  

 2090 01:49:43.306233  Sending DHCP discover... done.

 2091 01:49:43.306309  

 2092 01:49:43.309591  Waiting for reply... done.

 2093 01:49:43.309695  

 2094 01:49:43.314019  Sending DHCP request... done.

 2095 01:49:43.314135  

 2096 01:49:43.320162  Waiting for reply... done.

 2097 01:49:43.320284  

 2098 01:49:43.320382  My ip is 192.168.201.15

 2099 01:49:43.320476  

 2100 01:49:43.322942  The DHCP server ip is 192.168.201.1

 2101 01:49:43.326311  

 2102 01:49:43.329848  TFTP server IP predefined by user: 192.168.201.1

 2103 01:49:43.329954  

 2104 01:49:43.336553  Bootfile predefined by user: 11733040/tftp-deploy-u_7uk3tp/kernel/bzImage

 2105 01:49:43.336670  

 2106 01:49:43.339785  Sending tftp read request... done.

 2107 01:49:43.339897  

 2108 01:49:43.345864  Waiting for the transfer... 

 2109 01:49:43.345986  

 2110 01:49:43.947220  00000000 ################################################################

 2111 01:49:43.947391  

 2112 01:49:44.567835  00080000 ################################################################

 2113 01:49:44.567974  

 2114 01:49:45.138217  00100000 ################################################################

 2115 01:49:45.138384  

 2116 01:49:45.669964  00180000 ################################################################

 2117 01:49:45.670122  

 2118 01:49:46.201630  00200000 ################################################################

 2119 01:49:46.201767  

 2120 01:49:46.727662  00280000 ################################################################

 2121 01:49:46.727800  

 2122 01:49:47.280925  00300000 ################################################################

 2123 01:49:47.281086  

 2124 01:49:47.827949  00380000 ################################################################

 2125 01:49:47.828093  

 2126 01:49:48.371934  00400000 ################################################################

 2127 01:49:48.372070  

 2128 01:49:48.903889  00480000 ################################################################

 2129 01:49:48.904032  

 2130 01:49:49.448369  00500000 ################################################################

 2131 01:49:49.448546  

 2132 01:49:49.975085  00580000 ################################################################

 2133 01:49:49.975244  

 2134 01:49:50.503733  00600000 ################################################################

 2135 01:49:50.503871  

 2136 01:49:51.049556  00680000 ################################################################

 2137 01:49:51.049723  

 2138 01:49:51.585960  00700000 ################################################################

 2139 01:49:51.586098  

 2140 01:49:52.123801  00780000 ################################################################

 2141 01:49:52.123948  

 2142 01:49:52.678639  00800000 ################################################################

 2143 01:49:52.678823  

 2144 01:49:53.239293  00880000 ################################################################

 2145 01:49:53.239433  

 2146 01:49:53.800884  00900000 ################################################################

 2147 01:49:53.801026  

 2148 01:49:54.377730  00980000 ################################################################

 2149 01:49:54.377866  

 2150 01:49:54.943881  00a00000 ################################################################

 2151 01:49:54.944036  

 2152 01:49:55.411656  00a80000 ######################################################### done.

 2153 01:49:55.411820  

 2154 01:49:55.415131  The bootfile was 11473408 bytes long.

 2155 01:49:55.415242  

 2156 01:49:55.418429  Sending tftp read request... done.

 2157 01:49:55.418531  

 2158 01:49:55.421410  Waiting for the transfer... 

 2159 01:49:55.421507  

 2160 01:49:55.960208  00000000 ################################################################

 2161 01:49:55.960438  

 2162 01:49:56.522486  00080000 ################################################################

 2163 01:49:56.522631  

 2164 01:49:57.053496  00100000 ################################################################

 2165 01:49:57.053676  

 2166 01:49:57.584509  00180000 ################################################################

 2167 01:49:57.584661  

 2168 01:49:58.110906  00200000 ################################################################

 2169 01:49:58.111059  

 2170 01:49:58.727467  00280000 ################################################################

 2171 01:49:58.727604  

 2172 01:49:59.346815  00300000 ################################################################

 2173 01:49:59.346968  

 2174 01:49:59.989714  00380000 ################################################################

 2175 01:49:59.989866  

 2176 01:50:00.575296  00400000 ################################################################

 2177 01:50:00.575470  

 2178 01:50:01.184815  00480000 ################################################################

 2179 01:50:01.185276  

 2180 01:50:01.730434  00500000 ################################################################

 2181 01:50:01.730578  

 2182 01:50:02.123443  00580000 ################################################ done.

 2183 01:50:02.123586  

 2184 01:50:02.126445  Sending tftp read request... done.

 2185 01:50:02.126529  

 2186 01:50:02.129725  Waiting for the transfer... 

 2187 01:50:02.129808  

 2188 01:50:02.129873  00000000 # done.

 2189 01:50:02.129935  

 2190 01:50:02.139681  Command line loaded dynamically from TFTP file: 11733040/tftp-deploy-u_7uk3tp/kernel/cmdline

 2191 01:50:02.139765  

 2192 01:50:02.168983  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11733040/extract-nfsrootfs-4_m8g7lz,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2193 01:50:02.169110  

 2194 01:50:02.175344  ec_init(0): CrosEC protocol v3 supported (256, 256)

 2195 01:50:02.179327  

 2196 01:50:02.182620  Shutting down all USB controllers.

 2197 01:50:02.182727  

 2198 01:50:02.182842  Removing current net device

 2199 01:50:02.190957  

 2200 01:50:02.191034  Finalizing coreboot

 2201 01:50:02.191097  

 2202 01:50:02.197123  Exiting depthcharge with code 4 at timestamp: 28821828

 2203 01:50:02.197201  

 2204 01:50:02.197262  

 2205 01:50:02.197350  Starting kernel ...

 2206 01:50:02.197452  

 2207 01:50:02.197508  

 2208 01:50:02.197896  end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
 2209 01:50:02.197995  start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
 2210 01:50:02.198078  Setting prompt string to ['Linux version [0-9]']
 2211 01:50:02.198154  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2212 01:50:02.198222  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2214 01:54:23.198248  end: 2.2.5 auto-login-action (duration 00:04:21) [common]
 2216 01:54:23.198470  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
 2218 01:54:23.198624  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2221 01:54:23.198894  end: 2 depthcharge-action (duration 00:05:00) [common]
 2223 01:54:23.199132  Cleaning after the job
 2224 01:54:23.199224  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11733040/tftp-deploy-u_7uk3tp/ramdisk
 2225 01:54:23.200177  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11733040/tftp-deploy-u_7uk3tp/kernel
 2226 01:54:23.201867  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11733040/tftp-deploy-u_7uk3tp/nfsrootfs
 2227 01:54:23.294859  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11733040/tftp-deploy-u_7uk3tp/modules
 2228 01:54:23.295576  start: 4.1 power-off (timeout 00:00:30) [common]
 2229 01:54:23.295745  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-2' '--port=1' '--command=off'
 2230 01:54:23.366651  >> Command sent successfully.

 2231 01:54:23.369134  Returned 0 in 0 seconds
 2232 01:54:23.469545  end: 4.1 power-off (duration 00:00:00) [common]
 2234 01:54:23.469873  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2235 01:54:23.470138  Listened to connection for namespace 'common' for up to 1s
 2237 01:54:23.470511  Listened to connection for namespace 'common' for up to 1s
 2238 01:54:23.470962  Listened to connection for namespace 'common' for up to 1s
 2239 01:54:23.474115  Listened to connection for namespace 'common' for up to 1s
 2240 01:54:23.477479  Listened to connection for namespace 'common' for up to 1s
 2241 01:54:23.480753  Listened to connection for namespace 'common' for up to 1s
 2242 01:54:23.483959  Listened to connection for namespace 'common' for up to 1s
 2243 01:54:23.487094  Listened to connection for namespace 'common' for up to 1s
 2244 01:54:23.490717  Listened to connection for namespace 'common' for up to 1s
 2245 01:54:23.493712  Listened to connection for namespace 'common' for up to 1s
 2246 01:54:23.496869  Listened to connection for namespace 'common' for up to 1s
 2247 01:54:23.500204  Listened to connection for namespace 'common' for up to 1s
 2248 01:54:23.503550  Listened to connection for namespace 'common' for up to 1s
 2249 01:54:23.506696  Listened to connection for namespace 'common' for up to 1s
 2250 01:54:23.510130  Listened to connection for namespace 'common' for up to 1s
 2251 01:54:23.513474  Listened to connection for namespace 'common' for up to 1s
 2252 01:54:23.517167  Listened to connection for namespace 'common' for up to 1s
 2253 01:54:23.519748  Listened to connection for namespace 'common' for up to 1s
 2254 01:54:23.523128  Listened to connection for namespace 'common' for up to 1s
 2255 01:54:23.526606  Listened to connection for namespace 'common' for up to 1s
 2256 01:54:23.529743  Listened to connection for namespace 'common' for up to 1s
 2257 01:54:23.533199  Listened to connection for namespace 'common' for up to 1s
 2258 01:54:23.536590  Listened to connection for namespace 'common' for up to 1s
 2259 01:54:23.539840  Listened to connection for namespace 'common' for up to 1s
 2260 01:54:23.542883  Listened to connection for namespace 'common' for up to 1s
 2261 01:54:23.546264  Listened to connection for namespace 'common' for up to 1s
 2262 01:54:23.549270  Listened to connection for namespace 'common' for up to 1s
 2263 01:54:23.552930  Listened to connection for namespace 'common' for up to 1s
 2264 01:54:23.555948  Listened to connection for namespace 'common' for up to 1s
 2265 01:54:23.559515  Listened to connection for namespace 'common' for up to 1s
 2266 01:54:23.562667  Listened to connection for namespace 'common' for up to 1s
 2267 01:54:23.565695  Listened to connection for namespace 'common' for up to 1s
 2268 01:54:23.568924  Listened to connection for namespace 'common' for up to 1s
 2269 01:54:23.572335  Listened to connection for namespace 'common' for up to 1s
 2270 01:54:23.575438  Listened to connection for namespace 'common' for up to 1s
 2271 01:54:23.578975  Listened to connection for namespace 'common' for up to 1s
 2272 01:54:23.582055  Listened to connection for namespace 'common' for up to 1s
 2273 01:54:23.585654  Listened to connection for namespace 'common' for up to 1s
 2274 01:54:23.589007  Listened to connection for namespace 'common' for up to 1s
 2275 01:54:23.591848  Listened to connection for namespace 'common' for up to 1s
 2276 01:54:23.595744  Listened to connection for namespace 'common' for up to 1s
 2277 01:54:23.598537  Listened to connection for namespace 'common' for up to 1s
 2278 01:54:23.601819  Listened to connection for namespace 'common' for up to 1s
 2279 01:54:23.605453  Listened to connection for namespace 'common' for up to 1s
 2280 01:54:23.608259  Listened to connection for namespace 'common' for up to 1s
 2281 01:54:23.611873  Listened to connection for namespace 'common' for up to 1s
 2282 01:54:23.614781  Listened to connection for namespace 'common' for up to 1s
 2283 01:54:23.618109  Listened to connection for namespace 'common' for up to 1s
 2284 01:54:23.621590  Listened to connection for namespace 'common' for up to 1s
 2285 01:54:23.624954  Listened to connection for namespace 'common' for up to 1s
 2286 01:54:23.628282  Listened to connection for namespace 'common' for up to 1s
 2287 01:54:23.631175  Listened to connection for namespace 'common' for up to 1s
 2288 01:54:23.635182  Listened to connection for namespace 'common' for up to 1s
 2289 01:54:23.637811  Listened to connection for namespace 'common' for up to 1s
 2290 01:54:23.640930  Listened to connection for namespace 'common' for up to 1s
 2291 01:54:23.644689  Listened to connection for namespace 'common' for up to 1s
 2292 01:54:23.647520  Listened to connection for namespace 'common' for up to 1s
 2293 01:54:23.651189  Listened to connection for namespace 'common' for up to 1s
 2294 01:54:23.654506  Listened to connection for namespace 'common' for up to 1s
 2295 01:54:23.657388  Listened to connection for namespace 'common' for up to 1s
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 2540 01:54:24.461652  Listened to connection for namespace 'common' for up to 1s
 2541 01:54:24.465141  Listened to connection for namespace 'common' for up to 1s
 2542 01:54:24.468260  Listened to connection for namespace 'common' for up to 1s
 2543 01:54:24.470397  Finalising connection for namespace 'common'
 2544 01:54:24.470935  Disconnecting from shell: Finalise
 2545 01:54:24.471280  
 2546 01:54:24.572984  end: 4.2 read-feedback (duration 00:00:01) [common]
 2547 01:54:24.573538  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11733040
 2548 01:54:25.195238  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11733040
 2549 01:54:25.195411  JobError: Your job cannot terminate cleanly.