Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 01:48:52.250933 lava-dispatcher, installed at version: 2023.08
2 01:48:52.251172 start: 0 validate
3 01:48:52.251320 Start time: 2023-10-11 01:48:52.251310+00:00 (UTC)
4 01:48:52.251461 Using caching service: 'http://localhost/cache/?uri=%s'
5 01:48:52.251601 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 01:48:52.519937 Using caching service: 'http://localhost/cache/?uri=%s'
7 01:48:52.520139 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.295-cip103-95-ge42cfc8bb88b7%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 01:48:52.773114 Using caching service: 'http://localhost/cache/?uri=%s'
9 01:48:52.773780 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 01:49:08.429644 Using caching service: 'http://localhost/cache/?uri=%s'
11 01:49:08.430390 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.295-cip103-95-ge42cfc8bb88b7%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 01:49:08.693431 validate duration: 16.44
14 01:49:08.694672 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 01:49:08.695178 start: 1.1 download-retry (timeout 00:10:00) [common]
16 01:49:08.695625 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 01:49:08.696314 Not decompressing ramdisk as can be used compressed.
18 01:49:08.696769 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/initrd.cpio.gz
19 01:49:08.697105 saving as /var/lib/lava/dispatcher/tmp/11733056/tftp-deploy-gbr9dmx9/ramdisk/initrd.cpio.gz
20 01:49:08.697445 total size: 5671549 (5 MB)
21 01:49:09.568349 progress 0 % (0 MB)
22 01:49:09.573104 progress 5 % (0 MB)
23 01:49:09.574868 progress 10 % (0 MB)
24 01:49:09.576485 progress 15 % (0 MB)
25 01:49:09.578328 progress 20 % (1 MB)
26 01:49:09.580374 progress 25 % (1 MB)
27 01:49:09.582112 progress 30 % (1 MB)
28 01:49:09.583864 progress 35 % (1 MB)
29 01:49:09.585779 progress 40 % (2 MB)
30 01:49:09.587377 progress 45 % (2 MB)
31 01:49:09.589292 progress 50 % (2 MB)
32 01:49:09.591026 progress 55 % (3 MB)
33 01:49:09.592635 progress 60 % (3 MB)
34 01:49:09.594471 progress 65 % (3 MB)
35 01:49:09.596305 progress 70 % (3 MB)
36 01:49:09.597885 progress 75 % (4 MB)
37 01:49:09.599630 progress 80 % (4 MB)
38 01:49:09.601421 progress 85 % (4 MB)
39 01:49:09.602980 progress 90 % (4 MB)
40 01:49:09.604771 progress 95 % (5 MB)
41 01:49:09.606592 progress 100 % (5 MB)
42 01:49:09.606733 5 MB downloaded in 0.91 s (5.95 MB/s)
43 01:49:09.606922 end: 1.1.1 http-download (duration 00:00:01) [common]
45 01:49:09.607219 end: 1.1 download-retry (duration 00:00:01) [common]
46 01:49:09.607332 start: 1.2 download-retry (timeout 00:09:59) [common]
47 01:49:09.607442 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 01:49:09.607614 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.295-cip103-95-ge42cfc8bb88b7/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 01:49:09.607725 saving as /var/lib/lava/dispatcher/tmp/11733056/tftp-deploy-gbr9dmx9/kernel/bzImage
50 01:49:09.607837 total size: 11473408 (10 MB)
51 01:49:09.607949 No compression specified
52 01:49:09.609833 progress 0 % (0 MB)
53 01:49:09.613240 progress 5 % (0 MB)
54 01:49:09.616820 progress 10 % (1 MB)
55 01:49:09.620281 progress 15 % (1 MB)
56 01:49:09.623715 progress 20 % (2 MB)
57 01:49:09.627030 progress 25 % (2 MB)
58 01:49:09.630523 progress 30 % (3 MB)
59 01:49:09.633859 progress 35 % (3 MB)
60 01:49:09.637357 progress 40 % (4 MB)
61 01:49:09.640735 progress 45 % (4 MB)
62 01:49:09.644403 progress 50 % (5 MB)
63 01:49:09.647731 progress 55 % (6 MB)
64 01:49:09.651288 progress 60 % (6 MB)
65 01:49:09.654596 progress 65 % (7 MB)
66 01:49:09.658100 progress 70 % (7 MB)
67 01:49:09.661386 progress 75 % (8 MB)
68 01:49:09.664809 progress 80 % (8 MB)
69 01:49:09.668106 progress 85 % (9 MB)
70 01:49:09.671592 progress 90 % (9 MB)
71 01:49:09.674850 progress 95 % (10 MB)
72 01:49:09.678464 progress 100 % (10 MB)
73 01:49:09.678623 10 MB downloaded in 0.07 s (154.59 MB/s)
74 01:49:09.678787 end: 1.2.1 http-download (duration 00:00:00) [common]
76 01:49:09.679047 end: 1.2 download-retry (duration 00:00:00) [common]
77 01:49:09.679150 start: 1.3 download-retry (timeout 00:09:59) [common]
78 01:49:09.679249 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 01:49:09.679409 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/full.rootfs.tar.xz
80 01:49:09.679487 saving as /var/lib/lava/dispatcher/tmp/11733056/tftp-deploy-gbr9dmx9/nfsrootfs/full.rootfs.tar
81 01:49:09.679557 total size: 126031368 (120 MB)
82 01:49:09.679628 Using unxz to decompress xz
83 01:49:09.684238 progress 0 % (0 MB)
84 01:49:10.232920 progress 5 % (6 MB)
85 01:49:10.786312 progress 10 % (12 MB)
86 01:49:11.343800 progress 15 % (18 MB)
87 01:49:11.913256 progress 20 % (24 MB)
88 01:49:12.315245 progress 25 % (30 MB)
89 01:49:12.707398 progress 30 % (36 MB)
90 01:49:13.050602 progress 35 % (42 MB)
91 01:49:13.269028 progress 40 % (48 MB)
92 01:49:13.706424 progress 45 % (54 MB)
93 01:49:14.154083 progress 50 % (60 MB)
94 01:49:14.629137 progress 55 % (66 MB)
95 01:49:15.082839 progress 60 % (72 MB)
96 01:49:15.482688 progress 65 % (78 MB)
97 01:49:15.930455 progress 70 % (84 MB)
98 01:49:16.411773 progress 75 % (90 MB)
99 01:49:16.907420 progress 80 % (96 MB)
100 01:49:17.031775 progress 85 % (102 MB)
101 01:49:17.216960 progress 90 % (108 MB)
102 01:49:17.609756 progress 95 % (114 MB)
103 01:49:18.059257 progress 100 % (120 MB)
104 01:49:18.064922 120 MB downloaded in 8.39 s (14.33 MB/s)
105 01:49:18.065312 end: 1.3.1 http-download (duration 00:00:08) [common]
107 01:49:18.065768 end: 1.3 download-retry (duration 00:00:08) [common]
108 01:49:18.065920 start: 1.4 download-retry (timeout 00:09:51) [common]
109 01:49:18.066072 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 01:49:18.066303 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.295-cip103-95-ge42cfc8bb88b7/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 01:49:18.066433 saving as /var/lib/lava/dispatcher/tmp/11733056/tftp-deploy-gbr9dmx9/modules/modules.tar
112 01:49:18.066551 total size: 484192 (0 MB)
113 01:49:18.066668 Using unxz to decompress xz
114 01:49:18.072055 progress 6 % (0 MB)
115 01:49:18.072553 progress 13 % (0 MB)
116 01:49:18.072837 progress 20 % (0 MB)
117 01:49:18.075223 progress 27 % (0 MB)
118 01:49:18.078351 progress 33 % (0 MB)
119 01:49:18.081300 progress 40 % (0 MB)
120 01:49:18.084347 progress 47 % (0 MB)
121 01:49:18.087325 progress 54 % (0 MB)
122 01:49:18.090473 progress 60 % (0 MB)
123 01:49:18.093708 progress 67 % (0 MB)
124 01:49:18.096864 progress 74 % (0 MB)
125 01:49:18.100167 progress 81 % (0 MB)
126 01:49:18.103190 progress 87 % (0 MB)
127 01:49:18.106219 progress 94 % (0 MB)
128 01:49:18.110072 progress 100 % (0 MB)
129 01:49:18.120364 0 MB downloaded in 0.05 s (8.58 MB/s)
130 01:49:18.120695 end: 1.4.1 http-download (duration 00:00:00) [common]
132 01:49:18.120999 end: 1.4 download-retry (duration 00:00:00) [common]
133 01:49:18.121107 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
134 01:49:18.121216 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
135 01:49:21.644288 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11733056/extract-nfsrootfs-gk6ywm2_
136 01:49:21.644490 end: 1.5.1 extract-nfsrootfs (duration 00:00:04) [common]
137 01:49:21.644602 start: 1.5.2 lava-overlay (timeout 00:09:47) [common]
138 01:49:21.644781 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11733056/lava-overlay-3wsqtr51
139 01:49:21.644930 makedir: /var/lib/lava/dispatcher/tmp/11733056/lava-overlay-3wsqtr51/lava-11733056/bin
140 01:49:21.645044 makedir: /var/lib/lava/dispatcher/tmp/11733056/lava-overlay-3wsqtr51/lava-11733056/tests
141 01:49:21.645155 makedir: /var/lib/lava/dispatcher/tmp/11733056/lava-overlay-3wsqtr51/lava-11733056/results
142 01:49:21.645265 Creating /var/lib/lava/dispatcher/tmp/11733056/lava-overlay-3wsqtr51/lava-11733056/bin/lava-add-keys
143 01:49:21.645426 Creating /var/lib/lava/dispatcher/tmp/11733056/lava-overlay-3wsqtr51/lava-11733056/bin/lava-add-sources
144 01:49:21.645573 Creating /var/lib/lava/dispatcher/tmp/11733056/lava-overlay-3wsqtr51/lava-11733056/bin/lava-background-process-start
145 01:49:21.645718 Creating /var/lib/lava/dispatcher/tmp/11733056/lava-overlay-3wsqtr51/lava-11733056/bin/lava-background-process-stop
146 01:49:21.645861 Creating /var/lib/lava/dispatcher/tmp/11733056/lava-overlay-3wsqtr51/lava-11733056/bin/lava-common-functions
147 01:49:21.646002 Creating /var/lib/lava/dispatcher/tmp/11733056/lava-overlay-3wsqtr51/lava-11733056/bin/lava-echo-ipv4
148 01:49:21.646146 Creating /var/lib/lava/dispatcher/tmp/11733056/lava-overlay-3wsqtr51/lava-11733056/bin/lava-install-packages
149 01:49:21.646287 Creating /var/lib/lava/dispatcher/tmp/11733056/lava-overlay-3wsqtr51/lava-11733056/bin/lava-installed-packages
150 01:49:21.646427 Creating /var/lib/lava/dispatcher/tmp/11733056/lava-overlay-3wsqtr51/lava-11733056/bin/lava-os-build
151 01:49:21.646568 Creating /var/lib/lava/dispatcher/tmp/11733056/lava-overlay-3wsqtr51/lava-11733056/bin/lava-probe-channel
152 01:49:21.646709 Creating /var/lib/lava/dispatcher/tmp/11733056/lava-overlay-3wsqtr51/lava-11733056/bin/lava-probe-ip
153 01:49:21.646851 Creating /var/lib/lava/dispatcher/tmp/11733056/lava-overlay-3wsqtr51/lava-11733056/bin/lava-target-ip
154 01:49:21.646991 Creating /var/lib/lava/dispatcher/tmp/11733056/lava-overlay-3wsqtr51/lava-11733056/bin/lava-target-mac
155 01:49:21.647130 Creating /var/lib/lava/dispatcher/tmp/11733056/lava-overlay-3wsqtr51/lava-11733056/bin/lava-target-storage
156 01:49:21.647271 Creating /var/lib/lava/dispatcher/tmp/11733056/lava-overlay-3wsqtr51/lava-11733056/bin/lava-test-case
157 01:49:21.647417 Creating /var/lib/lava/dispatcher/tmp/11733056/lava-overlay-3wsqtr51/lava-11733056/bin/lava-test-event
158 01:49:21.647562 Creating /var/lib/lava/dispatcher/tmp/11733056/lava-overlay-3wsqtr51/lava-11733056/bin/lava-test-feedback
159 01:49:21.647702 Creating /var/lib/lava/dispatcher/tmp/11733056/lava-overlay-3wsqtr51/lava-11733056/bin/lava-test-raise
160 01:49:21.647843 Creating /var/lib/lava/dispatcher/tmp/11733056/lava-overlay-3wsqtr51/lava-11733056/bin/lava-test-reference
161 01:49:21.647984 Creating /var/lib/lava/dispatcher/tmp/11733056/lava-overlay-3wsqtr51/lava-11733056/bin/lava-test-runner
162 01:49:21.648134 Creating /var/lib/lava/dispatcher/tmp/11733056/lava-overlay-3wsqtr51/lava-11733056/bin/lava-test-set
163 01:49:21.648275 Creating /var/lib/lava/dispatcher/tmp/11733056/lava-overlay-3wsqtr51/lava-11733056/bin/lava-test-shell
164 01:49:21.648419 Updating /var/lib/lava/dispatcher/tmp/11733056/lava-overlay-3wsqtr51/lava-11733056/bin/lava-install-packages (oe)
165 01:49:21.648590 Updating /var/lib/lava/dispatcher/tmp/11733056/lava-overlay-3wsqtr51/lava-11733056/bin/lava-installed-packages (oe)
166 01:49:21.648731 Creating /var/lib/lava/dispatcher/tmp/11733056/lava-overlay-3wsqtr51/lava-11733056/environment
167 01:49:21.648839 LAVA metadata
168 01:49:21.648917 - LAVA_JOB_ID=11733056
169 01:49:21.648988 - LAVA_DISPATCHER_IP=192.168.201.1
170 01:49:21.649102 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:47) [common]
171 01:49:21.649177 skipped lava-vland-overlay
172 01:49:21.649260 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 01:49:21.649347 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:47) [common]
174 01:49:21.649415 skipped lava-multinode-overlay
175 01:49:21.649505 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 01:49:21.649593 start: 1.5.2.3 test-definition (timeout 00:09:47) [common]
177 01:49:21.649675 Loading test definitions
178 01:49:21.649773 start: 1.5.2.3.1 git-repo-action (timeout 00:09:47) [common]
179 01:49:21.649853 Using /lava-11733056 at stage 0
180 01:49:21.649959 Fetching tests from https://github.com/kernelci/test-definitions
181 01:49:21.650045 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/11733056/lava-overlay-3wsqtr51/lava-11733056/0/tests/0_ltp-timers'
182 01:49:25.939553 Running '/usr/bin/git checkout kernelci.org
183 01:49:26.105593 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/11733056/lava-overlay-3wsqtr51/lava-11733056/0/tests/0_ltp-timers/automated/linux/ltp-open-posix/ltp-open-posix.yaml
184 01:49:26.106591 uuid=11733056_1.5.2.3.1 testdef=None
185 01:49:26.106784 end: 1.5.2.3.1 git-repo-action (duration 00:00:04) [common]
187 01:49:26.107070 start: 1.5.2.3.2 test-overlay (timeout 00:09:43) [common]
188 01:49:26.107839 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
190 01:49:26.108117 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:43) [common]
191 01:49:26.109130 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
193 01:49:26.109396 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:43) [common]
194 01:49:26.110377 runner path: /var/lib/lava/dispatcher/tmp/11733056/lava-overlay-3wsqtr51/lava-11733056/0/tests/0_ltp-timers test_uuid 11733056_1.5.2.3.1
195 01:49:26.110514 GRP_TEST='TMR'
196 01:49:26.110622 SKIPFILE='skipfile-lkft.yaml'
197 01:49:26.110722 SKIP_INSTALL='true'
198 01:49:26.110820 TST_CMDFILES=''
199 01:49:26.111026 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
201 01:49:26.111411 Creating lava-test-runner.conf files
202 01:49:26.111516 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11733056/lava-overlay-3wsqtr51/lava-11733056/0 for stage 0
203 01:49:26.111653 - 0_ltp-timers
204 01:49:26.111812 end: 1.5.2.3 test-definition (duration 00:00:04) [common]
205 01:49:26.111947 start: 1.5.2.4 compress-overlay (timeout 00:09:43) [common]
206 01:49:34.551327 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
207 01:49:34.551487 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:34) [common]
208 01:49:34.551595 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 01:49:34.551716 end: 1.5.2 lava-overlay (duration 00:00:13) [common]
210 01:49:34.551827 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
211 01:49:34.713133 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 01:49:34.713574 start: 1.5.4 extract-modules (timeout 00:09:34) [common]
213 01:49:34.713708 extracting modules file /var/lib/lava/dispatcher/tmp/11733056/tftp-deploy-gbr9dmx9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11733056/extract-nfsrootfs-gk6ywm2_
214 01:49:34.738334 extracting modules file /var/lib/lava/dispatcher/tmp/11733056/tftp-deploy-gbr9dmx9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11733056/extract-overlay-ramdisk-_i7wo273/ramdisk
215 01:49:34.763222 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 01:49:34.763404 start: 1.5.5 apply-overlay-tftp (timeout 00:09:34) [common]
217 01:49:34.763546 [common] Applying overlay to NFS
218 01:49:34.763666 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11733056/compress-overlay-e3z1sn06/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11733056/extract-nfsrootfs-gk6ywm2_
219 01:49:35.827934 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
220 01:49:35.828116 start: 1.5.6 configure-preseed-file (timeout 00:09:33) [common]
221 01:49:35.828218 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 01:49:35.828320 start: 1.5.7 compress-ramdisk (timeout 00:09:33) [common]
223 01:49:35.828414 Building ramdisk /var/lib/lava/dispatcher/tmp/11733056/extract-overlay-ramdisk-_i7wo273/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11733056/extract-overlay-ramdisk-_i7wo273/ramdisk
224 01:49:35.922896 >> 31372 blocks
225 01:49:36.617502 rename /var/lib/lava/dispatcher/tmp/11733056/extract-overlay-ramdisk-_i7wo273/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11733056/tftp-deploy-gbr9dmx9/ramdisk/ramdisk.cpio.gz
226 01:49:36.618102 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 01:49:36.618291 start: 1.5.8 prepare-kernel (timeout 00:09:32) [common]
228 01:49:36.618449 start: 1.5.8.1 prepare-fit (timeout 00:09:32) [common]
229 01:49:36.618594 No mkimage arch provided, not using FIT.
230 01:49:36.618737 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 01:49:36.618871 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 01:49:36.619036 end: 1.5 prepare-tftp-overlay (duration 00:00:18) [common]
233 01:49:36.619178 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:32) [common]
234 01:49:36.619308 No LXC device requested
235 01:49:36.619437 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 01:49:36.619581 start: 1.7 deploy-device-env (timeout 00:09:32) [common]
237 01:49:36.619718 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 01:49:36.619845 Checking files for TFTP limit of 4294967296 bytes.
239 01:49:36.620469 end: 1 tftp-deploy (duration 00:00:28) [common]
240 01:49:36.620629 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 01:49:36.620774 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 01:49:36.620967 substitutions:
243 01:49:36.621083 - {DTB}: None
244 01:49:36.621183 - {INITRD}: 11733056/tftp-deploy-gbr9dmx9/ramdisk/ramdisk.cpio.gz
245 01:49:36.621282 - {KERNEL}: 11733056/tftp-deploy-gbr9dmx9/kernel/bzImage
246 01:49:36.621382 - {LAVA_MAC}: None
247 01:49:36.621482 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11733056/extract-nfsrootfs-gk6ywm2_
248 01:49:36.621582 - {NFS_SERVER_IP}: 192.168.201.1
249 01:49:36.621681 - {PRESEED_CONFIG}: None
250 01:49:36.621780 - {PRESEED_LOCAL}: None
251 01:49:36.621879 - {RAMDISK}: 11733056/tftp-deploy-gbr9dmx9/ramdisk/ramdisk.cpio.gz
252 01:49:36.621977 - {ROOT_PART}: None
253 01:49:36.622074 - {ROOT}: None
254 01:49:36.622170 - {SERVER_IP}: 192.168.201.1
255 01:49:36.622275 - {TEE}: None
256 01:49:36.622373 Parsed boot commands:
257 01:49:36.622477 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 01:49:36.622740 Parsed boot commands: tftpboot 192.168.201.1 11733056/tftp-deploy-gbr9dmx9/kernel/bzImage 11733056/tftp-deploy-gbr9dmx9/kernel/cmdline 11733056/tftp-deploy-gbr9dmx9/ramdisk/ramdisk.cpio.gz
259 01:49:36.622887 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 01:49:36.623030 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 01:49:36.623180 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 01:49:36.623324 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 01:49:36.623445 Not connected, no need to disconnect.
264 01:49:36.623571 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 01:49:36.623712 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 01:49:36.623830 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-4'
267 01:49:36.629055 Setting prompt string to ['lava-test: # ']
268 01:49:36.629572 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 01:49:36.629739 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 01:49:36.629891 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 01:49:36.630034 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 01:49:36.630349 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
273 01:49:41.762479 >> Command sent successfully.
274 01:49:41.765317 Returned 0 in 5 seconds
275 01:49:41.865731 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 01:49:41.866091 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 01:49:41.866205 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 01:49:41.866303 Setting prompt string to 'Starting depthcharge on Helios...'
280 01:49:41.866382 Changing prompt to 'Starting depthcharge on Helios...'
281 01:49:41.866481 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
282 01:49:41.866770 [Enter `^Ec?' for help]
283 01:49:42.488144
284 01:49:42.488309
285 01:49:42.498031 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
286 01:49:42.501895 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
287 01:49:42.508102 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
288 01:49:42.511772 CPU: AES supported, TXT NOT supported, VT supported
289 01:49:42.518540 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
290 01:49:42.521707 PCH: device id 0284 (rev 00) is Cometlake-U Premium
291 01:49:42.528167 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
292 01:49:42.531673 VBOOT: Loading verstage.
293 01:49:42.535026 FMAP: Found "FLASH" version 1.1 at 0xc04000.
294 01:49:42.541652 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
295 01:49:42.544822 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
296 01:49:42.548144 CBFS @ c08000 size 3f8000
297 01:49:42.555111 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
298 01:49:42.558437 CBFS: Locating 'fallback/verstage'
299 01:49:42.561675 CBFS: Found @ offset 10fb80 size 1072c
300 01:49:42.564868
301 01:49:42.564961
302 01:49:42.574999 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
303 01:49:42.589098 Probing TPM: . done!
304 01:49:42.592908 TPM ready after 0 ms
305 01:49:42.596290 Connected to device vid:did:rid of 1ae0:0028:00
306 01:49:42.606256 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
307 01:49:42.609494 Initialized TPM device CR50 revision 0
308 01:49:42.654470 tlcl_send_startup: Startup return code is 0
309 01:49:42.654636 TPM: setup succeeded
310 01:49:42.667064 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
311 01:49:42.670814 Chrome EC: UHEPI supported
312 01:49:42.673878 Phase 1
313 01:49:42.677429 FMAP: area GBB found @ c05000 (12288 bytes)
314 01:49:42.684254 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
315 01:49:42.684349 Phase 2
316 01:49:42.687274 Phase 3
317 01:49:42.690655 FMAP: area GBB found @ c05000 (12288 bytes)
318 01:49:42.697689 VB2:vb2_report_dev_firmware() This is developer signed firmware
319 01:49:42.704121 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
320 01:49:42.707238 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
321 01:49:42.714116 VB2:vb2_verify_keyblock() Checking keyblock signature...
322 01:49:42.729455 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
323 01:49:42.732728 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
324 01:49:42.739235 VB2:vb2_verify_fw_preamble() Verifying preamble.
325 01:49:42.743465 Phase 4
326 01:49:42.747021 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
327 01:49:42.753639 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
328 01:49:42.933114 VB2:vb2_rsa_verify_digest() Digest check failed!
329 01:49:42.939532 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
330 01:49:42.939638 Saving nvdata
331 01:49:42.943192 Reboot requested (10020007)
332 01:49:42.946405 board_reset() called!
333 01:49:42.946500 full_reset() called!
334 01:49:47.455154
335 01:49:47.455300
336 01:49:47.465382 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
337 01:49:47.468413 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
338 01:49:47.475335 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
339 01:49:47.478430 CPU: AES supported, TXT NOT supported, VT supported
340 01:49:47.485321 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
341 01:49:47.488207 PCH: device id 0284 (rev 00) is Cometlake-U Premium
342 01:49:47.494798 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
343 01:49:47.498555 VBOOT: Loading verstage.
344 01:49:47.501725 FMAP: Found "FLASH" version 1.1 at 0xc04000.
345 01:49:47.507891 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
346 01:49:47.511731 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
347 01:49:47.515290 CBFS @ c08000 size 3f8000
348 01:49:47.521883 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
349 01:49:47.525152 CBFS: Locating 'fallback/verstage'
350 01:49:47.528367 CBFS: Found @ offset 10fb80 size 1072c
351 01:49:47.531937
352 01:49:47.532039
353 01:49:47.541801 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
354 01:49:47.555919 Probing TPM: . done!
355 01:49:47.559988 TPM ready after 0 ms
356 01:49:47.563028 Connected to device vid:did:rid of 1ae0:0028:00
357 01:49:47.573075 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
358 01:49:47.578502 Initialized TPM device CR50 revision 0
359 01:49:47.621311 tlcl_send_startup: Startup return code is 0
360 01:49:47.621423 TPM: setup succeeded
361 01:49:47.633782 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
362 01:49:47.637490 Chrome EC: UHEPI supported
363 01:49:47.640773 Phase 1
364 01:49:47.644051 FMAP: area GBB found @ c05000 (12288 bytes)
365 01:49:47.650967 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
366 01:49:47.657657 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
367 01:49:47.661060 Recovery requested (1009000e)
368 01:49:47.666598 Saving nvdata
369 01:49:47.673167 tlcl_extend: response is 0
370 01:49:47.681580 tlcl_extend: response is 0
371 01:49:47.688807 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
372 01:49:47.691961 CBFS @ c08000 size 3f8000
373 01:49:47.698664 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
374 01:49:47.701967 CBFS: Locating 'fallback/romstage'
375 01:49:47.705419 CBFS: Found @ offset 80 size 145fc
376 01:49:47.708550 Accumulated console time in verstage 98 ms
377 01:49:47.708720
378 01:49:47.708852
379 01:49:47.721995 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
380 01:49:47.728611 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
381 01:49:47.731879 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
382 01:49:47.735671 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
383 01:49:47.742321 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
384 01:49:47.745596 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
385 01:49:47.748822 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
386 01:49:47.752055 TCO_STS: 0000 0000
387 01:49:47.755761 GEN_PMCON: e0015238 00000200
388 01:49:47.758961 GBLRST_CAUSE: 00000000 00000000
389 01:49:47.759390 prev_sleep_state 5
390 01:49:47.762268 Boot Count incremented to 63942
391 01:49:47.768965 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
392 01:49:47.772115 CBFS @ c08000 size 3f8000
393 01:49:47.778457 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
394 01:49:47.778891 CBFS: Locating 'fspm.bin'
395 01:49:47.782173 CBFS: Found @ offset 5ffc0 size 71000
396 01:49:47.786322 Chrome EC: UHEPI supported
397 01:49:47.793939 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
398 01:49:47.799297 Probing TPM: done!
399 01:49:47.805817 Connected to device vid:did:rid of 1ae0:0028:00
400 01:49:47.815664 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
401 01:49:47.821459 Initialized TPM device CR50 revision 0
402 01:49:47.830493 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
403 01:49:47.837095 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
404 01:49:47.840244 MRC cache found, size 1948
405 01:49:47.843512 bootmode is set to: 2
406 01:49:47.846765 PRMRR disabled by config.
407 01:49:47.847194 SPD INDEX = 1
408 01:49:47.853699 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
409 01:49:47.856894 CBFS @ c08000 size 3f8000
410 01:49:47.863342 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
411 01:49:47.863775 CBFS: Locating 'spd.bin'
412 01:49:47.866842 CBFS: Found @ offset 5fb80 size 400
413 01:49:47.870640 SPD: module type is LPDDR3
414 01:49:47.873967 SPD: module part is
415 01:49:47.880488 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
416 01:49:47.883494 SPD: device width 4 bits, bus width 8 bits
417 01:49:47.886923 SPD: module size is 4096 MB (per channel)
418 01:49:47.890155 memory slot: 0 configuration done.
419 01:49:47.893740 memory slot: 2 configuration done.
420 01:49:47.945271 CBMEM:
421 01:49:47.948620 IMD: root @ 99fff000 254 entries.
422 01:49:47.951652 IMD: root @ 99ffec00 62 entries.
423 01:49:47.955500 External stage cache:
424 01:49:47.958719 IMD: root @ 9abff000 254 entries.
425 01:49:47.962125 IMD: root @ 9abfec00 62 entries.
426 01:49:47.965175 Chrome EC: clear events_b mask to 0x0000000020004000
427 01:49:47.981344 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
428 01:49:47.994443 tlcl_write: response is 0
429 01:49:48.003528 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
430 01:49:48.010036 MRC: TPM MRC hash updated successfully.
431 01:49:48.010466 2 DIMMs found
432 01:49:48.013105 SMM Memory Map
433 01:49:48.016505 SMRAM : 0x9a000000 0x1000000
434 01:49:48.020119 Subregion 0: 0x9a000000 0xa00000
435 01:49:48.023381 Subregion 1: 0x9aa00000 0x200000
436 01:49:48.026699 Subregion 2: 0x9ac00000 0x400000
437 01:49:48.029978 top_of_ram = 0x9a000000
438 01:49:48.033311 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
439 01:49:48.040043 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
440 01:49:48.043456 MTRR Range: Start=ff000000 End=0 (Size 1000000)
441 01:49:48.050353 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 01:49:48.053461 CBFS @ c08000 size 3f8000
443 01:49:48.056685 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 01:49:48.059896 CBFS: Locating 'fallback/postcar'
445 01:49:48.063233 CBFS: Found @ offset 107000 size 4b44
446 01:49:48.069678 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
447 01:49:48.081813 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
448 01:49:48.085656 Processing 180 relocs. Offset value of 0x97c0c000
449 01:49:48.093722 Accumulated console time in romstage 286 ms
450 01:49:48.094385
451 01:49:48.094918
452 01:49:48.103824 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
453 01:49:48.110389 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
454 01:49:48.113724 CBFS @ c08000 size 3f8000
455 01:49:48.117035 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
456 01:49:48.123461 CBFS: Locating 'fallback/ramstage'
457 01:49:48.126966 CBFS: Found @ offset 43380 size 1b9e8
458 01:49:48.133318 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
459 01:49:48.165634 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
460 01:49:48.168898 Processing 3976 relocs. Offset value of 0x98db0000
461 01:49:48.175350 Accumulated console time in postcar 52 ms
462 01:49:48.175585
463 01:49:48.175770
464 01:49:48.184891 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
465 01:49:48.191402 FMAP: area RO_VPD found @ c00000 (16384 bytes)
466 01:49:48.195174 WARNING: RO_VPD is uninitialized or empty.
467 01:49:48.198563 FMAP: area RW_VPD found @ af8000 (8192 bytes)
468 01:49:48.205188 FMAP: area RW_VPD found @ af8000 (8192 bytes)
469 01:49:48.205330 Normal boot.
470 01:49:48.211844 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
471 01:49:48.215340 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
472 01:49:48.218548 CBFS @ c08000 size 3f8000
473 01:49:48.224865 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
474 01:49:48.228186 CBFS: Locating 'cpu_microcode_blob.bin'
475 01:49:48.231889 CBFS: Found @ offset 14700 size 2ec00
476 01:49:48.235184 microcode: sig=0x806ec pf=0x4 revision=0xc9
477 01:49:48.238351 Skip microcode update
478 01:49:48.241616 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
479 01:49:48.244958 CBFS @ c08000 size 3f8000
480 01:49:48.251576 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
481 01:49:48.254645 CBFS: Locating 'fsps.bin'
482 01:49:48.258276 CBFS: Found @ offset d1fc0 size 35000
483 01:49:48.283509 Detected 4 core, 8 thread CPU.
484 01:49:48.286751 Setting up SMI for CPU
485 01:49:48.289814 IED base = 0x9ac00000
486 01:49:48.289909 IED size = 0x00400000
487 01:49:48.293017 Will perform SMM setup.
488 01:49:48.299667 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
489 01:49:48.306448 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
490 01:49:48.309730 Processing 16 relocs. Offset value of 0x00030000
491 01:49:48.313690 Attempting to start 7 APs
492 01:49:48.316861 Waiting for 10ms after sending INIT.
493 01:49:48.333174 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
494 01:49:48.333271 done.
495 01:49:48.336413 AP: slot 1 apic_id 3.
496 01:49:48.339628 AP: slot 2 apic_id 2.
497 01:49:48.339718 AP: slot 7 apic_id 5.
498 01:49:48.342930 AP: slot 6 apic_id 4.
499 01:49:48.345959 AP: slot 5 apic_id 7.
500 01:49:48.346077 AP: slot 4 apic_id 6.
501 01:49:48.353030 Waiting for 2nd SIPI to complete...done.
502 01:49:48.359607 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
503 01:49:48.363315 Processing 13 relocs. Offset value of 0x00038000
504 01:49:48.369785 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
505 01:49:48.372861 Installing SMM handler to 0x9a000000
506 01:49:48.383381 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
507 01:49:48.386496 Processing 658 relocs. Offset value of 0x9a010000
508 01:49:48.396465 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
509 01:49:48.399850 Processing 13 relocs. Offset value of 0x9a008000
510 01:49:48.406377 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
511 01:49:48.412994 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
512 01:49:48.416341 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
513 01:49:48.423319 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
514 01:49:48.429828 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
515 01:49:48.433088 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
516 01:49:48.439567 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
517 01:49:48.446126 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
518 01:49:48.449851 Clearing SMI status registers
519 01:49:48.453351 SMI_STS: PM1
520 01:49:48.453471 PM1_STS: PWRBTN
521 01:49:48.456622 TCO_STS: SECOND_TO
522 01:49:48.456751 New SMBASE 0x9a000000
523 01:49:48.459895 In relocation handler: CPU 0
524 01:49:48.466425 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
525 01:49:48.469878 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 01:49:48.473086 Relocation complete.
527 01:49:48.473204 New SMBASE 0x99fff400
528 01:49:48.476247 In relocation handler: CPU 3
529 01:49:48.482763 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
530 01:49:48.486169 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 01:49:48.489344 Relocation complete.
532 01:49:48.489439 New SMBASE 0x99ffe800
533 01:49:48.492786 In relocation handler: CPU 6
534 01:49:48.496030 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
535 01:49:48.502994 Writing SMRR. base = 0x9a000006, mask=0xff000800
536 01:49:48.506324 Relocation complete.
537 01:49:48.506423 New SMBASE 0x99fffc00
538 01:49:48.509655 In relocation handler: CPU 1
539 01:49:48.513022 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
540 01:49:48.519305 Writing SMRR. base = 0x9a000006, mask=0xff000800
541 01:49:48.519401 Relocation complete.
542 01:49:48.522557 New SMBASE 0x99fff800
543 01:49:48.526317 In relocation handler: CPU 2
544 01:49:48.529540 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
545 01:49:48.536144 Writing SMRR. base = 0x9a000006, mask=0xff000800
546 01:49:48.536248 Relocation complete.
547 01:49:48.539279 New SMBASE 0x99ffec00
548 01:49:48.543006 In relocation handler: CPU 5
549 01:49:48.546282 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
550 01:49:48.552854 Writing SMRR. base = 0x9a000006, mask=0xff000800
551 01:49:48.552948 Relocation complete.
552 01:49:48.556366 New SMBASE 0x99fff000
553 01:49:48.559693 In relocation handler: CPU 4
554 01:49:48.563042 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
555 01:49:48.569477 Writing SMRR. base = 0x9a000006, mask=0xff000800
556 01:49:48.569569 Relocation complete.
557 01:49:48.572896 New SMBASE 0x99ffe400
558 01:49:48.576183 In relocation handler: CPU 7
559 01:49:48.579555 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
560 01:49:48.582797 Writing SMRR. base = 0x9a000006, mask=0xff000800
561 01:49:48.585944 Relocation complete.
562 01:49:48.589094 Initializing CPU #0
563 01:49:48.592659 CPU: vendor Intel device 806ec
564 01:49:48.595727 CPU: family 06, model 8e, stepping 0c
565 01:49:48.599601 Clearing out pending MCEs
566 01:49:48.599722 Setting up local APIC...
567 01:49:48.602876 apic_id: 0x00 done.
568 01:49:48.605996 Turbo is available but hidden
569 01:49:48.609321 Turbo is available and visible
570 01:49:48.612630 VMX status: enabled
571 01:49:48.615827 IA32_FEATURE_CONTROL status: locked
572 01:49:48.615948 Skip microcode update
573 01:49:48.619713 CPU #0 initialized
574 01:49:48.622581 Initializing CPU #3
575 01:49:48.622699 Initializing CPU #7
576 01:49:48.626031 Initializing CPU #2
577 01:49:48.626158 Initializing CPU #1
578 01:49:48.629564 CPU: vendor Intel device 806ec
579 01:49:48.632790 CPU: family 06, model 8e, stepping 0c
580 01:49:48.635931 CPU: vendor Intel device 806ec
581 01:49:48.642639 CPU: family 06, model 8e, stepping 0c
582 01:49:48.642763 Clearing out pending MCEs
583 01:49:48.646347 Clearing out pending MCEs
584 01:49:48.649662 Setting up local APIC...
585 01:49:48.649758 Initializing CPU #4
586 01:49:48.653019 Initializing CPU #5
587 01:49:48.656313 CPU: vendor Intel device 806ec
588 01:49:48.659131 CPU: family 06, model 8e, stepping 0c
589 01:49:48.663028 CPU: vendor Intel device 806ec
590 01:49:48.665716 CPU: family 06, model 8e, stepping 0c
591 01:49:48.669753 Clearing out pending MCEs
592 01:49:48.672521 apic_id: 0x02 done.
593 01:49:48.672652 Setting up local APIC...
594 01:49:48.675746 CPU: vendor Intel device 806ec
595 01:49:48.682334 CPU: family 06, model 8e, stepping 0c
596 01:49:48.682461 VMX status: enabled
597 01:49:48.685721 apic_id: 0x03 done.
598 01:49:48.688720 IA32_FEATURE_CONTROL status: locked
599 01:49:48.691994 VMX status: enabled
600 01:49:48.692129 Skip microcode update
601 01:49:48.695888 IA32_FEATURE_CONTROL status: locked
602 01:49:48.698642 CPU #2 initialized
603 01:49:48.702075 Skip microcode update
604 01:49:48.702202 Setting up local APIC...
605 01:49:48.705356 Clearing out pending MCEs
606 01:49:48.708916 CPU: vendor Intel device 806ec
607 01:49:48.712323 CPU: family 06, model 8e, stepping 0c
608 01:49:48.715701 Setting up local APIC...
609 01:49:48.718822 CPU #1 initialized
610 01:49:48.718949 Clearing out pending MCEs
611 01:49:48.722211 Initializing CPU #6
612 01:49:48.725665 Setting up local APIC...
613 01:49:48.725785 apic_id: 0x06 done.
614 01:49:48.728923 Clearing out pending MCEs
615 01:49:48.732259 apic_id: 0x01 done.
616 01:49:48.735458 CPU: vendor Intel device 806ec
617 01:49:48.738687 CPU: family 06, model 8e, stepping 0c
618 01:49:48.741837 apic_id: 0x05 done.
619 01:49:48.741964 Clearing out pending MCEs
620 01:49:48.745117 VMX status: enabled
621 01:49:48.748526 VMX status: enabled
622 01:49:48.751650 IA32_FEATURE_CONTROL status: locked
623 01:49:48.751745 Setting up local APIC...
624 01:49:48.758260 IA32_FEATURE_CONTROL status: locked
625 01:49:48.758359 Setting up local APIC...
626 01:49:48.762213 Skip microcode update
627 01:49:48.765540 VMX status: enabled
628 01:49:48.765671 apic_id: 0x07 done.
629 01:49:48.768409 IA32_FEATURE_CONTROL status: locked
630 01:49:48.772070 VMX status: enabled
631 01:49:48.775563 Skip microcode update
632 01:49:48.778359 IA32_FEATURE_CONTROL status: locked
633 01:49:48.778455 CPU #4 initialized
634 01:49:48.781654 Skip microcode update
635 01:49:48.785029 apic_id: 0x04 done.
636 01:49:48.785158 Skip microcode update
637 01:49:48.788767 VMX status: enabled
638 01:49:48.788894 CPU #7 initialized
639 01:49:48.795361 IA32_FEATURE_CONTROL status: locked
640 01:49:48.795491 CPU #3 initialized
641 01:49:48.798627 CPU #5 initialized
642 01:49:48.798740 Skip microcode update
643 01:49:48.801630 CPU #6 initialized
644 01:49:48.805570 bsp_do_flight_plan done after 452 msecs.
645 01:49:48.808734 CPU: frequency set to 4200 MHz
646 01:49:48.811742 Enabling SMIs.
647 01:49:48.811864 Locking SMM.
648 01:49:48.826936 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
649 01:49:48.830279 CBFS @ c08000 size 3f8000
650 01:49:48.837072 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
651 01:49:48.837168 CBFS: Locating 'vbt.bin'
652 01:49:48.840313 CBFS: Found @ offset 5f5c0 size 499
653 01:49:48.847143 Found a VBT of 4608 bytes after decompression
654 01:49:49.030565 Display FSP Version Info HOB
655 01:49:49.033974 Reference Code - CPU = 9.0.1e.30
656 01:49:49.037340 uCode Version = 0.0.0.ca
657 01:49:49.040682 TXT ACM version = ff.ff.ff.ffff
658 01:49:49.043687 Display FSP Version Info HOB
659 01:49:49.047422 Reference Code - ME = 9.0.1e.30
660 01:49:49.050758 MEBx version = 0.0.0.0
661 01:49:49.054024 ME Firmware Version = Consumer SKU
662 01:49:49.056957 Display FSP Version Info HOB
663 01:49:49.060209 Reference Code - CML PCH = 9.0.1e.30
664 01:49:49.063652 PCH-CRID Status = Disabled
665 01:49:49.066888 PCH-CRID Original Value = ff.ff.ff.ffff
666 01:49:49.070169 PCH-CRID New Value = ff.ff.ff.ffff
667 01:49:49.073636 OPROM - RST - RAID = ff.ff.ff.ffff
668 01:49:49.077396 ChipsetInit Base Version = ff.ff.ff.ffff
669 01:49:49.080573 ChipsetInit Oem Version = ff.ff.ff.ffff
670 01:49:49.083775 Display FSP Version Info HOB
671 01:49:49.090204 Reference Code - SA - System Agent = 9.0.1e.30
672 01:49:49.093561 Reference Code - MRC = 0.7.1.6c
673 01:49:49.093651 SA - PCIe Version = 9.0.1e.30
674 01:49:49.096864 SA-CRID Status = Disabled
675 01:49:49.100138 SA-CRID Original Value = 0.0.0.c
676 01:49:49.103415 SA-CRID New Value = 0.0.0.c
677 01:49:49.106776 OPROM - VBIOS = ff.ff.ff.ffff
678 01:49:49.110051 RTC Init
679 01:49:49.113359 Set power on after power failure.
680 01:49:49.113448 Disabling Deep S3
681 01:49:49.116881 Disabling Deep S3
682 01:49:49.116968 Disabling Deep S4
683 01:49:49.120327 Disabling Deep S4
684 01:49:49.120413 Disabling Deep S5
685 01:49:49.123570 Disabling Deep S5
686 01:49:49.130375 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 194 exit 1
687 01:49:49.130466 Enumerating buses...
688 01:49:49.136933 Show all devs... Before device enumeration.
689 01:49:49.137023 Root Device: enabled 1
690 01:49:49.140108 CPU_CLUSTER: 0: enabled 1
691 01:49:49.143392 DOMAIN: 0000: enabled 1
692 01:49:49.146708 APIC: 00: enabled 1
693 01:49:49.146794 PCI: 00:00.0: enabled 1
694 01:49:49.150003 PCI: 00:02.0: enabled 1
695 01:49:49.153375 PCI: 00:04.0: enabled 0
696 01:49:49.153493 PCI: 00:05.0: enabled 0
697 01:49:49.156766 PCI: 00:12.0: enabled 1
698 01:49:49.160290 PCI: 00:12.5: enabled 0
699 01:49:49.163610 PCI: 00:12.6: enabled 0
700 01:49:49.163713 PCI: 00:14.0: enabled 1
701 01:49:49.166848 PCI: 00:14.1: enabled 0
702 01:49:49.169954 PCI: 00:14.3: enabled 1
703 01:49:49.173620 PCI: 00:14.5: enabled 0
704 01:49:49.173714 PCI: 00:15.0: enabled 1
705 01:49:49.176714 PCI: 00:15.1: enabled 1
706 01:49:49.180097 PCI: 00:15.2: enabled 0
707 01:49:49.180192 PCI: 00:15.3: enabled 0
708 01:49:49.183387 PCI: 00:16.0: enabled 1
709 01:49:49.186796 PCI: 00:16.1: enabled 0
710 01:49:49.190000 PCI: 00:16.2: enabled 0
711 01:49:49.190119 PCI: 00:16.3: enabled 0
712 01:49:49.193314 PCI: 00:16.4: enabled 0
713 01:49:49.196958 PCI: 00:16.5: enabled 0
714 01:49:49.200298 PCI: 00:17.0: enabled 1
715 01:49:49.200386 PCI: 00:19.0: enabled 1
716 01:49:49.203532 PCI: 00:19.1: enabled 0
717 01:49:49.206735 PCI: 00:19.2: enabled 0
718 01:49:49.209838 PCI: 00:1a.0: enabled 0
719 01:49:49.209928 PCI: 00:1c.0: enabled 0
720 01:49:49.213625 PCI: 00:1c.1: enabled 0
721 01:49:49.217022 PCI: 00:1c.2: enabled 0
722 01:49:49.217110 PCI: 00:1c.3: enabled 0
723 01:49:49.220240 PCI: 00:1c.4: enabled 0
724 01:49:49.223457 PCI: 00:1c.5: enabled 0
725 01:49:49.226859 PCI: 00:1c.6: enabled 0
726 01:49:49.226983 PCI: 00:1c.7: enabled 0
727 01:49:49.230175 PCI: 00:1d.0: enabled 1
728 01:49:49.233607 PCI: 00:1d.1: enabled 0
729 01:49:49.236997 PCI: 00:1d.2: enabled 0
730 01:49:49.237081 PCI: 00:1d.3: enabled 0
731 01:49:49.240242 PCI: 00:1d.4: enabled 0
732 01:49:49.243612 PCI: 00:1d.5: enabled 1
733 01:49:49.243730 PCI: 00:1e.0: enabled 1
734 01:49:49.246798 PCI: 00:1e.1: enabled 0
735 01:49:49.249967 PCI: 00:1e.2: enabled 1
736 01:49:49.253274 PCI: 00:1e.3: enabled 1
737 01:49:49.253389 PCI: 00:1f.0: enabled 1
738 01:49:49.256631 PCI: 00:1f.1: enabled 1
739 01:49:49.259982 PCI: 00:1f.2: enabled 1
740 01:49:49.263184 PCI: 00:1f.3: enabled 1
741 01:49:49.263299 PCI: 00:1f.4: enabled 1
742 01:49:49.266552 PCI: 00:1f.5: enabled 1
743 01:49:49.269830 PCI: 00:1f.6: enabled 0
744 01:49:49.273037 USB0 port 0: enabled 1
745 01:49:49.273155 I2C: 00:15: enabled 1
746 01:49:49.276781 I2C: 00:5d: enabled 1
747 01:49:49.280174 GENERIC: 0.0: enabled 1
748 01:49:49.280293 I2C: 00:1a: enabled 1
749 01:49:49.283449 I2C: 00:38: enabled 1
750 01:49:49.286851 I2C: 00:39: enabled 1
751 01:49:49.286967 I2C: 00:3a: enabled 1
752 01:49:49.290044 I2C: 00:3b: enabled 1
753 01:49:49.293171 PCI: 00:00.0: enabled 1
754 01:49:49.293287 SPI: 00: enabled 1
755 01:49:49.296543 SPI: 01: enabled 1
756 01:49:49.299846 PNP: 0c09.0: enabled 1
757 01:49:49.299939 USB2 port 0: enabled 1
758 01:49:49.302898 USB2 port 1: enabled 1
759 01:49:49.306408 USB2 port 2: enabled 0
760 01:49:49.306501 USB2 port 3: enabled 0
761 01:49:49.309690 USB2 port 5: enabled 0
762 01:49:49.313402 USB2 port 6: enabled 1
763 01:49:49.316229 USB2 port 9: enabled 1
764 01:49:49.316361 USB3 port 0: enabled 1
765 01:49:49.320090 USB3 port 1: enabled 1
766 01:49:49.323072 USB3 port 2: enabled 1
767 01:49:49.323167 USB3 port 3: enabled 1
768 01:49:49.326537 USB3 port 4: enabled 0
769 01:49:49.329954 APIC: 03: enabled 1
770 01:49:49.330042 APIC: 02: enabled 1
771 01:49:49.332800 APIC: 01: enabled 1
772 01:49:49.336187 APIC: 06: enabled 1
773 01:49:49.336307 APIC: 07: enabled 1
774 01:49:49.339755 APIC: 04: enabled 1
775 01:49:49.339878 APIC: 05: enabled 1
776 01:49:49.343089 Compare with tree...
777 01:49:49.346422 Root Device: enabled 1
778 01:49:49.349325 CPU_CLUSTER: 0: enabled 1
779 01:49:49.349447 APIC: 00: enabled 1
780 01:49:49.352581 APIC: 03: enabled 1
781 01:49:49.356413 APIC: 02: enabled 1
782 01:49:49.356502 APIC: 01: enabled 1
783 01:49:49.359761 APIC: 06: enabled 1
784 01:49:49.363051 APIC: 07: enabled 1
785 01:49:49.363145 APIC: 04: enabled 1
786 01:49:49.365995 APIC: 05: enabled 1
787 01:49:49.369430 DOMAIN: 0000: enabled 1
788 01:49:49.369519 PCI: 00:00.0: enabled 1
789 01:49:49.372855 PCI: 00:02.0: enabled 1
790 01:49:49.376229 PCI: 00:04.0: enabled 0
791 01:49:49.379432 PCI: 00:05.0: enabled 0
792 01:49:49.383243 PCI: 00:12.0: enabled 1
793 01:49:49.383361 PCI: 00:12.5: enabled 0
794 01:49:49.386397 PCI: 00:12.6: enabled 0
795 01:49:49.389750 PCI: 00:14.0: enabled 1
796 01:49:49.393015 USB0 port 0: enabled 1
797 01:49:49.395861 USB2 port 0: enabled 1
798 01:49:49.395984 USB2 port 1: enabled 1
799 01:49:49.399582 USB2 port 2: enabled 0
800 01:49:49.402857 USB2 port 3: enabled 0
801 01:49:49.406150 USB2 port 5: enabled 0
802 01:49:49.409573 USB2 port 6: enabled 1
803 01:49:49.412384 USB2 port 9: enabled 1
804 01:49:49.412509 USB3 port 0: enabled 1
805 01:49:49.416051 USB3 port 1: enabled 1
806 01:49:49.419185 USB3 port 2: enabled 1
807 01:49:49.422409 USB3 port 3: enabled 1
808 01:49:49.425817 USB3 port 4: enabled 0
809 01:49:49.425912 PCI: 00:14.1: enabled 0
810 01:49:49.429580 PCI: 00:14.3: enabled 1
811 01:49:49.432605 PCI: 00:14.5: enabled 0
812 01:49:49.435851 PCI: 00:15.0: enabled 1
813 01:49:49.439124 I2C: 00:15: enabled 1
814 01:49:49.439212 PCI: 00:15.1: enabled 1
815 01:49:49.442438 I2C: 00:5d: enabled 1
816 01:49:49.445703 GENERIC: 0.0: enabled 1
817 01:49:49.449101 PCI: 00:15.2: enabled 0
818 01:49:49.452432 PCI: 00:15.3: enabled 0
819 01:49:49.452515 PCI: 00:16.0: enabled 1
820 01:49:49.455787 PCI: 00:16.1: enabled 0
821 01:49:49.458964 PCI: 00:16.2: enabled 0
822 01:49:49.462304 PCI: 00:16.3: enabled 0
823 01:49:49.462398 PCI: 00:16.4: enabled 0
824 01:49:49.466062 PCI: 00:16.5: enabled 0
825 01:49:49.468918 PCI: 00:17.0: enabled 1
826 01:49:49.472760 PCI: 00:19.0: enabled 1
827 01:49:49.476076 I2C: 00:1a: enabled 1
828 01:49:49.476170 I2C: 00:38: enabled 1
829 01:49:49.478802 I2C: 00:39: enabled 1
830 01:49:49.482207 I2C: 00:3a: enabled 1
831 01:49:49.485451 I2C: 00:3b: enabled 1
832 01:49:49.485545 PCI: 00:19.1: enabled 0
833 01:49:49.489108 PCI: 00:19.2: enabled 0
834 01:49:49.492394 PCI: 00:1a.0: enabled 0
835 01:49:49.495771 PCI: 00:1c.0: enabled 0
836 01:49:49.499139 PCI: 00:1c.1: enabled 0
837 01:49:49.499230 PCI: 00:1c.2: enabled 0
838 01:49:49.502377 PCI: 00:1c.3: enabled 0
839 01:49:49.505667 PCI: 00:1c.4: enabled 0
840 01:49:49.509097 PCI: 00:1c.5: enabled 0
841 01:49:49.512534 PCI: 00:1c.6: enabled 0
842 01:49:49.512650 PCI: 00:1c.7: enabled 0
843 01:49:49.515760 PCI: 00:1d.0: enabled 1
844 01:49:49.519109 PCI: 00:1d.1: enabled 0
845 01:49:49.522385 PCI: 00:1d.2: enabled 0
846 01:49:49.525437 PCI: 00:1d.3: enabled 0
847 01:49:49.525521 PCI: 00:1d.4: enabled 0
848 01:49:49.528763 PCI: 00:1d.5: enabled 1
849 01:49:49.532561 PCI: 00:00.0: enabled 1
850 01:49:49.535466 PCI: 00:1e.0: enabled 1
851 01:49:49.535579 PCI: 00:1e.1: enabled 0
852 01:49:49.538998 PCI: 00:1e.2: enabled 1
853 01:49:49.542424 SPI: 00: enabled 1
854 01:49:49.545529 PCI: 00:1e.3: enabled 1
855 01:49:49.545613 SPI: 01: enabled 1
856 01:49:49.549017 PCI: 00:1f.0: enabled 1
857 01:49:49.551975 PNP: 0c09.0: enabled 1
858 01:49:49.555423 PCI: 00:1f.1: enabled 1
859 01:49:49.558817 PCI: 00:1f.2: enabled 1
860 01:49:49.558931 PCI: 00:1f.3: enabled 1
861 01:49:49.562133 PCI: 00:1f.4: enabled 1
862 01:49:49.565438 PCI: 00:1f.5: enabled 1
863 01:49:49.568737 PCI: 00:1f.6: enabled 0
864 01:49:49.568823 Root Device scanning...
865 01:49:49.572438 scan_static_bus for Root Device
866 01:49:49.575826 CPU_CLUSTER: 0 enabled
867 01:49:49.579209 DOMAIN: 0000 enabled
868 01:49:49.582453 DOMAIN: 0000 scanning...
869 01:49:49.585728 PCI: pci_scan_bus for bus 00
870 01:49:49.585845 PCI: 00:00.0 [8086/0000] ops
871 01:49:49.588983 PCI: 00:00.0 [8086/9b61] enabled
872 01:49:49.592364 PCI: 00:02.0 [8086/0000] bus ops
873 01:49:49.595676 PCI: 00:02.0 [8086/9b41] enabled
874 01:49:49.598956 PCI: 00:04.0 [8086/1903] disabled
875 01:49:49.602357 PCI: 00:08.0 [8086/1911] enabled
876 01:49:49.605840 PCI: 00:12.0 [8086/02f9] enabled
877 01:49:49.608993 PCI: 00:14.0 [8086/0000] bus ops
878 01:49:49.612214 PCI: 00:14.0 [8086/02ed] enabled
879 01:49:49.615614 PCI: 00:14.2 [8086/02ef] enabled
880 01:49:49.618916 PCI: 00:14.3 [8086/02f0] enabled
881 01:49:49.622309 PCI: 00:15.0 [8086/0000] bus ops
882 01:49:49.625745 PCI: 00:15.0 [8086/02e8] enabled
883 01:49:49.628814 PCI: 00:15.1 [8086/0000] bus ops
884 01:49:49.632391 PCI: 00:15.1 [8086/02e9] enabled
885 01:49:49.635801 PCI: 00:16.0 [8086/0000] ops
886 01:49:49.639016 PCI: 00:16.0 [8086/02e0] enabled
887 01:49:49.642384 PCI: 00:17.0 [8086/0000] ops
888 01:49:49.645787 PCI: 00:17.0 [8086/02d3] enabled
889 01:49:49.648939 PCI: 00:19.0 [8086/0000] bus ops
890 01:49:49.652228 PCI: 00:19.0 [8086/02c5] enabled
891 01:49:49.655718 PCI: 00:1d.0 [8086/0000] bus ops
892 01:49:49.659040 PCI: 00:1d.0 [8086/02b0] enabled
893 01:49:49.665352 PCI: Static device PCI: 00:1d.5 not found, disabling it.
894 01:49:49.668702 PCI: 00:1e.0 [8086/0000] ops
895 01:49:49.672108 PCI: 00:1e.0 [8086/02a8] enabled
896 01:49:49.675676 PCI: 00:1e.2 [8086/0000] bus ops
897 01:49:49.679005 PCI: 00:1e.2 [8086/02aa] enabled
898 01:49:49.682346 PCI: 00:1e.3 [8086/0000] bus ops
899 01:49:49.685766 PCI: 00:1e.3 [8086/02ab] enabled
900 01:49:49.688506 PCI: 00:1f.0 [8086/0000] bus ops
901 01:49:49.692392 PCI: 00:1f.0 [8086/0284] enabled
902 01:49:49.698641 PCI: Static device PCI: 00:1f.1 not found, disabling it.
903 01:49:49.701893 PCI: Static device PCI: 00:1f.2 not found, disabling it.
904 01:49:49.705300 PCI: 00:1f.3 [8086/0000] bus ops
905 01:49:49.708785 PCI: 00:1f.3 [8086/02c8] enabled
906 01:49:49.712486 PCI: 00:1f.4 [8086/0000] bus ops
907 01:49:49.715956 PCI: 00:1f.4 [8086/02a3] enabled
908 01:49:49.718987 PCI: 00:1f.5 [8086/0000] bus ops
909 01:49:49.722073 PCI: 00:1f.5 [8086/02a4] enabled
910 01:49:49.725590 PCI: Leftover static devices:
911 01:49:49.728937 PCI: 00:05.0
912 01:49:49.729031 PCI: 00:12.5
913 01:49:49.729105 PCI: 00:12.6
914 01:49:49.732181 PCI: 00:14.1
915 01:49:49.732274 PCI: 00:14.5
916 01:49:49.735401 PCI: 00:15.2
917 01:49:49.735497 PCI: 00:15.3
918 01:49:49.735570 PCI: 00:16.1
919 01:49:49.739068 PCI: 00:16.2
920 01:49:49.739164 PCI: 00:16.3
921 01:49:49.742725 PCI: 00:16.4
922 01:49:49.742819 PCI: 00:16.5
923 01:49:49.742892 PCI: 00:19.1
924 01:49:49.745641 PCI: 00:19.2
925 01:49:49.745734 PCI: 00:1a.0
926 01:49:49.748923 PCI: 00:1c.0
927 01:49:49.749017 PCI: 00:1c.1
928 01:49:49.749113 PCI: 00:1c.2
929 01:49:49.752376 PCI: 00:1c.3
930 01:49:49.752469 PCI: 00:1c.4
931 01:49:49.755529 PCI: 00:1c.5
932 01:49:49.755639 PCI: 00:1c.6
933 01:49:49.755713 PCI: 00:1c.7
934 01:49:49.758797 PCI: 00:1d.1
935 01:49:49.758898 PCI: 00:1d.2
936 01:49:49.762219 PCI: 00:1d.3
937 01:49:49.762319 PCI: 00:1d.4
938 01:49:49.765546 PCI: 00:1d.5
939 01:49:49.765673 PCI: 00:1e.1
940 01:49:49.765786 PCI: 00:1f.1
941 01:49:49.769044 PCI: 00:1f.2
942 01:49:49.769161 PCI: 00:1f.6
943 01:49:49.772124 PCI: Check your devicetree.cb.
944 01:49:49.775807 PCI: 00:02.0 scanning...
945 01:49:49.779185 scan_generic_bus for PCI: 00:02.0
946 01:49:49.782463 scan_generic_bus for PCI: 00:02.0 done
947 01:49:49.789128 scan_bus: scanning of bus PCI: 00:02.0 took 10190 usecs
948 01:49:49.791975 PCI: 00:14.0 scanning...
949 01:49:49.795375 scan_static_bus for PCI: 00:14.0
950 01:49:49.795500 USB0 port 0 enabled
951 01:49:49.798723 USB0 port 0 scanning...
952 01:49:49.801946 scan_static_bus for USB0 port 0
953 01:49:49.805357 USB2 port 0 enabled
954 01:49:49.805454 USB2 port 1 enabled
955 01:49:49.808732 USB2 port 2 disabled
956 01:49:49.812082 USB2 port 3 disabled
957 01:49:49.812204 USB2 port 5 disabled
958 01:49:49.815426 USB2 port 6 enabled
959 01:49:49.815513 USB2 port 9 enabled
960 01:49:49.818874 USB3 port 0 enabled
961 01:49:49.822380 USB3 port 1 enabled
962 01:49:49.822500 USB3 port 2 enabled
963 01:49:49.825553 USB3 port 3 enabled
964 01:49:49.828838 USB3 port 4 disabled
965 01:49:49.828924 USB2 port 0 scanning...
966 01:49:49.831946 scan_static_bus for USB2 port 0
967 01:49:49.835536 scan_static_bus for USB2 port 0 done
968 01:49:49.841928 scan_bus: scanning of bus USB2 port 0 took 9708 usecs
969 01:49:49.845402 USB2 port 1 scanning...
970 01:49:49.848849 scan_static_bus for USB2 port 1
971 01:49:49.852407 scan_static_bus for USB2 port 1 done
972 01:49:49.858825 scan_bus: scanning of bus USB2 port 1 took 9708 usecs
973 01:49:49.858941 USB2 port 6 scanning...
974 01:49:49.862082 scan_static_bus for USB2 port 6
975 01:49:49.865445 scan_static_bus for USB2 port 6 done
976 01:49:49.872769 scan_bus: scanning of bus USB2 port 6 took 9710 usecs
977 01:49:49.875496 USB2 port 9 scanning...
978 01:49:49.879175 scan_static_bus for USB2 port 9
979 01:49:49.882264 scan_static_bus for USB2 port 9 done
980 01:49:49.889157 scan_bus: scanning of bus USB2 port 9 took 9740 usecs
981 01:49:49.889286 USB3 port 0 scanning...
982 01:49:49.892294 scan_static_bus for USB3 port 0
983 01:49:49.895678 scan_static_bus for USB3 port 0 done
984 01:49:49.902412 scan_bus: scanning of bus USB3 port 0 took 9712 usecs
985 01:49:49.905885 USB3 port 1 scanning...
986 01:49:49.909054 scan_static_bus for USB3 port 1
987 01:49:49.912433 scan_static_bus for USB3 port 1 done
988 01:49:49.918679 scan_bus: scanning of bus USB3 port 1 took 9700 usecs
989 01:49:49.918775 USB3 port 2 scanning...
990 01:49:49.922036 scan_static_bus for USB3 port 2
991 01:49:49.925433 scan_static_bus for USB3 port 2 done
992 01:49:49.932067 scan_bus: scanning of bus USB3 port 2 took 9707 usecs
993 01:49:49.935460 USB3 port 3 scanning...
994 01:49:49.938756 scan_static_bus for USB3 port 3
995 01:49:49.942056 scan_static_bus for USB3 port 3 done
996 01:49:49.948751 scan_bus: scanning of bus USB3 port 3 took 9701 usecs
997 01:49:49.951898 scan_static_bus for USB0 port 0 done
998 01:49:49.955383 scan_bus: scanning of bus USB0 port 0 took 155463 usecs
999 01:49:49.962032 scan_static_bus for PCI: 00:14.0 done
1000 01:49:49.965262 scan_bus: scanning of bus PCI: 00:14.0 took 173090 usecs
1001 01:49:49.968380 PCI: 00:15.0 scanning...
1002 01:49:49.971737 scan_generic_bus for PCI: 00:15.0
1003 01:49:49.975059 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1004 01:49:49.981726 scan_generic_bus for PCI: 00:15.0 done
1005 01:49:49.985056 scan_bus: scanning of bus PCI: 00:15.0 took 14307 usecs
1006 01:49:49.988424 PCI: 00:15.1 scanning...
1007 01:49:49.991980 scan_generic_bus for PCI: 00:15.1
1008 01:49:49.995139 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1009 01:49:50.001789 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1010 01:49:50.005211 scan_generic_bus for PCI: 00:15.1 done
1011 01:49:50.008482 scan_bus: scanning of bus PCI: 00:15.1 took 18612 usecs
1012 01:49:50.011868 PCI: 00:19.0 scanning...
1013 01:49:50.015225 scan_generic_bus for PCI: 00:19.0
1014 01:49:50.021480 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1015 01:49:50.024783 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1016 01:49:50.028219 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1017 01:49:50.031530 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1018 01:49:50.038112 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1019 01:49:50.041557 scan_generic_bus for PCI: 00:19.0 done
1020 01:49:50.044932 scan_bus: scanning of bus PCI: 00:19.0 took 30731 usecs
1021 01:49:50.047947 PCI: 00:1d.0 scanning...
1022 01:49:50.051367 do_pci_scan_bridge for PCI: 00:1d.0
1023 01:49:50.054817 PCI: pci_scan_bus for bus 01
1024 01:49:50.058098 PCI: 01:00.0 [1c5c/1327] enabled
1025 01:49:50.061194 Enabling Common Clock Configuration
1026 01:49:50.068295 L1 Sub-State supported from root port 29
1027 01:49:50.068413 L1 Sub-State Support = 0xf
1028 01:49:50.071333 CommonModeRestoreTime = 0x28
1029 01:49:50.078130 Power On Value = 0x16, Power On Scale = 0x0
1030 01:49:50.078244 ASPM: Enabled L1
1031 01:49:50.085001 scan_bus: scanning of bus PCI: 00:1d.0 took 32790 usecs
1032 01:49:50.087889 PCI: 00:1e.2 scanning...
1033 01:49:50.091544 scan_generic_bus for PCI: 00:1e.2
1034 01:49:50.094852 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1035 01:49:50.098082 scan_generic_bus for PCI: 00:1e.2 done
1036 01:49:50.104673 scan_bus: scanning of bus PCI: 00:1e.2 took 14011 usecs
1037 01:49:50.104789 PCI: 00:1e.3 scanning...
1038 01:49:50.111475 scan_generic_bus for PCI: 00:1e.3
1039 01:49:50.115079 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1040 01:49:50.118540 scan_generic_bus for PCI: 00:1e.3 done
1041 01:49:50.121770 scan_bus: scanning of bus PCI: 00:1e.3 took 14009 usecs
1042 01:49:50.124765 PCI: 00:1f.0 scanning...
1043 01:49:50.128369 scan_static_bus for PCI: 00:1f.0
1044 01:49:50.131708 PNP: 0c09.0 enabled
1045 01:49:50.135052 scan_static_bus for PCI: 00:1f.0 done
1046 01:49:50.141579 scan_bus: scanning of bus PCI: 00:1f.0 took 12062 usecs
1047 01:49:50.144951 PCI: 00:1f.3 scanning...
1048 01:49:50.147936 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1049 01:49:50.151295 PCI: 00:1f.4 scanning...
1050 01:49:50.154827 scan_generic_bus for PCI: 00:1f.4
1051 01:49:50.158083 scan_generic_bus for PCI: 00:1f.4 done
1052 01:49:50.164606 scan_bus: scanning of bus PCI: 00:1f.4 took 10197 usecs
1053 01:49:50.168301 PCI: 00:1f.5 scanning...
1054 01:49:50.171523 scan_generic_bus for PCI: 00:1f.5
1055 01:49:50.174876 scan_generic_bus for PCI: 00:1f.5 done
1056 01:49:50.181881 scan_bus: scanning of bus PCI: 00:1f.5 took 10191 usecs
1057 01:49:50.184779 scan_bus: scanning of bus DOMAIN: 0000 took 605264 usecs
1058 01:49:50.191356 scan_static_bus for Root Device done
1059 01:49:50.194906 scan_bus: scanning of bus Root Device took 625132 usecs
1060 01:49:50.195002 done
1061 01:49:50.198062 Chrome EC: UHEPI supported
1062 01:49:50.205127 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1063 01:49:50.211855 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1064 01:49:50.218140 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1065 01:49:50.224949 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1066 01:49:50.228255 SPI flash protection: WPSW=0 SRP0=0
1067 01:49:50.231268 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1068 01:49:50.238352 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1069 01:49:50.241628 found VGA at PCI: 00:02.0
1070 01:49:50.244947 Setting up VGA for PCI: 00:02.0
1071 01:49:50.248486 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1072 01:49:50.254578 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1073 01:49:50.258062 Allocating resources...
1074 01:49:50.258183 Reading resources...
1075 01:49:50.261524 Root Device read_resources bus 0 link: 0
1076 01:49:50.268343 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1077 01:49:50.271732 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1078 01:49:50.278429 DOMAIN: 0000 read_resources bus 0 link: 0
1079 01:49:50.281803 PCI: 00:14.0 read_resources bus 0 link: 0
1080 01:49:50.288679 USB0 port 0 read_resources bus 0 link: 0
1081 01:49:50.295360 USB0 port 0 read_resources bus 0 link: 0 done
1082 01:49:50.298984 PCI: 00:14.0 read_resources bus 0 link: 0 done
1083 01:49:50.305799 PCI: 00:15.0 read_resources bus 1 link: 0
1084 01:49:50.309369 PCI: 00:15.0 read_resources bus 1 link: 0 done
1085 01:49:50.316014 PCI: 00:15.1 read_resources bus 2 link: 0
1086 01:49:50.319558 PCI: 00:15.1 read_resources bus 2 link: 0 done
1087 01:49:50.326987 PCI: 00:19.0 read_resources bus 3 link: 0
1088 01:49:50.333546 PCI: 00:19.0 read_resources bus 3 link: 0 done
1089 01:49:50.336432 PCI: 00:1d.0 read_resources bus 1 link: 0
1090 01:49:50.343381 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1091 01:49:50.346801 PCI: 00:1e.2 read_resources bus 4 link: 0
1092 01:49:50.353503 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1093 01:49:50.356889 PCI: 00:1e.3 read_resources bus 5 link: 0
1094 01:49:50.363512 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1095 01:49:50.367010 PCI: 00:1f.0 read_resources bus 0 link: 0
1096 01:49:50.373518 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1097 01:49:50.376898 DOMAIN: 0000 read_resources bus 0 link: 0 done
1098 01:49:50.383542 Root Device read_resources bus 0 link: 0 done
1099 01:49:50.386908 Done reading resources.
1100 01:49:50.390308 Show resources in subtree (Root Device)...After reading.
1101 01:49:50.397086 Root Device child on link 0 CPU_CLUSTER: 0
1102 01:49:50.400591 CPU_CLUSTER: 0 child on link 0 APIC: 00
1103 01:49:50.400685 APIC: 00
1104 01:49:50.403846 APIC: 03
1105 01:49:50.403967 APIC: 02
1106 01:49:50.404065 APIC: 01
1107 01:49:50.407047 APIC: 06
1108 01:49:50.407140 APIC: 07
1109 01:49:50.410406 APIC: 04
1110 01:49:50.410498 APIC: 05
1111 01:49:50.413588 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1112 01:49:50.423453 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1113 01:49:50.479905 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1114 01:49:50.480069 PCI: 00:00.0
1115 01:49:50.480346 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1116 01:49:50.480423 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1117 01:49:50.480573 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1118 01:49:50.481131 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1119 01:49:50.518795 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1120 01:49:50.519117 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1121 01:49:50.519229 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1122 01:49:50.519317 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1123 01:49:50.522726 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1124 01:49:50.529555 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1125 01:49:50.535844 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1126 01:49:50.545919 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1127 01:49:50.556264 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1128 01:49:50.565842 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1129 01:49:50.576249 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1130 01:49:50.585976 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1131 01:49:50.586104 PCI: 00:02.0
1132 01:49:50.595975 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1133 01:49:50.606073 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1134 01:49:50.615798 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1135 01:49:50.615923 PCI: 00:04.0
1136 01:49:50.619635 PCI: 00:08.0
1137 01:49:50.629323 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1138 01:49:50.629457 PCI: 00:12.0
1139 01:49:50.639582 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1140 01:49:50.646085 PCI: 00:14.0 child on link 0 USB0 port 0
1141 01:49:50.655975 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1142 01:49:50.659176 USB0 port 0 child on link 0 USB2 port 0
1143 01:49:50.662611 USB2 port 0
1144 01:49:50.662702 USB2 port 1
1145 01:49:50.665977 USB2 port 2
1146 01:49:50.666064 USB2 port 3
1147 01:49:50.669367 USB2 port 5
1148 01:49:50.669451 USB2 port 6
1149 01:49:50.672670 USB2 port 9
1150 01:49:50.672758 USB3 port 0
1151 01:49:50.676165 USB3 port 1
1152 01:49:50.676247 USB3 port 2
1153 01:49:50.679414 USB3 port 3
1154 01:49:50.679498 USB3 port 4
1155 01:49:50.682655 PCI: 00:14.2
1156 01:49:50.692447 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1157 01:49:50.702478 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1158 01:49:50.702585 PCI: 00:14.3
1159 01:49:50.712586 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1160 01:49:50.719319 PCI: 00:15.0 child on link 0 I2C: 01:15
1161 01:49:50.729170 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1162 01:49:50.729267 I2C: 01:15
1163 01:49:50.732838 PCI: 00:15.1 child on link 0 I2C: 02:5d
1164 01:49:50.742640 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 01:49:50.745966 I2C: 02:5d
1166 01:49:50.746053 GENERIC: 0.0
1167 01:49:50.749354 PCI: 00:16.0
1168 01:49:50.759502 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 01:49:50.759600 PCI: 00:17.0
1170 01:49:50.768897 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1171 01:49:50.779158 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1172 01:49:50.785932 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1173 01:49:50.795781 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1174 01:49:50.802221 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1175 01:49:50.812397 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1176 01:49:50.815424 PCI: 00:19.0 child on link 0 I2C: 03:1a
1177 01:49:50.825843 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1178 01:49:50.828914 I2C: 03:1a
1179 01:49:50.829001 I2C: 03:38
1180 01:49:50.832301 I2C: 03:39
1181 01:49:50.832386 I2C: 03:3a
1182 01:49:50.835528 I2C: 03:3b
1183 01:49:50.838738 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1184 01:49:50.845689 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1185 01:49:50.855439 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1186 01:49:50.865838 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1187 01:49:50.868914 PCI: 01:00.0
1188 01:49:50.878467 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1189 01:49:50.878562 PCI: 00:1e.0
1190 01:49:50.892180 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1191 01:49:50.902083 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1192 01:49:50.905356 PCI: 00:1e.2 child on link 0 SPI: 00
1193 01:49:50.915538 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 01:49:50.915636 SPI: 00
1195 01:49:50.918599 PCI: 00:1e.3 child on link 0 SPI: 01
1196 01:49:50.928461 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 01:49:50.931902 SPI: 01
1198 01:49:50.935636 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1199 01:49:50.945174 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1200 01:49:50.951888 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1201 01:49:50.955169 PNP: 0c09.0
1202 01:49:50.961711 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1203 01:49:50.964845 PCI: 00:1f.3
1204 01:49:50.974820 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1205 01:49:50.985076 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1206 01:49:50.987979 PCI: 00:1f.4
1207 01:49:50.994684 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1208 01:49:51.004560 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1209 01:49:51.007824 PCI: 00:1f.5
1210 01:49:51.014833 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1211 01:49:51.021430 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1212 01:49:51.027945 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1213 01:49:51.034781 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1214 01:49:51.038083 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1215 01:49:51.041714 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1216 01:49:51.048277 PCI: 00:17.0 18 * [0x60 - 0x67] io
1217 01:49:51.051145 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1218 01:49:51.057737 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1219 01:49:51.064555 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1220 01:49:51.071157 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1221 01:49:51.081381 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1222 01:49:51.087878 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1223 01:49:51.090899 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1224 01:49:51.097591 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1225 01:49:51.104203 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1226 01:49:51.107987 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1227 01:49:51.114541 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1228 01:49:51.117951 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1229 01:49:51.121214 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1230 01:49:51.127696 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1231 01:49:51.130966 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1232 01:49:51.137854 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1233 01:49:51.141335 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1234 01:49:51.147441 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1235 01:49:51.150616 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1236 01:49:51.157322 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1237 01:49:51.160473 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1238 01:49:51.167160 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1239 01:49:51.170733 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1240 01:49:51.177698 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1241 01:49:51.180403 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1242 01:49:51.187170 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1243 01:49:51.190603 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1244 01:49:51.197177 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1245 01:49:51.200215 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1246 01:49:51.203534 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1247 01:49:51.210613 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1248 01:49:51.216790 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1249 01:49:51.223327 avoid_fixed_resources: DOMAIN: 0000
1250 01:49:51.227153 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1251 01:49:51.233827 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1252 01:49:51.240255 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1253 01:49:51.250239 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1254 01:49:51.256783 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1255 01:49:51.263502 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1256 01:49:51.273188 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1257 01:49:51.279782 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1258 01:49:51.286427 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1259 01:49:51.296549 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1260 01:49:51.303229 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1261 01:49:51.309865 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1262 01:49:51.313096 Setting resources...
1263 01:49:51.319623 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1264 01:49:51.322779 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1265 01:49:51.326607 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1266 01:49:51.329433 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1267 01:49:51.332962 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1268 01:49:51.339530 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1269 01:49:51.345944 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1270 01:49:51.352729 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1271 01:49:51.359548 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1272 01:49:51.366133 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1273 01:49:51.369538 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1274 01:49:51.375879 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1275 01:49:51.379364 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1276 01:49:51.385907 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1277 01:49:51.389035 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1278 01:49:51.395727 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1279 01:49:51.399075 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1280 01:49:51.405701 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1281 01:49:51.409456 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1282 01:49:51.415690 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1283 01:49:51.418997 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1284 01:49:51.425710 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1285 01:49:51.428829 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1286 01:49:51.435170 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1287 01:49:51.438803 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1288 01:49:51.445401 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1289 01:49:51.448390 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1290 01:49:51.451949 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1291 01:49:51.458729 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1292 01:49:51.461957 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1293 01:49:51.468500 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1294 01:49:51.471643 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1295 01:49:51.482009 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1296 01:49:51.488693 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1297 01:49:51.495233 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1298 01:49:51.501789 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1299 01:49:51.508523 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1300 01:49:51.514921 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1301 01:49:51.518182 Root Device assign_resources, bus 0 link: 0
1302 01:49:51.525055 DOMAIN: 0000 assign_resources, bus 0 link: 0
1303 01:49:51.531806 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1304 01:49:51.541359 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1305 01:49:51.548271 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1306 01:49:51.558016 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1307 01:49:51.564797 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1308 01:49:51.574791 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1309 01:49:51.577962 PCI: 00:14.0 assign_resources, bus 0 link: 0
1310 01:49:51.581236 PCI: 00:14.0 assign_resources, bus 0 link: 0
1311 01:49:51.591227 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1312 01:49:51.598277 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1313 01:49:51.608104 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1314 01:49:51.614825 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1315 01:49:51.621290 PCI: 00:15.0 assign_resources, bus 1 link: 0
1316 01:49:51.624548 PCI: 00:15.0 assign_resources, bus 1 link: 0
1317 01:49:51.634371 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1318 01:49:51.637845 PCI: 00:15.1 assign_resources, bus 2 link: 0
1319 01:49:51.640996 PCI: 00:15.1 assign_resources, bus 2 link: 0
1320 01:49:51.651026 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1321 01:49:51.657659 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1322 01:49:51.667752 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1323 01:49:51.674705 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1324 01:49:51.681178 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1325 01:49:51.691359 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1326 01:49:51.697949 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1327 01:49:51.704615 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1328 01:49:51.710775 PCI: 00:19.0 assign_resources, bus 3 link: 0
1329 01:49:51.714098 PCI: 00:19.0 assign_resources, bus 3 link: 0
1330 01:49:51.724375 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1331 01:49:51.731097 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1332 01:49:51.740833 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1333 01:49:51.743890 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1334 01:49:51.754016 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1335 01:49:51.757545 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1336 01:49:51.767570 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1337 01:49:51.774152 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1338 01:49:51.780696 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1339 01:49:51.784230 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1340 01:49:51.793753 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1341 01:49:51.796984 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1342 01:49:51.800620 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1343 01:49:51.807225 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1344 01:49:51.810319 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1345 01:49:51.817049 LPC: Trying to open IO window from 800 size 1ff
1346 01:49:51.823661 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1347 01:49:51.834022 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1348 01:49:51.840389 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1349 01:49:51.850256 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1350 01:49:51.853663 DOMAIN: 0000 assign_resources, bus 0 link: 0
1351 01:49:51.860315 Root Device assign_resources, bus 0 link: 0
1352 01:49:51.860472 Done setting resources.
1353 01:49:51.866872 Show resources in subtree (Root Device)...After assigning values.
1354 01:49:51.873604 Root Device child on link 0 CPU_CLUSTER: 0
1355 01:49:51.876923 CPU_CLUSTER: 0 child on link 0 APIC: 00
1356 01:49:51.877053 APIC: 00
1357 01:49:51.880133 APIC: 03
1358 01:49:51.880222 APIC: 02
1359 01:49:51.880294 APIC: 01
1360 01:49:51.883356 APIC: 06
1361 01:49:51.883441 APIC: 07
1362 01:49:51.883512 APIC: 04
1363 01:49:51.886749 APIC: 05
1364 01:49:51.890021 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1365 01:49:51.899846 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1366 01:49:51.910137 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1367 01:49:51.913251 PCI: 00:00.0
1368 01:49:51.923407 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1369 01:49:51.933566 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1370 01:49:51.940007 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1371 01:49:51.950111 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1372 01:49:51.960135 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1373 01:49:51.969864 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1374 01:49:51.979865 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1375 01:49:51.989915 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1376 01:49:51.996373 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1377 01:49:52.005991 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1378 01:49:52.015881 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1379 01:49:52.026249 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1380 01:49:52.036101 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1381 01:49:52.045880 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1382 01:49:52.052299 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1383 01:49:52.062404 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1384 01:49:52.065756 PCI: 00:02.0
1385 01:49:52.075897 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1386 01:49:52.085682 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1387 01:49:52.095617 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1388 01:49:52.095754 PCI: 00:04.0
1389 01:49:52.099158 PCI: 00:08.0
1390 01:49:52.109022 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1391 01:49:52.112348 PCI: 00:12.0
1392 01:49:52.122303 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1393 01:49:52.125189 PCI: 00:14.0 child on link 0 USB0 port 0
1394 01:49:52.135201 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1395 01:49:52.138554 USB0 port 0 child on link 0 USB2 port 0
1396 01:49:52.141830 USB2 port 0
1397 01:49:52.145366 USB2 port 1
1398 01:49:52.145482 USB2 port 2
1399 01:49:52.148243 USB2 port 3
1400 01:49:52.148331 USB2 port 5
1401 01:49:52.151948 USB2 port 6
1402 01:49:52.152056 USB2 port 9
1403 01:49:52.155263 USB3 port 0
1404 01:49:52.155348 USB3 port 1
1405 01:49:52.158470 USB3 port 2
1406 01:49:52.158555 USB3 port 3
1407 01:49:52.161802 USB3 port 4
1408 01:49:52.161885 PCI: 00:14.2
1409 01:49:52.171662 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1410 01:49:52.184722 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1411 01:49:52.184877 PCI: 00:14.3
1412 01:49:52.195057 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1413 01:49:52.198144 PCI: 00:15.0 child on link 0 I2C: 01:15
1414 01:49:52.211217 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1415 01:49:52.211334 I2C: 01:15
1416 01:49:52.214752 PCI: 00:15.1 child on link 0 I2C: 02:5d
1417 01:49:52.224447 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1418 01:49:52.227874 I2C: 02:5d
1419 01:49:52.227974 GENERIC: 0.0
1420 01:49:52.231152 PCI: 00:16.0
1421 01:49:52.240959 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1422 01:49:52.244907 PCI: 00:17.0
1423 01:49:52.254402 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1424 01:49:52.264017 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1425 01:49:52.271124 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1426 01:49:52.281125 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1427 01:49:52.290504 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1428 01:49:52.300932 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1429 01:49:52.303762 PCI: 00:19.0 child on link 0 I2C: 03:1a
1430 01:49:52.313911 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1431 01:49:52.317511 I2C: 03:1a
1432 01:49:52.317610 I2C: 03:38
1433 01:49:52.320439 I2C: 03:39
1434 01:49:52.320563 I2C: 03:3a
1435 01:49:52.323883 I2C: 03:3b
1436 01:49:52.327124 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1437 01:49:52.337051 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1438 01:49:52.346945 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1439 01:49:52.356808 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1440 01:49:52.360707 PCI: 01:00.0
1441 01:49:52.370271 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1442 01:49:52.370365 PCI: 00:1e.0
1443 01:49:52.383581 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1444 01:49:52.393568 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1445 01:49:52.396766 PCI: 00:1e.2 child on link 0 SPI: 00
1446 01:49:52.407093 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1447 01:49:52.407242 SPI: 00
1448 01:49:52.413334 PCI: 00:1e.3 child on link 0 SPI: 01
1449 01:49:52.423424 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1450 01:49:52.423663 SPI: 01
1451 01:49:52.430138 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1452 01:49:52.436686 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1453 01:49:52.446401 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1454 01:49:52.446683 PNP: 0c09.0
1455 01:49:52.456481 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1456 01:49:52.456679 PCI: 00:1f.3
1457 01:49:52.469484 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1458 01:49:52.479465 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1459 01:49:52.479593 PCI: 00:1f.4
1460 01:49:52.489349 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1461 01:49:52.499418 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1462 01:49:52.502801 PCI: 00:1f.5
1463 01:49:52.512618 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1464 01:49:52.515937 Done allocating resources.
1465 01:49:52.519654 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1466 01:49:52.522899 Enabling resources...
1467 01:49:52.525975 PCI: 00:00.0 subsystem <- 8086/9b61
1468 01:49:52.529183 PCI: 00:00.0 cmd <- 06
1469 01:49:52.532427 PCI: 00:02.0 subsystem <- 8086/9b41
1470 01:49:52.536581 PCI: 00:02.0 cmd <- 03
1471 01:49:52.539507 PCI: 00:08.0 cmd <- 06
1472 01:49:52.542570 PCI: 00:12.0 subsystem <- 8086/02f9
1473 01:49:52.546094 PCI: 00:12.0 cmd <- 02
1474 01:49:52.548911 PCI: 00:14.0 subsystem <- 8086/02ed
1475 01:49:52.552664 PCI: 00:14.0 cmd <- 02
1476 01:49:52.552786 PCI: 00:14.2 cmd <- 02
1477 01:49:52.559285 PCI: 00:14.3 subsystem <- 8086/02f0
1478 01:49:52.559374 PCI: 00:14.3 cmd <- 02
1479 01:49:52.562409 PCI: 00:15.0 subsystem <- 8086/02e8
1480 01:49:52.565699 PCI: 00:15.0 cmd <- 02
1481 01:49:52.568996 PCI: 00:15.1 subsystem <- 8086/02e9
1482 01:49:52.572568 PCI: 00:15.1 cmd <- 02
1483 01:49:52.575563 PCI: 00:16.0 subsystem <- 8086/02e0
1484 01:49:52.579287 PCI: 00:16.0 cmd <- 02
1485 01:49:52.582610 PCI: 00:17.0 subsystem <- 8086/02d3
1486 01:49:52.585766 PCI: 00:17.0 cmd <- 03
1487 01:49:52.589080 PCI: 00:19.0 subsystem <- 8086/02c5
1488 01:49:52.592347 PCI: 00:19.0 cmd <- 02
1489 01:49:52.595693 PCI: 00:1d.0 bridge ctrl <- 0013
1490 01:49:52.598970 PCI: 00:1d.0 subsystem <- 8086/02b0
1491 01:49:52.602345 PCI: 00:1d.0 cmd <- 06
1492 01:49:52.605595 PCI: 00:1e.0 subsystem <- 8086/02a8
1493 01:49:52.605768 PCI: 00:1e.0 cmd <- 06
1494 01:49:52.612149 PCI: 00:1e.2 subsystem <- 8086/02aa
1495 01:49:52.612297 PCI: 00:1e.2 cmd <- 06
1496 01:49:52.615671 PCI: 00:1e.3 subsystem <- 8086/02ab
1497 01:49:52.618902 PCI: 00:1e.3 cmd <- 02
1498 01:49:52.622168 PCI: 00:1f.0 subsystem <- 8086/0284
1499 01:49:52.625467 PCI: 00:1f.0 cmd <- 407
1500 01:49:52.628691 PCI: 00:1f.3 subsystem <- 8086/02c8
1501 01:49:52.632222 PCI: 00:1f.3 cmd <- 02
1502 01:49:52.635830 PCI: 00:1f.4 subsystem <- 8086/02a3
1503 01:49:52.639302 PCI: 00:1f.4 cmd <- 03
1504 01:49:52.642289 PCI: 00:1f.5 subsystem <- 8086/02a4
1505 01:49:52.645553 PCI: 00:1f.5 cmd <- 406
1506 01:49:52.653686 PCI: 01:00.0 cmd <- 02
1507 01:49:52.658770 done.
1508 01:49:52.667880 ME: Version: 14.0.39.1367
1509 01:49:52.674635 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 8
1510 01:49:52.678099 Initializing devices...
1511 01:49:52.678200 Root Device init ...
1512 01:49:52.684213 Chrome EC: Set SMI mask to 0x0000000000000000
1513 01:49:52.687765 Chrome EC: clear events_b mask to 0x0000000000000000
1514 01:49:52.694272 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1515 01:49:52.700886 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1516 01:49:52.707495 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1517 01:49:52.710818 Chrome EC: Set WAKE mask to 0x0000000000000000
1518 01:49:52.714041 Root Device init finished in 35170 usecs
1519 01:49:52.717981 CPU_CLUSTER: 0 init ...
1520 01:49:52.724577 CPU_CLUSTER: 0 init finished in 2447 usecs
1521 01:49:52.728379 PCI: 00:00.0 init ...
1522 01:49:52.731830 CPU TDP: 15 Watts
1523 01:49:52.735058 CPU PL2 = 64 Watts
1524 01:49:52.738334 PCI: 00:00.0 init finished in 7084 usecs
1525 01:49:52.741832 PCI: 00:02.0 init ...
1526 01:49:52.745063 PCI: 00:02.0 init finished in 2253 usecs
1527 01:49:52.748218 PCI: 00:08.0 init ...
1528 01:49:52.751600 PCI: 00:08.0 init finished in 2253 usecs
1529 01:49:52.754945 PCI: 00:12.0 init ...
1530 01:49:52.758611 PCI: 00:12.0 init finished in 2252 usecs
1531 01:49:52.761998 PCI: 00:14.0 init ...
1532 01:49:52.765203 PCI: 00:14.0 init finished in 2252 usecs
1533 01:49:52.768302 PCI: 00:14.2 init ...
1534 01:49:52.771574 PCI: 00:14.2 init finished in 2252 usecs
1535 01:49:52.774943 PCI: 00:14.3 init ...
1536 01:49:52.778592 PCI: 00:14.3 init finished in 2271 usecs
1537 01:49:52.782002 PCI: 00:15.0 init ...
1538 01:49:52.785033 DW I2C bus 0 at 0xd121f000 (400 KHz)
1539 01:49:52.788253 PCI: 00:15.0 init finished in 5969 usecs
1540 01:49:52.791860 PCI: 00:15.1 init ...
1541 01:49:52.794908 DW I2C bus 1 at 0xd1220000 (400 KHz)
1542 01:49:52.798150 PCI: 00:15.1 init finished in 5976 usecs
1543 01:49:52.801682 PCI: 00:16.0 init ...
1544 01:49:52.805240 PCI: 00:16.0 init finished in 2252 usecs
1545 01:49:52.809158 PCI: 00:19.0 init ...
1546 01:49:52.812637 DW I2C bus 4 at 0xd1222000 (400 KHz)
1547 01:49:52.818920 PCI: 00:19.0 init finished in 5977 usecs
1548 01:49:52.819164 PCI: 00:1d.0 init ...
1549 01:49:52.822251 Initializing PCH PCIe bridge.
1550 01:49:52.825613 PCI: 00:1d.0 init finished in 5286 usecs
1551 01:49:52.830668 PCI: 00:1f.0 init ...
1552 01:49:52.833474 IOAPIC: Initializing IOAPIC at 0xfec00000
1553 01:49:52.840240 IOAPIC: Bootstrap Processor Local APIC = 0x00
1554 01:49:52.840354 IOAPIC: ID = 0x02
1555 01:49:52.843686 IOAPIC: Dumping registers
1556 01:49:52.846843 reg 0x0000: 0x02000000
1557 01:49:52.850449 reg 0x0001: 0x00770020
1558 01:49:52.850559 reg 0x0002: 0x00000000
1559 01:49:52.857487 PCI: 00:1f.0 init finished in 23542 usecs
1560 01:49:52.860810 PCI: 00:1f.4 init ...
1561 01:49:52.863642 PCI: 00:1f.4 init finished in 2263 usecs
1562 01:49:52.874483 PCI: 01:00.0 init ...
1563 01:49:52.877892 PCI: 01:00.0 init finished in 2253 usecs
1564 01:49:52.882449 PNP: 0c09.0 init ...
1565 01:49:52.885654 Google Chrome EC uptime: 11.051 seconds
1566 01:49:52.892346 Google Chrome AP resets since EC boot: 0
1567 01:49:52.895684 Google Chrome most recent AP reset causes:
1568 01:49:52.902550 Google Chrome EC reset flags at last EC boot: reset-pin
1569 01:49:52.905590 PNP: 0c09.0 init finished in 20576 usecs
1570 01:49:52.909118 Devices initialized
1571 01:49:52.909386 Show all devs... After init.
1572 01:49:52.912393 Root Device: enabled 1
1573 01:49:52.915558 CPU_CLUSTER: 0: enabled 1
1574 01:49:52.918761 DOMAIN: 0000: enabled 1
1575 01:49:52.919002 APIC: 00: enabled 1
1576 01:49:52.921913 PCI: 00:00.0: enabled 1
1577 01:49:52.925728 PCI: 00:02.0: enabled 1
1578 01:49:52.928596 PCI: 00:04.0: enabled 0
1579 01:49:52.928851 PCI: 00:05.0: enabled 0
1580 01:49:52.931946 PCI: 00:12.0: enabled 1
1581 01:49:52.935300 PCI: 00:12.5: enabled 0
1582 01:49:52.938682 PCI: 00:12.6: enabled 0
1583 01:49:52.938906 PCI: 00:14.0: enabled 1
1584 01:49:52.941972 PCI: 00:14.1: enabled 0
1585 01:49:52.945327 PCI: 00:14.3: enabled 1
1586 01:49:52.945571 PCI: 00:14.5: enabled 0
1587 01:49:52.948515 PCI: 00:15.0: enabled 1
1588 01:49:52.952053 PCI: 00:15.1: enabled 1
1589 01:49:52.955255 PCI: 00:15.2: enabled 0
1590 01:49:52.955549 PCI: 00:15.3: enabled 0
1591 01:49:52.958316 PCI: 00:16.0: enabled 1
1592 01:49:52.961852 PCI: 00:16.1: enabled 0
1593 01:49:52.965108 PCI: 00:16.2: enabled 0
1594 01:49:52.965185 PCI: 00:16.3: enabled 0
1595 01:49:52.968380 PCI: 00:16.4: enabled 0
1596 01:49:52.971851 PCI: 00:16.5: enabled 0
1597 01:49:52.975198 PCI: 00:17.0: enabled 1
1598 01:49:52.975277 PCI: 00:19.0: enabled 1
1599 01:49:52.978397 PCI: 00:19.1: enabled 0
1600 01:49:52.981526 PCI: 00:19.2: enabled 0
1601 01:49:52.981619 PCI: 00:1a.0: enabled 0
1602 01:49:52.985006 PCI: 00:1c.0: enabled 0
1603 01:49:52.988080 PCI: 00:1c.1: enabled 0
1604 01:49:52.991310 PCI: 00:1c.2: enabled 0
1605 01:49:52.991401 PCI: 00:1c.3: enabled 0
1606 01:49:52.994614 PCI: 00:1c.4: enabled 0
1607 01:49:52.997950 PCI: 00:1c.5: enabled 0
1608 01:49:53.001328 PCI: 00:1c.6: enabled 0
1609 01:49:53.001419 PCI: 00:1c.7: enabled 0
1610 01:49:53.004798 PCI: 00:1d.0: enabled 1
1611 01:49:53.008136 PCI: 00:1d.1: enabled 0
1612 01:49:53.011615 PCI: 00:1d.2: enabled 0
1613 01:49:53.011714 PCI: 00:1d.3: enabled 0
1614 01:49:53.014611 PCI: 00:1d.4: enabled 0
1615 01:49:53.018037 PCI: 00:1d.5: enabled 0
1616 01:49:53.021122 PCI: 00:1e.0: enabled 1
1617 01:49:53.021246 PCI: 00:1e.1: enabled 0
1618 01:49:53.024694 PCI: 00:1e.2: enabled 1
1619 01:49:53.027902 PCI: 00:1e.3: enabled 1
1620 01:49:53.028032 PCI: 00:1f.0: enabled 1
1621 01:49:53.030813 PCI: 00:1f.1: enabled 0
1622 01:49:53.034255 PCI: 00:1f.2: enabled 0
1623 01:49:53.037593 PCI: 00:1f.3: enabled 1
1624 01:49:53.037688 PCI: 00:1f.4: enabled 1
1625 01:49:53.040903 PCI: 00:1f.5: enabled 1
1626 01:49:53.043876 PCI: 00:1f.6: enabled 0
1627 01:49:53.047712 USB0 port 0: enabled 1
1628 01:49:53.047807 I2C: 01:15: enabled 1
1629 01:49:53.051010 I2C: 02:5d: enabled 1
1630 01:49:53.053881 GENERIC: 0.0: enabled 1
1631 01:49:53.053976 I2C: 03:1a: enabled 1
1632 01:49:53.057290 I2C: 03:38: enabled 1
1633 01:49:53.060748 I2C: 03:39: enabled 1
1634 01:49:53.060843 I2C: 03:3a: enabled 1
1635 01:49:53.063951 I2C: 03:3b: enabled 1
1636 01:49:53.067042 PCI: 00:00.0: enabled 1
1637 01:49:53.067157 SPI: 00: enabled 1
1638 01:49:53.070553 SPI: 01: enabled 1
1639 01:49:53.074099 PNP: 0c09.0: enabled 1
1640 01:49:53.074195 USB2 port 0: enabled 1
1641 01:49:53.076933 USB2 port 1: enabled 1
1642 01:49:53.080336 USB2 port 2: enabled 0
1643 01:49:53.084123 USB2 port 3: enabled 0
1644 01:49:53.084218 USB2 port 5: enabled 0
1645 01:49:53.086871 USB2 port 6: enabled 1
1646 01:49:53.090776 USB2 port 9: enabled 1
1647 01:49:53.090871 USB3 port 0: enabled 1
1648 01:49:53.093913 USB3 port 1: enabled 1
1649 01:49:53.097404 USB3 port 2: enabled 1
1650 01:49:53.097499 USB3 port 3: enabled 1
1651 01:49:53.100605 USB3 port 4: enabled 0
1652 01:49:53.103985 APIC: 03: enabled 1
1653 01:49:53.104087 APIC: 02: enabled 1
1654 01:49:53.107002 APIC: 01: enabled 1
1655 01:49:53.110315 APIC: 06: enabled 1
1656 01:49:53.110432 APIC: 07: enabled 1
1657 01:49:53.113637 APIC: 04: enabled 1
1658 01:49:53.113736 APIC: 05: enabled 1
1659 01:49:53.117052 PCI: 00:08.0: enabled 1
1660 01:49:53.120335 PCI: 00:14.2: enabled 1
1661 01:49:53.123778 PCI: 01:00.0: enabled 1
1662 01:49:53.127297 Disabling ACPI via APMC:
1663 01:49:53.127389 done.
1664 01:49:53.133769 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1665 01:49:53.137014 ELOG: NV offset 0xaf0000 size 0x4000
1666 01:49:53.143736 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1667 01:49:53.150403 ELOG: Event(17) added with size 13 at 2023-10-11 01:49:33 UTC
1668 01:49:53.157097 ELOG: Event(92) added with size 9 at 2023-10-11 01:49:33 UTC
1669 01:49:53.163839 ELOG: Event(93) added with size 9 at 2023-10-11 01:49:33 UTC
1670 01:49:53.170098 ELOG: Event(9A) added with size 9 at 2023-10-11 01:49:33 UTC
1671 01:49:53.176891 ELOG: Event(9E) added with size 10 at 2023-10-11 01:49:33 UTC
1672 01:49:53.183591 ELOG: Event(9F) added with size 14 at 2023-10-11 01:49:33 UTC
1673 01:49:53.186935 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1674 01:49:53.193943 ELOG: Event(A1) added with size 10 at 2023-10-11 01:49:33 UTC
1675 01:49:53.204047 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1676 01:49:53.210768 ELOG: Event(A0) added with size 9 at 2023-10-11 01:49:33 UTC
1677 01:49:53.214156 elog_add_boot_reason: Logged dev mode boot
1678 01:49:53.214248 Finalize devices...
1679 01:49:53.217368 PCI: 00:17.0 final
1680 01:49:53.220816 Devices finalized
1681 01:49:53.223750 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1682 01:49:53.230378 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1683 01:49:53.233549 ME: HFSTS1 : 0x90000245
1684 01:49:53.237277 ME: HFSTS2 : 0x3B850126
1685 01:49:53.243855 ME: HFSTS3 : 0x00000020
1686 01:49:53.247120 ME: HFSTS4 : 0x00004800
1687 01:49:53.250346 ME: HFSTS5 : 0x00000000
1688 01:49:53.253735 ME: HFSTS6 : 0x40400006
1689 01:49:53.257143 ME: Manufacturing Mode : NO
1690 01:49:53.260540 ME: FW Partition Table : OK
1691 01:49:53.263709 ME: Bringup Loader Failure : NO
1692 01:49:53.266963 ME: Firmware Init Complete : YES
1693 01:49:53.270458 ME: Boot Options Present : NO
1694 01:49:53.273860 ME: Update In Progress : NO
1695 01:49:53.277165 ME: D0i3 Support : YES
1696 01:49:53.279973 ME: Low Power State Enabled : NO
1697 01:49:53.283573 ME: CPU Replaced : NO
1698 01:49:53.286790 ME: CPU Replacement Valid : YES
1699 01:49:53.289891 ME: Current Working State : 5
1700 01:49:53.293607 ME: Current Operation State : 1
1701 01:49:53.296881 ME: Current Operation Mode : 0
1702 01:49:53.299904 ME: Error Code : 0
1703 01:49:53.303413 ME: CPU Debug Disabled : YES
1704 01:49:53.306589 ME: TXT Support : NO
1705 01:49:53.313123 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1706 01:49:53.316640 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1707 01:49:53.319751 CBFS @ c08000 size 3f8000
1708 01:49:53.326442 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1709 01:49:53.329951 CBFS: Locating 'fallback/dsdt.aml'
1710 01:49:53.333341 CBFS: Found @ offset 10bb80 size 3fa5
1711 01:49:53.339806 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1712 01:49:53.343128 CBFS @ c08000 size 3f8000
1713 01:49:53.346496 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1714 01:49:53.350046 CBFS: Locating 'fallback/slic'
1715 01:49:53.354436 CBFS: 'fallback/slic' not found.
1716 01:49:53.361637 ACPI: Writing ACPI tables at 99b3e000.
1717 01:49:53.361769 ACPI: * FACS
1718 01:49:53.364961 ACPI: * DSDT
1719 01:49:53.367970 Ramoops buffer: 0x100000@0x99a3d000.
1720 01:49:53.371375 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1721 01:49:53.377522 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1722 01:49:53.380843 Google Chrome EC: version:
1723 01:49:53.384158 ro: helios_v2.0.2659-56403530b
1724 01:49:53.388045 rw: helios_v2.0.2849-c41de27e7d
1725 01:49:53.388145 running image: 1
1726 01:49:53.391914 ACPI: * FADT
1727 01:49:53.392022 SCI is IRQ9
1728 01:49:53.398875 ACPI: added table 1/32, length now 40
1729 01:49:53.398995 ACPI: * SSDT
1730 01:49:53.402038 Found 1 CPU(s) with 8 core(s) each.
1731 01:49:53.405680 Error: Could not locate 'wifi_sar' in VPD.
1732 01:49:53.412055 Checking CBFS for default SAR values
1733 01:49:53.415214 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1734 01:49:53.418416 CBFS @ c08000 size 3f8000
1735 01:49:53.425117 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1736 01:49:53.428598 CBFS: Locating 'wifi_sar_defaults.hex'
1737 01:49:53.431895 CBFS: Found @ offset 5fac0 size 77
1738 01:49:53.435345 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1739 01:49:53.442134 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1740 01:49:53.445150 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1741 01:49:53.451835 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1742 01:49:53.455293 failed to find key in VPD: dsm_calib_r0_0
1743 01:49:53.464655 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1744 01:49:53.468408 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1745 01:49:53.474864 failed to find key in VPD: dsm_calib_r0_1
1746 01:49:53.481725 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1747 01:49:53.488223 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1748 01:49:53.491735 failed to find key in VPD: dsm_calib_r0_2
1749 01:49:53.501165 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1750 01:49:53.504643 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1751 01:49:53.511174 failed to find key in VPD: dsm_calib_r0_3
1752 01:49:53.517887 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1753 01:49:53.524471 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1754 01:49:53.527787 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1755 01:49:53.534043 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1756 01:49:53.537641 EC returned error result code 1
1757 01:49:53.541551 EC returned error result code 1
1758 01:49:53.545003 EC returned error result code 1
1759 01:49:53.548251 PS2K: Bad resp from EC. Vivaldi disabled!
1760 01:49:53.554710 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1761 01:49:53.561319 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1762 01:49:53.564553 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1763 01:49:53.571165 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1764 01:49:53.574428 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1765 01:49:53.581260 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1766 01:49:53.587851 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1767 01:49:53.593931 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1768 01:49:53.597543 ACPI: added table 2/32, length now 44
1769 01:49:53.597856 ACPI: * MCFG
1770 01:49:53.604159 ACPI: added table 3/32, length now 48
1771 01:49:53.604475 ACPI: * TPM2
1772 01:49:53.607618 TPM2 log created at 99a2d000
1773 01:49:53.610539 ACPI: added table 4/32, length now 52
1774 01:49:53.614060 ACPI: * MADT
1775 01:49:53.614371 SCI is IRQ9
1776 01:49:53.617535 ACPI: added table 5/32, length now 56
1777 01:49:53.620739 current = 99b43ac0
1778 01:49:53.621062 ACPI: * DMAR
1779 01:49:53.624225 ACPI: added table 6/32, length now 60
1780 01:49:53.627336 ACPI: * IGD OpRegion
1781 01:49:53.630876 GMA: Found VBT in CBFS
1782 01:49:53.633708 GMA: Found valid VBT in CBFS
1783 01:49:53.637650 ACPI: added table 7/32, length now 64
1784 01:49:53.638139 ACPI: * HPET
1785 01:49:53.640789 ACPI: added table 8/32, length now 68
1786 01:49:53.644138 ACPI: done.
1787 01:49:53.647383 ACPI tables: 31744 bytes.
1788 01:49:53.650501 smbios_write_tables: 99a2c000
1789 01:49:53.653902 EC returned error result code 3
1790 01:49:53.657130 Couldn't obtain OEM name from CBI
1791 01:49:53.660415 Create SMBIOS type 17
1792 01:49:53.664042 PCI: 00:00.0 (Intel Cannonlake)
1793 01:49:53.664567 PCI: 00:14.3 (Intel WiFi)
1794 01:49:53.667265 SMBIOS tables: 939 bytes.
1795 01:49:53.670209 Writing table forward entry at 0x00000500
1796 01:49:53.676889 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1797 01:49:53.680242 Writing coreboot table at 0x99b62000
1798 01:49:53.686960 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1799 01:49:53.690283 1. 0000000000001000-000000000009ffff: RAM
1800 01:49:53.696753 2. 00000000000a0000-00000000000fffff: RESERVED
1801 01:49:53.699933 3. 0000000000100000-0000000099a2bfff: RAM
1802 01:49:53.706685 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1803 01:49:53.710462 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1804 01:49:53.716696 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1805 01:49:53.723252 7. 000000009a000000-000000009f7fffff: RESERVED
1806 01:49:53.726858 8. 00000000e0000000-00000000efffffff: RESERVED
1807 01:49:53.733153 9. 00000000fc000000-00000000fc000fff: RESERVED
1808 01:49:53.736529 10. 00000000fe000000-00000000fe00ffff: RESERVED
1809 01:49:53.739989 11. 00000000fed10000-00000000fed17fff: RESERVED
1810 01:49:53.746224 12. 00000000fed80000-00000000fed83fff: RESERVED
1811 01:49:53.749907 13. 00000000fed90000-00000000fed91fff: RESERVED
1812 01:49:53.756060 14. 00000000feda0000-00000000feda1fff: RESERVED
1813 01:49:53.759909 15. 0000000100000000-000000045e7fffff: RAM
1814 01:49:53.763281 Graphics framebuffer located at 0xc0000000
1815 01:49:53.766641 Passing 5 GPIOs to payload:
1816 01:49:53.772703 NAME | PORT | POLARITY | VALUE
1817 01:49:53.775968 write protect | undefined | high | low
1818 01:49:53.783007 lid | undefined | high | high
1819 01:49:53.789213 power | undefined | high | low
1820 01:49:53.792654 oprom | undefined | high | low
1821 01:49:53.799311 EC in RW | 0x000000cb | high | low
1822 01:49:53.799667 Board ID: 4
1823 01:49:53.805933 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1824 01:49:53.806327 CBFS @ c08000 size 3f8000
1825 01:49:53.812561 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1826 01:49:53.818897 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1827 01:49:53.822853 coreboot table: 1492 bytes.
1828 01:49:53.826037 IMD ROOT 0. 99fff000 00001000
1829 01:49:53.829119 IMD SMALL 1. 99ffe000 00001000
1830 01:49:53.832417 FSP MEMORY 2. 99c4e000 003b0000
1831 01:49:53.835646 CONSOLE 3. 99c2e000 00020000
1832 01:49:53.839305 FMAP 4. 99c2d000 0000054e
1833 01:49:53.842345 TIME STAMP 5. 99c2c000 00000910
1834 01:49:53.845973 VBOOT WORK 6. 99c18000 00014000
1835 01:49:53.848891 MRC DATA 7. 99c16000 00001958
1836 01:49:53.852698 ROMSTG STCK 8. 99c15000 00001000
1837 01:49:53.855926 AFTER CAR 9. 99c0b000 0000a000
1838 01:49:53.858973 RAMSTAGE 10. 99baf000 0005c000
1839 01:49:53.862518 REFCODE 11. 99b7a000 00035000
1840 01:49:53.865649 SMM BACKUP 12. 99b6a000 00010000
1841 01:49:53.868987 COREBOOT 13. 99b62000 00008000
1842 01:49:53.872453 ACPI 14. 99b3e000 00024000
1843 01:49:53.875872 ACPI GNVS 15. 99b3d000 00001000
1844 01:49:53.879249 RAMOOPS 16. 99a3d000 00100000
1845 01:49:53.882629 TPM2 TCGLOG17. 99a2d000 00010000
1846 01:49:53.886018 SMBIOS 18. 99a2c000 00000800
1847 01:49:53.886391 IMD small region:
1848 01:49:53.888889 IMD ROOT 0. 99ffec00 00000400
1849 01:49:53.895648 FSP RUNTIME 1. 99ffebe0 00000004
1850 01:49:53.899083 EC HOSTEVENT 2. 99ffebc0 00000008
1851 01:49:53.902197 POWER STATE 3. 99ffeb80 00000040
1852 01:49:53.905897 ROMSTAGE 4. 99ffeb60 00000004
1853 01:49:53.909262 MEM INFO 5. 99ffe9a0 000001b9
1854 01:49:53.912330 VPD 6. 99ffe920 0000006c
1855 01:49:53.915713 MTRR: Physical address space:
1856 01:49:53.922215 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1857 01:49:53.928679 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1858 01:49:53.932405 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1859 01:49:53.938785 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1860 01:49:53.945489 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1861 01:49:53.952186 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1862 01:49:53.958389 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1863 01:49:53.961688 MTRR: Fixed MSR 0x250 0x0606060606060606
1864 01:49:53.965120 MTRR: Fixed MSR 0x258 0x0606060606060606
1865 01:49:53.971872 MTRR: Fixed MSR 0x259 0x0000000000000000
1866 01:49:53.974967 MTRR: Fixed MSR 0x268 0x0606060606060606
1867 01:49:53.978221 MTRR: Fixed MSR 0x269 0x0606060606060606
1868 01:49:53.981434 MTRR: Fixed MSR 0x26a 0x0606060606060606
1869 01:49:53.988095 MTRR: Fixed MSR 0x26b 0x0606060606060606
1870 01:49:53.991855 MTRR: Fixed MSR 0x26c 0x0606060606060606
1871 01:49:53.995224 MTRR: Fixed MSR 0x26d 0x0606060606060606
1872 01:49:53.998521 MTRR: Fixed MSR 0x26e 0x0606060606060606
1873 01:49:54.004575 MTRR: Fixed MSR 0x26f 0x0606060606060606
1874 01:49:54.007902 call enable_fixed_mtrr()
1875 01:49:54.011645 CPU physical address size: 39 bits
1876 01:49:54.015054 MTRR: default type WB/UC MTRR counts: 6/8.
1877 01:49:54.018241 MTRR: WB selected as default type.
1878 01:49:54.025000 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1879 01:49:54.031493 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1880 01:49:54.038449 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1881 01:49:54.044491 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1882 01:49:54.048062 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1883 01:49:54.054602 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1884 01:49:54.061721 MTRR: Fixed MSR 0x250 0x0606060606060606
1885 01:49:54.064787 MTRR: Fixed MSR 0x258 0x0606060606060606
1886 01:49:54.067989 MTRR: Fixed MSR 0x259 0x0000000000000000
1887 01:49:54.071360 MTRR: Fixed MSR 0x268 0x0606060606060606
1888 01:49:54.078133 MTRR: Fixed MSR 0x269 0x0606060606060606
1889 01:49:54.081306 MTRR: Fixed MSR 0x26a 0x0606060606060606
1890 01:49:54.084504 MTRR: Fixed MSR 0x26b 0x0606060606060606
1891 01:49:54.087543 MTRR: Fixed MSR 0x26c 0x0606060606060606
1892 01:49:54.094174 MTRR: Fixed MSR 0x26d 0x0606060606060606
1893 01:49:54.097694 MTRR: Fixed MSR 0x26e 0x0606060606060606
1894 01:49:54.100881 MTRR: Fixed MSR 0x26f 0x0606060606060606
1895 01:49:54.101211
1896 01:49:54.104222 MTRR check
1897 01:49:54.104597 Fixed MTRRs : Enabled
1898 01:49:54.107707 Variable MTRRs: Enabled
1899 01:49:54.108035
1900 01:49:54.110910 call enable_fixed_mtrr()
1901 01:49:54.114223 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1902 01:49:54.120810 CPU physical address size: 39 bits
1903 01:49:54.124297 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1904 01:49:54.127619 MTRR: Fixed MSR 0x250 0x0606060606060606
1905 01:49:54.134022 MTRR: Fixed MSR 0x258 0x0606060606060606
1906 01:49:54.137194 MTRR: Fixed MSR 0x259 0x0000000000000000
1907 01:49:54.140778 MTRR: Fixed MSR 0x268 0x0606060606060606
1908 01:49:54.144265 MTRR: Fixed MSR 0x269 0x0606060606060606
1909 01:49:54.151019 MTRR: Fixed MSR 0x26a 0x0606060606060606
1910 01:49:54.153975 MTRR: Fixed MSR 0x26b 0x0606060606060606
1911 01:49:54.157480 MTRR: Fixed MSR 0x26c 0x0606060606060606
1912 01:49:54.160314 MTRR: Fixed MSR 0x26d 0x0606060606060606
1913 01:49:54.167065 MTRR: Fixed MSR 0x26e 0x0606060606060606
1914 01:49:54.170530 MTRR: Fixed MSR 0x26f 0x0606060606060606
1915 01:49:54.173818 MTRR: Fixed MSR 0x250 0x0606060606060606
1916 01:49:54.177511 MTRR: Fixed MSR 0x250 0x0606060606060606
1917 01:49:54.180800 MTRR: Fixed MSR 0x258 0x0606060606060606
1918 01:49:54.187431 MTRR: Fixed MSR 0x259 0x0000000000000000
1919 01:49:54.190275 MTRR: Fixed MSR 0x268 0x0606060606060606
1920 01:49:54.193629 MTRR: Fixed MSR 0x269 0x0606060606060606
1921 01:49:54.197291 MTRR: Fixed MSR 0x26a 0x0606060606060606
1922 01:49:54.203942 MTRR: Fixed MSR 0x26b 0x0606060606060606
1923 01:49:54.207069 MTRR: Fixed MSR 0x26c 0x0606060606060606
1924 01:49:54.210643 MTRR: Fixed MSR 0x26d 0x0606060606060606
1925 01:49:54.213611 MTRR: Fixed MSR 0x26e 0x0606060606060606
1926 01:49:54.220414 MTRR: Fixed MSR 0x26f 0x0606060606060606
1927 01:49:54.223600 MTRR: Fixed MSR 0x258 0x0606060606060606
1928 01:49:54.226596 call enable_fixed_mtrr()
1929 01:49:54.230014 MTRR: Fixed MSR 0x259 0x0000000000000000
1930 01:49:54.233398 MTRR: Fixed MSR 0x268 0x0606060606060606
1931 01:49:54.237163 MTRR: Fixed MSR 0x269 0x0606060606060606
1932 01:49:54.243532 MTRR: Fixed MSR 0x26a 0x0606060606060606
1933 01:49:54.246935 MTRR: Fixed MSR 0x26b 0x0606060606060606
1934 01:49:54.250259 MTRR: Fixed MSR 0x26c 0x0606060606060606
1935 01:49:54.253451 MTRR: Fixed MSR 0x26d 0x0606060606060606
1936 01:49:54.260127 MTRR: Fixed MSR 0x26e 0x0606060606060606
1937 01:49:54.263345 MTRR: Fixed MSR 0x26f 0x0606060606060606
1938 01:49:54.266813 CPU physical address size: 39 bits
1939 01:49:54.269734 call enable_fixed_mtrr()
1940 01:49:54.273400 CBFS @ c08000 size 3f8000
1941 01:49:54.276559 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1942 01:49:54.279901 CBFS: Locating 'fallback/payload'
1943 01:49:54.286520 MTRR: Fixed MSR 0x250 0x0606060606060606
1944 01:49:54.289825 MTRR: Fixed MSR 0x250 0x0606060606060606
1945 01:49:54.293383 MTRR: Fixed MSR 0x258 0x0606060606060606
1946 01:49:54.296500 MTRR: Fixed MSR 0x259 0x0000000000000000
1947 01:49:54.302954 MTRR: Fixed MSR 0x268 0x0606060606060606
1948 01:49:54.306529 MTRR: Fixed MSR 0x269 0x0606060606060606
1949 01:49:54.309571 MTRR: Fixed MSR 0x26a 0x0606060606060606
1950 01:49:54.313244 MTRR: Fixed MSR 0x26b 0x0606060606060606
1951 01:49:54.316438 MTRR: Fixed MSR 0x26c 0x0606060606060606
1952 01:49:54.323157 MTRR: Fixed MSR 0x26d 0x0606060606060606
1953 01:49:54.326329 MTRR: Fixed MSR 0x26e 0x0606060606060606
1954 01:49:54.329356 MTRR: Fixed MSR 0x26f 0x0606060606060606
1955 01:49:54.333047 MTRR: Fixed MSR 0x258 0x0606060606060606
1956 01:49:54.336174 call enable_fixed_mtrr()
1957 01:49:54.339463 MTRR: Fixed MSR 0x259 0x0000000000000000
1958 01:49:54.346395 MTRR: Fixed MSR 0x268 0x0606060606060606
1959 01:49:54.349655 MTRR: Fixed MSR 0x269 0x0606060606060606
1960 01:49:54.353002 MTRR: Fixed MSR 0x26a 0x0606060606060606
1961 01:49:54.356274 MTRR: Fixed MSR 0x26b 0x0606060606060606
1962 01:49:54.362915 MTRR: Fixed MSR 0x26c 0x0606060606060606
1963 01:49:54.366255 MTRR: Fixed MSR 0x26d 0x0606060606060606
1964 01:49:54.369560 MTRR: Fixed MSR 0x26e 0x0606060606060606
1965 01:49:54.372790 MTRR: Fixed MSR 0x26f 0x0606060606060606
1966 01:49:54.379293 CPU physical address size: 39 bits
1967 01:49:54.379716 call enable_fixed_mtrr()
1968 01:49:54.382503 CPU physical address size: 39 bits
1969 01:49:54.385937 CPU physical address size: 39 bits
1970 01:49:54.389235 call enable_fixed_mtrr()
1971 01:49:54.392852 MTRR: Fixed MSR 0x250 0x0606060606060606
1972 01:49:54.399063 CPU physical address size: 39 bits
1973 01:49:54.402431 MTRR: Fixed MSR 0x258 0x0606060606060606
1974 01:49:54.405576 MTRR: Fixed MSR 0x259 0x0000000000000000
1975 01:49:54.408952 MTRR: Fixed MSR 0x268 0x0606060606060606
1976 01:49:54.416037 MTRR: Fixed MSR 0x269 0x0606060606060606
1977 01:49:54.418739 MTRR: Fixed MSR 0x26a 0x0606060606060606
1978 01:49:54.422228 MTRR: Fixed MSR 0x26b 0x0606060606060606
1979 01:49:54.425480 MTRR: Fixed MSR 0x26c 0x0606060606060606
1980 01:49:54.431963 MTRR: Fixed MSR 0x26d 0x0606060606060606
1981 01:49:54.435483 MTRR: Fixed MSR 0x26e 0x0606060606060606
1982 01:49:54.438763 MTRR: Fixed MSR 0x26f 0x0606060606060606
1983 01:49:54.442183 CBFS: Found @ offset 1c96c0 size 3f798
1984 01:49:54.445334 call enable_fixed_mtrr()
1985 01:49:54.448507 Checking segment from ROM address 0xffdd16f8
1986 01:49:54.452076 CPU physical address size: 39 bits
1987 01:49:54.458353 Checking segment from ROM address 0xffdd1714
1988 01:49:54.462321 Loading segment from ROM address 0xffdd16f8
1989 01:49:54.465055 code (compression=0)
1990 01:49:54.471601 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1991 01:49:54.482080 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1992 01:49:54.484832 it's not compressed!
1993 01:49:54.575757 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1994 01:49:54.582327 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1995 01:49:54.585802 Loading segment from ROM address 0xffdd1714
1996 01:49:54.589132 Entry Point 0x30000000
1997 01:49:54.592239 Loaded segments
1998 01:49:54.597637 Finalizing chipset.
1999 01:49:54.601063 Finalizing SMM.
2000 01:49:54.604403 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2001 01:49:54.607462 mp_park_aps done after 0 msecs.
2002 01:49:54.613822 Jumping to boot code at 30000000(99b62000)
2003 01:49:54.620699 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2004 01:49:54.620949
2005 01:49:54.621131
2006 01:49:54.621301
2007 01:49:54.624037 Starting depthcharge on Helios...
2008 01:49:54.624266
2009 01:49:54.624945 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2010 01:49:54.625221 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2011 01:49:54.625510 Setting prompt string to ['hatch:']
2012 01:49:54.625736 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2013 01:49:54.633834 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2014 01:49:54.634079
2015 01:49:54.640816 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2016 01:49:54.641045
2017 01:49:54.647209 board_setup: Info: eMMC controller not present; skipping
2018 01:49:54.647436
2019 01:49:54.650413 New NVMe Controller 0x30053ac0 @ 00:1d:00
2020 01:49:54.650642
2021 01:49:54.656784 board_setup: Info: SDHCI controller not present; skipping
2022 01:49:54.657012
2023 01:49:54.660215 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2024 01:49:54.663606
2025 01:49:54.663830 Wipe memory regions:
2026 01:49:54.664031
2027 01:49:54.666687 [0x00000000001000, 0x000000000a0000)
2028 01:49:54.667010
2029 01:49:54.670377 [0x00000000100000, 0x00000030000000)
2030 01:49:54.736633
2031 01:49:54.739732 [0x00000030657430, 0x00000099a2c000)
2032 01:49:54.886740
2033 01:49:54.889522 [0x00000100000000, 0x0000045e800000)
2034 01:49:56.346036
2035 01:49:56.346178 R8152: Initializing
2036 01:49:56.346257
2037 01:49:56.348805 Version 9 (ocp_data = 6010)
2038 01:49:56.353072
2039 01:49:56.353162 R8152: Done initializing
2040 01:49:56.353241
2041 01:49:56.356507 Adding net device
2042 01:49:56.839511
2043 01:49:56.839655 R8152: Initializing
2044 01:49:56.839754
2045 01:49:56.842366 Version 6 (ocp_data = 5c30)
2046 01:49:56.842447
2047 01:49:56.845761 R8152: Done initializing
2048 01:49:56.845842
2049 01:49:56.849077 net_add_device: Attemp to include the same device
2050 01:49:56.852765
2051 01:49:56.859680 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2052 01:49:56.859778
2053 01:49:56.859851
2054 01:49:56.859927
2055 01:49:56.860253 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2057 01:49:56.960573 hatch: tftpboot 192.168.201.1 11733056/tftp-deploy-gbr9dmx9/kernel/bzImage 11733056/tftp-deploy-gbr9dmx9/kernel/cmdline 11733056/tftp-deploy-gbr9dmx9/ramdisk/ramdisk.cpio.gz
2058 01:49:56.960738 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2059 01:49:56.960836 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2060 01:49:56.965128 tftpboot 192.168.201.1 11733056/tftp-deploy-gbr9dmx9/kernel/bzImloy-gbr9dmx9/kernel/cmdline 11733056/tftp-deploy-gbr9dmx9/ramdisk/ramdisk.cpio.gz
2061 01:49:56.965221
2062 01:49:56.965294 Waiting for link
2063 01:49:57.166236
2064 01:49:57.166421 done.
2065 01:49:57.166540
2066 01:49:57.166650 MAC: 00:24:32:50:1a:59
2067 01:49:57.166762
2068 01:49:57.169073 Sending DHCP discover... done.
2069 01:49:57.169190
2070 01:49:57.172486 Waiting for reply... done.
2071 01:49:57.172577
2072 01:49:57.175857 Sending DHCP request... done.
2073 01:49:57.175979
2074 01:49:57.179173 Waiting for reply... done.
2075 01:49:57.179289
2076 01:49:57.182569 My ip is 192.168.201.14
2077 01:49:57.182696
2078 01:49:57.185921 The DHCP server ip is 192.168.201.1
2079 01:49:57.186036
2080 01:49:57.192635 TFTP server IP predefined by user: 192.168.201.1
2081 01:49:57.192726
2082 01:49:57.199127 Bootfile predefined by user: 11733056/tftp-deploy-gbr9dmx9/kernel/bzImage
2083 01:49:57.199250
2084 01:49:57.202338 Sending tftp read request... done.
2085 01:49:57.202461
2086 01:49:57.205554 Waiting for the transfer...
2087 01:49:57.205680
2088 01:49:57.725678 00000000 ################################################################
2089 01:49:57.725863
2090 01:49:58.240762 00080000 ################################################################
2091 01:49:58.240925
2092 01:49:58.753888 00100000 ################################################################
2093 01:49:58.754050
2094 01:49:59.263549 00180000 ################################################################
2095 01:49:59.263746
2096 01:49:59.773663 00200000 ################################################################
2097 01:49:59.773814
2098 01:50:00.287029 00280000 ################################################################
2099 01:50:00.287176
2100 01:50:00.803086 00300000 ################################################################
2101 01:50:00.803261
2102 01:50:01.322818 00380000 ################################################################
2103 01:50:01.322996
2104 01:50:01.848196 00400000 ################################################################
2105 01:50:01.848358
2106 01:50:02.368503 00480000 ################################################################
2107 01:50:02.368651
2108 01:50:02.900330 00500000 ################################################################
2109 01:50:02.900502
2110 01:50:03.426671 00580000 ################################################################
2111 01:50:03.426848
2112 01:50:03.951273 00600000 ################################################################
2113 01:50:03.951447
2114 01:50:04.482401 00680000 ################################################################
2115 01:50:04.482555
2116 01:50:05.000149 00700000 ################################################################
2117 01:50:05.000292
2118 01:50:05.511867 00780000 ################################################################
2119 01:50:05.512068
2120 01:50:06.020955 00800000 ################################################################
2121 01:50:06.021097
2122 01:50:06.530029 00880000 ################################################################
2123 01:50:06.530191
2124 01:50:07.042812 00900000 ################################################################
2125 01:50:07.042970
2126 01:50:07.568246 00980000 ################################################################
2127 01:50:07.568409
2128 01:50:08.095211 00a00000 ################################################################
2129 01:50:08.095373
2130 01:50:08.555110 00a80000 ######################################################### done.
2131 01:50:08.555286
2132 01:50:08.558226 The bootfile was 11473408 bytes long.
2133 01:50:08.558317
2134 01:50:08.561376 Sending tftp read request... done.
2135 01:50:08.561464
2136 01:50:08.565016 Waiting for the transfer...
2137 01:50:08.565110
2138 01:50:09.097815 00000000 ################################################################
2139 01:50:09.097973
2140 01:50:09.646674 00080000 ################################################################
2141 01:50:09.646822
2142 01:50:10.181825 00100000 ################################################################
2143 01:50:10.181975
2144 01:50:10.720639 00180000 ################################################################
2145 01:50:10.720793
2146 01:50:11.259877 00200000 ################################################################
2147 01:50:11.260030
2148 01:50:11.810602 00280000 ################################################################
2149 01:50:11.810751
2150 01:50:12.380666 00300000 ################################################################
2151 01:50:12.380815
2152 01:50:12.950493 00380000 ################################################################
2153 01:50:12.950637
2154 01:50:13.484213 00400000 ################################################################
2155 01:50:13.484360
2156 01:50:14.017150 00480000 ################################################################
2157 01:50:14.017328
2158 01:50:14.544149 00500000 ################################################################
2159 01:50:14.544342
2160 01:50:15.075436 00580000 ################################################################
2161 01:50:15.075581
2162 01:50:15.187544 00600000 ############# done.
2163 01:50:15.187697
2164 01:50:15.190740 Sending tftp read request... done.
2165 01:50:15.190833
2166 01:50:15.193938 Waiting for the transfer...
2167 01:50:15.194031
2168 01:50:15.194103 00000000 # done.
2169 01:50:15.194172
2170 01:50:15.203954 Command line loaded dynamically from TFTP file: 11733056/tftp-deploy-gbr9dmx9/kernel/cmdline
2171 01:50:15.204067
2172 01:50:15.233898 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11733056/extract-nfsrootfs-gk6ywm2_,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2173 01:50:15.234007
2174 01:50:15.236773 ec_init(0): CrosEC protocol v3 supported (256, 256)
2175 01:50:15.243649
2176 01:50:15.247138 Shutting down all USB controllers.
2177 01:50:15.247233
2178 01:50:15.247329 Removing current net device
2179 01:50:15.251039
2180 01:50:15.251133 Finalizing coreboot
2181 01:50:15.251248
2182 01:50:15.257749 Exiting depthcharge with code 4 at timestamp: 27974442
2183 01:50:15.257872
2184 01:50:15.257975
2185 01:50:15.258065 Starting kernel ...
2186 01:50:15.258152
2187 01:50:15.258260
2188 01:50:15.258931 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2189 01:50:15.259079 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2190 01:50:15.259202 Setting prompt string to ['Linux version [0-9]']
2191 01:50:15.259317 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2192 01:50:15.259412 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2194 01:54:36.259320 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2196 01:54:36.259678 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2198 01:54:36.260012 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2201 01:54:36.260488 end: 2 depthcharge-action (duration 00:05:00) [common]
2203 01:54:36.260756 Cleaning after the job
2204 01:54:36.260857 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11733056/tftp-deploy-gbr9dmx9/ramdisk
2205 01:54:36.262107 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11733056/tftp-deploy-gbr9dmx9/kernel
2206 01:54:36.263961 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11733056/tftp-deploy-gbr9dmx9/nfsrootfs
2207 01:54:36.401498 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11733056/tftp-deploy-gbr9dmx9/modules
2208 01:54:36.402513 start: 4.1 power-off (timeout 00:00:30) [common]
2209 01:54:36.402737 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2210 01:54:36.481761 >> Command sent successfully.
2211 01:54:36.484649 Returned 0 in 0 seconds
2212 01:54:36.585059 end: 4.1 power-off (duration 00:00:00) [common]
2214 01:54:36.585472 start: 4.2 read-feedback (timeout 00:10:00) [common]
2215 01:54:36.585777 Listened to connection for namespace 'common' for up to 1s
2217 01:54:36.586208 Listened to connection for namespace 'common' for up to 1s
2218 01:54:37.586700 Finalising connection for namespace 'common'
2219 01:54:37.586908 Disconnecting from shell: Finalise
2220 01:54:37.587050
2221 01:54:37.687441 end: 4.2 read-feedback (duration 00:00:01) [common]
2222 01:54:37.687632 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11733056
2223 01:54:38.291685 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11733056
2224 01:54:38.291906 JobError: Your job cannot terminate cleanly.