Boot log: acer-cbv514-1h-34uz-brya
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 12:22:59.655115 lava-dispatcher, installed at version: 2023.10
2 12:22:59.655325 start: 0 validate
3 12:22:59.655434 Start time: 2023-11-08 12:22:59.655428+00:00 (UTC)
4 12:22:59.655551 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:22:59.655660 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 12:22:59.917493 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:22:59.918104 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.297-cip104-63-ge7301d2e196ae%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:23:00.186492 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:23:00.187166 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.297-cip104-63-ge7301d2e196ae%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 12:23:15.047769 validate duration: 15.39
12 12:23:15.048014 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:23:15.048102 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:23:15.048175 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:23:15.048283 Not decompressing ramdisk as can be used compressed.
16 12:23:15.048356 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 12:23:15.048408 saving as /var/lib/lava/dispatcher/tmp/11967719/tftp-deploy-0t6o1658/ramdisk/rootfs.cpio.gz
18 12:23:15.048459 total size: 8418130 (8 MB)
19 12:23:16.108086 progress 0 % (0 MB)
20 12:23:16.113323 progress 5 % (0 MB)
21 12:23:16.115051 progress 10 % (0 MB)
22 12:23:16.116645 progress 15 % (1 MB)
23 12:23:16.118211 progress 20 % (1 MB)
24 12:23:16.119773 progress 25 % (2 MB)
25 12:23:16.121293 progress 30 % (2 MB)
26 12:23:16.122708 progress 35 % (2 MB)
27 12:23:16.124273 progress 40 % (3 MB)
28 12:23:16.125794 progress 45 % (3 MB)
29 12:23:16.127368 progress 50 % (4 MB)
30 12:23:16.128881 progress 55 % (4 MB)
31 12:23:16.130409 progress 60 % (4 MB)
32 12:23:16.131826 progress 65 % (5 MB)
33 12:23:16.133317 progress 70 % (5 MB)
34 12:23:16.134800 progress 75 % (6 MB)
35 12:23:16.136319 progress 80 % (6 MB)
36 12:23:16.137827 progress 85 % (6 MB)
37 12:23:16.139390 progress 90 % (7 MB)
38 12:23:16.140909 progress 95 % (7 MB)
39 12:23:16.142316 progress 100 % (8 MB)
40 12:23:16.142482 8 MB downloaded in 1.09 s (7.34 MB/s)
41 12:23:16.142611 end: 1.1.1 http-download (duration 00:00:01) [common]
43 12:23:16.142802 end: 1.1 download-retry (duration 00:00:01) [common]
44 12:23:16.142869 start: 1.2 download-retry (timeout 00:09:59) [common]
45 12:23:16.142932 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 12:23:16.143047 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.297-cip104-63-ge7301d2e196ae/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 12:23:16.143107 saving as /var/lib/lava/dispatcher/tmp/11967719/tftp-deploy-0t6o1658/kernel/bzImage
48 12:23:16.143177 total size: 11571200 (11 MB)
49 12:23:16.143240 No compression specified
50 12:23:16.144279 progress 0 % (0 MB)
51 12:23:16.146411 progress 5 % (0 MB)
52 12:23:16.148564 progress 10 % (1 MB)
53 12:23:16.150635 progress 15 % (1 MB)
54 12:23:16.152794 progress 20 % (2 MB)
55 12:23:16.154931 progress 25 % (2 MB)
56 12:23:16.156952 progress 30 % (3 MB)
57 12:23:16.159042 progress 35 % (3 MB)
58 12:23:16.161171 progress 40 % (4 MB)
59 12:23:16.163171 progress 45 % (4 MB)
60 12:23:16.165267 progress 50 % (5 MB)
61 12:23:16.167401 progress 55 % (6 MB)
62 12:23:16.169387 progress 60 % (6 MB)
63 12:23:16.171553 progress 65 % (7 MB)
64 12:23:16.173618 progress 70 % (7 MB)
65 12:23:16.175591 progress 75 % (8 MB)
66 12:23:16.177631 progress 80 % (8 MB)
67 12:23:16.179702 progress 85 % (9 MB)
68 12:23:16.181739 progress 90 % (9 MB)
69 12:23:16.183866 progress 95 % (10 MB)
70 12:23:16.185947 progress 100 % (11 MB)
71 12:23:16.186039 11 MB downloaded in 0.04 s (257.48 MB/s)
72 12:23:16.186163 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:23:16.186349 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:23:16.186418 start: 1.3 download-retry (timeout 00:09:59) [common]
76 12:23:16.186484 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 12:23:16.186588 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.297-cip104-63-ge7301d2e196ae/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 12:23:16.186648 saving as /var/lib/lava/dispatcher/tmp/11967719/tftp-deploy-0t6o1658/modules/modules.tar
79 12:23:16.186694 total size: 483720 (0 MB)
80 12:23:16.186742 Using unxz to decompress xz
81 12:23:16.190301 progress 6 % (0 MB)
82 12:23:16.190603 progress 13 % (0 MB)
83 12:23:16.190792 progress 20 % (0 MB)
84 12:23:16.192448 progress 27 % (0 MB)
85 12:23:16.194141 progress 33 % (0 MB)
86 12:23:16.195814 progress 40 % (0 MB)
87 12:23:16.197467 progress 47 % (0 MB)
88 12:23:16.199101 progress 54 % (0 MB)
89 12:23:16.200816 progress 60 % (0 MB)
90 12:23:16.202531 progress 67 % (0 MB)
91 12:23:16.204264 progress 74 % (0 MB)
92 12:23:16.205990 progress 81 % (0 MB)
93 12:23:16.207641 progress 88 % (0 MB)
94 12:23:16.209368 progress 94 % (0 MB)
95 12:23:16.211508 progress 100 % (0 MB)
96 12:23:16.217028 0 MB downloaded in 0.03 s (15.21 MB/s)
97 12:23:16.217227 end: 1.3.1 http-download (duration 00:00:00) [common]
99 12:23:16.217452 end: 1.3 download-retry (duration 00:00:00) [common]
100 12:23:16.217527 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
101 12:23:16.217600 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
102 12:23:16.217664 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 12:23:16.217729 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
104 12:23:16.217911 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11967719/lava-overlay-gpi72b_c
105 12:23:16.218017 makedir: /var/lib/lava/dispatcher/tmp/11967719/lava-overlay-gpi72b_c/lava-11967719/bin
106 12:23:16.218105 makedir: /var/lib/lava/dispatcher/tmp/11967719/lava-overlay-gpi72b_c/lava-11967719/tests
107 12:23:16.218185 makedir: /var/lib/lava/dispatcher/tmp/11967719/lava-overlay-gpi72b_c/lava-11967719/results
108 12:23:16.218288 Creating /var/lib/lava/dispatcher/tmp/11967719/lava-overlay-gpi72b_c/lava-11967719/bin/lava-add-keys
109 12:23:16.218435 Creating /var/lib/lava/dispatcher/tmp/11967719/lava-overlay-gpi72b_c/lava-11967719/bin/lava-add-sources
110 12:23:16.218535 Creating /var/lib/lava/dispatcher/tmp/11967719/lava-overlay-gpi72b_c/lava-11967719/bin/lava-background-process-start
111 12:23:16.218630 Creating /var/lib/lava/dispatcher/tmp/11967719/lava-overlay-gpi72b_c/lava-11967719/bin/lava-background-process-stop
112 12:23:16.218723 Creating /var/lib/lava/dispatcher/tmp/11967719/lava-overlay-gpi72b_c/lava-11967719/bin/lava-common-functions
113 12:23:16.218814 Creating /var/lib/lava/dispatcher/tmp/11967719/lava-overlay-gpi72b_c/lava-11967719/bin/lava-echo-ipv4
114 12:23:16.218906 Creating /var/lib/lava/dispatcher/tmp/11967719/lava-overlay-gpi72b_c/lava-11967719/bin/lava-install-packages
115 12:23:16.218998 Creating /var/lib/lava/dispatcher/tmp/11967719/lava-overlay-gpi72b_c/lava-11967719/bin/lava-installed-packages
116 12:23:16.219089 Creating /var/lib/lava/dispatcher/tmp/11967719/lava-overlay-gpi72b_c/lava-11967719/bin/lava-os-build
117 12:23:16.219224 Creating /var/lib/lava/dispatcher/tmp/11967719/lava-overlay-gpi72b_c/lava-11967719/bin/lava-probe-channel
118 12:23:16.219317 Creating /var/lib/lava/dispatcher/tmp/11967719/lava-overlay-gpi72b_c/lava-11967719/bin/lava-probe-ip
119 12:23:16.219410 Creating /var/lib/lava/dispatcher/tmp/11967719/lava-overlay-gpi72b_c/lava-11967719/bin/lava-target-ip
120 12:23:16.219501 Creating /var/lib/lava/dispatcher/tmp/11967719/lava-overlay-gpi72b_c/lava-11967719/bin/lava-target-mac
121 12:23:16.219592 Creating /var/lib/lava/dispatcher/tmp/11967719/lava-overlay-gpi72b_c/lava-11967719/bin/lava-target-storage
122 12:23:16.219689 Creating /var/lib/lava/dispatcher/tmp/11967719/lava-overlay-gpi72b_c/lava-11967719/bin/lava-test-case
123 12:23:16.219781 Creating /var/lib/lava/dispatcher/tmp/11967719/lava-overlay-gpi72b_c/lava-11967719/bin/lava-test-event
124 12:23:16.219871 Creating /var/lib/lava/dispatcher/tmp/11967719/lava-overlay-gpi72b_c/lava-11967719/bin/lava-test-feedback
125 12:23:16.219960 Creating /var/lib/lava/dispatcher/tmp/11967719/lava-overlay-gpi72b_c/lava-11967719/bin/lava-test-raise
126 12:23:16.220054 Creating /var/lib/lava/dispatcher/tmp/11967719/lava-overlay-gpi72b_c/lava-11967719/bin/lava-test-reference
127 12:23:16.220147 Creating /var/lib/lava/dispatcher/tmp/11967719/lava-overlay-gpi72b_c/lava-11967719/bin/lava-test-runner
128 12:23:16.220238 Creating /var/lib/lava/dispatcher/tmp/11967719/lava-overlay-gpi72b_c/lava-11967719/bin/lava-test-set
129 12:23:16.220330 Creating /var/lib/lava/dispatcher/tmp/11967719/lava-overlay-gpi72b_c/lava-11967719/bin/lava-test-shell
130 12:23:16.220425 Updating /var/lib/lava/dispatcher/tmp/11967719/lava-overlay-gpi72b_c/lava-11967719/bin/lava-install-packages (oe)
131 12:23:16.220545 Updating /var/lib/lava/dispatcher/tmp/11967719/lava-overlay-gpi72b_c/lava-11967719/bin/lava-installed-packages (oe)
132 12:23:16.220637 Creating /var/lib/lava/dispatcher/tmp/11967719/lava-overlay-gpi72b_c/lava-11967719/environment
133 12:23:16.220716 LAVA metadata
134 12:23:16.220776 - LAVA_JOB_ID=11967719
135 12:23:16.220828 - LAVA_DISPATCHER_IP=192.168.201.1
136 12:23:16.220912 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
137 12:23:16.220969 skipped lava-vland-overlay
138 12:23:16.221026 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 12:23:16.221089 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
140 12:23:16.221138 skipped lava-multinode-overlay
141 12:23:16.221193 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 12:23:16.221256 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
143 12:23:16.221316 Loading test definitions
144 12:23:16.221388 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
145 12:23:16.221446 Using /lava-11967719 at stage 0
146 12:23:16.221682 uuid=11967719_1.4.2.3.1 testdef=None
147 12:23:16.221750 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 12:23:16.221813 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
149 12:23:16.222233 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 12:23:16.222509 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
152 12:23:16.223026 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 12:23:16.223230 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
155 12:23:16.223708 runner path: /var/lib/lava/dispatcher/tmp/11967719/lava-overlay-gpi72b_c/lava-11967719/0/tests/0_dmesg test_uuid 11967719_1.4.2.3.1
156 12:23:16.223824 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 12:23:16.224001 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
159 12:23:16.224056 Using /lava-11967719 at stage 1
160 12:23:16.224284 uuid=11967719_1.4.2.3.5 testdef=None
161 12:23:16.224354 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 12:23:16.224420 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
163 12:23:16.224783 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 12:23:16.224951 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
166 12:23:16.225459 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 12:23:16.225645 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
169 12:23:16.226180 runner path: /var/lib/lava/dispatcher/tmp/11967719/lava-overlay-gpi72b_c/lava-11967719/1/tests/1_bootrr test_uuid 11967719_1.4.2.3.5
170 12:23:16.226305 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 12:23:16.226474 Creating lava-test-runner.conf files
173 12:23:16.226522 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11967719/lava-overlay-gpi72b_c/lava-11967719/0 for stage 0
174 12:23:16.226589 - 0_dmesg
175 12:23:16.226653 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11967719/lava-overlay-gpi72b_c/lava-11967719/1 for stage 1
176 12:23:16.226723 - 1_bootrr
177 12:23:16.226797 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 12:23:16.226865 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
179 12:23:16.233498 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 12:23:16.233590 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
181 12:23:16.233665 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 12:23:16.233734 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 12:23:16.233802 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
184 12:23:16.399949 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 12:23:16.400220 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
186 12:23:16.400319 extracting modules file /var/lib/lava/dispatcher/tmp/11967719/tftp-deploy-0t6o1658/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11967719/extract-overlay-ramdisk-6q3qu2vg/ramdisk
187 12:23:16.414205 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 12:23:16.414323 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
189 12:23:16.414411 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11967719/compress-overlay-amdhqc62/overlay-1.4.2.4.tar.gz to ramdisk
190 12:23:16.414468 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11967719/compress-overlay-amdhqc62/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11967719/extract-overlay-ramdisk-6q3qu2vg/ramdisk
191 12:23:16.420335 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 12:23:16.420428 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
193 12:23:16.420500 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 12:23:16.420569 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
195 12:23:16.420629 Building ramdisk /var/lib/lava/dispatcher/tmp/11967719/extract-overlay-ramdisk-6q3qu2vg/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11967719/extract-overlay-ramdisk-6q3qu2vg/ramdisk
196 12:23:16.490133 >> 53982 blocks
197 12:23:17.278603 rename /var/lib/lava/dispatcher/tmp/11967719/extract-overlay-ramdisk-6q3qu2vg/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11967719/tftp-deploy-0t6o1658/ramdisk/ramdisk.cpio.gz
198 12:23:17.278942 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 12:23:17.279055 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 12:23:17.279145 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 12:23:17.279223 No mkimage arch provided, not using FIT.
202 12:23:17.279292 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 12:23:17.279356 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 12:23:17.279434 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 12:23:17.279506 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 12:23:17.279569 No LXC device requested
207 12:23:17.279635 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 12:23:17.279706 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 12:23:17.279771 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 12:23:17.279830 Checking files for TFTP limit of 4294967296 bytes.
211 12:23:17.280153 end: 1 tftp-deploy (duration 00:00:02) [common]
212 12:23:17.280237 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 12:23:17.280307 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 12:23:17.280402 substitutions:
215 12:23:17.280454 - {DTB}: None
216 12:23:17.280502 - {INITRD}: 11967719/tftp-deploy-0t6o1658/ramdisk/ramdisk.cpio.gz
217 12:23:17.280547 - {KERNEL}: 11967719/tftp-deploy-0t6o1658/kernel/bzImage
218 12:23:17.280591 - {LAVA_MAC}: None
219 12:23:17.280634 - {PRESEED_CONFIG}: None
220 12:23:17.280678 - {PRESEED_LOCAL}: None
221 12:23:17.280721 - {RAMDISK}: 11967719/tftp-deploy-0t6o1658/ramdisk/ramdisk.cpio.gz
222 12:23:17.280764 - {ROOT_PART}: None
223 12:23:17.280806 - {ROOT}: None
224 12:23:17.280849 - {SERVER_IP}: 192.168.201.1
225 12:23:17.280892 - {TEE}: None
226 12:23:17.280935 Parsed boot commands:
227 12:23:17.280978 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 12:23:17.281117 Parsed boot commands: tftpboot 192.168.201.1 11967719/tftp-deploy-0t6o1658/kernel/bzImage 11967719/tftp-deploy-0t6o1658/kernel/cmdline 11967719/tftp-deploy-0t6o1658/ramdisk/ramdisk.cpio.gz
229 12:23:17.281193 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 12:23:17.281261 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 12:23:17.281333 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 12:23:17.281400 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 12:23:17.281454 Not connected, no need to disconnect.
234 12:23:17.281511 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 12:23:17.281573 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 12:23:17.281625 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-1'
237 12:23:17.284601 Setting prompt string to ['lava-test: # ']
238 12:23:17.284864 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 12:23:17.284950 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 12:23:17.285029 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 12:23:17.285099 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 12:23:17.285250 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-1' '--port=1' '--command=reboot'
243 12:23:22.418674 >> Command sent successfully.
244 12:23:22.420862 Returned 0 in 5 seconds
245 12:23:22.521260 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 12:23:22.521681 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 12:23:22.521803 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 12:23:22.521908 Setting prompt string to 'Starting depthcharge on Volmar...'
250 12:23:22.521993 Changing prompt to 'Starting depthcharge on Volmar...'
251 12:23:22.522076 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
252 12:23:22.522402 [Enter `^Ec?' for help]
253 12:23:23.896642
254 12:23:23.896793
255 12:23:23.903995 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
256 12:23:23.907679 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
257 12:23:23.911542 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
258 12:23:23.918662 CPU: AES supported, TXT NOT supported, VT supported
259 12:23:23.926456 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
260 12:23:23.926531 Cache size = 10 MiB
261 12:23:23.933659 MCH: device id 4609 (rev 04) is Alderlake-P
262 12:23:23.937195 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
263 12:23:23.940684 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
264 12:23:23.944262 VBOOT: Loading verstage.
265 12:23:23.948241 FMAP: Found "FLASH" version 1.1 at 0x1804000.
266 12:23:23.954649 FMAP: base = 0x0 size = 0x2000000 #areas = 37
267 12:23:23.958040 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
268 12:23:23.968618 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
269 12:23:23.974799 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
270 12:23:23.974885
271 12:23:23.974939
272 12:23:23.984762 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
273 12:23:23.992461 Probing TPM I2C: I2C bus 1 version 0x3230302a
274 12:23:23.995641 DW I2C bus 1 at 0xfe022000 (400 KHz)
275 12:23:23.995764 done! DID_VID 0x00281ae0
276 12:23:23.999317 TPM ready after 0 ms
277 12:23:24.002873 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
278 12:23:24.016235 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
279 12:23:24.022569 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
280 12:23:24.107768 tlcl_send_startup: Startup return code is 0
281 12:23:24.107923 TPM: setup succeeded
282 12:23:24.128376 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
283 12:23:24.149058 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
284 12:23:24.153246 Chrome EC: UHEPI supported
285 12:23:24.156602 Reading cr50 boot mode
286 12:23:24.171268 Cr50 says boot_mode is VERIFIED_RW(0x00).
287 12:23:24.171344 Phase 1
288 12:23:24.175140 FMAP: area GBB found @ 1805000 (458752 bytes)
289 12:23:24.184951 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
290 12:23:24.191228 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
291 12:23:24.198506 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
292 12:23:24.198583 Phase 2
293 12:23:24.201611 Phase 3
294 12:23:24.205116 FMAP: area GBB found @ 1805000 (458752 bytes)
295 12:23:24.211996 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
296 12:23:24.215573 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
297 12:23:24.222168 VB2:vb2_verify_keyblock() Checking keyblock signature...
298 12:23:24.229527 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
299 12:23:24.236558 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
300 12:23:24.243136 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
301 12:23:24.256508 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
302 12:23:24.259182 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
303 12:23:24.266017 VB2:vb2_verify_fw_preamble() Verifying preamble.
304 12:23:24.273275 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
305 12:23:24.279497 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
306 12:23:24.286173 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
307 12:23:24.290168 Phase 4
308 12:23:24.293439 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
309 12:23:24.299852 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
310 12:23:24.512585 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
311 12:23:24.519133 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
312 12:23:24.522520 Saving vboot hash.
313 12:23:24.528968 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
314 12:23:24.545239 tlcl_extend: response is 0
315 12:23:24.552225 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
316 12:23:24.558438 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
317 12:23:24.574256 tlcl_extend: response is 0
318 12:23:24.581386 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
319 12:23:24.601028 tlcl_lock_nv_write: response is 0
320 12:23:24.620271 tlcl_lock_nv_write: response is 0
321 12:23:24.620679 Slot A is selected
322 12:23:24.626586 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
323 12:23:24.633878 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
324 12:23:24.639905 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
325 12:23:24.646765 BS: verstage times (exec / console): total (unknown) / 256 ms
326 12:23:24.647267
327 12:23:24.647559
328 12:23:24.653840 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
329 12:23:24.657978 Google Chrome EC: version:
330 12:23:24.661328 ro: volmar_v2.0.14126-e605144e9c
331 12:23:24.664747 rw: volmar_v0.0.55-22d1557
332 12:23:24.668471 running image: 2
333 12:23:24.671178 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
334 12:23:24.681193 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
335 12:23:24.688044 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
336 12:23:24.694755 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
337 12:23:24.704473 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
338 12:23:24.714338 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
339 12:23:24.717868 EC took 1016us to calculate image hash
340 12:23:24.727528 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
341 12:23:24.734219 VB2:sync_ec() select_rw=RW(active)
342 12:23:24.742811 Waited 270us to clear limit power flag.
343 12:23:24.745839 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
344 12:23:24.749459 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
345 12:23:24.752848 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
346 12:23:24.759927 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
347 12:23:24.764705 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
348 12:23:24.765675 TCO_STS: 0000 0000
349 12:23:24.768919 GEN_PMCON: d0015038 00002200
350 12:23:24.772575 GBLRST_CAUSE: 00000000 00000000
351 12:23:24.772892 HPR_CAUSE0: 00000000
352 12:23:24.775757 prev_sleep_state 5
353 12:23:24.779604 Abort disabling TXT, as CPU is not TXT capable.
354 12:23:24.787395 cse_lite: Number of partitions = 3
355 12:23:24.790601 cse_lite: Current partition = RO
356 12:23:24.791053 cse_lite: Next partition = RO
357 12:23:24.793760 cse_lite: Flags = 0x7
358 12:23:24.800702 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
359 12:23:24.810479 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
360 12:23:24.813616 FMAP: area SI_ME found @ 1000 (5238784 bytes)
361 12:23:24.819990 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
362 12:23:24.826941 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
363 12:23:24.833672 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
364 12:23:24.836895 cse_lite: CSE CBFS RW version : 16.1.25.2049
365 12:23:24.843581 cse_lite: Set Boot Partition Info Command (RW)
366 12:23:24.846705 HECI: Global Reset(Type:1) Command
367 12:23:26.271066
368 12:23:26.274364 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
369 12:23:26.281008 CPU: AES supported, TXT NOT supported, VT supported
370 12:23:26.287637 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
371 12:23:26.290986 Cache size = 10 MiB
372 12:23:26.294613 MCH: device id 4609 (rev 04) is Alderlake-P
373 12:23:26.297574 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
374 12:23:26.304130 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
375 12:23:26.307955 VBOOT: Loading verstage.
376 12:23:26.311743 FMAP: Found "FLASH" version 1.1 at 0x1804000.
377 12:23:26.314730 FMAP: base = 0x0 size = 0x2000000 #areas = 37
378 12:23:26.322317 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
379 12:23:26.328989 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
380 12:23:26.335442 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
381 12:23:26.339732
382 12:23:26.340219
383 12:23:26.346028 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
384 12:23:26.352996 Probing TPM I2C: I2C bus 1 version 0x3230302a
385 12:23:26.356293 DW I2C bus 1 at 0xfe022000 (400 KHz)
386 12:23:26.359716 done! DID_VID 0x00281ae0
387 12:23:26.363096 TPM ready after 0 ms
388 12:23:26.366615 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
389 12:23:26.375090 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
390 12:23:26.382689 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
391 12:23:26.470278 tlcl_send_startup: Startup return code is 0
392 12:23:26.470718 TPM: setup succeeded
393 12:23:26.491821 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
394 12:23:26.513981 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
395 12:23:26.517694 Chrome EC: UHEPI supported
396 12:23:26.520678 Reading cr50 boot mode
397 12:23:26.536049 Cr50 says boot_mode is VERIFIED_RW(0x00).
398 12:23:26.536548 Phase 1
399 12:23:26.542380 FMAP: area GBB found @ 1805000 (458752 bytes)
400 12:23:26.548894 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
401 12:23:26.556251 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
402 12:23:26.562088 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
403 12:23:26.565193 Phase 2
404 12:23:26.565547 Phase 3
405 12:23:26.568332 FMAP: area GBB found @ 1805000 (458752 bytes)
406 12:23:26.575234 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
407 12:23:26.578570 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
408 12:23:26.585535 VB2:vb2_verify_keyblock() Checking keyblock signature...
409 12:23:26.591910 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
410 12:23:26.598294 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
411 12:23:26.608703 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
412 12:23:26.620711 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
413 12:23:26.624120 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
414 12:23:26.630992 VB2:vb2_verify_fw_preamble() Verifying preamble.
415 12:23:26.637279 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
416 12:23:26.643569 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
417 12:23:26.650438 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
418 12:23:26.654715 Phase 4
419 12:23:26.658126 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
420 12:23:26.664785 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
421 12:23:26.877341 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
422 12:23:26.883774 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
423 12:23:26.887559 Saving vboot hash.
424 12:23:26.893761 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
425 12:23:26.910231 tlcl_extend: response is 0
426 12:23:26.916612 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
427 12:23:26.922884 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
428 12:23:26.937661 tlcl_extend: response is 0
429 12:23:26.944090 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
430 12:23:26.963716 tlcl_lock_nv_write: response is 0
431 12:23:26.983500 tlcl_lock_nv_write: response is 0
432 12:23:26.983990 Slot A is selected
433 12:23:26.989876 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
434 12:23:26.996077 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
435 12:23:27.003173 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
436 12:23:27.010005 BS: verstage times (exec / console): total (unknown) / 256 ms
437 12:23:27.010495
438 12:23:27.010776
439 12:23:27.016436 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
440 12:23:27.020388 Google Chrome EC: version:
441 12:23:27.023542 ro: volmar_v2.0.14126-e605144e9c
442 12:23:27.026871 rw: volmar_v0.0.55-22d1557
443 12:23:27.030227 running image: 2
444 12:23:27.034022 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
445 12:23:27.043897 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
446 12:23:27.050717 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
447 12:23:27.057886 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
448 12:23:27.064816 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
449 12:23:27.078136 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
450 12:23:27.081242 EC took 1003us to calculate image hash
451 12:23:27.091317 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
452 12:23:27.094326 VB2:sync_ec() select_rw=RW(active)
453 12:23:27.106158 Waited 269us to clear limit power flag.
454 12:23:27.109328 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
455 12:23:27.113178 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
456 12:23:27.115931 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
457 12:23:27.123008 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
458 12:23:27.126114 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
459 12:23:27.129276 TCO_STS: 0000 0000
460 12:23:27.132387 GEN_PMCON: d1001038 00002200
461 12:23:27.132820 GBLRST_CAUSE: 00000040 00000000
462 12:23:27.135972 HPR_CAUSE0: 00000000
463 12:23:27.139204 prev_sleep_state 5
464 12:23:27.142857 Abort disabling TXT, as CPU is not TXT capable.
465 12:23:27.151106 cse_lite: Number of partitions = 3
466 12:23:27.154330 cse_lite: Current partition = RW
467 12:23:27.154819 cse_lite: Next partition = RW
468 12:23:27.157466 cse_lite: Flags = 0x7
469 12:23:27.164250 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
470 12:23:27.173994 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
471 12:23:27.177484 FMAP: area SI_ME found @ 1000 (5238784 bytes)
472 12:23:27.183800 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
473 12:23:27.190695 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
474 12:23:27.197158 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
475 12:23:27.200826 cse_lite: CSE CBFS RW version : 16.1.25.2049
476 12:23:27.203603 Boot Count incremented to 3167
477 12:23:27.210656 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
478 12:23:27.217660 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
479 12:23:27.230055 Probing TPM I2C: done! DID_VID 0x00281ae0
480 12:23:27.233465 Locality already claimed
481 12:23:27.236748 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
482 12:23:27.256529 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
483 12:23:27.262993 MRC: Hash idx 0x100d comparison successful.
484 12:23:27.266394 MRC cache found, size f6c8
485 12:23:27.266893 bootmode is set to: 2
486 12:23:27.269775 EC returned error result code 3
487 12:23:27.273104 FW_CONFIG value from CBI is 0x131
488 12:23:27.279889 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
489 12:23:27.283057 SPD index = 0
490 12:23:27.289714 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
491 12:23:27.290194 SPD: module type is LPDDR4X
492 12:23:27.296528 SPD: module part number is K4U6E3S4AB-MGCL
493 12:23:27.303710 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
494 12:23:27.306624 SPD: device width 16 bits, bus width 16 bits
495 12:23:27.309883 SPD: module size is 1024 MB (per channel)
496 12:23:27.379071 CBMEM:
497 12:23:27.382417 IMD: root @ 0x76fff000 254 entries.
498 12:23:27.385643 IMD: root @ 0x76ffec00 62 entries.
499 12:23:27.393907 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
500 12:23:27.396664 RO_VPD is uninitialized or empty.
501 12:23:27.400396 FMAP: area RW_VPD found @ f29000 (8192 bytes)
502 12:23:27.407010 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
503 12:23:27.410061 External stage cache:
504 12:23:27.413806 IMD: root @ 0x7bbff000 254 entries.
505 12:23:27.416998 IMD: root @ 0x7bbfec00 62 entries.
506 12:23:27.423631 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
507 12:23:27.430349 MRC: Checking cached data update for 'RW_MRC_CACHE'.
508 12:23:27.433840 MRC: 'RW_MRC_CACHE' does not need update.
509 12:23:27.434353 8 DIMMs found
510 12:23:27.437004 SMM Memory Map
511 12:23:27.440295 SMRAM : 0x7b800000 0x800000
512 12:23:27.443920 Subregion 0: 0x7b800000 0x200000
513 12:23:27.446936 Subregion 1: 0x7ba00000 0x200000
514 12:23:27.450231 Subregion 2: 0x7bc00000 0x400000
515 12:23:27.453818 top_of_ram = 0x77000000
516 12:23:27.457254 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
517 12:23:27.463752 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
518 12:23:27.470843 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
519 12:23:27.473555 MTRR Range: Start=ff000000 End=0 (Size 1000000)
520 12:23:27.474012 Normal boot
521 12:23:27.483879 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
522 12:23:27.490601 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
523 12:23:27.496806 Processing 237 relocs. Offset value of 0x74ab9000
524 12:23:27.505076 BS: romstage times (exec / console): total (unknown) / 377 ms
525 12:23:27.512585
526 12:23:27.513076
527 12:23:27.518963 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
528 12:23:27.519511 Normal boot
529 12:23:27.525590 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
530 12:23:27.532483 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
531 12:23:27.538902 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
532 12:23:27.548937 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
533 12:23:27.596878 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
534 12:23:27.603345 Processing 5931 relocs. Offset value of 0x72a2f000
535 12:23:27.606664 BS: postcar times (exec / console): total (unknown) / 51 ms
536 12:23:27.610005
537 12:23:27.610551
538 12:23:27.616540 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
539 12:23:27.620308 Reserving BERT start 76a1e000, size 10000
540 12:23:27.623226 Normal boot
541 12:23:27.626544 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
542 12:23:27.634123 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
543 12:23:27.640858 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
544 12:23:27.647553 FMAP: area RW_VPD found @ f29000 (8192 bytes)
545 12:23:27.650664 Google Chrome EC: version:
546 12:23:27.654020 ro: volmar_v2.0.14126-e605144e9c
547 12:23:27.657286 rw: volmar_v0.0.55-22d1557
548 12:23:27.657779 running image: 2
549 12:23:27.660741 ACPI _SWS is PM1 Index 8 GPE Index -1
550 12:23:27.667243 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
551 12:23:27.671804 EC returned error result code 3
552 12:23:27.675589 FW_CONFIG value from CBI is 0x131
553 12:23:27.681868 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
554 12:23:27.685303 PCI: 00:1c.2 disabled by fw_config
555 12:23:27.691643 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
556 12:23:27.695590 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
557 12:23:27.701822 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
558 12:23:27.705485 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
559 12:23:27.711786 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
560 12:23:27.718269 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
561 12:23:27.724939 microcode: sig=0x906a4 pf=0x80 revision=0x423
562 12:23:27.728228 microcode: Update skipped, already up-to-date
563 12:23:27.734923 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
564 12:23:27.768285 Detected 6 core, 8 thread CPU.
565 12:23:27.771060 Setting up SMI for CPU
566 12:23:27.774331 IED base = 0x7bc00000
567 12:23:27.774682 IED size = 0x00400000
568 12:23:27.777893 Will perform SMM setup.
569 12:23:27.781375 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
570 12:23:27.784814 LAPIC 0x0 in XAPIC mode.
571 12:23:27.794956 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
572 12:23:27.797487 Processing 18 relocs. Offset value of 0x00030000
573 12:23:27.802596 Attempting to start 7 APs
574 12:23:27.806045 Waiting for 10ms after sending INIT.
575 12:23:27.818999 Waiting for SIPI to complete...
576 12:23:27.821968 done.
577 12:23:27.822437 LAPIC 0x10 in XAPIC mode.
578 12:23:27.825371 LAPIC 0x8 in XAPIC mode.
579 12:23:27.828716 LAPIC 0x9 in XAPIC mode.
580 12:23:27.832404 LAPIC 0x16 in XAPIC mode.
581 12:23:27.835463 LAPIC 0x1 in XAPIC mode.
582 12:23:27.839063 Waiting for SIPI to complete...
583 12:23:27.839607 done.
584 12:23:27.842283 LAPIC 0x12 in XAPIC mode.
585 12:23:27.845534 AP: slot 5 apic_id 9, MCU rev: 0x00000423
586 12:23:27.849066 AP: slot 2 apic_id 10, MCU rev: 0x00000423
587 12:23:27.852328 AP: slot 3 apic_id 12, MCU rev: 0x00000423
588 12:23:27.855270 LAPIC 0x14 in XAPIC mode.
589 12:23:27.859114 AP: slot 6 apic_id 8, MCU rev: 0x00000423
590 12:23:27.865645 AP: slot 1 apic_id 16, MCU rev: 0x00000423
591 12:23:27.868746 AP: slot 4 apic_id 14, MCU rev: 0x00000423
592 12:23:27.872122 AP: slot 7 apic_id 1, MCU rev: 0x00000423
593 12:23:27.875430 smm_setup_relocation_handler: enter
594 12:23:27.878724 smm_setup_relocation_handler: exit
595 12:23:27.888865 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
596 12:23:27.891904 Processing 11 relocs. Offset value of 0x00038000
597 12:23:27.898039 smm_module_setup_stub: stack_top = 0x7b804000
598 12:23:27.901996 smm_module_setup_stub: per cpu stack_size = 0x800
599 12:23:27.908898 smm_module_setup_stub: runtime.start32_offset = 0x4c
600 12:23:27.911587 smm_module_setup_stub: runtime.smm_size = 0x10000
601 12:23:27.918936 SMM Module: stub loaded at 38000. Will call 0x76a52094
602 12:23:27.922135 Installing permanent SMM handler to 0x7b800000
603 12:23:27.928946 smm_load_module: total_smm_space_needed e468, available -> 200000
604 12:23:27.938366 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
605 12:23:27.941354 Processing 255 relocs. Offset value of 0x7b9f6000
606 12:23:27.948207 smm_load_module: smram_start: 0x7b800000
607 12:23:27.951629 smm_load_module: smram_end: 7ba00000
608 12:23:27.954638 smm_load_module: handler start 0x7b9f6d5f
609 12:23:27.957938 smm_load_module: handler_size 98d0
610 12:23:27.961544 smm_load_module: fxsave_area 0x7b9ff000
611 12:23:27.964756 smm_load_module: fxsave_size 1000
612 12:23:27.968330 smm_load_module: CONFIG_MSEG_SIZE 0x0
613 12:23:27.975113 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
614 12:23:27.981627 smm_load_module: handler_mod_params.smbase = 0x7b800000
615 12:23:27.984796 smm_load_module: per_cpu_save_state_size = 0x400
616 12:23:27.988514 smm_load_module: num_cpus = 0x8
617 12:23:27.994963 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
618 12:23:27.998114 smm_load_module: total_save_state_size = 0x2000
619 12:23:28.004876 smm_load_module: cpu0 entry: 7b9e6000
620 12:23:28.007999 smm_create_map: cpus allowed in one segment 30
621 12:23:28.011697 smm_create_map: min # of segments needed 1
622 12:23:28.012205 CPU 0x0
623 12:23:28.018117 smbase 7b9e6000 entry 7b9ee000
624 12:23:28.021505 ss_start 7b9f5c00 code_end 7b9ee208
625 12:23:28.021896 CPU 0x1
626 12:23:28.024499 smbase 7b9e5c00 entry 7b9edc00
627 12:23:28.031306 ss_start 7b9f5800 code_end 7b9ede08
628 12:23:28.031798 CPU 0x2
629 12:23:28.034714 smbase 7b9e5800 entry 7b9ed800
630 12:23:28.041408 ss_start 7b9f5400 code_end 7b9eda08
631 12:23:28.041925 CPU 0x3
632 12:23:28.044726 smbase 7b9e5400 entry 7b9ed400
633 12:23:28.048407 ss_start 7b9f5000 code_end 7b9ed608
634 12:23:28.051388 CPU 0x4
635 12:23:28.054764 smbase 7b9e5000 entry 7b9ed000
636 12:23:28.057850 ss_start 7b9f4c00 code_end 7b9ed208
637 12:23:28.058354 CPU 0x5
638 12:23:28.064623 smbase 7b9e4c00 entry 7b9ecc00
639 12:23:28.067660 ss_start 7b9f4800 code_end 7b9ece08
640 12:23:28.068055 CPU 0x6
641 12:23:28.071100 smbase 7b9e4800 entry 7b9ec800
642 12:23:28.077896 ss_start 7b9f4400 code_end 7b9eca08
643 12:23:28.078383 CPU 0x7
644 12:23:28.081356 smbase 7b9e4400 entry 7b9ec400
645 12:23:28.087840 ss_start 7b9f4000 code_end 7b9ec608
646 12:23:28.094642 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
647 12:23:28.097410 Processing 11 relocs. Offset value of 0x7b9ee000
648 12:23:28.104419 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
649 12:23:28.110770 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
650 12:23:28.117542 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
651 12:23:28.124304 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
652 12:23:28.130781 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
653 12:23:28.137376 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
654 12:23:28.144002 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
655 12:23:28.147516 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
656 12:23:28.153908 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
657 12:23:28.161025 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
658 12:23:28.167066 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
659 12:23:28.174251 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
660 12:23:28.180556 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
661 12:23:28.187000 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
662 12:23:28.193879 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
663 12:23:28.196628 smm_module_setup_stub: stack_top = 0x7b804000
664 12:23:28.203736 smm_module_setup_stub: per cpu stack_size = 0x800
665 12:23:28.207237 smm_module_setup_stub: runtime.start32_offset = 0x4c
666 12:23:28.214070 smm_module_setup_stub: runtime.smm_size = 0x200000
667 12:23:28.220250 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
668 12:23:28.224010 Clearing SMI status registers
669 12:23:28.227029 SMI_STS: PM1
670 12:23:28.227559 PM1_STS: WAK PWRBTN
671 12:23:28.233301 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
672 12:23:28.237141 In relocation handler: CPU 0
673 12:23:28.243507 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
674 12:23:28.246757 Writing SMRR. base = 0x7b800006, mask=0xff800c00
675 12:23:28.250769 Relocation complete.
676 12:23:28.256316 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
677 12:23:28.259995 In relocation handler: CPU 7
678 12:23:28.263279 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
679 12:23:28.266906 Relocation complete.
680 12:23:28.273233 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
681 12:23:28.276759 In relocation handler: CPU 2
682 12:23:28.279964 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
683 12:23:28.283603 Writing SMRR. base = 0x7b800006, mask=0xff800c00
684 12:23:28.286723 Relocation complete.
685 12:23:28.293482 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
686 12:23:28.296685 In relocation handler: CPU 1
687 12:23:28.299402 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
688 12:23:28.306687 Writing SMRR. base = 0x7b800006, mask=0xff800c00
689 12:23:28.307230 Relocation complete.
690 12:23:28.316443 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
691 12:23:28.316940 In relocation handler: CPU 3
692 12:23:28.322931 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
693 12:23:28.326694 Writing SMRR. base = 0x7b800006, mask=0xff800c00
694 12:23:28.329805 Relocation complete.
695 12:23:28.336699 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
696 12:23:28.339430 In relocation handler: CPU 4
697 12:23:28.343072 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
698 12:23:28.346652 Writing SMRR. base = 0x7b800006, mask=0xff800c00
699 12:23:28.349822 Relocation complete.
700 12:23:28.356430 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
701 12:23:28.359890 In relocation handler: CPU 6
702 12:23:28.362970 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
703 12:23:28.369973 Writing SMRR. base = 0x7b800006, mask=0xff800c00
704 12:23:28.373323 Relocation complete.
705 12:23:28.379804 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
706 12:23:28.383056 In relocation handler: CPU 5
707 12:23:28.386560 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
708 12:23:28.387062 Relocation complete.
709 12:23:28.389976 Initializing CPU #0
710 12:23:28.392883 CPU: vendor Intel device 906a4
711 12:23:28.396041 CPU: family 06, model 9a, stepping 04
712 12:23:28.398912 Clearing out pending MCEs
713 12:23:28.403095 cpu: energy policy set to 7
714 12:23:28.406534 Turbo is available but hidden
715 12:23:28.409665 Turbo is available and visible
716 12:23:28.412747 microcode: Update skipped, already up-to-date
717 12:23:28.416014 CPU #0 initialized
718 12:23:28.416492 Initializing CPU #7
719 12:23:28.419672 Initializing CPU #2
720 12:23:28.423080 Initializing CPU #4
721 12:23:28.423613 Initializing CPU #1
722 12:23:28.426109 CPU: vendor Intel device 906a4
723 12:23:28.429713 CPU: family 06, model 9a, stepping 04
724 12:23:28.432598 CPU: vendor Intel device 906a4
725 12:23:28.436058 CPU: family 06, model 9a, stepping 04
726 12:23:28.439433 CPU: vendor Intel device 906a4
727 12:23:28.442861 CPU: family 06, model 9a, stepping 04
728 12:23:28.445801 Initializing CPU #3
729 12:23:28.449440 Clearing out pending MCEs
730 12:23:28.452251 CPU: vendor Intel device 906a4
731 12:23:28.455691 CPU: family 06, model 9a, stepping 04
732 12:23:28.458926 cpu: energy policy set to 7
733 12:23:28.462795 Clearing out pending MCEs
734 12:23:28.463338 Clearing out pending MCEs
735 12:23:28.465686 cpu: energy policy set to 7
736 12:23:28.469481 cpu: energy policy set to 7
737 12:23:28.472834 microcode: Update skipped, already up-to-date
738 12:23:28.476050 CPU #1 initialized
739 12:23:28.479102 Initializing CPU #6
740 12:23:28.482853 microcode: Update skipped, already up-to-date
741 12:23:28.486221 CPU #4 initialized
742 12:23:28.489630 CPU: vendor Intel device 906a4
743 12:23:28.492437 CPU: family 06, model 9a, stepping 04
744 12:23:28.496135 microcode: Update skipped, already up-to-date
745 12:23:28.498602 CPU #3 initialized
746 12:23:28.498925 Clearing out pending MCEs
747 12:23:28.502589 CPU: vendor Intel device 906a4
748 12:23:28.509136 CPU: family 06, model 9a, stepping 04
749 12:23:28.509633 cpu: energy policy set to 7
750 12:23:28.512740 Initializing CPU #5
751 12:23:28.515789 microcode: Update skipped, already up-to-date
752 12:23:28.519254 CPU #2 initialized
753 12:23:28.522709 Clearing out pending MCEs
754 12:23:28.525984 CPU: vendor Intel device 906a4
755 12:23:28.528851 CPU: family 06, model 9a, stepping 04
756 12:23:28.532545 cpu: energy policy set to 7
757 12:23:28.535815 Clearing out pending MCEs
758 12:23:28.538945 microcode: Update skipped, already up-to-date
759 12:23:28.539495 CPU #6 initialized
760 12:23:28.542568 cpu: energy policy set to 7
761 12:23:28.545716 Clearing out pending MCEs
762 12:23:28.552087 microcode: Update skipped, already up-to-date
763 12:23:28.552540 CPU #5 initialized
764 12:23:28.556113 cpu: energy policy set to 7
765 12:23:28.558512 microcode: Update skipped, already up-to-date
766 12:23:28.562019 CPU #7 initialized
767 12:23:28.565608 bsp_do_flight_plan done after 724 msecs.
768 12:23:28.569265 CPU: frequency set to 4400 MHz
769 12:23:28.572194 Enabling SMIs.
770 12:23:28.579551 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 382 / 521 ms
771 12:23:28.593657 Probing TPM I2C: done! DID_VID 0x00281ae0
772 12:23:28.596947 Locality already claimed
773 12:23:28.599790 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
774 12:23:28.611507 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
775 12:23:28.615006 Enabling GPIO PM b/c CR50 has long IRQ pulse support
776 12:23:28.621538 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
777 12:23:28.628156 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
778 12:23:28.631516 Found a VBT of 9216 bytes after decompression
779 12:23:28.634636 PCI 1.0, PIN A, using IRQ #16
780 12:23:28.638308 PCI 2.0, PIN A, using IRQ #17
781 12:23:28.641376 PCI 4.0, PIN A, using IRQ #18
782 12:23:28.644695 PCI 5.0, PIN A, using IRQ #16
783 12:23:28.648395 PCI 6.0, PIN A, using IRQ #16
784 12:23:28.651695 PCI 6.2, PIN C, using IRQ #18
785 12:23:28.654767 PCI 7.0, PIN A, using IRQ #19
786 12:23:28.657886 PCI 7.1, PIN B, using IRQ #20
787 12:23:28.661791 PCI 7.2, PIN C, using IRQ #21
788 12:23:28.664438 PCI 7.3, PIN D, using IRQ #22
789 12:23:28.667991 PCI 8.0, PIN A, using IRQ #23
790 12:23:28.670959 PCI D.0, PIN A, using IRQ #17
791 12:23:28.674853 PCI D.1, PIN B, using IRQ #19
792 12:23:28.675357 PCI 10.0, PIN A, using IRQ #24
793 12:23:28.677981 PCI 10.1, PIN B, using IRQ #25
794 12:23:28.681662 PCI 10.6, PIN C, using IRQ #20
795 12:23:28.684722 PCI 10.7, PIN D, using IRQ #21
796 12:23:28.687961 PCI 11.0, PIN A, using IRQ #26
797 12:23:28.691042 PCI 11.1, PIN B, using IRQ #27
798 12:23:28.694711 PCI 11.2, PIN C, using IRQ #28
799 12:23:28.697776 PCI 11.3, PIN D, using IRQ #29
800 12:23:28.701402 PCI 12.0, PIN A, using IRQ #30
801 12:23:28.704544 PCI 12.6, PIN B, using IRQ #31
802 12:23:28.708072 PCI 12.7, PIN C, using IRQ #22
803 12:23:28.711064 PCI 13.0, PIN A, using IRQ #32
804 12:23:28.714743 PCI 13.1, PIN B, using IRQ #33
805 12:23:28.717877 PCI 13.2, PIN C, using IRQ #34
806 12:23:28.721157 PCI 13.3, PIN D, using IRQ #35
807 12:23:28.724462 PCI 14.0, PIN B, using IRQ #23
808 12:23:28.727898 PCI 14.1, PIN A, using IRQ #36
809 12:23:28.728428 PCI 14.3, PIN C, using IRQ #17
810 12:23:28.731743 PCI 15.0, PIN A, using IRQ #37
811 12:23:28.734584 PCI 15.1, PIN B, using IRQ #38
812 12:23:28.738055 PCI 15.2, PIN C, using IRQ #39
813 12:23:28.741271 PCI 15.3, PIN D, using IRQ #40
814 12:23:28.744652 PCI 16.0, PIN A, using IRQ #18
815 12:23:28.747737 PCI 16.1, PIN B, using IRQ #19
816 12:23:28.750954 PCI 16.2, PIN C, using IRQ #20
817 12:23:28.754522 PCI 16.3, PIN D, using IRQ #21
818 12:23:28.758033 PCI 16.4, PIN A, using IRQ #18
819 12:23:28.760983 PCI 16.5, PIN B, using IRQ #19
820 12:23:28.764420 PCI 17.0, PIN A, using IRQ #22
821 12:23:28.767290 PCI 19.0, PIN A, using IRQ #41
822 12:23:28.770961 PCI 19.1, PIN B, using IRQ #42
823 12:23:28.774360 PCI 19.2, PIN C, using IRQ #43
824 12:23:28.777419 PCI 1C.0, PIN A, using IRQ #16
825 12:23:28.780940 PCI 1C.1, PIN B, using IRQ #17
826 12:23:28.781434 PCI 1C.2, PIN C, using IRQ #18
827 12:23:28.784460 PCI 1C.3, PIN D, using IRQ #19
828 12:23:28.787675 PCI 1C.4, PIN A, using IRQ #16
829 12:23:28.790756 PCI 1C.5, PIN B, using IRQ #17
830 12:23:28.794206 PCI 1C.6, PIN C, using IRQ #18
831 12:23:28.797204 PCI 1C.7, PIN D, using IRQ #19
832 12:23:28.800545 PCI 1D.0, PIN A, using IRQ #16
833 12:23:28.804021 PCI 1D.1, PIN B, using IRQ #17
834 12:23:28.807661 PCI 1D.2, PIN C, using IRQ #18
835 12:23:28.811003 PCI 1D.3, PIN D, using IRQ #19
836 12:23:28.813749 PCI 1E.0, PIN A, using IRQ #23
837 12:23:28.817332 PCI 1E.1, PIN B, using IRQ #20
838 12:23:28.820472 PCI 1E.2, PIN C, using IRQ #44
839 12:23:28.823930 PCI 1E.3, PIN D, using IRQ #45
840 12:23:28.827186 PCI 1F.3, PIN B, using IRQ #22
841 12:23:28.830571 PCI 1F.4, PIN C, using IRQ #23
842 12:23:28.833682 PCI 1F.6, PIN D, using IRQ #20
843 12:23:28.834037 PCI 1F.7, PIN A, using IRQ #21
844 12:23:28.840222 IRQ: Using dynamically assigned PCI IO-APIC IRQs
845 12:23:28.847022 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
846 12:23:29.025802 FSPS returned 0
847 12:23:29.028524 Executing Phase 1 of FspMultiPhaseSiInit
848 12:23:29.039202 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
849 12:23:29.042363 port C0 DISC req: usage 1 usb3 1 usb2 1
850 12:23:29.045681 Raw Buffer output 0 00000111
851 12:23:29.048778 Raw Buffer output 1 00000000
852 12:23:29.052595 pmc_send_ipc_cmd succeeded
853 12:23:29.059489 port C1 DISC req: usage 1 usb3 3 usb2 3
854 12:23:29.060004 Raw Buffer output 0 00000331
855 12:23:29.062280 Raw Buffer output 1 00000000
856 12:23:29.066996 pmc_send_ipc_cmd succeeded
857 12:23:29.070707 Detected 6 core, 8 thread CPU.
858 12:23:29.074027 Detected 6 core, 8 thread CPU.
859 12:23:29.079102 Detected 6 core, 8 thread CPU.
860 12:23:29.082384 Detected 6 core, 8 thread CPU.
861 12:23:29.085778 Detected 6 core, 8 thread CPU.
862 12:23:29.088926 Detected 6 core, 8 thread CPU.
863 12:23:29.092606 Detected 6 core, 8 thread CPU.
864 12:23:29.095779 Detected 6 core, 8 thread CPU.
865 12:23:29.099055 Detected 6 core, 8 thread CPU.
866 12:23:29.102232 Detected 6 core, 8 thread CPU.
867 12:23:29.105678 Detected 6 core, 8 thread CPU.
868 12:23:29.109112 Detected 6 core, 8 thread CPU.
869 12:23:29.112027 Detected 6 core, 8 thread CPU.
870 12:23:29.115784 Detected 6 core, 8 thread CPU.
871 12:23:29.118962 Detected 6 core, 8 thread CPU.
872 12:23:29.122120 Detected 6 core, 8 thread CPU.
873 12:23:29.125212 Detected 6 core, 8 thread CPU.
874 12:23:29.128875 Detected 6 core, 8 thread CPU.
875 12:23:29.132101 Detected 6 core, 8 thread CPU.
876 12:23:29.135942 Detected 6 core, 8 thread CPU.
877 12:23:29.138724 Detected 6 core, 8 thread CPU.
878 12:23:29.141871 Detected 6 core, 8 thread CPU.
879 12:23:29.421509 Detected 6 core, 8 thread CPU.
880 12:23:29.424698 Detected 6 core, 8 thread CPU.
881 12:23:29.427912 Detected 6 core, 8 thread CPU.
882 12:23:29.431306 Detected 6 core, 8 thread CPU.
883 12:23:29.434456 Detected 6 core, 8 thread CPU.
884 12:23:29.438130 Detected 6 core, 8 thread CPU.
885 12:23:29.441292 Detected 6 core, 8 thread CPU.
886 12:23:29.444348 Detected 6 core, 8 thread CPU.
887 12:23:29.447707 Detected 6 core, 8 thread CPU.
888 12:23:29.451148 Detected 6 core, 8 thread CPU.
889 12:23:29.453936 Detected 6 core, 8 thread CPU.
890 12:23:29.457760 Detected 6 core, 8 thread CPU.
891 12:23:29.461090 Detected 6 core, 8 thread CPU.
892 12:23:29.464189 Detected 6 core, 8 thread CPU.
893 12:23:29.467163 Detected 6 core, 8 thread CPU.
894 12:23:29.470890 Detected 6 core, 8 thread CPU.
895 12:23:29.474216 Detected 6 core, 8 thread CPU.
896 12:23:29.477330 Detected 6 core, 8 thread CPU.
897 12:23:29.480637 Detected 6 core, 8 thread CPU.
898 12:23:29.484235 Detected 6 core, 8 thread CPU.
899 12:23:29.487204 Display FSP Version Info HOB
900 12:23:29.490829 Reference Code - CPU = c.0.65.70
901 12:23:29.491368 uCode Version = 0.0.4.23
902 12:23:29.494141 TXT ACM version = ff.ff.ff.ffff
903 12:23:29.497231 Reference Code - ME = c.0.65.70
904 12:23:29.500658 MEBx version = 0.0.0.0
905 12:23:29.503675 ME Firmware Version = Lite SKU
906 12:23:29.507268 Reference Code - PCH = c.0.65.70
907 12:23:29.510359 PCH-CRID Status = Disabled
908 12:23:29.514035 PCH-CRID Original Value = ff.ff.ff.ffff
909 12:23:29.517022 PCH-CRID New Value = ff.ff.ff.ffff
910 12:23:29.520745 OPROM - RST - RAID = ff.ff.ff.ffff
911 12:23:29.523934 PCH Hsio Version = 4.0.0.0
912 12:23:29.527045 Reference Code - SA - System Agent = c.0.65.70
913 12:23:29.530252 Reference Code - MRC = 0.0.3.80
914 12:23:29.533753 SA - PCIe Version = c.0.65.70
915 12:23:29.537383 SA-CRID Status = Disabled
916 12:23:29.540424 SA-CRID Original Value = 0.0.0.4
917 12:23:29.543487 SA-CRID New Value = 0.0.0.4
918 12:23:29.546876 OPROM - VBIOS = ff.ff.ff.ffff
919 12:23:29.550222 IO Manageability Engine FW Version = 24.0.4.0
920 12:23:29.553605 PHY Build Version = 0.0.0.2016
921 12:23:29.556777 Thunderbolt(TM) FW Version = 0.0.0.0
922 12:23:29.563044 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
923 12:23:29.570348 BS: BS_DEV_INIT_CHIPS run times (exec / console): 479 / 507 ms
924 12:23:29.573652 Enumerating buses...
925 12:23:29.576657 Show all devs... Before device enumeration.
926 12:23:29.580278 Root Device: enabled 1
927 12:23:29.583935 CPU_CLUSTER: 0: enabled 1
928 12:23:29.584308 DOMAIN: 0000: enabled 1
929 12:23:29.586915 GPIO: 0: enabled 1
930 12:23:29.590147 PCI: 00:00.0: enabled 1
931 12:23:29.590611 PCI: 00:01.0: enabled 0
932 12:23:29.593597 PCI: 00:01.1: enabled 0
933 12:23:29.596928 PCI: 00:02.0: enabled 1
934 12:23:29.599629 PCI: 00:04.0: enabled 1
935 12:23:29.600018 PCI: 00:05.0: enabled 0
936 12:23:29.603335 PCI: 00:06.0: enabled 1
937 12:23:29.606871 PCI: 00:06.2: enabled 0
938 12:23:29.607258 PCI: 00:07.0: enabled 0
939 12:23:29.610677 PCI: 00:07.1: enabled 0
940 12:23:29.613559 PCI: 00:07.2: enabled 0
941 12:23:29.616984 PCI: 00:07.3: enabled 0
942 12:23:29.617474 PCI: 00:08.0: enabled 0
943 12:23:29.620248 PCI: 00:09.0: enabled 0
944 12:23:29.623494 PCI: 00:0a.0: enabled 1
945 12:23:29.626387 PCI: 00:0d.0: enabled 1
946 12:23:29.626776 PCI: 00:0d.1: enabled 0
947 12:23:29.629844 PCI: 00:0d.2: enabled 0
948 12:23:29.633033 PCI: 00:0d.3: enabled 0
949 12:23:29.636599 PCI: 00:0e.0: enabled 0
950 12:23:29.636950 PCI: 00:10.0: enabled 0
951 12:23:29.640223 PCI: 00:10.1: enabled 0
952 12:23:29.643056 PCI: 00:10.6: enabled 0
953 12:23:29.646981 PCI: 00:10.7: enabled 0
954 12:23:29.647496 PCI: 00:12.0: enabled 0
955 12:23:29.649704 PCI: 00:12.6: enabled 0
956 12:23:29.652984 PCI: 00:12.7: enabled 0
957 12:23:29.653336 PCI: 00:13.0: enabled 0
958 12:23:29.656784 PCI: 00:14.0: enabled 1
959 12:23:29.659739 PCI: 00:14.1: enabled 0
960 12:23:29.663367 PCI: 00:14.2: enabled 1
961 12:23:29.663720 PCI: 00:14.3: enabled 1
962 12:23:29.666218 PCI: 00:15.0: enabled 1
963 12:23:29.669949 PCI: 00:15.1: enabled 1
964 12:23:29.673070 PCI: 00:15.2: enabled 0
965 12:23:29.673507 PCI: 00:15.3: enabled 1
966 12:23:29.676574 PCI: 00:16.0: enabled 1
967 12:23:29.679627 PCI: 00:16.1: enabled 0
968 12:23:29.683235 PCI: 00:16.2: enabled 0
969 12:23:29.683587 PCI: 00:16.3: enabled 0
970 12:23:29.686474 PCI: 00:16.4: enabled 0
971 12:23:29.690100 PCI: 00:16.5: enabled 0
972 12:23:29.690591 PCI: 00:17.0: enabled 1
973 12:23:29.693187 PCI: 00:19.0: enabled 0
974 12:23:29.696321 PCI: 00:19.1: enabled 1
975 12:23:29.699485 PCI: 00:19.2: enabled 0
976 12:23:29.699845 PCI: 00:1a.0: enabled 0
977 12:23:29.702996 PCI: 00:1c.0: enabled 0
978 12:23:29.706351 PCI: 00:1c.1: enabled 0
979 12:23:29.709867 PCI: 00:1c.2: enabled 0
980 12:23:29.710315 PCI: 00:1c.3: enabled 0
981 12:23:29.713036 PCI: 00:1c.4: enabled 0
982 12:23:29.716177 PCI: 00:1c.5: enabled 0
983 12:23:29.719714 PCI: 00:1c.6: enabled 0
984 12:23:29.720160 PCI: 00:1c.7: enabled 0
985 12:23:29.723448 PCI: 00:1d.0: enabled 0
986 12:23:29.726263 PCI: 00:1d.1: enabled 0
987 12:23:29.729935 PCI: 00:1d.2: enabled 0
988 12:23:29.730386 PCI: 00:1d.3: enabled 0
989 12:23:29.733413 PCI: 00:1e.0: enabled 1
990 12:23:29.736346 PCI: 00:1e.1: enabled 0
991 12:23:29.736701 PCI: 00:1e.2: enabled 0
992 12:23:29.739895 PCI: 00:1e.3: enabled 1
993 12:23:29.742951 PCI: 00:1f.0: enabled 1
994 12:23:29.747068 PCI: 00:1f.1: enabled 0
995 12:23:29.747626 PCI: 00:1f.2: enabled 1
996 12:23:29.749650 PCI: 00:1f.3: enabled 1
997 12:23:29.752813 PCI: 00:1f.4: enabled 0
998 12:23:29.756293 PCI: 00:1f.5: enabled 1
999 12:23:29.756735 PCI: 00:1f.6: enabled 0
1000 12:23:29.759826 PCI: 00:1f.7: enabled 0
1001 12:23:29.763083 GENERIC: 0.0: enabled 1
1002 12:23:29.766578 GENERIC: 0.0: enabled 1
1003 12:23:29.767043 GENERIC: 1.0: enabled 1
1004 12:23:29.769540 GENERIC: 0.0: enabled 1
1005 12:23:29.773062 GENERIC: 1.0: enabled 1
1006 12:23:29.773531 USB0 port 0: enabled 1
1007 12:23:29.775978 USB0 port 0: enabled 1
1008 12:23:29.779695 GENERIC: 0.0: enabled 1
1009 12:23:29.783235 I2C: 00:1a: enabled 1
1010 12:23:29.783693 I2C: 00:31: enabled 1
1011 12:23:29.786167 I2C: 00:32: enabled 1
1012 12:23:29.789755 I2C: 00:50: enabled 1
1013 12:23:29.790103 I2C: 00:10: enabled 1
1014 12:23:29.792876 I2C: 00:15: enabled 1
1015 12:23:29.796689 I2C: 00:2c: enabled 1
1016 12:23:29.797150 GENERIC: 0.0: enabled 1
1017 12:23:29.799399 SPI: 00: enabled 1
1018 12:23:29.802496 PNP: 0c09.0: enabled 1
1019 12:23:29.802791 GENERIC: 0.0: enabled 1
1020 12:23:29.806347 USB3 port 0: enabled 1
1021 12:23:29.810208 USB3 port 1: enabled 0
1022 12:23:29.810684 USB3 port 2: enabled 1
1023 12:23:29.812920 USB3 port 3: enabled 0
1024 12:23:29.816535 USB2 port 0: enabled 1
1025 12:23:29.820003 USB2 port 1: enabled 0
1026 12:23:29.820459 USB2 port 2: enabled 1
1027 12:23:29.823296 USB2 port 3: enabled 0
1028 12:23:29.826694 USB2 port 4: enabled 0
1029 12:23:29.827217 USB2 port 5: enabled 1
1030 12:23:29.829499 USB2 port 6: enabled 0
1031 12:23:29.833122 USB2 port 7: enabled 0
1032 12:23:29.836137 USB2 port 8: enabled 1
1033 12:23:29.836507 USB2 port 9: enabled 1
1034 12:23:29.839237 USB3 port 0: enabled 1
1035 12:23:29.842544 USB3 port 1: enabled 0
1036 12:23:29.842890 USB3 port 2: enabled 0
1037 12:23:29.846101 USB3 port 3: enabled 0
1038 12:23:29.849585 GENERIC: 0.0: enabled 1
1039 12:23:29.853009 GENERIC: 1.0: enabled 1
1040 12:23:29.853455 APIC: 00: enabled 1
1041 12:23:29.856020 APIC: 16: enabled 1
1042 12:23:29.856365 APIC: 10: enabled 1
1043 12:23:29.858975 APIC: 12: enabled 1
1044 12:23:29.863408 APIC: 14: enabled 1
1045 12:23:29.863923 APIC: 09: enabled 1
1046 12:23:29.865656 APIC: 08: enabled 1
1047 12:23:29.866015 APIC: 01: enabled 1
1048 12:23:29.869434 Compare with tree...
1049 12:23:29.872965 Root Device: enabled 1
1050 12:23:29.875635 CPU_CLUSTER: 0: enabled 1
1051 12:23:29.875987 APIC: 00: enabled 1
1052 12:23:29.878812 APIC: 16: enabled 1
1053 12:23:29.882287 APIC: 10: enabled 1
1054 12:23:29.882733 APIC: 12: enabled 1
1055 12:23:29.885489 APIC: 14: enabled 1
1056 12:23:29.889343 APIC: 09: enabled 1
1057 12:23:29.889804 APIC: 08: enabled 1
1058 12:23:29.892699 APIC: 01: enabled 1
1059 12:23:29.895551 DOMAIN: 0000: enabled 1
1060 12:23:29.898797 GPIO: 0: enabled 1
1061 12:23:29.899187 PCI: 00:00.0: enabled 1
1062 12:23:29.902203 PCI: 00:01.0: enabled 0
1063 12:23:29.906044 PCI: 00:01.1: enabled 0
1064 12:23:29.909193 PCI: 00:02.0: enabled 1
1065 12:23:29.912600 PCI: 00:04.0: enabled 1
1066 12:23:29.912945 GENERIC: 0.0: enabled 1
1067 12:23:29.915399 PCI: 00:05.0: enabled 0
1068 12:23:29.918930 PCI: 00:06.0: enabled 1
1069 12:23:29.922291 PCI: 00:06.2: enabled 0
1070 12:23:29.925565 PCI: 00:08.0: enabled 0
1071 12:23:29.926023 PCI: 00:09.0: enabled 0
1072 12:23:29.929195 PCI: 00:0a.0: enabled 1
1073 12:23:29.932387 PCI: 00:0d.0: enabled 1
1074 12:23:29.935661 USB0 port 0: enabled 1
1075 12:23:29.938897 USB3 port 0: enabled 1
1076 12:23:29.939419 USB3 port 1: enabled 0
1077 12:23:29.942320 USB3 port 2: enabled 1
1078 12:23:29.945681 USB3 port 3: enabled 0
1079 12:23:29.948849 PCI: 00:0d.1: enabled 0
1080 12:23:29.952063 PCI: 00:0d.2: enabled 0
1081 12:23:29.952708 PCI: 00:0d.3: enabled 0
1082 12:23:29.955746 PCI: 00:0e.0: enabled 0
1083 12:23:29.958911 PCI: 00:10.0: enabled 0
1084 12:23:29.962235 PCI: 00:10.1: enabled 0
1085 12:23:29.965624 PCI: 00:10.6: enabled 0
1086 12:23:29.966010 PCI: 00:10.7: enabled 0
1087 12:23:29.968881 PCI: 00:12.0: enabled 0
1088 12:23:29.972097 PCI: 00:12.6: enabled 0
1089 12:23:29.975391 PCI: 00:12.7: enabled 0
1090 12:23:29.975754 PCI: 00:13.0: enabled 0
1091 12:23:29.979065 PCI: 00:14.0: enabled 1
1092 12:23:29.982099 USB0 port 0: enabled 1
1093 12:23:29.985205 USB2 port 0: enabled 1
1094 12:23:29.988589 USB2 port 1: enabled 0
1095 12:23:29.991971 USB2 port 2: enabled 1
1096 12:23:29.992342 USB2 port 3: enabled 0
1097 12:23:29.995306 USB2 port 4: enabled 0
1098 12:23:29.998595 USB2 port 5: enabled 1
1099 12:23:30.001708 USB2 port 6: enabled 0
1100 12:23:30.005699 USB2 port 7: enabled 0
1101 12:23:30.006170 USB2 port 8: enabled 1
1102 12:23:30.008821 USB2 port 9: enabled 1
1103 12:23:30.012361 USB3 port 0: enabled 1
1104 12:23:30.015287 USB3 port 1: enabled 0
1105 12:23:30.018979 USB3 port 2: enabled 0
1106 12:23:30.021925 USB3 port 3: enabled 0
1107 12:23:30.022464 PCI: 00:14.1: enabled 0
1108 12:23:30.024971 PCI: 00:14.2: enabled 1
1109 12:23:30.028445 PCI: 00:14.3: enabled 1
1110 12:23:30.031734 GENERIC: 0.0: enabled 1
1111 12:23:30.035204 PCI: 00:15.0: enabled 1
1112 12:23:30.035651 I2C: 00:1a: enabled 1
1113 12:23:30.038506 I2C: 00:31: enabled 1
1114 12:23:30.042176 I2C: 00:32: enabled 1
1115 12:23:30.045435 PCI: 00:15.1: enabled 1
1116 12:23:30.045891 I2C: 00:50: enabled 1
1117 12:23:30.048244 PCI: 00:15.2: enabled 0
1118 12:23:30.051664 PCI: 00:15.3: enabled 1
1119 12:23:30.055080 I2C: 00:10: enabled 1
1120 12:23:30.058709 PCI: 00:16.0: enabled 1
1121 12:23:30.059213 PCI: 00:16.1: enabled 0
1122 12:23:30.062535 PCI: 00:16.2: enabled 0
1123 12:23:30.065033 PCI: 00:16.3: enabled 0
1124 12:23:30.068805 PCI: 00:16.4: enabled 0
1125 12:23:30.072067 PCI: 00:16.5: enabled 0
1126 12:23:30.072548 PCI: 00:17.0: enabled 1
1127 12:23:30.075095 PCI: 00:19.0: enabled 0
1128 12:23:30.078667 PCI: 00:19.1: enabled 1
1129 12:23:30.082216 I2C: 00:15: enabled 1
1130 12:23:30.082696 I2C: 00:2c: enabled 1
1131 12:23:30.085426 PCI: 00:19.2: enabled 0
1132 12:23:30.088540 PCI: 00:1a.0: enabled 0
1133 12:23:30.091721 PCI: 00:1e.0: enabled 1
1134 12:23:30.094839 PCI: 00:1e.1: enabled 0
1135 12:23:30.095247 PCI: 00:1e.2: enabled 0
1136 12:23:30.098237 PCI: 00:1e.3: enabled 1
1137 12:23:30.101359 SPI: 00: enabled 1
1138 12:23:30.105484 PCI: 00:1f.0: enabled 1
1139 12:23:30.108679 PNP: 0c09.0: enabled 1
1140 12:23:30.109127 PCI: 00:1f.1: enabled 0
1141 12:23:30.111902 PCI: 00:1f.2: enabled 1
1142 12:23:30.114900 GENERIC: 0.0: enabled 1
1143 12:23:30.118031 GENERIC: 0.0: enabled 1
1144 12:23:30.121955 GENERIC: 1.0: enabled 1
1145 12:23:30.122301 PCI: 00:1f.3: enabled 1
1146 12:23:30.124795 PCI: 00:1f.4: enabled 0
1147 12:23:30.127971 PCI: 00:1f.5: enabled 1
1148 12:23:30.131234 PCI: 00:1f.6: enabled 0
1149 12:23:30.134710 PCI: 00:1f.7: enabled 0
1150 12:23:30.135056 Root Device scanning...
1151 12:23:30.138268 scan_static_bus for Root Device
1152 12:23:30.141630 CPU_CLUSTER: 0 enabled
1153 12:23:30.144917 DOMAIN: 0000 enabled
1154 12:23:30.145349 DOMAIN: 0000 scanning...
1155 12:23:30.148357 PCI: pci_scan_bus for bus 00
1156 12:23:30.151168 PCI: 00:00.0 [8086/0000] ops
1157 12:23:30.154999 PCI: 00:00.0 [8086/4609] enabled
1158 12:23:30.158601 PCI: 00:02.0 [8086/0000] bus ops
1159 12:23:30.161795 PCI: 00:02.0 [8086/46b3] enabled
1160 12:23:30.164922 PCI: 00:04.0 [8086/0000] bus ops
1161 12:23:30.168303 PCI: 00:04.0 [8086/461d] enabled
1162 12:23:30.171737 PCI: 00:06.0 [8086/0000] bus ops
1163 12:23:30.174871 PCI: 00:06.0 [8086/464d] enabled
1164 12:23:30.178193 PCI: 00:08.0 [8086/464f] disabled
1165 12:23:30.181821 PCI: 00:0a.0 [8086/467d] enabled
1166 12:23:30.184657 PCI: 00:0d.0 [8086/0000] bus ops
1167 12:23:30.187842 PCI: 00:0d.0 [8086/461e] enabled
1168 12:23:30.191771 PCI: 00:14.0 [8086/0000] bus ops
1169 12:23:30.195086 PCI: 00:14.0 [8086/51ed] enabled
1170 12:23:30.198407 PCI: 00:14.2 [8086/51ef] enabled
1171 12:23:30.201248 PCI: 00:14.3 [8086/0000] bus ops
1172 12:23:30.204756 PCI: 00:14.3 [8086/51f0] enabled
1173 12:23:30.208509 PCI: 00:15.0 [8086/0000] bus ops
1174 12:23:30.211708 PCI: 00:15.0 [8086/51e8] enabled
1175 12:23:30.214810 PCI: 00:15.1 [8086/0000] bus ops
1176 12:23:30.219035 PCI: 00:15.1 [8086/51e9] enabled
1177 12:23:30.221462 PCI: 00:15.2 [8086/0000] bus ops
1178 12:23:30.228334 PCI: 00:15.2 [8086/51ea] disabled
1179 12:23:30.231258 PCI: 00:15.3 [8086/0000] bus ops
1180 12:23:30.234390 PCI: 00:15.3 [8086/51eb] enabled
1181 12:23:30.234731 PCI: 00:16.0 [8086/0000] ops
1182 12:23:30.237985 PCI: 00:16.0 [8086/51e0] enabled
1183 12:23:30.244618 PCI: Static device PCI: 00:17.0 not found, disabling it.
1184 12:23:30.248205 PCI: 00:19.0 [8086/0000] bus ops
1185 12:23:30.251029 PCI: 00:19.0 [8086/51c5] disabled
1186 12:23:30.254748 PCI: 00:19.1 [8086/0000] bus ops
1187 12:23:30.258061 PCI: 00:19.1 [8086/51c6] enabled
1188 12:23:30.261151 PCI: 00:1e.0 [8086/0000] ops
1189 12:23:30.264527 PCI: 00:1e.0 [8086/51a8] enabled
1190 12:23:30.267592 PCI: 00:1e.3 [8086/0000] bus ops
1191 12:23:30.270794 PCI: 00:1e.3 [8086/51ab] enabled
1192 12:23:30.274416 PCI: 00:1f.0 [8086/0000] bus ops
1193 12:23:30.277683 PCI: 00:1f.0 [8086/5182] enabled
1194 12:23:30.280832 RTC Init
1195 12:23:30.284170 Set power on after power failure.
1196 12:23:30.287371 Disabling Deep S3
1197 12:23:30.287710 Disabling Deep S3
1198 12:23:30.291464 Disabling Deep S4
1199 12:23:30.291898 Disabling Deep S4
1200 12:23:30.294181 Disabling Deep S5
1201 12:23:30.294520 Disabling Deep S5
1202 12:23:30.297808 PCI: 00:1f.2 [0000/0000] hidden
1203 12:23:30.300631 PCI: 00:1f.3 [8086/0000] bus ops
1204 12:23:30.304275 PCI: 00:1f.3 [8086/51c8] enabled
1205 12:23:30.307940 PCI: 00:1f.5 [8086/0000] bus ops
1206 12:23:30.310737 PCI: 00:1f.5 [8086/51a4] enabled
1207 12:23:30.314376 GPIO: 0 enabled
1208 12:23:30.317941 PCI: Leftover static devices:
1209 12:23:30.318377 PCI: 00:01.0
1210 12:23:30.320936 PCI: 00:01.1
1211 12:23:30.321215 PCI: 00:05.0
1212 12:23:30.321433 PCI: 00:06.2
1213 12:23:30.324384 PCI: 00:09.0
1214 12:23:30.324817 PCI: 00:0d.1
1215 12:23:30.327892 PCI: 00:0d.2
1216 12:23:30.328235 PCI: 00:0d.3
1217 12:23:30.328472 PCI: 00:0e.0
1218 12:23:30.330786 PCI: 00:10.0
1219 12:23:30.331142 PCI: 00:10.1
1220 12:23:30.334646 PCI: 00:10.6
1221 12:23:30.335082 PCI: 00:10.7
1222 12:23:30.338194 PCI: 00:12.0
1223 12:23:30.338673 PCI: 00:12.6
1224 12:23:30.338949 PCI: 00:12.7
1225 12:23:30.340724 PCI: 00:13.0
1226 12:23:30.341066 PCI: 00:14.1
1227 12:23:30.344126 PCI: 00:16.1
1228 12:23:30.344464 PCI: 00:16.2
1229 12:23:30.344704 PCI: 00:16.3
1230 12:23:30.347509 PCI: 00:16.4
1231 12:23:30.347847 PCI: 00:16.5
1232 12:23:30.350681 PCI: 00:17.0
1233 12:23:30.351021 PCI: 00:19.2
1234 12:23:30.351285 PCI: 00:1a.0
1235 12:23:30.354554 PCI: 00:1e.1
1236 12:23:30.355027 PCI: 00:1e.2
1237 12:23:30.357799 PCI: 00:1f.1
1238 12:23:30.358246 PCI: 00:1f.4
1239 12:23:30.361162 PCI: 00:1f.6
1240 12:23:30.361501 PCI: 00:1f.7
1241 12:23:30.364316 PCI: Check your devicetree.cb.
1242 12:23:30.368025 PCI: 00:02.0 scanning...
1243 12:23:30.371433 scan_generic_bus for PCI: 00:02.0
1244 12:23:30.374527 scan_generic_bus for PCI: 00:02.0 done
1245 12:23:30.377502 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1246 12:23:30.380854 PCI: 00:04.0 scanning...
1247 12:23:30.384252 scan_generic_bus for PCI: 00:04.0
1248 12:23:30.387430 GENERIC: 0.0 enabled
1249 12:23:30.394706 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1250 12:23:30.397928 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1251 12:23:30.400452 PCI: 00:06.0 scanning...
1252 12:23:30.404438 do_pci_scan_bridge for PCI: 00:06.0
1253 12:23:30.407630 PCI: pci_scan_bus for bus 01
1254 12:23:30.410924 PCI: 01:00.0 [15b7/5009] enabled
1255 12:23:30.414245 Enabling Common Clock Configuration
1256 12:23:30.417551 L1 Sub-State supported from root port 6
1257 12:23:30.420908 L1 Sub-State Support = 0x5
1258 12:23:30.424387 CommonModeRestoreTime = 0x6e
1259 12:23:30.427557 Power On Value = 0x5, Power On Scale = 0x2
1260 12:23:30.430677 ASPM: Enabled L1
1261 12:23:30.434295 PCIe: Max_Payload_Size adjusted to 256
1262 12:23:30.437379 PCI: 01:00.0: Enabled LTR
1263 12:23:30.440794 PCI: 01:00.0: Programmed LTR max latencies
1264 12:23:30.444095 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1265 12:23:30.447096 PCI: 00:0d.0 scanning...
1266 12:23:30.450974 scan_static_bus for PCI: 00:0d.0
1267 12:23:30.454262 USB0 port 0 enabled
1268 12:23:30.454700 USB0 port 0 scanning...
1269 12:23:30.457525 scan_static_bus for USB0 port 0
1270 12:23:30.460697 USB3 port 0 enabled
1271 12:23:30.464239 USB3 port 1 disabled
1272 12:23:30.464629 USB3 port 2 enabled
1273 12:23:30.466939 USB3 port 3 disabled
1274 12:23:30.470748 USB3 port 0 scanning...
1275 12:23:30.473986 scan_static_bus for USB3 port 0
1276 12:23:30.477887 scan_static_bus for USB3 port 0 done
1277 12:23:30.480758 scan_bus: bus USB3 port 0 finished in 6 msecs
1278 12:23:30.483975 USB3 port 2 scanning...
1279 12:23:30.487115 scan_static_bus for USB3 port 2
1280 12:23:30.490823 scan_static_bus for USB3 port 2 done
1281 12:23:30.493860 scan_bus: bus USB3 port 2 finished in 6 msecs
1282 12:23:30.497385 scan_static_bus for USB0 port 0 done
1283 12:23:30.503753 scan_bus: bus USB0 port 0 finished in 43 msecs
1284 12:23:30.507472 scan_static_bus for PCI: 00:0d.0 done
1285 12:23:30.510759 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1286 12:23:30.514385 PCI: 00:14.0 scanning...
1287 12:23:30.517182 scan_static_bus for PCI: 00:14.0
1288 12:23:30.521379 USB0 port 0 enabled
1289 12:23:30.523968 USB0 port 0 scanning...
1290 12:23:30.524446 scan_static_bus for USB0 port 0
1291 12:23:30.527027 USB2 port 0 enabled
1292 12:23:30.530819 USB2 port 1 disabled
1293 12:23:30.531141 USB2 port 2 enabled
1294 12:23:30.533884 USB2 port 3 disabled
1295 12:23:30.537214 USB2 port 4 disabled
1296 12:23:30.537554 USB2 port 5 enabled
1297 12:23:30.540345 USB2 port 6 disabled
1298 12:23:30.543799 USB2 port 7 disabled
1299 12:23:30.544139 USB2 port 8 enabled
1300 12:23:30.547038 USB2 port 9 enabled
1301 12:23:30.547411 USB3 port 0 enabled
1302 12:23:30.550759 USB3 port 1 disabled
1303 12:23:30.553900 USB3 port 2 disabled
1304 12:23:30.554312 USB3 port 3 disabled
1305 12:23:30.557527 USB2 port 0 scanning...
1306 12:23:30.560589 scan_static_bus for USB2 port 0
1307 12:23:30.564070 scan_static_bus for USB2 port 0 done
1308 12:23:30.570646 scan_bus: bus USB2 port 0 finished in 6 msecs
1309 12:23:30.571092 USB2 port 2 scanning...
1310 12:23:30.573955 scan_static_bus for USB2 port 2
1311 12:23:30.577457 scan_static_bus for USB2 port 2 done
1312 12:23:30.583815 scan_bus: bus USB2 port 2 finished in 6 msecs
1313 12:23:30.584311 USB2 port 5 scanning...
1314 12:23:30.587292 scan_static_bus for USB2 port 5
1315 12:23:30.594073 scan_static_bus for USB2 port 5 done
1316 12:23:30.597259 scan_bus: bus USB2 port 5 finished in 6 msecs
1317 12:23:30.600380 USB2 port 8 scanning...
1318 12:23:30.603662 scan_static_bus for USB2 port 8
1319 12:23:30.607177 scan_static_bus for USB2 port 8 done
1320 12:23:30.610286 scan_bus: bus USB2 port 8 finished in 6 msecs
1321 12:23:30.613917 USB2 port 9 scanning...
1322 12:23:30.616944 scan_static_bus for USB2 port 9
1323 12:23:30.620346 scan_static_bus for USB2 port 9 done
1324 12:23:30.623251 scan_bus: bus USB2 port 9 finished in 6 msecs
1325 12:23:30.626648 USB3 port 0 scanning...
1326 12:23:30.630288 scan_static_bus for USB3 port 0
1327 12:23:30.633579 scan_static_bus for USB3 port 0 done
1328 12:23:30.640455 scan_bus: bus USB3 port 0 finished in 6 msecs
1329 12:23:30.643963 scan_static_bus for USB0 port 0 done
1330 12:23:30.646547 scan_bus: bus USB0 port 0 finished in 120 msecs
1331 12:23:30.650133 scan_static_bus for PCI: 00:14.0 done
1332 12:23:30.656822 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1333 12:23:30.660007 PCI: 00:14.3 scanning...
1334 12:23:30.663180 scan_static_bus for PCI: 00:14.3
1335 12:23:30.663523 GENERIC: 0.0 enabled
1336 12:23:30.666904 scan_static_bus for PCI: 00:14.3 done
1337 12:23:30.673386 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1338 12:23:30.676651 PCI: 00:15.0 scanning...
1339 12:23:30.680252 scan_static_bus for PCI: 00:15.0
1340 12:23:30.680729 I2C: 00:1a enabled
1341 12:23:30.683480 I2C: 00:31 enabled
1342 12:23:30.683955 I2C: 00:32 enabled
1343 12:23:30.686806 scan_static_bus for PCI: 00:15.0 done
1344 12:23:30.693509 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
1345 12:23:30.696597 PCI: 00:15.1 scanning...
1346 12:23:30.699795 scan_static_bus for PCI: 00:15.1
1347 12:23:30.700266 I2C: 00:50 enabled
1348 12:23:30.702952 scan_static_bus for PCI: 00:15.1 done
1349 12:23:30.709904 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1350 12:23:30.713539 PCI: 00:15.3 scanning...
1351 12:23:30.716676 scan_static_bus for PCI: 00:15.3
1352 12:23:30.717133 I2C: 00:10 enabled
1353 12:23:30.720018 scan_static_bus for PCI: 00:15.3 done
1354 12:23:30.726279 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1355 12:23:30.726734 PCI: 00:19.1 scanning...
1356 12:23:30.729772 scan_static_bus for PCI: 00:19.1
1357 12:23:30.733138 I2C: 00:15 enabled
1358 12:23:30.736688 I2C: 00:2c enabled
1359 12:23:30.739826 scan_static_bus for PCI: 00:19.1 done
1360 12:23:30.743009 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1361 12:23:30.746411 PCI: 00:1e.3 scanning...
1362 12:23:30.749708 scan_generic_bus for PCI: 00:1e.3
1363 12:23:30.753066 SPI: 00 enabled
1364 12:23:30.756454 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1365 12:23:30.762791 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1366 12:23:30.766589 PCI: 00:1f.0 scanning...
1367 12:23:30.769619 scan_static_bus for PCI: 00:1f.0
1368 12:23:30.770018 PNP: 0c09.0 enabled
1369 12:23:30.772698 PNP: 0c09.0 scanning...
1370 12:23:30.775859 scan_static_bus for PNP: 0c09.0
1371 12:23:30.779255 scan_static_bus for PNP: 0c09.0 done
1372 12:23:30.783161 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1373 12:23:30.790021 scan_static_bus for PCI: 00:1f.0 done
1374 12:23:30.792812 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1375 12:23:30.796004 PCI: 00:1f.2 scanning...
1376 12:23:30.799212 scan_static_bus for PCI: 00:1f.2
1377 12:23:30.799555 GENERIC: 0.0 enabled
1378 12:23:30.802544 GENERIC: 0.0 scanning...
1379 12:23:30.806314 scan_static_bus for GENERIC: 0.0
1380 12:23:30.809478 GENERIC: 0.0 enabled
1381 12:23:30.809907 GENERIC: 1.0 enabled
1382 12:23:30.816141 scan_static_bus for GENERIC: 0.0 done
1383 12:23:30.819255 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1384 12:23:30.822774 scan_static_bus for PCI: 00:1f.2 done
1385 12:23:30.829676 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1386 12:23:30.830181 PCI: 00:1f.3 scanning...
1387 12:23:30.832815 scan_static_bus for PCI: 00:1f.3
1388 12:23:30.836511 scan_static_bus for PCI: 00:1f.3 done
1389 12:23:30.842929 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1390 12:23:30.846188 PCI: 00:1f.5 scanning...
1391 12:23:30.849744 scan_generic_bus for PCI: 00:1f.5
1392 12:23:30.853278 scan_generic_bus for PCI: 00:1f.5 done
1393 12:23:30.856329 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1394 12:23:30.863011 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1395 12:23:30.865910 scan_static_bus for Root Device done
1396 12:23:30.869507 scan_bus: bus Root Device finished in 729 msecs
1397 12:23:30.869889 done
1398 12:23:30.876283 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1399 12:23:30.882839 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1400 12:23:30.889483 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1401 12:23:30.892896 SPI flash protection: WPSW=0 SRP0=0
1402 12:23:30.896054 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1403 12:23:30.902372 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1404 12:23:30.905788 found VGA at PCI: 00:02.0
1405 12:23:30.909599 Setting up VGA for PCI: 00:02.0
1406 12:23:30.913235 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1407 12:23:30.918953 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1408 12:23:30.922807 Allocating resources...
1409 12:23:30.923283 Reading resources...
1410 12:23:30.929302 Root Device read_resources bus 0 link: 0
1411 12:23:30.932814 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1412 12:23:30.935860 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1413 12:23:30.942783 DOMAIN: 0000 read_resources bus 0 link: 0
1414 12:23:30.949026 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1415 12:23:30.952370 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1416 12:23:30.958998 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1417 12:23:30.965532 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1418 12:23:30.973014 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1419 12:23:30.978819 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1420 12:23:30.985479 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1421 12:23:30.992578 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1422 12:23:30.998795 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1423 12:23:31.005404 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1424 12:23:31.012227 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1425 12:23:31.019216 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1426 12:23:31.025297 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1427 12:23:31.029041 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1428 12:23:31.035233 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1429 12:23:31.041864 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1430 12:23:31.049016 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1431 12:23:31.055286 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1432 12:23:31.061928 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1433 12:23:31.068138 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1434 12:23:31.074847 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1435 12:23:31.078456 PCI: 00:04.0 read_resources bus 1 link: 0
1436 12:23:31.081766 PCI: 00:04.0 read_resources bus 1 link: 0 done
1437 12:23:31.088542 PCI: 00:06.0 read_resources bus 1 link: 0
1438 12:23:31.092190 PCI: 00:06.0 read_resources bus 1 link: 0 done
1439 12:23:31.094959 PCI: 00:0d.0 read_resources bus 0 link: 0
1440 12:23:31.098547 USB0 port 0 read_resources bus 0 link: 0
1441 12:23:31.104760 USB0 port 0 read_resources bus 0 link: 0 done
1442 12:23:31.108386 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1443 12:23:31.115212 PCI: 00:14.0 read_resources bus 0 link: 0
1444 12:23:31.118552 USB0 port 0 read_resources bus 0 link: 0
1445 12:23:31.121993 USB0 port 0 read_resources bus 0 link: 0 done
1446 12:23:31.128350 PCI: 00:14.0 read_resources bus 0 link: 0 done
1447 12:23:31.131847 PCI: 00:14.3 read_resources bus 0 link: 0
1448 12:23:31.135090 PCI: 00:14.3 read_resources bus 0 link: 0 done
1449 12:23:31.141686 PCI: 00:15.0 read_resources bus 0 link: 0
1450 12:23:31.144818 PCI: 00:15.0 read_resources bus 0 link: 0 done
1451 12:23:31.148421 PCI: 00:15.1 read_resources bus 0 link: 0
1452 12:23:31.154996 PCI: 00:15.1 read_resources bus 0 link: 0 done
1453 12:23:31.158180 PCI: 00:15.3 read_resources bus 0 link: 0
1454 12:23:31.161880 PCI: 00:15.3 read_resources bus 0 link: 0 done
1455 12:23:31.168319 PCI: 00:19.1 read_resources bus 0 link: 0
1456 12:23:31.171477 PCI: 00:19.1 read_resources bus 0 link: 0 done
1457 12:23:31.175095 PCI: 00:1e.3 read_resources bus 2 link: 0
1458 12:23:31.181820 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1459 12:23:31.185032 PCI: 00:1f.0 read_resources bus 0 link: 0
1460 12:23:31.191416 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1461 12:23:31.194718 PCI: 00:1f.2 read_resources bus 0 link: 0
1462 12:23:31.198568 GENERIC: 0.0 read_resources bus 0 link: 0
1463 12:23:31.204442 GENERIC: 0.0 read_resources bus 0 link: 0 done
1464 12:23:31.208532 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1465 12:23:31.214545 DOMAIN: 0000 read_resources bus 0 link: 0 done
1466 12:23:31.218270 Root Device read_resources bus 0 link: 0 done
1467 12:23:31.221332 Done reading resources.
1468 12:23:31.225041 Show resources in subtree (Root Device)...After reading.
1469 12:23:31.231653 Root Device child on link 0 CPU_CLUSTER: 0
1470 12:23:31.235048 CPU_CLUSTER: 0 child on link 0 APIC: 00
1471 12:23:31.235632 APIC: 00
1472 12:23:31.237997 APIC: 16
1473 12:23:31.238376 APIC: 10
1474 12:23:31.238637 APIC: 12
1475 12:23:31.241576 APIC: 14
1476 12:23:31.242055 APIC: 09
1477 12:23:31.244592 APIC: 08
1478 12:23:31.245030 APIC: 01
1479 12:23:31.248369 DOMAIN: 0000 child on link 0 GPIO: 0
1480 12:23:31.257836 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1481 12:23:31.268444 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1482 12:23:31.268878 GPIO: 0
1483 12:23:31.271195 PCI: 00:00.0
1484 12:23:31.281294 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1485 12:23:31.287905 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1486 12:23:31.297998 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1487 12:23:31.307978 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1488 12:23:31.318050 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1489 12:23:31.328289 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1490 12:23:31.337686 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1491 12:23:31.344178 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1492 12:23:31.354042 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1493 12:23:31.364297 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1494 12:23:31.373870 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1495 12:23:31.384158 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1496 12:23:31.394073 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1497 12:23:31.403565 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1498 12:23:31.411046 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1499 12:23:31.420706 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1500 12:23:31.430352 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1501 12:23:31.439930 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1502 12:23:31.450329 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1503 12:23:31.459750 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1504 12:23:31.470172 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1505 12:23:31.480259 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1506 12:23:31.486722 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1507 12:23:31.496477 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1508 12:23:31.506216 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1509 12:23:31.516844 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1510 12:23:31.526857 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1511 12:23:31.536475 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1512 12:23:31.536958 PCI: 00:02.0
1513 12:23:31.546288 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1514 12:23:31.559770 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1515 12:23:31.566421 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1516 12:23:31.573195 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1517 12:23:31.582669 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1518 12:23:31.583073 GENERIC: 0.0
1519 12:23:31.586189 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1520 12:23:31.595901 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1521 12:23:31.605843 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1522 12:23:31.616019 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1523 12:23:31.616364 PCI: 01:00.0
1524 12:23:31.626718 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1525 12:23:31.635976 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1526 12:23:31.638940 PCI: 00:08.0
1527 12:23:31.639345 PCI: 00:0a.0
1528 12:23:31.649573 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1529 12:23:31.655632 PCI: 00:0d.0 child on link 0 USB0 port 0
1530 12:23:31.665808 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1531 12:23:31.669300 USB0 port 0 child on link 0 USB3 port 0
1532 12:23:31.669644 USB3 port 0
1533 12:23:31.672441 USB3 port 1
1534 12:23:31.676564 USB3 port 2
1535 12:23:31.677009 USB3 port 3
1536 12:23:31.679199 PCI: 00:14.0 child on link 0 USB0 port 0
1537 12:23:31.689078 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1538 12:23:31.696045 USB0 port 0 child on link 0 USB2 port 0
1539 12:23:31.696518 USB2 port 0
1540 12:23:31.699280 USB2 port 1
1541 12:23:31.699824 USB2 port 2
1542 12:23:31.702729 USB2 port 3
1543 12:23:31.703100 USB2 port 4
1544 12:23:31.705787 USB2 port 5
1545 12:23:31.706169 USB2 port 6
1546 12:23:31.709195 USB2 port 7
1547 12:23:31.712456 USB2 port 8
1548 12:23:31.712800 USB2 port 9
1549 12:23:31.715384 USB3 port 0
1550 12:23:31.715720 USB3 port 1
1551 12:23:31.719033 USB3 port 2
1552 12:23:31.719446 USB3 port 3
1553 12:23:31.722381 PCI: 00:14.2
1554 12:23:31.732254 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1555 12:23:31.742431 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1556 12:23:31.745627 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1557 12:23:31.755490 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1558 12:23:31.759226 GENERIC: 0.0
1559 12:23:31.762206 PCI: 00:15.0 child on link 0 I2C: 00:1a
1560 12:23:31.772184 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1561 12:23:31.772657 I2C: 00:1a
1562 12:23:31.775241 I2C: 00:31
1563 12:23:31.775613 I2C: 00:32
1564 12:23:31.782129 PCI: 00:15.1 child on link 0 I2C: 00:50
1565 12:23:31.792413 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1566 12:23:31.792894 I2C: 00:50
1567 12:23:31.793168 PCI: 00:15.2
1568 12:23:31.799627 PCI: 00:15.3 child on link 0 I2C: 00:10
1569 12:23:31.808586 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1570 12:23:31.808974 I2C: 00:10
1571 12:23:31.812143 PCI: 00:16.0
1572 12:23:31.822307 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1573 12:23:31.822786 PCI: 00:19.0
1574 12:23:31.828767 PCI: 00:19.1 child on link 0 I2C: 00:15
1575 12:23:31.838412 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1576 12:23:31.838859 I2C: 00:15
1577 12:23:31.841661 I2C: 00:2c
1578 12:23:31.842111 PCI: 00:1e.0
1579 12:23:31.851924 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1580 12:23:31.858366 PCI: 00:1e.3 child on link 0 SPI: 00
1581 12:23:31.868252 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1582 12:23:31.868731 SPI: 00
1583 12:23:31.871407 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1584 12:23:31.882118 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1585 12:23:31.882586 PNP: 0c09.0
1586 12:23:31.891515 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1587 12:23:31.895169 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1588 12:23:31.904821 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1589 12:23:31.914887 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1590 12:23:31.918598 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1591 12:23:31.921517 GENERIC: 0.0
1592 12:23:31.925012 GENERIC: 1.0
1593 12:23:31.925457 PCI: 00:1f.3
1594 12:23:31.935154 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1595 12:23:31.944474 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1596 12:23:31.948250 PCI: 00:1f.5
1597 12:23:31.954663 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1598 12:23:31.964515 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1599 12:23:31.967974 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1600 12:23:31.974754 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1601 12:23:31.981594 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1602 12:23:31.984715 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1603 12:23:31.987851 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1604 12:23:31.998291 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1605 12:23:32.004497 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1606 12:23:32.011744 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1607 12:23:32.017654 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1608 12:23:32.024474 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1609 12:23:32.034560 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1610 12:23:32.040957 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1611 12:23:32.047481 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1612 12:23:32.051256 DOMAIN: 0000: Resource ranges:
1613 12:23:32.054509 * Base: 1000, Size: 800, Tag: 100
1614 12:23:32.057600 * Base: 1900, Size: e700, Tag: 100
1615 12:23:32.064246 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1616 12:23:32.070837 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1617 12:23:32.077927 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1618 12:23:32.084503 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1619 12:23:32.091644 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1620 12:23:32.101276 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1621 12:23:32.107277 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1622 12:23:32.113940 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1623 12:23:32.124379 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1624 12:23:32.130906 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1625 12:23:32.137537 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1626 12:23:32.147064 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1627 12:23:32.154074 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1628 12:23:32.160855 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1629 12:23:32.170374 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1630 12:23:32.177384 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1631 12:23:32.183653 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1632 12:23:32.193524 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1633 12:23:32.200310 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1634 12:23:32.206621 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1635 12:23:32.217488 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1636 12:23:32.223462 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1637 12:23:32.230436 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1638 12:23:32.239961 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1639 12:23:32.246885 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1640 12:23:32.253446 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1641 12:23:32.263646 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1642 12:23:32.270195 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1643 12:23:32.276349 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1644 12:23:32.286636 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1645 12:23:32.293050 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1646 12:23:32.300129 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1647 12:23:32.309972 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1648 12:23:32.313142 DOMAIN: 0000: Resource ranges:
1649 12:23:32.316675 * Base: 80400000, Size: 3fc00000, Tag: 200
1650 12:23:32.319797 * Base: d0000000, Size: 28000000, Tag: 200
1651 12:23:32.323051 * Base: fa000000, Size: 1000000, Tag: 200
1652 12:23:32.329428 * Base: fb001000, Size: 17ff000, Tag: 200
1653 12:23:32.333120 * Base: fe800000, Size: 300000, Tag: 200
1654 12:23:32.336432 * Base: feb80000, Size: 80000, Tag: 200
1655 12:23:32.342988 * Base: fed00000, Size: 40000, Tag: 200
1656 12:23:32.346113 * Base: fed70000, Size: 10000, Tag: 200
1657 12:23:32.349456 * Base: fed88000, Size: 8000, Tag: 200
1658 12:23:32.353071 * Base: fed93000, Size: d000, Tag: 200
1659 12:23:32.356000 * Base: feda2000, Size: 1e000, Tag: 200
1660 12:23:32.363554 * Base: fede0000, Size: 1220000, Tag: 200
1661 12:23:32.366216 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1662 12:23:32.372844 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1663 12:23:32.379400 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1664 12:23:32.385996 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1665 12:23:32.392523 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1666 12:23:32.398968 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1667 12:23:32.405672 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1668 12:23:32.412679 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1669 12:23:32.419173 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1670 12:23:32.426033 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1671 12:23:32.432697 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1672 12:23:32.439053 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1673 12:23:32.446208 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1674 12:23:32.452674 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1675 12:23:32.459411 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1676 12:23:32.465959 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1677 12:23:32.472286 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1678 12:23:32.478947 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1679 12:23:32.485729 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1680 12:23:32.492483 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1681 12:23:32.501947 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1682 12:23:32.508778 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1683 12:23:32.512400 PCI: 00:06.0: Resource ranges:
1684 12:23:32.515929 * Base: 80400000, Size: 100000, Tag: 200
1685 12:23:32.522505 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1686 12:23:32.529007 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1687 12:23:32.538794 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1688 12:23:32.545434 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1689 12:23:32.548723 Root Device assign_resources, bus 0 link: 0
1690 12:23:32.555657 DOMAIN: 0000 assign_resources, bus 0 link: 0
1691 12:23:32.562110 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1692 12:23:32.568609 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1693 12:23:32.578303 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1694 12:23:32.585402 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1695 12:23:32.591742 PCI: 00:04.0 assign_resources, bus 1 link: 0
1696 12:23:32.594684 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1697 12:23:32.604961 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1698 12:23:32.615203 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1699 12:23:32.621910 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1700 12:23:32.628060 PCI: 00:06.0 assign_resources, bus 1 link: 0
1701 12:23:32.634827 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1702 12:23:32.642346 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1703 12:23:32.648297 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1704 12:23:32.655012 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1705 12:23:32.664775 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1706 12:23:32.667909 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1707 12:23:32.674268 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1708 12:23:32.681377 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1709 12:23:32.684791 PCI: 00:14.0 assign_resources, bus 0 link: 0
1710 12:23:32.690864 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1711 12:23:32.698492 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1712 12:23:32.707331 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1713 12:23:32.714092 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1714 12:23:32.717625 PCI: 00:14.3 assign_resources, bus 0 link: 0
1715 12:23:32.723997 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1716 12:23:32.731026 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1717 12:23:32.737982 PCI: 00:15.0 assign_resources, bus 0 link: 0
1718 12:23:32.740759 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1719 12:23:32.750588 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1720 12:23:32.754409 PCI: 00:15.1 assign_resources, bus 0 link: 0
1721 12:23:32.760738 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1722 12:23:32.767228 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1723 12:23:32.770924 PCI: 00:15.3 assign_resources, bus 0 link: 0
1724 12:23:32.777381 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1725 12:23:32.783678 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1726 12:23:32.793595 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1727 12:23:32.797680 PCI: 00:19.1 assign_resources, bus 0 link: 0
1728 12:23:32.800572 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1729 12:23:32.810581 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1730 12:23:32.814405 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1731 12:23:32.820534 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1732 12:23:32.823614 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1733 12:23:32.830664 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1734 12:23:32.834376 LPC: Trying to open IO window from 800 size 1ff
1735 12:23:32.840583 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1736 12:23:32.850362 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1737 12:23:32.857083 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1738 12:23:32.864016 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1739 12:23:32.866760 Root Device assign_resources, bus 0 link: 0 done
1740 12:23:32.870389 Done setting resources.
1741 12:23:32.876856 Show resources in subtree (Root Device)...After assigning values.
1742 12:23:32.880318 Root Device child on link 0 CPU_CLUSTER: 0
1743 12:23:32.886713 CPU_CLUSTER: 0 child on link 0 APIC: 00
1744 12:23:32.887063 APIC: 00
1745 12:23:32.887358 APIC: 16
1746 12:23:32.889830 APIC: 10
1747 12:23:32.890174 APIC: 12
1748 12:23:32.890411 APIC: 14
1749 12:23:32.893209 APIC: 09
1750 12:23:32.893649 APIC: 08
1751 12:23:32.896678 APIC: 01
1752 12:23:32.900115 DOMAIN: 0000 child on link 0 GPIO: 0
1753 12:23:32.909913 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1754 12:23:32.919678 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1755 12:23:32.920090 GPIO: 0
1756 12:23:32.920337 PCI: 00:00.0
1757 12:23:32.929733 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1758 12:23:32.939583 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1759 12:23:32.949853 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1760 12:23:32.959427 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1761 12:23:32.969583 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1762 12:23:32.976025 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1763 12:23:32.985855 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1764 12:23:32.996067 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1765 12:23:33.005656 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1766 12:23:33.015700 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1767 12:23:33.025866 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1768 12:23:33.036282 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1769 12:23:33.042560 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1770 12:23:33.052287 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1771 12:23:33.062070 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1772 12:23:33.072612 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1773 12:23:33.082176 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1774 12:23:33.092000 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1775 12:23:33.102607 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1776 12:23:33.112105 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1777 12:23:33.119039 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1778 12:23:33.128595 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1779 12:23:33.138390 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1780 12:23:33.148375 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1781 12:23:33.158596 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1782 12:23:33.168487 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1783 12:23:33.178334 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1784 12:23:33.188331 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1785 12:23:33.188677 PCI: 00:02.0
1786 12:23:33.197848 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1787 12:23:33.211396 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1788 12:23:33.217876 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1789 12:23:33.224616 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1790 12:23:33.234692 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1791 12:23:33.235153 GENERIC: 0.0
1792 12:23:33.241137 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1793 12:23:33.250829 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1794 12:23:33.261045 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1795 12:23:33.270861 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1796 12:23:33.273771 PCI: 01:00.0
1797 12:23:33.284137 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1798 12:23:33.294329 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1799 12:23:33.294750 PCI: 00:08.0
1800 12:23:33.297589 PCI: 00:0a.0
1801 12:23:33.307173 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1802 12:23:33.311224 PCI: 00:0d.0 child on link 0 USB0 port 0
1803 12:23:33.324126 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1804 12:23:33.327619 USB0 port 0 child on link 0 USB3 port 0
1805 12:23:33.328074 USB3 port 0
1806 12:23:33.330450 USB3 port 1
1807 12:23:33.334127 USB3 port 2
1808 12:23:33.334578 USB3 port 3
1809 12:23:33.337259 PCI: 00:14.0 child on link 0 USB0 port 0
1810 12:23:33.350566 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1811 12:23:33.353884 USB0 port 0 child on link 0 USB2 port 0
1812 12:23:33.354374 USB2 port 0
1813 12:23:33.357017 USB2 port 1
1814 12:23:33.357523 USB2 port 2
1815 12:23:33.360853 USB2 port 3
1816 12:23:33.363759 USB2 port 4
1817 12:23:33.364243 USB2 port 5
1818 12:23:33.367202 USB2 port 6
1819 12:23:33.367691 USB2 port 7
1820 12:23:33.370953 USB2 port 8
1821 12:23:33.371482 USB2 port 9
1822 12:23:33.373575 USB3 port 0
1823 12:23:33.374032 USB3 port 1
1824 12:23:33.377299 USB3 port 2
1825 12:23:33.377811 USB3 port 3
1826 12:23:33.380271 PCI: 00:14.2
1827 12:23:33.390382 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1828 12:23:33.400286 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1829 12:23:33.403653 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1830 12:23:33.413680 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1831 12:23:33.417020 GENERIC: 0.0
1832 12:23:33.420287 PCI: 00:15.0 child on link 0 I2C: 00:1a
1833 12:23:33.430141 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1834 12:23:33.433711 I2C: 00:1a
1835 12:23:33.434187 I2C: 00:31
1836 12:23:33.436954 I2C: 00:32
1837 12:23:33.440142 PCI: 00:15.1 child on link 0 I2C: 00:50
1838 12:23:33.450165 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1839 12:23:33.453446 I2C: 00:50
1840 12:23:33.453917 PCI: 00:15.2
1841 12:23:33.459989 PCI: 00:15.3 child on link 0 I2C: 00:10
1842 12:23:33.469605 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1843 12:23:33.470055 I2C: 00:10
1844 12:23:33.472983 PCI: 00:16.0
1845 12:23:33.482964 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1846 12:23:33.483462 PCI: 00:19.0
1847 12:23:33.490058 PCI: 00:19.1 child on link 0 I2C: 00:15
1848 12:23:33.499883 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1849 12:23:33.500232 I2C: 00:15
1850 12:23:33.502905 I2C: 00:2c
1851 12:23:33.503301 PCI: 00:1e.0
1852 12:23:33.512672 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1853 12:23:33.520028 PCI: 00:1e.3 child on link 0 SPI: 00
1854 12:23:33.529620 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1855 12:23:33.530046 SPI: 00
1856 12:23:33.536249 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1857 12:23:33.543023 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1858 12:23:33.546195 PNP: 0c09.0
1859 12:23:33.552870 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1860 12:23:33.559280 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1861 12:23:33.565905 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1862 12:23:33.576021 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1863 12:23:33.582817 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1864 12:23:33.583198 GENERIC: 0.0
1865 12:23:33.585682 GENERIC: 1.0
1866 12:23:33.586029 PCI: 00:1f.3
1867 12:23:33.596124 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1868 12:23:33.608987 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1869 12:23:33.609504 PCI: 00:1f.5
1870 12:23:33.619171 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1871 12:23:33.622335 Done allocating resources.
1872 12:23:33.629745 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms
1873 12:23:33.633164 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1874 12:23:33.639238 Configure audio over I2S with MAX98373 NAU88L25B.
1875 12:23:33.643415 Enabling BT offload
1876 12:23:33.650983 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1877 12:23:33.654226 Enabling resources...
1878 12:23:33.657586 PCI: 00:00.0 subsystem <- 8086/4609
1879 12:23:33.660797 PCI: 00:00.0 cmd <- 06
1880 12:23:33.664013 PCI: 00:02.0 subsystem <- 8086/46b3
1881 12:23:33.667631 PCI: 00:02.0 cmd <- 03
1882 12:23:33.670964 PCI: 00:04.0 subsystem <- 8086/461d
1883 12:23:33.671500 PCI: 00:04.0 cmd <- 02
1884 12:23:33.674233 PCI: 00:06.0 bridge ctrl <- 0013
1885 12:23:33.677219 PCI: 00:06.0 subsystem <- 8086/464d
1886 12:23:33.680613 PCI: 00:06.0 cmd <- 106
1887 12:23:33.683633 PCI: 00:0a.0 subsystem <- 8086/467d
1888 12:23:33.687201 PCI: 00:0a.0 cmd <- 02
1889 12:23:33.690540 PCI: 00:0d.0 subsystem <- 8086/461e
1890 12:23:33.694209 PCI: 00:0d.0 cmd <- 02
1891 12:23:33.697633 PCI: 00:14.0 subsystem <- 8086/51ed
1892 12:23:33.701049 PCI: 00:14.0 cmd <- 02
1893 12:23:33.703394 PCI: 00:14.2 subsystem <- 8086/51ef
1894 12:23:33.703778 PCI: 00:14.2 cmd <- 02
1895 12:23:33.710263 PCI: 00:14.3 subsystem <- 8086/51f0
1896 12:23:33.710641 PCI: 00:14.3 cmd <- 02
1897 12:23:33.713808 PCI: 00:15.0 subsystem <- 8086/51e8
1898 12:23:33.717166 PCI: 00:15.0 cmd <- 02
1899 12:23:33.720340 PCI: 00:15.1 subsystem <- 8086/51e9
1900 12:23:33.723713 PCI: 00:15.1 cmd <- 06
1901 12:23:33.726996 PCI: 00:15.3 subsystem <- 8086/51eb
1902 12:23:33.730575 PCI: 00:15.3 cmd <- 02
1903 12:23:33.733600 PCI: 00:16.0 subsystem <- 8086/51e0
1904 12:23:33.734135 PCI: 00:16.0 cmd <- 02
1905 12:23:33.740651 PCI: 00:19.1 subsystem <- 8086/51c6
1906 12:23:33.741139 PCI: 00:19.1 cmd <- 02
1907 12:23:33.743554 PCI: 00:1e.0 subsystem <- 8086/51a8
1908 12:23:33.747114 PCI: 00:1e.0 cmd <- 06
1909 12:23:33.750508 PCI: 00:1e.3 subsystem <- 8086/51ab
1910 12:23:33.753763 PCI: 00:1e.3 cmd <- 02
1911 12:23:33.757161 PCI: 00:1f.0 subsystem <- 8086/5182
1912 12:23:33.760447 PCI: 00:1f.0 cmd <- 407
1913 12:23:33.763638 PCI: 00:1f.3 subsystem <- 8086/51c8
1914 12:23:33.764137 PCI: 00:1f.3 cmd <- 02
1915 12:23:33.770180 PCI: 00:1f.5 subsystem <- 8086/51a4
1916 12:23:33.770670 PCI: 00:1f.5 cmd <- 406
1917 12:23:33.773746 PCI: 01:00.0 cmd <- 02
1918 12:23:33.774235 done.
1919 12:23:33.780197 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1920 12:23:33.783427 ME: Version: Unavailable
1921 12:23:33.786848 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1922 12:23:33.789988 Initializing devices...
1923 12:23:33.793329 Root Device init
1924 12:23:33.793774 mainboard: EC init
1925 12:23:33.799890 Chrome EC: Set SMI mask to 0x0000000000000000
1926 12:23:33.803353 Chrome EC: UHEPI supported
1927 12:23:33.809617 Chrome EC: clear events_b mask to 0x0000000000000000
1928 12:23:33.816427 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1929 12:23:33.819757 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1930 12:23:33.826531 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1931 12:23:33.832545 Chrome EC: Set WAKE mask to 0x0000000000000000
1932 12:23:33.836530 Root Device init finished in 39 msecs
1933 12:23:33.839466 PCI: 00:00.0 init
1934 12:23:33.839841 CPU TDP = 15 Watts
1935 12:23:33.842728 CPU PL1 = 15 Watts
1936 12:23:33.845814 CPU PL2 = 55 Watts
1937 12:23:33.846196 CPU PL4 = 123 Watts
1938 12:23:33.849096 PCI: 00:00.0 init finished in 8 msecs
1939 12:23:33.852726 PCI: 00:02.0 init
1940 12:23:33.856237 GMA: Found VBT in CBFS
1941 12:23:33.859430 GMA: Found valid VBT in CBFS
1942 12:23:33.862984 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1943 12:23:33.872676 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1944 12:23:33.875789 PCI: 00:02.0 init finished in 18 msecs
1945 12:23:33.876163 PCI: 00:06.0 init
1946 12:23:33.879052 Initializing PCH PCIe bridge.
1947 12:23:33.882616 PCI: 00:06.0 init finished in 3 msecs
1948 12:23:33.886267 PCI: 00:0a.0 init
1949 12:23:33.889022 PCI: 00:0a.0 init finished in 0 msecs
1950 12:23:33.892259 PCI: 00:14.0 init
1951 12:23:33.895903 PCI: 00:14.0 init finished in 0 msecs
1952 12:23:33.896241 PCI: 00:14.2 init
1953 12:23:33.898933 PCI: 00:14.2 init finished in 0 msecs
1954 12:23:33.902369 PCI: 00:15.0 init
1955 12:23:33.905916 I2C bus 0 version 0x3230302a
1956 12:23:33.908885 DW I2C bus 0 at 0x80655000 (400 KHz)
1957 12:23:33.912338 PCI: 00:15.0 init finished in 6 msecs
1958 12:23:33.915721 PCI: 00:15.1 init
1959 12:23:33.918822 I2C bus 1 version 0x3230302a
1960 12:23:33.922123 DW I2C bus 1 at 0x80656000 (400 KHz)
1961 12:23:33.925315 PCI: 00:15.1 init finished in 6 msecs
1962 12:23:33.925707 PCI: 00:15.3 init
1963 12:23:33.928689 I2C bus 3 version 0x3230302a
1964 12:23:33.932211 DW I2C bus 3 at 0x80657000 (400 KHz)
1965 12:23:33.938840 PCI: 00:15.3 init finished in 6 msecs
1966 12:23:33.939260 PCI: 00:16.0 init
1967 12:23:33.942234 PCI: 00:16.0 init finished in 0 msecs
1968 12:23:33.945473 PCI: 00:19.1 init
1969 12:23:33.949146 I2C bus 5 version 0x3230302a
1970 12:23:33.952137 DW I2C bus 5 at 0x80659000 (400 KHz)
1971 12:23:33.955461 PCI: 00:19.1 init finished in 6 msecs
1972 12:23:33.958441 PCI: 00:1f.0 init
1973 12:23:33.961805 IOAPIC: Initializing IOAPIC at 0xfec00000
1974 12:23:33.965425 IOAPIC: ID = 0x02
1975 12:23:33.965845 IOAPIC: Dumping registers
1976 12:23:33.968363 reg 0x0000: 0x02000000
1977 12:23:33.971916 reg 0x0001: 0x00770020
1978 12:23:33.975008 reg 0x0002: 0x00000000
1979 12:23:33.975482 IOAPIC: 120 interrupts
1980 12:23:33.978622 IOAPIC: Clearing IOAPIC at 0xfec00000
1981 12:23:33.985264 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1982 12:23:33.989114 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1983 12:23:33.994935 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1984 12:23:33.998670 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1985 12:23:34.005218 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1986 12:23:34.008230 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1987 12:23:34.014917 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1988 12:23:34.018267 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1989 12:23:34.021901 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1990 12:23:34.027989 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1991 12:23:34.031789 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1992 12:23:34.038399 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1993 12:23:34.041857 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1994 12:23:34.048315 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1995 12:23:34.051785 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1996 12:23:34.058404 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1997 12:23:34.061782 IOAPIC: vector 0x10 value 0x00000000 0x00010000
1998 12:23:34.064805 IOAPIC: vector 0x11 value 0x00000000 0x00010000
1999 12:23:34.071489 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2000 12:23:34.074928 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2001 12:23:34.081572 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2002 12:23:34.084981 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2003 12:23:34.091491 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2004 12:23:34.095004 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2005 12:23:34.102246 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2006 12:23:34.105044 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2007 12:23:34.107733 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2008 12:23:34.114825 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2009 12:23:34.118200 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2010 12:23:34.125068 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2011 12:23:34.128513 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2012 12:23:34.134903 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2013 12:23:34.138008 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2014 12:23:34.144886 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2015 12:23:34.147842 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2016 12:23:34.151043 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2017 12:23:34.158367 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2018 12:23:34.161580 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2019 12:23:34.168378 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2020 12:23:34.171653 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2021 12:23:34.177932 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2022 12:23:34.181291 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2023 12:23:34.188212 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2024 12:23:34.191031 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2025 12:23:34.194413 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2026 12:23:34.201112 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2027 12:23:34.204795 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2028 12:23:34.210695 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2029 12:23:34.214511 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2030 12:23:34.221432 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2031 12:23:34.224298 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2032 12:23:34.230901 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2033 12:23:34.234157 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2034 12:23:34.237852 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2035 12:23:34.244472 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2036 12:23:34.247443 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2037 12:23:34.254796 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2038 12:23:34.257650 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2039 12:23:34.264107 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2040 12:23:34.267729 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2041 12:23:34.270945 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2042 12:23:34.277538 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2043 12:23:34.281244 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2044 12:23:34.287224 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2045 12:23:34.290558 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2046 12:23:34.297364 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2047 12:23:34.301104 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2048 12:23:34.307392 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2049 12:23:34.310453 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2050 12:23:34.314665 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2051 12:23:34.320400 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2052 12:23:34.323864 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2053 12:23:34.330523 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2054 12:23:34.333829 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2055 12:23:34.340773 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2056 12:23:34.343720 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2057 12:23:34.350686 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2058 12:23:34.353738 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2059 12:23:34.356822 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2060 12:23:34.363785 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2061 12:23:34.366868 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2062 12:23:34.373787 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2063 12:23:34.376950 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2064 12:23:34.383512 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2065 12:23:34.386776 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2066 12:23:34.393310 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2067 12:23:34.396675 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2068 12:23:34.399860 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2069 12:23:34.407002 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2070 12:23:34.410156 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2071 12:23:34.416928 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2072 12:23:34.420189 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2073 12:23:34.426727 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2074 12:23:34.429889 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2075 12:23:34.436675 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2076 12:23:34.439804 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2077 12:23:34.443329 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2078 12:23:34.450023 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2079 12:23:34.453319 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2080 12:23:34.460451 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2081 12:23:34.463156 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2082 12:23:34.469970 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2083 12:23:34.473639 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2084 12:23:34.479975 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2085 12:23:34.482973 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2086 12:23:34.486633 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2087 12:23:34.493085 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2088 12:23:34.496534 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2089 12:23:34.503672 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2090 12:23:34.506465 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2091 12:23:34.513064 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2092 12:23:34.516527 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2093 12:23:34.523200 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2094 12:23:34.526556 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2095 12:23:34.529911 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2096 12:23:34.536143 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2097 12:23:34.539766 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2098 12:23:34.546590 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2099 12:23:34.550048 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2100 12:23:34.556053 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2101 12:23:34.559188 IOAPIC: Bootstrap Processor Local APIC = 0x00
2102 12:23:34.562669 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2103 12:23:34.569867 PCI: 00:1f.0 init finished in 607 msecs
2104 12:23:34.570145 PCI: 00:1f.2 init
2105 12:23:34.573300 apm_control: Disabling ACPI.
2106 12:23:34.577267 APMC done.
2107 12:23:34.580719 PCI: 00:1f.2 init finished in 6 msecs
2108 12:23:34.583824 PCI: 00:1f.3 init
2109 12:23:34.587055 PCI: 00:1f.3 init finished in 0 msecs
2110 12:23:34.587433 PCI: 01:00.0 init
2111 12:23:34.590397 PCI: 01:00.0 init finished in 0 msecs
2112 12:23:34.593698 PNP: 0c09.0 init
2113 12:23:34.597069 Google Chrome EC uptime: 12.178 seconds
2114 12:23:34.603789 Google Chrome AP resets since EC boot: 1
2115 12:23:34.606965 Google Chrome most recent AP reset causes:
2116 12:23:34.609914 0.341: 32775 shutdown: entering G3
2117 12:23:34.616874 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2118 12:23:34.619905 PNP: 0c09.0 init finished in 23 msecs
2119 12:23:34.623395 GENERIC: 0.0 init
2120 12:23:34.626904 GENERIC: 0.0 init finished in 0 msecs
2121 12:23:34.627358 GENERIC: 1.0 init
2122 12:23:34.633435 GENERIC: 1.0 init finished in 0 msecs
2123 12:23:34.633843 Devices initialized
2124 12:23:34.637121 Show all devs... After init.
2125 12:23:34.639983 Root Device: enabled 1
2126 12:23:34.643942 CPU_CLUSTER: 0: enabled 1
2127 12:23:34.644355 DOMAIN: 0000: enabled 1
2128 12:23:34.647045 GPIO: 0: enabled 1
2129 12:23:34.649962 PCI: 00:00.0: enabled 1
2130 12:23:34.650393 PCI: 00:01.0: enabled 0
2131 12:23:34.653492 PCI: 00:01.1: enabled 0
2132 12:23:34.656360 PCI: 00:02.0: enabled 1
2133 12:23:34.660055 PCI: 00:04.0: enabled 1
2134 12:23:34.660507 PCI: 00:05.0: enabled 0
2135 12:23:34.663241 PCI: 00:06.0: enabled 1
2136 12:23:34.666609 PCI: 00:06.2: enabled 0
2137 12:23:34.669813 PCI: 00:07.0: enabled 0
2138 12:23:34.670256 PCI: 00:07.1: enabled 0
2139 12:23:34.673353 PCI: 00:07.2: enabled 0
2140 12:23:34.676506 PCI: 00:07.3: enabled 0
2141 12:23:34.679924 PCI: 00:08.0: enabled 0
2142 12:23:34.680305 PCI: 00:09.0: enabled 0
2143 12:23:34.682750 PCI: 00:0a.0: enabled 1
2144 12:23:34.686035 PCI: 00:0d.0: enabled 1
2145 12:23:34.686381 PCI: 00:0d.1: enabled 0
2146 12:23:34.689580 PCI: 00:0d.2: enabled 0
2147 12:23:34.693303 PCI: 00:0d.3: enabled 0
2148 12:23:34.696657 PCI: 00:0e.0: enabled 0
2149 12:23:34.696999 PCI: 00:10.0: enabled 0
2150 12:23:34.699856 PCI: 00:10.1: enabled 0
2151 12:23:34.703328 PCI: 00:10.6: enabled 0
2152 12:23:34.706494 PCI: 00:10.7: enabled 0
2153 12:23:34.706910 PCI: 00:12.0: enabled 0
2154 12:23:34.709632 PCI: 00:12.6: enabled 0
2155 12:23:34.713541 PCI: 00:12.7: enabled 0
2156 12:23:34.716259 PCI: 00:13.0: enabled 0
2157 12:23:34.716691 PCI: 00:14.0: enabled 1
2158 12:23:34.719942 PCI: 00:14.1: enabled 0
2159 12:23:34.723309 PCI: 00:14.2: enabled 1
2160 12:23:34.726222 PCI: 00:14.3: enabled 1
2161 12:23:34.726757 PCI: 00:15.0: enabled 1
2162 12:23:34.729567 PCI: 00:15.1: enabled 1
2163 12:23:34.732848 PCI: 00:15.2: enabled 0
2164 12:23:34.733193 PCI: 00:15.3: enabled 1
2165 12:23:34.736360 PCI: 00:16.0: enabled 1
2166 12:23:34.739724 PCI: 00:16.1: enabled 0
2167 12:23:34.742705 PCI: 00:16.2: enabled 0
2168 12:23:34.743047 PCI: 00:16.3: enabled 0
2169 12:23:34.746263 PCI: 00:16.4: enabled 0
2170 12:23:34.749483 PCI: 00:16.5: enabled 0
2171 12:23:34.752738 PCI: 00:17.0: enabled 0
2172 12:23:34.753103 PCI: 00:19.0: enabled 0
2173 12:23:34.756663 PCI: 00:19.1: enabled 1
2174 12:23:34.759436 PCI: 00:19.2: enabled 0
2175 12:23:34.763272 PCI: 00:1a.0: enabled 0
2176 12:23:34.763687 PCI: 00:1c.0: enabled 0
2177 12:23:34.766087 PCI: 00:1c.1: enabled 0
2178 12:23:34.769241 PCI: 00:1c.2: enabled 0
2179 12:23:34.769587 PCI: 00:1c.3: enabled 0
2180 12:23:34.772686 PCI: 00:1c.4: enabled 0
2181 12:23:34.776233 PCI: 00:1c.5: enabled 0
2182 12:23:34.779105 PCI: 00:1c.6: enabled 0
2183 12:23:34.779490 PCI: 00:1c.7: enabled 0
2184 12:23:34.782745 PCI: 00:1d.0: enabled 0
2185 12:23:34.785745 PCI: 00:1d.1: enabled 0
2186 12:23:34.789553 PCI: 00:1d.2: enabled 0
2187 12:23:34.789878 PCI: 00:1d.3: enabled 0
2188 12:23:34.792693 PCI: 00:1e.0: enabled 1
2189 12:23:34.795872 PCI: 00:1e.1: enabled 0
2190 12:23:34.798987 PCI: 00:1e.2: enabled 0
2191 12:23:34.799426 PCI: 00:1e.3: enabled 1
2192 12:23:34.802696 PCI: 00:1f.0: enabled 1
2193 12:23:34.805989 PCI: 00:1f.1: enabled 0
2194 12:23:34.809082 PCI: 00:1f.2: enabled 1
2195 12:23:34.809566 PCI: 00:1f.3: enabled 1
2196 12:23:34.812867 PCI: 00:1f.4: enabled 0
2197 12:23:34.815997 PCI: 00:1f.5: enabled 1
2198 12:23:34.816341 PCI: 00:1f.6: enabled 0
2199 12:23:34.819074 PCI: 00:1f.7: enabled 0
2200 12:23:34.822404 GENERIC: 0.0: enabled 1
2201 12:23:34.826284 GENERIC: 0.0: enabled 1
2202 12:23:34.826796 GENERIC: 1.0: enabled 1
2203 12:23:34.829276 GENERIC: 0.0: enabled 1
2204 12:23:34.832357 GENERIC: 1.0: enabled 1
2205 12:23:34.836037 USB0 port 0: enabled 1
2206 12:23:34.836544 USB0 port 0: enabled 1
2207 12:23:34.839291 GENERIC: 0.0: enabled 1
2208 12:23:34.842968 I2C: 00:1a: enabled 1
2209 12:23:34.843384 I2C: 00:31: enabled 1
2210 12:23:34.846064 I2C: 00:32: enabled 1
2211 12:23:34.849151 I2C: 00:50: enabled 1
2212 12:23:34.849732 I2C: 00:10: enabled 1
2213 12:23:34.852607 I2C: 00:15: enabled 1
2214 12:23:34.855975 I2C: 00:2c: enabled 1
2215 12:23:34.858982 GENERIC: 0.0: enabled 1
2216 12:23:34.859358 SPI: 00: enabled 1
2217 12:23:34.862255 PNP: 0c09.0: enabled 1
2218 12:23:34.865560 GENERIC: 0.0: enabled 1
2219 12:23:34.866033 USB3 port 0: enabled 1
2220 12:23:34.869105 USB3 port 1: enabled 0
2221 12:23:34.872573 USB3 port 2: enabled 1
2222 12:23:34.873039 USB3 port 3: enabled 0
2223 12:23:34.875753 USB2 port 0: enabled 1
2224 12:23:34.878884 USB2 port 1: enabled 0
2225 12:23:34.879470 USB2 port 2: enabled 1
2226 12:23:34.882385 USB2 port 3: enabled 0
2227 12:23:34.885716 USB2 port 4: enabled 0
2228 12:23:34.888828 USB2 port 5: enabled 1
2229 12:23:34.889256 USB2 port 6: enabled 0
2230 12:23:34.892209 USB2 port 7: enabled 0
2231 12:23:34.895685 USB2 port 8: enabled 1
2232 12:23:34.896070 USB2 port 9: enabled 1
2233 12:23:34.899032 USB3 port 0: enabled 1
2234 12:23:34.902607 USB3 port 1: enabled 0
2235 12:23:34.905521 USB3 port 2: enabled 0
2236 12:23:34.905874 USB3 port 3: enabled 0
2237 12:23:34.908979 GENERIC: 0.0: enabled 1
2238 12:23:34.912007 GENERIC: 1.0: enabled 1
2239 12:23:34.912352 APIC: 00: enabled 1
2240 12:23:34.915730 APIC: 16: enabled 1
2241 12:23:34.919433 APIC: 10: enabled 1
2242 12:23:34.920049 APIC: 12: enabled 1
2243 12:23:34.922415 APIC: 14: enabled 1
2244 12:23:34.922975 APIC: 09: enabled 1
2245 12:23:34.925653 APIC: 08: enabled 1
2246 12:23:34.929456 APIC: 01: enabled 1
2247 12:23:34.929997 PCI: 01:00.0: enabled 1
2248 12:23:34.935633 BS: BS_DEV_INIT run times (exec / console): 9 / 1133 ms
2249 12:23:34.942743 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2250 12:23:34.945559 ELOG: NV offset 0xf20000 size 0x4000
2251 12:23:34.952895 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2252 12:23:34.958990 ELOG: Event(17) added with size 13 at 2023-11-08 12:23:34 UTC
2253 12:23:34.965902 ELOG: Event(9E) added with size 10 at 2023-11-08 12:23:34 UTC
2254 12:23:34.972499 ELOG: Event(9F) added with size 14 at 2023-11-08 12:23:35 UTC
2255 12:23:34.979060 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2256 12:23:34.985275 ELOG: Event(A0) added with size 9 at 2023-11-08 12:23:35 UTC
2257 12:23:34.988834 elog_add_boot_reason: Logged dev mode boot
2258 12:23:34.995042 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2259 12:23:34.995453 Finalize devices...
2260 12:23:34.998767 PCI: 00:16.0 final
2261 12:23:34.999409 PCI: 00:1f.2 final
2262 12:23:35.001846 GENERIC: 0.0 final
2263 12:23:35.008158 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2264 12:23:35.008520 GENERIC: 1.0 final
2265 12:23:35.015511 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2266 12:23:35.018297 Devices finalized
2267 12:23:35.025121 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2268 12:23:35.028379 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2269 12:23:35.034818 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2270 12:23:35.037900 ME: HFSTS1 : 0x90000245
2271 12:23:35.045056 ME: HFSTS2 : 0x82100116
2272 12:23:35.048184 ME: HFSTS3 : 0x00000050
2273 12:23:35.051683 ME: HFSTS4 : 0x00004000
2274 12:23:35.058519 ME: HFSTS5 : 0x00000000
2275 12:23:35.061404 ME: HFSTS6 : 0x40600006
2276 12:23:35.064994 ME: Manufacturing Mode : NO
2277 12:23:35.067837 ME: SPI Protection Mode Enabled : YES
2278 12:23:35.074482 ME: FPFs Committed : YES
2279 12:23:35.077905 ME: Manufacturing Vars Locked : YES
2280 12:23:35.081432 ME: FW Partition Table : OK
2281 12:23:35.084074 ME: Bringup Loader Failure : NO
2282 12:23:35.087975 ME: Firmware Init Complete : YES
2283 12:23:35.090713 ME: Boot Options Present : NO
2284 12:23:35.093933 ME: Update In Progress : NO
2285 12:23:35.097773 ME: D0i3 Support : YES
2286 12:23:35.104060 ME: Low Power State Enabled : NO
2287 12:23:35.107893 ME: CPU Replaced : YES
2288 12:23:35.110893 ME: CPU Replacement Valid : YES
2289 12:23:35.114096 ME: Current Working State : 5
2290 12:23:35.118100 ME: Current Operation State : 1
2291 12:23:35.120861 ME: Current Operation Mode : 0
2292 12:23:35.124021 ME: Error Code : 0
2293 12:23:35.127740 ME: Enhanced Debug Mode : NO
2294 12:23:35.133936 ME: CPU Debug Disabled : YES
2295 12:23:35.137268 ME: TXT Support : NO
2296 12:23:35.140500 ME: WP for RO is enabled : YES
2297 12:23:35.147523 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2298 12:23:35.150948 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2299 12:23:35.157484 Ramoops buffer: 0x100000@0x76899000.
2300 12:23:35.160855 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2301 12:23:35.170584 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2302 12:23:35.174246 CBFS: 'fallback/slic' not found.
2303 12:23:35.177228 ACPI: Writing ACPI tables at 7686d000.
2304 12:23:35.177666 ACPI: * FACS
2305 12:23:35.180401 ACPI: * DSDT
2306 12:23:35.186757 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2307 12:23:35.190272 ACPI: * FADT
2308 12:23:35.190619 SCI is IRQ9
2309 12:23:35.193705 ACPI: added table 1/32, length now 40
2310 12:23:35.196990 ACPI: * SSDT
2311 12:23:35.203398 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2312 12:23:35.207211 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2313 12:23:35.214116 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2314 12:23:35.217105 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2315 12:23:35.223423 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2316 12:23:35.226782 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2317 12:23:35.233381 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2318 12:23:35.240270 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2319 12:23:35.243282 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2320 12:23:35.250349 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2321 12:23:35.253347 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2322 12:23:35.259943 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2323 12:23:35.263103 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2324 12:23:35.270251 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2325 12:23:35.276410 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2326 12:23:35.279709 PS2K: Passing 80 keymaps to kernel
2327 12:23:35.286554 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2328 12:23:35.293363 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2329 12:23:35.299882 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2330 12:23:35.306512 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2331 12:23:35.309471 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2332 12:23:35.316055 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2333 12:23:35.322937 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2334 12:23:35.329801 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2335 12:23:35.336806 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2336 12:23:35.342642 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2337 12:23:35.346269 ACPI: added table 2/32, length now 44
2338 12:23:35.346614 ACPI: * MCFG
2339 12:23:35.352809 ACPI: added table 3/32, length now 48
2340 12:23:35.353214 ACPI: * TPM2
2341 12:23:35.356249 TPM2 log created at 0x7685d000
2342 12:23:35.359575 ACPI: added table 4/32, length now 52
2343 12:23:35.362879 ACPI: * LPIT
2344 12:23:35.366008 ACPI: added table 5/32, length now 56
2345 12:23:35.366355 ACPI: * MADT
2346 12:23:35.369451 SCI is IRQ9
2347 12:23:35.372673 ACPI: added table 6/32, length now 60
2348 12:23:35.376159 cmd_reg from pmc_make_ipc_cmd 1052838
2349 12:23:35.382604 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2350 12:23:35.389208 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2351 12:23:35.395632 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2352 12:23:35.398961 PMC CrashLog size in discovery mode: 0xC00
2353 12:23:35.402437 cpu crashlog bar addr: 0x80640000
2354 12:23:35.405734 cpu discovery table offset: 0x6030
2355 12:23:35.409056 cpu_crashlog_discovery_table buffer count: 0x3
2356 12:23:35.415667 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2357 12:23:35.422598 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2358 12:23:35.429246 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2359 12:23:35.435934 PMC crashLog size in discovery mode : 0xC00
2360 12:23:35.442604 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2361 12:23:35.445633 discover mode PMC crashlog size adjusted to: 0x200
2362 12:23:35.452863 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2363 12:23:35.459193 discover mode PMC crashlog size adjusted to: 0x0
2364 12:23:35.462342 m_cpu_crashLog_size : 0x3480 bytes
2365 12:23:35.465740 CPU crashLog present.
2366 12:23:35.468825 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2367 12:23:35.475878 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2368 12:23:35.478886 current = 76876550
2369 12:23:35.479331 ACPI: * DMAR
2370 12:23:35.485761 ACPI: added table 7/32, length now 64
2371 12:23:35.488580 ACPI: added table 8/32, length now 68
2372 12:23:35.488926 ACPI: * HPET
2373 12:23:35.492211 ACPI: added table 9/32, length now 72
2374 12:23:35.495368 ACPI: done.
2375 12:23:35.495807 ACPI tables: 38528 bytes.
2376 12:23:35.498565 smbios_write_tables: 76857000
2377 12:23:35.503902 EC returned error result code 3
2378 12:23:35.509786 Couldn't obtain OEM name from CBI
2379 12:23:35.510136 Create SMBIOS type 16
2380 12:23:35.513236 Create SMBIOS type 17
2381 12:23:35.516820 Create SMBIOS type 20
2382 12:23:35.517285 GENERIC: 0.0 (WIFI Device)
2383 12:23:35.520407 SMBIOS tables: 2156 bytes.
2384 12:23:35.522978 Writing table forward entry at 0x00000500
2385 12:23:35.530320 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2386 12:23:35.533196 Writing coreboot table at 0x76891000
2387 12:23:35.540014 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2388 12:23:35.546720 1. 0000000000001000-000000000009ffff: RAM
2389 12:23:35.550389 2. 00000000000a0000-00000000000fffff: RESERVED
2390 12:23:35.553380 3. 0000000000100000-0000000076856fff: RAM
2391 12:23:35.559975 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2392 12:23:35.566950 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2393 12:23:35.569723 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2394 12:23:35.576667 7. 0000000077000000-00000000803fffff: RESERVED
2395 12:23:35.579855 8. 00000000c0000000-00000000cfffffff: RESERVED
2396 12:23:35.586158 9. 00000000f8000000-00000000f9ffffff: RESERVED
2397 12:23:35.589538 10. 00000000fb000000-00000000fb000fff: RESERVED
2398 12:23:35.596743 11. 00000000fc800000-00000000fe7fffff: RESERVED
2399 12:23:35.599458 12. 00000000feb00000-00000000feb7ffff: RESERVED
2400 12:23:35.602975 13. 00000000fec00000-00000000fecfffff: RESERVED
2401 12:23:35.609419 14. 00000000fed40000-00000000fed6ffff: RESERVED
2402 12:23:35.612628 15. 00000000fed80000-00000000fed87fff: RESERVED
2403 12:23:35.619815 16. 00000000fed90000-00000000fed92fff: RESERVED
2404 12:23:35.622905 17. 00000000feda0000-00000000feda1fff: RESERVED
2405 12:23:35.629734 18. 00000000fedc0000-00000000feddffff: RESERVED
2406 12:23:35.632723 19. 0000000100000000-000000027fbfffff: RAM
2407 12:23:35.636123 Passing 4 GPIOs to payload:
2408 12:23:35.639268 NAME | PORT | POLARITY | VALUE
2409 12:23:35.646361 lid | undefined | high | high
2410 12:23:35.652885 power | undefined | high | low
2411 12:23:35.656126 oprom | undefined | high | low
2412 12:23:35.662985 EC in RW | 0x00000151 | high | high
2413 12:23:35.663477 Board ID: 3
2414 12:23:35.666080 FW config: 0x131
2415 12:23:35.672871 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum 647a
2416 12:23:35.673328 coreboot table: 1788 bytes.
2417 12:23:35.679872 IMD ROOT 0. 0x76fff000 0x00001000
2418 12:23:35.682618 IMD SMALL 1. 0x76ffe000 0x00001000
2419 12:23:35.685761 FSP MEMORY 2. 0x76afe000 0x00500000
2420 12:23:35.689107 CONSOLE 3. 0x76ade000 0x00020000
2421 12:23:35.692644 RW MCACHE 4. 0x76add000 0x0000043c
2422 12:23:35.695775 RO MCACHE 5. 0x76adc000 0x00000fd8
2423 12:23:35.698872 FMAP 6. 0x76adb000 0x0000064a
2424 12:23:35.702324 TIME STAMP 7. 0x76ada000 0x00000910
2425 12:23:35.709270 VBOOT WORK 8. 0x76ac6000 0x00014000
2426 12:23:35.712165 MEM INFO 9. 0x76ac5000 0x000003b8
2427 12:23:35.716229 ROMSTG STCK10. 0x76ac4000 0x00001000
2428 12:23:35.719478 AFTER CAR 11. 0x76ab8000 0x0000c000
2429 12:23:35.722474 RAMSTAGE 12. 0x76a2e000 0x0008a000
2430 12:23:35.725747 ACPI BERT 13. 0x76a1e000 0x00010000
2431 12:23:35.728870 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2432 12:23:35.732755 REFCODE 15. 0x769ae000 0x0006f000
2433 12:23:35.738851 SMM BACKUP 16. 0x7699e000 0x00010000
2434 12:23:35.742399 IGD OPREGION17. 0x76999000 0x00004203
2435 12:23:35.745738 RAMOOPS 18. 0x76899000 0x00100000
2436 12:23:35.748941 COREBOOT 19. 0x76891000 0x00008000
2437 12:23:35.752331 ACPI 20. 0x7686d000 0x00024000
2438 12:23:35.755370 TPM2 TCGLOG21. 0x7685d000 0x00010000
2439 12:23:35.758868 PMC CRASHLOG22. 0x7685c000 0x00000c00
2440 12:23:35.765934 CPU CRASHLOG23. 0x76858000 0x00003480
2441 12:23:35.769048 SMBIOS 24. 0x76857000 0x00001000
2442 12:23:35.769509 IMD small region:
2443 12:23:35.772132 IMD ROOT 0. 0x76ffec00 0x00000400
2444 12:23:35.779008 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2445 12:23:35.782067 VPD 2. 0x76ffeb60 0x0000006c
2446 12:23:35.785187 POWER STATE 3. 0x76ffeb00 0x00000044
2447 12:23:35.788966 ROMSTAGE 4. 0x76ffeae0 0x00000004
2448 12:23:35.792551 ACPI GNVS 5. 0x76ffea80 0x00000048
2449 12:23:35.798597 TYPE_C INFO 6. 0x76ffea60 0x0000000c
2450 12:23:35.801890 BS: BS_WRITE_TABLES run times (exec / console): 7 / 628 ms
2451 12:23:35.805122 MTRR: Physical address space:
2452 12:23:35.812162 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2453 12:23:35.818651 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2454 12:23:35.825566 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2455 12:23:35.831690 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2456 12:23:35.838337 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2457 12:23:35.841886 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2458 12:23:35.848755 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2459 12:23:35.855323 MTRR: Fixed MSR 0x250 0x0606060606060606
2460 12:23:35.858672 MTRR: Fixed MSR 0x258 0x0606060606060606
2461 12:23:35.862229 MTRR: Fixed MSR 0x259 0x0000000000000000
2462 12:23:35.864750 MTRR: Fixed MSR 0x268 0x0606060606060606
2463 12:23:35.871602 MTRR: Fixed MSR 0x269 0x0606060606060606
2464 12:23:35.875038 MTRR: Fixed MSR 0x26a 0x0606060606060606
2465 12:23:35.878111 MTRR: Fixed MSR 0x26b 0x0606060606060606
2466 12:23:35.881728 MTRR: Fixed MSR 0x26c 0x0606060606060606
2467 12:23:35.888227 MTRR: Fixed MSR 0x26d 0x0606060606060606
2468 12:23:35.891381 MTRR: Fixed MSR 0x26e 0x0606060606060606
2469 12:23:35.894502 MTRR: Fixed MSR 0x26f 0x0606060606060606
2470 12:23:35.898101 call enable_fixed_mtrr()
2471 12:23:35.901468 CPU physical address size: 39 bits
2472 12:23:35.907733 MTRR: default type WB/UC MTRR counts: 6/6.
2473 12:23:35.910922 MTRR: UC selected as default type.
2474 12:23:35.917807 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2475 12:23:35.921217 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2476 12:23:35.927829 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2477 12:23:35.934460 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2478 12:23:35.941203 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2479 12:23:35.947586 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2480 12:23:35.954175 MTRR: Fixed MSR 0x250 0x0606060606060606
2481 12:23:35.957432 MTRR: Fixed MSR 0x258 0x0606060606060606
2482 12:23:35.960994 MTRR: Fixed MSR 0x259 0x0000000000000000
2483 12:23:35.964120 MTRR: Fixed MSR 0x268 0x0606060606060606
2484 12:23:35.970757 MTRR: Fixed MSR 0x269 0x0606060606060606
2485 12:23:35.974040 MTRR: Fixed MSR 0x26a 0x0606060606060606
2486 12:23:35.977755 MTRR: Fixed MSR 0x26b 0x0606060606060606
2487 12:23:35.980783 MTRR: Fixed MSR 0x26c 0x0606060606060606
2488 12:23:35.987048 MTRR: Fixed MSR 0x26d 0x0606060606060606
2489 12:23:35.990595 MTRR: Fixed MSR 0x26e 0x0606060606060606
2490 12:23:35.994083 MTRR: Fixed MSR 0x26f 0x0606060606060606
2491 12:23:35.997142 MTRR: Fixed MSR 0x250 0x0606060606060606
2492 12:23:36.003469 MTRR: Fixed MSR 0x250 0x0606060606060606
2493 12:23:36.006977 MTRR: Fixed MSR 0x250 0x0606060606060606
2494 12:23:36.010405 MTRR: Fixed MSR 0x258 0x0606060606060606
2495 12:23:36.013641 MTRR: Fixed MSR 0x259 0x0000000000000000
2496 12:23:36.020757 MTRR: Fixed MSR 0x268 0x0606060606060606
2497 12:23:36.023375 MTRR: Fixed MSR 0x269 0x0606060606060606
2498 12:23:36.026842 MTRR: Fixed MSR 0x26a 0x0606060606060606
2499 12:23:36.030618 MTRR: Fixed MSR 0x26b 0x0606060606060606
2500 12:23:36.033788 MTRR: Fixed MSR 0x26c 0x0606060606060606
2501 12:23:36.040562 MTRR: Fixed MSR 0x26d 0x0606060606060606
2502 12:23:36.043035 MTRR: Fixed MSR 0x26e 0x0606060606060606
2503 12:23:36.046706 MTRR: Fixed MSR 0x26f 0x0606060606060606
2504 12:23:36.050395 MTRR: Fixed MSR 0x250 0x0606060606060606
2505 12:23:36.053540 call enable_fixed_mtrr()
2506 12:23:36.056547 MTRR: Fixed MSR 0x258 0x0606060606060606
2507 12:23:36.063595 MTRR: Fixed MSR 0x250 0x0606060606060606
2508 12:23:36.067198 MTRR: Fixed MSR 0x258 0x0606060606060606
2509 12:23:36.070219 MTRR: Fixed MSR 0x259 0x0000000000000000
2510 12:23:36.073211 MTRR: Fixed MSR 0x268 0x0606060606060606
2511 12:23:36.080313 MTRR: Fixed MSR 0x269 0x0606060606060606
2512 12:23:36.083568 CPU physical address size: 39 bits
2513 12:23:36.086759 MTRR: Fixed MSR 0x26a 0x0606060606060606
2514 12:23:36.089903 MTRR: Fixed MSR 0x258 0x0606060606060606
2515 12:23:36.093541 MTRR: Fixed MSR 0x259 0x0000000000000000
2516 12:23:36.100393 MTRR: Fixed MSR 0x250 0x0606060606060606
2517 12:23:36.103090 MTRR: Fixed MSR 0x259 0x0000000000000000
2518 12:23:36.106571 MTRR: Fixed MSR 0x268 0x0606060606060606
2519 12:23:36.109836 MTRR: Fixed MSR 0x269 0x0606060606060606
2520 12:23:36.116519 MTRR: Fixed MSR 0x26a 0x0606060606060606
2521 12:23:36.120328 MTRR: Fixed MSR 0x26b 0x0606060606060606
2522 12:23:36.123365 MTRR: Fixed MSR 0x26c 0x0606060606060606
2523 12:23:36.126947 MTRR: Fixed MSR 0x26d 0x0606060606060606
2524 12:23:36.129814 MTRR: Fixed MSR 0x26e 0x0606060606060606
2525 12:23:36.136745 MTRR: Fixed MSR 0x26f 0x0606060606060606
2526 12:23:36.139765 MTRR: Fixed MSR 0x268 0x0606060606060606
2527 12:23:36.143311 MTRR: Fixed MSR 0x26b 0x0606060606060606
2528 12:23:36.146392 call enable_fixed_mtrr()
2529 12:23:36.150106 MTRR: Fixed MSR 0x258 0x0606060606060606
2530 12:23:36.153118 call enable_fixed_mtrr()
2531 12:23:36.156685 MTRR: Fixed MSR 0x259 0x0000000000000000
2532 12:23:36.159866 MTRR: Fixed MSR 0x268 0x0606060606060606
2533 12:23:36.166484 MTRR: Fixed MSR 0x269 0x0606060606060606
2534 12:23:36.169632 MTRR: Fixed MSR 0x26a 0x0606060606060606
2535 12:23:36.173037 MTRR: Fixed MSR 0x26b 0x0606060606060606
2536 12:23:36.176656 MTRR: Fixed MSR 0x26c 0x0606060606060606
2537 12:23:36.182938 MTRR: Fixed MSR 0x26d 0x0606060606060606
2538 12:23:36.186047 MTRR: Fixed MSR 0x26e 0x0606060606060606
2539 12:23:36.189253 MTRR: Fixed MSR 0x26f 0x0606060606060606
2540 12:23:36.192896 MTRR: Fixed MSR 0x26c 0x0606060606060606
2541 12:23:36.196167 call enable_fixed_mtrr()
2542 12:23:36.199800 CPU physical address size: 39 bits
2543 12:23:36.202631 CPU physical address size: 39 bits
2544 12:23:36.206901 MTRR: Fixed MSR 0x258 0x0606060606060606
2545 12:23:36.213162 CPU physical address size: 39 bits
2546 12:23:36.216931 MTRR: Fixed MSR 0x269 0x0606060606060606
2547 12:23:36.219800 MTRR: Fixed MSR 0x26d 0x0606060606060606
2548 12:23:36.223053 MTRR: Fixed MSR 0x259 0x0000000000000000
2549 12:23:36.226730 MTRR: Fixed MSR 0x26e 0x0606060606060606
2550 12:23:36.233415 MTRR: Fixed MSR 0x26f 0x0606060606060606
2551 12:23:36.236537 MTRR: Fixed MSR 0x26a 0x0606060606060606
2552 12:23:36.239736 call enable_fixed_mtrr()
2553 12:23:36.243855 MTRR: Fixed MSR 0x26b 0x0606060606060606
2554 12:23:36.246933 MTRR: Fixed MSR 0x26c 0x0606060606060606
2555 12:23:36.250095 MTRR: Fixed MSR 0x26d 0x0606060606060606
2556 12:23:36.256604 MTRR: Fixed MSR 0x26e 0x0606060606060606
2557 12:23:36.259477 MTRR: Fixed MSR 0x26f 0x0606060606060606
2558 12:23:36.262823 CPU physical address size: 39 bits
2559 12:23:36.265889 MTRR: Fixed MSR 0x268 0x0606060606060606
2560 12:23:36.269725 call enable_fixed_mtrr()
2561 12:23:36.272642 MTRR: Fixed MSR 0x269 0x0606060606060606
2562 12:23:36.276021 CPU physical address size: 39 bits
2563 12:23:36.279174 MTRR: Fixed MSR 0x26a 0x0606060606060606
2564 12:23:36.285848 MTRR: Fixed MSR 0x26b 0x0606060606060606
2565 12:23:36.289122 MTRR: Fixed MSR 0x26c 0x0606060606060606
2566 12:23:36.292797 MTRR: Fixed MSR 0x26d 0x0606060606060606
2567 12:23:36.296060 MTRR: Fixed MSR 0x26e 0x0606060606060606
2568 12:23:36.302685 MTRR: Fixed MSR 0x26f 0x0606060606060606
2569 12:23:36.306162 call enable_fixed_mtrr()
2570 12:23:36.309281 CPU physical address size: 39 bits
2571 12:23:36.309599
2572 12:23:36.312446 MTRR check
2573 12:23:36.315905 Fixed MTRRs : Enabled
2574 12:23:36.316252 Variable MTRRs: Enabled
2575 12:23:36.316567
2576 12:23:36.322868 BS: BS_WRITE_TABLES exit times (exec / console): 252 / 150 ms
2577 12:23:36.325869 Checking cr50 for pending updates
2578 12:23:36.337905 Reading cr50 TPM mode
2579 12:23:36.353002 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2580 12:23:36.363182 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2581 12:23:36.366523 Checking segment from ROM address 0xf96cbe6c
2582 12:23:36.369973 Checking segment from ROM address 0xf96cbe88
2583 12:23:36.376703 Loading segment from ROM address 0xf96cbe6c
2584 12:23:36.377153 code (compression=1)
2585 12:23:36.386223 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2586 12:23:36.395779 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2587 12:23:36.396149 using LZMA
2588 12:23:36.418295 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2589 12:23:36.424681 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2590 12:23:36.433205 Loading segment from ROM address 0xf96cbe88
2591 12:23:36.436859 Entry Point 0x30000000
2592 12:23:36.437217 Loaded segments
2593 12:23:36.443041 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2594 12:23:36.450204 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2595 12:23:36.453487 Finalizing chipset.
2596 12:23:36.456301 apm_control: Finalizing SMM.
2597 12:23:36.456644 APMC done.
2598 12:23:36.460063 HECI: CSE device 16.1 is disabled
2599 12:23:36.463014 HECI: CSE device 16.2 is disabled
2600 12:23:36.466707 HECI: CSE device 16.3 is disabled
2601 12:23:36.470214 HECI: CSE device 16.4 is disabled
2602 12:23:36.473470 HECI: CSE device 16.5 is disabled
2603 12:23:36.476741 HECI: Sending End-of-Post
2604 12:23:36.484993 CSE: EOP requested action: continue boot
2605 12:23:36.487955 CSE EOP successful, continuing boot
2606 12:23:36.494902 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2607 12:23:36.497902 mp_park_aps done after 0 msecs.
2608 12:23:36.501112 Jumping to boot code at 0x30000000(0x76891000)
2609 12:23:36.511366 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2610 12:23:36.515364
2611 12:23:36.515732
2612 12:23:36.515995
2613 12:23:36.518832 Starting depthcharge on Volmar...
2614 12:23:36.519083
2615 12:23:36.520023 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2616 12:23:36.520457 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2617 12:23:36.520744 Setting prompt string to ['brya:']
2618 12:23:36.521006 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2619 12:23:36.525612 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2620 12:23:36.525955
2621 12:23:36.532011 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2622 12:23:36.532375
2623 12:23:36.538809 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2624 12:23:36.539185
2625 12:23:36.542069 configure_storage: Failed to remap 1C:2
2626 12:23:36.542407
2627 12:23:36.545540 Wipe memory regions:
2628 12:23:36.545876
2629 12:23:36.548559 [0x00000000001000, 0x000000000a0000)
2630 12:23:36.548898
2631 12:23:36.551846 [0x00000000100000, 0x00000030000000)
2632 12:23:36.656988
2633 12:23:36.659937 [0x00000032668e60, 0x00000076857000)
2634 12:23:36.808258
2635 12:23:36.811031 [0x00000100000000, 0x0000027fc00000)
2636 12:23:37.642620
2637 12:23:37.645877 ec_init: CrosEC protocol v3 supported (256, 256)
2638 12:23:38.256456
2639 12:23:38.256933 R8152: Initializing
2640 12:23:38.257208
2641 12:23:38.259656 Version 9 (ocp_data = 6010)
2642 12:23:38.260033
2643 12:23:38.262510 R8152: Done initializing
2644 12:23:38.262846
2645 12:23:38.265679 Adding net device
2646 12:23:38.566831
2647 12:23:38.570048 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2648 12:23:38.570468
2649 12:23:38.570737
2650 12:23:38.570975
2651 12:23:38.571609 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2653 12:23:38.672473 brya: tftpboot 192.168.201.1 11967719/tftp-deploy-0t6o1658/kernel/bzImage 11967719/tftp-deploy-0t6o1658/kernel/cmdline 11967719/tftp-deploy-0t6o1658/ramdisk/ramdisk.cpio.gz
2654 12:23:38.673029 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2655 12:23:38.673438 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2656 12:23:38.678044 tftpboot 192.168.201.1 11967719/tftp-deploy-0t6o1658/kernel/bzImploy-0t6o1658/kernel/cmdline 11967719/tftp-deploy-0t6o1658/ramdisk/ramdisk.cpio.gz
2657 12:23:38.678586
2658 12:23:38.678861 Waiting for link
2659 12:23:38.881442
2660 12:23:38.881931 done.
2661 12:23:38.882229
2662 12:23:38.882572 MAC: 00:e0:4c:68:03:d9
2663 12:23:38.882929
2664 12:23:38.884852 Sending DHCP discover... done.
2665 12:23:38.885344
2666 12:23:38.887575 Waiting for reply... done.
2667 12:23:38.888121
2668 12:23:38.890901 Sending DHCP request... done.
2669 12:23:38.891325
2670 12:23:38.897973 Waiting for reply... done.
2671 12:23:38.898535
2672 12:23:38.898822 My ip is 192.168.201.14
2673 12:23:38.899059
2674 12:23:38.901077 The DHCP server ip is 192.168.201.1
2675 12:23:38.905149
2676 12:23:38.907641 TFTP server IP predefined by user: 192.168.201.1
2677 12:23:38.907993
2678 12:23:38.914895 Bootfile predefined by user: 11967719/tftp-deploy-0t6o1658/kernel/bzImage
2679 12:23:38.915632
2680 12:23:38.917828 Sending tftp read request... done.
2681 12:23:38.918304
2682 12:23:38.924995 Waiting for the transfer...
2683 12:23:38.925455
2684 12:23:39.154730 00000000 ################################################################
2685 12:23:39.154866
2686 12:23:39.383789 00080000 ################################################################
2687 12:23:39.383926
2688 12:23:39.612761 00100000 ################################################################
2689 12:23:39.612886
2690 12:23:39.841899 00180000 ################################################################
2691 12:23:39.842025
2692 12:23:40.071102 00200000 ################################################################
2693 12:23:40.071247
2694 12:23:40.299889 00280000 ################################################################
2695 12:23:40.300013
2696 12:23:40.529195 00300000 ################################################################
2697 12:23:40.529316
2698 12:23:40.754897 00380000 ################################################################
2699 12:23:40.755021
2700 12:23:40.982422 00400000 ################################################################
2701 12:23:40.982544
2702 12:23:41.209956 00480000 ################################################################
2703 12:23:41.210084
2704 12:23:41.439386 00500000 ################################################################
2705 12:23:41.439518
2706 12:23:41.666564 00580000 ################################################################
2707 12:23:41.666692
2708 12:23:41.895710 00600000 ################################################################
2709 12:23:41.895853
2710 12:23:42.124120 00680000 ################################################################
2711 12:23:42.124260
2712 12:23:42.353710 00700000 ################################################################
2713 12:23:42.353843
2714 12:23:42.582954 00780000 ################################################################
2715 12:23:42.583077
2716 12:23:42.811640 00800000 ################################################################
2717 12:23:42.811776
2718 12:23:43.040708 00880000 ################################################################
2719 12:23:43.040847
2720 12:23:43.268536 00900000 ################################################################
2721 12:23:43.268671
2722 12:23:43.496359 00980000 ################################################################
2723 12:23:43.496508
2724 12:23:43.723826 00a00000 ################################################################
2725 12:23:43.723955
2726 12:23:43.948181 00a80000 ################################################################
2727 12:23:43.948320
2728 12:23:43.963110 00b00000 ##### done.
2729 12:23:43.963185
2730 12:23:43.966548 The bootfile was 11571200 bytes long.
2731 12:23:43.966619
2732 12:23:43.969926 Sending tftp read request... done.
2733 12:23:43.973839
2734 12:23:43.973899 Waiting for the transfer...
2735 12:23:43.973950
2736 12:23:44.203003 00000000 ################################################################
2737 12:23:44.203142
2738 12:23:44.429381 00080000 ################################################################
2739 12:23:44.429528
2740 12:23:44.655778 00100000 ################################################################
2741 12:23:44.655907
2742 12:23:44.882287 00180000 ################################################################
2743 12:23:44.882426
2744 12:23:45.108630 00200000 ################################################################
2745 12:23:45.108769
2746 12:23:45.334916 00280000 ################################################################
2747 12:23:45.335046
2748 12:23:45.560475 00300000 ################################################################
2749 12:23:45.560605
2750 12:23:45.786113 00380000 ################################################################
2751 12:23:45.786272
2752 12:23:46.006757 00400000 ################################################################
2753 12:23:46.006911
2754 12:23:46.231922 00480000 ################################################################
2755 12:23:46.232081
2756 12:23:46.458226 00500000 ################################################################
2757 12:23:46.458362
2758 12:23:46.684572 00580000 ################################################################
2759 12:23:46.684720
2760 12:23:46.909527 00600000 ################################################################
2761 12:23:46.909663
2762 12:23:47.135478 00680000 ################################################################
2763 12:23:47.135619
2764 12:23:47.361381 00700000 ################################################################
2765 12:23:47.361535
2766 12:23:47.586843 00780000 ################################################################
2767 12:23:47.586971
2768 12:23:47.812995 00800000 ################################################################
2769 12:23:47.813134
2770 12:23:47.943967 00880000 ###################################### done.
2771 12:23:47.944096
2772 12:23:47.947231 Sending tftp read request... done.
2773 12:23:47.947299
2774 12:23:47.950550 Waiting for the transfer...
2775 12:23:47.950606
2776 12:23:47.950652 00000000 # done.
2777 12:23:47.953812
2778 12:23:47.960581 Command line loaded dynamically from TFTP file: 11967719/tftp-deploy-0t6o1658/kernel/cmdline
2779 12:23:47.960648
2780 12:23:47.977132 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2781 12:23:47.983798
2782 12:23:47.987313 Shutting down all USB controllers.
2783 12:23:47.987379
2784 12:23:47.987424 Removing current net device
2785 12:23:47.987468
2786 12:23:47.990640 Finalizing coreboot
2787 12:23:47.990695
2788 12:23:47.997845 Exiting depthcharge with code 4 at timestamp: 21749593
2789 12:23:47.997914
2790 12:23:47.997966
2791 12:23:47.998010 Starting kernel ...
2792 12:23:47.998053
2793 12:23:47.998096
2794 12:23:47.998443 end: 2.2.4 bootloader-commands (duration 00:00:11) [common]
2795 12:23:47.998522 start: 2.2.5 auto-login-action (timeout 00:04:29) [common]
2796 12:23:47.998582 Setting prompt string to ['Linux version [0-9]']
2797 12:23:47.998645 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2798 12:23:47.998701 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2800 12:28:16.999414 end: 2.2.5 auto-login-action (duration 00:04:29) [common]
2802 12:28:17.000250 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 269 seconds'
2804 12:28:17.000856 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2807 12:28:17.001834 end: 2 depthcharge-action (duration 00:05:00) [common]
2809 12:28:17.002653 Cleaning after the job
2810 12:28:17.002978 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11967719/tftp-deploy-0t6o1658/ramdisk
2811 12:28:17.004902 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11967719/tftp-deploy-0t6o1658/kernel
2812 12:28:17.006081 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11967719/tftp-deploy-0t6o1658/modules
2813 12:28:17.006489 start: 5.1 power-off (timeout 00:00:30) [common]
2814 12:28:17.006618 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-1' '--port=1' '--command=off'
2815 12:28:17.086373 >> Command sent successfully.
2816 12:28:17.094248 Returned 0 in 0 seconds
2817 12:28:17.195305 end: 5.1 power-off (duration 00:00:00) [common]
2819 12:28:17.196640 start: 5.2 read-feedback (timeout 00:10:00) [common]
2820 12:28:17.197475 Listened to connection for namespace 'common' for up to 1s
2822 12:28:17.198448 Listened to connection for namespace 'common' for up to 1s
2823 12:28:18.198403 Finalising connection for namespace 'common'
2824 12:28:18.198958 Disconnecting from shell: Finalise
2825 12:28:18.199328
2826 12:28:18.300213 end: 5.2 read-feedback (duration 00:00:01) [common]
2827 12:28:18.300722 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11967719
2828 12:28:18.313836 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11967719
2829 12:28:18.313960 JobError: Your job cannot terminate cleanly.