Boot log: acer-chromebox-cxi4-puff
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 12:23:12.658486 lava-dispatcher, installed at version: 2023.10
2 12:23:12.658688 start: 0 validate
3 12:23:12.658816 Start time: 2023-11-08 12:23:12.658808+00:00 (UTC)
4 12:23:12.658934 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:23:12.659065 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 12:23:12.926209 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:23:12.926372 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.297-cip104-63-ge7301d2e196ae%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:23:16.430739 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:23:16.431539 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.297-cip104-63-ge7301d2e196ae%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 12:23:16.705071 validate duration: 4.05
12 12:23:16.705549 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:23:16.705740 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:23:16.705916 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:23:16.706132 Not decompressing ramdisk as can be used compressed.
16 12:23:16.706286 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 12:23:16.706400 saving as /var/lib/lava/dispatcher/tmp/11967692/tftp-deploy-fdt22vk4/ramdisk/rootfs.cpio.gz
18 12:23:16.706512 total size: 8418130 (8 MB)
19 12:23:17.368815 progress 0 % (0 MB)
20 12:23:17.374028 progress 5 % (0 MB)
21 12:23:17.376241 progress 10 % (0 MB)
22 12:23:17.378503 progress 15 % (1 MB)
23 12:23:17.380718 progress 20 % (1 MB)
24 12:23:17.382972 progress 25 % (2 MB)
25 12:23:17.385349 progress 30 % (2 MB)
26 12:23:17.387552 progress 35 % (2 MB)
27 12:23:17.389865 progress 40 % (3 MB)
28 12:23:17.392146 progress 45 % (3 MB)
29 12:23:17.394471 progress 50 % (4 MB)
30 12:23:17.396710 progress 55 % (4 MB)
31 12:23:17.398957 progress 60 % (4 MB)
32 12:23:17.400958 progress 65 % (5 MB)
33 12:23:17.403167 progress 70 % (5 MB)
34 12:23:17.405320 progress 75 % (6 MB)
35 12:23:17.407527 progress 80 % (6 MB)
36 12:23:17.409686 progress 85 % (6 MB)
37 12:23:17.411897 progress 90 % (7 MB)
38 12:23:17.414106 progress 95 % (7 MB)
39 12:23:17.416121 progress 100 % (8 MB)
40 12:23:17.416344 8 MB downloaded in 0.71 s (11.31 MB/s)
41 12:23:17.416501 end: 1.1.1 http-download (duration 00:00:01) [common]
43 12:23:17.416734 end: 1.1 download-retry (duration 00:00:01) [common]
44 12:23:17.416823 start: 1.2 download-retry (timeout 00:09:59) [common]
45 12:23:17.416905 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 12:23:17.417039 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.297-cip104-63-ge7301d2e196ae/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 12:23:17.417112 saving as /var/lib/lava/dispatcher/tmp/11967692/tftp-deploy-fdt22vk4/kernel/bzImage
48 12:23:17.417172 total size: 11571200 (11 MB)
49 12:23:17.417231 No compression specified
50 12:23:17.418472 progress 0 % (0 MB)
51 12:23:17.421430 progress 5 % (0 MB)
52 12:23:17.424509 progress 10 % (1 MB)
53 12:23:17.427449 progress 15 % (1 MB)
54 12:23:17.430518 progress 20 % (2 MB)
55 12:23:17.433539 progress 25 % (2 MB)
56 12:23:17.436481 progress 30 % (3 MB)
57 12:23:17.439560 progress 35 % (3 MB)
58 12:23:17.442866 progress 40 % (4 MB)
59 12:23:17.445758 progress 45 % (4 MB)
60 12:23:17.448825 progress 50 % (5 MB)
61 12:23:17.451897 progress 55 % (6 MB)
62 12:23:17.454790 progress 60 % (6 MB)
63 12:23:17.457807 progress 65 % (7 MB)
64 12:23:17.460818 progress 70 % (7 MB)
65 12:23:17.463626 progress 75 % (8 MB)
66 12:23:17.466658 progress 80 % (8 MB)
67 12:23:17.469648 progress 85 % (9 MB)
68 12:23:17.472461 progress 90 % (9 MB)
69 12:23:17.475459 progress 95 % (10 MB)
70 12:23:17.478446 progress 100 % (11 MB)
71 12:23:17.478559 11 MB downloaded in 0.06 s (179.77 MB/s)
72 12:23:17.478702 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:23:17.478923 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:23:17.479011 start: 1.3 download-retry (timeout 00:09:59) [common]
76 12:23:17.479092 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 12:23:17.479225 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.297-cip104-63-ge7301d2e196ae/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 12:23:17.479296 saving as /var/lib/lava/dispatcher/tmp/11967692/tftp-deploy-fdt22vk4/modules/modules.tar
79 12:23:17.479354 total size: 483720 (0 MB)
80 12:23:17.479414 Using unxz to decompress xz
81 12:23:17.483644 progress 6 % (0 MB)
82 12:23:17.484038 progress 13 % (0 MB)
83 12:23:17.484272 progress 20 % (0 MB)
84 12:23:17.485887 progress 27 % (0 MB)
85 12:23:17.487896 progress 33 % (0 MB)
86 12:23:17.489741 progress 40 % (0 MB)
87 12:23:17.491739 progress 47 % (0 MB)
88 12:23:17.493780 progress 54 % (0 MB)
89 12:23:17.495849 progress 60 % (0 MB)
90 12:23:17.497811 progress 67 % (0 MB)
91 12:23:17.499830 progress 74 % (0 MB)
92 12:23:17.501857 progress 81 % (0 MB)
93 12:23:17.503769 progress 88 % (0 MB)
94 12:23:17.505769 progress 94 % (0 MB)
95 12:23:17.508190 progress 100 % (0 MB)
96 12:23:17.514701 0 MB downloaded in 0.04 s (13.05 MB/s)
97 12:23:17.514936 end: 1.3.1 http-download (duration 00:00:00) [common]
99 12:23:17.515187 end: 1.3 download-retry (duration 00:00:00) [common]
100 12:23:17.515278 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
101 12:23:17.515369 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
102 12:23:17.515446 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 12:23:17.515526 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
104 12:23:17.515748 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11967692/lava-overlay-h0sphywj
105 12:23:17.515879 makedir: /var/lib/lava/dispatcher/tmp/11967692/lava-overlay-h0sphywj/lava-11967692/bin
106 12:23:17.515984 makedir: /var/lib/lava/dispatcher/tmp/11967692/lava-overlay-h0sphywj/lava-11967692/tests
107 12:23:17.516082 makedir: /var/lib/lava/dispatcher/tmp/11967692/lava-overlay-h0sphywj/lava-11967692/results
108 12:23:17.516196 Creating /var/lib/lava/dispatcher/tmp/11967692/lava-overlay-h0sphywj/lava-11967692/bin/lava-add-keys
109 12:23:17.516345 Creating /var/lib/lava/dispatcher/tmp/11967692/lava-overlay-h0sphywj/lava-11967692/bin/lava-add-sources
110 12:23:17.516474 Creating /var/lib/lava/dispatcher/tmp/11967692/lava-overlay-h0sphywj/lava-11967692/bin/lava-background-process-start
111 12:23:17.516604 Creating /var/lib/lava/dispatcher/tmp/11967692/lava-overlay-h0sphywj/lava-11967692/bin/lava-background-process-stop
112 12:23:17.516729 Creating /var/lib/lava/dispatcher/tmp/11967692/lava-overlay-h0sphywj/lava-11967692/bin/lava-common-functions
113 12:23:17.516854 Creating /var/lib/lava/dispatcher/tmp/11967692/lava-overlay-h0sphywj/lava-11967692/bin/lava-echo-ipv4
114 12:23:17.516979 Creating /var/lib/lava/dispatcher/tmp/11967692/lava-overlay-h0sphywj/lava-11967692/bin/lava-install-packages
115 12:23:17.517103 Creating /var/lib/lava/dispatcher/tmp/11967692/lava-overlay-h0sphywj/lava-11967692/bin/lava-installed-packages
116 12:23:17.517225 Creating /var/lib/lava/dispatcher/tmp/11967692/lava-overlay-h0sphywj/lava-11967692/bin/lava-os-build
117 12:23:17.517353 Creating /var/lib/lava/dispatcher/tmp/11967692/lava-overlay-h0sphywj/lava-11967692/bin/lava-probe-channel
118 12:23:17.517476 Creating /var/lib/lava/dispatcher/tmp/11967692/lava-overlay-h0sphywj/lava-11967692/bin/lava-probe-ip
119 12:23:17.517599 Creating /var/lib/lava/dispatcher/tmp/11967692/lava-overlay-h0sphywj/lava-11967692/bin/lava-target-ip
120 12:23:17.517722 Creating /var/lib/lava/dispatcher/tmp/11967692/lava-overlay-h0sphywj/lava-11967692/bin/lava-target-mac
121 12:23:17.517843 Creating /var/lib/lava/dispatcher/tmp/11967692/lava-overlay-h0sphywj/lava-11967692/bin/lava-target-storage
122 12:23:17.518029 Creating /var/lib/lava/dispatcher/tmp/11967692/lava-overlay-h0sphywj/lava-11967692/bin/lava-test-case
123 12:23:17.518153 Creating /var/lib/lava/dispatcher/tmp/11967692/lava-overlay-h0sphywj/lava-11967692/bin/lava-test-event
124 12:23:17.518279 Creating /var/lib/lava/dispatcher/tmp/11967692/lava-overlay-h0sphywj/lava-11967692/bin/lava-test-feedback
125 12:23:17.518404 Creating /var/lib/lava/dispatcher/tmp/11967692/lava-overlay-h0sphywj/lava-11967692/bin/lava-test-raise
126 12:23:17.518529 Creating /var/lib/lava/dispatcher/tmp/11967692/lava-overlay-h0sphywj/lava-11967692/bin/lava-test-reference
127 12:23:17.518657 Creating /var/lib/lava/dispatcher/tmp/11967692/lava-overlay-h0sphywj/lava-11967692/bin/lava-test-runner
128 12:23:17.518780 Creating /var/lib/lava/dispatcher/tmp/11967692/lava-overlay-h0sphywj/lava-11967692/bin/lava-test-set
129 12:23:17.518906 Creating /var/lib/lava/dispatcher/tmp/11967692/lava-overlay-h0sphywj/lava-11967692/bin/lava-test-shell
130 12:23:17.519058 Updating /var/lib/lava/dispatcher/tmp/11967692/lava-overlay-h0sphywj/lava-11967692/bin/lava-install-packages (oe)
131 12:23:17.519226 Updating /var/lib/lava/dispatcher/tmp/11967692/lava-overlay-h0sphywj/lava-11967692/bin/lava-installed-packages (oe)
132 12:23:17.519348 Creating /var/lib/lava/dispatcher/tmp/11967692/lava-overlay-h0sphywj/lava-11967692/environment
133 12:23:17.519451 LAVA metadata
134 12:23:17.519524 - LAVA_JOB_ID=11967692
135 12:23:17.519590 - LAVA_DISPATCHER_IP=192.168.201.1
136 12:23:17.519692 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
137 12:23:17.519762 skipped lava-vland-overlay
138 12:23:17.519835 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 12:23:17.519912 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
140 12:23:17.519974 skipped lava-multinode-overlay
141 12:23:17.520045 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 12:23:17.520123 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
143 12:23:17.520196 Loading test definitions
144 12:23:17.520288 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
145 12:23:17.520361 Using /lava-11967692 at stage 0
146 12:23:17.520666 uuid=11967692_1.4.2.3.1 testdef=None
147 12:23:17.520751 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 12:23:17.520836 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
149 12:23:17.521360 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 12:23:17.521576 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
152 12:23:17.522269 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 12:23:17.522500 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
155 12:23:17.523110 runner path: /var/lib/lava/dispatcher/tmp/11967692/lava-overlay-h0sphywj/lava-11967692/0/tests/0_dmesg test_uuid 11967692_1.4.2.3.1
156 12:23:17.523264 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 12:23:17.523516 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
159 12:23:17.523587 Using /lava-11967692 at stage 1
160 12:23:17.523879 uuid=11967692_1.4.2.3.5 testdef=None
161 12:23:17.523965 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 12:23:17.524047 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
163 12:23:17.524512 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 12:23:17.524724 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
166 12:23:17.525370 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 12:23:17.525609 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
169 12:23:17.526291 runner path: /var/lib/lava/dispatcher/tmp/11967692/lava-overlay-h0sphywj/lava-11967692/1/tests/1_bootrr test_uuid 11967692_1.4.2.3.5
170 12:23:17.526442 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 12:23:17.526645 Creating lava-test-runner.conf files
173 12:23:17.526709 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11967692/lava-overlay-h0sphywj/lava-11967692/0 for stage 0
174 12:23:17.526798 - 0_dmesg
175 12:23:17.526877 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11967692/lava-overlay-h0sphywj/lava-11967692/1 for stage 1
176 12:23:17.526966 - 1_bootrr
177 12:23:17.527058 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 12:23:17.527141 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
179 12:23:17.535560 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 12:23:17.535659 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
181 12:23:17.535740 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 12:23:17.535821 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 12:23:17.535903 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
184 12:23:17.793021 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 12:23:17.793402 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
186 12:23:17.793519 extracting modules file /var/lib/lava/dispatcher/tmp/11967692/tftp-deploy-fdt22vk4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11967692/extract-overlay-ramdisk-fqsprqx5/ramdisk
187 12:23:17.814509 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 12:23:17.814670 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
189 12:23:17.814764 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11967692/compress-overlay-_o2vrk6v/overlay-1.4.2.4.tar.gz to ramdisk
190 12:23:17.814843 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11967692/compress-overlay-_o2vrk6v/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11967692/extract-overlay-ramdisk-fqsprqx5/ramdisk
191 12:23:17.823338 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 12:23:17.823474 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
193 12:23:17.823566 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 12:23:17.823656 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
195 12:23:17.823740 Building ramdisk /var/lib/lava/dispatcher/tmp/11967692/extract-overlay-ramdisk-fqsprqx5/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11967692/extract-overlay-ramdisk-fqsprqx5/ramdisk
196 12:23:17.960655 >> 53982 blocks
197 12:23:18.861853 rename /var/lib/lava/dispatcher/tmp/11967692/extract-overlay-ramdisk-fqsprqx5/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11967692/tftp-deploy-fdt22vk4/ramdisk/ramdisk.cpio.gz
198 12:23:18.862393 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 12:23:18.862529 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 12:23:18.862625 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 12:23:18.862720 No mkimage arch provided, not using FIT.
202 12:23:18.862807 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 12:23:18.862890 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 12:23:18.862992 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 12:23:18.863105 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 12:23:18.863198 No LXC device requested
207 12:23:18.863279 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 12:23:18.863366 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 12:23:18.863446 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 12:23:18.863521 Checking files for TFTP limit of 4294967296 bytes.
211 12:23:18.863920 end: 1 tftp-deploy (duration 00:00:02) [common]
212 12:23:18.864022 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 12:23:18.864113 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 12:23:18.864230 substitutions:
215 12:23:18.864294 - {DTB}: None
216 12:23:18.864354 - {INITRD}: 11967692/tftp-deploy-fdt22vk4/ramdisk/ramdisk.cpio.gz
217 12:23:18.864411 - {KERNEL}: 11967692/tftp-deploy-fdt22vk4/kernel/bzImage
218 12:23:18.864468 - {LAVA_MAC}: None
219 12:23:18.864523 - {PRESEED_CONFIG}: None
220 12:23:18.864577 - {PRESEED_LOCAL}: None
221 12:23:18.864630 - {RAMDISK}: 11967692/tftp-deploy-fdt22vk4/ramdisk/ramdisk.cpio.gz
222 12:23:18.864698 - {ROOT_PART}: None
223 12:23:18.864752 - {ROOT}: None
224 12:23:18.864805 - {SERVER_IP}: 192.168.201.1
225 12:23:18.864872 - {TEE}: None
226 12:23:18.864924 Parsed boot commands:
227 12:23:18.864975 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 12:23:18.865149 Parsed boot commands: tftpboot 192.168.201.1 11967692/tftp-deploy-fdt22vk4/kernel/bzImage 11967692/tftp-deploy-fdt22vk4/kernel/cmdline 11967692/tftp-deploy-fdt22vk4/ramdisk/ramdisk.cpio.gz
229 12:23:18.865232 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 12:23:18.865316 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 12:23:18.865411 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 12:23:18.865490 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 12:23:18.865556 Not connected, no need to disconnect.
234 12:23:18.865628 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 12:23:18.865705 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 12:23:18.865770 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-chromebox-cxi4-puff-cbg-8'
237 12:23:18.869903 Setting prompt string to ['lava-test: # ']
238 12:23:18.870330 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 12:23:18.870441 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 12:23:18.870554 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 12:23:18.870678 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 12:23:18.870933 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-chromebox-cxi4-puff-cbg-8' '--port=1' '--command=reboot'
243 12:23:25.539211 >> Command sent successfully.
244 12:23:25.541767 Returned 0 in 6 seconds
245 12:23:25.642224 end: 2.2.2.1 pdu-reboot (duration 00:00:07) [common]
247 12:23:25.642554 end: 2.2.2 reset-device (duration 00:00:07) [common]
248 12:23:25.642665 start: 2.2.3 depthcharge-start (timeout 00:04:53) [common]
249 12:23:25.642757 Setting prompt string to 'Starting depthcharge on Kaisa...'
250 12:23:25.642826 Changing prompt to 'Starting depthcharge on Kaisa...'
251 12:23:25.642899 depthcharge-start: Wait for prompt Starting depthcharge on Kaisa... (timeout 00:05:00)
252 12:23:25.643166 [Enter `^Ec?' for help]
253 12:23:25.941608 �
254 12:23:25.942230
255 12:23:25.952670 coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 bootblock starting (log level: 8)...
256 12:23:25.958110 CPU: Intel(R) Celeron(R) CPU 5205U @ 1.90GHz
257 12:23:25.962962 CPU: ID a0660, Cometlake-U A0 (6+2), ucode: 000000c9
258 12:23:25.968040 CPU: AES supported, TXT NOT supported, VT supported
259 12:23:25.973306 MCH: device id 9b71 (rev 00) is CometLake-U (2+2)
260 12:23:25.978192 PCH: device id 0285 (rev 00) is Cometlake-U Base
261 12:23:25.982889 IGD: device id 9baa (rev 04) is CometLake ULT GT2
262 12:23:25.987031 VBOOT: Loading verstage.
263 12:23:25.991214 FMAP: Found "FLASH" version 1.1 at 0xc04000.
264 12:23:25.997039 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
265 12:23:26.001964 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
266 12:23:26.005308 CBFS: Locating 'fallback/verstage'
267 12:23:26.008905 CBFS: Found @ offset 10c240 size 1152c
268 12:23:26.010800
269 12:23:26.010888
270 12:23:26.021202 coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 verstage starting (log level: 8)...
271 12:23:26.035544 Probing TPM: . done!
272 12:23:26.038759 TPM ready after 0 ms
273 12:23:26.044024 Connected to device vid:did:rid of 1ae0:0028:00
274 12:23:26.054045 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b81dc66
275 12:23:26.057360 Initialized TPM device CR50 revision 0
276 12:23:26.154368 tlcl_send_startup: Startup return code is 0
277 12:23:26.156083 TPM: setup succeeded
278 12:23:26.169418 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
279 12:23:26.182444 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
280 12:23:26.190048 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
281 12:23:26.203127 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
282 12:23:26.206019 Chrome EC: UHEPI supported
283 12:23:26.209604 Phase 1
284 12:23:26.214401 FMAP: area GBB found @ c05000 (12288 bytes)
285 12:23:26.221814 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
286 12:23:26.227950 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
287 12:23:26.231108 Recovery requested (1009000e)
288 12:23:26.237232 TPM: Extending digest for VBOOT: boot mode into PCR 0
289 12:23:26.246390 tlcl_extend: response is 0
290 12:23:26.251636 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
291 12:23:26.261505 tlcl_extend: response is 0
292 12:23:26.266444 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
293 12:23:26.269709 CBFS: Locating 'fallback/romstage'
294 12:23:26.273062 CBFS: Found @ offset 80 size 1607c
295 12:23:26.279320 BS: verstage times (exec / console): total (unknown) / 119 ms
296 12:23:26.281141
297 12:23:26.281566
298 12:23:26.291604 coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 romstage starting (log level: 8)...
299 12:23:26.297929 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
300 12:23:26.302792 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
301 12:23:26.307411 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
302 12:23:26.311784 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
303 12:23:26.316049 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
304 12:23:26.320397 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
305 12:23:26.322571 TCO_STS: 0000 0000
306 12:23:26.325538 GEN_PMCON: e0015038 00000200
307 12:23:26.328757 GBLRST_CAUSE: 00000000 00000000
308 12:23:26.330732 prev_sleep_state 5
309 12:23:26.334153 Boot Count incremented to 6491
310 12:23:26.339709 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
311 12:23:26.342710 CBFS: Locating 'fspm.bin'
312 12:23:26.346894 CBFS: Found @ offset 66fc0 size 71000
313 12:23:26.349901 Chrome EC: UHEPI supported
314 12:23:26.356098 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
315 12:23:26.360690 Probing TPM: done!
316 12:23:26.365640 Connected to device vid:did:rid of 1ae0:0028:00
317 12:23:26.376285 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b81dc66
318 12:23:26.379540 Initialized TPM device CR50 revision 0
319 12:23:26.393399 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
320 12:23:26.399402 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
321 12:23:26.402310 MRC cache found, size 1948
322 12:23:26.404927 bootmode is set to: 2
323 12:23:26.407671 PRMRR disabled by config.
324 12:23:26.412460 FMAP: area RW_SPD_CACHE found @ aff000 (4096 bytes)
325 12:23:26.416617 SPD_CACHE: cache found, size 0x1000
326 12:23:26.419921 No memory dimm at address 50
327 12:23:26.422752 SPD_CACHE: DIMM0 is not present
328 12:23:26.428530 SPD_CACHE: DIMM1 is the same
329 12:23:26.429382 SPD @ 0x52
330 12:23:26.432140 SPD: module type is DDR4
331 12:23:26.437055 SPD: module part number is HMA851S6CJR6N-VK
332 12:23:26.442903 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
333 12:23:26.447638 SPD: device width 16 bits, bus width 64 bits
334 12:23:26.451929 SPD: module size is 4096 MB (per channel)
335 12:23:26.454987 memory slot: 2 configuration done.
336 12:23:26.503891 CBMEM:
337 12:23:26.508214 IMD: root @ 0x99fff000 254 entries.
338 12:23:26.510670 IMD: root @ 0x99ffec00 62 entries.
339 12:23:26.515394 FMAP: area RO_VPD found @ c00000 (16384 bytes)
340 12:23:26.519798 WARNING: RO_VPD is uninitialized or empty.
341 12:23:26.524252 FMAP: area RW_VPD found @ af8000 (8192 bytes)
342 12:23:26.528261 External stage cache:
343 12:23:26.531505 IMD: root @ 0x9abff000 254 entries.
344 12:23:26.534672 IMD: root @ 0x9abfec00 62 entries.
345 12:23:26.550030 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
346 12:23:26.558902 tlcl_write: response is 0
347 12:23:26.563330 MRC: TPM MRC hash updated successfully.
348 12:23:26.564364 1 DIMMs found
349 12:23:26.566449 SMM Memory Map
350 12:23:26.569472 SMRAM : 0x9a000000 0x1000000
351 12:23:26.573376 Subregion 0: 0x9a000000 0xa00000
352 12:23:26.576415 Subregion 1: 0x9aa00000 0x200000
353 12:23:26.580418 Subregion 2: 0x9ac00000 0x400000
354 12:23:26.582384 top_of_ram = 0x9a000000
355 12:23:26.587505 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
356 12:23:26.592697 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
357 12:23:26.598001 MTRR Range: Start=ff000000 End=0 (Size 1000000)
358 12:23:26.602834 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
359 12:23:26.606027 CBFS: Locating 'fallback/postcar'
360 12:23:26.609789 CBFS: Found @ offset 1076c0 size 4b28
361 12:23:26.616759 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
362 12:23:26.626823 Loading module at 0x99c0c000 with entry 0x99c0c000. filesize: 0x4818 memsize: 0x8af8
363 12:23:26.631652 Processing 173 relocs. Offset value of 0x97c0c000
364 12:23:26.639417 BS: romstage times (exec / console): total (unknown) / 267 ms
365 12:23:26.640934
366 12:23:26.641035
367 12:23:26.651145 coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 postcar starting (log level: 8)...
368 12:23:26.656324 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
369 12:23:26.660177 CBFS: Locating 'fallback/ramstage'
370 12:23:26.664211 CBFS: Found @ offset 44e00 size 1e0ef
371 12:23:26.670752 Decompressing stage fallback/ramstage @ 0x99ba4fc0 (415200 bytes)
372 12:23:26.701532 Loading module at 0x99ba5000 with entry 0x99ba5000. filesize: 0x46598 memsize: 0x655a0
373 12:23:26.706620 Processing 4604 relocs. Offset value of 0x98da5000
374 12:23:26.712691 BS: postcar times (exec / console): total (unknown) / 43 ms
375 12:23:26.712820
376 12:23:26.713281
377 12:23:26.723562 coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 ramstage starting (log level: 8)...
378 12:23:26.724874 Normal boot
379 12:23:26.729970 cse_lite: Skip switching to RW in the recovery path
380 12:23:26.735717 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 5 ms
381 12:23:26.741193 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
382 12:23:26.744685 CBFS: Locating 'cpu_microcode_blob.bin'
383 12:23:26.749029 CBFS: Found @ offset 16180 size 2ec00
384 12:23:26.753381 microcode: sig=0xa0660 pf=0x80 revision=0xc9
385 12:23:26.755411 Skip microcode update
386 12:23:26.760457 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
387 12:23:26.763361 CBFS: Locating 'fsps.bin'
388 12:23:26.767268 CBFS: Found @ offset d8fc0 size 2e69d
389 12:23:26.803012 Detected 2 core, 2 thread CPU.
390 12:23:26.805679 Setting up SMI for CPU
391 12:23:26.807766 IED base = 0x9ac00000
392 12:23:26.809980 IED size = 0x00400000
393 12:23:26.812469 Will perform SMM setup.
394 12:23:26.816533 CPU: Intel(R) Celeron(R) CPU 5205U @ 1.90GHz.
395 12:23:26.824979 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
396 12:23:26.829393 Processing 16 relocs. Offset value of 0x00030000
397 12:23:26.832369 Attempting to start 1 APs
398 12:23:26.836140 Waiting for 10ms after sending INIT.
399 12:23:26.849932 Waiting for 1st SIPI to complete...done.
400 12:23:26.852241 AP: slot 1 apic_id 2.
401 12:23:26.856537 Waiting for 2nd SIPI to complete...done.
402 12:23:26.865127 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
403 12:23:26.869585 Processing 13 relocs. Offset value of 0x00038000
404 12:23:26.876689 SMM Module: stub loaded at 0x00038000. Will call 0x99bc2760(0x00000000)
405 12:23:26.880186 Installing SMM handler to 0x9a000000
406 12:23:26.888839 Loading module at 0x9a010000 with entry 0x9a010a30. filesize: 0x7bc8 memsize: 0xcc90
407 12:23:26.893606 Processing 617 relocs. Offset value of 0x9a010000
408 12:23:26.901468 Loading module at 0x9a008000 with entry 0x9a008000. filesize: 0x1b8 memsize: 0x1b8
409 12:23:26.906766 Processing 13 relocs. Offset value of 0x9a008000
410 12:23:26.913262 SMM Module: placing jmp sequence at 0x9a007c00 rel16 0x03fd
411 12:23:26.920029 SMM Module: stub loaded at 0x9a008000. Will call 0x9a010a30(0x00000000)
412 12:23:26.923005 Clearing SMI status registers
413 12:23:26.924682 SMI_STS: PM1
414 12:23:26.926697 PM1_STS: PWRBTN
415 12:23:26.928733 New SMBASE 0x9a000000
416 12:23:26.932024 In relocation handler: CPU 0
417 12:23:26.935270 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
418 12:23:26.940703 Writing SMRR. base = 0x9a000006, mask=0xff000800
419 12:23:26.942625 Relocation complete.
420 12:23:26.944913 New SMBASE 0x99fffc00
421 12:23:26.948256 In relocation handler: CPU 1
422 12:23:26.952005 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
423 12:23:26.956878 Writing SMRR. base = 0x9a000006, mask=0xff000800
424 12:23:26.958582 Relocation complete.
425 12:23:26.960758 Initializing CPU #0
426 12:23:26.964466 CPU: vendor Intel device a0660
427 12:23:26.967867 CPU: family 06, model a6, stepping 00
428 12:23:26.970355 Clearing out pending MCEs
429 12:23:26.972839 Setting up local APIC...
430 12:23:26.975059 apic_id: 0x00 done.
431 12:23:26.978105 Turbo is available but hidden
432 12:23:26.980577 Turbo is unavailable
433 12:23:26.982417 VMX status: enabled
434 12:23:26.986088 IA32_FEATURE_CONTROL status: locked
435 12:23:26.988648 Skip microcode update
436 12:23:26.990512 CPU #0 initialized
437 12:23:26.992845 Initializing CPU #1
438 12:23:26.996147 CPU: vendor Intel device a0660
439 12:23:26.999623 CPU: family 06, model a6, stepping 00
440 12:23:27.001901 Clearing out pending MCEs
441 12:23:27.004823 Setting up local APIC...
442 12:23:27.006843 apic_id: 0x02 done.
443 12:23:27.009525 VMX status: enabled
444 12:23:27.012720 IA32_FEATURE_CONTROL status: locked
445 12:23:27.014822 Skip microcode update
446 12:23:27.017027 CPU #1 initialized
447 12:23:27.021435 bsp_do_flight_plan done after 160 msecs.
448 12:23:27.022598 Enabling SMIs.
449 12:23:27.023953 Locking SMM.
450 12:23:27.030578 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 88 / 199 ms
451 12:23:27.041730 Waiting for DisplayPort
452 12:23:30.066665 DisplayPort not ready after 3000ms. Abort.
453 12:23:30.072793 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
454 12:23:30.074569 CBFS: Locating 'vbt.bin'
455 12:23:30.079056 CBFS: Found @ offset 66a80 size 49e
456 12:23:30.084100 Found a VBT of 4608 bytes after decompression
457 12:23:30.085191 psys_pmax = 182W
458 12:23:30.133391 Display FSP Version Info HOB
459 12:23:30.136449 Reference Code - CPU = 9.0.1e.30
460 12:23:30.139729 uCode Version = 0.0.0.ca
461 12:23:30.143347 TXT ACM version = ff.ff.ff.ffff
462 12:23:30.146360 Reference Code - ME = 9.0.1e.30
463 12:23:30.148606 MEBx version = 0.0.0.0
464 12:23:30.152089 ME Firmware Version = Consumer SKU
465 12:23:30.155516 Reference Code - CML PCH = 9.0.1e.30
466 12:23:30.158230 PCH-CRID Status = Disabled
467 12:23:30.162688 PCH-CRID Original Value = ff.ff.ff.ffff
468 12:23:30.165990 PCH-CRID New Value = ff.ff.ff.ffff
469 12:23:30.169149 OPROM - RST - RAID = ff.ff.ff.ffff
470 12:23:30.173370 ChipsetInit Base Version = ff.ff.ff.ffff
471 12:23:30.177528 ChipsetInit Oem Version = ff.ff.ff.ffff
472 12:23:30.181745 Reference Code - SA - System Agent = 9.0.1e.30
473 12:23:30.184994 Reference Code - MRC = 0.0.0.2d
474 12:23:30.188003 SA - PCIe Version = 9.0.1e.30
475 12:23:30.190910 SA-CRID Status = Disabled
476 12:23:30.194108 SA-CRID Original Value = 0.0.0.0
477 12:23:30.196639 SA-CRID New Value = 0.0.0.0
478 12:23:30.200297 OPROM - VBIOS = ff.ff.ff.ffff
479 12:23:30.204675 Found PCIe Root Port #7 at PCI: 00:1c.0.
480 12:23:30.211518 Remapping PCIe Root Port #7 from PCI: 00:1c.6 to new function number 0.
481 12:23:30.223631 pcie_rp_update_dev: Couldn't find PCIe Root Port #9 (originally PCI: 00:1d.0) which was enabled in devicetree, removing.
482 12:23:30.234930 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
483 12:23:30.247208 pcie_rp_update_dev: Couldn't find PCIe Root Port #14 (originally PCI: 00:1d.5) which was enabled in devicetree, removing.
484 12:23:30.253684 BS: BS_DEV_INIT_CHIPS run times (exec / console): 3070 / 140 ms
485 12:23:30.254788 RTC Init
486 12:23:30.258642 Set power on after power failure.
487 12:23:30.260574 Disabling Deep S3
488 12:23:30.261975 Disabling Deep S3
489 12:23:30.264356 Disabling Deep S4
490 12:23:30.266335 Disabling Deep S4
491 12:23:30.267690 Disabling Deep S5
492 12:23:30.269992 Disabling Deep S5
493 12:23:30.276146 BS: BS_DEV_INIT_CHIPS exit times (exec / console): 1 / 15 ms
494 12:23:30.277994 Enumerating buses...
495 12:23:30.282282 Show all devs... Before device enumeration.
496 12:23:30.284719 Root Device: enabled 1
497 12:23:30.287723 CPU_CLUSTER: 0: enabled 1
498 12:23:30.290037 DOMAIN: 0000: enabled 1
499 12:23:30.291943 APIC: 00: enabled 1
500 12:23:30.294317 PCI: 00:00.0: enabled 1
501 12:23:30.297287 PCI: 00:02.0: enabled 1
502 12:23:30.299048 PCI: 00:04.0: enabled 1
503 12:23:30.301268 PCI: 00:05.0: enabled 0
504 12:23:30.304310 PCI: 00:12.0: enabled 1
505 12:23:30.306402 PCI: 00:12.5: enabled 0
506 12:23:30.309343 PCI: 00:12.6: enabled 0
507 12:23:30.311404 PCI: 00:14.0: enabled 1
508 12:23:30.313648 PCI: 00:14.1: enabled 0
509 12:23:30.315803 PCI: 00:14.3: enabled 1
510 12:23:30.318874 PCI: 00:14.5: enabled 1
511 12:23:30.321326 PCI: 00:15.0: enabled 0
512 12:23:30.323395 PCI: 00:15.1: enabled 0
513 12:23:30.325382 PCI: 00:15.2: enabled 1
514 12:23:30.328461 PCI: 00:15.3: enabled 1
515 12:23:30.330992 PCI: 00:16.0: enabled 1
516 12:23:30.332975 PCI: 00:16.1: enabled 0
517 12:23:30.335547 PCI: 00:16.2: enabled 0
518 12:23:30.338094 PCI: 00:16.3: enabled 0
519 12:23:30.340205 PCI: 00:16.4: enabled 0
520 12:23:30.343194 PCI: 00:16.5: enabled 0
521 12:23:30.345119 PCI: 00:17.0: enabled 1
522 12:23:30.348100 PCI: 00:19.0: enabled 1
523 12:23:30.350133 PCI: 00:19.1: enabled 0
524 12:23:30.352690 PCI: 00:19.2: enabled 0
525 12:23:30.354786 PCI: 00:1a.0: enabled 1
526 12:23:30.357769 PCI: 00:1c.0: enabled 0
527 12:23:30.360260 PCI: 00:1c.1: enabled 0
528 12:23:30.362920 PCI: 00:1c.2: enabled 0
529 12:23:30.364425 PCI: 00:1c.3: enabled 0
530 12:23:30.367642 PCI: 00:1c.4: enabled 0
531 12:23:30.370105 PCI: 00:1c.5: enabled 0
532 12:23:30.372400 PCI: 00:1c.0: enabled 1
533 12:23:30.374334 PCI: 00:1c.7: enabled 0
534 12:23:30.376997 PCI: 00:1d.0: enabled 1
535 12:23:30.379261 PCI: 00:1d.1: enabled 0
536 12:23:30.381806 PCI: 00:1d.2: enabled 1
537 12:23:30.384516 PCI: 00:1d.3: enabled 0
538 12:23:30.386945 PCI: 00:1d.4: enabled 0
539 12:23:30.389364 PCI: 00:1d.5: enabled 1
540 12:23:30.391767 PCI: 00:1e.0: enabled 1
541 12:23:30.393875 PCI: 00:1e.1: enabled 0
542 12:23:30.396720 PCI: 00:1e.2: enabled 1
543 12:23:30.399197 PCI: 00:1e.3: enabled 0
544 12:23:30.401438 PCI: 00:1f.0: enabled 1
545 12:23:30.403916 PCI: 00:1f.1: enabled 1
546 12:23:30.406204 PCI: 00:1f.2: enabled 1
547 12:23:30.408346 PCI: 00:1f.3: enabled 1
548 12:23:30.411151 PCI: 00:1f.4: enabled 1
549 12:23:30.413075 PCI: 00:1f.5: enabled 1
550 12:23:30.415960 PCI: 00:1f.6: enabled 0
551 12:23:30.418470 GENERIC: 0.0: enabled 1
552 12:23:30.420329 USB0 port 0: enabled 1
553 12:23:30.422907 I2C: 00:4a: enabled 1
554 12:23:30.424912 I2C: 00:4a: enabled 1
555 12:23:30.427395 I2C: 00:1a: enabled 1
556 12:23:30.429932 PCI: 00:00.0: enabled 1
557 12:23:30.432416 PCI: 00:00.0: enabled 1
558 12:23:30.434038 SPI: 00: enabled 1
559 12:23:30.436512 PNP: 0c09.0: enabled 1
560 12:23:30.438825 USB2 port 0: enabled 1
561 12:23:30.441292 USB2 port 1: enabled 1
562 12:23:30.443438 USB2 port 2: enabled 1
563 12:23:30.445807 USB2 port 3: enabled 1
564 12:23:30.448231 USB2 port 5: enabled 1
565 12:23:30.451137 USB2 port 6: enabled 0
566 12:23:30.452658 USB2 port 9: enabled 1
567 12:23:30.454789 USB3 port 0: enabled 1
568 12:23:30.457627 USB3 port 1: enabled 1
569 12:23:30.459920 USB3 port 2: enabled 1
570 12:23:30.462339 USB3 port 3: enabled 1
571 12:23:30.464854 USB3 port 4: enabled 1
572 12:23:30.466317 USB2 port 4: enabled 1
573 12:23:30.469493 USB3 port 5: enabled 1
574 12:23:30.470723 APIC: 02: enabled 1
575 12:23:30.472897 Compare with tree...
576 12:23:30.475982 Root Device: enabled 1
577 12:23:30.478809 CPU_CLUSTER: 0: enabled 1
578 12:23:30.480647 APIC: 00: enabled 1
579 12:23:30.483097 APIC: 02: enabled 1
580 12:23:30.485818 DOMAIN: 0000: enabled 1
581 12:23:30.488088 PCI: 00:00.0: enabled 1
582 12:23:30.490541 PCI: 00:02.0: enabled 1
583 12:23:30.492617 PCI: 00:04.0: enabled 1
584 12:23:30.495645 GENERIC: 0.0: enabled 1
585 12:23:30.498673 PCI: 00:05.0: enabled 0
586 12:23:30.501597 PCI: 00:12.0: enabled 1
587 12:23:30.503978 PCI: 00:12.5: enabled 0
588 12:23:30.506186 PCI: 00:12.6: enabled 0
589 12:23:30.509221 PCI: 00:14.0: enabled 1
590 12:23:30.511957 USB0 port 0: enabled 1
591 12:23:30.514144 USB2 port 0: enabled 1
592 12:23:30.517092 USB2 port 1: enabled 1
593 12:23:30.519823 USB2 port 2: enabled 1
594 12:23:30.522792 USB2 port 3: enabled 1
595 12:23:30.525779 USB2 port 5: enabled 1
596 12:23:30.527814 USB2 port 6: enabled 0
597 12:23:30.531210 USB2 port 9: enabled 1
598 12:23:30.533937 USB3 port 0: enabled 1
599 12:23:30.536013 USB3 port 1: enabled 1
600 12:23:30.539241 USB3 port 2: enabled 1
601 12:23:30.541861 USB3 port 3: enabled 1
602 12:23:30.544112 USB3 port 4: enabled 1
603 12:23:30.546715 USB2 port 4: enabled 1
604 12:23:30.550077 USB3 port 5: enabled 1
605 12:23:30.552744 PCI: 00:14.1: enabled 0
606 12:23:30.555586 PCI: 00:14.3: enabled 1
607 12:23:30.558068 PCI: 00:14.5: enabled 1
608 12:23:30.560641 PCI: 00:15.0: enabled 0
609 12:23:30.563108 PCI: 00:15.1: enabled 0
610 12:23:30.565048 PCI: 00:15.2: enabled 1
611 12:23:30.568080 I2C: 00:4a: enabled 1
612 12:23:30.570630 PCI: 00:15.3: enabled 1
613 12:23:30.573066 I2C: 00:4a: enabled 1
614 12:23:30.576062 PCI: 00:16.0: enabled 1
615 12:23:30.578570 PCI: 00:16.1: enabled 0
616 12:23:30.580654 PCI: 00:16.2: enabled 0
617 12:23:30.584069 PCI: 00:16.3: enabled 0
618 12:23:30.586595 PCI: 00:16.4: enabled 0
619 12:23:30.588637 PCI: 00:16.5: enabled 0
620 12:23:30.591446 PCI: 00:17.0: enabled 1
621 12:23:30.594245 PCI: 00:19.0: enabled 1
622 12:23:30.596271 I2C: 00:1a: enabled 1
623 12:23:30.599101 PCI: 00:19.1: enabled 0
624 12:23:30.601401 PCI: 00:19.2: enabled 0
625 12:23:30.604384 PCI: 00:1a.0: enabled 1
626 12:23:30.606921 PCI: 00:1c.0: enabled 1
627 12:23:30.609597 PCI: 00:00.0: enabled 1
628 12:23:30.612189 PCI: 00:1e.0: enabled 1
629 12:23:30.614962 PCI: 00:1e.1: enabled 0
630 12:23:30.617633 PCI: 00:1e.2: enabled 1
631 12:23:30.619725 SPI: 00: enabled 1
632 12:23:30.622223 PCI: 00:1e.3: enabled 0
633 12:23:30.624877 PCI: 00:1f.0: enabled 1
634 12:23:30.627724 PNP: 0c09.0: enabled 1
635 12:23:30.630080 PCI: 00:1f.1: enabled 1
636 12:23:30.633348 PCI: 00:1f.2: enabled 1
637 12:23:30.635749 PCI: 00:1f.3: enabled 1
638 12:23:30.638286 PCI: 00:1f.4: enabled 1
639 12:23:30.640745 PCI: 00:1f.5: enabled 1
640 12:23:30.643567 PCI: 00:1f.6: enabled 0
641 12:23:30.646183 Root Device scanning...
642 12:23:30.649320 scan_static_bus for Root Device
643 12:23:30.652119 CPU_CLUSTER: 0 enabled
644 12:23:30.654246 DOMAIN: 0000 enabled
645 12:23:30.655946 DOMAIN: 0000 scanning...
646 12:23:30.659236 PCI: pci_scan_bus for bus 00
647 12:23:30.662611 PCI: 00:00.0 [8086/0000] ops
648 12:23:30.666162 PCI: 00:00.0 [8086/9b71] enabled
649 12:23:30.669321 PCI: 00:02.0 [8086/0000] bus ops
650 12:23:30.672956 PCI: 00:02.0 [8086/9baa] enabled
651 12:23:30.675842 PCI: 00:04.0 [8086/0000] bus ops
652 12:23:30.679323 PCI: 00:04.0 [8086/1903] enabled
653 12:23:30.682205 PCI: 00:08.0 [8086/1911] enabled
654 12:23:30.685736 PCI: 00:12.0 [8086/02f9] enabled
655 12:23:30.689210 PCI: 00:14.0 [8086/0000] bus ops
656 12:23:30.692513 PCI: 00:14.0 [8086/02ed] enabled
657 12:23:30.695847 PCI: 00:14.2 [8086/02ef] enabled
658 12:23:30.699216 PCI: 00:14.3 [8086/02f0] enabled
659 12:23:30.702078 PCI: 00:14.5 [8086/0000] ops
660 12:23:30.705248 PCI: 00:14.5 [8086/02f5] enabled
661 12:23:30.708474 PCI: 00:15.0 [8086/0000] bus ops
662 12:23:30.712373 PCI: 00:15.0 [8086/02e8] disabled
663 12:23:30.715080 PCI: 00:15.2 [8086/0000] bus ops
664 12:23:30.719088 PCI: 00:15.2 [8086/02ea] enabled
665 12:23:30.721790 PCI: 00:15.3 [8086/0000] bus ops
666 12:23:30.725277 PCI: 00:15.3 [8086/02eb] enabled
667 12:23:30.728215 PCI: 00:16.0 [8086/0000] ops
668 12:23:30.732275 PCI: 00:16.0 [8086/02e0] enabled
669 12:23:30.737407 PCI: Static device PCI: 00:17.0 not found, disabling it.
670 12:23:30.740605 PCI: 00:19.0 [8086/0000] bus ops
671 12:23:30.743619 PCI: 00:19.0 [8086/02c5] enabled
672 12:23:30.746593 PCI: 00:1a.0 [8086/0000] ops
673 12:23:30.749754 PCI: 00:1a.0 [8086/02c4] enabled
674 12:23:30.753415 PCI: 00:1c.0 [8086/0000] bus ops
675 12:23:30.756992 PCI: 00:1c.0 [8086/02be] enabled
676 12:23:30.759509 PCI: 00:1e.0 [8086/0000] ops
677 12:23:30.763259 PCI: 00:1e.0 [8086/02a8] enabled
678 12:23:30.766287 PCI: 00:1e.2 [8086/0000] bus ops
679 12:23:30.769835 PCI: 00:1e.2 [8086/02aa] enabled
680 12:23:30.773304 PCI: 00:1f.0 [8086/0000] bus ops
681 12:23:30.776182 PCI: 00:1f.0 [8086/0285] enabled
682 12:23:30.781883 PCI: Static device PCI: 00:1f.1 not found, disabling it.
683 12:23:30.787960 PCI: Static device PCI: 00:1f.2 not found, disabling it.
684 12:23:30.790893 PCI: 00:1f.3 [8086/0000] bus ops
685 12:23:30.794538 PCI: 00:1f.3 [8086/02c8] enabled
686 12:23:30.797350 PCI: 00:1f.4 [8086/0000] bus ops
687 12:23:30.800740 PCI: 00:1f.4 [8086/02a3] enabled
688 12:23:30.804310 PCI: 00:1f.5 [8086/0000] bus ops
689 12:23:30.807061 PCI: 00:1f.5 [8086/02a4] enabled
690 12:23:30.810400 PCI: Leftover static devices:
691 12:23:30.811894 PCI: 00:05.0
692 12:23:30.813258 PCI: 00:12.5
693 12:23:30.814993 PCI: 00:12.6
694 12:23:30.815701 PCI: 00:14.1
695 12:23:30.817468 PCI: 00:15.1
696 12:23:30.818707 PCI: 00:16.1
697 12:23:30.819850 PCI: 00:16.2
698 12:23:30.821774 PCI: 00:16.3
699 12:23:30.822615 PCI: 00:16.4
700 12:23:30.824346 PCI: 00:16.5
701 12:23:30.825525 PCI: 00:17.0
702 12:23:30.826652 PCI: 00:19.1
703 12:23:30.828087 PCI: 00:19.2
704 12:23:30.829550 PCI: 00:1e.1
705 12:23:30.830845 PCI: 00:1e.3
706 12:23:30.832103 PCI: 00:1f.1
707 12:23:30.833782 PCI: 00:1f.2
708 12:23:30.835068 PCI: 00:1f.6
709 12:23:30.838111 PCI: Check your devicetree.cb.
710 12:23:30.840765 PCI: 00:02.0 scanning...
711 12:23:30.844762 scan_generic_bus for PCI: 00:02.0
712 12:23:30.848036 scan_generic_bus for PCI: 00:02.0 done
713 12:23:30.852801 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
714 12:23:30.855730 PCI: 00:04.0 scanning...
715 12:23:30.859134 scan_generic_bus for PCI: 00:04.0
716 12:23:30.863602 bus: PCI: 00:04.0[0]->GENERIC: 0.0 enabled
717 12:23:30.867073 scan_generic_bus for PCI: 00:04.0 done
718 12:23:30.872508 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
719 12:23:30.875012 PCI: 00:14.0 scanning...
720 12:23:30.878463 scan_static_bus for PCI: 00:14.0
721 12:23:30.880328 USB0 port 0 enabled
722 12:23:30.882380 USB0 port 0 scanning...
723 12:23:30.886315 scan_static_bus for USB0 port 0
724 12:23:30.888330 USB2 port 0 enabled
725 12:23:30.890392 USB2 port 1 enabled
726 12:23:30.892296 USB2 port 2 enabled
727 12:23:30.894371 USB2 port 3 enabled
728 12:23:30.896846 USB2 port 5 enabled
729 12:23:30.898987 USB2 port 6 disabled
730 12:23:30.900566 USB2 port 9 enabled
731 12:23:30.902551 USB3 port 0 enabled
732 12:23:30.905203 USB3 port 1 enabled
733 12:23:30.906743 USB3 port 2 enabled
734 12:23:30.908627 USB3 port 3 enabled
735 12:23:30.910776 USB3 port 4 enabled
736 12:23:30.913196 USB2 port 4 enabled
737 12:23:30.915074 USB3 port 5 enabled
738 12:23:30.917335 USB2 port 0 scanning...
739 12:23:30.920588 scan_static_bus for USB2 port 0
740 12:23:30.924443 scan_static_bus for USB2 port 0 done
741 12:23:30.929110 scan_bus: bus USB2 port 0 finished in 6 msecs
742 12:23:30.931955 USB2 port 1 scanning...
743 12:23:30.935297 scan_static_bus for USB2 port 1
744 12:23:30.938844 scan_static_bus for USB2 port 1 done
745 12:23:30.942984 scan_bus: bus USB2 port 1 finished in 6 msecs
746 12:23:30.945461 USB2 port 2 scanning...
747 12:23:30.949795 scan_static_bus for USB2 port 2
748 12:23:30.952901 scan_static_bus for USB2 port 2 done
749 12:23:30.957340 scan_bus: bus USB2 port 2 finished in 6 msecs
750 12:23:30.959889 USB2 port 3 scanning...
751 12:23:30.963373 scan_static_bus for USB2 port 3
752 12:23:30.967265 scan_static_bus for USB2 port 3 done
753 12:23:30.971861 scan_bus: bus USB2 port 3 finished in 6 msecs
754 12:23:30.974076 USB2 port 5 scanning...
755 12:23:30.977696 scan_static_bus for USB2 port 5
756 12:23:30.981697 scan_static_bus for USB2 port 5 done
757 12:23:30.985786 scan_bus: bus USB2 port 5 finished in 6 msecs
758 12:23:30.988452 USB2 port 9 scanning...
759 12:23:30.992439 scan_static_bus for USB2 port 9
760 12:23:30.995498 scan_static_bus for USB2 port 9 done
761 12:23:31.000246 scan_bus: bus USB2 port 9 finished in 6 msecs
762 12:23:31.002233 USB3 port 0 scanning...
763 12:23:31.006166 scan_static_bus for USB3 port 0
764 12:23:31.009860 scan_static_bus for USB3 port 0 done
765 12:23:31.014441 scan_bus: bus USB3 port 0 finished in 6 msecs
766 12:23:31.016646 USB3 port 1 scanning...
767 12:23:31.020457 scan_static_bus for USB3 port 1
768 12:23:31.023967 scan_static_bus for USB3 port 1 done
769 12:23:31.028651 scan_bus: bus USB3 port 1 finished in 6 msecs
770 12:23:31.031371 USB3 port 2 scanning...
771 12:23:31.034808 scan_static_bus for USB3 port 2
772 12:23:31.038615 scan_static_bus for USB3 port 2 done
773 12:23:31.042892 scan_bus: bus USB3 port 2 finished in 6 msecs
774 12:23:31.045574 USB3 port 3 scanning...
775 12:23:31.048729 scan_static_bus for USB3 port 3
776 12:23:31.052702 scan_static_bus for USB3 port 3 done
777 12:23:31.056696 scan_bus: bus USB3 port 3 finished in 6 msecs
778 12:23:31.059087 USB3 port 4 scanning...
779 12:23:31.063394 scan_static_bus for USB3 port 4
780 12:23:31.066919 scan_static_bus for USB3 port 4 done
781 12:23:31.071157 scan_bus: bus USB3 port 4 finished in 6 msecs
782 12:23:31.073802 USB2 port 4 scanning...
783 12:23:31.077364 scan_static_bus for USB2 port 4
784 12:23:31.080607 scan_static_bus for USB2 port 4 done
785 12:23:31.085137 scan_bus: bus USB2 port 4 finished in 6 msecs
786 12:23:31.087627 USB3 port 5 scanning...
787 12:23:31.091414 scan_static_bus for USB3 port 5
788 12:23:31.094754 scan_static_bus for USB3 port 5 done
789 12:23:31.099853 scan_bus: bus USB3 port 5 finished in 6 msecs
790 12:23:31.103511 scan_static_bus for USB0 port 0 done
791 12:23:31.108312 scan_bus: bus USB0 port 0 finished in 219 msecs
792 12:23:31.112813 scan_static_bus for PCI: 00:14.0 done
793 12:23:31.116981 scan_bus: bus PCI: 00:14.0 finished in 236 msecs
794 12:23:31.119617 PCI: 00:15.2 scanning...
795 12:23:31.123191 scan_generic_bus for PCI: 00:15.2
796 12:23:31.126625 bus: PCI: 00:15.2[0]->I2C: 02:4a enabled
797 12:23:31.131120 scan_generic_bus for PCI: 00:15.2 done
798 12:23:31.135450 scan_bus: bus PCI: 00:15.2 finished in 11 msecs
799 12:23:31.138625 PCI: 00:15.3 scanning...
800 12:23:31.141666 scan_generic_bus for PCI: 00:15.3
801 12:23:31.145824 bus: PCI: 00:15.3[0]->I2C: 03:4a enabled
802 12:23:31.149605 scan_generic_bus for PCI: 00:15.3 done
803 12:23:31.154247 scan_bus: bus PCI: 00:15.3 finished in 11 msecs
804 12:23:31.157365 PCI: 00:19.0 scanning...
805 12:23:31.160911 scan_generic_bus for PCI: 00:19.0
806 12:23:31.165802 bus: PCI: 00:19.0[0]->I2C: 04:1a enabled
807 12:23:31.169146 scan_generic_bus for PCI: 00:19.0 done
808 12:23:31.173701 scan_bus: bus PCI: 00:19.0 finished in 11 msecs
809 12:23:31.176134 PCI: 00:1c.0 scanning...
810 12:23:31.180745 do_pci_scan_bridge for PCI: 00:1c.0
811 12:23:31.182733 PCI: pci_scan_bus for bus 01
812 12:23:31.186750 PCI: 01:00.0 [10ec/8168] ops
813 12:23:31.189848 PCI: 01:00.0 [10ec/8168] enabled
814 12:23:31.193841 Enabling Common Clock Configuration
815 12:23:31.197628 L1 Sub-State supported from root port 28
816 12:23:31.199926 L1 Sub-State Support = 0xf
817 12:23:31.203602 CommonModeRestoreTime = 0x96
818 12:23:31.207580 Power On Value = 0xf, Power On Scale = 0x1
819 12:23:31.209585 ASPM: Enabled L1
820 12:23:31.213050 PCIe: Max_Payload_Size adjusted to 128
821 12:23:31.218032 scan_bus: bus PCI: 00:1c.0 finished in 36 msecs
822 12:23:31.220363 PCI: 00:1e.2 scanning...
823 12:23:31.224618 scan_generic_bus for PCI: 00:1e.2
824 12:23:31.228028 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
825 12:23:31.232047 scan_generic_bus for PCI: 00:1e.2 done
826 12:23:31.236219 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
827 12:23:31.238988 PCI: 00:1f.0 scanning...
828 12:23:31.242292 scan_static_bus for PCI: 00:1f.0
829 12:23:31.244682 PNP: 0c09.0 enabled
830 12:23:31.246890 PNP: 0c09.0 scanning...
831 12:23:31.251018 scan_static_bus for PNP: 0c09.0
832 12:23:31.254507 scan_static_bus for PNP: 0c09.0 done
833 12:23:31.258737 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
834 12:23:31.262539 scan_static_bus for PCI: 00:1f.0 done
835 12:23:31.268083 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
836 12:23:31.270085 PCI: 00:1f.3 scanning...
837 12:23:31.273929 scan_static_bus for PCI: 00:1f.3
838 12:23:31.277059 scan_static_bus for PCI: 00:1f.3 done
839 12:23:31.281568 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
840 12:23:31.284042 PCI: 00:1f.4 scanning...
841 12:23:31.288830 scan_generic_bus for PCI: 00:1f.4
842 12:23:31.292608 scan_generic_bus for PCI: 00:1f.4 done
843 12:23:31.296591 scan_bus: bus PCI: 00:1f.4 finished in 7 msecs
844 12:23:31.299542 PCI: 00:1f.5 scanning...
845 12:23:31.302558 scan_generic_bus for PCI: 00:1f.5
846 12:23:31.307528 scan_generic_bus for PCI: 00:1f.5 done
847 12:23:31.312029 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
848 12:23:31.316741 scan_bus: bus DOMAIN: 0000 finished in 653 msecs
849 12:23:31.319781 scan_static_bus for Root Device done
850 12:23:31.325260 scan_bus: bus Root Device finished in 672 msecs
851 12:23:31.326280 done
852 12:23:31.332292 BS: BS_DEV_ENUMERATE run times (exec / console): 12 / 1036 ms
853 12:23:31.338580 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
854 12:23:31.343372 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
855 12:23:31.349400 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
856 12:23:31.354964 MRC: 'RECOVERY_MRC_CACHE' does not need update.
857 12:23:31.357919 Chrome EC: UHEPI supported
858 12:23:31.365334 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
859 12:23:31.368593 SPI flash protection: WPSW=0 SRP0=1
860 12:23:31.373431 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
861 12:23:31.379171 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 39 ms
862 12:23:31.382261 found VGA at PCI: 00:02.0
863 12:23:31.384835 Setting up VGA for PCI: 00:02.0
864 12:23:31.390056 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
865 12:23:31.395049 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
866 12:23:31.397768 Allocating resources...
867 12:23:31.399611 Reading resources...
868 12:23:31.404095 Root Device read_resources bus 0 link: 0
869 12:23:31.408886 CPU_CLUSTER: 0 read_resources bus 0 link: 0
870 12:23:31.413501 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
871 12:23:31.418416 DOMAIN: 0000 read_resources bus 0 link: 0
872 12:23:31.423621 PCI: 00:04.0 read_resources bus 1 link: 0
873 12:23:31.428441 PCI: 00:04.0 read_resources bus 1 link: 0 done
874 12:23:31.433787 PCI: 00:14.0 read_resources bus 0 link: 0
875 12:23:31.438350 USB0 port 0 read_resources bus 0 link: 0
876 12:23:31.447597 USB0 port 0 read_resources bus 0 link: 0 done
877 12:23:31.451858 PCI: 00:14.0 read_resources bus 0 link: 0 done
878 12:23:31.457665 PCI: 00:15.2 read_resources bus 2 link: 0
879 12:23:31.463453 PCI: 00:15.2 read_resources bus 2 link: 0 done
880 12:23:31.467630 PCI: 00:15.3 read_resources bus 3 link: 0
881 12:23:31.472903 PCI: 00:15.3 read_resources bus 3 link: 0 done
882 12:23:31.477829 PCI: 00:19.0 read_resources bus 4 link: 0
883 12:23:31.483615 PCI: 00:19.0 read_resources bus 4 link: 0 done
884 12:23:31.487918 PCI: 00:1c.0 read_resources bus 1 link: 0
885 12:23:31.493132 PCI: 00:1c.0 read_resources bus 1 link: 0 done
886 12:23:31.498168 PCI: 00:1e.2 read_resources bus 5 link: 0
887 12:23:31.504041 PCI: 00:1e.2 read_resources bus 5 link: 0 done
888 12:23:31.507955 PCI: 00:1f.0 read_resources bus 0 link: 0
889 12:23:31.513646 PCI: 00:1f.0 read_resources bus 0 link: 0 done
890 12:23:31.519248 DOMAIN: 0000 read_resources bus 0 link: 0 done
891 12:23:31.524449 Root Device read_resources bus 0 link: 0 done
892 12:23:31.527232 Done reading resources.
893 12:23:31.532773 Show resources in subtree (Root Device)...After reading.
894 12:23:31.537294 Root Device child on link 0 CPU_CLUSTER: 0
895 12:23:31.541452 CPU_CLUSTER: 0 child on link 0 APIC: 00
896 12:23:31.542704 APIC: 00
897 12:23:31.544145 APIC: 02
898 12:23:31.548557 DOMAIN: 0000 child on link 0 PCI: 00:00.0
899 12:23:31.556869 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
900 12:23:31.566923 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
901 12:23:31.568340 PCI: 00:00.0
902 12:23:31.578659 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
903 12:23:31.587619 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
904 12:23:31.596987 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
905 12:23:31.606186 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
906 12:23:31.615707 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
907 12:23:31.625163 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
908 12:23:31.634676 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
909 12:23:31.643556 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
910 12:23:31.652779 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
911 12:23:31.661956 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
912 12:23:31.670724 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
913 12:23:31.680812 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
914 12:23:31.690352 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
915 12:23:31.700369 PCI: 00:00.0 resource base 100000000 size 5e800000 align 0 gran 0 limit 0 flags e0004200 index d
916 12:23:31.709289 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
917 12:23:31.717995 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
918 12:23:31.720125 PCI: 00:02.0
919 12:23:31.730451 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
920 12:23:31.740689 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
921 12:23:31.749231 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
922 12:23:31.753271 PCI: 00:04.0 child on link 0 GENERIC: 0.0
923 12:23:31.763140 PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
924 12:23:31.765532 GENERIC: 0.0
925 12:23:31.766954 PCI: 00:08.0
926 12:23:31.776754 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
927 12:23:31.778187 PCI: 00:12.0
928 12:23:31.788427 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
929 12:23:31.792927 PCI: 00:14.0 child on link 0 USB0 port 0
930 12:23:31.802961 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
931 12:23:31.806500 USB0 port 0 child on link 0 USB2 port 0
932 12:23:31.808788 USB2 port 0
933 12:23:31.810302 USB2 port 1
934 12:23:31.812480 USB2 port 2
935 12:23:31.814371 USB2 port 3
936 12:23:31.815743 USB2 port 5
937 12:23:31.817469 USB2 port 6
938 12:23:31.819292 USB2 port 9
939 12:23:31.820514 USB3 port 0
940 12:23:31.822890 USB3 port 1
941 12:23:31.824515 USB3 port 2
942 12:23:31.826222 USB3 port 3
943 12:23:31.827956 USB3 port 4
944 12:23:31.829830 USB2 port 4
945 12:23:31.831437 USB3 port 5
946 12:23:31.833001 PCI: 00:14.2
947 12:23:31.843582 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
948 12:23:31.853175 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
949 12:23:31.854331 PCI: 00:14.3
950 12:23:31.864325 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
951 12:23:31.866525 PCI: 00:14.5
952 12:23:31.876361 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
953 12:23:31.877403 PCI: 00:15.0
954 12:23:31.882221 PCI: 00:15.2 child on link 0 I2C: 02:4a
955 12:23:31.891817 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
956 12:23:31.893632 I2C: 02:4a
957 12:23:31.897667 PCI: 00:15.3 child on link 0 I2C: 03:4a
958 12:23:31.907456 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
959 12:23:31.909280 I2C: 03:4a
960 12:23:31.911230 PCI: 00:16.0
961 12:23:31.921069 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
962 12:23:31.924770 PCI: 00:19.0 child on link 0 I2C: 04:1a
963 12:23:31.934983 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
964 12:23:31.936650 I2C: 04:1a
965 12:23:31.938457 PCI: 00:1a.0
966 12:23:31.947962 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
967 12:23:31.952481 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
968 12:23:31.961083 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
969 12:23:31.970890 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
970 12:23:31.980272 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
971 12:23:31.981334 PCI: 01:00.0
972 12:23:31.990310 PCI: 01:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
973 12:23:32.000425 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
974 12:23:32.010537 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 20
975 12:23:32.012004 PCI: 00:1e.0
976 12:23:32.022942 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
977 12:23:32.033136 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
978 12:23:32.036794 PCI: 00:1e.2 child on link 0 SPI: 00
979 12:23:32.046873 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
980 12:23:32.048478 SPI: 00
981 12:23:32.052420 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
982 12:23:32.061570 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
983 12:23:32.070018 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
984 12:23:32.071704 PNP: 0c09.0
985 12:23:32.080316 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
986 12:23:32.082766 PCI: 00:1f.3
987 12:23:32.092164 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
988 12:23:32.101956 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
989 12:23:32.104489 PCI: 00:1f.4
990 12:23:32.112860 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
991 12:23:32.122830 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
992 12:23:32.124713 PCI: 00:1f.5
993 12:23:32.134257 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
994 12:23:32.141498 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
995 12:23:32.147311 PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff
996 12:23:32.150896 PCI: 01:00.0 10 * [0x0 - 0xff] io
997 12:23:32.157296 PCI: 00:1c.0 io: size: 1000 align: 12 gran: 12 limit: ffff done
998 12:23:32.163441 PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
999 12:23:32.167452 PCI: 01:00.0 20 * [0x0 - 0x3fff] mem
1000 12:23:32.171655 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1001 12:23:32.178764 PCI: 00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1002 12:23:32.185662 PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1003 12:23:32.193523 PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1004 12:23:32.201007 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1005 12:23:32.207079 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1006 12:23:32.214185 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1007 12:23:32.222237 update_constraints: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1008 12:23:32.229366 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1009 12:23:32.237345 update_constraints: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1010 12:23:32.240472 DOMAIN: 0000: Resource ranges:
1011 12:23:32.244344 * Base: 1000, Size: 800, Tag: 100
1012 12:23:32.247875 * Base: 1900, Size: d6a0, Tag: 100
1013 12:23:32.251334 * Base: efc0, Size: 1040, Tag: 100
1014 12:23:32.256805 PCI: 00:1c.0 1c * [0x2000 - 0x2fff] limit: 2fff io
1015 12:23:32.262163 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1016 12:23:32.268475 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1017 12:23:32.275541 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1018 12:23:32.283313 update_constraints: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1019 12:23:32.290601 update_constraints: PCI: 00:00.0 01 base fed10000 limit fed17fff mem (fixed)
1020 12:23:32.298171 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1021 12:23:32.305704 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1022 12:23:32.313941 update_constraints: PCI: 00:00.0 04 base fc000000 limit fc000fff mem (fixed)
1023 12:23:32.320995 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1024 12:23:32.328783 update_constraints: PCI: 00:00.0 06 base fe000000 limit fe00ffff mem (fixed)
1025 12:23:32.336108 update_constraints: PCI: 00:00.0 07 base fed90000 limit fed90fff mem (fixed)
1026 12:23:32.344301 update_constraints: PCI: 00:00.0 08 base fed91000 limit fed91fff mem (fixed)
1027 12:23:32.351752 update_constraints: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1028 12:23:32.359311 update_constraints: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1029 12:23:32.367132 update_constraints: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1030 12:23:32.374885 update_constraints: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1031 12:23:32.382458 update_constraints: PCI: 00:00.0 0d base 100000000 limit 15e7fffff mem (fixed)
1032 12:23:32.390302 update_constraints: PCI: 00:00.0 0e base 000a0000 limit 000bffff mem (fixed)
1033 12:23:32.398005 update_constraints: PCI: 00:00.0 0f base 000c0000 limit 000fffff mem (fixed)
1034 12:23:32.405329 update_constraints: PCI: 00:1e.0 10 base fe032000 limit fe032fff mem (fixed)
1035 12:23:32.409103 DOMAIN: 0000: Resource ranges:
1036 12:23:32.412932 * Base: 9f800000, Size: 40800000, Tag: 200
1037 12:23:32.417451 * Base: f0000000, Size: c000000, Tag: 200
1038 12:23:32.421757 * Base: fc001000, Size: 1fff000, Tag: 200
1039 12:23:32.425577 * Base: fe010000, Size: 22000, Tag: 200
1040 12:23:32.429995 * Base: fe033000, Size: cdd000, Tag: 200
1041 12:23:32.434108 * Base: fed18000, Size: 68000, Tag: 200
1042 12:23:32.437990 * Base: fed84000, Size: c000, Tag: 200
1043 12:23:32.442327 * Base: fed92000, Size: e000, Tag: 200
1044 12:23:32.446368 * Base: feda2000, Size: 125e000, Tag: 200
1045 12:23:32.451087 * Base: 15e800000, Size: 7ea1800000, Tag: 100200
1046 12:23:32.458404 PCI: 00:02.0 18 * [0xa0000000 - 0xafffffff] limit: afffffff prefmem
1047 12:23:32.464936 PCI: 00:02.0 10 * [0xb0000000 - 0xb0ffffff] limit: b0ffffff mem
1048 12:23:32.471603 PCI: 00:1c.0 20 * [0x9f800000 - 0x9f8fffff] limit: 9f8fffff mem
1049 12:23:32.477846 PCI: 00:1f.3 20 * [0x9f900000 - 0x9f9fffff] limit: 9f9fffff mem
1050 12:23:32.484773 PCI: 00:14.0 10 * [0x9fa00000 - 0x9fa0ffff] limit: 9fa0ffff mem
1051 12:23:32.491095 PCI: 00:04.0 10 * [0x9fa10000 - 0x9fa17fff] limit: 9fa17fff mem
1052 12:23:32.497874 PCI: 00:14.3 10 * [0x9fa18000 - 0x9fa1bfff] limit: 9fa1bfff mem
1053 12:23:32.504411 PCI: 00:1f.3 10 * [0x9fa1c000 - 0x9fa1ffff] limit: 9fa1ffff mem
1054 12:23:32.511349 PCI: 00:14.2 10 * [0x9fa20000 - 0x9fa21fff] limit: 9fa21fff mem
1055 12:23:32.517754 PCI: 00:08.0 10 * [0x9fa22000 - 0x9fa22fff] limit: 9fa22fff mem
1056 12:23:32.524150 PCI: 00:12.0 10 * [0x9fa23000 - 0x9fa23fff] limit: 9fa23fff mem
1057 12:23:32.530604 PCI: 00:14.2 18 * [0x9fa24000 - 0x9fa24fff] limit: 9fa24fff mem
1058 12:23:32.537145 PCI: 00:14.5 10 * [0x9fa25000 - 0x9fa25fff] limit: 9fa25fff mem
1059 12:23:32.543613 PCI: 00:15.2 10 * [0x9fa26000 - 0x9fa26fff] limit: 9fa26fff mem
1060 12:23:32.550656 PCI: 00:15.3 10 * [0x9fa27000 - 0x9fa27fff] limit: 9fa27fff mem
1061 12:23:32.556969 PCI: 00:16.0 10 * [0x9fa28000 - 0x9fa28fff] limit: 9fa28fff mem
1062 12:23:32.563719 PCI: 00:19.0 10 * [0x9fa29000 - 0x9fa29fff] limit: 9fa29fff mem
1063 12:23:32.570619 PCI: 00:1a.0 10 * [0x9fa2a000 - 0x9fa2afff] limit: 9fa2afff mem
1064 12:23:32.577547 PCI: 00:1e.0 18 * [0x9fa2b000 - 0x9fa2bfff] limit: 9fa2bfff mem
1065 12:23:32.583814 PCI: 00:1e.2 10 * [0x9fa2c000 - 0x9fa2cfff] limit: 9fa2cfff mem
1066 12:23:32.590779 PCI: 00:1f.5 10 * [0x9fa2d000 - 0x9fa2dfff] limit: 9fa2dfff mem
1067 12:23:32.597333 PCI: 00:1f.4 10 * [0x9fa2e000 - 0x9fa2e0ff] limit: 9fa2e0ff mem
1068 12:23:32.604211 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1069 12:23:32.610904 PCI: 00:1c.0 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff
1070 12:23:32.614293 PCI: 00:1c.0: Resource ranges:
1071 12:23:32.618187 * Base: 2000, Size: 1000, Tag: 100
1072 12:23:32.623268 PCI: 01:00.0 10 * [0x2000 - 0x20ff] limit: 20ff io
1073 12:23:32.630657 PCI: 00:1c.0 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff done
1074 12:23:32.638237 PCI: 00:1c.0 mem: base: 9f800000 size: 100000 align: 20 gran: 20 limit: 9f8fffff
1075 12:23:32.641840 PCI: 00:1c.0: Resource ranges:
1076 12:23:32.645429 * Base: 9f800000, Size: 100000, Tag: 200
1077 12:23:32.652449 PCI: 01:00.0 20 * [0x9f800000 - 0x9f803fff] limit: 9f803fff mem
1078 12:23:32.658786 PCI: 01:00.0 18 * [0x9f804000 - 0x9f804fff] limit: 9f804fff mem
1079 12:23:32.667150 PCI: 00:1c.0 mem: base: 9f800000 size: 100000 align: 20 gran: 20 limit: 9f8fffff done
1080 12:23:32.674411 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1081 12:23:32.678598 Root Device assign_resources, bus 0 link: 0
1082 12:23:32.683604 DOMAIN: 0000 assign_resources, bus 0 link: 0
1083 12:23:32.692751 PCI: 00:02.0 10 <- [0x00b0000000 - 0x00b0ffffff] size 0x01000000 gran 0x18 mem64
1084 12:23:32.700718 PCI: 00:02.0 18 <- [0x00a0000000 - 0x00afffffff] size 0x10000000 gran 0x1c prefmem64
1085 12:23:32.708603 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1086 12:23:32.716765 PCI: 00:04.0 10 <- [0x009fa10000 - 0x009fa17fff] size 0x00008000 gran 0x0f mem64
1087 12:23:32.721087 PCI: 00:04.0 assign_resources, bus 1 link: 0
1088 12:23:32.726186 PCI: 00:04.0 assign_resources, bus 1 link: 0
1089 12:23:32.734546 PCI: 00:08.0 10 <- [0x009fa22000 - 0x009fa22fff] size 0x00001000 gran 0x0c mem64
1090 12:23:32.742442 PCI: 00:12.0 10 <- [0x009fa23000 - 0x009fa23fff] size 0x00001000 gran 0x0c mem64
1091 12:23:32.751065 PCI: 00:14.0 10 <- [0x009fa00000 - 0x009fa0ffff] size 0x00010000 gran 0x10 mem64
1092 12:23:32.755668 PCI: 00:14.0 assign_resources, bus 0 link: 0
1093 12:23:32.760504 PCI: 00:14.0 assign_resources, bus 0 link: 0
1094 12:23:32.767970 PCI: 00:14.2 10 <- [0x009fa20000 - 0x009fa21fff] size 0x00002000 gran 0x0d mem64
1095 12:23:32.776775 PCI: 00:14.2 18 <- [0x009fa24000 - 0x009fa24fff] size 0x00001000 gran 0x0c mem64
1096 12:23:32.784490 PCI: 00:14.3 10 <- [0x009fa18000 - 0x009fa1bfff] size 0x00004000 gran 0x0e mem64
1097 12:23:32.792871 PCI: 00:14.5 10 <- [0x009fa25000 - 0x009fa25fff] size 0x00001000 gran 0x0c mem64
1098 12:23:32.800842 PCI: 00:15.2 10 <- [0x009fa26000 - 0x009fa26fff] size 0x00001000 gran 0x0c mem64
1099 12:23:32.805925 PCI: 00:15.2 assign_resources, bus 2 link: 0
1100 12:23:32.810399 PCI: 00:15.2 assign_resources, bus 2 link: 0
1101 12:23:32.818458 PCI: 00:15.3 10 <- [0x009fa27000 - 0x009fa27fff] size 0x00001000 gran 0x0c mem64
1102 12:23:32.823169 PCI: 00:15.3 assign_resources, bus 3 link: 0
1103 12:23:32.828092 PCI: 00:15.3 assign_resources, bus 3 link: 0
1104 12:23:32.836688 PCI: 00:16.0 10 <- [0x009fa28000 - 0x009fa28fff] size 0x00001000 gran 0x0c mem64
1105 12:23:32.844253 PCI: 00:19.0 10 <- [0x009fa29000 - 0x009fa29fff] size 0x00001000 gran 0x0c mem64
1106 12:23:32.849446 PCI: 00:19.0 assign_resources, bus 4 link: 0
1107 12:23:32.853570 PCI: 00:19.0 assign_resources, bus 4 link: 0
1108 12:23:32.861818 PCI: 00:1a.0 10 <- [0x009fa2a000 - 0x009fa2afff] size 0x00001000 gran 0x0c mem64
1109 12:23:32.871141 PCI: 00:1c.0 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 01 io
1110 12:23:32.880964 PCI: 00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1111 12:23:32.889193 PCI: 00:1c.0 20 <- [0x009f800000 - 0x009f8fffff] size 0x00100000 gran 0x14 bus 01 mem
1112 12:23:32.893296 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1113 12:23:32.901162 PCI: 01:00.0 10 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io
1114 12:23:32.909033 PCI: 01:00.0 18 <- [0x009f804000 - 0x009f804fff] size 0x00001000 gran 0x0c mem64
1115 12:23:32.917818 PCI: 01:00.0 20 <- [0x009f800000 - 0x009f803fff] size 0x00004000 gran 0x0e mem64
1116 12:23:32.922059 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1117 12:23:32.930586 PCI: 00:1e.0 18 <- [0x009fa2b000 - 0x009fa2bfff] size 0x00001000 gran 0x0c mem64
1118 12:23:32.938480 PCI: 00:1e.2 10 <- [0x009fa2c000 - 0x009fa2cfff] size 0x00001000 gran 0x0c mem64
1119 12:23:32.943444 PCI: 00:1e.2 assign_resources, bus 5 link: 0
1120 12:23:32.948351 PCI: 00:1e.2 assign_resources, bus 5 link: 0
1121 12:23:32.952327 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1122 12:23:32.958066 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1123 12:23:32.962953 LPC: Trying to open IO window from 800 size 1ff
1124 12:23:32.970916 PCI: 00:1f.3 10 <- [0x009fa1c000 - 0x009fa1ffff] size 0x00004000 gran 0x0e mem64
1125 12:23:32.978903 PCI: 00:1f.3 20 <- [0x009f900000 - 0x009f9fffff] size 0x00100000 gran 0x14 mem64
1126 12:23:32.987118 PCI: 00:1f.4 10 <- [0x009fa2e000 - 0x009fa2e0ff] size 0x00000100 gran 0x08 mem64
1127 12:23:32.995387 PCI: 00:1f.5 10 <- [0x009fa2d000 - 0x009fa2dfff] size 0x00001000 gran 0x0c mem
1128 12:23:33.000440 DOMAIN: 0000 assign_resources, bus 0 link: 0
1129 12:23:33.005121 Root Device assign_resources, bus 0 link: 0
1130 12:23:33.007596 Done setting resources.
1131 12:23:33.013636 Show resources in subtree (Root Device)...After assigning values.
1132 12:23:33.018263 Root Device child on link 0 CPU_CLUSTER: 0
1133 12:23:33.022270 CPU_CLUSTER: 0 child on link 0 APIC: 00
1134 12:23:33.023664 APIC: 00
1135 12:23:33.025331 APIC: 02
1136 12:23:33.029768 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1137 12:23:33.038739 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1138 12:23:33.048379 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1139 12:23:33.049784 PCI: 00:00.0
1140 12:23:33.059277 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1141 12:23:33.068694 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1142 12:23:33.078957 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1143 12:23:33.087598 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1144 12:23:33.096655 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1145 12:23:33.106207 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1146 12:23:33.115360 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1147 12:23:33.124915 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1148 12:23:33.134576 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1149 12:23:33.143469 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1150 12:23:33.152172 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1151 12:23:33.162154 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1152 12:23:33.171228 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1153 12:23:33.181326 PCI: 00:00.0 resource base 100000000 size 5e800000 align 0 gran 0 limit 0 flags e0004200 index d
1154 12:23:33.190894 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1155 12:23:33.199320 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1156 12:23:33.200777 PCI: 00:02.0
1157 12:23:33.211365 PCI: 00:02.0 resource base b0000000 size 1000000 align 24 gran 24 limit b0ffffff flags 60000201 index 10
1158 12:23:33.223322 PCI: 00:02.0 resource base a0000000 size 10000000 align 28 gran 28 limit afffffff flags 60001201 index 18
1159 12:23:33.231961 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1160 12:23:33.236497 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1161 12:23:33.246209 PCI: 00:04.0 resource base 9fa10000 size 8000 align 15 gran 15 limit 9fa17fff flags 60000201 index 10
1162 12:23:33.248124 GENERIC: 0.0
1163 12:23:33.249952 PCI: 00:08.0
1164 12:23:33.259795 PCI: 00:08.0 resource base 9fa22000 size 1000 align 12 gran 12 limit 9fa22fff flags 60000201 index 10
1165 12:23:33.261572 PCI: 00:12.0
1166 12:23:33.272194 PCI: 00:12.0 resource base 9fa23000 size 1000 align 12 gran 12 limit 9fa23fff flags 60000201 index 10
1167 12:23:33.277339 PCI: 00:14.0 child on link 0 USB0 port 0
1168 12:23:33.287052 PCI: 00:14.0 resource base 9fa00000 size 10000 align 16 gran 16 limit 9fa0ffff flags 60000201 index 10
1169 12:23:33.291326 USB0 port 0 child on link 0 USB2 port 0
1170 12:23:33.292874 USB2 port 0
1171 12:23:33.294868 USB2 port 1
1172 12:23:33.296963 USB2 port 2
1173 12:23:33.298411 USB2 port 3
1174 12:23:33.299688 USB2 port 5
1175 12:23:33.301952 USB2 port 6
1176 12:23:33.303332 USB2 port 9
1177 12:23:33.304896 USB3 port 0
1178 12:23:33.306736 USB3 port 1
1179 12:23:33.308717 USB3 port 2
1180 12:23:33.310993 USB3 port 3
1181 12:23:33.312778 USB3 port 4
1182 12:23:33.313687 USB2 port 4
1183 12:23:33.315627 USB3 port 5
1184 12:23:33.317374 PCI: 00:14.2
1185 12:23:33.327838 PCI: 00:14.2 resource base 9fa20000 size 2000 align 13 gran 13 limit 9fa21fff flags 60000201 index 10
1186 12:23:33.338150 PCI: 00:14.2 resource base 9fa24000 size 1000 align 12 gran 12 limit 9fa24fff flags 60000201 index 18
1187 12:23:33.339832 PCI: 00:14.3
1188 12:23:33.350483 PCI: 00:14.3 resource base 9fa18000 size 4000 align 14 gran 14 limit 9fa1bfff flags 60000201 index 10
1189 12:23:33.351450 PCI: 00:14.5
1190 12:23:33.362186 PCI: 00:14.5 resource base 9fa25000 size 1000 align 12 gran 12 limit 9fa25fff flags 60000201 index 10
1191 12:23:33.363974 PCI: 00:15.0
1192 12:23:33.367401 PCI: 00:15.2 child on link 0 I2C: 02:4a
1193 12:23:33.378303 PCI: 00:15.2 resource base 9fa26000 size 1000 align 12 gran 12 limit 9fa26fff flags 60000201 index 10
1194 12:23:33.379885 I2C: 02:4a
1195 12:23:33.383968 PCI: 00:15.3 child on link 0 I2C: 03:4a
1196 12:23:33.394387 PCI: 00:15.3 resource base 9fa27000 size 1000 align 12 gran 12 limit 9fa27fff flags 60000201 index 10
1197 12:23:33.395923 I2C: 03:4a
1198 12:23:33.397324 PCI: 00:16.0
1199 12:23:33.407865 PCI: 00:16.0 resource base 9fa28000 size 1000 align 12 gran 12 limit 9fa28fff flags 60000201 index 10
1200 12:23:33.411919 PCI: 00:19.0 child on link 0 I2C: 04:1a
1201 12:23:33.422186 PCI: 00:19.0 resource base 9fa29000 size 1000 align 12 gran 12 limit 9fa29fff flags 60000201 index 10
1202 12:23:33.423854 I2C: 04:1a
1203 12:23:33.425531 PCI: 00:1a.0
1204 12:23:33.436221 PCI: 00:1a.0 resource base 9fa2a000 size 1000 align 12 gran 12 limit 9fa2afff flags 60000201 index 10
1205 12:23:33.440173 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1206 12:23:33.450291 PCI: 00:1c.0 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c
1207 12:23:33.461664 PCI: 00:1c.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1208 12:23:33.472089 PCI: 00:1c.0 resource base 9f800000 size 100000 align 20 gran 20 limit 9f8fffff flags 60080202 index 20
1209 12:23:33.473596 PCI: 01:00.0
1210 12:23:33.483266 PCI: 01:00.0 resource base 2000 size 100 align 8 gran 8 limit 20ff flags 60000100 index 10
1211 12:23:33.493307 PCI: 01:00.0 resource base 9f804000 size 1000 align 12 gran 12 limit 9f804fff flags 60000201 index 18
1212 12:23:33.503943 PCI: 01:00.0 resource base 9f800000 size 4000 align 14 gran 14 limit 9f803fff flags 60000201 index 20
1213 12:23:33.504924 PCI: 00:1e.0
1214 12:23:33.516477 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1215 12:23:33.526754 PCI: 00:1e.0 resource base 9fa2b000 size 1000 align 12 gran 12 limit 9fa2bfff flags 60000201 index 18
1216 12:23:33.530934 PCI: 00:1e.2 child on link 0 SPI: 00
1217 12:23:33.540883 PCI: 00:1e.2 resource base 9fa2c000 size 1000 align 12 gran 12 limit 9fa2cfff flags 60000201 index 10
1218 12:23:33.542359 SPI: 00
1219 12:23:33.546767 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1220 12:23:33.555252 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1221 12:23:33.564350 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1222 12:23:33.566420 PNP: 0c09.0
1223 12:23:33.574643 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1224 12:23:33.576230 PCI: 00:1f.3
1225 12:23:33.586844 PCI: 00:1f.3 resource base 9fa1c000 size 4000 align 14 gran 14 limit 9fa1ffff flags 60000201 index 10
1226 12:23:33.597152 PCI: 00:1f.3 resource base 9f900000 size 100000 align 20 gran 20 limit 9f9fffff flags 60000201 index 20
1227 12:23:33.598700 PCI: 00:1f.4
1228 12:23:33.608044 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1229 12:23:33.618108 PCI: 00:1f.4 resource base 9fa2e000 size 100 align 12 gran 8 limit 9fa2e0ff flags 60000201 index 10
1230 12:23:33.619809 PCI: 00:1f.5
1231 12:23:33.629336 PCI: 00:1f.5 resource base 9fa2d000 size 1000 align 12 gran 12 limit 9fa2dfff flags 60000200 index 10
1232 12:23:33.632363 Done allocating resources.
1233 12:23:33.638376 BS: BS_DEV_RESOURCES run times (exec / console): 30 / 2218 ms
1234 12:23:33.641235 Enabling resources...
1235 12:23:33.645549 PCI: 00:00.0 subsystem <- 8086/9b71
1236 12:23:33.647763 PCI: 00:00.0 cmd <- 06
1237 12:23:33.652067 PCI: 00:02.0 subsystem <- 8086/9baa
1238 12:23:33.654000 PCI: 00:02.0 cmd <- 03
1239 12:23:33.658623 PCI: 00:04.0 subsystem <- 8086/1903
1240 12:23:33.660712 PCI: 00:04.0 cmd <- 02
1241 12:23:33.663174 PCI: 00:08.0 cmd <- 06
1242 12:23:33.666912 PCI: 00:12.0 subsystem <- 8086/02f9
1243 12:23:33.669753 PCI: 00:12.0 cmd <- 02
1244 12:23:33.673914 PCI: 00:14.0 subsystem <- 8086/02ed
1245 12:23:33.675921 PCI: 00:14.0 cmd <- 02
1246 12:23:33.677752 PCI: 00:14.2 cmd <- 02
1247 12:23:33.682315 PCI: 00:14.3 subsystem <- 8086/02f0
1248 12:23:33.684585 PCI: 00:14.3 cmd <- 02
1249 12:23:33.688231 PCI: 00:14.5 subsystem <- 8086/02f5
1250 12:23:33.690508 PCI: 00:14.5 cmd <- 06
1251 12:23:33.694726 PCI: 00:15.2 subsystem <- 8086/02ea
1252 12:23:33.697409 PCI: 00:15.2 cmd <- 02
1253 12:23:33.700857 PCI: 00:15.3 subsystem <- 8086/02eb
1254 12:23:33.703416 PCI: 00:15.3 cmd <- 02
1255 12:23:33.707222 PCI: 00:16.0 subsystem <- 8086/02e0
1256 12:23:33.709270 PCI: 00:16.0 cmd <- 02
1257 12:23:33.713751 PCI: 00:19.0 subsystem <- 8086/02c5
1258 12:23:33.715822 PCI: 00:19.0 cmd <- 02
1259 12:23:33.720154 PCI: 00:1a.0 subsystem <- 8086/02c4
1260 12:23:33.722306 PCI: 00:1a.0 cmd <- 06
1261 12:23:33.726064 PCI: 00:1c.0 bridge ctrl <- 0013
1262 12:23:33.729131 PCI: 00:1c.0 subsystem <- 8086/02be
1263 12:23:33.731899 PCI: 00:1c.0 cmd <- 07
1264 12:23:33.735865 PCI: 00:1e.0 subsystem <- 8086/02a8
1265 12:23:33.738057 PCI: 00:1e.0 cmd <- 06
1266 12:23:33.741924 PCI: 00:1e.2 subsystem <- 8086/02aa
1267 12:23:33.743767 PCI: 00:1e.2 cmd <- 06
1268 12:23:33.748470 PCI: 00:1f.0 subsystem <- 8086/0285
1269 12:23:33.750484 PCI: 00:1f.0 cmd <- 407
1270 12:23:33.754842 PCI: 00:1f.3 subsystem <- 8086/02c8
1271 12:23:33.757714 PCI: 00:1f.3 cmd <- 02
1272 12:23:33.760965 PCI: 00:1f.4 subsystem <- 8086/02a3
1273 12:23:33.763839 PCI: 00:1f.4 cmd <- 03
1274 12:23:33.767083 PCI: 00:1f.5 subsystem <- 8086/02a4
1275 12:23:33.769554 PCI: 00:1f.5 cmd <- 406
1276 12:23:33.773814 PCI: 01:00.0 cmd <- 03
1277 12:23:33.776016 done.
1278 12:23:33.782258 BS: BS_DEV_ENABLE run times (exec / console): 11 / 126 ms
1279 12:23:33.784382 Initializing devices...
1280 12:23:33.786836 Root Device init
1281 12:23:33.791381 Chrome EC: Set SMI mask to 0x0000000000000000
1282 12:23:33.796755 Chrome EC: clear events_b mask to 0x0000000000000000
1283 12:23:33.802820 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000004
1284 12:23:33.808125 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000000000004
1285 12:23:33.814849 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000000080004
1286 12:23:33.819520 Chrome EC: Set WAKE mask to 0x0000000000000000
1287 12:23:33.823362 Root Device init finished in 33 msecs
1288 12:23:33.827499 PCI: 00:00.0 init
1289 12:23:33.831188 CPU TDP = 15 Watts
1290 12:23:33.833083 CPU PL1 = 15 Watts
1291 12:23:33.835016 CPU PL2 = 35 Watts
1292 12:23:33.837130 CPU PsysPL2 = 65 Watts
1293 12:23:33.840761 PCI: 00:00.0 init finished in 9 msecs
1294 12:23:33.842578 PCI: 00:02.0 init
1295 12:23:33.845682 GMA: Found VBT in CBFS
1296 12:23:33.848642 GMA: Found valid VBT in CBFS
1297 12:23:33.851995 PCI: 00:02.0 init finished in 5 msecs
1298 12:23:33.854920 PCI: 00:08.0 init
1299 12:23:33.858946 PCI: 00:08.0 init finished in 0 msecs
1300 12:23:33.860659 PCI: 00:12.0 init
1301 12:23:33.864532 PCI: 00:12.0 init finished in 0 msecs
1302 12:23:33.866625 PCI: 00:14.0 init
1303 12:23:33.870411 PCI: 00:14.0 init finished in 0 msecs
1304 12:23:33.872664 PCI: 00:14.2 init
1305 12:23:33.877057 PCI: 00:14.2 init finished in 0 msecs
1306 12:23:33.879103 PCI: 00:14.3 init
1307 12:23:33.882853 PCI: 00:14.3 init finished in 0 msecs
1308 12:23:33.885196 PCI: 00:15.2 init
1309 12:23:33.889125 I2C bus 2 version 0x3132322a
1310 12:23:33.892506 DW I2C bus 2 at 0x9fa26000 (400 KHz)
1311 12:23:33.895964 PCI: 00:15.2 init finished in 6 msecs
1312 12:23:33.897828 PCI: 00:15.3 init
1313 12:23:33.901066 I2C bus 3 version 0x3132322a
1314 12:23:33.905291 DW I2C bus 3 at 0x9fa27000 (400 KHz)
1315 12:23:33.908488 PCI: 00:15.3 init finished in 6 msecs
1316 12:23:33.910987 PCI: 00:16.0 init
1317 12:23:33.915240 PCI: 00:16.0 init finished in 0 msecs
1318 12:23:33.917007 PCI: 00:19.0 init
1319 12:23:33.920083 I2C bus 4 version 0x3132322a
1320 12:23:33.923255 DW I2C bus 4 at 0x9fa29000 (400 KHz)
1321 12:23:33.927175 PCI: 00:19.0 init finished in 6 msecs
1322 12:23:33.929255 PCI: 00:1a.0 init
1323 12:23:33.933639 PCI: 00:1a.0 init finished in 0 msecs
1324 12:23:33.935911 PCI: 00:1c.0 init
1325 12:23:33.938864 Initializing PCH PCIe bridge.
1326 12:23:33.942550 PCI: 00:1c.0 init finished in 3 msecs
1327 12:23:33.945177 PCI: 00:1f.0 init
1328 12:23:33.949622 IOAPIC: Initializing IOAPIC at 0xfec00000
1329 12:23:33.954359 IOAPIC: Bootstrap Processor Local APIC = 0x00
1330 12:23:33.956449 IOAPIC: ID = 0x02
1331 12:23:33.958438 IOAPIC: Dumping registers
1332 12:23:33.961822 reg 0x0000: 0x02000000
1333 12:23:33.964087 reg 0x0001: 0x00770020
1334 12:23:33.966709 reg 0x0002: 0x00000000
1335 12:23:33.971100 PCI: 00:1f.0 init finished in 21 msecs
1336 12:23:33.973913 PCI: 00:1f.4 init
1337 12:23:33.976852 PCI: 00:1f.4 init finished in 0 msecs
1338 12:23:33.987523 PCI: 01:00.0 init
1339 12:23:33.992960 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1340 12:23:33.999116 Error: Could not locate 'ethernet_mac0' in VPD
1341 12:23:34.005927 r8168: mac address not found in VPD, using default 00:e0:4c:00:c0:b0
1342 12:23:34.009804 r8168: ignore invalid MAC address in cbfs
1343 12:23:34.012780 r8168: Resetting NIC...done
1344 12:23:34.017020 r8168: Programming MAC Address...done
1345 12:23:34.019523 r8168: Customized LED 0x5af
1346 12:23:34.023120 r8168: read back LED setting as 0x5af
1347 12:23:34.026985 PCI: 01:00.0 init finished in 35 msecs
1348 12:23:34.029652 PNP: 0c09.0 init
1349 12:23:34.034583 Google Chrome EC uptime: 178543.885 seconds
1350 12:23:34.038033 Google Chrome AP resets since EC boot: 77
1351 12:23:34.042729 Google Chrome most recent AP reset causes:
1352 12:23:34.046459 172373.003: 32768 shutdown: power failure
1353 12:23:34.051115 172373.009: 32768 shutdown: power failure
1354 12:23:34.055264 172373.302: 32775 shutdown: entering G3
1355 12:23:34.059660 178528.811: 32774 shutdown: by console command
1356 12:23:34.065457 Google Chrome EC reset flags at last EC boot: reset-pin
1357 12:23:34.069266 PNP: 0c09.0 init finished in 36 msecs
1358 12:23:34.071697 Devices initialized
1359 12:23:34.074675 Show all devs... After init.
1360 12:23:34.076633 Root Device: enabled 1
1361 12:23:34.079294 CPU_CLUSTER: 0: enabled 1
1362 12:23:34.082242 DOMAIN: 0000: enabled 1
1363 12:23:34.084408 APIC: 00: enabled 1
1364 12:23:34.086643 PCI: 00:00.0: enabled 1
1365 12:23:34.089064 PCI: 00:02.0: enabled 1
1366 12:23:34.091864 PCI: 00:04.0: enabled 1
1367 12:23:34.093582 PCI: 00:05.0: enabled 0
1368 12:23:34.096243 PCI: 00:12.0: enabled 1
1369 12:23:34.098791 PCI: 00:12.5: enabled 0
1370 12:23:34.100549 PCI: 00:12.6: enabled 0
1371 12:23:34.103896 PCI: 00:14.0: enabled 1
1372 12:23:34.106466 PCI: 00:14.1: enabled 0
1373 12:23:34.108591 PCI: 00:14.3: enabled 1
1374 12:23:34.111000 PCI: 00:14.5: enabled 1
1375 12:23:34.113849 PCI: 00:15.0: enabled 0
1376 12:23:34.116368 PCI: 00:15.1: enabled 0
1377 12:23:34.118317 PCI: 00:15.2: enabled 1
1378 12:23:34.120989 PCI: 00:15.3: enabled 1
1379 12:23:34.122729 PCI: 00:16.0: enabled 1
1380 12:23:34.125258 PCI: 00:16.1: enabled 0
1381 12:23:34.127593 PCI: 00:16.2: enabled 0
1382 12:23:34.130294 PCI: 00:16.3: enabled 0
1383 12:23:34.132452 PCI: 00:16.4: enabled 0
1384 12:23:34.135625 PCI: 00:16.5: enabled 0
1385 12:23:34.137858 PCI: 00:17.0: enabled 0
1386 12:23:34.139596 PCI: 00:19.0: enabled 1
1387 12:23:34.142850 PCI: 00:19.1: enabled 0
1388 12:23:34.144810 PCI: 00:19.2: enabled 0
1389 12:23:34.147397 PCI: 00:1a.0: enabled 1
1390 12:23:34.149901 PCI: 00:1c.0: enabled 0
1391 12:23:34.152397 PCI: 00:1c.1: enabled 0
1392 12:23:34.154498 PCI: 00:1c.2: enabled 0
1393 12:23:34.157421 PCI: 00:1c.3: enabled 0
1394 12:23:34.159443 PCI: 00:1c.4: enabled 0
1395 12:23:34.162268 PCI: 00:1c.5: enabled 0
1396 12:23:34.164603 PCI: 00:1c.0: enabled 1
1397 12:23:34.167129 PCI: 00:1c.7: enabled 0
1398 12:23:34.169241 PCI: 00:1d.0: enabled 1
1399 12:23:34.171328 PCI: 00:1d.1: enabled 0
1400 12:23:34.174073 PCI: 00:1d.2: enabled 1
1401 12:23:34.176667 PCI: 00:1d.3: enabled 0
1402 12:23:34.178936 PCI: 00:1d.4: enabled 0
1403 12:23:34.181287 PCI: 00:1d.5: enabled 1
1404 12:23:34.183629 PCI: 00:1e.0: enabled 1
1405 12:23:34.185862 PCI: 00:1e.1: enabled 0
1406 12:23:34.189045 PCI: 00:1e.2: enabled 1
1407 12:23:34.191428 PCI: 00:1e.3: enabled 0
1408 12:23:34.193755 PCI: 00:1f.0: enabled 1
1409 12:23:34.195725 PCI: 00:1f.1: enabled 0
1410 12:23:34.199489 PCI: 00:1f.2: enabled 0
1411 12:23:34.200480 PCI: 00:1f.3: enabled 1
1412 12:23:34.203562 PCI: 00:1f.4: enabled 1
1413 12:23:34.205691 PCI: 00:1f.5: enabled 1
1414 12:23:34.208186 PCI: 00:1f.6: enabled 0
1415 12:23:34.210452 GENERIC: 0.0: enabled 1
1416 12:23:34.212426 USB0 port 0: enabled 1
1417 12:23:34.215254 I2C: 02:4a: enabled 1
1418 12:23:34.217787 I2C: 03:4a: enabled 1
1419 12:23:34.219353 I2C: 04:1a: enabled 1
1420 12:23:34.222079 PCI: 01:00.0: enabled 1
1421 12:23:34.224260 PCI: 00:00.0: enabled 1
1422 12:23:34.226814 SPI: 00: enabled 1
1423 12:23:34.228524 PNP: 0c09.0: enabled 1
1424 12:23:34.230776 USB2 port 0: enabled 1
1425 12:23:34.233275 USB2 port 1: enabled 1
1426 12:23:34.235846 USB2 port 2: enabled 1
1427 12:23:34.238254 USB2 port 3: enabled 1
1428 12:23:34.240301 USB2 port 5: enabled 1
1429 12:23:34.242492 USB2 port 6: enabled 0
1430 12:23:34.244969 USB2 port 9: enabled 1
1431 12:23:34.247447 USB3 port 0: enabled 1
1432 12:23:34.249867 USB3 port 1: enabled 1
1433 12:23:34.251625 USB3 port 2: enabled 1
1434 12:23:34.254389 USB3 port 3: enabled 1
1435 12:23:34.256802 USB3 port 4: enabled 1
1436 12:23:34.259379 USB2 port 4: enabled 1
1437 12:23:34.261248 USB3 port 5: enabled 1
1438 12:23:34.263747 APIC: 02: enabled 1
1439 12:23:34.265483 PCI: 00:08.0: enabled 1
1440 12:23:34.268192 PCI: 00:14.2: enabled 1
1441 12:23:34.273928 BS: BS_DEV_INIT run times (exec / console): 27 / 458 ms
1442 12:23:34.276445 Disabling ACPI via APMC.
1443 12:23:34.281948 APMC done.
1444 12:23:34.286326 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1445 12:23:34.289789 ELOG: NV offset 0xaf0000 size 0x4000
1446 12:23:34.297775 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1447 12:23:34.304681 ELOG: Event(17) added with size 13 at 2023-11-08 12:23:34 UTC
1448 12:23:34.310924 ELOG: Event(92) added with size 9 at 2023-11-08 12:23:34 UTC
1449 12:23:34.317218 ELOG: Event(93) added with size 9 at 2023-11-08 12:23:34 UTC
1450 12:23:34.323424 ELOG: Event(9E) added with size 10 at 2023-11-08 12:23:34 UTC
1451 12:23:34.330280 ELOG: Event(9F) added with size 14 at 2023-11-08 12:23:34 UTC
1452 12:23:34.335570 BS: BS_DEV_INIT exit times (exec / console): 7 / 49 ms
1453 12:23:34.341653 ELOG: Event(A1) added with size 10 at 2023-11-08 12:23:34 UTC
1454 12:23:34.349171 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1455 12:23:34.355931 ELOG: Event(A0) added with size 9 at 2023-11-08 12:23:34 UTC
1456 12:23:34.360283 elog_add_boot_reason: Logged dev mode boot
1457 12:23:34.365431 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1458 12:23:34.367881 Finalize devices...
1459 12:23:34.370032 Devices finalized
1460 12:23:34.375296 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1461 12:23:34.380448 FMAP: area RW_NVRAM found @ afa000 (20480 bytes)
1462 12:23:34.386767 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1463 12:23:34.390341 ME: HFSTS1 : 0x80030045
1464 12:23:34.394854 ME: HFSTS2 : 0x30280136
1465 12:23:34.398578 ME: HFSTS3 : 0x00000050
1466 12:23:34.402596 ME: HFSTS4 : 0x00004800
1467 12:23:34.406395 ME: HFSTS5 : 0x00000000
1468 12:23:34.411114 ME: HFSTS6 : 0x40400006
1469 12:23:34.414472 ME: Manufacturing Mode : NO
1470 12:23:34.417724 ME: FW Partition Table : OK
1471 12:23:34.420663 ME: Bringup Loader Failure : NO
1472 12:23:34.423719 ME: Firmware Init Complete : NO
1473 12:23:34.427172 ME: Boot Options Present : NO
1474 12:23:34.430700 ME: Update In Progress : NO
1475 12:23:34.433767 ME: D0i3 Support : YES
1476 12:23:34.437119 ME: Low Power State Enabled : NO
1477 12:23:34.440653 ME: CPU Replaced : YES
1478 12:23:34.444630 ME: CPU Replacement Valid : YES
1479 12:23:34.447210 ME: Current Working State : 5
1480 12:23:34.450562 ME: Current Operation State : 1
1481 12:23:34.453902 ME: Current Operation Mode : 3
1482 12:23:34.457641 ME: Error Code : 0
1483 12:23:34.460450 ME: CPU Debug Disabled : YES
1484 12:23:34.463944 ME: TXT Support : NO
1485 12:23:34.469873 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1486 12:23:34.474644 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1487 12:23:34.478287 CBFS: Locating 'fallback/dsdt.aml'
1488 12:23:34.482283 CBFS: Found @ offset 636c0 size 32e0
1489 12:23:34.487024 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1490 12:23:34.490601 CBFS: Locating 'fallback/slic'
1491 12:23:34.495546 CBFS: 'fallback/slic' not found.
1492 12:23:34.499360 ACPI: Writing ACPI tables at 99b31000.
1493 12:23:34.501248 ACPI: * FACS
1494 12:23:34.503217 ACPI: * DSDT
1495 12:23:34.506649 Ramoops buffer: 0x100000@0x99a30000.
1496 12:23:34.511601 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1497 12:23:34.515492 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1498 12:23:34.519498 Google Chrome EC: version:
1499 12:23:34.522046 ro: puff_v2.0.4638-67e4d7990
1500 12:23:34.525348 rw: puff_v2.0.4638-67e4d7990
1501 12:23:34.527238 running image: 1
1502 12:23:34.533526 PCI space above 4GB MMIO is at 0x15e800000, len = 0x7ea1800000
1503 12:23:34.536314 ACPI: * FADT
1504 12:23:34.537508 SCI is IRQ9
1505 12:23:34.541761 ACPI: added table 1/32, length now 40
1506 12:23:34.543422 ACPI: * SSDT
1507 12:23:34.546976 Found 1 CPU(s) with 2 core(s) each.
1508 12:23:34.551112 \_SB.PCI0.WFA3.WFA3: Intel WiFi PCI: 00:14.3
1509 12:23:34.554917 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1510 12:23:34.560252 \_SB.PCI0.I2C2.PS17: Parade PS175 at I2C: 02:4a
1511 12:23:34.565334 \_SB.PCI0.I2C3.RTD2: Realtek RTD2142 at I2C: 03:4a
1512 12:23:34.570297 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 04:1a
1513 12:23:34.575274 \_SB.PCI0.RP01.RLTK.RLTK: Realtek r8168 PCI: 01:00.0
1514 12:23:34.579930 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1515 12:23:34.583829 EC returned error result code 3
1516 12:23:34.587785 EC returned error result code 1
1517 12:23:34.591979 PS2K: Bad resp from EC. Vivaldi disabled!
1518 12:23:34.598458 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-A Front Left at USB2 port 0
1519 12:23:34.604429 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-C Port Rear at USB2 port 1
1520 12:23:34.611248 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-A Front Right at USB2 port 2
1521 12:23:34.617335 \_SB.PCI0.XHCI.RHUB.HS04: USB2 Type-A Rear Right at USB2 port 3
1522 12:23:34.623812 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Type-A Rear Left at USB2 port 5
1523 12:23:34.628625 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1524 12:23:34.635031 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Front Left at USB3 port 0
1525 12:23:34.641080 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Front Right at USB3 port 1
1526 12:23:34.647438 \_SB.PCI0.XHCI.RHUB.SS03: USB3 Type-A Rear Right at USB3 port 2
1527 12:23:34.653833 \_SB.PCI0.XHCI.RHUB.SS04: USB3 Type-C Rear at USB3 port 3
1528 12:23:34.659929 \_SB.PCI0.XHCI.RHUB.SS05: USB3 Type-A Rear Left at USB3 port 4
1529 12:23:34.665855 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-A Rear Middle at USB2 port 4
1530 12:23:34.672657 \_SB.PCI0.XHCI.RHUB.SS06: USB3 Type-A Rear Middle at USB3 port 5
1531 12:23:34.676294 ACPI: added table 2/32, length now 44
1532 12:23:34.677697 ACPI: * MCFG
1533 12:23:34.682049 ACPI: added table 3/32, length now 48
1534 12:23:34.683628 ACPI: * TPM2
1535 12:23:34.686521 TPM2 log created at 0x99a20000
1536 12:23:34.690587 ACPI: added table 4/32, length now 52
1537 12:23:34.692232 ACPI: * MADT
1538 12:23:34.693475 SCI is IRQ9
1539 12:23:34.696994 ACPI: added table 5/32, length now 56
1540 12:23:34.699013 current = 99b36070
1541 12:23:34.700696 ACPI: * DMAR
1542 12:23:34.704226 ACPI: added table 6/32, length now 60
1543 12:23:34.708736 ACPI: added table 7/32, length now 64
1544 12:23:34.709802 ACPI: * HPET
1545 12:23:34.714013 ACPI: added table 8/32, length now 68
1546 12:23:34.714886 ACPI: done.
1547 12:23:34.717650 ACPI tables: 20912 bytes.
1548 12:23:34.720622 smbios_write_tables: 99a1f000
1549 12:23:34.724576 EC returned error result code 3
1550 12:23:34.727560 Couldn't obtain OEM name from CBI
1551 12:23:34.730489 Create SMBIOS type 17
1552 12:23:34.733670 PCI: 00:00.0 (Intel Cannonlake)
1553 12:23:34.736786 PCI: 00:14.3 (Intel WiFi)
1554 12:23:34.739916 SMBIOS tables: 841 bytes.
1555 12:23:34.743426 Writing table forward entry at 0x00000500
1556 12:23:34.749367 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 1629
1557 12:23:34.753349 Writing coreboot table at 0x99b55000
1558 12:23:34.759647 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1559 12:23:34.763619 1. 0000000000001000-000000000009ffff: RAM
1560 12:23:34.768519 2. 00000000000a0000-00000000000fffff: RESERVED
1561 12:23:34.772538 3. 0000000000100000-0000000099a1efff: RAM
1562 12:23:34.777998 4. 0000000099a1f000-0000000099ba4fff: CONFIGURATION TABLES
1563 12:23:34.783446 5. 0000000099ba5000-0000000099c0afff: RAMSTAGE
1564 12:23:34.788956 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1565 12:23:34.793914 7. 000000009a000000-000000009f7fffff: RESERVED
1566 12:23:34.798870 8. 00000000e0000000-00000000efffffff: RESERVED
1567 12:23:34.803284 9. 00000000fc000000-00000000fc000fff: RESERVED
1568 12:23:34.808575 10. 00000000fe000000-00000000fe00ffff: RESERVED
1569 12:23:34.812879 11. 00000000fed10000-00000000fed17fff: RESERVED
1570 12:23:34.817759 12. 00000000fed80000-00000000fed83fff: RESERVED
1571 12:23:34.822362 13. 00000000fed90000-00000000fed91fff: RESERVED
1572 12:23:34.826894 14. 00000000feda0000-00000000feda1fff: RESERVED
1573 12:23:34.831856 15. 0000000100000000-000000015e7fffff: RAM
1574 12:23:34.834928 Graphics hand-off block not found
1575 12:23:34.838790 FSP did not return a valid framebuffer
1576 12:23:34.842102 Passing 4 GPIOs to payload:
1577 12:23:34.846252 NAME | PORT | POLARITY | VALUE
1578 12:23:34.851773 lid | undefined | high | high
1579 12:23:34.857010 power | undefined | high | low
1580 12:23:34.862662 oprom | undefined | high | low
1581 12:23:34.867679 EC in RW | 0x000000cb | high | low
1582 12:23:34.869141 Board ID: 4
1583 12:23:34.874045 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1584 12:23:34.880145 Wrote coreboot table at: 0x99b55000, 0x578 bytes, checksum 9e44
1585 12:23:34.883122 coreboot table: 1424 bytes.
1586 12:23:34.886934 IMD ROOT 0. 0x99fff000 0x00001000
1587 12:23:34.890395 IMD SMALL 1. 0x99ffe000 0x00001000
1588 12:23:34.894568 FSP MEMORY 2. 0x99c4e000 0x003b0000
1589 12:23:34.897771 CONSOLE 3. 0x99c2e000 0x00020000
1590 12:23:34.901797 FMAP 4. 0x99c2d000 0x00000578
1591 12:23:34.905432 TIME STAMP 5. 0x99c2c000 0x00000910
1592 12:23:34.910032 VBOOT WORK 6. 0x99c18000 0x00014000
1593 12:23:34.912403 MRC DATA 7. 0x99c16000 0x00001958
1594 12:23:34.916889 ROMSTG STCK 8. 0x99c15000 0x00001000
1595 12:23:34.920275 AFTER CAR 9. 0x99c0b000 0x0000a000
1596 12:23:34.924321 RAMSTAGE 10. 0x99ba4000 0x00067000
1597 12:23:34.927724 REFCODE 11. 0x99b6f000 0x00035000
1598 12:23:34.931764 SMM BACKUP 12. 0x99b5f000 0x00010000
1599 12:23:34.935568 4f444749 13. 0x99b5d000 0x00002000
1600 12:23:34.939037 COREBOOT 14. 0x99b55000 0x00008000
1601 12:23:34.943066 ACPI 15. 0x99b31000 0x00024000
1602 12:23:34.946766 ACPI GNVS 16. 0x99b30000 0x00001000
1603 12:23:34.949817 RAMOOPS 17. 0x99a30000 0x00100000
1604 12:23:34.954302 TPM2 TCGLOG18. 0x99a20000 0x00010000
1605 12:23:34.957800 SMBIOS 19. 0x99a1f000 0x00000800
1606 12:23:34.959216 IMD small region:
1607 12:23:34.963706 IMD ROOT 0. 0x99ffec00 0x00000400
1608 12:23:34.967058 FSP RUNTIME 1. 0x99ffebe0 0x00000004
1609 12:23:34.971003 VPD 2. 0x99ffeb80 0x00000058
1610 12:23:34.975351 POWER STATE 3. 0x99ffeb40 0x00000040
1611 12:23:34.979329 ROMSTAGE 4. 0x99ffeb20 0x00000004
1612 12:23:34.983351 MEM INFO 5. 0x99ffe960 0x000001b9
1613 12:23:34.988955 BS: BS_WRITE_TABLES run times (exec / console): 8 / 504 ms
1614 12:23:34.991895 MTRR: Physical address space:
1615 12:23:34.997456 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1616 12:23:35.004223 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1617 12:23:35.010432 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1618 12:23:35.016665 0x000000009b000000 - 0x00000000a0000000 size 0x05000000 type 0
1619 12:23:35.023303 0x00000000a0000000 - 0x00000000b0000000 size 0x10000000 type 1
1620 12:23:35.029211 0x00000000b0000000 - 0x0000000100000000 size 0x50000000 type 0
1621 12:23:35.034873 0x0000000100000000 - 0x000000015e800000 size 0x5e800000 type 6
1622 12:23:35.039050 MTRR: Fixed MSR 0x250 0x0606060606060606
1623 12:23:35.043050 MTRR: Fixed MSR 0x258 0x0606060606060606
1624 12:23:35.047606 MTRR: Fixed MSR 0x259 0x0000000000000000
1625 12:23:35.051853 MTRR: Fixed MSR 0x268 0x0606060606060606
1626 12:23:35.056060 MTRR: Fixed MSR 0x269 0x0606060606060606
1627 12:23:35.059894 MTRR: Fixed MSR 0x26a 0x0606060606060606
1628 12:23:35.063323 MTRR: Fixed MSR 0x26b 0x0606060606060606
1629 12:23:35.067686 MTRR: Fixed MSR 0x26c 0x0606060606060606
1630 12:23:35.071710 MTRR: Fixed MSR 0x26d 0x0606060606060606
1631 12:23:35.075965 MTRR: Fixed MSR 0x26e 0x0606060606060606
1632 12:23:35.080417 MTRR: Fixed MSR 0x26f 0x0606060606060606
1633 12:23:35.083129 call enable_fixed_mtrr()
1634 12:23:35.086300 CPU physical address size: 39 bits
1635 12:23:35.090332 MTRR: default type WB/UC MTRR counts: 5/6.
1636 12:23:35.093919 MTRR: WB selected as default type.
1637 12:23:35.100334 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1638 12:23:35.106892 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1639 12:23:35.113420 MTRR: 2 base 0x00000000a0000000 mask 0x0000007ff0000000 type 1
1640 12:23:35.119587 MTRR: 3 base 0x00000000b0000000 mask 0x0000007ff0000000 type 0
1641 12:23:35.125123 MTRR: 4 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1642 12:23:35.130117 MTRR: Fixed MSR 0x250 0x0606060606060606
1643 12:23:35.133855 MTRR: Fixed MSR 0x258 0x0606060606060606
1644 12:23:35.138021 MTRR: Fixed MSR 0x259 0x0000000000000000
1645 12:23:35.142157 MTRR: Fixed MSR 0x268 0x0606060606060606
1646 12:23:35.146436 MTRR: Fixed MSR 0x269 0x0606060606060606
1647 12:23:35.150647 MTRR: Fixed MSR 0x26a 0x0606060606060606
1648 12:23:35.154369 MTRR: Fixed MSR 0x26b 0x0606060606060606
1649 12:23:35.158590 MTRR: Fixed MSR 0x26c 0x0606060606060606
1650 12:23:35.162835 MTRR: Fixed MSR 0x26d 0x0606060606060606
1651 12:23:35.166316 MTRR: Fixed MSR 0x26e 0x0606060606060606
1652 12:23:35.171092 MTRR: Fixed MSR 0x26f 0x0606060606060606
1653 12:23:35.171175
1654 12:23:35.172008 MTRR check
1655 12:23:35.174758 Fixed MTRRs : Enabled
1656 12:23:35.176667 Variable MTRRs: Enabled
1657 12:23:35.177275
1658 12:23:35.180130 call enable_fixed_mtrr()
1659 12:23:35.185456 BS: BS_WRITE_TABLES exit times (exec / console): 46 / 142 ms
1660 12:23:35.189022 CPU physical address size: 39 bits
1661 12:23:35.191636 Probing TPM: done!
1662 12:23:35.196135 Connected to device vid:did:rid of 1ae0:0028:00
1663 12:23:35.206580 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b81dc66
1664 12:23:35.210772 Initialized TPM device CR50 revision 0
1665 12:23:35.213688 Checking cr50 for pending updates
1666 12:23:35.219776 Reading cr50 TPM mode
1667 12:23:35.228997 BS: BS_PAYLOAD_LOAD entry times (exec / console): 12 / 25 ms
1668 12:23:35.234207 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1669 12:23:35.237834 CBFS: Locating 'fallback/payload'
1670 12:23:35.242648 CBFS: Found @ offset 3a0c00 size 48db0
1671 12:23:35.247108 Checking segment from ROM address 0xfffa8c38
1672 12:23:35.251434 Checking segment from ROM address 0xfffa8c54
1673 12:23:35.256245 Loading segment from ROM address 0xfffa8c38
1674 12:23:35.258783 code (compression=0)
1675 12:23:35.266984 New segment dstaddr 0x30000000 memsize 0x2660100 srcaddr 0xfffa8c70 filesize 0x48d78
1676 12:23:35.275192 Loading Segment: addr: 0x30000000 memsz: 0x0000000002660100 filesz: 0x0000000000048d78
1677 12:23:35.277887 it's not compressed!
1678 12:23:35.380748 [ 0x30000000, 30048d78, 0x32660100) <- fffa8c70
1679 12:23:35.386849 Clearing Segment: addr: 0x0000000030048d78 memsz: 0x0000000002617388
1680 12:23:35.395439 Loading segment from ROM address 0xfffa8c54
1681 12:23:35.397362 Entry Point 0x30000000
1682 12:23:35.399553 Loaded segments
1683 12:23:35.405441 BS: BS_PAYLOAD_LOAD run times (exec / console): 102 / 67 ms
1684 12:23:35.408984 Finalizing chipset.
1685 12:23:35.410445 Finalizing SMM.
1686 12:23:35.411178 APMC done.
1687 12:23:35.417069 BS: BS_PAYLOAD_LOAD exit times (exec / console): 2 / 5 ms
1688 12:23:35.420650 mp_park_aps done after 0 msecs.
1689 12:23:35.424954 Jumping to boot code at 0x30000000(0x99b55000)
1690 12:23:35.434500 CPU0: stack: 0x99bf8000 - 0x99bf9000, lowest used address 0x99bf8a88, stack used: 1400 bytes
1691 12:23:35.434904
1692 12:23:35.435039
1693 12:23:35.435127
1694 12:23:35.438555 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
1695 12:23:35.438663 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
1696 12:23:35.438747 Setting prompt string to ['puff:']
1697 12:23:35.438823 bootloader-commands: Wait for prompt ['puff:'] (timeout 00:04:43)
1698 12:23:35.438997 Starting depthcharge on Kaisa...
1699 12:23:35.439252
1700 12:23:35.445583 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1701 12:23:35.445916
1702 12:23:35.453694 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1703 12:23:35.453778
1704 12:23:35.455710 BIOS MMAP details:
1705 12:23:35.455792
1706 12:23:35.457751 IFD Base Offset : 0x300000
1707 12:23:35.458032
1708 12:23:35.460958 IFD End Offset : 0x1000000
1709 12:23:35.461039
1710 12:23:35.463434 MMAP Size : 0xd00000
1711 12:23:35.463929
1712 12:23:35.467170 MMAP Start : 0xff300000
1713 12:23:35.467258
1714 12:23:35.471587 Looking for NVMe Controller 0x3105c848 @ 00:1d:00
1715 12:23:35.472084
1716 12:23:35.474226 Wipe memory regions:
1717 12:23:35.474737
1718 12:23:35.477854 [0x00000000001000, 0x000000000a0000)
1719 12:23:35.478518
1720 12:23:35.481717 [0x00000000100000, 0x00000030000000)
1721 12:23:35.529949
1722 12:23:35.533391 [0x00000032660100, 0x00000099a1f000)
1723 12:23:35.636809
1724 12:23:35.640602 [0x00000100000000, 0x0000015e800000)
1725 12:23:36.041360
1726 12:23:36.043382 R8152: Initializing
1727 12:23:36.043728
1728 12:23:36.045787 Version 9 (ocp_data = 6010)
1729 12:23:36.047091
1730 12:23:36.049514 R8152: Done initializing
1731 12:23:36.049625
1732 12:23:36.051622 Adding net device
1733 12:23:36.352094
1734 12:23:36.358188 [firmware-puff-13324.B-collabora] Feb 14 2023 12:06:39
1735 12:23:36.358689
1736 12:23:36.359112
1737 12:23:36.359694
1738 12:23:36.361049 Setting prompt string to ['puff:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1740 12:23:36.462514 puff: tftpboot 192.168.201.1 11967692/tftp-deploy-fdt22vk4/kernel/bzImage 11967692/tftp-deploy-fdt22vk4/kernel/cmdline 11967692/tftp-deploy-fdt22vk4/ramdisk/ramdisk.cpio.gz
1741 12:23:36.463153 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1742 12:23:36.463585 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
1743 12:23:36.506408 tftpboot 192.168.201.1 11967692/tftp-deploy-fdt22vk4/kernel/bzImage 11967692/tftp-deploy-fdt22vk4/kernel/cmdline 11967692/tftp-deploy-fdt22vk4/ramdisk/ramdisk.cpio.gz
1744 12:23:36.506943
1745 12:23:36.507304 Waiting for link
1746 12:23:36.667227
1747 12:23:36.668176 done.
1748 12:23:36.668746
1749 12:23:36.669829 MAC: 00:e0:4c:68:02:b9
1750 12:23:36.670399
1751 12:23:36.672684 Sending DHCP discover... done.
1752 12:23:36.673582
1753 12:23:36.675639 Waiting for reply... done.
1754 12:23:36.676203
1755 12:23:36.679723 Sending DHCP request... done.
1756 12:23:36.680391
1757 12:23:36.684732 Waiting for reply... done.
1758 12:23:36.685188
1759 12:23:36.686635 My ip is 192.168.201.14
1760 12:23:36.687103
1761 12:23:36.690119 The DHCP server ip is 192.168.201.1
1762 12:23:36.690596
1763 12:23:36.694759 TFTP server IP predefined by user: 192.168.201.1
1764 12:23:36.695230
1765 12:23:36.702358 Bootfile predefined by user: 11967692/tftp-deploy-fdt22vk4/kernel/bzImage
1766 12:23:36.702780
1767 12:23:36.705676 Sending tftp read request... done.
1768 12:23:36.706114
1769 12:23:36.712225 Waiting for the transfer...
1770 12:23:36.712995
1771 12:23:36.969498 00000000 ################################################################
1772 12:23:36.969945
1773 12:23:37.213172 00080000 ################################################################
1774 12:23:37.213307
1775 12:23:37.469664 00100000 ################################################################
1776 12:23:37.469989
1777 12:23:37.717767 00180000 ################################################################
1778 12:23:37.718113
1779 12:23:37.971681 00200000 ################################################################
1780 12:23:37.972227
1781 12:23:38.226605 00280000 ################################################################
1782 12:23:38.226938
1783 12:23:38.468386 00300000 ################################################################
1784 12:23:38.468545
1785 12:23:38.723889 00380000 ################################################################
1786 12:23:38.724017
1787 12:23:38.973751 00400000 ################################################################
1788 12:23:38.973883
1789 12:23:39.242883 00480000 ################################################################
1790 12:23:39.243837
1791 12:23:39.492976 00500000 ################################################################
1792 12:23:39.493899
1793 12:23:39.768681 00580000 ################################################################
1794 12:23:39.769044
1795 12:23:40.013292 00600000 ################################################################
1796 12:23:40.013737
1797 12:23:40.264648 00680000 ################################################################
1798 12:23:40.265217
1799 12:23:40.525192 00700000 ################################################################
1800 12:23:40.525644
1801 12:23:40.773762 00780000 ################################################################
1802 12:23:40.774183
1803 12:23:41.022373 00800000 ################################################################
1804 12:23:41.022810
1805 12:23:41.282222 00880000 ################################################################
1806 12:23:41.282355
1807 12:23:41.523542 00900000 ################################################################
1808 12:23:41.524449
1809 12:23:41.776282 00980000 ################################################################
1810 12:23:41.776767
1811 12:23:42.026850 00a00000 ################################################################
1812 12:23:42.027682
1813 12:23:42.271762 00a80000 ################################################################
1814 12:23:42.272382
1815 12:23:42.290894 00b00000 ##### done.
1816 12:23:42.291373
1817 12:23:42.294235 The bootfile was 11571200 bytes long.
1818 12:23:42.294576
1819 12:23:42.298009 Sending tftp read request... done.
1820 12:23:42.298493
1821 12:23:42.300884 Waiting for the transfer...
1822 12:23:42.301419
1823 12:23:42.546201 00000000 ################################################################
1824 12:23:42.546646
1825 12:23:42.801143 00080000 ################################################################
1826 12:23:42.801732
1827 12:23:43.044703 00100000 ################################################################
1828 12:23:43.045189
1829 12:23:43.290091 00180000 ################################################################
1830 12:23:43.290533
1831 12:23:43.548193 00200000 ################################################################
1832 12:23:43.548585
1833 12:23:43.798248 00280000 ################################################################
1834 12:23:43.798641
1835 12:23:44.051625 00300000 ################################################################
1836 12:23:44.051758
1837 12:23:44.299792 00380000 ################################################################
1838 12:23:44.300305
1839 12:23:44.548944 00400000 ################################################################
1840 12:23:44.549371
1841 12:23:44.793222 00480000 ################################################################
1842 12:23:44.793595
1843 12:23:45.055188 00500000 ################################################################
1844 12:23:45.055783
1845 12:23:45.297964 00580000 ################################################################
1846 12:23:45.298470
1847 12:23:45.553717 00600000 ################################################################
1848 12:23:45.554161
1849 12:23:45.821747 00680000 ################################################################
1850 12:23:45.822295
1851 12:23:46.074643 00700000 ################################################################
1852 12:23:46.075026
1853 12:23:46.327121 00780000 ################################################################
1854 12:23:46.327255
1855 12:23:46.583681 00800000 ################################################################
1856 12:23:46.584215
1857 12:23:46.732829 00880000 ####################################### done.
1858 12:23:46.733346
1859 12:23:46.736759 Sending tftp read request... done.
1860 12:23:46.736867
1861 12:23:46.739252 Waiting for the transfer...
1862 12:23:46.739759
1863 12:23:46.741218 00000000 # done.
1864 12:23:46.741294
1865 12:23:46.750204 Command line loaded dynamically from TFTP file: 11967692/tftp-deploy-fdt22vk4/kernel/cmdline
1866 12:23:46.750666
1867 12:23:46.765576 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1868 12:23:46.765662
1869 12:23:46.770087 ec_init: CrosEC protocol v3 supported (256, 256)
1870 12:23:46.774652
1871 12:23:46.778634 Shutting down all USB controllers.
1872 12:23:46.778709
1873 12:23:46.781123 Removing current net device
1874 12:23:46.781210
1875 12:23:46.782914 Finalizing coreboot
1876 12:23:46.782995
1877 12:23:46.788519 Exiting depthcharge with code 4 at timestamp: 20812603
1878 12:23:46.788600
1879 12:23:46.788942
1880 12:23:46.790721 end: 2.2.4 bootloader-commands (duration 00:00:11) [common]
1881 12:23:46.790833 start: 2.2.5 auto-login-action (timeout 00:04:32) [common]
1882 12:23:46.790942 Setting prompt string to ['Linux version [0-9]']
1883 12:23:46.791025 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1884 12:23:46.791093 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1885 12:23:46.791266 Starting kernel ...
1886 12:23:46.791335
1887 12:23:46.791394
1889 12:28:18.791828 end: 2.2.5 auto-login-action (duration 00:04:32) [common]
1891 12:28:18.792913 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 272 seconds'
1893 12:28:18.793750 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1896 12:28:18.794100 end: 2 depthcharge-action (duration 00:05:00) [common]
1898 12:28:18.794313 Cleaning after the job
1899 12:28:18.794401 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11967692/tftp-deploy-fdt22vk4/ramdisk
1900 12:28:18.795676 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11967692/tftp-deploy-fdt22vk4/kernel
1901 12:28:18.797362 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11967692/tftp-deploy-fdt22vk4/modules
1902 12:28:18.797992 start: 5.1 power-off (timeout 00:00:30) [common]
1903 12:28:18.798148 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-chromebox-cxi4-puff-cbg-8' '--port=1' '--command=off'
1904 12:28:19.708036 >> Command sent successfully.
1905 12:28:19.719227 Returned 0 in 0 seconds
1906 12:28:19.820676 end: 5.1 power-off (duration 00:00:01) [common]
1908 12:28:19.822616 start: 5.2 read-feedback (timeout 00:09:59) [common]
1909 12:28:19.823930 Listened to connection for namespace 'common' for up to 1s
1910 12:28:20.823985 Finalising connection for namespace 'common'
1911 12:28:20.824680 Disconnecting from shell: Finalise
1912 12:28:20.825097
1913 12:28:20.926188 end: 5.2 read-feedback (duration 00:00:01) [common]
1914 12:28:20.926817 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11967692
1915 12:28:20.947564 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11967692
1916 12:28:20.947712 JobError: Your job cannot terminate cleanly.