Boot log: asus-cx9400-volteer

    1 12:23:01.749003  lava-dispatcher, installed at version: 2023.10
    2 12:23:01.749215  start: 0 validate
    3 12:23:01.749347  Start time: 2023-11-08 12:23:01.749338+00:00 (UTC)
    4 12:23:01.749468  Using caching service: 'http://localhost/cache/?uri=%s'
    5 12:23:01.749595  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
    6 12:23:01.752416  Using caching service: 'http://localhost/cache/?uri=%s'
    7 12:23:01.752540  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.297-cip104-63-ge7301d2e196ae%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
    8 12:23:05.759232  Using caching service: 'http://localhost/cache/?uri=%s'
    9 12:23:05.760012  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.297-cip104-63-ge7301d2e196ae%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
   10 12:23:06.763571  validate duration: 5.01
   12 12:23:06.763919  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 12:23:06.764068  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 12:23:06.764176  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 12:23:06.764328  Not decompressing ramdisk as can be used compressed.
   16 12:23:06.764427  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
   17 12:23:06.764518  saving as /var/lib/lava/dispatcher/tmp/11967717/tftp-deploy-7a9rotvy/ramdisk/rootfs.cpio.gz
   18 12:23:06.764583  total size: 8418130 (8 MB)
   19 12:23:06.765926  progress   0 % (0 MB)
   20 12:23:06.769258  progress   5 % (0 MB)
   21 12:23:06.771864  progress  10 % (0 MB)
   22 12:23:06.774651  progress  15 % (1 MB)
   23 12:23:06.777323  progress  20 % (1 MB)
   24 12:23:06.779703  progress  25 % (2 MB)
   25 12:23:06.782450  progress  30 % (2 MB)
   26 12:23:06.785248  progress  35 % (2 MB)
   27 12:23:06.787900  progress  40 % (3 MB)
   28 12:23:06.790654  progress  45 % (3 MB)
   29 12:23:06.793084  progress  50 % (4 MB)
   30 12:23:06.795523  progress  55 % (4 MB)
   31 12:23:06.797874  progress  60 % (4 MB)
   32 12:23:06.799952  progress  65 % (5 MB)
   33 12:23:06.802219  progress  70 % (5 MB)
   34 12:23:06.804489  progress  75 % (6 MB)
   35 12:23:06.807305  progress  80 % (6 MB)
   36 12:23:06.809625  progress  85 % (6 MB)
   37 12:23:06.811967  progress  90 % (7 MB)
   38 12:23:06.814225  progress  95 % (7 MB)
   39 12:23:06.816292  progress 100 % (8 MB)
   40 12:23:06.816522  8 MB downloaded in 0.05 s (154.57 MB/s)
   41 12:23:06.816674  end: 1.1.1 http-download (duration 00:00:00) [common]
   43 12:23:06.816951  end: 1.1 download-retry (duration 00:00:00) [common]
   44 12:23:06.817046  start: 1.2 download-retry (timeout 00:10:00) [common]
   45 12:23:06.817129  start: 1.2.1 http-download (timeout 00:10:00) [common]
   46 12:23:06.817270  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.297-cip104-63-ge7301d2e196ae/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
   47 12:23:06.817338  saving as /var/lib/lava/dispatcher/tmp/11967717/tftp-deploy-7a9rotvy/kernel/bzImage
   48 12:23:06.817398  total size: 11571200 (11 MB)
   49 12:23:06.817458  No compression specified
   50 12:23:06.818727  progress   0 % (0 MB)
   51 12:23:06.822208  progress   5 % (0 MB)
   52 12:23:06.825484  progress  10 % (1 MB)
   53 12:23:06.828554  progress  15 % (1 MB)
   54 12:23:06.831807  progress  20 % (2 MB)
   55 12:23:06.835029  progress  25 % (2 MB)
   56 12:23:06.838106  progress  30 % (3 MB)
   57 12:23:06.841348  progress  35 % (3 MB)
   58 12:23:06.844614  progress  40 % (4 MB)
   59 12:23:06.847639  progress  45 % (4 MB)
   60 12:23:06.850816  progress  50 % (5 MB)
   61 12:23:06.853996  progress  55 % (6 MB)
   62 12:23:06.857029  progress  60 % (6 MB)
   63 12:23:06.860159  progress  65 % (7 MB)
   64 12:23:06.863263  progress  70 % (7 MB)
   65 12:23:06.866210  progress  75 % (8 MB)
   66 12:23:06.869314  progress  80 % (8 MB)
   67 12:23:06.872432  progress  85 % (9 MB)
   68 12:23:06.875855  progress  90 % (9 MB)
   69 12:23:06.879041  progress  95 % (10 MB)
   70 12:23:06.882273  progress 100 % (11 MB)
   71 12:23:06.882402  11 MB downloaded in 0.07 s (169.77 MB/s)
   72 12:23:06.882551  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 12:23:06.882782  end: 1.2 download-retry (duration 00:00:00) [common]
   75 12:23:06.882874  start: 1.3 download-retry (timeout 00:10:00) [common]
   76 12:23:06.882959  start: 1.3.1 http-download (timeout 00:10:00) [common]
   77 12:23:06.883099  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.297-cip104-63-ge7301d2e196ae/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
   78 12:23:06.883169  saving as /var/lib/lava/dispatcher/tmp/11967717/tftp-deploy-7a9rotvy/modules/modules.tar
   79 12:23:06.883234  total size: 483720 (0 MB)
   80 12:23:06.883297  Using unxz to decompress xz
   81 12:23:06.887610  progress   6 % (0 MB)
   82 12:23:06.888059  progress  13 % (0 MB)
   83 12:23:06.888307  progress  20 % (0 MB)
   84 12:23:06.889950  progress  27 % (0 MB)
   85 12:23:06.891985  progress  33 % (0 MB)
   86 12:23:06.893930  progress  40 % (0 MB)
   87 12:23:06.895930  progress  47 % (0 MB)
   88 12:23:06.897932  progress  54 % (0 MB)
   89 12:23:06.899962  progress  60 % (0 MB)
   90 12:23:06.902056  progress  67 % (0 MB)
   91 12:23:06.904095  progress  74 % (0 MB)
   92 12:23:06.906206  progress  81 % (0 MB)
   93 12:23:06.908157  progress  88 % (0 MB)
   94 12:23:06.910156  progress  94 % (0 MB)
   95 12:23:06.912642  progress 100 % (0 MB)
   96 12:23:06.919247  0 MB downloaded in 0.04 s (12.81 MB/s)
   97 12:23:06.919547  end: 1.3.1 http-download (duration 00:00:00) [common]
   99 12:23:06.919846  end: 1.3 download-retry (duration 00:00:00) [common]
  100 12:23:06.919984  start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
  101 12:23:06.920122  start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
  102 12:23:06.920241  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
  103 12:23:06.920373  start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
  104 12:23:06.920654  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11967717/lava-overlay-0tko5q6s
  105 12:23:06.920849  makedir: /var/lib/lava/dispatcher/tmp/11967717/lava-overlay-0tko5q6s/lava-11967717/bin
  106 12:23:06.920997  makedir: /var/lib/lava/dispatcher/tmp/11967717/lava-overlay-0tko5q6s/lava-11967717/tests
  107 12:23:06.921114  makedir: /var/lib/lava/dispatcher/tmp/11967717/lava-overlay-0tko5q6s/lava-11967717/results
  108 12:23:06.921276  Creating /var/lib/lava/dispatcher/tmp/11967717/lava-overlay-0tko5q6s/lava-11967717/bin/lava-add-keys
  109 12:23:06.921446  Creating /var/lib/lava/dispatcher/tmp/11967717/lava-overlay-0tko5q6s/lava-11967717/bin/lava-add-sources
  110 12:23:06.921597  Creating /var/lib/lava/dispatcher/tmp/11967717/lava-overlay-0tko5q6s/lava-11967717/bin/lava-background-process-start
  111 12:23:06.921747  Creating /var/lib/lava/dispatcher/tmp/11967717/lava-overlay-0tko5q6s/lava-11967717/bin/lava-background-process-stop
  112 12:23:06.921897  Creating /var/lib/lava/dispatcher/tmp/11967717/lava-overlay-0tko5q6s/lava-11967717/bin/lava-common-functions
  113 12:23:06.922071  Creating /var/lib/lava/dispatcher/tmp/11967717/lava-overlay-0tko5q6s/lava-11967717/bin/lava-echo-ipv4
  114 12:23:06.922246  Creating /var/lib/lava/dispatcher/tmp/11967717/lava-overlay-0tko5q6s/lava-11967717/bin/lava-install-packages
  115 12:23:06.922419  Creating /var/lib/lava/dispatcher/tmp/11967717/lava-overlay-0tko5q6s/lava-11967717/bin/lava-installed-packages
  116 12:23:06.922591  Creating /var/lib/lava/dispatcher/tmp/11967717/lava-overlay-0tko5q6s/lava-11967717/bin/lava-os-build
  117 12:23:06.922762  Creating /var/lib/lava/dispatcher/tmp/11967717/lava-overlay-0tko5q6s/lava-11967717/bin/lava-probe-channel
  118 12:23:06.922910  Creating /var/lib/lava/dispatcher/tmp/11967717/lava-overlay-0tko5q6s/lava-11967717/bin/lava-probe-ip
  119 12:23:06.923084  Creating /var/lib/lava/dispatcher/tmp/11967717/lava-overlay-0tko5q6s/lava-11967717/bin/lava-target-ip
  120 12:23:06.923257  Creating /var/lib/lava/dispatcher/tmp/11967717/lava-overlay-0tko5q6s/lava-11967717/bin/lava-target-mac
  121 12:23:06.923429  Creating /var/lib/lava/dispatcher/tmp/11967717/lava-overlay-0tko5q6s/lava-11967717/bin/lava-target-storage
  122 12:23:06.923605  Creating /var/lib/lava/dispatcher/tmp/11967717/lava-overlay-0tko5q6s/lava-11967717/bin/lava-test-case
  123 12:23:06.923775  Creating /var/lib/lava/dispatcher/tmp/11967717/lava-overlay-0tko5q6s/lava-11967717/bin/lava-test-event
  124 12:23:06.923922  Creating /var/lib/lava/dispatcher/tmp/11967717/lava-overlay-0tko5q6s/lava-11967717/bin/lava-test-feedback
  125 12:23:06.924095  Creating /var/lib/lava/dispatcher/tmp/11967717/lava-overlay-0tko5q6s/lava-11967717/bin/lava-test-raise
  126 12:23:06.924268  Creating /var/lib/lava/dispatcher/tmp/11967717/lava-overlay-0tko5q6s/lava-11967717/bin/lava-test-reference
  127 12:23:06.924444  Creating /var/lib/lava/dispatcher/tmp/11967717/lava-overlay-0tko5q6s/lava-11967717/bin/lava-test-runner
  128 12:23:06.924617  Creating /var/lib/lava/dispatcher/tmp/11967717/lava-overlay-0tko5q6s/lava-11967717/bin/lava-test-set
  129 12:23:06.924795  Creating /var/lib/lava/dispatcher/tmp/11967717/lava-overlay-0tko5q6s/lava-11967717/bin/lava-test-shell
  130 12:23:06.924948  Updating /var/lib/lava/dispatcher/tmp/11967717/lava-overlay-0tko5q6s/lava-11967717/bin/lava-install-packages (oe)
  131 12:23:06.925148  Updating /var/lib/lava/dispatcher/tmp/11967717/lava-overlay-0tko5q6s/lava-11967717/bin/lava-installed-packages (oe)
  132 12:23:06.925316  Creating /var/lib/lava/dispatcher/tmp/11967717/lava-overlay-0tko5q6s/lava-11967717/environment
  133 12:23:06.925432  LAVA metadata
  134 12:23:06.925515  - LAVA_JOB_ID=11967717
  135 12:23:06.925597  - LAVA_DISPATCHER_IP=192.168.201.1
  136 12:23:06.925750  start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
  137 12:23:06.925854  skipped lava-vland-overlay
  138 12:23:06.925974  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  139 12:23:06.926096  start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
  140 12:23:06.926194  skipped lava-multinode-overlay
  141 12:23:06.926313  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  142 12:23:06.926452  start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
  143 12:23:06.926568  Loading test definitions
  144 12:23:06.926711  start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
  145 12:23:06.926822  Using /lava-11967717 at stage 0
  146 12:23:06.927282  uuid=11967717_1.4.2.3.1 testdef=None
  147 12:23:06.927407  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  148 12:23:06.927540  start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
  149 12:23:06.928318  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  151 12:23:06.928701  start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
  152 12:23:06.929388  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  154 12:23:06.929659  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
  155 12:23:06.930309  runner path: /var/lib/lava/dispatcher/tmp/11967717/lava-overlay-0tko5q6s/lava-11967717/0/tests/0_dmesg test_uuid 11967717_1.4.2.3.1
  156 12:23:06.930480  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  158 12:23:06.930746  start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
  159 12:23:06.930855  Using /lava-11967717 at stage 1
  160 12:23:06.931304  uuid=11967717_1.4.2.3.5 testdef=None
  161 12:23:06.931441  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  162 12:23:06.931566  start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
  163 12:23:06.932289  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  165 12:23:06.932657  start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
  166 12:23:06.933368  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  168 12:23:06.933630  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
  169 12:23:06.934291  runner path: /var/lib/lava/dispatcher/tmp/11967717/lava-overlay-0tko5q6s/lava-11967717/1/tests/1_bootrr test_uuid 11967717_1.4.2.3.5
  170 12:23:06.934460  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  172 12:23:06.934790  Creating lava-test-runner.conf files
  173 12:23:06.934892  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11967717/lava-overlay-0tko5q6s/lava-11967717/0 for stage 0
  174 12:23:06.935032  - 0_dmesg
  175 12:23:06.935148  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11967717/lava-overlay-0tko5q6s/lava-11967717/1 for stage 1
  176 12:23:06.935286  - 1_bootrr
  177 12:23:06.935425  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  178 12:23:06.935551  start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
  179 12:23:06.944407  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  180 12:23:06.944551  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
  181 12:23:06.944681  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  182 12:23:06.944831  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  183 12:23:06.944935  start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
  184 12:23:07.208944  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  185 12:23:07.209334  start: 1.4.4 extract-modules (timeout 00:10:00) [common]
  186 12:23:07.209450  extracting modules file /var/lib/lava/dispatcher/tmp/11967717/tftp-deploy-7a9rotvy/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11967717/extract-overlay-ramdisk-9ir2qmjq/ramdisk
  187 12:23:07.233144  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  188 12:23:07.233312  start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
  189 12:23:07.233417  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11967717/compress-overlay-j6j3xp5x/overlay-1.4.2.4.tar.gz to ramdisk
  190 12:23:07.233493  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11967717/compress-overlay-j6j3xp5x/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11967717/extract-overlay-ramdisk-9ir2qmjq/ramdisk
  191 12:23:07.243164  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  192 12:23:07.243296  start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
  193 12:23:07.243391  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  194 12:23:07.243502  start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
  195 12:23:07.243613  Building ramdisk /var/lib/lava/dispatcher/tmp/11967717/extract-overlay-ramdisk-9ir2qmjq/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11967717/extract-overlay-ramdisk-9ir2qmjq/ramdisk
  196 12:23:07.390919  >> 53982 blocks

  197 12:23:08.315414  rename /var/lib/lava/dispatcher/tmp/11967717/extract-overlay-ramdisk-9ir2qmjq/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11967717/tftp-deploy-7a9rotvy/ramdisk/ramdisk.cpio.gz
  198 12:23:08.315951  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  199 12:23:08.316086  start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
  200 12:23:08.316195  start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
  201 12:23:08.316292  No mkimage arch provided, not using FIT.
  202 12:23:08.316382  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  203 12:23:08.316471  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  204 12:23:08.316608  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  205 12:23:08.316761  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
  206 12:23:08.316861  No LXC device requested
  207 12:23:08.316947  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  208 12:23:08.317045  start: 1.6 deploy-device-env (timeout 00:09:58) [common]
  209 12:23:08.317128  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  210 12:23:08.317202  Checking files for TFTP limit of 4294967296 bytes.
  211 12:23:08.317680  end: 1 tftp-deploy (duration 00:00:02) [common]
  212 12:23:08.317805  start: 2 depthcharge-action (timeout 00:05:00) [common]
  213 12:23:08.317903  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  214 12:23:08.318036  substitutions:
  215 12:23:08.318106  - {DTB}: None
  216 12:23:08.318168  - {INITRD}: 11967717/tftp-deploy-7a9rotvy/ramdisk/ramdisk.cpio.gz
  217 12:23:08.318228  - {KERNEL}: 11967717/tftp-deploy-7a9rotvy/kernel/bzImage
  218 12:23:08.318288  - {LAVA_MAC}: None
  219 12:23:08.318349  - {PRESEED_CONFIG}: None
  220 12:23:08.318418  - {PRESEED_LOCAL}: None
  221 12:23:08.318481  - {RAMDISK}: 11967717/tftp-deploy-7a9rotvy/ramdisk/ramdisk.cpio.gz
  222 12:23:08.318538  - {ROOT_PART}: None
  223 12:23:08.318594  - {ROOT}: None
  224 12:23:08.318649  - {SERVER_IP}: 192.168.201.1
  225 12:23:08.318704  - {TEE}: None
  226 12:23:08.318759  Parsed boot commands:
  227 12:23:08.318816  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  228 12:23:08.319003  Parsed boot commands: tftpboot 192.168.201.1 11967717/tftp-deploy-7a9rotvy/kernel/bzImage 11967717/tftp-deploy-7a9rotvy/kernel/cmdline 11967717/tftp-deploy-7a9rotvy/ramdisk/ramdisk.cpio.gz
  229 12:23:08.319090  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  230 12:23:08.319173  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  231 12:23:08.319272  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  232 12:23:08.319389  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  233 12:23:08.319494  Not connected, no need to disconnect.
  234 12:23:08.319618  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  235 12:23:08.319805  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  236 12:23:08.319900  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-13'
  237 12:23:08.324108  Setting prompt string to ['lava-test: # ']
  238 12:23:08.324486  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  239 12:23:08.324634  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  240 12:23:08.324825  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  241 12:23:08.324945  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  242 12:23:08.325251  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-13' '--port=1' '--command=reboot'
  243 12:23:13.459634  >> Command sent successfully.

  244 12:23:13.462273  Returned 0 in 5 seconds
  245 12:23:13.562639  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  247 12:23:13.562974  end: 2.2.2 reset-device (duration 00:00:05) [common]
  248 12:23:13.563083  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  249 12:23:13.563177  Setting prompt string to 'Starting depthcharge on Voema...'
  250 12:23:13.563244  Changing prompt to 'Starting depthcharge on Voema...'
  251 12:23:13.563313  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  252 12:23:13.563633  [Enter `^Ec?' for help]

  253 12:23:15.125578  

  254 12:23:15.125822  

  255 12:23:15.135910  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...

  256 12:23:15.142349  CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz

  257 12:23:15.145388  CPU: ID 806c1, Tigerlake B0, ucode: 00000086

  258 12:23:15.149175  CPU: AES supported, TXT NOT supported, VT supported

  259 12:23:15.155601  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2

  260 12:23:15.162612  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU

  261 12:23:15.165832  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2

  262 12:23:15.168738  VBOOT: Loading verstage.

  263 12:23:15.172249  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  264 12:23:15.178667  FMAP: base = 0x0 size = 0x2000000 #areas = 32

  265 12:23:15.181918  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  266 12:23:15.192452  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes

  267 12:23:15.199120  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984

  268 12:23:15.199224  

  269 12:23:15.199289  

  270 12:23:15.213074  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...

  271 12:23:15.226290  Probing TPM: . done!

  272 12:23:15.229364  TPM ready after 0 ms

  273 12:23:15.233070  Connected to device vid:did:rid of 1ae0:0028:00

  274 12:23:15.244317  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e

  275 12:23:15.250843  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  276 12:23:15.254112  Initialized TPM device CR50 revision 0

  277 12:23:15.318576  tlcl_send_startup: Startup return code is 0

  278 12:23:15.318753  TPM: setup succeeded

  279 12:23:15.333338  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  280 12:23:15.346962  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  281 12:23:15.360018  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

  282 12:23:15.369993  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  283 12:23:15.373700  Chrome EC: UHEPI supported

  284 12:23:15.377134  Phase 1

  285 12:23:15.379866  FMAP: area GBB found @ 1805000 (458752 bytes)

  286 12:23:15.390094  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  287 12:23:15.396731  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  288 12:23:15.403044  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  289 12:23:15.409766  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7

  290 12:23:15.412663  Recovery requested (1009000e)

  291 12:23:15.422084  TPM: Extending digest for VBOOT: boot mode into PCR 0

  292 12:23:15.428180  tlcl_extend: response is 0

  293 12:23:15.434679  TPM: Extending digest for VBOOT: GBB HWID into PCR 1

  294 12:23:15.444612  tlcl_extend: response is 0

  295 12:23:15.451154  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  296 12:23:15.458076  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638

  297 12:23:15.464345  BS: verstage times (exec / console): total (unknown) / 142 ms

  298 12:23:15.464462  

  299 12:23:15.464529  

  300 12:23:15.477726  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...

  301 12:23:15.483855  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  302 12:23:15.487544  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  303 12:23:15.494128  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000

  304 12:23:15.497651  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  305 12:23:15.500834  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000

  306 12:23:15.503924  gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000

  307 12:23:15.507593  TCO_STS:   0000 0000

  308 12:23:15.510138  GEN_PMCON: d0015038 00002200

  309 12:23:15.513593  GBLRST_CAUSE: 00000000 00000000

  310 12:23:15.517094  HPR_CAUSE0: 00000000

  311 12:23:15.517198  prev_sleep_state 5

  312 12:23:15.520433  Boot Count incremented to 23033

  313 12:23:15.527081  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  314 12:23:15.533826  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  315 12:23:15.543715  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  316 12:23:15.550385  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c

  317 12:23:15.553578  Chrome EC: UHEPI supported

  318 12:23:15.559852  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  319 12:23:15.571411  Probing TPM:  done!

  320 12:23:15.578159  Connected to device vid:did:rid of 1ae0:0028:00

  321 12:23:15.588264  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e

  322 12:23:15.591188  Initialized TPM device CR50 revision 0

  323 12:23:15.606633  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  324 12:23:15.612873  MRC: Hash idx 0x100b comparison successful.

  325 12:23:15.616317  MRC cache found, size faa8

  326 12:23:15.616410  bootmode is set to: 2

  327 12:23:15.619576  SPD index = 2

  328 12:23:15.626288  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c

  329 12:23:15.629466  SPD: module type is LPDDR4X

  330 12:23:15.633338  SPD: module part number is MT53D1G64D4NW-046

  331 12:23:15.639476  SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb

  332 12:23:15.642472  SPD: device width 16 bits, bus width 16 bits

  333 12:23:15.650026  SPD: module size is 2048 MB (per channel)

  334 12:23:16.078281  CBMEM:

  335 12:23:16.081242  IMD: root @ 0x76fff000 254 entries.

  336 12:23:16.085019  IMD: root @ 0x76ffec00 62 entries.

  337 12:23:16.087790  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  338 12:23:16.094664  FMAP: area RW_VPD found @ f35000 (8192 bytes)

  339 12:23:16.098102  External stage cache:

  340 12:23:16.101254  IMD: root @ 0x7b3ff000 254 entries.

  341 12:23:16.104168  IMD: root @ 0x7b3fec00 62 entries.

  342 12:23:16.119340  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  343 12:23:16.126078  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  344 12:23:16.132289  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  345 12:23:16.146282  MRC: 'RECOVERY_MRC_CACHE' does not need update.

  346 12:23:16.153034  cse_lite: Skip switching to RW in the recovery path

  347 12:23:16.153175  8 DIMMs found

  348 12:23:16.153247  SMM Memory Map

  349 12:23:16.159676  SMRAM       : 0x7b000000 0x800000

  350 12:23:16.163101   Subregion 0: 0x7b000000 0x200000

  351 12:23:16.165879   Subregion 1: 0x7b200000 0x200000

  352 12:23:16.169704   Subregion 2: 0x7b400000 0x400000

  353 12:23:16.169837  top_of_ram = 0x77000000

  354 12:23:16.176275  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  355 12:23:16.182697  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)

  356 12:23:16.185887  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  357 12:23:16.192456  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  358 12:23:16.198711  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c

  359 12:23:16.205437  Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)

  360 12:23:16.216151  Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500

  361 12:23:16.222732  Processing 211 relocs. Offset value of 0x74c0b000

  362 12:23:16.229140  BS: romstage times (exec / console): total (unknown) / 277 ms

  363 12:23:16.234923  

  364 12:23:16.235116  

  365 12:23:16.244892  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...

  366 12:23:16.248255  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  367 12:23:16.257858  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  368 12:23:16.264847  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  369 12:23:16.271221  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec

  370 12:23:16.277809  Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)

  371 12:23:16.321632  Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270

  372 12:23:16.327925  Processing 5008 relocs. Offset value of 0x75d98000

  373 12:23:16.331639  BS: postcar times (exec / console): total (unknown) / 59 ms

  374 12:23:16.334901  

  375 12:23:16.335003  

  376 12:23:16.344528  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...

  377 12:23:16.344644  Normal boot

  378 12:23:16.347923  FW_CONFIG value is 0x804c02

  379 12:23:16.351341  PCI: 00:07.0 disabled by fw_config

  380 12:23:16.354700  PCI: 00:07.1 disabled by fw_config

  381 12:23:16.358349  PCI: 00:0d.2 disabled by fw_config

  382 12:23:16.364522  PCI: 00:1c.7 disabled by fw_config

  383 12:23:16.367987  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  384 12:23:16.374518  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  385 12:23:16.380938  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  386 12:23:16.384323  GENERIC: 0.0 disabled by fw_config

  387 12:23:16.387426  GENERIC: 1.0 disabled by fw_config

  388 12:23:16.391074  fw_config match found: DB_USB=USB3_ACTIVE

  389 12:23:16.393893  fw_config match found: DB_USB=USB3_ACTIVE

  390 12:23:16.397676  fw_config match found: DB_USB=USB3_ACTIVE

  391 12:23:16.404313  fw_config match found: DB_USB=USB3_ACTIVE

  392 12:23:16.407129  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  393 12:23:16.416966  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  394 12:23:16.423586  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  395 12:23:16.430527  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c

  396 12:23:16.437179  microcode: sig=0x806c1 pf=0x80 revision=0x86

  397 12:23:16.440494  microcode: Update skipped, already up-to-date

  398 12:23:16.446761  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c

  399 12:23:16.475440  Detected 4 core, 8 thread CPU.

  400 12:23:16.478564  Setting up SMI for CPU

  401 12:23:16.481876  IED base = 0x7b400000

  402 12:23:16.485210  IED size = 0x00400000

  403 12:23:16.485304  Will perform SMM setup.

  404 12:23:16.491754  CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.

  405 12:23:16.498056  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

  406 12:23:16.504561  Processing 16 relocs. Offset value of 0x00030000

  407 12:23:16.507923  Attempting to start 7 APs

  408 12:23:16.511201  Waiting for 10ms after sending INIT.

  409 12:23:16.527052  Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.

  410 12:23:16.530182  AP: slot 3 apic_id 7.

  411 12:23:16.533541  AP: slot 7 apic_id 6.

  412 12:23:16.533680  AP: slot 4 apic_id 5.

  413 12:23:16.537101  AP: slot 2 apic_id 3.

  414 12:23:16.540401  AP: slot 6 apic_id 2.

  415 12:23:16.540491  AP: slot 5 apic_id 4.

  416 12:23:16.540580  done.

  417 12:23:16.547072  Waiting for 2nd SIPI to complete...done.

  418 12:23:16.553704  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

  419 12:23:16.560061  Processing 13 relocs. Offset value of 0x00038000

  420 12:23:16.563389  Unable to locate Global NVS

  421 12:23:16.569646  SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)

  422 12:23:16.572968  Installing permanent SMM handler to 0x7b000000

  423 12:23:16.583132  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908

  424 12:23:16.586256  Processing 794 relocs. Offset value of 0x7b010000

  425 12:23:16.596470  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8

  426 12:23:16.600021  Processing 13 relocs. Offset value of 0x7b008000

  427 12:23:16.605954  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd

  428 12:23:16.612918  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd

  429 12:23:16.619329  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd

  430 12:23:16.622218  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd

  431 12:23:16.629060  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd

  432 12:23:16.635710  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd

  433 12:23:16.642317  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd

  434 12:23:16.645658  Unable to locate Global NVS

  435 12:23:16.652222  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)

  436 12:23:16.655103  Clearing SMI status registers

  437 12:23:16.658726  SMI_STS: PM1 

  438 12:23:16.658837  PM1_STS: PWRBTN 

  439 12:23:16.665332  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0

  440 12:23:16.668514  In relocation handler: CPU 0

  441 12:23:16.675257  New SMBASE=0x7b000000 IEDBASE=0x7b400000

  442 12:23:16.678338  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  443 12:23:16.681500  Relocation complete.

  444 12:23:16.688181  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1

  445 12:23:16.691450  In relocation handler: CPU 1

  446 12:23:16.694681  New SMBASE=0x7afffc00 IEDBASE=0x7b400000

  447 12:23:16.698416  Relocation complete.

  448 12:23:16.704657  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2

  449 12:23:16.708088  In relocation handler: CPU 2

  450 12:23:16.711391  New SMBASE=0x7afff800 IEDBASE=0x7b400000

  451 12:23:16.714362  Relocation complete.

  452 12:23:16.721331  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6

  453 12:23:16.724568  In relocation handler: CPU 6

  454 12:23:16.727758  New SMBASE=0x7affe800 IEDBASE=0x7b400000

  455 12:23:16.734091  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  456 12:23:16.734202  Relocation complete.

  457 12:23:16.740853  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7

  458 12:23:16.744422  In relocation handler: CPU 7

  459 12:23:16.750572  New SMBASE=0x7affe400 IEDBASE=0x7b400000

  460 12:23:16.753920  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  461 12:23:16.757418  Relocation complete.

  462 12:23:16.763786  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3

  463 12:23:16.767478  In relocation handler: CPU 3

  464 12:23:16.770685  New SMBASE=0x7afff400 IEDBASE=0x7b400000

  465 12:23:16.773947  Relocation complete.

  466 12:23:16.780230  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5

  467 12:23:16.783900  In relocation handler: CPU 5

  468 12:23:16.787142  New SMBASE=0x7affec00 IEDBASE=0x7b400000

  469 12:23:16.793730  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  470 12:23:16.793814  Relocation complete.

  471 12:23:16.800080  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4

  472 12:23:16.803552  In relocation handler: CPU 4

  473 12:23:16.809924  New SMBASE=0x7afff000 IEDBASE=0x7b400000

  474 12:23:16.810010  Relocation complete.

  475 12:23:16.813115  Initializing CPU #0

  476 12:23:16.816456  CPU: vendor Intel device 806c1

  477 12:23:16.820053  CPU: family 06, model 8c, stepping 01

  478 12:23:16.823424  Clearing out pending MCEs

  479 12:23:16.826710  Setting up local APIC...

  480 12:23:16.826820   apic_id: 0x00 done.

  481 12:23:16.829826  Turbo is available but hidden

  482 12:23:16.833359  Turbo is available and visible

  483 12:23:16.840028  microcode: Update skipped, already up-to-date

  484 12:23:16.840111  CPU #0 initialized

  485 12:23:16.842976  Initializing CPU #4

  486 12:23:16.846398  Initializing CPU #5

  487 12:23:16.846472  CPU: vendor Intel device 806c1

  488 12:23:16.852723  CPU: family 06, model 8c, stepping 01

  489 12:23:16.855993  CPU: vendor Intel device 806c1

  490 12:23:16.859644  CPU: family 06, model 8c, stepping 01

  491 12:23:16.862501  Clearing out pending MCEs

  492 12:23:16.862585  Clearing out pending MCEs

  493 12:23:16.865897  Initializing CPU #2

  494 12:23:16.869361  Initializing CPU #6

  495 12:23:16.872539  CPU: vendor Intel device 806c1

  496 12:23:16.875933  CPU: family 06, model 8c, stepping 01

  497 12:23:16.879259  CPU: vendor Intel device 806c1

  498 12:23:16.882343  CPU: family 06, model 8c, stepping 01

  499 12:23:16.885946  Clearing out pending MCEs

  500 12:23:16.886022  Clearing out pending MCEs

  501 12:23:16.889166  Setting up local APIC...

  502 12:23:16.892307  Setting up local APIC...

  503 12:23:16.896041  Setting up local APIC...

  504 12:23:16.896129  Initializing CPU #3

  505 12:23:16.900065  Initializing CPU #7

  506 12:23:16.903841  CPU: vendor Intel device 806c1

  507 12:23:16.907331  CPU: family 06, model 8c, stepping 01

  508 12:23:16.910322  CPU: vendor Intel device 806c1

  509 12:23:16.913749  CPU: family 06, model 8c, stepping 01

  510 12:23:16.913835  Clearing out pending MCEs

  511 12:23:16.916609  Clearing out pending MCEs

  512 12:23:16.920143  Setting up local APIC...

  513 12:23:16.923304   apic_id: 0x03 done.

  514 12:23:16.923389   apic_id: 0x02 done.

  515 12:23:16.927019   apic_id: 0x05 done.

  516 12:23:16.930156  Setting up local APIC...

  517 12:23:16.933271  microcode: Update skipped, already up-to-date

  518 12:23:16.936870   apic_id: 0x07 done.

  519 12:23:16.939755  Setting up local APIC...

  520 12:23:16.939841  Initializing CPU #1

  521 12:23:16.946722  microcode: Update skipped, already up-to-date

  522 12:23:16.946808  CPU #2 initialized

  523 12:23:16.950103  CPU #6 initialized

  524 12:23:16.953639  microcode: Update skipped, already up-to-date

  525 12:23:16.956385   apic_id: 0x04 done.

  526 12:23:16.956497  CPU #4 initialized

  527 12:23:16.963264  microcode: Update skipped, already up-to-date

  528 12:23:16.963349   apic_id: 0x06 done.

  529 12:23:16.966064  CPU: vendor Intel device 806c1

  530 12:23:16.973266  CPU: family 06, model 8c, stepping 01

  531 12:23:16.973350  Clearing out pending MCEs

  532 12:23:16.979582  microcode: Update skipped, already up-to-date

  533 12:23:16.979662  CPU #5 initialized

  534 12:23:16.986008  microcode: Update skipped, already up-to-date

  535 12:23:16.986094  CPU #7 initialized

  536 12:23:16.989288  Setting up local APIC...

  537 12:23:16.992638  CPU #3 initialized

  538 12:23:16.992750   apic_id: 0x01 done.

  539 12:23:16.999364  microcode: Update skipped, already up-to-date

  540 12:23:16.999451  CPU #1 initialized

  541 12:23:17.005915  bsp_do_flight_plan done after 454 msecs.

  542 12:23:17.009354  CPU: frequency set to 4400 MHz

  543 12:23:17.009435  Enabling SMIs.

  544 12:23:17.015468  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms

  545 12:23:17.032072  SATAXPCIE1 indicates PCIe NVMe is present

  546 12:23:17.035439  Probing TPM:  done!

  547 12:23:17.038636  Connected to device vid:did:rid of 1ae0:0028:00

  548 12:23:17.049219  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e

  549 12:23:17.052514  Initialized TPM device CR50 revision 0

  550 12:23:17.055693  Enabling S0i3.4

  551 12:23:17.062659  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc

  552 12:23:17.065677  Found a VBT of 8704 bytes after decompression

  553 12:23:17.072438  cse_lite: CSE RO boot. HybridStorageMode disabled

  554 12:23:17.078796  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called

  555 12:23:17.154074  FSPS returned 0

  556 12:23:17.157353  Executing Phase 1 of FspMultiPhaseSiInit

  557 12:23:17.167186  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  558 12:23:17.170500  port C0 DISC req: usage 1 usb3 1 usb2 5

  559 12:23:17.173980  Raw Buffer output 0 00000511

  560 12:23:17.177574  Raw Buffer output 1 00000000

  561 12:23:17.180947  pmc_send_ipc_cmd succeeded

  562 12:23:17.187467  port C1 DISC req: usage 1 usb3 2 usb2 3

  563 12:23:17.187550  Raw Buffer output 0 00000321

  564 12:23:17.190989  Raw Buffer output 1 00000000

  565 12:23:17.194862  pmc_send_ipc_cmd succeeded

  566 12:23:17.200528  Detected 4 core, 8 thread CPU.

  567 12:23:17.203641  Detected 4 core, 8 thread CPU.

  568 12:23:17.404369  Display FSP Version Info HOB

  569 12:23:17.407649  Reference Code - CPU = a.0.4c.31

  570 12:23:17.410484  uCode Version = 0.0.0.86

  571 12:23:17.414074  TXT ACM version = ff.ff.ff.ffff

  572 12:23:17.417968  Reference Code - ME = a.0.4c.31

  573 12:23:17.420394  MEBx version = 0.0.0.0

  574 12:23:17.424105  ME Firmware Version = Consumer SKU

  575 12:23:17.427190  Reference Code - PCH = a.0.4c.31

  576 12:23:17.430592  PCH-CRID Status = Disabled

  577 12:23:17.433858  PCH-CRID Original Value = ff.ff.ff.ffff

  578 12:23:17.436797  PCH-CRID New Value = ff.ff.ff.ffff

  579 12:23:17.440566  OPROM - RST - RAID = ff.ff.ff.ffff

  580 12:23:17.443535  PCH Hsio Version = 4.0.0.0

  581 12:23:17.446515  Reference Code - SA - System Agent = a.0.4c.31

  582 12:23:17.450254  Reference Code - MRC = 2.0.0.1

  583 12:23:17.453750  SA - PCIe Version = a.0.4c.31

  584 12:23:17.456619  SA-CRID Status = Disabled

  585 12:23:17.460085  SA-CRID Original Value = 0.0.0.1

  586 12:23:17.463213  SA-CRID New Value = 0.0.0.1

  587 12:23:17.466780  OPROM - VBIOS = ff.ff.ff.ffff

  588 12:23:17.469607  IO Manageability Engine FW Version = 11.1.4.0

  589 12:23:17.473092  PHY Build Version = 0.0.0.e0

  590 12:23:17.476461  Thunderbolt(TM) FW Version = 0.0.0.0

  591 12:23:17.483672  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  592 12:23:17.487352  ITSS IRQ Polarities Before:

  593 12:23:17.487760  IPC0: 0xffffffff

  594 12:23:17.490589  IPC1: 0xffffffff

  595 12:23:17.490982  IPC2: 0xffffffff

  596 12:23:17.493758  IPC3: 0xffffffff

  597 12:23:17.497353  ITSS IRQ Polarities After:

  598 12:23:17.497832  IPC0: 0xffffffff

  599 12:23:17.500454  IPC1: 0xffffffff

  600 12:23:17.500840  IPC2: 0xffffffff

  601 12:23:17.503304  IPC3: 0xffffffff

  602 12:23:17.506604  Found PCIe Root Port #9 at PCI: 00:1d.0.

  603 12:23:17.519942  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.

  604 12:23:17.529850  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.

  605 12:23:17.543344  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.

  606 12:23:17.549580  BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms

  607 12:23:17.553268  Enumerating buses...

  608 12:23:17.556177  Show all devs... Before device enumeration.

  609 12:23:17.559635  Root Device: enabled 1

  610 12:23:17.560072  DOMAIN: 0000: enabled 1

  611 12:23:17.562814  CPU_CLUSTER: 0: enabled 1

  612 12:23:17.566130  PCI: 00:00.0: enabled 1

  613 12:23:17.569570  PCI: 00:02.0: enabled 1

  614 12:23:17.569651  PCI: 00:04.0: enabled 1

  615 12:23:17.572201  PCI: 00:05.0: enabled 1

  616 12:23:17.575744  PCI: 00:06.0: enabled 0

  617 12:23:17.579352  PCI: 00:07.0: enabled 0

  618 12:23:17.579445  PCI: 00:07.1: enabled 0

  619 12:23:17.583059  PCI: 00:07.2: enabled 0

  620 12:23:17.585924  PCI: 00:07.3: enabled 0

  621 12:23:17.589211  PCI: 00:08.0: enabled 1

  622 12:23:17.589338  PCI: 00:09.0: enabled 0

  623 12:23:17.592219  PCI: 00:0a.0: enabled 0

  624 12:23:17.595730  PCI: 00:0d.0: enabled 1

  625 12:23:17.599169  PCI: 00:0d.1: enabled 0

  626 12:23:17.599303  PCI: 00:0d.2: enabled 0

  627 12:23:17.602093  PCI: 00:0d.3: enabled 0

  628 12:23:17.605486  PCI: 00:0e.0: enabled 0

  629 12:23:17.609446  PCI: 00:10.2: enabled 1

  630 12:23:17.609617  PCI: 00:10.6: enabled 0

  631 12:23:17.612185  PCI: 00:10.7: enabled 0

  632 12:23:17.615297  PCI: 00:12.0: enabled 0

  633 12:23:17.618596  PCI: 00:12.6: enabled 0

  634 12:23:17.618861  PCI: 00:13.0: enabled 0

  635 12:23:17.621942  PCI: 00:14.0: enabled 1

  636 12:23:17.625679  PCI: 00:14.1: enabled 0

  637 12:23:17.628601  PCI: 00:14.2: enabled 1

  638 12:23:17.629115  PCI: 00:14.3: enabled 1

  639 12:23:17.632132  PCI: 00:15.0: enabled 1

  640 12:23:17.635564  PCI: 00:15.1: enabled 1

  641 12:23:17.636079  PCI: 00:15.2: enabled 1

  642 12:23:17.638661  PCI: 00:15.3: enabled 1

  643 12:23:17.641856  PCI: 00:16.0: enabled 1

  644 12:23:17.645161  PCI: 00:16.1: enabled 0

  645 12:23:17.645524  PCI: 00:16.2: enabled 0

  646 12:23:17.649125  PCI: 00:16.3: enabled 0

  647 12:23:17.652131  PCI: 00:16.4: enabled 0

  648 12:23:17.654978  PCI: 00:16.5: enabled 0

  649 12:23:17.655344  PCI: 00:17.0: enabled 1

  650 12:23:17.658792  PCI: 00:19.0: enabled 0

  651 12:23:17.661651  PCI: 00:19.1: enabled 1

  652 12:23:17.665425  PCI: 00:19.2: enabled 0

  653 12:23:17.665785  PCI: 00:1c.0: enabled 1

  654 12:23:17.668126  PCI: 00:1c.1: enabled 0

  655 12:23:17.671515  PCI: 00:1c.2: enabled 0

  656 12:23:17.675196  PCI: 00:1c.3: enabled 0

  657 12:23:17.675815  PCI: 00:1c.4: enabled 0

  658 12:23:17.678617  PCI: 00:1c.5: enabled 0

  659 12:23:17.681562  PCI: 00:1c.6: enabled 1

  660 12:23:17.685373  PCI: 00:1c.7: enabled 0

  661 12:23:17.685738  PCI: 00:1d.0: enabled 1

  662 12:23:17.687963  PCI: 00:1d.1: enabled 0

  663 12:23:17.691413  PCI: 00:1d.2: enabled 1

  664 12:23:17.694851  PCI: 00:1d.3: enabled 0

  665 12:23:17.695246  PCI: 00:1e.0: enabled 1

  666 12:23:17.697858  PCI: 00:1e.1: enabled 0

  667 12:23:17.701381  PCI: 00:1e.2: enabled 1

  668 12:23:17.701743  PCI: 00:1e.3: enabled 1

  669 12:23:17.704336  PCI: 00:1f.0: enabled 1

  670 12:23:17.707841  PCI: 00:1f.1: enabled 0

  671 12:23:17.711440  PCI: 00:1f.2: enabled 1

  672 12:23:17.711796  PCI: 00:1f.3: enabled 1

  673 12:23:17.714511  PCI: 00:1f.4: enabled 0

  674 12:23:17.717903  PCI: 00:1f.5: enabled 1

  675 12:23:17.721208  PCI: 00:1f.6: enabled 0

  676 12:23:17.721564  PCI: 00:1f.7: enabled 0

  677 12:23:17.724625  APIC: 00: enabled 1

  678 12:23:17.727692  GENERIC: 0.0: enabled 1

  679 12:23:17.730952  GENERIC: 0.0: enabled 1

  680 12:23:17.731339  GENERIC: 1.0: enabled 1

  681 12:23:17.734318  GENERIC: 0.0: enabled 1

  682 12:23:17.737283  GENERIC: 1.0: enabled 1

  683 12:23:17.737641  USB0 port 0: enabled 1

  684 12:23:17.741108  GENERIC: 0.0: enabled 1

  685 12:23:17.743929  USB0 port 0: enabled 1

  686 12:23:17.747032  GENERIC: 0.0: enabled 1

  687 12:23:17.747114  I2C: 00:1a: enabled 1

  688 12:23:17.750609  I2C: 00:31: enabled 1

  689 12:23:17.753648  I2C: 00:32: enabled 1

  690 12:23:17.753730  I2C: 00:10: enabled 1

  691 12:23:17.756878  I2C: 00:15: enabled 1

  692 12:23:17.760643  GENERIC: 0.0: enabled 0

  693 12:23:17.763580  GENERIC: 1.0: enabled 0

  694 12:23:17.763662  GENERIC: 0.0: enabled 1

  695 12:23:17.766669  SPI: 00: enabled 1

  696 12:23:17.770532  SPI: 00: enabled 1

  697 12:23:17.770619  PNP: 0c09.0: enabled 1

  698 12:23:17.773910  GENERIC: 0.0: enabled 1

  699 12:23:17.776952  USB3 port 0: enabled 1

  700 12:23:17.777135  USB3 port 1: enabled 1

  701 12:23:17.780170  USB3 port 2: enabled 0

  702 12:23:17.783583  USB3 port 3: enabled 0

  703 12:23:17.786597  USB2 port 0: enabled 0

  704 12:23:17.786747  USB2 port 1: enabled 1

  705 12:23:17.790074  USB2 port 2: enabled 1

  706 12:23:17.793624  USB2 port 3: enabled 0

  707 12:23:17.793747  USB2 port 4: enabled 1

  708 12:23:17.796677  USB2 port 5: enabled 0

  709 12:23:17.799663  USB2 port 6: enabled 0

  710 12:23:17.799800  USB2 port 7: enabled 0

  711 12:23:17.803508  USB2 port 8: enabled 0

  712 12:23:17.806295  USB2 port 9: enabled 0

  713 12:23:17.809875  USB3 port 0: enabled 0

  714 12:23:17.810049  USB3 port 1: enabled 1

  715 12:23:17.812895  USB3 port 2: enabled 0

  716 12:23:17.816659  USB3 port 3: enabled 0

  717 12:23:17.819491  GENERIC: 0.0: enabled 1

  718 12:23:17.819759  GENERIC: 1.0: enabled 1

  719 12:23:17.823186  APIC: 01: enabled 1

  720 12:23:17.823627  APIC: 03: enabled 1

  721 12:23:17.826581  APIC: 07: enabled 1

  722 12:23:17.829763  APIC: 05: enabled 1

  723 12:23:17.830125  APIC: 04: enabled 1

  724 12:23:17.833436  APIC: 02: enabled 1

  725 12:23:17.836535  APIC: 06: enabled 1

  726 12:23:17.836951  Compare with tree...

  727 12:23:17.839975  Root Device: enabled 1

  728 12:23:17.842882   DOMAIN: 0000: enabled 1

  729 12:23:17.843254    PCI: 00:00.0: enabled 1

  730 12:23:17.846657    PCI: 00:02.0: enabled 1

  731 12:23:17.849308    PCI: 00:04.0: enabled 1

  732 12:23:17.852785     GENERIC: 0.0: enabled 1

  733 12:23:17.856314    PCI: 00:05.0: enabled 1

  734 12:23:17.859378    PCI: 00:06.0: enabled 0

  735 12:23:17.859739    PCI: 00:07.0: enabled 0

  736 12:23:17.862957     GENERIC: 0.0: enabled 1

  737 12:23:17.866043    PCI: 00:07.1: enabled 0

  738 12:23:17.869032     GENERIC: 1.0: enabled 1

  739 12:23:17.872408    PCI: 00:07.2: enabled 0

  740 12:23:17.872946     GENERIC: 0.0: enabled 1

  741 12:23:17.876156    PCI: 00:07.3: enabled 0

  742 12:23:17.879357     GENERIC: 1.0: enabled 1

  743 12:23:17.882440    PCI: 00:08.0: enabled 1

  744 12:23:17.885882    PCI: 00:09.0: enabled 0

  745 12:23:17.886245    PCI: 00:0a.0: enabled 0

  746 12:23:17.889060    PCI: 00:0d.0: enabled 1

  747 12:23:17.892670     USB0 port 0: enabled 1

  748 12:23:17.895717      USB3 port 0: enabled 1

  749 12:23:17.899221      USB3 port 1: enabled 1

  750 12:23:17.902173      USB3 port 2: enabled 0

  751 12:23:17.902282      USB3 port 3: enabled 0

  752 12:23:17.905590    PCI: 00:0d.1: enabled 0

  753 12:23:17.908500    PCI: 00:0d.2: enabled 0

  754 12:23:17.911989     GENERIC: 0.0: enabled 1

  755 12:23:17.914948    PCI: 00:0d.3: enabled 0

  756 12:23:17.915030    PCI: 00:0e.0: enabled 0

  757 12:23:17.918540    PCI: 00:10.2: enabled 1

  758 12:23:17.921576    PCI: 00:10.6: enabled 0

  759 12:23:17.925110    PCI: 00:10.7: enabled 0

  760 12:23:17.928772    PCI: 00:12.0: enabled 0

  761 12:23:17.929141    PCI: 00:12.6: enabled 0

  762 12:23:17.932112    PCI: 00:13.0: enabled 0

  763 12:23:17.935686    PCI: 00:14.0: enabled 1

  764 12:23:17.938830     USB0 port 0: enabled 1

  765 12:23:17.942002      USB2 port 0: enabled 0

  766 12:23:17.942372      USB2 port 1: enabled 1

  767 12:23:17.945151      USB2 port 2: enabled 1

  768 12:23:17.948630      USB2 port 3: enabled 0

  769 12:23:17.952032      USB2 port 4: enabled 1

  770 12:23:17.955072      USB2 port 5: enabled 0

  771 12:23:17.958538      USB2 port 6: enabled 0

  772 12:23:17.958921      USB2 port 7: enabled 0

  773 12:23:17.961362      USB2 port 8: enabled 0

  774 12:23:17.964769      USB2 port 9: enabled 0

  775 12:23:17.968417      USB3 port 0: enabled 0

  776 12:23:17.971841      USB3 port 1: enabled 1

  777 12:23:17.974637      USB3 port 2: enabled 0

  778 12:23:17.975199      USB3 port 3: enabled 0

  779 12:23:17.978089    PCI: 00:14.1: enabled 0

  780 12:23:17.981106    PCI: 00:14.2: enabled 1

  781 12:23:17.984820    PCI: 00:14.3: enabled 1

  782 12:23:17.987590     GENERIC: 0.0: enabled 1

  783 12:23:17.987967    PCI: 00:15.0: enabled 1

  784 12:23:17.990880     I2C: 00:1a: enabled 1

  785 12:23:17.994398     I2C: 00:31: enabled 1

  786 12:23:17.997838     I2C: 00:32: enabled 1

  787 12:23:18.001148    PCI: 00:15.1: enabled 1

  788 12:23:18.001551     I2C: 00:10: enabled 1

  789 12:23:18.004356    PCI: 00:15.2: enabled 1

  790 12:23:18.007752    PCI: 00:15.3: enabled 1

  791 12:23:18.011282    PCI: 00:16.0: enabled 1

  792 12:23:18.014191    PCI: 00:16.1: enabled 0

  793 12:23:18.014589    PCI: 00:16.2: enabled 0

  794 12:23:18.017576    PCI: 00:16.3: enabled 0

  795 12:23:18.020776    PCI: 00:16.4: enabled 0

  796 12:23:18.024310    PCI: 00:16.5: enabled 0

  797 12:23:18.027266    PCI: 00:17.0: enabled 1

  798 12:23:18.027664    PCI: 00:19.0: enabled 0

  799 12:23:18.031023    PCI: 00:19.1: enabled 1

  800 12:23:18.033643     I2C: 00:15: enabled 1

  801 12:23:18.037183    PCI: 00:19.2: enabled 0

  802 12:23:18.040349    PCI: 00:1d.0: enabled 1

  803 12:23:18.040971     GENERIC: 0.0: enabled 1

  804 12:23:18.043612    PCI: 00:1e.0: enabled 1

  805 12:23:18.047284    PCI: 00:1e.1: enabled 0

  806 12:23:18.050299    PCI: 00:1e.2: enabled 1

  807 12:23:18.050686     SPI: 00: enabled 1

  808 12:23:18.053599    PCI: 00:1e.3: enabled 1

  809 12:23:18.057118     SPI: 00: enabled 1

  810 12:23:18.060536    PCI: 00:1f.0: enabled 1

  811 12:23:18.063391     PNP: 0c09.0: enabled 1

  812 12:23:18.063791    PCI: 00:1f.1: enabled 0

  813 12:23:18.066740    PCI: 00:1f.2: enabled 1

  814 12:23:18.118193     GENERIC: 0.0: enabled 1

  815 12:23:18.118639      GENERIC: 0.0: enabled 1

  816 12:23:18.119387      GENERIC: 1.0: enabled 1

  817 12:23:18.119752    PCI: 00:1f.3: enabled 1

  818 12:23:18.120138    PCI: 00:1f.4: enabled 0

  819 12:23:18.120513    PCI: 00:1f.5: enabled 1

  820 12:23:18.121179    PCI: 00:1f.6: enabled 0

  821 12:23:18.121571    PCI: 00:1f.7: enabled 0

  822 12:23:18.122134   CPU_CLUSTER: 0: enabled 1

  823 12:23:18.122696    APIC: 00: enabled 1

  824 12:23:18.123311    APIC: 01: enabled 1

  825 12:23:18.123694    APIC: 03: enabled 1

  826 12:23:18.124283    APIC: 07: enabled 1

  827 12:23:18.124600    APIC: 05: enabled 1

  828 12:23:18.124932    APIC: 04: enabled 1

  829 12:23:18.125209    APIC: 02: enabled 1

  830 12:23:18.125476    APIC: 06: enabled 1

  831 12:23:18.125736  Root Device scanning...

  832 12:23:18.125999  scan_static_bus for Root Device

  833 12:23:18.126257  DOMAIN: 0000 enabled

  834 12:23:18.126722  CPU_CLUSTER: 0 enabled

  835 12:23:18.127006  DOMAIN: 0000 scanning...

  836 12:23:18.127324  PCI: pci_scan_bus for bus 00

  837 12:23:18.130691  PCI: 00:00.0 [8086/0000] ops

  838 12:23:18.133515  PCI: 00:00.0 [8086/9a12] enabled

  839 12:23:18.137219  PCI: 00:02.0 [8086/0000] bus ops

  840 12:23:18.140359  PCI: 00:02.0 [8086/9a40] enabled

  841 12:23:18.143630  PCI: 00:04.0 [8086/0000] bus ops

  842 12:23:18.147401  PCI: 00:04.0 [8086/9a03] enabled

  843 12:23:18.151066  PCI: 00:05.0 [8086/9a19] enabled

  844 12:23:18.154516  PCI: 00:07.0 [0000/0000] hidden

  845 12:23:18.157660  PCI: 00:08.0 [8086/9a11] enabled

  846 12:23:18.161116  PCI: 00:0a.0 [8086/9a0d] disabled

  847 12:23:18.164100  PCI: 00:0d.0 [8086/0000] bus ops

  848 12:23:18.167443  PCI: 00:0d.0 [8086/9a13] enabled

  849 12:23:18.170803  PCI: 00:14.0 [8086/0000] bus ops

  850 12:23:18.174355  PCI: 00:14.0 [8086/a0ed] enabled

  851 12:23:18.177699  PCI: 00:14.2 [8086/a0ef] enabled

  852 12:23:18.180654  PCI: 00:14.3 [8086/0000] bus ops

  853 12:23:18.184617  PCI: 00:14.3 [8086/a0f0] enabled

  854 12:23:18.187281  PCI: 00:15.0 [8086/0000] bus ops

  855 12:23:18.190991  PCI: 00:15.0 [8086/a0e8] enabled

  856 12:23:18.193813  PCI: 00:15.1 [8086/0000] bus ops

  857 12:23:18.197120  PCI: 00:15.1 [8086/a0e9] enabled

  858 12:23:18.200792  PCI: 00:15.2 [8086/0000] bus ops

  859 12:23:18.203675  PCI: 00:15.2 [8086/a0ea] enabled

  860 12:23:18.207209  PCI: 00:15.3 [8086/0000] bus ops

  861 12:23:18.210419  PCI: 00:15.3 [8086/a0eb] enabled

  862 12:23:18.213398  PCI: 00:16.0 [8086/0000] ops

  863 12:23:18.216741  PCI: 00:16.0 [8086/a0e0] enabled

  864 12:23:18.223554  PCI: Static device PCI: 00:17.0 not found, disabling it.

  865 12:23:18.226776  PCI: 00:19.0 [8086/0000] bus ops

  866 12:23:18.230423  PCI: 00:19.0 [8086/a0c5] disabled

  867 12:23:18.233300  PCI: 00:19.1 [8086/0000] bus ops

  868 12:23:18.237123  PCI: 00:19.1 [8086/a0c6] enabled

  869 12:23:18.240093  PCI: 00:1d.0 [8086/0000] bus ops

  870 12:23:18.243349  PCI: 00:1d.0 [8086/a0b0] enabled

  871 12:23:18.246718  PCI: 00:1e.0 [8086/0000] ops

  872 12:23:18.249684  PCI: 00:1e.0 [8086/a0a8] enabled

  873 12:23:18.253189  PCI: 00:1e.2 [8086/0000] bus ops

  874 12:23:18.256655  PCI: 00:1e.2 [8086/a0aa] enabled

  875 12:23:18.259830  PCI: 00:1e.3 [8086/0000] bus ops

  876 12:23:18.262684  PCI: 00:1e.3 [8086/a0ab] enabled

  877 12:23:18.266131  PCI: 00:1f.0 [8086/0000] bus ops

  878 12:23:18.269492  PCI: 00:1f.0 [8086/a087] enabled

  879 12:23:18.269898  RTC Init

  880 12:23:18.272677  Set power on after power failure.

  881 12:23:18.275956  Disabling Deep S3

  882 12:23:18.276342  Disabling Deep S3

  883 12:23:18.279181  Disabling Deep S4

  884 12:23:18.279568  Disabling Deep S4

  885 12:23:18.282573  Disabling Deep S5

  886 12:23:18.286070  Disabling Deep S5

  887 12:23:18.286489  PCI: 00:1f.2 [0000/0000] hidden

  888 12:23:18.289090  PCI: 00:1f.3 [8086/0000] bus ops

  889 12:23:18.295949  PCI: 00:1f.3 [8086/a0c8] enabled

  890 12:23:18.299732  PCI: 00:1f.5 [8086/0000] bus ops

  891 12:23:18.302795  PCI: 00:1f.5 [8086/a0a4] enabled

  892 12:23:18.303185  PCI: Leftover static devices:

  893 12:23:18.305478  PCI: 00:10.2

  894 12:23:18.305861  PCI: 00:10.6

  895 12:23:18.308822  PCI: 00:10.7

  896 12:23:18.309377  PCI: 00:06.0

  897 12:23:18.312418  PCI: 00:07.1

  898 12:23:18.312897  PCI: 00:07.2

  899 12:23:18.313196  PCI: 00:07.3

  900 12:23:18.315464  PCI: 00:09.0

  901 12:23:18.315844  PCI: 00:0d.1

  902 12:23:18.318971  PCI: 00:0d.2

  903 12:23:18.319351  PCI: 00:0d.3

  904 12:23:18.319658  PCI: 00:0e.0

  905 12:23:18.322278  PCI: 00:12.0

  906 12:23:18.322785  PCI: 00:12.6

  907 12:23:18.325855  PCI: 00:13.0

  908 12:23:18.326236  PCI: 00:14.1

  909 12:23:18.328947  PCI: 00:16.1

  910 12:23:18.329332  PCI: 00:16.2

  911 12:23:18.329637  PCI: 00:16.3

  912 12:23:18.332074  PCI: 00:16.4

  913 12:23:18.332452  PCI: 00:16.5

  914 12:23:18.335048  PCI: 00:17.0

  915 12:23:18.335425  PCI: 00:19.2

  916 12:23:18.335818  PCI: 00:1e.1

  917 12:23:18.338660  PCI: 00:1f.1

  918 12:23:18.339036  PCI: 00:1f.4

  919 12:23:18.341973  PCI: 00:1f.6

  920 12:23:18.342328  PCI: 00:1f.7

  921 12:23:18.345093  PCI: Check your devicetree.cb.

  922 12:23:18.348660  PCI: 00:02.0 scanning...

  923 12:23:18.351654  scan_generic_bus for PCI: 00:02.0

  924 12:23:18.355204  scan_generic_bus for PCI: 00:02.0 done

  925 12:23:18.361449  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

  926 12:23:18.361894  PCI: 00:04.0 scanning...

  927 12:23:18.365137  scan_generic_bus for PCI: 00:04.0

  928 12:23:18.368882  GENERIC: 0.0 enabled

  929 12:23:18.375150  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

  930 12:23:18.377871  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

  931 12:23:18.381317  PCI: 00:0d.0 scanning...

  932 12:23:18.384528  scan_static_bus for PCI: 00:0d.0

  933 12:23:18.388057  USB0 port 0 enabled

  934 12:23:18.391003  USB0 port 0 scanning...

  935 12:23:18.394882  scan_static_bus for USB0 port 0

  936 12:23:18.395231  USB3 port 0 enabled

  937 12:23:18.397637  USB3 port 1 enabled

  938 12:23:18.401375  USB3 port 2 disabled

  939 12:23:18.401725  USB3 port 3 disabled

  940 12:23:18.404182  USB3 port 0 scanning...

  941 12:23:18.407340  scan_static_bus for USB3 port 0

  942 12:23:18.411166  scan_static_bus for USB3 port 0 done

  943 12:23:18.417331  scan_bus: bus USB3 port 0 finished in 6 msecs

  944 12:23:18.417682  USB3 port 1 scanning...

  945 12:23:18.420706  scan_static_bus for USB3 port 1

  946 12:23:18.424192  scan_static_bus for USB3 port 1 done

  947 12:23:18.431049  scan_bus: bus USB3 port 1 finished in 6 msecs

  948 12:23:18.434091  scan_static_bus for USB0 port 0 done

  949 12:23:18.437008  scan_bus: bus USB0 port 0 finished in 43 msecs

  950 12:23:18.443574  scan_static_bus for PCI: 00:0d.0 done

  951 12:23:18.447545  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs

  952 12:23:18.450476  PCI: 00:14.0 scanning...

  953 12:23:18.453579  scan_static_bus for PCI: 00:14.0

  954 12:23:18.453925  USB0 port 0 enabled

  955 12:23:18.457040  USB0 port 0 scanning...

  956 12:23:18.460502  scan_static_bus for USB0 port 0

  957 12:23:18.463773  USB2 port 0 disabled

  958 12:23:18.466748  USB2 port 1 enabled

  959 12:23:18.467099  USB2 port 2 enabled

  960 12:23:18.470503  USB2 port 3 disabled

  961 12:23:18.470851  USB2 port 4 enabled

  962 12:23:18.473350  USB2 port 5 disabled

  963 12:23:18.476853  USB2 port 6 disabled

  964 12:23:18.477319  USB2 port 7 disabled

  965 12:23:18.479918  USB2 port 8 disabled

  966 12:23:18.483560  USB2 port 9 disabled

  967 12:23:18.483906  USB3 port 0 disabled

  968 12:23:18.486435  USB3 port 1 enabled

  969 12:23:18.489944  USB3 port 2 disabled

  970 12:23:18.490297  USB3 port 3 disabled

  971 12:23:18.493351  USB2 port 1 scanning...

  972 12:23:18.496402  scan_static_bus for USB2 port 1

  973 12:23:18.499842  scan_static_bus for USB2 port 1 done

  974 12:23:18.506100  scan_bus: bus USB2 port 1 finished in 6 msecs

  975 12:23:18.506643  USB2 port 2 scanning...

  976 12:23:18.509420  scan_static_bus for USB2 port 2

  977 12:23:18.515999  scan_static_bus for USB2 port 2 done

  978 12:23:18.519496  scan_bus: bus USB2 port 2 finished in 6 msecs

  979 12:23:18.522759  USB2 port 4 scanning...

  980 12:23:18.526035  scan_static_bus for USB2 port 4

  981 12:23:18.529086  scan_static_bus for USB2 port 4 done

  982 12:23:18.532677  scan_bus: bus USB2 port 4 finished in 6 msecs

  983 12:23:18.535809  USB3 port 1 scanning...

  984 12:23:18.539149  scan_static_bus for USB3 port 1

  985 12:23:18.542695  scan_static_bus for USB3 port 1 done

  986 12:23:18.548977  scan_bus: bus USB3 port 1 finished in 6 msecs

  987 12:23:18.552222  scan_static_bus for USB0 port 0 done

  988 12:23:18.555839  scan_bus: bus USB0 port 0 finished in 93 msecs

  989 12:23:18.558956  scan_static_bus for PCI: 00:14.0 done

  990 12:23:18.565399  scan_bus: bus PCI: 00:14.0 finished in 109 msecs

  991 12:23:18.568675  PCI: 00:14.3 scanning...

  992 12:23:18.571944  scan_static_bus for PCI: 00:14.3

  993 12:23:18.572425  GENERIC: 0.0 enabled

  994 12:23:18.575407  scan_static_bus for PCI: 00:14.3 done

  995 12:23:18.581669  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

  996 12:23:18.585314  PCI: 00:15.0 scanning...

  997 12:23:18.588165  scan_static_bus for PCI: 00:15.0

  998 12:23:18.588514  I2C: 00:1a enabled

  999 12:23:18.592011  I2C: 00:31 enabled

 1000 12:23:18.594726  I2C: 00:32 enabled

 1001 12:23:18.598237  scan_static_bus for PCI: 00:15.0 done

 1002 12:23:18.601574  scan_bus: bus PCI: 00:15.0 finished in 12 msecs

 1003 12:23:18.605010  PCI: 00:15.1 scanning...

 1004 12:23:18.607959  scan_static_bus for PCI: 00:15.1

 1005 12:23:18.611134  I2C: 00:10 enabled

 1006 12:23:18.614873  scan_static_bus for PCI: 00:15.1 done

 1007 12:23:18.617930  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

 1008 12:23:18.621557  PCI: 00:15.2 scanning...

 1009 12:23:18.624134  scan_static_bus for PCI: 00:15.2

 1010 12:23:18.627618  scan_static_bus for PCI: 00:15.2 done

 1011 12:23:18.634241  scan_bus: bus PCI: 00:15.2 finished in 7 msecs

 1012 12:23:18.634402  PCI: 00:15.3 scanning...

 1013 12:23:18.637661  scan_static_bus for PCI: 00:15.3

 1014 12:23:18.644439  scan_static_bus for PCI: 00:15.3 done

 1015 12:23:18.647442  scan_bus: bus PCI: 00:15.3 finished in 7 msecs

 1016 12:23:18.650529  PCI: 00:19.1 scanning...

 1017 12:23:18.653995  scan_static_bus for PCI: 00:19.1

 1018 12:23:18.657157  I2C: 00:15 enabled

 1019 12:23:18.660665  scan_static_bus for PCI: 00:19.1 done

 1020 12:23:18.663832  scan_bus: bus PCI: 00:19.1 finished in 9 msecs

 1021 12:23:18.667045  PCI: 00:1d.0 scanning...

 1022 12:23:18.670187  do_pci_scan_bridge for PCI: 00:1d.0

 1023 12:23:18.673582  PCI: pci_scan_bus for bus 01

 1024 12:23:18.677115  PCI: 01:00.0 [15b7/5009] enabled

 1025 12:23:18.679846  GENERIC: 0.0 enabled

 1026 12:23:18.683574  Enabling Common Clock Configuration

 1027 12:23:18.686480  L1 Sub-State supported from root port 29

 1028 12:23:18.690118  L1 Sub-State Support = 0x5

 1029 12:23:18.693302  CommonModeRestoreTime = 0x28

 1030 12:23:18.696699  Power On Value = 0x16, Power On Scale = 0x0

 1031 12:23:18.699934  ASPM: Enabled L1

 1032 12:23:18.702676  PCIe: Max_Payload_Size adjusted to 128

 1033 12:23:18.706134  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs

 1034 12:23:18.709624  PCI: 00:1e.2 scanning...

 1035 12:23:18.713375  scan_generic_bus for PCI: 00:1e.2

 1036 12:23:18.716084  SPI: 00 enabled

 1037 12:23:18.722788  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done

 1038 12:23:18.726374  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs

 1039 12:23:18.730457  PCI: 00:1e.3 scanning...

 1040 12:23:18.734200  scan_generic_bus for PCI: 00:1e.3

 1041 12:23:18.734311  SPI: 00 enabled

 1042 12:23:18.740353  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1043 12:23:18.743772  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1044 12:23:18.747512  PCI: 00:1f.0 scanning...

 1045 12:23:18.750048  scan_static_bus for PCI: 00:1f.0

 1046 12:23:18.753744  PNP: 0c09.0 enabled

 1047 12:23:18.757105  PNP: 0c09.0 scanning...

 1048 12:23:18.760548  scan_static_bus for PNP: 0c09.0

 1049 12:23:18.763300  scan_static_bus for PNP: 0c09.0 done

 1050 12:23:18.766682  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1051 12:23:18.770474  scan_static_bus for PCI: 00:1f.0 done

 1052 12:23:18.776987  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1053 12:23:18.780464  PCI: 00:1f.2 scanning...

 1054 12:23:18.783631  scan_static_bus for PCI: 00:1f.2

 1055 12:23:18.784031  GENERIC: 0.0 enabled

 1056 12:23:18.786604  GENERIC: 0.0 scanning...

 1057 12:23:18.790197  scan_static_bus for GENERIC: 0.0

 1058 12:23:18.793187  GENERIC: 0.0 enabled

 1059 12:23:18.793560  GENERIC: 1.0 enabled

 1060 12:23:18.799718  scan_static_bus for GENERIC: 0.0 done

 1061 12:23:18.803184  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1062 12:23:18.806294  scan_static_bus for PCI: 00:1f.2 done

 1063 12:23:18.812859  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1064 12:23:18.813238  PCI: 00:1f.3 scanning...

 1065 12:23:18.819924  scan_static_bus for PCI: 00:1f.3

 1066 12:23:18.822723  scan_static_bus for PCI: 00:1f.3 done

 1067 12:23:18.826459  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1068 12:23:18.829370  PCI: 00:1f.5 scanning...

 1069 12:23:18.832573  scan_generic_bus for PCI: 00:1f.5

 1070 12:23:18.835881  scan_generic_bus for PCI: 00:1f.5 done

 1071 12:23:18.842798  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1072 12:23:18.845764  scan_bus: bus DOMAIN: 0000 finished in 716 msecs

 1073 12:23:18.849257  scan_static_bus for Root Device done

 1074 12:23:18.856051  scan_bus: bus Root Device finished in 736 msecs

 1075 12:23:18.856549  done

 1076 12:23:18.862664  BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms

 1077 12:23:18.865871  Chrome EC: UHEPI supported

 1078 12:23:18.872094  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)

 1079 12:23:18.875448  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1080 12:23:18.881690  SPI flash protection: WPSW=0 SRP0=1

 1081 12:23:18.885478  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1082 12:23:18.891650  BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms

 1083 12:23:18.895135  found VGA at PCI: 00:02.0

 1084 12:23:18.898824  Setting up VGA for PCI: 00:02.0

 1085 12:23:18.901819  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1086 12:23:18.908386  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1087 12:23:18.908836  Allocating resources...

 1088 12:23:18.911588  Reading resources...

 1089 12:23:18.914854  Root Device read_resources bus 0 link: 0

 1090 12:23:18.921165  DOMAIN: 0000 read_resources bus 0 link: 0

 1091 12:23:18.925045  PCI: 00:04.0 read_resources bus 1 link: 0

 1092 12:23:18.931143  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1093 12:23:18.934253  PCI: 00:0d.0 read_resources bus 0 link: 0

 1094 12:23:18.941446  USB0 port 0 read_resources bus 0 link: 0

 1095 12:23:18.944236  USB0 port 0 read_resources bus 0 link: 0 done

 1096 12:23:18.950703  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1097 12:23:18.954285  PCI: 00:14.0 read_resources bus 0 link: 0

 1098 12:23:18.957141  USB0 port 0 read_resources bus 0 link: 0

 1099 12:23:18.964839  USB0 port 0 read_resources bus 0 link: 0 done

 1100 12:23:18.968356  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1101 12:23:18.975222  PCI: 00:14.3 read_resources bus 0 link: 0

 1102 12:23:18.978353  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1103 12:23:18.985006  PCI: 00:15.0 read_resources bus 0 link: 0

 1104 12:23:18.988759  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1105 12:23:18.995045  PCI: 00:15.1 read_resources bus 0 link: 0

 1106 12:23:18.998075  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1107 12:23:19.005628  PCI: 00:19.1 read_resources bus 0 link: 0

 1108 12:23:19.008793  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1109 12:23:19.015521  PCI: 00:1d.0 read_resources bus 1 link: 0

 1110 12:23:19.018758  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1111 12:23:19.025229  PCI: 00:1e.2 read_resources bus 2 link: 0

 1112 12:23:19.028915  PCI: 00:1e.2 read_resources bus 2 link: 0 done

 1113 12:23:19.035320  PCI: 00:1e.3 read_resources bus 3 link: 0

 1114 12:23:19.038512  PCI: 00:1e.3 read_resources bus 3 link: 0 done

 1115 12:23:19.045304  PCI: 00:1f.0 read_resources bus 0 link: 0

 1116 12:23:19.048354  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1117 12:23:19.055009  PCI: 00:1f.2 read_resources bus 0 link: 0

 1118 12:23:19.058236  GENERIC: 0.0 read_resources bus 0 link: 0

 1119 12:23:19.064928  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1120 12:23:19.067977  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1121 12:23:19.074738  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1122 12:23:19.077759  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1123 12:23:19.084234  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1124 12:23:19.087699  Root Device read_resources bus 0 link: 0 done

 1125 12:23:19.091109  Done reading resources.

 1126 12:23:19.097408  Show resources in subtree (Root Device)...After reading.

 1127 12:23:19.100793   Root Device child on link 0 DOMAIN: 0000

 1128 12:23:19.104112    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1129 12:23:19.113980    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1130 12:23:19.124260    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1131 12:23:19.127130     PCI: 00:00.0

 1132 12:23:19.136960     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1133 12:23:19.143563     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1134 12:23:19.153690     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1135 12:23:19.163218     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1136 12:23:19.173422     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1137 12:23:19.183529     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1138 12:23:19.193363     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1139 12:23:19.199771     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1140 12:23:19.209701     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1141 12:23:19.219840     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1142 12:23:19.229945     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1143 12:23:19.239268     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1144 12:23:19.249607     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1145 12:23:19.255901     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1146 12:23:19.266014     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1147 12:23:19.275397     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1148 12:23:19.285285     PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1149 12:23:19.295342     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1150 12:23:19.305030     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1151 12:23:19.315129     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1152 12:23:19.315550     PCI: 00:02.0

 1153 12:23:19.324890     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1154 12:23:19.337725     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1155 12:23:19.344770     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1156 12:23:19.347575     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1157 12:23:19.357568     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1158 12:23:19.361189      GENERIC: 0.0

 1159 12:23:19.364050     PCI: 00:05.0

 1160 12:23:19.374001     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1161 12:23:19.377665     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1162 12:23:19.381031      GENERIC: 0.0

 1163 12:23:19.381448     PCI: 00:08.0

 1164 12:23:19.390651     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1165 12:23:19.394277     PCI: 00:0a.0

 1166 12:23:19.397069     PCI: 00:0d.0 child on link 0 USB0 port 0

 1167 12:23:19.407073     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1168 12:23:19.410424      USB0 port 0 child on link 0 USB3 port 0

 1169 12:23:19.413614       USB3 port 0

 1170 12:23:19.414099       USB3 port 1

 1171 12:23:19.417115       USB3 port 2

 1172 12:23:19.417567       USB3 port 3

 1173 12:23:19.423895     PCI: 00:14.0 child on link 0 USB0 port 0

 1174 12:23:19.433766     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1175 12:23:19.437060      USB0 port 0 child on link 0 USB2 port 0

 1176 12:23:19.440216       USB2 port 0

 1177 12:23:19.440629       USB2 port 1

 1178 12:23:19.443197       USB2 port 2

 1179 12:23:19.443609       USB2 port 3

 1180 12:23:19.446640       USB2 port 4

 1181 12:23:19.447089       USB2 port 5

 1182 12:23:19.449936       USB2 port 6

 1183 12:23:19.450350       USB2 port 7

 1184 12:23:19.453126       USB2 port 8

 1185 12:23:19.456314       USB2 port 9

 1186 12:23:19.456776       USB3 port 0

 1187 12:23:19.460233       USB3 port 1

 1188 12:23:19.460644       USB3 port 2

 1189 12:23:19.462833       USB3 port 3

 1190 12:23:19.463243     PCI: 00:14.2

 1191 12:23:19.472663     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1192 12:23:19.482813     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1193 12:23:19.489182     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1194 12:23:19.498815     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1195 12:23:19.499380      GENERIC: 0.0

 1196 12:23:19.505593     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1197 12:23:19.515270     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1198 12:23:19.515745      I2C: 00:1a

 1199 12:23:19.518527      I2C: 00:31

 1200 12:23:19.519140      I2C: 00:32

 1201 12:23:19.522287     PCI: 00:15.1 child on link 0 I2C: 00:10

 1202 12:23:19.531987     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1203 12:23:19.535106      I2C: 00:10

 1204 12:23:19.535517     PCI: 00:15.2

 1205 12:23:19.545055     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1206 12:23:19.548550     PCI: 00:15.3

 1207 12:23:19.559028     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1208 12:23:19.559495     PCI: 00:16.0

 1209 12:23:19.568094     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1210 12:23:19.571548     PCI: 00:19.0

 1211 12:23:19.574515     PCI: 00:19.1 child on link 0 I2C: 00:15

 1212 12:23:19.584526     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1213 12:23:19.588052      I2C: 00:15

 1214 12:23:19.591636     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1215 12:23:19.601099     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1216 12:23:19.611169     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1217 12:23:19.617308     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1218 12:23:19.620759      GENERIC: 0.0

 1219 12:23:19.621174      PCI: 01:00.0

 1220 12:23:19.634332      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1221 12:23:19.644074      PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20

 1222 12:23:19.644494     PCI: 00:1e.0

 1223 12:23:19.654412     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1224 12:23:19.660433     PCI: 00:1e.2 child on link 0 SPI: 00

 1225 12:23:19.670117     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1226 12:23:19.670833      SPI: 00

 1227 12:23:19.673732     PCI: 00:1e.3 child on link 0 SPI: 00

 1228 12:23:19.683550     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1229 12:23:19.686738      SPI: 00

 1230 12:23:19.690060     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1231 12:23:19.700047     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1232 12:23:19.700462      PNP: 0c09.0

 1233 12:23:19.709801      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1234 12:23:19.712993     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1235 12:23:19.722934     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1236 12:23:19.732677     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1237 12:23:19.735854      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1238 12:23:19.739816       GENERIC: 0.0

 1239 12:23:19.740229       GENERIC: 1.0

 1240 12:23:19.742555     PCI: 00:1f.3

 1241 12:23:19.752292     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1242 12:23:19.763181     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1243 12:23:19.763703     PCI: 00:1f.5

 1244 12:23:19.772155     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1245 12:23:19.779015    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1246 12:23:19.779432     APIC: 00

 1247 12:23:19.779760     APIC: 01

 1248 12:23:19.781935     APIC: 03

 1249 12:23:19.782345     APIC: 07

 1250 12:23:19.782677     APIC: 05

 1251 12:23:19.785362     APIC: 04

 1252 12:23:19.785774     APIC: 02

 1253 12:23:19.788468     APIC: 06

 1254 12:23:19.795176  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1255 12:23:19.801893   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1256 12:23:19.808803   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1257 12:23:19.811598   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1258 12:23:19.818297    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1259 12:23:19.821953    PCI: 01:00.0 20 *  [0x4000 - 0x40ff] mem

 1260 12:23:19.828178   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1261 12:23:19.834764   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1262 12:23:19.844340   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1263 12:23:19.851098  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1264 12:23:19.857725  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1265 12:23:19.864437   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1266 12:23:19.870636   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1267 12:23:19.880917   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1268 12:23:19.884116   DOMAIN: 0000: Resource ranges:

 1269 12:23:19.887804   * Base: 1000, Size: 800, Tag: 100

 1270 12:23:19.891014   * Base: 1900, Size: e700, Tag: 100

 1271 12:23:19.893961    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1272 12:23:19.900781  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1273 12:23:19.910328  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1274 12:23:19.917031   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)

 1275 12:23:19.923707   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)

 1276 12:23:19.933733   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)

 1277 12:23:19.939993   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)

 1278 12:23:19.946664   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)

 1279 12:23:19.956448   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)

 1280 12:23:19.963037   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)

 1281 12:23:19.969536   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)

 1282 12:23:19.979534   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)

 1283 12:23:19.986038   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)

 1284 12:23:19.992931   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)

 1285 12:23:20.003241   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)

 1286 12:23:20.009136   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)

 1287 12:23:20.016002   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)

 1288 12:23:20.025698   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)

 1289 12:23:20.032229   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)

 1290 12:23:20.038634   update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)

 1291 12:23:20.048862   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)

 1292 12:23:20.055747   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)

 1293 12:23:20.061855   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)

 1294 12:23:20.071868   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1295 12:23:20.078020   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1296 12:23:20.081853   DOMAIN: 0000: Resource ranges:

 1297 12:23:20.085278   * Base: 7fc00000, Size: 40400000, Tag: 200

 1298 12:23:20.091862   * Base: d0000000, Size: 28000000, Tag: 200

 1299 12:23:20.095143   * Base: fa000000, Size: 1000000, Tag: 200

 1300 12:23:20.098530   * Base: fb001000, Size: 2fff000, Tag: 200

 1301 12:23:20.104455   * Base: fe010000, Size: 2e000, Tag: 200

 1302 12:23:20.108321   * Base: fe03f000, Size: d41000, Tag: 200

 1303 12:23:20.111226   * Base: fed88000, Size: 8000, Tag: 200

 1304 12:23:20.114691   * Base: fed93000, Size: d000, Tag: 200

 1305 12:23:20.121260   * Base: feda2000, Size: 1e000, Tag: 200

 1306 12:23:20.124686   * Base: fede0000, Size: 1220000, Tag: 200

 1307 12:23:20.127610   * Base: 480400000, Size: 7b7fc00000, Tag: 100200

 1308 12:23:20.137461    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem

 1309 12:23:20.143811    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem

 1310 12:23:20.150613    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem

 1311 12:23:20.157001    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem

 1312 12:23:20.163697    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem

 1313 12:23:20.170793    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem

 1314 12:23:20.177095    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem

 1315 12:23:20.183436    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem

 1316 12:23:20.190700    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem

 1317 12:23:20.196781    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem

 1318 12:23:20.203305    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem

 1319 12:23:20.209854    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem

 1320 12:23:20.216616    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem

 1321 12:23:20.223085    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem

 1322 12:23:20.229673    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem

 1323 12:23:20.236217    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem

 1324 12:23:20.242682    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem

 1325 12:23:20.249426    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem

 1326 12:23:20.255869    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem

 1327 12:23:20.262582    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem

 1328 12:23:20.268840    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem

 1329 12:23:20.275634    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem

 1330 12:23:20.282477  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1331 12:23:20.288816  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff

 1332 12:23:20.292112   PCI: 00:1d.0: Resource ranges:

 1333 12:23:20.298572   * Base: 7fc00000, Size: 100000, Tag: 200

 1334 12:23:20.305070    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem

 1335 12:23:20.311738    PCI: 01:00.0 20 *  [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem

 1336 12:23:20.318326  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done

 1337 12:23:20.328207  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1338 12:23:20.331762  Root Device assign_resources, bus 0 link: 0

 1339 12:23:20.335197  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1340 12:23:20.345261  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64

 1341 12:23:20.351214  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64

 1342 12:23:20.360830  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1343 12:23:20.367543  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64

 1344 12:23:20.373823  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1345 12:23:20.377263  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1346 12:23:20.386891  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64

 1347 12:23:20.393484  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64

 1348 12:23:20.403350  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64

 1349 12:23:20.406802  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1350 12:23:20.410234  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1351 12:23:20.419864  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64

 1352 12:23:20.423319  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1353 12:23:20.429828  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1354 12:23:20.436484  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64

 1355 12:23:20.446480  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64

 1356 12:23:20.452866  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64

 1357 12:23:20.456286  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1358 12:23:20.462765  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1359 12:23:20.469531  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64

 1360 12:23:20.475775  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1361 12:23:20.479242  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1362 12:23:20.489144  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64

 1363 12:23:20.492159  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1364 12:23:20.495491  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1365 12:23:20.505633  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64

 1366 12:23:20.512169  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64

 1367 12:23:20.522031  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64

 1368 12:23:20.528583  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64

 1369 12:23:20.535087  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1370 12:23:20.538366  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1371 12:23:20.548462  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1372 12:23:20.558185  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1373 12:23:20.567800  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem

 1374 12:23:20.571124  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1375 12:23:20.577605  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64

 1376 12:23:20.587542  PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64

 1377 12:23:20.591019  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1378 12:23:20.600844  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64

 1379 12:23:20.604356  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1380 12:23:20.610712  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1381 12:23:20.617457  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64

 1382 12:23:20.620551  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1383 12:23:20.627425  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1384 12:23:20.630634  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1385 12:23:20.637069  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1386 12:23:20.640461  LPC: Trying to open IO window from 800 size 1ff

 1387 12:23:20.650395  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64

 1388 12:23:20.656929  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64

 1389 12:23:20.667331  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem

 1390 12:23:20.670115  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1391 12:23:20.676456  Root Device assign_resources, bus 0 link: 0

 1392 12:23:20.676536  Done setting resources.

 1393 12:23:20.683601  Show resources in subtree (Root Device)...After assigning values.

 1394 12:23:20.689716   Root Device child on link 0 DOMAIN: 0000

 1395 12:23:20.692651    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1396 12:23:20.703380    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1397 12:23:20.713053    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1398 12:23:20.713166     PCI: 00:00.0

 1399 12:23:20.722786     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1400 12:23:20.732633     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1401 12:23:20.742411     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1402 12:23:20.752841     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1403 12:23:20.762575     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1404 12:23:20.768981     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1405 12:23:20.778788     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1406 12:23:20.789074     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1407 12:23:20.798793     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1408 12:23:20.808914     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1409 12:23:20.819037     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1410 12:23:20.825201     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1411 12:23:20.835239     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1412 12:23:20.844797     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1413 12:23:20.854876     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1414 12:23:20.864328     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1415 12:23:20.874378     PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1416 12:23:20.884431     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1417 12:23:20.890966     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1418 12:23:20.900650     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1419 12:23:20.904227     PCI: 00:02.0

 1420 12:23:20.913689     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10

 1421 12:23:20.923440     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18

 1422 12:23:20.933500     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1423 12:23:20.939928     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1424 12:23:20.949854     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10

 1425 12:23:20.949961      GENERIC: 0.0

 1426 12:23:20.953300     PCI: 00:05.0

 1427 12:23:20.963175     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10

 1428 12:23:20.966628     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1429 12:23:20.969711      GENERIC: 0.0

 1430 12:23:20.969798     PCI: 00:08.0

 1431 12:23:20.982407     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10

 1432 12:23:20.982520     PCI: 00:0a.0

 1433 12:23:20.985905     PCI: 00:0d.0 child on link 0 USB0 port 0

 1434 12:23:20.999505     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10

 1435 12:23:21.002210      USB0 port 0 child on link 0 USB3 port 0

 1436 12:23:21.002302       USB3 port 0

 1437 12:23:21.005710       USB3 port 1

 1438 12:23:21.009317       USB3 port 2

 1439 12:23:21.009398       USB3 port 3

 1440 12:23:21.012560     PCI: 00:14.0 child on link 0 USB0 port 0

 1441 12:23:21.025638     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10

 1442 12:23:21.028729      USB0 port 0 child on link 0 USB2 port 0

 1443 12:23:21.028844       USB2 port 0

 1444 12:23:21.032378       USB2 port 1

 1445 12:23:21.035571       USB2 port 2

 1446 12:23:21.035653       USB2 port 3

 1447 12:23:21.038644       USB2 port 4

 1448 12:23:21.038725       USB2 port 5

 1449 12:23:21.041950       USB2 port 6

 1450 12:23:21.042031       USB2 port 7

 1451 12:23:21.045138       USB2 port 8

 1452 12:23:21.045223       USB2 port 9

 1453 12:23:21.048306       USB3 port 0

 1454 12:23:21.048390       USB3 port 1

 1455 12:23:21.051936       USB3 port 2

 1456 12:23:21.052019       USB3 port 3

 1457 12:23:21.054969     PCI: 00:14.2

 1458 12:23:21.064876     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10

 1459 12:23:21.075175     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18

 1460 12:23:21.081330     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1461 12:23:21.091490     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10

 1462 12:23:21.091595      GENERIC: 0.0

 1463 12:23:21.098351     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1464 12:23:21.107661     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10

 1465 12:23:21.107785      I2C: 00:1a

 1466 12:23:21.111068      I2C: 00:31

 1467 12:23:21.111148      I2C: 00:32

 1468 12:23:21.114234     PCI: 00:15.1 child on link 0 I2C: 00:10

 1469 12:23:21.127876     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10

 1470 12:23:21.127976      I2C: 00:10

 1471 12:23:21.130763     PCI: 00:15.2

 1472 12:23:21.140778     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10

 1473 12:23:21.140914     PCI: 00:15.3

 1474 12:23:21.150738     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10

 1475 12:23:21.153720     PCI: 00:16.0

 1476 12:23:21.164031     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10

 1477 12:23:21.167703     PCI: 00:19.0

 1478 12:23:21.170342     PCI: 00:19.1 child on link 0 I2C: 00:15

 1479 12:23:21.180300     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10

 1480 12:23:21.180763      I2C: 00:15

 1481 12:23:21.187717     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1482 12:23:21.197556     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1483 12:23:21.206770     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1484 12:23:21.217009     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20

 1485 12:23:21.220107      GENERIC: 0.0

 1486 12:23:21.220523      PCI: 01:00.0

 1487 12:23:21.233158      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10

 1488 12:23:21.243561      PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20

 1489 12:23:21.244100     PCI: 00:1e.0

 1490 12:23:21.256060     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1491 12:23:21.259706     PCI: 00:1e.2 child on link 0 SPI: 00

 1492 12:23:21.269452     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10

 1493 12:23:21.269948      SPI: 00

 1494 12:23:21.276053     PCI: 00:1e.3 child on link 0 SPI: 00

 1495 12:23:21.286245     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10

 1496 12:23:21.286770      SPI: 00

 1497 12:23:21.289067     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1498 12:23:21.298782     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1499 12:23:21.302028      PNP: 0c09.0

 1500 12:23:21.308848      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1501 12:23:21.315555     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1502 12:23:21.322050     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1503 12:23:21.331860     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1504 12:23:21.338763      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1505 12:23:21.339192       GENERIC: 0.0

 1506 12:23:21.342206       GENERIC: 1.0

 1507 12:23:21.342622     PCI: 00:1f.3

 1508 12:23:21.351653     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10

 1509 12:23:21.364832     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20

 1510 12:23:21.365262     PCI: 00:1f.5

 1511 12:23:21.374899     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10

 1512 12:23:21.381651    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1513 12:23:21.382169     APIC: 00

 1514 12:23:21.382505     APIC: 01

 1515 12:23:21.384865     APIC: 03

 1516 12:23:21.385385     APIC: 07

 1517 12:23:21.385719     APIC: 05

 1518 12:23:21.388402     APIC: 04

 1519 12:23:21.388853     APIC: 02

 1520 12:23:21.391093     APIC: 06

 1521 12:23:21.391509  Done allocating resources.

 1522 12:23:21.397792  BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms

 1523 12:23:21.404484  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

 1524 12:23:21.407997  Configure GPIOs for I2S audio on UP4.

 1525 12:23:21.414487  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms

 1526 12:23:21.418042  Enabling resources...

 1527 12:23:21.421473  PCI: 00:00.0 subsystem <- 8086/9a12

 1528 12:23:21.424614  PCI: 00:00.0 cmd <- 06

 1529 12:23:21.427644  PCI: 00:02.0 subsystem <- 8086/9a40

 1530 12:23:21.431683  PCI: 00:02.0 cmd <- 03

 1531 12:23:21.434548  PCI: 00:04.0 subsystem <- 8086/9a03

 1532 12:23:21.437802  PCI: 00:04.0 cmd <- 02

 1533 12:23:21.440861  PCI: 00:05.0 subsystem <- 8086/9a19

 1534 12:23:21.444465  PCI: 00:05.0 cmd <- 02

 1535 12:23:21.447239  PCI: 00:08.0 subsystem <- 8086/9a11

 1536 12:23:21.447657  PCI: 00:08.0 cmd <- 06

 1537 12:23:21.453965  PCI: 00:0d.0 subsystem <- 8086/9a13

 1538 12:23:21.454456  PCI: 00:0d.0 cmd <- 02

 1539 12:23:21.457437  PCI: 00:14.0 subsystem <- 8086/a0ed

 1540 12:23:21.460803  PCI: 00:14.0 cmd <- 02

 1541 12:23:21.463689  PCI: 00:14.2 subsystem <- 8086/a0ef

 1542 12:23:21.467369  PCI: 00:14.2 cmd <- 02

 1543 12:23:21.470136  PCI: 00:14.3 subsystem <- 8086/a0f0

 1544 12:23:21.473846  PCI: 00:14.3 cmd <- 02

 1545 12:23:21.476751  PCI: 00:15.0 subsystem <- 8086/a0e8

 1546 12:23:21.479887  PCI: 00:15.0 cmd <- 02

 1547 12:23:21.483530  PCI: 00:15.1 subsystem <- 8086/a0e9

 1548 12:23:21.486946  PCI: 00:15.1 cmd <- 02

 1549 12:23:21.489784  PCI: 00:15.2 subsystem <- 8086/a0ea

 1550 12:23:21.493387  PCI: 00:15.2 cmd <- 02

 1551 12:23:21.496792  PCI: 00:15.3 subsystem <- 8086/a0eb

 1552 12:23:21.499895  PCI: 00:15.3 cmd <- 02

 1553 12:23:21.502954  PCI: 00:16.0 subsystem <- 8086/a0e0

 1554 12:23:21.503376  PCI: 00:16.0 cmd <- 02

 1555 12:23:21.510256  PCI: 00:19.1 subsystem <- 8086/a0c6

 1556 12:23:21.510781  PCI: 00:19.1 cmd <- 02

 1557 12:23:21.513001  PCI: 00:1d.0 bridge ctrl <- 0013

 1558 12:23:21.516769  PCI: 00:1d.0 subsystem <- 8086/a0b0

 1559 12:23:21.519832  PCI: 00:1d.0 cmd <- 06

 1560 12:23:21.523211  PCI: 00:1e.0 subsystem <- 8086/a0a8

 1561 12:23:21.526224  PCI: 00:1e.0 cmd <- 06

 1562 12:23:21.529437  PCI: 00:1e.2 subsystem <- 8086/a0aa

 1563 12:23:21.532999  PCI: 00:1e.2 cmd <- 06

 1564 12:23:21.536029  PCI: 00:1e.3 subsystem <- 8086/a0ab

 1565 12:23:21.540000  PCI: 00:1e.3 cmd <- 02

 1566 12:23:21.542907  PCI: 00:1f.0 subsystem <- 8086/a087

 1567 12:23:21.546026  PCI: 00:1f.0 cmd <- 407

 1568 12:23:21.549546  PCI: 00:1f.3 subsystem <- 8086/a0c8

 1569 12:23:21.552647  PCI: 00:1f.3 cmd <- 02

 1570 12:23:21.556030  PCI: 00:1f.5 subsystem <- 8086/a0a4

 1571 12:23:21.558873  PCI: 00:1f.5 cmd <- 406

 1572 12:23:21.562427  PCI: 01:00.0 cmd <- 02

 1573 12:23:21.566664  done.

 1574 12:23:21.570066  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms

 1575 12:23:21.573039  Initializing devices...

 1576 12:23:21.576973  Root Device init

 1577 12:23:21.579810  Chrome EC: Set SMI mask to 0x0000000000000000

 1578 12:23:21.586258  Chrome EC: clear events_b mask to 0x0000000000000000

 1579 12:23:21.593121  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1580 12:23:21.599054  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e

 1581 12:23:21.602420  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e

 1582 12:23:21.608824  Chrome EC: Set WAKE mask to 0x0000000000000000

 1583 12:23:21.612280  fw_config match found: DB_USB=USB3_ACTIVE

 1584 12:23:21.619553  Configure Right Type-C port orientation for retimer

 1585 12:23:21.622868  Root Device init finished in 42 msecs

 1586 12:23:21.625447  PCI: 00:00.0 init

 1587 12:23:21.628611  CPU TDP = 9 Watts

 1588 12:23:21.629073  CPU PL1 = 9 Watts

 1589 12:23:21.632108  CPU PL2 = 40 Watts

 1590 12:23:21.632523  CPU PL4 = 83 Watts

 1591 12:23:21.638734  PCI: 00:00.0 init finished in 8 msecs

 1592 12:23:21.639227  PCI: 00:02.0 init

 1593 12:23:21.641631  GMA: Found VBT in CBFS

 1594 12:23:21.644982  GMA: Found valid VBT in CBFS

 1595 12:23:21.651582  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1596 12:23:21.658258                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000

 1597 12:23:21.661612  PCI: 00:02.0 init finished in 18 msecs

 1598 12:23:21.664814  PCI: 00:05.0 init

 1599 12:23:21.667946  PCI: 00:05.0 init finished in 0 msecs

 1600 12:23:21.671216  PCI: 00:08.0 init

 1601 12:23:21.674897  PCI: 00:08.0 init finished in 0 msecs

 1602 12:23:21.678188  PCI: 00:14.0 init

 1603 12:23:21.681424  PCI: 00:14.0 init finished in 0 msecs

 1604 12:23:21.684606  PCI: 00:14.2 init

 1605 12:23:21.688110  PCI: 00:14.2 init finished in 0 msecs

 1606 12:23:21.691369  PCI: 00:15.0 init

 1607 12:23:21.691913  I2C bus 0 version 0x3230302a

 1608 12:23:21.697910  DW I2C bus 0 at 0x7fe4e000 (400 KHz)

 1609 12:23:21.701217  PCI: 00:15.0 init finished in 6 msecs

 1610 12:23:21.701667  PCI: 00:15.1 init

 1611 12:23:21.704102  I2C bus 1 version 0x3230302a

 1612 12:23:21.707487  DW I2C bus 1 at 0x7fe4f000 (400 KHz)

 1613 12:23:21.714662  PCI: 00:15.1 init finished in 6 msecs

 1614 12:23:21.715159  PCI: 00:15.2 init

 1615 12:23:21.717527  I2C bus 2 version 0x3230302a

 1616 12:23:21.721062  DW I2C bus 2 at 0x7fe50000 (400 KHz)

 1617 12:23:21.723950  PCI: 00:15.2 init finished in 6 msecs

 1618 12:23:21.727620  PCI: 00:15.3 init

 1619 12:23:21.730773  I2C bus 3 version 0x3230302a

 1620 12:23:21.734174  DW I2C bus 3 at 0x7fe51000 (400 KHz)

 1621 12:23:21.737352  PCI: 00:15.3 init finished in 6 msecs

 1622 12:23:21.740368  PCI: 00:16.0 init

 1623 12:23:21.743965  PCI: 00:16.0 init finished in 0 msecs

 1624 12:23:21.747232  PCI: 00:19.1 init

 1625 12:23:21.750590  I2C bus 5 version 0x3230302a

 1626 12:23:21.753622  DW I2C bus 5 at 0x7fe53000 (400 KHz)

 1627 12:23:21.756779  PCI: 00:19.1 init finished in 6 msecs

 1628 12:23:21.760347  PCI: 00:1d.0 init

 1629 12:23:21.763608  Initializing PCH PCIe bridge.

 1630 12:23:21.766483  PCI: 00:1d.0 init finished in 3 msecs

 1631 12:23:21.769835  PCI: 00:1f.0 init

 1632 12:23:21.773282  IOAPIC: Initializing IOAPIC at 0xfec00000

 1633 12:23:21.776912  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1634 12:23:21.780289  IOAPIC: ID = 0x02

 1635 12:23:21.783789  IOAPIC: Dumping registers

 1636 12:23:21.784297    reg 0x0000: 0x02000000

 1637 12:23:21.787360    reg 0x0001: 0x00770020

 1638 12:23:21.790404    reg 0x0002: 0x00000000

 1639 12:23:21.793116  PCI: 00:1f.0 init finished in 21 msecs

 1640 12:23:21.796872  PCI: 00:1f.2 init

 1641 12:23:21.800270  Disabling ACPI via APMC.

 1642 12:23:21.803180  APMC done.

 1643 12:23:21.806322  PCI: 00:1f.2 init finished in 6 msecs

 1644 12:23:21.818556  PCI: 01:00.0 init

 1645 12:23:21.822420  PCI: 01:00.0 init finished in 0 msecs

 1646 12:23:21.824867  PNP: 0c09.0 init

 1647 12:23:21.832016  Google Chrome EC uptime: 8.257 seconds

 1648 12:23:21.835171  Google Chrome AP resets since EC boot: 1

 1649 12:23:21.838749  Google Chrome most recent AP reset causes:

 1650 12:23:21.841382  	0.451: 32775 shutdown: entering G3

 1651 12:23:21.848403  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

 1652 12:23:21.851886  PNP: 0c09.0 init finished in 23 msecs

 1653 12:23:21.858424  Devices initialized

 1654 12:23:21.861798  Show all devs... After init.

 1655 12:23:21.864871  Root Device: enabled 1

 1656 12:23:21.865385  DOMAIN: 0000: enabled 1

 1657 12:23:21.868560  CPU_CLUSTER: 0: enabled 1

 1658 12:23:21.871656  PCI: 00:00.0: enabled 1

 1659 12:23:21.875208  PCI: 00:02.0: enabled 1

 1660 12:23:21.875726  PCI: 00:04.0: enabled 1

 1661 12:23:21.878316  PCI: 00:05.0: enabled 1

 1662 12:23:21.881471  PCI: 00:06.0: enabled 0

 1663 12:23:21.884229  PCI: 00:07.0: enabled 0

 1664 12:23:21.884641  PCI: 00:07.1: enabled 0

 1665 12:23:21.888419  PCI: 00:07.2: enabled 0

 1666 12:23:21.891803  PCI: 00:07.3: enabled 0

 1667 12:23:21.894521  PCI: 00:08.0: enabled 1

 1668 12:23:21.894935  PCI: 00:09.0: enabled 0

 1669 12:23:21.898239  PCI: 00:0a.0: enabled 0

 1670 12:23:21.900962  PCI: 00:0d.0: enabled 1

 1671 12:23:21.904380  PCI: 00:0d.1: enabled 0

 1672 12:23:21.904821  PCI: 00:0d.2: enabled 0

 1673 12:23:21.908097  PCI: 00:0d.3: enabled 0

 1674 12:23:21.911077  PCI: 00:0e.0: enabled 0

 1675 12:23:21.914560  PCI: 00:10.2: enabled 1

 1676 12:23:21.914973  PCI: 00:10.6: enabled 0

 1677 12:23:21.917387  PCI: 00:10.7: enabled 0

 1678 12:23:21.921101  PCI: 00:12.0: enabled 0

 1679 12:23:21.924657  PCI: 00:12.6: enabled 0

 1680 12:23:21.925214  PCI: 00:13.0: enabled 0

 1681 12:23:21.928232  PCI: 00:14.0: enabled 1

 1682 12:23:21.930606  PCI: 00:14.1: enabled 0

 1683 12:23:21.934549  PCI: 00:14.2: enabled 1

 1684 12:23:21.935060  PCI: 00:14.3: enabled 1

 1685 12:23:21.937285  PCI: 00:15.0: enabled 1

 1686 12:23:21.940441  PCI: 00:15.1: enabled 1

 1687 12:23:21.943775  PCI: 00:15.2: enabled 1

 1688 12:23:21.944187  PCI: 00:15.3: enabled 1

 1689 12:23:21.947060  PCI: 00:16.0: enabled 1

 1690 12:23:21.950364  PCI: 00:16.1: enabled 0

 1691 12:23:21.950777  PCI: 00:16.2: enabled 0

 1692 12:23:21.953868  PCI: 00:16.3: enabled 0

 1693 12:23:21.956666  PCI: 00:16.4: enabled 0

 1694 12:23:21.960318  PCI: 00:16.5: enabled 0

 1695 12:23:21.960770  PCI: 00:17.0: enabled 0

 1696 12:23:21.963239  PCI: 00:19.0: enabled 0

 1697 12:23:21.966906  PCI: 00:19.1: enabled 1

 1698 12:23:21.970244  PCI: 00:19.2: enabled 0

 1699 12:23:21.970658  PCI: 00:1c.0: enabled 1

 1700 12:23:21.973885  PCI: 00:1c.1: enabled 0

 1701 12:23:21.976923  PCI: 00:1c.2: enabled 0

 1702 12:23:21.980025  PCI: 00:1c.3: enabled 0

 1703 12:23:21.980436  PCI: 00:1c.4: enabled 0

 1704 12:23:21.983623  PCI: 00:1c.5: enabled 0

 1705 12:23:21.986707  PCI: 00:1c.6: enabled 1

 1706 12:23:21.990032  PCI: 00:1c.7: enabled 0

 1707 12:23:21.990328  PCI: 00:1d.0: enabled 1

 1708 12:23:21.992877  PCI: 00:1d.1: enabled 0

 1709 12:23:21.996279  PCI: 00:1d.2: enabled 1

 1710 12:23:21.999508  PCI: 00:1d.3: enabled 0

 1711 12:23:21.999686  PCI: 00:1e.0: enabled 1

 1712 12:23:22.002992  PCI: 00:1e.1: enabled 0

 1713 12:23:22.006016  PCI: 00:1e.2: enabled 1

 1714 12:23:22.009566  PCI: 00:1e.3: enabled 1

 1715 12:23:22.009702  PCI: 00:1f.0: enabled 1

 1716 12:23:22.012601  PCI: 00:1f.1: enabled 0

 1717 12:23:22.015880  PCI: 00:1f.2: enabled 1

 1718 12:23:22.019138  PCI: 00:1f.3: enabled 1

 1719 12:23:22.019238  PCI: 00:1f.4: enabled 0

 1720 12:23:22.022696  PCI: 00:1f.5: enabled 1

 1721 12:23:22.025426  PCI: 00:1f.6: enabled 0

 1722 12:23:22.025517  PCI: 00:1f.7: enabled 0

 1723 12:23:22.029063  APIC: 00: enabled 1

 1724 12:23:22.031923  GENERIC: 0.0: enabled 1

 1725 12:23:22.035459  GENERIC: 0.0: enabled 1

 1726 12:23:22.035540  GENERIC: 1.0: enabled 1

 1727 12:23:22.039033  GENERIC: 0.0: enabled 1

 1728 12:23:22.042109  GENERIC: 1.0: enabled 1

 1729 12:23:22.045594  USB0 port 0: enabled 1

 1730 12:23:22.045702  GENERIC: 0.0: enabled 1

 1731 12:23:22.048560  USB0 port 0: enabled 1

 1732 12:23:22.051757  GENERIC: 0.0: enabled 1

 1733 12:23:22.051839  I2C: 00:1a: enabled 1

 1734 12:23:22.055341  I2C: 00:31: enabled 1

 1735 12:23:22.058342  I2C: 00:32: enabled 1

 1736 12:23:22.058423  I2C: 00:10: enabled 1

 1737 12:23:22.061823  I2C: 00:15: enabled 1

 1738 12:23:22.065202  GENERIC: 0.0: enabled 0

 1739 12:23:22.068287  GENERIC: 1.0: enabled 0

 1740 12:23:22.068368  GENERIC: 0.0: enabled 1

 1741 12:23:22.071667  SPI: 00: enabled 1

 1742 12:23:22.074818  SPI: 00: enabled 1

 1743 12:23:22.074905  PNP: 0c09.0: enabled 1

 1744 12:23:22.078110  GENERIC: 0.0: enabled 1

 1745 12:23:22.081451  USB3 port 0: enabled 1

 1746 12:23:22.081533  USB3 port 1: enabled 1

 1747 12:23:22.084679  USB3 port 2: enabled 0

 1748 12:23:22.088102  USB3 port 3: enabled 0

 1749 12:23:22.091898  USB2 port 0: enabled 0

 1750 12:23:22.091980  USB2 port 1: enabled 1

 1751 12:23:22.094764  USB2 port 2: enabled 1

 1752 12:23:22.098290  USB2 port 3: enabled 0

 1753 12:23:22.098371  USB2 port 4: enabled 1

 1754 12:23:22.101479  USB2 port 5: enabled 0

 1755 12:23:22.104864  USB2 port 6: enabled 0

 1756 12:23:22.107566  USB2 port 7: enabled 0

 1757 12:23:22.107651  USB2 port 8: enabled 0

 1758 12:23:22.111111  USB2 port 9: enabled 0

 1759 12:23:22.114309  USB3 port 0: enabled 0

 1760 12:23:22.114398  USB3 port 1: enabled 1

 1761 12:23:22.117668  USB3 port 2: enabled 0

 1762 12:23:22.121169  USB3 port 3: enabled 0

 1763 12:23:22.124612  GENERIC: 0.0: enabled 1

 1764 12:23:22.124740  GENERIC: 1.0: enabled 1

 1765 12:23:22.127818  APIC: 01: enabled 1

 1766 12:23:22.131093  APIC: 03: enabled 1

 1767 12:23:22.131174  APIC: 07: enabled 1

 1768 12:23:22.134096  APIC: 05: enabled 1

 1769 12:23:22.134181  APIC: 04: enabled 1

 1770 12:23:22.137599  APIC: 02: enabled 1

 1771 12:23:22.140572  APIC: 06: enabled 1

 1772 12:23:22.140678  PCI: 01:00.0: enabled 1

 1773 12:23:22.147776  BS: BS_DEV_INIT run times (exec / console): 31 / 540 ms

 1774 12:23:22.154105  FMAP: area RW_ELOG found @ f30000 (4096 bytes)

 1775 12:23:22.157114  ELOG: NV offset 0xf30000 size 0x1000

 1776 12:23:22.163699  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1777 12:23:22.170199  ELOG: Event(17) added with size 13 at 2023-11-08 12:23:20 UTC

 1778 12:23:22.176612  ELOG: Event(92) added with size 9 at 2023-11-08 12:23:20 UTC

 1779 12:23:22.183191  ELOG: Event(93) added with size 9 at 2023-11-08 12:23:20 UTC

 1780 12:23:22.190279  ELOG: Event(9E) added with size 10 at 2023-11-08 12:23:20 UTC

 1781 12:23:22.196690  ELOG: Event(9F) added with size 14 at 2023-11-08 12:23:20 UTC

 1782 12:23:22.199683  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms

 1783 12:23:22.206855  ELOG: Event(A1) added with size 10 at 2023-11-08 12:23:20 UTC

 1784 12:23:22.216290  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1785 12:23:22.223210  ELOG: Event(A0) added with size 9 at 2023-11-08 12:23:20 UTC

 1786 12:23:22.226443  elog_add_boot_reason: Logged dev mode boot

 1787 12:23:22.232836  BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms

 1788 12:23:22.232922  Finalize devices...

 1789 12:23:22.236131  Devices finalized

 1790 12:23:22.242452  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms

 1791 12:23:22.246153  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)

 1792 12:23:22.252571  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 1793 12:23:22.256121  ME: HFSTS1                      : 0x80030055

 1794 12:23:22.262773  ME: HFSTS2                      : 0x30280116

 1795 12:23:22.265534  ME: HFSTS3                      : 0x00000050

 1796 12:23:22.269263  ME: HFSTS4                      : 0x00004000

 1797 12:23:22.275590  ME: HFSTS5                      : 0x00000000

 1798 12:23:22.279135  ME: HFSTS6                      : 0x40400006

 1799 12:23:22.282048  ME: Manufacturing Mode          : YES

 1800 12:23:22.285554  ME: SPI Protection Mode Enabled : NO

 1801 12:23:22.288822  ME: FW Partition Table          : OK

 1802 12:23:22.295601  ME: Bringup Loader Failure      : NO

 1803 12:23:22.298483  ME: Firmware Init Complete      : NO

 1804 12:23:22.302116  ME: Boot Options Present        : NO

 1805 12:23:22.305274  ME: Update In Progress          : NO

 1806 12:23:22.308862  ME: D0i3 Support                : YES

 1807 12:23:22.311980  ME: Low Power State Enabled     : NO

 1808 12:23:22.315257  ME: CPU Replaced                : YES

 1809 12:23:22.322137  ME: CPU Replacement Valid       : YES

 1810 12:23:22.325407  ME: Current Working State       : 5

 1811 12:23:22.327986  ME: Current Operation State     : 1

 1812 12:23:22.331326  ME: Current Operation Mode      : 3

 1813 12:23:22.334607  ME: Error Code                  : 0

 1814 12:23:22.338110  ME: Enhanced Debug Mode         : NO

 1815 12:23:22.341510  ME: CPU Debug Disabled          : YES

 1816 12:23:22.344737  ME: TXT Support                 : NO

 1817 12:23:22.351178  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms

 1818 12:23:22.361134  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4

 1819 12:23:22.364391  CBFS: 'fallback/slic' not found.

 1820 12:23:22.367664  ACPI: Writing ACPI tables at 76b01000.

 1821 12:23:22.367777  ACPI:    * FACS

 1822 12:23:22.371491  ACPI:    * DSDT

 1823 12:23:22.374294  Ramoops buffer: 0x100000@0x76a00000.

 1824 12:23:22.377795  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

 1825 12:23:22.384357  FMAP: area RW_VPD found @ f35000 (8192 bytes)

 1826 12:23:22.387332  Google Chrome EC: version:

 1827 12:23:22.390917  	ro: voema_v2.0.10114-a447f03e46

 1828 12:23:22.394547  	rw: voema_v2.0.10114-a447f03e46

 1829 12:23:22.394633    running image: 2

 1830 12:23:22.400629  PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000

 1831 12:23:22.406154  ACPI:    * FADT

 1832 12:23:22.406244  SCI is IRQ9

 1833 12:23:22.412172  ACPI: added table 1/32, length now 40

 1834 12:23:22.412258  ACPI:     * SSDT

 1835 12:23:22.415800  Found 1 CPU(s) with 8 core(s) each.

 1836 12:23:22.422339  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2

 1837 12:23:22.425884  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 1838 12:23:22.428843  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 1839 12:23:22.435328  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a

 1840 12:23:22.438640  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 1841 12:23:22.444919  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 1842 12:23:22.448489  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10

 1843 12:23:22.454693  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 1844 12:23:22.461490  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)

 1845 12:23:22.467978  \_SB.PCI0.RP09: Added StorageD3Enable property

 1846 12:23:22.470864  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1847 12:23:22.474512  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 1848 12:23:22.481121  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 1849 12:23:22.484764  PS2K: Passing 80 keymaps to kernel

 1850 12:23:22.490636  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 1851 12:23:22.497181  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1

 1852 12:23:22.504597  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1

 1853 12:23:22.510785  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 1854 12:23:22.517591  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4

 1855 12:23:22.523889  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1

 1856 12:23:22.530206  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 1857 12:23:22.537231  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 1858 12:23:22.540047  ACPI: added table 2/32, length now 44

 1859 12:23:22.543307  ACPI:    * MCFG

 1860 12:23:22.547053  ACPI: added table 3/32, length now 48

 1861 12:23:22.547178  ACPI:    * TPM2

 1862 12:23:22.549911  TPM2 log created at 0x769f0000

 1863 12:23:22.553467  ACPI: added table 4/32, length now 52

 1864 12:23:22.556730  ACPI:    * MADT

 1865 12:23:22.556826  SCI is IRQ9

 1866 12:23:22.560194  ACPI: added table 5/32, length now 56

 1867 12:23:22.563262  current = 76b09850

 1868 12:23:22.566757  ACPI:    * DMAR

 1869 12:23:22.569711  ACPI: added table 6/32, length now 60

 1870 12:23:22.573226  ACPI: added table 7/32, length now 64

 1871 12:23:22.573309  ACPI:    * HPET

 1872 12:23:22.579943  ACPI: added table 8/32, length now 68

 1873 12:23:22.580027  ACPI: done.

 1874 12:23:22.583386  ACPI tables: 35216 bytes.

 1875 12:23:22.586412  smbios_write_tables: 769ef000

 1876 12:23:22.589952  EC returned error result code 3

 1877 12:23:22.593023  Couldn't obtain OEM name from CBI

 1878 12:23:22.596161  Create SMBIOS type 16

 1879 12:23:22.596246  Create SMBIOS type 17

 1880 12:23:22.599698  GENERIC: 0.0 (WIFI Device)

 1881 12:23:22.603034  SMBIOS tables: 1734 bytes.

 1882 12:23:22.605974  Writing table forward entry at 0x00000500

 1883 12:23:22.612761  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c

 1884 12:23:22.616156  Writing coreboot table at 0x76b25000

 1885 12:23:22.622517   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1886 12:23:22.625898   1. 0000000000001000-000000000009ffff: RAM

 1887 12:23:22.632254   2. 00000000000a0000-00000000000fffff: RESERVED

 1888 12:23:22.635722   3. 0000000000100000-00000000769eefff: RAM

 1889 12:23:22.642248   4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES

 1890 12:23:22.645669   5. 0000000076b98000-0000000076c09fff: RAMSTAGE

 1891 12:23:22.651900   6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES

 1892 12:23:22.658438   7. 0000000077000000-000000007fbfffff: RESERVED

 1893 12:23:22.662022   8. 00000000c0000000-00000000cfffffff: RESERVED

 1894 12:23:22.668898   9. 00000000f8000000-00000000f9ffffff: RESERVED

 1895 12:23:22.671722  10. 00000000fb000000-00000000fb000fff: RESERVED

 1896 12:23:22.675512  11. 00000000fe000000-00000000fe00ffff: RESERVED

 1897 12:23:22.681714  12. 00000000fed80000-00000000fed87fff: RESERVED

 1898 12:23:22.685203  13. 00000000fed90000-00000000fed92fff: RESERVED

 1899 12:23:22.692124  14. 00000000feda0000-00000000feda1fff: RESERVED

 1900 12:23:22.695011  15. 00000000fedc0000-00000000feddffff: RESERVED

 1901 12:23:22.701848  16. 0000000100000000-00000004803fffff: RAM

 1902 12:23:22.701935  Passing 4 GPIOs to payload:

 1903 12:23:22.708375              NAME |       PORT | POLARITY |     VALUE

 1904 12:23:22.714613               lid |  undefined |     high |      high

 1905 12:23:22.718112             power |  undefined |     high |       low

 1906 12:23:22.724554             oprom |  undefined |     high |       low

 1907 12:23:22.727566          EC in RW | 0x000000e5 |     high |      high

 1908 12:23:22.734577  Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e1d1

 1909 12:23:22.737922  coreboot table: 1576 bytes.

 1910 12:23:22.741303  IMD ROOT    0. 0x76fff000 0x00001000

 1911 12:23:22.747413  IMD SMALL   1. 0x76ffe000 0x00001000

 1912 12:23:22.750562  FSP MEMORY  2. 0x76c4e000 0x003b0000

 1913 12:23:22.754079  VPD         3. 0x76c4d000 0x00000367

 1914 12:23:22.757674  RO MCACHE   4. 0x76c4c000 0x00000fdc

 1915 12:23:22.760948  CONSOLE     5. 0x76c2c000 0x00020000

 1916 12:23:22.764004  FMAP        6. 0x76c2b000 0x00000578

 1917 12:23:22.767473  TIME STAMP  7. 0x76c2a000 0x00000910

 1918 12:23:22.770623  VBOOT WORK  8. 0x76c16000 0x00014000

 1919 12:23:22.777335  ROMSTG STCK 9. 0x76c15000 0x00001000

 1920 12:23:22.780189  AFTER CAR  10. 0x76c0a000 0x0000b000

 1921 12:23:22.783635  RAMSTAGE   11. 0x76b97000 0x00073000

 1922 12:23:22.786917  REFCODE    12. 0x76b42000 0x00055000

 1923 12:23:22.790565  SMM BACKUP 13. 0x76b32000 0x00010000

 1924 12:23:22.793584  4f444749   14. 0x76b30000 0x00002000

 1925 12:23:22.796716  EXT VBT15. 0x76b2d000 0x0000219f

 1926 12:23:22.800022  COREBOOT   16. 0x76b25000 0x00008000

 1927 12:23:22.806522  ACPI       17. 0x76b01000 0x00024000

 1928 12:23:22.810335  ACPI GNVS  18. 0x76b00000 0x00001000

 1929 12:23:22.813081  RAMOOPS    19. 0x76a00000 0x00100000

 1930 12:23:22.816582  TPM2 TCGLOG20. 0x769f0000 0x00010000

 1931 12:23:22.819863  SMBIOS     21. 0x769ef000 0x00000800

 1932 12:23:22.823279  IMD small region:

 1933 12:23:22.826689    IMD ROOT    0. 0x76ffec00 0x00000400

 1934 12:23:22.829589    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 1935 12:23:22.833217    POWER STATE 2. 0x76ffeb80 0x00000044

 1936 12:23:22.836495    ROMSTAGE    3. 0x76ffeb60 0x00000004

 1937 12:23:22.843066    MEM INFO    4. 0x76ffe980 0x000001e0

 1938 12:23:22.845929  BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms

 1939 12:23:22.849341  MTRR: Physical address space:

 1940 12:23:22.856222  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1941 12:23:22.862709  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1942 12:23:22.869079  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 1943 12:23:22.875882  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0

 1944 12:23:22.882231  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1

 1945 12:23:22.888558  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0

 1946 12:23:22.895646  0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6

 1947 12:23:22.898538  MTRR: Fixed MSR 0x250 0x0606060606060606

 1948 12:23:22.901966  MTRR: Fixed MSR 0x258 0x0606060606060606

 1949 12:23:22.905087  MTRR: Fixed MSR 0x259 0x0000000000000000

 1950 12:23:22.911523  MTRR: Fixed MSR 0x268 0x0606060606060606

 1951 12:23:22.915112  MTRR: Fixed MSR 0x269 0x0606060606060606

 1952 12:23:22.918026  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1953 12:23:22.921825  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1954 12:23:22.928478  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1955 12:23:22.931223  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1956 12:23:22.935005  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1957 12:23:22.937849  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1958 12:23:22.942799  call enable_fixed_mtrr()

 1959 12:23:22.946217  CPU physical address size: 39 bits

 1960 12:23:22.953121  MTRR: default type WB/UC MTRR counts: 6/7.

 1961 12:23:22.956264  MTRR: WB selected as default type.

 1962 12:23:22.963235  MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 1963 12:23:22.966108  MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 1964 12:23:22.972975  MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1

 1965 12:23:22.979543  MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0

 1966 12:23:22.986042  MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 1967 12:23:22.992417  MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0

 1968 12:23:22.995989  

 1969 12:23:22.996069  MTRR check

 1970 12:23:22.999713  Fixed MTRRs   : Enabled

 1971 12:23:22.999803  Variable MTRRs: Enabled

 1972 12:23:22.999883  

 1973 12:23:23.006238  MTRR: Fixed MSR 0x250 0x0606060606060606

 1974 12:23:23.009334  MTRR: Fixed MSR 0x258 0x0606060606060606

 1975 12:23:23.012765  MTRR: Fixed MSR 0x259 0x0000000000000000

 1976 12:23:23.015850  MTRR: Fixed MSR 0x268 0x0606060606060606

 1977 12:23:23.023203  MTRR: Fixed MSR 0x269 0x0606060606060606

 1978 12:23:23.025972  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1979 12:23:23.029295  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1980 12:23:23.032220  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1981 12:23:23.039316  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1982 12:23:23.042514  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1983 12:23:23.045822  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1984 12:23:23.053216  BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms

 1985 12:23:23.056287  call enable_fixed_mtrr()

 1986 12:23:23.059943  Checking cr50 for pending updates

 1987 12:23:23.063379  CPU physical address size: 39 bits

 1988 12:23:23.067342  MTRR: Fixed MSR 0x250 0x0606060606060606

 1989 12:23:23.070570  MTRR: Fixed MSR 0x250 0x0606060606060606

 1990 12:23:23.076992  MTRR: Fixed MSR 0x258 0x0606060606060606

 1991 12:23:23.080457  MTRR: Fixed MSR 0x259 0x0000000000000000

 1992 12:23:23.083517  MTRR: Fixed MSR 0x268 0x0606060606060606

 1993 12:23:23.087248  MTRR: Fixed MSR 0x269 0x0606060606060606

 1994 12:23:23.093444  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1995 12:23:23.097127  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1996 12:23:23.100200  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1997 12:23:23.103173  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1998 12:23:23.106729  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1999 12:23:23.113388  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2000 12:23:23.119818  MTRR: Fixed MSR 0x258 0x0606060606060606

 2001 12:23:23.123394  MTRR: Fixed MSR 0x259 0x0000000000000000

 2002 12:23:23.126392  MTRR: Fixed MSR 0x268 0x0606060606060606

 2003 12:23:23.129396  MTRR: Fixed MSR 0x269 0x0606060606060606

 2004 12:23:23.136071  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2005 12:23:23.139675  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2006 12:23:23.142542  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2007 12:23:23.146231  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2008 12:23:23.152515  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2009 12:23:23.155855  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2010 12:23:23.159402  call enable_fixed_mtrr()

 2011 12:23:23.162349  call enable_fixed_mtrr()

 2012 12:23:23.165859  MTRR: Fixed MSR 0x250 0x0606060606060606

 2013 12:23:23.168944  MTRR: Fixed MSR 0x250 0x0606060606060606

 2014 12:23:23.175489  MTRR: Fixed MSR 0x258 0x0606060606060606

 2015 12:23:23.178971  MTRR: Fixed MSR 0x259 0x0000000000000000

 2016 12:23:23.182483  MTRR: Fixed MSR 0x268 0x0606060606060606

 2017 12:23:23.185516  MTRR: Fixed MSR 0x269 0x0606060606060606

 2018 12:23:23.192131  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2019 12:23:23.195345  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2020 12:23:23.198879  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2021 12:23:23.202195  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2022 12:23:23.208527  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2023 12:23:23.211669  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2024 12:23:23.218635  MTRR: Fixed MSR 0x258 0x0606060606060606

 2025 12:23:23.218716  call enable_fixed_mtrr()

 2026 12:23:23.225336  MTRR: Fixed MSR 0x259 0x0000000000000000

 2027 12:23:23.228372  MTRR: Fixed MSR 0x268 0x0606060606060606

 2028 12:23:23.232085  MTRR: Fixed MSR 0x269 0x0606060606060606

 2029 12:23:23.234818  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2030 12:23:23.241540  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2031 12:23:23.245008  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2032 12:23:23.248088  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2033 12:23:23.251637  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2034 12:23:23.255037  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2035 12:23:23.261298  CPU physical address size: 39 bits

 2036 12:23:23.265435  call enable_fixed_mtrr()

 2037 12:23:23.268507  MTRR: Fixed MSR 0x250 0x0606060606060606

 2038 12:23:23.275415  MTRR: Fixed MSR 0x250 0x0606060606060606

 2039 12:23:23.278448  MTRR: Fixed MSR 0x258 0x0606060606060606

 2040 12:23:23.281937  MTRR: Fixed MSR 0x259 0x0000000000000000

 2041 12:23:23.285595  MTRR: Fixed MSR 0x268 0x0606060606060606

 2042 12:23:23.291768  MTRR: Fixed MSR 0x269 0x0606060606060606

 2043 12:23:23.295240  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2044 12:23:23.298311  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2045 12:23:23.301679  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2046 12:23:23.308143  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2047 12:23:23.311642  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2048 12:23:23.315063  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2049 12:23:23.322041  MTRR: Fixed MSR 0x258 0x0606060606060606

 2050 12:23:23.322123  call enable_fixed_mtrr()

 2051 12:23:23.328896  MTRR: Fixed MSR 0x259 0x0000000000000000

 2052 12:23:23.331978  MTRR: Fixed MSR 0x268 0x0606060606060606

 2053 12:23:23.335146  MTRR: Fixed MSR 0x269 0x0606060606060606

 2054 12:23:23.338622  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2055 12:23:23.345462  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2056 12:23:23.349054  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2057 12:23:23.351893  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2058 12:23:23.355406  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2059 12:23:23.361739  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2060 12:23:23.365129  CPU physical address size: 39 bits

 2061 12:23:23.369411  call enable_fixed_mtrr()

 2062 12:23:23.372845  CPU physical address size: 39 bits

 2063 12:23:23.377569  CPU physical address size: 39 bits

 2064 12:23:23.383948  CPU physical address size: 39 bits

 2065 12:23:23.387487  CPU physical address size: 39 bits

 2066 12:23:23.387567  Reading cr50 TPM mode

 2067 12:23:23.398345  BS: BS_PAYLOAD_LOAD entry times (exec / console): 333 / 6 ms

 2068 12:23:23.408299  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60

 2069 12:23:23.411389  Checking segment from ROM address 0xffc02b38

 2070 12:23:23.415063  Checking segment from ROM address 0xffc02b54

 2071 12:23:23.421316  Loading segment from ROM address 0xffc02b38

 2072 12:23:23.421424    code (compression=0)

 2073 12:23:23.431214    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64

 2074 12:23:23.440960  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64

 2075 12:23:23.441046  it's not compressed!

 2076 12:23:23.583080  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70

 2077 12:23:23.589465  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c

 2078 12:23:23.596612  Loading segment from ROM address 0xffc02b54

 2079 12:23:23.599541    Entry Point 0x30000000

 2080 12:23:23.599818  Loaded segments

 2081 12:23:23.606034  BS: BS_PAYLOAD_LOAD run times (exec / console): 137 / 63 ms

 2082 12:23:23.651626  Finalizing chipset.

 2083 12:23:23.655269  Finalizing SMM.

 2084 12:23:23.655789  APMC done.

 2085 12:23:23.660966  BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms

 2086 12:23:23.664805  mp_park_aps done after 0 msecs.

 2087 12:23:23.667915  Jumping to boot code at 0x30000000(0x76b25000)

 2088 12:23:23.677572  CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes

 2089 12:23:23.677990  

 2090 12:23:23.678312  

 2091 12:23:23.681283  

 2092 12:23:23.681655  Starting depthcharge on Voema...

 2093 12:23:23.682626  end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
 2094 12:23:23.683066  start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
 2095 12:23:23.683419  Setting prompt string to ['volteer:']
 2096 12:23:23.683762  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
 2097 12:23:23.684413  

 2098 12:23:23.690554  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2099 12:23:23.690934  

 2100 12:23:23.697277  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2101 12:23:23.697655  

 2102 12:23:23.703872  Looking for NVMe Controller 0x3005f220 @ 00:1d:00

 2103 12:23:23.704344  

 2104 12:23:23.707720  Failed to find eMMC card reader

 2105 12:23:23.708211  

 2106 12:23:23.710547  Wipe memory regions:

 2107 12:23:23.710922  

 2108 12:23:23.714217  	[0x00000000001000, 0x000000000a0000)

 2109 12:23:23.714594  

 2110 12:23:23.717555  	[0x00000000100000, 0x00000030000000)

 2111 12:23:23.751405  

 2112 12:23:23.754726  	[0x00000032662db0, 0x000000769ef000)

 2113 12:23:23.803863  

 2114 12:23:23.806718  	[0x00000100000000, 0x00000480400000)

 2115 12:23:24.451272  

 2116 12:23:24.454913  ec_init: CrosEC protocol v3 supported (256, 256)

 2117 12:23:24.886422  

 2118 12:23:24.886847  R8152: Initializing

 2119 12:23:24.887135  

 2120 12:23:24.890278  Version 6 (ocp_data = 5c30)

 2121 12:23:24.890636  

 2122 12:23:24.893358  R8152: Done initializing

 2123 12:23:24.893716  

 2124 12:23:24.896672  Adding net device

 2125 12:23:25.197983  

 2126 12:23:25.201580  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35

 2127 12:23:25.202232  

 2128 12:23:25.202808  

 2129 12:23:25.203402  

 2130 12:23:25.204930  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2132 12:23:25.306472  volteer: tftpboot 192.168.201.1 11967717/tftp-deploy-7a9rotvy/kernel/bzImage 11967717/tftp-deploy-7a9rotvy/kernel/cmdline 11967717/tftp-deploy-7a9rotvy/ramdisk/ramdisk.cpio.gz

 2133 12:23:25.306653  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2134 12:23:25.306751  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
 2135 12:23:25.310982  tftpboot 192.168.201.1 11967717/tftp-deploy-7a9rotvy/kernel/bzIploy-7a9rotvy/kernel/cmdline 11967717/tftp-deploy-7a9rotvy/ramdisk/ramdisk.cpio.gz

 2136 12:23:25.311076  

 2137 12:23:25.311145  Waiting for link

 2138 12:23:25.514250  

 2139 12:23:25.514627  done.

 2140 12:23:25.514900  

 2141 12:23:25.515138  MAC: 00:24:32:30:7d:ab

 2142 12:23:25.515382  

 2143 12:23:25.517342  Sending DHCP discover... done.

 2144 12:23:25.517660  

 2145 12:23:25.520229  Waiting for reply... done.

 2146 12:23:25.520549  

 2147 12:23:25.523575  Sending DHCP request... done.

 2148 12:23:25.523937  

 2149 12:23:25.549348  Waiting for reply... done.

 2150 12:23:25.549929  

 2151 12:23:25.550408  My ip is 192.168.201.20

 2152 12:23:25.550853  

 2153 12:23:25.555948  The DHCP server ip is 192.168.201.1

 2154 12:23:25.556448  

 2155 12:23:25.559038  TFTP server IP predefined by user: 192.168.201.1

 2156 12:23:25.559525  

 2157 12:23:25.565579  Bootfile predefined by user: 11967717/tftp-deploy-7a9rotvy/kernel/bzImage

 2158 12:23:25.565949  

 2159 12:23:25.568552  Sending tftp read request... done.

 2160 12:23:25.568855  

 2161 12:23:25.576206  Waiting for the transfer... 

 2162 12:23:25.576469  

 2163 12:23:26.116531  00000000 ################################################################

 2164 12:23:26.116671  

 2165 12:23:26.662612  00080000 ################################################################

 2166 12:23:26.662768  

 2167 12:23:27.226580  00100000 ################################################################

 2168 12:23:27.227246  

 2169 12:23:27.900825  00180000 ################################################################

 2170 12:23:27.901319  

 2171 12:23:28.542841  00200000 ################################################################

 2172 12:23:28.543239  

 2173 12:23:29.096199  00280000 ################################################################

 2174 12:23:29.096334  

 2175 12:23:29.639074  00300000 ################################################################

 2176 12:23:29.639214  

 2177 12:23:30.178887  00380000 ################################################################

 2178 12:23:30.179050  

 2179 12:23:30.710565  00400000 ################################################################

 2180 12:23:30.710717  

 2181 12:23:31.243706  00480000 ################################################################

 2182 12:23:31.243845  

 2183 12:23:31.770263  00500000 ################################################################

 2184 12:23:31.770397  

 2185 12:23:32.313781  00580000 ################################################################

 2186 12:23:32.313956  

 2187 12:23:32.857624  00600000 ################################################################

 2188 12:23:32.857804  

 2189 12:23:33.389846  00680000 ################################################################

 2190 12:23:33.390012  

 2191 12:23:33.937116  00700000 ################################################################

 2192 12:23:33.937285  

 2193 12:23:34.487113  00780000 ################################################################

 2194 12:23:34.487251  

 2195 12:23:35.032675  00800000 ################################################################

 2196 12:23:35.032822  

 2197 12:23:35.569671  00880000 ################################################################

 2198 12:23:35.569803  

 2199 12:23:36.121059  00900000 ################################################################

 2200 12:23:36.121218  

 2201 12:23:36.645477  00980000 ################################################################

 2202 12:23:36.645615  

 2203 12:23:37.194264  00a00000 ################################################################

 2204 12:23:37.194419  

 2205 12:23:37.737645  00a80000 ################################################################

 2206 12:23:37.737804  

 2207 12:23:37.775387  00b00000 ##### done.

 2208 12:23:37.775521  

 2209 12:23:37.778693  The bootfile was 11571200 bytes long.

 2210 12:23:37.778791  

 2211 12:23:37.782132  Sending tftp read request... done.

 2212 12:23:37.782247  

 2213 12:23:37.785092  Waiting for the transfer... 

 2214 12:23:37.785189  

 2215 12:23:38.297289  00000000 ################################################################

 2216 12:23:38.297459  

 2217 12:23:38.803958  00080000 ################################################################

 2218 12:23:38.804097  

 2219 12:23:39.318629  00100000 ################################################################

 2220 12:23:39.318761  

 2221 12:23:39.827915  00180000 ################################################################

 2222 12:23:39.828103  

 2223 12:23:40.338315  00200000 ################################################################

 2224 12:23:40.338448  

 2225 12:23:40.849670  00280000 ################################################################

 2226 12:23:40.849835  

 2227 12:23:41.363759  00300000 ################################################################

 2228 12:23:41.363895  

 2229 12:23:41.878339  00380000 ################################################################

 2230 12:23:41.878479  

 2231 12:23:42.390749  00400000 ################################################################

 2232 12:23:42.390886  

 2233 12:23:42.901904  00480000 ################################################################

 2234 12:23:42.902066  

 2235 12:23:43.419169  00500000 ################################################################

 2236 12:23:43.419347  

 2237 12:23:43.954818  00580000 ################################################################

 2238 12:23:43.954980  

 2239 12:23:44.530806  00600000 ################################################################

 2240 12:23:44.530984  

 2241 12:23:45.105748  00680000 ################################################################

 2242 12:23:45.105893  

 2243 12:23:45.641867  00700000 ################################################################

 2244 12:23:45.642038  

 2245 12:23:46.167071  00780000 ################################################################

 2246 12:23:46.167203  

 2247 12:23:46.702733  00800000 ################################################################

 2248 12:23:46.702870  

 2249 12:23:47.031148  00880000 ####################################### done.

 2250 12:23:47.031279  

 2251 12:23:47.034648  Sending tftp read request... done.

 2252 12:23:47.034739  

 2253 12:23:47.037976  Waiting for the transfer... 

 2254 12:23:47.038058  

 2255 12:23:47.038123  00000000 # done.

 2256 12:23:47.038186  

 2257 12:23:47.047847  Command line loaded dynamically from TFTP file: 11967717/tftp-deploy-7a9rotvy/kernel/cmdline

 2258 12:23:47.047933  

 2259 12:23:47.063650  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2260 12:23:47.068676  

 2261 12:23:47.071722  Shutting down all USB controllers.

 2262 12:23:47.071804  

 2263 12:23:47.071869  Removing current net device

 2264 12:23:47.071931  

 2265 12:23:47.075240  Finalizing coreboot

 2266 12:23:47.075322  

 2267 12:23:47.081449  Exiting depthcharge with code 4 at timestamp: 31982393

 2268 12:23:47.081531  

 2269 12:23:47.081596  

 2270 12:23:47.081670  Starting kernel ...

 2271 12:23:47.081772  

 2272 12:23:47.081837  

 2273 12:23:47.082214  end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
 2274 12:23:47.082309  start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
 2275 12:23:47.082384  Setting prompt string to ['Linux version [0-9]']
 2276 12:23:47.082453  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2277 12:23:47.082521  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2279 12:28:08.083188  end: 2.2.5 auto-login-action (duration 00:04:21) [common]
 2281 12:28:08.084173  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
 2283 12:28:08.084993  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2286 12:28:08.086267  end: 2 depthcharge-action (duration 00:05:00) [common]
 2288 12:28:08.087427  Cleaning after the job
 2289 12:28:08.087885  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11967717/tftp-deploy-7a9rotvy/ramdisk
 2290 12:28:08.089603  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11967717/tftp-deploy-7a9rotvy/kernel
 2291 12:28:08.091280  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11967717/tftp-deploy-7a9rotvy/modules
 2292 12:28:08.092078  start: 5.1 power-off (timeout 00:00:30) [common]
 2293 12:28:08.092233  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-13' '--port=1' '--command=off'
 2294 12:28:08.169600  >> Command sent successfully.

 2295 12:28:08.174428  Returned 0 in 0 seconds
 2296 12:28:08.275408  end: 5.1 power-off (duration 00:00:00) [common]
 2298 12:28:08.276995  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2299 12:28:08.278168  Listened to connection for namespace 'common' for up to 1s
 2300 12:28:09.278861  Finalising connection for namespace 'common'
 2301 12:28:09.279734  Disconnecting from shell: Finalise
 2302 12:28:09.280313  

 2303 12:28:09.381452  end: 5.2 read-feedback (duration 00:00:01) [common]
 2304 12:28:09.382024  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11967717
 2305 12:28:09.437353  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11967717
 2306 12:28:09.437558  JobError: Your job cannot terminate cleanly.