Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 12:23:28.126033 lava-dispatcher, installed at version: 2023.10
2 12:23:28.126216 start: 0 validate
3 12:23:28.126335 Start time: 2023-11-08 12:23:28.126328+00:00 (UTC)
4 12:23:28.126463 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:23:28.126598 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230623.0%2Famd64%2Frootfs.cpio.gz exists
6 12:23:28.416573 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:23:28.417336 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.297-cip104-63-ge7301d2e196ae%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:23:28.679171 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:23:28.679974 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.297-cip104-63-ge7301d2e196ae%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 12:23:33.190640 validate duration: 5.06
12 12:23:33.190965 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:23:33.191083 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:23:33.191174 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:23:33.191289 Not decompressing ramdisk as can be used compressed.
16 12:23:33.191369 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230623.0/amd64/rootfs.cpio.gz
17 12:23:33.191432 saving as /var/lib/lava/dispatcher/tmp/11967642/tftp-deploy-dj30bm7f/ramdisk/rootfs.cpio.gz
18 12:23:33.191494 total size: 35760064 (34 MB)
19 12:23:33.980572 progress 0 % (0 MB)
20 12:23:34.021937 progress 5 % (1 MB)
21 12:23:34.037884 progress 10 % (3 MB)
22 12:23:34.048996 progress 15 % (5 MB)
23 12:23:34.058448 progress 20 % (6 MB)
24 12:23:34.067210 progress 25 % (8 MB)
25 12:23:34.076152 progress 30 % (10 MB)
26 12:23:34.084967 progress 35 % (11 MB)
27 12:23:34.093791 progress 40 % (13 MB)
28 12:23:34.102611 progress 45 % (15 MB)
29 12:23:34.111235 progress 50 % (17 MB)
30 12:23:34.120173 progress 55 % (18 MB)
31 12:23:34.128941 progress 60 % (20 MB)
32 12:23:34.137868 progress 65 % (22 MB)
33 12:23:34.146613 progress 70 % (23 MB)
34 12:23:34.155502 progress 75 % (25 MB)
35 12:23:34.164513 progress 80 % (27 MB)
36 12:23:34.173379 progress 85 % (29 MB)
37 12:23:34.182261 progress 90 % (30 MB)
38 12:23:34.190933 progress 95 % (32 MB)
39 12:23:34.199594 progress 100 % (34 MB)
40 12:23:34.199742 34 MB downloaded in 1.01 s (33.82 MB/s)
41 12:23:34.199898 end: 1.1.1 http-download (duration 00:00:01) [common]
43 12:23:34.200136 end: 1.1 download-retry (duration 00:00:01) [common]
44 12:23:34.200222 start: 1.2 download-retry (timeout 00:09:59) [common]
45 12:23:34.200304 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 12:23:34.200436 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.297-cip104-63-ge7301d2e196ae/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 12:23:34.200505 saving as /var/lib/lava/dispatcher/tmp/11967642/tftp-deploy-dj30bm7f/kernel/bzImage
48 12:23:34.200564 total size: 11571200 (11 MB)
49 12:23:34.200625 No compression specified
50 12:23:34.201699 progress 0 % (0 MB)
51 12:23:34.204583 progress 5 % (0 MB)
52 12:23:34.207541 progress 10 % (1 MB)
53 12:23:34.210329 progress 15 % (1 MB)
54 12:23:34.213338 progress 20 % (2 MB)
55 12:23:34.216358 progress 25 % (2 MB)
56 12:23:34.219260 progress 30 % (3 MB)
57 12:23:34.222227 progress 35 % (3 MB)
58 12:23:34.225239 progress 40 % (4 MB)
59 12:23:34.228092 progress 45 % (4 MB)
60 12:23:34.231119 progress 50 % (5 MB)
61 12:23:34.234070 progress 55 % (6 MB)
62 12:23:34.236911 progress 60 % (6 MB)
63 12:23:34.239928 progress 65 % (7 MB)
64 12:23:34.242877 progress 70 % (7 MB)
65 12:23:34.245617 progress 75 % (8 MB)
66 12:23:34.248603 progress 80 % (8 MB)
67 12:23:34.251581 progress 85 % (9 MB)
68 12:23:34.254379 progress 90 % (9 MB)
69 12:23:34.257504 progress 95 % (10 MB)
70 12:23:34.260512 progress 100 % (11 MB)
71 12:23:34.260631 11 MB downloaded in 0.06 s (183.73 MB/s)
72 12:23:34.260779 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:23:34.261012 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:23:34.261099 start: 1.3 download-retry (timeout 00:09:59) [common]
76 12:23:34.261183 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 12:23:34.261314 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.297-cip104-63-ge7301d2e196ae/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 12:23:34.261384 saving as /var/lib/lava/dispatcher/tmp/11967642/tftp-deploy-dj30bm7f/modules/modules.tar
79 12:23:34.261448 total size: 483720 (0 MB)
80 12:23:34.261509 Using unxz to decompress xz
81 12:23:34.265181 progress 6 % (0 MB)
82 12:23:34.265555 progress 13 % (0 MB)
83 12:23:34.265785 progress 20 % (0 MB)
84 12:23:34.267228 progress 27 % (0 MB)
85 12:23:34.269241 progress 33 % (0 MB)
86 12:23:34.271191 progress 40 % (0 MB)
87 12:23:34.273166 progress 47 % (0 MB)
88 12:23:34.275137 progress 54 % (0 MB)
89 12:23:34.277186 progress 60 % (0 MB)
90 12:23:34.279208 progress 67 % (0 MB)
91 12:23:34.281182 progress 74 % (0 MB)
92 12:23:34.283194 progress 81 % (0 MB)
93 12:23:34.285063 progress 88 % (0 MB)
94 12:23:34.286899 progress 94 % (0 MB)
95 12:23:34.289214 progress 100 % (0 MB)
96 12:23:34.295516 0 MB downloaded in 0.03 s (13.54 MB/s)
97 12:23:34.295739 end: 1.3.1 http-download (duration 00:00:00) [common]
99 12:23:34.295990 end: 1.3 download-retry (duration 00:00:00) [common]
100 12:23:34.296081 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
101 12:23:34.296174 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
102 12:23:34.296254 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 12:23:34.296335 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
104 12:23:34.296545 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11967642/lava-overlay-1ja5g271
105 12:23:34.296671 makedir: /var/lib/lava/dispatcher/tmp/11967642/lava-overlay-1ja5g271/lava-11967642/bin
106 12:23:34.296770 makedir: /var/lib/lava/dispatcher/tmp/11967642/lava-overlay-1ja5g271/lava-11967642/tests
107 12:23:34.296864 makedir: /var/lib/lava/dispatcher/tmp/11967642/lava-overlay-1ja5g271/lava-11967642/results
108 12:23:34.296974 Creating /var/lib/lava/dispatcher/tmp/11967642/lava-overlay-1ja5g271/lava-11967642/bin/lava-add-keys
109 12:23:34.297113 Creating /var/lib/lava/dispatcher/tmp/11967642/lava-overlay-1ja5g271/lava-11967642/bin/lava-add-sources
110 12:23:34.297236 Creating /var/lib/lava/dispatcher/tmp/11967642/lava-overlay-1ja5g271/lava-11967642/bin/lava-background-process-start
111 12:23:34.297358 Creating /var/lib/lava/dispatcher/tmp/11967642/lava-overlay-1ja5g271/lava-11967642/bin/lava-background-process-stop
112 12:23:34.297477 Creating /var/lib/lava/dispatcher/tmp/11967642/lava-overlay-1ja5g271/lava-11967642/bin/lava-common-functions
113 12:23:34.297594 Creating /var/lib/lava/dispatcher/tmp/11967642/lava-overlay-1ja5g271/lava-11967642/bin/lava-echo-ipv4
114 12:23:34.297711 Creating /var/lib/lava/dispatcher/tmp/11967642/lava-overlay-1ja5g271/lava-11967642/bin/lava-install-packages
115 12:23:34.297829 Creating /var/lib/lava/dispatcher/tmp/11967642/lava-overlay-1ja5g271/lava-11967642/bin/lava-installed-packages
116 12:23:34.297944 Creating /var/lib/lava/dispatcher/tmp/11967642/lava-overlay-1ja5g271/lava-11967642/bin/lava-os-build
117 12:23:34.298064 Creating /var/lib/lava/dispatcher/tmp/11967642/lava-overlay-1ja5g271/lava-11967642/bin/lava-probe-channel
118 12:23:34.298180 Creating /var/lib/lava/dispatcher/tmp/11967642/lava-overlay-1ja5g271/lava-11967642/bin/lava-probe-ip
119 12:23:34.298296 Creating /var/lib/lava/dispatcher/tmp/11967642/lava-overlay-1ja5g271/lava-11967642/bin/lava-target-ip
120 12:23:34.298435 Creating /var/lib/lava/dispatcher/tmp/11967642/lava-overlay-1ja5g271/lava-11967642/bin/lava-target-mac
121 12:23:34.298563 Creating /var/lib/lava/dispatcher/tmp/11967642/lava-overlay-1ja5g271/lava-11967642/bin/lava-target-storage
122 12:23:34.298685 Creating /var/lib/lava/dispatcher/tmp/11967642/lava-overlay-1ja5g271/lava-11967642/bin/lava-test-case
123 12:23:34.298802 Creating /var/lib/lava/dispatcher/tmp/11967642/lava-overlay-1ja5g271/lava-11967642/bin/lava-test-event
124 12:23:34.298918 Creating /var/lib/lava/dispatcher/tmp/11967642/lava-overlay-1ja5g271/lava-11967642/bin/lava-test-feedback
125 12:23:34.299034 Creating /var/lib/lava/dispatcher/tmp/11967642/lava-overlay-1ja5g271/lava-11967642/bin/lava-test-raise
126 12:23:34.299152 Creating /var/lib/lava/dispatcher/tmp/11967642/lava-overlay-1ja5g271/lava-11967642/bin/lava-test-reference
127 12:23:34.299273 Creating /var/lib/lava/dispatcher/tmp/11967642/lava-overlay-1ja5g271/lava-11967642/bin/lava-test-runner
128 12:23:34.299390 Creating /var/lib/lava/dispatcher/tmp/11967642/lava-overlay-1ja5g271/lava-11967642/bin/lava-test-set
129 12:23:34.299508 Creating /var/lib/lava/dispatcher/tmp/11967642/lava-overlay-1ja5g271/lava-11967642/bin/lava-test-shell
130 12:23:34.299628 Updating /var/lib/lava/dispatcher/tmp/11967642/lava-overlay-1ja5g271/lava-11967642/bin/lava-install-packages (oe)
131 12:23:34.299773 Updating /var/lib/lava/dispatcher/tmp/11967642/lava-overlay-1ja5g271/lava-11967642/bin/lava-installed-packages (oe)
132 12:23:34.299888 Creating /var/lib/lava/dispatcher/tmp/11967642/lava-overlay-1ja5g271/lava-11967642/environment
133 12:23:34.299982 LAVA metadata
134 12:23:34.300054 - LAVA_JOB_ID=11967642
135 12:23:34.300117 - LAVA_DISPATCHER_IP=192.168.201.1
136 12:23:34.300213 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
137 12:23:34.300279 skipped lava-vland-overlay
138 12:23:34.300355 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 12:23:34.300432 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
140 12:23:34.300502 skipped lava-multinode-overlay
141 12:23:34.300575 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 12:23:34.300660 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
143 12:23:34.300732 Loading test definitions
144 12:23:34.300823 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
145 12:23:34.300899 Using /lava-11967642 at stage 0
146 12:23:34.301178 uuid=11967642_1.4.2.3.1 testdef=None
147 12:23:34.301267 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 12:23:34.301349 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
149 12:23:34.301829 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 12:23:34.302055 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
152 12:23:34.302673 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 12:23:34.302894 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
155 12:23:34.303457 runner path: /var/lib/lava/dispatcher/tmp/11967642/lava-overlay-1ja5g271/lava-11967642/0/tests/0_cros-ec test_uuid 11967642_1.4.2.3.1
156 12:23:34.303606 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 12:23:34.303806 Creating lava-test-runner.conf files
159 12:23:34.303869 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11967642/lava-overlay-1ja5g271/lava-11967642/0 for stage 0
160 12:23:34.303952 - 0_cros-ec
161 12:23:34.304046 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
162 12:23:34.304128 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
163 12:23:34.310483 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
164 12:23:34.310587 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
165 12:23:34.310671 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
166 12:23:34.310754 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
167 12:23:34.310836 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
168 12:23:35.259073 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
169 12:23:35.259432 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
170 12:23:35.259544 extracting modules file /var/lib/lava/dispatcher/tmp/11967642/tftp-deploy-dj30bm7f/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11967642/extract-overlay-ramdisk-ueay90zo/ramdisk
171 12:23:35.279576 end: 1.4.4 extract-modules (duration 00:00:00) [common]
172 12:23:35.279708 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
173 12:23:35.279798 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11967642/compress-overlay-a74kgpyk/overlay-1.4.2.4.tar.gz to ramdisk
174 12:23:35.279869 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11967642/compress-overlay-a74kgpyk/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11967642/extract-overlay-ramdisk-ueay90zo/ramdisk
175 12:23:35.285968 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
176 12:23:35.286079 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
177 12:23:35.286169 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
178 12:23:35.286256 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
179 12:23:35.286334 Building ramdisk /var/lib/lava/dispatcher/tmp/11967642/extract-overlay-ramdisk-ueay90zo/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11967642/extract-overlay-ramdisk-ueay90zo/ramdisk
180 12:23:35.786917 >> 188276 blocks
181 12:23:39.225980 rename /var/lib/lava/dispatcher/tmp/11967642/extract-overlay-ramdisk-ueay90zo/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11967642/tftp-deploy-dj30bm7f/ramdisk/ramdisk.cpio.gz
182 12:23:39.226393 end: 1.4.7 compress-ramdisk (duration 00:00:04) [common]
183 12:23:39.226544 start: 1.4.8 prepare-kernel (timeout 00:09:54) [common]
184 12:23:39.226636 start: 1.4.8.1 prepare-fit (timeout 00:09:54) [common]
185 12:23:39.226875 No mkimage arch provided, not using FIT.
186 12:23:39.226959 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
187 12:23:39.227039 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
188 12:23:39.227133 end: 1.4 prepare-tftp-overlay (duration 00:00:05) [common]
189 12:23:39.227219 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:54) [common]
190 12:23:39.227291 No LXC device requested
191 12:23:39.227363 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
192 12:23:39.227444 start: 1.6 deploy-device-env (timeout 00:09:54) [common]
193 12:23:39.227520 end: 1.6 deploy-device-env (duration 00:00:00) [common]
194 12:23:39.227632 Checking files for TFTP limit of 4294967296 bytes.
195 12:23:39.228031 end: 1 tftp-deploy (duration 00:00:06) [common]
196 12:23:39.228131 start: 2 depthcharge-action (timeout 00:05:00) [common]
197 12:23:39.228216 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
198 12:23:39.228331 substitutions:
199 12:23:39.228395 - {DTB}: None
200 12:23:39.228454 - {INITRD}: 11967642/tftp-deploy-dj30bm7f/ramdisk/ramdisk.cpio.gz
201 12:23:39.228509 - {KERNEL}: 11967642/tftp-deploy-dj30bm7f/kernel/bzImage
202 12:23:39.228563 - {LAVA_MAC}: None
203 12:23:39.228616 - {PRESEED_CONFIG}: None
204 12:23:39.228668 - {PRESEED_LOCAL}: None
205 12:23:39.228720 - {RAMDISK}: 11967642/tftp-deploy-dj30bm7f/ramdisk/ramdisk.cpio.gz
206 12:23:39.228772 - {ROOT_PART}: None
207 12:23:39.228823 - {ROOT}: None
208 12:23:39.228874 - {SERVER_IP}: 192.168.201.1
209 12:23:39.228925 - {TEE}: None
210 12:23:39.228977 Parsed boot commands:
211 12:23:39.229028 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
212 12:23:39.229190 Parsed boot commands: tftpboot 192.168.201.1 11967642/tftp-deploy-dj30bm7f/kernel/bzImage 11967642/tftp-deploy-dj30bm7f/kernel/cmdline 11967642/tftp-deploy-dj30bm7f/ramdisk/ramdisk.cpio.gz
213 12:23:39.229271 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
214 12:23:39.229348 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
215 12:23:39.229434 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
216 12:23:39.229516 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
217 12:23:39.229583 Not connected, no need to disconnect.
218 12:23:39.229654 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
219 12:23:39.229729 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
220 12:23:39.229790 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-1'
221 12:23:39.233158 Setting prompt string to ['lava-test: # ']
222 12:23:39.233462 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
223 12:23:39.233564 end: 2.2.1 reset-connection (duration 00:00:00) [common]
224 12:23:39.233659 start: 2.2.2 reset-device (timeout 00:05:00) [common]
225 12:23:39.233762 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
226 12:23:39.233962 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-1' '--port=1' '--command=reboot'
227 12:23:44.388308 >> Command sent successfully.
228 12:23:44.399333 Returned 0 in 5 seconds
229 12:23:44.500627 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
231 12:23:44.502130 end: 2.2.2 reset-device (duration 00:00:05) [common]
232 12:23:44.502705 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
233 12:23:44.503174 Setting prompt string to 'Starting depthcharge on Voema...'
234 12:23:44.503549 Changing prompt to 'Starting depthcharge on Voema...'
235 12:23:44.503935 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
236 12:23:44.505189 [Enter `^Ec?' for help]
237 12:23:46.096035
238 12:23:46.096627
239 12:23:46.106346 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
240 12:23:46.109369 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
241 12:23:46.115926 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
242 12:23:46.119505 CPU: AES supported, TXT NOT supported, VT supported
243 12:23:46.125963 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
244 12:23:46.129372 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
245 12:23:46.135852 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
246 12:23:46.139341 VBOOT: Loading verstage.
247 12:23:46.142359 FMAP: Found "FLASH" version 1.1 at 0x1804000.
248 12:23:46.149287 FMAP: base = 0x0 size = 0x2000000 #areas = 32
249 12:23:46.152450 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
250 12:23:46.163327 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
251 12:23:46.169670 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
252 12:23:46.170242
253 12:23:46.170674
254 12:23:46.182719 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
255 12:23:46.196597 Probing TPM: . done!
256 12:23:46.199921 TPM ready after 0 ms
257 12:23:46.203580 Connected to device vid:did:rid of 1ae0:0028:00
258 12:23:46.214758 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.153/cr50_v3.94_pp.113-620c9b9523
259 12:23:46.221533 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
260 12:23:46.225519 Initialized TPM device CR50 revision 0
261 12:23:46.279820 tlcl_send_startup: Startup return code is 0
262 12:23:46.280392 TPM: setup succeeded
263 12:23:46.295459 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
264 12:23:46.309692 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
265 12:23:46.322507 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
266 12:23:46.332599 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
267 12:23:46.336395 Chrome EC: UHEPI supported
268 12:23:46.340108 Phase 1
269 12:23:46.343252 FMAP: area GBB found @ 1805000 (458752 bytes)
270 12:23:46.350171 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
271 12:23:46.360011 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
272 12:23:46.366530 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
273 12:23:46.373449 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
274 12:23:46.376303 Recovery requested (1009000e)
275 12:23:46.380018 TPM: Extending digest for VBOOT: boot mode into PCR 0
276 12:23:46.391539 tlcl_extend: response is 0
277 12:23:46.398672 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
278 12:23:46.408290 tlcl_extend: response is 0
279 12:23:46.414713 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
280 12:23:46.421550 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
281 12:23:46.428219 BS: verstage times (exec / console): total (unknown) / 142 ms
282 12:23:46.428792
283 12:23:46.429161
284 12:23:46.441866 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
285 12:23:46.444859 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
286 12:23:46.451765 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
287 12:23:46.454918 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
288 12:23:46.458495 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
289 12:23:46.465028 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
290 12:23:46.468588 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
291 12:23:46.471538 TCO_STS: 0000 0000
292 12:23:46.475317 GEN_PMCON: d0015038 00002200
293 12:23:46.478537 GBLRST_CAUSE: 00000000 00000000
294 12:23:46.479047 HPR_CAUSE0: 00000000
295 12:23:46.481533 prev_sleep_state 5
296 12:23:46.485207 Boot Count incremented to 27477
297 12:23:46.491647 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
298 12:23:46.498511 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
299 12:23:46.505342 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
300 12:23:46.512242 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
301 12:23:46.515306 Chrome EC: UHEPI supported
302 12:23:46.521946 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
303 12:23:46.536356 Probing TPM: done!
304 12:23:46.541165 Connected to device vid:did:rid of 1ae0:0028:00
305 12:23:46.551107 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.153/cr50_v3.94_pp.113-620c9b9523
306 12:23:46.554261 Initialized TPM device CR50 revision 0
307 12:23:46.570113 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
308 12:23:46.576497 MRC: Hash idx 0x100b comparison successful.
309 12:23:46.580380 MRC cache found, size faa8
310 12:23:46.580871 bootmode is set to: 2
311 12:23:46.583572 SPD index = 0
312 12:23:46.590111 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
313 12:23:46.593667 SPD: module type is LPDDR4X
314 12:23:46.596464 SPD: module part number is MT53E512M64D4NW-046
315 12:23:46.603345 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
316 12:23:46.606749 SPD: device width 16 bits, bus width 16 bits
317 12:23:46.613499 SPD: module size is 1024 MB (per channel)
318 12:23:47.046876 CBMEM:
319 12:23:47.050279 IMD: root @ 0x76fff000 254 entries.
320 12:23:47.053483 IMD: root @ 0x76ffec00 62 entries.
321 12:23:47.056867 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
322 12:23:47.063239 FMAP: area RW_VPD found @ f35000 (8192 bytes)
323 12:23:47.066783 External stage cache:
324 12:23:47.070132 IMD: root @ 0x7b3ff000 254 entries.
325 12:23:47.073152 IMD: root @ 0x7b3fec00 62 entries.
326 12:23:47.088453 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
327 12:23:47.095060 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
328 12:23:47.101828 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
329 12:23:47.116798 MRC: 'RECOVERY_MRC_CACHE' does not need update.
330 12:23:47.121208 cse_lite: Skip switching to RW in the recovery path
331 12:23:47.123915 8 DIMMs found
332 12:23:47.124417 SMM Memory Map
333 12:23:47.127046 SMRAM : 0x7b000000 0x800000
334 12:23:47.130664 Subregion 0: 0x7b000000 0x200000
335 12:23:47.134039 Subregion 1: 0x7b200000 0x200000
336 12:23:47.137315 Subregion 2: 0x7b400000 0x400000
337 12:23:47.140726 top_of_ram = 0x77000000
338 12:23:47.143933 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
339 12:23:47.150727 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
340 12:23:47.157701 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
341 12:23:47.160844 MTRR Range: Start=ff000000 End=0 (Size 1000000)
342 12:23:47.167916 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
343 12:23:47.174064 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
344 12:23:47.185660 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
345 12:23:47.188913 Processing 211 relocs. Offset value of 0x74c0b000
346 12:23:47.198834 BS: romstage times (exec / console): total (unknown) / 277 ms
347 12:23:47.204824
348 12:23:47.205382
349 12:23:47.214729 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
350 12:23:47.218119 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
351 12:23:47.228618 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
352 12:23:47.234584 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
353 12:23:47.241515 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
354 12:23:47.247864 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
355 12:23:47.294765 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
356 12:23:47.301368 Processing 5008 relocs. Offset value of 0x75d98000
357 12:23:47.304729 BS: postcar times (exec / console): total (unknown) / 59 ms
358 12:23:47.308553
359 12:23:47.309119
360 12:23:47.318706 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
361 12:23:47.319287 Normal boot
362 12:23:47.321979 FW_CONFIG value is 0x804c02
363 12:23:47.325295 PCI: 00:07.0 disabled by fw_config
364 12:23:47.328586 PCI: 00:07.1 disabled by fw_config
365 12:23:47.332001 PCI: 00:0d.2 disabled by fw_config
366 12:23:47.338627 PCI: 00:1c.7 disabled by fw_config
367 12:23:47.341708 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
368 12:23:47.348460 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
369 12:23:47.351849 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
370 12:23:47.358719 GENERIC: 0.0 disabled by fw_config
371 12:23:47.362057 GENERIC: 1.0 disabled by fw_config
372 12:23:47.365427 fw_config match found: DB_USB=USB3_ACTIVE
373 12:23:47.368840 fw_config match found: DB_USB=USB3_ACTIVE
374 12:23:47.372395 fw_config match found: DB_USB=USB3_ACTIVE
375 12:23:47.378680 fw_config match found: DB_USB=USB3_ACTIVE
376 12:23:47.382129 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
377 12:23:47.388440 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
378 12:23:47.398729 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
379 12:23:47.405331 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
380 12:23:47.408722 microcode: sig=0x806c1 pf=0x80 revision=0x86
381 12:23:47.415125 microcode: Update skipped, already up-to-date
382 12:23:47.421837 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
383 12:23:47.449238 Detected 4 core, 8 thread CPU.
384 12:23:47.452899 Setting up SMI for CPU
385 12:23:47.456068 IED base = 0x7b400000
386 12:23:47.456642 IED size = 0x00400000
387 12:23:47.459166 Will perform SMM setup.
388 12:23:47.465834 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
389 12:23:47.472715 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
390 12:23:47.478883 Processing 16 relocs. Offset value of 0x00030000
391 12:23:47.482457 Attempting to start 7 APs
392 12:23:47.486652 Waiting for 10ms after sending INIT.
393 12:23:47.501422 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
394 12:23:47.502006 done.
395 12:23:47.504711 AP: slot 7 apic_id 5.
396 12:23:47.508372 AP: slot 4 apic_id 4.
397 12:23:47.508937 AP: slot 6 apic_id 6.
398 12:23:47.511755 AP: slot 3 apic_id 7.
399 12:23:47.514414 AP: slot 2 apic_id 3.
400 12:23:47.514891 AP: slot 5 apic_id 2.
401 12:23:47.521296 Waiting for 2nd SIPI to complete...done.
402 12:23:47.528026 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
403 12:23:47.534609 Processing 13 relocs. Offset value of 0x00038000
404 12:23:47.535158 Unable to locate Global NVS
405 12:23:47.544661 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
406 12:23:47.548217 Installing permanent SMM handler to 0x7b000000
407 12:23:47.554647 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
408 12:23:47.561534 Processing 794 relocs. Offset value of 0x7b010000
409 12:23:47.567957 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
410 12:23:47.574646 Processing 13 relocs. Offset value of 0x7b008000
411 12:23:47.581478 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
412 12:23:47.584798 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
413 12:23:47.591632 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
414 12:23:47.598342 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
415 12:23:47.605320 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
416 12:23:47.611485 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
417 12:23:47.615136 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
418 12:23:47.618555 Unable to locate Global NVS
419 12:23:47.624938 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
420 12:23:47.629293 Clearing SMI status registers
421 12:23:47.632690 SMI_STS: PM1
422 12:23:47.633259 PM1_STS: PWRBTN
423 12:23:47.642200 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
424 12:23:47.642780 In relocation handler: CPU 0
425 12:23:47.649170 New SMBASE=0x7b000000 IEDBASE=0x7b400000
426 12:23:47.652583 Writing SMRR. base = 0x7b000006, mask=0xff800c00
427 12:23:47.656012 Relocation complete.
428 12:23:47.662275 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
429 12:23:47.665820 In relocation handler: CPU 1
430 12:23:47.669151 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
431 12:23:47.672554 Relocation complete.
432 12:23:47.679057 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
433 12:23:47.682139 In relocation handler: CPU 3
434 12:23:47.685522 New SMBASE=0x7afff400 IEDBASE=0x7b400000
435 12:23:47.689274 Relocation complete.
436 12:23:47.695677 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
437 12:23:47.699327 In relocation handler: CPU 6
438 12:23:47.702429 New SMBASE=0x7affe800 IEDBASE=0x7b400000
439 12:23:47.706024 Writing SMRR. base = 0x7b000006, mask=0xff800c00
440 12:23:47.709299 Relocation complete.
441 12:23:47.716341 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
442 12:23:47.719513 In relocation handler: CPU 2
443 12:23:47.722931 New SMBASE=0x7afff800 IEDBASE=0x7b400000
444 12:23:47.726292 Relocation complete.
445 12:23:47.732518 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
446 12:23:47.735984 In relocation handler: CPU 5
447 12:23:47.739254 New SMBASE=0x7affec00 IEDBASE=0x7b400000
448 12:23:47.746154 Writing SMRR. base = 0x7b000006, mask=0xff800c00
449 12:23:47.746758 Relocation complete.
450 12:23:47.755997 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
451 12:23:47.759057 In relocation handler: CPU 4
452 12:23:47.762270 New SMBASE=0x7afff000 IEDBASE=0x7b400000
453 12:23:47.765633 Writing SMRR. base = 0x7b000006, mask=0xff800c00
454 12:23:47.769353 Relocation complete.
455 12:23:47.775598 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
456 12:23:47.779397 In relocation handler: CPU 7
457 12:23:47.783161 New SMBASE=0x7affe400 IEDBASE=0x7b400000
458 12:23:47.786619 Relocation complete.
459 12:23:47.787221 Initializing CPU #0
460 12:23:47.790100 CPU: vendor Intel device 806c1
461 12:23:47.793684 CPU: family 06, model 8c, stepping 01
462 12:23:47.797015 Clearing out pending MCEs
463 12:23:47.800631 Setting up local APIC...
464 12:23:47.801208 apic_id: 0x00 done.
465 12:23:47.803752 Turbo is available but hidden
466 12:23:47.807308 Turbo is available and visible
467 12:23:47.813435 microcode: Update skipped, already up-to-date
468 12:23:47.814001 CPU #0 initialized
469 12:23:47.816894 Initializing CPU #7
470 12:23:47.820317 Initializing CPU #4
471 12:23:47.820896 Initializing CPU #2
472 12:23:47.823700 Initializing CPU #5
473 12:23:47.827270 CPU: vendor Intel device 806c1
474 12:23:47.830590 CPU: family 06, model 8c, stepping 01
475 12:23:47.833589 CPU: vendor Intel device 806c1
476 12:23:47.837102 CPU: family 06, model 8c, stepping 01
477 12:23:47.840682 Initializing CPU #6
478 12:23:47.841262 Initializing CPU #3
479 12:23:47.843816 CPU: vendor Intel device 806c1
480 12:23:47.846789 CPU: family 06, model 8c, stepping 01
481 12:23:47.850368 CPU: vendor Intel device 806c1
482 12:23:47.853534 CPU: family 06, model 8c, stepping 01
483 12:23:47.857223 CPU: vendor Intel device 806c1
484 12:23:47.860383 CPU: family 06, model 8c, stepping 01
485 12:23:47.863773 CPU: vendor Intel device 806c1
486 12:23:47.870513 CPU: family 06, model 8c, stepping 01
487 12:23:47.870992 Clearing out pending MCEs
488 12:23:47.873914 Clearing out pending MCEs
489 12:23:47.877094 Setting up local APIC...
490 12:23:47.880355 Clearing out pending MCEs
491 12:23:47.880830 apic_id: 0x04 done.
492 12:23:47.883912 Clearing out pending MCEs
493 12:23:47.886858 Clearing out pending MCEs
494 12:23:47.890297 Setting up local APIC...
495 12:23:47.890680 Clearing out pending MCEs
496 12:23:47.893638 Setting up local APIC...
497 12:23:47.899890 microcode: Update skipped, already up-to-date
498 12:23:47.900084 Setting up local APIC...
499 12:23:47.903265 Setting up local APIC...
500 12:23:47.906423 Initializing CPU #1
501 12:23:47.906583 apic_id: 0x02 done.
502 12:23:47.910045 apic_id: 0x03 done.
503 12:23:47.913139 microcode: Update skipped, already up-to-date
504 12:23:47.919991 microcode: Update skipped, already up-to-date
505 12:23:47.920099 CPU #5 initialized
506 12:23:47.923117 CPU #2 initialized
507 12:23:47.926861 apic_id: 0x05 done.
508 12:23:47.926956 CPU #4 initialized
509 12:23:47.930110 microcode: Update skipped, already up-to-date
510 12:23:47.933466 apic_id: 0x07 done.
511 12:23:47.936698 Setting up local APIC...
512 12:23:47.936783 CPU #7 initialized
513 12:23:47.943326 microcode: Update skipped, already up-to-date
514 12:23:47.943415 apic_id: 0x06 done.
515 12:23:47.947089 CPU #3 initialized
516 12:23:47.950009 microcode: Update skipped, already up-to-date
517 12:23:47.953341 CPU: vendor Intel device 806c1
518 12:23:47.959944 CPU: family 06, model 8c, stepping 01
519 12:23:47.960063 Clearing out pending MCEs
520 12:23:47.963249 CPU #6 initialized
521 12:23:47.966376 Setting up local APIC...
522 12:23:47.966503 apic_id: 0x01 done.
523 12:23:47.973150 microcode: Update skipped, already up-to-date
524 12:23:47.973245 CPU #1 initialized
525 12:23:47.979660 bsp_do_flight_plan done after 455 msecs.
526 12:23:47.983384 CPU: frequency set to 4000 MHz
527 12:23:47.983487 Enabling SMIs.
528 12:23:47.989688 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 348 / 317 ms
529 12:23:48.005661 SATAXPCIE1 indicates PCIe NVMe is present
530 12:23:48.009458 Probing TPM: done!
531 12:23:48.012748 Connected to device vid:did:rid of 1ae0:0028:00
532 12:23:48.023282 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.153/cr50_v3.94_pp.113-620c9b9523
533 12:23:48.026378 Initialized TPM device CR50 revision 0
534 12:23:48.030152 Enabling S0i3.4
535 12:23:48.036502 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
536 12:23:48.040127 Found a VBT of 8704 bytes after decompression
537 12:23:48.046995 cse_lite: CSE RO boot. HybridStorageMode disabled
538 12:23:48.053200 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
539 12:23:48.129489 FSPS returned 0
540 12:23:48.132837 Executing Phase 1 of FspMultiPhaseSiInit
541 12:23:48.142334 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
542 12:23:48.145828 port C0 DISC req: usage 1 usb3 1 usb2 5
543 12:23:48.149026 Raw Buffer output 0 00000511
544 12:23:48.152021 Raw Buffer output 1 00000000
545 12:23:48.156470 pmc_send_ipc_cmd succeeded
546 12:23:48.162633 port C1 DISC req: usage 1 usb3 2 usb2 3
547 12:23:48.162736 Raw Buffer output 0 00000321
548 12:23:48.166070 Raw Buffer output 1 00000000
549 12:23:48.170185 pmc_send_ipc_cmd succeeded
550 12:23:48.175190 Detected 4 core, 8 thread CPU.
551 12:23:48.178781 Detected 4 core, 8 thread CPU.
552 12:23:48.412840 Display FSP Version Info HOB
553 12:23:48.416148 Reference Code - CPU = a.0.4c.31
554 12:23:48.419354 uCode Version = 0.0.0.86
555 12:23:48.422712 TXT ACM version = ff.ff.ff.ffff
556 12:23:48.425901 Reference Code - ME = a.0.4c.31
557 12:23:48.429399 MEBx version = 0.0.0.0
558 12:23:48.432747 ME Firmware Version = Consumer SKU
559 12:23:48.436318 Reference Code - PCH = a.0.4c.31
560 12:23:48.440129 PCH-CRID Status = Disabled
561 12:23:48.442786 PCH-CRID Original Value = ff.ff.ff.ffff
562 12:23:48.445978 PCH-CRID New Value = ff.ff.ff.ffff
563 12:23:48.449533 OPROM - RST - RAID = ff.ff.ff.ffff
564 12:23:48.452586 PCH Hsio Version = 4.0.0.0
565 12:23:48.456293 Reference Code - SA - System Agent = a.0.4c.31
566 12:23:48.459398 Reference Code - MRC = 2.0.0.1
567 12:23:48.463045 SA - PCIe Version = a.0.4c.31
568 12:23:48.466109 SA-CRID Status = Disabled
569 12:23:48.469600 SA-CRID Original Value = 0.0.0.1
570 12:23:48.472859 SA-CRID New Value = 0.0.0.1
571 12:23:48.475967 OPROM - VBIOS = ff.ff.ff.ffff
572 12:23:48.479422 IO Manageability Engine FW Version = 11.1.4.0
573 12:23:48.482562 PHY Build Version = 0.0.0.e0
574 12:23:48.486004 Thunderbolt(TM) FW Version = 0.0.0.0
575 12:23:48.492688 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
576 12:23:48.496082 ITSS IRQ Polarities Before:
577 12:23:48.496209 IPC0: 0xffffffff
578 12:23:48.499351 IPC1: 0xffffffff
579 12:23:48.499435 IPC2: 0xffffffff
580 12:23:48.502688 IPC3: 0xffffffff
581 12:23:48.506026 ITSS IRQ Polarities After:
582 12:23:48.506133 IPC0: 0xffffffff
583 12:23:48.509425 IPC1: 0xffffffff
584 12:23:48.509508 IPC2: 0xffffffff
585 12:23:48.512668 IPC3: 0xffffffff
586 12:23:48.516036 Found PCIe Root Port #9 at PCI: 00:1d.0.
587 12:23:48.529860 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
588 12:23:48.540129 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
589 12:23:48.553409 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
590 12:23:48.559889 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
591 12:23:48.560065 Enumerating buses...
592 12:23:48.566303 Show all devs... Before device enumeration.
593 12:23:48.566511 Root Device: enabled 1
594 12:23:48.569367 DOMAIN: 0000: enabled 1
595 12:23:48.572503 CPU_CLUSTER: 0: enabled 1
596 12:23:48.576265 PCI: 00:00.0: enabled 1
597 12:23:48.576422 PCI: 00:02.0: enabled 1
598 12:23:48.579405 PCI: 00:04.0: enabled 1
599 12:23:48.583052 PCI: 00:05.0: enabled 1
600 12:23:48.586085 PCI: 00:06.0: enabled 0
601 12:23:48.586296 PCI: 00:07.0: enabled 0
602 12:23:48.589472 PCI: 00:07.1: enabled 0
603 12:23:48.593139 PCI: 00:07.2: enabled 0
604 12:23:48.593390 PCI: 00:07.3: enabled 0
605 12:23:48.596410 PCI: 00:08.0: enabled 1
606 12:23:48.599989 PCI: 00:09.0: enabled 0
607 12:23:48.602883 PCI: 00:0a.0: enabled 0
608 12:23:48.603202 PCI: 00:0d.0: enabled 1
609 12:23:48.606605 PCI: 00:0d.1: enabled 0
610 12:23:48.609753 PCI: 00:0d.2: enabled 0
611 12:23:48.612906 PCI: 00:0d.3: enabled 0
612 12:23:48.613233 PCI: 00:0e.0: enabled 0
613 12:23:48.616391 PCI: 00:10.2: enabled 1
614 12:23:48.620428 PCI: 00:10.6: enabled 0
615 12:23:48.623211 PCI: 00:10.7: enabled 0
616 12:23:48.623689 PCI: 00:12.0: enabled 0
617 12:23:48.627794 PCI: 00:12.6: enabled 0
618 12:23:48.629834 PCI: 00:13.0: enabled 0
619 12:23:48.630005 PCI: 00:14.0: enabled 1
620 12:23:48.633276 PCI: 00:14.1: enabled 0
621 12:23:48.636661 PCI: 00:14.2: enabled 1
622 12:23:48.639998 PCI: 00:14.3: enabled 1
623 12:23:48.640181 PCI: 00:15.0: enabled 1
624 12:23:48.642988 PCI: 00:15.1: enabled 1
625 12:23:48.646968 PCI: 00:15.2: enabled 1
626 12:23:48.649884 PCI: 00:15.3: enabled 1
627 12:23:48.650072 PCI: 00:16.0: enabled 1
628 12:23:48.653155 PCI: 00:16.1: enabled 0
629 12:23:48.656457 PCI: 00:16.2: enabled 0
630 12:23:48.656667 PCI: 00:16.3: enabled 0
631 12:23:48.659921 PCI: 00:16.4: enabled 0
632 12:23:48.663479 PCI: 00:16.5: enabled 0
633 12:23:48.666702 PCI: 00:17.0: enabled 1
634 12:23:48.666933 PCI: 00:19.0: enabled 0
635 12:23:48.669889 PCI: 00:19.1: enabled 1
636 12:23:48.673568 PCI: 00:19.2: enabled 0
637 12:23:48.676629 PCI: 00:1c.0: enabled 1
638 12:23:48.676908 PCI: 00:1c.1: enabled 0
639 12:23:48.679901 PCI: 00:1c.2: enabled 0
640 12:23:48.683284 PCI: 00:1c.3: enabled 0
641 12:23:48.686648 PCI: 00:1c.4: enabled 0
642 12:23:48.687027 PCI: 00:1c.5: enabled 0
643 12:23:48.690256 PCI: 00:1c.6: enabled 1
644 12:23:48.693100 PCI: 00:1c.7: enabled 0
645 12:23:48.693473 PCI: 00:1d.0: enabled 1
646 12:23:48.697021 PCI: 00:1d.1: enabled 0
647 12:23:48.700242 PCI: 00:1d.2: enabled 1
648 12:23:48.703508 PCI: 00:1d.3: enabled 0
649 12:23:48.704080 PCI: 00:1e.0: enabled 1
650 12:23:48.706500 PCI: 00:1e.1: enabled 0
651 12:23:48.709824 PCI: 00:1e.2: enabled 1
652 12:23:48.713612 PCI: 00:1e.3: enabled 1
653 12:23:48.714182 PCI: 00:1f.0: enabled 1
654 12:23:48.716714 PCI: 00:1f.1: enabled 0
655 12:23:48.720633 PCI: 00:1f.2: enabled 1
656 12:23:48.721226 PCI: 00:1f.3: enabled 1
657 12:23:48.723316 PCI: 00:1f.4: enabled 0
658 12:23:48.726820 PCI: 00:1f.5: enabled 1
659 12:23:48.730597 PCI: 00:1f.6: enabled 0
660 12:23:48.731183 PCI: 00:1f.7: enabled 0
661 12:23:48.733350 APIC: 00: enabled 1
662 12:23:48.737116 GENERIC: 0.0: enabled 1
663 12:23:48.739828 GENERIC: 0.0: enabled 1
664 12:23:48.740322 GENERIC: 1.0: enabled 1
665 12:23:48.743231 GENERIC: 0.0: enabled 1
666 12:23:48.747140 GENERIC: 1.0: enabled 1
667 12:23:48.747703 USB0 port 0: enabled 1
668 12:23:48.750078 GENERIC: 0.0: enabled 1
669 12:23:48.753778 USB0 port 0: enabled 1
670 12:23:48.756839 GENERIC: 0.0: enabled 1
671 12:23:48.757418 I2C: 00:1a: enabled 1
672 12:23:48.760554 I2C: 00:31: enabled 1
673 12:23:48.763592 I2C: 00:32: enabled 1
674 12:23:48.764157 I2C: 00:10: enabled 1
675 12:23:48.766871 I2C: 00:15: enabled 1
676 12:23:48.770314 GENERIC: 0.0: enabled 0
677 12:23:48.770907 GENERIC: 1.0: enabled 0
678 12:23:48.773564 GENERIC: 0.0: enabled 1
679 12:23:48.776827 SPI: 00: enabled 1
680 12:23:48.777396 SPI: 00: enabled 1
681 12:23:48.780095 PNP: 0c09.0: enabled 1
682 12:23:48.783240 GENERIC: 0.0: enabled 1
683 12:23:48.783865 USB3 port 0: enabled 1
684 12:23:48.786619 USB3 port 1: enabled 1
685 12:23:48.790049 USB3 port 2: enabled 0
686 12:23:48.793304 USB3 port 3: enabled 0
687 12:23:48.793773 USB2 port 0: enabled 0
688 12:23:48.796708 USB2 port 1: enabled 1
689 12:23:48.800231 USB2 port 2: enabled 1
690 12:23:48.800798 USB2 port 3: enabled 0
691 12:23:48.803630 USB2 port 4: enabled 1
692 12:23:48.807164 USB2 port 5: enabled 0
693 12:23:48.810210 USB2 port 6: enabled 0
694 12:23:48.810825 USB2 port 7: enabled 0
695 12:23:48.814141 USB2 port 8: enabled 0
696 12:23:48.816776 USB2 port 9: enabled 0
697 12:23:48.817334 USB3 port 0: enabled 0
698 12:23:48.820105 USB3 port 1: enabled 1
699 12:23:48.823005 USB3 port 2: enabled 0
700 12:23:48.823472 USB3 port 3: enabled 0
701 12:23:48.826555 GENERIC: 0.0: enabled 1
702 12:23:48.830040 GENERIC: 1.0: enabled 1
703 12:23:48.833165 APIC: 01: enabled 1
704 12:23:48.833727 APIC: 03: enabled 1
705 12:23:48.836869 APIC: 07: enabled 1
706 12:23:48.837434 APIC: 04: enabled 1
707 12:23:48.839785 APIC: 02: enabled 1
708 12:23:48.843027 APIC: 06: enabled 1
709 12:23:48.843521 APIC: 05: enabled 1
710 12:23:48.846826 Compare with tree...
711 12:23:48.850194 Root Device: enabled 1
712 12:23:48.850804 DOMAIN: 0000: enabled 1
713 12:23:48.853818 PCI: 00:00.0: enabled 1
714 12:23:48.856780 PCI: 00:02.0: enabled 1
715 12:23:48.859967 PCI: 00:04.0: enabled 1
716 12:23:48.860439 GENERIC: 0.0: enabled 1
717 12:23:48.863633 PCI: 00:05.0: enabled 1
718 12:23:48.866988 PCI: 00:06.0: enabled 0
719 12:23:48.870807 PCI: 00:07.0: enabled 0
720 12:23:48.873659 GENERIC: 0.0: enabled 1
721 12:23:48.874223 PCI: 00:07.1: enabled 0
722 12:23:48.876945 GENERIC: 1.0: enabled 1
723 12:23:48.880066 PCI: 00:07.2: enabled 0
724 12:23:48.883528 GENERIC: 0.0: enabled 1
725 12:23:48.886712 PCI: 00:07.3: enabled 0
726 12:23:48.889927 GENERIC: 1.0: enabled 1
727 12:23:48.890549 PCI: 00:08.0: enabled 1
728 12:23:48.893504 PCI: 00:09.0: enabled 0
729 12:23:48.896752 PCI: 00:0a.0: enabled 0
730 12:23:48.900049 PCI: 00:0d.0: enabled 1
731 12:23:48.900623 USB0 port 0: enabled 1
732 12:23:48.904037 USB3 port 0: enabled 1
733 12:23:48.906909 USB3 port 1: enabled 1
734 12:23:48.910426 USB3 port 2: enabled 0
735 12:23:48.913443 USB3 port 3: enabled 0
736 12:23:48.916854 PCI: 00:0d.1: enabled 0
737 12:23:48.917329 PCI: 00:0d.2: enabled 0
738 12:23:48.919889 GENERIC: 0.0: enabled 1
739 12:23:48.923086 PCI: 00:0d.3: enabled 0
740 12:23:48.926753 PCI: 00:0e.0: enabled 0
741 12:23:48.929959 PCI: 00:10.2: enabled 1
742 12:23:48.930550 PCI: 00:10.6: enabled 0
743 12:23:48.933489 PCI: 00:10.7: enabled 0
744 12:23:48.936833 PCI: 00:12.0: enabled 0
745 12:23:48.940231 PCI: 00:12.6: enabled 0
746 12:23:48.943316 PCI: 00:13.0: enabled 0
747 12:23:48.943784 PCI: 00:14.0: enabled 1
748 12:23:48.946812 USB0 port 0: enabled 1
749 12:23:48.950163 USB2 port 0: enabled 0
750 12:23:48.953371 USB2 port 1: enabled 1
751 12:23:48.957027 USB2 port 2: enabled 1
752 12:23:48.957598 USB2 port 3: enabled 0
753 12:23:48.960260 USB2 port 4: enabled 1
754 12:23:48.963059 USB2 port 5: enabled 0
755 12:23:48.966798 USB2 port 6: enabled 0
756 12:23:48.969792 USB2 port 7: enabled 0
757 12:23:48.973797 USB2 port 8: enabled 0
758 12:23:48.974369 USB2 port 9: enabled 0
759 12:23:48.976944 USB3 port 0: enabled 0
760 12:23:48.980065 USB3 port 1: enabled 1
761 12:23:48.983223 USB3 port 2: enabled 0
762 12:23:48.986667 USB3 port 3: enabled 0
763 12:23:48.987244 PCI: 00:14.1: enabled 0
764 12:23:48.989759 PCI: 00:14.2: enabled 1
765 12:23:48.992950 PCI: 00:14.3: enabled 1
766 12:23:48.996511 GENERIC: 0.0: enabled 1
767 12:23:49.000044 PCI: 00:15.0: enabled 1
768 12:23:49.000635 I2C: 00:1a: enabled 1
769 12:23:49.003569 I2C: 00:31: enabled 1
770 12:23:49.006163 I2C: 00:32: enabled 1
771 12:23:49.009767 PCI: 00:15.1: enabled 1
772 12:23:49.013137 I2C: 00:10: enabled 1
773 12:23:49.013708 PCI: 00:15.2: enabled 1
774 12:23:49.016566 PCI: 00:15.3: enabled 1
775 12:23:49.020720 PCI: 00:16.0: enabled 1
776 12:23:49.024125 PCI: 00:16.1: enabled 0
777 12:23:49.024616 PCI: 00:16.2: enabled 0
778 12:23:49.027816 PCI: 00:16.3: enabled 0
779 12:23:49.031043 PCI: 00:16.4: enabled 0
780 12:23:49.031512 PCI: 00:16.5: enabled 0
781 12:23:49.034260 PCI: 00:17.0: enabled 1
782 12:23:49.038239 PCI: 00:19.0: enabled 0
783 12:23:49.041212 PCI: 00:19.1: enabled 1
784 12:23:49.044580 I2C: 00:15: enabled 1
785 12:23:49.045063 PCI: 00:19.2: enabled 0
786 12:23:49.047943 PCI: 00:1d.0: enabled 1
787 12:23:49.051126 GENERIC: 0.0: enabled 1
788 12:23:49.054237 PCI: 00:1e.0: enabled 1
789 12:23:49.058150 PCI: 00:1e.1: enabled 0
790 12:23:49.058666 PCI: 00:1e.2: enabled 1
791 12:23:49.061475 SPI: 00: enabled 1
792 12:23:49.110714 PCI: 00:1e.3: enabled 1
793 12:23:49.110878 SPI: 00: enabled 1
794 12:23:49.110964 PCI: 00:1f.0: enabled 1
795 12:23:49.111243 PNP: 0c09.0: enabled 1
796 12:23:49.111326 PCI: 00:1f.1: enabled 0
797 12:23:49.111417 PCI: 00:1f.2: enabled 1
798 12:23:49.111494 GENERIC: 0.0: enabled 1
799 12:23:49.111569 GENERIC: 0.0: enabled 1
800 12:23:49.111642 GENERIC: 1.0: enabled 1
801 12:23:49.111714 PCI: 00:1f.3: enabled 1
802 12:23:49.111800 PCI: 00:1f.4: enabled 0
803 12:23:49.111874 PCI: 00:1f.5: enabled 1
804 12:23:49.112226 PCI: 00:1f.6: enabled 0
805 12:23:49.112334 PCI: 00:1f.7: enabled 0
806 12:23:49.112610 CPU_CLUSTER: 0: enabled 1
807 12:23:49.112695 APIC: 00: enabled 1
808 12:23:49.112774 APIC: 01: enabled 1
809 12:23:49.112863 APIC: 03: enabled 1
810 12:23:49.112940 APIC: 07: enabled 1
811 12:23:49.113014 APIC: 04: enabled 1
812 12:23:49.117155 APIC: 02: enabled 1
813 12:23:49.117252 APIC: 06: enabled 1
814 12:23:49.117351 APIC: 05: enabled 1
815 12:23:49.121620 Root Device scanning...
816 12:23:49.125161 scan_static_bus for Root Device
817 12:23:49.128062 DOMAIN: 0000 enabled
818 12:23:49.131401 CPU_CLUSTER: 0 enabled
819 12:23:49.131485 DOMAIN: 0000 scanning...
820 12:23:49.134797 PCI: pci_scan_bus for bus 00
821 12:23:49.138163 PCI: 00:00.0 [8086/0000] ops
822 12:23:49.141285 PCI: 00:00.0 [8086/9a12] enabled
823 12:23:49.145407 PCI: 00:02.0 [8086/0000] bus ops
824 12:23:49.148086 PCI: 00:02.0 [8086/9a40] enabled
825 12:23:49.151229 PCI: 00:04.0 [8086/0000] bus ops
826 12:23:49.154727 PCI: 00:04.0 [8086/9a03] enabled
827 12:23:49.157909 PCI: 00:05.0 [8086/9a19] enabled
828 12:23:49.161063 PCI: 00:07.0 [0000/0000] hidden
829 12:23:49.164536 PCI: 00:08.0 [8086/9a11] enabled
830 12:23:49.167834 PCI: 00:0a.0 [8086/9a0d] disabled
831 12:23:49.171765 PCI: 00:0d.0 [8086/0000] bus ops
832 12:23:49.174610 PCI: 00:0d.0 [8086/9a13] enabled
833 12:23:49.177891 PCI: 00:14.0 [8086/0000] bus ops
834 12:23:49.181443 PCI: 00:14.0 [8086/a0ed] enabled
835 12:23:49.184622 PCI: 00:14.2 [8086/a0ef] enabled
836 12:23:49.188091 PCI: 00:14.3 [8086/0000] bus ops
837 12:23:49.191348 PCI: 00:14.3 [8086/a0f0] enabled
838 12:23:49.194648 PCI: 00:15.0 [8086/0000] bus ops
839 12:23:49.198285 PCI: 00:15.0 [8086/a0e8] enabled
840 12:23:49.201487 PCI: 00:15.1 [8086/0000] bus ops
841 12:23:49.204834 PCI: 00:15.1 [8086/a0e9] enabled
842 12:23:49.208116 PCI: 00:15.2 [8086/0000] bus ops
843 12:23:49.211119 PCI: 00:15.2 [8086/a0ea] enabled
844 12:23:49.214576 PCI: 00:15.3 [8086/0000] bus ops
845 12:23:49.218144 PCI: 00:15.3 [8086/a0eb] enabled
846 12:23:49.221419 PCI: 00:16.0 [8086/0000] ops
847 12:23:49.224483 PCI: 00:16.0 [8086/a0e0] enabled
848 12:23:49.231582 PCI: Static device PCI: 00:17.0 not found, disabling it.
849 12:23:49.234818 PCI: 00:19.0 [8086/0000] bus ops
850 12:23:49.237884 PCI: 00:19.0 [8086/a0c5] disabled
851 12:23:49.241632 PCI: 00:19.1 [8086/0000] bus ops
852 12:23:49.245240 PCI: 00:19.1 [8086/a0c6] enabled
853 12:23:49.247976 PCI: 00:1d.0 [8086/0000] bus ops
854 12:23:49.251639 PCI: 00:1d.0 [8086/a0b0] enabled
855 12:23:49.254685 PCI: 00:1e.0 [8086/0000] ops
856 12:23:49.257862 PCI: 00:1e.0 [8086/a0a8] enabled
857 12:23:49.261133 PCI: 00:1e.2 [8086/0000] bus ops
858 12:23:49.264911 PCI: 00:1e.2 [8086/a0aa] enabled
859 12:23:49.268155 PCI: 00:1e.3 [8086/0000] bus ops
860 12:23:49.271234 PCI: 00:1e.3 [8086/a0ab] enabled
861 12:23:49.274901 PCI: 00:1f.0 [8086/0000] bus ops
862 12:23:49.277967 PCI: 00:1f.0 [8086/a087] enabled
863 12:23:49.278063 RTC Init
864 12:23:49.281407 Set power on after power failure.
865 12:23:49.284478 Disabling Deep S3
866 12:23:49.284589 Disabling Deep S3
867 12:23:49.287879 Disabling Deep S4
868 12:23:49.287996 Disabling Deep S4
869 12:23:49.291401 Disabling Deep S5
870 12:23:49.294864 Disabling Deep S5
871 12:23:49.298277 PCI: 00:1f.2 [0000/0000] hidden
872 12:23:49.301353 PCI: 00:1f.3 [8086/0000] bus ops
873 12:23:49.304604 PCI: 00:1f.3 [8086/a0c8] enabled
874 12:23:49.307841 PCI: 00:1f.5 [8086/0000] bus ops
875 12:23:49.311661 PCI: 00:1f.5 [8086/a0a4] enabled
876 12:23:49.311774 PCI: Leftover static devices:
877 12:23:49.314893 PCI: 00:10.2
878 12:23:49.314981 PCI: 00:10.6
879 12:23:49.318110 PCI: 00:10.7
880 12:23:49.318196 PCI: 00:06.0
881 12:23:49.321709 PCI: 00:07.1
882 12:23:49.321797 PCI: 00:07.2
883 12:23:49.321864 PCI: 00:07.3
884 12:23:49.324591 PCI: 00:09.0
885 12:23:49.324675 PCI: 00:0d.1
886 12:23:49.327944 PCI: 00:0d.2
887 12:23:49.328029 PCI: 00:0d.3
888 12:23:49.328095 PCI: 00:0e.0
889 12:23:49.331312 PCI: 00:12.0
890 12:23:49.331399 PCI: 00:12.6
891 12:23:49.335071 PCI: 00:13.0
892 12:23:49.335194 PCI: 00:14.1
893 12:23:49.335260 PCI: 00:16.1
894 12:23:49.338272 PCI: 00:16.2
895 12:23:49.338361 PCI: 00:16.3
896 12:23:49.341260 PCI: 00:16.4
897 12:23:49.341344 PCI: 00:16.5
898 12:23:49.344967 PCI: 00:17.0
899 12:23:49.345053 PCI: 00:19.2
900 12:23:49.345119 PCI: 00:1e.1
901 12:23:49.347841 PCI: 00:1f.1
902 12:23:49.347925 PCI: 00:1f.4
903 12:23:49.351171 PCI: 00:1f.6
904 12:23:49.351255 PCI: 00:1f.7
905 12:23:49.354916 PCI: Check your devicetree.cb.
906 12:23:49.358293 PCI: 00:02.0 scanning...
907 12:23:49.361571 scan_generic_bus for PCI: 00:02.0
908 12:23:49.364622 scan_generic_bus for PCI: 00:02.0 done
909 12:23:49.367980 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
910 12:23:49.371558 PCI: 00:04.0 scanning...
911 12:23:49.374797 scan_generic_bus for PCI: 00:04.0
912 12:23:49.378144 GENERIC: 0.0 enabled
913 12:23:49.384472 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
914 12:23:49.388109 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
915 12:23:49.391225 PCI: 00:0d.0 scanning...
916 12:23:49.394882 scan_static_bus for PCI: 00:0d.0
917 12:23:49.398199 USB0 port 0 enabled
918 12:23:49.398323 USB0 port 0 scanning...
919 12:23:49.401565 scan_static_bus for USB0 port 0
920 12:23:49.404981 USB3 port 0 enabled
921 12:23:49.408259 USB3 port 1 enabled
922 12:23:49.408346 USB3 port 2 disabled
923 12:23:49.411414 USB3 port 3 disabled
924 12:23:49.414657 USB3 port 0 scanning...
925 12:23:49.417895 scan_static_bus for USB3 port 0
926 12:23:49.421393 scan_static_bus for USB3 port 0 done
927 12:23:49.424629 scan_bus: bus USB3 port 0 finished in 6 msecs
928 12:23:49.428073 USB3 port 1 scanning...
929 12:23:49.431355 scan_static_bus for USB3 port 1
930 12:23:49.434986 scan_static_bus for USB3 port 1 done
931 12:23:49.438031 scan_bus: bus USB3 port 1 finished in 6 msecs
932 12:23:49.444905 scan_static_bus for USB0 port 0 done
933 12:23:49.448404 scan_bus: bus USB0 port 0 finished in 43 msecs
934 12:23:49.451466 scan_static_bus for PCI: 00:0d.0 done
935 12:23:49.454989 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
936 12:23:49.458328 PCI: 00:14.0 scanning...
937 12:23:49.461558 scan_static_bus for PCI: 00:14.0
938 12:23:49.464971 USB0 port 0 enabled
939 12:23:49.468572 USB0 port 0 scanning...
940 12:23:49.471669 scan_static_bus for USB0 port 0
941 12:23:49.471759 USB2 port 0 disabled
942 12:23:49.474890 USB2 port 1 enabled
943 12:23:49.478239 USB2 port 2 enabled
944 12:23:49.478365 USB2 port 3 disabled
945 12:23:49.481537 USB2 port 4 enabled
946 12:23:49.481635 USB2 port 5 disabled
947 12:23:49.484757 USB2 port 6 disabled
948 12:23:49.488196 USB2 port 7 disabled
949 12:23:49.488283 USB2 port 8 disabled
950 12:23:49.491476 USB2 port 9 disabled
951 12:23:49.494698 USB3 port 0 disabled
952 12:23:49.494783 USB3 port 1 enabled
953 12:23:49.498220 USB3 port 2 disabled
954 12:23:49.501357 USB3 port 3 disabled
955 12:23:49.501464 USB2 port 1 scanning...
956 12:23:49.504922 scan_static_bus for USB2 port 1
957 12:23:49.508094 scan_static_bus for USB2 port 1 done
958 12:23:49.514450 scan_bus: bus USB2 port 1 finished in 6 msecs
959 12:23:49.517928 USB2 port 2 scanning...
960 12:23:49.521490 scan_static_bus for USB2 port 2
961 12:23:49.524500 scan_static_bus for USB2 port 2 done
962 12:23:49.527789 scan_bus: bus USB2 port 2 finished in 6 msecs
963 12:23:49.531132 USB2 port 4 scanning...
964 12:23:49.534521 scan_static_bus for USB2 port 4
965 12:23:49.538099 scan_static_bus for USB2 port 4 done
966 12:23:49.541517 scan_bus: bus USB2 port 4 finished in 6 msecs
967 12:23:49.544648 USB3 port 1 scanning...
968 12:23:49.547808 scan_static_bus for USB3 port 1
969 12:23:49.551279 scan_static_bus for USB3 port 1 done
970 12:23:49.557753 scan_bus: bus USB3 port 1 finished in 6 msecs
971 12:23:49.561306 scan_static_bus for USB0 port 0 done
972 12:23:49.564494 scan_bus: bus USB0 port 0 finished in 93 msecs
973 12:23:49.567637 scan_static_bus for PCI: 00:14.0 done
974 12:23:49.574177 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
975 12:23:49.578075 PCI: 00:14.3 scanning...
976 12:23:49.581012 scan_static_bus for PCI: 00:14.3
977 12:23:49.581096 GENERIC: 0.0 enabled
978 12:23:49.587627 scan_static_bus for PCI: 00:14.3 done
979 12:23:49.590934 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
980 12:23:49.594285 PCI: 00:15.0 scanning...
981 12:23:49.598438 scan_static_bus for PCI: 00:15.0
982 12:23:49.598524 I2C: 00:1a enabled
983 12:23:49.601774 I2C: 00:31 enabled
984 12:23:49.601857 I2C: 00:32 enabled
985 12:23:49.605235 scan_static_bus for PCI: 00:15.0 done
986 12:23:49.611891 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
987 12:23:49.615258 PCI: 00:15.1 scanning...
988 12:23:49.618524 scan_static_bus for PCI: 00:15.1
989 12:23:49.618603 I2C: 00:10 enabled
990 12:23:49.621980 scan_static_bus for PCI: 00:15.1 done
991 12:23:49.628535 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
992 12:23:49.631766 PCI: 00:15.2 scanning...
993 12:23:49.635254 scan_static_bus for PCI: 00:15.2
994 12:23:49.638344 scan_static_bus for PCI: 00:15.2 done
995 12:23:49.641950 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
996 12:23:49.645403 PCI: 00:15.3 scanning...
997 12:23:49.648988 scan_static_bus for PCI: 00:15.3
998 12:23:49.651958 scan_static_bus for PCI: 00:15.3 done
999 12:23:49.658563 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1000 12:23:49.658648 PCI: 00:19.1 scanning...
1001 12:23:49.662153 scan_static_bus for PCI: 00:19.1
1002 12:23:49.665383 I2C: 00:15 enabled
1003 12:23:49.668672 scan_static_bus for PCI: 00:19.1 done
1004 12:23:49.675500 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1005 12:23:49.675615 PCI: 00:1d.0 scanning...
1006 12:23:49.678664 do_pci_scan_bridge for PCI: 00:1d.0
1007 12:23:49.681917 PCI: pci_scan_bus for bus 01
1008 12:23:49.685056 PCI: 01:00.0 [1c5c/174a] enabled
1009 12:23:49.688422 GENERIC: 0.0 enabled
1010 12:23:49.691989 Enabling Common Clock Configuration
1011 12:23:49.695174 L1 Sub-State supported from root port 29
1012 12:23:49.698374 L1 Sub-State Support = 0xf
1013 12:23:49.702340 CommonModeRestoreTime = 0x28
1014 12:23:49.705155 Power On Value = 0x16, Power On Scale = 0x0
1015 12:23:49.708647 ASPM: Enabled L1
1016 12:23:49.711888 PCIe: Max_Payload_Size adjusted to 128
1017 12:23:49.718739 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1018 12:23:49.718826 PCI: 00:1e.2 scanning...
1019 12:23:49.722084 scan_generic_bus for PCI: 00:1e.2
1020 12:23:49.725124 SPI: 00 enabled
1021 12:23:49.731938 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1022 12:23:49.735228 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1023 12:23:49.738545 PCI: 00:1e.3 scanning...
1024 12:23:49.741811 scan_generic_bus for PCI: 00:1e.3
1025 12:23:49.745546 SPI: 00 enabled
1026 12:23:49.748519 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1027 12:23:49.755199 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1028 12:23:49.758937 PCI: 00:1f.0 scanning...
1029 12:23:49.761730 scan_static_bus for PCI: 00:1f.0
1030 12:23:49.761813 PNP: 0c09.0 enabled
1031 12:23:49.765236 PNP: 0c09.0 scanning...
1032 12:23:49.768565 scan_static_bus for PNP: 0c09.0
1033 12:23:49.771851 scan_static_bus for PNP: 0c09.0 done
1034 12:23:49.778702 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1035 12:23:49.781828 scan_static_bus for PCI: 00:1f.0 done
1036 12:23:49.784999 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1037 12:23:49.788387 PCI: 00:1f.2 scanning...
1038 12:23:49.791823 scan_static_bus for PCI: 00:1f.2
1039 12:23:49.795506 GENERIC: 0.0 enabled
1040 12:23:49.795591 GENERIC: 0.0 scanning...
1041 12:23:49.798930 scan_static_bus for GENERIC: 0.0
1042 12:23:49.801862 GENERIC: 0.0 enabled
1043 12:23:49.805367 GENERIC: 1.0 enabled
1044 12:23:49.808456 scan_static_bus for GENERIC: 0.0 done
1045 12:23:49.812209 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1046 12:23:49.815172 scan_static_bus for PCI: 00:1f.2 done
1047 12:23:49.822310 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1048 12:23:49.825162 PCI: 00:1f.3 scanning...
1049 12:23:49.829132 scan_static_bus for PCI: 00:1f.3
1050 12:23:49.831688 scan_static_bus for PCI: 00:1f.3 done
1051 12:23:49.835065 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1052 12:23:49.838539 PCI: 00:1f.5 scanning...
1053 12:23:49.841660 scan_generic_bus for PCI: 00:1f.5
1054 12:23:49.845116 scan_generic_bus for PCI: 00:1f.5 done
1055 12:23:49.851957 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1056 12:23:49.854980 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1057 12:23:49.858602 scan_static_bus for Root Device done
1058 12:23:49.865061 scan_bus: bus Root Device finished in 737 msecs
1059 12:23:49.865148 done
1060 12:23:49.871965 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1061 12:23:49.875181 Chrome EC: UHEPI supported
1062 12:23:49.881770 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1063 12:23:49.888400 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1064 12:23:49.891914 SPI flash protection: WPSW=0 SRP0=0
1065 12:23:49.895211 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1066 12:23:49.902025 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1067 12:23:49.905227 found VGA at PCI: 00:02.0
1068 12:23:49.908722 Setting up VGA for PCI: 00:02.0
1069 12:23:49.911540 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1070 12:23:49.918498 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1071 12:23:49.918627 Allocating resources...
1072 12:23:49.921963 Reading resources...
1073 12:23:49.925352 Root Device read_resources bus 0 link: 0
1074 12:23:49.931839 DOMAIN: 0000 read_resources bus 0 link: 0
1075 12:23:49.934984 PCI: 00:04.0 read_resources bus 1 link: 0
1076 12:23:49.941816 PCI: 00:04.0 read_resources bus 1 link: 0 done
1077 12:23:49.945099 PCI: 00:0d.0 read_resources bus 0 link: 0
1078 12:23:49.951364 USB0 port 0 read_resources bus 0 link: 0
1079 12:23:49.954742 USB0 port 0 read_resources bus 0 link: 0 done
1080 12:23:49.961864 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1081 12:23:49.964946 PCI: 00:14.0 read_resources bus 0 link: 0
1082 12:23:49.968146 USB0 port 0 read_resources bus 0 link: 0
1083 12:23:49.975126 USB0 port 0 read_resources bus 0 link: 0 done
1084 12:23:49.978548 PCI: 00:14.0 read_resources bus 0 link: 0 done
1085 12:23:49.985284 PCI: 00:14.3 read_resources bus 0 link: 0
1086 12:23:49.988888 PCI: 00:14.3 read_resources bus 0 link: 0 done
1087 12:23:49.995231 PCI: 00:15.0 read_resources bus 0 link: 0
1088 12:23:49.998619 PCI: 00:15.0 read_resources bus 0 link: 0 done
1089 12:23:50.005160 PCI: 00:15.1 read_resources bus 0 link: 0
1090 12:23:50.009241 PCI: 00:15.1 read_resources bus 0 link: 0 done
1091 12:23:50.015830 PCI: 00:19.1 read_resources bus 0 link: 0
1092 12:23:50.019504 PCI: 00:19.1 read_resources bus 0 link: 0 done
1093 12:23:50.025714 PCI: 00:1d.0 read_resources bus 1 link: 0
1094 12:23:50.029079 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1095 12:23:50.035880 PCI: 00:1e.2 read_resources bus 2 link: 0
1096 12:23:50.039093 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1097 12:23:50.045996 PCI: 00:1e.3 read_resources bus 3 link: 0
1098 12:23:50.049179 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1099 12:23:50.056461 PCI: 00:1f.0 read_resources bus 0 link: 0
1100 12:23:50.059388 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1101 12:23:50.062292 PCI: 00:1f.2 read_resources bus 0 link: 0
1102 12:23:50.069235 GENERIC: 0.0 read_resources bus 0 link: 0
1103 12:23:50.072475 GENERIC: 0.0 read_resources bus 0 link: 0 done
1104 12:23:50.078952 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1105 12:23:50.085635 DOMAIN: 0000 read_resources bus 0 link: 0 done
1106 12:23:50.089094 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1107 12:23:50.092438 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1108 12:23:50.100419 Root Device read_resources bus 0 link: 0 done
1109 12:23:50.102557 Done reading resources.
1110 12:23:50.105823 Show resources in subtree (Root Device)...After reading.
1111 12:23:50.112620 Root Device child on link 0 DOMAIN: 0000
1112 12:23:50.116039 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1113 12:23:50.125895 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1114 12:23:50.135628 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1115 12:23:50.135742 PCI: 00:00.0
1116 12:23:50.146013 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1117 12:23:50.155712 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1118 12:23:50.165860 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1119 12:23:50.175738 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1120 12:23:50.182260 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1121 12:23:50.192224 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1122 12:23:50.202300 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1123 12:23:50.212749 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1124 12:23:50.222595 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1125 12:23:50.229199 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1126 12:23:50.238955 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1127 12:23:50.249046 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1128 12:23:50.258887 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1129 12:23:50.265893 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1130 12:23:50.275493 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1131 12:23:50.285671 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1132 12:23:50.295786 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1133 12:23:50.305883 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1134 12:23:50.315284 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1135 12:23:50.325353 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1136 12:23:50.325472 PCI: 00:02.0
1137 12:23:50.335089 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1138 12:23:50.348319 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1139 12:23:50.355636 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1140 12:23:50.358231 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1141 12:23:50.371610 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1142 12:23:50.371716 GENERIC: 0.0
1143 12:23:50.374956 PCI: 00:05.0
1144 12:23:50.385194 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1145 12:23:50.388226 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1146 12:23:50.388315 GENERIC: 0.0
1147 12:23:50.391469 PCI: 00:08.0
1148 12:23:50.401489 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1149 12:23:50.401601 PCI: 00:0a.0
1150 12:23:50.408651 PCI: 00:0d.0 child on link 0 USB0 port 0
1151 12:23:50.418232 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1152 12:23:50.421410 USB0 port 0 child on link 0 USB3 port 0
1153 12:23:50.424770 USB3 port 0
1154 12:23:50.424856 USB3 port 1
1155 12:23:50.428038 USB3 port 2
1156 12:23:50.428162 USB3 port 3
1157 12:23:50.434909 PCI: 00:14.0 child on link 0 USB0 port 0
1158 12:23:50.444739 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1159 12:23:50.447869 USB0 port 0 child on link 0 USB2 port 0
1160 12:23:50.451271 USB2 port 0
1161 12:23:50.451389 USB2 port 1
1162 12:23:50.454549 USB2 port 2
1163 12:23:50.454632 USB2 port 3
1164 12:23:50.458557 USB2 port 4
1165 12:23:50.458668 USB2 port 5
1166 12:23:50.461112 USB2 port 6
1167 12:23:50.461194 USB2 port 7
1168 12:23:50.464823 USB2 port 8
1169 12:23:50.464905 USB2 port 9
1170 12:23:50.467958 USB3 port 0
1171 12:23:50.468040 USB3 port 1
1172 12:23:50.471350 USB3 port 2
1173 12:23:50.471450 USB3 port 3
1174 12:23:50.474919 PCI: 00:14.2
1175 12:23:50.484796 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1176 12:23:50.494765 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1177 12:23:50.497941 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1178 12:23:50.507942 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1179 12:23:50.511495 GENERIC: 0.0
1180 12:23:50.514782 PCI: 00:15.0 child on link 0 I2C: 00:1a
1181 12:23:50.524637 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1182 12:23:50.524773 I2C: 00:1a
1183 12:23:50.528526 I2C: 00:31
1184 12:23:50.528635 I2C: 00:32
1185 12:23:50.534753 PCI: 00:15.1 child on link 0 I2C: 00:10
1186 12:23:50.544742 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 12:23:50.544880 I2C: 00:10
1188 12:23:50.548223 PCI: 00:15.2
1189 12:23:50.557920 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 12:23:50.558056 PCI: 00:15.3
1191 12:23:50.568142 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1192 12:23:50.571511 PCI: 00:16.0
1193 12:23:50.581391 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 12:23:50.581573 PCI: 00:19.0
1195 12:23:50.584652 PCI: 00:19.1 child on link 0 I2C: 00:15
1196 12:23:50.594619 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 12:23:50.597853 I2C: 00:15
1198 12:23:50.601239 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1199 12:23:50.611639 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1200 12:23:50.621558 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1201 12:23:50.628195 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1202 12:23:50.631264 GENERIC: 0.0
1203 12:23:50.634682 PCI: 01:00.0
1204 12:23:50.644543 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1205 12:23:50.651534 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1206 12:23:50.661367 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1207 12:23:50.664824 PCI: 00:1e.0
1208 12:23:50.674853 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1209 12:23:50.677926 PCI: 00:1e.2 child on link 0 SPI: 00
1210 12:23:50.688335 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1211 12:23:50.691498 SPI: 00
1212 12:23:50.694526 PCI: 00:1e.3 child on link 0 SPI: 00
1213 12:23:50.704804 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 12:23:50.704948 SPI: 00
1215 12:23:50.708069 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1216 12:23:50.718232 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1217 12:23:50.721248 PNP: 0c09.0
1218 12:23:50.727856 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1219 12:23:50.734879 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1220 12:23:50.741514 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1221 12:23:50.751612 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1222 12:23:50.754748 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1223 12:23:50.758204 GENERIC: 0.0
1224 12:23:50.761514 GENERIC: 1.0
1225 12:23:50.761604 PCI: 00:1f.3
1226 12:23:50.771269 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1227 12:23:50.781278 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1228 12:23:50.784542 PCI: 00:1f.5
1229 12:23:50.791550 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1230 12:23:50.798214 CPU_CLUSTER: 0 child on link 0 APIC: 00
1231 12:23:50.798338 APIC: 00
1232 12:23:50.798457 APIC: 01
1233 12:23:50.801650 APIC: 03
1234 12:23:50.801732 APIC: 07
1235 12:23:50.804616 APIC: 04
1236 12:23:50.804699 APIC: 02
1237 12:23:50.804763 APIC: 06
1238 12:23:50.808367 APIC: 05
1239 12:23:50.814571 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1240 12:23:50.821586 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1241 12:23:50.827877 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1242 12:23:50.831305 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1243 12:23:50.838010 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1244 12:23:50.841357 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1245 12:23:50.845046 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1246 12:23:50.851270 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1247 12:23:50.861765 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1248 12:23:50.868212 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1249 12:23:50.874575 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1250 12:23:50.881387 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1251 12:23:50.888033 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1252 12:23:50.894958 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1253 12:23:50.904758 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1254 12:23:50.908042 DOMAIN: 0000: Resource ranges:
1255 12:23:50.911679 * Base: 1000, Size: 800, Tag: 100
1256 12:23:50.915123 * Base: 1900, Size: e700, Tag: 100
1257 12:23:50.918274 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1258 12:23:50.924864 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1259 12:23:50.931608 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1260 12:23:50.941286 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1261 12:23:50.948152 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1262 12:23:50.954632 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1263 12:23:50.964757 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1264 12:23:50.971042 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1265 12:23:50.977667 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1266 12:23:50.987890 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1267 12:23:50.994590 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1268 12:23:51.001257 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1269 12:23:51.010922 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1270 12:23:51.017688 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1271 12:23:51.024462 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1272 12:23:51.034127 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1273 12:23:51.040882 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1274 12:23:51.047954 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1275 12:23:51.057560 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1276 12:23:51.063966 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1277 12:23:51.070420 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1278 12:23:51.080599 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1279 12:23:51.087010 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1280 12:23:51.093623 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1281 12:23:51.103620 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1282 12:23:51.107287 DOMAIN: 0000: Resource ranges:
1283 12:23:51.110199 * Base: 7fc00000, Size: 40400000, Tag: 200
1284 12:23:51.113813 * Base: d0000000, Size: 28000000, Tag: 200
1285 12:23:51.120182 * Base: fa000000, Size: 1000000, Tag: 200
1286 12:23:51.123748 * Base: fb001000, Size: 2fff000, Tag: 200
1287 12:23:51.126887 * Base: fe010000, Size: 2e000, Tag: 200
1288 12:23:51.130607 * Base: fe03f000, Size: d41000, Tag: 200
1289 12:23:51.136977 * Base: fed88000, Size: 8000, Tag: 200
1290 12:23:51.140507 * Base: fed93000, Size: d000, Tag: 200
1291 12:23:51.143349 * Base: feda2000, Size: 1e000, Tag: 200
1292 12:23:51.146953 * Base: fede0000, Size: 1220000, Tag: 200
1293 12:23:51.153459 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1294 12:23:51.160136 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1295 12:23:51.166843 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1296 12:23:51.173431 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1297 12:23:51.179999 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1298 12:23:51.186833 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1299 12:23:51.193574 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1300 12:23:51.199743 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1301 12:23:51.206854 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1302 12:23:51.213416 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1303 12:23:51.219834 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1304 12:23:51.227047 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1305 12:23:51.233129 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1306 12:23:51.239802 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1307 12:23:51.246832 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1308 12:23:51.253344 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1309 12:23:51.260327 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1310 12:23:51.266604 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1311 12:23:51.273135 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1312 12:23:51.279939 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1313 12:23:51.286509 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1314 12:23:51.293058 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1315 12:23:51.299762 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1316 12:23:51.306501 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1317 12:23:51.313044 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1318 12:23:51.316336 PCI: 00:1d.0: Resource ranges:
1319 12:23:51.322790 * Base: 7fc00000, Size: 100000, Tag: 200
1320 12:23:51.329961 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1321 12:23:51.336514 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1322 12:23:51.343129 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1323 12:23:51.349644 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1324 12:23:51.356383 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1325 12:23:51.363034 Root Device assign_resources, bus 0 link: 0
1326 12:23:51.366848 DOMAIN: 0000 assign_resources, bus 0 link: 0
1327 12:23:51.376545 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1328 12:23:51.382922 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1329 12:23:51.389431 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1330 12:23:51.399681 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1331 12:23:51.403069 PCI: 00:04.0 assign_resources, bus 1 link: 0
1332 12:23:51.409907 PCI: 00:04.0 assign_resources, bus 1 link: 0
1333 12:23:51.416368 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1334 12:23:51.426373 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1335 12:23:51.433048 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1336 12:23:51.436390 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1337 12:23:51.442879 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1338 12:23:51.449981 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1339 12:23:51.456379 PCI: 00:14.0 assign_resources, bus 0 link: 0
1340 12:23:51.459611 PCI: 00:14.0 assign_resources, bus 0 link: 0
1341 12:23:51.469674 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1342 12:23:51.476664 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1343 12:23:51.482832 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1344 12:23:51.489854 PCI: 00:14.3 assign_resources, bus 0 link: 0
1345 12:23:51.493182 PCI: 00:14.3 assign_resources, bus 0 link: 0
1346 12:23:51.503027 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1347 12:23:51.506299 PCI: 00:15.0 assign_resources, bus 0 link: 0
1348 12:23:51.509503 PCI: 00:15.0 assign_resources, bus 0 link: 0
1349 12:23:51.519857 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1350 12:23:51.523077 PCI: 00:15.1 assign_resources, bus 0 link: 0
1351 12:23:51.529810 PCI: 00:15.1 assign_resources, bus 0 link: 0
1352 12:23:51.536633 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1353 12:23:51.546335 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1354 12:23:51.553162 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1355 12:23:51.563194 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1356 12:23:51.566332 PCI: 00:19.1 assign_resources, bus 0 link: 0
1357 12:23:51.569887 PCI: 00:19.1 assign_resources, bus 0 link: 0
1358 12:23:51.580357 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1359 12:23:51.589854 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1360 12:23:51.596280 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1361 12:23:51.602874 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1362 12:23:51.609909 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1363 12:23:51.619597 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1364 12:23:51.626329 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1365 12:23:51.629576 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1366 12:23:51.639713 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1367 12:23:51.643441 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1368 12:23:51.649962 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1369 12:23:51.656592 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1370 12:23:51.659811 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1371 12:23:51.666644 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1372 12:23:51.670055 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1373 12:23:51.676694 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1374 12:23:51.679730 LPC: Trying to open IO window from 800 size 1ff
1375 12:23:51.690089 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1376 12:23:51.696704 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1377 12:23:51.706327 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1378 12:23:51.710193 DOMAIN: 0000 assign_resources, bus 0 link: 0
1379 12:23:51.713180 Root Device assign_resources, bus 0 link: 0
1380 12:23:51.716312 Done setting resources.
1381 12:23:51.723119 Show resources in subtree (Root Device)...After assigning values.
1382 12:23:51.726934 Root Device child on link 0 DOMAIN: 0000
1383 12:23:51.733034 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1384 12:23:51.743003 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1385 12:23:51.749891 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1386 12:23:51.753092 PCI: 00:00.0
1387 12:23:51.763159 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1388 12:23:51.772995 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1389 12:23:51.782716 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1390 12:23:51.789842 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1391 12:23:51.799737 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1392 12:23:51.809605 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1393 12:23:51.819450 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1394 12:23:51.829170 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1395 12:23:51.839241 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1396 12:23:51.845925 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1397 12:23:51.856147 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1398 12:23:51.865528 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1399 12:23:51.875694 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1400 12:23:51.882993 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1401 12:23:51.892428 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1402 12:23:51.902133 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1403 12:23:51.912339 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1404 12:23:51.922399 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1405 12:23:51.931827 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1406 12:23:51.941883 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1407 12:23:51.941986 PCI: 00:02.0
1408 12:23:51.955032 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1409 12:23:51.965229 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1410 12:23:51.972155 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1411 12:23:51.978654 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1412 12:23:51.988705 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1413 12:23:51.991845 GENERIC: 0.0
1414 12:23:51.991935 PCI: 00:05.0
1415 12:23:52.001683 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1416 12:23:52.008352 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1417 12:23:52.008445 GENERIC: 0.0
1418 12:23:52.011696 PCI: 00:08.0
1419 12:23:52.021834 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1420 12:23:52.021927 PCI: 00:0a.0
1421 12:23:52.028413 PCI: 00:0d.0 child on link 0 USB0 port 0
1422 12:23:52.038194 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1423 12:23:52.042306 USB0 port 0 child on link 0 USB3 port 0
1424 12:23:52.044907 USB3 port 0
1425 12:23:52.044991 USB3 port 1
1426 12:23:52.048297 USB3 port 2
1427 12:23:52.048386 USB3 port 3
1428 12:23:52.051530 PCI: 00:14.0 child on link 0 USB0 port 0
1429 12:23:52.065325 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1430 12:23:52.069137 USB0 port 0 child on link 0 USB2 port 0
1431 12:23:52.069222 USB2 port 0
1432 12:23:52.071566 USB2 port 1
1433 12:23:52.071677 USB2 port 2
1434 12:23:52.075097 USB2 port 3
1435 12:23:52.078343 USB2 port 4
1436 12:23:52.078465 USB2 port 5
1437 12:23:52.081694 USB2 port 6
1438 12:23:52.081808 USB2 port 7
1439 12:23:52.084927 USB2 port 8
1440 12:23:52.085009 USB2 port 9
1441 12:23:52.088277 USB3 port 0
1442 12:23:52.088405 USB3 port 1
1443 12:23:52.091588 USB3 port 2
1444 12:23:52.091671 USB3 port 3
1445 12:23:52.095030 PCI: 00:14.2
1446 12:23:52.104759 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1447 12:23:52.114664 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1448 12:23:52.118302 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1449 12:23:52.128227 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1450 12:23:52.131546 GENERIC: 0.0
1451 12:23:52.134797 PCI: 00:15.0 child on link 0 I2C: 00:1a
1452 12:23:52.144902 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1453 12:23:52.148138 I2C: 00:1a
1454 12:23:52.148221 I2C: 00:31
1455 12:23:52.151858 I2C: 00:32
1456 12:23:52.154885 PCI: 00:15.1 child on link 0 I2C: 00:10
1457 12:23:52.164628 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1458 12:23:52.168314 I2C: 00:10
1459 12:23:52.168394 PCI: 00:15.2
1460 12:23:52.178250 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1461 12:23:52.181419 PCI: 00:15.3
1462 12:23:52.191233 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1463 12:23:52.191336 PCI: 00:16.0
1464 12:23:52.204695 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1465 12:23:52.204797 PCI: 00:19.0
1466 12:23:52.208043 PCI: 00:19.1 child on link 0 I2C: 00:15
1467 12:23:52.217850 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1468 12:23:52.221405 I2C: 00:15
1469 12:23:52.224497 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1470 12:23:52.234760 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1471 12:23:52.248109 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1472 12:23:52.257892 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1473 12:23:52.257984 GENERIC: 0.0
1474 12:23:52.260973 PCI: 01:00.0
1475 12:23:52.271159 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1476 12:23:52.281065 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1477 12:23:52.291204 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1478 12:23:52.294354 PCI: 00:1e.0
1479 12:23:52.304382 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1480 12:23:52.308139 PCI: 00:1e.2 child on link 0 SPI: 00
1481 12:23:52.317498 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1482 12:23:52.321142 SPI: 00
1483 12:23:52.324413 PCI: 00:1e.3 child on link 0 SPI: 00
1484 12:23:52.334090 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1485 12:23:52.334178 SPI: 00
1486 12:23:52.341125 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1487 12:23:52.347679 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1488 12:23:52.351439 PNP: 0c09.0
1489 12:23:52.360911 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1490 12:23:52.364491 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1491 12:23:52.374129 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1492 12:23:52.384096 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1493 12:23:52.387270 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1494 12:23:52.387358 GENERIC: 0.0
1495 12:23:52.391193 GENERIC: 1.0
1496 12:23:52.393956 PCI: 00:1f.3
1497 12:23:52.404068 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1498 12:23:52.413862 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1499 12:23:52.413966 PCI: 00:1f.5
1500 12:23:52.424058 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1501 12:23:52.430508 CPU_CLUSTER: 0 child on link 0 APIC: 00
1502 12:23:52.430607 APIC: 00
1503 12:23:52.430692 APIC: 01
1504 12:23:52.433759 APIC: 03
1505 12:23:52.433843 APIC: 07
1506 12:23:52.437488 APIC: 04
1507 12:23:52.437572 APIC: 02
1508 12:23:52.437657 APIC: 06
1509 12:23:52.440599 APIC: 05
1510 12:23:52.443769 Done allocating resources.
1511 12:23:52.447294 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1512 12:23:52.453983 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1513 12:23:52.457140 Configure GPIOs for I2S audio on UP4.
1514 12:23:52.464917 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1515 12:23:52.468286 Enabling resources...
1516 12:23:52.471610 PCI: 00:00.0 subsystem <- 8086/9a12
1517 12:23:52.475048 PCI: 00:00.0 cmd <- 06
1518 12:23:52.478331 PCI: 00:02.0 subsystem <- 8086/9a40
1519 12:23:52.481991 PCI: 00:02.0 cmd <- 03
1520 12:23:52.484860 PCI: 00:04.0 subsystem <- 8086/9a03
1521 12:23:52.484948 PCI: 00:04.0 cmd <- 02
1522 12:23:52.492043 PCI: 00:05.0 subsystem <- 8086/9a19
1523 12:23:52.492136 PCI: 00:05.0 cmd <- 02
1524 12:23:52.494888 PCI: 00:08.0 subsystem <- 8086/9a11
1525 12:23:52.498307 PCI: 00:08.0 cmd <- 06
1526 12:23:52.501844 PCI: 00:0d.0 subsystem <- 8086/9a13
1527 12:23:52.505124 PCI: 00:0d.0 cmd <- 02
1528 12:23:52.508937 PCI: 00:14.0 subsystem <- 8086/a0ed
1529 12:23:52.511855 PCI: 00:14.0 cmd <- 02
1530 12:23:52.515124 PCI: 00:14.2 subsystem <- 8086/a0ef
1531 12:23:52.518254 PCI: 00:14.2 cmd <- 02
1532 12:23:52.521943 PCI: 00:14.3 subsystem <- 8086/a0f0
1533 12:23:52.525195 PCI: 00:14.3 cmd <- 02
1534 12:23:52.528245 PCI: 00:15.0 subsystem <- 8086/a0e8
1535 12:23:52.528320 PCI: 00:15.0 cmd <- 02
1536 12:23:52.535401 PCI: 00:15.1 subsystem <- 8086/a0e9
1537 12:23:52.535479 PCI: 00:15.1 cmd <- 02
1538 12:23:52.538723 PCI: 00:15.2 subsystem <- 8086/a0ea
1539 12:23:52.542308 PCI: 00:15.2 cmd <- 02
1540 12:23:52.545286 PCI: 00:15.3 subsystem <- 8086/a0eb
1541 12:23:52.548575 PCI: 00:15.3 cmd <- 02
1542 12:23:52.552040 PCI: 00:16.0 subsystem <- 8086/a0e0
1543 12:23:52.555221 PCI: 00:16.0 cmd <- 02
1544 12:23:52.558626 PCI: 00:19.1 subsystem <- 8086/a0c6
1545 12:23:52.561882 PCI: 00:19.1 cmd <- 02
1546 12:23:52.565657 PCI: 00:1d.0 bridge ctrl <- 0013
1547 12:23:52.568652 PCI: 00:1d.0 subsystem <- 8086/a0b0
1548 12:23:52.571947 PCI: 00:1d.0 cmd <- 06
1549 12:23:52.575172 PCI: 00:1e.0 subsystem <- 8086/a0a8
1550 12:23:52.575255 PCI: 00:1e.0 cmd <- 06
1551 12:23:52.587358 PCI: 00:1e.2 subsystem <- 8086/a0aa
1552 12:23:52.587537 PCI: 00:1e.2 cmd <- 06
1553 12:23:52.587650 PCI: 00:1e.3 subsystem <- 8086/a0ab
1554 12:23:52.588558 PCI: 00:1e.3 cmd <- 02
1555 12:23:52.592042 PCI: 00:1f.0 subsystem <- 8086/a087
1556 12:23:52.595662 PCI: 00:1f.0 cmd <- 407
1557 12:23:52.598978 PCI: 00:1f.3 subsystem <- 8086/a0c8
1558 12:23:52.602060 PCI: 00:1f.3 cmd <- 02
1559 12:23:52.605914 PCI: 00:1f.5 subsystem <- 8086/a0a4
1560 12:23:52.608895 PCI: 00:1f.5 cmd <- 406
1561 12:23:52.612084 PCI: 01:00.0 cmd <- 02
1562 12:23:52.616677 done.
1563 12:23:52.620002 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1564 12:23:52.623704 Initializing devices...
1565 12:23:52.626858 Root Device init
1566 12:23:52.630117 Chrome EC: Set SMI mask to 0x0000000000000000
1567 12:23:52.636686 Chrome EC: clear events_b mask to 0x0000000000000000
1568 12:23:52.643484 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1569 12:23:52.646804 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1570 12:23:52.653536 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1571 12:23:52.660457 Chrome EC: Set WAKE mask to 0x0000000000000000
1572 12:23:52.663681 fw_config match found: DB_USB=USB3_ACTIVE
1573 12:23:52.670251 Configure Right Type-C port orientation for retimer
1574 12:23:52.673856 Root Device init finished in 44 msecs
1575 12:23:52.676879 PCI: 00:00.0 init
1576 12:23:52.680817 CPU TDP = 9 Watts
1577 12:23:52.680895 CPU PL1 = 9 Watts
1578 12:23:52.683625 CPU PL2 = 40 Watts
1579 12:23:52.686984 CPU PL4 = 83 Watts
1580 12:23:52.690135 PCI: 00:00.0 init finished in 8 msecs
1581 12:23:52.690225 PCI: 00:02.0 init
1582 12:23:52.693619 GMA: Found VBT in CBFS
1583 12:23:52.696928 GMA: Found valid VBT in CBFS
1584 12:23:52.703741 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1585 12:23:52.710662 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1586 12:23:52.713676 PCI: 00:02.0 init finished in 18 msecs
1587 12:23:52.717138 PCI: 00:05.0 init
1588 12:23:52.720298 PCI: 00:05.0 init finished in 0 msecs
1589 12:23:52.723792 PCI: 00:08.0 init
1590 12:23:52.727002 PCI: 00:08.0 init finished in 0 msecs
1591 12:23:52.730342 PCI: 00:14.0 init
1592 12:23:52.733692 PCI: 00:14.0 init finished in 0 msecs
1593 12:23:52.737211 PCI: 00:14.2 init
1594 12:23:52.740258 PCI: 00:14.2 init finished in 0 msecs
1595 12:23:52.740340 PCI: 00:15.0 init
1596 12:23:52.743782 I2C bus 0 version 0x3230302a
1597 12:23:52.747141 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1598 12:23:52.753700 PCI: 00:15.0 init finished in 6 msecs
1599 12:23:52.753783 PCI: 00:15.1 init
1600 12:23:52.757442 I2C bus 1 version 0x3230302a
1601 12:23:52.760346 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1602 12:23:52.763972 PCI: 00:15.1 init finished in 6 msecs
1603 12:23:52.766869 PCI: 00:15.2 init
1604 12:23:52.770232 I2C bus 2 version 0x3230302a
1605 12:23:52.773556 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1606 12:23:52.777061 PCI: 00:15.2 init finished in 6 msecs
1607 12:23:52.780690 PCI: 00:15.3 init
1608 12:23:52.783977 I2C bus 3 version 0x3230302a
1609 12:23:52.786946 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1610 12:23:52.790180 PCI: 00:15.3 init finished in 6 msecs
1611 12:23:52.793685 PCI: 00:16.0 init
1612 12:23:52.796969 PCI: 00:16.0 init finished in 0 msecs
1613 12:23:52.797053 PCI: 00:19.1 init
1614 12:23:52.800230 I2C bus 5 version 0x3230302a
1615 12:23:52.803734 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1616 12:23:52.810159 PCI: 00:19.1 init finished in 6 msecs
1617 12:23:52.810242 PCI: 00:1d.0 init
1618 12:23:52.814034 Initializing PCH PCIe bridge.
1619 12:23:52.816985 PCI: 00:1d.0 init finished in 3 msecs
1620 12:23:52.821104 PCI: 00:1f.0 init
1621 12:23:52.824566 IOAPIC: Initializing IOAPIC at 0xfec00000
1622 12:23:52.830939 IOAPIC: Bootstrap Processor Local APIC = 0x00
1623 12:23:52.831022 IOAPIC: ID = 0x02
1624 12:23:52.834314 IOAPIC: Dumping registers
1625 12:23:52.837952 reg 0x0000: 0x02000000
1626 12:23:52.841221 reg 0x0001: 0x00770020
1627 12:23:52.841304 reg 0x0002: 0x00000000
1628 12:23:52.847793 PCI: 00:1f.0 init finished in 21 msecs
1629 12:23:52.847876 PCI: 00:1f.2 init
1630 12:23:52.851396 Disabling ACPI via APMC.
1631 12:23:52.854736 APMC done.
1632 12:23:52.858334 PCI: 00:1f.2 init finished in 5 msecs
1633 12:23:52.869346 PCI: 01:00.0 init
1634 12:23:52.872723 PCI: 01:00.0 init finished in 0 msecs
1635 12:23:52.876055 PNP: 0c09.0 init
1636 12:23:52.879507 Google Chrome EC uptime: 8.426 seconds
1637 12:23:52.886093 Google Chrome AP resets since EC boot: 1
1638 12:23:52.889392 Google Chrome most recent AP reset causes:
1639 12:23:52.892652 0.349: 32775 shutdown: entering G3
1640 12:23:52.899690 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1641 12:23:52.902689 PNP: 0c09.0 init finished in 22 msecs
1642 12:23:52.908132 Devices initialized
1643 12:23:52.911420 Show all devs... After init.
1644 12:23:52.915567 Root Device: enabled 1
1645 12:23:52.915693 DOMAIN: 0000: enabled 1
1646 12:23:52.918632 CPU_CLUSTER: 0: enabled 1
1647 12:23:52.921953 PCI: 00:00.0: enabled 1
1648 12:23:52.924899 PCI: 00:02.0: enabled 1
1649 12:23:52.924983 PCI: 00:04.0: enabled 1
1650 12:23:52.928183 PCI: 00:05.0: enabled 1
1651 12:23:52.931621 PCI: 00:06.0: enabled 0
1652 12:23:52.934700 PCI: 00:07.0: enabled 0
1653 12:23:52.934783 PCI: 00:07.1: enabled 0
1654 12:23:52.938106 PCI: 00:07.2: enabled 0
1655 12:23:52.941535 PCI: 00:07.3: enabled 0
1656 12:23:52.944894 PCI: 00:08.0: enabled 1
1657 12:23:52.944980 PCI: 00:09.0: enabled 0
1658 12:23:52.948343 PCI: 00:0a.0: enabled 0
1659 12:23:52.951319 PCI: 00:0d.0: enabled 1
1660 12:23:52.951431 PCI: 00:0d.1: enabled 0
1661 12:23:52.954730 PCI: 00:0d.2: enabled 0
1662 12:23:52.958133 PCI: 00:0d.3: enabled 0
1663 12:23:52.961482 PCI: 00:0e.0: enabled 0
1664 12:23:52.961564 PCI: 00:10.2: enabled 1
1665 12:23:52.964993 PCI: 00:10.6: enabled 0
1666 12:23:52.968613 PCI: 00:10.7: enabled 0
1667 12:23:52.971676 PCI: 00:12.0: enabled 0
1668 12:23:52.971759 PCI: 00:12.6: enabled 0
1669 12:23:52.974715 PCI: 00:13.0: enabled 0
1670 12:23:52.978062 PCI: 00:14.0: enabled 1
1671 12:23:52.981784 PCI: 00:14.1: enabled 0
1672 12:23:52.981867 PCI: 00:14.2: enabled 1
1673 12:23:52.984797 PCI: 00:14.3: enabled 1
1674 12:23:52.988911 PCI: 00:15.0: enabled 1
1675 12:23:52.989020 PCI: 00:15.1: enabled 1
1676 12:23:52.991309 PCI: 00:15.2: enabled 1
1677 12:23:52.994633 PCI: 00:15.3: enabled 1
1678 12:23:52.997967 PCI: 00:16.0: enabled 1
1679 12:23:52.998050 PCI: 00:16.1: enabled 0
1680 12:23:53.001711 PCI: 00:16.2: enabled 0
1681 12:23:53.005093 PCI: 00:16.3: enabled 0
1682 12:23:53.008054 PCI: 00:16.4: enabled 0
1683 12:23:53.008143 PCI: 00:16.5: enabled 0
1684 12:23:53.011361 PCI: 00:17.0: enabled 0
1685 12:23:53.014746 PCI: 00:19.0: enabled 0
1686 12:23:53.017956 PCI: 00:19.1: enabled 1
1687 12:23:53.018039 PCI: 00:19.2: enabled 0
1688 12:23:53.021181 PCI: 00:1c.0: enabled 1
1689 12:23:53.025069 PCI: 00:1c.1: enabled 0
1690 12:23:53.025153 PCI: 00:1c.2: enabled 0
1691 12:23:53.028067 PCI: 00:1c.3: enabled 0
1692 12:23:53.031109 PCI: 00:1c.4: enabled 0
1693 12:23:53.034657 PCI: 00:1c.5: enabled 0
1694 12:23:53.034769 PCI: 00:1c.6: enabled 1
1695 12:23:53.038147 PCI: 00:1c.7: enabled 0
1696 12:23:53.041342 PCI: 00:1d.0: enabled 1
1697 12:23:53.044708 PCI: 00:1d.1: enabled 0
1698 12:23:53.044794 PCI: 00:1d.2: enabled 1
1699 12:23:53.048071 PCI: 00:1d.3: enabled 0
1700 12:23:53.051330 PCI: 00:1e.0: enabled 1
1701 12:23:53.054550 PCI: 00:1e.1: enabled 0
1702 12:23:53.054629 PCI: 00:1e.2: enabled 1
1703 12:23:53.057757 PCI: 00:1e.3: enabled 1
1704 12:23:53.061123 PCI: 00:1f.0: enabled 1
1705 12:23:53.064331 PCI: 00:1f.1: enabled 0
1706 12:23:53.064410 PCI: 00:1f.2: enabled 1
1707 12:23:53.067997 PCI: 00:1f.3: enabled 1
1708 12:23:53.071466 PCI: 00:1f.4: enabled 0
1709 12:23:53.071567 PCI: 00:1f.5: enabled 1
1710 12:23:53.074563 PCI: 00:1f.6: enabled 0
1711 12:23:53.078117 PCI: 00:1f.7: enabled 0
1712 12:23:53.080859 APIC: 00: enabled 1
1713 12:23:53.080936 GENERIC: 0.0: enabled 1
1714 12:23:53.084202 GENERIC: 0.0: enabled 1
1715 12:23:53.087826 GENERIC: 1.0: enabled 1
1716 12:23:53.091096 GENERIC: 0.0: enabled 1
1717 12:23:53.091213 GENERIC: 1.0: enabled 1
1718 12:23:53.094317 USB0 port 0: enabled 1
1719 12:23:53.097807 GENERIC: 0.0: enabled 1
1720 12:23:53.097905 USB0 port 0: enabled 1
1721 12:23:53.100988 GENERIC: 0.0: enabled 1
1722 12:23:53.104277 I2C: 00:1a: enabled 1
1723 12:23:53.104361 I2C: 00:31: enabled 1
1724 12:23:53.107523 I2C: 00:32: enabled 1
1725 12:23:53.111206 I2C: 00:10: enabled 1
1726 12:23:53.114156 I2C: 00:15: enabled 1
1727 12:23:53.114238 GENERIC: 0.0: enabled 0
1728 12:23:53.117417 GENERIC: 1.0: enabled 0
1729 12:23:53.120831 GENERIC: 0.0: enabled 1
1730 12:23:53.120920 SPI: 00: enabled 1
1731 12:23:53.124198 SPI: 00: enabled 1
1732 12:23:53.127575 PNP: 0c09.0: enabled 1
1733 12:23:53.127658 GENERIC: 0.0: enabled 1
1734 12:23:53.131289 USB3 port 0: enabled 1
1735 12:23:53.134085 USB3 port 1: enabled 1
1736 12:23:53.134167 USB3 port 2: enabled 0
1737 12:23:53.137656 USB3 port 3: enabled 0
1738 12:23:53.140714 USB2 port 0: enabled 0
1739 12:23:53.144283 USB2 port 1: enabled 1
1740 12:23:53.144366 USB2 port 2: enabled 1
1741 12:23:53.147652 USB2 port 3: enabled 0
1742 12:23:53.150773 USB2 port 4: enabled 1
1743 12:23:53.150856 USB2 port 5: enabled 0
1744 12:23:53.154038 USB2 port 6: enabled 0
1745 12:23:53.157154 USB2 port 7: enabled 0
1746 12:23:53.160839 USB2 port 8: enabled 0
1747 12:23:53.160922 USB2 port 9: enabled 0
1748 12:23:53.164017 USB3 port 0: enabled 0
1749 12:23:53.167229 USB3 port 1: enabled 1
1750 12:23:53.167310 USB3 port 2: enabled 0
1751 12:23:53.170628 USB3 port 3: enabled 0
1752 12:23:53.174090 GENERIC: 0.0: enabled 1
1753 12:23:53.177394 GENERIC: 1.0: enabled 1
1754 12:23:53.177469 APIC: 01: enabled 1
1755 12:23:53.180398 APIC: 03: enabled 1
1756 12:23:53.180471 APIC: 07: enabled 1
1757 12:23:53.184127 APIC: 04: enabled 1
1758 12:23:53.187334 APIC: 02: enabled 1
1759 12:23:53.187440 APIC: 06: enabled 1
1760 12:23:53.190509 APIC: 05: enabled 1
1761 12:23:53.193617 PCI: 01:00.0: enabled 1
1762 12:23:53.196985 BS: BS_DEV_INIT run times (exec / console): 31 / 540 ms
1763 12:23:53.203785 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1764 12:23:53.207107 ELOG: NV offset 0xf30000 size 0x1000
1765 12:23:53.213557 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1766 12:23:53.220618 ELOG: Event(17) added with size 13 at 2023-11-08 12:23:17 UTC
1767 12:23:53.227080 ELOG: Event(92) added with size 9 at 2023-11-08 12:23:17 UTC
1768 12:23:53.233444 ELOG: Event(93) added with size 9 at 2023-11-08 12:23:17 UTC
1769 12:23:53.240275 ELOG: Event(9E) added with size 10 at 2023-11-08 12:23:17 UTC
1770 12:23:53.247241 ELOG: Event(9F) added with size 14 at 2023-11-08 12:23:17 UTC
1771 12:23:53.250351 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1772 12:23:53.257085 ELOG: Event(A1) added with size 10 at 2023-11-08 12:23:17 UTC
1773 12:23:53.267136 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1774 12:23:53.273774 ELOG: Event(A0) added with size 9 at 2023-11-08 12:23:17 UTC
1775 12:23:53.276937 elog_add_boot_reason: Logged dev mode boot
1776 12:23:53.283953 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1777 12:23:53.284041 Finalize devices...
1778 12:23:53.286988 Devices finalized
1779 12:23:53.290095 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1780 12:23:53.297160 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1781 12:23:53.303732 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1782 12:23:53.307031 ME: HFSTS1 : 0x80030055
1783 12:23:53.310247 ME: HFSTS2 : 0x30280116
1784 12:23:53.316890 ME: HFSTS3 : 0x00000050
1785 12:23:53.320562 ME: HFSTS4 : 0x00004000
1786 12:23:53.323855 ME: HFSTS5 : 0x00000000
1787 12:23:53.330188 ME: HFSTS6 : 0x00400006
1788 12:23:53.333427 ME: Manufacturing Mode : YES
1789 12:23:53.337097 ME: SPI Protection Mode Enabled : NO
1790 12:23:53.340052 ME: FW Partition Table : OK
1791 12:23:53.343398 ME: Bringup Loader Failure : NO
1792 12:23:53.346645 ME: Firmware Init Complete : NO
1793 12:23:53.353571 ME: Boot Options Present : NO
1794 12:23:53.356904 ME: Update In Progress : NO
1795 12:23:53.360198 ME: D0i3 Support : YES
1796 12:23:53.363499 ME: Low Power State Enabled : NO
1797 12:23:53.366990 ME: CPU Replaced : YES
1798 12:23:53.370522 ME: CPU Replacement Valid : YES
1799 12:23:53.373303 ME: Current Working State : 5
1800 12:23:53.377361 ME: Current Operation State : 1
1801 12:23:53.380205 ME: Current Operation Mode : 3
1802 12:23:53.386998 ME: Error Code : 0
1803 12:23:53.390164 ME: Enhanced Debug Mode : NO
1804 12:23:53.393289 ME: CPU Debug Disabled : YES
1805 12:23:53.396595 ME: TXT Support : NO
1806 12:23:53.403181 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1807 12:23:53.410014 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1808 12:23:53.413174 CBFS: 'fallback/slic' not found.
1809 12:23:53.416666 ACPI: Writing ACPI tables at 76b01000.
1810 12:23:53.420282 ACPI: * FACS
1811 12:23:53.420368 ACPI: * DSDT
1812 12:23:53.423173 Ramoops buffer: 0x100000@0x76a00000.
1813 12:23:53.429980 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1814 12:23:53.433295 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1815 12:23:53.437790 Google Chrome EC: version:
1816 12:23:53.440976 ro: voema_v2.0.7540-147f8d37d1
1817 12:23:53.444192 rw: voema_v2.0.7540-147f8d37d1
1818 12:23:53.447411 running image: 2
1819 12:23:53.454481 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1820 12:23:53.457701 ACPI: * FADT
1821 12:23:53.457780 SCI is IRQ9
1822 12:23:53.460904 ACPI: added table 1/32, length now 40
1823 12:23:53.464268 ACPI: * SSDT
1824 12:23:53.467906 Found 1 CPU(s) with 8 core(s) each.
1825 12:23:53.471099 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1826 12:23:53.477841 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1827 12:23:53.481056 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1828 12:23:53.484150 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1829 12:23:53.490733 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1830 12:23:53.497470 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1831 12:23:53.500686 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1832 12:23:53.507398 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1833 12:23:53.514520 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1834 12:23:53.517994 \_SB.PCI0.RP09: Added StorageD3Enable property
1835 12:23:53.520791 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1836 12:23:53.527431 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1837 12:23:53.530634 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1838 12:23:53.534235 PS2K: Passing 80 keymaps to kernel
1839 12:23:53.540989 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1840 12:23:53.547721 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1841 12:23:53.554635 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1842 12:23:53.561348 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1843 12:23:53.567801 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1844 12:23:53.574702 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1845 12:23:53.580936 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1846 12:23:53.587595 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1847 12:23:53.590772 ACPI: added table 2/32, length now 44
1848 12:23:53.594765 ACPI: * MCFG
1849 12:23:53.597535 ACPI: added table 3/32, length now 48
1850 12:23:53.597622 ACPI: * TPM2
1851 12:23:53.601139 TPM2 log created at 0x769f0000
1852 12:23:53.607475 ACPI: added table 4/32, length now 52
1853 12:23:53.607562 ACPI: * MADT
1854 12:23:53.607648 SCI is IRQ9
1855 12:23:53.613989 ACPI: added table 5/32, length now 56
1856 12:23:53.614078 current = 76b09850
1857 12:23:53.617715 ACPI: * DMAR
1858 12:23:53.620705 ACPI: added table 6/32, length now 60
1859 12:23:53.624165 ACPI: added table 7/32, length now 64
1860 12:23:53.624251 ACPI: * HPET
1861 12:23:53.630656 ACPI: added table 8/32, length now 68
1862 12:23:53.630743 ACPI: done.
1863 12:23:53.633919 ACPI tables: 35216 bytes.
1864 12:23:53.637502 smbios_write_tables: 769ef000
1865 12:23:53.640815 EC returned error result code 3
1866 12:23:53.644248 Couldn't obtain OEM name from CBI
1867 12:23:53.647287 Create SMBIOS type 16
1868 12:23:53.647373 Create SMBIOS type 17
1869 12:23:53.650935 GENERIC: 0.0 (WIFI Device)
1870 12:23:53.654671 SMBIOS tables: 1750 bytes.
1871 12:23:53.657616 Writing table forward entry at 0x00000500
1872 12:23:53.663916 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1873 12:23:53.667409 Writing coreboot table at 0x76b25000
1874 12:23:53.674206 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1875 12:23:53.677538 1. 0000000000001000-000000000009ffff: RAM
1876 12:23:53.684031 2. 00000000000a0000-00000000000fffff: RESERVED
1877 12:23:53.687126 3. 0000000000100000-00000000769eefff: RAM
1878 12:23:53.693879 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1879 12:23:53.697025 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1880 12:23:53.703417 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1881 12:23:53.710422 7. 0000000077000000-000000007fbfffff: RESERVED
1882 12:23:53.714034 8. 00000000c0000000-00000000cfffffff: RESERVED
1883 12:23:53.716882 9. 00000000f8000000-00000000f9ffffff: RESERVED
1884 12:23:53.723414 10. 00000000fb000000-00000000fb000fff: RESERVED
1885 12:23:53.726842 11. 00000000fe000000-00000000fe00ffff: RESERVED
1886 12:23:53.733412 12. 00000000fed80000-00000000fed87fff: RESERVED
1887 12:23:53.736905 13. 00000000fed90000-00000000fed92fff: RESERVED
1888 12:23:53.743466 14. 00000000feda0000-00000000feda1fff: RESERVED
1889 12:23:53.747237 15. 00000000fedc0000-00000000feddffff: RESERVED
1890 12:23:53.750310 16. 0000000100000000-00000002803fffff: RAM
1891 12:23:53.753197 Passing 4 GPIOs to payload:
1892 12:23:53.760278 NAME | PORT | POLARITY | VALUE
1893 12:23:53.763476 lid | undefined | high | high
1894 12:23:53.770249 power | undefined | high | low
1895 12:23:53.776998 oprom | undefined | high | low
1896 12:23:53.780139 EC in RW | 0x000000e5 | high | high
1897 12:23:53.786812 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum cd26
1898 12:23:53.790063 coreboot table: 1576 bytes.
1899 12:23:53.793526 IMD ROOT 0. 0x76fff000 0x00001000
1900 12:23:53.796603 IMD SMALL 1. 0x76ffe000 0x00001000
1901 12:23:53.800104 FSP MEMORY 2. 0x76c4e000 0x003b0000
1902 12:23:53.803168 VPD 3. 0x76c4d000 0x00000367
1903 12:23:53.810256 RO MCACHE 4. 0x76c4c000 0x00000fdc
1904 12:23:53.813406 CONSOLE 5. 0x76c2c000 0x00020000
1905 12:23:53.816660 FMAP 6. 0x76c2b000 0x00000578
1906 12:23:53.819818 TIME STAMP 7. 0x76c2a000 0x00000910
1907 12:23:53.823136 VBOOT WORK 8. 0x76c16000 0x00014000
1908 12:23:53.826599 ROMSTG STCK 9. 0x76c15000 0x00001000
1909 12:23:53.829688 AFTER CAR 10. 0x76c0a000 0x0000b000
1910 12:23:53.833351 RAMSTAGE 11. 0x76b97000 0x00073000
1911 12:23:53.839866 REFCODE 12. 0x76b42000 0x00055000
1912 12:23:53.843027 SMM BACKUP 13. 0x76b32000 0x00010000
1913 12:23:53.846603 4f444749 14. 0x76b30000 0x00002000
1914 12:23:53.849892 EXT VBT15. 0x76b2d000 0x0000219f
1915 12:23:53.853391 COREBOOT 16. 0x76b25000 0x00008000
1916 12:23:53.856519 ACPI 17. 0x76b01000 0x00024000
1917 12:23:53.859616 ACPI GNVS 18. 0x76b00000 0x00001000
1918 12:23:53.863414 RAMOOPS 19. 0x76a00000 0x00100000
1919 12:23:53.866753 TPM2 TCGLOG20. 0x769f0000 0x00010000
1920 12:23:53.869703 SMBIOS 21. 0x769ef000 0x00000800
1921 12:23:53.873081 IMD small region:
1922 12:23:53.876673 IMD ROOT 0. 0x76ffec00 0x00000400
1923 12:23:53.879731 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1924 12:23:53.886485 POWER STATE 2. 0x76ffeb80 0x00000044
1925 12:23:53.889807 ROMSTAGE 3. 0x76ffeb60 0x00000004
1926 12:23:53.893064 MEM INFO 4. 0x76ffe980 0x000001e0
1927 12:23:53.900228 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1928 12:23:53.903542 MTRR: Physical address space:
1929 12:23:53.906678 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1930 12:23:53.913286 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1931 12:23:53.920074 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1932 12:23:53.926431 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1933 12:23:53.933501 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1934 12:23:53.939990 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1935 12:23:53.946671 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1936 12:23:53.950109 MTRR: Fixed MSR 0x250 0x0606060606060606
1937 12:23:53.953421 MTRR: Fixed MSR 0x258 0x0606060606060606
1938 12:23:53.956492 MTRR: Fixed MSR 0x259 0x0000000000000000
1939 12:23:53.963513 MTRR: Fixed MSR 0x268 0x0606060606060606
1940 12:23:53.966206 MTRR: Fixed MSR 0x269 0x0606060606060606
1941 12:23:53.969925 MTRR: Fixed MSR 0x26a 0x0606060606060606
1942 12:23:53.972853 MTRR: Fixed MSR 0x26b 0x0606060606060606
1943 12:23:53.979854 MTRR: Fixed MSR 0x26c 0x0606060606060606
1944 12:23:53.983117 MTRR: Fixed MSR 0x26d 0x0606060606060606
1945 12:23:53.986361 MTRR: Fixed MSR 0x26e 0x0606060606060606
1946 12:23:53.989867 MTRR: Fixed MSR 0x26f 0x0606060606060606
1947 12:23:53.994024 call enable_fixed_mtrr()
1948 12:23:53.996850 CPU physical address size: 39 bits
1949 12:23:54.003688 MTRR: default type WB/UC MTRR counts: 6/6.
1950 12:23:54.006873 MTRR: UC selected as default type.
1951 12:23:54.014241 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1952 12:23:54.017082 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1953 12:23:54.023953 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1954 12:23:54.030463 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1955 12:23:54.036986 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1956 12:23:54.043554 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1957 12:23:54.043638
1958 12:23:54.047350 MTRR check
1959 12:23:54.047452 Fixed MTRRs : Enabled
1960 12:23:54.050663 Variable MTRRs: Enabled
1961 12:23:54.050762
1962 12:23:54.053438 MTRR: Fixed MSR 0x250 0x0606060606060606
1963 12:23:54.060239 MTRR: Fixed MSR 0x258 0x0606060606060606
1964 12:23:54.063635 MTRR: Fixed MSR 0x259 0x0000000000000000
1965 12:23:54.066814 MTRR: Fixed MSR 0x268 0x0606060606060606
1966 12:23:54.070575 MTRR: Fixed MSR 0x269 0x0606060606060606
1967 12:23:54.076811 MTRR: Fixed MSR 0x26a 0x0606060606060606
1968 12:23:54.080180 MTRR: Fixed MSR 0x26b 0x0606060606060606
1969 12:23:54.083834 MTRR: Fixed MSR 0x26c 0x0606060606060606
1970 12:23:54.087007 MTRR: Fixed MSR 0x26d 0x0606060606060606
1971 12:23:54.093563 MTRR: Fixed MSR 0x26e 0x0606060606060606
1972 12:23:54.096835 MTRR: Fixed MSR 0x26f 0x0606060606060606
1973 12:23:54.103320 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1974 12:23:54.106967 call enable_fixed_mtrr()
1975 12:23:54.110855 Checking cr50 for pending updates
1976 12:23:54.110943 CPU physical address size: 39 bits
1977 12:23:54.118044 MTRR: Fixed MSR 0x250 0x0606060606060606
1978 12:23:54.121368 MTRR: Fixed MSR 0x250 0x0606060606060606
1979 12:23:54.124402 MTRR: Fixed MSR 0x258 0x0606060606060606
1980 12:23:54.127720 MTRR: Fixed MSR 0x259 0x0000000000000000
1981 12:23:54.134706 MTRR: Fixed MSR 0x268 0x0606060606060606
1982 12:23:54.137907 MTRR: Fixed MSR 0x269 0x0606060606060606
1983 12:23:54.141046 MTRR: Fixed MSR 0x26a 0x0606060606060606
1984 12:23:54.144258 MTRR: Fixed MSR 0x26b 0x0606060606060606
1985 12:23:54.150811 MTRR: Fixed MSR 0x26c 0x0606060606060606
1986 12:23:54.154066 MTRR: Fixed MSR 0x26d 0x0606060606060606
1987 12:23:54.157702 MTRR: Fixed MSR 0x26e 0x0606060606060606
1988 12:23:54.160838 MTRR: Fixed MSR 0x26f 0x0606060606060606
1989 12:23:54.167809 MTRR: Fixed MSR 0x258 0x0606060606060606
1990 12:23:54.167895 call enable_fixed_mtrr()
1991 12:23:54.174630 MTRR: Fixed MSR 0x259 0x0000000000000000
1992 12:23:54.177960 MTRR: Fixed MSR 0x268 0x0606060606060606
1993 12:23:54.181379 MTRR: Fixed MSR 0x269 0x0606060606060606
1994 12:23:54.184732 MTRR: Fixed MSR 0x26a 0x0606060606060606
1995 12:23:54.191208 MTRR: Fixed MSR 0x26b 0x0606060606060606
1996 12:23:54.194685 MTRR: Fixed MSR 0x26c 0x0606060606060606
1997 12:23:54.198075 MTRR: Fixed MSR 0x26d 0x0606060606060606
1998 12:23:54.201153 MTRR: Fixed MSR 0x26e 0x0606060606060606
1999 12:23:54.207911 MTRR: Fixed MSR 0x26f 0x0606060606060606
2000 12:23:54.211164 CPU physical address size: 39 bits
2001 12:23:54.214728 call enable_fixed_mtrr()
2002 12:23:54.219511 Reading cr50 TPM mode
2003 12:23:54.219613 MTRR: Fixed MSR 0x250 0x0606060606060606
2004 12:23:54.226149 MTRR: Fixed MSR 0x250 0x0606060606060606
2005 12:23:54.229706 MTRR: Fixed MSR 0x258 0x0606060606060606
2006 12:23:54.232672 MTRR: Fixed MSR 0x259 0x0000000000000000
2007 12:23:54.236100 MTRR: Fixed MSR 0x268 0x0606060606060606
2008 12:23:54.242407 MTRR: Fixed MSR 0x269 0x0606060606060606
2009 12:23:54.246061 MTRR: Fixed MSR 0x26a 0x0606060606060606
2010 12:23:54.249311 MTRR: Fixed MSR 0x26b 0x0606060606060606
2011 12:23:54.252688 MTRR: Fixed MSR 0x26c 0x0606060606060606
2012 12:23:54.259638 MTRR: Fixed MSR 0x26d 0x0606060606060606
2013 12:23:54.262826 MTRR: Fixed MSR 0x26e 0x0606060606060606
2014 12:23:54.266324 MTRR: Fixed MSR 0x26f 0x0606060606060606
2015 12:23:54.273151 MTRR: Fixed MSR 0x258 0x0606060606060606
2016 12:23:54.276034 MTRR: Fixed MSR 0x259 0x0000000000000000
2017 12:23:54.279324 MTRR: Fixed MSR 0x268 0x0606060606060606
2018 12:23:54.282902 MTRR: Fixed MSR 0x269 0x0606060606060606
2019 12:23:54.286066 MTRR: Fixed MSR 0x26a 0x0606060606060606
2020 12:23:54.292655 MTRR: Fixed MSR 0x26b 0x0606060606060606
2021 12:23:54.295967 MTRR: Fixed MSR 0x26c 0x0606060606060606
2022 12:23:54.299260 MTRR: Fixed MSR 0x26d 0x0606060606060606
2023 12:23:54.302964 MTRR: Fixed MSR 0x26e 0x0606060606060606
2024 12:23:54.309230 MTRR: Fixed MSR 0x26f 0x0606060606060606
2025 12:23:54.312664 call enable_fixed_mtrr()
2026 12:23:54.312749 call enable_fixed_mtrr()
2027 12:23:54.316484 CPU physical address size: 39 bits
2028 12:23:54.323055 CPU physical address size: 39 bits
2029 12:23:54.325966 CPU physical address size: 39 bits
2030 12:23:54.329763 MTRR: Fixed MSR 0x250 0x0606060606060606
2031 12:23:54.332901 MTRR: Fixed MSR 0x250 0x0606060606060606
2032 12:23:54.339354 MTRR: Fixed MSR 0x258 0x0606060606060606
2033 12:23:54.342930 MTRR: Fixed MSR 0x259 0x0000000000000000
2034 12:23:54.345901 MTRR: Fixed MSR 0x268 0x0606060606060606
2035 12:23:54.349268 MTRR: Fixed MSR 0x269 0x0606060606060606
2036 12:23:54.355875 MTRR: Fixed MSR 0x26a 0x0606060606060606
2037 12:23:54.359301 MTRR: Fixed MSR 0x26b 0x0606060606060606
2038 12:23:54.362805 MTRR: Fixed MSR 0x26c 0x0606060606060606
2039 12:23:54.366014 MTRR: Fixed MSR 0x26d 0x0606060606060606
2040 12:23:54.369298 MTRR: Fixed MSR 0x26e 0x0606060606060606
2041 12:23:54.375949 MTRR: Fixed MSR 0x26f 0x0606060606060606
2042 12:23:54.379219 MTRR: Fixed MSR 0x258 0x0606060606060606
2043 12:23:54.382611 MTRR: Fixed MSR 0x259 0x0000000000000000
2044 12:23:54.389525 MTRR: Fixed MSR 0x268 0x0606060606060606
2045 12:23:54.392555 MTRR: Fixed MSR 0x269 0x0606060606060606
2046 12:23:54.395949 MTRR: Fixed MSR 0x26a 0x0606060606060606
2047 12:23:54.399065 MTRR: Fixed MSR 0x26b 0x0606060606060606
2048 12:23:54.406468 MTRR: Fixed MSR 0x26c 0x0606060606060606
2049 12:23:54.409048 MTRR: Fixed MSR 0x26d 0x0606060606060606
2050 12:23:54.412728 MTRR: Fixed MSR 0x26e 0x0606060606060606
2051 12:23:54.416085 MTRR: Fixed MSR 0x26f 0x0606060606060606
2052 12:23:54.419696 call enable_fixed_mtrr()
2053 12:23:54.423128 call enable_fixed_mtrr()
2054 12:23:54.429933 BS: BS_PAYLOAD_LOAD entry times (exec / console): 113 / 6 ms
2055 12:23:54.433362 CPU physical address size: 39 bits
2056 12:23:54.436608 CPU physical address size: 39 bits
2057 12:23:54.443183 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2058 12:23:54.449930 Checking segment from ROM address 0xffc02b38
2059 12:23:54.452919 Checking segment from ROM address 0xffc02b54
2060 12:23:54.456789 Loading segment from ROM address 0xffc02b38
2061 12:23:54.460095 code (compression=0)
2062 12:23:54.469685 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2063 12:23:54.476287 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2064 12:23:54.479847 it's not compressed!
2065 12:23:54.618816 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2066 12:23:54.625545 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2067 12:23:54.632263 Loading segment from ROM address 0xffc02b54
2068 12:23:54.632351 Entry Point 0x30000000
2069 12:23:54.635364 Loaded segments
2070 12:23:54.641985 BS: BS_PAYLOAD_LOAD run times (exec / console): 143 / 63 ms
2071 12:23:54.684935 Finalizing chipset.
2072 12:23:54.688144 Finalizing SMM.
2073 12:23:54.688235 APMC done.
2074 12:23:54.694818 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2075 12:23:54.698210 mp_park_aps done after 0 msecs.
2076 12:23:54.701625 Jumping to boot code at 0x30000000(0x76b25000)
2077 12:23:54.711821 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2078 12:23:54.711908
2079 12:23:54.711971
2080 12:23:54.712031
2081 12:23:54.714708 Starting depthcharge on Voema...
2082 12:23:54.714810
2083 12:23:54.715164 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2084 12:23:54.715262 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2085 12:23:54.715347 Setting prompt string to ['volteer:']
2086 12:23:54.715427 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2087 12:23:54.725064 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2088 12:23:54.725151
2089 12:23:54.731301 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2090 12:23:54.731385
2091 12:23:54.734862 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2092 12:23:54.737921
2093 12:23:54.741227 Failed to find eMMC card reader
2094 12:23:54.741310
2095 12:23:54.741375 Wipe memory regions:
2096 12:23:54.741433
2097 12:23:54.747865 [0x00000000001000, 0x000000000a0000)
2098 12:23:54.747948
2099 12:23:54.751486 [0x00000000100000, 0x00000030000000)
2100 12:23:54.776462
2101 12:23:54.779818 [0x00000032662db0, 0x000000769ef000)
2102 12:23:54.815101
2103 12:23:54.818683 [0x00000100000000, 0x00000280400000)
2104 12:23:55.020920
2105 12:23:55.024016 ec_init: CrosEC protocol v3 supported (256, 256)
2106 12:23:55.024099
2107 12:23:55.030814 update_port_state: port C0 state: usb enable 1 mux conn 0
2108 12:23:55.030898
2109 12:23:55.037251 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2110 12:23:55.041984
2111 12:23:55.045111 pmc_check_ipc_sts: STS_BUSY done after 1661 us
2112 12:23:55.045194
2113 12:23:55.048388 send_conn_disc_msg: pmc_send_cmd succeeded
2114 12:23:55.480675
2115 12:23:55.480821 R8152: Initializing
2116 12:23:55.480887
2117 12:23:55.483904 Version 6 (ocp_data = 5c30)
2118 12:23:55.484010
2119 12:23:55.487479 R8152: Done initializing
2120 12:23:55.487549
2121 12:23:55.490515 Adding net device
2122 12:23:55.792174
2123 12:23:55.795598 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2124 12:23:55.795725
2125 12:23:55.795899
2126 12:23:55.795997
2127 12:23:55.798944 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2129 12:23:55.899376 volteer: tftpboot 192.168.201.1 11967642/tftp-deploy-dj30bm7f/kernel/bzImage 11967642/tftp-deploy-dj30bm7f/kernel/cmdline 11967642/tftp-deploy-dj30bm7f/ramdisk/ramdisk.cpio.gz
2130 12:23:55.899602 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2131 12:23:55.899729 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2132 12:23:55.903673 tftpboot 192.168.201.1 11967642/tftp-deploy-dj30bm7f/kernel/bzImploy-dj30bm7f/kernel/cmdline 11967642/tftp-deploy-dj30bm7f/ramdisk/ramdisk.cpio.gz
2133 12:23:55.903792
2134 12:23:55.903925 Waiting for link
2135 12:23:56.107180
2136 12:23:56.107369 done.
2137 12:23:56.107472
2138 12:23:56.107566 MAC: 00:24:32:30:78:74
2139 12:23:56.107660
2140 12:23:56.110590 Sending DHCP discover... done.
2141 12:23:56.110702
2142 12:23:56.113668 Waiting for reply... done.
2143 12:23:56.113776
2144 12:23:56.117290 Sending DHCP request... done.
2145 12:23:56.117398
2146 12:23:56.124471 Waiting for reply... done.
2147 12:23:56.124585
2148 12:23:56.124681 My ip is 192.168.201.14
2149 12:23:56.124777
2150 12:23:56.127313 The DHCP server ip is 192.168.201.1
2151 12:23:56.130260
2152 12:23:56.133885 TFTP server IP predefined by user: 192.168.201.1
2153 12:23:56.133995
2154 12:23:56.140462 Bootfile predefined by user: 11967642/tftp-deploy-dj30bm7f/kernel/bzImage
2155 12:23:56.140576
2156 12:23:56.143855 Sending tftp read request... done.
2157 12:23:56.143965
2158 12:23:56.146956 Waiting for the transfer...
2159 12:23:56.147065
2160 12:23:56.699703 00000000 ################################################################
2161 12:23:56.699842
2162 12:23:57.251253 00080000 ################################################################
2163 12:23:57.251399
2164 12:23:57.802096 00100000 ################################################################
2165 12:23:57.802275
2166 12:23:58.365564 00180000 ################################################################
2167 12:23:58.365737
2168 12:23:58.932408 00200000 ################################################################
2169 12:23:58.932566
2170 12:23:59.553401 00280000 ################################################################
2171 12:23:59.553911
2172 12:24:00.238612 00300000 ################################################################
2173 12:24:00.239128
2174 12:24:00.928321 00380000 ################################################################
2175 12:24:00.928990
2176 12:24:01.611637 00400000 ################################################################
2177 12:24:01.612207
2178 12:24:02.289864 00480000 ################################################################
2179 12:24:02.290366
2180 12:24:02.980141 00500000 ################################################################
2181 12:24:02.980749
2182 12:24:03.659040 00580000 ################################################################
2183 12:24:03.659527
2184 12:24:04.344983 00600000 ################################################################
2185 12:24:04.345469
2186 12:24:05.021912 00680000 ################################################################
2187 12:24:05.022535
2188 12:24:05.694770 00700000 ################################################################
2189 12:24:05.695344
2190 12:24:06.336457 00780000 ################################################################
2191 12:24:06.336686
2192 12:24:06.881702 00800000 ################################################################
2193 12:24:06.881841
2194 12:24:07.417123 00880000 ################################################################
2195 12:24:07.417262
2196 12:24:07.946138 00900000 ################################################################
2197 12:24:07.946276
2198 12:24:08.491324 00980000 ################################################################
2199 12:24:08.491456
2200 12:24:09.040116 00a00000 ################################################################
2201 12:24:09.040251
2202 12:24:09.585122 00a80000 ################################################################
2203 12:24:09.585258
2204 12:24:09.625569 00b00000 ##### done.
2205 12:24:09.625670
2206 12:24:09.628642 The bootfile was 11571200 bytes long.
2207 12:24:09.628724
2208 12:24:09.631903 Sending tftp read request... done.
2209 12:24:09.631985
2210 12:24:09.635419 Waiting for the transfer...
2211 12:24:09.635505
2212 12:24:10.182601 00000000 ################################################################
2213 12:24:10.182737
2214 12:24:10.735424 00080000 ################################################################
2215 12:24:10.735561
2216 12:24:11.278127 00100000 ################################################################
2217 12:24:11.278279
2218 12:24:11.808049 00180000 ################################################################
2219 12:24:11.808206
2220 12:24:12.329577 00200000 ################################################################
2221 12:24:12.329733
2222 12:24:12.837451 00280000 ################################################################
2223 12:24:12.837594
2224 12:24:13.351235 00300000 ################################################################
2225 12:24:13.351415
2226 12:24:13.870103 00380000 ################################################################
2227 12:24:13.870274
2228 12:24:14.387218 00400000 ################################################################
2229 12:24:14.387356
2230 12:24:14.918732 00480000 ################################################################
2231 12:24:14.918897
2232 12:24:15.445000 00500000 ################################################################
2233 12:24:15.445168
2234 12:24:15.970202 00580000 ################################################################
2235 12:24:15.970393
2236 12:24:16.485540 00600000 ################################################################
2237 12:24:16.485733
2238 12:24:17.019920 00680000 ################################################################
2239 12:24:17.020117
2240 12:24:17.568528 00700000 ################################################################
2241 12:24:17.568725
2242 12:24:18.098843 00780000 ################################################################
2243 12:24:18.098989
2244 12:24:18.630327 00800000 ################################################################
2245 12:24:18.630493
2246 12:24:19.156006 00880000 ################################################################
2247 12:24:19.156142
2248 12:24:19.684560 00900000 ################################################################
2249 12:24:19.684691
2250 12:24:20.213040 00980000 ################################################################
2251 12:24:20.213177
2252 12:24:20.767259 00a00000 ################################################################
2253 12:24:20.767397
2254 12:24:21.339477 00a80000 ################################################################
2255 12:24:21.339619
2256 12:24:22.012316 00b00000 ################################################################
2257 12:24:22.012775
2258 12:24:22.705933 00b80000 ################################################################
2259 12:24:22.706460
2260 12:24:23.392270 00c00000 ################################################################
2261 12:24:23.392764
2262 12:24:24.080062 00c80000 ################################################################
2263 12:24:24.080549
2264 12:24:24.776641 00d00000 ################################################################
2265 12:24:24.777180
2266 12:24:25.489602 00d80000 ################################################################
2267 12:24:25.490124
2268 12:24:26.198650 00e00000 ################################################################
2269 12:24:26.199172
2270 12:24:26.910930 00e80000 ################################################################
2271 12:24:26.911446
2272 12:24:27.606888 00f00000 ################################################################
2273 12:24:27.607397
2274 12:24:28.324161 00f80000 ################################################################
2275 12:24:28.324695
2276 12:24:29.015190 01000000 ################################################################
2277 12:24:29.015774
2278 12:24:29.685253 01080000 ################################################################
2279 12:24:29.685394
2280 12:24:30.225002 01100000 ################################################################
2281 12:24:30.225154
2282 12:24:30.761979 01180000 ################################################################
2283 12:24:30.762130
2284 12:24:31.351670 01200000 ################################################################
2285 12:24:31.351816
2286 12:24:32.004544 01280000 ################################################################
2287 12:24:32.004711
2288 12:24:32.607569 01300000 ################################################################
2289 12:24:32.607707
2290 12:24:33.146221 01380000 ################################################################
2291 12:24:33.146365
2292 12:24:33.698071 01400000 ################################################################
2293 12:24:33.698207
2294 12:24:34.253748 01480000 ################################################################
2295 12:24:34.253882
2296 12:24:34.801141 01500000 ################################################################
2297 12:24:34.801277
2298 12:24:35.393252 01580000 ################################################################
2299 12:24:35.393384
2300 12:24:36.013389 01600000 ################################################################
2301 12:24:36.013593
2302 12:24:36.626614 01680000 ################################################################
2303 12:24:36.626747
2304 12:24:37.221463 01700000 ################################################################
2305 12:24:37.221972
2306 12:24:37.807893 01780000 ################################################################
2307 12:24:37.808358
2308 12:24:38.512502 01800000 ################################################################
2309 12:24:38.512644
2310 12:24:39.142943 01880000 ################################################################
2311 12:24:39.143485
2312 12:24:39.700479 01900000 ################################################################
2313 12:24:39.700612
2314 12:24:40.237308 01980000 ################################################################
2315 12:24:40.237455
2316 12:24:40.780573 01a00000 ################################################################
2317 12:24:40.780717
2318 12:24:41.347238 01a80000 ################################################################
2319 12:24:41.347387
2320 12:24:41.915967 01b00000 ################################################################
2321 12:24:41.916115
2322 12:24:42.487213 01b80000 ################################################################
2323 12:24:42.487363
2324 12:24:43.048784 01c00000 ################################################################
2325 12:24:43.048941
2326 12:24:43.618966 01c80000 ################################################################
2327 12:24:43.619123
2328 12:24:44.191134 01d00000 ################################################################
2329 12:24:44.191303
2330 12:24:44.756095 01d80000 ################################################################
2331 12:24:44.756266
2332 12:24:45.321673 01e00000 ################################################################
2333 12:24:45.321807
2334 12:24:45.863929 01e80000 ################################################################
2335 12:24:45.864070
2336 12:24:46.399985 01f00000 ################################################################
2337 12:24:46.400114
2338 12:24:46.948261 01f80000 ################################################################
2339 12:24:46.948424
2340 12:24:47.474735 02000000 ################################################################
2341 12:24:47.474882
2342 12:24:48.015837 02080000 ################################################################
2343 12:24:48.015986
2344 12:24:48.567292 02100000 ################################################################
2345 12:24:48.567461
2346 12:24:49.232087 02180000 ################################################################
2347 12:24:49.232671
2348 12:24:49.940650 02200000 ################################################################
2349 12:24:49.941217
2350 12:24:50.370223 02280000 ###################################### done.
2351 12:24:50.370751
2352 12:24:50.373785 Sending tftp read request... done.
2353 12:24:50.374201
2354 12:24:50.377252 Waiting for the transfer...
2355 12:24:50.377776
2356 12:24:50.378113 00000000 # done.
2357 12:24:50.378518
2358 12:24:50.386568 Command line loaded dynamically from TFTP file: 11967642/tftp-deploy-dj30bm7f/kernel/cmdline
2359 12:24:50.386996
2360 12:24:50.403113 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2361 12:24:50.409835
2362 12:24:50.412645 Shutting down all USB controllers.
2363 12:24:50.413092
2364 12:24:50.413426 Removing current net device
2365 12:24:50.413735
2366 12:24:50.416397 Finalizing coreboot
2367 12:24:50.416944
2368 12:24:50.422477 Exiting depthcharge with code 4 at timestamp: 64381427
2369 12:24:50.422889
2370 12:24:50.423345
2371 12:24:50.423669 Starting kernel ...
2372 12:24:50.423971
2373 12:24:50.424262
2374 12:24:50.425998 end: 2.2.4 bootloader-commands (duration 00:00:56) [common]
2375 12:24:50.426494 start: 2.2.5 auto-login-action (timeout 00:03:49) [common]
2376 12:24:50.426865 Setting prompt string to ['Linux version [0-9]']
2377 12:24:50.427194 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2378 12:24:50.427535 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2380 12:28:39.427464 end: 2.2.5 auto-login-action (duration 00:03:49) [common]
2382 12:28:39.428532 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 229 seconds'
2384 12:28:39.429346 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2387 12:28:39.430760 end: 2 depthcharge-action (duration 00:05:00) [common]
2389 12:28:39.431870 Cleaning after the job
2390 12:28:39.431953 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11967642/tftp-deploy-dj30bm7f/ramdisk
2391 12:28:39.435716 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11967642/tftp-deploy-dj30bm7f/kernel
2392 12:28:39.437034 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11967642/tftp-deploy-dj30bm7f/modules
2393 12:28:39.437578 start: 4.1 power-off (timeout 00:00:30) [common]
2394 12:28:39.437738 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-1' '--port=1' '--command=off'
2395 12:28:39.517316 >> Command sent successfully.
2396 12:28:39.523879 Returned 0 in 0 seconds
2397 12:28:39.624885 end: 4.1 power-off (duration 00:00:00) [common]
2399 12:28:39.626457 start: 4.2 read-feedback (timeout 00:10:00) [common]
2400 12:28:39.627712 Listened to connection for namespace 'common' for up to 1s
2401 12:28:40.628634 Finalising connection for namespace 'common'
2402 12:28:40.629306 Disconnecting from shell: Finalise
2403 12:28:40.629723
2404 12:28:40.730945 end: 4.2 read-feedback (duration 00:00:01) [common]
2405 12:28:40.731566 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11967642
2406 12:28:40.804789 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11967642
2407 12:28:40.804991 JobError: Your job cannot terminate cleanly.