Boot log: asus-C436FA-Flip-hatch

    1 12:29:05.501595  lava-dispatcher, installed at version: 2023.10
    2 12:29:05.501800  start: 0 validate
    3 12:29:05.501929  Start time: 2023-11-08 12:29:05.501920+00:00 (UTC)
    4 12:29:05.502047  Using caching service: 'http://localhost/cache/?uri=%s'
    5 12:29:05.502174  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
    6 12:29:05.775911  Using caching service: 'http://localhost/cache/?uri=%s'
    7 12:29:05.776678  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.297-cip104-63-ge7301d2e196ae%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
    8 12:29:06.050367  Using caching service: 'http://localhost/cache/?uri=%s'
    9 12:29:06.051101  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 12:29:06.326997  Using caching service: 'http://localhost/cache/?uri=%s'
   11 12:29:06.327797  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.297-cip104-63-ge7301d2e196ae%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
   12 12:29:06.607371  validate duration: 1.11
   14 12:29:06.607660  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 12:29:06.607758  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 12:29:06.607843  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 12:29:06.607963  Not decompressing ramdisk as can be used compressed.
   18 12:29:06.608046  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20230623.0/amd64/initrd.cpio.gz
   19 12:29:06.608113  saving as /var/lib/lava/dispatcher/tmp/11967727/tftp-deploy-wfcot0l_/ramdisk/initrd.cpio.gz
   20 12:29:06.608175  total size: 6134299 (5 MB)
   21 12:29:06.614907  progress   0 % (0 MB)
   22 12:29:06.624890  progress   5 % (0 MB)
   23 12:29:06.634096  progress  10 % (0 MB)
   24 12:29:06.642964  progress  15 % (0 MB)
   25 12:29:06.648259  progress  20 % (1 MB)
   26 12:29:06.652654  progress  25 % (1 MB)
   27 12:29:06.656534  progress  30 % (1 MB)
   28 12:29:06.659503  progress  35 % (2 MB)
   29 12:29:06.662366  progress  40 % (2 MB)
   30 12:29:06.665161  progress  45 % (2 MB)
   31 12:29:06.667540  progress  50 % (2 MB)
   32 12:29:06.669733  progress  55 % (3 MB)
   33 12:29:06.672107  progress  60 % (3 MB)
   34 12:29:06.674123  progress  65 % (3 MB)
   35 12:29:06.676257  progress  70 % (4 MB)
   36 12:29:06.678070  progress  75 % (4 MB)
   37 12:29:06.679807  progress  80 % (4 MB)
   38 12:29:06.681751  progress  85 % (5 MB)
   39 12:29:06.683336  progress  90 % (5 MB)
   40 12:29:06.684930  progress  95 % (5 MB)
   41 12:29:06.686702  progress 100 % (5 MB)
   42 12:29:06.686842  5 MB downloaded in 0.08 s (74.37 MB/s)
   43 12:29:06.686991  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 12:29:06.687228  end: 1.1 download-retry (duration 00:00:00) [common]
   46 12:29:06.687312  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 12:29:06.687395  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 12:29:06.687531  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.297-cip104-63-ge7301d2e196ae/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
   49 12:29:06.687599  saving as /var/lib/lava/dispatcher/tmp/11967727/tftp-deploy-wfcot0l_/kernel/bzImage
   50 12:29:06.687659  total size: 11571200 (11 MB)
   51 12:29:06.687719  No compression specified
   52 12:29:06.688876  progress   0 % (0 MB)
   53 12:29:06.691798  progress   5 % (0 MB)
   54 12:29:06.694977  progress  10 % (1 MB)
   55 12:29:06.697902  progress  15 % (1 MB)
   56 12:29:06.700976  progress  20 % (2 MB)
   57 12:29:06.704049  progress  25 % (2 MB)
   58 12:29:06.706953  progress  30 % (3 MB)
   59 12:29:06.710037  progress  35 % (3 MB)
   60 12:29:06.713167  progress  40 % (4 MB)
   61 12:29:06.716072  progress  45 % (4 MB)
   62 12:29:06.719142  progress  50 % (5 MB)
   63 12:29:06.722290  progress  55 % (6 MB)
   64 12:29:06.725277  progress  60 % (6 MB)
   65 12:29:06.728314  progress  65 % (7 MB)
   66 12:29:06.731480  progress  70 % (7 MB)
   67 12:29:06.734337  progress  75 % (8 MB)
   68 12:29:06.737382  progress  80 % (8 MB)
   69 12:29:06.740670  progress  85 % (9 MB)
   70 12:29:06.743765  progress  90 % (9 MB)
   71 12:29:06.746873  progress  95 % (10 MB)
   72 12:29:06.750078  progress 100 % (11 MB)
   73 12:29:06.750226  11 MB downloaded in 0.06 s (176.39 MB/s)
   74 12:29:06.750406  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 12:29:06.750665  end: 1.2 download-retry (duration 00:00:00) [common]
   77 12:29:06.750756  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 12:29:06.750850  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 12:29:06.750999  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20230623.0/amd64/full.rootfs.tar.xz
   80 12:29:06.751067  saving as /var/lib/lava/dispatcher/tmp/11967727/tftp-deploy-wfcot0l_/nfsrootfs/full.rootfs.tar
   81 12:29:06.751128  total size: 202699900 (193 MB)
   82 12:29:06.751189  Using unxz to decompress xz
   83 12:29:06.759524  progress   0 % (0 MB)
   84 12:29:07.332836  progress   5 % (9 MB)
   85 12:29:07.852546  progress  10 % (19 MB)
   86 12:29:08.423726  progress  15 % (29 MB)
   87 12:29:08.695437  progress  20 % (38 MB)
   88 12:29:09.222383  progress  25 % (48 MB)
   89 12:29:09.774779  progress  30 % (58 MB)
   90 12:29:10.329786  progress  35 % (67 MB)
   91 12:29:10.871881  progress  40 % (77 MB)
   92 12:29:11.426904  progress  45 % (87 MB)
   93 12:29:12.011457  progress  50 % (96 MB)
   94 12:29:12.601209  progress  55 % (106 MB)
   95 12:29:13.262314  progress  60 % (116 MB)
   96 12:29:13.680168  progress  65 % (125 MB)
   97 12:29:13.771460  progress  70 % (135 MB)
   98 12:29:13.914999  progress  75 % (145 MB)
   99 12:29:13.996248  progress  80 % (154 MB)
  100 12:29:14.048009  progress  85 % (164 MB)
  101 12:29:14.137516  progress  90 % (174 MB)
  102 12:29:14.489992  progress  95 % (183 MB)
  103 12:29:15.066973  progress 100 % (193 MB)
  104 12:29:15.073273  193 MB downloaded in 8.32 s (23.23 MB/s)
  105 12:29:15.073521  end: 1.3.1 http-download (duration 00:00:08) [common]
  107 12:29:15.073799  end: 1.3 download-retry (duration 00:00:08) [common]
  108 12:29:15.073947  start: 1.4 download-retry (timeout 00:09:52) [common]
  109 12:29:15.074065  start: 1.4.1 http-download (timeout 00:09:52) [common]
  110 12:29:15.074232  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.297-cip104-63-ge7301d2e196ae/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
  111 12:29:15.074305  saving as /var/lib/lava/dispatcher/tmp/11967727/tftp-deploy-wfcot0l_/modules/modules.tar
  112 12:29:15.074366  total size: 483720 (0 MB)
  113 12:29:15.074430  Using unxz to decompress xz
  114 12:29:15.078555  progress   6 % (0 MB)
  115 12:29:15.078985  progress  13 % (0 MB)
  116 12:29:15.079282  progress  20 % (0 MB)
  117 12:29:15.080971  progress  27 % (0 MB)
  118 12:29:15.082953  progress  33 % (0 MB)
  119 12:29:15.084924  progress  40 % (0 MB)
  120 12:29:15.086825  progress  47 % (0 MB)
  121 12:29:15.088751  progress  54 % (0 MB)
  122 12:29:15.090677  progress  60 % (0 MB)
  123 12:29:15.092692  progress  67 % (0 MB)
  124 12:29:15.094612  progress  74 % (0 MB)
  125 12:29:15.096638  progress  81 % (0 MB)
  126 12:29:15.098491  progress  88 % (0 MB)
  127 12:29:15.100424  progress  94 % (0 MB)
  128 12:29:15.102775  progress 100 % (0 MB)
  129 12:29:15.109058  0 MB downloaded in 0.03 s (13.30 MB/s)
  130 12:29:15.109307  end: 1.4.1 http-download (duration 00:00:00) [common]
  132 12:29:15.109595  end: 1.4 download-retry (duration 00:00:00) [common]
  133 12:29:15.109702  start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
  134 12:29:15.109816  start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
  135 12:29:18.706153  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11967727/extract-nfsrootfs-asdd338l
  136 12:29:18.706358  end: 1.5.1 extract-nfsrootfs (duration 00:00:04) [common]
  137 12:29:18.706459  start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
  138 12:29:18.706626  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11967727/lava-overlay-877xgpqb
  139 12:29:18.706756  makedir: /var/lib/lava/dispatcher/tmp/11967727/lava-overlay-877xgpqb/lava-11967727/bin
  140 12:29:18.706856  makedir: /var/lib/lava/dispatcher/tmp/11967727/lava-overlay-877xgpqb/lava-11967727/tests
  141 12:29:18.706953  makedir: /var/lib/lava/dispatcher/tmp/11967727/lava-overlay-877xgpqb/lava-11967727/results
  142 12:29:18.707053  Creating /var/lib/lava/dispatcher/tmp/11967727/lava-overlay-877xgpqb/lava-11967727/bin/lava-add-keys
  143 12:29:18.707195  Creating /var/lib/lava/dispatcher/tmp/11967727/lava-overlay-877xgpqb/lava-11967727/bin/lava-add-sources
  144 12:29:18.707323  Creating /var/lib/lava/dispatcher/tmp/11967727/lava-overlay-877xgpqb/lava-11967727/bin/lava-background-process-start
  145 12:29:18.707451  Creating /var/lib/lava/dispatcher/tmp/11967727/lava-overlay-877xgpqb/lava-11967727/bin/lava-background-process-stop
  146 12:29:18.707582  Creating /var/lib/lava/dispatcher/tmp/11967727/lava-overlay-877xgpqb/lava-11967727/bin/lava-common-functions
  147 12:29:18.707706  Creating /var/lib/lava/dispatcher/tmp/11967727/lava-overlay-877xgpqb/lava-11967727/bin/lava-echo-ipv4
  148 12:29:18.707829  Creating /var/lib/lava/dispatcher/tmp/11967727/lava-overlay-877xgpqb/lava-11967727/bin/lava-install-packages
  149 12:29:18.707952  Creating /var/lib/lava/dispatcher/tmp/11967727/lava-overlay-877xgpqb/lava-11967727/bin/lava-installed-packages
  150 12:29:18.708074  Creating /var/lib/lava/dispatcher/tmp/11967727/lava-overlay-877xgpqb/lava-11967727/bin/lava-os-build
  151 12:29:18.708196  Creating /var/lib/lava/dispatcher/tmp/11967727/lava-overlay-877xgpqb/lava-11967727/bin/lava-probe-channel
  152 12:29:18.708319  Creating /var/lib/lava/dispatcher/tmp/11967727/lava-overlay-877xgpqb/lava-11967727/bin/lava-probe-ip
  153 12:29:18.708475  Creating /var/lib/lava/dispatcher/tmp/11967727/lava-overlay-877xgpqb/lava-11967727/bin/lava-target-ip
  154 12:29:18.708597  Creating /var/lib/lava/dispatcher/tmp/11967727/lava-overlay-877xgpqb/lava-11967727/bin/lava-target-mac
  155 12:29:18.708719  Creating /var/lib/lava/dispatcher/tmp/11967727/lava-overlay-877xgpqb/lava-11967727/bin/lava-target-storage
  156 12:29:18.708844  Creating /var/lib/lava/dispatcher/tmp/11967727/lava-overlay-877xgpqb/lava-11967727/bin/lava-test-case
  157 12:29:18.708969  Creating /var/lib/lava/dispatcher/tmp/11967727/lava-overlay-877xgpqb/lava-11967727/bin/lava-test-event
  158 12:29:18.709090  Creating /var/lib/lava/dispatcher/tmp/11967727/lava-overlay-877xgpqb/lava-11967727/bin/lava-test-feedback
  159 12:29:18.709213  Creating /var/lib/lava/dispatcher/tmp/11967727/lava-overlay-877xgpqb/lava-11967727/bin/lava-test-raise
  160 12:29:18.709334  Creating /var/lib/lava/dispatcher/tmp/11967727/lava-overlay-877xgpqb/lava-11967727/bin/lava-test-reference
  161 12:29:18.709460  Creating /var/lib/lava/dispatcher/tmp/11967727/lava-overlay-877xgpqb/lava-11967727/bin/lava-test-runner
  162 12:29:18.709583  Creating /var/lib/lava/dispatcher/tmp/11967727/lava-overlay-877xgpqb/lava-11967727/bin/lava-test-set
  163 12:29:18.709707  Creating /var/lib/lava/dispatcher/tmp/11967727/lava-overlay-877xgpqb/lava-11967727/bin/lava-test-shell
  164 12:29:18.709832  Updating /var/lib/lava/dispatcher/tmp/11967727/lava-overlay-877xgpqb/lava-11967727/bin/lava-add-keys (debian)
  165 12:29:18.709982  Updating /var/lib/lava/dispatcher/tmp/11967727/lava-overlay-877xgpqb/lava-11967727/bin/lava-add-sources (debian)
  166 12:29:18.710119  Updating /var/lib/lava/dispatcher/tmp/11967727/lava-overlay-877xgpqb/lava-11967727/bin/lava-install-packages (debian)
  167 12:29:18.710256  Updating /var/lib/lava/dispatcher/tmp/11967727/lava-overlay-877xgpqb/lava-11967727/bin/lava-installed-packages (debian)
  168 12:29:18.710392  Updating /var/lib/lava/dispatcher/tmp/11967727/lava-overlay-877xgpqb/lava-11967727/bin/lava-os-build (debian)
  169 12:29:18.710509  Creating /var/lib/lava/dispatcher/tmp/11967727/lava-overlay-877xgpqb/lava-11967727/environment
  170 12:29:18.710602  LAVA metadata
  171 12:29:18.710669  - LAVA_JOB_ID=11967727
  172 12:29:18.710730  - LAVA_DISPATCHER_IP=192.168.201.1
  173 12:29:18.710826  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
  174 12:29:18.710891  skipped lava-vland-overlay
  175 12:29:18.710962  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  176 12:29:18.711039  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
  177 12:29:18.711098  skipped lava-multinode-overlay
  178 12:29:18.711167  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  179 12:29:18.711259  start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
  180 12:29:18.711329  Loading test definitions
  181 12:29:18.711414  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:48) [common]
  182 12:29:18.711483  Using /lava-11967727 at stage 0
  183 12:29:18.711762  uuid=11967727_1.5.2.3.1 testdef=None
  184 12:29:18.711848  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  185 12:29:18.711930  start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
  186 12:29:18.712554  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  188 12:29:18.712767  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
  189 12:29:18.713316  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  191 12:29:18.713544  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
  192 12:29:18.714113  runner path: /var/lib/lava/dispatcher/tmp/11967727/lava-overlay-877xgpqb/lava-11967727/0/tests/0_timesync-off test_uuid 11967727_1.5.2.3.1
  193 12:29:18.714265  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  195 12:29:18.714483  start: 1.5.2.3.5 git-repo-action (timeout 00:09:48) [common]
  196 12:29:18.714553  Using /lava-11967727 at stage 0
  197 12:29:18.714646  Fetching tests from https://github.com/kernelci/test-definitions.git
  198 12:29:18.714722  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/11967727/lava-overlay-877xgpqb/lava-11967727/0/tests/1_kselftest-alsa'
  199 12:29:26.231409  Running '/usr/bin/git checkout kernelci.org
  200 12:29:26.374907  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/11967727/lava-overlay-877xgpqb/lava-11967727/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
  201 12:29:26.375674  uuid=11967727_1.5.2.3.5 testdef=None
  202 12:29:26.375834  end: 1.5.2.3.5 git-repo-action (duration 00:00:08) [common]
  204 12:29:26.376087  start: 1.5.2.3.6 test-overlay (timeout 00:09:40) [common]
  205 12:29:26.376884  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  207 12:29:26.377114  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:40) [common]
  208 12:29:26.378072  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  210 12:29:26.378328  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:40) [common]
  211 12:29:26.379286  runner path: /var/lib/lava/dispatcher/tmp/11967727/lava-overlay-877xgpqb/lava-11967727/0/tests/1_kselftest-alsa test_uuid 11967727_1.5.2.3.5
  212 12:29:26.379378  BOARD='asus-C436FA-Flip-hatch'
  213 12:29:26.379443  BRANCH='cip-gitlab'
  214 12:29:26.379502  SKIPFILE='/dev/null'
  215 12:29:26.379560  SKIP_INSTALL='True'
  216 12:29:26.379619  TESTPROG_URL='None'
  217 12:29:26.379674  TST_CASENAME=''
  218 12:29:26.379729  TST_CMDFILES='alsa'
  219 12:29:26.379868  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  221 12:29:26.380069  Creating lava-test-runner.conf files
  222 12:29:26.380133  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11967727/lava-overlay-877xgpqb/lava-11967727/0 for stage 0
  223 12:29:26.380225  - 0_timesync-off
  224 12:29:26.380293  - 1_kselftest-alsa
  225 12:29:26.380443  end: 1.5.2.3 test-definition (duration 00:00:08) [common]
  226 12:29:26.380535  start: 1.5.2.4 compress-overlay (timeout 00:09:40) [common]
  227 12:29:33.737653  end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
  228 12:29:33.737811  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:33) [common]
  229 12:29:33.737909  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  230 12:29:33.738009  end: 1.5.2 lava-overlay (duration 00:00:15) [common]
  231 12:29:33.738100  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:33) [common]
  232 12:29:33.895943  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  233 12:29:33.896367  start: 1.5.4 extract-modules (timeout 00:09:33) [common]
  234 12:29:33.896506  extracting modules file /var/lib/lava/dispatcher/tmp/11967727/tftp-deploy-wfcot0l_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11967727/extract-nfsrootfs-asdd338l
  235 12:29:33.917338  extracting modules file /var/lib/lava/dispatcher/tmp/11967727/tftp-deploy-wfcot0l_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11967727/extract-overlay-ramdisk-9bvrvjhh/ramdisk
  236 12:29:33.938004  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  237 12:29:33.938133  start: 1.5.5 apply-overlay-tftp (timeout 00:09:33) [common]
  238 12:29:33.938228  [common] Applying overlay to NFS
  239 12:29:33.938300  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11967727/compress-overlay-vnjw69rq/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11967727/extract-nfsrootfs-asdd338l
  240 12:29:34.855517  end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
  241 12:29:34.855689  start: 1.5.6 configure-preseed-file (timeout 00:09:32) [common]
  242 12:29:34.855787  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  243 12:29:34.855877  start: 1.5.7 compress-ramdisk (timeout 00:09:32) [common]
  244 12:29:34.855956  Building ramdisk /var/lib/lava/dispatcher/tmp/11967727/extract-overlay-ramdisk-9bvrvjhh/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11967727/extract-overlay-ramdisk-9bvrvjhh/ramdisk
  245 12:29:34.959251  >> 34863 blocks

  246 12:29:35.641330  rename /var/lib/lava/dispatcher/tmp/11967727/extract-overlay-ramdisk-9bvrvjhh/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11967727/tftp-deploy-wfcot0l_/ramdisk/ramdisk.cpio.gz
  247 12:29:35.641781  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  248 12:29:35.641920  start: 1.5.8 prepare-kernel (timeout 00:09:31) [common]
  249 12:29:35.642024  start: 1.5.8.1 prepare-fit (timeout 00:09:31) [common]
  250 12:29:35.642116  No mkimage arch provided, not using FIT.
  251 12:29:35.642206  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  252 12:29:35.642290  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  253 12:29:35.642392  end: 1.5 prepare-tftp-overlay (duration 00:00:21) [common]
  254 12:29:35.642486  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:31) [common]
  255 12:29:35.642567  No LXC device requested
  256 12:29:35.642651  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  257 12:29:35.642739  start: 1.7 deploy-device-env (timeout 00:09:31) [common]
  258 12:29:35.642820  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  259 12:29:35.642893  Checking files for TFTP limit of 4294967296 bytes.
  260 12:29:35.643304  end: 1 tftp-deploy (duration 00:00:29) [common]
  261 12:29:35.643407  start: 2 depthcharge-action (timeout 00:05:00) [common]
  262 12:29:35.643497  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  263 12:29:35.643620  substitutions:
  264 12:29:35.643687  - {DTB}: None
  265 12:29:35.643749  - {INITRD}: 11967727/tftp-deploy-wfcot0l_/ramdisk/ramdisk.cpio.gz
  266 12:29:35.643808  - {KERNEL}: 11967727/tftp-deploy-wfcot0l_/kernel/bzImage
  267 12:29:35.643864  - {LAVA_MAC}: None
  268 12:29:35.643926  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11967727/extract-nfsrootfs-asdd338l
  269 12:29:35.643997  - {NFS_SERVER_IP}: 192.168.201.1
  270 12:29:35.644053  - {PRESEED_CONFIG}: None
  271 12:29:35.644107  - {PRESEED_LOCAL}: None
  272 12:29:35.644160  - {RAMDISK}: 11967727/tftp-deploy-wfcot0l_/ramdisk/ramdisk.cpio.gz
  273 12:29:35.644214  - {ROOT_PART}: None
  274 12:29:35.644268  - {ROOT}: None
  275 12:29:35.644321  - {SERVER_IP}: 192.168.201.1
  276 12:29:35.644414  - {TEE}: None
  277 12:29:35.644468  Parsed boot commands:
  278 12:29:35.644521  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  279 12:29:35.644697  Parsed boot commands: tftpboot 192.168.201.1 11967727/tftp-deploy-wfcot0l_/kernel/bzImage 11967727/tftp-deploy-wfcot0l_/kernel/cmdline 11967727/tftp-deploy-wfcot0l_/ramdisk/ramdisk.cpio.gz
  280 12:29:35.644783  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  281 12:29:35.644869  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  282 12:29:35.644965  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  283 12:29:35.645050  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  284 12:29:35.645122  Not connected, no need to disconnect.
  285 12:29:35.645195  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  286 12:29:35.645276  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  287 12:29:35.645345  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-0'
  288 12:29:35.649420  Setting prompt string to ['lava-test: # ']
  289 12:29:35.649798  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  290 12:29:35.649910  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  291 12:29:35.650030  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  292 12:29:35.650117  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  293 12:29:35.650316  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
  294 12:29:40.804681  >> Command sent successfully.

  295 12:29:40.811086  Returned 0 in 5 seconds
  296 12:29:40.911985  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  298 12:29:40.913569  end: 2.2.2 reset-device (duration 00:00:05) [common]
  299 12:29:40.914161  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  300 12:29:40.914689  Setting prompt string to 'Starting depthcharge on Helios...'
  301 12:29:40.915263  Changing prompt to 'Starting depthcharge on Helios...'
  302 12:29:40.915684  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  303 12:29:40.917080  [Enter `^Ec?' for help]

  304 12:29:41.528298  

  305 12:29:41.529019  

  306 12:29:41.538734  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  307 12:29:41.542273  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  308 12:29:41.549057  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  309 12:29:41.551933  CPU: AES supported, TXT NOT supported, VT supported

  310 12:29:41.558848  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  311 12:29:41.561974  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  312 12:29:41.568846  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  313 12:29:41.572058  VBOOT: Loading verstage.

  314 12:29:41.575523  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  315 12:29:41.582465  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  316 12:29:41.585648  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  317 12:29:41.588729  CBFS @ c08000 size 3f8000

  318 12:29:41.595325  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  319 12:29:41.598588  CBFS: Locating 'fallback/verstage'

  320 12:29:41.602072  CBFS: Found @ offset 10fb80 size 1072c

  321 12:29:41.605546  

  322 12:29:41.606111  

  323 12:29:41.615508  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  324 12:29:41.629946  Probing TPM: . done!

  325 12:29:41.632892  TPM ready after 0 ms

  326 12:29:41.635916  Connected to device vid:did:rid of 1ae0:0028:00

  327 12:29:41.646666  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  328 12:29:41.650280  Initialized TPM device CR50 revision 0

  329 12:29:41.709669  tlcl_send_startup: Startup return code is 0

  330 12:29:41.710236  TPM: setup succeeded

  331 12:29:41.722654  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  332 12:29:41.726604  Chrome EC: UHEPI supported

  333 12:29:41.729542  Phase 1

  334 12:29:41.732469  FMAP: area GBB found @ c05000 (12288 bytes)

  335 12:29:41.739811  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  336 12:29:41.742907  Phase 2

  337 12:29:41.743471  Phase 3

  338 12:29:41.746316  FMAP: area GBB found @ c05000 (12288 bytes)

  339 12:29:41.753216  VB2:vb2_report_dev_firmware() This is developer signed firmware

  340 12:29:41.759410  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  341 12:29:41.762727  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  342 12:29:41.769735  VB2:vb2_verify_keyblock() Checking keyblock signature...

  343 12:29:41.785129  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  344 12:29:41.788132  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  345 12:29:41.795355  VB2:vb2_verify_fw_preamble() Verifying preamble.

  346 12:29:41.799082  Phase 4

  347 12:29:41.803055  FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)

  348 12:29:41.809285  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  349 12:29:41.988456  VB2:vb2_rsa_verify_digest() Digest check failed!

  350 12:29:41.995517  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7

  351 12:29:41.996081  Saving nvdata

  352 12:29:41.998376  Reboot requested (10020007)

  353 12:29:42.001937  board_reset() called!

  354 12:29:42.002498  full_reset() called!

  355 12:29:46.495917  

  356 12:29:46.496527  

  357 12:29:46.505703  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  358 12:29:46.509246  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  359 12:29:46.516417  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  360 12:29:46.519131  CPU: AES supported, TXT NOT supported, VT supported

  361 12:29:46.526269  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  362 12:29:46.529280  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  363 12:29:46.535629  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  364 12:29:46.538566  VBOOT: Loading verstage.

  365 12:29:46.542123  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  366 12:29:46.549039  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  367 12:29:46.552738  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  368 12:29:46.555508  CBFS @ c08000 size 3f8000

  369 12:29:46.561948  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  370 12:29:46.565569  CBFS: Locating 'fallback/verstage'

  371 12:29:46.568741  CBFS: Found @ offset 10fb80 size 1072c

  372 12:29:46.572416  

  373 12:29:46.572979  

  374 12:29:46.583043  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  375 12:29:46.596636  Probing TPM: . done!

  376 12:29:46.599843  TPM ready after 0 ms

  377 12:29:46.603465  Connected to device vid:did:rid of 1ae0:0028:00

  378 12:29:46.613986  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  379 12:29:46.616961  Initialized TPM device CR50 revision 0

  380 12:29:46.676567  tlcl_send_startup: Startup return code is 0

  381 12:29:46.677156  TPM: setup succeeded

  382 12:29:46.689328  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  383 12:29:46.693487  Chrome EC: UHEPI supported

  384 12:29:46.696580  Phase 1

  385 12:29:46.700071  FMAP: area GBB found @ c05000 (12288 bytes)

  386 12:29:46.706448  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  387 12:29:46.713192  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  388 12:29:46.716183  Recovery requested (1009000e)

  389 12:29:46.722852  Saving nvdata

  390 12:29:46.728934  tlcl_extend: response is 0

  391 12:29:46.738237  tlcl_extend: response is 0

  392 12:29:46.745009  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  393 12:29:46.747738  CBFS @ c08000 size 3f8000

  394 12:29:46.754463  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  395 12:29:46.757191  CBFS: Locating 'fallback/romstage'

  396 12:29:46.760973  CBFS: Found @ offset 80 size 145fc

  397 12:29:46.764979  Accumulated console time in verstage 98 ms

  398 12:29:46.765566  

  399 12:29:46.765941  

  400 12:29:46.777842  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...

  401 12:29:46.784190  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  402 12:29:46.787510  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  403 12:29:46.790838  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  404 12:29:46.797237  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000

  405 12:29:46.800849  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  406 12:29:46.803706  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000

  407 12:29:46.807242  TCO_STS:   0000 0000

  408 12:29:46.810688  GEN_PMCON: e0015238 00000200

  409 12:29:46.814185  GBLRST_CAUSE: 00000000 00000000

  410 12:29:46.814750  prev_sleep_state 5

  411 12:29:46.816761  Boot Count incremented to 72760

  412 12:29:46.824025  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  413 12:29:46.827050  CBFS @ c08000 size 3f8000

  414 12:29:46.834089  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  415 12:29:46.834648  CBFS: Locating 'fspm.bin'

  416 12:29:46.840157  CBFS: Found @ offset 5ffc0 size 71000

  417 12:29:46.843822  Chrome EC: UHEPI supported

  418 12:29:46.850650  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

  419 12:29:46.853926  Probing TPM:  done!

  420 12:29:46.861054  Connected to device vid:did:rid of 1ae0:0028:00

  421 12:29:46.870539  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  422 12:29:46.876589  Initialized TPM device CR50 revision 0

  423 12:29:46.885796  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  424 12:29:46.891698  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  425 12:29:46.895274  MRC cache found, size 1948

  426 12:29:46.898276  bootmode is set to: 2

  427 12:29:46.901656  PRMRR disabled by config.

  428 12:29:46.902122  SPD INDEX = 1

  429 12:29:46.908308  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  430 12:29:46.911904  CBFS @ c08000 size 3f8000

  431 12:29:46.918231  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  432 12:29:46.918796  CBFS: Locating 'spd.bin'

  433 12:29:46.921795  CBFS: Found @ offset 5fb80 size 400

  434 12:29:46.925105  SPD: module type is LPDDR3

  435 12:29:46.928684  SPD: module part is 

  436 12:29:46.934737  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb

  437 12:29:46.938208  SPD: device width 4 bits, bus width 8 bits

  438 12:29:46.941813  SPD: module size is 4096 MB (per channel)

  439 12:29:46.945341  memory slot: 0 configuration done.

  440 12:29:46.948485  memory slot: 2 configuration done.

  441 12:29:47.000368  CBMEM:

  442 12:29:47.002904  IMD: root @ 99fff000 254 entries.

  443 12:29:47.006917  IMD: root @ 99ffec00 62 entries.

  444 12:29:47.009574  External stage cache:

  445 12:29:47.012903  IMD: root @ 9abff000 254 entries.

  446 12:29:47.016354  IMD: root @ 9abfec00 62 entries.

  447 12:29:47.019820  Chrome EC: clear events_b mask to 0x0000000020004000

  448 12:29:47.035721  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  449 12:29:47.049307  tlcl_write: response is 0

  450 12:29:47.057947  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  451 12:29:47.064597  MRC: TPM MRC hash updated successfully.

  452 12:29:47.065025  2 DIMMs found

  453 12:29:47.068418  SMM Memory Map

  454 12:29:47.071060  SMRAM       : 0x9a000000 0x1000000

  455 12:29:47.075073   Subregion 0: 0x9a000000 0xa00000

  456 12:29:47.077743   Subregion 1: 0x9aa00000 0x200000

  457 12:29:47.081160   Subregion 2: 0x9ac00000 0x400000

  458 12:29:47.084709  top_of_ram = 0x9a000000

  459 12:29:47.087658  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)

  460 12:29:47.094461  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)

  461 12:29:47.098012  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  462 12:29:47.104668  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  463 12:29:47.107437  CBFS @ c08000 size 3f8000

  464 12:29:47.110908  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  465 12:29:47.114362  CBFS: Locating 'fallback/postcar'

  466 12:29:47.121175  CBFS: Found @ offset 107000 size 4b44

  467 12:29:47.124425  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)

  468 12:29:47.137244  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8

  469 12:29:47.140319  Processing 180 relocs. Offset value of 0x97c0c000

  470 12:29:47.149070  Accumulated console time in romstage 286 ms

  471 12:29:47.149640  

  472 12:29:47.150009  

  473 12:29:47.158834  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...

  474 12:29:47.165638  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  475 12:29:47.169019  CBFS @ c08000 size 3f8000

  476 12:29:47.171849  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  477 12:29:47.178535  CBFS: Locating 'fallback/ramstage'

  478 12:29:47.182136  CBFS: Found @ offset 43380 size 1b9e8

  479 12:29:47.189236  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)

  480 12:29:47.220601  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38

  481 12:29:47.223745  Processing 3976 relocs. Offset value of 0x98db0000

  482 12:29:47.230613  Accumulated console time in postcar 52 ms

  483 12:29:47.231174  

  484 12:29:47.231547  

  485 12:29:47.240830  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...

  486 12:29:47.247429  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  487 12:29:47.250669  WARNING: RO_VPD is uninitialized or empty.

  488 12:29:47.253869  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  489 12:29:47.260510  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  490 12:29:47.261076  Normal boot.

  491 12:29:47.267498  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

  492 12:29:47.270871  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  493 12:29:47.274185  CBFS @ c08000 size 3f8000

  494 12:29:47.280894  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  495 12:29:47.283502  CBFS: Locating 'cpu_microcode_blob.bin'

  496 12:29:47.287646  CBFS: Found @ offset 14700 size 2ec00

  497 12:29:47.290250  microcode: sig=0x806ec pf=0x4 revision=0xc9

  498 12:29:47.293999  Skip microcode update

  499 12:29:47.296758  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  500 12:29:47.300143  CBFS @ c08000 size 3f8000

  501 12:29:47.306802  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  502 12:29:47.310489  CBFS: Locating 'fsps.bin'

  503 12:29:47.313934  CBFS: Found @ offset d1fc0 size 35000

  504 12:29:47.338714  Detected 4 core, 8 thread CPU.

  505 12:29:47.341774  Setting up SMI for CPU

  506 12:29:47.345247  IED base = 0x9ac00000

  507 12:29:47.345807  IED size = 0x00400000

  508 12:29:47.349267  Will perform SMM setup.

  509 12:29:47.355292  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.

  510 12:29:47.362070  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  511 12:29:47.364797  Processing 16 relocs. Offset value of 0x00030000

  512 12:29:47.369157  Attempting to start 7 APs

  513 12:29:47.372093  Waiting for 10ms after sending INIT.

  514 12:29:47.388373  Waiting for 1st SIPI to complete...done.

  515 12:29:47.388942  AP: slot 6 apic_id 4.

  516 12:29:47.392099  AP: slot 7 apic_id 5.

  517 12:29:47.395282  Waiting for 2nd SIPI to complete...done.

  518 12:29:47.398180  AP: slot 3 apic_id 1.

  519 12:29:47.401610  AP: slot 4 apic_id 2.

  520 12:29:47.402219  AP: slot 1 apic_id 3.

  521 12:29:47.405029  AP: slot 2 apic_id 6.

  522 12:29:47.408263  AP: slot 5 apic_id 7.

  523 12:29:47.414979  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  524 12:29:47.421506  Processing 13 relocs. Offset value of 0x00038000

  525 12:29:47.425285  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)

  526 12:29:47.431704  Installing SMM handler to 0x9a000000

  527 12:29:47.438961  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58

  528 12:29:47.441323  Processing 658 relocs. Offset value of 0x9a010000

  529 12:29:47.451206  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8

  530 12:29:47.455279  Processing 13 relocs. Offset value of 0x9a008000

  531 12:29:47.461635  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd

  532 12:29:47.468304  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd

  533 12:29:47.471606  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd

  534 12:29:47.478149  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd

  535 12:29:47.484380  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd

  536 12:29:47.491579  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd

  537 12:29:47.494754  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd

  538 12:29:47.501271  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)

  539 12:29:47.504961  Clearing SMI status registers

  540 12:29:47.507803  SMI_STS: PM1 

  541 12:29:47.508269  PM1_STS: PWRBTN 

  542 12:29:47.510926  TCO_STS: SECOND_TO 

  543 12:29:47.514801  New SMBASE 0x9a000000

  544 12:29:47.518261  In relocation handler: CPU 0

  545 12:29:47.521244  New SMBASE=0x9a000000 IEDBASE=0x9ac00000

  546 12:29:47.525147  Writing SMRR. base = 0x9a000006, mask=0xff000800

  547 12:29:47.528232  Relocation complete.

  548 12:29:47.531094  New SMBASE 0x99fff400

  549 12:29:47.531567  In relocation handler: CPU 3

  550 12:29:47.538732  New SMBASE=0x99fff400 IEDBASE=0x9ac00000

  551 12:29:47.541408  Writing SMRR. base = 0x9a000006, mask=0xff000800

  552 12:29:47.545211  Relocation complete.

  553 12:29:47.547941  New SMBASE 0x99fff000

  554 12:29:47.548452  In relocation handler: CPU 4

  555 12:29:47.555122  New SMBASE=0x99fff000 IEDBASE=0x9ac00000

  556 12:29:47.558177  Writing SMRR. base = 0x9a000006, mask=0xff000800

  557 12:29:47.561015  Relocation complete.

  558 12:29:47.561583  New SMBASE 0x99fffc00

  559 12:29:47.564517  In relocation handler: CPU 1

  560 12:29:47.571055  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000

  561 12:29:47.574228  Writing SMRR. base = 0x9a000006, mask=0xff000800

  562 12:29:47.577725  Relocation complete.

  563 12:29:47.578293  New SMBASE 0x99ffec00

  564 12:29:47.581046  In relocation handler: CPU 5

  565 12:29:47.584540  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000

  566 12:29:47.591611  Writing SMRR. base = 0x9a000006, mask=0xff000800

  567 12:29:47.594797  Relocation complete.

  568 12:29:47.595362  New SMBASE 0x99fff800

  569 12:29:47.597715  In relocation handler: CPU 2

  570 12:29:47.601384  New SMBASE=0x99fff800 IEDBASE=0x9ac00000

  571 12:29:47.607724  Writing SMRR. base = 0x9a000006, mask=0xff000800

  572 12:29:47.611325  Relocation complete.

  573 12:29:47.611897  New SMBASE 0x99ffe400

  574 12:29:47.614525  In relocation handler: CPU 7

  575 12:29:47.617615  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000

  576 12:29:47.625255  Writing SMRR. base = 0x9a000006, mask=0xff000800

  577 12:29:47.625826  Relocation complete.

  578 12:29:47.627273  New SMBASE 0x99ffe800

  579 12:29:47.631387  In relocation handler: CPU 6

  580 12:29:47.633978  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000

  581 12:29:47.641202  Writing SMRR. base = 0x9a000006, mask=0xff000800

  582 12:29:47.641672  Relocation complete.

  583 12:29:47.644620  Initializing CPU #0

  584 12:29:47.647633  CPU: vendor Intel device 806ec

  585 12:29:47.651370  CPU: family 06, model 8e, stepping 0c

  586 12:29:47.654207  Clearing out pending MCEs

  587 12:29:47.657784  Setting up local APIC...

  588 12:29:47.658540   apic_id: 0x00 done.

  589 12:29:47.661090  Turbo is available but hidden

  590 12:29:47.664200  Turbo is available and visible

  591 12:29:47.667381  VMX status: enabled

  592 12:29:47.671250  IA32_FEATURE_CONTROL status: locked

  593 12:29:47.673734  Skip microcode update

  594 12:29:47.674374  CPU #0 initialized

  595 12:29:47.677231  Initializing CPU #3

  596 12:29:47.677767  Initializing CPU #5

  597 12:29:47.680726  Initializing CPU #2

  598 12:29:47.683936  CPU: vendor Intel device 806ec

  599 12:29:47.687159  CPU: family 06, model 8e, stepping 0c

  600 12:29:47.690639  CPU: vendor Intel device 806ec

  601 12:29:47.693972  CPU: family 06, model 8e, stepping 0c

  602 12:29:47.697445  Clearing out pending MCEs

  603 12:29:47.700851  Clearing out pending MCEs

  604 12:29:47.703705  Setting up local APIC...

  605 12:29:47.704170  Initializing CPU #7

  606 12:29:47.707269  Initializing CPU #6

  607 12:29:47.710534  CPU: vendor Intel device 806ec

  608 12:29:47.713680  CPU: family 06, model 8e, stepping 0c

  609 12:29:47.717766  CPU: vendor Intel device 806ec

  610 12:29:47.720416  CPU: family 06, model 8e, stepping 0c

  611 12:29:47.723822  Clearing out pending MCEs

  612 12:29:47.727055  Clearing out pending MCEs

  613 12:29:47.727623  Setting up local APIC...

  614 12:29:47.730561  Initializing CPU #1

  615 12:29:47.733848  Initializing CPU #4

  616 12:29:47.736966  CPU: vendor Intel device 806ec

  617 12:29:47.740591  CPU: family 06, model 8e, stepping 0c

  618 12:29:47.743726  CPU: vendor Intel device 806ec

  619 12:29:47.747165  CPU: family 06, model 8e, stepping 0c

  620 12:29:47.750524  Clearing out pending MCEs

  621 12:29:47.751099  Clearing out pending MCEs

  622 12:29:47.753906  Setting up local APIC...

  623 12:29:47.757033  CPU: vendor Intel device 806ec

  624 12:29:47.760950  CPU: family 06, model 8e, stepping 0c

  625 12:29:47.763659  Clearing out pending MCEs

  626 12:29:47.766923  Setting up local APIC...

  627 12:29:47.770616  Setting up local APIC...

  628 12:29:47.771190   apic_id: 0x06 done.

  629 12:29:47.773341   apic_id: 0x07 done.

  630 12:29:47.773812  VMX status: enabled

  631 12:29:47.776906  VMX status: enabled

  632 12:29:47.780425  IA32_FEATURE_CONTROL status: locked

  633 12:29:47.783829   apic_id: 0x03 done.

  634 12:29:47.787248  Setting up local APIC...

  635 12:29:47.790136  IA32_FEATURE_CONTROL status: locked

  636 12:29:47.790703  Skip microcode update

  637 12:29:47.793304  Skip microcode update

  638 12:29:47.796667  CPU #2 initialized

  639 12:29:47.797135  CPU #5 initialized

  640 12:29:47.800188  VMX status: enabled

  641 12:29:47.800823   apic_id: 0x02 done.

  642 12:29:47.803520  IA32_FEATURE_CONTROL status: locked

  643 12:29:47.806686  VMX status: enabled

  644 12:29:47.810012  Skip microcode update

  645 12:29:47.813699  IA32_FEATURE_CONTROL status: locked

  646 12:29:47.814269  CPU #1 initialized

  647 12:29:47.816739  Skip microcode update

  648 12:29:47.820501  Setting up local APIC...

  649 12:29:47.823478   apic_id: 0x01 done.

  650 12:29:47.824050  CPU #4 initialized

  651 12:29:47.826588   apic_id: 0x05 done.

  652 12:29:47.827158   apic_id: 0x04 done.

  653 12:29:47.830433  VMX status: enabled

  654 12:29:47.833081  VMX status: enabled

  655 12:29:47.836691  IA32_FEATURE_CONTROL status: locked

  656 12:29:47.839692  IA32_FEATURE_CONTROL status: locked

  657 12:29:47.840181  Skip microcode update

  658 12:29:47.843303  Skip microcode update

  659 12:29:47.846634  CPU #7 initialized

  660 12:29:47.847209  CPU #6 initialized

  661 12:29:47.849719  VMX status: enabled

  662 12:29:47.853067  IA32_FEATURE_CONTROL status: locked

  663 12:29:47.856926  Skip microcode update

  664 12:29:47.857487  CPU #3 initialized

  665 12:29:47.863489  bsp_do_flight_plan done after 464 msecs.

  666 12:29:47.866104  CPU: frequency set to 4200 MHz

  667 12:29:47.866570  Enabling SMIs.

  668 12:29:47.866954  Locking SMM.

  669 12:29:47.882342  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  670 12:29:47.886362  CBFS @ c08000 size 3f8000

  671 12:29:47.892637  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  672 12:29:47.893200  CBFS: Locating 'vbt.bin'

  673 12:29:47.896161  CBFS: Found @ offset 5f5c0 size 499

  674 12:29:47.902683  Found a VBT of 4608 bytes after decompression

  675 12:29:48.086577  Display FSP Version Info HOB

  676 12:29:48.089889  Reference Code - CPU = 9.0.1e.30

  677 12:29:48.092989  uCode Version = 0.0.0.ca

  678 12:29:48.096810  TXT ACM version = ff.ff.ff.ffff

  679 12:29:48.100621  Display FSP Version Info HOB

  680 12:29:48.103247  Reference Code - ME = 9.0.1e.30

  681 12:29:48.106886  MEBx version = 0.0.0.0

  682 12:29:48.110427  ME Firmware Version = Consumer SKU

  683 12:29:48.113570  Display FSP Version Info HOB

  684 12:29:48.116320  Reference Code - CML PCH = 9.0.1e.30

  685 12:29:48.119889  PCH-CRID Status = Disabled

  686 12:29:48.123247  PCH-CRID Original Value = ff.ff.ff.ffff

  687 12:29:48.126067  PCH-CRID New Value = ff.ff.ff.ffff

  688 12:29:48.129833  OPROM - RST - RAID = ff.ff.ff.ffff

  689 12:29:48.133063  ChipsetInit Base Version = ff.ff.ff.ffff

  690 12:29:48.136072  ChipsetInit Oem Version = ff.ff.ff.ffff

  691 12:29:48.139641  Display FSP Version Info HOB

  692 12:29:48.146563  Reference Code - SA - System Agent = 9.0.1e.30

  693 12:29:48.150854  Reference Code - MRC = 0.7.1.6c

  694 12:29:48.151417  SA - PCIe Version = 9.0.1e.30

  695 12:29:48.152778  SA-CRID Status = Disabled

  696 12:29:48.156505  SA-CRID Original Value = 0.0.0.c

  697 12:29:48.159505  SA-CRID New Value = 0.0.0.c

  698 12:29:48.163117  OPROM - VBIOS = ff.ff.ff.ffff

  699 12:29:48.166244  RTC Init

  700 12:29:48.169511  Set power on after power failure.

  701 12:29:48.170027  Disabling Deep S3

  702 12:29:48.172852  Disabling Deep S3

  703 12:29:48.173319  Disabling Deep S4

  704 12:29:48.176806  Disabling Deep S4

  705 12:29:48.177407  Disabling Deep S5

  706 12:29:48.179862  Disabling Deep S5

  707 12:29:48.185980  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 194 exit 1

  708 12:29:48.186534  Enumerating buses...

  709 12:29:48.192761  Show all devs... Before device enumeration.

  710 12:29:48.193231  Root Device: enabled 1

  711 12:29:48.196133  CPU_CLUSTER: 0: enabled 1

  712 12:29:48.199529  DOMAIN: 0000: enabled 1

  713 12:29:48.202789  APIC: 00: enabled 1

  714 12:29:48.203256  PCI: 00:00.0: enabled 1

  715 12:29:48.206155  PCI: 00:02.0: enabled 1

  716 12:29:48.209548  PCI: 00:04.0: enabled 0

  717 12:29:48.210017  PCI: 00:05.0: enabled 0

  718 12:29:48.213171  PCI: 00:12.0: enabled 1

  719 12:29:48.215793  PCI: 00:12.5: enabled 0

  720 12:29:48.219018  PCI: 00:12.6: enabled 0

  721 12:29:48.219487  PCI: 00:14.0: enabled 1

  722 12:29:48.222742  PCI: 00:14.1: enabled 0

  723 12:29:48.225732  PCI: 00:14.3: enabled 1

  724 12:29:48.229158  PCI: 00:14.5: enabled 0

  725 12:29:48.229607  PCI: 00:15.0: enabled 1

  726 12:29:48.232551  PCI: 00:15.1: enabled 1

  727 12:29:48.235702  PCI: 00:15.2: enabled 0

  728 12:29:48.239448  PCI: 00:15.3: enabled 0

  729 12:29:48.239918  PCI: 00:16.0: enabled 1

  730 12:29:48.242246  PCI: 00:16.1: enabled 0

  731 12:29:48.246216  PCI: 00:16.2: enabled 0

  732 12:29:48.249069  PCI: 00:16.3: enabled 0

  733 12:29:48.249641  PCI: 00:16.4: enabled 0

  734 12:29:48.252518  PCI: 00:16.5: enabled 0

  735 12:29:48.255425  PCI: 00:17.0: enabled 1

  736 12:29:48.255894  PCI: 00:19.0: enabled 1

  737 12:29:48.259035  PCI: 00:19.1: enabled 0

  738 12:29:48.262081  PCI: 00:19.2: enabled 0

  739 12:29:48.265691  PCI: 00:1a.0: enabled 0

  740 12:29:48.266162  PCI: 00:1c.0: enabled 0

  741 12:29:48.269317  PCI: 00:1c.1: enabled 0

  742 12:29:48.272521  PCI: 00:1c.2: enabled 0

  743 12:29:48.275700  PCI: 00:1c.3: enabled 0

  744 12:29:48.276274  PCI: 00:1c.4: enabled 0

  745 12:29:48.278555  PCI: 00:1c.5: enabled 0

  746 12:29:48.282810  PCI: 00:1c.6: enabled 0

  747 12:29:48.285154  PCI: 00:1c.7: enabled 0

  748 12:29:48.285624  PCI: 00:1d.0: enabled 1

  749 12:29:48.288828  PCI: 00:1d.1: enabled 0

  750 12:29:48.292462  PCI: 00:1d.2: enabled 0

  751 12:29:48.292931  PCI: 00:1d.3: enabled 0

  752 12:29:48.295188  PCI: 00:1d.4: enabled 0

  753 12:29:48.299141  PCI: 00:1d.5: enabled 1

  754 12:29:48.302312  PCI: 00:1e.0: enabled 1

  755 12:29:48.302884  PCI: 00:1e.1: enabled 0

  756 12:29:48.305418  PCI: 00:1e.2: enabled 1

  757 12:29:48.308815  PCI: 00:1e.3: enabled 1

  758 12:29:48.312104  PCI: 00:1f.0: enabled 1

  759 12:29:48.312733  PCI: 00:1f.1: enabled 1

  760 12:29:48.315356  PCI: 00:1f.2: enabled 1

  761 12:29:48.318878  PCI: 00:1f.3: enabled 1

  762 12:29:48.321876  PCI: 00:1f.4: enabled 1

  763 12:29:48.322342  PCI: 00:1f.5: enabled 1

  764 12:29:48.325680  PCI: 00:1f.6: enabled 0

  765 12:29:48.328983  USB0 port 0: enabled 1

  766 12:29:48.329553  I2C: 00:15: enabled 1

  767 12:29:48.331873  I2C: 00:5d: enabled 1

  768 12:29:48.335466  GENERIC: 0.0: enabled 1

  769 12:29:48.335933  I2C: 00:1a: enabled 1

  770 12:29:48.339168  I2C: 00:38: enabled 1

  771 12:29:48.341845  I2C: 00:39: enabled 1

  772 12:29:48.345655  I2C: 00:3a: enabled 1

  773 12:29:48.346225  I2C: 00:3b: enabled 1

  774 12:29:48.348884  PCI: 00:00.0: enabled 1

  775 12:29:48.352064  SPI: 00: enabled 1

  776 12:29:48.352680  SPI: 01: enabled 1

  777 12:29:48.354761  PNP: 0c09.0: enabled 1

  778 12:29:48.359212  USB2 port 0: enabled 1

  779 12:29:48.359780  USB2 port 1: enabled 1

  780 12:29:48.361771  USB2 port 2: enabled 0

  781 12:29:48.365009  USB2 port 3: enabled 0

  782 12:29:48.365584  USB2 port 5: enabled 0

  783 12:29:48.368363  USB2 port 6: enabled 1

  784 12:29:48.372201  USB2 port 9: enabled 1

  785 12:29:48.372812  USB3 port 0: enabled 1

  786 12:29:48.375038  USB3 port 1: enabled 1

  787 12:29:48.378676  USB3 port 2: enabled 1

  788 12:29:48.381490  USB3 port 3: enabled 1

  789 12:29:48.381956  USB3 port 4: enabled 0

  790 12:29:48.384829  APIC: 03: enabled 1

  791 12:29:48.388457  APIC: 06: enabled 1

  792 12:29:48.388927  APIC: 01: enabled 1

  793 12:29:48.391764  APIC: 02: enabled 1

  794 12:29:48.392231  APIC: 07: enabled 1

  795 12:29:48.395074  APIC: 04: enabled 1

  796 12:29:48.398499  APIC: 05: enabled 1

  797 12:29:48.399070  Compare with tree...

  798 12:29:48.401740  Root Device: enabled 1

  799 12:29:48.404662   CPU_CLUSTER: 0: enabled 1

  800 12:29:48.405131    APIC: 00: enabled 1

  801 12:29:48.408494    APIC: 03: enabled 1

  802 12:29:48.412216    APIC: 06: enabled 1

  803 12:29:48.412847    APIC: 01: enabled 1

  804 12:29:48.414981    APIC: 02: enabled 1

  805 12:29:48.418026    APIC: 07: enabled 1

  806 12:29:48.421357    APIC: 04: enabled 1

  807 12:29:48.421932    APIC: 05: enabled 1

  808 12:29:48.424303   DOMAIN: 0000: enabled 1

  809 12:29:48.427822    PCI: 00:00.0: enabled 1

  810 12:29:48.431438    PCI: 00:02.0: enabled 1

  811 12:29:48.432019    PCI: 00:04.0: enabled 0

  812 12:29:48.434531    PCI: 00:05.0: enabled 0

  813 12:29:48.438945    PCI: 00:12.0: enabled 1

  814 12:29:48.441126    PCI: 00:12.5: enabled 0

  815 12:29:48.441601    PCI: 00:12.6: enabled 0

  816 12:29:48.445287    PCI: 00:14.0: enabled 1

  817 12:29:48.448674     USB0 port 0: enabled 1

  818 12:29:48.451340      USB2 port 0: enabled 1

  819 12:29:48.454702      USB2 port 1: enabled 1

  820 12:29:48.457786      USB2 port 2: enabled 0

  821 12:29:48.458366      USB2 port 3: enabled 0

  822 12:29:48.461167      USB2 port 5: enabled 0

  823 12:29:48.464834      USB2 port 6: enabled 1

  824 12:29:48.467686      USB2 port 9: enabled 1

  825 12:29:48.470971      USB3 port 0: enabled 1

  826 12:29:48.471555      USB3 port 1: enabled 1

  827 12:29:48.474341      USB3 port 2: enabled 1

  828 12:29:48.477913      USB3 port 3: enabled 1

  829 12:29:48.480702      USB3 port 4: enabled 0

  830 12:29:48.484515    PCI: 00:14.1: enabled 0

  831 12:29:48.487470    PCI: 00:14.3: enabled 1

  832 12:29:48.487946    PCI: 00:14.5: enabled 0

  833 12:29:48.490884    PCI: 00:15.0: enabled 1

  834 12:29:48.494515     I2C: 00:15: enabled 1

  835 12:29:48.497584    PCI: 00:15.1: enabled 1

  836 12:29:48.498169     I2C: 00:5d: enabled 1

  837 12:29:48.500804     GENERIC: 0.0: enabled 1

  838 12:29:48.504817    PCI: 00:15.2: enabled 0

  839 12:29:48.507375    PCI: 00:15.3: enabled 0

  840 12:29:48.511003    PCI: 00:16.0: enabled 1

  841 12:29:48.511582    PCI: 00:16.1: enabled 0

  842 12:29:48.514624    PCI: 00:16.2: enabled 0

  843 12:29:48.517731    PCI: 00:16.3: enabled 0

  844 12:29:48.520956    PCI: 00:16.4: enabled 0

  845 12:29:48.524292    PCI: 00:16.5: enabled 0

  846 12:29:48.524925    PCI: 00:17.0: enabled 1

  847 12:29:48.527245    PCI: 00:19.0: enabled 1

  848 12:29:48.530793     I2C: 00:1a: enabled 1

  849 12:29:48.533859     I2C: 00:38: enabled 1

  850 12:29:48.537483     I2C: 00:39: enabled 1

  851 12:29:48.537957     I2C: 00:3a: enabled 1

  852 12:29:48.540735     I2C: 00:3b: enabled 1

  853 12:29:48.544037    PCI: 00:19.1: enabled 0

  854 12:29:48.547229    PCI: 00:19.2: enabled 0

  855 12:29:48.547886    PCI: 00:1a.0: enabled 0

  856 12:29:48.550331    PCI: 00:1c.0: enabled 0

  857 12:29:48.553597    PCI: 00:1c.1: enabled 0

  858 12:29:48.556897    PCI: 00:1c.2: enabled 0

  859 12:29:48.560859    PCI: 00:1c.3: enabled 0

  860 12:29:48.561438    PCI: 00:1c.4: enabled 0

  861 12:29:48.564203    PCI: 00:1c.5: enabled 0

  862 12:29:48.566990    PCI: 00:1c.6: enabled 0

  863 12:29:48.570193    PCI: 00:1c.7: enabled 0

  864 12:29:48.573771    PCI: 00:1d.0: enabled 1

  865 12:29:48.574349    PCI: 00:1d.1: enabled 0

  866 12:29:48.577044    PCI: 00:1d.2: enabled 0

  867 12:29:48.580318    PCI: 00:1d.3: enabled 0

  868 12:29:48.583618    PCI: 00:1d.4: enabled 0

  869 12:29:48.587043    PCI: 00:1d.5: enabled 1

  870 12:29:48.587622     PCI: 00:00.0: enabled 1

  871 12:29:48.590465    PCI: 00:1e.0: enabled 1

  872 12:29:48.593245    PCI: 00:1e.1: enabled 0

  873 12:29:48.596703    PCI: 00:1e.2: enabled 1

  874 12:29:48.597178     SPI: 00: enabled 1

  875 12:29:48.600305    PCI: 00:1e.3: enabled 1

  876 12:29:48.603585     SPI: 01: enabled 1

  877 12:29:48.607205    PCI: 00:1f.0: enabled 1

  878 12:29:48.607788     PNP: 0c09.0: enabled 1

  879 12:29:48.610199    PCI: 00:1f.1: enabled 1

  880 12:29:48.614098    PCI: 00:1f.2: enabled 1

  881 12:29:48.616506    PCI: 00:1f.3: enabled 1

  882 12:29:48.620155    PCI: 00:1f.4: enabled 1

  883 12:29:48.620659    PCI: 00:1f.5: enabled 1

  884 12:29:48.623427    PCI: 00:1f.6: enabled 0

  885 12:29:48.626504  Root Device scanning...

  886 12:29:48.630053  scan_static_bus for Root Device

  887 12:29:48.633269  CPU_CLUSTER: 0 enabled

  888 12:29:48.633748  DOMAIN: 0000 enabled

  889 12:29:48.636289  DOMAIN: 0000 scanning...

  890 12:29:48.639773  PCI: pci_scan_bus for bus 00

  891 12:29:48.643189  PCI: 00:00.0 [8086/0000] ops

  892 12:29:48.646460  PCI: 00:00.0 [8086/9b61] enabled

  893 12:29:48.650151  PCI: 00:02.0 [8086/0000] bus ops

  894 12:29:48.653240  PCI: 00:02.0 [8086/9b41] enabled

  895 12:29:48.656436  PCI: 00:04.0 [8086/1903] disabled

  896 12:29:48.659945  PCI: 00:08.0 [8086/1911] enabled

  897 12:29:48.662658  PCI: 00:12.0 [8086/02f9] enabled

  898 12:29:48.666374  PCI: 00:14.0 [8086/0000] bus ops

  899 12:29:48.669347  PCI: 00:14.0 [8086/02ed] enabled

  900 12:29:48.672600  PCI: 00:14.2 [8086/02ef] enabled

  901 12:29:48.675718  PCI: 00:14.3 [8086/02f0] enabled

  902 12:29:48.679460  PCI: 00:15.0 [8086/0000] bus ops

  903 12:29:48.682709  PCI: 00:15.0 [8086/02e8] enabled

  904 12:29:48.685844  PCI: 00:15.1 [8086/0000] bus ops

  905 12:29:48.689536  PCI: 00:15.1 [8086/02e9] enabled

  906 12:29:48.692233  PCI: 00:16.0 [8086/0000] ops

  907 12:29:48.695854  PCI: 00:16.0 [8086/02e0] enabled

  908 12:29:48.699033  PCI: 00:17.0 [8086/0000] ops

  909 12:29:48.702684  PCI: 00:17.0 [8086/02d3] enabled

  910 12:29:48.705898  PCI: 00:19.0 [8086/0000] bus ops

  911 12:29:48.709084  PCI: 00:19.0 [8086/02c5] enabled

  912 12:29:48.712559  PCI: 00:1d.0 [8086/0000] bus ops

  913 12:29:48.715677  PCI: 00:1d.0 [8086/02b0] enabled

  914 12:29:48.722372  PCI: Static device PCI: 00:1d.5 not found, disabling it.

  915 12:29:48.722568  PCI: 00:1e.0 [8086/0000] ops

  916 12:29:48.725843  PCI: 00:1e.0 [8086/02a8] enabled

  917 12:29:48.729088  PCI: 00:1e.2 [8086/0000] bus ops

  918 12:29:48.732615  PCI: 00:1e.2 [8086/02aa] enabled

  919 12:29:48.735879  PCI: 00:1e.3 [8086/0000] bus ops

  920 12:29:48.739071  PCI: 00:1e.3 [8086/02ab] enabled

  921 12:29:48.742015  PCI: 00:1f.0 [8086/0000] bus ops

  922 12:29:48.745309  PCI: 00:1f.0 [8086/0284] enabled

  923 12:29:48.751910  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  924 12:29:48.758986  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  925 12:29:48.761871  PCI: 00:1f.3 [8086/0000] bus ops

  926 12:29:48.765137  PCI: 00:1f.3 [8086/02c8] enabled

  927 12:29:48.768555  PCI: 00:1f.4 [8086/0000] bus ops

  928 12:29:48.772236  PCI: 00:1f.4 [8086/02a3] enabled

  929 12:29:48.775391  PCI: 00:1f.5 [8086/0000] bus ops

  930 12:29:48.778556  PCI: 00:1f.5 [8086/02a4] enabled

  931 12:29:48.782447  PCI: Leftover static devices:

  932 12:29:48.782530  PCI: 00:05.0

  933 12:29:48.785525  PCI: 00:12.5

  934 12:29:48.785608  PCI: 00:12.6

  935 12:29:48.785673  PCI: 00:14.1

  936 12:29:48.788491  PCI: 00:14.5

  937 12:29:48.788574  PCI: 00:15.2

  938 12:29:48.791804  PCI: 00:15.3

  939 12:29:48.791886  PCI: 00:16.1

  940 12:29:48.791951  PCI: 00:16.2

  941 12:29:48.795508  PCI: 00:16.3

  942 12:29:48.795591  PCI: 00:16.4

  943 12:29:48.798449  PCI: 00:16.5

  944 12:29:48.798533  PCI: 00:19.1

  945 12:29:48.801845  PCI: 00:19.2

  946 12:29:48.801928  PCI: 00:1a.0

  947 12:29:48.801993  PCI: 00:1c.0

  948 12:29:48.805534  PCI: 00:1c.1

  949 12:29:48.805619  PCI: 00:1c.2

  950 12:29:48.808761  PCI: 00:1c.3

  951 12:29:48.808857  PCI: 00:1c.4

  952 12:29:48.808928  PCI: 00:1c.5

  953 12:29:48.812119  PCI: 00:1c.6

  954 12:29:48.812202  PCI: 00:1c.7

  955 12:29:48.815558  PCI: 00:1d.1

  956 12:29:48.815654  PCI: 00:1d.2

  957 12:29:48.815719  PCI: 00:1d.3

  958 12:29:48.818684  PCI: 00:1d.4

  959 12:29:48.818768  PCI: 00:1d.5

  960 12:29:48.821624  PCI: 00:1e.1

  961 12:29:48.821707  PCI: 00:1f.1

  962 12:29:48.825286  PCI: 00:1f.2

  963 12:29:48.825369  PCI: 00:1f.6

  964 12:29:48.828342  PCI: Check your devicetree.cb.

  965 12:29:48.831785  PCI: 00:02.0 scanning...

  966 12:29:48.835242  scan_generic_bus for PCI: 00:02.0

  967 12:29:48.838743  scan_generic_bus for PCI: 00:02.0 done

  968 12:29:48.845596  scan_bus: scanning of bus PCI: 00:02.0 took 10199 usecs

  969 12:29:48.845682  PCI: 00:14.0 scanning...

  970 12:29:48.848603  scan_static_bus for PCI: 00:14.0

  971 12:29:48.852356  USB0 port 0 enabled

  972 12:29:48.855713  USB0 port 0 scanning...

  973 12:29:48.858631  scan_static_bus for USB0 port 0

  974 12:29:48.862479  USB2 port 0 enabled

  975 12:29:48.863176  USB2 port 1 enabled

  976 12:29:48.865514  USB2 port 2 disabled

  977 12:29:48.866174  USB2 port 3 disabled

  978 12:29:48.868622  USB2 port 5 disabled

  979 12:29:48.871961  USB2 port 6 enabled

  980 12:29:48.872673  USB2 port 9 enabled

  981 12:29:48.875228  USB3 port 0 enabled

  982 12:29:48.879101  USB3 port 1 enabled

  983 12:29:48.879808  USB3 port 2 enabled

  984 12:29:48.882134  USB3 port 3 enabled

  985 12:29:48.882792  USB3 port 4 disabled

  986 12:29:48.885038  USB2 port 0 scanning...

  987 12:29:48.888412  scan_static_bus for USB2 port 0

  988 12:29:48.891772  scan_static_bus for USB2 port 0 done

  989 12:29:48.898190  scan_bus: scanning of bus USB2 port 0 took 9699 usecs

  990 12:29:48.901860  USB2 port 1 scanning...

  991 12:29:48.905256  scan_static_bus for USB2 port 1

  992 12:29:48.908269  scan_static_bus for USB2 port 1 done

  993 12:29:48.911723  scan_bus: scanning of bus USB2 port 1 took 9702 usecs

  994 12:29:48.914887  USB2 port 6 scanning...

  995 12:29:48.918497  scan_static_bus for USB2 port 6

  996 12:29:48.921600  scan_static_bus for USB2 port 6 done

  997 12:29:48.928492  scan_bus: scanning of bus USB2 port 6 took 9710 usecs

  998 12:29:48.931561  USB2 port 9 scanning...

  999 12:29:48.935306  scan_static_bus for USB2 port 9

 1000 12:29:48.938241  scan_static_bus for USB2 port 9 done

 1001 12:29:48.941588  scan_bus: scanning of bus USB2 port 9 took 9711 usecs

 1002 12:29:48.944634  USB3 port 0 scanning...

 1003 12:29:48.948299  scan_static_bus for USB3 port 0

 1004 12:29:48.951665  scan_static_bus for USB3 port 0 done

 1005 12:29:48.957866  scan_bus: scanning of bus USB3 port 0 took 9703 usecs

 1006 12:29:48.961924  USB3 port 1 scanning...

 1007 12:29:48.964925  scan_static_bus for USB3 port 1

 1008 12:29:48.967741  scan_static_bus for USB3 port 1 done

 1009 12:29:48.971613  scan_bus: scanning of bus USB3 port 1 took 9709 usecs

 1010 12:29:48.974803  USB3 port 2 scanning...

 1011 12:29:48.977779  scan_static_bus for USB3 port 2

 1012 12:29:48.981232  scan_static_bus for USB3 port 2 done

 1013 12:29:48.988067  scan_bus: scanning of bus USB3 port 2 took 9695 usecs

 1014 12:29:48.991180  USB3 port 3 scanning...

 1015 12:29:48.994441  scan_static_bus for USB3 port 3

 1016 12:29:48.997872  scan_static_bus for USB3 port 3 done

 1017 12:29:49.004340  scan_bus: scanning of bus USB3 port 3 took 9702 usecs

 1018 12:29:49.007797  scan_static_bus for USB0 port 0 done

 1019 12:29:49.011006  scan_bus: scanning of bus USB0 port 0 took 155419 usecs

 1020 12:29:49.014748  scan_static_bus for PCI: 00:14.0 done

 1021 12:29:49.021160  scan_bus: scanning of bus PCI: 00:14.0 took 173045 usecs

 1022 12:29:49.024463  PCI: 00:15.0 scanning...

 1023 12:29:49.027679  scan_generic_bus for PCI: 00:15.0

 1024 12:29:49.030831  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled

 1025 12:29:49.034473  scan_generic_bus for PCI: 00:15.0 done

 1026 12:29:49.041189  scan_bus: scanning of bus PCI: 00:15.0 took 14311 usecs

 1027 12:29:49.044049  PCI: 00:15.1 scanning...

 1028 12:29:49.047921  scan_generic_bus for PCI: 00:15.1

 1029 12:29:49.050828  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled

 1030 12:29:49.057380  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled

 1031 12:29:49.061177  scan_generic_bus for PCI: 00:15.1 done

 1032 12:29:49.064767  scan_bus: scanning of bus PCI: 00:15.1 took 18619 usecs

 1033 12:29:49.067459  PCI: 00:19.0 scanning...

 1034 12:29:49.071245  scan_generic_bus for PCI: 00:19.0

 1035 12:29:49.077378  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled

 1036 12:29:49.080793  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled

 1037 12:29:49.083780  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled

 1038 12:29:49.087949  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled

 1039 12:29:49.091136  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled

 1040 12:29:49.097474  scan_generic_bus for PCI: 00:19.0 done

 1041 12:29:49.100909  scan_bus: scanning of bus PCI: 00:19.0 took 30753 usecs

 1042 12:29:49.104320  PCI: 00:1d.0 scanning...

 1043 12:29:49.108217  do_pci_scan_bridge for PCI: 00:1d.0

 1044 12:29:49.111334  PCI: pci_scan_bus for bus 01

 1045 12:29:49.114281  PCI: 01:00.0 [1c5c/1327] enabled

 1046 12:29:49.117542  Enabling Common Clock Configuration

 1047 12:29:49.124427  L1 Sub-State supported from root port 29

 1048 12:29:49.125195  L1 Sub-State Support = 0xf

 1049 12:29:49.127460  CommonModeRestoreTime = 0x28

 1050 12:29:49.134129  Power On Value = 0x16, Power On Scale = 0x0

 1051 12:29:49.134637  ASPM: Enabled L1

 1052 12:29:49.140447  scan_bus: scanning of bus PCI: 00:1d.0 took 32797 usecs

 1053 12:29:49.144053  PCI: 00:1e.2 scanning...

 1054 12:29:49.147797  scan_generic_bus for PCI: 00:1e.2

 1055 12:29:49.150731  bus: PCI: 00:1e.2[0]->SPI: 00 enabled

 1056 12:29:49.153820  scan_generic_bus for PCI: 00:1e.2 done

 1057 12:29:49.160906  scan_bus: scanning of bus PCI: 00:1e.2 took 14011 usecs

 1058 12:29:49.161116  PCI: 00:1e.3 scanning...

 1059 12:29:49.167357  scan_generic_bus for PCI: 00:1e.3

 1060 12:29:49.170667  bus: PCI: 00:1e.3[0]->SPI: 01 enabled

 1061 12:29:49.174083  scan_generic_bus for PCI: 00:1e.3 done

 1062 12:29:49.177343  scan_bus: scanning of bus PCI: 00:1e.3 took 14010 usecs

 1063 12:29:49.181407  PCI: 00:1f.0 scanning...

 1064 12:29:49.184067  scan_static_bus for PCI: 00:1f.0

 1065 12:29:49.187673  PNP: 0c09.0 enabled

 1066 12:29:49.190845  scan_static_bus for PCI: 00:1f.0 done

 1067 12:29:49.197354  scan_bus: scanning of bus PCI: 00:1f.0 took 12063 usecs

 1068 12:29:49.200753  PCI: 00:1f.3 scanning...

 1069 12:29:49.204130  scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs

 1070 12:29:49.208913  PCI: 00:1f.4 scanning...

 1071 12:29:49.210517  scan_generic_bus for PCI: 00:1f.4

 1072 12:29:49.214049  scan_generic_bus for PCI: 00:1f.4 done

 1073 12:29:49.221586  scan_bus: scanning of bus PCI: 00:1f.4 took 10192 usecs

 1074 12:29:49.224493  PCI: 00:1f.5 scanning...

 1075 12:29:49.227513  scan_generic_bus for PCI: 00:1f.5

 1076 12:29:49.230722  scan_generic_bus for PCI: 00:1f.5 done

 1077 12:29:49.237562  scan_bus: scanning of bus PCI: 00:1f.5 took 10199 usecs

 1078 12:29:49.240551  scan_bus: scanning of bus DOMAIN: 0000 took 605287 usecs

 1079 12:29:49.247532  scan_static_bus for Root Device done

 1080 12:29:49.251375  scan_bus: scanning of bus Root Device took 625155 usecs

 1081 12:29:49.251932  done

 1082 12:29:49.254583  Chrome EC: UHEPI supported

 1083 12:29:49.260920  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

 1084 12:29:49.268028  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1085 12:29:49.274658  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

 1086 12:29:49.280929  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)

 1087 12:29:49.284484  SPI flash protection: WPSW=0 SRP0=0

 1088 12:29:49.288241  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1089 12:29:49.294043  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2

 1090 12:29:49.297178  found VGA at PCI: 00:02.0

 1091 12:29:49.300792  Setting up VGA for PCI: 00:02.0

 1092 12:29:49.304081  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1093 12:29:49.311041  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1094 12:29:49.314271  Allocating resources...

 1095 12:29:49.314735  Reading resources...

 1096 12:29:49.320678  Root Device read_resources bus 0 link: 0

 1097 12:29:49.323860  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1098 12:29:49.330565  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1099 12:29:49.333823  DOMAIN: 0000 read_resources bus 0 link: 0

 1100 12:29:49.340157  PCI: 00:14.0 read_resources bus 0 link: 0

 1101 12:29:49.343525  USB0 port 0 read_resources bus 0 link: 0

 1102 12:29:49.351670  USB0 port 0 read_resources bus 0 link: 0 done

 1103 12:29:49.354892  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1104 12:29:49.362082  PCI: 00:15.0 read_resources bus 1 link: 0

 1105 12:29:49.366057  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1106 12:29:49.372762  PCI: 00:15.1 read_resources bus 2 link: 0

 1107 12:29:49.375852  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1108 12:29:49.383239  PCI: 00:19.0 read_resources bus 3 link: 0

 1109 12:29:49.390326  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1110 12:29:49.393308  PCI: 00:1d.0 read_resources bus 1 link: 0

 1111 12:29:49.399804  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1112 12:29:49.403055  PCI: 00:1e.2 read_resources bus 4 link: 0

 1113 12:29:49.409528  PCI: 00:1e.2 read_resources bus 4 link: 0 done

 1114 12:29:49.412914  PCI: 00:1e.3 read_resources bus 5 link: 0

 1115 12:29:49.420124  PCI: 00:1e.3 read_resources bus 5 link: 0 done

 1116 12:29:49.422896  PCI: 00:1f.0 read_resources bus 0 link: 0

 1117 12:29:49.430181  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1118 12:29:49.436469  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1119 12:29:49.439436  Root Device read_resources bus 0 link: 0 done

 1120 12:29:49.443032  Done reading resources.

 1121 12:29:49.445975  Show resources in subtree (Root Device)...After reading.

 1122 12:29:49.452290   Root Device child on link 0 CPU_CLUSTER: 0

 1123 12:29:49.456021    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1124 12:29:49.456644     APIC: 00

 1125 12:29:49.459201     APIC: 03

 1126 12:29:49.459658     APIC: 06

 1127 12:29:49.462296     APIC: 01

 1128 12:29:49.462752     APIC: 02

 1129 12:29:49.463114     APIC: 07

 1130 12:29:49.466300     APIC: 04

 1131 12:29:49.466860     APIC: 05

 1132 12:29:49.516388    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1133 12:29:49.517047    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1134 12:29:49.517803    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1135 12:29:49.518182     PCI: 00:00.0

 1136 12:29:49.518553     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1137 12:29:49.518989     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1138 12:29:49.557468     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1139 12:29:49.558405     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1140 12:29:49.558804     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1141 12:29:49.559152     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1142 12:29:49.561862     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1143 12:29:49.565479     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1144 12:29:49.574781     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1145 12:29:49.584980     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1146 12:29:49.595017     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1147 12:29:49.604863     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1148 12:29:49.615247     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1149 12:29:49.621758     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1150 12:29:49.631617     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1151 12:29:49.641356     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1152 12:29:49.641920     PCI: 00:02.0

 1153 12:29:49.655132     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1154 12:29:49.665311     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1155 12:29:49.671632     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1156 12:29:49.675204     PCI: 00:04.0

 1157 12:29:49.675784     PCI: 00:08.0

 1158 12:29:49.684523     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1159 12:29:49.688514     PCI: 00:12.0

 1160 12:29:49.697954     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1161 12:29:49.701152     PCI: 00:14.0 child on link 0 USB0 port 0

 1162 12:29:49.711788     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1163 12:29:49.714697      USB0 port 0 child on link 0 USB2 port 0

 1164 12:29:49.717750       USB2 port 0

 1165 12:29:49.718231       USB2 port 1

 1166 12:29:49.721310       USB2 port 2

 1167 12:29:49.722035       USB2 port 3

 1168 12:29:49.724877       USB2 port 5

 1169 12:29:49.725339       USB2 port 6

 1170 12:29:49.728041       USB2 port 9

 1171 12:29:49.728651       USB3 port 0

 1172 12:29:49.731828       USB3 port 1

 1173 12:29:49.735075       USB3 port 2

 1174 12:29:49.735636       USB3 port 3

 1175 12:29:49.737920       USB3 port 4

 1176 12:29:49.738377     PCI: 00:14.2

 1177 12:29:49.748107     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1178 12:29:49.757491     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1179 12:29:49.761281     PCI: 00:14.3

 1180 12:29:49.771836     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1181 12:29:49.774604     PCI: 00:15.0 child on link 0 I2C: 01:15

 1182 12:29:49.784200     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1183 12:29:49.785017      I2C: 01:15

 1184 12:29:49.791091     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1185 12:29:49.801040     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1186 12:29:49.801508      I2C: 02:5d

 1187 12:29:49.804309      GENERIC: 0.0

 1188 12:29:49.804928     PCI: 00:16.0

 1189 12:29:49.814401     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1190 12:29:49.817460     PCI: 00:17.0

 1191 12:29:49.824483     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1192 12:29:49.834368     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1193 12:29:49.844422     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1194 12:29:49.850802     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1195 12:29:49.860923     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1196 12:29:49.867215     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1197 12:29:49.874600     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1198 12:29:49.884209     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1199 12:29:49.884823      I2C: 03:1a

 1200 12:29:49.887296      I2C: 03:38

 1201 12:29:49.887855      I2C: 03:39

 1202 12:29:49.888221      I2C: 03:3a

 1203 12:29:49.890276      I2C: 03:3b

 1204 12:29:49.893929     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1205 12:29:49.903716     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1206 12:29:49.913724     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1207 12:29:49.923686     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1208 12:29:49.924253      PCI: 01:00.0

 1209 12:29:49.933521      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1210 12:29:49.937036     PCI: 00:1e.0

 1211 12:29:49.947077     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1212 12:29:49.956512     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1213 12:29:49.959696     PCI: 00:1e.2 child on link 0 SPI: 00

 1214 12:29:49.970026     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1215 12:29:49.973291      SPI: 00

 1216 12:29:49.976558     PCI: 00:1e.3 child on link 0 SPI: 01

 1217 12:29:49.986718     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1218 12:29:49.987270      SPI: 01

 1219 12:29:49.989501     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1220 12:29:49.999521     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1221 12:29:50.009464     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1222 12:29:50.010016      PNP: 0c09.0

 1223 12:29:50.020023      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1224 12:29:50.020640     PCI: 00:1f.3

 1225 12:29:50.030408     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1226 12:29:50.039734     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1227 12:29:50.042938     PCI: 00:1f.4

 1228 12:29:50.052456     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1229 12:29:50.063047     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1230 12:29:50.063637     PCI: 00:1f.5

 1231 12:29:50.072999     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1232 12:29:50.079212  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1233 12:29:50.086440  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1234 12:29:50.093298  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1235 12:29:50.096061  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1236 12:29:50.099592  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1237 12:29:50.102833  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1238 12:29:50.106192  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1239 12:29:50.112528  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1240 12:29:50.118947  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1241 12:29:50.129185  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1242 12:29:50.135917  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1243 12:29:50.142778  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1244 12:29:50.145920  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1245 12:29:50.155663  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1246 12:29:50.158836  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1247 12:29:50.165552  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1248 12:29:50.168736  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem

 1249 12:29:50.175192  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem

 1250 12:29:50.178600  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem

 1251 12:29:50.181901  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem

 1252 12:29:50.188457  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem

 1253 12:29:50.192776  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem

 1254 12:29:50.198730  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem

 1255 12:29:50.201843  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem

 1256 12:29:50.209068  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem

 1257 12:29:50.212008  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem

 1258 12:29:50.218401  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem

 1259 12:29:50.221664  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem

 1260 12:29:50.228568  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem

 1261 12:29:50.232861  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem

 1262 12:29:50.239179  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem

 1263 12:29:50.241725  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem

 1264 12:29:50.245154  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem

 1265 12:29:50.252383  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem

 1266 12:29:50.255007  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem

 1267 12:29:50.262087  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem

 1268 12:29:50.265212  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem

 1269 12:29:50.275500  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done

 1270 12:29:50.278615  avoid_fixed_resources: DOMAIN: 0000

 1271 12:29:50.285264  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1272 12:29:50.292028  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1273 12:29:50.299003  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1274 12:29:50.305330  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)

 1275 12:29:50.312304  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)

 1276 12:29:50.322118  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)

 1277 12:29:50.329026  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)

 1278 12:29:50.335257  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1279 12:29:50.344866  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1280 12:29:50.351780  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1281 12:29:50.358429  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1282 12:29:50.365102  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1283 12:29:50.367773  Setting resources...

 1284 12:29:50.374926  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1285 12:29:50.377682  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1286 12:29:50.381165  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1287 12:29:50.387859  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1288 12:29:50.390876  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1289 12:29:50.397725  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1290 12:29:50.400842  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1291 12:29:50.407489  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1292 12:29:50.417675  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff

 1293 12:29:50.421031  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1294 12:29:50.428356  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1295 12:29:50.430850  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1296 12:29:50.437766  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem

 1297 12:29:50.440553  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem

 1298 12:29:50.447363  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem

 1299 12:29:50.451526  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem

 1300 12:29:50.457016  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem

 1301 12:29:50.460806  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem

 1302 12:29:50.467427  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem

 1303 12:29:50.470780  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem

 1304 12:29:50.474350  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem

 1305 12:29:50.481067  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem

 1306 12:29:50.484093  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem

 1307 12:29:50.490600  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem

 1308 12:29:50.494345  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem

 1309 12:29:50.500902  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem

 1310 12:29:50.503856  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem

 1311 12:29:50.510531  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem

 1312 12:29:50.513664  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem

 1313 12:29:50.520347  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem

 1314 12:29:50.523807  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem

 1315 12:29:50.530603  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem

 1316 12:29:50.536935  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done

 1317 12:29:50.543595  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1318 12:29:50.550164  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1319 12:29:50.559756  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1320 12:29:50.563768  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem

 1321 12:29:50.570234  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done

 1322 12:29:50.576803  Root Device assign_resources, bus 0 link: 0

 1323 12:29:50.580031  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1324 12:29:50.590028  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1325 12:29:50.596691  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1326 12:29:50.606250  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1327 12:29:50.613597  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64

 1328 12:29:50.622795  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64

 1329 12:29:50.629523  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64

 1330 12:29:50.632769  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1331 12:29:50.639523  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1332 12:29:50.645967  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64

 1333 12:29:50.656598  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64

 1334 12:29:50.662781  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64

 1335 12:29:50.673288  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64

 1336 12:29:50.676251  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1337 12:29:50.683016  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1338 12:29:50.689135  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64

 1339 12:29:50.692708  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1340 12:29:50.699586  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1341 12:29:50.706273  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64

 1342 12:29:50.716032  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem

 1343 12:29:50.722550  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem

 1344 12:29:50.729088  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1345 12:29:50.738946  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1346 12:29:50.745654  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1347 12:29:50.752091  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem

 1348 12:29:50.762335  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64

 1349 12:29:50.765779  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1350 12:29:50.772265  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1351 12:29:50.779047  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1352 12:29:50.788811  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1353 12:29:50.799556  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1354 12:29:50.801722  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1355 12:29:50.808955  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64

 1356 12:29:50.815366  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1357 12:29:50.821687  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64

 1358 12:29:50.831407  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64

 1359 12:29:50.834907  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1360 12:29:50.841432  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1361 12:29:50.848244  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64

 1362 12:29:50.851540  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1363 12:29:50.858532  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1364 12:29:50.862034  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1365 12:29:50.868153  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1366 12:29:50.871474  LPC: Trying to open IO window from 800 size 1ff

 1367 12:29:50.881740  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64

 1368 12:29:50.888920  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64

 1369 12:29:50.898364  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64

 1370 12:29:50.905237  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem

 1371 12:29:50.911604  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1372 12:29:50.914749  Root Device assign_resources, bus 0 link: 0

 1373 12:29:50.918043  Done setting resources.

 1374 12:29:50.925002  Show resources in subtree (Root Device)...After assigning values.

 1375 12:29:50.928379   Root Device child on link 0 CPU_CLUSTER: 0

 1376 12:29:50.931361    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1377 12:29:50.934968     APIC: 00

 1378 12:29:50.935517     APIC: 03

 1379 12:29:50.935873     APIC: 06

 1380 12:29:50.938673     APIC: 01

 1381 12:29:50.939221     APIC: 02

 1382 12:29:50.941592     APIC: 07

 1383 12:29:50.942043     APIC: 04

 1384 12:29:50.942396     APIC: 05

 1385 12:29:50.948440    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1386 12:29:50.957867    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1387 12:29:50.967814    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1388 12:29:50.970884     PCI: 00:00.0

 1389 12:29:50.977508     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1390 12:29:50.987645     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1391 12:29:50.997414     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1392 12:29:51.007178     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1393 12:29:51.017451     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1394 12:29:51.027714     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1395 12:29:51.033948     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1396 12:29:51.043828     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1397 12:29:51.054298     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1398 12:29:51.063857     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1399 12:29:51.073748     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1400 12:29:51.080490     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1401 12:29:51.090144     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1402 12:29:51.100028     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1403 12:29:51.109385     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1404 12:29:51.119962     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1405 12:29:51.120528     PCI: 00:02.0

 1406 12:29:51.133375     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1407 12:29:51.142596     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1408 12:29:51.152611     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1409 12:29:51.153174     PCI: 00:04.0

 1410 12:29:51.155945     PCI: 00:08.0

 1411 12:29:51.165814     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10

 1412 12:29:51.166377     PCI: 00:12.0

 1413 12:29:51.175756     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10

 1414 12:29:51.182822     PCI: 00:14.0 child on link 0 USB0 port 0

 1415 12:29:51.192008     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10

 1416 12:29:51.195726      USB0 port 0 child on link 0 USB2 port 0

 1417 12:29:51.199460       USB2 port 0

 1418 12:29:51.200019       USB2 port 1

 1419 12:29:51.202459       USB2 port 2

 1420 12:29:51.203019       USB2 port 3

 1421 12:29:51.205269       USB2 port 5

 1422 12:29:51.205945       USB2 port 6

 1423 12:29:51.209011       USB2 port 9

 1424 12:29:51.209472       USB3 port 0

 1425 12:29:51.212251       USB3 port 1

 1426 12:29:51.212858       USB3 port 2

 1427 12:29:51.215512       USB3 port 3

 1428 12:29:51.218780       USB3 port 4

 1429 12:29:51.219243     PCI: 00:14.2

 1430 12:29:51.228484     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10

 1431 12:29:51.238660     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18

 1432 12:29:51.241978     PCI: 00:14.3

 1433 12:29:51.251882     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10

 1434 12:29:51.254986     PCI: 00:15.0 child on link 0 I2C: 01:15

 1435 12:29:51.265042     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10

 1436 12:29:51.268367      I2C: 01:15

 1437 12:29:51.271699     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1438 12:29:51.281561     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10

 1439 12:29:51.285851      I2C: 02:5d

 1440 12:29:51.286399      GENERIC: 0.0

 1441 12:29:51.288515     PCI: 00:16.0

 1442 12:29:51.298056     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10

 1443 12:29:51.298617     PCI: 00:17.0

 1444 12:29:51.308274     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10

 1445 12:29:51.318890     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14

 1446 12:29:51.327851     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1447 12:29:51.338634     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1448 12:29:51.347704     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1449 12:29:51.357448     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24

 1450 12:29:51.360964     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1451 12:29:51.371081     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10

 1452 12:29:51.374147      I2C: 03:1a

 1453 12:29:51.374704      I2C: 03:38

 1454 12:29:51.377606      I2C: 03:39

 1455 12:29:51.378162      I2C: 03:3a

 1456 12:29:51.381378      I2C: 03:3b

 1457 12:29:51.384572     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1458 12:29:51.394443     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1459 12:29:51.403845     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1460 12:29:51.414228     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1461 12:29:51.414798      PCI: 01:00.0

 1462 12:29:51.427145      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10

 1463 12:29:51.427728     PCI: 00:1e.0

 1464 12:29:51.436763     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1465 12:29:51.450211     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18

 1466 12:29:51.453962     PCI: 00:1e.2 child on link 0 SPI: 00

 1467 12:29:51.463416     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10

 1468 12:29:51.463887      SPI: 00

 1469 12:29:51.466961     PCI: 00:1e.3 child on link 0 SPI: 01

 1470 12:29:51.480266     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10

 1471 12:29:51.480859      SPI: 01

 1472 12:29:51.483330     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1473 12:29:51.493105     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1474 12:29:51.503133     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1475 12:29:51.503597      PNP: 0c09.0

 1476 12:29:51.513655      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1477 12:29:51.514218     PCI: 00:1f.3

 1478 12:29:51.522947     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10

 1479 12:29:51.536015     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20

 1480 12:29:51.536614     PCI: 00:1f.4

 1481 12:29:51.545988     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1482 12:29:51.556743     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10

 1483 12:29:51.557172     PCI: 00:1f.5

 1484 12:29:51.569322     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10

 1485 12:29:51.569882  Done allocating resources.

 1486 12:29:51.575854  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0

 1487 12:29:51.579436  Enabling resources...

 1488 12:29:51.582751  PCI: 00:00.0 subsystem <- 8086/9b61

 1489 12:29:51.586317  PCI: 00:00.0 cmd <- 06

 1490 12:29:51.589292  PCI: 00:02.0 subsystem <- 8086/9b41

 1491 12:29:51.592808  PCI: 00:02.0 cmd <- 03

 1492 12:29:51.595595  PCI: 00:08.0 cmd <- 06

 1493 12:29:51.599333  PCI: 00:12.0 subsystem <- 8086/02f9

 1494 12:29:51.602270  PCI: 00:12.0 cmd <- 02

 1495 12:29:51.605501  PCI: 00:14.0 subsystem <- 8086/02ed

 1496 12:29:51.606055  PCI: 00:14.0 cmd <- 02

 1497 12:29:51.609085  PCI: 00:14.2 cmd <- 02

 1498 12:29:51.612591  PCI: 00:14.3 subsystem <- 8086/02f0

 1499 12:29:51.615612  PCI: 00:14.3 cmd <- 02

 1500 12:29:51.618820  PCI: 00:15.0 subsystem <- 8086/02e8

 1501 12:29:51.622125  PCI: 00:15.0 cmd <- 02

 1502 12:29:51.625303  PCI: 00:15.1 subsystem <- 8086/02e9

 1503 12:29:51.628788  PCI: 00:15.1 cmd <- 02

 1504 12:29:51.632022  PCI: 00:16.0 subsystem <- 8086/02e0

 1505 12:29:51.635447  PCI: 00:16.0 cmd <- 02

 1506 12:29:51.638762  PCI: 00:17.0 subsystem <- 8086/02d3

 1507 12:29:51.641902  PCI: 00:17.0 cmd <- 03

 1508 12:29:51.645140  PCI: 00:19.0 subsystem <- 8086/02c5

 1509 12:29:51.648495  PCI: 00:19.0 cmd <- 02

 1510 12:29:51.652031  PCI: 00:1d.0 bridge ctrl <- 0013

 1511 12:29:51.654849  PCI: 00:1d.0 subsystem <- 8086/02b0

 1512 12:29:51.655312  PCI: 00:1d.0 cmd <- 06

 1513 12:29:51.661912  PCI: 00:1e.0 subsystem <- 8086/02a8

 1514 12:29:51.662485  PCI: 00:1e.0 cmd <- 06

 1515 12:29:51.666011  PCI: 00:1e.2 subsystem <- 8086/02aa

 1516 12:29:51.668450  PCI: 00:1e.2 cmd <- 06

 1517 12:29:51.672083  PCI: 00:1e.3 subsystem <- 8086/02ab

 1518 12:29:51.675847  PCI: 00:1e.3 cmd <- 02

 1519 12:29:51.678756  PCI: 00:1f.0 subsystem <- 8086/0284

 1520 12:29:51.681938  PCI: 00:1f.0 cmd <- 407

 1521 12:29:51.685174  PCI: 00:1f.3 subsystem <- 8086/02c8

 1522 12:29:51.688617  PCI: 00:1f.3 cmd <- 02

 1523 12:29:51.692067  PCI: 00:1f.4 subsystem <- 8086/02a3

 1524 12:29:51.695708  PCI: 00:1f.4 cmd <- 03

 1525 12:29:51.698637  PCI: 00:1f.5 subsystem <- 8086/02a4

 1526 12:29:51.701837  PCI: 00:1f.5 cmd <- 406

 1527 12:29:51.709745  PCI: 01:00.0 cmd <- 02

 1528 12:29:51.715125  done.

 1529 12:29:51.727610  ME: Version: 14.0.39.1367

 1530 12:29:51.734287  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12

 1531 12:29:51.737971  Initializing devices...

 1532 12:29:51.738528  Root Device init ...

 1533 12:29:51.744415  Chrome EC: Set SMI mask to 0x0000000000000000

 1534 12:29:51.747447  Chrome EC: clear events_b mask to 0x0000000000000000

 1535 12:29:51.754877  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1536 12:29:51.761599  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006

 1537 12:29:51.767131  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006

 1538 12:29:51.771337  Chrome EC: Set WAKE mask to 0x0000000000000000

 1539 12:29:51.773959  Root Device init finished in 35208 usecs

 1540 12:29:51.778007  CPU_CLUSTER: 0 init ...

 1541 12:29:51.784081  CPU_CLUSTER: 0 init finished in 2447 usecs

 1542 12:29:51.788897  PCI: 00:00.0 init ...

 1543 12:29:51.791641  CPU TDP: 15 Watts

 1544 12:29:51.795022  CPU PL2 = 64 Watts

 1545 12:29:51.798461  PCI: 00:00.0 init finished in 7078 usecs

 1546 12:29:51.801789  PCI: 00:02.0 init ...

 1547 12:29:51.804677  PCI: 00:02.0 init finished in 2264 usecs

 1548 12:29:51.808444  PCI: 00:08.0 init ...

 1549 12:29:51.811857  PCI: 00:08.0 init finished in 2252 usecs

 1550 12:29:51.814818  PCI: 00:12.0 init ...

 1551 12:29:51.817614  PCI: 00:12.0 init finished in 2252 usecs

 1552 12:29:51.821577  PCI: 00:14.0 init ...

 1553 12:29:51.824561  PCI: 00:14.0 init finished in 2251 usecs

 1554 12:29:51.828628  PCI: 00:14.2 init ...

 1555 12:29:51.831763  PCI: 00:14.2 init finished in 2252 usecs

 1556 12:29:51.834765  PCI: 00:14.3 init ...

 1557 12:29:51.838026  PCI: 00:14.3 init finished in 2269 usecs

 1558 12:29:51.841149  PCI: 00:15.0 init ...

 1559 12:29:51.844880  DW I2C bus 0 at 0xd121f000 (400 KHz)

 1560 12:29:51.847826  PCI: 00:15.0 init finished in 5967 usecs

 1561 12:29:51.851377  PCI: 00:15.1 init ...

 1562 12:29:51.854635  DW I2C bus 1 at 0xd1220000 (400 KHz)

 1563 12:29:51.861257  PCI: 00:15.1 init finished in 5976 usecs

 1564 12:29:51.861822  PCI: 00:16.0 init ...

 1565 12:29:51.868023  PCI: 00:16.0 init finished in 2252 usecs

 1566 12:29:51.871586  PCI: 00:19.0 init ...

 1567 12:29:51.874393  DW I2C bus 4 at 0xd1222000 (400 KHz)

 1568 12:29:51.877643  PCI: 00:19.0 init finished in 5972 usecs

 1569 12:29:51.880870  PCI: 00:1d.0 init ...

 1570 12:29:51.884469  Initializing PCH PCIe bridge.

 1571 12:29:51.887621  PCI: 00:1d.0 init finished in 5275 usecs

 1572 12:29:51.890755  PCI: 00:1f.0 init ...

 1573 12:29:51.894116  IOAPIC: Initializing IOAPIC at 0xfec00000

 1574 12:29:51.900939  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1575 12:29:51.901507  IOAPIC: ID = 0x02

 1576 12:29:51.904251  IOAPIC: Dumping registers

 1577 12:29:51.907506    reg 0x0000: 0x02000000

 1578 12:29:51.910761    reg 0x0001: 0x00770020

 1579 12:29:51.911240    reg 0x0002: 0x00000000

 1580 12:29:51.917053  PCI: 00:1f.0 init finished in 23527 usecs

 1581 12:29:51.921075  PCI: 00:1f.4 init ...

 1582 12:29:51.923906  PCI: 00:1f.4 init finished in 2261 usecs

 1583 12:29:51.934625  PCI: 01:00.0 init ...

 1584 12:29:51.938185  PCI: 01:00.0 init finished in 2252 usecs

 1585 12:29:51.942014  PNP: 0c09.0 init ...

 1586 12:29:51.948939  Google Chrome EC uptime: 11.108 seconds

 1587 12:29:51.952082  Google Chrome AP resets since EC boot: 0

 1588 12:29:51.955374  Google Chrome most recent AP reset causes:

 1589 12:29:51.961795  Google Chrome EC reset flags at last EC boot: reset-pin

 1590 12:29:51.965129  PNP: 0c09.0 init finished in 20612 usecs

 1591 12:29:51.968786  Devices initialized

 1592 12:29:51.972365  Show all devs... After init.

 1593 12:29:51.972852  Root Device: enabled 1

 1594 12:29:51.974969  CPU_CLUSTER: 0: enabled 1

 1595 12:29:51.978811  DOMAIN: 0000: enabled 1

 1596 12:29:51.979385  APIC: 00: enabled 1

 1597 12:29:51.982209  PCI: 00:00.0: enabled 1

 1598 12:29:51.985258  PCI: 00:02.0: enabled 1

 1599 12:29:51.988319  PCI: 00:04.0: enabled 0

 1600 12:29:51.988946  PCI: 00:05.0: enabled 0

 1601 12:29:51.991247  PCI: 00:12.0: enabled 1

 1602 12:29:51.994953  PCI: 00:12.5: enabled 0

 1603 12:29:51.998971  PCI: 00:12.6: enabled 0

 1604 12:29:51.999551  PCI: 00:14.0: enabled 1

 1605 12:29:52.001665  PCI: 00:14.1: enabled 0

 1606 12:29:52.004683  PCI: 00:14.3: enabled 1

 1607 12:29:52.005255  PCI: 00:14.5: enabled 0

 1608 12:29:52.008323  PCI: 00:15.0: enabled 1

 1609 12:29:52.011144  PCI: 00:15.1: enabled 1

 1610 12:29:52.014516  PCI: 00:15.2: enabled 0

 1611 12:29:52.015054  PCI: 00:15.3: enabled 0

 1612 12:29:52.018552  PCI: 00:16.0: enabled 1

 1613 12:29:52.020966  PCI: 00:16.1: enabled 0

 1614 12:29:52.024453  PCI: 00:16.2: enabled 0

 1615 12:29:52.024932  PCI: 00:16.3: enabled 0

 1616 12:29:52.027960  PCI: 00:16.4: enabled 0

 1617 12:29:52.031485  PCI: 00:16.5: enabled 0

 1618 12:29:52.034996  PCI: 00:17.0: enabled 1

 1619 12:29:52.035577  PCI: 00:19.0: enabled 1

 1620 12:29:52.037508  PCI: 00:19.1: enabled 0

 1621 12:29:52.040798  PCI: 00:19.2: enabled 0

 1622 12:29:52.044847  PCI: 00:1a.0: enabled 0

 1623 12:29:52.045364  PCI: 00:1c.0: enabled 0

 1624 12:29:52.047325  PCI: 00:1c.1: enabled 0

 1625 12:29:52.051574  PCI: 00:1c.2: enabled 0

 1626 12:29:52.052150  PCI: 00:1c.3: enabled 0

 1627 12:29:52.054872  PCI: 00:1c.4: enabled 0

 1628 12:29:52.057936  PCI: 00:1c.5: enabled 0

 1629 12:29:52.061726  PCI: 00:1c.6: enabled 0

 1630 12:29:52.062305  PCI: 00:1c.7: enabled 0

 1631 12:29:52.064718  PCI: 00:1d.0: enabled 1

 1632 12:29:52.068096  PCI: 00:1d.1: enabled 0

 1633 12:29:52.070981  PCI: 00:1d.2: enabled 0

 1634 12:29:52.071454  PCI: 00:1d.3: enabled 0

 1635 12:29:52.074909  PCI: 00:1d.4: enabled 0

 1636 12:29:52.077175  PCI: 00:1d.5: enabled 0

 1637 12:29:52.081301  PCI: 00:1e.0: enabled 1

 1638 12:29:52.081881  PCI: 00:1e.1: enabled 0

 1639 12:29:52.085099  PCI: 00:1e.2: enabled 1

 1640 12:29:52.087700  PCI: 00:1e.3: enabled 1

 1641 12:29:52.088276  PCI: 00:1f.0: enabled 1

 1642 12:29:52.090732  PCI: 00:1f.1: enabled 0

 1643 12:29:52.094321  PCI: 00:1f.2: enabled 0

 1644 12:29:52.097918  PCI: 00:1f.3: enabled 1

 1645 12:29:52.098493  PCI: 00:1f.4: enabled 1

 1646 12:29:52.100299  PCI: 00:1f.5: enabled 1

 1647 12:29:52.104027  PCI: 00:1f.6: enabled 0

 1648 12:29:52.107307  USB0 port 0: enabled 1

 1649 12:29:52.107781  I2C: 01:15: enabled 1

 1650 12:29:52.111324  I2C: 02:5d: enabled 1

 1651 12:29:52.113955  GENERIC: 0.0: enabled 1

 1652 12:29:52.114415  I2C: 03:1a: enabled 1

 1653 12:29:52.117545  I2C: 03:38: enabled 1

 1654 12:29:52.120561  I2C: 03:39: enabled 1

 1655 12:29:52.121024  I2C: 03:3a: enabled 1

 1656 12:29:52.124465  I2C: 03:3b: enabled 1

 1657 12:29:52.127384  PCI: 00:00.0: enabled 1

 1658 12:29:52.127839  SPI: 00: enabled 1

 1659 12:29:52.130854  SPI: 01: enabled 1

 1660 12:29:52.134394  PNP: 0c09.0: enabled 1

 1661 12:29:52.134973  USB2 port 0: enabled 1

 1662 12:29:52.137171  USB2 port 1: enabled 1

 1663 12:29:52.140782  USB2 port 2: enabled 0

 1664 12:29:52.144010  USB2 port 3: enabled 0

 1665 12:29:52.144598  USB2 port 5: enabled 0

 1666 12:29:52.147440  USB2 port 6: enabled 1

 1667 12:29:52.150448  USB2 port 9: enabled 1

 1668 12:29:52.151031  USB3 port 0: enabled 1

 1669 12:29:52.153541  USB3 port 1: enabled 1

 1670 12:29:52.157316  USB3 port 2: enabled 1

 1671 12:29:52.157895  USB3 port 3: enabled 1

 1672 12:29:52.160279  USB3 port 4: enabled 0

 1673 12:29:52.164448  APIC: 03: enabled 1

 1674 12:29:52.165036  APIC: 06: enabled 1

 1675 12:29:52.166945  APIC: 01: enabled 1

 1676 12:29:52.170789  APIC: 02: enabled 1

 1677 12:29:52.171370  APIC: 07: enabled 1

 1678 12:29:52.173606  APIC: 04: enabled 1

 1679 12:29:52.174185  APIC: 05: enabled 1

 1680 12:29:52.177265  PCI: 00:08.0: enabled 1

 1681 12:29:52.180406  PCI: 00:14.2: enabled 1

 1682 12:29:52.183490  PCI: 01:00.0: enabled 1

 1683 12:29:52.187294  Disabling ACPI via APMC:

 1684 12:29:52.187870  done.

 1685 12:29:52.193249  FMAP: area RW_ELOG found @ af0000 (16384 bytes)

 1686 12:29:52.196914  ELOG: NV offset 0xaf0000 size 0x4000

 1687 12:29:52.203194  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1688 12:29:52.210163  ELOG: Event(17) added with size 13 at 2023-11-08 12:29:52 UTC

 1689 12:29:52.216625  ELOG: Event(92) added with size 9 at 2023-11-08 12:29:52 UTC

 1690 12:29:52.223052  ELOG: Event(93) added with size 9 at 2023-11-08 12:29:52 UTC

 1691 12:29:52.230260  ELOG: Event(9A) added with size 9 at 2023-11-08 12:29:52 UTC

 1692 12:29:52.236858  ELOG: Event(9E) added with size 10 at 2023-11-08 12:29:52 UTC

 1693 12:29:52.243683  ELOG: Event(9F) added with size 14 at 2023-11-08 12:29:52 UTC

 1694 12:29:52.246208  BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6

 1695 12:29:52.254689  ELOG: Event(A1) added with size 10 at 2023-11-08 12:29:52 UTC

 1696 12:29:52.264164  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1697 12:29:52.271240  ELOG: Event(A0) added with size 9 at 2023-11-08 12:29:52 UTC

 1698 12:29:52.274123  elog_add_boot_reason: Logged dev mode boot

 1699 12:29:52.274685  Finalize devices...

 1700 12:29:52.277735  PCI: 00:17.0 final

 1701 12:29:52.280643  Devices finalized

 1702 12:29:52.283736  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)

 1703 12:29:52.290111  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0

 1704 12:29:52.294334  ME: HFSTS1                  : 0x90000245

 1705 12:29:52.296988  ME: HFSTS2                  : 0x3B850126

 1706 12:29:52.303951  ME: HFSTS3                  : 0x00000020

 1707 12:29:52.306593  ME: HFSTS4                  : 0x00004800

 1708 12:29:52.309921  ME: HFSTS5                  : 0x00000000

 1709 12:29:52.313791  ME: HFSTS6                  : 0x40400006

 1710 12:29:52.316710  ME: Manufacturing Mode      : NO

 1711 12:29:52.320136  ME: FW Partition Table      : OK

 1712 12:29:52.323174  ME: Bringup Loader Failure  : NO

 1713 12:29:52.326887  ME: Firmware Init Complete  : YES

 1714 12:29:52.329760  ME: Boot Options Present    : NO

 1715 12:29:52.333358  ME: Update In Progress      : NO

 1716 12:29:52.336516  ME: D0i3 Support            : YES

 1717 12:29:52.340020  ME: Low Power State Enabled : NO

 1718 12:29:52.343363  ME: CPU Replaced            : NO

 1719 12:29:52.345983  ME: CPU Replacement Valid   : YES

 1720 12:29:52.349966  ME: Current Working State   : 5

 1721 12:29:52.353411  ME: Current Operation State : 1

 1722 12:29:52.356203  ME: Current Operation Mode  : 0

 1723 12:29:52.359471  ME: Error Code              : 0

 1724 12:29:52.362866  ME: CPU Debug Disabled      : YES

 1725 12:29:52.365827  ME: TXT Support             : NO

 1726 12:29:52.372866  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 1727 12:29:52.379472  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1728 12:29:52.380049  CBFS @ c08000 size 3f8000

 1729 12:29:52.386128  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1730 12:29:52.389075  CBFS: Locating 'fallback/dsdt.aml'

 1731 12:29:52.392281  CBFS: Found @ offset 10bb80 size 3fa5

 1732 12:29:52.399073  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1733 12:29:52.402143  CBFS @ c08000 size 3f8000

 1734 12:29:52.408981  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1735 12:29:52.409560  CBFS: Locating 'fallback/slic'

 1736 12:29:52.414558  CBFS: 'fallback/slic' not found.

 1737 12:29:52.420965  ACPI: Writing ACPI tables at 99b3e000.

 1738 12:29:52.421540  ACPI:    * FACS

 1739 12:29:52.423982  ACPI:    * DSDT

 1740 12:29:52.428018  Ramoops buffer: 0x100000@0x99a3d000.

 1741 12:29:52.430856  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1742 12:29:52.437271  FMAP: area RW_VPD found @ af8000 (8192 bytes)

 1743 12:29:52.441063  Google Chrome EC: version:

 1744 12:29:52.443850  	ro: helios_v2.0.2659-56403530b

 1745 12:29:52.447332  	rw: helios_v2.0.2849-c41de27e7d

 1746 12:29:52.447811    running image: 1

 1747 12:29:52.451903  ACPI:    * FADT

 1748 12:29:52.452536  SCI is IRQ9

 1749 12:29:52.458045  ACPI: added table 1/32, length now 40

 1750 12:29:52.458625  ACPI:     * SSDT

 1751 12:29:52.461984  Found 1 CPU(s) with 8 core(s) each.

 1752 12:29:52.464525  Error: Could not locate 'wifi_sar' in VPD.

 1753 12:29:52.471251  Checking CBFS for default SAR values

 1754 12:29:52.474723  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1755 12:29:52.478625  CBFS @ c08000 size 3f8000

 1756 12:29:52.484464  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1757 12:29:52.488038  CBFS: Locating 'wifi_sar_defaults.hex'

 1758 12:29:52.491368  CBFS: Found @ offset 5fac0 size 77

 1759 12:29:52.494996  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3

 1760 12:29:52.501238  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15

 1761 12:29:52.504738  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d

 1762 12:29:52.510864  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a

 1763 12:29:52.513995  failed to find key in VPD: dsm_calib_r0_0

 1764 12:29:52.524020  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0

 1765 12:29:52.527503  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h

 1766 12:29:52.531013  failed to find key in VPD: dsm_calib_r0_1

 1767 12:29:52.540794  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0

 1768 12:29:52.547132  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h

 1769 12:29:52.550700  failed to find key in VPD: dsm_calib_r0_2

 1770 12:29:52.561114  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0

 1771 12:29:52.563688  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah

 1772 12:29:52.570105  failed to find key in VPD: dsm_calib_r0_3

 1773 12:29:52.576768  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0

 1774 12:29:52.583677  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh

 1775 12:29:52.586865  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1776 12:29:52.590756  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01

 1777 12:29:52.594223  EC returned error result code 1

 1778 12:29:52.598110  EC returned error result code 1

 1779 12:29:52.602311  EC returned error result code 1

 1780 12:29:52.608314  PS2K: Bad resp from EC. Vivaldi disabled!

 1781 12:29:52.612036  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1782 12:29:52.618057  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1

 1783 12:29:52.625456  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6

 1784 12:29:52.628616  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1785 12:29:52.634934  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1786 12:29:52.641635  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1

 1787 12:29:52.647923  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1788 12:29:52.651171  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3

 1789 12:29:52.654769  ACPI: added table 2/32, length now 44

 1790 12:29:52.658373  ACPI:    * MCFG

 1791 12:29:52.661054  ACPI: added table 3/32, length now 48

 1792 12:29:52.664661  ACPI:    * TPM2

 1793 12:29:52.667876  TPM2 log created at 99a2d000

 1794 12:29:52.671375  ACPI: added table 4/32, length now 52

 1795 12:29:52.671786  ACPI:    * MADT

 1796 12:29:52.675272  SCI is IRQ9

 1797 12:29:52.678206  ACPI: added table 5/32, length now 56

 1798 12:29:52.678721  current = 99b43ac0

 1799 12:29:52.681170  ACPI:    * DMAR

 1800 12:29:52.684263  ACPI: added table 6/32, length now 60

 1801 12:29:52.687822  ACPI:    * IGD OpRegion

 1802 12:29:52.688355  GMA: Found VBT in CBFS

 1803 12:29:52.691169  GMA: Found valid VBT in CBFS

 1804 12:29:52.694556  ACPI: added table 7/32, length now 64

 1805 12:29:52.698204  ACPI:    * HPET

 1806 12:29:52.701282  ACPI: added table 8/32, length now 68

 1807 12:29:52.701798  ACPI: done.

 1808 12:29:52.704730  ACPI tables: 31744 bytes.

 1809 12:29:52.708047  smbios_write_tables: 99a2c000

 1810 12:29:52.711214  EC returned error result code 3

 1811 12:29:52.714312  Couldn't obtain OEM name from CBI

 1812 12:29:52.717860  Create SMBIOS type 17

 1813 12:29:52.721326  PCI: 00:00.0 (Intel Cannonlake)

 1814 12:29:52.724406  PCI: 00:14.3 (Intel WiFi)

 1815 12:29:52.727900  SMBIOS tables: 939 bytes.

 1816 12:29:52.731235  Writing table forward entry at 0x00000500

 1817 12:29:52.737799  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628

 1818 12:29:52.740933  Writing coreboot table at 0x99b62000

 1819 12:29:52.747679   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1820 12:29:52.751256   1. 0000000000001000-000000000009ffff: RAM

 1821 12:29:52.754444   2. 00000000000a0000-00000000000fffff: RESERVED

 1822 12:29:52.761365   3. 0000000000100000-0000000099a2bfff: RAM

 1823 12:29:52.764142   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES

 1824 12:29:52.771185   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE

 1825 12:29:52.777198   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES

 1826 12:29:52.780910   7. 000000009a000000-000000009f7fffff: RESERVED

 1827 12:29:52.787312   8. 00000000e0000000-00000000efffffff: RESERVED

 1828 12:29:52.791489   9. 00000000fc000000-00000000fc000fff: RESERVED

 1829 12:29:52.793712  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1830 12:29:52.800473  11. 00000000fed10000-00000000fed17fff: RESERVED

 1831 12:29:52.803909  12. 00000000fed80000-00000000fed83fff: RESERVED

 1832 12:29:52.810690  13. 00000000fed90000-00000000fed91fff: RESERVED

 1833 12:29:52.813415  14. 00000000feda0000-00000000feda1fff: RESERVED

 1834 12:29:52.820534  15. 0000000100000000-000000045e7fffff: RAM

 1835 12:29:52.823897  Graphics framebuffer located at 0xc0000000

 1836 12:29:52.827344  Passing 5 GPIOs to payload:

 1837 12:29:52.830394              NAME |       PORT | POLARITY |     VALUE

 1838 12:29:52.837050     write protect |  undefined |     high |       low

 1839 12:29:52.840395               lid |  undefined |     high |      high

 1840 12:29:52.846860             power |  undefined |     high |       low

 1841 12:29:52.853788             oprom |  undefined |     high |       low

 1842 12:29:52.856412          EC in RW | 0x000000cb |     high |       low

 1843 12:29:52.860013  Board ID: 4

 1844 12:29:52.863365  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1845 12:29:52.866323  CBFS @ c08000 size 3f8000

 1846 12:29:52.873392  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1847 12:29:52.879981  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa

 1848 12:29:52.880582  coreboot table: 1492 bytes.

 1849 12:29:52.883095  IMD ROOT    0. 99fff000 00001000

 1850 12:29:52.886865  IMD SMALL   1. 99ffe000 00001000

 1851 12:29:52.889831  FSP MEMORY  2. 99c4e000 003b0000

 1852 12:29:52.893881  CONSOLE     3. 99c2e000 00020000

 1853 12:29:52.896649  FMAP        4. 99c2d000 0000054e

 1854 12:29:52.899829  TIME STAMP  5. 99c2c000 00000910

 1855 12:29:52.903222  VBOOT WORK  6. 99c18000 00014000

 1856 12:29:52.906613  MRC DATA    7. 99c16000 00001958

 1857 12:29:52.909400  ROMSTG STCK 8. 99c15000 00001000

 1858 12:29:52.912780  AFTER CAR   9. 99c0b000 0000a000

 1859 12:29:52.916445  RAMSTAGE   10. 99baf000 0005c000

 1860 12:29:52.919987  REFCODE    11. 99b7a000 00035000

 1861 12:29:52.923414  SMM BACKUP 12. 99b6a000 00010000

 1862 12:29:52.926250  COREBOOT   13. 99b62000 00008000

 1863 12:29:52.930281  ACPI       14. 99b3e000 00024000

 1864 12:29:52.932843  ACPI GNVS  15. 99b3d000 00001000

 1865 12:29:52.936368  RAMOOPS    16. 99a3d000 00100000

 1866 12:29:52.939859  TPM2 TCGLOG17. 99a2d000 00010000

 1867 12:29:52.943357  SMBIOS     18. 99a2c000 00000800

 1868 12:29:52.946361  IMD small region:

 1869 12:29:52.949215    IMD ROOT    0. 99ffec00 00000400

 1870 12:29:52.952875    FSP RUNTIME 1. 99ffebe0 00000004

 1871 12:29:52.956276    EC HOSTEVENT 2. 99ffebc0 00000008

 1872 12:29:52.959461    POWER STATE 3. 99ffeb80 00000040

 1873 12:29:52.962828    ROMSTAGE    4. 99ffeb60 00000004

 1874 12:29:52.966025    MEM INFO    5. 99ffe9a0 000001b9

 1875 12:29:52.969519    VPD         6. 99ffe920 0000006c

 1876 12:29:52.972858  MTRR: Physical address space:

 1877 12:29:52.979309  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1878 12:29:52.985878  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1879 12:29:52.992623  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6

 1880 12:29:52.999032  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0

 1881 12:29:53.005945  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1882 12:29:53.012309  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1883 12:29:53.018863  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6

 1884 12:29:53.023375  MTRR: Fixed MSR 0x250 0x0606060606060606

 1885 12:29:53.025677  MTRR: Fixed MSR 0x258 0x0606060606060606

 1886 12:29:53.028926  MTRR: Fixed MSR 0x259 0x0000000000000000

 1887 12:29:53.032399  MTRR: Fixed MSR 0x268 0x0606060606060606

 1888 12:29:53.038618  MTRR: Fixed MSR 0x269 0x0606060606060606

 1889 12:29:53.042497  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1890 12:29:53.045210  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1891 12:29:53.048705  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1892 12:29:53.055358  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1893 12:29:53.059136  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1894 12:29:53.061796  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1895 12:29:53.065256  call enable_fixed_mtrr()

 1896 12:29:53.068593  CPU physical address size: 39 bits

 1897 12:29:53.075128  MTRR: default type WB/UC MTRR counts: 6/8.

 1898 12:29:53.078601  MTRR: WB selected as default type.

 1899 12:29:53.082046  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0

 1900 12:29:53.088283  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0

 1901 12:29:53.096920  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 1902 12:29:53.101289  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1903 12:29:53.107969  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0

 1904 12:29:53.114978  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0

 1905 12:29:53.117874  MTRR: Fixed MSR 0x250 0x0606060606060606

 1906 12:29:53.124734  MTRR: Fixed MSR 0x258 0x0606060606060606

 1907 12:29:53.127924  MTRR: Fixed MSR 0x259 0x0000000000000000

 1908 12:29:53.131453  MTRR: Fixed MSR 0x268 0x0606060606060606

 1909 12:29:53.134692  MTRR: Fixed MSR 0x269 0x0606060606060606

 1910 12:29:53.141041  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1911 12:29:53.144299  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1912 12:29:53.147584  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1913 12:29:53.151727  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1914 12:29:53.157463  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1915 12:29:53.161323  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1916 12:29:53.161906  

 1917 12:29:53.162396  MTRR check

 1918 12:29:53.164810  Fixed MTRRs   : Enabled

 1919 12:29:53.167373  Variable MTRRs: Enabled

 1920 12:29:53.167845  

 1921 12:29:53.170925  call enable_fixed_mtrr()

 1922 12:29:53.174446  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2

 1923 12:29:53.177277  CPU physical address size: 39 bits

 1924 12:29:53.184710  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1925 12:29:53.187777  MTRR: Fixed MSR 0x250 0x0606060606060606

 1926 12:29:53.190903  MTRR: Fixed MSR 0x250 0x0606060606060606

 1927 12:29:53.197341  MTRR: Fixed MSR 0x258 0x0606060606060606

 1928 12:29:53.201256  MTRR: Fixed MSR 0x259 0x0000000000000000

 1929 12:29:53.204090  MTRR: Fixed MSR 0x268 0x0606060606060606

 1930 12:29:53.207512  MTRR: Fixed MSR 0x269 0x0606060606060606

 1931 12:29:53.214327  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1932 12:29:53.217843  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1933 12:29:53.220952  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1934 12:29:53.224183  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1935 12:29:53.227548  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1936 12:29:53.234046  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1937 12:29:53.237134  MTRR: Fixed MSR 0x258 0x0606060606060606

 1938 12:29:53.240787  call enable_fixed_mtrr()

 1939 12:29:53.243991  MTRR: Fixed MSR 0x259 0x0000000000000000

 1940 12:29:53.246742  MTRR: Fixed MSR 0x268 0x0606060606060606

 1941 12:29:53.254049  MTRR: Fixed MSR 0x269 0x0606060606060606

 1942 12:29:53.256917  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1943 12:29:53.260284  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1944 12:29:53.264726  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1945 12:29:53.267320  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1946 12:29:53.273738  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1947 12:29:53.277845  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1948 12:29:53.280789  CPU physical address size: 39 bits

 1949 12:29:53.284145  call enable_fixed_mtrr()

 1950 12:29:53.287279  MTRR: Fixed MSR 0x250 0x0606060606060606

 1951 12:29:53.290350  CPU physical address size: 39 bits

 1952 12:29:53.293625  MTRR: Fixed MSR 0x250 0x0606060606060606

 1953 12:29:53.299956  MTRR: Fixed MSR 0x250 0x0606060606060606

 1954 12:29:53.303465  MTRR: Fixed MSR 0x258 0x0606060606060606

 1955 12:29:53.306832  MTRR: Fixed MSR 0x259 0x0000000000000000

 1956 12:29:53.310492  MTRR: Fixed MSR 0x268 0x0606060606060606

 1957 12:29:53.316518  MTRR: Fixed MSR 0x269 0x0606060606060606

 1958 12:29:53.319765  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1959 12:29:53.323031  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1960 12:29:53.326538  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1961 12:29:53.333021  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1962 12:29:53.336472  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1963 12:29:53.339610  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1964 12:29:53.342759  MTRR: Fixed MSR 0x258 0x0606060606060606

 1965 12:29:53.346222  call enable_fixed_mtrr()

 1966 12:29:53.349420  MTRR: Fixed MSR 0x259 0x0000000000000000

 1967 12:29:53.355836  MTRR: Fixed MSR 0x268 0x0606060606060606

 1968 12:29:53.359509  MTRR: Fixed MSR 0x269 0x0606060606060606

 1969 12:29:53.362559  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1970 12:29:53.366416  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1971 12:29:53.372983  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1972 12:29:53.376432  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1973 12:29:53.379287  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1974 12:29:53.382585  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1975 12:29:53.389154  CPU physical address size: 39 bits

 1976 12:29:53.389707  call enable_fixed_mtrr()

 1977 12:29:53.393156  CBFS @ c08000 size 3f8000

 1978 12:29:53.398775  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1979 12:29:53.402154  MTRR: Fixed MSR 0x258 0x0606060606060606

 1980 12:29:53.405813  MTRR: Fixed MSR 0x250 0x0606060606060606

 1981 12:29:53.412142  MTRR: Fixed MSR 0x258 0x0606060606060606

 1982 12:29:53.415382  MTRR: Fixed MSR 0x259 0x0000000000000000

 1983 12:29:53.418848  MTRR: Fixed MSR 0x268 0x0606060606060606

 1984 12:29:53.422136  MTRR: Fixed MSR 0x269 0x0606060606060606

 1985 12:29:53.428822  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1986 12:29:53.432071  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1987 12:29:53.434998  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1988 12:29:53.438497  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1989 12:29:53.444895  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1990 12:29:53.448146  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1991 12:29:53.451423  MTRR: Fixed MSR 0x259 0x0000000000000000

 1992 12:29:53.454861  MTRR: Fixed MSR 0x268 0x0606060606060606

 1993 12:29:53.461611  MTRR: Fixed MSR 0x269 0x0606060606060606

 1994 12:29:53.464929  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1995 12:29:53.468567  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1996 12:29:53.471507  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1997 12:29:53.478447  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1998 12:29:53.481525  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1999 12:29:53.484716  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2000 12:29:53.487519  call enable_fixed_mtrr()

 2001 12:29:53.491450  call enable_fixed_mtrr()

 2002 12:29:53.494671  CPU physical address size: 39 bits

 2003 12:29:53.497671  CBFS: Locating 'fallback/payload'

 2004 12:29:53.500799  CPU physical address size: 39 bits

 2005 12:29:53.504635  CPU physical address size: 39 bits

 2006 12:29:53.507817  CBFS: Found @ offset 1c96c0 size 3f798

 2007 12:29:53.514938  Checking segment from ROM address 0xffdd16f8

 2008 12:29:53.517681  Checking segment from ROM address 0xffdd1714

 2009 12:29:53.520731  Loading segment from ROM address 0xffdd16f8

 2010 12:29:53.524253    code (compression=0)

 2011 12:29:53.534255    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760

 2012 12:29:53.540560  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760

 2013 12:29:53.544290  it's not compressed!

 2014 12:29:53.635816  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730

 2015 12:29:53.642048  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0

 2016 12:29:53.645210  Loading segment from ROM address 0xffdd1714

 2017 12:29:53.648940    Entry Point 0x30000000

 2018 12:29:53.651727  Loaded segments

 2019 12:29:53.657586  Finalizing chipset.

 2020 12:29:53.660887  Finalizing SMM.

 2021 12:29:53.664047  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5

 2022 12:29:53.667352  mp_park_aps done after 0 msecs.

 2023 12:29:53.674305  Jumping to boot code at 30000000(99b62000)

 2024 12:29:53.680850  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes

 2025 12:29:53.681466  

 2026 12:29:53.681864  

 2027 12:29:53.682204  

 2028 12:29:53.683773  Starting depthcharge on Helios...

 2029 12:29:53.684261  

 2030 12:29:53.685477  end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
 2031 12:29:53.686032  start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
 2032 12:29:53.686470  Setting prompt string to ['hatch:']
 2033 12:29:53.686960  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
 2034 12:29:53.693502  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2035 12:29:53.694056  

 2036 12:29:53.700191  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2037 12:29:53.700690  

 2038 12:29:53.706877  board_setup: Info: eMMC controller not present; skipping

 2039 12:29:53.707448  

 2040 12:29:53.710687  New NVMe Controller 0x30053ac0 @ 00:1d:00

 2041 12:29:53.711151  

 2042 12:29:53.716317  board_setup: Info: SDHCI controller not present; skipping

 2043 12:29:53.716766  

 2044 12:29:53.722978  vboot_create_vbsd: creating legacy VbSharedDataHeader structure

 2045 12:29:53.723410  

 2046 12:29:53.723834  Wipe memory regions:

 2047 12:29:53.724152  

 2048 12:29:53.726547  	[0x00000000001000, 0x000000000a0000)

 2049 12:29:53.727059  

 2050 12:29:53.733535  	[0x00000000100000, 0x00000030000000)

 2051 12:29:53.796395  

 2052 12:29:53.800085  	[0x00000030657430, 0x00000099a2c000)

 2053 12:29:53.936765  

 2054 12:29:53.939751  	[0x00000100000000, 0x0000045e800000)

 2055 12:29:55.323115  

 2056 12:29:55.323718  R8152: Initializing

 2057 12:29:55.324094  

 2058 12:29:55.325514  Version 9 (ocp_data = 6010)

 2059 12:29:55.330134  

 2060 12:29:55.330716  R8152: Done initializing

 2061 12:29:55.331083  

 2062 12:29:55.333149  Adding net device

 2063 12:29:55.942762  

 2064 12:29:55.943523  R8152: Initializing

 2065 12:29:55.944170  

 2066 12:29:55.945890  Version 6 (ocp_data = 5c30)

 2067 12:29:55.946297  

 2068 12:29:55.949413  R8152: Done initializing

 2069 12:29:55.949825  

 2070 12:29:55.955948  net_add_device: Attemp to include the same device

 2071 12:29:55.956524  

 2072 12:29:55.963544  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58

 2073 12:29:55.963958  

 2074 12:29:55.964281  

 2075 12:29:55.964630  

 2076 12:29:55.965368  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2078 12:29:56.066865  hatch: tftpboot 192.168.201.1 11967727/tftp-deploy-wfcot0l_/kernel/bzImage 11967727/tftp-deploy-wfcot0l_/kernel/cmdline 11967727/tftp-deploy-wfcot0l_/ramdisk/ramdisk.cpio.gz

 2079 12:29:56.067509  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2080 12:29:56.068038  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
 2081 12:29:56.072875  tftpboot 192.168.201.1 11967727/tftp-deploy-wfcot0l_/kernel/bzIploy-wfcot0l_/kernel/cmdline 11967727/tftp-deploy-wfcot0l_/ramdisk/ramdisk.cpio.gz

 2082 12:29:56.073436  

 2083 12:29:56.073794  Waiting for link

 2084 12:29:56.273517  

 2085 12:29:56.274075  done.

 2086 12:29:56.274440  

 2087 12:29:56.274775  MAC: 00:24:32:50:1a:5f

 2088 12:29:56.275101  

 2089 12:29:56.276979  Sending DHCP discover... done.

 2090 12:29:56.277451  

 2091 12:29:56.280391  Waiting for reply... done.

 2092 12:29:56.281003  

 2093 12:29:56.283842  Sending DHCP request... done.

 2094 12:29:56.284304  

 2095 12:29:56.290611  Waiting for reply... done.

 2096 12:29:56.291169  

 2097 12:29:56.291536  My ip is 192.168.201.21

 2098 12:29:56.291877  

 2099 12:29:56.293750  The DHCP server ip is 192.168.201.1

 2100 12:29:56.297398  

 2101 12:29:56.300243  TFTP server IP predefined by user: 192.168.201.1

 2102 12:29:56.300854  

 2103 12:29:56.306648  Bootfile predefined by user: 11967727/tftp-deploy-wfcot0l_/kernel/bzImage

 2104 12:29:56.307244  

 2105 12:29:56.310459  Sending tftp read request... done.

 2106 12:29:56.311019  

 2107 12:29:56.319895  Waiting for the transfer... 

 2108 12:29:56.320523  

 2109 12:29:57.039287  00000000 ################################################################

 2110 12:29:57.039809  

 2111 12:29:57.742213  00080000 ################################################################

 2112 12:29:57.742736  

 2113 12:29:58.462391  00100000 ################################################################

 2114 12:29:58.462903  

 2115 12:29:59.193607  00180000 ################################################################

 2116 12:29:59.194183  

 2117 12:29:59.897743  00200000 ################################################################

 2118 12:29:59.898316  

 2119 12:30:00.624258  00280000 ################################################################

 2120 12:30:00.624921  

 2121 12:30:01.366331  00300000 ################################################################

 2122 12:30:01.366901  

 2123 12:30:02.095286  00380000 ################################################################

 2124 12:30:02.095878  

 2125 12:30:02.819053  00400000 ################################################################

 2126 12:30:02.819627  

 2127 12:30:03.540020  00480000 ################################################################

 2128 12:30:03.540590  

 2129 12:30:04.265866  00500000 ################################################################

 2130 12:30:04.266492  

 2131 12:30:04.980453  00580000 ################################################################

 2132 12:30:04.981036  

 2133 12:30:05.725004  00600000 ################################################################

 2134 12:30:05.725624  

 2135 12:30:06.434480  00680000 ################################################################

 2136 12:30:06.435017  

 2137 12:30:07.159111  00700000 ################################################################

 2138 12:30:07.159697  

 2139 12:30:07.877484  00780000 ################################################################

 2140 12:30:07.878325  

 2141 12:30:08.602846  00800000 ################################################################

 2142 12:30:08.603446  

 2143 12:30:09.340606  00880000 ################################################################

 2144 12:30:09.341159  

 2145 12:30:10.052317  00900000 ################################################################

 2146 12:30:10.052914  

 2147 12:30:10.788067  00980000 ################################################################

 2148 12:30:10.788675  

 2149 12:30:11.532429  00a00000 ################################################################

 2150 12:30:11.532941  

 2151 12:30:12.284926  00a80000 ################################################################

 2152 12:30:12.285448  

 2153 12:30:12.337071  00b00000 ##### done.

 2154 12:30:12.337587  

 2155 12:30:12.339938  The bootfile was 11571200 bytes long.

 2156 12:30:12.340490  

 2157 12:30:12.343280  Sending tftp read request... done.

 2158 12:30:12.343701  

 2159 12:30:12.346950  Waiting for the transfer... 

 2160 12:30:12.347478  

 2161 12:30:13.065254  00000000 ################################################################

 2162 12:30:13.065808  

 2163 12:30:13.787818  00080000 ################################################################

 2164 12:30:13.788326  

 2165 12:30:14.498062  00100000 ################################################################

 2166 12:30:14.498638  

 2167 12:30:15.217884  00180000 ################################################################

 2168 12:30:15.218479  

 2169 12:30:15.953167  00200000 ################################################################

 2170 12:30:15.953740  

 2171 12:30:16.670509  00280000 ################################################################

 2172 12:30:16.671107  

 2173 12:30:17.375040  00300000 ################################################################

 2174 12:30:17.375619  

 2175 12:30:18.120082  00380000 ################################################################

 2176 12:30:18.120730  

 2177 12:30:18.850198  00400000 ################################################################

 2178 12:30:18.850818  

 2179 12:30:19.576712  00480000 ################################################################

 2180 12:30:19.577261  

 2181 12:30:20.279787  00500000 ################################################################

 2182 12:30:20.280310  

 2183 12:30:20.973651  00580000 ################################################################

 2184 12:30:20.974207  

 2185 12:30:21.706713  00600000 ################################################################

 2186 12:30:21.707393  

 2187 12:30:21.759874  00680000 ##### done.

 2188 12:30:21.760383  

 2189 12:30:21.763528  Sending tftp read request... done.

 2190 12:30:21.763956  

 2191 12:30:21.767003  Waiting for the transfer... 

 2192 12:30:21.767432  

 2193 12:30:21.767771  00000000 # done.

 2194 12:30:21.768101  

 2195 12:30:21.776269  Command line loaded dynamically from TFTP file: 11967727/tftp-deploy-wfcot0l_/kernel/cmdline

 2196 12:30:21.776799  

 2197 12:30:21.806252  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11967727/extract-nfsrootfs-asdd338l,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2198 12:30:21.806821  

 2199 12:30:21.809638  ec_init(0): CrosEC protocol v3 supported (256, 256)

 2200 12:30:21.816745  

 2201 12:30:21.820116  Shutting down all USB controllers.

 2202 12:30:21.820755  

 2203 12:30:21.821127  Removing current net device

 2204 12:30:21.827690  

 2205 12:30:21.828430  Finalizing coreboot

 2206 12:30:21.828849  

 2207 12:30:21.834527  Exiting depthcharge with code 4 at timestamp: 35554142

 2208 12:30:21.835205  

 2209 12:30:21.835732  

 2210 12:30:21.836092  Starting kernel ...

 2211 12:30:21.836491  

 2212 12:30:21.837922  end: 2.2.4 bootloader-commands (duration 00:00:28) [common]
 2213 12:30:21.838516  start: 2.2.5 auto-login-action (timeout 00:04:14) [common]
 2214 12:30:21.838947  Setting prompt string to ['Linux version [0-9]']
 2215 12:30:21.839328  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2216 12:30:21.839716  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2217 12:30:21.840632  

 2219 12:34:35.839543  end: 2.2.5 auto-login-action (duration 00:04:14) [common]
 2221 12:34:35.840690  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 254 seconds'
 2223 12:34:35.841549  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2226 12:34:35.842947  end: 2 depthcharge-action (duration 00:05:00) [common]
 2228 12:34:35.843967  Cleaning after the job
 2229 12:34:35.844084  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11967727/tftp-deploy-wfcot0l_/ramdisk
 2230 12:34:35.845225  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11967727/tftp-deploy-wfcot0l_/kernel
 2231 12:34:35.847021  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11967727/tftp-deploy-wfcot0l_/nfsrootfs
 2232 12:34:35.941971  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11967727/tftp-deploy-wfcot0l_/modules
 2233 12:34:35.942874  start: 4.1 power-off (timeout 00:00:30) [common]
 2234 12:34:35.943046  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
 2235 12:34:36.028600  >> Command sent successfully.

 2236 12:34:36.039940  Returned 0 in 0 seconds
 2237 12:34:36.141469  end: 4.1 power-off (duration 00:00:00) [common]
 2239 12:34:36.143033  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2240 12:34:36.144401  Listened to connection for namespace 'common' for up to 1s
 2242 12:34:36.145762  Listened to connection for namespace 'common' for up to 1s
 2243 12:34:37.144770  Finalising connection for namespace 'common'
 2244 12:34:37.145445  Disconnecting from shell: Finalise
 2245 12:34:37.145864  
 2246 12:34:37.246947  end: 4.2 read-feedback (duration 00:00:01) [common]
 2247 12:34:37.247578  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11967727
 2248 12:34:37.825603  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11967727
 2249 12:34:37.825795  JobError: Your job cannot terminate cleanly.